[Debian-coldfire-commits] r12 - in branches/binutils/package: . bfd
bfd/doc bfd/hosts bfd/po binutils binutils/doc binutils/po
binutils/testsuite binutils/testsuite/config
binutils/testsuite/lib config cpu debian debian/patches etc
gas gas/config gas/doc gas/po gas/testsuite
gas/testsuite/gas/all gas/testsuite/gas/arm
gas/testsuite/gas/i386 gas/testsuite/gas/ia64
gas/testsuite/gas/m68k gas/testsuite/gas/macros
gas/testsuite/gas/mips gas/testsuite/gas/mmix
gas/testsuite/gas/sparc gas/testsuite/gas/tic54x
gas/testsuite/gas/v850 gprof gprof/po include include/coff
include/elf include/opcode intl ld ld/emulparams ld/emultempl
ld/po ld/scripttempl ld/testsuite ld/testsuite/ld-arm
ld/testsuite/ld-elf ld/testsuite/ld-i386
ld/testsuite/ld-mips-elf ld/testsuite/ld-mmix
ld/testsuite/ld-powerpc ld/testsuite/ld-sparc
ld/testsuite/ld-x86-64 ld/testsuite/lib libiberty
libiberty/testsuite opcodes opcodes/po
Wouter Verhelst
wouter at costa.debian.org
Wed Apr 19 08:36:33 UTC 2006
Author: wouter
Date: 2006-04-19 08:33:31 +0000 (Wed, 19 Apr 2006)
New Revision: 12
Added:
branches/binutils/package/bfd/ChangeLog-2004
branches/binutils/package/bfd/ChangeLog-2005
branches/binutils/package/bfd/cpu-xc16x.c
branches/binutils/package/bfd/elf32-xc16x.c
branches/binutils/package/bfd/hosts/vaxlinux.h
branches/binutils/package/binutils/ChangeLog-2004
branches/binutils/package/binutils/ChangeLog-2005
branches/binutils/package/binutils/po/vi.po
branches/binutils/package/config/mh-ppc-aix
branches/binutils/package/config/stdint.m4
branches/binutils/package/cpu/xc16x.cpu
branches/binutils/package/cpu/xc16x.opc
branches/binutils/package/debian/README.cross
branches/binutils/package/debian/control.cross.in
branches/binutils/package/gas/ChangeLog-2004
branches/binutils/package/gas/ChangeLog-2005
branches/binutils/package/gas/config/tc-xc16x.c
branches/binutils/package/gas/config/tc-xc16x.h
branches/binutils/package/gas/doc/c-xc16x.texi
branches/binutils/package/gas/testsuite/ChangeLog-2004
branches/binutils/package/gas/testsuite/ChangeLog-2005
branches/binutils/package/gas/testsuite/gas/arm/abs12.d
branches/binutils/package/gas/testsuite/gas/arm/abs12.s
branches/binutils/package/gas/testsuite/gas/arm/arch7.d
branches/binutils/package/gas/testsuite/gas/arm/arch7.s
branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.d
branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.l
branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.s
branches/binutils/package/gas/testsuite/gas/arm/blx-local.d
branches/binutils/package/gas/testsuite/gas/arm/blx-local.s
branches/binutils/package/gas/testsuite/gas/arm/nomapping.d
branches/binutils/package/gas/testsuite/gas/arm/nomapping.s
branches/binutils/package/gas/testsuite/gas/arm/pic_vxworks.d
branches/binutils/package/gas/testsuite/gas/arm/svc.d
branches/binutils/package/gas/testsuite/gas/arm/svc.s
branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.d
branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.s
branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.d
branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.s
branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.d
branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.l
branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.s
branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.d
branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.s
branches/binutils/package/gas/testsuite/gas/i386/merom.d
branches/binutils/package/gas/testsuite/gas/i386/merom.s
branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.d
branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.s
branches/binutils/package/gas/testsuite/gas/i386/rep.d
branches/binutils/package/gas/testsuite/gas/i386/rep.s
branches/binutils/package/gas/testsuite/gas/i386/rex.d
branches/binutils/package/gas/testsuite/gas/i386/rex.s
branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx-suffix.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.s
branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx-suffix.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.s
branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.s
branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.s
branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.d
branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.s
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.d
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.s
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.d
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.s
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.d
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.s
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.d
branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.s
branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.d
branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.s
branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.d
branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.s
branches/binutils/package/gas/testsuite/gas/macros/paren.d
branches/binutils/package/gas/testsuite/gas/macros/paren.s
branches/binutils/package/gas/testsuite/gas/mips/vxworks1-xgot.d
branches/binutils/package/gas/testsuite/gas/mips/vxworks1.d
branches/binutils/package/gas/testsuite/gas/mips/vxworks1.s
branches/binutils/package/gas/testsuite/gas/mmix/hex2.d
branches/binutils/package/gas/testsuite/gas/mmix/hex2.s
branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.d
branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.s
branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.d
branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.s
branches/binutils/package/gas/testsuite/gas/sparc/window.d
branches/binutils/package/gas/testsuite/gas/sparc/window.s
branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.d
branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.s
branches/binutils/package/gprof/ChangeLog-2004
branches/binutils/package/gprof/ChangeLog-2005
branches/binutils/package/include/elf/xc16x.h
branches/binutils/package/ld/ChangeLog-2004
branches/binutils/package/ld/ChangeLog-2005
branches/binutils/package/ld/elf-hints-local.h
branches/binutils/package/ld/emulparams/elf32_sparc_vxworks.sh
branches/binutils/package/ld/emulparams/elf32bfinfd.sh
branches/binutils/package/ld/emulparams/elf32ebmipvxworks.sh
branches/binutils/package/ld/emulparams/elf32elmipvxworks.sh
branches/binutils/package/ld/emulparams/elf32ppccommon.sh
branches/binutils/package/ld/emulparams/elf32xc16x.sh
branches/binutils/package/ld/emulparams/elf32xc16xl.sh
branches/binutils/package/ld/emulparams/elf32xc16xs.sh
branches/binutils/package/ld/emultempl/vxworks.em
branches/binutils/package/ld/po/vi.po
branches/binutils/package/ld/po/zh_CN.po
branches/binutils/package/ld/scripttempl/elf32xc16x.sc
branches/binutils/package/ld/scripttempl/elf32xc16xl.sc
branches/binutils/package/ld/scripttempl/elf32xc16xs.sc
branches/binutils/package/ld/testsuite/ChangeLog-2004
branches/binutils/package/ld/testsuite/ChangeLog-2005
branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.d
branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.s
branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.dd
branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.nd
branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.rd
branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.s
branches/binutils/package/ld/testsuite/ld-arm/vxworks1-static.d
branches/binutils/package/ld/testsuite/ld-arm/vxworks1.dd
branches/binutils/package/ld/testsuite/ld-arm/vxworks1.ld
branches/binutils/package/ld/testsuite/ld-arm/vxworks1.rd
branches/binutils/package/ld/testsuite/ld-arm/vxworks1.s
branches/binutils/package/ld/testsuite/ld-arm/vxworks2-static.sd
branches/binutils/package/ld/testsuite/ld-arm/vxworks2.s
branches/binutils/package/ld/testsuite/ld-arm/vxworks2.sd
branches/binutils/package/ld/testsuite/ld-elf/orphan2.d
branches/binutils/package/ld/testsuite/ld-elf/orphan2.s
branches/binutils/package/ld/testsuite/ld-elf/unknown2.d
branches/binutils/package/ld/testsuite/ld-elf/unknown2.s
branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.d
branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.s
branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.dd
branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.rd
branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.s
branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.sd
branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.td
branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.dd
branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.rd
branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.s
branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.sd
branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.td
branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.dd
branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.rd
branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.s
branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.dd
branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.nd
branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.rd
branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.s
branches/binutils/package/ld/testsuite/ld-i386/vxworks1-static.d
branches/binutils/package/ld/testsuite/ld-i386/vxworks1.dd
branches/binutils/package/ld/testsuite/ld-i386/vxworks1.ld
branches/binutils/package/ld/testsuite/ld-i386/vxworks1.rd
branches/binutils/package/ld/testsuite/ld-i386/vxworks1.s
branches/binutils/package/ld/testsuite/ld-i386/vxworks2-static.sd
branches/binutils/package/ld/testsuite/ld-i386/vxworks2.s
branches/binutils/package/ld/testsuite/ld-i386/vxworks2.sd
branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.d
branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.ld
branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1a.s
branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1b.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2-got.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2a.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2b.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.ld
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.r
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3a.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3b.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.r
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4a.s
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4b.s
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.nd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.s
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-static.d
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.dd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.ld
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.rd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.s
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2-static.sd
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.s
branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.sd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.dd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.nd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.rd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.s
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.sd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-static.d
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.dd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.ld
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.rd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.s
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2-static.sd
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.s
branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.sd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.dd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.nd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.rd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.s
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-static.d
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.dd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.ld
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.rd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.s
branches/binutils/package/ld/testsuite/ld-sparc/vxworks2-static.sd
branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.s
branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.sd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.dd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.rd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.s
branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.sd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.td
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.dd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.pd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.rd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.s
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.sd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.td
branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.dd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.rd
branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.s
branches/binutils/package/libiberty/testsuite/test-expandargv.c
branches/binutils/package/opcodes/ChangeLog-2004
branches/binutils/package/opcodes/ChangeLog-2005
branches/binutils/package/opcodes/mt-asm.c
branches/binutils/package/opcodes/mt-desc.c
branches/binutils/package/opcodes/mt-desc.h
branches/binutils/package/opcodes/mt-dis.c
branches/binutils/package/opcodes/mt-ibld.c
branches/binutils/package/opcodes/mt-opc.c
branches/binutils/package/opcodes/mt-opc.h
branches/binutils/package/opcodes/po/zh_CN.po
branches/binutils/package/opcodes/xc16x-asm.c
branches/binutils/package/opcodes/xc16x-desc.c
branches/binutils/package/opcodes/xc16x-desc.h
branches/binutils/package/opcodes/xc16x-dis.c
branches/binutils/package/opcodes/xc16x-ibld.c
branches/binutils/package/opcodes/xc16x-opc.c
branches/binutils/package/opcodes/xc16x-opc.h
Modified:
branches/binutils/package/COPYING.NEWLIB
branches/binutils/package/ChangeLog
branches/binutils/package/MAINTAINERS
branches/binutils/package/Makefile.def
branches/binutils/package/Makefile.in
branches/binutils/package/Makefile.tpl
branches/binutils/package/bfd/ChangeLog
branches/binutils/package/bfd/Makefile.am
branches/binutils/package/bfd/Makefile.in
branches/binutils/package/bfd/aix386-core.c
branches/binutils/package/bfd/aix5ppc-core.c
branches/binutils/package/bfd/aoutx.h
branches/binutils/package/bfd/archures.c
branches/binutils/package/bfd/bfd-in.h
branches/binutils/package/bfd/bfd-in2.h
branches/binutils/package/bfd/bfd.c
branches/binutils/package/bfd/cisco-core.c
branches/binutils/package/bfd/coff-arm.c
branches/binutils/package/bfd/coff-h8300.c
branches/binutils/package/bfd/coff-h8500.c
branches/binutils/package/bfd/coff-ppc.c
branches/binutils/package/bfd/coff-w65.c
branches/binutils/package/bfd/coff-z80.c
branches/binutils/package/bfd/coff-z8k.c
branches/binutils/package/bfd/cofflink.c
branches/binutils/package/bfd/config.bfd
branches/binutils/package/bfd/configure
branches/binutils/package/bfd/configure.host
branches/binutils/package/bfd/configure.in
branches/binutils/package/bfd/corefile.c
branches/binutils/package/bfd/cpu-arm.c
branches/binutils/package/bfd/cpu-avr.c
branches/binutils/package/bfd/cpu-ia64-opc.c
branches/binutils/package/bfd/cpu-m68k.c
branches/binutils/package/bfd/cpu-mt.c
branches/binutils/package/bfd/doc/ChangeLog
branches/binutils/package/bfd/doc/Makefile.am
branches/binutils/package/bfd/doc/Makefile.in
branches/binutils/package/bfd/dwarf2.c
branches/binutils/package/bfd/ecoff.c
branches/binutils/package/bfd/ecofflink.c
branches/binutils/package/bfd/elf-bfd.h
branches/binutils/package/bfd/elf-eh-frame.c
branches/binutils/package/bfd/elf-m10300.c
branches/binutils/package/bfd/elf-strtab.c
branches/binutils/package/bfd/elf-vxworks.c
branches/binutils/package/bfd/elf-vxworks.h
branches/binutils/package/bfd/elf.c
branches/binutils/package/bfd/elf32-arm.c
branches/binutils/package/bfd/elf32-avr.c
branches/binutils/package/bfd/elf32-bfin.c
branches/binutils/package/bfd/elf32-cris.c
branches/binutils/package/bfd/elf32-frv.c
branches/binutils/package/bfd/elf32-hppa.c
branches/binutils/package/bfd/elf32-i386.c
branches/binutils/package/bfd/elf32-m32c.c
branches/binutils/package/bfd/elf32-m32r.c
branches/binutils/package/bfd/elf32-m68hc1x.c
branches/binutils/package/bfd/elf32-m68k.c
branches/binutils/package/bfd/elf32-mips.c
branches/binutils/package/bfd/elf32-mt.c
branches/binutils/package/bfd/elf32-ppc.c
branches/binutils/package/bfd/elf32-s390.c
branches/binutils/package/bfd/elf32-sh.c
branches/binutils/package/bfd/elf32-sparc.c
branches/binutils/package/bfd/elf32-vax.c
branches/binutils/package/bfd/elf32-xtensa.c
branches/binutils/package/bfd/elf64-alpha.c
branches/binutils/package/bfd/elf64-hppa.c
branches/binutils/package/bfd/elf64-ppc.c
branches/binutils/package/bfd/elf64-s390.c
branches/binutils/package/bfd/elf64-sh64.c
branches/binutils/package/bfd/elf64-x86-64.c
branches/binutils/package/bfd/elflink.c
branches/binutils/package/bfd/elfxx-ia64.c
branches/binutils/package/bfd/elfxx-mips.c
branches/binutils/package/bfd/elfxx-mips.h
branches/binutils/package/bfd/elfxx-sparc.c
branches/binutils/package/bfd/elfxx-sparc.h
branches/binutils/package/bfd/elfxx-target.h
branches/binutils/package/bfd/hash.c
branches/binutils/package/bfd/hppabsd-core.c
branches/binutils/package/bfd/hpux-core.c
branches/binutils/package/bfd/i386linux.c
branches/binutils/package/bfd/ieee.c
branches/binutils/package/bfd/irix-core.c
branches/binutils/package/bfd/libaout.h
branches/binutils/package/bfd/libbfd-in.h
branches/binutils/package/bfd/libbfd.h
branches/binutils/package/bfd/libcoff-in.h
branches/binutils/package/bfd/libcoff.h
branches/binutils/package/bfd/linker.c
branches/binutils/package/bfd/lynx-core.c
branches/binutils/package/bfd/m68klinux.c
branches/binutils/package/bfd/mach-o.c
branches/binutils/package/bfd/merge.c
branches/binutils/package/bfd/netbsd-core.c
branches/binutils/package/bfd/opncls.c
branches/binutils/package/bfd/osf-core.c
branches/binutils/package/bfd/pdp11.c
branches/binutils/package/bfd/peXXigen.c
branches/binutils/package/bfd/po/Make-in
branches/binutils/package/bfd/po/SRC-POTFILES.in
branches/binutils/package/bfd/ptrace-core.c
branches/binutils/package/bfd/reloc.c
branches/binutils/package/bfd/sco5-core.c
branches/binutils/package/bfd/section.c
branches/binutils/package/bfd/sparclinux.c
branches/binutils/package/bfd/stabs.c
branches/binutils/package/bfd/sunos.c
branches/binutils/package/bfd/targets.c
branches/binutils/package/bfd/trad-core.c
branches/binutils/package/bfd/version.h
branches/binutils/package/bfd/vms.c
branches/binutils/package/bfd/xcofflink.c
branches/binutils/package/binutils/BRANCHES
branches/binutils/package/binutils/ChangeLog
branches/binutils/package/binutils/MAINTAINERS
branches/binutils/package/binutils/Makefile.am
branches/binutils/package/binutils/Makefile.in
branches/binutils/package/binutils/addr2line.c
branches/binutils/package/binutils/bucomm.c
branches/binutils/package/binutils/bucomm.h
branches/binutils/package/binutils/config.in
branches/binutils/package/binutils/configure
branches/binutils/package/binutils/configure.in
branches/binutils/package/binutils/dlltool.c
branches/binutils/package/binutils/doc/Makefile.am
branches/binutils/package/binutils/doc/Makefile.in
branches/binutils/package/binutils/doc/binutils.texi
branches/binutils/package/binutils/dwarf.c
branches/binutils/package/binutils/ieee.c
branches/binutils/package/binutils/objcopy.c
branches/binutils/package/binutils/objdump.c
branches/binutils/package/binutils/po/Make-in
branches/binutils/package/binutils/rddbg.c
branches/binutils/package/binutils/readelf.c
branches/binutils/package/binutils/resbin.c
branches/binutils/package/binutils/testsuite/ChangeLog
branches/binutils/package/binutils/testsuite/config/default.exp
branches/binutils/package/binutils/testsuite/lib/utils-lib.exp
branches/binutils/package/binutils/wrstabs.c
branches/binutils/package/config.guess
branches/binutils/package/config.sub
branches/binutils/package/config/ChangeLog
branches/binutils/package/config/acx.m4
branches/binutils/package/configure
branches/binutils/package/configure.in
branches/binutils/package/cpu/ChangeLog
branches/binutils/package/cpu/iq2000.opc
branches/binutils/package/cpu/m32c.cpu
branches/binutils/package/cpu/m32c.opc
branches/binutils/package/cpu/mt.cpu
branches/binutils/package/cpu/mt.opc
branches/binutils/package/debian/changelog
branches/binutils/package/debian/control
branches/binutils/package/debian/copyright
branches/binutils/package/debian/patches/00list
branches/binutils/package/debian/patches/120_mips_xgot_multigot_workaround.dpatch
branches/binutils/package/debian/rules
branches/binutils/package/etc/ChangeLog
branches/binutils/package/etc/Makefile.in
branches/binutils/package/etc/configure
branches/binutils/package/etc/configure.in
branches/binutils/package/etc/configure.texi
branches/binutils/package/etc/standards.texi
branches/binutils/package/gas/ChangeLog
branches/binutils/package/gas/Makefile.am
branches/binutils/package/gas/Makefile.in
branches/binutils/package/gas/NEWS
branches/binutils/package/gas/app.c
branches/binutils/package/gas/as.c
branches/binutils/package/gas/as.h
branches/binutils/package/gas/config.in
branches/binutils/package/gas/config/bfin-defs.h
branches/binutils/package/gas/config/bfin-lex.l
branches/binutils/package/gas/config/bfin-parse.y
branches/binutils/package/gas/config/tc-arc.c
branches/binutils/package/gas/config/tc-arm.c
branches/binutils/package/gas/config/tc-avr.c
branches/binutils/package/gas/config/tc-bfin.c
branches/binutils/package/gas/config/tc-crx.c
branches/binutils/package/gas/config/tc-frv.c
branches/binutils/package/gas/config/tc-i370.c
branches/binutils/package/gas/config/tc-i386.c
branches/binutils/package/gas/config/tc-i386.h
branches/binutils/package/gas/config/tc-ia64.c
branches/binutils/package/gas/config/tc-m32c.c
branches/binutils/package/gas/config/tc-m32c.h
branches/binutils/package/gas/config/tc-m68k.c
branches/binutils/package/gas/config/tc-m68k.h
branches/binutils/package/gas/config/tc-mips.c
branches/binutils/package/gas/config/tc-mips.h
branches/binutils/package/gas/config/tc-mmix.c
branches/binutils/package/gas/config/tc-mn10200.c
branches/binutils/package/gas/config/tc-mn10300.c
branches/binutils/package/gas/config/tc-mt.c
branches/binutils/package/gas/config/tc-mt.h
branches/binutils/package/gas/config/tc-sparc.c
branches/binutils/package/gas/config/tc-tic54x.c
branches/binutils/package/gas/config/tc-v850.c
branches/binutils/package/gas/config/tc-vax.c
branches/binutils/package/gas/config/tc-vax.h
branches/binutils/package/gas/config/tc-xtensa.c
branches/binutils/package/gas/config/tc-xtensa.h
branches/binutils/package/gas/config/tc-z80.c
branches/binutils/package/gas/config/tc-z80.h
branches/binutils/package/gas/config/xtensa-istack.h
branches/binutils/package/gas/config/xtensa-relax.c
branches/binutils/package/gas/configure
branches/binutils/package/gas/configure.in
branches/binutils/package/gas/configure.tgt
branches/binutils/package/gas/doc/Makefile.am
branches/binutils/package/gas/doc/Makefile.in
branches/binutils/package/gas/doc/all.texi
branches/binutils/package/gas/doc/as.texinfo
branches/binutils/package/gas/doc/c-arm.texi
branches/binutils/package/gas/doc/c-m68k.texi
branches/binutils/package/gas/doc/c-mt.texi
branches/binutils/package/gas/doc/c-z80.texi
branches/binutils/package/gas/dw2gencfi.c
branches/binutils/package/gas/dwarf2dbg.c
branches/binutils/package/gas/expr.c
branches/binutils/package/gas/frags.c
branches/binutils/package/gas/frags.h
branches/binutils/package/gas/macro.c
branches/binutils/package/gas/messages.c
branches/binutils/package/gas/po/Make-in
branches/binutils/package/gas/po/POTFILES.in
branches/binutils/package/gas/symbols.c
branches/binutils/package/gas/symbols.h
branches/binutils/package/gas/testsuite/ChangeLog
branches/binutils/package/gas/testsuite/gas/all/altmac2.s
branches/binutils/package/gas/testsuite/gas/all/altmacro.s
branches/binutils/package/gas/testsuite/gas/all/cond.l
branches/binutils/package/gas/testsuite/gas/all/cond.s
branches/binutils/package/gas/testsuite/gas/arm/armv1.d
branches/binutils/package/gas/testsuite/gas/arm/inst.d
branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.l
branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.s
branches/binutils/package/gas/testsuite/gas/arm/pic.d
branches/binutils/package/gas/testsuite/gas/arm/thumb.d
branches/binutils/package/gas/testsuite/gas/arm/thumb32.d
branches/binutils/package/gas/testsuite/gas/arm/thumb32.s
branches/binutils/package/gas/testsuite/gas/arm/unwind_vxworks.d
branches/binutils/package/gas/testsuite/gas/arm/wince_inst.d
branches/binutils/package/gas/testsuite/gas/i386/equ.e
branches/binutils/package/gas/testsuite/gas/i386/equ.s
branches/binutils/package/gas/testsuite/gas/i386/i386.exp
branches/binutils/package/gas/testsuite/gas/i386/naked.d
branches/binutils/package/gas/testsuite/gas/i386/reloc64.d
branches/binutils/package/gas/testsuite/gas/i386/reloc64.l
branches/binutils/package/gas/testsuite/gas/i386/reloc64.s
branches/binutils/package/gas/testsuite/gas/i386/x86_64.d
branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.l
branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.s
branches/binutils/package/gas/testsuite/gas/ia64/ia64.exp
branches/binutils/package/gas/testsuite/gas/ia64/opc-b.d
branches/binutils/package/gas/testsuite/gas/ia64/opc-b.s
branches/binutils/package/gas/testsuite/gas/ia64/opc-i.d
branches/binutils/package/gas/testsuite/gas/ia64/opc-i.s
branches/binutils/package/gas/testsuite/gas/ia64/pseudo.d
branches/binutils/package/gas/testsuite/gas/ia64/pseudo.s
branches/binutils/package/gas/testsuite/gas/m68k/all.exp
branches/binutils/package/gas/testsuite/gas/macros/macros.exp
branches/binutils/package/gas/testsuite/gas/mips/mips.exp
branches/binutils/package/gas/testsuite/gas/sparc/rdpr.d
branches/binutils/package/gas/testsuite/gas/sparc/rdpr.s
branches/binutils/package/gas/testsuite/gas/sparc/sparc.exp
branches/binutils/package/gas/testsuite/gas/sparc/wrpr.d
branches/binutils/package/gas/testsuite/gas/sparc/wrpr.s
branches/binutils/package/gas/testsuite/gas/tic54x/address.d
branches/binutils/package/gas/testsuite/gas/tic54x/addrfar.d
branches/binutils/package/gas/testsuite/gas/tic54x/align.d
branches/binutils/package/gas/testsuite/gas/tic54x/all-opcodes.d
branches/binutils/package/gas/testsuite/gas/tic54x/asg.d
branches/binutils/package/gas/testsuite/gas/tic54x/cons.d
branches/binutils/package/gas/testsuite/gas/tic54x/consfar.d
branches/binutils/package/gas/testsuite/gas/tic54x/extaddr.d
branches/binutils/package/gas/testsuite/gas/tic54x/field.d
branches/binutils/package/gas/testsuite/gas/tic54x/labels.d
branches/binutils/package/gas/testsuite/gas/tic54x/loop.d
branches/binutils/package/gas/testsuite/gas/tic54x/lp.d
branches/binutils/package/gas/testsuite/gas/tic54x/macro.d
branches/binutils/package/gas/testsuite/gas/tic54x/math.d
branches/binutils/package/gas/testsuite/gas/tic54x/opcodes.d
branches/binutils/package/gas/testsuite/gas/tic54x/sections.d
branches/binutils/package/gas/testsuite/gas/tic54x/set.d
branches/binutils/package/gas/testsuite/gas/tic54x/struct.d
branches/binutils/package/gas/testsuite/gas/tic54x/subsym.d
branches/binutils/package/gas/testsuite/gas/v850/v850e1.d
branches/binutils/package/gprof/ChangeLog
branches/binutils/package/gprof/Makefile.am
branches/binutils/package/gprof/Makefile.in
branches/binutils/package/gprof/aclocal.m4
branches/binutils/package/gprof/configure
branches/binutils/package/gprof/configure.in
branches/binutils/package/gprof/corefile.c
branches/binutils/package/gprof/gconfig.in
branches/binutils/package/gprof/po/Make-in
branches/binutils/package/gprof/po/sv.po
branches/binutils/package/include/ChangeLog
branches/binutils/package/include/bfdlink.h
branches/binutils/package/include/coff/ChangeLog
branches/binutils/package/include/coff/internal.h
branches/binutils/package/include/dis-asm.h
branches/binutils/package/include/elf/ChangeLog
branches/binutils/package/include/elf/arm.h
branches/binutils/package/include/elf/avr.h
branches/binutils/package/include/elf/bfin.h
branches/binutils/package/include/elf/common.h
branches/binutils/package/include/elf/dwarf2.h
branches/binutils/package/include/elf/hppa.h
branches/binutils/package/include/elf/i386.h
branches/binutils/package/include/elf/ia64.h
branches/binutils/package/include/elf/internal.h
branches/binutils/package/include/elf/m32c.h
branches/binutils/package/include/elf/m68k.h
branches/binutils/package/include/elf/mips.h
branches/binutils/package/include/elf/mt.h
branches/binutils/package/include/elf/x86-64.h
branches/binutils/package/include/libiberty.h
branches/binutils/package/include/md5.h
branches/binutils/package/include/opcode/ChangeLog
branches/binutils/package/include/opcode/arm.h
branches/binutils/package/include/opcode/avr.h
branches/binutils/package/include/opcode/hppa.h
branches/binutils/package/include/opcode/i386.h
branches/binutils/package/include/opcode/ia64.h
branches/binutils/package/include/opcode/m68k.h
branches/binutils/package/include/xtensa-config.h
branches/binutils/package/intl/ChangeLog
branches/binutils/package/intl/Makefile.in
branches/binutils/package/ld/ChangeLog
branches/binutils/package/ld/Makefile.am
branches/binutils/package/ld/Makefile.in
branches/binutils/package/ld/NEWS
branches/binutils/package/ld/configure
branches/binutils/package/ld/configure.in
branches/binutils/package/ld/configure.tgt
branches/binutils/package/ld/deffile.h
branches/binutils/package/ld/deffilep.y
branches/binutils/package/ld/emulparams/armelf_vxworks.sh
branches/binutils/package/ld/emulparams/bfin.sh
branches/binutils/package/ld/emulparams/elf32mt.sh
branches/binutils/package/ld/emulparams/elf32ppc.sh
branches/binutils/package/ld/emulparams/elf32ppcvxworks.sh
branches/binutils/package/ld/emulparams/h8300.sh
branches/binutils/package/ld/emulparams/h8300elf.sh
branches/binutils/package/ld/emulparams/h8300sxelf.sh
branches/binutils/package/ld/emulparams/vxworks.sh
branches/binutils/package/ld/emultempl/armelf.em
branches/binutils/package/ld/emultempl/elf32.em
branches/binutils/package/ld/emultempl/ia64elf.em
branches/binutils/package/ld/emultempl/irix.em
branches/binutils/package/ld/emultempl/xtensaelf.em
branches/binutils/package/ld/genscripts.sh
branches/binutils/package/ld/ld.texinfo
branches/binutils/package/ld/ldcref.c
branches/binutils/package/ld/ldlang.c
branches/binutils/package/ld/ldmain.c
branches/binutils/package/ld/ldmisc.c
branches/binutils/package/ld/pe-dll.c
branches/binutils/package/ld/po/Make-in
branches/binutils/package/ld/po/ld.pot
branches/binutils/package/ld/scripttempl/avr.sc
branches/binutils/package/ld/scripttempl/elf.sc
branches/binutils/package/ld/testsuite/ChangeLog
branches/binutils/package/ld/testsuite/ld-arm/arm-elf.exp
branches/binutils/package/ld/testsuite/ld-i386/i386.exp
branches/binutils/package/ld/testsuite/ld-i386/pcrel16.d
branches/binutils/package/ld/testsuite/ld-i386/pcrel8.d
branches/binutils/package/ld/testsuite/ld-mips-elf/mips-elf.exp
branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-n32.d
branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-o32.d
branches/binutils/package/ld/testsuite/ld-mips-elf/rel64.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.r
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.d
branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got
branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32.got
branches/binutils/package/ld/testsuite/ld-mmix/sec-1.d
branches/binutils/package/ld/testsuite/ld-powerpc/powerpc.exp
branches/binutils/package/ld/testsuite/ld-powerpc/tls32.s
branches/binutils/package/ld/testsuite/ld-sparc/sparc.exp
branches/binutils/package/ld/testsuite/ld-x86-64/x86-64.exp
branches/binutils/package/ld/testsuite/lib/ld-lib.exp
branches/binutils/package/libiberty/ChangeLog
branches/binutils/package/libiberty/Makefile.in
branches/binutils/package/libiberty/argv.c
branches/binutils/package/libiberty/configure
branches/binutils/package/libiberty/configure.ac
branches/binutils/package/libiberty/floatformat.c
branches/binutils/package/libiberty/functions.texi
branches/binutils/package/libiberty/partition.c
branches/binutils/package/libiberty/pex-common.c
branches/binutils/package/libiberty/pex-common.h
branches/binutils/package/libiberty/pex-djgpp.c
branches/binutils/package/libiberty/pex-msdos.c
branches/binutils/package/libiberty/pex-unix.c
branches/binutils/package/libiberty/pex-win32.c
branches/binutils/package/libiberty/pexecute.c
branches/binutils/package/libiberty/pexecute.txh
branches/binutils/package/libiberty/testsuite/Makefile.in
branches/binutils/package/libtool.m4
branches/binutils/package/ltmain.sh
branches/binutils/package/opcodes/ChangeLog
branches/binutils/package/opcodes/Makefile.am
branches/binutils/package/opcodes/Makefile.in
branches/binutils/package/opcodes/arm-dis.c
branches/binutils/package/opcodes/avr-dis.c
branches/binutils/package/opcodes/bfin-dis.c
branches/binutils/package/opcodes/cgen-ibld.in
branches/binutils/package/opcodes/configure
branches/binutils/package/opcodes/configure.in
branches/binutils/package/opcodes/disassemble.c
branches/binutils/package/opcodes/fr30-ibld.c
branches/binutils/package/opcodes/frv-ibld.c
branches/binutils/package/opcodes/i386-dis.c
branches/binutils/package/opcodes/ia64-asmtab.c
branches/binutils/package/opcodes/ia64-gen.c
branches/binutils/package/opcodes/ia64-ic.tbl
branches/binutils/package/opcodes/ia64-opc-b.c
branches/binutils/package/opcodes/ia64-opc-i.c
branches/binutils/package/opcodes/ia64-opc.h
branches/binutils/package/opcodes/ia64-raw.tbl
branches/binutils/package/opcodes/ia64-waw.tbl
branches/binutils/package/opcodes/ip2k-ibld.c
branches/binutils/package/opcodes/iq2000-asm.c
branches/binutils/package/opcodes/iq2000-ibld.c
branches/binutils/package/opcodes/m32c-asm.c
branches/binutils/package/opcodes/m32c-desc.c
branches/binutils/package/opcodes/m32c-desc.h
branches/binutils/package/opcodes/m32c-dis.c
branches/binutils/package/opcodes/m32c-ibld.c
branches/binutils/package/opcodes/m32c-opc.c
branches/binutils/package/opcodes/m32c-opc.h
branches/binutils/package/opcodes/m32r-ibld.c
branches/binutils/package/opcodes/m68k-dis.c
branches/binutils/package/opcodes/m68k-opc.c
branches/binutils/package/opcodes/mips-opc.c
branches/binutils/package/opcodes/openrisc-ibld.c
branches/binutils/package/opcodes/pdp11-opc.c
branches/binutils/package/opcodes/pj-opc.c
branches/binutils/package/opcodes/po/Make-in
branches/binutils/package/opcodes/po/POTFILES.in
branches/binutils/package/opcodes/po/sv.po
branches/binutils/package/opcodes/po/vi.po
branches/binutils/package/opcodes/sparc-dis.c
branches/binutils/package/opcodes/sparc-opc.c
branches/binutils/package/opcodes/xstormy16-ibld.c
branches/binutils/package/opcodes/z80-dis.c
Log:
Pull in updates from Debian package
Modified: branches/binutils/package/COPYING.NEWLIB
===================================================================
--- branches/binutils/package/COPYING.NEWLIB 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/COPYING.NEWLIB 2006-04-19 08:33:31 UTC (rev 12)
@@ -731,7 +731,7 @@
It should be noted that Red Hat Incorporated now owns copyrights
belonging to Cygnus Solutions and Cygnus Support.
-Copyright (c) 1994, 1997, 2001, 2002, 2003, 2004 Red Hat Incorporated.
+Copyright (c) 1994, 1997, 2001, 2002, 2003, 2004, 2005 Red Hat Incorporated.
All rights reserved.
Redistribution and use in source and binary forms, with or without
Modified: branches/binutils/package/ChangeLog
===================================================================
--- branches/binutils/package/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,234 @@
+2006-04-10 Ben Elliston <bje at au.ibm.com>
+
+ * contrib: Remove directory.
+
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.tpl: Add install-html target.
+ * Makefile.def: Add install-html target.
+ * Makefile.in: Regenerate.
+ * configure.in: Add --with-datarootdir, --with-docdir,
+ and --with-htmldir options.
+ * configure: Regenerate.
+
+2006-03-31 Ben Elliston <bje at au.ibm.com>
+
+ PR binutils/1860
+ * configure.in: Require makeinfo 4.4 or higher.
+ * configure: Regenerate.
+
+2006-03-14 Paolo Bonzini <bonzini at gnu.org>
+
+ * Makefile.in: Regenerate.
+
+2006-03-14 Paolo Bonzini <bonzini at gnu.org>
+
+ Sync with gcc:
+ 2006-03-10 Aldy Hernandez <aldyh at redhat.com>
+
+ * configure.in: Handle --disable-<component> generically.
+ * configure: Regenerate.
+
+ 2006-02-21 Rafael Avila de Espindola <rafael.espindola at gmail.com>
+
+ * Makefile.tpl (BUILD_CONFIGDIRS): Remove.
+ (TARGET_CONFIGDIRS): Remove.
+ * configure.in: Remove AC_SUBST(target_configdirs).
+ * Makefile.in, configure: Regenerated.
+
+
+2006-03-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR libgcj/17311
+ * ltmain.sh: Don't use "$finalize_rpath" for compile.
+
+2006-02-20 Paolo Bonzini <bonzini at gnu.org>
+
+ PR bootstrap/25670
+
+ * Makefile.tpl ([+compare-target+]): Print explanation messages.
+
+ * Makefile.def (ADAFLAGS, BOOT_ADAFLAGS, LANGUAGES): New flags_to_pass.
+ * Makefile.tpl (BASE_FLAGS_TO_PASS): Support optional flags_to_pass.
+ (EXTRA_GCC_FLAGS): Remove ADAFLAGS, BOOT_ADAFLAGS, LANGUAGES,
+ BUILD_PREFIX, BUILD_PREFIX_1.
+ * configure.in: (BUILD_PREFIX, BUILD_PREFIX_1): Don't substitute.
+
+ * Makefile.def (bootstrap stage 1): Pass LIBCFLAGS too.
+ * Makefile.tpl (POSTSTAGE1_FLAGS_TO_PASS): Override LIBCFLAGS too.
+
+ * Makefile.tpl (configure-stage[+id+]-[+prefix+][+module+],
+ all-stage[+id+]-[+prefix+][+module+], : Use $(current_stage) instead
+ of `cat stage_current`. Always provide the `r' and `s' variables.
+ (clean-stage[+id+]-[+prefix+][+module+]): Likewise, and make it into
+ a single shell execution.
+ (configure-[+prefix+][+module+], all-[+prefix+][+module+]): For
+ bootstrapped modules, make the stage1 module if the build was not
+ started yet, else build the current stage.
+ (all-host, all-target): Omit bootstrapped modules (if bootstrapping).
+ (all-build, all-host, all-target, [+make_target+]-host,
+ [+make_target+]-target): Do not use \-continued lines.
+ (target modules): Depend on stage_last, not all-gcc, if bootstrapping.
+ (current_stage, restrap, stage_last): New.
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2006-02-14 Paolo Bonzini <bonzini at gnu.org>
+
+ Sync from gcc:
+
+ 2006-01-31 Richard Guenther <rguenther at suse.de>
+ Paolo Bonzini <bonzini at gnu.org>
+
+ * Makefile.def (target_modules): Add libgcc-math target module.
+ * configure.in (target_libraries): Add libgcc-math target library.
+ (--enable-libgcc-math): New configure switch.
+ * Makefile.in: Re-generate.
+ * configure: Re-generate.
+ * libgcc-math: New toplevel directory.
+
+ 2006-01-18 Richard Henderson <rth at redhat.com>
+ Jakub Jelinek <jakub at redhat.com>
+ Diego Novillo <dnovillo at redhat.com>
+
+ * libgomp: New directory.
+ * Makefile.def: Add target_module libgomp.
+ * Makefile.in: Regenerate.
+ * configure.in (target_libraries): Add target-libgomp.
+ * configure: Regenerate.
+
+2006-02-14 Paolo Bonzini <bonzini at gnu.org>
+ Andreas Schwab <schwab at suse.de>
+
+ * configure: Regenerate.
+
+2006-01-16 Paolo Bonzini <bonzini at gnu.org>
+
+ * configure.in: Set with_gnu_as, with_gnu_ld, with_newlib earlier.
+ Set md_exec_prefix. Use ACX_CHECK_INSTALLED_TARGET_TOOL to find
+ the assembler, linker and binutils.
+ * configure: Regenerate.
+
+2006-01-16 Nick Clifton <nickc at redhat.com>
+
+ * config.sub, config.guess: Sync from config repository.
+
+2006-01-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * Makefile.tpl (clean-stage[+id+]-[+prefix+][+module+]): Remove
+ @ from continuation.
+ * Makefile.in: Rebuilt.
+
+2006-01-04 Paolo Bonzini <bonzini at gnu.org>
+
+ Sync from gcc:
+
+ 2006-01-04 Paolo Bonzini <bonzini at gnu.org>
+
+ PR bootstrap/24252
+
+ * Makefile.def (flags_to_pass): Add STAGE1_CFLAGS and STAGE1_LANGUAGES.
+ * Makefile.tpl (OBJDUMP): New.
+ (EXTRA_HOST_FLAGS): Add it.
+ (EXTRA_GCC_FLAGS): Remove flags already specified in flags_to_pass.
+
+ * Makefile.tpl (stage[+id+]-start, stage[+id+]-end): Do not try
+ to use symbolic links between directories. Avoid race conditions
+ or make them harmless.
+ * configure.in: Do not try to use symbolic links between directories.
+
+ * Makefile.def (LEAN): Pass.
+ * Makefile.tpl (LEAN): Define.
+ (stage[+id+]-start): Accept that the previous directory does not
+ exist, if the bootstrap is lean.
+ (stage[+id+]-bubble): Invoke lean bootstrap commands after
+ stage[+id+]-start. Use a makefile variable and an `if' instead of a
+ configure substitution.
+ ([+compare-target+]): Likewise.
+ ([+bootstrap-target+]-lean): New.
+ * configure.in: Remove lean bootstrap support from here.
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+ 2006-01-02 Andreas Schwab <schwab at suse.de>
+
+ * configure.in: When reconfiguring remove Makefile in
+ all stage directories.
+ * configure: Regenerate.
+
+2005-12-27 Leif Ekblad <leif at rdos.net>
+
+ * configure.in: Add support for RDOS target.
+ * configure: Regenerate.
+
+2005-12-27 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/1990
+ * libtool.m4: Synchronize with version in GCC sources.
+
+2005-12-20 Paolo Bonzini <bonzini at gnu.org>
+
+ Revert Ada-related part of the previous change.
+
+ * Makefile.def (ADAFLAGS, BOOT_ADAFLAGS, ADAFLAGS_FOR_TARGET):
+ Do not pass.
+ * Makefile.tpl (BOOT_ADAFLAGS): Do not define.
+ * Makefile.in: Regenerate.
+ * configure.in: Do not include mt-ppc-aix target fragment.
+ * configure: Regenerate.
+
+2005-12-19 Paolo Bonzini <bonzini at gnu.org>
+
+ * configure.in: Select appropriate fragments for PowerPC/AIX.
+ * configure: Regenerate.
+
+ * Makefile.def (flags_to_pass): Add ADAFLAGS, BOOT_ADAFLAGS,
+ BOOT_CFLAGS, BOOT_LDFLAGS.
+ * Makefile.tpl (POSTSTAGE1_FLAGS_TO_PASS): Handle BOOT_ADAFLAGS,
+ BOOT_CFLAGS, BOOT_LDFLAGS.
+ (TARGET_FLAGS_TO_PASS): Handle ADAFLAGS_FOR_TARGET.
+ (stage[+id+]-bubble): Pass flags recursively to the comparison target.
+ (stage): Fail if we cannot complete the work.
+ * Makefile.in: Regenerate.
+
+2005-12-16 Jeff Johnston <jjohnstn at redhat.com>
+
+ * COPYING.NEWLIB: Update copyright year for default
+ copyright.
+
+2005-12-15 Paolo Bonzini <bonzini at gnu.org>
+
+ * Makefile.tpl (all, do-[+make_target+], do-check, install,
+ install-host-nogcc): Don't invoke $(stage) at the end.
+ * Makefile.in: Regenerate.
+
+2005-12-14 Paolo Bonzini <bonzini at gnu.org>
+
+ * configure.in: Flip the top-level bootstrap switch.
+ * configure: Regenerate.
+
+ Merge from gcc:
+
+ 2005-12-14 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.tpl: Throughout the file, use : $(MAKE) along with
+ $(stage) and $(unstage).
+ (EXTRA_TARGET_FLAGS): Correct double-quoting.
+ (all): Remove stray semicolon.
+ (local-distclean): Don't handle multilib.tmp and multilib.out.
+ (install.all): Set $s for consistency.
+ (configure-[+prefix+][+module+]): Instead of [+deps+], handle
+ check_multilibs setting. Always make the install directory.
+ (configure-stage[+id+]-[+prefix+][+module+]): Likewise.
+ Correct @if/@endif.
+ (all-stage[+id+]-[+prefix+][+module+]): Correct @if/@endif.
+ ($(TARGET_SUBDIR)/[+module+]/multilib.out): Remove.
+ (stage[+id+]-start, stage[+id+]-end): Stage $(TARGET_SUBDIR).
+ (multilib.out): Remove.
+ * Makefile.in: Regenerated.
+
2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
* config.sub: Replace ms1 arch with mt. Allow ms1 as alias.
@@ -8,6 +239,16 @@
Sync with gcc:
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * config.sub: Replace ms1 arch with mt. Allow ms1 as alias.
+ * configure.in: Replace ms1 arch with mt.
+ * configure: Rebuilt.
+
+2005-12-05 Paolo Bonzini <bonzini at gnu.org>
+
+ Sync with gcc:
+
2005-12-05 Paolo Bonzini <bonzini at gnu.org>
* configure.in (CONFIGURED_BISON, CONFIGURED_YACC, CONFIGURED_M4,
Modified: branches/binutils/package/MAINTAINERS
===================================================================
--- branches/binutils/package/MAINTAINERS 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/MAINTAINERS 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,11 @@
http://gnu.org.
Makefile.*; configure; configure.in; src-release
- Please notify the following of any committed patches.
+ Any global maintainer can approve changes to these
+ files, but they should be aware that they need to
+ be kept in sync with their counterparts in the GCC
+ repository. Also please notify the following of
+ any committed patches:
binutils at sources.redhat.com
gdb-patches at sources.redhat.com
@@ -94,10 +98,18 @@
General discussion cygwin at sources.redhat.com.
See also winsup/MAINTAINERS.
-config-ml.in; setup.com; missing; makefile.vms; utils/; config/;
-makefile.vms; missing; ylwrap; mkdep; etc/; install-sh; intl/
- Ask DJ Delorie <dj at redhat.com> after reading the libiberty entry.
+config-ml.in; makefile.vms; mkdep; setup.com;
+etc/; intl/; utils/;
+ Any global maintainer can approve changes to these
+ files and directories.
+compile; depcomp; install-sh; missing; ylwrap;
+config/
+ Any global maintainer can approve changes to these
+ files and directories, but they should be aware
+ that they need to be kept in sync with their
+ counterparts in the GCC repository.
+
modules file
Obviously changes to this file should not go through
overseers at sources.redhat.com. If you understand the file
Modified: branches/binutils/package/Makefile.def
===================================================================
--- branches/binutils/package/Makefile.def 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/Makefile.def 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,7 +4,7 @@
// Makefile.in is generated from Makefile.tpl by 'autogen Makefile.def'.
// This file was originally written by Nathanael Nerode.
//
-// Copyright 2002, 2003 Free Software Foundation
+// Copyright 2002, 2003, 2004, 2005, 2006 Free Software Foundation
//
// This file is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -117,6 +117,7 @@
target_modules = { module= libstdc++-v3; lib_path=.libs; raw_cxx=true; };
target_modules = { module= libmudflap; lib_path=.libs; };
target_modules = { module= libssp; lib_path=.libs; };
+target_modules = { module= libgcc-math; lib_path=.libs; };
target_modules = { module= newlib; };
target_modules = { module= libgfortran; };
target_modules = { module= libobjc; };
@@ -137,6 +138,7 @@
target_modules = { module= qthreads; };
target_modules = { module= rda; };
target_modules = { module= libada; };
+target_modules = { module= libgomp; lib_path=.libs; };
// These are (some of) the make targets to be done in each subdirectory.
// Not all; these are the ones which don't have special options.
@@ -153,6 +155,9 @@
recursive_targets = { make_target= install-info;
depend=configure;
depend=info; };
+recursive_targets = { make_target= install-html;
+ depend=configure;
+ depend=html; };
recursive_targets = { make_target= installcheck;
depend=configure; };
recursive_targets = { make_target= mostlyclean; };
@@ -170,7 +175,10 @@
flags_to_pass = { flag= datadir ; };
flags_to_pass = { flag= exec_prefix ; };
flags_to_pass = { flag= includedir ; };
+flags_to_pass = { flag= datarootdir ; };
+flags_to_pass = { flag= docdir ; };
flags_to_pass = { flag= infodir ; };
+flags_to_pass = { flag= htmldir ; };
flags_to_pass = { flag= libdir ; };
flags_to_pass = { flag= libexecdir ; };
flags_to_pass = { flag= lispdir ; };
@@ -205,12 +213,18 @@
flags_to_pass = { flag= YACC ; };
// Host tools
+flags_to_pass = { flag= ADAFLAGS ; optional=true ; };
flags_to_pass = { flag= AR_FLAGS ; };
+flags_to_pass = { flag= BOOT_ADAFLAGS ; optional=true ; };
+flags_to_pass = { flag= BOOT_CFLAGS ; };
+flags_to_pass = { flag= BOOT_LDFLAGS ; };
flags_to_pass = { flag= CFLAGS ; };
flags_to_pass = { flag= CXXFLAGS ; };
flags_to_pass = { flag= LDFLAGS ; };
flags_to_pass = { flag= LIBCFLAGS ; };
flags_to_pass = { flag= LIBCXXFLAGS ; };
+flags_to_pass = { flag= STAGE1_CFLAGS ; };
+flags_to_pass = { flag= STAGE1_LANGUAGES ; };
// Target tools
flags_to_pass = { flag= AR_FOR_TARGET ; };
@@ -234,6 +248,10 @@
flags_to_pass = { flag= STRIP_FOR_TARGET ; };
flags_to_pass = { flag= WINDRES_FOR_TARGET ; };
+// Miscellaneous
+flags_to_pass = { flag= LANGUAGES ; optional=true ; };
+flags_to_pass = { flag= LEAN ; };
+
// Inter-module dependencies
// Build modules
@@ -452,7 +470,7 @@
id=1 ;
stage_configure_flags='--disable-intermodule \
--disable-coverage --enable-languages="$(STAGE1_LANGUAGES)"' ;
- stage_make_flags='CFLAGS="$(STAGE1_CFLAGS)"' ; };
+ stage_make_flags='CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)"' ; };
bootstrap_stage = {
id=2 ; prev=1 ;
bootstrap_target=bootstrap2 ;
Modified: branches/binutils/package/Makefile.in
===================================================================
--- branches/binutils/package/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
#
# Makefile for directory with subdirs to build.
# Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-# 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation
+# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -50,6 +50,9 @@
includedir = @includedir@
oldincludedir = @oldincludedir@
infodir = @infodir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+htmldir = @htmldir@
mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
@@ -84,8 +87,6 @@
# the libraries.
RPATH_ENVVAR = @RPATH_ENVVAR@
-# This is the list of directories to be built for the build system.
-BUILD_CONFIGDIRS = libiberty
# Build programs are put under this directory.
BUILD_SUBDIR = @build_subdir@
# This is set by the configure script to the arguments to use when configuring
@@ -178,9 +179,6 @@
-B$$r/$(HOST_SUBDIR)/prev-gcc/ \
-B$(build_tooldir)/bin/"; export CC_FOR_BUILD;
-# This is set by the configure script to the list of directories which
-# should be built using the target tools.
-TARGET_CONFIGDIRS = @target_configdirs@
# Target libraries are put under this directory:
TARGET_SUBDIR = @target_subdir@
# This is set by the configure script to the arguments to use when configuring
@@ -252,6 +250,7 @@
# Flags to pass to stage2 and later makes. They are defined
# here so that they can be overridden by Makefile fragments.
BOOT_CFLAGS= -g -O2
+BOOT_LDFLAGS=
BISON = @BISON@
YACC = @YACC@
@@ -281,6 +280,7 @@
LD = @LD@
LIPO = @LIPO@
NM = @NM@
+OBJDUMP = @OBJDUMP@
RANLIB = @RANLIB@
STRIP = @STRIP@
WINDRES = @WINDRES@
@@ -354,7 +354,7 @@
# This is the list of directories that may be needed in RPATH_ENVVAR
# so that prorgams built for the target machine work.
-TARGET_LIB_PATH = $(TARGET_LIB_PATH_libstdc++-v3)$(TARGET_LIB_PATH_libmudflap)$(TARGET_LIB_PATH_libssp)$(HOST_LIB_PATH_gcc)
+TARGET_LIB_PATH = $(TARGET_LIB_PATH_libstdc++-v3)$(TARGET_LIB_PATH_libmudflap)$(TARGET_LIB_PATH_libssp)$(TARGET_LIB_PATH_libgcc-math)$(TARGET_LIB_PATH_libgomp)$(HOST_LIB_PATH_gcc)
@if target-libstdc++-v3
TARGET_LIB_PATH_libstdc++-v3 = $$r/$(TARGET_SUBDIR)/libstdc++-v3/.libs:
@@ -368,8 +368,16 @@
TARGET_LIB_PATH_libssp = $$r/$(TARGET_SUBDIR)/libssp/.libs:
@endif target-libssp
+ at if target-libgcc-math
+TARGET_LIB_PATH_libgcc-math = $$r/$(TARGET_SUBDIR)/libgcc-math/.libs:
+ at endif target-libgcc-math
+ at if target-libgomp
+TARGET_LIB_PATH_libgomp = $$r/$(TARGET_SUBDIR)/libgomp/.libs:
+ at endif target-libgomp
+
+
# This is the list of directories that may be needed in RPATH_ENVVAR
# so that programs built for the host machine work.
HOST_LIB_PATH = $(HOST_LIB_PATH_bfd)$(HOST_LIB_PATH_opcodes)
@@ -400,7 +408,10 @@
"datadir=$(datadir)" \
"exec_prefix=$(exec_prefix)" \
"includedir=$(includedir)" \
+ "datarootdir=$(datarootdir)" \
+ "docdir=$(docdir)" \
"infodir=$(infodir)" \
+ "htmldir=$(htmldir)" \
"libdir=$(libdir)" \
"libexecdir=$(libexecdir)" \
"lispdir=$(lispdir)" \
@@ -431,12 +442,18 @@
"RUNTESTFLAGS=$(RUNTESTFLAGS)" \
"SHELL=$(SHELL)" \
"YACC=$(YACC)" \
+ "`echo 'ADAFLAGS=$(ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"AR_FLAGS=$(AR_FLAGS)" \
+ "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
+ "BOOT_CFLAGS=$(BOOT_CFLAGS)" \
+ "BOOT_LDFLAGS=$(BOOT_LDFLAGS)" \
"CFLAGS=$(CFLAGS)" \
"CXXFLAGS=$(CXXFLAGS)" \
"LDFLAGS=$(LDFLAGS)" \
"LIBCFLAGS=$(LIBCFLAGS)" \
"LIBCXXFLAGS=$(LIBCXXFLAGS)" \
+ "STAGE1_CFLAGS=$(STAGE1_CFLAGS)" \
+ "STAGE1_LANGUAGES=$(STAGE1_LANGUAGES)" \
"AR_FOR_TARGET=$(AR_FOR_TARGET)" \
"AS_FOR_TARGET=$(AS_FOR_TARGET)" \
"CC_FOR_TARGET=$(CC_FOR_TARGET)" \
@@ -457,6 +474,8 @@
"RANLIB_FOR_TARGET=$(RANLIB_FOR_TARGET)" \
"STRIP_FOR_TARGET=$(STRIP_FOR_TARGET)" \
"WINDRES_FOR_TARGET=$(WINDRES_FOR_TARGET)" \
+ "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
+ "LEAN=$(LEAN)" \
"CONFIG_SHELL=$(SHELL)" \
"MAKEINFO=$(MAKEINFO) $(MAKEINFOFLAGS)"
@@ -474,6 +493,7 @@
'LD=$(LD)' \
'LIPO=$(LIPO)' \
'NM=$(NM)' \
+ 'OBJDUMP=$(OBJDUMP)' \
'RANLIB=$(RANLIB)' \
'STRIP=$(STRIP)' \
'WINDRES=$(WINDRES)'
@@ -493,21 +513,22 @@
'X11_EXTRA_LIBS=$(X11_EXTRA_LIBS)'
# Flags to pass down to makes which are built with the target environment.
-# The double $ decreases the length of the command line; the variables
-# are set in BASE_FLAGS_TO_PASS, and the sub-make will expand them.
+# The double $ decreases the length of the command line; those variables
+# are set in BASE_FLAGS_TO_PASS, and the sub-make will expand them. The
+# COMPILER_ prefixed variables are not passed down so we expand them here.
EXTRA_TARGET_FLAGS = \
'AR=$$(AR_FOR_TARGET)' \
- 'AS=$$(COMPILER_AS_FOR_TARGET)' \
+ 'AS=$(COMPILER_AS_FOR_TARGET)' \
'CC=$$(CC_FOR_TARGET)' \
'CFLAGS=$$(CFLAGS_FOR_TARGET)' \
'CXX=$$(CXX_FOR_TARGET)' \
'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET)' \
'DLLTOOL=$$(DLLTOOL_FOR_TARGET)' \
- 'LD=$$(COMPILER_LD_FOR_TARGET)' \
+ 'LD=$(COMPILER_LD_FOR_TARGET)' \
'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \
'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \
'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET)' \
- 'NM=$$(COMPILER_NM_FOR_TARGET)' \
+ 'NM=$(COMPILER_NM_FOR_TARGET)' \
'OBJDUMP=$$(OBJDUMP_FOR_TARGET)' \
'RANLIB=$$(RANLIB_FOR_TARGET)' \
'WINDRES=$$(WINDRES_FOR_TARGET)'
@@ -521,18 +542,12 @@
# The BUILD_* variables are a special case, which are used for the gcc
# cross-building scheme.
EXTRA_GCC_FLAGS = \
- 'BUILD_PREFIX=$(BUILD_PREFIX)' \
- 'BUILD_PREFIX_1=$(BUILD_PREFIX_1)' \
"GCC_FOR_TARGET=$(GCC_FOR_TARGET)" \
- "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"
+ "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"
GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS)
@@ -611,6 +626,7 @@
maybe-configure-target-libstdc++-v3 \
maybe-configure-target-libmudflap \
maybe-configure-target-libssp \
+ maybe-configure-target-libgcc-math \
maybe-configure-target-newlib \
maybe-configure-target-libgfortran \
maybe-configure-target-libobjc \
@@ -626,7 +642,8 @@
maybe-configure-target-boehm-gc \
maybe-configure-target-qthreads \
maybe-configure-target-rda \
- maybe-configure-target-libada
+ maybe-configure-target-libada \
+ maybe-configure-target-libgomp
# The target built for a native non-bootstrap build.
.PHONY: all
@@ -635,9 +652,9 @@
[ -f stage_final ] || echo stage3 > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
- $(MAKE) $(RECURSE_FLAGS_TO_PASS) `cat stage_final`-bubble; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) `cat stage_final`-bubble
@endif gcc-bootstrap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
if [ -f stage_last ]; then \
@@ -645,109 +662,134 @@
else \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) all-host all-target; \
fi
- @$(stage)
.PHONY: all-build
-all-build: \
- maybe-all-build-libiberty \
- maybe-all-build-bison \
- maybe-all-build-byacc \
- maybe-all-build-flex \
- maybe-all-build-m4 \
- maybe-all-build-texinfo \
- maybe-all-build-fixincludes
+
+all-build: maybe-all-build-libiberty
+all-build: maybe-all-build-bison
+all-build: maybe-all-build-byacc
+all-build: maybe-all-build-flex
+all-build: maybe-all-build-m4
+all-build: maybe-all-build-texinfo
+all-build: maybe-all-build-fixincludes
+
.PHONY: all-host
-all-host: \
- maybe-all-ash \
- maybe-all-autoconf \
- maybe-all-automake \
- maybe-all-bash \
- maybe-all-bfd \
- maybe-all-opcodes \
- maybe-all-binutils \
- maybe-all-bison \
- maybe-all-byacc \
- maybe-all-bzip2 \
- maybe-all-dejagnu \
- maybe-all-diff \
- maybe-all-dosutils \
- maybe-all-etc \
- maybe-all-fastjar \
- maybe-all-fileutils \
- maybe-all-findutils \
- maybe-all-find \
- maybe-all-fixincludes \
- maybe-all-flex \
- maybe-all-gas \
- maybe-all-gcc \
- maybe-all-gawk \
- maybe-all-gettext \
- maybe-all-gnuserv \
- maybe-all-gprof \
- maybe-all-gzip \
- maybe-all-hello \
- maybe-all-indent \
- maybe-all-intl \
- maybe-all-tcl \
- maybe-all-itcl \
- maybe-all-ld \
- maybe-all-libcpp \
- maybe-all-libdecnumber \
- maybe-all-libgui \
- maybe-all-libiberty \
- maybe-all-libtool \
- maybe-all-m4 \
- maybe-all-make \
- maybe-all-mmalloc \
- maybe-all-patch \
- maybe-all-perl \
- maybe-all-prms \
- maybe-all-rcs \
- maybe-all-readline \
- maybe-all-release \
- maybe-all-recode \
- maybe-all-sed \
- maybe-all-send-pr \
- maybe-all-shellutils \
- maybe-all-sid \
- maybe-all-sim \
- maybe-all-tar \
- maybe-all-texinfo \
- maybe-all-textutils \
- maybe-all-time \
- maybe-all-uudecode \
- maybe-all-wdiff \
- maybe-all-zip \
- maybe-all-zlib \
- maybe-all-gdb \
- maybe-all-expect \
- maybe-all-guile \
- maybe-all-tk \
- maybe-all-libtermcap \
- maybe-all-utils \
- maybe-all-gnattools
+
+all-host: maybe-all-ash
+all-host: maybe-all-autoconf
+all-host: maybe-all-automake
+all-host: maybe-all-bash
+ at if bfd-no-bootstrap
+all-host: maybe-all-bfd
+ at endif bfd-no-bootstrap
+ at if opcodes-no-bootstrap
+all-host: maybe-all-opcodes
+ at endif opcodes-no-bootstrap
+ at if binutils-no-bootstrap
+all-host: maybe-all-binutils
+ at endif binutils-no-bootstrap
+all-host: maybe-all-bison
+all-host: maybe-all-byacc
+all-host: maybe-all-bzip2
+all-host: maybe-all-dejagnu
+all-host: maybe-all-diff
+all-host: maybe-all-dosutils
+all-host: maybe-all-etc
+all-host: maybe-all-fastjar
+all-host: maybe-all-fileutils
+all-host: maybe-all-findutils
+all-host: maybe-all-find
+all-host: maybe-all-fixincludes
+all-host: maybe-all-flex
+ at if gas-no-bootstrap
+all-host: maybe-all-gas
+ at endif gas-no-bootstrap
+ at if gcc-no-bootstrap
+all-host: maybe-all-gcc
+ at endif gcc-no-bootstrap
+all-host: maybe-all-gawk
+all-host: maybe-all-gettext
+all-host: maybe-all-gnuserv
+all-host: maybe-all-gprof
+all-host: maybe-all-gzip
+all-host: maybe-all-hello
+all-host: maybe-all-indent
+ at if intl-no-bootstrap
+all-host: maybe-all-intl
+ at endif intl-no-bootstrap
+all-host: maybe-all-tcl
+all-host: maybe-all-itcl
+ at if ld-no-bootstrap
+all-host: maybe-all-ld
+ at endif ld-no-bootstrap
+ at if libcpp-no-bootstrap
+all-host: maybe-all-libcpp
+ at endif libcpp-no-bootstrap
+ at if libdecnumber-no-bootstrap
+all-host: maybe-all-libdecnumber
+ at endif libdecnumber-no-bootstrap
+all-host: maybe-all-libgui
+ at if libiberty-no-bootstrap
+all-host: maybe-all-libiberty
+ at endif libiberty-no-bootstrap
+all-host: maybe-all-libtool
+all-host: maybe-all-m4
+all-host: maybe-all-make
+all-host: maybe-all-mmalloc
+all-host: maybe-all-patch
+all-host: maybe-all-perl
+all-host: maybe-all-prms
+all-host: maybe-all-rcs
+all-host: maybe-all-readline
+all-host: maybe-all-release
+all-host: maybe-all-recode
+all-host: maybe-all-sed
+all-host: maybe-all-send-pr
+all-host: maybe-all-shellutils
+all-host: maybe-all-sid
+all-host: maybe-all-sim
+all-host: maybe-all-tar
+all-host: maybe-all-texinfo
+all-host: maybe-all-textutils
+all-host: maybe-all-time
+all-host: maybe-all-uudecode
+all-host: maybe-all-wdiff
+all-host: maybe-all-zip
+ at if zlib-no-bootstrap
+all-host: maybe-all-zlib
+ at endif zlib-no-bootstrap
+all-host: maybe-all-gdb
+all-host: maybe-all-expect
+all-host: maybe-all-guile
+all-host: maybe-all-tk
+all-host: maybe-all-libtermcap
+all-host: maybe-all-utils
+all-host: maybe-all-gnattools
+
.PHONY: all-target
-all-target: \
- maybe-all-target-libstdc++-v3 \
- maybe-all-target-libmudflap \
- maybe-all-target-libssp \
- maybe-all-target-newlib \
- maybe-all-target-libgfortran \
- maybe-all-target-libobjc \
- maybe-all-target-libtermcap \
- maybe-all-target-winsup \
- maybe-all-target-libgloss \
- maybe-all-target-libiberty \
- maybe-all-target-gperf \
- maybe-all-target-examples \
- maybe-all-target-libffi \
- maybe-all-target-libjava \
- maybe-all-target-zlib \
- maybe-all-target-boehm-gc \
- maybe-all-target-qthreads \
- maybe-all-target-rda \
- maybe-all-target-libada
+all-target: maybe-all-target-libstdc++-v3
+all-target: maybe-all-target-libmudflap
+all-target: maybe-all-target-libssp
+all-target: maybe-all-target-libgcc-math
+all-target: maybe-all-target-newlib
+all-target: maybe-all-target-libgfortran
+all-target: maybe-all-target-libobjc
+all-target: maybe-all-target-libtermcap
+all-target: maybe-all-target-winsup
+all-target: maybe-all-target-libgloss
+all-target: maybe-all-target-libiberty
+all-target: maybe-all-target-gperf
+all-target: maybe-all-target-examples
+all-target: maybe-all-target-libffi
+all-target: maybe-all-target-libjava
+all-target: maybe-all-target-zlib
+all-target: maybe-all-target-boehm-gc
+all-target: maybe-all-target-qthreads
+all-target: maybe-all-target-rda
+all-target: maybe-all-target-libada
+all-target: maybe-all-target-libgomp
+
# Do a target for all the subdirectories. A ``make do-X'' will do a
# ``make X'' in all subdirectories (because, in general, there is a
# dependency (below) of X upon do-X, a ``make X'' will also do this,
@@ -755,1038 +797,1152 @@
.PHONY: do-info
do-info:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) info-host \
info-target
- @$(stage)
.PHONY: info-host
-info-host: \
- maybe-info-ash \
- maybe-info-autoconf \
- maybe-info-automake \
- maybe-info-bash \
- maybe-info-bfd \
- maybe-info-opcodes \
- maybe-info-binutils \
- maybe-info-bison \
- maybe-info-byacc \
- maybe-info-bzip2 \
- maybe-info-dejagnu \
- maybe-info-diff \
- maybe-info-dosutils \
- maybe-info-etc \
- maybe-info-fastjar \
- maybe-info-fileutils \
- maybe-info-findutils \
- maybe-info-find \
- maybe-info-fixincludes \
- maybe-info-flex \
- maybe-info-gas \
- maybe-info-gcc \
- maybe-info-gawk \
- maybe-info-gettext \
- maybe-info-gnuserv \
- maybe-info-gprof \
- maybe-info-gzip \
- maybe-info-hello \
- maybe-info-indent \
- maybe-info-intl \
- maybe-info-tcl \
- maybe-info-itcl \
- maybe-info-ld \
- maybe-info-libcpp \
- maybe-info-libdecnumber \
- maybe-info-libgui \
- maybe-info-libiberty \
- maybe-info-libtool \
- maybe-info-m4 \
- maybe-info-make \
- maybe-info-mmalloc \
- maybe-info-patch \
- maybe-info-perl \
- maybe-info-prms \
- maybe-info-rcs \
- maybe-info-readline \
- maybe-info-release \
- maybe-info-recode \
- maybe-info-sed \
- maybe-info-send-pr \
- maybe-info-shellutils \
- maybe-info-sid \
- maybe-info-sim \
- maybe-info-tar \
- maybe-info-texinfo \
- maybe-info-textutils \
- maybe-info-time \
- maybe-info-uudecode \
- maybe-info-wdiff \
- maybe-info-zip \
- maybe-info-zlib \
- maybe-info-gdb \
- maybe-info-expect \
- maybe-info-guile \
- maybe-info-tk \
- maybe-info-libtermcap \
- maybe-info-utils \
- maybe-info-gnattools
+info-host: maybe-info-ash
+info-host: maybe-info-autoconf
+info-host: maybe-info-automake
+info-host: maybe-info-bash
+info-host: maybe-info-bfd
+info-host: maybe-info-opcodes
+info-host: maybe-info-binutils
+info-host: maybe-info-bison
+info-host: maybe-info-byacc
+info-host: maybe-info-bzip2
+info-host: maybe-info-dejagnu
+info-host: maybe-info-diff
+info-host: maybe-info-dosutils
+info-host: maybe-info-etc
+info-host: maybe-info-fastjar
+info-host: maybe-info-fileutils
+info-host: maybe-info-findutils
+info-host: maybe-info-find
+info-host: maybe-info-fixincludes
+info-host: maybe-info-flex
+info-host: maybe-info-gas
+info-host: maybe-info-gcc
+info-host: maybe-info-gawk
+info-host: maybe-info-gettext
+info-host: maybe-info-gnuserv
+info-host: maybe-info-gprof
+info-host: maybe-info-gzip
+info-host: maybe-info-hello
+info-host: maybe-info-indent
+info-host: maybe-info-intl
+info-host: maybe-info-tcl
+info-host: maybe-info-itcl
+info-host: maybe-info-ld
+info-host: maybe-info-libcpp
+info-host: maybe-info-libdecnumber
+info-host: maybe-info-libgui
+info-host: maybe-info-libiberty
+info-host: maybe-info-libtool
+info-host: maybe-info-m4
+info-host: maybe-info-make
+info-host: maybe-info-mmalloc
+info-host: maybe-info-patch
+info-host: maybe-info-perl
+info-host: maybe-info-prms
+info-host: maybe-info-rcs
+info-host: maybe-info-readline
+info-host: maybe-info-release
+info-host: maybe-info-recode
+info-host: maybe-info-sed
+info-host: maybe-info-send-pr
+info-host: maybe-info-shellutils
+info-host: maybe-info-sid
+info-host: maybe-info-sim
+info-host: maybe-info-tar
+info-host: maybe-info-texinfo
+info-host: maybe-info-textutils
+info-host: maybe-info-time
+info-host: maybe-info-uudecode
+info-host: maybe-info-wdiff
+info-host: maybe-info-zip
+info-host: maybe-info-zlib
+info-host: maybe-info-gdb
+info-host: maybe-info-expect
+info-host: maybe-info-guile
+info-host: maybe-info-tk
+info-host: maybe-info-libtermcap
+info-host: maybe-info-utils
+info-host: maybe-info-gnattools
+
.PHONY: info-target
-info-target: \
- maybe-info-target-libstdc++-v3 \
- maybe-info-target-libmudflap \
- maybe-info-target-libssp \
- maybe-info-target-newlib \
- maybe-info-target-libgfortran \
- maybe-info-target-libobjc \
- maybe-info-target-libtermcap \
- maybe-info-target-winsup \
- maybe-info-target-libgloss \
- maybe-info-target-libiberty \
- maybe-info-target-gperf \
- maybe-info-target-examples \
- maybe-info-target-libffi \
- maybe-info-target-libjava \
- maybe-info-target-zlib \
- maybe-info-target-boehm-gc \
- maybe-info-target-qthreads \
- maybe-info-target-rda \
- maybe-info-target-libada
+info-target: maybe-info-target-libstdc++-v3
+info-target: maybe-info-target-libmudflap
+info-target: maybe-info-target-libssp
+info-target: maybe-info-target-libgcc-math
+info-target: maybe-info-target-newlib
+info-target: maybe-info-target-libgfortran
+info-target: maybe-info-target-libobjc
+info-target: maybe-info-target-libtermcap
+info-target: maybe-info-target-winsup
+info-target: maybe-info-target-libgloss
+info-target: maybe-info-target-libiberty
+info-target: maybe-info-target-gperf
+info-target: maybe-info-target-examples
+info-target: maybe-info-target-libffi
+info-target: maybe-info-target-libjava
+info-target: maybe-info-target-zlib
+info-target: maybe-info-target-boehm-gc
+info-target: maybe-info-target-qthreads
+info-target: maybe-info-target-rda
+info-target: maybe-info-target-libada
+info-target: maybe-info-target-libgomp
+
.PHONY: do-dvi
do-dvi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) dvi-host \
dvi-target
- @$(stage)
.PHONY: dvi-host
-dvi-host: \
- maybe-dvi-ash \
- maybe-dvi-autoconf \
- maybe-dvi-automake \
- maybe-dvi-bash \
- maybe-dvi-bfd \
- maybe-dvi-opcodes \
- maybe-dvi-binutils \
- maybe-dvi-bison \
- maybe-dvi-byacc \
- maybe-dvi-bzip2 \
- maybe-dvi-dejagnu \
- maybe-dvi-diff \
- maybe-dvi-dosutils \
- maybe-dvi-etc \
- maybe-dvi-fastjar \
- maybe-dvi-fileutils \
- maybe-dvi-findutils \
- maybe-dvi-find \
- maybe-dvi-fixincludes \
- maybe-dvi-flex \
- maybe-dvi-gas \
- maybe-dvi-gcc \
- maybe-dvi-gawk \
- maybe-dvi-gettext \
- maybe-dvi-gnuserv \
- maybe-dvi-gprof \
- maybe-dvi-gzip \
- maybe-dvi-hello \
- maybe-dvi-indent \
- maybe-dvi-intl \
- maybe-dvi-tcl \
- maybe-dvi-itcl \
- maybe-dvi-ld \
- maybe-dvi-libcpp \
- maybe-dvi-libdecnumber \
- maybe-dvi-libgui \
- maybe-dvi-libiberty \
- maybe-dvi-libtool \
- maybe-dvi-m4 \
- maybe-dvi-make \
- maybe-dvi-mmalloc \
- maybe-dvi-patch \
- maybe-dvi-perl \
- maybe-dvi-prms \
- maybe-dvi-rcs \
- maybe-dvi-readline \
- maybe-dvi-release \
- maybe-dvi-recode \
- maybe-dvi-sed \
- maybe-dvi-send-pr \
- maybe-dvi-shellutils \
- maybe-dvi-sid \
- maybe-dvi-sim \
- maybe-dvi-tar \
- maybe-dvi-texinfo \
- maybe-dvi-textutils \
- maybe-dvi-time \
- maybe-dvi-uudecode \
- maybe-dvi-wdiff \
- maybe-dvi-zip \
- maybe-dvi-zlib \
- maybe-dvi-gdb \
- maybe-dvi-expect \
- maybe-dvi-guile \
- maybe-dvi-tk \
- maybe-dvi-libtermcap \
- maybe-dvi-utils \
- maybe-dvi-gnattools
+dvi-host: maybe-dvi-ash
+dvi-host: maybe-dvi-autoconf
+dvi-host: maybe-dvi-automake
+dvi-host: maybe-dvi-bash
+dvi-host: maybe-dvi-bfd
+dvi-host: maybe-dvi-opcodes
+dvi-host: maybe-dvi-binutils
+dvi-host: maybe-dvi-bison
+dvi-host: maybe-dvi-byacc
+dvi-host: maybe-dvi-bzip2
+dvi-host: maybe-dvi-dejagnu
+dvi-host: maybe-dvi-diff
+dvi-host: maybe-dvi-dosutils
+dvi-host: maybe-dvi-etc
+dvi-host: maybe-dvi-fastjar
+dvi-host: maybe-dvi-fileutils
+dvi-host: maybe-dvi-findutils
+dvi-host: maybe-dvi-find
+dvi-host: maybe-dvi-fixincludes
+dvi-host: maybe-dvi-flex
+dvi-host: maybe-dvi-gas
+dvi-host: maybe-dvi-gcc
+dvi-host: maybe-dvi-gawk
+dvi-host: maybe-dvi-gettext
+dvi-host: maybe-dvi-gnuserv
+dvi-host: maybe-dvi-gprof
+dvi-host: maybe-dvi-gzip
+dvi-host: maybe-dvi-hello
+dvi-host: maybe-dvi-indent
+dvi-host: maybe-dvi-intl
+dvi-host: maybe-dvi-tcl
+dvi-host: maybe-dvi-itcl
+dvi-host: maybe-dvi-ld
+dvi-host: maybe-dvi-libcpp
+dvi-host: maybe-dvi-libdecnumber
+dvi-host: maybe-dvi-libgui
+dvi-host: maybe-dvi-libiberty
+dvi-host: maybe-dvi-libtool
+dvi-host: maybe-dvi-m4
+dvi-host: maybe-dvi-make
+dvi-host: maybe-dvi-mmalloc
+dvi-host: maybe-dvi-patch
+dvi-host: maybe-dvi-perl
+dvi-host: maybe-dvi-prms
+dvi-host: maybe-dvi-rcs
+dvi-host: maybe-dvi-readline
+dvi-host: maybe-dvi-release
+dvi-host: maybe-dvi-recode
+dvi-host: maybe-dvi-sed
+dvi-host: maybe-dvi-send-pr
+dvi-host: maybe-dvi-shellutils
+dvi-host: maybe-dvi-sid
+dvi-host: maybe-dvi-sim
+dvi-host: maybe-dvi-tar
+dvi-host: maybe-dvi-texinfo
+dvi-host: maybe-dvi-textutils
+dvi-host: maybe-dvi-time
+dvi-host: maybe-dvi-uudecode
+dvi-host: maybe-dvi-wdiff
+dvi-host: maybe-dvi-zip
+dvi-host: maybe-dvi-zlib
+dvi-host: maybe-dvi-gdb
+dvi-host: maybe-dvi-expect
+dvi-host: maybe-dvi-guile
+dvi-host: maybe-dvi-tk
+dvi-host: maybe-dvi-libtermcap
+dvi-host: maybe-dvi-utils
+dvi-host: maybe-dvi-gnattools
+
.PHONY: dvi-target
-dvi-target: \
- maybe-dvi-target-libstdc++-v3 \
- maybe-dvi-target-libmudflap \
- maybe-dvi-target-libssp \
- maybe-dvi-target-newlib \
- maybe-dvi-target-libgfortran \
- maybe-dvi-target-libobjc \
- maybe-dvi-target-libtermcap \
- maybe-dvi-target-winsup \
- maybe-dvi-target-libgloss \
- maybe-dvi-target-libiberty \
- maybe-dvi-target-gperf \
- maybe-dvi-target-examples \
- maybe-dvi-target-libffi \
- maybe-dvi-target-libjava \
- maybe-dvi-target-zlib \
- maybe-dvi-target-boehm-gc \
- maybe-dvi-target-qthreads \
- maybe-dvi-target-rda \
- maybe-dvi-target-libada
+dvi-target: maybe-dvi-target-libstdc++-v3
+dvi-target: maybe-dvi-target-libmudflap
+dvi-target: maybe-dvi-target-libssp
+dvi-target: maybe-dvi-target-libgcc-math
+dvi-target: maybe-dvi-target-newlib
+dvi-target: maybe-dvi-target-libgfortran
+dvi-target: maybe-dvi-target-libobjc
+dvi-target: maybe-dvi-target-libtermcap
+dvi-target: maybe-dvi-target-winsup
+dvi-target: maybe-dvi-target-libgloss
+dvi-target: maybe-dvi-target-libiberty
+dvi-target: maybe-dvi-target-gperf
+dvi-target: maybe-dvi-target-examples
+dvi-target: maybe-dvi-target-libffi
+dvi-target: maybe-dvi-target-libjava
+dvi-target: maybe-dvi-target-zlib
+dvi-target: maybe-dvi-target-boehm-gc
+dvi-target: maybe-dvi-target-qthreads
+dvi-target: maybe-dvi-target-rda
+dvi-target: maybe-dvi-target-libada
+dvi-target: maybe-dvi-target-libgomp
+
.PHONY: do-html
do-html:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) html-host \
html-target
- @$(stage)
.PHONY: html-host
-html-host: \
- maybe-html-ash \
- maybe-html-autoconf \
- maybe-html-automake \
- maybe-html-bash \
- maybe-html-bfd \
- maybe-html-opcodes \
- maybe-html-binutils \
- maybe-html-bison \
- maybe-html-byacc \
- maybe-html-bzip2 \
- maybe-html-dejagnu \
- maybe-html-diff \
- maybe-html-dosutils \
- maybe-html-etc \
- maybe-html-fastjar \
- maybe-html-fileutils \
- maybe-html-findutils \
- maybe-html-find \
- maybe-html-fixincludes \
- maybe-html-flex \
- maybe-html-gas \
- maybe-html-gcc \
- maybe-html-gawk \
- maybe-html-gettext \
- maybe-html-gnuserv \
- maybe-html-gprof \
- maybe-html-gzip \
- maybe-html-hello \
- maybe-html-indent \
- maybe-html-intl \
- maybe-html-tcl \
- maybe-html-itcl \
- maybe-html-ld \
- maybe-html-libcpp \
- maybe-html-libdecnumber \
- maybe-html-libgui \
- maybe-html-libiberty \
- maybe-html-libtool \
- maybe-html-m4 \
- maybe-html-make \
- maybe-html-mmalloc \
- maybe-html-patch \
- maybe-html-perl \
- maybe-html-prms \
- maybe-html-rcs \
- maybe-html-readline \
- maybe-html-release \
- maybe-html-recode \
- maybe-html-sed \
- maybe-html-send-pr \
- maybe-html-shellutils \
- maybe-html-sid \
- maybe-html-sim \
- maybe-html-tar \
- maybe-html-texinfo \
- maybe-html-textutils \
- maybe-html-time \
- maybe-html-uudecode \
- maybe-html-wdiff \
- maybe-html-zip \
- maybe-html-zlib \
- maybe-html-gdb \
- maybe-html-expect \
- maybe-html-guile \
- maybe-html-tk \
- maybe-html-libtermcap \
- maybe-html-utils \
- maybe-html-gnattools
+html-host: maybe-html-ash
+html-host: maybe-html-autoconf
+html-host: maybe-html-automake
+html-host: maybe-html-bash
+html-host: maybe-html-bfd
+html-host: maybe-html-opcodes
+html-host: maybe-html-binutils
+html-host: maybe-html-bison
+html-host: maybe-html-byacc
+html-host: maybe-html-bzip2
+html-host: maybe-html-dejagnu
+html-host: maybe-html-diff
+html-host: maybe-html-dosutils
+html-host: maybe-html-etc
+html-host: maybe-html-fastjar
+html-host: maybe-html-fileutils
+html-host: maybe-html-findutils
+html-host: maybe-html-find
+html-host: maybe-html-fixincludes
+html-host: maybe-html-flex
+html-host: maybe-html-gas
+html-host: maybe-html-gcc
+html-host: maybe-html-gawk
+html-host: maybe-html-gettext
+html-host: maybe-html-gnuserv
+html-host: maybe-html-gprof
+html-host: maybe-html-gzip
+html-host: maybe-html-hello
+html-host: maybe-html-indent
+html-host: maybe-html-intl
+html-host: maybe-html-tcl
+html-host: maybe-html-itcl
+html-host: maybe-html-ld
+html-host: maybe-html-libcpp
+html-host: maybe-html-libdecnumber
+html-host: maybe-html-libgui
+html-host: maybe-html-libiberty
+html-host: maybe-html-libtool
+html-host: maybe-html-m4
+html-host: maybe-html-make
+html-host: maybe-html-mmalloc
+html-host: maybe-html-patch
+html-host: maybe-html-perl
+html-host: maybe-html-prms
+html-host: maybe-html-rcs
+html-host: maybe-html-readline
+html-host: maybe-html-release
+html-host: maybe-html-recode
+html-host: maybe-html-sed
+html-host: maybe-html-send-pr
+html-host: maybe-html-shellutils
+html-host: maybe-html-sid
+html-host: maybe-html-sim
+html-host: maybe-html-tar
+html-host: maybe-html-texinfo
+html-host: maybe-html-textutils
+html-host: maybe-html-time
+html-host: maybe-html-uudecode
+html-host: maybe-html-wdiff
+html-host: maybe-html-zip
+html-host: maybe-html-zlib
+html-host: maybe-html-gdb
+html-host: maybe-html-expect
+html-host: maybe-html-guile
+html-host: maybe-html-tk
+html-host: maybe-html-libtermcap
+html-host: maybe-html-utils
+html-host: maybe-html-gnattools
+
.PHONY: html-target
-html-target: \
- maybe-html-target-libstdc++-v3 \
- maybe-html-target-libmudflap \
- maybe-html-target-libssp \
- maybe-html-target-newlib \
- maybe-html-target-libgfortran \
- maybe-html-target-libobjc \
- maybe-html-target-libtermcap \
- maybe-html-target-winsup \
- maybe-html-target-libgloss \
- maybe-html-target-libiberty \
- maybe-html-target-gperf \
- maybe-html-target-examples \
- maybe-html-target-libffi \
- maybe-html-target-libjava \
- maybe-html-target-zlib \
- maybe-html-target-boehm-gc \
- maybe-html-target-qthreads \
- maybe-html-target-rda \
- maybe-html-target-libada
+html-target: maybe-html-target-libstdc++-v3
+html-target: maybe-html-target-libmudflap
+html-target: maybe-html-target-libssp
+html-target: maybe-html-target-libgcc-math
+html-target: maybe-html-target-newlib
+html-target: maybe-html-target-libgfortran
+html-target: maybe-html-target-libobjc
+html-target: maybe-html-target-libtermcap
+html-target: maybe-html-target-winsup
+html-target: maybe-html-target-libgloss
+html-target: maybe-html-target-libiberty
+html-target: maybe-html-target-gperf
+html-target: maybe-html-target-examples
+html-target: maybe-html-target-libffi
+html-target: maybe-html-target-libjava
+html-target: maybe-html-target-zlib
+html-target: maybe-html-target-boehm-gc
+html-target: maybe-html-target-qthreads
+html-target: maybe-html-target-rda
+html-target: maybe-html-target-libada
+html-target: maybe-html-target-libgomp
+
.PHONY: do-TAGS
do-TAGS:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) TAGS-host \
TAGS-target
- @$(stage)
.PHONY: TAGS-host
-TAGS-host: \
- maybe-TAGS-ash \
- maybe-TAGS-autoconf \
- maybe-TAGS-automake \
- maybe-TAGS-bash \
- maybe-TAGS-bfd \
- maybe-TAGS-opcodes \
- maybe-TAGS-binutils \
- maybe-TAGS-bison \
- maybe-TAGS-byacc \
- maybe-TAGS-bzip2 \
- maybe-TAGS-dejagnu \
- maybe-TAGS-diff \
- maybe-TAGS-dosutils \
- maybe-TAGS-etc \
- maybe-TAGS-fastjar \
- maybe-TAGS-fileutils \
- maybe-TAGS-findutils \
- maybe-TAGS-find \
- maybe-TAGS-fixincludes \
- maybe-TAGS-flex \
- maybe-TAGS-gas \
- maybe-TAGS-gcc \
- maybe-TAGS-gawk \
- maybe-TAGS-gettext \
- maybe-TAGS-gnuserv \
- maybe-TAGS-gprof \
- maybe-TAGS-gzip \
- maybe-TAGS-hello \
- maybe-TAGS-indent \
- maybe-TAGS-intl \
- maybe-TAGS-tcl \
- maybe-TAGS-itcl \
- maybe-TAGS-ld \
- maybe-TAGS-libcpp \
- maybe-TAGS-libdecnumber \
- maybe-TAGS-libgui \
- maybe-TAGS-libiberty \
- maybe-TAGS-libtool \
- maybe-TAGS-m4 \
- maybe-TAGS-make \
- maybe-TAGS-mmalloc \
- maybe-TAGS-patch \
- maybe-TAGS-perl \
- maybe-TAGS-prms \
- maybe-TAGS-rcs \
- maybe-TAGS-readline \
- maybe-TAGS-release \
- maybe-TAGS-recode \
- maybe-TAGS-sed \
- maybe-TAGS-send-pr \
- maybe-TAGS-shellutils \
- maybe-TAGS-sid \
- maybe-TAGS-sim \
- maybe-TAGS-tar \
- maybe-TAGS-texinfo \
- maybe-TAGS-textutils \
- maybe-TAGS-time \
- maybe-TAGS-uudecode \
- maybe-TAGS-wdiff \
- maybe-TAGS-zip \
- maybe-TAGS-zlib \
- maybe-TAGS-gdb \
- maybe-TAGS-expect \
- maybe-TAGS-guile \
- maybe-TAGS-tk \
- maybe-TAGS-libtermcap \
- maybe-TAGS-utils \
- maybe-TAGS-gnattools
+TAGS-host: maybe-TAGS-ash
+TAGS-host: maybe-TAGS-autoconf
+TAGS-host: maybe-TAGS-automake
+TAGS-host: maybe-TAGS-bash
+TAGS-host: maybe-TAGS-bfd
+TAGS-host: maybe-TAGS-opcodes
+TAGS-host: maybe-TAGS-binutils
+TAGS-host: maybe-TAGS-bison
+TAGS-host: maybe-TAGS-byacc
+TAGS-host: maybe-TAGS-bzip2
+TAGS-host: maybe-TAGS-dejagnu
+TAGS-host: maybe-TAGS-diff
+TAGS-host: maybe-TAGS-dosutils
+TAGS-host: maybe-TAGS-etc
+TAGS-host: maybe-TAGS-fastjar
+TAGS-host: maybe-TAGS-fileutils
+TAGS-host: maybe-TAGS-findutils
+TAGS-host: maybe-TAGS-find
+TAGS-host: maybe-TAGS-fixincludes
+TAGS-host: maybe-TAGS-flex
+TAGS-host: maybe-TAGS-gas
+TAGS-host: maybe-TAGS-gcc
+TAGS-host: maybe-TAGS-gawk
+TAGS-host: maybe-TAGS-gettext
+TAGS-host: maybe-TAGS-gnuserv
+TAGS-host: maybe-TAGS-gprof
+TAGS-host: maybe-TAGS-gzip
+TAGS-host: maybe-TAGS-hello
+TAGS-host: maybe-TAGS-indent
+TAGS-host: maybe-TAGS-intl
+TAGS-host: maybe-TAGS-tcl
+TAGS-host: maybe-TAGS-itcl
+TAGS-host: maybe-TAGS-ld
+TAGS-host: maybe-TAGS-libcpp
+TAGS-host: maybe-TAGS-libdecnumber
+TAGS-host: maybe-TAGS-libgui
+TAGS-host: maybe-TAGS-libiberty
+TAGS-host: maybe-TAGS-libtool
+TAGS-host: maybe-TAGS-m4
+TAGS-host: maybe-TAGS-make
+TAGS-host: maybe-TAGS-mmalloc
+TAGS-host: maybe-TAGS-patch
+TAGS-host: maybe-TAGS-perl
+TAGS-host: maybe-TAGS-prms
+TAGS-host: maybe-TAGS-rcs
+TAGS-host: maybe-TAGS-readline
+TAGS-host: maybe-TAGS-release
+TAGS-host: maybe-TAGS-recode
+TAGS-host: maybe-TAGS-sed
+TAGS-host: maybe-TAGS-send-pr
+TAGS-host: maybe-TAGS-shellutils
+TAGS-host: maybe-TAGS-sid
+TAGS-host: maybe-TAGS-sim
+TAGS-host: maybe-TAGS-tar
+TAGS-host: maybe-TAGS-texinfo
+TAGS-host: maybe-TAGS-textutils
+TAGS-host: maybe-TAGS-time
+TAGS-host: maybe-TAGS-uudecode
+TAGS-host: maybe-TAGS-wdiff
+TAGS-host: maybe-TAGS-zip
+TAGS-host: maybe-TAGS-zlib
+TAGS-host: maybe-TAGS-gdb
+TAGS-host: maybe-TAGS-expect
+TAGS-host: maybe-TAGS-guile
+TAGS-host: maybe-TAGS-tk
+TAGS-host: maybe-TAGS-libtermcap
+TAGS-host: maybe-TAGS-utils
+TAGS-host: maybe-TAGS-gnattools
+
.PHONY: TAGS-target
-TAGS-target: \
- maybe-TAGS-target-libstdc++-v3 \
- maybe-TAGS-target-libmudflap \
- maybe-TAGS-target-libssp \
- maybe-TAGS-target-newlib \
- maybe-TAGS-target-libgfortran \
- maybe-TAGS-target-libobjc \
- maybe-TAGS-target-libtermcap \
- maybe-TAGS-target-winsup \
- maybe-TAGS-target-libgloss \
- maybe-TAGS-target-libiberty \
- maybe-TAGS-target-gperf \
- maybe-TAGS-target-examples \
- maybe-TAGS-target-libffi \
- maybe-TAGS-target-libjava \
- maybe-TAGS-target-zlib \
- maybe-TAGS-target-boehm-gc \
- maybe-TAGS-target-qthreads \
- maybe-TAGS-target-rda \
- maybe-TAGS-target-libada
+TAGS-target: maybe-TAGS-target-libstdc++-v3
+TAGS-target: maybe-TAGS-target-libmudflap
+TAGS-target: maybe-TAGS-target-libssp
+TAGS-target: maybe-TAGS-target-libgcc-math
+TAGS-target: maybe-TAGS-target-newlib
+TAGS-target: maybe-TAGS-target-libgfortran
+TAGS-target: maybe-TAGS-target-libobjc
+TAGS-target: maybe-TAGS-target-libtermcap
+TAGS-target: maybe-TAGS-target-winsup
+TAGS-target: maybe-TAGS-target-libgloss
+TAGS-target: maybe-TAGS-target-libiberty
+TAGS-target: maybe-TAGS-target-gperf
+TAGS-target: maybe-TAGS-target-examples
+TAGS-target: maybe-TAGS-target-libffi
+TAGS-target: maybe-TAGS-target-libjava
+TAGS-target: maybe-TAGS-target-zlib
+TAGS-target: maybe-TAGS-target-boehm-gc
+TAGS-target: maybe-TAGS-target-qthreads
+TAGS-target: maybe-TAGS-target-rda
+TAGS-target: maybe-TAGS-target-libada
+TAGS-target: maybe-TAGS-target-libgomp
+
.PHONY: do-install-info
do-install-info:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) install-info-host \
install-info-target
- @$(stage)
.PHONY: install-info-host
-install-info-host: \
- maybe-install-info-ash \
- maybe-install-info-autoconf \
- maybe-install-info-automake \
- maybe-install-info-bash \
- maybe-install-info-bfd \
- maybe-install-info-opcodes \
- maybe-install-info-binutils \
- maybe-install-info-bison \
- maybe-install-info-byacc \
- maybe-install-info-bzip2 \
- maybe-install-info-dejagnu \
- maybe-install-info-diff \
- maybe-install-info-dosutils \
- maybe-install-info-etc \
- maybe-install-info-fastjar \
- maybe-install-info-fileutils \
- maybe-install-info-findutils \
- maybe-install-info-find \
- maybe-install-info-fixincludes \
- maybe-install-info-flex \
- maybe-install-info-gas \
- maybe-install-info-gcc \
- maybe-install-info-gawk \
- maybe-install-info-gettext \
- maybe-install-info-gnuserv \
- maybe-install-info-gprof \
- maybe-install-info-gzip \
- maybe-install-info-hello \
- maybe-install-info-indent \
- maybe-install-info-intl \
- maybe-install-info-tcl \
- maybe-install-info-itcl \
- maybe-install-info-ld \
- maybe-install-info-libcpp \
- maybe-install-info-libdecnumber \
- maybe-install-info-libgui \
- maybe-install-info-libiberty \
- maybe-install-info-libtool \
- maybe-install-info-m4 \
- maybe-install-info-make \
- maybe-install-info-mmalloc \
- maybe-install-info-patch \
- maybe-install-info-perl \
- maybe-install-info-prms \
- maybe-install-info-rcs \
- maybe-install-info-readline \
- maybe-install-info-release \
- maybe-install-info-recode \
- maybe-install-info-sed \
- maybe-install-info-send-pr \
- maybe-install-info-shellutils \
- maybe-install-info-sid \
- maybe-install-info-sim \
- maybe-install-info-tar \
- maybe-install-info-texinfo \
- maybe-install-info-textutils \
- maybe-install-info-time \
- maybe-install-info-uudecode \
- maybe-install-info-wdiff \
- maybe-install-info-zip \
- maybe-install-info-zlib \
- maybe-install-info-gdb \
- maybe-install-info-expect \
- maybe-install-info-guile \
- maybe-install-info-tk \
- maybe-install-info-libtermcap \
- maybe-install-info-utils \
- maybe-install-info-gnattools
+install-info-host: maybe-install-info-ash
+install-info-host: maybe-install-info-autoconf
+install-info-host: maybe-install-info-automake
+install-info-host: maybe-install-info-bash
+install-info-host: maybe-install-info-bfd
+install-info-host: maybe-install-info-opcodes
+install-info-host: maybe-install-info-binutils
+install-info-host: maybe-install-info-bison
+install-info-host: maybe-install-info-byacc
+install-info-host: maybe-install-info-bzip2
+install-info-host: maybe-install-info-dejagnu
+install-info-host: maybe-install-info-diff
+install-info-host: maybe-install-info-dosutils
+install-info-host: maybe-install-info-etc
+install-info-host: maybe-install-info-fastjar
+install-info-host: maybe-install-info-fileutils
+install-info-host: maybe-install-info-findutils
+install-info-host: maybe-install-info-find
+install-info-host: maybe-install-info-fixincludes
+install-info-host: maybe-install-info-flex
+install-info-host: maybe-install-info-gas
+install-info-host: maybe-install-info-gcc
+install-info-host: maybe-install-info-gawk
+install-info-host: maybe-install-info-gettext
+install-info-host: maybe-install-info-gnuserv
+install-info-host: maybe-install-info-gprof
+install-info-host: maybe-install-info-gzip
+install-info-host: maybe-install-info-hello
+install-info-host: maybe-install-info-indent
+install-info-host: maybe-install-info-intl
+install-info-host: maybe-install-info-tcl
+install-info-host: maybe-install-info-itcl
+install-info-host: maybe-install-info-ld
+install-info-host: maybe-install-info-libcpp
+install-info-host: maybe-install-info-libdecnumber
+install-info-host: maybe-install-info-libgui
+install-info-host: maybe-install-info-libiberty
+install-info-host: maybe-install-info-libtool
+install-info-host: maybe-install-info-m4
+install-info-host: maybe-install-info-make
+install-info-host: maybe-install-info-mmalloc
+install-info-host: maybe-install-info-patch
+install-info-host: maybe-install-info-perl
+install-info-host: maybe-install-info-prms
+install-info-host: maybe-install-info-rcs
+install-info-host: maybe-install-info-readline
+install-info-host: maybe-install-info-release
+install-info-host: maybe-install-info-recode
+install-info-host: maybe-install-info-sed
+install-info-host: maybe-install-info-send-pr
+install-info-host: maybe-install-info-shellutils
+install-info-host: maybe-install-info-sid
+install-info-host: maybe-install-info-sim
+install-info-host: maybe-install-info-tar
+install-info-host: maybe-install-info-texinfo
+install-info-host: maybe-install-info-textutils
+install-info-host: maybe-install-info-time
+install-info-host: maybe-install-info-uudecode
+install-info-host: maybe-install-info-wdiff
+install-info-host: maybe-install-info-zip
+install-info-host: maybe-install-info-zlib
+install-info-host: maybe-install-info-gdb
+install-info-host: maybe-install-info-expect
+install-info-host: maybe-install-info-guile
+install-info-host: maybe-install-info-tk
+install-info-host: maybe-install-info-libtermcap
+install-info-host: maybe-install-info-utils
+install-info-host: maybe-install-info-gnattools
+
.PHONY: install-info-target
-install-info-target: \
- maybe-install-info-target-libstdc++-v3 \
- maybe-install-info-target-libmudflap \
- maybe-install-info-target-libssp \
- maybe-install-info-target-newlib \
- maybe-install-info-target-libgfortran \
- maybe-install-info-target-libobjc \
- maybe-install-info-target-libtermcap \
- maybe-install-info-target-winsup \
- maybe-install-info-target-libgloss \
- maybe-install-info-target-libiberty \
- maybe-install-info-target-gperf \
- maybe-install-info-target-examples \
- maybe-install-info-target-libffi \
- maybe-install-info-target-libjava \
- maybe-install-info-target-zlib \
- maybe-install-info-target-boehm-gc \
- maybe-install-info-target-qthreads \
- maybe-install-info-target-rda \
- maybe-install-info-target-libada
+install-info-target: maybe-install-info-target-libstdc++-v3
+install-info-target: maybe-install-info-target-libmudflap
+install-info-target: maybe-install-info-target-libssp
+install-info-target: maybe-install-info-target-libgcc-math
+install-info-target: maybe-install-info-target-newlib
+install-info-target: maybe-install-info-target-libgfortran
+install-info-target: maybe-install-info-target-libobjc
+install-info-target: maybe-install-info-target-libtermcap
+install-info-target: maybe-install-info-target-winsup
+install-info-target: maybe-install-info-target-libgloss
+install-info-target: maybe-install-info-target-libiberty
+install-info-target: maybe-install-info-target-gperf
+install-info-target: maybe-install-info-target-examples
+install-info-target: maybe-install-info-target-libffi
+install-info-target: maybe-install-info-target-libjava
+install-info-target: maybe-install-info-target-zlib
+install-info-target: maybe-install-info-target-boehm-gc
+install-info-target: maybe-install-info-target-qthreads
+install-info-target: maybe-install-info-target-rda
+install-info-target: maybe-install-info-target-libada
+install-info-target: maybe-install-info-target-libgomp
+
+.PHONY: do-install-html
+do-install-html:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) install-html-host \
+ install-html-target
+
+
+.PHONY: install-html-host
+
+install-html-host: maybe-install-html-ash
+install-html-host: maybe-install-html-autoconf
+install-html-host: maybe-install-html-automake
+install-html-host: maybe-install-html-bash
+install-html-host: maybe-install-html-bfd
+install-html-host: maybe-install-html-opcodes
+install-html-host: maybe-install-html-binutils
+install-html-host: maybe-install-html-bison
+install-html-host: maybe-install-html-byacc
+install-html-host: maybe-install-html-bzip2
+install-html-host: maybe-install-html-dejagnu
+install-html-host: maybe-install-html-diff
+install-html-host: maybe-install-html-dosutils
+install-html-host: maybe-install-html-etc
+install-html-host: maybe-install-html-fastjar
+install-html-host: maybe-install-html-fileutils
+install-html-host: maybe-install-html-findutils
+install-html-host: maybe-install-html-find
+install-html-host: maybe-install-html-fixincludes
+install-html-host: maybe-install-html-flex
+install-html-host: maybe-install-html-gas
+install-html-host: maybe-install-html-gcc
+install-html-host: maybe-install-html-gawk
+install-html-host: maybe-install-html-gettext
+install-html-host: maybe-install-html-gnuserv
+install-html-host: maybe-install-html-gprof
+install-html-host: maybe-install-html-gzip
+install-html-host: maybe-install-html-hello
+install-html-host: maybe-install-html-indent
+install-html-host: maybe-install-html-intl
+install-html-host: maybe-install-html-tcl
+install-html-host: maybe-install-html-itcl
+install-html-host: maybe-install-html-ld
+install-html-host: maybe-install-html-libcpp
+install-html-host: maybe-install-html-libdecnumber
+install-html-host: maybe-install-html-libgui
+install-html-host: maybe-install-html-libiberty
+install-html-host: maybe-install-html-libtool
+install-html-host: maybe-install-html-m4
+install-html-host: maybe-install-html-make
+install-html-host: maybe-install-html-mmalloc
+install-html-host: maybe-install-html-patch
+install-html-host: maybe-install-html-perl
+install-html-host: maybe-install-html-prms
+install-html-host: maybe-install-html-rcs
+install-html-host: maybe-install-html-readline
+install-html-host: maybe-install-html-release
+install-html-host: maybe-install-html-recode
+install-html-host: maybe-install-html-sed
+install-html-host: maybe-install-html-send-pr
+install-html-host: maybe-install-html-shellutils
+install-html-host: maybe-install-html-sid
+install-html-host: maybe-install-html-sim
+install-html-host: maybe-install-html-tar
+install-html-host: maybe-install-html-texinfo
+install-html-host: maybe-install-html-textutils
+install-html-host: maybe-install-html-time
+install-html-host: maybe-install-html-uudecode
+install-html-host: maybe-install-html-wdiff
+install-html-host: maybe-install-html-zip
+install-html-host: maybe-install-html-zlib
+install-html-host: maybe-install-html-gdb
+install-html-host: maybe-install-html-expect
+install-html-host: maybe-install-html-guile
+install-html-host: maybe-install-html-tk
+install-html-host: maybe-install-html-libtermcap
+install-html-host: maybe-install-html-utils
+install-html-host: maybe-install-html-gnattools
+
+.PHONY: install-html-target
+
+install-html-target: maybe-install-html-target-libstdc++-v3
+install-html-target: maybe-install-html-target-libmudflap
+install-html-target: maybe-install-html-target-libssp
+install-html-target: maybe-install-html-target-libgcc-math
+install-html-target: maybe-install-html-target-newlib
+install-html-target: maybe-install-html-target-libgfortran
+install-html-target: maybe-install-html-target-libobjc
+install-html-target: maybe-install-html-target-libtermcap
+install-html-target: maybe-install-html-target-winsup
+install-html-target: maybe-install-html-target-libgloss
+install-html-target: maybe-install-html-target-libiberty
+install-html-target: maybe-install-html-target-gperf
+install-html-target: maybe-install-html-target-examples
+install-html-target: maybe-install-html-target-libffi
+install-html-target: maybe-install-html-target-libjava
+install-html-target: maybe-install-html-target-zlib
+install-html-target: maybe-install-html-target-boehm-gc
+install-html-target: maybe-install-html-target-qthreads
+install-html-target: maybe-install-html-target-rda
+install-html-target: maybe-install-html-target-libada
+install-html-target: maybe-install-html-target-libgomp
+
.PHONY: do-installcheck
do-installcheck:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) installcheck-host \
installcheck-target
- @$(stage)
.PHONY: installcheck-host
-installcheck-host: \
- maybe-installcheck-ash \
- maybe-installcheck-autoconf \
- maybe-installcheck-automake \
- maybe-installcheck-bash \
- maybe-installcheck-bfd \
- maybe-installcheck-opcodes \
- maybe-installcheck-binutils \
- maybe-installcheck-bison \
- maybe-installcheck-byacc \
- maybe-installcheck-bzip2 \
- maybe-installcheck-dejagnu \
- maybe-installcheck-diff \
- maybe-installcheck-dosutils \
- maybe-installcheck-etc \
- maybe-installcheck-fastjar \
- maybe-installcheck-fileutils \
- maybe-installcheck-findutils \
- maybe-installcheck-find \
- maybe-installcheck-fixincludes \
- maybe-installcheck-flex \
- maybe-installcheck-gas \
- maybe-installcheck-gcc \
- maybe-installcheck-gawk \
- maybe-installcheck-gettext \
- maybe-installcheck-gnuserv \
- maybe-installcheck-gprof \
- maybe-installcheck-gzip \
- maybe-installcheck-hello \
- maybe-installcheck-indent \
- maybe-installcheck-intl \
- maybe-installcheck-tcl \
- maybe-installcheck-itcl \
- maybe-installcheck-ld \
- maybe-installcheck-libcpp \
- maybe-installcheck-libdecnumber \
- maybe-installcheck-libgui \
- maybe-installcheck-libiberty \
- maybe-installcheck-libtool \
- maybe-installcheck-m4 \
- maybe-installcheck-make \
- maybe-installcheck-mmalloc \
- maybe-installcheck-patch \
- maybe-installcheck-perl \
- maybe-installcheck-prms \
- maybe-installcheck-rcs \
- maybe-installcheck-readline \
- maybe-installcheck-release \
- maybe-installcheck-recode \
- maybe-installcheck-sed \
- maybe-installcheck-send-pr \
- maybe-installcheck-shellutils \
- maybe-installcheck-sid \
- maybe-installcheck-sim \
- maybe-installcheck-tar \
- maybe-installcheck-texinfo \
- maybe-installcheck-textutils \
- maybe-installcheck-time \
- maybe-installcheck-uudecode \
- maybe-installcheck-wdiff \
- maybe-installcheck-zip \
- maybe-installcheck-zlib \
- maybe-installcheck-gdb \
- maybe-installcheck-expect \
- maybe-installcheck-guile \
- maybe-installcheck-tk \
- maybe-installcheck-libtermcap \
- maybe-installcheck-utils \
- maybe-installcheck-gnattools
+installcheck-host: maybe-installcheck-ash
+installcheck-host: maybe-installcheck-autoconf
+installcheck-host: maybe-installcheck-automake
+installcheck-host: maybe-installcheck-bash
+installcheck-host: maybe-installcheck-bfd
+installcheck-host: maybe-installcheck-opcodes
+installcheck-host: maybe-installcheck-binutils
+installcheck-host: maybe-installcheck-bison
+installcheck-host: maybe-installcheck-byacc
+installcheck-host: maybe-installcheck-bzip2
+installcheck-host: maybe-installcheck-dejagnu
+installcheck-host: maybe-installcheck-diff
+installcheck-host: maybe-installcheck-dosutils
+installcheck-host: maybe-installcheck-etc
+installcheck-host: maybe-installcheck-fastjar
+installcheck-host: maybe-installcheck-fileutils
+installcheck-host: maybe-installcheck-findutils
+installcheck-host: maybe-installcheck-find
+installcheck-host: maybe-installcheck-fixincludes
+installcheck-host: maybe-installcheck-flex
+installcheck-host: maybe-installcheck-gas
+installcheck-host: maybe-installcheck-gcc
+installcheck-host: maybe-installcheck-gawk
+installcheck-host: maybe-installcheck-gettext
+installcheck-host: maybe-installcheck-gnuserv
+installcheck-host: maybe-installcheck-gprof
+installcheck-host: maybe-installcheck-gzip
+installcheck-host: maybe-installcheck-hello
+installcheck-host: maybe-installcheck-indent
+installcheck-host: maybe-installcheck-intl
+installcheck-host: maybe-installcheck-tcl
+installcheck-host: maybe-installcheck-itcl
+installcheck-host: maybe-installcheck-ld
+installcheck-host: maybe-installcheck-libcpp
+installcheck-host: maybe-installcheck-libdecnumber
+installcheck-host: maybe-installcheck-libgui
+installcheck-host: maybe-installcheck-libiberty
+installcheck-host: maybe-installcheck-libtool
+installcheck-host: maybe-installcheck-m4
+installcheck-host: maybe-installcheck-make
+installcheck-host: maybe-installcheck-mmalloc
+installcheck-host: maybe-installcheck-patch
+installcheck-host: maybe-installcheck-perl
+installcheck-host: maybe-installcheck-prms
+installcheck-host: maybe-installcheck-rcs
+installcheck-host: maybe-installcheck-readline
+installcheck-host: maybe-installcheck-release
+installcheck-host: maybe-installcheck-recode
+installcheck-host: maybe-installcheck-sed
+installcheck-host: maybe-installcheck-send-pr
+installcheck-host: maybe-installcheck-shellutils
+installcheck-host: maybe-installcheck-sid
+installcheck-host: maybe-installcheck-sim
+installcheck-host: maybe-installcheck-tar
+installcheck-host: maybe-installcheck-texinfo
+installcheck-host: maybe-installcheck-textutils
+installcheck-host: maybe-installcheck-time
+installcheck-host: maybe-installcheck-uudecode
+installcheck-host: maybe-installcheck-wdiff
+installcheck-host: maybe-installcheck-zip
+installcheck-host: maybe-installcheck-zlib
+installcheck-host: maybe-installcheck-gdb
+installcheck-host: maybe-installcheck-expect
+installcheck-host: maybe-installcheck-guile
+installcheck-host: maybe-installcheck-tk
+installcheck-host: maybe-installcheck-libtermcap
+installcheck-host: maybe-installcheck-utils
+installcheck-host: maybe-installcheck-gnattools
+
.PHONY: installcheck-target
-installcheck-target: \
- maybe-installcheck-target-libstdc++-v3 \
- maybe-installcheck-target-libmudflap \
- maybe-installcheck-target-libssp \
- maybe-installcheck-target-newlib \
- maybe-installcheck-target-libgfortran \
- maybe-installcheck-target-libobjc \
- maybe-installcheck-target-libtermcap \
- maybe-installcheck-target-winsup \
- maybe-installcheck-target-libgloss \
- maybe-installcheck-target-libiberty \
- maybe-installcheck-target-gperf \
- maybe-installcheck-target-examples \
- maybe-installcheck-target-libffi \
- maybe-installcheck-target-libjava \
- maybe-installcheck-target-zlib \
- maybe-installcheck-target-boehm-gc \
- maybe-installcheck-target-qthreads \
- maybe-installcheck-target-rda \
- maybe-installcheck-target-libada
+installcheck-target: maybe-installcheck-target-libstdc++-v3
+installcheck-target: maybe-installcheck-target-libmudflap
+installcheck-target: maybe-installcheck-target-libssp
+installcheck-target: maybe-installcheck-target-libgcc-math
+installcheck-target: maybe-installcheck-target-newlib
+installcheck-target: maybe-installcheck-target-libgfortran
+installcheck-target: maybe-installcheck-target-libobjc
+installcheck-target: maybe-installcheck-target-libtermcap
+installcheck-target: maybe-installcheck-target-winsup
+installcheck-target: maybe-installcheck-target-libgloss
+installcheck-target: maybe-installcheck-target-libiberty
+installcheck-target: maybe-installcheck-target-gperf
+installcheck-target: maybe-installcheck-target-examples
+installcheck-target: maybe-installcheck-target-libffi
+installcheck-target: maybe-installcheck-target-libjava
+installcheck-target: maybe-installcheck-target-zlib
+installcheck-target: maybe-installcheck-target-boehm-gc
+installcheck-target: maybe-installcheck-target-qthreads
+installcheck-target: maybe-installcheck-target-rda
+installcheck-target: maybe-installcheck-target-libada
+installcheck-target: maybe-installcheck-target-libgomp
+
.PHONY: do-mostlyclean
do-mostlyclean:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) mostlyclean-host \
mostlyclean-target
- @$(stage)
.PHONY: mostlyclean-host
-mostlyclean-host: \
- maybe-mostlyclean-ash \
- maybe-mostlyclean-autoconf \
- maybe-mostlyclean-automake \
- maybe-mostlyclean-bash \
- maybe-mostlyclean-bfd \
- maybe-mostlyclean-opcodes \
- maybe-mostlyclean-binutils \
- maybe-mostlyclean-bison \
- maybe-mostlyclean-byacc \
- maybe-mostlyclean-bzip2 \
- maybe-mostlyclean-dejagnu \
- maybe-mostlyclean-diff \
- maybe-mostlyclean-dosutils \
- maybe-mostlyclean-etc \
- maybe-mostlyclean-fastjar \
- maybe-mostlyclean-fileutils \
- maybe-mostlyclean-findutils \
- maybe-mostlyclean-find \
- maybe-mostlyclean-fixincludes \
- maybe-mostlyclean-flex \
- maybe-mostlyclean-gas \
- maybe-mostlyclean-gcc \
- maybe-mostlyclean-gawk \
- maybe-mostlyclean-gettext \
- maybe-mostlyclean-gnuserv \
- maybe-mostlyclean-gprof \
- maybe-mostlyclean-gzip \
- maybe-mostlyclean-hello \
- maybe-mostlyclean-indent \
- maybe-mostlyclean-intl \
- maybe-mostlyclean-tcl \
- maybe-mostlyclean-itcl \
- maybe-mostlyclean-ld \
- maybe-mostlyclean-libcpp \
- maybe-mostlyclean-libdecnumber \
- maybe-mostlyclean-libgui \
- maybe-mostlyclean-libiberty \
- maybe-mostlyclean-libtool \
- maybe-mostlyclean-m4 \
- maybe-mostlyclean-make \
- maybe-mostlyclean-mmalloc \
- maybe-mostlyclean-patch \
- maybe-mostlyclean-perl \
- maybe-mostlyclean-prms \
- maybe-mostlyclean-rcs \
- maybe-mostlyclean-readline \
- maybe-mostlyclean-release \
- maybe-mostlyclean-recode \
- maybe-mostlyclean-sed \
- maybe-mostlyclean-send-pr \
- maybe-mostlyclean-shellutils \
- maybe-mostlyclean-sid \
- maybe-mostlyclean-sim \
- maybe-mostlyclean-tar \
- maybe-mostlyclean-texinfo \
- maybe-mostlyclean-textutils \
- maybe-mostlyclean-time \
- maybe-mostlyclean-uudecode \
- maybe-mostlyclean-wdiff \
- maybe-mostlyclean-zip \
- maybe-mostlyclean-zlib \
- maybe-mostlyclean-gdb \
- maybe-mostlyclean-expect \
- maybe-mostlyclean-guile \
- maybe-mostlyclean-tk \
- maybe-mostlyclean-libtermcap \
- maybe-mostlyclean-utils \
- maybe-mostlyclean-gnattools
+mostlyclean-host: maybe-mostlyclean-ash
+mostlyclean-host: maybe-mostlyclean-autoconf
+mostlyclean-host: maybe-mostlyclean-automake
+mostlyclean-host: maybe-mostlyclean-bash
+mostlyclean-host: maybe-mostlyclean-bfd
+mostlyclean-host: maybe-mostlyclean-opcodes
+mostlyclean-host: maybe-mostlyclean-binutils
+mostlyclean-host: maybe-mostlyclean-bison
+mostlyclean-host: maybe-mostlyclean-byacc
+mostlyclean-host: maybe-mostlyclean-bzip2
+mostlyclean-host: maybe-mostlyclean-dejagnu
+mostlyclean-host: maybe-mostlyclean-diff
+mostlyclean-host: maybe-mostlyclean-dosutils
+mostlyclean-host: maybe-mostlyclean-etc
+mostlyclean-host: maybe-mostlyclean-fastjar
+mostlyclean-host: maybe-mostlyclean-fileutils
+mostlyclean-host: maybe-mostlyclean-findutils
+mostlyclean-host: maybe-mostlyclean-find
+mostlyclean-host: maybe-mostlyclean-fixincludes
+mostlyclean-host: maybe-mostlyclean-flex
+mostlyclean-host: maybe-mostlyclean-gas
+mostlyclean-host: maybe-mostlyclean-gcc
+mostlyclean-host: maybe-mostlyclean-gawk
+mostlyclean-host: maybe-mostlyclean-gettext
+mostlyclean-host: maybe-mostlyclean-gnuserv
+mostlyclean-host: maybe-mostlyclean-gprof
+mostlyclean-host: maybe-mostlyclean-gzip
+mostlyclean-host: maybe-mostlyclean-hello
+mostlyclean-host: maybe-mostlyclean-indent
+mostlyclean-host: maybe-mostlyclean-intl
+mostlyclean-host: maybe-mostlyclean-tcl
+mostlyclean-host: maybe-mostlyclean-itcl
+mostlyclean-host: maybe-mostlyclean-ld
+mostlyclean-host: maybe-mostlyclean-libcpp
+mostlyclean-host: maybe-mostlyclean-libdecnumber
+mostlyclean-host: maybe-mostlyclean-libgui
+mostlyclean-host: maybe-mostlyclean-libiberty
+mostlyclean-host: maybe-mostlyclean-libtool
+mostlyclean-host: maybe-mostlyclean-m4
+mostlyclean-host: maybe-mostlyclean-make
+mostlyclean-host: maybe-mostlyclean-mmalloc
+mostlyclean-host: maybe-mostlyclean-patch
+mostlyclean-host: maybe-mostlyclean-perl
+mostlyclean-host: maybe-mostlyclean-prms
+mostlyclean-host: maybe-mostlyclean-rcs
+mostlyclean-host: maybe-mostlyclean-readline
+mostlyclean-host: maybe-mostlyclean-release
+mostlyclean-host: maybe-mostlyclean-recode
+mostlyclean-host: maybe-mostlyclean-sed
+mostlyclean-host: maybe-mostlyclean-send-pr
+mostlyclean-host: maybe-mostlyclean-shellutils
+mostlyclean-host: maybe-mostlyclean-sid
+mostlyclean-host: maybe-mostlyclean-sim
+mostlyclean-host: maybe-mostlyclean-tar
+mostlyclean-host: maybe-mostlyclean-texinfo
+mostlyclean-host: maybe-mostlyclean-textutils
+mostlyclean-host: maybe-mostlyclean-time
+mostlyclean-host: maybe-mostlyclean-uudecode
+mostlyclean-host: maybe-mostlyclean-wdiff
+mostlyclean-host: maybe-mostlyclean-zip
+mostlyclean-host: maybe-mostlyclean-zlib
+mostlyclean-host: maybe-mostlyclean-gdb
+mostlyclean-host: maybe-mostlyclean-expect
+mostlyclean-host: maybe-mostlyclean-guile
+mostlyclean-host: maybe-mostlyclean-tk
+mostlyclean-host: maybe-mostlyclean-libtermcap
+mostlyclean-host: maybe-mostlyclean-utils
+mostlyclean-host: maybe-mostlyclean-gnattools
+
.PHONY: mostlyclean-target
-mostlyclean-target: \
- maybe-mostlyclean-target-libstdc++-v3 \
- maybe-mostlyclean-target-libmudflap \
- maybe-mostlyclean-target-libssp \
- maybe-mostlyclean-target-newlib \
- maybe-mostlyclean-target-libgfortran \
- maybe-mostlyclean-target-libobjc \
- maybe-mostlyclean-target-libtermcap \
- maybe-mostlyclean-target-winsup \
- maybe-mostlyclean-target-libgloss \
- maybe-mostlyclean-target-libiberty \
- maybe-mostlyclean-target-gperf \
- maybe-mostlyclean-target-examples \
- maybe-mostlyclean-target-libffi \
- maybe-mostlyclean-target-libjava \
- maybe-mostlyclean-target-zlib \
- maybe-mostlyclean-target-boehm-gc \
- maybe-mostlyclean-target-qthreads \
- maybe-mostlyclean-target-rda \
- maybe-mostlyclean-target-libada
+mostlyclean-target: maybe-mostlyclean-target-libstdc++-v3
+mostlyclean-target: maybe-mostlyclean-target-libmudflap
+mostlyclean-target: maybe-mostlyclean-target-libssp
+mostlyclean-target: maybe-mostlyclean-target-libgcc-math
+mostlyclean-target: maybe-mostlyclean-target-newlib
+mostlyclean-target: maybe-mostlyclean-target-libgfortran
+mostlyclean-target: maybe-mostlyclean-target-libobjc
+mostlyclean-target: maybe-mostlyclean-target-libtermcap
+mostlyclean-target: maybe-mostlyclean-target-winsup
+mostlyclean-target: maybe-mostlyclean-target-libgloss
+mostlyclean-target: maybe-mostlyclean-target-libiberty
+mostlyclean-target: maybe-mostlyclean-target-gperf
+mostlyclean-target: maybe-mostlyclean-target-examples
+mostlyclean-target: maybe-mostlyclean-target-libffi
+mostlyclean-target: maybe-mostlyclean-target-libjava
+mostlyclean-target: maybe-mostlyclean-target-zlib
+mostlyclean-target: maybe-mostlyclean-target-boehm-gc
+mostlyclean-target: maybe-mostlyclean-target-qthreads
+mostlyclean-target: maybe-mostlyclean-target-rda
+mostlyclean-target: maybe-mostlyclean-target-libada
+mostlyclean-target: maybe-mostlyclean-target-libgomp
+
.PHONY: do-clean
do-clean:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) clean-host \
clean-target
- @$(stage)
.PHONY: clean-host
-clean-host: \
- maybe-clean-ash \
- maybe-clean-autoconf \
- maybe-clean-automake \
- maybe-clean-bash \
- maybe-clean-bfd \
- maybe-clean-opcodes \
- maybe-clean-binutils \
- maybe-clean-bison \
- maybe-clean-byacc \
- maybe-clean-bzip2 \
- maybe-clean-dejagnu \
- maybe-clean-diff \
- maybe-clean-dosutils \
- maybe-clean-etc \
- maybe-clean-fastjar \
- maybe-clean-fileutils \
- maybe-clean-findutils \
- maybe-clean-find \
- maybe-clean-fixincludes \
- maybe-clean-flex \
- maybe-clean-gas \
- maybe-clean-gcc \
- maybe-clean-gawk \
- maybe-clean-gettext \
- maybe-clean-gnuserv \
- maybe-clean-gprof \
- maybe-clean-gzip \
- maybe-clean-hello \
- maybe-clean-indent \
- maybe-clean-intl \
- maybe-clean-tcl \
- maybe-clean-itcl \
- maybe-clean-ld \
- maybe-clean-libcpp \
- maybe-clean-libdecnumber \
- maybe-clean-libgui \
- maybe-clean-libiberty \
- maybe-clean-libtool \
- maybe-clean-m4 \
- maybe-clean-make \
- maybe-clean-mmalloc \
- maybe-clean-patch \
- maybe-clean-perl \
- maybe-clean-prms \
- maybe-clean-rcs \
- maybe-clean-readline \
- maybe-clean-release \
- maybe-clean-recode \
- maybe-clean-sed \
- maybe-clean-send-pr \
- maybe-clean-shellutils \
- maybe-clean-sid \
- maybe-clean-sim \
- maybe-clean-tar \
- maybe-clean-texinfo \
- maybe-clean-textutils \
- maybe-clean-time \
- maybe-clean-uudecode \
- maybe-clean-wdiff \
- maybe-clean-zip \
- maybe-clean-zlib \
- maybe-clean-gdb \
- maybe-clean-expect \
- maybe-clean-guile \
- maybe-clean-tk \
- maybe-clean-libtermcap \
- maybe-clean-utils \
- maybe-clean-gnattools
+clean-host: maybe-clean-ash
+clean-host: maybe-clean-autoconf
+clean-host: maybe-clean-automake
+clean-host: maybe-clean-bash
+clean-host: maybe-clean-bfd
+clean-host: maybe-clean-opcodes
+clean-host: maybe-clean-binutils
+clean-host: maybe-clean-bison
+clean-host: maybe-clean-byacc
+clean-host: maybe-clean-bzip2
+clean-host: maybe-clean-dejagnu
+clean-host: maybe-clean-diff
+clean-host: maybe-clean-dosutils
+clean-host: maybe-clean-etc
+clean-host: maybe-clean-fastjar
+clean-host: maybe-clean-fileutils
+clean-host: maybe-clean-findutils
+clean-host: maybe-clean-find
+clean-host: maybe-clean-fixincludes
+clean-host: maybe-clean-flex
+clean-host: maybe-clean-gas
+clean-host: maybe-clean-gcc
+clean-host: maybe-clean-gawk
+clean-host: maybe-clean-gettext
+clean-host: maybe-clean-gnuserv
+clean-host: maybe-clean-gprof
+clean-host: maybe-clean-gzip
+clean-host: maybe-clean-hello
+clean-host: maybe-clean-indent
+clean-host: maybe-clean-intl
+clean-host: maybe-clean-tcl
+clean-host: maybe-clean-itcl
+clean-host: maybe-clean-ld
+clean-host: maybe-clean-libcpp
+clean-host: maybe-clean-libdecnumber
+clean-host: maybe-clean-libgui
+clean-host: maybe-clean-libiberty
+clean-host: maybe-clean-libtool
+clean-host: maybe-clean-m4
+clean-host: maybe-clean-make
+clean-host: maybe-clean-mmalloc
+clean-host: maybe-clean-patch
+clean-host: maybe-clean-perl
+clean-host: maybe-clean-prms
+clean-host: maybe-clean-rcs
+clean-host: maybe-clean-readline
+clean-host: maybe-clean-release
+clean-host: maybe-clean-recode
+clean-host: maybe-clean-sed
+clean-host: maybe-clean-send-pr
+clean-host: maybe-clean-shellutils
+clean-host: maybe-clean-sid
+clean-host: maybe-clean-sim
+clean-host: maybe-clean-tar
+clean-host: maybe-clean-texinfo
+clean-host: maybe-clean-textutils
+clean-host: maybe-clean-time
+clean-host: maybe-clean-uudecode
+clean-host: maybe-clean-wdiff
+clean-host: maybe-clean-zip
+clean-host: maybe-clean-zlib
+clean-host: maybe-clean-gdb
+clean-host: maybe-clean-expect
+clean-host: maybe-clean-guile
+clean-host: maybe-clean-tk
+clean-host: maybe-clean-libtermcap
+clean-host: maybe-clean-utils
+clean-host: maybe-clean-gnattools
+
.PHONY: clean-target
-clean-target: \
- maybe-clean-target-libstdc++-v3 \
- maybe-clean-target-libmudflap \
- maybe-clean-target-libssp \
- maybe-clean-target-newlib \
- maybe-clean-target-libgfortran \
- maybe-clean-target-libobjc \
- maybe-clean-target-libtermcap \
- maybe-clean-target-winsup \
- maybe-clean-target-libgloss \
- maybe-clean-target-libiberty \
- maybe-clean-target-gperf \
- maybe-clean-target-examples \
- maybe-clean-target-libffi \
- maybe-clean-target-libjava \
- maybe-clean-target-zlib \
- maybe-clean-target-boehm-gc \
- maybe-clean-target-qthreads \
- maybe-clean-target-rda \
- maybe-clean-target-libada
+clean-target: maybe-clean-target-libstdc++-v3
+clean-target: maybe-clean-target-libmudflap
+clean-target: maybe-clean-target-libssp
+clean-target: maybe-clean-target-libgcc-math
+clean-target: maybe-clean-target-newlib
+clean-target: maybe-clean-target-libgfortran
+clean-target: maybe-clean-target-libobjc
+clean-target: maybe-clean-target-libtermcap
+clean-target: maybe-clean-target-winsup
+clean-target: maybe-clean-target-libgloss
+clean-target: maybe-clean-target-libiberty
+clean-target: maybe-clean-target-gperf
+clean-target: maybe-clean-target-examples
+clean-target: maybe-clean-target-libffi
+clean-target: maybe-clean-target-libjava
+clean-target: maybe-clean-target-zlib
+clean-target: maybe-clean-target-boehm-gc
+clean-target: maybe-clean-target-qthreads
+clean-target: maybe-clean-target-rda
+clean-target: maybe-clean-target-libada
+clean-target: maybe-clean-target-libgomp
+
.PHONY: do-distclean
do-distclean:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) distclean-host \
distclean-target
- @$(stage)
.PHONY: distclean-host
-distclean-host: \
- maybe-distclean-ash \
- maybe-distclean-autoconf \
- maybe-distclean-automake \
- maybe-distclean-bash \
- maybe-distclean-bfd \
- maybe-distclean-opcodes \
- maybe-distclean-binutils \
- maybe-distclean-bison \
- maybe-distclean-byacc \
- maybe-distclean-bzip2 \
- maybe-distclean-dejagnu \
- maybe-distclean-diff \
- maybe-distclean-dosutils \
- maybe-distclean-etc \
- maybe-distclean-fastjar \
- maybe-distclean-fileutils \
- maybe-distclean-findutils \
- maybe-distclean-find \
- maybe-distclean-fixincludes \
- maybe-distclean-flex \
- maybe-distclean-gas \
- maybe-distclean-gcc \
- maybe-distclean-gawk \
- maybe-distclean-gettext \
- maybe-distclean-gnuserv \
- maybe-distclean-gprof \
- maybe-distclean-gzip \
- maybe-distclean-hello \
- maybe-distclean-indent \
- maybe-distclean-intl \
- maybe-distclean-tcl \
- maybe-distclean-itcl \
- maybe-distclean-ld \
- maybe-distclean-libcpp \
- maybe-distclean-libdecnumber \
- maybe-distclean-libgui \
- maybe-distclean-libiberty \
- maybe-distclean-libtool \
- maybe-distclean-m4 \
- maybe-distclean-make \
- maybe-distclean-mmalloc \
- maybe-distclean-patch \
- maybe-distclean-perl \
- maybe-distclean-prms \
- maybe-distclean-rcs \
- maybe-distclean-readline \
- maybe-distclean-release \
- maybe-distclean-recode \
- maybe-distclean-sed \
- maybe-distclean-send-pr \
- maybe-distclean-shellutils \
- maybe-distclean-sid \
- maybe-distclean-sim \
- maybe-distclean-tar \
- maybe-distclean-texinfo \
- maybe-distclean-textutils \
- maybe-distclean-time \
- maybe-distclean-uudecode \
- maybe-distclean-wdiff \
- maybe-distclean-zip \
- maybe-distclean-zlib \
- maybe-distclean-gdb \
- maybe-distclean-expect \
- maybe-distclean-guile \
- maybe-distclean-tk \
- maybe-distclean-libtermcap \
- maybe-distclean-utils \
- maybe-distclean-gnattools
+distclean-host: maybe-distclean-ash
+distclean-host: maybe-distclean-autoconf
+distclean-host: maybe-distclean-automake
+distclean-host: maybe-distclean-bash
+distclean-host: maybe-distclean-bfd
+distclean-host: maybe-distclean-opcodes
+distclean-host: maybe-distclean-binutils
+distclean-host: maybe-distclean-bison
+distclean-host: maybe-distclean-byacc
+distclean-host: maybe-distclean-bzip2
+distclean-host: maybe-distclean-dejagnu
+distclean-host: maybe-distclean-diff
+distclean-host: maybe-distclean-dosutils
+distclean-host: maybe-distclean-etc
+distclean-host: maybe-distclean-fastjar
+distclean-host: maybe-distclean-fileutils
+distclean-host: maybe-distclean-findutils
+distclean-host: maybe-distclean-find
+distclean-host: maybe-distclean-fixincludes
+distclean-host: maybe-distclean-flex
+distclean-host: maybe-distclean-gas
+distclean-host: maybe-distclean-gcc
+distclean-host: maybe-distclean-gawk
+distclean-host: maybe-distclean-gettext
+distclean-host: maybe-distclean-gnuserv
+distclean-host: maybe-distclean-gprof
+distclean-host: maybe-distclean-gzip
+distclean-host: maybe-distclean-hello
+distclean-host: maybe-distclean-indent
+distclean-host: maybe-distclean-intl
+distclean-host: maybe-distclean-tcl
+distclean-host: maybe-distclean-itcl
+distclean-host: maybe-distclean-ld
+distclean-host: maybe-distclean-libcpp
+distclean-host: maybe-distclean-libdecnumber
+distclean-host: maybe-distclean-libgui
+distclean-host: maybe-distclean-libiberty
+distclean-host: maybe-distclean-libtool
+distclean-host: maybe-distclean-m4
+distclean-host: maybe-distclean-make
+distclean-host: maybe-distclean-mmalloc
+distclean-host: maybe-distclean-patch
+distclean-host: maybe-distclean-perl
+distclean-host: maybe-distclean-prms
+distclean-host: maybe-distclean-rcs
+distclean-host: maybe-distclean-readline
+distclean-host: maybe-distclean-release
+distclean-host: maybe-distclean-recode
+distclean-host: maybe-distclean-sed
+distclean-host: maybe-distclean-send-pr
+distclean-host: maybe-distclean-shellutils
+distclean-host: maybe-distclean-sid
+distclean-host: maybe-distclean-sim
+distclean-host: maybe-distclean-tar
+distclean-host: maybe-distclean-texinfo
+distclean-host: maybe-distclean-textutils
+distclean-host: maybe-distclean-time
+distclean-host: maybe-distclean-uudecode
+distclean-host: maybe-distclean-wdiff
+distclean-host: maybe-distclean-zip
+distclean-host: maybe-distclean-zlib
+distclean-host: maybe-distclean-gdb
+distclean-host: maybe-distclean-expect
+distclean-host: maybe-distclean-guile
+distclean-host: maybe-distclean-tk
+distclean-host: maybe-distclean-libtermcap
+distclean-host: maybe-distclean-utils
+distclean-host: maybe-distclean-gnattools
+
.PHONY: distclean-target
-distclean-target: \
- maybe-distclean-target-libstdc++-v3 \
- maybe-distclean-target-libmudflap \
- maybe-distclean-target-libssp \
- maybe-distclean-target-newlib \
- maybe-distclean-target-libgfortran \
- maybe-distclean-target-libobjc \
- maybe-distclean-target-libtermcap \
- maybe-distclean-target-winsup \
- maybe-distclean-target-libgloss \
- maybe-distclean-target-libiberty \
- maybe-distclean-target-gperf \
- maybe-distclean-target-examples \
- maybe-distclean-target-libffi \
- maybe-distclean-target-libjava \
- maybe-distclean-target-zlib \
- maybe-distclean-target-boehm-gc \
- maybe-distclean-target-qthreads \
- maybe-distclean-target-rda \
- maybe-distclean-target-libada
+distclean-target: maybe-distclean-target-libstdc++-v3
+distclean-target: maybe-distclean-target-libmudflap
+distclean-target: maybe-distclean-target-libssp
+distclean-target: maybe-distclean-target-libgcc-math
+distclean-target: maybe-distclean-target-newlib
+distclean-target: maybe-distclean-target-libgfortran
+distclean-target: maybe-distclean-target-libobjc
+distclean-target: maybe-distclean-target-libtermcap
+distclean-target: maybe-distclean-target-winsup
+distclean-target: maybe-distclean-target-libgloss
+distclean-target: maybe-distclean-target-libiberty
+distclean-target: maybe-distclean-target-gperf
+distclean-target: maybe-distclean-target-examples
+distclean-target: maybe-distclean-target-libffi
+distclean-target: maybe-distclean-target-libjava
+distclean-target: maybe-distclean-target-zlib
+distclean-target: maybe-distclean-target-boehm-gc
+distclean-target: maybe-distclean-target-qthreads
+distclean-target: maybe-distclean-target-rda
+distclean-target: maybe-distclean-target-libada
+distclean-target: maybe-distclean-target-libgomp
+
.PHONY: do-maintainer-clean
do-maintainer-clean:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) maintainer-clean-host \
maintainer-clean-target
- @$(stage)
.PHONY: maintainer-clean-host
-maintainer-clean-host: \
- maybe-maintainer-clean-ash \
- maybe-maintainer-clean-autoconf \
- maybe-maintainer-clean-automake \
- maybe-maintainer-clean-bash \
- maybe-maintainer-clean-bfd \
- maybe-maintainer-clean-opcodes \
- maybe-maintainer-clean-binutils \
- maybe-maintainer-clean-bison \
- maybe-maintainer-clean-byacc \
- maybe-maintainer-clean-bzip2 \
- maybe-maintainer-clean-dejagnu \
- maybe-maintainer-clean-diff \
- maybe-maintainer-clean-dosutils \
- maybe-maintainer-clean-etc \
- maybe-maintainer-clean-fastjar \
- maybe-maintainer-clean-fileutils \
- maybe-maintainer-clean-findutils \
- maybe-maintainer-clean-find \
- maybe-maintainer-clean-fixincludes \
- maybe-maintainer-clean-flex \
- maybe-maintainer-clean-gas \
- maybe-maintainer-clean-gcc \
- maybe-maintainer-clean-gawk \
- maybe-maintainer-clean-gettext \
- maybe-maintainer-clean-gnuserv \
- maybe-maintainer-clean-gprof \
- maybe-maintainer-clean-gzip \
- maybe-maintainer-clean-hello \
- maybe-maintainer-clean-indent \
- maybe-maintainer-clean-intl \
- maybe-maintainer-clean-tcl \
- maybe-maintainer-clean-itcl \
- maybe-maintainer-clean-ld \
- maybe-maintainer-clean-libcpp \
- maybe-maintainer-clean-libdecnumber \
- maybe-maintainer-clean-libgui \
- maybe-maintainer-clean-libiberty \
- maybe-maintainer-clean-libtool \
- maybe-maintainer-clean-m4 \
- maybe-maintainer-clean-make \
- maybe-maintainer-clean-mmalloc \
- maybe-maintainer-clean-patch \
- maybe-maintainer-clean-perl \
- maybe-maintainer-clean-prms \
- maybe-maintainer-clean-rcs \
- maybe-maintainer-clean-readline \
- maybe-maintainer-clean-release \
- maybe-maintainer-clean-recode \
- maybe-maintainer-clean-sed \
- maybe-maintainer-clean-send-pr \
- maybe-maintainer-clean-shellutils \
- maybe-maintainer-clean-sid \
- maybe-maintainer-clean-sim \
- maybe-maintainer-clean-tar \
- maybe-maintainer-clean-texinfo \
- maybe-maintainer-clean-textutils \
- maybe-maintainer-clean-time \
- maybe-maintainer-clean-uudecode \
- maybe-maintainer-clean-wdiff \
- maybe-maintainer-clean-zip \
- maybe-maintainer-clean-zlib \
- maybe-maintainer-clean-gdb \
- maybe-maintainer-clean-expect \
- maybe-maintainer-clean-guile \
- maybe-maintainer-clean-tk \
- maybe-maintainer-clean-libtermcap \
- maybe-maintainer-clean-utils \
- maybe-maintainer-clean-gnattools
+maintainer-clean-host: maybe-maintainer-clean-ash
+maintainer-clean-host: maybe-maintainer-clean-autoconf
+maintainer-clean-host: maybe-maintainer-clean-automake
+maintainer-clean-host: maybe-maintainer-clean-bash
+maintainer-clean-host: maybe-maintainer-clean-bfd
+maintainer-clean-host: maybe-maintainer-clean-opcodes
+maintainer-clean-host: maybe-maintainer-clean-binutils
+maintainer-clean-host: maybe-maintainer-clean-bison
+maintainer-clean-host: maybe-maintainer-clean-byacc
+maintainer-clean-host: maybe-maintainer-clean-bzip2
+maintainer-clean-host: maybe-maintainer-clean-dejagnu
+maintainer-clean-host: maybe-maintainer-clean-diff
+maintainer-clean-host: maybe-maintainer-clean-dosutils
+maintainer-clean-host: maybe-maintainer-clean-etc
+maintainer-clean-host: maybe-maintainer-clean-fastjar
+maintainer-clean-host: maybe-maintainer-clean-fileutils
+maintainer-clean-host: maybe-maintainer-clean-findutils
+maintainer-clean-host: maybe-maintainer-clean-find
+maintainer-clean-host: maybe-maintainer-clean-fixincludes
+maintainer-clean-host: maybe-maintainer-clean-flex
+maintainer-clean-host: maybe-maintainer-clean-gas
+maintainer-clean-host: maybe-maintainer-clean-gcc
+maintainer-clean-host: maybe-maintainer-clean-gawk
+maintainer-clean-host: maybe-maintainer-clean-gettext
+maintainer-clean-host: maybe-maintainer-clean-gnuserv
+maintainer-clean-host: maybe-maintainer-clean-gprof
+maintainer-clean-host: maybe-maintainer-clean-gzip
+maintainer-clean-host: maybe-maintainer-clean-hello
+maintainer-clean-host: maybe-maintainer-clean-indent
+maintainer-clean-host: maybe-maintainer-clean-intl
+maintainer-clean-host: maybe-maintainer-clean-tcl
+maintainer-clean-host: maybe-maintainer-clean-itcl
+maintainer-clean-host: maybe-maintainer-clean-ld
+maintainer-clean-host: maybe-maintainer-clean-libcpp
+maintainer-clean-host: maybe-maintainer-clean-libdecnumber
+maintainer-clean-host: maybe-maintainer-clean-libgui
+maintainer-clean-host: maybe-maintainer-clean-libiberty
+maintainer-clean-host: maybe-maintainer-clean-libtool
+maintainer-clean-host: maybe-maintainer-clean-m4
+maintainer-clean-host: maybe-maintainer-clean-make
+maintainer-clean-host: maybe-maintainer-clean-mmalloc
+maintainer-clean-host: maybe-maintainer-clean-patch
+maintainer-clean-host: maybe-maintainer-clean-perl
+maintainer-clean-host: maybe-maintainer-clean-prms
+maintainer-clean-host: maybe-maintainer-clean-rcs
+maintainer-clean-host: maybe-maintainer-clean-readline
+maintainer-clean-host: maybe-maintainer-clean-release
+maintainer-clean-host: maybe-maintainer-clean-recode
+maintainer-clean-host: maybe-maintainer-clean-sed
+maintainer-clean-host: maybe-maintainer-clean-send-pr
+maintainer-clean-host: maybe-maintainer-clean-shellutils
+maintainer-clean-host: maybe-maintainer-clean-sid
+maintainer-clean-host: maybe-maintainer-clean-sim
+maintainer-clean-host: maybe-maintainer-clean-tar
+maintainer-clean-host: maybe-maintainer-clean-texinfo
+maintainer-clean-host: maybe-maintainer-clean-textutils
+maintainer-clean-host: maybe-maintainer-clean-time
+maintainer-clean-host: maybe-maintainer-clean-uudecode
+maintainer-clean-host: maybe-maintainer-clean-wdiff
+maintainer-clean-host: maybe-maintainer-clean-zip
+maintainer-clean-host: maybe-maintainer-clean-zlib
+maintainer-clean-host: maybe-maintainer-clean-gdb
+maintainer-clean-host: maybe-maintainer-clean-expect
+maintainer-clean-host: maybe-maintainer-clean-guile
+maintainer-clean-host: maybe-maintainer-clean-tk
+maintainer-clean-host: maybe-maintainer-clean-libtermcap
+maintainer-clean-host: maybe-maintainer-clean-utils
+maintainer-clean-host: maybe-maintainer-clean-gnattools
+
.PHONY: maintainer-clean-target
-maintainer-clean-target: \
- maybe-maintainer-clean-target-libstdc++-v3 \
- maybe-maintainer-clean-target-libmudflap \
- maybe-maintainer-clean-target-libssp \
- maybe-maintainer-clean-target-newlib \
- maybe-maintainer-clean-target-libgfortran \
- maybe-maintainer-clean-target-libobjc \
- maybe-maintainer-clean-target-libtermcap \
- maybe-maintainer-clean-target-winsup \
- maybe-maintainer-clean-target-libgloss \
- maybe-maintainer-clean-target-libiberty \
- maybe-maintainer-clean-target-gperf \
- maybe-maintainer-clean-target-examples \
- maybe-maintainer-clean-target-libffi \
- maybe-maintainer-clean-target-libjava \
- maybe-maintainer-clean-target-zlib \
- maybe-maintainer-clean-target-boehm-gc \
- maybe-maintainer-clean-target-qthreads \
- maybe-maintainer-clean-target-rda \
- maybe-maintainer-clean-target-libada
+maintainer-clean-target: maybe-maintainer-clean-target-libstdc++-v3
+maintainer-clean-target: maybe-maintainer-clean-target-libmudflap
+maintainer-clean-target: maybe-maintainer-clean-target-libssp
+maintainer-clean-target: maybe-maintainer-clean-target-libgcc-math
+maintainer-clean-target: maybe-maintainer-clean-target-newlib
+maintainer-clean-target: maybe-maintainer-clean-target-libgfortran
+maintainer-clean-target: maybe-maintainer-clean-target-libobjc
+maintainer-clean-target: maybe-maintainer-clean-target-libtermcap
+maintainer-clean-target: maybe-maintainer-clean-target-winsup
+maintainer-clean-target: maybe-maintainer-clean-target-libgloss
+maintainer-clean-target: maybe-maintainer-clean-target-libiberty
+maintainer-clean-target: maybe-maintainer-clean-target-gperf
+maintainer-clean-target: maybe-maintainer-clean-target-examples
+maintainer-clean-target: maybe-maintainer-clean-target-libffi
+maintainer-clean-target: maybe-maintainer-clean-target-libjava
+maintainer-clean-target: maybe-maintainer-clean-target-zlib
+maintainer-clean-target: maybe-maintainer-clean-target-boehm-gc
+maintainer-clean-target: maybe-maintainer-clean-target-qthreads
+maintainer-clean-target: maybe-maintainer-clean-target-rda
+maintainer-clean-target: maybe-maintainer-clean-target-libada
+maintainer-clean-target: maybe-maintainer-clean-target-libgomp
+
# Here are the targets which correspond to the do-X targets.
-.PHONY: info installcheck dvi html install-info
+.PHONY: info installcheck dvi html install-info install-html
.PHONY: clean distclean mostlyclean maintainer-clean realclean
.PHONY: local-clean local-distclean local-maintainer-clean
info: do-info
@@ -1804,12 +1960,14 @@
$(INSTALL_DATA) dir.info $(DESTDIR)$(infodir)/dir.info ; \
else true ; fi
+install-html: do-install-html
+
local-clean:
-rm -f *.a TEMP errs core *.o *~ \#* TAGS *.E *.log
local-distclean:
-rm -f Makefile config.status config.cache mh-frag mt-frag
- -rm -f multilib.out multilib.tmp maybedep.tmp serdep.tmp
+ -rm -f maybedep.tmp serdep.tmp
-if [ "$(TARGET_SUBDIR)" != "." ]; then \
rm -rf $(TARGET_SUBDIR); \
else true; fi
@@ -1921,6 +2079,7 @@
maybe-check-target-libstdc++-v3 \
maybe-check-target-libmudflap \
maybe-check-target-libssp \
+ maybe-check-target-libgcc-math \
maybe-check-target-newlib \
maybe-check-target-libgfortran \
maybe-check-target-libobjc \
@@ -1936,14 +2095,14 @@
maybe-check-target-boehm-gc \
maybe-check-target-qthreads \
maybe-check-target-rda \
- maybe-check-target-libada
+ maybe-check-target-libada \
+ maybe-check-target-libgomp
do-check:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target
- @$(stage)
# Automated reporting of test results.
@@ -1970,11 +2129,10 @@
.PHONY: install uninstall
install:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target
- @$(stage)
.PHONY: install-host-nogcc
install-host-nogcc: \
@@ -2122,6 +2280,7 @@
maybe-install-target-libstdc++-v3 \
maybe-install-target-libmudflap \
maybe-install-target-libssp \
+ maybe-install-target-libgcc-math \
maybe-install-target-newlib \
maybe-install-target-libgfortran \
maybe-install-target-libobjc \
@@ -2137,7 +2296,8 @@
maybe-install-target-boehm-gc \
maybe-install-target-qthreads \
maybe-install-target-rda \
- maybe-install-target-libada
+ maybe-install-target-libada \
+ maybe-install-target-libgomp
uninstall:
@echo "the uninstall target is not supported in this tree"
@@ -2146,6 +2306,7 @@
install.all: install-no-fixedincludes
@if [ -f ./gcc/Makefile ] ; then \
r=`${PWD_COMMAND}` ; export r ; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd ./gcc && \
$(MAKE) $(FLAGS_TO_PASS) install-headers) ; \
@@ -2207,11 +2368,11 @@
@if build-libiberty
maybe-configure-build-libiberty: configure-build-libiberty
configure-build-libiberty:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/libiberty/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/libiberty/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/libiberty ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/libiberty; \
cd "$(BUILD_SUBDIR)/libiberty" || exit 1; \
@@ -2238,7 +2399,7 @@
TARGET-build-libiberty=all
maybe-all-build-libiberty: all-build-libiberty
all-build-libiberty: configure-build-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2255,11 +2416,11 @@
@if build-bison
maybe-configure-build-bison: configure-build-bison
configure-build-bison:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/bison/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/bison/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/bison ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/bison; \
cd "$(BUILD_SUBDIR)/bison" || exit 1; \
@@ -2286,7 +2447,7 @@
TARGET-build-bison=all
maybe-all-build-bison: all-build-bison
all-build-bison: configure-build-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2303,11 +2464,11 @@
@if build-byacc
maybe-configure-build-byacc: configure-build-byacc
configure-build-byacc:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/byacc/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/byacc/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/byacc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/byacc; \
cd "$(BUILD_SUBDIR)/byacc" || exit 1; \
@@ -2334,7 +2495,7 @@
TARGET-build-byacc=all
maybe-all-build-byacc: all-build-byacc
all-build-byacc: configure-build-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2351,11 +2512,11 @@
@if build-flex
maybe-configure-build-flex: configure-build-flex
configure-build-flex:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/flex/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/flex/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/flex ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/flex; \
cd "$(BUILD_SUBDIR)/flex" || exit 1; \
@@ -2382,7 +2543,7 @@
TARGET-build-flex=all
maybe-all-build-flex: all-build-flex
all-build-flex: configure-build-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2399,11 +2560,11 @@
@if build-m4
maybe-configure-build-m4: configure-build-m4
configure-build-m4:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/m4/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/m4/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/m4 ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/m4; \
cd "$(BUILD_SUBDIR)/m4" || exit 1; \
@@ -2430,7 +2591,7 @@
TARGET-build-m4=all
maybe-all-build-m4: all-build-m4
all-build-m4: configure-build-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2447,11 +2608,11 @@
@if build-texinfo
maybe-configure-build-texinfo: configure-build-texinfo
configure-build-texinfo:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/texinfo/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/texinfo/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/texinfo ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/texinfo; \
cd "$(BUILD_SUBDIR)/texinfo" || exit 1; \
@@ -2478,7 +2639,7 @@
TARGET-build-texinfo=all
maybe-all-build-texinfo: all-build-texinfo
all-build-texinfo: configure-build-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2495,11 +2656,11 @@
@if build-fixincludes
maybe-configure-build-fixincludes: configure-build-fixincludes
configure-build-fixincludes:
- @$(unstage)
- @test ! -f $(BUILD_SUBDIR)/fixincludes/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(BUILD_SUBDIR)/fixincludes/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(BUILD_SUBDIR)/fixincludes ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
echo Configuring in $(BUILD_SUBDIR)/fixincludes; \
cd "$(BUILD_SUBDIR)/fixincludes" || exit 1; \
@@ -2526,7 +2687,7 @@
TARGET-build-fixincludes=all
maybe-all-build-fixincludes: all-build-fixincludes
all-build-fixincludes: configure-build-fixincludes
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(BUILD_EXPORTS) \
@@ -2548,11 +2709,11 @@
@if ash
maybe-configure-ash: configure-ash
configure-ash:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/ash/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ash/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ash ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/ash; \
cd "$(HOST_SUBDIR)/ash" || exit 1; \
@@ -2578,7 +2739,7 @@
TARGET-ash=all
maybe-all-ash: all-ash
all-ash: configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2595,7 +2756,7 @@
maybe-check-ash: check-ash
check-ash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2610,7 +2771,7 @@
maybe-install-ash: install-ash
install-ash: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2628,7 +2789,7 @@
info-ash: \
configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2654,7 +2815,7 @@
dvi-ash: \
configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2680,7 +2841,7 @@
html-ash: \
configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2706,7 +2867,7 @@
TAGS-ash: \
configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2733,7 +2894,7 @@
install-info-ash: \
configure-ash \
info-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2752,6 +2913,33 @@
@endif ash
+.PHONY: maybe-install-html-ash install-html-ash
+maybe-install-html-ash:
+ at if ash
+maybe-install-html-ash: install-html-ash
+
+install-html-ash: \
+ configure-ash \
+ html-ash
+ @: $(MAKE); $(unstage)
+ @[ -f ./ash/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in ash" ; \
+ (cd $(HOST_SUBDIR)/ash && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif ash
+
.PHONY: maybe-installcheck-ash installcheck-ash
maybe-installcheck-ash:
@if ash
@@ -2759,7 +2947,7 @@
installcheck-ash: \
configure-ash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2784,7 +2972,7 @@
maybe-mostlyclean-ash: mostlyclean-ash
mostlyclean-ash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2809,7 +2997,7 @@
maybe-clean-ash: clean-ash
clean-ash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2834,7 +3022,7 @@
maybe-distclean-ash: distclean-ash
distclean-ash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2859,7 +3047,7 @@
maybe-maintainer-clean-ash: maintainer-clean-ash
maintainer-clean-ash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./ash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2885,11 +3073,11 @@
@if autoconf
maybe-configure-autoconf: configure-autoconf
configure-autoconf:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/autoconf/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/autoconf/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/autoconf ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/autoconf; \
cd "$(HOST_SUBDIR)/autoconf" || exit 1; \
@@ -2915,7 +3103,7 @@
TARGET-autoconf=all
maybe-all-autoconf: all-autoconf
all-autoconf: configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2932,7 +3120,7 @@
maybe-check-autoconf: check-autoconf
check-autoconf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2947,7 +3135,7 @@
maybe-install-autoconf: install-autoconf
install-autoconf: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -2965,7 +3153,7 @@
info-autoconf: \
configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -2991,7 +3179,7 @@
dvi-autoconf: \
configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3017,7 +3205,7 @@
html-autoconf: \
configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3043,7 +3231,7 @@
TAGS-autoconf: \
configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3070,7 +3258,7 @@
install-info-autoconf: \
configure-autoconf \
info-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3089,6 +3277,33 @@
@endif autoconf
+.PHONY: maybe-install-html-autoconf install-html-autoconf
+maybe-install-html-autoconf:
+ at if autoconf
+maybe-install-html-autoconf: install-html-autoconf
+
+install-html-autoconf: \
+ configure-autoconf \
+ html-autoconf
+ @: $(MAKE); $(unstage)
+ @[ -f ./autoconf/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in autoconf" ; \
+ (cd $(HOST_SUBDIR)/autoconf && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif autoconf
+
.PHONY: maybe-installcheck-autoconf installcheck-autoconf
maybe-installcheck-autoconf:
@if autoconf
@@ -3096,7 +3311,7 @@
installcheck-autoconf: \
configure-autoconf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3121,7 +3336,7 @@
maybe-mostlyclean-autoconf: mostlyclean-autoconf
mostlyclean-autoconf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3146,7 +3361,7 @@
maybe-clean-autoconf: clean-autoconf
clean-autoconf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3171,7 +3386,7 @@
maybe-distclean-autoconf: distclean-autoconf
distclean-autoconf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3196,7 +3411,7 @@
maybe-maintainer-clean-autoconf: maintainer-clean-autoconf
maintainer-clean-autoconf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./autoconf/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3222,11 +3437,11 @@
@if automake
maybe-configure-automake: configure-automake
configure-automake:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/automake/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/automake/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/automake ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/automake; \
cd "$(HOST_SUBDIR)/automake" || exit 1; \
@@ -3252,7 +3467,7 @@
TARGET-automake=all
maybe-all-automake: all-automake
all-automake: configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3269,7 +3484,7 @@
maybe-check-automake: check-automake
check-automake:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3284,7 +3499,7 @@
maybe-install-automake: install-automake
install-automake: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3302,7 +3517,7 @@
info-automake: \
configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3328,7 +3543,7 @@
dvi-automake: \
configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3354,7 +3569,7 @@
html-automake: \
configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3380,7 +3595,7 @@
TAGS-automake: \
configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3407,7 +3622,7 @@
install-info-automake: \
configure-automake \
info-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3426,6 +3641,33 @@
@endif automake
+.PHONY: maybe-install-html-automake install-html-automake
+maybe-install-html-automake:
+ at if automake
+maybe-install-html-automake: install-html-automake
+
+install-html-automake: \
+ configure-automake \
+ html-automake
+ @: $(MAKE); $(unstage)
+ @[ -f ./automake/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in automake" ; \
+ (cd $(HOST_SUBDIR)/automake && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif automake
+
.PHONY: maybe-installcheck-automake installcheck-automake
maybe-installcheck-automake:
@if automake
@@ -3433,7 +3675,7 @@
installcheck-automake: \
configure-automake
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3458,7 +3700,7 @@
maybe-mostlyclean-automake: mostlyclean-automake
mostlyclean-automake:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3483,7 +3725,7 @@
maybe-clean-automake: clean-automake
clean-automake:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3508,7 +3750,7 @@
maybe-distclean-automake: distclean-automake
distclean-automake:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3533,7 +3775,7 @@
maybe-maintainer-clean-automake: maintainer-clean-automake
maintainer-clean-automake:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./automake/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3559,11 +3801,11 @@
@if bash
maybe-configure-bash: configure-bash
configure-bash:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/bash/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bash/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bash ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/bash; \
cd "$(HOST_SUBDIR)/bash" || exit 1; \
@@ -3589,7 +3831,7 @@
TARGET-bash=all
maybe-all-bash: all-bash
all-bash: configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3606,7 +3848,7 @@
maybe-check-bash: check-bash
check-bash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3621,7 +3863,7 @@
maybe-install-bash: install-bash
install-bash: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -3639,7 +3881,7 @@
info-bash: \
configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3665,7 +3907,7 @@
dvi-bash: \
configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3691,7 +3933,7 @@
html-bash: \
configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3717,7 +3959,7 @@
TAGS-bash: \
configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3744,7 +3986,7 @@
install-info-bash: \
configure-bash \
info-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3763,6 +4005,33 @@
@endif bash
+.PHONY: maybe-install-html-bash install-html-bash
+maybe-install-html-bash:
+ at if bash
+maybe-install-html-bash: install-html-bash
+
+install-html-bash: \
+ configure-bash \
+ html-bash
+ @: $(MAKE); $(unstage)
+ @[ -f ./bash/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in bash" ; \
+ (cd $(HOST_SUBDIR)/bash && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif bash
+
.PHONY: maybe-installcheck-bash installcheck-bash
maybe-installcheck-bash:
@if bash
@@ -3770,7 +4039,7 @@
installcheck-bash: \
configure-bash
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3795,7 +4064,7 @@
maybe-mostlyclean-bash: mostlyclean-bash
mostlyclean-bash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3820,7 +4089,7 @@
maybe-clean-bash: clean-bash
clean-bash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3845,7 +4114,7 @@
maybe-distclean-bash: distclean-bash
distclean-bash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3870,7 +4139,7 @@
maybe-maintainer-clean-bash: maintainer-clean-bash
maintainer-clean-bash:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bash/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -3896,11 +4165,15 @@
@if bfd
maybe-configure-bfd: configure-bfd
configure-bfd:
- @test -f stage_last && exit 0; \
+ at endif bfd
+ at if bfd-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif bfd-bootstrap
+ at if bfd
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/bfd; \
cd "$(HOST_SUBDIR)/bfd" || exit 1; \
@@ -3922,13 +4195,15 @@
maybe-configure-stage1-bfd:
@if bfd-bootstrap
maybe-configure-stage1-bfd: configure-stage1-bfd
-configure-stage1-bfd:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-bfd:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -3946,14 +4221,16 @@
maybe-configure-stage2-bfd:
@if bfd-bootstrap
maybe-configure-stage2-bfd: configure-stage2-bfd
-configure-stage2-bfd:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-bfd:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -3971,14 +4248,16 @@
maybe-configure-stage3-bfd:
@if bfd-bootstrap
maybe-configure-stage3-bfd: configure-stage3-bfd
-configure-stage3-bfd:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-bfd:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -3996,14 +4275,16 @@
maybe-configure-stage4-bfd:
@if bfd-bootstrap
maybe-configure-stage4-bfd: configure-stage4-bfd
-configure-stage4-bfd:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-bfd:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4021,14 +4302,16 @@
maybe-configure-stageprofile-bfd:
@if bfd-bootstrap
maybe-configure-stageprofile-bfd: configure-stageprofile-bfd
-configure-stageprofile-bfd:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-bfd:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4046,14 +4329,16 @@
maybe-configure-stagefeedback-bfd:
@if bfd-bootstrap
maybe-configure-stagefeedback-bfd: configure-stagefeedback-bfd
-configure-stagefeedback-bfd:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/bfd/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-bfd:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/bfd ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \
cd $(HOST_SUBDIR)/bfd || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4077,8 +4362,12 @@
TARGET-bfd=all
maybe-all-bfd: all-bfd
all-bfd: configure-bfd
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif bfd
+ at if bfd-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif bfd-bootstrap
+ at if bfd
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/bfd && \
@@ -4096,12 +4385,12 @@
all-stage1: all-stage1-bfd
TARGET-stage1-bfd = $(TARGET-bfd)
all-stage1-bfd: configure-stage1-bfd
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/bfd && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-bfd)
maybe-clean-stage1-bfd: clean-stage1-bfd
@@ -4109,10 +4398,10 @@
clean-stage1-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif bfd-bootstrap
@@ -4125,7 +4414,7 @@
all-stage2: all-stage2-bfd
TARGET-stage2-bfd = $(TARGET-bfd)
all-stage2-bfd: configure-stage2-bfd
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4139,7 +4428,7 @@
clean-stage2-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4156,7 +4445,7 @@
all-stage3: all-stage3-bfd
TARGET-stage3-bfd = $(TARGET-bfd)
all-stage3-bfd: configure-stage3-bfd
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4170,7 +4459,7 @@
clean-stage3-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4187,7 +4476,7 @@
all-stage4: all-stage4-bfd
TARGET-stage4-bfd = $(TARGET-bfd)
all-stage4-bfd: configure-stage4-bfd
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4201,7 +4490,7 @@
clean-stage4-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4218,7 +4507,7 @@
all-stageprofile: all-stageprofile-bfd
TARGET-stageprofile-bfd = $(TARGET-bfd)
all-stageprofile-bfd: configure-stageprofile-bfd
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4232,7 +4521,7 @@
clean-stageprofile-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4249,7 +4538,7 @@
all-stagefeedback: all-stagefeedback-bfd
TARGET-stagefeedback-bfd = $(TARGET-bfd)
all-stagefeedback-bfd: configure-stagefeedback-bfd
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4263,7 +4552,7 @@
clean-stagefeedback-bfd:
@[ -f $(HOST_SUBDIR)/bfd/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-bfd/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/bfd && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4280,7 +4569,7 @@
maybe-check-bfd: check-bfd
check-bfd:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4295,7 +4584,7 @@
maybe-install-bfd: install-bfd
install-bfd: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4432,6 +4721,32 @@
@endif bfd
+.PHONY: maybe-install-html-bfd install-html-bfd
+maybe-install-html-bfd:
+ at if bfd
+maybe-install-html-bfd: install-html-bfd
+
+install-html-bfd: \
+ configure-bfd \
+ html-bfd
+ @[ -f ./bfd/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in bfd" ; \
+ (cd $(HOST_SUBDIR)/bfd && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif bfd
+
.PHONY: maybe-installcheck-bfd installcheck-bfd
maybe-installcheck-bfd:
@if bfd
@@ -4560,11 +4875,15 @@
@if opcodes
maybe-configure-opcodes: configure-opcodes
configure-opcodes:
- @test -f stage_last && exit 0; \
+ at endif opcodes
+ at if opcodes-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif opcodes-bootstrap
+ at if opcodes
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/opcodes; \
cd "$(HOST_SUBDIR)/opcodes" || exit 1; \
@@ -4586,13 +4905,15 @@
maybe-configure-stage1-opcodes:
@if opcodes-bootstrap
maybe-configure-stage1-opcodes: configure-stage1-opcodes
-configure-stage1-opcodes:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-opcodes:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4610,14 +4931,16 @@
maybe-configure-stage2-opcodes:
@if opcodes-bootstrap
maybe-configure-stage2-opcodes: configure-stage2-opcodes
-configure-stage2-opcodes:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-opcodes:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4635,14 +4958,16 @@
maybe-configure-stage3-opcodes:
@if opcodes-bootstrap
maybe-configure-stage3-opcodes: configure-stage3-opcodes
-configure-stage3-opcodes:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-opcodes:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4660,14 +4985,16 @@
maybe-configure-stage4-opcodes:
@if opcodes-bootstrap
maybe-configure-stage4-opcodes: configure-stage4-opcodes
-configure-stage4-opcodes:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-opcodes:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4685,14 +5012,16 @@
maybe-configure-stageprofile-opcodes:
@if opcodes-bootstrap
maybe-configure-stageprofile-opcodes: configure-stageprofile-opcodes
-configure-stageprofile-opcodes:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-opcodes:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4710,14 +5039,16 @@
maybe-configure-stagefeedback-opcodes:
@if opcodes-bootstrap
maybe-configure-stagefeedback-opcodes: configure-stagefeedback-opcodes
-configure-stagefeedback-opcodes:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/opcodes/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-opcodes:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/opcodes ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \
cd $(HOST_SUBDIR)/opcodes || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -4741,8 +5072,12 @@
TARGET-opcodes=all
maybe-all-opcodes: all-opcodes
all-opcodes: configure-opcodes
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif opcodes
+ at if opcodes-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif opcodes-bootstrap
+ at if opcodes
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/opcodes && \
@@ -4760,12 +5095,12 @@
all-stage1: all-stage1-opcodes
TARGET-stage1-opcodes = $(TARGET-opcodes)
all-stage1-opcodes: configure-stage1-opcodes
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/opcodes && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-opcodes)
maybe-clean-stage1-opcodes: clean-stage1-opcodes
@@ -4773,10 +5108,10 @@
clean-stage1-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif opcodes-bootstrap
@@ -4789,7 +5124,7 @@
all-stage2: all-stage2-opcodes
TARGET-stage2-opcodes = $(TARGET-opcodes)
all-stage2-opcodes: configure-stage2-opcodes
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4803,7 +5138,7 @@
clean-stage2-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4820,7 +5155,7 @@
all-stage3: all-stage3-opcodes
TARGET-stage3-opcodes = $(TARGET-opcodes)
all-stage3-opcodes: configure-stage3-opcodes
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4834,7 +5169,7 @@
clean-stage3-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4851,7 +5186,7 @@
all-stage4: all-stage4-opcodes
TARGET-stage4-opcodes = $(TARGET-opcodes)
all-stage4-opcodes: configure-stage4-opcodes
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4865,7 +5200,7 @@
clean-stage4-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4882,7 +5217,7 @@
all-stageprofile: all-stageprofile-opcodes
TARGET-stageprofile-opcodes = $(TARGET-opcodes)
all-stageprofile-opcodes: configure-stageprofile-opcodes
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4896,7 +5231,7 @@
clean-stageprofile-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4913,7 +5248,7 @@
all-stagefeedback: all-stagefeedback-opcodes
TARGET-stagefeedback-opcodes = $(TARGET-opcodes)
all-stagefeedback-opcodes: configure-stagefeedback-opcodes
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4927,7 +5262,7 @@
clean-stagefeedback-opcodes:
@[ -f $(HOST_SUBDIR)/opcodes/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-opcodes/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/opcodes && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -4944,7 +5279,7 @@
maybe-check-opcodes: check-opcodes
check-opcodes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -4959,7 +5294,7 @@
maybe-install-opcodes: install-opcodes
install-opcodes: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5096,6 +5431,32 @@
@endif opcodes
+.PHONY: maybe-install-html-opcodes install-html-opcodes
+maybe-install-html-opcodes:
+ at if opcodes
+maybe-install-html-opcodes: install-html-opcodes
+
+install-html-opcodes: \
+ configure-opcodes \
+ html-opcodes
+ @[ -f ./opcodes/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in opcodes" ; \
+ (cd $(HOST_SUBDIR)/opcodes && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif opcodes
+
.PHONY: maybe-installcheck-opcodes installcheck-opcodes
maybe-installcheck-opcodes:
@if opcodes
@@ -5224,11 +5585,15 @@
@if binutils
maybe-configure-binutils: configure-binutils
configure-binutils:
- @test -f stage_last && exit 0; \
+ at endif binutils
+ at if binutils-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif binutils-bootstrap
+ at if binutils
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/binutils; \
cd "$(HOST_SUBDIR)/binutils" || exit 1; \
@@ -5250,13 +5615,15 @@
maybe-configure-stage1-binutils:
@if binutils-bootstrap
maybe-configure-stage1-binutils: configure-stage1-binutils
-configure-stage1-binutils:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-binutils:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5274,14 +5641,16 @@
maybe-configure-stage2-binutils:
@if binutils-bootstrap
maybe-configure-stage2-binutils: configure-stage2-binutils
-configure-stage2-binutils:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-binutils:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5299,14 +5668,16 @@
maybe-configure-stage3-binutils:
@if binutils-bootstrap
maybe-configure-stage3-binutils: configure-stage3-binutils
-configure-stage3-binutils:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-binutils:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5324,14 +5695,16 @@
maybe-configure-stage4-binutils:
@if binutils-bootstrap
maybe-configure-stage4-binutils: configure-stage4-binutils
-configure-stage4-binutils:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-binutils:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5349,14 +5722,16 @@
maybe-configure-stageprofile-binutils:
@if binutils-bootstrap
maybe-configure-stageprofile-binutils: configure-stageprofile-binutils
-configure-stageprofile-binutils:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-binutils:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5374,14 +5749,16 @@
maybe-configure-stagefeedback-binutils:
@if binutils-bootstrap
maybe-configure-stagefeedback-binutils: configure-stagefeedback-binutils
-configure-stagefeedback-binutils:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/binutils/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-binutils:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/binutils ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \
cd $(HOST_SUBDIR)/binutils || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -5405,8 +5782,12 @@
TARGET-binutils=all
maybe-all-binutils: all-binutils
all-binutils: configure-binutils
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif binutils
+ at if binutils-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif binutils-bootstrap
+ at if binutils
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/binutils && \
@@ -5424,12 +5805,12 @@
all-stage1: all-stage1-binutils
TARGET-stage1-binutils = $(TARGET-binutils)
all-stage1-binutils: configure-stage1-binutils
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/binutils && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-binutils)
maybe-clean-stage1-binutils: clean-stage1-binutils
@@ -5437,10 +5818,10 @@
clean-stage1-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif binutils-bootstrap
@@ -5453,7 +5834,7 @@
all-stage2: all-stage2-binutils
TARGET-stage2-binutils = $(TARGET-binutils)
all-stage2-binutils: configure-stage2-binutils
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5467,7 +5848,7 @@
clean-stage2-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -5484,7 +5865,7 @@
all-stage3: all-stage3-binutils
TARGET-stage3-binutils = $(TARGET-binutils)
all-stage3-binutils: configure-stage3-binutils
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5498,7 +5879,7 @@
clean-stage3-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -5515,7 +5896,7 @@
all-stage4: all-stage4-binutils
TARGET-stage4-binutils = $(TARGET-binutils)
all-stage4-binutils: configure-stage4-binutils
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5529,7 +5910,7 @@
clean-stage4-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -5546,7 +5927,7 @@
all-stageprofile: all-stageprofile-binutils
TARGET-stageprofile-binutils = $(TARGET-binutils)
all-stageprofile-binutils: configure-stageprofile-binutils
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5560,7 +5941,7 @@
clean-stageprofile-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -5577,7 +5958,7 @@
all-stagefeedback: all-stagefeedback-binutils
TARGET-stagefeedback-binutils = $(TARGET-binutils)
all-stagefeedback-binutils: configure-stagefeedback-binutils
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5591,7 +5972,7 @@
clean-stagefeedback-binutils:
@[ -f $(HOST_SUBDIR)/binutils/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-binutils/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/binutils && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -5608,7 +5989,7 @@
maybe-check-binutils: check-binutils
check-binutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5623,7 +6004,7 @@
maybe-install-binutils: install-binutils
install-binutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5760,6 +6141,32 @@
@endif binutils
+.PHONY: maybe-install-html-binutils install-html-binutils
+maybe-install-html-binutils:
+ at if binutils
+maybe-install-html-binutils: install-html-binutils
+
+install-html-binutils: \
+ configure-binutils \
+ html-binutils
+ @[ -f ./binutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in binutils" ; \
+ (cd $(HOST_SUBDIR)/binutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif binutils
+
.PHONY: maybe-installcheck-binutils installcheck-binutils
maybe-installcheck-binutils:
@if binutils
@@ -5888,11 +6295,11 @@
@if bison
maybe-configure-bison: configure-bison
configure-bison:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/bison/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bison/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bison ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/bison; \
cd "$(HOST_SUBDIR)/bison" || exit 1; \
@@ -5918,7 +6325,7 @@
TARGET-bison=all
maybe-all-bison: all-bison
all-bison: configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5936,7 +6343,7 @@
# This module is only tested in a native toolchain.
check-bison:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -5953,7 +6360,7 @@
maybe-install-bison: install-bison
install-bison: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -5971,7 +6378,7 @@
info-bison: \
configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -5997,7 +6404,7 @@
dvi-bison: \
configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6023,7 +6430,7 @@
html-bison: \
configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6049,7 +6456,7 @@
TAGS-bison: \
configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6076,7 +6483,7 @@
install-info-bison: \
configure-bison \
info-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6095,6 +6502,33 @@
@endif bison
+.PHONY: maybe-install-html-bison install-html-bison
+maybe-install-html-bison:
+ at if bison
+maybe-install-html-bison: install-html-bison
+
+install-html-bison: \
+ configure-bison \
+ html-bison
+ @: $(MAKE); $(unstage)
+ @[ -f ./bison/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in bison" ; \
+ (cd $(HOST_SUBDIR)/bison && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif bison
+
.PHONY: maybe-installcheck-bison installcheck-bison
maybe-installcheck-bison:
@if bison
@@ -6102,7 +6536,7 @@
installcheck-bison: \
configure-bison
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6127,7 +6561,7 @@
maybe-mostlyclean-bison: mostlyclean-bison
mostlyclean-bison:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6152,7 +6586,7 @@
maybe-clean-bison: clean-bison
clean-bison:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6177,7 +6611,7 @@
maybe-distclean-bison: distclean-bison
distclean-bison:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6202,7 +6636,7 @@
maybe-maintainer-clean-bison: maintainer-clean-bison
maintainer-clean-bison:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bison/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6228,11 +6662,11 @@
@if byacc
maybe-configure-byacc: configure-byacc
configure-byacc:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/byacc/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/byacc/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/byacc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/byacc; \
cd "$(HOST_SUBDIR)/byacc" || exit 1; \
@@ -6258,7 +6692,7 @@
TARGET-byacc=all
maybe-all-byacc: all-byacc
all-byacc: configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6276,7 +6710,7 @@
# This module is only tested in a native toolchain.
check-byacc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6293,7 +6727,7 @@
maybe-install-byacc: install-byacc
install-byacc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6311,7 +6745,7 @@
info-byacc: \
configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6337,7 +6771,7 @@
dvi-byacc: \
configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6363,7 +6797,7 @@
html-byacc: \
configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6389,7 +6823,7 @@
TAGS-byacc: \
configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6416,7 +6850,7 @@
install-info-byacc: \
configure-byacc \
info-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6435,6 +6869,33 @@
@endif byacc
+.PHONY: maybe-install-html-byacc install-html-byacc
+maybe-install-html-byacc:
+ at if byacc
+maybe-install-html-byacc: install-html-byacc
+
+install-html-byacc: \
+ configure-byacc \
+ html-byacc
+ @: $(MAKE); $(unstage)
+ @[ -f ./byacc/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in byacc" ; \
+ (cd $(HOST_SUBDIR)/byacc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif byacc
+
.PHONY: maybe-installcheck-byacc installcheck-byacc
maybe-installcheck-byacc:
@if byacc
@@ -6442,7 +6903,7 @@
installcheck-byacc: \
configure-byacc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6467,7 +6928,7 @@
maybe-mostlyclean-byacc: mostlyclean-byacc
mostlyclean-byacc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6492,7 +6953,7 @@
maybe-clean-byacc: clean-byacc
clean-byacc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6517,7 +6978,7 @@
maybe-distclean-byacc: distclean-byacc
distclean-byacc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6542,7 +7003,7 @@
maybe-maintainer-clean-byacc: maintainer-clean-byacc
maintainer-clean-byacc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./byacc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6568,11 +7029,11 @@
@if bzip2
maybe-configure-bzip2: configure-bzip2
configure-bzip2:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/bzip2/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/bzip2/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bzip2 ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/bzip2; \
cd "$(HOST_SUBDIR)/bzip2" || exit 1; \
@@ -6598,7 +7059,7 @@
TARGET-bzip2=all
maybe-all-bzip2: all-bzip2
all-bzip2: configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6615,7 +7076,7 @@
maybe-check-bzip2: check-bzip2
check-bzip2:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6630,7 +7091,7 @@
maybe-install-bzip2: install-bzip2
install-bzip2: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6648,7 +7109,7 @@
info-bzip2: \
configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6674,7 +7135,7 @@
dvi-bzip2: \
configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6700,7 +7161,7 @@
html-bzip2: \
configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6726,7 +7187,7 @@
TAGS-bzip2: \
configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6753,7 +7214,7 @@
install-info-bzip2: \
configure-bzip2 \
info-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6772,6 +7233,33 @@
@endif bzip2
+.PHONY: maybe-install-html-bzip2 install-html-bzip2
+maybe-install-html-bzip2:
+ at if bzip2
+maybe-install-html-bzip2: install-html-bzip2
+
+install-html-bzip2: \
+ configure-bzip2 \
+ html-bzip2
+ @: $(MAKE); $(unstage)
+ @[ -f ./bzip2/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in bzip2" ; \
+ (cd $(HOST_SUBDIR)/bzip2 && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif bzip2
+
.PHONY: maybe-installcheck-bzip2 installcheck-bzip2
maybe-installcheck-bzip2:
@if bzip2
@@ -6779,7 +7267,7 @@
installcheck-bzip2: \
configure-bzip2
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6804,7 +7292,7 @@
maybe-mostlyclean-bzip2: mostlyclean-bzip2
mostlyclean-bzip2:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6829,7 +7317,7 @@
maybe-clean-bzip2: clean-bzip2
clean-bzip2:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6854,7 +7342,7 @@
maybe-distclean-bzip2: distclean-bzip2
distclean-bzip2:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6879,7 +7367,7 @@
maybe-maintainer-clean-bzip2: maintainer-clean-bzip2
maintainer-clean-bzip2:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./bzip2/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -6905,11 +7393,11 @@
@if dejagnu
maybe-configure-dejagnu: configure-dejagnu
configure-dejagnu:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/dejagnu/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/dejagnu/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/dejagnu ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/dejagnu; \
cd "$(HOST_SUBDIR)/dejagnu" || exit 1; \
@@ -6935,7 +7423,7 @@
TARGET-dejagnu=all
maybe-all-dejagnu: all-dejagnu
all-dejagnu: configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6952,7 +7440,7 @@
maybe-check-dejagnu: check-dejagnu
check-dejagnu:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6967,7 +7455,7 @@
maybe-install-dejagnu: install-dejagnu
install-dejagnu: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -6985,7 +7473,7 @@
info-dejagnu: \
configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7011,7 +7499,7 @@
dvi-dejagnu: \
configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7037,7 +7525,7 @@
html-dejagnu: \
configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7063,7 +7551,7 @@
TAGS-dejagnu: \
configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7090,7 +7578,7 @@
install-info-dejagnu: \
configure-dejagnu \
info-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7109,6 +7597,33 @@
@endif dejagnu
+.PHONY: maybe-install-html-dejagnu install-html-dejagnu
+maybe-install-html-dejagnu:
+ at if dejagnu
+maybe-install-html-dejagnu: install-html-dejagnu
+
+install-html-dejagnu: \
+ configure-dejagnu \
+ html-dejagnu
+ @: $(MAKE); $(unstage)
+ @[ -f ./dejagnu/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in dejagnu" ; \
+ (cd $(HOST_SUBDIR)/dejagnu && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif dejagnu
+
.PHONY: maybe-installcheck-dejagnu installcheck-dejagnu
maybe-installcheck-dejagnu:
@if dejagnu
@@ -7116,7 +7631,7 @@
installcheck-dejagnu: \
configure-dejagnu
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7141,7 +7656,7 @@
maybe-mostlyclean-dejagnu: mostlyclean-dejagnu
mostlyclean-dejagnu:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7166,7 +7681,7 @@
maybe-clean-dejagnu: clean-dejagnu
clean-dejagnu:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7191,7 +7706,7 @@
maybe-distclean-dejagnu: distclean-dejagnu
distclean-dejagnu:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7216,7 +7731,7 @@
maybe-maintainer-clean-dejagnu: maintainer-clean-dejagnu
maintainer-clean-dejagnu:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dejagnu/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7242,11 +7757,11 @@
@if diff
maybe-configure-diff: configure-diff
configure-diff:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/diff/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/diff/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/diff ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/diff; \
cd "$(HOST_SUBDIR)/diff" || exit 1; \
@@ -7272,7 +7787,7 @@
TARGET-diff=all
maybe-all-diff: all-diff
all-diff: configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7289,7 +7804,7 @@
maybe-check-diff: check-diff
check-diff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7304,7 +7819,7 @@
maybe-install-diff: install-diff
install-diff: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7322,7 +7837,7 @@
info-diff: \
configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7348,7 +7863,7 @@
dvi-diff: \
configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7374,7 +7889,7 @@
html-diff: \
configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7400,7 +7915,7 @@
TAGS-diff: \
configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7427,7 +7942,7 @@
install-info-diff: \
configure-diff \
info-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7446,6 +7961,33 @@
@endif diff
+.PHONY: maybe-install-html-diff install-html-diff
+maybe-install-html-diff:
+ at if diff
+maybe-install-html-diff: install-html-diff
+
+install-html-diff: \
+ configure-diff \
+ html-diff
+ @: $(MAKE); $(unstage)
+ @[ -f ./diff/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in diff" ; \
+ (cd $(HOST_SUBDIR)/diff && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif diff
+
.PHONY: maybe-installcheck-diff installcheck-diff
maybe-installcheck-diff:
@if diff
@@ -7453,7 +7995,7 @@
installcheck-diff: \
configure-diff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7478,7 +8020,7 @@
maybe-mostlyclean-diff: mostlyclean-diff
mostlyclean-diff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7503,7 +8045,7 @@
maybe-clean-diff: clean-diff
clean-diff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7528,7 +8070,7 @@
maybe-distclean-diff: distclean-diff
distclean-diff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7553,7 +8095,7 @@
maybe-maintainer-clean-diff: maintainer-clean-diff
maintainer-clean-diff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./diff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7579,11 +8121,11 @@
@if dosutils
maybe-configure-dosutils: configure-dosutils
configure-dosutils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/dosutils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/dosutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/dosutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/dosutils; \
cd "$(HOST_SUBDIR)/dosutils" || exit 1; \
@@ -7609,7 +8151,7 @@
TARGET-dosutils=all
maybe-all-dosutils: all-dosutils
all-dosutils: configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7635,7 +8177,7 @@
maybe-install-dosutils: install-dosutils
install-dosutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7653,7 +8195,7 @@
info-dosutils: \
configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7679,7 +8221,7 @@
dvi-dosutils: \
configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7705,7 +8247,7 @@
html-dosutils: \
configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7731,7 +8273,7 @@
TAGS-dosutils: \
configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7758,7 +8300,7 @@
install-info-dosutils: \
configure-dosutils \
info-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7777,6 +8319,33 @@
@endif dosutils
+.PHONY: maybe-install-html-dosutils install-html-dosutils
+maybe-install-html-dosutils:
+ at if dosutils
+maybe-install-html-dosutils: install-html-dosutils
+
+install-html-dosutils: \
+ configure-dosutils \
+ html-dosutils
+ @: $(MAKE); $(unstage)
+ @[ -f ./dosutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in dosutils" ; \
+ (cd $(HOST_SUBDIR)/dosutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif dosutils
+
.PHONY: maybe-installcheck-dosutils installcheck-dosutils
maybe-installcheck-dosutils:
@if dosutils
@@ -7784,7 +8353,7 @@
installcheck-dosutils: \
configure-dosutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7809,7 +8378,7 @@
maybe-mostlyclean-dosutils: mostlyclean-dosutils
mostlyclean-dosutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7834,7 +8403,7 @@
maybe-clean-dosutils: clean-dosutils
clean-dosutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7859,7 +8428,7 @@
maybe-distclean-dosutils: distclean-dosutils
distclean-dosutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7884,7 +8453,7 @@
maybe-maintainer-clean-dosutils: maintainer-clean-dosutils
maintainer-clean-dosutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./dosutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -7910,11 +8479,11 @@
@if etc
maybe-configure-etc: configure-etc
configure-etc:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/etc/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/etc/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/etc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/etc; \
cd "$(HOST_SUBDIR)/etc" || exit 1; \
@@ -7940,7 +8509,7 @@
TARGET-etc=all
maybe-all-etc: all-etc
all-etc: configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7957,7 +8526,7 @@
maybe-check-etc: check-etc
check-etc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7972,7 +8541,7 @@
maybe-install-etc: install-etc
install-etc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -7990,7 +8559,7 @@
info-etc: \
configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8016,7 +8585,7 @@
dvi-etc: \
configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8042,7 +8611,7 @@
html-etc: \
configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8068,7 +8637,7 @@
TAGS-etc: \
configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8095,7 +8664,7 @@
install-info-etc: \
configure-etc \
info-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8114,6 +8683,33 @@
@endif etc
+.PHONY: maybe-install-html-etc install-html-etc
+maybe-install-html-etc:
+ at if etc
+maybe-install-html-etc: install-html-etc
+
+install-html-etc: \
+ configure-etc \
+ html-etc
+ @: $(MAKE); $(unstage)
+ @[ -f ./etc/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in etc" ; \
+ (cd $(HOST_SUBDIR)/etc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif etc
+
.PHONY: maybe-installcheck-etc installcheck-etc
maybe-installcheck-etc:
@if etc
@@ -8121,7 +8717,7 @@
installcheck-etc: \
configure-etc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8146,7 +8742,7 @@
maybe-mostlyclean-etc: mostlyclean-etc
mostlyclean-etc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8171,7 +8767,7 @@
maybe-clean-etc: clean-etc
clean-etc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8196,7 +8792,7 @@
maybe-distclean-etc: distclean-etc
distclean-etc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8221,7 +8817,7 @@
maybe-maintainer-clean-etc: maintainer-clean-etc
maintainer-clean-etc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./etc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8247,11 +8843,11 @@
@if fastjar
maybe-configure-fastjar: configure-fastjar
configure-fastjar:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/fastjar/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/fastjar/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/fastjar ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/fastjar; \
cd "$(HOST_SUBDIR)/fastjar" || exit 1; \
@@ -8277,7 +8873,7 @@
TARGET-fastjar=all
maybe-all-fastjar: all-fastjar
all-fastjar: configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8295,7 +8891,7 @@
# This module is only tested in a native toolchain.
check-fastjar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8312,7 +8908,7 @@
maybe-install-fastjar: install-fastjar
install-fastjar: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8330,7 +8926,7 @@
info-fastjar: \
configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8356,7 +8952,7 @@
dvi-fastjar: \
configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8382,7 +8978,7 @@
html-fastjar: \
configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8408,7 +9004,7 @@
TAGS-fastjar: \
configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8435,7 +9031,7 @@
install-info-fastjar: \
configure-fastjar \
info-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8454,6 +9050,33 @@
@endif fastjar
+.PHONY: maybe-install-html-fastjar install-html-fastjar
+maybe-install-html-fastjar:
+ at if fastjar
+maybe-install-html-fastjar: install-html-fastjar
+
+install-html-fastjar: \
+ configure-fastjar \
+ html-fastjar
+ @: $(MAKE); $(unstage)
+ @[ -f ./fastjar/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in fastjar" ; \
+ (cd $(HOST_SUBDIR)/fastjar && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif fastjar
+
.PHONY: maybe-installcheck-fastjar installcheck-fastjar
maybe-installcheck-fastjar:
@if fastjar
@@ -8461,7 +9084,7 @@
installcheck-fastjar: \
configure-fastjar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8486,7 +9109,7 @@
maybe-mostlyclean-fastjar: mostlyclean-fastjar
mostlyclean-fastjar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8511,7 +9134,7 @@
maybe-clean-fastjar: clean-fastjar
clean-fastjar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8536,7 +9159,7 @@
maybe-distclean-fastjar: distclean-fastjar
distclean-fastjar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8561,7 +9184,7 @@
maybe-maintainer-clean-fastjar: maintainer-clean-fastjar
maintainer-clean-fastjar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fastjar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8587,11 +9210,11 @@
@if fileutils
maybe-configure-fileutils: configure-fileutils
configure-fileutils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/fileutils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/fileutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/fileutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/fileutils; \
cd "$(HOST_SUBDIR)/fileutils" || exit 1; \
@@ -8617,7 +9240,7 @@
TARGET-fileutils=all
maybe-all-fileutils: all-fileutils
all-fileutils: configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8634,7 +9257,7 @@
maybe-check-fileutils: check-fileutils
check-fileutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8649,7 +9272,7 @@
maybe-install-fileutils: install-fileutils
install-fileutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8667,7 +9290,7 @@
info-fileutils: \
configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8693,7 +9316,7 @@
dvi-fileutils: \
configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8719,7 +9342,7 @@
html-fileutils: \
configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8745,7 +9368,7 @@
TAGS-fileutils: \
configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8772,7 +9395,7 @@
install-info-fileutils: \
configure-fileutils \
info-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8791,6 +9414,33 @@
@endif fileutils
+.PHONY: maybe-install-html-fileutils install-html-fileutils
+maybe-install-html-fileutils:
+ at if fileutils
+maybe-install-html-fileutils: install-html-fileutils
+
+install-html-fileutils: \
+ configure-fileutils \
+ html-fileutils
+ @: $(MAKE); $(unstage)
+ @[ -f ./fileutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in fileutils" ; \
+ (cd $(HOST_SUBDIR)/fileutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif fileutils
+
.PHONY: maybe-installcheck-fileutils installcheck-fileutils
maybe-installcheck-fileutils:
@if fileutils
@@ -8798,7 +9448,7 @@
installcheck-fileutils: \
configure-fileutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8823,7 +9473,7 @@
maybe-mostlyclean-fileutils: mostlyclean-fileutils
mostlyclean-fileutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8848,7 +9498,7 @@
maybe-clean-fileutils: clean-fileutils
clean-fileutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8873,7 +9523,7 @@
maybe-distclean-fileutils: distclean-fileutils
distclean-fileutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8898,7 +9548,7 @@
maybe-maintainer-clean-fileutils: maintainer-clean-fileutils
maintainer-clean-fileutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fileutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -8924,11 +9574,11 @@
@if findutils
maybe-configure-findutils: configure-findutils
configure-findutils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/findutils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/findutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/findutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/findutils; \
cd "$(HOST_SUBDIR)/findutils" || exit 1; \
@@ -8954,7 +9604,7 @@
TARGET-findutils=all
maybe-all-findutils: all-findutils
all-findutils: configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8971,7 +9621,7 @@
maybe-check-findutils: check-findutils
check-findutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -8986,7 +9636,7 @@
maybe-install-findutils: install-findutils
install-findutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9004,7 +9654,7 @@
info-findutils: \
configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9030,7 +9680,7 @@
dvi-findutils: \
configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9056,7 +9706,7 @@
html-findutils: \
configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9082,7 +9732,7 @@
TAGS-findutils: \
configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9109,7 +9759,7 @@
install-info-findutils: \
configure-findutils \
info-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9128,6 +9778,33 @@
@endif findutils
+.PHONY: maybe-install-html-findutils install-html-findutils
+maybe-install-html-findutils:
+ at if findutils
+maybe-install-html-findutils: install-html-findutils
+
+install-html-findutils: \
+ configure-findutils \
+ html-findutils
+ @: $(MAKE); $(unstage)
+ @[ -f ./findutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in findutils" ; \
+ (cd $(HOST_SUBDIR)/findutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif findutils
+
.PHONY: maybe-installcheck-findutils installcheck-findutils
maybe-installcheck-findutils:
@if findutils
@@ -9135,7 +9812,7 @@
installcheck-findutils: \
configure-findutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9160,7 +9837,7 @@
maybe-mostlyclean-findutils: mostlyclean-findutils
mostlyclean-findutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9185,7 +9862,7 @@
maybe-clean-findutils: clean-findutils
clean-findutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9210,7 +9887,7 @@
maybe-distclean-findutils: distclean-findutils
distclean-findutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9235,7 +9912,7 @@
maybe-maintainer-clean-findutils: maintainer-clean-findutils
maintainer-clean-findutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./findutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9261,11 +9938,11 @@
@if find
maybe-configure-find: configure-find
configure-find:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/find/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/find/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/find ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/find; \
cd "$(HOST_SUBDIR)/find" || exit 1; \
@@ -9291,7 +9968,7 @@
TARGET-find=all
maybe-all-find: all-find
all-find: configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9308,7 +9985,7 @@
maybe-check-find: check-find
check-find:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9323,7 +10000,7 @@
maybe-install-find: install-find
install-find: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9341,7 +10018,7 @@
info-find: \
configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9367,7 +10044,7 @@
dvi-find: \
configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9393,7 +10070,7 @@
html-find: \
configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9419,7 +10096,7 @@
TAGS-find: \
configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9446,7 +10123,7 @@
install-info-find: \
configure-find \
info-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9465,6 +10142,33 @@
@endif find
+.PHONY: maybe-install-html-find install-html-find
+maybe-install-html-find:
+ at if find
+maybe-install-html-find: install-html-find
+
+install-html-find: \
+ configure-find \
+ html-find
+ @: $(MAKE); $(unstage)
+ @[ -f ./find/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in find" ; \
+ (cd $(HOST_SUBDIR)/find && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif find
+
.PHONY: maybe-installcheck-find installcheck-find
maybe-installcheck-find:
@if find
@@ -9472,7 +10176,7 @@
installcheck-find: \
configure-find
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9497,7 +10201,7 @@
maybe-mostlyclean-find: mostlyclean-find
mostlyclean-find:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9522,7 +10226,7 @@
maybe-clean-find: clean-find
clean-find:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9547,7 +10251,7 @@
maybe-distclean-find: distclean-find
distclean-find:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9572,7 +10276,7 @@
maybe-maintainer-clean-find: maintainer-clean-find
maintainer-clean-find:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./find/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9598,11 +10302,11 @@
@if fixincludes
maybe-configure-fixincludes: configure-fixincludes
configure-fixincludes:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/fixincludes/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/fixincludes/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/fixincludes ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/fixincludes; \
cd "$(HOST_SUBDIR)/fixincludes" || exit 1; \
@@ -9628,7 +10332,7 @@
TARGET-fixincludes=all
maybe-all-fixincludes: all-fixincludes
all-fixincludes: configure-fixincludes
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9645,7 +10349,7 @@
maybe-check-fixincludes: check-fixincludes
check-fixincludes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9660,7 +10364,7 @@
maybe-install-fixincludes: install-fixincludes
install-fixincludes: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9698,7 +10402,7 @@
html-fixincludes: \
configure-fixincludes
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fixincludes/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9737,6 +10441,33 @@
@endif fixincludes
+.PHONY: maybe-install-html-fixincludes install-html-fixincludes
+maybe-install-html-fixincludes:
+ at if fixincludes
+maybe-install-html-fixincludes: install-html-fixincludes
+
+install-html-fixincludes: \
+ configure-fixincludes \
+ html-fixincludes
+ @: $(MAKE); $(unstage)
+ @[ -f ./fixincludes/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in fixincludes" ; \
+ (cd $(HOST_SUBDIR)/fixincludes && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif fixincludes
+
.PHONY: maybe-installcheck-fixincludes installcheck-fixincludes
maybe-installcheck-fixincludes:
@if fixincludes
@@ -9753,7 +10484,7 @@
maybe-mostlyclean-fixincludes: mostlyclean-fixincludes
mostlyclean-fixincludes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fixincludes/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9778,7 +10509,7 @@
maybe-clean-fixincludes: clean-fixincludes
clean-fixincludes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fixincludes/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9803,7 +10534,7 @@
maybe-distclean-fixincludes: distclean-fixincludes
distclean-fixincludes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fixincludes/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9828,7 +10559,7 @@
maybe-maintainer-clean-fixincludes: maintainer-clean-fixincludes
maintainer-clean-fixincludes:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./fixincludes/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9854,11 +10585,11 @@
@if flex
maybe-configure-flex: configure-flex
configure-flex:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/flex/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/flex/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/flex ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/flex; \
cd "$(HOST_SUBDIR)/flex" || exit 1; \
@@ -9884,7 +10615,7 @@
TARGET-flex=all
maybe-all-flex: all-flex
all-flex: configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9902,7 +10633,7 @@
# This module is only tested in a native toolchain.
check-flex:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9919,7 +10650,7 @@
maybe-install-flex: install-flex
install-flex: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -9937,7 +10668,7 @@
info-flex: \
configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9963,7 +10694,7 @@
dvi-flex: \
configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -9989,7 +10720,7 @@
html-flex: \
configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10015,7 +10746,7 @@
TAGS-flex: \
configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10042,7 +10773,7 @@
install-info-flex: \
configure-flex \
info-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10061,6 +10792,33 @@
@endif flex
+.PHONY: maybe-install-html-flex install-html-flex
+maybe-install-html-flex:
+ at if flex
+maybe-install-html-flex: install-html-flex
+
+install-html-flex: \
+ configure-flex \
+ html-flex
+ @: $(MAKE); $(unstage)
+ @[ -f ./flex/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in flex" ; \
+ (cd $(HOST_SUBDIR)/flex && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif flex
+
.PHONY: maybe-installcheck-flex installcheck-flex
maybe-installcheck-flex:
@if flex
@@ -10068,7 +10826,7 @@
installcheck-flex: \
configure-flex
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10093,7 +10851,7 @@
maybe-mostlyclean-flex: mostlyclean-flex
mostlyclean-flex:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10118,7 +10876,7 @@
maybe-clean-flex: clean-flex
clean-flex:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10143,7 +10901,7 @@
maybe-distclean-flex: distclean-flex
distclean-flex:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10168,7 +10926,7 @@
maybe-maintainer-clean-flex: maintainer-clean-flex
maintainer-clean-flex:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./flex/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -10194,11 +10952,15 @@
@if gas
maybe-configure-gas: configure-gas
configure-gas:
- @test -f stage_last && exit 0; \
+ at endif gas
+ at if gas-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif gas-bootstrap
+ at if gas
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gas; \
cd "$(HOST_SUBDIR)/gas" || exit 1; \
@@ -10220,13 +10982,15 @@
maybe-configure-stage1-gas:
@if gas-bootstrap
maybe-configure-stage1-gas: configure-stage1-gas
-configure-stage1-gas:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-gas:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10244,14 +11008,16 @@
maybe-configure-stage2-gas:
@if gas-bootstrap
maybe-configure-stage2-gas: configure-stage2-gas
-configure-stage2-gas:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-gas:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10269,14 +11035,16 @@
maybe-configure-stage3-gas:
@if gas-bootstrap
maybe-configure-stage3-gas: configure-stage3-gas
-configure-stage3-gas:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-gas:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10294,14 +11062,16 @@
maybe-configure-stage4-gas:
@if gas-bootstrap
maybe-configure-stage4-gas: configure-stage4-gas
-configure-stage4-gas:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-gas:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10319,14 +11089,16 @@
maybe-configure-stageprofile-gas:
@if gas-bootstrap
maybe-configure-stageprofile-gas: configure-stageprofile-gas
-configure-stageprofile-gas:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-gas:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10344,14 +11116,16 @@
maybe-configure-stagefeedback-gas:
@if gas-bootstrap
maybe-configure-stagefeedback-gas: configure-stagefeedback-gas
-configure-stagefeedback-gas:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/gas/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-gas:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/gas ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \
cd $(HOST_SUBDIR)/gas || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10375,8 +11149,12 @@
TARGET-gas=all
maybe-all-gas: all-gas
all-gas: configure-gas
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif gas
+ at if gas-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif gas-bootstrap
+ at if gas
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/gas && \
@@ -10394,12 +11172,12 @@
all-stage1: all-stage1-gas
TARGET-stage1-gas = $(TARGET-gas)
all-stage1-gas: configure-stage1-gas
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/gas && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-gas)
maybe-clean-stage1-gas: clean-stage1-gas
@@ -10407,10 +11185,10 @@
clean-stage1-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif gas-bootstrap
@@ -10423,7 +11201,7 @@
all-stage2: all-stage2-gas
TARGET-stage2-gas = $(TARGET-gas)
all-stage2-gas: configure-stage2-gas
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10437,7 +11215,7 @@
clean-stage2-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -10454,7 +11232,7 @@
all-stage3: all-stage3-gas
TARGET-stage3-gas = $(TARGET-gas)
all-stage3-gas: configure-stage3-gas
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10468,7 +11246,7 @@
clean-stage3-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -10485,7 +11263,7 @@
all-stage4: all-stage4-gas
TARGET-stage4-gas = $(TARGET-gas)
all-stage4-gas: configure-stage4-gas
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10499,7 +11277,7 @@
clean-stage4-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -10516,7 +11294,7 @@
all-stageprofile: all-stageprofile-gas
TARGET-stageprofile-gas = $(TARGET-gas)
all-stageprofile-gas: configure-stageprofile-gas
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10530,7 +11308,7 @@
clean-stageprofile-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -10547,7 +11325,7 @@
all-stagefeedback: all-stagefeedback-gas
TARGET-stagefeedback-gas = $(TARGET-gas)
all-stagefeedback-gas: configure-stagefeedback-gas
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10561,7 +11339,7 @@
clean-stagefeedback-gas:
@[ -f $(HOST_SUBDIR)/gas/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-gas/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/gas && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -10578,7 +11356,7 @@
maybe-check-gas: check-gas
check-gas:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10593,7 +11371,7 @@
maybe-install-gas: install-gas
install-gas: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -10730,6 +11508,32 @@
@endif gas
+.PHONY: maybe-install-html-gas install-html-gas
+maybe-install-html-gas:
+ at if gas
+maybe-install-html-gas: install-html-gas
+
+install-html-gas: \
+ configure-gas \
+ html-gas
+ @[ -f ./gas/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gas" ; \
+ (cd $(HOST_SUBDIR)/gas && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gas
+
.PHONY: maybe-installcheck-gas installcheck-gas
maybe-installcheck-gas:
@if gas
@@ -10858,11 +11662,15 @@
@if gcc
maybe-configure-gcc: configure-gcc
configure-gcc:
- @test -f stage_last && exit 0; \
+ at endif gcc
+ at if gcc-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif gcc-bootstrap
+ at if gcc
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gcc; \
cd "$(HOST_SUBDIR)/gcc" || exit 1; \
@@ -10884,13 +11692,15 @@
maybe-configure-stage1-gcc:
@if gcc-bootstrap
maybe-configure-stage1-gcc: configure-stage1-gcc
-configure-stage1-gcc:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-gcc:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10908,14 +11718,16 @@
maybe-configure-stage2-gcc:
@if gcc-bootstrap
maybe-configure-stage2-gcc: configure-stage2-gcc
-configure-stage2-gcc:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-gcc:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10933,14 +11745,16 @@
maybe-configure-stage3-gcc:
@if gcc-bootstrap
maybe-configure-stage3-gcc: configure-stage3-gcc
-configure-stage3-gcc:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-gcc:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10958,14 +11772,16 @@
maybe-configure-stage4-gcc:
@if gcc-bootstrap
maybe-configure-stage4-gcc: configure-stage4-gcc
-configure-stage4-gcc:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-gcc:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -10983,14 +11799,16 @@
maybe-configure-stageprofile-gcc:
@if gcc-bootstrap
maybe-configure-stageprofile-gcc: configure-stageprofile-gcc
-configure-stageprofile-gcc:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-gcc:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -11008,14 +11826,16 @@
maybe-configure-stagefeedback-gcc:
@if gcc-bootstrap
maybe-configure-stagefeedback-gcc: configure-stagefeedback-gcc
-configure-stagefeedback-gcc:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/gcc/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-gcc:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/gcc ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \
cd $(HOST_SUBDIR)/gcc || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -11039,8 +11859,12 @@
TARGET-gcc=`if [ -f stage_last ]; then echo quickstrap ; else echo all; fi`
maybe-all-gcc: all-gcc
all-gcc: configure-gcc
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif gcc
+ at if gcc-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif gcc-bootstrap
+ at if gcc
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/gcc && \
@@ -11058,12 +11882,12 @@
all-stage1: all-stage1-gcc
TARGET-stage1-gcc = $(TARGET-gcc)
all-stage1-gcc: configure-stage1-gcc
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/gcc && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" $(EXTRA_GCC_FLAGS) \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" $(EXTRA_GCC_FLAGS) \
$(TARGET-stage1-gcc)
maybe-clean-stage1-gcc: clean-stage1-gcc
@@ -11071,10 +11895,10 @@
clean-stage1-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" $(EXTRA_GCC_FLAGS) clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" $(EXTRA_GCC_FLAGS) clean
@endif gcc-bootstrap
@@ -11087,7 +11911,7 @@
all-stage2: all-stage2-gcc
TARGET-stage2-gcc = $(TARGET-gcc)
all-stage2-gcc: configure-stage2-gcc
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11101,7 +11925,7 @@
clean-stage2-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -11118,7 +11942,7 @@
all-stage3: all-stage3-gcc
TARGET-stage3-gcc = $(TARGET-gcc)
all-stage3-gcc: configure-stage3-gcc
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11132,7 +11956,7 @@
clean-stage3-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -11149,7 +11973,7 @@
all-stage4: all-stage4-gcc
TARGET-stage4-gcc = $(TARGET-gcc)
all-stage4-gcc: configure-stage4-gcc
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11163,7 +11987,7 @@
clean-stage4-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -11180,7 +12004,7 @@
all-stageprofile: all-stageprofile-gcc
TARGET-stageprofile-gcc = $(TARGET-gcc)
all-stageprofile-gcc: configure-stageprofile-gcc
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11194,7 +12018,7 @@
clean-stageprofile-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -11211,7 +12035,7 @@
all-stagefeedback: all-stagefeedback-gcc
TARGET-stagefeedback-gcc = $(TARGET-gcc)
all-stagefeedback-gcc: configure-stagefeedback-gcc
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11225,7 +12049,7 @@
clean-stagefeedback-gcc:
@[ -f $(HOST_SUBDIR)/gcc/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-gcc/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/gcc && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -11242,7 +12066,7 @@
maybe-check-gcc: check-gcc
check-gcc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11257,7 +12081,7 @@
maybe-install-gcc: install-gcc
install-gcc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11394,6 +12218,32 @@
@endif gcc
+.PHONY: maybe-install-html-gcc install-html-gcc
+maybe-install-html-gcc:
+ at if gcc
+maybe-install-html-gcc: install-html-gcc
+
+install-html-gcc: \
+ configure-gcc \
+ html-gcc
+ @[ -f ./gcc/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gcc" ; \
+ (cd $(HOST_SUBDIR)/gcc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gcc
+
.PHONY: maybe-installcheck-gcc installcheck-gcc
maybe-installcheck-gcc:
@if gcc
@@ -11522,11 +12372,11 @@
@if gawk
maybe-configure-gawk: configure-gawk
configure-gawk:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gawk/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gawk/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gawk ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gawk; \
cd "$(HOST_SUBDIR)/gawk" || exit 1; \
@@ -11552,7 +12402,7 @@
TARGET-gawk=all
maybe-all-gawk: all-gawk
all-gawk: configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11569,7 +12419,7 @@
maybe-check-gawk: check-gawk
check-gawk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11584,7 +12434,7 @@
maybe-install-gawk: install-gawk
install-gawk: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11602,7 +12452,7 @@
info-gawk: \
configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11628,7 +12478,7 @@
dvi-gawk: \
configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11654,7 +12504,7 @@
html-gawk: \
configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11680,7 +12530,7 @@
TAGS-gawk: \
configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11707,7 +12557,7 @@
install-info-gawk: \
configure-gawk \
info-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11726,6 +12576,33 @@
@endif gawk
+.PHONY: maybe-install-html-gawk install-html-gawk
+maybe-install-html-gawk:
+ at if gawk
+maybe-install-html-gawk: install-html-gawk
+
+install-html-gawk: \
+ configure-gawk \
+ html-gawk
+ @: $(MAKE); $(unstage)
+ @[ -f ./gawk/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gawk" ; \
+ (cd $(HOST_SUBDIR)/gawk && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gawk
+
.PHONY: maybe-installcheck-gawk installcheck-gawk
maybe-installcheck-gawk:
@if gawk
@@ -11733,7 +12610,7 @@
installcheck-gawk: \
configure-gawk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11758,7 +12635,7 @@
maybe-mostlyclean-gawk: mostlyclean-gawk
mostlyclean-gawk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11783,7 +12660,7 @@
maybe-clean-gawk: clean-gawk
clean-gawk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11808,7 +12685,7 @@
maybe-distclean-gawk: distclean-gawk
distclean-gawk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11833,7 +12710,7 @@
maybe-maintainer-clean-gawk: maintainer-clean-gawk
maintainer-clean-gawk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gawk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11859,11 +12736,11 @@
@if gettext
maybe-configure-gettext: configure-gettext
configure-gettext:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gettext/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gettext/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gettext ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gettext; \
cd "$(HOST_SUBDIR)/gettext" || exit 1; \
@@ -11889,7 +12766,7 @@
TARGET-gettext=all
maybe-all-gettext: all-gettext
all-gettext: configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11906,7 +12783,7 @@
maybe-check-gettext: check-gettext
check-gettext:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11921,7 +12798,7 @@
maybe-install-gettext: install-gettext
install-gettext: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -11939,7 +12816,7 @@
info-gettext: \
configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11965,7 +12842,7 @@
dvi-gettext: \
configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -11991,7 +12868,7 @@
html-gettext: \
configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12017,7 +12894,7 @@
TAGS-gettext: \
configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12044,7 +12921,7 @@
install-info-gettext: \
configure-gettext \
info-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12063,6 +12940,33 @@
@endif gettext
+.PHONY: maybe-install-html-gettext install-html-gettext
+maybe-install-html-gettext:
+ at if gettext
+maybe-install-html-gettext: install-html-gettext
+
+install-html-gettext: \
+ configure-gettext \
+ html-gettext
+ @: $(MAKE); $(unstage)
+ @[ -f ./gettext/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gettext" ; \
+ (cd $(HOST_SUBDIR)/gettext && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gettext
+
.PHONY: maybe-installcheck-gettext installcheck-gettext
maybe-installcheck-gettext:
@if gettext
@@ -12070,7 +12974,7 @@
installcheck-gettext: \
configure-gettext
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12095,7 +12999,7 @@
maybe-mostlyclean-gettext: mostlyclean-gettext
mostlyclean-gettext:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12120,7 +13024,7 @@
maybe-clean-gettext: clean-gettext
clean-gettext:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12145,7 +13049,7 @@
maybe-distclean-gettext: distclean-gettext
distclean-gettext:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12170,7 +13074,7 @@
maybe-maintainer-clean-gettext: maintainer-clean-gettext
maintainer-clean-gettext:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gettext/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12196,11 +13100,11 @@
@if gnuserv
maybe-configure-gnuserv: configure-gnuserv
configure-gnuserv:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gnuserv/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gnuserv/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gnuserv ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gnuserv; \
cd "$(HOST_SUBDIR)/gnuserv" || exit 1; \
@@ -12226,7 +13130,7 @@
TARGET-gnuserv=all
maybe-all-gnuserv: all-gnuserv
all-gnuserv: configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12243,7 +13147,7 @@
maybe-check-gnuserv: check-gnuserv
check-gnuserv:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12258,7 +13162,7 @@
maybe-install-gnuserv: install-gnuserv
install-gnuserv: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12276,7 +13180,7 @@
info-gnuserv: \
configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12302,7 +13206,7 @@
dvi-gnuserv: \
configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12328,7 +13232,7 @@
html-gnuserv: \
configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12354,7 +13258,7 @@
TAGS-gnuserv: \
configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12381,7 +13285,7 @@
install-info-gnuserv: \
configure-gnuserv \
info-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12400,6 +13304,33 @@
@endif gnuserv
+.PHONY: maybe-install-html-gnuserv install-html-gnuserv
+maybe-install-html-gnuserv:
+ at if gnuserv
+maybe-install-html-gnuserv: install-html-gnuserv
+
+install-html-gnuserv: \
+ configure-gnuserv \
+ html-gnuserv
+ @: $(MAKE); $(unstage)
+ @[ -f ./gnuserv/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gnuserv" ; \
+ (cd $(HOST_SUBDIR)/gnuserv && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gnuserv
+
.PHONY: maybe-installcheck-gnuserv installcheck-gnuserv
maybe-installcheck-gnuserv:
@if gnuserv
@@ -12407,7 +13338,7 @@
installcheck-gnuserv: \
configure-gnuserv
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12432,7 +13363,7 @@
maybe-mostlyclean-gnuserv: mostlyclean-gnuserv
mostlyclean-gnuserv:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12457,7 +13388,7 @@
maybe-clean-gnuserv: clean-gnuserv
clean-gnuserv:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12482,7 +13413,7 @@
maybe-distclean-gnuserv: distclean-gnuserv
distclean-gnuserv:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12507,7 +13438,7 @@
maybe-maintainer-clean-gnuserv: maintainer-clean-gnuserv
maintainer-clean-gnuserv:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnuserv/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12533,11 +13464,11 @@
@if gprof
maybe-configure-gprof: configure-gprof
configure-gprof:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gprof/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gprof/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gprof ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gprof; \
cd "$(HOST_SUBDIR)/gprof" || exit 1; \
@@ -12563,7 +13494,7 @@
TARGET-gprof=all
maybe-all-gprof: all-gprof
all-gprof: configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12580,7 +13511,7 @@
maybe-check-gprof: check-gprof
check-gprof:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12595,7 +13526,7 @@
maybe-install-gprof: install-gprof
install-gprof: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12613,7 +13544,7 @@
info-gprof: \
configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12639,7 +13570,7 @@
dvi-gprof: \
configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12665,7 +13596,7 @@
html-gprof: \
configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12691,7 +13622,7 @@
TAGS-gprof: \
configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12718,7 +13649,7 @@
install-info-gprof: \
configure-gprof \
info-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12737,6 +13668,33 @@
@endif gprof
+.PHONY: maybe-install-html-gprof install-html-gprof
+maybe-install-html-gprof:
+ at if gprof
+maybe-install-html-gprof: install-html-gprof
+
+install-html-gprof: \
+ configure-gprof \
+ html-gprof
+ @: $(MAKE); $(unstage)
+ @[ -f ./gprof/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gprof" ; \
+ (cd $(HOST_SUBDIR)/gprof && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gprof
+
.PHONY: maybe-installcheck-gprof installcheck-gprof
maybe-installcheck-gprof:
@if gprof
@@ -12744,7 +13702,7 @@
installcheck-gprof: \
configure-gprof
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12769,7 +13727,7 @@
maybe-mostlyclean-gprof: mostlyclean-gprof
mostlyclean-gprof:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12794,7 +13752,7 @@
maybe-clean-gprof: clean-gprof
clean-gprof:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12819,7 +13777,7 @@
maybe-distclean-gprof: distclean-gprof
distclean-gprof:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12844,7 +13802,7 @@
maybe-maintainer-clean-gprof: maintainer-clean-gprof
maintainer-clean-gprof:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gprof/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12870,11 +13828,11 @@
@if gzip
maybe-configure-gzip: configure-gzip
configure-gzip:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gzip/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gzip/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gzip ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gzip; \
cd "$(HOST_SUBDIR)/gzip" || exit 1; \
@@ -12900,7 +13858,7 @@
TARGET-gzip=all
maybe-all-gzip: all-gzip
all-gzip: configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12917,7 +13875,7 @@
maybe-check-gzip: check-gzip
check-gzip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12932,7 +13890,7 @@
maybe-install-gzip: install-gzip
install-gzip: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -12950,7 +13908,7 @@
info-gzip: \
configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -12976,7 +13934,7 @@
dvi-gzip: \
configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13002,7 +13960,7 @@
html-gzip: \
configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13028,7 +13986,7 @@
TAGS-gzip: \
configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13055,7 +14013,7 @@
install-info-gzip: \
configure-gzip \
info-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13074,6 +14032,33 @@
@endif gzip
+.PHONY: maybe-install-html-gzip install-html-gzip
+maybe-install-html-gzip:
+ at if gzip
+maybe-install-html-gzip: install-html-gzip
+
+install-html-gzip: \
+ configure-gzip \
+ html-gzip
+ @: $(MAKE); $(unstage)
+ @[ -f ./gzip/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gzip" ; \
+ (cd $(HOST_SUBDIR)/gzip && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gzip
+
.PHONY: maybe-installcheck-gzip installcheck-gzip
maybe-installcheck-gzip:
@if gzip
@@ -13081,7 +14066,7 @@
installcheck-gzip: \
configure-gzip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13106,7 +14091,7 @@
maybe-mostlyclean-gzip: mostlyclean-gzip
mostlyclean-gzip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13131,7 +14116,7 @@
maybe-clean-gzip: clean-gzip
clean-gzip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13156,7 +14141,7 @@
maybe-distclean-gzip: distclean-gzip
distclean-gzip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13181,7 +14166,7 @@
maybe-maintainer-clean-gzip: maintainer-clean-gzip
maintainer-clean-gzip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gzip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13207,11 +14192,11 @@
@if hello
maybe-configure-hello: configure-hello
configure-hello:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/hello/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/hello/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/hello ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/hello; \
cd "$(HOST_SUBDIR)/hello" || exit 1; \
@@ -13237,7 +14222,7 @@
TARGET-hello=all
maybe-all-hello: all-hello
all-hello: configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13254,7 +14239,7 @@
maybe-check-hello: check-hello
check-hello:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13269,7 +14254,7 @@
maybe-install-hello: install-hello
install-hello: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13287,7 +14272,7 @@
info-hello: \
configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13313,7 +14298,7 @@
dvi-hello: \
configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13339,7 +14324,7 @@
html-hello: \
configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13365,7 +14350,7 @@
TAGS-hello: \
configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13392,7 +14377,7 @@
install-info-hello: \
configure-hello \
info-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13411,6 +14396,33 @@
@endif hello
+.PHONY: maybe-install-html-hello install-html-hello
+maybe-install-html-hello:
+ at if hello
+maybe-install-html-hello: install-html-hello
+
+install-html-hello: \
+ configure-hello \
+ html-hello
+ @: $(MAKE); $(unstage)
+ @[ -f ./hello/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in hello" ; \
+ (cd $(HOST_SUBDIR)/hello && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif hello
+
.PHONY: maybe-installcheck-hello installcheck-hello
maybe-installcheck-hello:
@if hello
@@ -13418,7 +14430,7 @@
installcheck-hello: \
configure-hello
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13443,7 +14455,7 @@
maybe-mostlyclean-hello: mostlyclean-hello
mostlyclean-hello:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13468,7 +14480,7 @@
maybe-clean-hello: clean-hello
clean-hello:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13493,7 +14505,7 @@
maybe-distclean-hello: distclean-hello
distclean-hello:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13518,7 +14530,7 @@
maybe-maintainer-clean-hello: maintainer-clean-hello
maintainer-clean-hello:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./hello/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13544,11 +14556,11 @@
@if indent
maybe-configure-indent: configure-indent
configure-indent:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/indent/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/indent/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/indent ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/indent; \
cd "$(HOST_SUBDIR)/indent" || exit 1; \
@@ -13574,7 +14586,7 @@
TARGET-indent=all
maybe-all-indent: all-indent
all-indent: configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13591,7 +14603,7 @@
maybe-check-indent: check-indent
check-indent:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13606,7 +14618,7 @@
maybe-install-indent: install-indent
install-indent: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -13624,7 +14636,7 @@
info-indent: \
configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13650,7 +14662,7 @@
dvi-indent: \
configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13676,7 +14688,7 @@
html-indent: \
configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13702,7 +14714,7 @@
TAGS-indent: \
configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13729,7 +14741,7 @@
install-info-indent: \
configure-indent \
info-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13748,6 +14760,33 @@
@endif indent
+.PHONY: maybe-install-html-indent install-html-indent
+maybe-install-html-indent:
+ at if indent
+maybe-install-html-indent: install-html-indent
+
+install-html-indent: \
+ configure-indent \
+ html-indent
+ @: $(MAKE); $(unstage)
+ @[ -f ./indent/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in indent" ; \
+ (cd $(HOST_SUBDIR)/indent && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif indent
+
.PHONY: maybe-installcheck-indent installcheck-indent
maybe-installcheck-indent:
@if indent
@@ -13755,7 +14794,7 @@
installcheck-indent: \
configure-indent
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13780,7 +14819,7 @@
maybe-mostlyclean-indent: mostlyclean-indent
mostlyclean-indent:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13805,7 +14844,7 @@
maybe-clean-indent: clean-indent
clean-indent:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13830,7 +14869,7 @@
maybe-distclean-indent: distclean-indent
distclean-indent:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13855,7 +14894,7 @@
maybe-maintainer-clean-indent: maintainer-clean-indent
maintainer-clean-indent:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./indent/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -13881,11 +14920,15 @@
@if intl
maybe-configure-intl: configure-intl
configure-intl:
- @test -f stage_last && exit 0; \
+ at endif intl
+ at if intl-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif intl-bootstrap
+ at if intl
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/intl; \
cd "$(HOST_SUBDIR)/intl" || exit 1; \
@@ -13907,13 +14950,15 @@
maybe-configure-stage1-intl:
@if intl-bootstrap
maybe-configure-stage1-intl: configure-stage1-intl
-configure-stage1-intl:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-intl:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -13931,14 +14976,16 @@
maybe-configure-stage2-intl:
@if intl-bootstrap
maybe-configure-stage2-intl: configure-stage2-intl
-configure-stage2-intl:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-intl:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -13956,14 +15003,16 @@
maybe-configure-stage3-intl:
@if intl-bootstrap
maybe-configure-stage3-intl: configure-stage3-intl
-configure-stage3-intl:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-intl:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -13981,14 +15030,16 @@
maybe-configure-stage4-intl:
@if intl-bootstrap
maybe-configure-stage4-intl: configure-stage4-intl
-configure-stage4-intl:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-intl:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -14006,14 +15057,16 @@
maybe-configure-stageprofile-intl:
@if intl-bootstrap
maybe-configure-stageprofile-intl: configure-stageprofile-intl
-configure-stageprofile-intl:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-intl:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -14031,14 +15084,16 @@
maybe-configure-stagefeedback-intl:
@if intl-bootstrap
maybe-configure-stagefeedback-intl: configure-stagefeedback-intl
-configure-stagefeedback-intl:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/intl/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-intl:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/intl ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \
cd $(HOST_SUBDIR)/intl || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -14062,8 +15117,12 @@
TARGET-intl=all
maybe-all-intl: all-intl
all-intl: configure-intl
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif intl
+ at if intl-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif intl-bootstrap
+ at if intl
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/intl && \
@@ -14081,12 +15140,12 @@
all-stage1: all-stage1-intl
TARGET-stage1-intl = $(TARGET-intl)
all-stage1-intl: configure-stage1-intl
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/intl && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-intl)
maybe-clean-stage1-intl: clean-stage1-intl
@@ -14094,10 +15153,10 @@
clean-stage1-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif intl-bootstrap
@@ -14110,7 +15169,7 @@
all-stage2: all-stage2-intl
TARGET-stage2-intl = $(TARGET-intl)
all-stage2-intl: configure-stage2-intl
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14124,7 +15183,7 @@
clean-stage2-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -14141,7 +15200,7 @@
all-stage3: all-stage3-intl
TARGET-stage3-intl = $(TARGET-intl)
all-stage3-intl: configure-stage3-intl
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14155,7 +15214,7 @@
clean-stage3-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -14172,7 +15231,7 @@
all-stage4: all-stage4-intl
TARGET-stage4-intl = $(TARGET-intl)
all-stage4-intl: configure-stage4-intl
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14186,7 +15245,7 @@
clean-stage4-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -14203,7 +15262,7 @@
all-stageprofile: all-stageprofile-intl
TARGET-stageprofile-intl = $(TARGET-intl)
all-stageprofile-intl: configure-stageprofile-intl
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14217,7 +15276,7 @@
clean-stageprofile-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -14234,7 +15293,7 @@
all-stagefeedback: all-stagefeedback-intl
TARGET-stagefeedback-intl = $(TARGET-intl)
all-stagefeedback-intl: configure-stagefeedback-intl
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14248,7 +15307,7 @@
clean-stagefeedback-intl:
@[ -f $(HOST_SUBDIR)/intl/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-intl/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/intl && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -14265,7 +15324,7 @@
maybe-check-intl: check-intl
check-intl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14280,7 +15339,7 @@
maybe-install-intl: install-intl
install-intl: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14417,6 +15476,32 @@
@endif intl
+.PHONY: maybe-install-html-intl install-html-intl
+maybe-install-html-intl:
+ at if intl
+maybe-install-html-intl: install-html-intl
+
+install-html-intl: \
+ configure-intl \
+ html-intl
+ @[ -f ./intl/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in intl" ; \
+ (cd $(HOST_SUBDIR)/intl && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif intl
+
.PHONY: maybe-installcheck-intl installcheck-intl
maybe-installcheck-intl:
@if intl
@@ -14545,11 +15630,11 @@
@if tcl
maybe-configure-tcl: configure-tcl
configure-tcl:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/tcl/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/tcl/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/tcl ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/tcl; \
cd "$(HOST_SUBDIR)/tcl" || exit 1; \
@@ -14575,7 +15660,7 @@
TARGET-tcl=all
maybe-all-tcl: all-tcl
all-tcl: configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14592,7 +15677,7 @@
maybe-check-tcl: check-tcl
check-tcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14607,7 +15692,7 @@
maybe-install-tcl: install-tcl
install-tcl: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14625,7 +15710,7 @@
info-tcl: \
configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14651,7 +15736,7 @@
dvi-tcl: \
configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14677,7 +15762,7 @@
html-tcl: \
configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14703,7 +15788,7 @@
TAGS-tcl: \
configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14730,7 +15815,7 @@
install-info-tcl: \
configure-tcl \
info-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14749,6 +15834,33 @@
@endif tcl
+.PHONY: maybe-install-html-tcl install-html-tcl
+maybe-install-html-tcl:
+ at if tcl
+maybe-install-html-tcl: install-html-tcl
+
+install-html-tcl: \
+ configure-tcl \
+ html-tcl
+ @: $(MAKE); $(unstage)
+ @[ -f ./tcl/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in tcl" ; \
+ (cd $(HOST_SUBDIR)/tcl && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif tcl
+
.PHONY: maybe-installcheck-tcl installcheck-tcl
maybe-installcheck-tcl:
@if tcl
@@ -14756,7 +15868,7 @@
installcheck-tcl: \
configure-tcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14791,7 +15903,7 @@
maybe-clean-tcl: clean-tcl
clean-tcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14816,7 +15928,7 @@
maybe-distclean-tcl: distclean-tcl
distclean-tcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14841,7 +15953,7 @@
maybe-maintainer-clean-tcl: maintainer-clean-tcl
maintainer-clean-tcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14867,11 +15979,11 @@
@if itcl
maybe-configure-itcl: configure-itcl
configure-itcl:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/itcl/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/itcl/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/itcl ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/itcl; \
cd "$(HOST_SUBDIR)/itcl" || exit 1; \
@@ -14897,7 +16009,7 @@
TARGET-itcl=all
maybe-all-itcl: all-itcl
all-itcl: configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14914,7 +16026,7 @@
maybe-check-itcl: check-itcl
check-itcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14929,7 +16041,7 @@
maybe-install-itcl: install-itcl
install-itcl: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -14947,7 +16059,7 @@
info-itcl: \
configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14973,7 +16085,7 @@
dvi-itcl: \
configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -14999,7 +16111,7 @@
html-itcl: \
configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15025,7 +16137,7 @@
TAGS-itcl: \
configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15052,7 +16164,7 @@
install-info-itcl: \
configure-itcl \
info-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15071,6 +16183,33 @@
@endif itcl
+.PHONY: maybe-install-html-itcl install-html-itcl
+maybe-install-html-itcl:
+ at if itcl
+maybe-install-html-itcl: install-html-itcl
+
+install-html-itcl: \
+ configure-itcl \
+ html-itcl
+ @: $(MAKE); $(unstage)
+ @[ -f ./itcl/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in itcl" ; \
+ (cd $(HOST_SUBDIR)/itcl && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif itcl
+
.PHONY: maybe-installcheck-itcl installcheck-itcl
maybe-installcheck-itcl:
@if itcl
@@ -15078,7 +16217,7 @@
installcheck-itcl: \
configure-itcl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15103,7 +16242,7 @@
maybe-mostlyclean-itcl: mostlyclean-itcl
mostlyclean-itcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15128,7 +16267,7 @@
maybe-clean-itcl: clean-itcl
clean-itcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15153,7 +16292,7 @@
maybe-distclean-itcl: distclean-itcl
distclean-itcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15178,7 +16317,7 @@
maybe-maintainer-clean-itcl: maintainer-clean-itcl
maintainer-clean-itcl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./itcl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -15204,11 +16343,15 @@
@if ld
maybe-configure-ld: configure-ld
configure-ld:
- @test -f stage_last && exit 0; \
+ at endif ld
+ at if ld-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif ld-bootstrap
+ at if ld
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/ld; \
cd "$(HOST_SUBDIR)/ld" || exit 1; \
@@ -15230,13 +16373,15 @@
maybe-configure-stage1-ld:
@if ld-bootstrap
maybe-configure-stage1-ld: configure-stage1-ld
-configure-stage1-ld:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-ld:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15254,14 +16399,16 @@
maybe-configure-stage2-ld:
@if ld-bootstrap
maybe-configure-stage2-ld: configure-stage2-ld
-configure-stage2-ld:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-ld:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15279,14 +16426,16 @@
maybe-configure-stage3-ld:
@if ld-bootstrap
maybe-configure-stage3-ld: configure-stage3-ld
-configure-stage3-ld:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-ld:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15304,14 +16453,16 @@
maybe-configure-stage4-ld:
@if ld-bootstrap
maybe-configure-stage4-ld: configure-stage4-ld
-configure-stage4-ld:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-ld:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15329,14 +16480,16 @@
maybe-configure-stageprofile-ld:
@if ld-bootstrap
maybe-configure-stageprofile-ld: configure-stageprofile-ld
-configure-stageprofile-ld:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-ld:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15354,14 +16507,16 @@
maybe-configure-stagefeedback-ld:
@if ld-bootstrap
maybe-configure-stagefeedback-ld: configure-stagefeedback-ld
-configure-stagefeedback-ld:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/ld/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-ld:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/ld ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \
cd $(HOST_SUBDIR)/ld || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15385,8 +16540,12 @@
TARGET-ld=all
maybe-all-ld: all-ld
all-ld: configure-ld
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif ld
+ at if ld-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif ld-bootstrap
+ at if ld
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/ld && \
@@ -15404,12 +16563,12 @@
all-stage1: all-stage1-ld
TARGET-stage1-ld = $(TARGET-ld)
all-stage1-ld: configure-stage1-ld
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/ld && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-ld)
maybe-clean-stage1-ld: clean-stage1-ld
@@ -15417,10 +16576,10 @@
clean-stage1-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif ld-bootstrap
@@ -15433,7 +16592,7 @@
all-stage2: all-stage2-ld
TARGET-stage2-ld = $(TARGET-ld)
all-stage2-ld: configure-stage2-ld
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15447,7 +16606,7 @@
clean-stage2-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -15464,7 +16623,7 @@
all-stage3: all-stage3-ld
TARGET-stage3-ld = $(TARGET-ld)
all-stage3-ld: configure-stage3-ld
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15478,7 +16637,7 @@
clean-stage3-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -15495,7 +16654,7 @@
all-stage4: all-stage4-ld
TARGET-stage4-ld = $(TARGET-ld)
all-stage4-ld: configure-stage4-ld
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15509,7 +16668,7 @@
clean-stage4-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -15526,7 +16685,7 @@
all-stageprofile: all-stageprofile-ld
TARGET-stageprofile-ld = $(TARGET-ld)
all-stageprofile-ld: configure-stageprofile-ld
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15540,7 +16699,7 @@
clean-stageprofile-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -15557,7 +16716,7 @@
all-stagefeedback: all-stagefeedback-ld
TARGET-stagefeedback-ld = $(TARGET-ld)
all-stagefeedback-ld: configure-stagefeedback-ld
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15571,7 +16730,7 @@
clean-stagefeedback-ld:
@[ -f $(HOST_SUBDIR)/ld/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-ld/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/ld && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -15588,7 +16747,7 @@
maybe-check-ld: check-ld
check-ld:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15603,7 +16762,7 @@
maybe-install-ld: install-ld
install-ld: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -15740,6 +16899,32 @@
@endif ld
+.PHONY: maybe-install-html-ld install-html-ld
+maybe-install-html-ld:
+ at if ld
+maybe-install-html-ld: install-html-ld
+
+install-html-ld: \
+ configure-ld \
+ html-ld
+ @[ -f ./ld/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in ld" ; \
+ (cd $(HOST_SUBDIR)/ld && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif ld
+
.PHONY: maybe-installcheck-ld installcheck-ld
maybe-installcheck-ld:
@if ld
@@ -15868,11 +17053,15 @@
@if libcpp
maybe-configure-libcpp: configure-libcpp
configure-libcpp:
- @test -f stage_last && exit 0; \
+ at endif libcpp
+ at if libcpp-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libcpp-bootstrap
+ at if libcpp
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libcpp; \
cd "$(HOST_SUBDIR)/libcpp" || exit 1; \
@@ -15894,13 +17083,15 @@
maybe-configure-stage1-libcpp:
@if libcpp-bootstrap
maybe-configure-stage1-libcpp: configure-stage1-libcpp
-configure-stage1-libcpp:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-libcpp:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15918,14 +17109,16 @@
maybe-configure-stage2-libcpp:
@if libcpp-bootstrap
maybe-configure-stage2-libcpp: configure-stage2-libcpp
-configure-stage2-libcpp:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-libcpp:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15943,14 +17136,16 @@
maybe-configure-stage3-libcpp:
@if libcpp-bootstrap
maybe-configure-stage3-libcpp: configure-stage3-libcpp
-configure-stage3-libcpp:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-libcpp:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15968,14 +17163,16 @@
maybe-configure-stage4-libcpp:
@if libcpp-bootstrap
maybe-configure-stage4-libcpp: configure-stage4-libcpp
-configure-stage4-libcpp:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-libcpp:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -15993,14 +17190,16 @@
maybe-configure-stageprofile-libcpp:
@if libcpp-bootstrap
maybe-configure-stageprofile-libcpp: configure-stageprofile-libcpp
-configure-stageprofile-libcpp:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-libcpp:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16018,14 +17217,16 @@
maybe-configure-stagefeedback-libcpp:
@if libcpp-bootstrap
maybe-configure-stagefeedback-libcpp: configure-stagefeedback-libcpp
-configure-stagefeedback-libcpp:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/libcpp/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-libcpp:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/libcpp ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \
cd $(HOST_SUBDIR)/libcpp || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16049,8 +17250,12 @@
TARGET-libcpp=all
maybe-all-libcpp: all-libcpp
all-libcpp: configure-libcpp
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif libcpp
+ at if libcpp-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libcpp-bootstrap
+ at if libcpp
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/libcpp && \
@@ -16068,12 +17273,12 @@
all-stage1: all-stage1-libcpp
TARGET-stage1-libcpp = $(TARGET-libcpp)
all-stage1-libcpp: configure-stage1-libcpp
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/libcpp && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-libcpp)
maybe-clean-stage1-libcpp: clean-stage1-libcpp
@@ -16081,10 +17286,10 @@
clean-stage1-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif libcpp-bootstrap
@@ -16097,7 +17302,7 @@
all-stage2: all-stage2-libcpp
TARGET-stage2-libcpp = $(TARGET-libcpp)
all-stage2-libcpp: configure-stage2-libcpp
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16111,7 +17316,7 @@
clean-stage2-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16128,7 +17333,7 @@
all-stage3: all-stage3-libcpp
TARGET-stage3-libcpp = $(TARGET-libcpp)
all-stage3-libcpp: configure-stage3-libcpp
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16142,7 +17347,7 @@
clean-stage3-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16159,7 +17364,7 @@
all-stage4: all-stage4-libcpp
TARGET-stage4-libcpp = $(TARGET-libcpp)
all-stage4-libcpp: configure-stage4-libcpp
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16173,7 +17378,7 @@
clean-stage4-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16190,7 +17395,7 @@
all-stageprofile: all-stageprofile-libcpp
TARGET-stageprofile-libcpp = $(TARGET-libcpp)
all-stageprofile-libcpp: configure-stageprofile-libcpp
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16204,7 +17409,7 @@
clean-stageprofile-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16221,7 +17426,7 @@
all-stagefeedback: all-stagefeedback-libcpp
TARGET-stagefeedback-libcpp = $(TARGET-libcpp)
all-stagefeedback-libcpp: configure-stagefeedback-libcpp
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16235,7 +17440,7 @@
clean-stagefeedback-libcpp:
@[ -f $(HOST_SUBDIR)/libcpp/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-libcpp/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/libcpp && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16252,7 +17457,7 @@
maybe-check-libcpp: check-libcpp
check-libcpp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16267,7 +17472,7 @@
maybe-install-libcpp: install-libcpp
install-libcpp: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16404,6 +17609,32 @@
@endif libcpp
+.PHONY: maybe-install-html-libcpp install-html-libcpp
+maybe-install-html-libcpp:
+ at if libcpp
+maybe-install-html-libcpp: install-html-libcpp
+
+install-html-libcpp: \
+ configure-libcpp \
+ html-libcpp
+ @[ -f ./libcpp/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libcpp" ; \
+ (cd $(HOST_SUBDIR)/libcpp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libcpp
+
.PHONY: maybe-installcheck-libcpp installcheck-libcpp
maybe-installcheck-libcpp:
@if libcpp
@@ -16532,11 +17763,15 @@
@if libdecnumber
maybe-configure-libdecnumber: configure-libdecnumber
configure-libdecnumber:
- @test -f stage_last && exit 0; \
+ at endif libdecnumber
+ at if libdecnumber-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libdecnumber-bootstrap
+ at if libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libdecnumber; \
cd "$(HOST_SUBDIR)/libdecnumber" || exit 1; \
@@ -16558,13 +17793,15 @@
maybe-configure-stage1-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stage1-libdecnumber: configure-stage1-libdecnumber
-configure-stage1-libdecnumber:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-libdecnumber:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16582,14 +17819,16 @@
maybe-configure-stage2-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stage2-libdecnumber: configure-stage2-libdecnumber
-configure-stage2-libdecnumber:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-libdecnumber:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16607,14 +17846,16 @@
maybe-configure-stage3-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stage3-libdecnumber: configure-stage3-libdecnumber
-configure-stage3-libdecnumber:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-libdecnumber:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16632,14 +17873,16 @@
maybe-configure-stage4-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stage4-libdecnumber: configure-stage4-libdecnumber
-configure-stage4-libdecnumber:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-libdecnumber:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16657,14 +17900,16 @@
maybe-configure-stageprofile-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stageprofile-libdecnumber: configure-stageprofile-libdecnumber
-configure-stageprofile-libdecnumber:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-libdecnumber:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16682,14 +17927,16 @@
maybe-configure-stagefeedback-libdecnumber:
@if libdecnumber-bootstrap
maybe-configure-stagefeedback-libdecnumber: configure-stagefeedback-libdecnumber
-configure-stagefeedback-libdecnumber:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-libdecnumber:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/libdecnumber ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \
cd $(HOST_SUBDIR)/libdecnumber || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -16713,8 +17960,12 @@
TARGET-libdecnumber=all
maybe-all-libdecnumber: all-libdecnumber
all-libdecnumber: configure-libdecnumber
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif libdecnumber
+ at if libdecnumber-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libdecnumber-bootstrap
+ at if libdecnumber
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/libdecnumber && \
@@ -16732,12 +17983,12 @@
all-stage1: all-stage1-libdecnumber
TARGET-stage1-libdecnumber = $(TARGET-libdecnumber)
all-stage1-libdecnumber: configure-stage1-libdecnumber
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/libdecnumber && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-libdecnumber)
maybe-clean-stage1-libdecnumber: clean-stage1-libdecnumber
@@ -16745,10 +17996,10 @@
clean-stage1-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif libdecnumber-bootstrap
@@ -16761,7 +18012,7 @@
all-stage2: all-stage2-libdecnumber
TARGET-stage2-libdecnumber = $(TARGET-libdecnumber)
all-stage2-libdecnumber: configure-stage2-libdecnumber
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16775,7 +18026,7 @@
clean-stage2-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16792,7 +18043,7 @@
all-stage3: all-stage3-libdecnumber
TARGET-stage3-libdecnumber = $(TARGET-libdecnumber)
all-stage3-libdecnumber: configure-stage3-libdecnumber
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16806,7 +18057,7 @@
clean-stage3-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16823,7 +18074,7 @@
all-stage4: all-stage4-libdecnumber
TARGET-stage4-libdecnumber = $(TARGET-libdecnumber)
all-stage4-libdecnumber: configure-stage4-libdecnumber
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16837,7 +18088,7 @@
clean-stage4-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16854,7 +18105,7 @@
all-stageprofile: all-stageprofile-libdecnumber
TARGET-stageprofile-libdecnumber = $(TARGET-libdecnumber)
all-stageprofile-libdecnumber: configure-stageprofile-libdecnumber
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16868,7 +18119,7 @@
clean-stageprofile-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16885,7 +18136,7 @@
all-stagefeedback: all-stagefeedback-libdecnumber
TARGET-stagefeedback-libdecnumber = $(TARGET-libdecnumber)
all-stagefeedback-libdecnumber: configure-stagefeedback-libdecnumber
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16899,7 +18150,7 @@
clean-stagefeedback-libdecnumber:
@[ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-libdecnumber/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/libdecnumber && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -16916,7 +18167,7 @@
maybe-check-libdecnumber: check-libdecnumber
check-libdecnumber:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -16931,7 +18182,7 @@
maybe-install-libdecnumber: install-libdecnumber
install-libdecnumber: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17068,6 +18319,32 @@
@endif libdecnumber
+.PHONY: maybe-install-html-libdecnumber install-html-libdecnumber
+maybe-install-html-libdecnumber:
+ at if libdecnumber
+maybe-install-html-libdecnumber: install-html-libdecnumber
+
+install-html-libdecnumber: \
+ configure-libdecnumber \
+ html-libdecnumber
+ @[ -f ./libdecnumber/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libdecnumber" ; \
+ (cd $(HOST_SUBDIR)/libdecnumber && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libdecnumber
+
.PHONY: maybe-installcheck-libdecnumber installcheck-libdecnumber
maybe-installcheck-libdecnumber:
@if libdecnumber
@@ -17196,11 +18473,11 @@
@if libgui
maybe-configure-libgui: configure-libgui
configure-libgui:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/libgui/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libgui/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgui ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libgui; \
cd "$(HOST_SUBDIR)/libgui" || exit 1; \
@@ -17226,7 +18503,7 @@
TARGET-libgui=all
maybe-all-libgui: all-libgui
all-libgui: configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17243,7 +18520,7 @@
maybe-check-libgui: check-libgui
check-libgui:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17258,7 +18535,7 @@
maybe-install-libgui: install-libgui
install-libgui: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17276,7 +18553,7 @@
info-libgui: \
configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17302,7 +18579,7 @@
dvi-libgui: \
configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17328,7 +18605,7 @@
html-libgui: \
configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17354,7 +18631,7 @@
TAGS-libgui: \
configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17381,7 +18658,7 @@
install-info-libgui: \
configure-libgui \
info-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17400,6 +18677,33 @@
@endif libgui
+.PHONY: maybe-install-html-libgui install-html-libgui
+maybe-install-html-libgui:
+ at if libgui
+maybe-install-html-libgui: install-html-libgui
+
+install-html-libgui: \
+ configure-libgui \
+ html-libgui
+ @: $(MAKE); $(unstage)
+ @[ -f ./libgui/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libgui" ; \
+ (cd $(HOST_SUBDIR)/libgui && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libgui
+
.PHONY: maybe-installcheck-libgui installcheck-libgui
maybe-installcheck-libgui:
@if libgui
@@ -17407,7 +18711,7 @@
installcheck-libgui: \
configure-libgui
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17432,7 +18736,7 @@
maybe-mostlyclean-libgui: mostlyclean-libgui
mostlyclean-libgui:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17457,7 +18761,7 @@
maybe-clean-libgui: clean-libgui
clean-libgui:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17482,7 +18786,7 @@
maybe-distclean-libgui: distclean-libgui
distclean-libgui:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17507,7 +18811,7 @@
maybe-maintainer-clean-libgui: maintainer-clean-libgui
maintainer-clean-libgui:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libgui/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -17533,11 +18837,15 @@
@if libiberty
maybe-configure-libiberty: configure-libiberty
configure-libiberty:
- @test -f stage_last && exit 0; \
+ at endif libiberty
+ at if libiberty-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libiberty-bootstrap
+ at if libiberty
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libiberty; \
cd "$(HOST_SUBDIR)/libiberty" || exit 1; \
@@ -17559,13 +18867,15 @@
maybe-configure-stage1-libiberty:
@if libiberty-bootstrap
maybe-configure-stage1-libiberty: configure-stage1-libiberty
-configure-stage1-libiberty:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-libiberty:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17583,14 +18893,16 @@
maybe-configure-stage2-libiberty:
@if libiberty-bootstrap
maybe-configure-stage2-libiberty: configure-stage2-libiberty
-configure-stage2-libiberty:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-libiberty:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17608,14 +18920,16 @@
maybe-configure-stage3-libiberty:
@if libiberty-bootstrap
maybe-configure-stage3-libiberty: configure-stage3-libiberty
-configure-stage3-libiberty:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-libiberty:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17633,14 +18947,16 @@
maybe-configure-stage4-libiberty:
@if libiberty-bootstrap
maybe-configure-stage4-libiberty: configure-stage4-libiberty
-configure-stage4-libiberty:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-libiberty:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17658,14 +18974,16 @@
maybe-configure-stageprofile-libiberty:
@if libiberty-bootstrap
maybe-configure-stageprofile-libiberty: configure-stageprofile-libiberty
-configure-stageprofile-libiberty:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-libiberty:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17683,14 +19001,16 @@
maybe-configure-stagefeedback-libiberty:
@if libiberty-bootstrap
maybe-configure-stagefeedback-libiberty: configure-stagefeedback-libiberty
-configure-stagefeedback-libiberty:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/libiberty/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-libiberty:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/libiberty ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \
cd $(HOST_SUBDIR)/libiberty || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -17714,8 +19034,12 @@
TARGET-libiberty=all
maybe-all-libiberty: all-libiberty
all-libiberty: configure-libiberty
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif libiberty
+ at if libiberty-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif libiberty-bootstrap
+ at if libiberty
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/libiberty && \
@@ -17733,12 +19057,12 @@
all-stage1: all-stage1-libiberty
TARGET-stage1-libiberty = $(TARGET-libiberty)
all-stage1-libiberty: configure-stage1-libiberty
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/libiberty && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-libiberty)
maybe-clean-stage1-libiberty: clean-stage1-libiberty
@@ -17746,10 +19070,10 @@
clean-stage1-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif libiberty-bootstrap
@@ -17762,7 +19086,7 @@
all-stage2: all-stage2-libiberty
TARGET-stage2-libiberty = $(TARGET-libiberty)
all-stage2-libiberty: configure-stage2-libiberty
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17776,7 +19100,7 @@
clean-stage2-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -17793,7 +19117,7 @@
all-stage3: all-stage3-libiberty
TARGET-stage3-libiberty = $(TARGET-libiberty)
all-stage3-libiberty: configure-stage3-libiberty
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17807,7 +19131,7 @@
clean-stage3-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -17824,7 +19148,7 @@
all-stage4: all-stage4-libiberty
TARGET-stage4-libiberty = $(TARGET-libiberty)
all-stage4-libiberty: configure-stage4-libiberty
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17838,7 +19162,7 @@
clean-stage4-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -17855,7 +19179,7 @@
all-stageprofile: all-stageprofile-libiberty
TARGET-stageprofile-libiberty = $(TARGET-libiberty)
all-stageprofile-libiberty: configure-stageprofile-libiberty
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17869,7 +19193,7 @@
clean-stageprofile-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -17886,7 +19210,7 @@
all-stagefeedback: all-stagefeedback-libiberty
TARGET-stagefeedback-libiberty = $(TARGET-libiberty)
all-stagefeedback-libiberty: configure-stagefeedback-libiberty
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17900,7 +19224,7 @@
clean-stagefeedback-libiberty:
@[ -f $(HOST_SUBDIR)/libiberty/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-libiberty/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/libiberty && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -17917,7 +19241,7 @@
maybe-check-libiberty: check-libiberty
check-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -17932,7 +19256,7 @@
maybe-install-libiberty: install-libiberty
install-libiberty: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18069,6 +19393,32 @@
@endif libiberty
+.PHONY: maybe-install-html-libiberty install-html-libiberty
+maybe-install-html-libiberty:
+ at if libiberty
+maybe-install-html-libiberty: install-html-libiberty
+
+install-html-libiberty: \
+ configure-libiberty \
+ html-libiberty
+ @[ -f ./libiberty/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libiberty" ; \
+ (cd $(HOST_SUBDIR)/libiberty && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libiberty
+
.PHONY: maybe-installcheck-libiberty installcheck-libiberty
maybe-installcheck-libiberty:
@if libiberty
@@ -18197,11 +19547,11 @@
@if libtool
maybe-configure-libtool: configure-libtool
configure-libtool:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/libtool/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libtool/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libtool ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libtool; \
cd "$(HOST_SUBDIR)/libtool" || exit 1; \
@@ -18227,7 +19577,7 @@
TARGET-libtool=all
maybe-all-libtool: all-libtool
all-libtool: configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18244,7 +19594,7 @@
maybe-check-libtool: check-libtool
check-libtool:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18259,7 +19609,7 @@
maybe-install-libtool: install-libtool
install-libtool: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18277,7 +19627,7 @@
info-libtool: \
configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18303,7 +19653,7 @@
dvi-libtool: \
configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18329,7 +19679,7 @@
html-libtool: \
configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18355,7 +19705,7 @@
TAGS-libtool: \
configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18382,7 +19732,7 @@
install-info-libtool: \
configure-libtool \
info-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18401,6 +19751,33 @@
@endif libtool
+.PHONY: maybe-install-html-libtool install-html-libtool
+maybe-install-html-libtool:
+ at if libtool
+maybe-install-html-libtool: install-html-libtool
+
+install-html-libtool: \
+ configure-libtool \
+ html-libtool
+ @: $(MAKE); $(unstage)
+ @[ -f ./libtool/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libtool" ; \
+ (cd $(HOST_SUBDIR)/libtool && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libtool
+
.PHONY: maybe-installcheck-libtool installcheck-libtool
maybe-installcheck-libtool:
@if libtool
@@ -18408,7 +19785,7 @@
installcheck-libtool: \
configure-libtool
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18433,7 +19810,7 @@
maybe-mostlyclean-libtool: mostlyclean-libtool
mostlyclean-libtool:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18458,7 +19835,7 @@
maybe-clean-libtool: clean-libtool
clean-libtool:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18483,7 +19860,7 @@
maybe-distclean-libtool: distclean-libtool
distclean-libtool:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18508,7 +19885,7 @@
maybe-maintainer-clean-libtool: maintainer-clean-libtool
maintainer-clean-libtool:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtool/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18534,11 +19911,11 @@
@if m4
maybe-configure-m4: configure-m4
configure-m4:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/m4/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/m4/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/m4 ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/m4; \
cd "$(HOST_SUBDIR)/m4" || exit 1; \
@@ -18564,7 +19941,7 @@
TARGET-m4=all
maybe-all-m4: all-m4
all-m4: configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18581,7 +19958,7 @@
maybe-check-m4: check-m4
check-m4:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18596,7 +19973,7 @@
maybe-install-m4: install-m4
install-m4: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18614,7 +19991,7 @@
info-m4: \
configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18640,7 +20017,7 @@
dvi-m4: \
configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18666,7 +20043,7 @@
html-m4: \
configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18692,7 +20069,7 @@
TAGS-m4: \
configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18719,7 +20096,7 @@
install-info-m4: \
configure-m4 \
info-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18738,6 +20115,33 @@
@endif m4
+.PHONY: maybe-install-html-m4 install-html-m4
+maybe-install-html-m4:
+ at if m4
+maybe-install-html-m4: install-html-m4
+
+install-html-m4: \
+ configure-m4 \
+ html-m4
+ @: $(MAKE); $(unstage)
+ @[ -f ./m4/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in m4" ; \
+ (cd $(HOST_SUBDIR)/m4 && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif m4
+
.PHONY: maybe-installcheck-m4 installcheck-m4
maybe-installcheck-m4:
@if m4
@@ -18745,7 +20149,7 @@
installcheck-m4: \
configure-m4
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18770,7 +20174,7 @@
maybe-mostlyclean-m4: mostlyclean-m4
mostlyclean-m4:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18795,7 +20199,7 @@
maybe-clean-m4: clean-m4
clean-m4:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18820,7 +20224,7 @@
maybe-distclean-m4: distclean-m4
distclean-m4:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18845,7 +20249,7 @@
maybe-maintainer-clean-m4: maintainer-clean-m4
maintainer-clean-m4:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./m4/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18871,11 +20275,11 @@
@if make
maybe-configure-make: configure-make
configure-make:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/make/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/make/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/make ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/make; \
cd "$(HOST_SUBDIR)/make" || exit 1; \
@@ -18901,7 +20305,7 @@
TARGET-make=all
maybe-all-make: all-make
all-make: configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18918,7 +20322,7 @@
maybe-check-make: check-make
check-make:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18933,7 +20337,7 @@
maybe-install-make: install-make
install-make: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -18951,7 +20355,7 @@
info-make: \
configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -18977,7 +20381,7 @@
dvi-make: \
configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19003,7 +20407,7 @@
html-make: \
configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19029,7 +20433,7 @@
TAGS-make: \
configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19056,7 +20460,7 @@
install-info-make: \
configure-make \
info-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19075,6 +20479,33 @@
@endif make
+.PHONY: maybe-install-html-make install-html-make
+maybe-install-html-make:
+ at if make
+maybe-install-html-make: install-html-make
+
+install-html-make: \
+ configure-make \
+ html-make
+ @: $(MAKE); $(unstage)
+ @[ -f ./make/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in make" ; \
+ (cd $(HOST_SUBDIR)/make && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif make
+
.PHONY: maybe-installcheck-make installcheck-make
maybe-installcheck-make:
@if make
@@ -19082,7 +20513,7 @@
installcheck-make: \
configure-make
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19107,7 +20538,7 @@
maybe-mostlyclean-make: mostlyclean-make
mostlyclean-make:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19132,7 +20563,7 @@
maybe-clean-make: clean-make
clean-make:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19157,7 +20588,7 @@
maybe-distclean-make: distclean-make
distclean-make:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19182,7 +20613,7 @@
maybe-maintainer-clean-make: maintainer-clean-make
maintainer-clean-make:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./make/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19208,11 +20639,11 @@
@if mmalloc
maybe-configure-mmalloc: configure-mmalloc
configure-mmalloc:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/mmalloc/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/mmalloc/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mmalloc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/mmalloc; \
cd "$(HOST_SUBDIR)/mmalloc" || exit 1; \
@@ -19238,7 +20669,7 @@
TARGET-mmalloc=all
maybe-all-mmalloc: all-mmalloc
all-mmalloc: configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19264,7 +20695,7 @@
maybe-install-mmalloc: install-mmalloc
install-mmalloc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19282,7 +20713,7 @@
info-mmalloc: \
configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19308,7 +20739,7 @@
dvi-mmalloc: \
configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19334,7 +20765,7 @@
html-mmalloc: \
configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19360,7 +20791,7 @@
TAGS-mmalloc: \
configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19387,7 +20818,7 @@
install-info-mmalloc: \
configure-mmalloc \
info-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19406,6 +20837,33 @@
@endif mmalloc
+.PHONY: maybe-install-html-mmalloc install-html-mmalloc
+maybe-install-html-mmalloc:
+ at if mmalloc
+maybe-install-html-mmalloc: install-html-mmalloc
+
+install-html-mmalloc: \
+ configure-mmalloc \
+ html-mmalloc
+ @: $(MAKE); $(unstage)
+ @[ -f ./mmalloc/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in mmalloc" ; \
+ (cd $(HOST_SUBDIR)/mmalloc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif mmalloc
+
.PHONY: maybe-installcheck-mmalloc installcheck-mmalloc
maybe-installcheck-mmalloc:
@if mmalloc
@@ -19413,7 +20871,7 @@
installcheck-mmalloc: \
configure-mmalloc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19438,7 +20896,7 @@
maybe-mostlyclean-mmalloc: mostlyclean-mmalloc
mostlyclean-mmalloc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19463,7 +20921,7 @@
maybe-clean-mmalloc: clean-mmalloc
clean-mmalloc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19488,7 +20946,7 @@
maybe-distclean-mmalloc: distclean-mmalloc
distclean-mmalloc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19513,7 +20971,7 @@
maybe-maintainer-clean-mmalloc: maintainer-clean-mmalloc
maintainer-clean-mmalloc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./mmalloc/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19539,11 +20997,11 @@
@if patch
maybe-configure-patch: configure-patch
configure-patch:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/patch/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/patch/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/patch ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/patch; \
cd "$(HOST_SUBDIR)/patch" || exit 1; \
@@ -19569,7 +21027,7 @@
TARGET-patch=all
maybe-all-patch: all-patch
all-patch: configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19586,7 +21044,7 @@
maybe-check-patch: check-patch
check-patch:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19601,7 +21059,7 @@
maybe-install-patch: install-patch
install-patch: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19619,7 +21077,7 @@
info-patch: \
configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19645,7 +21103,7 @@
dvi-patch: \
configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19671,7 +21129,7 @@
html-patch: \
configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19697,7 +21155,7 @@
TAGS-patch: \
configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19724,7 +21182,7 @@
install-info-patch: \
configure-patch \
info-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19743,6 +21201,33 @@
@endif patch
+.PHONY: maybe-install-html-patch install-html-patch
+maybe-install-html-patch:
+ at if patch
+maybe-install-html-patch: install-html-patch
+
+install-html-patch: \
+ configure-patch \
+ html-patch
+ @: $(MAKE); $(unstage)
+ @[ -f ./patch/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in patch" ; \
+ (cd $(HOST_SUBDIR)/patch && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif patch
+
.PHONY: maybe-installcheck-patch installcheck-patch
maybe-installcheck-patch:
@if patch
@@ -19750,7 +21235,7 @@
installcheck-patch: \
configure-patch
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19775,7 +21260,7 @@
maybe-mostlyclean-patch: mostlyclean-patch
mostlyclean-patch:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19800,7 +21285,7 @@
maybe-clean-patch: clean-patch
clean-patch:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19825,7 +21310,7 @@
maybe-distclean-patch: distclean-patch
distclean-patch:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19850,7 +21335,7 @@
maybe-maintainer-clean-patch: maintainer-clean-patch
maintainer-clean-patch:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./patch/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19876,11 +21361,11 @@
@if perl
maybe-configure-perl: configure-perl
configure-perl:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/perl/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/perl/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/perl ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/perl; \
cd "$(HOST_SUBDIR)/perl" || exit 1; \
@@ -19906,7 +21391,7 @@
TARGET-perl=all
maybe-all-perl: all-perl
all-perl: configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19923,7 +21408,7 @@
maybe-check-perl: check-perl
check-perl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19938,7 +21423,7 @@
maybe-install-perl: install-perl
install-perl: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -19956,7 +21441,7 @@
info-perl: \
configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -19982,7 +21467,7 @@
dvi-perl: \
configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20008,7 +21493,7 @@
html-perl: \
configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20034,7 +21519,7 @@
TAGS-perl: \
configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20061,7 +21546,7 @@
install-info-perl: \
configure-perl \
info-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20080,6 +21565,33 @@
@endif perl
+.PHONY: maybe-install-html-perl install-html-perl
+maybe-install-html-perl:
+ at if perl
+maybe-install-html-perl: install-html-perl
+
+install-html-perl: \
+ configure-perl \
+ html-perl
+ @: $(MAKE); $(unstage)
+ @[ -f ./perl/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in perl" ; \
+ (cd $(HOST_SUBDIR)/perl && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif perl
+
.PHONY: maybe-installcheck-perl installcheck-perl
maybe-installcheck-perl:
@if perl
@@ -20087,7 +21599,7 @@
installcheck-perl: \
configure-perl
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20112,7 +21624,7 @@
maybe-mostlyclean-perl: mostlyclean-perl
mostlyclean-perl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20137,7 +21649,7 @@
maybe-clean-perl: clean-perl
clean-perl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20162,7 +21674,7 @@
maybe-distclean-perl: distclean-perl
distclean-perl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20187,7 +21699,7 @@
maybe-maintainer-clean-perl: maintainer-clean-perl
maintainer-clean-perl:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./perl/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20213,11 +21725,11 @@
@if prms
maybe-configure-prms: configure-prms
configure-prms:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/prms/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/prms/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/prms ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/prms; \
cd "$(HOST_SUBDIR)/prms" || exit 1; \
@@ -20243,7 +21755,7 @@
TARGET-prms=all
maybe-all-prms: all-prms
all-prms: configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20260,7 +21772,7 @@
maybe-check-prms: check-prms
check-prms:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20275,7 +21787,7 @@
maybe-install-prms: install-prms
install-prms: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20293,7 +21805,7 @@
info-prms: \
configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20319,7 +21831,7 @@
dvi-prms: \
configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20345,7 +21857,7 @@
html-prms: \
configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20371,7 +21883,7 @@
TAGS-prms: \
configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20398,7 +21910,7 @@
install-info-prms: \
configure-prms \
info-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20417,6 +21929,33 @@
@endif prms
+.PHONY: maybe-install-html-prms install-html-prms
+maybe-install-html-prms:
+ at if prms
+maybe-install-html-prms: install-html-prms
+
+install-html-prms: \
+ configure-prms \
+ html-prms
+ @: $(MAKE); $(unstage)
+ @[ -f ./prms/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in prms" ; \
+ (cd $(HOST_SUBDIR)/prms && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif prms
+
.PHONY: maybe-installcheck-prms installcheck-prms
maybe-installcheck-prms:
@if prms
@@ -20424,7 +21963,7 @@
installcheck-prms: \
configure-prms
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20449,7 +21988,7 @@
maybe-mostlyclean-prms: mostlyclean-prms
mostlyclean-prms:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20474,7 +22013,7 @@
maybe-clean-prms: clean-prms
clean-prms:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20499,7 +22038,7 @@
maybe-distclean-prms: distclean-prms
distclean-prms:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20524,7 +22063,7 @@
maybe-maintainer-clean-prms: maintainer-clean-prms
maintainer-clean-prms:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./prms/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20550,11 +22089,11 @@
@if rcs
maybe-configure-rcs: configure-rcs
configure-rcs:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/rcs/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/rcs/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/rcs ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/rcs; \
cd "$(HOST_SUBDIR)/rcs" || exit 1; \
@@ -20580,7 +22119,7 @@
TARGET-rcs=all
maybe-all-rcs: all-rcs
all-rcs: configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20597,7 +22136,7 @@
maybe-check-rcs: check-rcs
check-rcs:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20612,7 +22151,7 @@
maybe-install-rcs: install-rcs
install-rcs: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20630,7 +22169,7 @@
info-rcs: \
configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20656,7 +22195,7 @@
dvi-rcs: \
configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20682,7 +22221,7 @@
html-rcs: \
configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20708,7 +22247,7 @@
TAGS-rcs: \
configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20735,7 +22274,7 @@
install-info-rcs: \
configure-rcs \
info-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20754,6 +22293,33 @@
@endif rcs
+.PHONY: maybe-install-html-rcs install-html-rcs
+maybe-install-html-rcs:
+ at if rcs
+maybe-install-html-rcs: install-html-rcs
+
+install-html-rcs: \
+ configure-rcs \
+ html-rcs
+ @: $(MAKE); $(unstage)
+ @[ -f ./rcs/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in rcs" ; \
+ (cd $(HOST_SUBDIR)/rcs && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif rcs
+
.PHONY: maybe-installcheck-rcs installcheck-rcs
maybe-installcheck-rcs:
@if rcs
@@ -20761,7 +22327,7 @@
installcheck-rcs: \
configure-rcs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20786,7 +22352,7 @@
maybe-mostlyclean-rcs: mostlyclean-rcs
mostlyclean-rcs:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20811,7 +22377,7 @@
maybe-clean-rcs: clean-rcs
clean-rcs:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20836,7 +22402,7 @@
maybe-distclean-rcs: distclean-rcs
distclean-rcs:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20861,7 +22427,7 @@
maybe-maintainer-clean-rcs: maintainer-clean-rcs
maintainer-clean-rcs:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./rcs/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20887,11 +22453,11 @@
@if readline
maybe-configure-readline: configure-readline
configure-readline:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/readline/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/readline/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/readline ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/readline; \
cd "$(HOST_SUBDIR)/readline" || exit 1; \
@@ -20917,7 +22483,7 @@
TARGET-readline=all
maybe-all-readline: all-readline
all-readline: configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20934,7 +22500,7 @@
maybe-check-readline: check-readline
check-readline:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20949,7 +22515,7 @@
maybe-install-readline: install-readline
install-readline: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -20967,7 +22533,7 @@
info-readline: \
configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -20993,7 +22559,7 @@
dvi-readline: \
configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21019,7 +22585,7 @@
html-readline: \
configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21045,7 +22611,7 @@
TAGS-readline: \
configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21072,7 +22638,7 @@
install-info-readline: \
configure-readline \
info-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21091,6 +22657,33 @@
@endif readline
+.PHONY: maybe-install-html-readline install-html-readline
+maybe-install-html-readline:
+ at if readline
+maybe-install-html-readline: install-html-readline
+
+install-html-readline: \
+ configure-readline \
+ html-readline
+ @: $(MAKE); $(unstage)
+ @[ -f ./readline/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in readline" ; \
+ (cd $(HOST_SUBDIR)/readline && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif readline
+
.PHONY: maybe-installcheck-readline installcheck-readline
maybe-installcheck-readline:
@if readline
@@ -21098,7 +22691,7 @@
installcheck-readline: \
configure-readline
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21123,7 +22716,7 @@
maybe-mostlyclean-readline: mostlyclean-readline
mostlyclean-readline:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21148,7 +22741,7 @@
maybe-clean-readline: clean-readline
clean-readline:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21173,7 +22766,7 @@
maybe-distclean-readline: distclean-readline
distclean-readline:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21198,7 +22791,7 @@
maybe-maintainer-clean-readline: maintainer-clean-readline
maintainer-clean-readline:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./readline/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21224,11 +22817,11 @@
@if release
maybe-configure-release: configure-release
configure-release:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/release/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/release/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/release ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/release; \
cd "$(HOST_SUBDIR)/release" || exit 1; \
@@ -21254,7 +22847,7 @@
TARGET-release=all
maybe-all-release: all-release
all-release: configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21292,7 +22885,7 @@
info-release: \
configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21318,7 +22911,7 @@
dvi-release: \
configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21344,7 +22937,7 @@
html-release: \
configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21370,7 +22963,7 @@
TAGS-release: \
configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21397,7 +22990,7 @@
install-info-release: \
configure-release \
info-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21416,6 +23009,33 @@
@endif release
+.PHONY: maybe-install-html-release install-html-release
+maybe-install-html-release:
+ at if release
+maybe-install-html-release: install-html-release
+
+install-html-release: \
+ configure-release \
+ html-release
+ @: $(MAKE); $(unstage)
+ @[ -f ./release/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in release" ; \
+ (cd $(HOST_SUBDIR)/release && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif release
+
.PHONY: maybe-installcheck-release installcheck-release
maybe-installcheck-release:
@if release
@@ -21423,7 +23043,7 @@
installcheck-release: \
configure-release
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21448,7 +23068,7 @@
maybe-mostlyclean-release: mostlyclean-release
mostlyclean-release:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21473,7 +23093,7 @@
maybe-clean-release: clean-release
clean-release:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21498,7 +23118,7 @@
maybe-distclean-release: distclean-release
distclean-release:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21523,7 +23143,7 @@
maybe-maintainer-clean-release: maintainer-clean-release
maintainer-clean-release:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./release/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21549,11 +23169,11 @@
@if recode
maybe-configure-recode: configure-recode
configure-recode:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/recode/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/recode/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/recode ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/recode; \
cd "$(HOST_SUBDIR)/recode" || exit 1; \
@@ -21579,7 +23199,7 @@
TARGET-recode=all
maybe-all-recode: all-recode
all-recode: configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21596,7 +23216,7 @@
maybe-check-recode: check-recode
check-recode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21611,7 +23231,7 @@
maybe-install-recode: install-recode
install-recode: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21629,7 +23249,7 @@
info-recode: \
configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21655,7 +23275,7 @@
dvi-recode: \
configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21681,7 +23301,7 @@
html-recode: \
configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21707,7 +23327,7 @@
TAGS-recode: \
configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21734,7 +23354,7 @@
install-info-recode: \
configure-recode \
info-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21753,6 +23373,33 @@
@endif recode
+.PHONY: maybe-install-html-recode install-html-recode
+maybe-install-html-recode:
+ at if recode
+maybe-install-html-recode: install-html-recode
+
+install-html-recode: \
+ configure-recode \
+ html-recode
+ @: $(MAKE); $(unstage)
+ @[ -f ./recode/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in recode" ; \
+ (cd $(HOST_SUBDIR)/recode && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif recode
+
.PHONY: maybe-installcheck-recode installcheck-recode
maybe-installcheck-recode:
@if recode
@@ -21760,7 +23407,7 @@
installcheck-recode: \
configure-recode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21785,7 +23432,7 @@
maybe-mostlyclean-recode: mostlyclean-recode
mostlyclean-recode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21810,7 +23457,7 @@
maybe-clean-recode: clean-recode
clean-recode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21835,7 +23482,7 @@
maybe-distclean-recode: distclean-recode
distclean-recode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21860,7 +23507,7 @@
maybe-maintainer-clean-recode: maintainer-clean-recode
maintainer-clean-recode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./recode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21886,11 +23533,11 @@
@if sed
maybe-configure-sed: configure-sed
configure-sed:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/sed/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/sed/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/sed ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/sed; \
cd "$(HOST_SUBDIR)/sed" || exit 1; \
@@ -21916,7 +23563,7 @@
TARGET-sed=all
maybe-all-sed: all-sed
all-sed: configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21933,7 +23580,7 @@
maybe-check-sed: check-sed
check-sed:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21948,7 +23595,7 @@
maybe-install-sed: install-sed
install-sed: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -21966,7 +23613,7 @@
info-sed: \
configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -21992,7 +23639,7 @@
dvi-sed: \
configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22018,7 +23665,7 @@
html-sed: \
configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22044,7 +23691,7 @@
TAGS-sed: \
configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22071,7 +23718,7 @@
install-info-sed: \
configure-sed \
info-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22090,6 +23737,33 @@
@endif sed
+.PHONY: maybe-install-html-sed install-html-sed
+maybe-install-html-sed:
+ at if sed
+maybe-install-html-sed: install-html-sed
+
+install-html-sed: \
+ configure-sed \
+ html-sed
+ @: $(MAKE); $(unstage)
+ @[ -f ./sed/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in sed" ; \
+ (cd $(HOST_SUBDIR)/sed && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif sed
+
.PHONY: maybe-installcheck-sed installcheck-sed
maybe-installcheck-sed:
@if sed
@@ -22097,7 +23771,7 @@
installcheck-sed: \
configure-sed
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22122,7 +23796,7 @@
maybe-mostlyclean-sed: mostlyclean-sed
mostlyclean-sed:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22147,7 +23821,7 @@
maybe-clean-sed: clean-sed
clean-sed:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22172,7 +23846,7 @@
maybe-distclean-sed: distclean-sed
distclean-sed:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22197,7 +23871,7 @@
maybe-maintainer-clean-sed: maintainer-clean-sed
maintainer-clean-sed:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sed/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22223,11 +23897,11 @@
@if send-pr
maybe-configure-send-pr: configure-send-pr
configure-send-pr:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/send-pr/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/send-pr/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/send-pr ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/send-pr; \
cd "$(HOST_SUBDIR)/send-pr" || exit 1; \
@@ -22253,7 +23927,7 @@
TARGET-send-pr=all
maybe-all-send-pr: all-send-pr
all-send-pr: configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22270,7 +23944,7 @@
maybe-check-send-pr: check-send-pr
check-send-pr:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22285,7 +23959,7 @@
maybe-install-send-pr: install-send-pr
install-send-pr: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22303,7 +23977,7 @@
info-send-pr: \
configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22329,7 +24003,7 @@
dvi-send-pr: \
configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22355,7 +24029,7 @@
html-send-pr: \
configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22381,7 +24055,7 @@
TAGS-send-pr: \
configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22408,7 +24082,7 @@
install-info-send-pr: \
configure-send-pr \
info-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22427,6 +24101,33 @@
@endif send-pr
+.PHONY: maybe-install-html-send-pr install-html-send-pr
+maybe-install-html-send-pr:
+ at if send-pr
+maybe-install-html-send-pr: install-html-send-pr
+
+install-html-send-pr: \
+ configure-send-pr \
+ html-send-pr
+ @: $(MAKE); $(unstage)
+ @[ -f ./send-pr/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in send-pr" ; \
+ (cd $(HOST_SUBDIR)/send-pr && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif send-pr
+
.PHONY: maybe-installcheck-send-pr installcheck-send-pr
maybe-installcheck-send-pr:
@if send-pr
@@ -22434,7 +24135,7 @@
installcheck-send-pr: \
configure-send-pr
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22459,7 +24160,7 @@
maybe-mostlyclean-send-pr: mostlyclean-send-pr
mostlyclean-send-pr:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22484,7 +24185,7 @@
maybe-clean-send-pr: clean-send-pr
clean-send-pr:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22509,7 +24210,7 @@
maybe-distclean-send-pr: distclean-send-pr
distclean-send-pr:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22534,7 +24235,7 @@
maybe-maintainer-clean-send-pr: maintainer-clean-send-pr
maintainer-clean-send-pr:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./send-pr/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22560,11 +24261,11 @@
@if shellutils
maybe-configure-shellutils: configure-shellutils
configure-shellutils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/shellutils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/shellutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/shellutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/shellutils; \
cd "$(HOST_SUBDIR)/shellutils" || exit 1; \
@@ -22590,7 +24291,7 @@
TARGET-shellutils=all
maybe-all-shellutils: all-shellutils
all-shellutils: configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22607,7 +24308,7 @@
maybe-check-shellutils: check-shellutils
check-shellutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22622,7 +24323,7 @@
maybe-install-shellutils: install-shellutils
install-shellutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22640,7 +24341,7 @@
info-shellutils: \
configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22666,7 +24367,7 @@
dvi-shellutils: \
configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22692,7 +24393,7 @@
html-shellutils: \
configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22718,7 +24419,7 @@
TAGS-shellutils: \
configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22745,7 +24446,7 @@
install-info-shellutils: \
configure-shellutils \
info-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22764,6 +24465,33 @@
@endif shellutils
+.PHONY: maybe-install-html-shellutils install-html-shellutils
+maybe-install-html-shellutils:
+ at if shellutils
+maybe-install-html-shellutils: install-html-shellutils
+
+install-html-shellutils: \
+ configure-shellutils \
+ html-shellutils
+ @: $(MAKE); $(unstage)
+ @[ -f ./shellutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in shellutils" ; \
+ (cd $(HOST_SUBDIR)/shellutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif shellutils
+
.PHONY: maybe-installcheck-shellutils installcheck-shellutils
maybe-installcheck-shellutils:
@if shellutils
@@ -22771,7 +24499,7 @@
installcheck-shellutils: \
configure-shellutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22796,7 +24524,7 @@
maybe-mostlyclean-shellutils: mostlyclean-shellutils
mostlyclean-shellutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22821,7 +24549,7 @@
maybe-clean-shellutils: clean-shellutils
clean-shellutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22846,7 +24574,7 @@
maybe-distclean-shellutils: distclean-shellutils
distclean-shellutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22871,7 +24599,7 @@
maybe-maintainer-clean-shellutils: maintainer-clean-shellutils
maintainer-clean-shellutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./shellutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -22897,11 +24625,11 @@
@if sid
maybe-configure-sid: configure-sid
configure-sid:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/sid/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/sid/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/sid ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/sid; \
cd "$(HOST_SUBDIR)/sid" || exit 1; \
@@ -22927,7 +24655,7 @@
TARGET-sid=all
maybe-all-sid: all-sid
all-sid: configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22944,7 +24672,7 @@
maybe-check-sid: check-sid
check-sid:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22959,7 +24687,7 @@
maybe-install-sid: install-sid
install-sid: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -22977,7 +24705,7 @@
info-sid: \
configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23003,7 +24731,7 @@
dvi-sid: \
configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23029,7 +24757,7 @@
html-sid: \
configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23055,7 +24783,7 @@
TAGS-sid: \
configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23082,7 +24810,7 @@
install-info-sid: \
configure-sid \
info-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23101,6 +24829,33 @@
@endif sid
+.PHONY: maybe-install-html-sid install-html-sid
+maybe-install-html-sid:
+ at if sid
+maybe-install-html-sid: install-html-sid
+
+install-html-sid: \
+ configure-sid \
+ html-sid
+ @: $(MAKE); $(unstage)
+ @[ -f ./sid/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in sid" ; \
+ (cd $(HOST_SUBDIR)/sid && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif sid
+
.PHONY: maybe-installcheck-sid installcheck-sid
maybe-installcheck-sid:
@if sid
@@ -23108,7 +24863,7 @@
installcheck-sid: \
configure-sid
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23133,7 +24888,7 @@
maybe-mostlyclean-sid: mostlyclean-sid
mostlyclean-sid:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23158,7 +24913,7 @@
maybe-clean-sid: clean-sid
clean-sid:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23183,7 +24938,7 @@
maybe-distclean-sid: distclean-sid
distclean-sid:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23208,7 +24963,7 @@
maybe-maintainer-clean-sid: maintainer-clean-sid
maintainer-clean-sid:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sid/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23234,11 +24989,11 @@
@if sim
maybe-configure-sim: configure-sim
configure-sim:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/sim/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/sim/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/sim ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/sim; \
cd "$(HOST_SUBDIR)/sim" || exit 1; \
@@ -23264,7 +25019,7 @@
TARGET-sim=all
maybe-all-sim: all-sim
all-sim: configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23281,7 +25036,7 @@
maybe-check-sim: check-sim
check-sim:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23296,7 +25051,7 @@
maybe-install-sim: install-sim
install-sim: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23314,7 +25069,7 @@
info-sim: \
configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23340,7 +25095,7 @@
dvi-sim: \
configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23366,7 +25121,7 @@
html-sim: \
configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23392,7 +25147,7 @@
TAGS-sim: \
configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23419,7 +25174,7 @@
install-info-sim: \
configure-sim \
info-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23438,6 +25193,33 @@
@endif sim
+.PHONY: maybe-install-html-sim install-html-sim
+maybe-install-html-sim:
+ at if sim
+maybe-install-html-sim: install-html-sim
+
+install-html-sim: \
+ configure-sim \
+ html-sim
+ @: $(MAKE); $(unstage)
+ @[ -f ./sim/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in sim" ; \
+ (cd $(HOST_SUBDIR)/sim && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif sim
+
.PHONY: maybe-installcheck-sim installcheck-sim
maybe-installcheck-sim:
@if sim
@@ -23445,7 +25227,7 @@
installcheck-sim: \
configure-sim
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23470,7 +25252,7 @@
maybe-mostlyclean-sim: mostlyclean-sim
mostlyclean-sim:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23495,7 +25277,7 @@
maybe-clean-sim: clean-sim
clean-sim:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23520,7 +25302,7 @@
maybe-distclean-sim: distclean-sim
distclean-sim:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23545,7 +25327,7 @@
maybe-maintainer-clean-sim: maintainer-clean-sim
maintainer-clean-sim:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./sim/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23571,11 +25353,11 @@
@if tar
maybe-configure-tar: configure-tar
configure-tar:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/tar/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/tar/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/tar ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/tar; \
cd "$(HOST_SUBDIR)/tar" || exit 1; \
@@ -23601,7 +25383,7 @@
TARGET-tar=all
maybe-all-tar: all-tar
all-tar: configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23618,7 +25400,7 @@
maybe-check-tar: check-tar
check-tar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23633,7 +25415,7 @@
maybe-install-tar: install-tar
install-tar: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23651,7 +25433,7 @@
info-tar: \
configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23677,7 +25459,7 @@
dvi-tar: \
configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23703,7 +25485,7 @@
html-tar: \
configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23729,7 +25511,7 @@
TAGS-tar: \
configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23756,7 +25538,7 @@
install-info-tar: \
configure-tar \
info-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23775,6 +25557,33 @@
@endif tar
+.PHONY: maybe-install-html-tar install-html-tar
+maybe-install-html-tar:
+ at if tar
+maybe-install-html-tar: install-html-tar
+
+install-html-tar: \
+ configure-tar \
+ html-tar
+ @: $(MAKE); $(unstage)
+ @[ -f ./tar/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in tar" ; \
+ (cd $(HOST_SUBDIR)/tar && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif tar
+
.PHONY: maybe-installcheck-tar installcheck-tar
maybe-installcheck-tar:
@if tar
@@ -23782,7 +25591,7 @@
installcheck-tar: \
configure-tar
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23807,7 +25616,7 @@
maybe-mostlyclean-tar: mostlyclean-tar
mostlyclean-tar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23832,7 +25641,7 @@
maybe-clean-tar: clean-tar
clean-tar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23857,7 +25666,7 @@
maybe-distclean-tar: distclean-tar
distclean-tar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23882,7 +25691,7 @@
maybe-maintainer-clean-tar: maintainer-clean-tar
maintainer-clean-tar:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tar/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -23908,11 +25717,11 @@
@if texinfo
maybe-configure-texinfo: configure-texinfo
configure-texinfo:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/texinfo/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/texinfo/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/texinfo ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/texinfo; \
cd "$(HOST_SUBDIR)/texinfo" || exit 1; \
@@ -23938,7 +25747,7 @@
TARGET-texinfo=all
maybe-all-texinfo: all-texinfo
all-texinfo: configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23955,7 +25764,7 @@
maybe-check-texinfo: check-texinfo
check-texinfo:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -23982,7 +25791,7 @@
info-texinfo: \
configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24008,7 +25817,7 @@
dvi-texinfo: \
configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24034,7 +25843,7 @@
html-texinfo: \
configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24060,7 +25869,7 @@
TAGS-texinfo: \
configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24087,7 +25896,7 @@
install-info-texinfo: \
configure-texinfo \
info-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24106,6 +25915,33 @@
@endif texinfo
+.PHONY: maybe-install-html-texinfo install-html-texinfo
+maybe-install-html-texinfo:
+ at if texinfo
+maybe-install-html-texinfo: install-html-texinfo
+
+install-html-texinfo: \
+ configure-texinfo \
+ html-texinfo
+ @: $(MAKE); $(unstage)
+ @[ -f ./texinfo/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in texinfo" ; \
+ (cd $(HOST_SUBDIR)/texinfo && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif texinfo
+
.PHONY: maybe-installcheck-texinfo installcheck-texinfo
maybe-installcheck-texinfo:
@if texinfo
@@ -24113,7 +25949,7 @@
installcheck-texinfo: \
configure-texinfo
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24138,7 +25974,7 @@
maybe-mostlyclean-texinfo: mostlyclean-texinfo
mostlyclean-texinfo:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24163,7 +25999,7 @@
maybe-clean-texinfo: clean-texinfo
clean-texinfo:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24188,7 +26024,7 @@
maybe-distclean-texinfo: distclean-texinfo
distclean-texinfo:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24213,7 +26049,7 @@
maybe-maintainer-clean-texinfo: maintainer-clean-texinfo
maintainer-clean-texinfo:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./texinfo/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24239,11 +26075,11 @@
@if textutils
maybe-configure-textutils: configure-textutils
configure-textutils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/textutils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/textutils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/textutils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/textutils; \
cd "$(HOST_SUBDIR)/textutils" || exit 1; \
@@ -24269,7 +26105,7 @@
TARGET-textutils=all
maybe-all-textutils: all-textutils
all-textutils: configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24286,7 +26122,7 @@
maybe-check-textutils: check-textutils
check-textutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24301,7 +26137,7 @@
maybe-install-textutils: install-textutils
install-textutils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24319,7 +26155,7 @@
info-textutils: \
configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24345,7 +26181,7 @@
dvi-textutils: \
configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24371,7 +26207,7 @@
html-textutils: \
configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24397,7 +26233,7 @@
TAGS-textutils: \
configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24424,7 +26260,7 @@
install-info-textutils: \
configure-textutils \
info-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24443,6 +26279,33 @@
@endif textutils
+.PHONY: maybe-install-html-textutils install-html-textutils
+maybe-install-html-textutils:
+ at if textutils
+maybe-install-html-textutils: install-html-textutils
+
+install-html-textutils: \
+ configure-textutils \
+ html-textutils
+ @: $(MAKE); $(unstage)
+ @[ -f ./textutils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in textutils" ; \
+ (cd $(HOST_SUBDIR)/textutils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif textutils
+
.PHONY: maybe-installcheck-textutils installcheck-textutils
maybe-installcheck-textutils:
@if textutils
@@ -24450,7 +26313,7 @@
installcheck-textutils: \
configure-textutils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24475,7 +26338,7 @@
maybe-mostlyclean-textutils: mostlyclean-textutils
mostlyclean-textutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24500,7 +26363,7 @@
maybe-clean-textutils: clean-textutils
clean-textutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24525,7 +26388,7 @@
maybe-distclean-textutils: distclean-textutils
distclean-textutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24550,7 +26413,7 @@
maybe-maintainer-clean-textutils: maintainer-clean-textutils
maintainer-clean-textutils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./textutils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24576,11 +26439,11 @@
@if time
maybe-configure-time: configure-time
configure-time:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/time/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/time/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/time ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/time; \
cd "$(HOST_SUBDIR)/time" || exit 1; \
@@ -24606,7 +26469,7 @@
TARGET-time=all
maybe-all-time: all-time
all-time: configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24623,7 +26486,7 @@
maybe-check-time: check-time
check-time:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24638,7 +26501,7 @@
maybe-install-time: install-time
install-time: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24656,7 +26519,7 @@
info-time: \
configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24682,7 +26545,7 @@
dvi-time: \
configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24708,7 +26571,7 @@
html-time: \
configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24734,7 +26597,7 @@
TAGS-time: \
configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24761,7 +26624,7 @@
install-info-time: \
configure-time \
info-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24780,6 +26643,33 @@
@endif time
+.PHONY: maybe-install-html-time install-html-time
+maybe-install-html-time:
+ at if time
+maybe-install-html-time: install-html-time
+
+install-html-time: \
+ configure-time \
+ html-time
+ @: $(MAKE); $(unstage)
+ @[ -f ./time/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in time" ; \
+ (cd $(HOST_SUBDIR)/time && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif time
+
.PHONY: maybe-installcheck-time installcheck-time
maybe-installcheck-time:
@if time
@@ -24787,7 +26677,7 @@
installcheck-time: \
configure-time
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24812,7 +26702,7 @@
maybe-mostlyclean-time: mostlyclean-time
mostlyclean-time:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24837,7 +26727,7 @@
maybe-clean-time: clean-time
clean-time:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24862,7 +26752,7 @@
maybe-distclean-time: distclean-time
distclean-time:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24887,7 +26777,7 @@
maybe-maintainer-clean-time: maintainer-clean-time
maintainer-clean-time:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./time/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -24913,11 +26803,11 @@
@if uudecode
maybe-configure-uudecode: configure-uudecode
configure-uudecode:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/uudecode/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/uudecode/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/uudecode ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/uudecode; \
cd "$(HOST_SUBDIR)/uudecode" || exit 1; \
@@ -24943,7 +26833,7 @@
TARGET-uudecode=all
maybe-all-uudecode: all-uudecode
all-uudecode: configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24960,7 +26850,7 @@
maybe-check-uudecode: check-uudecode
check-uudecode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24975,7 +26865,7 @@
maybe-install-uudecode: install-uudecode
install-uudecode: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -24993,7 +26883,7 @@
info-uudecode: \
configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25019,7 +26909,7 @@
dvi-uudecode: \
configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25045,7 +26935,7 @@
html-uudecode: \
configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25071,7 +26961,7 @@
TAGS-uudecode: \
configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25098,7 +26988,7 @@
install-info-uudecode: \
configure-uudecode \
info-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25117,6 +27007,33 @@
@endif uudecode
+.PHONY: maybe-install-html-uudecode install-html-uudecode
+maybe-install-html-uudecode:
+ at if uudecode
+maybe-install-html-uudecode: install-html-uudecode
+
+install-html-uudecode: \
+ configure-uudecode \
+ html-uudecode
+ @: $(MAKE); $(unstage)
+ @[ -f ./uudecode/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in uudecode" ; \
+ (cd $(HOST_SUBDIR)/uudecode && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif uudecode
+
.PHONY: maybe-installcheck-uudecode installcheck-uudecode
maybe-installcheck-uudecode:
@if uudecode
@@ -25124,7 +27041,7 @@
installcheck-uudecode: \
configure-uudecode
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25149,7 +27066,7 @@
maybe-mostlyclean-uudecode: mostlyclean-uudecode
mostlyclean-uudecode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25174,7 +27091,7 @@
maybe-clean-uudecode: clean-uudecode
clean-uudecode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25199,7 +27116,7 @@
maybe-distclean-uudecode: distclean-uudecode
distclean-uudecode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25224,7 +27141,7 @@
maybe-maintainer-clean-uudecode: maintainer-clean-uudecode
maintainer-clean-uudecode:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./uudecode/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25250,11 +27167,11 @@
@if wdiff
maybe-configure-wdiff: configure-wdiff
configure-wdiff:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/wdiff/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/wdiff/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/wdiff ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/wdiff; \
cd "$(HOST_SUBDIR)/wdiff" || exit 1; \
@@ -25280,7 +27197,7 @@
TARGET-wdiff=all
maybe-all-wdiff: all-wdiff
all-wdiff: configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -25297,7 +27214,7 @@
maybe-check-wdiff: check-wdiff
check-wdiff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -25312,7 +27229,7 @@
maybe-install-wdiff: install-wdiff
install-wdiff: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -25330,7 +27247,7 @@
info-wdiff: \
configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25356,7 +27273,7 @@
dvi-wdiff: \
configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25382,7 +27299,7 @@
html-wdiff: \
configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25408,7 +27325,7 @@
TAGS-wdiff: \
configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25435,7 +27352,7 @@
install-info-wdiff: \
configure-wdiff \
info-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25454,6 +27371,33 @@
@endif wdiff
+.PHONY: maybe-install-html-wdiff install-html-wdiff
+maybe-install-html-wdiff:
+ at if wdiff
+maybe-install-html-wdiff: install-html-wdiff
+
+install-html-wdiff: \
+ configure-wdiff \
+ html-wdiff
+ @: $(MAKE); $(unstage)
+ @[ -f ./wdiff/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in wdiff" ; \
+ (cd $(HOST_SUBDIR)/wdiff && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif wdiff
+
.PHONY: maybe-installcheck-wdiff installcheck-wdiff
maybe-installcheck-wdiff:
@if wdiff
@@ -25461,7 +27405,7 @@
installcheck-wdiff: \
configure-wdiff
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25486,7 +27430,7 @@
maybe-mostlyclean-wdiff: mostlyclean-wdiff
mostlyclean-wdiff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25511,7 +27455,7 @@
maybe-clean-wdiff: clean-wdiff
clean-wdiff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25536,7 +27480,7 @@
maybe-distclean-wdiff: distclean-wdiff
distclean-wdiff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25561,7 +27505,7 @@
maybe-maintainer-clean-wdiff: maintainer-clean-wdiff
maintainer-clean-wdiff:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./wdiff/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25587,11 +27531,11 @@
@if zip
maybe-configure-zip: configure-zip
configure-zip:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/zip/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zip/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zip ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/zip; \
cd "$(HOST_SUBDIR)/zip" || exit 1; \
@@ -25617,7 +27561,7 @@
TARGET-zip=all
maybe-all-zip: all-zip
all-zip: configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -25635,7 +27579,7 @@
# This module is only tested in a native toolchain.
check-zip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25652,7 +27596,7 @@
maybe-install-zip: install-zip
install-zip: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -25670,7 +27614,7 @@
info-zip: \
configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25696,7 +27640,7 @@
dvi-zip: \
configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25722,7 +27666,7 @@
html-zip: \
configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25748,7 +27692,7 @@
TAGS-zip: \
configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25775,7 +27719,7 @@
install-info-zip: \
configure-zip \
info-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25794,6 +27738,33 @@
@endif zip
+.PHONY: maybe-install-html-zip install-html-zip
+maybe-install-html-zip:
+ at if zip
+maybe-install-html-zip: install-html-zip
+
+install-html-zip: \
+ configure-zip \
+ html-zip
+ @: $(MAKE); $(unstage)
+ @[ -f ./zip/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in zip" ; \
+ (cd $(HOST_SUBDIR)/zip && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif zip
+
.PHONY: maybe-installcheck-zip installcheck-zip
maybe-installcheck-zip:
@if zip
@@ -25801,7 +27772,7 @@
installcheck-zip: \
configure-zip
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25826,7 +27797,7 @@
maybe-mostlyclean-zip: mostlyclean-zip
mostlyclean-zip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25851,7 +27822,7 @@
maybe-clean-zip: clean-zip
clean-zip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25876,7 +27847,7 @@
maybe-distclean-zip: distclean-zip
distclean-zip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25901,7 +27872,7 @@
maybe-maintainer-clean-zip: maintainer-clean-zip
maintainer-clean-zip:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./zip/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -25927,11 +27898,15 @@
@if zlib
maybe-configure-zlib: configure-zlib
configure-zlib:
- @test -f stage_last && exit 0; \
+ at endif zlib
+ at if zlib-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif zlib-bootstrap
+ at if zlib
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/zlib; \
cd "$(HOST_SUBDIR)/zlib" || exit 1; \
@@ -25953,13 +27928,15 @@
maybe-configure-stage1-zlib:
@if zlib-bootstrap
maybe-configure-stage1-zlib: configure-stage1-zlib
-configure-stage1-zlib:
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage1-zlib:
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
echo Configuring stage 1 in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -25977,14 +27954,16 @@
maybe-configure-stage2-zlib:
@if zlib-bootstrap
maybe-configure-stage2-zlib: configure-stage2-zlib
-configure-stage2-zlib:
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage2-zlib:
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 2 in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -26002,14 +27981,16 @@
maybe-configure-stage3-zlib:
@if zlib-bootstrap
maybe-configure-stage3-zlib: configure-stage3-zlib
-configure-stage3-zlib:
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage3-zlib:
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 3 in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -26027,14 +28008,16 @@
maybe-configure-stage4-zlib:
@if zlib-bootstrap
maybe-configure-stage4-zlib: configure-stage4-zlib
-configure-stage4-zlib:
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage4-zlib:
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage 4 in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -26052,14 +28035,16 @@
maybe-configure-stageprofile-zlib:
@if zlib-bootstrap
maybe-configure-stageprofile-zlib: configure-stageprofile-zlib
-configure-stageprofile-zlib:
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stageprofile-zlib:
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage profile in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -26077,14 +28062,16 @@
maybe-configure-stagefeedback-zlib:
@if zlib-bootstrap
maybe-configure-stagefeedback-zlib: configure-stagefeedback-zlib
-configure-stagefeedback-zlib:
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
- @[ -f $(HOST_SUBDIR)/zlib/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stagefeedback-zlib:
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
+ @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \
$(HOST_EXPORTS) \
$(POSTSTAGE1_HOST_EXPORTS) \
echo Configuring stage feedback in $(HOST_SUBDIR)/zlib ; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \
cd $(HOST_SUBDIR)/zlib || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -26108,8 +28095,12 @@
TARGET-zlib=all
maybe-all-zlib: all-zlib
all-zlib: configure-zlib
- @test -f stage_last && exit 0; \
- r=`${PWD_COMMAND}`; export r; \
+ at endif zlib
+ at if zlib-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif zlib-bootstrap
+ at if zlib
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd $(HOST_SUBDIR)/zlib && \
@@ -26127,12 +28118,12 @@
all-stage1: all-stage1-zlib
TARGET-stage1-zlib = $(TARGET-zlib)
all-stage1-zlib: configure-stage1-zlib
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
cd $(HOST_SUBDIR)/zlib && \
- $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" \
+ $(MAKE) $(FLAGS_TO_PASS) CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" \
$(TARGET-stage1-zlib)
maybe-clean-stage1-zlib: clean-stage1-zlib
@@ -26140,10 +28131,10 @@
clean-stage1-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stage1-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage1 ] || $(MAKE) stage1-start
+ [ $(current_stage) = stage1 ] || $(MAKE) stage1-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
- CFLAGS="$(STAGE1_CFLAGS)" clean
+ CFLAGS="$(STAGE1_CFLAGS)" LIBCFLAGS="$(STAGE1_CFLAGS)" clean
@endif zlib-bootstrap
@@ -26156,7 +28147,7 @@
all-stage2: all-stage2-zlib
TARGET-stage2-zlib = $(TARGET-zlib)
all-stage2-zlib: configure-stage2-zlib
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26170,7 +28161,7 @@
clean-stage2-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stage2-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage2 ] || $(MAKE) stage2-start
+ [ $(current_stage) = stage2 ] || $(MAKE) stage2-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -26187,7 +28178,7 @@
all-stage3: all-stage3-zlib
TARGET-stage3-zlib = $(TARGET-zlib)
all-stage3-zlib: configure-stage3-zlib
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26201,7 +28192,7 @@
clean-stage3-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stage3-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage3 ] || $(MAKE) stage3-start
+ [ $(current_stage) = stage3 ] || $(MAKE) stage3-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -26218,7 +28209,7 @@
all-stage4: all-stage4-zlib
TARGET-stage4-zlib = $(TARGET-zlib)
all-stage4-zlib: configure-stage4-zlib
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26232,7 +28223,7 @@
clean-stage4-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stage4-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage4 ] || $(MAKE) stage4-start
+ [ $(current_stage) = stage4 ] || $(MAKE) stage4-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -26249,7 +28240,7 @@
all-stageprofile: all-stageprofile-zlib
TARGET-stageprofile-zlib = $(TARGET-zlib)
all-stageprofile-zlib: configure-stageprofile-zlib
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26263,7 +28254,7 @@
clean-stageprofile-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stageprofile-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stageprofile ] || $(MAKE) stageprofile-start
+ [ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -26280,7 +28271,7 @@
all-stagefeedback: all-stagefeedback-zlib
TARGET-stagefeedback-zlib = $(TARGET-zlib)
all-stagefeedback-zlib: configure-stagefeedback-zlib
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26294,7 +28285,7 @@
clean-stagefeedback-zlib:
@[ -f $(HOST_SUBDIR)/zlib/Makefile ] || [ -f $(HOST_SUBDIR)/stagefeedback-zlib/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stagefeedback ] || $(MAKE) stagefeedback-start
+ [ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start; \
cd $(HOST_SUBDIR)/zlib && \
$(MAKE) $(FLAGS_TO_PASS) \
$(POSTSTAGE1_FLAGS_TO_PASS) \
@@ -26451,6 +28442,32 @@
@endif zlib
+.PHONY: maybe-install-html-zlib install-html-zlib
+maybe-install-html-zlib:
+ at if zlib
+maybe-install-html-zlib: install-html-zlib
+
+install-html-zlib: \
+ configure-zlib \
+ html-zlib
+ @[ -f ./zlib/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in zlib" ; \
+ (cd $(HOST_SUBDIR)/zlib && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif zlib
+
.PHONY: maybe-installcheck-zlib installcheck-zlib
maybe-installcheck-zlib:
@if zlib
@@ -26579,11 +28596,11 @@
@if gdb
maybe-configure-gdb: configure-gdb
configure-gdb:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gdb/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gdb/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gdb ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gdb; \
cd "$(HOST_SUBDIR)/gdb" || exit 1; \
@@ -26609,7 +28626,7 @@
TARGET-gdb=all
maybe-all-gdb: all-gdb
all-gdb: configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26626,7 +28643,7 @@
maybe-check-gdb: check-gdb
check-gdb:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26641,7 +28658,7 @@
maybe-install-gdb: install-gdb
install-gdb: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26659,7 +28676,7 @@
info-gdb: \
configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26685,7 +28702,7 @@
dvi-gdb: \
configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26711,7 +28728,7 @@
html-gdb: \
configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26737,7 +28754,7 @@
TAGS-gdb: \
configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26764,7 +28781,7 @@
install-info-gdb: \
configure-gdb \
info-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26783,6 +28800,33 @@
@endif gdb
+.PHONY: maybe-install-html-gdb install-html-gdb
+maybe-install-html-gdb:
+ at if gdb
+maybe-install-html-gdb: install-html-gdb
+
+install-html-gdb: \
+ configure-gdb \
+ html-gdb
+ @: $(MAKE); $(unstage)
+ @[ -f ./gdb/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) $(X11_FLAGS_TO_PASS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gdb" ; \
+ (cd $(HOST_SUBDIR)/gdb && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gdb
+
.PHONY: maybe-installcheck-gdb installcheck-gdb
maybe-installcheck-gdb:
@if gdb
@@ -26790,7 +28834,7 @@
installcheck-gdb: \
configure-gdb
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26815,7 +28859,7 @@
maybe-mostlyclean-gdb: mostlyclean-gdb
mostlyclean-gdb:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26840,7 +28884,7 @@
maybe-clean-gdb: clean-gdb
clean-gdb:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26865,7 +28909,7 @@
maybe-distclean-gdb: distclean-gdb
distclean-gdb:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26890,7 +28934,7 @@
maybe-maintainer-clean-gdb: maintainer-clean-gdb
maintainer-clean-gdb:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gdb/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -26916,11 +28960,11 @@
@if expect
maybe-configure-expect: configure-expect
configure-expect:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/expect/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/expect/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/expect ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/expect; \
cd "$(HOST_SUBDIR)/expect" || exit 1; \
@@ -26946,7 +28990,7 @@
TARGET-expect=all
maybe-all-expect: all-expect
all-expect: configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26963,7 +29007,7 @@
maybe-check-expect: check-expect
check-expect:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26978,7 +29022,7 @@
maybe-install-expect: install-expect
install-expect: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -26996,7 +29040,7 @@
info-expect: \
configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27022,7 +29066,7 @@
dvi-expect: \
configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27048,7 +29092,7 @@
html-expect: \
configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27074,7 +29118,7 @@
TAGS-expect: \
configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27101,7 +29145,7 @@
install-info-expect: \
configure-expect \
info-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27120,6 +29164,33 @@
@endif expect
+.PHONY: maybe-install-html-expect install-html-expect
+maybe-install-html-expect:
+ at if expect
+maybe-install-html-expect: install-html-expect
+
+install-html-expect: \
+ configure-expect \
+ html-expect
+ @: $(MAKE); $(unstage)
+ @[ -f ./expect/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) $(X11_FLAGS_TO_PASS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in expect" ; \
+ (cd $(HOST_SUBDIR)/expect && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif expect
+
.PHONY: maybe-installcheck-expect installcheck-expect
maybe-installcheck-expect:
@if expect
@@ -27127,7 +29198,7 @@
installcheck-expect: \
configure-expect
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27152,7 +29223,7 @@
maybe-mostlyclean-expect: mostlyclean-expect
mostlyclean-expect:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27177,7 +29248,7 @@
maybe-clean-expect: clean-expect
clean-expect:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27202,7 +29273,7 @@
maybe-distclean-expect: distclean-expect
distclean-expect:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27227,7 +29298,7 @@
maybe-maintainer-clean-expect: maintainer-clean-expect
maintainer-clean-expect:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./expect/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27253,11 +29324,11 @@
@if guile
maybe-configure-guile: configure-guile
configure-guile:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/guile/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/guile/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/guile ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/guile; \
cd "$(HOST_SUBDIR)/guile" || exit 1; \
@@ -27283,7 +29354,7 @@
TARGET-guile=all
maybe-all-guile: all-guile
all-guile: configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27300,7 +29371,7 @@
maybe-check-guile: check-guile
check-guile:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27315,7 +29386,7 @@
maybe-install-guile: install-guile
install-guile: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27333,7 +29404,7 @@
info-guile: \
configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27359,7 +29430,7 @@
dvi-guile: \
configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27385,7 +29456,7 @@
html-guile: \
configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27411,7 +29482,7 @@
TAGS-guile: \
configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27438,7 +29509,7 @@
install-info-guile: \
configure-guile \
info-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27457,6 +29528,33 @@
@endif guile
+.PHONY: maybe-install-html-guile install-html-guile
+maybe-install-html-guile:
+ at if guile
+maybe-install-html-guile: install-html-guile
+
+install-html-guile: \
+ configure-guile \
+ html-guile
+ @: $(MAKE); $(unstage)
+ @[ -f ./guile/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) $(X11_FLAGS_TO_PASS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in guile" ; \
+ (cd $(HOST_SUBDIR)/guile && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif guile
+
.PHONY: maybe-installcheck-guile installcheck-guile
maybe-installcheck-guile:
@if guile
@@ -27464,7 +29562,7 @@
installcheck-guile: \
configure-guile
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27489,7 +29587,7 @@
maybe-mostlyclean-guile: mostlyclean-guile
mostlyclean-guile:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27514,7 +29612,7 @@
maybe-clean-guile: clean-guile
clean-guile:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27539,7 +29637,7 @@
maybe-distclean-guile: distclean-guile
distclean-guile:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27564,7 +29662,7 @@
maybe-maintainer-clean-guile: maintainer-clean-guile
maintainer-clean-guile:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./guile/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27590,11 +29688,11 @@
@if tk
maybe-configure-tk: configure-tk
configure-tk:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/tk/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/tk/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/tk ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/tk; \
cd "$(HOST_SUBDIR)/tk" || exit 1; \
@@ -27620,7 +29718,7 @@
TARGET-tk=all
maybe-all-tk: all-tk
all-tk: configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27637,7 +29735,7 @@
maybe-check-tk: check-tk
check-tk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27652,7 +29750,7 @@
maybe-install-tk: install-tk
install-tk: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27670,7 +29768,7 @@
info-tk: \
configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27696,7 +29794,7 @@
dvi-tk: \
configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27722,7 +29820,7 @@
html-tk: \
configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27748,7 +29846,7 @@
TAGS-tk: \
configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27775,7 +29873,7 @@
install-info-tk: \
configure-tk \
info-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27794,6 +29892,33 @@
@endif tk
+.PHONY: maybe-install-html-tk install-html-tk
+maybe-install-html-tk:
+ at if tk
+maybe-install-html-tk: install-html-tk
+
+install-html-tk: \
+ configure-tk \
+ html-tk
+ @: $(MAKE); $(unstage)
+ @[ -f ./tk/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) $(X11_FLAGS_TO_PASS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in tk" ; \
+ (cd $(HOST_SUBDIR)/tk && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif tk
+
.PHONY: maybe-installcheck-tk installcheck-tk
maybe-installcheck-tk:
@if tk
@@ -27801,7 +29926,7 @@
installcheck-tk: \
configure-tk
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27826,7 +29951,7 @@
maybe-mostlyclean-tk: mostlyclean-tk
mostlyclean-tk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27851,7 +29976,7 @@
maybe-clean-tk: clean-tk
clean-tk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27876,7 +30001,7 @@
maybe-distclean-tk: distclean-tk
distclean-tk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27901,7 +30026,7 @@
maybe-maintainer-clean-tk: maintainer-clean-tk
maintainer-clean-tk:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./tk/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -27927,11 +30052,11 @@
@if libtermcap
maybe-configure-libtermcap: configure-libtermcap
configure-libtermcap:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/libtermcap/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/libtermcap/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libtermcap ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/libtermcap; \
cd "$(HOST_SUBDIR)/libtermcap" || exit 1; \
@@ -27957,7 +30082,7 @@
TARGET-libtermcap=all
maybe-all-libtermcap: all-libtermcap
all-libtermcap: configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -27983,7 +30108,7 @@
maybe-install-libtermcap: install-libtermcap
install-libtermcap: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28001,7 +30126,7 @@
info-libtermcap: \
configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28027,7 +30152,7 @@
dvi-libtermcap: \
configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28053,7 +30178,7 @@
html-libtermcap: \
configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28079,7 +30204,7 @@
TAGS-libtermcap: \
configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28106,7 +30231,7 @@
install-info-libtermcap: \
configure-libtermcap \
info-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28125,6 +30250,33 @@
@endif libtermcap
+.PHONY: maybe-install-html-libtermcap install-html-libtermcap
+maybe-install-html-libtermcap:
+ at if libtermcap
+maybe-install-html-libtermcap: install-html-libtermcap
+
+install-html-libtermcap: \
+ configure-libtermcap \
+ html-libtermcap
+ @: $(MAKE); $(unstage)
+ @[ -f ./libtermcap/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in libtermcap" ; \
+ (cd $(HOST_SUBDIR)/libtermcap && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif libtermcap
+
.PHONY: maybe-installcheck-libtermcap installcheck-libtermcap
maybe-installcheck-libtermcap:
@if libtermcap
@@ -28132,7 +30284,7 @@
installcheck-libtermcap: \
configure-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./libtermcap/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28198,11 +30350,11 @@
@if utils
maybe-configure-utils: configure-utils
configure-utils:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/utils/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/utils/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/utils ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/utils; \
cd "$(HOST_SUBDIR)/utils" || exit 1; \
@@ -28228,7 +30380,7 @@
TARGET-utils=all
maybe-all-utils: all-utils
all-utils: configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28254,7 +30406,7 @@
maybe-install-utils: install-utils
install-utils: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28272,7 +30424,7 @@
info-utils: \
configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28298,7 +30450,7 @@
dvi-utils: \
configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28324,7 +30476,7 @@
html-utils: \
configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28350,7 +30502,7 @@
TAGS-utils: \
configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28377,7 +30529,7 @@
install-info-utils: \
configure-utils \
info-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28396,6 +30548,33 @@
@endif utils
+.PHONY: maybe-install-html-utils install-html-utils
+maybe-install-html-utils:
+ at if utils
+maybe-install-html-utils: install-html-utils
+
+install-html-utils: \
+ configure-utils \
+ html-utils
+ @: $(MAKE); $(unstage)
+ @[ -f ./utils/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in utils" ; \
+ (cd $(HOST_SUBDIR)/utils && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif utils
+
.PHONY: maybe-installcheck-utils installcheck-utils
maybe-installcheck-utils:
@if utils
@@ -28403,7 +30582,7 @@
installcheck-utils: \
configure-utils
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28428,7 +30607,7 @@
maybe-mostlyclean-utils: mostlyclean-utils
mostlyclean-utils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28453,7 +30632,7 @@
maybe-clean-utils: clean-utils
clean-utils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28478,7 +30657,7 @@
maybe-distclean-utils: distclean-utils
distclean-utils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28503,7 +30682,7 @@
maybe-maintainer-clean-utils: maintainer-clean-utils
maintainer-clean-utils:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./utils/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28529,11 +30708,11 @@
@if gnattools
maybe-configure-gnattools: configure-gnattools
configure-gnattools:
- @$(unstage)
- @test ! -f $(HOST_SUBDIR)/gnattools/Makefile || exit 0; \
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ test ! -f $(HOST_SUBDIR)/gnattools/Makefile || exit 0; \
$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gnattools ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
echo Configuring in $(HOST_SUBDIR)/gnattools; \
cd "$(HOST_SUBDIR)/gnattools" || exit 1; \
@@ -28559,7 +30738,7 @@
TARGET-gnattools=all
maybe-all-gnattools: all-gnattools
all-gnattools: configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28576,7 +30755,7 @@
maybe-check-gnattools: check-gnattools
check-gnattools:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28591,7 +30770,7 @@
maybe-install-gnattools: install-gnattools
install-gnattools: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -28609,7 +30788,7 @@
info-gnattools: \
configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28635,7 +30814,7 @@
dvi-gnattools: \
configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28661,7 +30840,7 @@
html-gnattools: \
configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28687,7 +30866,7 @@
TAGS-gnattools: \
configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28714,7 +30893,7 @@
install-info-gnattools: \
configure-gnattools \
info-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28733,6 +30912,33 @@
@endif gnattools
+.PHONY: maybe-install-html-gnattools install-html-gnattools
+maybe-install-html-gnattools:
+ at if gnattools
+maybe-install-html-gnattools: install-html-gnattools
+
+install-html-gnattools: \
+ configure-gnattools \
+ html-gnattools
+ @: $(MAKE); $(unstage)
+ @[ -f ./gnattools/Makefile ] || exit 0; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(HOST_EXPORTS) \
+ for flag in $(EXTRA_HOST_FLAGS) ; do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ echo "Doing install-html in gnattools" ; \
+ (cd $(HOST_SUBDIR)/gnattools && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif gnattools
+
.PHONY: maybe-installcheck-gnattools installcheck-gnattools
maybe-installcheck-gnattools:
@if gnattools
@@ -28740,7 +30946,7 @@
installcheck-gnattools: \
configure-gnattools
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28765,7 +30971,7 @@
maybe-mostlyclean-gnattools: mostlyclean-gnattools
mostlyclean-gnattools:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28790,7 +30996,7 @@
maybe-clean-gnattools: clean-gnattools
clean-gnattools:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28815,7 +31021,7 @@
maybe-distclean-gnattools: distclean-gnattools
distclean-gnattools:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28840,7 +31046,7 @@
maybe-maintainer-clean-gnattools: maintainer-clean-gnattools
maintainer-clean-gnattools:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f ./gnattools/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28866,26 +31072,31 @@
# ---------------------------------------
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libstdc++-v3
-$(TARGET_SUBDIR)/libstdc++-v3/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libstdc++-v3 ; \
- rm -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libstdc++-v3/multilib.out
- at endif target-libstdc++-v3
-
.PHONY: configure-target-libstdc++-v3 maybe-configure-target-libstdc++-v3
maybe-configure-target-libstdc++-v3:
@if target-libstdc++-v3
maybe-configure-target-libstdc++-v3: configure-target-libstdc++-v3
-configure-target-libstdc++-v3: $(TARGET_SUBDIR)/libstdc++-v3/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile || exit 0; \
+configure-target-libstdc++-v3:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libstdc++-v3..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libstdc++-v3 ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libstdc++-v3/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libstdc++-v3/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libstdc++-v3/multilib.tmp $(TARGET_SUBDIR)/libstdc++-v3/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libstdc++-v3/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile; \
+ mv $(TARGET_SUBDIR)/libstdc++-v3/multilib.tmp $(TARGET_SUBDIR)/libstdc++-v3/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libstdc++-v3/multilib.tmp $(TARGET_SUBDIR)/libstdc++-v3/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libstdc++-v3 ; \
$(RAW_CXX_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libstdc++-v3; \
cd "$(TARGET_SUBDIR)/libstdc++-v3" || exit 1; \
@@ -28912,7 +31123,7 @@
TARGET-target-libstdc++-v3=all
maybe-all-target-libstdc++-v3: all-target-libstdc++-v3
all-target-libstdc++-v3: configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -28930,7 +31141,7 @@
maybe-check-target-libstdc++-v3: check-target-libstdc++-v3
check-target-libstdc++-v3:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -28945,7 +31156,7 @@
maybe-install-target-libstdc++-v3: install-target-libstdc++-v3
install-target-libstdc++-v3: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -28963,7 +31174,7 @@
info-target-libstdc++-v3: \
configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -28989,7 +31200,7 @@
dvi-target-libstdc++-v3: \
configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29015,7 +31226,7 @@
html-target-libstdc++-v3: \
configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29041,7 +31252,7 @@
TAGS-target-libstdc++-v3: \
configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29068,7 +31279,7 @@
install-info-target-libstdc++-v3: \
configure-target-libstdc++-v3 \
info-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29087,6 +31298,33 @@
@endif target-libstdc++-v3
+.PHONY: maybe-install-html-target-libstdc++-v3 install-html-target-libstdc++-v3
+maybe-install-html-target-libstdc++-v3:
+ at if target-libstdc++-v3
+maybe-install-html-target-libstdc++-v3: install-html-target-libstdc++-v3
+
+install-html-target-libstdc++-v3: \
+ configure-target-libstdc++-v3 \
+ html-target-libstdc++-v3
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(RAW_CXX_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libstdc++-v3" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libstdc++-v3 && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libstdc++-v3
+
.PHONY: maybe-installcheck-target-libstdc++-v3 installcheck-target-libstdc++-v3
maybe-installcheck-target-libstdc++-v3:
@if target-libstdc++-v3
@@ -29094,7 +31332,7 @@
installcheck-target-libstdc++-v3: \
configure-target-libstdc++-v3
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29119,7 +31357,7 @@
maybe-mostlyclean-target-libstdc++-v3: mostlyclean-target-libstdc++-v3
mostlyclean-target-libstdc++-v3:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29144,7 +31382,7 @@
maybe-clean-target-libstdc++-v3: clean-target-libstdc++-v3
clean-target-libstdc++-v3:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29169,7 +31407,7 @@
maybe-distclean-target-libstdc++-v3: distclean-target-libstdc++-v3
distclean-target-libstdc++-v3:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29194,7 +31432,7 @@
maybe-maintainer-clean-target-libstdc++-v3: maintainer-clean-target-libstdc++-v3
maintainer-clean-target-libstdc++-v3:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libstdc++-v3/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29215,26 +31453,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libmudflap
-$(TARGET_SUBDIR)/libmudflap/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libmudflap ; \
- rm -f $(TARGET_SUBDIR)/libmudflap/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libmudflap/multilib.out
- at endif target-libmudflap
-
.PHONY: configure-target-libmudflap maybe-configure-target-libmudflap
maybe-configure-target-libmudflap:
@if target-libmudflap
maybe-configure-target-libmudflap: configure-target-libmudflap
-configure-target-libmudflap: $(TARGET_SUBDIR)/libmudflap/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libmudflap/Makefile || exit 0; \
+configure-target-libmudflap:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libmudflap..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libmudflap ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libmudflap/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libmudflap/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libmudflap/multilib.tmp $(TARGET_SUBDIR)/libmudflap/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libmudflap/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libmudflap/Makefile; \
+ mv $(TARGET_SUBDIR)/libmudflap/multilib.tmp $(TARGET_SUBDIR)/libmudflap/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libmudflap/multilib.tmp $(TARGET_SUBDIR)/libmudflap/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libmudflap/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libmudflap ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libmudflap; \
cd "$(TARGET_SUBDIR)/libmudflap" || exit 1; \
@@ -29261,7 +31504,7 @@
TARGET-target-libmudflap=all
maybe-all-target-libmudflap: all-target-libmudflap
all-target-libmudflap: configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29279,7 +31522,7 @@
maybe-check-target-libmudflap: check-target-libmudflap
check-target-libmudflap:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29294,7 +31537,7 @@
maybe-install-target-libmudflap: install-target-libmudflap
install-target-libmudflap: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29312,7 +31555,7 @@
info-target-libmudflap: \
configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29338,7 +31581,7 @@
dvi-target-libmudflap: \
configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29364,7 +31607,7 @@
html-target-libmudflap: \
configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29390,7 +31633,7 @@
TAGS-target-libmudflap: \
configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29417,7 +31660,7 @@
install-info-target-libmudflap: \
configure-target-libmudflap \
info-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29436,6 +31679,33 @@
@endif target-libmudflap
+.PHONY: maybe-install-html-target-libmudflap install-html-target-libmudflap
+maybe-install-html-target-libmudflap:
+ at if target-libmudflap
+maybe-install-html-target-libmudflap: install-html-target-libmudflap
+
+install-html-target-libmudflap: \
+ configure-target-libmudflap \
+ html-target-libmudflap
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libmudflap" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libmudflap && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libmudflap
+
.PHONY: maybe-installcheck-target-libmudflap installcheck-target-libmudflap
maybe-installcheck-target-libmudflap:
@if target-libmudflap
@@ -29443,7 +31713,7 @@
installcheck-target-libmudflap: \
configure-target-libmudflap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29468,7 +31738,7 @@
maybe-mostlyclean-target-libmudflap: mostlyclean-target-libmudflap
mostlyclean-target-libmudflap:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29493,7 +31763,7 @@
maybe-clean-target-libmudflap: clean-target-libmudflap
clean-target-libmudflap:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29518,7 +31788,7 @@
maybe-distclean-target-libmudflap: distclean-target-libmudflap
distclean-target-libmudflap:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29543,7 +31813,7 @@
maybe-maintainer-clean-target-libmudflap: maintainer-clean-target-libmudflap
maintainer-clean-target-libmudflap:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libmudflap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29564,26 +31834,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libssp
-$(TARGET_SUBDIR)/libssp/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libssp ; \
- rm -f $(TARGET_SUBDIR)/libssp/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libssp/multilib.out
- at endif target-libssp
-
.PHONY: configure-target-libssp maybe-configure-target-libssp
maybe-configure-target-libssp:
@if target-libssp
maybe-configure-target-libssp: configure-target-libssp
-configure-target-libssp: $(TARGET_SUBDIR)/libssp/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libssp/Makefile || exit 0; \
+configure-target-libssp:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libssp..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libssp ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libssp/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libssp/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libssp/multilib.tmp $(TARGET_SUBDIR)/libssp/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libssp/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libssp/Makefile; \
+ mv $(TARGET_SUBDIR)/libssp/multilib.tmp $(TARGET_SUBDIR)/libssp/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libssp/multilib.tmp $(TARGET_SUBDIR)/libssp/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libssp/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libssp ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libssp; \
cd "$(TARGET_SUBDIR)/libssp" || exit 1; \
@@ -29610,7 +31885,7 @@
TARGET-target-libssp=all
maybe-all-target-libssp: all-target-libssp
all-target-libssp: configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29628,7 +31903,7 @@
maybe-check-target-libssp: check-target-libssp
check-target-libssp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29643,7 +31918,7 @@
maybe-install-target-libssp: install-target-libssp
install-target-libssp: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29661,7 +31936,7 @@
info-target-libssp: \
configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29687,7 +31962,7 @@
dvi-target-libssp: \
configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29713,7 +31988,7 @@
html-target-libssp: \
configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29739,7 +32014,7 @@
TAGS-target-libssp: \
configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29766,7 +32041,7 @@
install-info-target-libssp: \
configure-target-libssp \
info-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29785,6 +32060,33 @@
@endif target-libssp
+.PHONY: maybe-install-html-target-libssp install-html-target-libssp
+maybe-install-html-target-libssp:
+ at if target-libssp
+maybe-install-html-target-libssp: install-html-target-libssp
+
+install-html-target-libssp: \
+ configure-target-libssp \
+ html-target-libssp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libssp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libssp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libssp
+
.PHONY: maybe-installcheck-target-libssp installcheck-target-libssp
maybe-installcheck-target-libssp:
@if target-libssp
@@ -29792,7 +32094,7 @@
installcheck-target-libssp: \
configure-target-libssp
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29817,7 +32119,7 @@
maybe-mostlyclean-target-libssp: mostlyclean-target-libssp
mostlyclean-target-libssp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29842,7 +32144,7 @@
maybe-clean-target-libssp: clean-target-libssp
clean-target-libssp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29867,7 +32169,7 @@
maybe-distclean-target-libssp: distclean-target-libssp
distclean-target-libssp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29892,7 +32194,7 @@
maybe-maintainer-clean-target-libssp: maintainer-clean-target-libssp
maintainer-clean-target-libssp:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libssp/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -29913,26 +32215,412 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-newlib
-$(TARGET_SUBDIR)/newlib/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/newlib ; \
- rm -f $(TARGET_SUBDIR)/newlib/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/newlib/multilib.out
- at endif target-newlib
+.PHONY: configure-target-libgcc-math maybe-configure-target-libgcc-math
+maybe-configure-target-libgcc-math:
+ at if target-libgcc-math
+maybe-configure-target-libgcc-math: configure-target-libgcc-math
+configure-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libgcc-math..."; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc-math ; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc-math/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libgcc-math/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libgcc-math/multilib.tmp $(TARGET_SUBDIR)/libgcc-math/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libgcc-math/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libgcc-math/Makefile; \
+ mv $(TARGET_SUBDIR)/libgcc-math/multilib.tmp $(TARGET_SUBDIR)/libgcc-math/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libgcc-math/multilib.tmp $(TARGET_SUBDIR)/libgcc-math/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libgcc-math/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc-math ; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo Configuring in $(TARGET_SUBDIR)/libgcc-math; \
+ cd "$(TARGET_SUBDIR)/libgcc-math" || exit 1; \
+ case $(srcdir) in \
+ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ *) topdir=`echo $(TARGET_SUBDIR)/libgcc-math/ | \
+ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ esac; \
+ srcdiroption="--srcdir=$${topdir}/libgcc-math"; \
+ libsrcdir="$$s/libgcc-math"; \
+ rm -f no-such-file || : ; \
+ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \
+ $(TARGET_CONFIGARGS) $${srcdiroption} \
+ || exit 1
+ at endif target-libgcc-math
+
+
+
+
+.PHONY: all-target-libgcc-math maybe-all-target-libgcc-math
+maybe-all-target-libgcc-math:
+ at if target-libgcc-math
+TARGET-target-libgcc-math=all
+maybe-all-target-libgcc-math: all-target-libgcc-math
+all-target-libgcc-math: configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) $(TARGET-target-libgcc-math))
+ at endif target-libgcc-math
+
+
+
+
+
+.PHONY: check-target-libgcc-math maybe-check-target-libgcc-math
+maybe-check-target-libgcc-math:
+ at if target-libgcc-math
+maybe-check-target-libgcc-math: check-target-libgcc-math
+
+check-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) check)
+
+ at endif target-libgcc-math
+
+.PHONY: install-target-libgcc-math maybe-install-target-libgcc-math
+maybe-install-target-libgcc-math:
+ at if target-libgcc-math
+maybe-install-target-libgcc-math: install-target-libgcc-math
+
+install-target-libgcc-math: installdirs
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) install)
+
+ at endif target-libgcc-math
+
+# Other targets (info, dvi, etc.)
+
+.PHONY: maybe-info-target-libgcc-math info-target-libgcc-math
+maybe-info-target-libgcc-math:
+ at if target-libgcc-math
+maybe-info-target-libgcc-math: info-target-libgcc-math
+
+info-target-libgcc-math: \
+ configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing info in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ info) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-dvi-target-libgcc-math dvi-target-libgcc-math
+maybe-dvi-target-libgcc-math:
+ at if target-libgcc-math
+maybe-dvi-target-libgcc-math: dvi-target-libgcc-math
+
+dvi-target-libgcc-math: \
+ configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing dvi in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ dvi) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-html-target-libgcc-math html-target-libgcc-math
+maybe-html-target-libgcc-math:
+ at if target-libgcc-math
+maybe-html-target-libgcc-math: html-target-libgcc-math
+
+html-target-libgcc-math: \
+ configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing html in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ html) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-TAGS-target-libgcc-math TAGS-target-libgcc-math
+maybe-TAGS-target-libgcc-math:
+ at if target-libgcc-math
+maybe-TAGS-target-libgcc-math: TAGS-target-libgcc-math
+
+TAGS-target-libgcc-math: \
+ configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing TAGS in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ TAGS) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-install-info-target-libgcc-math install-info-target-libgcc-math
+maybe-install-info-target-libgcc-math:
+ at if target-libgcc-math
+maybe-install-info-target-libgcc-math: install-info-target-libgcc-math
+
+install-info-target-libgcc-math: \
+ configure-target-libgcc-math \
+ info-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-info in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-info) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-install-html-target-libgcc-math install-html-target-libgcc-math
+maybe-install-html-target-libgcc-math:
+ at if target-libgcc-math
+maybe-install-html-target-libgcc-math: install-html-target-libgcc-math
+
+install-html-target-libgcc-math: \
+ configure-target-libgcc-math \
+ html-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-installcheck-target-libgcc-math installcheck-target-libgcc-math
+maybe-installcheck-target-libgcc-math:
+ at if target-libgcc-math
+maybe-installcheck-target-libgcc-math: installcheck-target-libgcc-math
+
+installcheck-target-libgcc-math: \
+ configure-target-libgcc-math
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing installcheck in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ installcheck) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-mostlyclean-target-libgcc-math mostlyclean-target-libgcc-math
+maybe-mostlyclean-target-libgcc-math:
+ at if target-libgcc-math
+maybe-mostlyclean-target-libgcc-math: mostlyclean-target-libgcc-math
+
+mostlyclean-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ mostlyclean) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-clean-target-libgcc-math clean-target-libgcc-math
+maybe-clean-target-libgcc-math:
+ at if target-libgcc-math
+maybe-clean-target-libgcc-math: clean-target-libgcc-math
+
+clean-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing clean in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ clean) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-distclean-target-libgcc-math distclean-target-libgcc-math
+maybe-distclean-target-libgcc-math:
+ at if target-libgcc-math
+maybe-distclean-target-libgcc-math: distclean-target-libgcc-math
+
+distclean-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing distclean in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ distclean) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+.PHONY: maybe-maintainer-clean-target-libgcc-math maintainer-clean-target-libgcc-math
+maybe-maintainer-clean-target-libgcc-math:
+ at if target-libgcc-math
+maybe-maintainer-clean-target-libgcc-math: maintainer-clean-target-libgcc-math
+
+maintainer-clean-target-libgcc-math:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgcc-math/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgcc-math" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgcc-math && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ maintainer-clean) \
+ || exit 1
+
+ at endif target-libgcc-math
+
+
+
+
+
.PHONY: configure-target-newlib maybe-configure-target-newlib
maybe-configure-target-newlib:
@if target-newlib
maybe-configure-target-newlib: configure-target-newlib
-configure-target-newlib: $(TARGET_SUBDIR)/newlib/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/newlib/Makefile || exit 0; \
+configure-target-newlib:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for newlib..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/newlib ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/newlib/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/newlib/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/newlib/multilib.tmp $(TARGET_SUBDIR)/newlib/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/newlib/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/newlib/Makefile; \
+ mv $(TARGET_SUBDIR)/newlib/multilib.tmp $(TARGET_SUBDIR)/newlib/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/newlib/multilib.tmp $(TARGET_SUBDIR)/newlib/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/newlib/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/newlib ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/newlib; \
cd "$(TARGET_SUBDIR)/newlib" || exit 1; \
@@ -29959,7 +32647,7 @@
TARGET-target-newlib=all
maybe-all-target-newlib: all-target-newlib
all-target-newlib: configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29977,7 +32665,7 @@
maybe-check-target-newlib: check-target-newlib
check-target-newlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -29992,7 +32680,7 @@
maybe-install-target-newlib: install-target-newlib
install-target-newlib: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30010,7 +32698,7 @@
info-target-newlib: \
configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30036,7 +32724,7 @@
dvi-target-newlib: \
configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30062,7 +32750,7 @@
html-target-newlib: \
configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30088,7 +32776,7 @@
TAGS-target-newlib: \
configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30115,7 +32803,7 @@
install-info-target-newlib: \
configure-target-newlib \
info-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30134,6 +32822,33 @@
@endif target-newlib
+.PHONY: maybe-install-html-target-newlib install-html-target-newlib
+maybe-install-html-target-newlib:
+ at if target-newlib
+maybe-install-html-target-newlib: install-html-target-newlib
+
+install-html-target-newlib: \
+ configure-target-newlib \
+ html-target-newlib
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/newlib" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/newlib && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-newlib
+
.PHONY: maybe-installcheck-target-newlib installcheck-target-newlib
maybe-installcheck-target-newlib:
@if target-newlib
@@ -30141,7 +32856,7 @@
installcheck-target-newlib: \
configure-target-newlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30166,7 +32881,7 @@
maybe-mostlyclean-target-newlib: mostlyclean-target-newlib
mostlyclean-target-newlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30191,7 +32906,7 @@
maybe-clean-target-newlib: clean-target-newlib
clean-target-newlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30216,7 +32931,7 @@
maybe-distclean-target-newlib: distclean-target-newlib
distclean-target-newlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30241,7 +32956,7 @@
maybe-maintainer-clean-target-newlib: maintainer-clean-target-newlib
maintainer-clean-target-newlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/newlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30262,26 +32977,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libgfortran
-$(TARGET_SUBDIR)/libgfortran/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgfortran ; \
- rm -f $(TARGET_SUBDIR)/libgfortran/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libgfortran/multilib.out
- at endif target-libgfortran
-
.PHONY: configure-target-libgfortran maybe-configure-target-libgfortran
maybe-configure-target-libgfortran:
@if target-libgfortran
maybe-configure-target-libgfortran: configure-target-libgfortran
-configure-target-libgfortran: $(TARGET_SUBDIR)/libgfortran/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libgfortran/Makefile || exit 0; \
+configure-target-libgfortran:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libgfortran..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgfortran ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgfortran/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libgfortran/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libgfortran/multilib.tmp $(TARGET_SUBDIR)/libgfortran/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libgfortran/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libgfortran/Makefile; \
+ mv $(TARGET_SUBDIR)/libgfortran/multilib.tmp $(TARGET_SUBDIR)/libgfortran/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libgfortran/multilib.tmp $(TARGET_SUBDIR)/libgfortran/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libgfortran/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgfortran ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libgfortran; \
cd "$(TARGET_SUBDIR)/libgfortran" || exit 1; \
@@ -30308,7 +33028,7 @@
TARGET-target-libgfortran=all
maybe-all-target-libgfortran: all-target-libgfortran
all-target-libgfortran: configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30326,7 +33046,7 @@
maybe-check-target-libgfortran: check-target-libgfortran
check-target-libgfortran:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30341,7 +33061,7 @@
maybe-install-target-libgfortran: install-target-libgfortran
install-target-libgfortran: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30359,7 +33079,7 @@
info-target-libgfortran: \
configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30385,7 +33105,7 @@
dvi-target-libgfortran: \
configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30411,7 +33131,7 @@
html-target-libgfortran: \
configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30437,7 +33157,7 @@
TAGS-target-libgfortran: \
configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30464,7 +33184,7 @@
install-info-target-libgfortran: \
configure-target-libgfortran \
info-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30483,6 +33203,33 @@
@endif target-libgfortran
+.PHONY: maybe-install-html-target-libgfortran install-html-target-libgfortran
+maybe-install-html-target-libgfortran:
+ at if target-libgfortran
+maybe-install-html-target-libgfortran: install-html-target-libgfortran
+
+install-html-target-libgfortran: \
+ configure-target-libgfortran \
+ html-target-libgfortran
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libgfortran" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgfortran && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libgfortran
+
.PHONY: maybe-installcheck-target-libgfortran installcheck-target-libgfortran
maybe-installcheck-target-libgfortran:
@if target-libgfortran
@@ -30490,7 +33237,7 @@
installcheck-target-libgfortran: \
configure-target-libgfortran
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30515,7 +33262,7 @@
maybe-mostlyclean-target-libgfortran: mostlyclean-target-libgfortran
mostlyclean-target-libgfortran:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30540,7 +33287,7 @@
maybe-clean-target-libgfortran: clean-target-libgfortran
clean-target-libgfortran:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30565,7 +33312,7 @@
maybe-distclean-target-libgfortran: distclean-target-libgfortran
distclean-target-libgfortran:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30590,7 +33337,7 @@
maybe-maintainer-clean-target-libgfortran: maintainer-clean-target-libgfortran
maintainer-clean-target-libgfortran:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgfortran/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30611,26 +33358,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libobjc
-$(TARGET_SUBDIR)/libobjc/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libobjc ; \
- rm -f $(TARGET_SUBDIR)/libobjc/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libobjc/multilib.out
- at endif target-libobjc
-
.PHONY: configure-target-libobjc maybe-configure-target-libobjc
maybe-configure-target-libobjc:
@if target-libobjc
maybe-configure-target-libobjc: configure-target-libobjc
-configure-target-libobjc: $(TARGET_SUBDIR)/libobjc/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libobjc/Makefile || exit 0; \
+configure-target-libobjc:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libobjc..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libobjc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libobjc/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libobjc/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libobjc/multilib.tmp $(TARGET_SUBDIR)/libobjc/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libobjc/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libobjc/Makefile; \
+ mv $(TARGET_SUBDIR)/libobjc/multilib.tmp $(TARGET_SUBDIR)/libobjc/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libobjc/multilib.tmp $(TARGET_SUBDIR)/libobjc/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libobjc/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libobjc ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libobjc; \
cd "$(TARGET_SUBDIR)/libobjc" || exit 1; \
@@ -30657,7 +33409,7 @@
TARGET-target-libobjc=all
maybe-all-target-libobjc: all-target-libobjc
all-target-libobjc: configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30675,7 +33427,7 @@
maybe-check-target-libobjc: check-target-libobjc
check-target-libobjc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30690,7 +33442,7 @@
maybe-install-target-libobjc: install-target-libobjc
install-target-libobjc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -30708,7 +33460,7 @@
info-target-libobjc: \
configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30734,7 +33486,7 @@
dvi-target-libobjc: \
configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30760,7 +33512,7 @@
html-target-libobjc: \
configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30786,7 +33538,7 @@
TAGS-target-libobjc: \
configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30813,7 +33565,7 @@
install-info-target-libobjc: \
configure-target-libobjc \
info-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30832,6 +33584,33 @@
@endif target-libobjc
+.PHONY: maybe-install-html-target-libobjc install-html-target-libobjc
+maybe-install-html-target-libobjc:
+ at if target-libobjc
+maybe-install-html-target-libobjc: install-html-target-libobjc
+
+install-html-target-libobjc: \
+ configure-target-libobjc \
+ html-target-libobjc
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libobjc" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libobjc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libobjc
+
.PHONY: maybe-installcheck-target-libobjc installcheck-target-libobjc
maybe-installcheck-target-libobjc:
@if target-libobjc
@@ -30839,7 +33618,7 @@
installcheck-target-libobjc: \
configure-target-libobjc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30864,7 +33643,7 @@
maybe-mostlyclean-target-libobjc: mostlyclean-target-libobjc
mostlyclean-target-libobjc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30889,7 +33668,7 @@
maybe-clean-target-libobjc: clean-target-libobjc
clean-target-libobjc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30914,7 +33693,7 @@
maybe-distclean-target-libobjc: distclean-target-libobjc
distclean-target-libobjc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30939,7 +33718,7 @@
maybe-maintainer-clean-target-libobjc: maintainer-clean-target-libobjc
maintainer-clean-target-libobjc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libobjc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -30960,26 +33739,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libtermcap
-$(TARGET_SUBDIR)/libtermcap/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libtermcap ; \
- rm -f $(TARGET_SUBDIR)/libtermcap/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libtermcap/multilib.out
- at endif target-libtermcap
-
.PHONY: configure-target-libtermcap maybe-configure-target-libtermcap
maybe-configure-target-libtermcap:
@if target-libtermcap
maybe-configure-target-libtermcap: configure-target-libtermcap
-configure-target-libtermcap: $(TARGET_SUBDIR)/libtermcap/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libtermcap/Makefile || exit 0; \
+configure-target-libtermcap:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libtermcap..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libtermcap ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libtermcap/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libtermcap/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libtermcap/multilib.tmp $(TARGET_SUBDIR)/libtermcap/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libtermcap/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libtermcap/Makefile; \
+ mv $(TARGET_SUBDIR)/libtermcap/multilib.tmp $(TARGET_SUBDIR)/libtermcap/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libtermcap/multilib.tmp $(TARGET_SUBDIR)/libtermcap/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libtermcap/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libtermcap ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libtermcap; \
cd "$(TARGET_SUBDIR)/libtermcap" || exit 1; \
@@ -31006,7 +33790,7 @@
TARGET-target-libtermcap=all
maybe-all-target-libtermcap: all-target-libtermcap
all-target-libtermcap: configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31034,7 +33818,7 @@
maybe-install-target-libtermcap: install-target-libtermcap
install-target-libtermcap: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31052,7 +33836,7 @@
info-target-libtermcap: \
configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31078,7 +33862,7 @@
dvi-target-libtermcap: \
configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31104,7 +33888,7 @@
html-target-libtermcap: \
configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31130,7 +33914,7 @@
TAGS-target-libtermcap: \
configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31157,7 +33941,7 @@
install-info-target-libtermcap: \
configure-target-libtermcap \
info-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31176,6 +33960,33 @@
@endif target-libtermcap
+.PHONY: maybe-install-html-target-libtermcap install-html-target-libtermcap
+maybe-install-html-target-libtermcap:
+ at if target-libtermcap
+maybe-install-html-target-libtermcap: install-html-target-libtermcap
+
+install-html-target-libtermcap: \
+ configure-target-libtermcap \
+ html-target-libtermcap
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libtermcap" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libtermcap && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libtermcap
+
.PHONY: maybe-installcheck-target-libtermcap installcheck-target-libtermcap
maybe-installcheck-target-libtermcap:
@if target-libtermcap
@@ -31183,7 +33994,7 @@
installcheck-target-libtermcap: \
configure-target-libtermcap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libtermcap/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31244,26 +34055,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-winsup
-$(TARGET_SUBDIR)/winsup/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/winsup ; \
- rm -f $(TARGET_SUBDIR)/winsup/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/winsup/multilib.out
- at endif target-winsup
-
.PHONY: configure-target-winsup maybe-configure-target-winsup
maybe-configure-target-winsup:
@if target-winsup
maybe-configure-target-winsup: configure-target-winsup
-configure-target-winsup: $(TARGET_SUBDIR)/winsup/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/winsup/Makefile || exit 0; \
+configure-target-winsup:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for winsup..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/winsup ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/winsup/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/winsup/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/winsup/multilib.tmp $(TARGET_SUBDIR)/winsup/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/winsup/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/winsup/Makefile; \
+ mv $(TARGET_SUBDIR)/winsup/multilib.tmp $(TARGET_SUBDIR)/winsup/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/winsup/multilib.tmp $(TARGET_SUBDIR)/winsup/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/winsup/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/winsup ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/winsup; \
cd "$(TARGET_SUBDIR)/winsup" || exit 1; \
@@ -31290,7 +34106,7 @@
TARGET-target-winsup=all
maybe-all-target-winsup: all-target-winsup
all-target-winsup: configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31308,7 +34124,7 @@
maybe-check-target-winsup: check-target-winsup
check-target-winsup:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31323,7 +34139,7 @@
maybe-install-target-winsup: install-target-winsup
install-target-winsup: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31341,7 +34157,7 @@
info-target-winsup: \
configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31367,7 +34183,7 @@
dvi-target-winsup: \
configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31393,7 +34209,7 @@
html-target-winsup: \
configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31419,7 +34235,7 @@
TAGS-target-winsup: \
configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31446,7 +34262,7 @@
install-info-target-winsup: \
configure-target-winsup \
info-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31465,6 +34281,33 @@
@endif target-winsup
+.PHONY: maybe-install-html-target-winsup install-html-target-winsup
+maybe-install-html-target-winsup:
+ at if target-winsup
+maybe-install-html-target-winsup: install-html-target-winsup
+
+install-html-target-winsup: \
+ configure-target-winsup \
+ html-target-winsup
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/winsup" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/winsup && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-winsup
+
.PHONY: maybe-installcheck-target-winsup installcheck-target-winsup
maybe-installcheck-target-winsup:
@if target-winsup
@@ -31472,7 +34315,7 @@
installcheck-target-winsup: \
configure-target-winsup
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31497,7 +34340,7 @@
maybe-mostlyclean-target-winsup: mostlyclean-target-winsup
mostlyclean-target-winsup:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31522,7 +34365,7 @@
maybe-clean-target-winsup: clean-target-winsup
clean-target-winsup:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31547,7 +34390,7 @@
maybe-distclean-target-winsup: distclean-target-winsup
distclean-target-winsup:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31572,7 +34415,7 @@
maybe-maintainer-clean-target-winsup: maintainer-clean-target-winsup
maintainer-clean-target-winsup:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/winsup/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31593,26 +34436,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libgloss
-$(TARGET_SUBDIR)/libgloss/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgloss ; \
- rm -f $(TARGET_SUBDIR)/libgloss/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libgloss/multilib.out
- at endif target-libgloss
-
.PHONY: configure-target-libgloss maybe-configure-target-libgloss
maybe-configure-target-libgloss:
@if target-libgloss
maybe-configure-target-libgloss: configure-target-libgloss
-configure-target-libgloss: $(TARGET_SUBDIR)/libgloss/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libgloss/Makefile || exit 0; \
+configure-target-libgloss:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libgloss..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgloss ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgloss/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libgloss/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libgloss/multilib.tmp $(TARGET_SUBDIR)/libgloss/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libgloss/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libgloss/Makefile; \
+ mv $(TARGET_SUBDIR)/libgloss/multilib.tmp $(TARGET_SUBDIR)/libgloss/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libgloss/multilib.tmp $(TARGET_SUBDIR)/libgloss/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libgloss/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgloss ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libgloss; \
cd "$(TARGET_SUBDIR)/libgloss" || exit 1; \
@@ -31639,7 +34487,7 @@
TARGET-target-libgloss=all
maybe-all-target-libgloss: all-target-libgloss
all-target-libgloss: configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31667,7 +34515,7 @@
maybe-install-target-libgloss: install-target-libgloss
install-target-libgloss: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -31685,7 +34533,7 @@
info-target-libgloss: \
configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31711,7 +34559,7 @@
dvi-target-libgloss: \
configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31737,7 +34585,7 @@
html-target-libgloss: \
configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31763,7 +34611,7 @@
TAGS-target-libgloss: \
configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31790,7 +34638,7 @@
install-info-target-libgloss: \
configure-target-libgloss \
info-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31809,6 +34657,33 @@
@endif target-libgloss
+.PHONY: maybe-install-html-target-libgloss install-html-target-libgloss
+maybe-install-html-target-libgloss:
+ at if target-libgloss
+maybe-install-html-target-libgloss: install-html-target-libgloss
+
+install-html-target-libgloss: \
+ configure-target-libgloss \
+ html-target-libgloss
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libgloss" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgloss && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libgloss
+
.PHONY: maybe-installcheck-target-libgloss installcheck-target-libgloss
maybe-installcheck-target-libgloss:
@if target-libgloss
@@ -31816,7 +34691,7 @@
installcheck-target-libgloss: \
configure-target-libgloss
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31841,7 +34716,7 @@
maybe-mostlyclean-target-libgloss: mostlyclean-target-libgloss
mostlyclean-target-libgloss:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31866,7 +34741,7 @@
maybe-clean-target-libgloss: clean-target-libgloss
clean-target-libgloss:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31891,7 +34766,7 @@
maybe-distclean-target-libgloss: distclean-target-libgloss
distclean-target-libgloss:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31916,7 +34791,7 @@
maybe-maintainer-clean-target-libgloss: maintainer-clean-target-libgloss
maintainer-clean-target-libgloss:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libgloss/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -31937,26 +34812,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libiberty
-$(TARGET_SUBDIR)/libiberty/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \
- rm -f $(TARGET_SUBDIR)/libiberty/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libiberty/multilib.out
- at endif target-libiberty
-
.PHONY: configure-target-libiberty maybe-configure-target-libiberty
maybe-configure-target-libiberty:
@if target-libiberty
maybe-configure-target-libiberty: configure-target-libiberty
-configure-target-libiberty: $(TARGET_SUBDIR)/libiberty/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libiberty/Makefile || exit 0; \
+configure-target-libiberty:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libiberty..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libiberty/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libiberty/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libiberty/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libiberty/Makefile; \
+ mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libiberty/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libiberty; \
cd "$(TARGET_SUBDIR)/libiberty" || exit 1; \
@@ -31983,7 +34863,7 @@
TARGET-target-libiberty=all
maybe-all-target-libiberty: all-target-libiberty
all-target-libiberty: configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32001,7 +34881,7 @@
maybe-check-target-libiberty: check-target-libiberty
check-target-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32016,7 +34896,7 @@
maybe-install-target-libiberty: install-target-libiberty
install-target-libiberty: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32034,7 +34914,7 @@
info-target-libiberty: \
configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32060,7 +34940,7 @@
dvi-target-libiberty: \
configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32086,7 +34966,7 @@
html-target-libiberty: \
configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32112,7 +34992,7 @@
TAGS-target-libiberty: \
configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32139,7 +35019,7 @@
install-info-target-libiberty: \
configure-target-libiberty \
info-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32158,6 +35038,33 @@
@endif target-libiberty
+.PHONY: maybe-install-html-target-libiberty install-html-target-libiberty
+maybe-install-html-target-libiberty:
+ at if target-libiberty
+maybe-install-html-target-libiberty: install-html-target-libiberty
+
+install-html-target-libiberty: \
+ configure-target-libiberty \
+ html-target-libiberty
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libiberty" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libiberty && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libiberty
+
.PHONY: maybe-installcheck-target-libiberty installcheck-target-libiberty
maybe-installcheck-target-libiberty:
@if target-libiberty
@@ -32165,7 +35072,7 @@
installcheck-target-libiberty: \
configure-target-libiberty
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32190,7 +35097,7 @@
maybe-mostlyclean-target-libiberty: mostlyclean-target-libiberty
mostlyclean-target-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32215,7 +35122,7 @@
maybe-clean-target-libiberty: clean-target-libiberty
clean-target-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32240,7 +35147,7 @@
maybe-distclean-target-libiberty: distclean-target-libiberty
distclean-target-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32265,7 +35172,7 @@
maybe-maintainer-clean-target-libiberty: maintainer-clean-target-libiberty
maintainer-clean-target-libiberty:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32286,26 +35193,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-gperf
-$(TARGET_SUBDIR)/gperf/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/gperf ; \
- rm -f $(TARGET_SUBDIR)/gperf/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/gperf/multilib.out
- at endif target-gperf
-
.PHONY: configure-target-gperf maybe-configure-target-gperf
maybe-configure-target-gperf:
@if target-gperf
maybe-configure-target-gperf: configure-target-gperf
-configure-target-gperf: $(TARGET_SUBDIR)/gperf/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/gperf/Makefile || exit 0; \
+configure-target-gperf:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for gperf..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/gperf ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/gperf/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/gperf/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/gperf/multilib.tmp $(TARGET_SUBDIR)/gperf/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/gperf/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/gperf/Makefile; \
+ mv $(TARGET_SUBDIR)/gperf/multilib.tmp $(TARGET_SUBDIR)/gperf/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/gperf/multilib.tmp $(TARGET_SUBDIR)/gperf/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/gperf/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/gperf ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/gperf; \
cd "$(TARGET_SUBDIR)/gperf" || exit 1; \
@@ -32332,7 +35244,7 @@
TARGET-target-gperf=all
maybe-all-target-gperf: all-target-gperf
all-target-gperf: configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32350,7 +35262,7 @@
maybe-check-target-gperf: check-target-gperf
check-target-gperf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32365,7 +35277,7 @@
maybe-install-target-gperf: install-target-gperf
install-target-gperf: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32383,7 +35295,7 @@
info-target-gperf: \
configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32409,7 +35321,7 @@
dvi-target-gperf: \
configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32435,7 +35347,7 @@
html-target-gperf: \
configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32461,7 +35373,7 @@
TAGS-target-gperf: \
configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32488,7 +35400,7 @@
install-info-target-gperf: \
configure-target-gperf \
info-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32507,6 +35419,33 @@
@endif target-gperf
+.PHONY: maybe-install-html-target-gperf install-html-target-gperf
+maybe-install-html-target-gperf:
+ at if target-gperf
+maybe-install-html-target-gperf: install-html-target-gperf
+
+install-html-target-gperf: \
+ configure-target-gperf \
+ html-target-gperf
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/gperf" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/gperf && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-gperf
+
.PHONY: maybe-installcheck-target-gperf installcheck-target-gperf
maybe-installcheck-target-gperf:
@if target-gperf
@@ -32514,7 +35453,7 @@
installcheck-target-gperf: \
configure-target-gperf
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32539,7 +35478,7 @@
maybe-mostlyclean-target-gperf: mostlyclean-target-gperf
mostlyclean-target-gperf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32564,7 +35503,7 @@
maybe-clean-target-gperf: clean-target-gperf
clean-target-gperf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32589,7 +35528,7 @@
maybe-distclean-target-gperf: distclean-target-gperf
distclean-target-gperf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32614,7 +35553,7 @@
maybe-maintainer-clean-target-gperf: maintainer-clean-target-gperf
maintainer-clean-target-gperf:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/gperf/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32635,26 +35574,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-examples
-$(TARGET_SUBDIR)/examples/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/examples ; \
- rm -f $(TARGET_SUBDIR)/examples/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/examples/multilib.out
- at endif target-examples
-
.PHONY: configure-target-examples maybe-configure-target-examples
maybe-configure-target-examples:
@if target-examples
maybe-configure-target-examples: configure-target-examples
-configure-target-examples: $(TARGET_SUBDIR)/examples/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/examples/Makefile || exit 0; \
+configure-target-examples:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for examples..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/examples ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/examples/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/examples/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/examples/multilib.tmp $(TARGET_SUBDIR)/examples/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/examples/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/examples/Makefile; \
+ mv $(TARGET_SUBDIR)/examples/multilib.tmp $(TARGET_SUBDIR)/examples/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/examples/multilib.tmp $(TARGET_SUBDIR)/examples/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/examples/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/examples ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/examples; \
cd "$(TARGET_SUBDIR)/examples" || exit 1; \
@@ -32681,7 +35625,7 @@
TARGET-target-examples=all
maybe-all-target-examples: all-target-examples
all-target-examples: configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -32722,7 +35666,7 @@
info-target-examples: \
configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32748,7 +35692,7 @@
dvi-target-examples: \
configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32774,7 +35718,7 @@
html-target-examples: \
configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32800,7 +35744,7 @@
TAGS-target-examples: \
configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32827,7 +35771,7 @@
install-info-target-examples: \
configure-target-examples \
info-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32846,6 +35790,33 @@
@endif target-examples
+.PHONY: maybe-install-html-target-examples install-html-target-examples
+maybe-install-html-target-examples:
+ at if target-examples
+maybe-install-html-target-examples: install-html-target-examples
+
+install-html-target-examples: \
+ configure-target-examples \
+ html-target-examples
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/examples" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/examples && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-examples
+
.PHONY: maybe-installcheck-target-examples installcheck-target-examples
maybe-installcheck-target-examples:
@if target-examples
@@ -32853,7 +35824,7 @@
installcheck-target-examples: \
configure-target-examples
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32878,7 +35849,7 @@
maybe-mostlyclean-target-examples: mostlyclean-target-examples
mostlyclean-target-examples:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32903,7 +35874,7 @@
maybe-clean-target-examples: clean-target-examples
clean-target-examples:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32928,7 +35899,7 @@
maybe-distclean-target-examples: distclean-target-examples
distclean-target-examples:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32953,7 +35924,7 @@
maybe-maintainer-clean-target-examples: maintainer-clean-target-examples
maintainer-clean-target-examples:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/examples/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -32974,26 +35945,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libffi
-$(TARGET_SUBDIR)/libffi/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libffi ; \
- rm -f $(TARGET_SUBDIR)/libffi/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libffi/multilib.out
- at endif target-libffi
-
.PHONY: configure-target-libffi maybe-configure-target-libffi
maybe-configure-target-libffi:
@if target-libffi
maybe-configure-target-libffi: configure-target-libffi
-configure-target-libffi: $(TARGET_SUBDIR)/libffi/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libffi/Makefile || exit 0; \
+configure-target-libffi:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libffi..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libffi ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libffi/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libffi/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libffi/multilib.tmp $(TARGET_SUBDIR)/libffi/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libffi/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libffi/Makefile; \
+ mv $(TARGET_SUBDIR)/libffi/multilib.tmp $(TARGET_SUBDIR)/libffi/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libffi/multilib.tmp $(TARGET_SUBDIR)/libffi/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libffi/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libffi ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libffi; \
cd "$(TARGET_SUBDIR)/libffi" || exit 1; \
@@ -33020,7 +35996,7 @@
TARGET-target-libffi=all
maybe-all-target-libffi: all-target-libffi
all-target-libffi: configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33038,7 +36014,7 @@
maybe-check-target-libffi: check-target-libffi
check-target-libffi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33053,7 +36029,7 @@
maybe-install-target-libffi: install-target-libffi
install-target-libffi: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33071,7 +36047,7 @@
info-target-libffi: \
configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33097,7 +36073,7 @@
dvi-target-libffi: \
configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33123,7 +36099,7 @@
html-target-libffi: \
configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33149,7 +36125,7 @@
TAGS-target-libffi: \
configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33176,7 +36152,7 @@
install-info-target-libffi: \
configure-target-libffi \
info-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33195,6 +36171,33 @@
@endif target-libffi
+.PHONY: maybe-install-html-target-libffi install-html-target-libffi
+maybe-install-html-target-libffi:
+ at if target-libffi
+maybe-install-html-target-libffi: install-html-target-libffi
+
+install-html-target-libffi: \
+ configure-target-libffi \
+ html-target-libffi
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libffi" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libffi && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libffi
+
.PHONY: maybe-installcheck-target-libffi installcheck-target-libffi
maybe-installcheck-target-libffi:
@if target-libffi
@@ -33202,7 +36205,7 @@
installcheck-target-libffi: \
configure-target-libffi
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33227,7 +36230,7 @@
maybe-mostlyclean-target-libffi: mostlyclean-target-libffi
mostlyclean-target-libffi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33252,7 +36255,7 @@
maybe-clean-target-libffi: clean-target-libffi
clean-target-libffi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33277,7 +36280,7 @@
maybe-distclean-target-libffi: distclean-target-libffi
distclean-target-libffi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33302,7 +36305,7 @@
maybe-maintainer-clean-target-libffi: maintainer-clean-target-libffi
maintainer-clean-target-libffi:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libffi/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33323,26 +36326,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libjava
-$(TARGET_SUBDIR)/libjava/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libjava ; \
- rm -f $(TARGET_SUBDIR)/libjava/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libjava/multilib.out
- at endif target-libjava
-
.PHONY: configure-target-libjava maybe-configure-target-libjava
maybe-configure-target-libjava:
@if target-libjava
maybe-configure-target-libjava: configure-target-libjava
-configure-target-libjava: $(TARGET_SUBDIR)/libjava/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libjava/Makefile || exit 0; \
+configure-target-libjava:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libjava..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libjava ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libjava/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libjava/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libjava/multilib.tmp $(TARGET_SUBDIR)/libjava/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libjava/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libjava/Makefile; \
+ mv $(TARGET_SUBDIR)/libjava/multilib.tmp $(TARGET_SUBDIR)/libjava/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libjava/multilib.tmp $(TARGET_SUBDIR)/libjava/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libjava/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libjava ; \
$(RAW_CXX_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libjava; \
cd "$(TARGET_SUBDIR)/libjava" || exit 1; \
@@ -33369,7 +36377,7 @@
TARGET-target-libjava=all
maybe-all-target-libjava: all-target-libjava
all-target-libjava: configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -33387,7 +36395,7 @@
maybe-check-target-libjava: check-target-libjava
check-target-libjava:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -33402,7 +36410,7 @@
maybe-install-target-libjava: install-target-libjava
install-target-libjava: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(RAW_CXX_TARGET_EXPORTS) \
@@ -33420,7 +36428,7 @@
info-target-libjava: \
configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33446,7 +36454,7 @@
dvi-target-libjava: \
configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33472,7 +36480,7 @@
html-target-libjava: \
configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33498,7 +36506,7 @@
TAGS-target-libjava: \
configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33525,7 +36533,7 @@
install-info-target-libjava: \
configure-target-libjava \
info-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33544,6 +36552,33 @@
@endif target-libjava
+.PHONY: maybe-install-html-target-libjava install-html-target-libjava
+maybe-install-html-target-libjava:
+ at if target-libjava
+maybe-install-html-target-libjava: install-html-target-libjava
+
+install-html-target-libjava: \
+ configure-target-libjava \
+ html-target-libjava
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(RAW_CXX_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libjava" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libjava && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libjava
+
.PHONY: maybe-installcheck-target-libjava installcheck-target-libjava
maybe-installcheck-target-libjava:
@if target-libjava
@@ -33551,7 +36586,7 @@
installcheck-target-libjava: \
configure-target-libjava
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33576,7 +36611,7 @@
maybe-mostlyclean-target-libjava: mostlyclean-target-libjava
mostlyclean-target-libjava:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33601,7 +36636,7 @@
maybe-clean-target-libjava: clean-target-libjava
clean-target-libjava:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33626,7 +36661,7 @@
maybe-distclean-target-libjava: distclean-target-libjava
distclean-target-libjava:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33651,7 +36686,7 @@
maybe-maintainer-clean-target-libjava: maintainer-clean-target-libjava
maintainer-clean-target-libjava:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libjava/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33672,26 +36707,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-zlib
-$(TARGET_SUBDIR)/zlib/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/zlib ; \
- rm -f $(TARGET_SUBDIR)/zlib/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/zlib/multilib.out
- at endif target-zlib
-
.PHONY: configure-target-zlib maybe-configure-target-zlib
maybe-configure-target-zlib:
@if target-zlib
maybe-configure-target-zlib: configure-target-zlib
-configure-target-zlib: $(TARGET_SUBDIR)/zlib/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/zlib/Makefile || exit 0; \
+configure-target-zlib:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for zlib..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/zlib ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/zlib/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/zlib/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/zlib/multilib.tmp $(TARGET_SUBDIR)/zlib/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/zlib/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/zlib/Makefile; \
+ mv $(TARGET_SUBDIR)/zlib/multilib.tmp $(TARGET_SUBDIR)/zlib/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/zlib/multilib.tmp $(TARGET_SUBDIR)/zlib/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/zlib/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/zlib ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/zlib; \
cd "$(TARGET_SUBDIR)/zlib" || exit 1; \
@@ -33718,7 +36758,7 @@
TARGET-target-zlib=all
maybe-all-target-zlib: all-target-zlib
all-target-zlib: configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33736,7 +36776,7 @@
maybe-check-target-zlib: check-target-zlib
check-target-zlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33751,7 +36791,7 @@
maybe-install-target-zlib: install-target-zlib
install-target-zlib: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -33769,7 +36809,7 @@
info-target-zlib: \
configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33795,7 +36835,7 @@
dvi-target-zlib: \
configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33821,7 +36861,7 @@
html-target-zlib: \
configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33847,7 +36887,7 @@
TAGS-target-zlib: \
configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33874,7 +36914,7 @@
install-info-target-zlib: \
configure-target-zlib \
info-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33893,6 +36933,33 @@
@endif target-zlib
+.PHONY: maybe-install-html-target-zlib install-html-target-zlib
+maybe-install-html-target-zlib:
+ at if target-zlib
+maybe-install-html-target-zlib: install-html-target-zlib
+
+install-html-target-zlib: \
+ configure-target-zlib \
+ html-target-zlib
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/zlib" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/zlib && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-zlib
+
.PHONY: maybe-installcheck-target-zlib installcheck-target-zlib
maybe-installcheck-target-zlib:
@if target-zlib
@@ -33900,7 +36967,7 @@
installcheck-target-zlib: \
configure-target-zlib
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33925,7 +36992,7 @@
maybe-mostlyclean-target-zlib: mostlyclean-target-zlib
mostlyclean-target-zlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33950,7 +37017,7 @@
maybe-clean-target-zlib: clean-target-zlib
clean-target-zlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -33975,7 +37042,7 @@
maybe-distclean-target-zlib: distclean-target-zlib
distclean-target-zlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34000,7 +37067,7 @@
maybe-maintainer-clean-target-zlib: maintainer-clean-target-zlib
maintainer-clean-target-zlib:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/zlib/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34021,26 +37088,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-boehm-gc
-$(TARGET_SUBDIR)/boehm-gc/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/boehm-gc ; \
- rm -f $(TARGET_SUBDIR)/boehm-gc/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/boehm-gc/multilib.out
- at endif target-boehm-gc
-
.PHONY: configure-target-boehm-gc maybe-configure-target-boehm-gc
maybe-configure-target-boehm-gc:
@if target-boehm-gc
maybe-configure-target-boehm-gc: configure-target-boehm-gc
-configure-target-boehm-gc: $(TARGET_SUBDIR)/boehm-gc/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/boehm-gc/Makefile || exit 0; \
+configure-target-boehm-gc:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for boehm-gc..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/boehm-gc ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/boehm-gc/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/boehm-gc/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/boehm-gc/multilib.tmp $(TARGET_SUBDIR)/boehm-gc/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/boehm-gc/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/boehm-gc/Makefile; \
+ mv $(TARGET_SUBDIR)/boehm-gc/multilib.tmp $(TARGET_SUBDIR)/boehm-gc/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/boehm-gc/multilib.tmp $(TARGET_SUBDIR)/boehm-gc/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/boehm-gc/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/boehm-gc ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/boehm-gc; \
cd "$(TARGET_SUBDIR)/boehm-gc" || exit 1; \
@@ -34067,7 +37139,7 @@
TARGET-target-boehm-gc=all
maybe-all-target-boehm-gc: all-target-boehm-gc
all-target-boehm-gc: configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34085,7 +37157,7 @@
maybe-check-target-boehm-gc: check-target-boehm-gc
check-target-boehm-gc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34100,7 +37172,7 @@
maybe-install-target-boehm-gc: install-target-boehm-gc
install-target-boehm-gc: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34118,7 +37190,7 @@
info-target-boehm-gc: \
configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34144,7 +37216,7 @@
dvi-target-boehm-gc: \
configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34170,7 +37242,7 @@
html-target-boehm-gc: \
configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34196,7 +37268,7 @@
TAGS-target-boehm-gc: \
configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34223,7 +37295,7 @@
install-info-target-boehm-gc: \
configure-target-boehm-gc \
info-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34242,6 +37314,33 @@
@endif target-boehm-gc
+.PHONY: maybe-install-html-target-boehm-gc install-html-target-boehm-gc
+maybe-install-html-target-boehm-gc:
+ at if target-boehm-gc
+maybe-install-html-target-boehm-gc: install-html-target-boehm-gc
+
+install-html-target-boehm-gc: \
+ configure-target-boehm-gc \
+ html-target-boehm-gc
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/boehm-gc" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/boehm-gc && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-boehm-gc
+
.PHONY: maybe-installcheck-target-boehm-gc installcheck-target-boehm-gc
maybe-installcheck-target-boehm-gc:
@if target-boehm-gc
@@ -34249,7 +37348,7 @@
installcheck-target-boehm-gc: \
configure-target-boehm-gc
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34274,7 +37373,7 @@
maybe-mostlyclean-target-boehm-gc: mostlyclean-target-boehm-gc
mostlyclean-target-boehm-gc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34299,7 +37398,7 @@
maybe-clean-target-boehm-gc: clean-target-boehm-gc
clean-target-boehm-gc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34324,7 +37423,7 @@
maybe-distclean-target-boehm-gc: distclean-target-boehm-gc
distclean-target-boehm-gc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34349,7 +37448,7 @@
maybe-maintainer-clean-target-boehm-gc: maintainer-clean-target-boehm-gc
maintainer-clean-target-boehm-gc:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/boehm-gc/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34370,26 +37469,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-qthreads
-$(TARGET_SUBDIR)/qthreads/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/qthreads ; \
- rm -f $(TARGET_SUBDIR)/qthreads/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/qthreads/multilib.out
- at endif target-qthreads
-
.PHONY: configure-target-qthreads maybe-configure-target-qthreads
maybe-configure-target-qthreads:
@if target-qthreads
maybe-configure-target-qthreads: configure-target-qthreads
-configure-target-qthreads: $(TARGET_SUBDIR)/qthreads/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/qthreads/Makefile || exit 0; \
+configure-target-qthreads:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for qthreads..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/qthreads ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/qthreads/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/qthreads/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/qthreads/multilib.tmp $(TARGET_SUBDIR)/qthreads/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/qthreads/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/qthreads/Makefile; \
+ mv $(TARGET_SUBDIR)/qthreads/multilib.tmp $(TARGET_SUBDIR)/qthreads/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/qthreads/multilib.tmp $(TARGET_SUBDIR)/qthreads/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/qthreads/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/qthreads ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/qthreads; \
cd "$(TARGET_SUBDIR)/qthreads" || exit 1; \
@@ -34416,7 +37520,7 @@
TARGET-target-qthreads=all
maybe-all-target-qthreads: all-target-qthreads
all-target-qthreads: configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34434,7 +37538,7 @@
maybe-check-target-qthreads: check-target-qthreads
check-target-qthreads:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34449,7 +37553,7 @@
maybe-install-target-qthreads: install-target-qthreads
install-target-qthreads: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34467,7 +37571,7 @@
info-target-qthreads: \
configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34493,7 +37597,7 @@
dvi-target-qthreads: \
configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34519,7 +37623,7 @@
html-target-qthreads: \
configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34545,7 +37649,7 @@
TAGS-target-qthreads: \
configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34572,7 +37676,7 @@
install-info-target-qthreads: \
configure-target-qthreads \
info-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34591,6 +37695,33 @@
@endif target-qthreads
+.PHONY: maybe-install-html-target-qthreads install-html-target-qthreads
+maybe-install-html-target-qthreads:
+ at if target-qthreads
+maybe-install-html-target-qthreads: install-html-target-qthreads
+
+install-html-target-qthreads: \
+ configure-target-qthreads \
+ html-target-qthreads
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/qthreads" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/qthreads && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-qthreads
+
.PHONY: maybe-installcheck-target-qthreads installcheck-target-qthreads
maybe-installcheck-target-qthreads:
@if target-qthreads
@@ -34598,7 +37729,7 @@
installcheck-target-qthreads: \
configure-target-qthreads
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34623,7 +37754,7 @@
maybe-mostlyclean-target-qthreads: mostlyclean-target-qthreads
mostlyclean-target-qthreads:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34648,7 +37779,7 @@
maybe-clean-target-qthreads: clean-target-qthreads
clean-target-qthreads:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34673,7 +37804,7 @@
maybe-distclean-target-qthreads: distclean-target-qthreads
distclean-target-qthreads:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34698,7 +37829,7 @@
maybe-maintainer-clean-target-qthreads: maintainer-clean-target-qthreads
maintainer-clean-target-qthreads:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/qthreads/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34719,26 +37850,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-rda
-$(TARGET_SUBDIR)/rda/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/rda ; \
- rm -f $(TARGET_SUBDIR)/rda/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/rda/multilib.out
- at endif target-rda
-
.PHONY: configure-target-rda maybe-configure-target-rda
maybe-configure-target-rda:
@if target-rda
maybe-configure-target-rda: configure-target-rda
-configure-target-rda: $(TARGET_SUBDIR)/rda/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/rda/Makefile || exit 0; \
+configure-target-rda:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for rda..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/rda ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/rda/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/rda/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/rda/multilib.tmp $(TARGET_SUBDIR)/rda/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/rda/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/rda/Makefile; \
+ mv $(TARGET_SUBDIR)/rda/multilib.tmp $(TARGET_SUBDIR)/rda/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/rda/multilib.tmp $(TARGET_SUBDIR)/rda/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/rda/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/rda ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/rda; \
cd "$(TARGET_SUBDIR)/rda" || exit 1; \
@@ -34765,7 +37901,7 @@
TARGET-target-rda=all
maybe-all-target-rda: all-target-rda
all-target-rda: configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34783,7 +37919,7 @@
maybe-check-target-rda: check-target-rda
check-target-rda:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34798,7 +37934,7 @@
maybe-install-target-rda: install-target-rda
install-target-rda: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -34816,7 +37952,7 @@
info-target-rda: \
configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34842,7 +37978,7 @@
dvi-target-rda: \
configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34868,7 +38004,7 @@
html-target-rda: \
configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34894,7 +38030,7 @@
TAGS-target-rda: \
configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34921,7 +38057,7 @@
install-info-target-rda: \
configure-target-rda \
info-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34940,6 +38076,33 @@
@endif target-rda
+.PHONY: maybe-install-html-target-rda install-html-target-rda
+maybe-install-html-target-rda:
+ at if target-rda
+maybe-install-html-target-rda: install-html-target-rda
+
+install-html-target-rda: \
+ configure-target-rda \
+ html-target-rda
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/rda" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/rda && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-rda
+
.PHONY: maybe-installcheck-target-rda installcheck-target-rda
maybe-installcheck-target-rda:
@if target-rda
@@ -34947,7 +38110,7 @@
installcheck-target-rda: \
configure-target-rda
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34972,7 +38135,7 @@
maybe-mostlyclean-target-rda: mostlyclean-target-rda
mostlyclean-target-rda:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -34997,7 +38160,7 @@
maybe-clean-target-rda: clean-target-rda
clean-target-rda:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35022,7 +38185,7 @@
maybe-distclean-target-rda: distclean-target-rda
distclean-target-rda:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35047,7 +38210,7 @@
maybe-maintainer-clean-target-rda: maintainer-clean-target-rda
maintainer-clean-target-rda:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/rda/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35068,26 +38231,31 @@
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-libada
-$(TARGET_SUBDIR)/libada/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada ; \
- rm -f $(TARGET_SUBDIR)/libada/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/libada/multilib.out
- at endif target-libada
-
.PHONY: configure-target-libada maybe-configure-target-libada
maybe-configure-target-libada:
@if target-libada
maybe-configure-target-libada: configure-target-libada
-configure-target-libada: $(TARGET_SUBDIR)/libada/multilib.out
- @$(unstage)
- @test ! -f $(TARGET_SUBDIR)/libada/Makefile || exit 0; \
+configure-target-libada:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libada..."; \
$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libada/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libada/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libada/multilib.tmp $(TARGET_SUBDIR)/libada/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libada/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libada/Makefile; \
+ mv $(TARGET_SUBDIR)/libada/multilib.tmp $(TARGET_SUBDIR)/libada/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libada/multilib.tmp $(TARGET_SUBDIR)/libada/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libada/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada ; \
$(NORMAL_TARGET_EXPORTS) \
echo Configuring in $(TARGET_SUBDIR)/libada; \
cd "$(TARGET_SUBDIR)/libada" || exit 1; \
@@ -35114,7 +38282,7 @@
TARGET-target-libada=all
maybe-all-target-libada: all-target-libada
all-target-libada: configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -35132,7 +38300,7 @@
maybe-check-target-libada: check-target-libada
check-target-libada:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -35147,7 +38315,7 @@
maybe-install-target-libada: install-target-libada
install-target-libada: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(NORMAL_TARGET_EXPORTS) \
@@ -35165,7 +38333,7 @@
info-target-libada: \
configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35191,7 +38359,7 @@
dvi-target-libada: \
configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35217,7 +38385,7 @@
html-target-libada: \
configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35243,7 +38411,7 @@
TAGS-target-libada: \
configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35270,7 +38438,7 @@
install-info-target-libada: \
configure-target-libada \
info-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35289,6 +38457,33 @@
@endif target-libada
+.PHONY: maybe-install-html-target-libada install-html-target-libada
+maybe-install-html-target-libada:
+ at if target-libada
+maybe-install-html-target-libada: install-html-target-libada
+
+install-html-target-libada: \
+ configure-target-libada \
+ html-target-libada
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libada" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libada && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libada
+
.PHONY: maybe-installcheck-target-libada installcheck-target-libada
maybe-installcheck-target-libada:
@if target-libada
@@ -35296,7 +38491,7 @@
installcheck-target-libada: \
configure-target-libada
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35321,7 +38516,7 @@
maybe-mostlyclean-target-libada: mostlyclean-target-libada
mostlyclean-target-libada:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35346,7 +38541,7 @@
maybe-clean-target-libada: clean-target-libada
clean-target-libada:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35371,7 +38566,7 @@
maybe-distclean-target-libada: distclean-target-libada
distclean-target-libada:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35396,7 +38591,7 @@
maybe-maintainer-clean-target-libada: maintainer-clean-target-libada
maintainer-clean-target-libada:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -35417,6 +38612,387 @@
+
+
+.PHONY: configure-target-libgomp maybe-configure-target-libgomp
+maybe-configure-target-libgomp:
+ at if target-libgomp
+maybe-configure-target-libgomp: configure-target-libgomp
+configure-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ echo "Checking multilib configuration for libgomp..."; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgomp ; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgomp/multilib.tmp 2> /dev/null ; \
+ if test -r $(TARGET_SUBDIR)/libgomp/multilib.out; then \
+ if cmp -s $(TARGET_SUBDIR)/libgomp/multilib.tmp $(TARGET_SUBDIR)/libgomp/multilib.out; then \
+ rm -f $(TARGET_SUBDIR)/libgomp/multilib.tmp; \
+ else \
+ rm -f $(TARGET_SUBDIR)/libgomp/Makefile; \
+ mv $(TARGET_SUBDIR)/libgomp/multilib.tmp $(TARGET_SUBDIR)/libgomp/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/libgomp/multilib.tmp $(TARGET_SUBDIR)/libgomp/multilib.out; \
+ fi; \
+ test ! -f $(TARGET_SUBDIR)/libgomp/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgomp ; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo Configuring in $(TARGET_SUBDIR)/libgomp; \
+ cd "$(TARGET_SUBDIR)/libgomp" || exit 1; \
+ case $(srcdir) in \
+ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
+ *) topdir=`echo $(TARGET_SUBDIR)/libgomp/ | \
+ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
+ esac; \
+ srcdiroption="--srcdir=$${topdir}/libgomp"; \
+ libsrcdir="$$s/libgomp"; \
+ rm -f no-such-file || : ; \
+ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \
+ $(TARGET_CONFIGARGS) $${srcdiroption} \
+ || exit 1
+ at endif target-libgomp
+
+
+
+
+
+.PHONY: all-target-libgomp maybe-all-target-libgomp
+maybe-all-target-libgomp:
+ at if target-libgomp
+TARGET-target-libgomp=all
+maybe-all-target-libgomp: all-target-libgomp
+all-target-libgomp: configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) $(TARGET-target-libgomp))
+ at endif target-libgomp
+
+
+
+
+
+.PHONY: check-target-libgomp maybe-check-target-libgomp
+maybe-check-target-libgomp:
+ at if target-libgomp
+maybe-check-target-libgomp: check-target-libgomp
+
+check-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) check)
+
+ at endif target-libgomp
+
+.PHONY: install-target-libgomp maybe-install-target-libgomp
+maybe-install-target-libgomp:
+ at if target-libgomp
+maybe-install-target-libgomp: install-target-libgomp
+
+install-target-libgomp: installdirs
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) install)
+
+ at endif target-libgomp
+
+# Other targets (info, dvi, etc.)
+
+.PHONY: maybe-info-target-libgomp info-target-libgomp
+maybe-info-target-libgomp:
+ at if target-libgomp
+maybe-info-target-libgomp: info-target-libgomp
+
+info-target-libgomp: \
+ configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing info in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ info) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-dvi-target-libgomp dvi-target-libgomp
+maybe-dvi-target-libgomp:
+ at if target-libgomp
+maybe-dvi-target-libgomp: dvi-target-libgomp
+
+dvi-target-libgomp: \
+ configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing dvi in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ dvi) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-html-target-libgomp html-target-libgomp
+maybe-html-target-libgomp:
+ at if target-libgomp
+maybe-html-target-libgomp: html-target-libgomp
+
+html-target-libgomp: \
+ configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing html in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ html) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-TAGS-target-libgomp TAGS-target-libgomp
+maybe-TAGS-target-libgomp:
+ at if target-libgomp
+maybe-TAGS-target-libgomp: TAGS-target-libgomp
+
+TAGS-target-libgomp: \
+ configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing TAGS in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ TAGS) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-install-info-target-libgomp install-info-target-libgomp
+maybe-install-info-target-libgomp:
+ at if target-libgomp
+maybe-install-info-target-libgomp: install-info-target-libgomp
+
+install-info-target-libgomp: \
+ configure-target-libgomp \
+ info-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-info in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-info) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-install-html-target-libgomp install-html-target-libgomp
+maybe-install-html-target-libgomp:
+ at if target-libgomp
+maybe-install-html-target-libgomp: install-html-target-libgomp
+
+install-html-target-libgomp: \
+ configure-target-libgomp \
+ html-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing install-html in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ install-html) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-installcheck-target-libgomp installcheck-target-libgomp
+maybe-installcheck-target-libgomp:
+ at if target-libgomp
+maybe-installcheck-target-libgomp: installcheck-target-libgomp
+
+installcheck-target-libgomp: \
+ configure-target-libgomp
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing installcheck in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ installcheck) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-mostlyclean-target-libgomp mostlyclean-target-libgomp
+maybe-mostlyclean-target-libgomp:
+ at if target-libgomp
+maybe-mostlyclean-target-libgomp: mostlyclean-target-libgomp
+
+mostlyclean-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ mostlyclean) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-clean-target-libgomp clean-target-libgomp
+maybe-clean-target-libgomp:
+ at if target-libgomp
+maybe-clean-target-libgomp: clean-target-libgomp
+
+clean-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing clean in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ clean) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-distclean-target-libgomp distclean-target-libgomp
+maybe-distclean-target-libgomp:
+ at if target-libgomp
+maybe-distclean-target-libgomp: distclean-target-libgomp
+
+distclean-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing distclean in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ distclean) \
+ || exit 1
+
+ at endif target-libgomp
+
+.PHONY: maybe-maintainer-clean-target-libgomp maintainer-clean-target-libgomp
+maybe-maintainer-clean-target-libgomp:
+ at if target-libgomp
+maybe-maintainer-clean-target-libgomp: maintainer-clean-target-libgomp
+
+maintainer-clean-target-libgomp:
+ @: $(MAKE); $(unstage)
+ @[ -f $(TARGET_SUBDIR)/libgomp/Makefile ] || exit 0 ; \
+ r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(NORMAL_TARGET_EXPORTS) \
+ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgomp" ; \
+ for flag in $(EXTRA_TARGET_FLAGS); do \
+ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+ done; \
+ (cd $(TARGET_SUBDIR)/libgomp && \
+ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+ "RANLIB=$${RANLIB}" \
+ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \
+ maintainer-clean) \
+ || exit 1
+
+ at endif target-libgomp
+
+
+
# ----------
# GCC module
# ----------
@@ -35535,29 +39111,36 @@
# are dummy when toplevel bootstrap is not active.
# While making host and target tools, symlinks to the final stage must be
-# there, so $(MAKE) $(unstage) should be run at various points. To avoid
-# excessive recursive invocations of make, we "inline" them using a variable.
+# there, so $(unstage) should be run at various points. To avoid excessive
+# recursive invocations of make, we "inline" them using a variable. These
+# must be referenced as ": $(MAKE) ; $(unstage)" rather than "$(unstage)"
+# to avoid warnings from the GNU Make job server.
unstage = :
stage = :
+current_stage = ""
@if gcc-bootstrap
unstage = [ -f stage_current ] || $(MAKE) `cat stage_last`-start
-stage = [ -f stage_current ] && $(MAKE) `cat stage_current`-end || :
+stage = if [ -f stage_current ]; then $(MAKE) `cat stage_current`-end || exit 1; else :; fi
+current_stage = "`cat stage_current 2> /dev/null`"
@endif gcc-bootstrap
.PHONY: unstage stage
unstage:
- @$(unstage)
+ @: $(MAKE); $(unstage)
stage:
- @$(stage)
+ @: $(MAKE); $(stage)
+# Disable commands for lean bootstrap.
+LEAN = false
+
# We name the build directories for the various stages "stage1-gcc",
# "stage2-gcc","stage3-gcc", etc.
# Since the 'compare' process will fail (on debugging information) if any
# directory names are different, we need to link the gcc directory for
-# the previous stage to a constant name ('gcc-prev'), and to make the name of
+# the previous stage to a constant name ('prev-gcc'), and to make the name of
# the build directories constant as well. For the latter, we use naked names
# like 'gcc', because the scripts in that directory assume it. We use
# mv on platforms where symlinks to directories do not work or are not
@@ -35583,6 +39166,8 @@
CC="$${CC}" CC_FOR_BUILD="$${CC_FOR_BUILD}" \
STAGE_PREFIX=$$r/prev-gcc/ \
CFLAGS="$(BOOT_CFLAGS)" \
+ LIBCFLAGS="$(BOOT_CFLAGS)" \
+ LDFLAGS="$(BOOT_LDFLAGS)" \
ADAC="\$$(CC)"
# For stage 1:
@@ -35598,127 +39183,133 @@
.PHONY: stage1-start stage1-end
stage1-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stage1 > stage_current ; \
echo stage1 > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stage1-bfd ] || \
mkdir stage1-bfd; \
- set stage1-bfd bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-bfd bfd
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stage1-opcodes ] || \
mkdir stage1-opcodes; \
- set stage1-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-opcodes opcodes
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stage1-binutils ] || \
mkdir stage1-binutils; \
- set stage1-binutils binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-binutils binutils
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stage1-gas ] || \
mkdir stage1-gas; \
- set stage1-gas gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-gas gas
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stage1-gcc ] || \
mkdir stage1-gcc; \
- set stage1-gcc gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-gcc gcc
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stage1-intl ] || \
mkdir stage1-intl; \
- set stage1-intl intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-intl intl
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stage1-ld ] || \
mkdir stage1-ld; \
- set stage1-ld ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-ld ld
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stage1-libcpp ] || \
mkdir stage1-libcpp; \
- set stage1-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-libcpp libcpp
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stage1-libdecnumber ] || \
mkdir stage1-libdecnumber; \
- set stage1-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-libdecnumber libdecnumber
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stage1-libiberty ] || \
mkdir stage1-libiberty; \
- set stage1-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-libiberty libiberty
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stage1-zlib ] || \
mkdir stage1-zlib; \
- set stage1-zlib zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stage1-zlib zlib
@endif zlib
+ @[ -d stage1-$(TARGET_SUBDIR) ] || \
+ mkdir stage1-$(TARGET_SUBDIR); \
+ mv stage1-$(TARGET_SUBDIR) $(TARGET_SUBDIR)
-stage1-end::
- @rm -f stage_current
+stage1-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stage1-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stage1-bfd ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stage1-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stage1-opcodes ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stage1-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stage1-binutils ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stage1-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stage1-gas ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stage1-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stage1-gcc ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stage1-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stage1-intl ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stage1-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stage1-ld ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stage1-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stage1-libcpp ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stage1-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stage1-libdecnumber ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stage1-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stage1-libiberty ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stage1-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stage1-zlib ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR) ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage 1. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage 1. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stage1-bubble
stage1-bubble::
@r=`${PWD_COMMAND}`; export r; \
@@ -35744,7 +39335,7 @@
.PHONY: distclean-stage1
distclean-stage1::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stage1-*
@@ -35754,171 +39345,157 @@
.PHONY: stage2-start stage2-end
stage2-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stage2 > stage_current ; \
echo stage2 > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stage2-bfd ] || \
mkdir stage2-bfd; \
- set stage2-bfd bfd ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-bfd prev-bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-bfd bfd ; \
+ mv stage1-bfd prev-bfd || test -f stage1-lean
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stage2-opcodes ] || \
mkdir stage2-opcodes; \
- set stage2-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-opcodes prev-opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-opcodes opcodes ; \
+ mv stage1-opcodes prev-opcodes || test -f stage1-lean
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stage2-binutils ] || \
mkdir stage2-binutils; \
- set stage2-binutils binutils ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-binutils prev-binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-binutils binutils ; \
+ mv stage1-binutils prev-binutils || test -f stage1-lean
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stage2-gas ] || \
mkdir stage2-gas; \
- set stage2-gas gas ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-gas prev-gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-gas gas ; \
+ mv stage1-gas prev-gas || test -f stage1-lean
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stage2-gcc ] || \
mkdir stage2-gcc; \
- set stage2-gcc gcc ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-gcc prev-gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-gcc gcc ; \
+ mv stage1-gcc prev-gcc || test -f stage1-lean
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stage2-intl ] || \
mkdir stage2-intl; \
- set stage2-intl intl ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-intl prev-intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-intl intl ; \
+ mv stage1-intl prev-intl || test -f stage1-lean
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stage2-ld ] || \
mkdir stage2-ld; \
- set stage2-ld ld ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-ld prev-ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-ld ld ; \
+ mv stage1-ld prev-ld || test -f stage1-lean
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stage2-libcpp ] || \
mkdir stage2-libcpp; \
- set stage2-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libcpp prev-libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-libcpp libcpp ; \
+ mv stage1-libcpp prev-libcpp || test -f stage1-lean
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stage2-libdecnumber ] || \
mkdir stage2-libdecnumber; \
- set stage2-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libdecnumber prev-libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-libdecnumber libdecnumber ; \
+ mv stage1-libdecnumber prev-libdecnumber || test -f stage1-lean
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stage2-libiberty ] || \
mkdir stage2-libiberty; \
- set stage2-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libiberty prev-libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-libiberty libiberty ; \
+ mv stage1-libiberty prev-libiberty || test -f stage1-lean
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stage2-zlib ] || \
mkdir stage2-zlib; \
- set stage2-zlib zlib ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-zlib prev-zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stage2-zlib zlib ; \
+ mv stage1-zlib prev-zlib || test -f stage1-lean
@endif zlib
+ @[ -d stage2-$(TARGET_SUBDIR) ] || \
+ mkdir stage2-$(TARGET_SUBDIR); \
+ mv stage2-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \
+ mv stage1-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage1-lean
-stage2-end::
- @rm -f stage_current
+stage2-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stage2-bfd ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-bfd stage1-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stage2-bfd ; \
+ mv prev-bfd stage1-bfd ; : ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stage2-opcodes ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-opcodes stage1-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stage2-opcodes ; \
+ mv prev-opcodes stage1-opcodes ; : ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stage2-binutils ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-binutils stage1-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stage2-binutils ; \
+ mv prev-binutils stage1-binutils ; : ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stage2-gas ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gas stage1-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stage2-gas ; \
+ mv prev-gas stage1-gas ; : ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stage2-gcc ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gcc stage1-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stage2-gcc ; \
+ mv prev-gcc stage1-gcc ; : ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stage2-intl ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-intl stage1-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stage2-intl ; \
+ mv prev-intl stage1-intl ; : ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stage2-ld ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-ld stage1-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stage2-ld ; \
+ mv prev-ld stage1-ld ; : ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stage2-libcpp ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libcpp stage1-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stage2-libcpp ; \
+ mv prev-libcpp stage1-libcpp ; : ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stage2-libdecnumber ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libdecnumber stage1-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stage2-libdecnumber ; \
+ mv prev-libdecnumber stage1-libdecnumber ; : ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stage2-libiberty ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libiberty stage1-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stage2-libiberty ; \
+ mv prev-libiberty stage1-libiberty ; : ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stage2-zlib ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-zlib stage1-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stage2-zlib ; \
+ mv prev-zlib stage1-zlib ; : ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stage2-$(TARGET_SUBDIR) ; \
+ mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR) ; : ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage 2. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage 2. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stage2-bubble
stage2-bubble:: stage1-bubble
@r=`${PWD_COMMAND}`; export r; \
@@ -35939,24 +39516,33 @@
-.PHONY: bootstrap2
+.PHONY: bootstrap2 bootstrap2-lean
bootstrap2:
echo stage2 > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) stage2-bubble
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
- @$(stage)
+bootstrap2-lean:
+ echo stage2 > stage_final
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stage2-bubble
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
+
# Rules to wipe a stage and all the following ones, also used for cleanstrap
distclean-stage1:: distclean-stage2
.PHONY: distclean-stage2
distclean-stage2::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stage2-*
@@ -35966,183 +39552,172 @@
.PHONY: stage3-start stage3-end
stage3-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stage3 > stage_current ; \
echo stage3 > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stage3-bfd ] || \
mkdir stage3-bfd; \
- set stage3-bfd bfd ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-bfd prev-bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-bfd bfd ; \
+ mv stage2-bfd prev-bfd || test -f stage2-lean
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stage3-opcodes ] || \
mkdir stage3-opcodes; \
- set stage3-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-opcodes prev-opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-opcodes opcodes ; \
+ mv stage2-opcodes prev-opcodes || test -f stage2-lean
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stage3-binutils ] || \
mkdir stage3-binutils; \
- set stage3-binutils binutils ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-binutils prev-binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-binutils binutils ; \
+ mv stage2-binutils prev-binutils || test -f stage2-lean
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stage3-gas ] || \
mkdir stage3-gas; \
- set stage3-gas gas ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-gas prev-gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-gas gas ; \
+ mv stage2-gas prev-gas || test -f stage2-lean
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stage3-gcc ] || \
mkdir stage3-gcc; \
- set stage3-gcc gcc ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-gcc prev-gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-gcc gcc ; \
+ mv stage2-gcc prev-gcc || test -f stage2-lean
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stage3-intl ] || \
mkdir stage3-intl; \
- set stage3-intl intl ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-intl prev-intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-intl intl ; \
+ mv stage2-intl prev-intl || test -f stage2-lean
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stage3-ld ] || \
mkdir stage3-ld; \
- set stage3-ld ld ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-ld prev-ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-ld ld ; \
+ mv stage2-ld prev-ld || test -f stage2-lean
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stage3-libcpp ] || \
mkdir stage3-libcpp; \
- set stage3-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-libcpp prev-libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-libcpp libcpp ; \
+ mv stage2-libcpp prev-libcpp || test -f stage2-lean
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stage3-libdecnumber ] || \
mkdir stage3-libdecnumber; \
- set stage3-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-libdecnumber prev-libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-libdecnumber libdecnumber ; \
+ mv stage2-libdecnumber prev-libdecnumber || test -f stage2-lean
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stage3-libiberty ] || \
mkdir stage3-libiberty; \
- set stage3-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-libiberty prev-libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-libiberty libiberty ; \
+ mv stage2-libiberty prev-libiberty || test -f stage2-lean
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stage3-zlib ] || \
mkdir stage3-zlib; \
- set stage3-zlib zlib ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage2-zlib prev-zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stage3-zlib zlib ; \
+ mv stage2-zlib prev-zlib || test -f stage2-lean
@endif zlib
+ @[ -d stage3-$(TARGET_SUBDIR) ] || \
+ mkdir stage3-$(TARGET_SUBDIR); \
+ mv stage3-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \
+ mv stage2-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage2-lean
-stage3-end::
- @rm -f stage_current
+stage3-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stage3-bfd ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-bfd stage2-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stage3-bfd ; \
+ mv prev-bfd stage2-bfd ; : ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stage3-opcodes ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-opcodes stage2-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stage3-opcodes ; \
+ mv prev-opcodes stage2-opcodes ; : ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stage3-binutils ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-binutils stage2-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stage3-binutils ; \
+ mv prev-binutils stage2-binutils ; : ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stage3-gas ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gas stage2-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stage3-gas ; \
+ mv prev-gas stage2-gas ; : ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stage3-gcc ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gcc stage2-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stage3-gcc ; \
+ mv prev-gcc stage2-gcc ; : ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stage3-intl ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-intl stage2-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stage3-intl ; \
+ mv prev-intl stage2-intl ; : ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stage3-ld ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-ld stage2-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stage3-ld ; \
+ mv prev-ld stage2-ld ; : ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stage3-libcpp ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libcpp stage2-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stage3-libcpp ; \
+ mv prev-libcpp stage2-libcpp ; : ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stage3-libdecnumber ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libdecnumber stage2-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stage3-libdecnumber ; \
+ mv prev-libdecnumber stage2-libdecnumber ; : ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stage3-libiberty ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libiberty stage2-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stage3-libiberty ; \
+ mv prev-libiberty stage2-libiberty ; : ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stage3-zlib ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-zlib stage2-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stage3-zlib ; \
+ mv prev-zlib stage2-zlib ; : ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stage3-$(TARGET_SUBDIR) ; \
+ mv prev-$(TARGET_SUBDIR) stage2-$(TARGET_SUBDIR) ; : ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage 3. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage 3. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stage3-bubble
stage3-bubble:: stage2-bubble
- @bootstrap_lean at -rm -rf stage1-* ; $(STAMP) stage1-lean
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
if test -f stage3-lean || test -f stage2-lean ; then \
echo Skipping rebuild of stage3 ; \
else \
$(MAKE) stage3-start; \
+ if $(LEAN); then \
+ rm -rf stage1-* ; \
+ $(STAMP) stage1-lean ; \
+ fi; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) all-stage3; \
fi
- $(MAKE) compare
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) compare
.PHONY: all-stage3 clean-stage3
do-clean: clean-stage3
@@ -36158,8 +39733,9 @@
echo Cannot compare object files as stage 2 was deleted. ; \
exit 0 ; \
fi; \
- $(stage); \
+ : $(MAKE); $(stage); \
rm -f .bad_compare ; \
+ echo Comparing stages 2 and 3 ; \
cd stage3-gcc; \
files=`find . -name "*$(objext)" -print` ; \
cd .. ; \
@@ -36180,31 +39756,43 @@
cat .bad_compare; \
exit 1; \
else \
- true; \
+ echo Comparison successful.; \
fi ; \
$(STAMP) compare
- @bootstrap_lean at -rm -rf stage2-* ; $(STAMP) stage2-lean
+ if $(LEAN); then \
+ rm -rf stage2-*; \
+ $(STAMP) stage2-lean; \
+ fi
-.PHONY: bootstrap
+.PHONY: bootstrap bootstrap-lean
bootstrap:
echo stage3 > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) stage3-bubble
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
- @$(stage)
+bootstrap-lean:
+ echo stage3 > stage_final
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stage3-bubble
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
+
# Rules to wipe a stage and all the following ones, also used for cleanstrap
distclean-stage2:: distclean-stage3
.PHONY: distclean-stage3
distclean-stage3::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stage3-* compare
@@ -36217,183 +39805,172 @@
.PHONY: stage4-start stage4-end
stage4-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stage4 > stage_current ; \
echo stage4 > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stage4-bfd ] || \
mkdir stage4-bfd; \
- set stage4-bfd bfd ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-bfd prev-bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-bfd bfd ; \
+ mv stage3-bfd prev-bfd || test -f stage3-lean
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stage4-opcodes ] || \
mkdir stage4-opcodes; \
- set stage4-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-opcodes prev-opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-opcodes opcodes ; \
+ mv stage3-opcodes prev-opcodes || test -f stage3-lean
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stage4-binutils ] || \
mkdir stage4-binutils; \
- set stage4-binutils binutils ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-binutils prev-binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-binutils binutils ; \
+ mv stage3-binutils prev-binutils || test -f stage3-lean
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stage4-gas ] || \
mkdir stage4-gas; \
- set stage4-gas gas ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-gas prev-gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-gas gas ; \
+ mv stage3-gas prev-gas || test -f stage3-lean
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stage4-gcc ] || \
mkdir stage4-gcc; \
- set stage4-gcc gcc ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-gcc prev-gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-gcc gcc ; \
+ mv stage3-gcc prev-gcc || test -f stage3-lean
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stage4-intl ] || \
mkdir stage4-intl; \
- set stage4-intl intl ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-intl prev-intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-intl intl ; \
+ mv stage3-intl prev-intl || test -f stage3-lean
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stage4-ld ] || \
mkdir stage4-ld; \
- set stage4-ld ld ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-ld prev-ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-ld ld ; \
+ mv stage3-ld prev-ld || test -f stage3-lean
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stage4-libcpp ] || \
mkdir stage4-libcpp; \
- set stage4-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-libcpp prev-libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-libcpp libcpp ; \
+ mv stage3-libcpp prev-libcpp || test -f stage3-lean
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stage4-libdecnumber ] || \
mkdir stage4-libdecnumber; \
- set stage4-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-libdecnumber prev-libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-libdecnumber libdecnumber ; \
+ mv stage3-libdecnumber prev-libdecnumber || test -f stage3-lean
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stage4-libiberty ] || \
mkdir stage4-libiberty; \
- set stage4-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-libiberty prev-libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-libiberty libiberty ; \
+ mv stage3-libiberty prev-libiberty || test -f stage3-lean
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stage4-zlib ] || \
mkdir stage4-zlib; \
- set stage4-zlib zlib ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage3-zlib prev-zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stage4-zlib zlib ; \
+ mv stage3-zlib prev-zlib || test -f stage3-lean
@endif zlib
+ @[ -d stage4-$(TARGET_SUBDIR) ] || \
+ mkdir stage4-$(TARGET_SUBDIR); \
+ mv stage4-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \
+ mv stage3-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage3-lean
-stage4-end::
- @rm -f stage_current
+stage4-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stage4-bfd ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-bfd stage3-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stage4-bfd ; \
+ mv prev-bfd stage3-bfd ; : ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stage4-opcodes ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-opcodes stage3-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stage4-opcodes ; \
+ mv prev-opcodes stage3-opcodes ; : ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stage4-binutils ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-binutils stage3-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stage4-binutils ; \
+ mv prev-binutils stage3-binutils ; : ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stage4-gas ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gas stage3-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stage4-gas ; \
+ mv prev-gas stage3-gas ; : ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stage4-gcc ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gcc stage3-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stage4-gcc ; \
+ mv prev-gcc stage3-gcc ; : ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stage4-intl ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-intl stage3-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stage4-intl ; \
+ mv prev-intl stage3-intl ; : ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stage4-ld ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-ld stage3-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stage4-ld ; \
+ mv prev-ld stage3-ld ; : ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stage4-libcpp ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libcpp stage3-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stage4-libcpp ; \
+ mv prev-libcpp stage3-libcpp ; : ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stage4-libdecnumber ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libdecnumber stage3-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stage4-libdecnumber ; \
+ mv prev-libdecnumber stage3-libdecnumber ; : ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stage4-libiberty ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libiberty stage3-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stage4-libiberty ; \
+ mv prev-libiberty stage3-libiberty ; : ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stage4-zlib ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-zlib stage3-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stage4-zlib ; \
+ mv prev-zlib stage3-zlib ; : ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stage4-$(TARGET_SUBDIR) ; \
+ mv prev-$(TARGET_SUBDIR) stage3-$(TARGET_SUBDIR) ; : ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage 4. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage 4. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stage4-bubble
stage4-bubble:: stage3-bubble
- @bootstrap_lean at -rm -rf stage2-* ; $(STAMP) stage2-lean
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
if test -f stage4-lean || test -f stage3-lean ; then \
echo Skipping rebuild of stage4 ; \
else \
$(MAKE) stage4-start; \
+ if $(LEAN); then \
+ rm -rf stage2-* ; \
+ $(STAMP) stage2-lean ; \
+ fi; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) all-stage4; \
fi
- $(MAKE) compare3
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) compare3
.PHONY: all-stage4 clean-stage4
do-clean: clean-stage4
@@ -36409,8 +39986,9 @@
echo Cannot compare object files as stage 3 was deleted. ; \
exit 0 ; \
fi; \
- $(stage); \
+ : $(MAKE); $(stage); \
rm -f .bad_compare ; \
+ echo Comparing stages 3 and 4 ; \
cd stage4-gcc; \
files=`find . -name "*$(objext)" -print` ; \
cd .. ; \
@@ -36431,31 +40009,43 @@
cat .bad_compare; \
exit 1; \
else \
- true; \
+ echo Comparison successful.; \
fi ; \
$(STAMP) compare3
- @bootstrap_lean at -rm -rf stage3-* ; $(STAMP) stage3-lean
+ if $(LEAN); then \
+ rm -rf stage3-*; \
+ $(STAMP) stage3-lean; \
+ fi
-.PHONY: bootstrap4
+.PHONY: bootstrap4 bootstrap4-lean
bootstrap4:
echo stage4 > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) stage4-bubble
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
- @$(stage)
+bootstrap4-lean:
+ echo stage4 > stage_final
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stage4-bubble
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
+
# Rules to wipe a stage and all the following ones, also used for cleanstrap
distclean-stage3:: distclean-stage4
.PHONY: distclean-stage4
distclean-stage4::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stage4-* compare3
@@ -36465,171 +40055,157 @@
.PHONY: stageprofile-start stageprofile-end
stageprofile-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stageprofile > stage_current ; \
echo stageprofile > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stageprofile-bfd ] || \
mkdir stageprofile-bfd; \
- set stageprofile-bfd bfd ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-bfd prev-bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-bfd bfd ; \
+ mv stage1-bfd prev-bfd || test -f stage1-lean
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stageprofile-opcodes ] || \
mkdir stageprofile-opcodes; \
- set stageprofile-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-opcodes prev-opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-opcodes opcodes ; \
+ mv stage1-opcodes prev-opcodes || test -f stage1-lean
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stageprofile-binutils ] || \
mkdir stageprofile-binutils; \
- set stageprofile-binutils binutils ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-binutils prev-binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-binutils binutils ; \
+ mv stage1-binutils prev-binutils || test -f stage1-lean
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stageprofile-gas ] || \
mkdir stageprofile-gas; \
- set stageprofile-gas gas ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-gas prev-gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-gas gas ; \
+ mv stage1-gas prev-gas || test -f stage1-lean
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stageprofile-gcc ] || \
mkdir stageprofile-gcc; \
- set stageprofile-gcc gcc ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-gcc prev-gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-gcc gcc ; \
+ mv stage1-gcc prev-gcc || test -f stage1-lean
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stageprofile-intl ] || \
mkdir stageprofile-intl; \
- set stageprofile-intl intl ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-intl prev-intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-intl intl ; \
+ mv stage1-intl prev-intl || test -f stage1-lean
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stageprofile-ld ] || \
mkdir stageprofile-ld; \
- set stageprofile-ld ld ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-ld prev-ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-ld ld ; \
+ mv stage1-ld prev-ld || test -f stage1-lean
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stageprofile-libcpp ] || \
mkdir stageprofile-libcpp; \
- set stageprofile-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libcpp prev-libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-libcpp libcpp ; \
+ mv stage1-libcpp prev-libcpp || test -f stage1-lean
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stageprofile-libdecnumber ] || \
mkdir stageprofile-libdecnumber; \
- set stageprofile-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libdecnumber prev-libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-libdecnumber libdecnumber ; \
+ mv stage1-libdecnumber prev-libdecnumber || test -f stage1-lean
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stageprofile-libiberty ] || \
mkdir stageprofile-libiberty; \
- set stageprofile-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-libiberty prev-libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-libiberty libiberty ; \
+ mv stage1-libiberty prev-libiberty || test -f stage1-lean
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stageprofile-zlib ] || \
mkdir stageprofile-zlib; \
- set stageprofile-zlib zlib ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stage1-zlib prev-zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stageprofile-zlib zlib ; \
+ mv stage1-zlib prev-zlib || test -f stage1-lean
@endif zlib
+ @[ -d stageprofile-$(TARGET_SUBDIR) ] || \
+ mkdir stageprofile-$(TARGET_SUBDIR); \
+ mv stageprofile-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \
+ mv stage1-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage1-lean
-stageprofile-end::
- @rm -f stage_current
+stageprofile-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stageprofile-bfd ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-bfd stage1-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stageprofile-bfd ; \
+ mv prev-bfd stage1-bfd ; : ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stageprofile-opcodes ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-opcodes stage1-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stageprofile-opcodes ; \
+ mv prev-opcodes stage1-opcodes ; : ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stageprofile-binutils ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-binutils stage1-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stageprofile-binutils ; \
+ mv prev-binutils stage1-binutils ; : ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stageprofile-gas ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gas stage1-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stageprofile-gas ; \
+ mv prev-gas stage1-gas ; : ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stageprofile-gcc ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gcc stage1-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stageprofile-gcc ; \
+ mv prev-gcc stage1-gcc ; : ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stageprofile-intl ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-intl stage1-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stageprofile-intl ; \
+ mv prev-intl stage1-intl ; : ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stageprofile-ld ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-ld stage1-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stageprofile-ld ; \
+ mv prev-ld stage1-ld ; : ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stageprofile-libcpp ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libcpp stage1-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stageprofile-libcpp ; \
+ mv prev-libcpp stage1-libcpp ; : ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stageprofile-libdecnumber ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libdecnumber stage1-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stageprofile-libdecnumber ; \
+ mv prev-libdecnumber stage1-libdecnumber ; : ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stageprofile-libiberty ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libiberty stage1-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stageprofile-libiberty ; \
+ mv prev-libiberty stage1-libiberty ; : ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stageprofile-zlib ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-zlib stage1-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stageprofile-zlib ; \
+ mv prev-zlib stage1-zlib ; : ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stageprofile-$(TARGET_SUBDIR) ; \
+ mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR) ; : ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage profile. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage profile. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stageprofile-bubble
stageprofile-bubble:: stage1-bubble
@r=`${PWD_COMMAND}`; export r; \
@@ -36655,7 +40231,7 @@
distclean-stage1:: distclean-stageprofile
.PHONY: distclean-stageprofile
distclean-stageprofile::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stageprofile-*
@@ -36665,171 +40241,157 @@
.PHONY: stagefeedback-start stagefeedback-end
stagefeedback-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stagefeedback > stage_current ; \
echo stagefeedback > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)
@if bfd
@cd $(HOST_SUBDIR); [ -d stagefeedback-bfd ] || \
mkdir stagefeedback-bfd; \
- set stagefeedback-bfd bfd ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-bfd prev-bfd ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-bfd bfd ; \
+ mv stageprofile-bfd prev-bfd || test -f stageprofile-lean
@endif bfd
@if opcodes
@cd $(HOST_SUBDIR); [ -d stagefeedback-opcodes ] || \
mkdir stagefeedback-opcodes; \
- set stagefeedback-opcodes opcodes ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-opcodes prev-opcodes ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-opcodes opcodes ; \
+ mv stageprofile-opcodes prev-opcodes || test -f stageprofile-lean
@endif opcodes
@if binutils
@cd $(HOST_SUBDIR); [ -d stagefeedback-binutils ] || \
mkdir stagefeedback-binutils; \
- set stagefeedback-binutils binutils ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-binutils prev-binutils ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-binutils binutils ; \
+ mv stageprofile-binutils prev-binutils || test -f stageprofile-lean
@endif binutils
@if gas
@cd $(HOST_SUBDIR); [ -d stagefeedback-gas ] || \
mkdir stagefeedback-gas; \
- set stagefeedback-gas gas ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-gas prev-gas ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-gas gas ; \
+ mv stageprofile-gas prev-gas || test -f stageprofile-lean
@endif gas
@if gcc
@cd $(HOST_SUBDIR); [ -d stagefeedback-gcc ] || \
mkdir stagefeedback-gcc; \
- set stagefeedback-gcc gcc ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-gcc prev-gcc ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-gcc gcc ; \
+ mv stageprofile-gcc prev-gcc || test -f stageprofile-lean
@endif gcc
@if intl
@cd $(HOST_SUBDIR); [ -d stagefeedback-intl ] || \
mkdir stagefeedback-intl; \
- set stagefeedback-intl intl ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-intl prev-intl ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-intl intl ; \
+ mv stageprofile-intl prev-intl || test -f stageprofile-lean
@endif intl
@if ld
@cd $(HOST_SUBDIR); [ -d stagefeedback-ld ] || \
mkdir stagefeedback-ld; \
- set stagefeedback-ld ld ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-ld prev-ld ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-ld ld ; \
+ mv stageprofile-ld prev-ld || test -f stageprofile-lean
@endif ld
@if libcpp
@cd $(HOST_SUBDIR); [ -d stagefeedback-libcpp ] || \
mkdir stagefeedback-libcpp; \
- set stagefeedback-libcpp libcpp ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-libcpp prev-libcpp ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-libcpp libcpp ; \
+ mv stageprofile-libcpp prev-libcpp || test -f stageprofile-lean
@endif libcpp
@if libdecnumber
@cd $(HOST_SUBDIR); [ -d stagefeedback-libdecnumber ] || \
mkdir stagefeedback-libdecnumber; \
- set stagefeedback-libdecnumber libdecnumber ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-libdecnumber prev-libdecnumber ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-libdecnumber libdecnumber ; \
+ mv stageprofile-libdecnumber prev-libdecnumber || test -f stageprofile-lean
@endif libdecnumber
@if libiberty
@cd $(HOST_SUBDIR); [ -d stagefeedback-libiberty ] || \
mkdir stagefeedback-libiberty; \
- set stagefeedback-libiberty libiberty ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-libiberty prev-libiberty ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-libiberty libiberty ; \
+ mv stageprofile-libiberty prev-libiberty || test -f stageprofile-lean
@endif libiberty
@if zlib
@cd $(HOST_SUBDIR); [ -d stagefeedback-zlib ] || \
mkdir stagefeedback-zlib; \
- set stagefeedback-zlib zlib ; \
- @CREATE_LINK_TO_DIR@ ; \
- set stageprofile-zlib prev-zlib ; \
- @CREATE_LINK_TO_DIR@
+ mv stagefeedback-zlib zlib ; \
+ mv stageprofile-zlib prev-zlib || test -f stageprofile-lean
@endif zlib
+ @[ -d stagefeedback-$(TARGET_SUBDIR) ] || \
+ mkdir stagefeedback-$(TARGET_SUBDIR); \
+ mv stagefeedback-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \
+ mv stageprofile-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stageprofile-lean
-stagefeedback-end::
- @rm -f stage_current
+stagefeedback-end::
@if bfd
- @cd $(HOST_SUBDIR); set bfd stagefeedback-bfd ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-bfd stageprofile-bfd ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/bfd ; then \
+ cd $(HOST_SUBDIR); mv bfd stagefeedback-bfd ; \
+ mv prev-bfd stageprofile-bfd ; : ; \
+ fi
@endif bfd
@if opcodes
- @cd $(HOST_SUBDIR); set opcodes stagefeedback-opcodes ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-opcodes stageprofile-opcodes ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/opcodes ; then \
+ cd $(HOST_SUBDIR); mv opcodes stagefeedback-opcodes ; \
+ mv prev-opcodes stageprofile-opcodes ; : ; \
+ fi
@endif opcodes
@if binutils
- @cd $(HOST_SUBDIR); set binutils stagefeedback-binutils ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-binutils stageprofile-binutils ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/binutils ; then \
+ cd $(HOST_SUBDIR); mv binutils stagefeedback-binutils ; \
+ mv prev-binutils stageprofile-binutils ; : ; \
+ fi
@endif binutils
@if gas
- @cd $(HOST_SUBDIR); set gas stagefeedback-gas ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gas stageprofile-gas ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gas ; then \
+ cd $(HOST_SUBDIR); mv gas stagefeedback-gas ; \
+ mv prev-gas stageprofile-gas ; : ; \
+ fi
@endif gas
@if gcc
- @cd $(HOST_SUBDIR); set gcc stagefeedback-gcc ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-gcc stageprofile-gcc ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/gcc ; then \
+ cd $(HOST_SUBDIR); mv gcc stagefeedback-gcc ; \
+ mv prev-gcc stageprofile-gcc ; : ; \
+ fi
@endif gcc
@if intl
- @cd $(HOST_SUBDIR); set intl stagefeedback-intl ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-intl stageprofile-intl ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/intl ; then \
+ cd $(HOST_SUBDIR); mv intl stagefeedback-intl ; \
+ mv prev-intl stageprofile-intl ; : ; \
+ fi
@endif intl
@if ld
- @cd $(HOST_SUBDIR); set ld stagefeedback-ld ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-ld stageprofile-ld ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/ld ; then \
+ cd $(HOST_SUBDIR); mv ld stagefeedback-ld ; \
+ mv prev-ld stageprofile-ld ; : ; \
+ fi
@endif ld
@if libcpp
- @cd $(HOST_SUBDIR); set libcpp stagefeedback-libcpp ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libcpp stageprofile-libcpp ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libcpp ; then \
+ cd $(HOST_SUBDIR); mv libcpp stagefeedback-libcpp ; \
+ mv prev-libcpp stageprofile-libcpp ; : ; \
+ fi
@endif libcpp
@if libdecnumber
- @cd $(HOST_SUBDIR); set libdecnumber stagefeedback-libdecnumber ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libdecnumber stageprofile-libdecnumber ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libdecnumber ; then \
+ cd $(HOST_SUBDIR); mv libdecnumber stagefeedback-libdecnumber ; \
+ mv prev-libdecnumber stageprofile-libdecnumber ; : ; \
+ fi
@endif libdecnumber
@if libiberty
- @cd $(HOST_SUBDIR); set libiberty stagefeedback-libiberty ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-libiberty stageprofile-libiberty ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/libiberty ; then \
+ cd $(HOST_SUBDIR); mv libiberty stagefeedback-libiberty ; \
+ mv prev-libiberty stageprofile-libiberty ; : ; \
+ fi
@endif libiberty
@if zlib
- @cd $(HOST_SUBDIR); set zlib stagefeedback-zlib ; \
- @UNDO_LINK_TO_DIR@ ; \
- set prev-zlib stageprofile-zlib ; \
- @UNDO_LINK_TO_DIR@
+ @if test -d $(HOST_SUBDIR)/zlib ; then \
+ cd $(HOST_SUBDIR); mv zlib stagefeedback-zlib ; \
+ mv prev-zlib stageprofile-zlib ; : ; \
+ fi
@endif zlib
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stagefeedback-$(TARGET_SUBDIR) ; \
+ mv prev-$(TARGET_SUBDIR) stageprofile-$(TARGET_SUBDIR) ; : ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage feedback. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage feedback. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stagefeedback-bubble
stagefeedback-bubble:: stageprofile-bubble
@r=`${PWD_COMMAND}`; export r; \
@@ -36850,24 +40412,33 @@
-.PHONY: profiledbootstrap
+.PHONY: profiledbootstrap profiledbootstrap-lean
profiledbootstrap:
echo stagefeedback > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) stagefeedback-bubble
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
- @$(stage)
+profiledbootstrap-lean:
+ echo stagefeedback > stage_final
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stagefeedback-bubble
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
+
# Rules to wipe a stage and all the following ones, also used for cleanstrap
distclean-stageprofile:: distclean-stagefeedback
.PHONY: distclean-stagefeedback
distclean-stagefeedback::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stagefeedback-*
@@ -36890,51 +40461,71 @@
@if gcc-bootstrap
do-distclean: distclean-stage1
+
+# Provide a GCC build when we're building target libraries. This does
+# not work as a dependency, just as the minimum necessary to avoid errors.
+stage_last:
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) stage1-bubble
@endif gcc-bootstrap
+.PHONY: restrap
+restrap:
+ @: $(MAKE); $(stage)
+ rm -rf stage1-$(TARGET_SUBDIR) stage2 stage3 stage4 stageprofile stagefeedback
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) all
+
# --------------------------------------
# Dependencies between different modules
# --------------------------------------
# Generic dependencies for target modules on host stuff, especially gcc
+ at if gcc-bootstrap
+configure-target-libstdc++-v3: stage_last
+configure-target-libmudflap: stage_last
+configure-target-libssp: stage_last
+configure-target-libgcc-math: stage_last
+configure-target-newlib: stage_last
+configure-target-libgfortran: stage_last
+configure-target-libobjc: stage_last
+configure-target-libtermcap: stage_last
+configure-target-winsup: stage_last
+configure-target-libgloss: stage_last
+configure-target-libiberty: stage_last
+configure-target-gperf: stage_last
+configure-target-examples: stage_last
+configure-target-libffi: stage_last
+configure-target-libjava: stage_last
+configure-target-zlib: stage_last
+configure-target-boehm-gc: stage_last
+configure-target-qthreads: stage_last
+configure-target-rda: stage_last
+configure-target-libada: stage_last
+configure-target-libgomp: stage_last
+ at endif gcc-bootstrap
+ at if gcc-no-bootstrap
configure-target-libstdc++-v3: maybe-all-gcc
-
configure-target-libmudflap: maybe-all-gcc
-
configure-target-libssp: maybe-all-gcc
-
+configure-target-libgcc-math: maybe-all-gcc
configure-target-newlib: maybe-all-gcc
-
configure-target-libgfortran: maybe-all-gcc
-
configure-target-libobjc: maybe-all-gcc
-
configure-target-libtermcap: maybe-all-gcc
-
configure-target-winsup: maybe-all-gcc
-
configure-target-libgloss: maybe-all-gcc
-
configure-target-libiberty: maybe-all-gcc
-
configure-target-gperf: maybe-all-gcc
-
configure-target-examples: maybe-all-gcc
-
configure-target-libffi: maybe-all-gcc
-
configure-target-libjava: maybe-all-gcc
-
configure-target-zlib: maybe-all-gcc
-
configure-target-boehm-gc: maybe-all-gcc
-
configure-target-qthreads: maybe-all-gcc
-
configure-target-rda: maybe-all-gcc
-
configure-target-libada: maybe-all-gcc
+configure-target-libgomp: maybe-all-gcc
+ at endif gcc-no-bootstrap
@@ -37492,17 +41083,6 @@
# Regenerating top level configury
# --------------------------------
-# Multilib.out tells target dirs what multilibs they should build.
-# There is really only one copy. We use the 'timestamp' method to
-# work around various timestamp bugs on some systems.
-# We use move-if-change so that it's only considered updated when it
-# actually changes, because it has to depend on a phony target.
-multilib.out: maybe-all-gcc
- @r=`${PWD_COMMAND}`; export r; \
- echo "Checking multilib configuration..."; \
- $(CC_FOR_TARGET) --print-multi-lib > multilib.tmp 2> /dev/null ; \
- $(SHELL) $(srcdir)/move-if-change multilib.tmp multilib.out ; \
-
# Rebuilding Makefile.in, using autogen.
AUTOGEN = autogen
$(srcdir)/Makefile.in: @MAINT@ $(srcdir)/Makefile.tpl $(srcdir)/Makefile.def
Modified: branches/binutils/package/Makefile.tpl
===================================================================
--- branches/binutils/package/Makefile.tpl 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/Makefile.tpl 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,7 +6,7 @@
#
# Makefile for directory with subdirs to build.
# Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-# 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation
+# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -53,6 +53,9 @@
includedir = @includedir@
oldincludedir = @oldincludedir@
infodir = @infodir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+htmldir = @htmldir@
mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
@@ -87,8 +90,6 @@
# the libraries.
RPATH_ENVVAR = @RPATH_ENVVAR@
-# This is the list of directories to be built for the build system.
-BUILD_CONFIGDIRS = libiberty
# Build programs are put under this directory.
BUILD_SUBDIR = @build_subdir@
# This is set by the configure script to the arguments to use when configuring
@@ -181,9 +182,6 @@
-B$$r/$(HOST_SUBDIR)/prev-gcc/ \
-B$(build_tooldir)/bin/"; export CC_FOR_BUILD;
-# This is set by the configure script to the list of directories which
-# should be built using the target tools.
-TARGET_CONFIGDIRS = @target_configdirs@
# Target libraries are put under this directory:
TARGET_SUBDIR = @target_subdir@
# This is set by the configure script to the arguments to use when configuring
@@ -255,6 +253,7 @@
# Flags to pass to stage2 and later makes. They are defined
# here so that they can be overridden by Makefile fragments.
BOOT_CFLAGS= -g -O2
+BOOT_LDFLAGS=
BISON = @BISON@
YACC = @YACC@
@@ -284,6 +283,7 @@
LD = @LD@
LIPO = @LIPO@
NM = @NM@
+OBJDUMP = @OBJDUMP@
RANLIB = @RANLIB@
STRIP = @STRIP@
WINDRES = @WINDRES@
@@ -387,8 +387,9 @@
[+ ENDIF lib_path +][+ ENDFOR host_modules +]
# Flags to pass down to all sub-makes.
-BASE_FLAGS_TO_PASS = [+ FOR flags_to_pass +]\
- "[+flag+]=$([+flag+])" [+ ENDFOR flags_to_pass +]\
+BASE_FLAGS_TO_PASS =[+ FOR flags_to_pass +][+ IF optional +] \
+ "`echo '[+flag+]=$([+flag+])' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"[+ ELSE optional +] \
+ "[+flag+]=$([+flag+])"[+ ENDIF optional+][+ ENDFOR flags_to_pass +] \
"CONFIG_SHELL=$(SHELL)" \
"MAKEINFO=$(MAKEINFO) $(MAKEINFOFLAGS)"
@@ -406,6 +407,7 @@
'LD=$(LD)' \
'LIPO=$(LIPO)' \
'NM=$(NM)' \
+ 'OBJDUMP=$(OBJDUMP)' \
'RANLIB=$(RANLIB)' \
'STRIP=$(STRIP)' \
'WINDRES=$(WINDRES)'
@@ -425,21 +427,22 @@
'X11_EXTRA_LIBS=$(X11_EXTRA_LIBS)'
# Flags to pass down to makes which are built with the target environment.
-# The double $ decreases the length of the command line; the variables
-# are set in BASE_FLAGS_TO_PASS, and the sub-make will expand them.
+# The double $ decreases the length of the command line; those variables
+# are set in BASE_FLAGS_TO_PASS, and the sub-make will expand them. The
+# COMPILER_ prefixed variables are not passed down so we expand them here.
EXTRA_TARGET_FLAGS = \
'AR=$$(AR_FOR_TARGET)' \
- 'AS=$$(COMPILER_AS_FOR_TARGET)' \
+ 'AS=$(COMPILER_AS_FOR_TARGET)' \
'CC=$$(CC_FOR_TARGET)' \
'CFLAGS=$$(CFLAGS_FOR_TARGET)' \
'CXX=$$(CXX_FOR_TARGET)' \
'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET)' \
'DLLTOOL=$$(DLLTOOL_FOR_TARGET)' \
- 'LD=$$(COMPILER_LD_FOR_TARGET)' \
+ 'LD=$(COMPILER_LD_FOR_TARGET)' \
'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \
'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \
'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET)' \
- 'NM=$$(COMPILER_NM_FOR_TARGET)' \
+ 'NM=$(COMPILER_NM_FOR_TARGET)' \
'OBJDUMP=$$(OBJDUMP_FOR_TARGET)' \
'RANLIB=$$(RANLIB_FOR_TARGET)' \
'WINDRES=$$(WINDRES_FOR_TARGET)'
@@ -453,18 +456,12 @@
# The BUILD_* variables are a special case, which are used for the gcc
# cross-building scheme.
EXTRA_GCC_FLAGS = \
- 'BUILD_PREFIX=$(BUILD_PREFIX)' \
- 'BUILD_PREFIX_1=$(BUILD_PREFIX_1)' \
"GCC_FOR_TARGET=$(GCC_FOR_TARGET)" \
- "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
"`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \
- "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"
+ "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"
GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS)
@@ -486,9 +483,9 @@
[ -f stage_final ] || echo stage3 > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
- $(MAKE) $(RECURSE_FLAGS_TO_PASS) `cat stage_final`-bubble; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) `cat stage_final`-bubble
@endif gcc-bootstrap
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
if [ -f stage_last ]; then \
@@ -496,23 +493,22 @@
else \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) all-host all-target; \
fi
- @$(stage)
.PHONY: all-build
-all-build: [+
- FOR build_modules +] \
- maybe-all-build-[+module+][+
- ENDFOR build_modules +]
+[+ FOR build_modules +]
+all-build: maybe-all-build-[+module+][+ ENDFOR build_modules +]
+
.PHONY: all-host
-all-host: [+
- FOR host_modules +] \
- maybe-all-[+module+][+
- ENDFOR host_modules +]
+[+ FOR host_modules +][+ IF bootstrap +]
+ at if [+module+]-no-bootstrap[+ ENDIF bootstrap +]
+all-host: maybe-all-[+module+][+ IF bootstrap +]
+ at endif [+module+]-no-bootstrap[+ ENDIF bootstrap +][+ ENDFOR host_modules +]
+
.PHONY: all-target
-all-target: [+
- FOR target_modules +] \
- maybe-all-target-[+module+][+
- ENDFOR target_modules +]
+[+ FOR target_modules +][+ IF bootstrap +]
+ at if [+module+]-no-bootstrap[+ ENDIF bootstrap +]
+all-target: maybe-all-target-[+module+][+ IF bootstrap +]
+ at endif [+module+]-no-bootstrap[+ ENDIF bootstrap +][+ ENDFOR target_modules +]
# Do a target for all the subdirectories. A ``make do-X'' will do a
# ``make X'' in all subdirectories (because, in general, there is a
@@ -521,30 +517,25 @@
[+ FOR recursive_targets +]
.PHONY: do-[+make_target+]
do-[+make_target+]:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) [+make_target+]-host \
[+make_target+]-target
- @$(stage)
.PHONY: [+make_target+]-host
-[+make_target+]-host: [+
- FOR host_modules +] \
- maybe-[+make_target+]-[+module+][+
- ENDFOR host_modules +]
+[+ FOR host_modules +]
+[+make_target+]-host: maybe-[+make_target+]-[+module+][+ ENDFOR host_modules +]
.PHONY: [+make_target+]-target
-[+make_target+]-target: [+
- FOR target_modules +] \
- maybe-[+make_target+]-target-[+module+][+
- ENDFOR target_modules +]
+[+ FOR target_modules +]
+[+make_target+]-target: maybe-[+make_target+]-target-[+module+][+ ENDFOR target_modules +]
[+ ENDFOR recursive_targets +]
# Here are the targets which correspond to the do-X targets.
-.PHONY: info installcheck dvi html install-info
+.PHONY: info installcheck dvi html install-info install-html
.PHONY: clean distclean mostlyclean maintainer-clean realclean
.PHONY: local-clean local-distclean local-maintainer-clean
info: do-info
@@ -562,12 +553,14 @@
$(INSTALL_DATA) dir.info $(DESTDIR)$(infodir)/dir.info ; \
else true ; fi
+install-html: do-install-html
+
local-clean:
-rm -f *.a TEMP errs core *.o *~ \#* TAGS *.E *.log
local-distclean:
-rm -f Makefile config.status config.cache mh-frag mt-frag
- -rm -f multilib.out multilib.tmp maybedep.tmp serdep.tmp
+ -rm -f maybedep.tmp serdep.tmp
-if [ "$(TARGET_SUBDIR)" != "." ]; then \
rm -rf $(TARGET_SUBDIR); \
else true; fi
@@ -616,11 +609,10 @@
ENDFOR target_modules +]
do-check:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) check-host check-target
- @$(stage)
# Automated reporting of test results.
@@ -647,11 +639,10 @@
.PHONY: install uninstall
install:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) installdirs install-host install-target
- @$(stage)
.PHONY: install-host-nogcc
install-host-nogcc: [+
@@ -678,6 +669,7 @@
install.all: install-no-fixedincludes
@if [ -f ./gcc/Makefile ] ; then \
r=`${PWD_COMMAND}` ; export r ; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
(cd ./gcc && \
$(MAKE) $(FLAGS_TO_PASS) install-headers) ; \
@@ -730,13 +722,31 @@
maybe-configure-[+prefix+][+module+]:
@if [+prefix+][+module+]
maybe-configure-[+prefix+][+module+]: configure-[+prefix+][+module+]
-configure-[+prefix+][+module+]: [+deps+]
- @[+ IF bootstrap +]test -f stage_last && exit 0; \
- [+ ELSE bootstrap +]$(unstage)
- @[+ ENDIF bootstrap +]test ! -f [+subdir+]/[+module+]/Makefile || exit 0; \
+configure-[+prefix+][+module+]: [+ IF bootstrap +]
+ at endif [+prefix+][+module+]
+ at if [+prefix+][+module+]-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif [+prefix+][+module+]-bootstrap
+ at if [+prefix+][+module+][+ ELSE bootstrap +]
+ @: $(MAKE); $(unstage)[+ ENDIF bootstrap +]
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ [+ IF check_multilibs
+ +]echo "Checking multilib configuration for [+module+]..."; \
$(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+] ; \
- r=`${PWD_COMMAND}`; export r; \
- s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(CC_FOR_TARGET) --print-multi-lib > [+subdir+]/[+module+]/multilib.tmp 2> /dev/null ; \
+ if test -r [+subdir+]/[+module+]/multilib.out; then \
+ if cmp -s [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; then \
+ rm -f [+subdir+]/[+module+]/multilib.tmp; \
+ else \
+ rm -f [+subdir+]/[+module+]/Makefile; \
+ mv [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; \
+ fi; \
+ else \
+ mv [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; \
+ fi; \
+ [+ ENDIF check_multilibs +]test ! -f [+subdir+]/[+module+]/Makefile || exit 0; \
+ $(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+] ; \
[+exports+] \
echo Configuring in [+subdir+]/[+module+]; \
cd "[+subdir+]/[+module+]" || exit 1; \
@@ -757,16 +767,31 @@
[+ FOR bootstrap_stage +]
.PHONY: configure-stage[+id+]-[+prefix+][+module+] maybe-configure-stage[+id+]-[+prefix+][+module+]
maybe-configure-stage[+id+]-[+prefix+][+module+]:
- at if [+module+]-bootstrap
+ at if [+prefix+][+module+]-bootstrap
maybe-configure-stage[+id+]-[+prefix+][+module+]: configure-stage[+id+]-[+prefix+][+module+]
-configure-stage[+id+]-[+prefix+][+module+]: [+deps+]
- @[ `cat stage_current` = stage[+id+] ] || $(MAKE) stage[+id+]-start
- @[ -f [+subdir+]/[+module+]/Makefile ] && exit 0 || : ; \
- r=`${PWD_COMMAND}`; export r; \
+configure-stage[+id+]-[+prefix+][+module+]:
+ @[ $(current_stage) = stage[+id+] ] || $(MAKE) stage[+id+]-start
+ @$(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+]
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ [+ IF check_multilibs
+ +]echo "Checking multilib configuration for [+module+]..."; \
+ $(CC_FOR_TARGET) --print-multi-lib > [+subdir+]/[+module+]/multilib.tmp 2> /dev/null ; \
+ if test -r [+subdir+]/[+module+]/multilib.out; then \
+ if cmp -s [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; then \
+ rm -f [+subdir+]/[+module+]/multilib.tmp; \
+ else \
+ rm -f [+subdir+]/[+module+]/Makefile; \
+ mv [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; \
+ fi; \
+ else \
+ mv [+subdir+]/[+module+]/multilib.tmp [+subdir+]/[+module+]/multilib.out; \
+ fi; \
+ [+ ENDIF check_multilibs +]test ! -f [+subdir+]/[+module+]/Makefile || exit 0; \
[+exports+][+ IF prev +] \
[+poststage1_exports+][+ ENDIF prev +] \
echo Configuring stage [+id+] in [+subdir+]/[+module+] ; \
+ $(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+] ; \
cd [+subdir+]/[+module+] || exit 1; \
case $(srcdir) in \
/* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
@@ -778,7 +803,7 @@
$(SHELL) $${libsrcdir}/configure \
[+args+] $${srcdiroption} \
[+stage_configure_flags+] [+extra_configure_flags+]
- at endif [+module+]-bootstrap
+ at endif [+prefix+][+module+]-bootstrap
[+ ENDFOR bootstrap_stage +]
[+ ENDIF bootstrap +]
[+ ENDDEF +]
@@ -790,10 +815,14 @@
TARGET-[+prefix+][+module+]=[+
IF target +][+target+][+ ELSE +]all[+ ENDIF target +]
maybe-all-[+prefix+][+module+]: all-[+prefix+][+module+]
-all-[+prefix+][+module+]: configure-[+prefix+][+module+]
- @[+ IF bootstrap +]test -f stage_last && exit 0; \
- [+ ELSE bootstrap +]$(unstage)
- @[+ ENDIF bootstrap +]r=`${PWD_COMMAND}`; export r; \
+all-[+prefix+][+module+]: configure-[+prefix+][+module+][+ IF bootstrap +]
+ at endif [+prefix+][+module+]
+ at if [+prefix+][+module+]-bootstrap
+ @if test -f stage_last; then $(unstage); else $(MAKE) stage1-start; fi
+ at endif [+prefix+][+module+]-bootstrap
+ at if [+prefix+][+module+][+ ELSE bootstrap +]
+ @: $(MAKE); $(unstage)[+ ENDIF bootstrap +]
+ @r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
[+exports+] \
(cd [+subdir+]/[+module+] && \
@@ -806,12 +835,12 @@
.PHONY: clean-stage[+id+]-[+prefix+][+module+] maybe-clean-stage[+id+]-[+prefix+][+module+]
maybe-all-stage[+id+]-[+prefix+][+module+]:
maybe-clean-stage[+id+]-[+prefix+][+module+]:
- at if [+module+]-bootstrap
+ at if [+prefix+][+module+]-bootstrap
maybe-all-stage[+id+]-[+prefix+][+module+]: all-stage[+id+]-[+prefix+][+module+]
all-stage[+id+]: all-stage[+id+]-[+prefix+][+module+]
TARGET-stage[+id+]-[+prefix+][+module+] = $(TARGET-[+prefix+][+module+])
all-stage[+id+]-[+prefix+][+module+]: configure-stage[+id+]-[+prefix+][+module+]
- @[ `cat stage_current` = stage[+id+] ] || $(MAKE) stage[+id+]-start
+ @[ $(current_stage) = stage[+id+] ] || $(MAKE) stage[+id+]-start
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
[+exports+][+ IF prev +] \
@@ -827,12 +856,12 @@
clean-stage[+id+]-[+prefix+][+module+]:
@[ -f [+subdir+]/[+module+]/Makefile ] || [ -f [+subdir+]/stage[+id+]-[+module+]/Makefile ] \
|| exit 0 ; \
- @[ `cat stage_current` = stage[+id+] ] || $(MAKE) stage[+id+]-start
+ [ $(current_stage) = stage[+id+] ] || $(MAKE) stage[+id+]-start; \
cd [+subdir+]/[+module+] && \
$(MAKE) [+args+] [+ IF prev +] \
[+poststage1_args+] [+ ENDIF prev +] \
[+stage_make_flags+] [+extra_make_flags+] clean
- at endif [+module+]-bootstrap
+ at endif [+prefix+][+module+]-bootstrap
[+ ENDFOR bootstrap_stage +]
[+ ENDIF bootstrap +]
@@ -872,7 +901,7 @@
[+ ELIF no_check_cross +]
# This module is only tested in a native toolchain.
check-[+module+]:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@if [ '$(host)' = '$(target)' ] ; then \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -882,7 +911,7 @@
fi
[+ ELSE check +]
check-[+module+]:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -899,7 +928,7 @@
install-[+module+]:
[+ ELSE install +]
install-[+module+]: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(HOST_EXPORTS) \
@@ -922,7 +951,7 @@
FOR depend +]\
[+depend+]-[+module+] [+
ENDFOR depend +]
- @[+ IF bootstrap +][+ ELSE +]$(unstage)
+ @[+ IF bootstrap +][+ ELSE +]: $(MAKE); $(unstage)
@[+ ENDIF bootstrap +][ -f ./[+module+]/Makefile ] || exit 0; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
@@ -948,17 +977,9 @@
# ---------------------------------------
[+ FOR target_modules +]
-# There's only one multilib.out. Cleverer subdirs shouldn't need it copied.
- at if target-[+module+]
-$(TARGET_SUBDIR)/[+module+]/multilib.out: multilib.out
- $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/[+module+] ; \
- rm -f $(TARGET_SUBDIR)/[+module+]/Makefile || : ; \
- cp multilib.out $(TARGET_SUBDIR)/[+module+]/multilib.out
- at endif target-[+module+]
-
[+ IF raw_cxx +]
[+ configure prefix="target-" subdir="$(TARGET_SUBDIR)"
- deps=(string-append "$(TARGET_SUBDIR)/" (get "module") "/multilib.out")
+ check_multilibs=true
exports="$(RAW_CXX_TARGET_EXPORTS)"
args="$(TARGET_CONFIGARGS)" no-config-site=true +]
@@ -967,7 +988,7 @@
args="$(TARGET_FLAGS_TO_PASS) 'CXX=$$(RAW_CXX_FOR_TARGET)' 'CXX_FOR_TARGET=$$(RAW_CXX_FOR_TARGET)'" +]
[+ ELSE +]
[+ configure prefix="target-" subdir="$(TARGET_SUBDIR)"
- deps=(string-append "$(TARGET_SUBDIR)/" (get "module") "/multilib.out")
+ check_multilibs=true
exports="$(NORMAL_TARGET_EXPORTS)"
args="$(TARGET_CONFIGARGS)" no-config-site=true +]
@@ -985,7 +1006,7 @@
check-target-[+module+]:
[+ ELSE check +]
check-target-[+module+]:
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \[+
IF raw_cxx +]
@@ -1011,7 +1032,7 @@
install-target-[+module+]:
[+ ELSE install +]
install-target-[+module+]: installdirs
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \[+
IF raw_cxx +]
@@ -1038,7 +1059,7 @@
FOR depend +]\
[+depend+]-target-[+module+] [+
ENDFOR depend +]
- @$(unstage)
+ @: $(MAKE); $(unstage)
@[ -f $(TARGET_SUBDIR)/[+module+]/Makefile ] || exit 0 ; \
r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \[+
@@ -1181,29 +1202,36 @@
# are dummy when toplevel bootstrap is not active.
# While making host and target tools, symlinks to the final stage must be
-# there, so $(MAKE) $(unstage) should be run at various points. To avoid
-# excessive recursive invocations of make, we "inline" them using a variable.
+# there, so $(unstage) should be run at various points. To avoid excessive
+# recursive invocations of make, we "inline" them using a variable. These
+# must be referenced as ": $(MAKE) ; $(unstage)" rather than "$(unstage)"
+# to avoid warnings from the GNU Make job server.
unstage = :
stage = :
+current_stage = ""
@if gcc-bootstrap
unstage = [ -f stage_current ] || $(MAKE) `cat stage_last`-start
-stage = [ -f stage_current ] && $(MAKE) `cat stage_current`-end || :
+stage = if [ -f stage_current ]; then $(MAKE) `cat stage_current`-end || exit 1; else :; fi
+current_stage = "`cat stage_current 2> /dev/null`"
@endif gcc-bootstrap
.PHONY: unstage stage
unstage:
- @$(unstage)
+ @: $(MAKE); $(unstage)
stage:
- @$(stage)
+ @: $(MAKE); $(stage)
+# Disable commands for lean bootstrap.
+LEAN = false
+
# We name the build directories for the various stages "stage1-gcc",
# "stage2-gcc","stage3-gcc", etc.
# Since the 'compare' process will fail (on debugging information) if any
# directory names are different, we need to link the gcc directory for
-# the previous stage to a constant name ('gcc-prev'), and to make the name of
+# the previous stage to a constant name ('prev-gcc'), and to make the name of
# the build directories constant as well. For the latter, we use naked names
# like 'gcc', because the scripts in that directory assume it. We use
# mv on platforms where symlinks to directories do not work or are not
@@ -1229,6 +1257,8 @@
CC="$${CC}" CC_FOR_BUILD="$${CC_FOR_BUILD}" \
STAGE_PREFIX=$$r/prev-gcc/ \
CFLAGS="$(BOOT_CFLAGS)" \
+ LIBCFLAGS="$(BOOT_CFLAGS)" \
+ LDFLAGS="$(BOOT_LDFLAGS)" \
ADAC="\$$(CC)"
# For stage 1:
@@ -1244,61 +1274,54 @@
.PHONY: stage[+id+]-start stage[+id+]-end
stage[+id+]-start::
- @$(stage); \
+ @: $(MAKE); $(stage); \
echo stage[+id+] > stage_current ; \
echo stage[+id+] > stage_last; \
- $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) $(TARGET_SUBDIR)[+
+ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)[+
FOR host_modules +][+ IF bootstrap +]
@if [+ module +]
@cd $(HOST_SUBDIR); [ -d stage[+id+]-[+module+] ] || \
mkdir stage[+id+]-[+module+]; \
- set stage[+id+]-[+module+] [+module+] ; \
- @CREATE_LINK_TO_DIR@ [+ IF prev +] ; \
- set stage[+prev+]-[+module+] prev-[+module+] ; \
- @CREATE_LINK_TO_DIR@ [+ ENDIF prev +]
- at endif [+ module +][+ ENDIF bootstrap +][+ ENDFOR host_modules +][+
- FOR target_modules +][+ IF bootstrap +]
- at if target-[+ module +]
- @cd $(TARGET_SUBDIR); [ -d stage[+id+]-[+module+] ] || \
- mkdir stage[+id+]-[+module+]; \
- set stage[+id+]-[+module+] [+module+] ; \
- @CREATE_LINK_TO_DIR@ [+ IF prev +] ; \
- set stage[+prev+]-[+module+] prev-[+module+] ; \
- @CREATE_LINK_TO_DIR@ [+ ENDIF prev +]
- at endif target-[+ module +][+ ENDIF bootstrap +][+ ENDFOR target_modules +]
+ mv stage[+id+]-[+module+] [+module+] [+ IF prev +] ; \
+ mv stage[+prev+]-[+module+] prev-[+module+] || test -f stage[+prev+]-lean [+ ENDIF prev +]
+ at endif [+ module +][+ ENDIF bootstrap +][+ ENDFOR host_modules +]
+ @[ -d stage[+id+]-$(TARGET_SUBDIR) ] || \
+ mkdir stage[+id+]-$(TARGET_SUBDIR); \
+ mv stage[+id+]-$(TARGET_SUBDIR) $(TARGET_SUBDIR) [+ IF prev +] ; \
+ mv stage[+prev+]-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage[+prev+]-lean [+ ENDIF prev +]
-stage[+id+]-end::
- @rm -f stage_current[+ FOR host_modules +][+ IF bootstrap +]
+stage[+id+]-end:: [+ FOR host_modules +][+ IF bootstrap +]
@if [+ module +]
- @cd $(HOST_SUBDIR); set [+module+] stage[+id+]-[+module+] ; \
- @UNDO_LINK_TO_DIR@ [+ IF prev +] ; \
- set prev-[+module+] stage[+prev+]-[+module+] ; \
- @UNDO_LINK_TO_DIR@ [+ ENDIF prev +]
- at endif [+ module +][+ ENDIF bootstrap +][+ ENDFOR host_modules +][+
- FOR target_modules +][+ IF bootstrap +]
- at if target-[+ module +]
- @cd $(HOST_SUBDIR); set [+module+] stage[+id+]-[+module+] ; \
- @UNDO_LINK_TO_DIR@ [+ IF prev +] ; \
- set prev-[+module+] stage[+prev+]-[+module+] ; \
- @UNDO_LINK_TO_DIR@ [+ ENDIF prev +]
- at endif [+ module +][+ ENDIF bootstrap +][+ ENDFOR target_modules +]
+ @if test -d $(HOST_SUBDIR)/[+module+] ; then \
+ cd $(HOST_SUBDIR); mv [+module+] stage[+id+]-[+module+] [+ IF prev +]; \
+ mv prev-[+module+] stage[+prev+]-[+module+] ; : [+ ENDIF prev +] ; \
+ fi
+ at endif [+ module +][+ ENDIF bootstrap +][+ ENDFOR host_modules +]
+ @if test -d $(TARGET_SUBDIR) ; then \
+ mv $(TARGET_SUBDIR) stage[+id+]-$(TARGET_SUBDIR) [+ IF prev +] ; \
+ mv prev-$(TARGET_SUBDIR) stage[+prev+]-$(TARGET_SUBDIR) ; : [+ ENDIF prev +] ; \
+ fi
+ rm -f stage_current
-# Bubble a bugfix through all the stages up to stage [+id+]. They
-# are remade, but not reconfigured. The next stage (if any) will not
-# be reconfigured as well.
+# Bubble a bugfix through all the stages up to stage [+id+]. They are
+# remade, but not reconfigured. The next stage (if any) will not be
+# reconfigured as well.
.PHONY: stage[+id+]-bubble
-stage[+id+]-bubble:: [+ IF prev +]stage[+prev+]-bubble[+ ENDIF +][+IF lean +]
- @bootstrap_lean at -rm -rf stage[+lean+]-* ; $(STAMP) stage[+lean+]-lean[+ ENDIF lean +]
+stage[+id+]-bubble:: [+ IF prev +]stage[+prev+]-bubble[+ ENDIF +]
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
if test -f stage[+id+]-lean [+
IF prev +]|| test -f stage[+prev+]-lean [+ ENDIF prev +] ; then \
echo Skipping rebuild of stage[+id+] ; \
else \
- $(MAKE) stage[+id+]-start; \
+ $(MAKE) stage[+id+]-start; \[+IF lean +]
+ if $(LEAN); then \
+ rm -rf stage[+lean+]-* ; \
+ $(STAMP) stage[+lean+]-lean ; \
+ fi; \[+ ENDIF lean +]
$(MAKE) $(RECURSE_FLAGS_TO_PASS) all-stage[+id+]; \
fi[+ IF compare-target +]
- $(MAKE) [+compare-target+][+ ENDIF compare-target +]
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) [+compare-target+][+ ENDIF compare-target +]
.PHONY: all-stage[+id+] clean-stage[+id+]
do-clean: clean-stage[+id+]
@@ -1314,8 +1337,9 @@
echo Cannot compare object files as stage [+prev+] was deleted. ; \
exit 0 ; \
fi; \
- $(stage); \
+ : $(MAKE); $(stage); \
rm -f .bad_compare ; \
+ echo Comparing stages [+prev+] and [+id+] ; \
cd stage[+id+]-gcc; \
files=`find . -name "*$(objext)" -print` ; \
cd .. ; \
@@ -1336,31 +1360,43 @@
cat .bad_compare; \
exit 1; \
else \
- true; \
+ echo Comparison successful.; \
fi ; \
$(STAMP) [+compare-target+][+ IF prev +]
- @bootstrap_lean at -rm -rf stage[+prev+]-* ; $(STAMP) stage[+prev+]-lean[+ ENDIF prev +]
+ if $(LEAN); then \
+ rm -rf stage[+prev+]-*; \
+ $(STAMP) stage[+prev+]-lean; \
+ fi[+ ENDIF prev +]
[+ ENDIF compare-target +]
[+ IF bootstrap-target +]
-.PHONY: [+bootstrap-target+]
+.PHONY: [+bootstrap-target+] [+bootstrap-target+]-lean
[+bootstrap-target+]:
echo stage[+id+] > stage_final
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(RECURSE_FLAGS_TO_PASS) stage[+id+]-bubble
- @$(unstage)
+ @: $(MAKE); $(unstage)
@r=`${PWD_COMMAND}`; export r; \
s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
$(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
- @$(stage)
+
+[+bootstrap-target+]-lean:
+ echo stage[+id+] > stage_final
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stage[+id+]-bubble
+ @: $(MAKE); $(unstage)
+ @r=`${PWD_COMMAND}`; export r; \
+ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target
[+ ENDIF bootstrap-target +]
# Rules to wipe a stage and all the following ones, also used for cleanstrap
[+ IF prev +]distclean-stage[+prev+]:: distclean-stage[+id+] [+ ENDIF prev +]
.PHONY: distclean-stage[+id+]
distclean-stage[+id+]::
- @$(stage)
+ @: $(MAKE); $(stage)
rm -rf stage[+id+]-* [+
IF compare-target +][+compare-target+] [+ ENDIF compare-target +]
@@ -1387,20 +1423,40 @@
@if gcc-bootstrap
do-distclean: distclean-stage1
+
+# Provide a GCC build when we're building target libraries. This does
+# not work as a dependency, just as the minimum necessary to avoid errors.
+stage_last:
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) stage1-bubble
@endif gcc-bootstrap
+.PHONY: restrap
+restrap:
+ @: $(MAKE); $(stage)
+ rm -rf stage1-$(TARGET_SUBDIR) [+ FOR bootstrap-stage +][+ IF prev
+ +]stage[+id+] [+ ENDIF prev +][+ ENDFOR bootstrap-stage +]
+ $(MAKE) $(RECURSE_FLAGS_TO_PASS) all
+
# --------------------------------------
# Dependencies between different modules
# --------------------------------------
# Generic dependencies for target modules on host stuff, especially gcc
-[+ FOR target_modules +][+ IF bootstrap +]
- at if gcc-bootstrap[+ FOR bootstrap_stage +]
-configure-stage[+id+]-target-[+module+]: maybe-all-stage[+id+]-gcc[+ ENDFOR +]
- at endif gcc-bootstrap[+ ENDIF bootstrap +]
-configure-target-[+module+]: maybe-all-gcc
-[+ ENDFOR target_modules +]
+ at if gcc-bootstrap[+ FOR target_modules +][+ IF bootstrap
+ +][+ FOR bootstrap_stage +]
+configure-stage[+id+]-target-[+module+]: maybe-all-stage[+id+]-gcc[+
+ ENDFOR +][+ ELSE bootstrap +]
+configure-target-[+module+]: stage_last[+
+ ENDIF bootstrap +][+ ENDFOR target_modules +]
+ at endif gcc-bootstrap
+ at if gcc-no-bootstrap[+ FOR target_modules +][+ IF bootstrap
+ +][+ ELSE +]
+configure-target-[+module+]: maybe-all-gcc[+
+ ENDIF bootstrap +][+ ENDFOR target_modules +]
+ at endif gcc-no-bootstrap
+
+
[+ FOR lang_env_dependencies +]
configure-target-[+module+]: maybe-all-target-newlib maybe-all-target-libgloss
[+ IF cxx +]configure-target-[+module+]: maybe-all-target-libstdc++-v3
@@ -1529,17 +1585,6 @@
# Regenerating top level configury
# --------------------------------
-# Multilib.out tells target dirs what multilibs they should build.
-# There is really only one copy. We use the 'timestamp' method to
-# work around various timestamp bugs on some systems.
-# We use move-if-change so that it's only considered updated when it
-# actually changes, because it has to depend on a phony target.
-multilib.out: maybe-all-gcc
- @r=`${PWD_COMMAND}`; export r; \
- echo "Checking multilib configuration..."; \
- $(CC_FOR_TARGET) --print-multi-lib > multilib.tmp 2> /dev/null ; \
- $(SHELL) $(srcdir)/move-if-change multilib.tmp multilib.out ; \
-
# Rebuilding Makefile.in, using autogen.
AUTOGEN = autogen
$(srcdir)/Makefile.in: @MAINT@ $(srcdir)/Makefile.tpl $(srcdir)/Makefile.def
Modified: branches/binutils/package/bfd/ChangeLog
===================================================================
--- branches/binutils/package/bfd/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,2959 +1,477 @@
-2005-12-13 H.J. Lu <hongjiu.lu at intel.com>
+2006-04-08 H.J. Lu <hongjiu.lu at intel.com>
- PR ld/2008
- * elf.c (_bfd_elf_setup_sections): Return FALSE if
- elf_linked_to_section will be set to NULL.
+ PR ld/2513
+ * elf32-i386.c (GOT_TLS_MASK): New macro for tls_type.
+ (GOT_TLS_IE_IE): Likewise.
+ (GOT_TLS_IE_GD): Likewise.
+ (GOT_TLS_IE_MASK): Likewise.
+ (elf_i386_check_relocs): For global symbols, set GOT_TLS_IE_GD
+ and GOT_TLS_IE_IE for R_386_TLS_GD and R_386_TLS_IE
+ respectively.
+ (allocate_dynrelocs): If both GOT_TLS_IE_IE and GOT_TLS_IE_GD
+ are set, treat tls_type as GOT_TLS_IE_BOTH.
+ (elf_i386_relocate_section): Likewise.
- * format.c (bfd_check_format_matches): Don't check the default
- target twice.
+2006-04-07 Randolph Chung <tausq at debian.org>
-2005-12-13 Alan Modra <amodra at bigpond.net.au>
+ * elf64-hppa.c (elf64_hppa_grok_prstatus): New function.
+ (elf64_hppa_grok_psinfo): Likewise.
+ (elf_backend_grok_pstatus, elf_backend_grok_psinfo): Define.
- * elf64-ppc.c (ppc64_elf_relocate_section): Force tail calls in
- shared libs to resolve locally.
+2006-04-06 DJ Delorie <dj at redhat.com>
-2005-12-12 Paul Brook <paul at codesourcery.com>
+ * elf32-m32c.c (m32c_elf_relocate_section): Generate a symbol for
+ each plt entry we create.
- * bfd-in2.h: Regenerate.
- * elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and
- BFD_RELOC_ARM_PCREL_JUMP.
- (check_use_blx): New function.
- (bfd_elf32_arm_process_before_allocation): Don't allocate glue if
- using BLX.
- (elf32_arm_final_link_relocate): Perform bl<->blx conversion for
- R_ARM_CALL and R_ARM_THM.
- (elf32_arm_get_eabi_attr_int): New function.
- (elf32_arm_size_dynamic_sections): Call check_use_blx.
- * libbfd.h: Regenerate.
- * reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP.
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
-
- * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
- BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
- (cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
- * Makefile.in: Rebuilt.
- * config.bfd: Replace ms1 arch with mt.
- * configure.in: Replace ms1 files with mt files.
- * configure: Rebuilt.
- * elf32-mt.c: Renamed from elf32-ms1.c. Update include files.
- * cpu-mt.c: Renamed from cpu-ms1.c.
-
-2005-12-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_size_stubs): Don't consider non-ppc64 input.
-
-2005-12-10 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_gc_mark_dynamic_ref_symbol): Use !info-executable
- to test for linking shared libs, not info->shared.
-
-2005-12-08 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (struct ppc_elf_link_hash_table): Add emit_stub_syms.
- (ppc_elf_select_plt_layout): Add emit_stub_syms param, save to htab.
- (add_stub_sym): New function.
- (allocate_dynrelocs): Call add_stub_sym.
- (ppc_elf_size_dynamic_sections): Emit __glink and __glink_PLTresolve
- when emit_stub_syms.
- * elf32-ppc.h (ppc_elf_select_plt_layout): Update prototype.
-
-2005-12-08 Alan Modra <amodra at bigpond.net.au>
-
- * reloc.c (enum complain_overflow): Correct comments.
- (bfd_check_overflow): Combine complain_overflow_bitfield and
- complain_overflow_signed code.
- (_bfd_relocate_contents): Likewise.
- (bfd_howto_32): Use complain_overflow_dont.
- * elf32-d10v.c (elf_d10v_howto_table): Revert 2002-06-17 change.
- * bfd-in2.h: Regenerate.
-
-2005-12-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (assign_section_numbers): Remove extra code in the last
- change.
-
-2005-12-07 H.J. Lu <hongjiu.lu at intel.com>
- Andreas Schwab <schwab at suse.de>
-
- PR binutils/1991
- * elf.c (assign_section_numbers): Always use the output section
- when setting up sh_link for SHF_LINK_ORDER.
-
-2005-12-07 Thiemo Seufer <ths at networkno.de>
- H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1932
- * bfd-in.h (bfd_elf_record_link_assignment): Add output_bfd
- and hidden arguments.
-
- * bfd.c (bfd_hide_symbol): Removed.
-
- * bfd-in2.h: Regenerated.
-
- * elflink.c (bfd_elf_record_link_assignment): Handle hidden
- symbols which were provided by a linker script.
-
-2005-12-06 Paul Gilliam <pgilliam at us.ibm.com>
-
- * cpu-powerpc.c (bfd_powerpc_archs): Add ppc 750.
-
-2005-11-18 Mark Kettenis <kettenis at gnu.org>
-
- * elf64-hppa.c (elf64_hppa_section_from_phdr): Create .kernel
- pseudo-section. Make sure .reg section comes after the proc
- section it's generated from.
-
-2005-12-01 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * elf32-m32r.c (m32r_elf_sweep_hook): Fix an illegal duplicate check.
- (m32r_elf_relocate_section): Fix R_M32R_10_PCREL_RELA linkage bug.
- (m32r_elf_gc_sweep_hook): Likewise.
- (m32r_elf_check_relocs): Likewise.
-
-2005-11-24 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (_bfd_generic_match_sections_by_type): Don't define.
- * libbfd-in.h (_bfd_generic_match_sections_by_type): Delete.
- * libbfd.c (_bfd_generic_match_sections_by_type): Delete.
- * targets.c (bfd_match_sections_by_type): Don't define.
- (BFD_JUMP_TABLE_LINK): Remove _bfd_generic_match_sections_by_type.
- * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Likewise.
- * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
-
-2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
- Thiemo Seufer <ths at networkno.de>
-
- * elf32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
- R_MIPS_PC16.
- (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
- (bfd_elf32_bfd_reloc_type_lookup): Don't handle
- BFD_RELOC_16_PCREL_S2.
- * elf64-mips.c (mips_elf64_howto_table_rel): Use rightshift 2 for
- R_MIPS_PC16.
- (mips_elf64_howto_table_rela): Likewise.
- (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
- (bfd_elf64_bfd_reloc_type_lookup): Don't handle
- BFD_RELOC_16_PCREL_S2.
- * elfn32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
- R_MIPS_PC16.
- (elf_mips_howto_table_rela): Likewise.
- (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
- (bfd_elf32_bfd_reloc_type_lookup): Don't handle
- BFD_RELOC_16_PCREL_S2.
- * elfxx-mips.c: Formatting fixes.
- (mips_elf_calculate_relocation): Handle R_MIPS_GNU_REL16_S2
- and R_MIPS_PC16 identically.
-
-2005-11-23 Frederic Riss <frederic.riss at st.com>
-
- * elfcode.h (elf_object_p): Delay the setting of start_address
- until we're sure the backend matches the binary.
-
-2005-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * som.c (som_decode_symclass): Decode BSF_WEAK symbols in the same
- manner as bfd_decode_symclass.
-
-2005-11-18 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_check_relocs): Don't set has_14bit_branch
- on branches to same section.
-
-2005-11-17 Randolph Chung <tausq at debian.org>
-
- * elf64-hppa.c (elf64_hppa_object_p): Recognize corefiles under
- hppa64-hp-hpux11.11.
- (elf64_hppa_section_from_phdr): New function.
- (elf_backend_section_from_phdr): Define.
-
-2005-11-11 Nick Clifton <nickc at redhat.com>
-
- PR 1150
- * elfxx-mips.c (mips_elf_calculate_relocation): Ignore an
- undefined symbol if it is optional.
- (_bfd_mips_elf_merge_symbol_attribute): Make sure that the
- optional flag is merged as well as the visibility.
- * elfxx-mips.h (_bfd_mips_elf_merge_symbol_attribute): Prototype.
- (elf_backend_merge_symbol_attribute): Define.
-
-2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
-
- Add ms2 support
- * archures.c (bfd_mach_ms2): Define.
- * cpu-ms1.c (arch_info_struct): Add ms2 stanza.
- * elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
- (ms1_elf_merge_private_bfd_data): Remove unused variables. Add
- correct merging logic, with workaround.
- (ms1_elf_print_private_bfd_data): Add ms2 case.
- * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
- * libbfd.h: Regenerated.
- * bfd-in2.h: Regenerated.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * warning.m4 (AM_BINUTILS_WARNINGS): Default to empty string
- if compiler is not GCC.
- * configure: Regenerate
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure.host (ia64-*-hpux*): Set _LARGEFILE64_SOURCE.
-
-2005-11-03 Daniel Jacobowitz <dan at codesourcery.com>
-
- * configure.in: Check for fopen64.
- * libbfd-in.h (real_fopen): New prototype.
- * configure, config.in, libbfd.h: Regenerated.
- * bfdio.c (real_fopen): New function.
- * opncls.c (bfd_fopen, bfd_fill_in_gnu_debuglink_section): Use it.
- * cache.c (bfd_open_file): Likewise.
-
-2005-11-03 Thiemo Seufer <ths at networkno.de>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Handle only
- forced local symbols here.
- (mips_elf_create_dynamic_relocation): Likewise.
- (_bfd_mips_elf_finish_dynamic_symbol): Fix typo in comment.
-
-2005-11-03 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (elf_fake_sections): When calculating tbss size, just use
- the last link_order.
- (assign_file_positions_for_segments): Likewise.
- * elflink.c (bfd_elf_final_link): Likewise.
- (elf_reloc_link_order): Correct comment.
-
-2005-11-02 Alan Modra <amodra at bigpond.net.au>
-
- PR ld/1775
- * elf32-m68k.c (elf_m68k_finish_dynamic_symbol): Add required
- parentheses.
-
-2005-10-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * dep-in.sed: Replace " ./" with " ".
-
-2005-10-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * hpux-core.c: Include <machine/reg.h> only if HPUX_CORE is
- define.
- * osf-core.c: Include <sys/core.h> only if OSF_CORE is defined.
- * sco5-core.c: Include <sys/paccess.h> and <sys/region.h> only
- if SCO5_CORE is defined.
-
-2005-10-29 Mark Kettenis <kettenis at gnu.org>
-
- * Makefile.am: Run "make dep-am".
+ * po/Make-in: Add install-html target.
+ * Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
+ htmldir. Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
+ * configure.in: AC_SUBST for datarootdir, docdir and htmldir.
+ * configure: Regenerate.
-2005-10-28 Joel Brobecker <brobecker at adacore.com>
+2006-04-06 H.J. Lu <hongjiu.lu at intel.com>
- From Eric Botcazou <botcazou at adacore.com>
- * coffcode.h (coff_compute_section_file_positions): Fix small
- error in preprocessor directives.
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Skip unneeded passes
+ with the skip_relax_pass_0 and skip_relax_pass_1 bits in the
+ section structure.
-2005-10-28 Joel Brobecker <brobecker at adacore.com>
+2006-04-05 Bernd Schmidt <bernd.schmidt at analog.com>
- Mostly from Eric Botcazou <botcazou at adacore.com>
- * rs6000-core.c: ANSIfy all function definitions.
- Add missing function prototypes.
- (ptr_to_uint): New type.
- (rs6000coff_core_p): Use it as intermediate step in casts.
- (rs6000coff_core_file_matches_executable_p): Likewise.
- * xcoff-target.h (rs6000coff_core_p): Fix prototype.
- (rs6000coff_core_file_matches_executable_p): Likewise.
+ * elf32-bfin.c (bfinfdpic_relocs_info_hash): Sprinkle casts to
+ eliminate warnings.
-2005-10-28 H.J. Lu <hongjiu.lu at intel.com>
+2006-04-05 H.J. Lu <hongjiu.lu at intel.com>
+ James E Wilson <wilson at specifixinc.com>
- PR binutils/1472
- * aoutx.h (NAME (aout, machine_type)): Handle
- bfd_mach_sparc_v8plus, bfd_mach_sparc_v8plusa,
- bfd_mach_sparc_v8plusb, bfd_mach_sparc_v9, bfd_mach_sparc_v9a
- and bfd_mach_sparc_v9b.
+ PR ld/2442
+ * elfxx-ia64.c (elfNN_ia64_dyn_sym_info): Remove next.
+ (elfNN_ia64_local_hash_entry): Add count, sorted_count and
+ size.
+ (elfNN_ia64_link_hash_entry): Likewise.
+ (elfNN_ia64_new_elf_hash_entry): Initialize count, sorted_count
+ and size.
+ (elfNN_ia64_hash_copy_indirect): Updated elfNN_ia64_dyn_sym_info
+ processing.
+ (elfNN_ia64_hash_hide_symbol): Likewise.
+ (elfNN_ia64_global_dyn_sym_thunk): Likewise.
+ (elfNN_ia64_local_dyn_sym_thunk): Likewise.
+ (elfNN_ia64_global_dyn_info_free): New function.
+ (elfNN_ia64_local_dyn_info_free): Likewise.
+ (elfNN_ia64_hash_table_free): Free local and global
+ elfNN_ia64_dyn_sym_info.
+ (addend_compare): New function.
+ (sort_dyn_sym_info): Likewise.
+ (get_dyn_sym_info): Updated to use binary search for addend.
+ (elfNN_ia64_check_relocs): Scan relocations to create dynamic
+ relocation arrays first.
-2005-10-28 Hans-Peter Nilsson <hp at axis.com>
+2006-04-05 Bernd Schmidt <bernd.schmidt at analog.com>
- PR ld/1567
- * elf32-cris.c (cris_elf_howto_table) <R_CRIS_32>: Set
- complain_on_overflow field to complain_overflow_dont.
+ * elf32-bfin.c (_bfin_create_got_section): Don't generate a _gp
+ symbol.
-2005-10-27 Alan Modra <amodra at bigpond.net.au>
+2006-04-05 H.J. Lu <hongjiu.lu at intel.com>
- PR 973
- * cache.c (enum cache_flag): New.
- (close_one): Save file mtime.
- (bfd_cache_lookup): Add flag arg, adjust all users.
- (bfd_cache_lookup_worker): Likewise.
- (cache_btell): Use CACHE_NO_OPEN and return abfd->where if file
- not open.
- (cache_bflush): Similarly, and return success of file not open.
- (cache_bseek): Use CACHE_NO_SEEK if SEEK_SET or SEEK_END.
- (cache_bstat): Use CACHE_NO_SEEK_ERROR.
+ PR ld/2411
+ * elflink.c (check_dynsym): New.
+ (elf_link_output_extsym): Use it.
+ (bfd_elf_final_link): Likewise.
- * bfdwin.c (bfd_get_file_window): Seek into file in place of
- using bfd_cache_lookup.
+2006-04-05 H.J. Lu <hongjiu.lu at intel.com>
- * cache.c (BFD_CACHE_MAX_OPEN): Make private to this file.
- (bfd_last_cache, bfd_cache_lookup, bfd_cache_lookup_worker): Likewise.
- * libbfd-in.h (bfd_cache_lookup_worker, bfd_last_cache): Delete.
- * libbfd.h: Regenerate.
+ PR ld/2404
+ * elflink.c (_bfd_elf_merge_symbol): Skip the default indirect
+ symbol from the dynamic definition with the default version if
+ its type and the type of existing regular definition mismatch.
- * hppabsd-core.c (hppabsd_core_core_file_p): Use bfd_stat, not fstat.
- * sco5-core.c (sco5_core_file_p): Likewise.
- * trad-core.c (trad_unix_core_file_p): Likewise.
+2006-04-05 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
- * cache.c: Reorganize file to avoid forward reference.
-
-2005-10-26 Alan Modra <amodra at bigpond.net.au>
-
- * cache.c (bfd_cache_lookup_worker): Don't abort on failing to
- reopen file.
- (cache_btell, cache_bseek, cache_bflush, cache_bstat): Return -1 on
- bfd_cache_lookup failure.
- (cache_bread, cache_bwrite): Return 0 on the same.
- * bfdwin.c (bfd_get_file_window): Likewise.
- * hppabsd-core.c (hppabsd_core_core_file_p): Likewise.
- * sco5-core.c (sco5_core_file_p): Likewise.
- * trad-core.c (trad_unix_core_file_p): Likewise.
-
-2005-10-26 Alan Modra <amodra at bigpond.net.au>
-
- * cache.c (bfd_cache_lookup_worker): Use bfd_error_handler
- rather than bfd_perror. Print file name. Internationalise.
-
-2005-10-26 Alan Modra <amodra at bigpond.net.au>
-
- * cache.c (bfd_open_file): Set bfd_error_system_call on failure
- to open file.
- (bfd_cache_lookup_worker): Remove check that file pos is in
- unsigned long range. Print system error before aborting.
-
-2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * Makefile.am: Add rules for coff-z80 and cpu-z80.
- * Makefile.in: Regenerated.
- * archures.c: Add bfd_arch_z80 and support for it.
- * coffcode.h(coff_set_arch_mach_hook): Add case Z80MAGIC.
- (coff_set_flags): Add case bfd_arch_z80.
- * config.bfd: Add z80coff_vec.
- * configure.in: Add z80coff_vec.
- * reloc.c: Add BFD_RELOC_Z80_DISP8
- * targets.c: Add z80coff_vec.
- * coff-z80.c: New file
- * cpu-z80.c: New file
- * configure: Regenerated.
- * libbfd.h: Regenerated.
- * bfd-in2.h: Regenerated.
-
-2005-10-26 Alan Modra <amodra at bigpond.net.au>
-
- PR ld/1540
- * elf-bfd.h (elf_backend_copy_indirect_symbol): Replace pointer to
- elf_backend_data with pointer to bfd_link_info.
- (_bfd_elf_link_hash_copy_indirect): Likewise.
- * elf.c (_bfd_elf_link_hash_copy_indirect): Likewise. Handle
- direct and indirect symbols both having dynamic link info.
- * elf32-arm.c (elf32_arm_copy_indirect_symbol): Likewise.
- * elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Likewise.
- * elf32-i386.c (elf_i386_copy_indirect_symbol): Likewise.
- * elf32-m32r.c (m32r_elf_copy_indirect_symbol): Likewise.
- * elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise.
- * elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise.
- * elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise.
- * elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
- * elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise.
- * elf64-x86-64.c (elf64_x86_64_copy_indirect_symbol): Likewise.
- * elfxx-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_copy_indirect_symbol): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_copy_indirect_symbol): Likewise.
- * elflink.c: Adjust all calls to bed->elf_backend_copy_indirect_symbol.
- * elfxx-mips.h (_bfd_mips_elf_copy_indirect_symbol): Update prototype.
- * elfxx-sparc.h (_bfd_sparc_elf_copy_indirect_symbol): Likewise.
-
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
-
- * po/SRC-POTFILES.in: Regenerate.
- * po/bfd.pot: Regenerate.
-
-2005-10-24 Jie Zhang <jie.zhang at analog.com>
-
- * elf32-bfin.c (bfd_bfin_elf32_create_embedded_relocs): Fix signedness
- warning.
-
-2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
-
- * elf32-bfin.c (bfin_howto_table): Set src_mask to 0 for all relocs.
- (bfin_imm16_reloc): Always add in the addend. Don't fetch existing
- contents from section.
- (bfin_relocate_section): Rework so as to not call special_functions.
- Handle the relocation stack here. Treat pcrel24 relocs specially.
-
-2005-10-24 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_input_bfd): Don't use linker_mark and
- SEC_EXCLUDE to test for sections dropped from output. Instead,
- use bfd_section_removed_from_list on normal sections. Don't
- attempt to handle symbols with unknown reserved section indices.
- * linker.c (_bfd_generic_link_output_symbols): Don't use
- linker_mark to test for symbols belonging to dropped sections.
- Do allow absolute symbols.
-
-2005-10-24 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-i370.c (i370_elf_fake_sections): Don't set SHF_EXCLUDE on
- group sections.
-
-2005-10-24 Jan Beulich <jbeulich at novell.com>
-
- * cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
- set of indirect operands.
-
-2005-10-24 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_fake_sections): Don't set SHF_EXCLUDE on
- group sections.
-
-2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
-
- * coff-rs6000.c (rs6000coff_vec): Initialize
- _bfd_init_private_section_data with
- _bfd_generic_init_private_section_data.
- (pmac_xcoff_vec): Likewise.
- * coff64-rs6000.c (rs6000coff64_vec): Likewise.
- (aix5coff64_vec): Likewise.
-
-2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1487
- * elf-bfd.h (_bfd_generic_init_private_section_data): New.
- (_bfd_elf_init_private_section_data): New.
-
- * elf.c (elf_fake_sections): Don't set SHF_GROUP for
- relocatable link.
- (bfd_elf_set_group_contents): Don't handle relocatable link
- specially.
- (assign_section_numbers): If it isn't called by assembler,
- use the output section of elf_linked_to_section for
- SHF_LINK_ORDER.
- (_bfd_elf_init_private_section_data): New.
- (_bfd_elf_copy_private_section_data): Call it.
-
- * libbfd-in.h (_bfd_generic_init_private_section_data): New.
-
- * libbfd.c (_bfd_generic_init_private_section_data): New.
-
- * targets.c (BFD_JUMP_TABLE_COPY): Add
- _bfd_generic_init_private_section_data.
- (bfd_init_private_section_data): Likewise.
-
- * bfd-in2.h: Regenerated.
- * libbfd.h: Likewise.
-
-2005-10-23 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (dec_dynrel_count): Don't report errors for local
- syms in gc'd sections.
- (ppc64_elf_edit_opd): Don't adjust reloc counts when NO_OPD_RELOCS.
- (elf_backend_action_discarded): Define.
- (ppc64_elf_action_discarded): New function.
-
-2005-10-19 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (find_arm_elf_section_entry): New function.
- (get_arm_elf_section_data): Use it.
- (unrecord_section_with_arm_elf_section_data): Use it.
-
-2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
-
- * coff-rs6000.c (rs6000coff_vec): Initialize
- _bfd_match_sections_by_type with
- _bfd_generic_match_sections_by_type.
- (pmac_xcoff_vec): Likewise.
- * coff64-rs6000.c (rs6000coff64_vec): Likewise.
- (aix5coff64_vec): Likewise.
-
-2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1467
- * elf-bfd.h (_bfd_elf_match_sections_by_type): New.
- (_bfd_generic_match_sections_by_type): New. Defined.
-
- * elf.c (_bfd_elf_match_sections_by_type): New.
-
- * libbfd-in.h (_bfd_generic_match_sections_by_type): New.
-
- * bfd-in2.h: Regenerated.
- * libbfd.h: Likewise.
-
- * libbfd.c (_bfd_generic_match_sections_by_type): New.
-
- * targets.c (BFD_JUMP_TABLE_LINK): Initialize
- _bfd_match_sections_by_type with
- _bfd_generic_match_sections_by_type.
- (bfd_target): Add _bfd_match_sections_by_type.
-
-2005-10-08 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c: Move #include "elf/arm.h" after libbfd.h.
- (NUM_KNOWN_ATTRIBUTES): Define.
- (aeabi_attribute, aeabi_attribute_list): Define.
- (elf32_arm_obj_tdata): Add known_eabi_attributes and
- other_eabi_attributes.
- (uleb128_size, is_default_attr, eabi_attr_size,
- elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
- elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
- elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int,
- elf32_arm_add_eabi_attr_compat, copy_eabi_attributes,
- elf32_arm_merge_eabi_attributes): New functions.
- (elf32_arm_copy_private_bfd_data): Copy EABI object attributes.
- (elf32_arm_fake_sections): Handle .ARM.attributes.
- (elf32_arm_parse_attributes): New function.
- (elf32_arm_section_from_shdr): Use it.
- (bfd_elf32_bfd_final_link): Define.
-
-2005-10-06 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_check_relocs): Avoid aliasing warnings from
- GCC.
- (elf32_arm_size_dynamic_sections): Likewise.
- * ecofflink.c (bfd_ecoff_debug_one_external): Likewise.
- * elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
- * elf32-m32r.c (m32r_elf_check_relocs): Likewise.
- * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
- * elf32-ppc.c (ppc_elf_check_relocs): Likewise.
- * elf32-s390.c (elf_s390_check_relocs): Likewise.
- (elf_s390_size_dynamic_sections): Likewise.
- * elf32-sh.c (sh_elf_check_relocs): Likewise.
- * elf64-ppc.c (ppc64_elf_check_relocs, dec_dynrel_count)
- (ppc64_elf_size_dynamic_sections): Likewise.
- * elf64-s390.c (elf_s390_check_relocs): Likewise.
- (elf_s390_size_dynamic_sections): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
- (_bfd_sparc_elf_size_dynamic_sections): Likewise.
- * ieee.c (ieee_slurp_section_data): Likewise.
- * oasys.c (oasys_slurp_section_data): Likewise.
-
-2005-10-04 Bob Wilson <bob.wilson at acm.org>
-
- * archive.c: Add missing SUBSECTION for documentation.
- * bfd.c: Likewise.
- * cache.c: Likewise.
- * corefile.c: Likewise.
- * format.c: Likewise.
- * init.c: Likewise.
- * libbfd.c: Likewise.
- * opncls.c: Likewise.
- * elf.c: Remove blank line after SECTION heading.
- * reloc.c: Change "howto manager" SECTION to a SUBSECTION.
-
-2005-10-04 Nick Clifton <nickc at redhat.com>
-
- * elf32-arm.c (get_arm_elf_section_data): Cache the last pointer
- matched so that the typical case of scanning for the previous
- section to last one can be handled quickly.
-
-2005-10-03 David Heine <dlheine at tensilica.com>
-
- * elf32-xtensa.c (relocations_reach): Skip range check for
- absolute literals.
-
-2005-10-03 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (_bfd_elf_get_synthetic_symtab): Set BSF_GLOBAL on
- synthetic syms.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * Makefile.am: Bfin support.
- * Makefile.in: Regenerated.
- * aclocal.m4: Regenerated.
- * archures.c (bfd_mach_bfin): New.
- (bfd_arch_bfin): New.
- bfd-in.h (bfd_bfin_elf32_create_embedded_relocs): New.
- * bfd-in2.h: Regenerated.
- * config.bfd: Bfin support.
- * configure: Regenerated.
- * configure.in: Bfin support.
- * libbfd.h: Regenerated.
- * reloc.c: Add BFD relocations for Bfin.
- * targets.c (bfd_elf32_bfin_vec): New.
- * cpu-bfin.c: New file.
- * elf32-bfin.c: New file.
-
-2005-09-30 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc_type_of_stub): Check both func desc and func
- entry sym before deciding no stub is needed.
- (ppc64_elf_size_stubs): When calculating branch destination,
- don't use func desc sym for old ABI objects unless func entry
- is undefined.
-
-2005-09-28 H.J. Lu <hongjiu.lu at intel.com>
-
- PR binutils/1321
- * elf-bfd.h (_bfd_elf_setup_group_pointers): Renamed to ...
- (_bfd_elf_setup_sections): This.
- * elf.c: Likewise.
- * elfcode.h (elf_object_p): Likewise.
-
- * elf.c (_bfd_elf_setup_sections): Process SHF_LINK_ORDER.
- (_bfd_elf_copy_private_section_data): Likewise.
-
-2005-09-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_fixup_link_order): Report locations for mixed
- ordered and unordered input sections.
-
-2005-09-22 James E. Wilson <wilson at specifix.com>
-
- * dwarf2.c (struct funcinfo): Delete nesting_level field.
- (lookup_address_in_function_table): Delete code to set funcinfo
- caller_func field. Delete local curr_func.
- (scan_unit_for_symbols): New locals nested_funcs, nested_funcs_size.
- Delete code setting funcinfo nesting_level field. Add code to set
- funcinfo caller_func field.
-
-2005-09-20 James E. Wilson <wilson at specifix.com>
-
- * dwarf2.c (find_abstract_instance_name): Don't early exit when name
- set. For DW_AT_name case, only set name if not already set. Handle
- DW_AT_MIPS_linkage_name.
-
-2005-09-20 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (_bfd_elf_merge_symbol): Simplify.
-
-2005-09-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc_build_one_stub): Replace assertion that long
- branch offset is in range with an error. Print full stub name on
- errors.
- (ppc_size_one_stub): Print full stub name on errors.
- (group_sections): Warn if section size exceeds group size.
- (ppc64_elf_size_stubs): Continue relaxing when stub types change.
-
-2005-09-09 Kevin Buettner <kevinb at redhat.com>
-
- * elf32-am33lin.c (bfd.h, sysdep.h, elf-bfd.h, elf/mn10300.h):
- Include.
- (elf32_am33lin_grok_prstatus, elf32_am33lin_grok_psinfo): New
- functions.
- (elf_backend_grok_prstatus, elf_backend_grok_psinfo): Define.
-
-2005-09-09 Richard Earnshaw <richard.earnshaw at arm.com>
-
- * elf32-arm.c (elf32_arm_section_from_shdr): Accept SHT_ARM_PREEMPTMAP
- and SHT_ARM_ATTRIBUTES.
-
-2005-09-08 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_get_linked_section_vma): Fix a typo in comment.
- * elfxx-ia64.c (elf_backend_link_order_error_handler): Likewise.
-
-2005-09-08 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1263
- * elflink.c (elf_link_add_object_symbols): Abort for
- --just-symbols on DSO.
-
-2005-09-08 Paul Brook <paul at codesourcery.com>
-
- * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
-
-2005-09-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1301
- * elflink.c (_bfd_elf_merge_symbol): Don't check undefined
- symbol introduced by "ld -u" for TLS.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * libbdf.h: Regenerate.
- * bfd-in2.h: Regenerate.
- * reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
- BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
-
-2005-09-01 Dmitry Diky <diwil at spec.ru>
-
- * elf32-msp430.c (msp430_elf_relax_delete_bytes): Do not adjust
- local symbols and move it to
- (msp430_elf_relax_adjust_locals): New function - walk over the
- sections in the bfd and adjust relocations as necessary.
-
-2005-08-31 DJ Delorie <dj at redhat.com>
-
- * elf32-i386.c (elf_i386_check_relocs): Don't cast a unary &
- address operator, as that breaks GCC's strict aliasing rules.
- (elf_i386_size_dynamic_sections): Avoid the need for type
- punning.
- * elf64-x86-64.c (elf_x86_64_check_relocs): Don't cast a unary
- & address operator, as that breaks GCC's strict aliasing
- rules.
- (elf_x86_64_size_dynamic_sections): Avoid the need for type
- punning.
-
-2005-08-30 Phil Edwards <phil at codesourcery.com>
-
- * config.bfd (i[3-7]86-*-vxworks): Match vxworks* instead.
-
-2005-08-29 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1247
- * elfxx-ia64.c (allocate_fptr): Check undefined symbol.
-
-2005-08-29 Steven J. Hill <sjhill at realitydiluted.com>
-
- * elfxx-mips.c (_bfd_mips_elf_relocate_section): Initialise
- 'value' to avoid compile time warning message.
-
-2005-08-26 Christian Groessler <chris at groessler.org>
-
- * coff-z8k.c: (r_jr, r_disp7, r_callr): Fix src_mask and dst_mask
- of HOWTO.
- (coff_z8k_select_reloc): Remove.
- (SELECT_RELOC): Remove.
- (coff_z8k_reloc_type_lookup): New function.
- (coff_bfd_reloc_type_lookup): Define.
- * configure.in: Add cofflink.lo to z8kcoff_vec.
+ * config.bfd (sparc-*-vxworks*): New stanza.
+ * configure.in (bfd_elf32_sparc_vxworks_vec): New stanza.
+ (bfd_elf32_sparc_vec, bfd_elf64_sparc_vec): Add elf-vxworks.lo.
* configure: Regenerate.
- * reloc.c: (bfd_reloc_code_type): Add z8k relocations.
- (bfd_install_relocation): Don't clear reloc_entry->addend for
- coff-z8k target.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
+ * elf32-sparc.c: Include elf-vxworks.h.
+ (elf32_sparc_vxworks_link_hash_table_create: New.
+ (elf32_sparc_vxworks_final_write_processing): New.
+ (TARGET_BIG_SYM): Override for VxWorks.
+ (TARGET_BIG_NAME, ELF_MINPAGESIZE): Likewise.
+ (bfd_elf32_bfd_link_hash_table_create): Likewise.
+ (elf_backend_want_got_plt, elf_backend_plt_readonly): Likewise.
+ (elf_backend_got_header_size, elf_backend_add_symbol_hook): Likewise.
+ (elf_backend_link_output_symbol_hook): Likewise.
+ (elf_backend_emit_relocs): Likewise.
+ (elf_backend_final_write_processing, elf32_bed): Likewise.
+ * elfxx-sparc.c: Include libiberty.h and elf-vxworks.h.
+ (sparc_vxworks_exec_plt0_entry, sparc_vxworks_exec_plt_entry): New.
+ (sparc_vxworks_shared_plt0_entry, sparc_vxworks_shared_plt_entry): New.
+ (_bfd_sparc_elf_link_hash_table_create): Don't initialize
+ build_plt_entry here.
+ (create_got_section): Initialize sgotplt for VxWorks.
+ (_bfd_sparc_elf_create_dynamic_sections): Initialize build_plt_entry,
+ plt_header_size and plt_entry_size, with new VxWorks-specific settings.
+ Call elf_vxworks_create_dynamic_sections for VxWorks.
+ (allocate_dynrelocs): Use plt_header_size and plt_entry_size.
+ Allocate room for .got.plt and .rela.plt.unloaded entries on VxWorks.
+ (_bfd_sparc_elf_size_dynamic_sections): Don't allocate a nop in .plt
+ for VxWorks. Check for the .got.plt section.
+ (sparc_vxworks_build_plt_entry): New function.
+ (_bfd_sparc_elf_finish_dynamic_symbol): Add handling of VxWorks PLTs.
+ Don't make _GLOBAL_OFFSET_TABLE_ and _PROCEDURE_LINKAGE_TABLE_
+ absolute on VxWorks.
+ (sparc32_finish_dyn): Add special handling for DT_RELASZ
+ and DT_PLTGOT on VxWorks.
+ (sparc_vxworks_finish_exec_plt): New.
+ (sparc_vxworks_finish_shared_plt): New.
+ (_bfd_sparc_elf_finish_dynamic_sections): Call them.
+ Use plt_header_size and plt_entry_size.
+ * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add is_vxworks,
+ srelplt2, sgotplt, plt_header_size and plt_entry_size fields.
+ * Makefile.am (elfxx-sparc.lo): Depend on elf-vxworks.h.
+ (elf32-sparc.lo): Likewise.
+ * Makefile.in: Regenerate.
+ * targets.c (bfd_elf32_sparc_vxworks_vec): Declare.
+ (_bfd_target_vector): Add a pointer to it.
-2005-08-25 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+2006-03-30 Ben Elliston <bje at au.ibm.com>
- * elf32-sh.c (sh_elf_get_flags_from_mach): Fix off-by-one error.
+ PR ld/2267
+ * elflink.c (elf_fixup_link_order): Ensure `elfsec' is not a
+ special section number that exceeds the number of ELF sections
+ (eg. SHN_MIPS_SCOMMON).
-2005-08-24 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-27 Richard Sandiford <richard at codesourcery.com>
- PR ld/1208
- * elf-hppa.h (elf_hppa_relocate_section): Print out the name
- of unresolvable relocation.
- * elf-m10300.c (mn10300_elf_relocate_section): Likewise.
- * elf32-arm.c (elf32_arm_relocate_section): Likewise.
- * elf32-i386.c (elf_i386_relocate_section): Likewise.
- * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
- * elf32-m68k.c (elf_m68k_relocate_section): Likewise.
- * elf32-s390.c (elf_s390_relocate_section): Likewise.
- * elf32-sh.c (sh_elf_relocate_section): Likewise.
- * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
- * elf64-s390.c (elf_s390_relocate_section): Likewise.
- * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
- * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise.
+ * elfxx-mips.c (mips_got_entry): Add more commentary.
+ (mips_elf_local_got_index): Use the hash table entry to record
+ the GOT index of forced-local symbols.
+ (mips_elf_initialize_tls_index): Rearrange code. Store the index
+ in either the hash table entry or the mips_got_entry, not both.
+ Add more commentary.
+ (mips_elf_multi_got): Make sure the g->next is nonnull when calling
+ mips_elf_initialize_tls_index.
-2005-08-18 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+2006-03-25 Bernd Schmidt <bernd.schmidt at analog.com>
- * config.bfd: Add bfd_elf32_shnbsd_vec and bfd_elf32_shlnbsd_vec
- to targ_selvecs for sh5*-*-netbsd* and sh64*-*-netbsd*.
+ * elf32-bfin.c (bfd_const_reloc, bfd_oper_reloc, bfin_push_reloc,
+ RELOC_STACK_SIZE, reloc_stack, reloc_stack_tos, is_reloc_stack_empty,
+ reloc_stack_push, reloc_stack_pop, reloc_stack_operate,
+ bfin_areloc_howto_table): Delete. All
+ uses deleted as well.
+ (bfin_reloc_map): Delete all stack relocs.
+ (bfin_info_to_howto, bfin_bfd_reloc_type_lookup,
+ bfin_reloc_type_lookup): Don't support them.
+ (bfin_relocate_section): Don't try to handle them.
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * coff-a29k.c: Delete.
- * cpu-a29k.c: Delete.
- * Makefile.am: Remove mention of a29k files.
- * aoutf1.h: Remove a29k support.
- * aoutx.h: Likewise.
- * archures.c: Likewise.
- * coffcode.h: Likewise.
- * config.bfd: Likewise.
+ * config.bfd (bfin-*-*): Add bfd_elf32_bfinfdpic_vec.
* configure.in: Likewise.
- * ieee.c: Likewise.
- * mipsbsd.c: Likewise.
- * pdp11.c: Likewise.
- * sparclynx.c: Likewise.
- * targets.c: Likewise.
- * Makefile.in: Regenerate.
* configure: Regenerate.
+ * elf32-bfin.c: Include "elf/dwarf2.h" and "hashtab.h".
+ (BFIN_RELOC_MAX): Now 0x21.
+ (bfin_howto_table, bfin_reloc_map): Add FD-PIC relocs.
+ (bfd_elf32_bfinfdpic_vec): Declare.
+ (IS_FDPIC): New macro.
+ (struct bfinfdpic_elf_link_hash_table): New struct.
+ (bfinfdpic_hash_table, bfinfdpic_got_section,
+ bfinfdpic_gotrel_section, bfinfdpic_gotfixup_section,
+ bfinfdpic_plt_setion, bfinfdpic_pltrel_section,
+ bfinfdpic_relocs_info, bfinfdpic_got_initial_offset,
+ bfinfdpic_plt_initial_offset): Accessor macros for it.
+ (BFINFDPIC_SYM_LOCAL, BFINFDPIC_FUNCDESC_LOCAL): New macros.
+ (struct bfinfdpic_relocs_info): New struct.
+ (LZPLT_RESOLVER_EXTRA, LZPLT_NORMAL_SIZE, LZPLT_ENTRIES,
+ BFINFDPIC_LZPLT_BLOCK_SIZE, BFINFDPIC_LZPLT_RESOLV_LOC,
+ DEFAULT_STACK_SIZE): New macros.
+ (bfinfdpic_elf_link_hash_table_create, bfinfdpic_relocs_info_hash,
+ bfinfdpic_relocs_info_eq, bfinfdpics_relocs_info_find,
+ bfinfdpic_relocs_info_for_global, bfinfdpic_relocs_info_for_local,
+ bfinfdpic_pic_merge_early_relocs_info, _bfinfdpic_add_dyn_reloc,
+ _bfinfdpic_add_rofixup, _bfinfdpic_osec_to_segment,
+ _bfinfdpic_osec_readonly_p, bfinfdpic_relocate_section,
+ bfinfdpic_check_relocs, bfinfdpic_gc_sweep_hook,
+ _bfinfdpic_link_omit_section_dynsym, _bfin_create_got_section,
+ elf32_bfinfdpic_create_dynamic_sections, _bfinfdpic_get_fd_entry,
+ _bfinfdpic_compute_got_alloc_data, _bfinfdpic_get_got_entry,
+ _bfinfdpic_assign_got_entries, _bfinfdpic_assign_plt_entries,
+ _bfinfdpic_resolve_final_relocs_info,
+ elf32_bfinfdpic_size_dynamic_sections,
+ elf32_bfinfdpic_always_size_sections,
+ elf32_bfinfdpic_modify_segment_map,
+ _bfinfdpic_count_got_plt_entries,
+ elf32_bfinfdpic_finish_dynamic_sections,
+ elf32_bfinfdpic_adjust_dynamic_symbol,
+ elf32_bfinfdpic_finish_dynamic_symbol,
+ elf32_bfinfdpic_elf_use_relative_eh_frame,
+ elf32_bfinfdpic_elf_encode_eh_address,
+ elf32_bfin_object_p, bfin_elf_copy_private_bfd_data,
+ elf32_bfinfdpic_copy_private_bfd_data,
+ (struct _bfinfdpic_dynamic_got_info,
+ struct _bfinfdpic_dynamic_got_plt_info): New structs.
+ (elf32_bfin_print_private_bfd_data): Print PIC flags.
+ (elf32_bfin_merge_private_bfd_data): Extend to support FD-PIC.
+ (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, elf32_bed,
+ elf_backend_got_header_size, bfd_elf32_bfd_link_hash_table_create,
+ elf_backend_always_size_sectinos, elf_backend_modify_segment_map,
+ bfd_elf32_bfd_copy_private_bfd_data,
+ elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
+ elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol,
+ elf_backend_finish_dynamic_sections, elf_backend_relocate_section,
+ elf_backend_can_make_relative_eh_frame, elf_backend_check_relocs,
+ elf_backend_can_make_ldsa_relative_eh_frame, elf_backend_may_use_rel_p,
+ elf_backend_may_use_rela_p, elf_backend_default_use_rela_p,
+ elf_backend_omit_section_dynsym): Redefine these macros and include
+ "elf32-target.h" again to create the elf32-bfinfdpic target.
+ * reloc.c (BFD_RELOC_BFIN_GOT17M4, BFD_RELOC_BFIN_GOTHI,
+ BFD_RELOC_BFIN_GOTLO, BFD_RELOC_BFIN_FUNCDESC,
+ BFD_RELOC_BFIN_FUNCDESC_GOT17M4, BFD_RELOC_BFIN_FUNCDESC_GOTHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTLO, BFD_RELOC_BFIN_FUNCDESC_VALUE,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4, BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO, BFD_RELOC_BFIN_GOTOFFHI,
+ BFD_RELOC_BFIN_GOTOFFLO): New.
+ * targets.c (bfd_elf32_bfinfdpic_vec): New bfd_target.
+ (_bfd_target_vector): Add it.
* bfd-in2.h: Regenerate.
- * po/SRC-POTFILES.in: Regenerate.
-
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Warn on
- zero size dynamic variables.
- * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
- * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
- * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
- * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
- * elf32-i386.c (elf_i386_adjust_dynamic_symbol): Likewise.
- * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
- * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
- * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
- * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
- * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
- * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
- * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
- * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
- * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
- * elf64-x86-64.c (elf64_x86_64_adjust_dynamic_symbol): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
-
-2005-08-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR binutils/1179
- * dwarf2.c (_bfd_dwarf2_find_nearest_line): Use section lma
- instead of vma.
- (_bfd_dwarf2_find_line): Likewise.
-
-2005-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-mmix.c (mmix_elf_add_symbol_hook): Mark reg section
- SEC_LINKER_CREATED.
- (mmix_elf_final_link): Check that section hasn't already been
- removed before removing.
- * mmo.c (mmo_scan): Mark reg contents section SEC_LINKER_CREATED.
- (mmo_canonicalize_symtab): Likewise for reg section.
-
-2005-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Move assert later.
- * elfxx-mips.c (_bfd_mips_elf_hide_symbol): Cope with being called
- without any got section.
-
-2005-08-17 Danny Smith <dannysmith at users.sourceforge.net>
-
- * cofflink.c (_bfd_coff_generic_relocate_section): Correct
- comment.
-
-2005-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (_bfd_elf_define_linkage_sym): Don't call
- bfd_elf_link_record_dynamic_symbol. Call elf_backend_hide_symbol.
- (_bfd_elf_link_renumber_dynsyms): Formatting.
- (struct elf_gc_sweep_symbol_info): New.
- (elf_gc_sweep_symbol): Rewrite.
- (elf_gc_sweep): Adjust params and elf_gc_sweep_symbol call.
- Call _bfd_elf_link_renumber_dynsyms.
- (bfd_elf_gc_sections): Adjust elf_gc_sweep call.
-
-2005-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_edit_opd): Don't call dec_dynrel_count
- when relocatable.
-
-2005-08-15 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (ELF_MACHINE_CODE, ELF_MACHINE_ALT1): Swap values
- of EM_XTENSA and EM_XTENSA_OLD.
-
-2005-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (_bfd_elf_define_linkage_sym): Declare.
- * elflink.c (_bfd_elf_define_linkage_sym): New function, extracted
- from..
- (_bfd_elf_create_got_section): ..here.
- (_bfd_elf_link_create_dynamic_sections): Call it for _DYNAMIC.
- (_bfd_elf_create_dynamic_sections): ..and _PROCEDURE_LINKAGE_TABLE_.
- * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Use
- _bfd_elf_define_linkage_sym.
- * elf32-frv.c (_frv_create_got_section): Likewise.
- * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Likewise.
-
-2005-08-15 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_howto_table_1): Make R_ARM_PLT32 the same as
- R_ARM_PC24.
-
-2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- PR ld/1135
- * elf64-hppa.c (elf64_hppa_special_sections): Add flag definitions for
- .plt, .dlt, .sdata, .sbss and .tbss.
-
-2005-08-12 Dmitry Diky <diwil at spec.ru>
-
- * elf32-msp430.c (msp430_elf_relax_delete_bytes): Adjust relocations
- referenced by .section + DISPLACEMENT.
-
-2005-08-10 James E. Wilson <wilson at specifix.com>
-
- * dwarf2.c (scan_unit_for_symbols, case DT_AT_location): Verify that
- DW_OP_addr is only opcode in location before using it.
-
-2005-08-09 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_final_link): Reset gp.
-
-2005-08-09 Rodney Brown <rbrown at bravurasolutions.com.au>
- Nick Clifton <nickc at redhat.com>
-
- * aix5ppc-core.c (xcoff64_core_p): Constify return_value
- variable. Also, do not use core_hdr macro as it evaluates to a
- cast of an lvalue which is no longer supported by GCC 4.0.
-
-2005-08-08 Eric Dönges <Eric.Doenges at betty-tv.com>
-
- * archures.c (bfd_mach_msp21): New MSP430 machine number.
- * bfd-in2.h: Regenerate.
- * cpu-msp430.c (arch_info_struct): Add support for msp430x21xx
- variants.
-
-2005-08-07 Nick Clifton <nickc at redhat.com>
- Paul Brook <paul at codesourcery.com>
-
- PR 1147
- * elf32-arm.c (bfd_elf32_close_and_cleanup): Define.
- (elf32_arm_close_and_cleanup): New function - walk over the
- sections in the bfd that is being closed removing them from the
- list of recorded sections.
- (unrecord_section_via_map_over_sections): New helper function.
- (record_section_with_arm_elf_section_data): Call bfd_malloc
- instead of bfd_alloc. Remove unneeded abfd parameter.
- (elf32_arm_new_section_hook): Do not pass bfd to
- record_section_with_arm_elf_section_data.
-
- * elfxx-target.h (bfd_elfNN_close_and_cleanup): Only define if not
- already defined by the target.
-
-2005-08-05 Fred Fish <fnf at specifix.com>
-
- * dwarf2.c (read_rangelist): Use addr_size instead of offset_size
- to determine how many bytes to read from each rangelist entry.
-
-2005-08-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd.c (bfd_hide_symbol): New.
- * bfd-in2.h: Regenerated.
-
-2005-08-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf64-x86-64.c (elf64_x86_64_merge_symbol): When mixing a
- large common symbol and a normal common symbol, always turn
- the large common symbol into a normal one.
-
-2005-08-04 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (struct elf_linker_section): Replace sym_val field
- with sym.
- (ppc_elf_relocate_section): Adjust for above.
- (create_sdata_sym): New function.
- (ppc_elf_create_linker_section): Call it.
- (ppc_elf_check_relocs): Correct has_sda_refs and non_got_refs.
- Create sdata syms for all SDA relocs.
- (ppc_elf_adjust_dynamic_symbol): Don't special case _SDA_BASE_
- and _SDA2_BASE_.
- (ppc_elf_set_sdata_syms): Delete.
- * elflink.c (bfd_elf_size_dynamic_sections): Don't create DT_INIT
- and DT_FINI tags unless associated section has input.
- (bfd_elf_set_symbol, _bfd_elf_provide_symbol): Delete.
- (_bfd_elf_provide_section_bound_symbols): Delete.
- * bfd-in.h (_bfd_elf_provide_symbol): Delete.
- (_bfd_elf_provide_section_bound_symbols): Delete.
- * bfd-in2.h: Regenerate.
-
-2005-08-04 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (fix_syms, _bfd_elf_fix_excluded_sec_syms): Move to..
- * linker.c (fix_syms, _bfd_fix_excluded_sec_syms): ..here.
- * bfd-in.h (_bfd_fix_excluded_sec_syms): Rename.
- * bfd-in2.h: Regenerate.
-
-2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_section): Resize .rela.got
- only if it isn't NULL.
-
-2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-i386.c (elf_howto_table): Undo the overflow change for
- R_386_PC16 made on 2005-07-18.
-
- * elf64-x86-64.c (x86_64_elf_howto_table): Undo the overflow
- change for R_X86_64_PC16 made on 2005-07-18.
-
-2005-08-03 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (struct ppc_elf_link_hash_table): Remove hgot. Use
- elf.hgot throughout file.
-
-2005-08-03 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_size_dynamic_sections): Correct value of
- _GLOBAL_OFFSET_TABLE_ for > 32k GOT.
-
-2005-08-02 Andreas Schwab <schwab at suse.de>
-
- * elfxx-ia64.c (struct elfNN_ia64_allocate_data): Add only_got.
- (elfNN_ia64_relax_section): Reallocate .rela.got when .got has
- changed.
- (allocate_dynrel_entries): Look only at GOT relocations when
- only_got is true.
- (elfNN_ia64_size_dynamic_sections): Set only_got to false before
- calling allocate_dynrel_entries.
-
-2005-08-02 Nick Clifton <nickc at redhat.com>
-
- PR 1147
- * elf32-arm.c (struct _arm_elf_section_data): Turn into a typedef
- and make the mapcount field unsigned.
- (struct section_list): New: Used to keep track of which sections
- have an _arm_elf_section_data structure.
- (record_section_with_arm_elf_section_data): New function.
- (get_arm_elf_section_data): New function.
- (unrecord_section_with_arm_elf_section_data): New function.
- (elf32_arm_output_symbol_hook): Use get_arm_elf_section_data.
- (elf32_arm_new_section_hook): Call
- record_section_with_arm_elf_section_data.
- (elf32_arm_write_section): Use get_arm_elf_section_data and
- unrecord_section_with_arm_elf_section_data.
-
-2005-08-01 Richard Sandiford <richard at codesourcery.com>
-
- * elfxx-mips.c (mips_mach_extends_p): Treat MIPS64 as an extension
- of MIPS32 and MIPS64r2 as an extension of MIPS32r2.
-
-2005-07-30 David Daney <ddaney at avtrex.com>
-
- * elflink.c (elf_gc_sweep): Set dynsymcount to correct value.
-
-2005-07-29 David Daney <ddaney at avtrex.com>
-
- * elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Ignore _gp_disp
- if it is in the *ABS* section.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
- * bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
-2005-07-29 Paul Brook <paul at codesourcery.com>
+2006-03-25 Richard Sandiford <richard at codesourcery.com>
- * reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
- * bfd-in2.h: Regeenrate.
- * libbfd.h: Regenerate.
+ * cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
+ incompatible. Likewise MAC and EMAC code.
+ * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
+ bfd_get_compatible to set the new bfd architecture. Rely on it
+ to detect incompatibilities.
-2005-07-29 Pavel Kankovsky <peak at argo.troja.mff.cuni.cz>
+2006-03-22 Bob Wilson <bob.wilson at acm.org>
- * peXXigen.c (pe_print_edata): Compute the size of the export
- table from the size field in the DataDictionary and not the size
- of the section. Some linkers embed the export table inside a
- larger section.
+ * elf32-xtensa.c (xtensa_read_table_entries): Remove assertion that
+ rel->r_addend is zero.
-2005-07-29 Alan Modra <amodra at bigpond.net.au>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
- * elf-bfd.h (struct elf_backend_data): Add action_discarded.
- (enum action_discarded): Move from..
- * elflink.c (enum action_discarded): ..here.
- (_bfd_elf_default_action_discarded): Rename from elf_action_discarded.
- Remove target specific section checks.
- (elf_link_input_bfd): Adjust.
- * elfxx-target.h (elf_backend_action_discarded): Define.
- (elfNN_bed): Init new field.
- * bfd-in.h (_bfd_elf_default_action_discarded): Declare.
- * bfd-in2.h: Regenerate.
- * elf-hppa.h (elf_hppa_action_discarded): New function.
- * elf32-hppa.c (elf_backend_action_discarded): Define.
- * elf64-hppa.c (elf_backend_action_discarded): Define.
- * elf32-ppc.c (ppc_elf_action_discarded): New function.
- (elf_backend_action_discarded): Define.
+ * elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Fix type
+ of "loc".
-2005-07-27 Alan Modra <amodra at bigpond.net.au>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
- * elflink.c (fix_syms): Handle symbols defined in input sections.
-
-2005-07-27 Jan Beulich <jbeulich at novell.com>
-
- * elf64-x86-64.c (R_X86_64_standard, R_X86_64_vt_offset): New.
- (elf64_x86_64_info_to_howto): Use them.
-
-2005-07-27 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (_bfd_elf_merge_symbol): Skip weak redefinition
- regardless of strength of previous definition.
-
-2005-07-26 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_gc_mark_dynamic_ref_symbol): Handle -shared.
- (bfd_elf_gc_sections): Allow -gc-sections when -shared.
- * elf32-ppc.c (ppc_elf_gc_sweep_hook): Correct for -shared.
-
-2005-07-26 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_gc_sweep): Move gcc_except_table code..
- (bfd_elf_gc_sections): ..to here.
-
-2005-07-25 DJ Delorie <dj at redhat.com>
-
- * reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
- * libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
-
- * elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
- R_M32C_HI8, R_M32C_HI16.
- (m32c_reloc_map): Likewise.
- (m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
-
-2005-07-25 Jan Hubicka <jh at suse.cz>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (_bfd_elf_large_com_section): New.
- * elf.c (_bfd_elf_large_com_section): New. Defined.
-
- * elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
- (elf64_x86_64_elf_section_from_bfd_section): New.
- (elf64_x86_64_symbol_processing): New.
- (elf64_x86_64_common_definition): New.
- (elf64_x86_64_common_section_index): New.
- (elf64_x86_64_common_section): New.
- (elf64_x86_64_merge_symbol): New.
- (elf64_x86_64_additional_program_headers): New.
- (elf64_x86_64_special_sections): New.
- (elf_backend_section_from_bfd_section): New. Defined.
+ * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
+ * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
+ (bfd_elf32_littlemips_vxworks_vec): Likewise.
+ (bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
+ (bfd_elf32_littlemips_vec): Likewise.
+ (bfd_elf32_nbigmips_vec): Likewise.
+ (bfd_elf32_nlittlemips_vec): Likewise.
+ (bfd_elf32_ntradbigmips_vec): Likewise.
+ (bfd_elf32_ntradlittlemips_vec): Likewise.
+ (bfd_elf32_tradbigmips_vec): Likewise.
+ (bfd_elf32_tradlittlemips_vec): Likewise.
+ (bfd_elf64_bigmips_vec): Likewise.
+ (bfd_elf64_littlemips_vec): Likewise.
+ (bfd_elf64_tradbigmips_vec): Likewise.
+ (bfd_elf64_tradlittlemips_vec): Likewise.
+ * elf32-mips.c: Include elf-vxworks.h.
+ (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
+ instead of calling mips_elf32_rtype_to_howto directly.
+ (mips_vxworks_copy_howto_rela): New reloc howto.
+ (mips_vxworks_jump_slot_howto_rela): Likewise.
+ (mips_vxworks_bfd_reloc_type_lookup): New function.
+ (mips_vxworks_rtype_to_howto): Likewise.
+ (mips_vxworks_final_write_processing): Likewise.
+ (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
+ (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
+ (elf_backend_want_got_plt): Likewise.
+ (elf_backend_want_plt_sym): Likewise.
+ (elf_backend_got_symbol_offset): Likewise.
+ (elf_backend_want_dynbss): Likewise.
+ (elf_backend_may_use_rel_p): Likewise.
+ (elf_backend_may_use_rela_p): Likewise.
+ (elf_backend_default_use_rela_p): Likewise.
+ (elf_backend_got_header_size: Likewise.
+ (elf_backend_plt_readonly): Likewise.
+ (bfd_elf32_bfd_reloc_type_lookup): Likewise.
+ (elf_backend_mips_rtype_to_howto): Likewise.
+ (elf_backend_adjust_dynamic_symbol): Likewise.
+ (elf_backend_finish_dynamic_symbol): Likewise.
+ (bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
- (elf_backend_common_section_index): Likewise.
- (elf_backend_common_section): Likewise.
- (elf_backend_common_definition): Likewise.
- (elf_backend_merge_symbol): Likewise.
- (elf_backend_special_sections): Likewise.
+ (elf_backend_link_output_symbol_hook): Likewise.
+ (elf_backend_emit_relocs): Likewise.
+ (elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
-
-2005-07-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_backend_data): Add common_definition,
- common_section_index, common_section, and merge_symbol.
- (_bfd_elf_common_definition): New.
- (_bfd_elf_common_section_index): New.
- (_bfd_elf_common_section): New.
-
- * elf.c (elf_fake_sections): Don't clear sh_flags.
-
- * elflink.c (_bfd_elf_merge_symbol): Call backend merge_symbol
- if it is available.
- (is_global_data_symbol_definition): Call backend
- common_definition instead of checking SHN_COMMON.
- (elf_link_add_object_symbols): Likewise.
- (elf_link_output_extsym): Call backend common_section_index
- for common section index.
- (_bfd_elf_common_definition): New.
- (_bfd_elf_common_section_index): New.
- (_bfd_elf_common_section): New.
-
- * elfxx-target.h (elf_backend_common_definition): New.
- (elf_backend_common_section_index): New.
- (elf_backend_common_section): New.
- (elf_backend_merge_symbol): New.
- (elfNN_bed): Initialize common_definition, common_section_index,
- common_section, and merge_symbol.
-
- * section.c (BFD_FAKE_SECTION): New.
- (STD_SECTION): Use it.
- * bfd-in2.h: Regenerated.
-
-2005-07-23 Olaf Hering <olh at suse.de>
-
- * elflink.c (elf_link_input_bfd): Add '\n' for linker einfo
- callback.
-
-2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * config.bfd: Remove i[3-7]86-*-rtemself*.
- Remove sparc-*-rtemself*.
-
-2005-07-22 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * elf32-m32r.c (m32r_elf_check_relocs): Fix pc count for
- R_M32R_REL32.
-
-2005-07-21 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (BFD32_BACKENDS): Remove cf-m68klynx.lo.
- (BFD32_BACKENDS): Likewise, remove m68klynx.lo.
- (BFD32_BACKENDS_CFILES): Remove cf-m68klynx.c, m68klynx.c.
- (cf-m68klynx.lo, m68klynx.lo): Remove targets.
- * Makefile.in: Regenerate.
- * cf-m68klynx.c: Remove.
- * m68klynx.c: Likewise.
- * configure.in (m68klynx_aout_vec): Remove vector.
- (m68klynx_coff_vec): Likewise.
- * configure: Regenerate.
- * targets.c (m68klynx_aout_vec): Remove extern.
- (m68klynx_coff_vec): Likewise.
- (_bfd_target_vector): Remove m68klynx_{aout,coff}_vec.
- * po/SRC-POTFILES.in: Remove cf-m68klynx.c, m68klynx.c.
-
-2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * elf32-m32r.c (m32r_elf_howto_table): Support R_M32R_REL32.
- (m32r_reloc_map): Likewise.
- (m32r_elf_relocate_section): Likewise.
- (m32r_elf_gc_sweep_hook): Likewise.
- (m32r_elf_check_relocs): Likewise.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * reloc.c: Add M32C and MS1 relocs.
- * bfd-in2.h: Regenerate.
+ (elf_backend_modify_segment_map): Likewise.
+ (elf_backend_symbol_processing): Likewise.
+ * elfxx-mips.c: Include elf-vxworks.h.
+ (mips_elf_link_hash_entry): Add is_relocation_target and
+ is_branch_target fields.
+ (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
+ srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
+ (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
+ (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
+ Return 3 for VxWorks.
+ (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
+ mips_elf_link_hash_table. Return 0 for VxWorks.
+ (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
+ mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
+ (mips_vxworks_exec_plt0_entry): New variable.
+ (mips_vxworks_exec_plt_entry): Likewise.
+ (mips_vxworks_shared_plt0_entry): Likewise.
+ (mips_vxworks_shared_plt_entry): Likewise.
+ (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
+ (mips_elf_rel_dyn_section): Change the bfd argument to a
+ mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
+ the name of the section.
+ (mips_elf_initialize_tls_slots): Update the call to
+ mips_elf_rel_dyn_section.
+ (mips_elf_gotplt_index): New function.
+ (mips_elf_local_got_index): Add an input_section argument.
+ Update the call to mips_elf_create_local_got_entry.
+ (mips_elf_got_page): Likewise.
+ (mips_elf_got16_entry): Likewise.
+ (mips_elf_create_local_got_entry): Add bfd_link_info and input_section
+ arguments. Create dynamic relocations for each entry on VxWorks.
+ (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
+ (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
+ and MIPS_RESERVED_GOTNO.
+ (mips_elf_create_got_section): Update the uses of
+ MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
+ (is_gott_symbol): New function.
+ (mips_elf_calculate_relocation): Use a dynobj local variable.
+ Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
+ mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
+ VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
+ relocations on VxWorks. Add dynamic relocations for references
+ to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
+ create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
+ in VxWorks executables.
+ (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
+ Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
+ Don't allocate a null entry on VxWorks.
+ (mips_elf_create_dynamic_relocation): Update the call to
+ mips_elf_rel_dyn_section. Use absolute rather than relative
+ relocations for VxWorks, and make them RELA rather than REL.
+ (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
+ read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
+ Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
+ VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
+ Call elf_vxworks_create_dynamic_sections for VxWorks and
+ initialize the plt_header_size and plt_entry_size fields.
+ (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
+ used in VxWorks executables. Don't allocate dynamic relocations
+ for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
+ Set is_relocation_target for each symbol referenced by a relocation.
+ Allocate .rela.dyn entries for relocations against the special
+ VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
+ entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
+ a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
+ R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
+ to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
+ Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
+ relocations. Don't set no_fn_stub on VxWorks.
+ (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
+ mips_elf_allocate_dynamic_relocations.
+ (_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
+ (_bfd_mips_elf_always_size_sections): Do not allocate GOT page
+ entries for VxWorks, and do not create multiple GOTs.
+ (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
+ Handle .got specially for VxWorks. Update the uses of
+ MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
+ Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
+ once its final size is known. Set DF_TEXTREL for VxWorks. Add
+ DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
+ tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
+ (_bfd_mips_vxworks_finish_dynamic_symbol): New function.
+ (mips_vxworks_finish_exec_plt): Likewise.
+ (mips_vxworks_finish_shared_plt): Likewise.
+ (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
+ to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
+ DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
+ DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
+ and mips_elf_rel_dyn_section. Use a different GOT header for
+ VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
+ (_bfd_mips_elf_link_hash_table_create): Initialize the new
+ mips_elf_link_hash_table fields.
+ (_bfd_mips_vxworks_link_hash_table_create): New function.
+ (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
+ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
+ * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
+ (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
+ (_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * config.bfd: Move m32c entry to correct location.
- * archures.c: Likewise.
- * configure.in: Likewise.
- * configure: Regenerate.
- * targets.c: Move ms1 vector to correct location.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * elf32-i386.c (elf_howto_table): Adjust overflow complaint handler
- for R_386_PC16.
- * elf64-x86-64.c (x86_64_elf_howto_table): Adjust overflow complaint
- handler for R_X86_64_PC16, R_X86_64_8, and R_X86_64_DTPOFF.
-
-2005-07-16 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- PR ld/1021
- PR ld/1031
- * elflink.c (elf_link_add_object_symbols): Also append the version
- name to non-hidden absolute symbols that are functions.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_set_sdata_syms): Return void. Remove hack
- for zero size sections. Don't set .sbss syms here.
- * elf32-ppc.h (ppc_elf_set_sdata_syms): Adjust prototype.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
+ * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
+ (elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
+ * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
+ * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
+ (bfd_elf32_littlemips_vxworks_vec): Likewise.
+ (_bfd_target_vector): Add entries for them.
-2005-07-15 Bob Wilson <bob.wilson at acm.org>
+2006-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
- * elf32-xtensa.c (vsprint_msg): Add prototype.
- (build_encoding_error_message): Delete. Code moved into....
- (elf_xtensa_do_reloc): ....here, and changed to give better
- error messages for out of range literals.
+ * elf64-hppa.c (elf64_hppa_special_sections): Change flags for .tbss
+ section from SHF_PARISC_WEAKORDER to SHF_HP_TLS.
+ (elf_backend_special_sections): Remove #undef.
-2005-07-15 Alan Modra <amodra at bigpond.net.au>
+2006-03-18 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
- * elflink.c (bfd_elf_record_link_assignment): Remove output_bfd param.
- (_bfd_elf_provide_symbol): Allow redefinition of weak syms and those
- defined in output sections. Call bfd_elf_record_link_assignment.
- * bfd-in.h (bfd_elf_record_link_assignment): Update prototype.
- * bfd-in2.h: Regenerate.
+ * elf64-hppa.c (allocate_global_data_opd): Don't create an OPD entry
+ for undefined weak symbols.
-2005-07-14 Jim Blandy <jimb at redhat.com>
+2006-03-17 Daniel Jacobowitz <dan at codesourcery.com>
- Add support for m32c-*-elf (Renesas m32c and m16c).
- * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
- (ALL_MACHINES_CFILES): Add cpu-m32c.c.
- (BFD32_BACKENDS): Add elf32-m32c.lo.
- (BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
- (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
- * Makefile.in: Regenerated.
- * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
- arch and mach codes.
- (bfd_m32c_arch): New arch info object.
- (bfd_archures_list): List bfd_m32c_arch.
- * bfd-in2.h: Regenerated.
- * config.bfd: Add case for the m32c.
- * configure.in: Add case for the m32c.
- * configure: Regenerated.
- * cpu-m32c.c, elf32-m32c.c: New files.
- * libbfd.h: Regenerated.
- * targets.c (bfd_elf32_m32c_vec): Declare.
- (_bfd_target_vector): List bfd_elf32_m32c_vec.
+ PR ld/2462
+ * elflink.c (bfd_elf_final_link): Remove
+ bed->elf_backend_emit_relocs from emit_relocs.
-2005-07-14 Alan Modra <amodra at bigpond.net.au>
+2006-03-17 Alexandre Oliva <aoliva at redhat.com>
- * bfd-in.h (_bfd_elf_fix_excluded_sec_syms): Declare.
- (_bfd_elf_provide_section_bound_symbols): Remove param name.
- Formatting.
- * bfd-in2.h: Regenerate.
- * elflink.c (bfd_elf_gc_sections): Don't call generic function.
- (_bfd_elf_provide_symbol): Formatting.
- (_bfd_elf_provide_section_bound_symbols): Remove all hacks, just
- create section relative syms.
- (fix_syms, _bfd_elf_fix_excluded_sec_syms): New functions.
- * elf32-ppc.c (ppc_elf_set_sdata_syms): Use
- _bfd_elf_provide_section_bound_symbols.
- * reloc.c (bfd_mark_used_section): Delete.
- (bfd_generic_gc_sections): Don't call the above.
+ * elf32-ppc.c (ppc_elf_relocate_section): Copy addend from
+ first relocation to the second when relaxing TLS GD to LE;
+ zero it out when relaxing to IE.
-2005-07-14 Paul Woegerer <paul.woegerer at nsc.com>
+2006-03-17 Alan Modra <amodra at bigpond.net.au>
- PR 1063
- * cache.c (bfd_last_cache): Initialise to NULL.
+ PR 2434
+ * elflink.c (elf_link_add_object_symbols): Save and restore
+ warning sym's linked sym.
-2005-07-14 Daniel Marques <marques at cs.cornell.edu>
- Nick Clifton <nickc at redhat.com>
+2006-03-16 Alan Modra <amodra at bigpond.net.au>
- * coff-alpha.c (alpha_ecoff_bad_format_hook): Detect compressed
- Alpha binaries and issue a helpful error message.
- (alpha_ecoff_swap_reloc_out): Increase maximum allowed internal
- symbol index to 15 to allow for binaries produced by DEC
- compilers.
-
-2005-07-13 Steve Ellcey <sje at cup.hp.com>
-
- * bfd.m4 (BFD_NEED_DECLARATION): Remove.
-
-2005-07-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_relocate_section): Don't use a plt stub
- when !can_plt_call.
-
-2005-07-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-xtensa.c (bfd_elf_xtensa_reloc): Warning fix.
-
-2005-07-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_set_sdata_syms): Correct __sbss_start value.
-
-2005-07-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_symbol_refs_local_p): Revert the last
- change.
-
-2005-07-08 Paul Koning <pkoning at equallogic.com>
-
- * dwarf2.c (read_address): Check sign_extend_vma to handle targets
- where addresses are sign extended.
-
-2005-07-08 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * config.bfd: Mark i960-*-rtems*, or32-*-rtems* as obsolete.
- Mark a29k-*rtems*, hppa*-*-rtems*, *-go32-rtems*,
- i[3-7]86*-*-rtemscoff*, mips*el-*-rtems*, powerpcle-*-rtems*,
- sparc*-*-rtemsaout* as removed
-
-2005-07-08 Alan Modra <amodra at bigpond.net.au>
-
- * elf-hppa.h (elf_hppa_final_link): Use gp val of zero when none
- of the usual sections are found.
- * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Tidy.
- Strip .dynbss if it is zero size.
- * elf32-arm.c (elf32_arm_size_dynamic_sections): Likewise.
- * elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
- * elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
- * elf32-i370.c (i370_elf_size_dynamic_sections): Likewise, and
- .dynsbss.
- (i370_elf_finish_dynamic_sections): Don't attempt to write .got
- when it is zero size.
- * elf32-i386.c (elf_i386_size_dynamic_sections): Correct handling
- of .dynbss and zero size sections.
- * elf32-m32r.c (m32r_elf_size_dynamic_sections): Strip .dynbss if
- it is zero size.
- * elf32-m68k.c (elf_m68k_size_dynamic_sections): Tidy. Strip
- .dynbss if zero size.
- * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise, .dynsbss
- too.
- * elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
- * elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
- * elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
- * elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Tidy. Strip
- .plt.* and .got.plt.* if zero size.
- * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Tidy. Strip
- .got* and .dynbss if zero size.
- * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Tidy. Strip
- * elf64-ppc.c (create_linkage_sections): Create branch lookup table
- in .data.rel.ro.brlt or .rodata.brlt, and similarly for associated
- reloc section.
- (create_got_section): Always create new .got and .rela.got sections.
- (ppc64_elf_size_dynamic_sections): Tidy. Strip .dynbss if zero size.
- * elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
- * elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
- * elf64-x86-64.c (elf64_x86_64_size_dynamic_sections): Handle
- dynamic bss sections correctly.
- * elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Tidy.
- * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Tidy. Strip
- .dynbss if zero size.
-
-2005-07-08 Ben Elliston <bje at au.ibm.com>
-
- * elf32-xtensa.c: Include <stdarg.h> unconditionally, not only
- when ANSI_PROTOTYPES is defined. Remove #ifdef logic.
-
-2005-07-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_backend_data): Add special_sections.
-
- * elf.c (_bfd_elf_get_sec_type_attr): Check special_sections
- first.
-
- * elf32-arm.c (elf_backend_get_sec_type_attr): Removed.
- (elf_backend_special_sections): New. Defined.
- * elf32-m32r.c: Likewise.
- * elf32-m68hc11.c: Likewise.
- * elf32-m68hc12.c: Likewise.
- * elf32-mcore.c: Likewise.
- * elf32-sh64.c: Likewise.
- * elf32-v850.c: Likewise.
- * elf32-xtensa.c: Likewise.
- * elf64-alpha.c: Likewise.
- * elf64-hppa.c: Likewise.
- * elf64-ppc.c: Likewise.
- * elf64-sh64.c: Likewise.
- * elfxx-ia64.c: Likewise.
- * elfxx-mips.c: Likewise.
- * elfxx-mips.h: Likewise.
-
- * elfxx-target.h (elf_backend_special_sections): New.
- (elfNN_bed): Initialize special_sections.
-
-2005-07-07 Bob Wilson <bob.wilson at acm.org>
-
- * xtensa-modules.c: Update tables with Xtensa MMU features.
-
-2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
-
- * elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
- format bugs.
- * vms.h (_bfd_vms_debug): Add format attribute.
- (_bfd_vms_debug, _bfd_hexdump): Fix typos.
-
-2005-07-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 975
- * elflink.c (_bfd_elf_symbol_refs_local_p): Only undefined
- symbol with default visibility is local.
-
-2005-07-07 Ben Elliston <bje at gnu.org>
-
- * config.bfd: Mark m68*-*-rtemscoff as obsolete.
-
-2005-07-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * dwarf2.c (varinfo): Add addr.
- (lookup_symbol_in_variable_table): Also check addr.
- (scan_unit_for_symbols): Set addr for variable.
- (comp_unit_find_line): Updated.
-
-2005-07-06 Nick Clifton <nickc at redhat.com>
-
- * coff-alpha.c (alpha_adjust_reloc_in): Issue an informative error
- message if an unknown reloc is encountered.
- (alpha_relocate_section): Likewise.
-
- * ecoff.c (_bfd_ecoff_write_object_contents): Cope with a reloc
- with a missing howto field.
-
-2005-07-06 Alan Modra <amodra at bigpond.net.au>
-
- * po/SRC-POTFILES.in: Add cpu-ms1.c, elf32-ms1.c, elf-vxworks.c,
- elfxx-sparc.c.
-
-2005-07-05 Paul Brook <paul at codesourcery.com>
-
- * elf32-ppc.c (ppc_elf_vxworks_special_sections): Remove.
- (ppc_elf_vxworks_get_sec_type_attr): New function.
- (elf_backend_special_sections): Remove vxwords definition.
- (elf_backend_get_sec_type_attr): Define for vxworks.
-
-2005-07-05 Nick Clifton <nickc at redhat.com>
-
- * elf64-ppc.c (ppc64_elf_info_to_howto): Fix typo.
-
-2005-07-05 Paul Brook <paul at codesourcery.com>
-
- * config.bfd: Add separate case for ppc-vxworks.
- * configure: Regenerate.
- * configure.in: Include elf-vxworks.lo on ppc targets.
- * elf-vxworks.c (elf_vxworks_final_write_processing): Handle
- .rela.plt.unloaded.
- * elf32-ppc.c: Add VxWorks target vec. Include elf-vxworks.h.
- (PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove.
- (VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry,
- ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE,
- ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry,
- VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS,
- VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New.
- (ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt,
- is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size.
- (ppc_elf_link_hash_table_create): Initialize hadtab plt fields.
- (ppc_elf_create_got): Create .got.plt for VxWorks.
- (ppc_elf_create_dynamic_sections): Create unloaded plt relocation
- section for VxWorks.
- (ppc_elf_select_plt_layout): Handle VxWorks plt format.
- (allocate_got): VxWorks does not need a got header.
- (allocate_dynrelocs): Handle VxWorks plt format.
- (ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for
- VxWorks. Handle VxWorks plt/got.
- (ppc_elf_finish_dynamic_sections): Fill in VxWorks plt.
- (ppc_elf_vxworks_special_sections): New.
- (ppc_elf_vxworks_link_hash_table_create,
- ppc_elf_vxworks_add_symbol_hook,
- elf_i386_vxworks_link_output_symbol_hook,
- ppc_elf_vxworks_final_write_processing): New functions.
- * targets.c (bfd_elf32_powerpc_vxworks_vec): Declare.
- (_bfd_target_vector): Use it.
-
-2005-07-05 Jakub Jelinek <jakub at redhat.com>
-
- * libbfd-in.h (struct artdata): Add extended_names_size field.
- * libbfd.h: Rebuilt.
- * coff-rs600.c (_bfd_xcoff_archive_p): Don't clear fields in freshly
- allocated object by bfd_zalloc.
- * coff64-rs6000.c (xcoff64_archive_p): Likewise.
- * ecoff.c (_bfd_ecoff_archive_p): Likewise.
- * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p): Likewise.
- (get_extended_arelt_filename): Fail if index is bigger or equal to
- extended_names_size.
- (_bfd_generic_read_ar_hdr_mag): Don't set bfd_error_malformed_archive,
- get_extended_arelt_filename already did that.
- (_bfd_slurp_extended_name_table): Initialize extended_names_size field.
- Allocate one extra byte and clear it, in case extended names table
- is not terminated.
-
- * libbfd-in.h (bfd_malloc2, bfd_realloc2, bfd_zmalloc2, bfd_alloc2,
- bfd_zalloc2): New prototypes.
- * bfd-in.h (HALF_BFD_SIZE_TYPE): Define.
- * libbfd.c (bfd_malloc2, bfd_realloc2, bfd_zmalloc2): New functions.
- * opncls.c (bfd_alloc2, bfd_zalloc2): New functions.
- * elf.c (bfd_elf_get_elf_syms, setup_group, assign_section_numbers,
- elf_map_symbols, map_sections_to_segments,
- assign_file_positions_for_segments, copy_private_bfd_data,
- swap_out_syms, _bfd_elf_slurp_version_tables): Use bfd_*alloc2
- where appropriate.
- * bfd-in2.h: Rebuilt.
- * libbfd.h: Rebuilt.
-
- * elf.c (_bfd_elf_print_private_bfd_data): Don't crash on bogus
- verdef or verneed section.
- (_bfd_elf_slurp_version_tables): Handle corrupt verdef and/or
- verneed sections gracefully.
- * elfxx-sparc.c (_bfd_sparc_elf_info_to_howto_ptr): Don't crash on
- bogus relocation values.
- * elf64-ppc.c (ppc64_elf_info_to_howto): Likewise.
- * elf64-s390.c (elf_s390_info_to_howto): Likewise.
- * elf32-s390.c (elf_s390_info_to_howto): Likewise.
- * elf64-x86-64.c (elf64_x86_64_info_to_howto): Likewise.
- * elfxx-ia64.c (lookup_howto): Likewise.
-
- * elf.c (bfd_elf_get_str_section): Allocate an extra byte after
- the end of strtab and clear it.
- (elf_read): Remove.
-
-2005-07-05 Nick Clifton <nickc at redhat.com>
-
- * po/vi.po: New Vietnamese translation.
- * configure.in (ALL_LINGUAS): Add vi.
- * configure: Regenerate.
-
-2005-07-05 Peter S. Mazinger <ps.m at gmx.net>
-
- * elf32-arm.c (elf32_arm_size_dynamic_sections): Fix a typo and
- touchup logic like i386/ppc.
-
-2005-07-05 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (special_sections): Move const qualifier.
- (special_sections_b..special_sections_t): Likewise.
- * elf32-arm.c (elf32_arm_symbian_get_sec_type_attr): Remove duplicate
- const.
- (elf32_arm_symbian_special_sections): Move const qualifier.
- * elf32-m32r.c: Similarly.
- * elf32-m68hc11.c: Similarly.
- * elf32-m68hc12.c: Similarly.
- * elf32-mcore.c: Similarly.
- * elf32-ppc.c: Similarly.
- * elf32-sh64.c: Similarly.
- * elf32-v850.c: Similarly.
- * elf32-xtensa.c: Similarly.
- * elf64-alpha.c: Similarly.
- * elf64-hppa.c: Similarly.
- * elf64-ppc.c: Similarly.
- * elf64-sh64.c: Similarly.
- * elfxx-ia64.c: Similarly.
- * elfxx-mips.c: Similarly.
-
-2005-07-04 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * elf32-m32r.c (m32r_elf_size_dynamic_sections): Use
- info->executable instead of !info->shared where appropriate.
-
-2005-07-04 Alan Modra <amodra at bigpond.net.au>
-
- PR 1042
- * elf.c (assign_file_positions_for_segments): Remove excluded
- sections from the segment map.
-
-2005-07-04 Alan Modra <amodra at bigpond.net.au>
-
- PR 1004
- * elf-bfd.h (struct elf_backend_data): Add get_sec_type_attr. Delete
- special_sections.
- (_bfd_elf_get_special_section): Declare.
- (bfd_elf_special_section): Update prototype.
- * elf.c (special_sections): Remove unused outer entries.
- (get_special_section): Delete.
- (_bfd_elf_get_special_section): New function.
- (_bfd_elf_get_sec_type_attr): Replace "name" arg with "sec". Update
- special_sections indexing.
- (_bfd_elf_new_section_hook): Call backend get_sec_type_attr.
- * elf32-arm.c (symbian_special_sections_d): Delete.
- (symbian_special_sections_g, symbian_special_sections_h): Delete.
- (symbian_special_sections_i, symbian_special_sections_f): Delete.
- (symbian_special_sections_p): Delete.
- (elf32_arm_symbian_special_sections): Merge above to here.
- (elf32_arm_symbian_get_sec_type_attr): New function.
- (elf_backend_special_sections): Don't define.
- (elf_backend_get_sec_type_attr): Define.
- * elf32-m32r.c: Similarly to elf32-arm.c.
- * elf32-m68hc11.c: Likewise.
- * elf32-m68hc12.c: Likewise.
- * elf32-mcore.c: Likewise.
- * elf32-sh64.c: Likewise.
- * elf32-v850.c: Likewise.
- * elf32-xtensa.c: Likewise.
- * elf64-alpha.c: Likewise.
- * elf64-hppa.c: Likewise.
- * elf64-ppc.c: Likewise.
- * elf64-sh64.c: Likewise.
- * elfxx-ia64.c: Likewise.
- * elfxx-mips.c: Likewise.
- * elf32-ppc.c: Likewise.
- (bfd_elf_special_section ppc_alt_plt): New. Use it if .plt loadable.
- * elfxx-mips.h (_bfd_mips_elf_get_sec_type_attr): Declare.
- (_bfd_mips_elf_special_sections, elf_backend_special_sections): Delete.
- (elf_backend_get_sec_type_attr): Define.
- * elfxx-target.h (elf_backend_get_sec_type_attr): Define.
- (elf_backend_special_sections): Don't define.
- (elfNN_bed): Update.
-
-2005-07-01 Nick Clifton <nickc at redhat.com>
-
- * cpu-d10v.c: Update to ISO C90 style function declarations and
- fix formatting.
- * cpu-d30v.c: Likewsie.
- * cpu-i370.c: Likewsie.
- * cpu-xstormy16.c: Likewsie.
- * elf32-arc.c: Likewsie.
- * elf32-d10v.c: Likewsie.
- * elf32-d30v.c: Likewsie.
- * elf32-dlx.c: Likewsie.
- * elf32-i370.c: Likewsie.
- * elf32-i960.c: Likewsie.
- * elf32-ip2k.c: Likewsie.
- * elf32-m32r.c: Likewsie.
- * elf32-mcore.c: Likewsie.
- * elf32-openrisc.c: Likewsie.
- * elf32-or32.c: Likewsie.
- * elf32-pj.c: Likewsie.
- * elf32-v850.c: Likewsie.
- * elf32-xstormy16.c: Likewsie.
-
-2005-07-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-alpha.c (elf64_alpha_create_got_section): Always create
- a new .got section.
- (elf64_alpha_create_dynamic_sections): Always make new sections
- by using bfd_make_section_anyway_with_flags. Check that .got not
- already created.
- (elf64_alpha_check_relocs): Delete "got_created". Use tdata->gotobj
- instead.
-
-2005-06-30 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Ignore dynamic
- _SDA_BASE_ and _SDA2_BASE_ symbols.
- * elflink.c (_bfd_elf_provide_symbol): Correct comment. Define
- sym if not def_regular.
- (_bfd_elf_provide_section_bound_symbols): Similarly.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * config.bfd: Mark as obsolete:
- m68*-apollo-*
- m68*-apple-aux*
- m68*-bull-sysv*
-
-2005-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (_bfd_elf_gc_mark): Mark sections referenced by
- .eh_frame specially..
- (bfd_elf_gc_sections): ..rather than totally ignoring .eh_frame.
- Don't recheck sections we have already marked.
- (elf_gc_sweep): Keep non-code sections referenced from .eh_frame.
- * section.c (struct bfd_section): Add gc_mark_from_eh.
- (STD_SECTION): Adjust.
- * ecoff.c (bfd_debug_section): Adjust.
- * bfd-in2.h: Regenerate.
-
-2005-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_gc_sweep): Do not refcount on sections that have
- not been processed by check_relocs.
-
-2005-06-29 Paul Brook <paul at codesourcery.com>
-
- * bfd-in.h (_bfd_elf_provide_symbol): Update prototype.
- * bfd-in2.h: Regenerate.
- * elf32-ppc.c (ppc_elf_set_sdata_syms): Make sdata symbols section
- relative.
- * elflink.c (bfd_elf_set_symbol): Add section argument.
- (_bfd_elf_provide_symbol): Ditto.
- (_bfd_elf_provide_section_bound_symbols): Pass NULL section argument.
-
-2005-06-27 Carlos O'Donell <carlos at systemhalted.org>
-
- * bfd/elf32-hppa.c (struct elf32_hppa_stub_hash_entry):
- Use bh_root, and hh.
- (struct elf32_hppa_link_hash_entry): Use eh, and hsh_cache.
- (struct elf32_hppa_dyn_reloc_entry): Use hdh_next.
- (struct elf32_hppa_link_hash_table): Use etab and bstab.
- (stub_hash_newfunc): Use hh.
- (hppa_link_hash_newfunc): Use hsh_cache.
- (elf32_hppa_link_hash_table_create): Use etab, and bstab.
- (elf32_hppa_link_hash_table_free): Use bstab.
- (hppa_stub_name): Use eh.
- (hppa_get_stub_entry): Use hh, hsh_entry, and hsh_cache.
- (hppa_add_stub): Use bstab.
- (hppa_type_of_stub): Use eh.
- (hppa_build_one_stub): Use hh and bh_root.
- (elf32_hppa_copy_indirect_symbol): Use hdh_next.
- (elf32_hppa_check_relocs): Use eh, etab, and hdh_next.
- (elf32_hppa_gc_sweep_hook): Use hdh_next.
- (elf32_hppa_adjust_dynamic_symbol): Use hdh_next, and etab.
- (allocate_plt_static): Use etab.
- (allocate_dynrelocs): Use etab, and hdh_next.
- (readonly_dynrelocs): Use hdh_next.
- (elf32_hppa_size_dynamic_sections): Use etab, and hdh_next.
- (get_local_syms): Use eh, bstab, and hh.
- (elf32_hppa_size_stubs): Use eh, bstab, and hh.
- (elf32_hppa_set_gp): Use etab.
- (elf32_hppa_build_stubs): Use bstab.
- (final_link_relocate): Use eh, bh_root.
- (elf32_hppa_relocate_section): Use elf, etab.
- (elf32_hppa_finish_dynamic_sections): Use etab.
-
-2005-06-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_hpux_backend_symbol_processing): Remove
- the extra `;'.
-
-2005-06-21 Carlos O'Donell <carlos at systemhalted.org>
-
- * bfd/elf32-hppa.c (hppa_elf_hash_entry): Define.
- (hppa_stub_hash_entry): Define.
- (stub_hash_newfunc): Rename variables.
- (hppa_link_hash_newfunc): Likewise.
- (elf32_hppa_link_hash_table_free): Likewise.
- (hppa_stub_name): Likewise.
- (hppa_get_stub_entry): Likewise.
- (hppa_add_stub): Likewise.
- (hppa_type_of_stub): Likewise.
- (hppa_build_one_stub): Likewise.
- (hppa_size_one_stub): Likewise.
- (elf32_hppa_create_dynamic_sections): Likewise.
- (elf32_hppa_copy_indirect_symbol): Likewise.
- (elf32_hppa_check_relocs): Likewise.
- (elf32_hppa_gc_mark_hook): Likewise.
- (elf32_hppa_gc_sweep_hook): Likewise.
- (elf32_hppa_grok_psinfo): Likewise.
- (elf32_hppa_hide_symbol): Likewise.
- (elf32_hppa_adjust_dynamic_symbol): Likewise.
- (allocate_dynrelocs): Likewise.
- (clobber_millicode_symbols): Likewise.
- (readonly_dynrelocs): Likewise.
- (elf32_hppa_size_dynamic_sections): Likewise.
- (get_local_syms): Likewise.
- (elf32_hppa_size_stubs): Likewise.
- (hppa_record_segment_addr): Likewise.
- (final_link_relocate): Likewise.
- (elf32_hppa_relocate_section): Likewise.
- (elf32_hppa_finish_dynamic_symbol): Likewise.
-
-2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1025
- * elf-m10300.c (mn10300_elf_check_relocs): Handle indirect
- symbol.
- * elf32-arm.c (elf32_arm_check_relocs): Likewise.
- * elf32-avr.c (elf32_avr_check_relocs): Likewise.
- * elf32-cris.c (cris_elf_check_relocs): Likewise.
- * elf32-d10v.c (elf32_d10v_check_relocs): Likewise.
- * elf32-dlx.c (elf32_dlx_check_relocs): Likewise.
- * elf32-fr30.c (fr30_elf_check_relocs): Likewise.
- * elf32-frv.c (elf32_frv_check_relocs): Likewise.
- * elf32-i370.c (i370_elf_check_relocs): Likewise.
- * elf32-iq2000.c (iq2000_elf_check_relocs): Likewise.
- * elf32-m32r.c (m32r_elf_check_relocs): Likewise.
- * elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise.
- * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
- * elf32-mcore.c (mcore_elf_check_relocs): Likewise.
- * elf32-ms1.c (ms1_elf_check_relocs): Likewise.
- * elf32-msp430.c (elf32_msp430_check_relocs): Likewise.
- * elf32-openrisc.c (openrisc_elf_check_relocs): Likewise.
- * elf32-ppc.c (ppc_elf_check_relocs): Likewise.
- * elf32-s390.c (elf_s390_check_relocs): Likewise.
- * elf32-sh.c (sh_elf_check_relocs): Likewise.
- * elf32-v850.c (v850_elf_check_relocs): Likewise.
- * elf32-vax.c (elf_vax_check_relocs): Likewise.
- * elf64-mmix.c (mmix_elf_check_relocs): Likewise.
- * elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
- * elf64-s390.c (elf_s390_check_relocs): Likewise.
- * elf64-sh64.c (sh_elf64_check_relocs): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
-
-2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1022
- * elf32-hppa.c (elf32_hppa_check_relocs): Handle indirect
- symbol.
-
-2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1025
- * elf32-i386.c (elf_i386_check_relocs): Handle indirect symbol.
- * elf64-x86-64.c (elf64_x86_64_check_relocs): Likewise.
-
-2005-06-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * reloc.c: Add BFD_RELOC_X86_64_GOTOFF64 and
- BFD_RELOC_X86_64_GOTPC32.
- * bfd-in2.h: Regenerated.
-
-2005-06-17 Jakub Jelinek <jakub at redhat.com>
-
- * elf.c (bfd_section_from_shdr): Kill bogus warning.
-
- * elf.c (bfd_section_from_shdr): Fail if sh_entsize is bogus for
- symbol, relocation, group or versym sections.
-
- * coffcode.h (coff_slurp_reloc_table): Don't crash if native_relocs
- is NULL.
- * peXXigen.c (pe_print_idata): Don't crash if dll_name or start_address
- doesn't point into the section.
-
-2005-06-17 Jan Beulich <jbeulich at novell.com>
-
- * bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
- and BFD_RELOC_X86_64_GOTPC32.
- * libbfd.h (bfd_reloc_code_real_names): Likewise.
- * elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
- R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
- (x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
- and R_X86_64_GOTPC32.
- (elf64_x86_64_info_to_howto): Adjust bounding relocation type.
- (elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
- R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
- (elf64_x86_64_relocate_section): Likewise.
- (elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
-
-2005-06-15 Mark Kettenis <kettenis at gnu.org>
-
- * archive.c: Include "libiberty.h".
-
-2005-06-15 Nick Clifton <nickc at redhat.com>
-
- * elf32-v850.c (ELF_MACHINE_ALT2): Define so that binaries
- produced by the GreenHills toolchain can be assimilated.
-
-2005-06-14 Steve Ellcey <sje at cup.hp.com>
-
- * som.c (som_find_inliner_info): New.
-
-2005-06-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Fix a typo in comment.
-
-2005-06-14 Jakub Jelinek <jakub at redhat.com>
-
- * elf.c (bfd_section_from_shdr): Fail if name is NULL.
- Prevent endless recursion on broken objects.
-
- * archive.c (do_slurp_coff_armap): Check for overflows.
-
-2005-06-10 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elfcode.h (elf_write_relocs): Do nothing if there are no
- relocations.
-
-2005-06-10 Alan Modra <amodra at bigpond.net.au>
-
- * dwarf2.c (decode_line_info): Revert last change. Instead set
- initial low_pc to -1 to avoid need to test whether loc_pc has
- been set.
-
-2005-06-09 Christopher Faylor <cgf at timesys.com>
-
- * coffcode.h (sec_to_styp_flags): Set appropriate section flags when
- either SEC_ALLOC OR SEC_LOAD.
-
-2005-06-09 Christopher Faylor <cgf at timesys.com>
-
- * coffcode.h (sec_to_styp_flags): Remove read/write flags from noload
- section header. Do not add STYP_NOLOAD since it does not appear to be
- a valid PE flag.
-
-2005-06-09 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1000
- * dwarf2.c (lookup_address_in_line_info_table): Restore code
- handling NULL function info, removed with 2005-04-03 change.
-
-2005-06-08 Mark Mitchell <mark at codesourcery.com>
-
- * opncls.c (bfd_fopen): Mark returned BFD as cacheable if FD == -1.
-
-2005-06-09 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_mark_used_section): Delete.
- (bfd_elf_gc_sections): Call bfd_generic_gc_sections.
- * reloc.c (bfd_mark_used_section): New function.
- (bfd_generic_gc_sections): Call bfd_mark_used_section.
-
-2005-06-08 Alan Modra <amodra at bigpond.net.au>
-
- * opncls.c (bfd_fopen): Don't set bfd_error unconditionally.
- (bfd_fdopenr): Same.
-
-2005-06-07 Mark Mitchell <mark at codesourcery.com>
-
- * opncls.c (bfd_fdopenr): Add missing break statements.
-
-2005-06-07 Mark Mitchell <mark at codesourcery.com>
-
- * opncls.c (bfd_fopen): New API.
- (bfd_openr): Use it.
- (bfd_fdopenr): Likewise.
- * bfd-in2.h: Regenerated.
-
-2005-06-07 Aldy Hernandez <aldyh at redhat.com>
- Michael Snyder <msnyder at redhat.com>
- Stan Cox <scox at redhat.com>
-
- * Makefile.am (ALL_MACHINES): Add ms1 support.
- (ALL_MACHINES_CFILES): Same.
- (BFD32_BACKENDS): Same.
- (BFD32_BACKENDS_CFILES): Same.
-
- * Makefile.in: Regenerate.
-
- * archures.c (bfd_architecture): Add ms1 entries.
- Externalize bfd_ms1_arch.
- (bfd_archures_list): Add bfd_ms1_arch.
-
- * bfd-in2.h: Regenerate.
-
- * cpu-ms1.c: New file.
-
- * elf32-ms1.c: New file.
-
- * targets.c: Define extern of bfd_elf32_ms1_vec.
- Add bfd_elf32_ms1_vec to _bfd_target_vector.
-
- * configure.in: Add bfd_elf32_ms1_vec case.
-
- * configure: Regenerate.
-
- * config.bfd: Add ms1-*-elf to table.
-
-2005-06-07 Zack Weinberg <zack at codesourcery.com>
-
- * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment.
-
-2005-06-07 Alan Modra <amodra at bigpond.net.au>
-
- * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Init _bfd_find_line.
- * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
-
-2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 990
- * bfd.c (bfd_find_line): New.
-
- * dwarf2.c (comp_unit): Add variable_table.
- (funcinfo): Add file, line, and sec.
- (varinfo): New.
- (lookup_symbol_in_function_table): New.
- (lookup_symbol_in_variable_table): New.
- (scan_unit_for_functions): Renamed to ...
- (scan_unit_for_symbols): This. Handle DW_TAG_entry_point and
- DW_TAG_variable.
- (comp_unit_find_nearest_line): Updated.
- (comp_unit_find_line): New.
- (_bfd_dwarf2_find_line): New.
-
- * elf-bfd.h (_bfd_elf_find_line): New.
- (_bfd_generic_find_line): New. Defined.
-
- * elf.c (_bfd_elf_find_line): New.
-
- * libbfd-in.h (_bfd_dwarf2_find_line): New.
- (_bfd_generic_find_line): New.
-
- * bfd-in2.h: Regenerated.
- * libbfd.h: Likewise.
-
- * libbfd.c (_bfd_generic_find_line): New.
-
- * targets.c (BFD_JUMP_TABLE_SYMBOLS): Initialize _bfd_find_line
- with _bfd_generic_find_line.
- (bfd_target): Add _bfd_find_line.
-
-2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * dwarf2.c (decode_line_info): Properly set low_pc.
-
-2005-06-06 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-pcc.c (ppc64_elf_gc_mark_hook): For the local sym in .opd
- case, include addend when indexing .opd section map.
- (ppc64_elf_edit_opd): Add no_opd_opt param. Do nothing besides
- clear opd_adjust array if no_opd_opt set. Tidy code.
- Ignore zero size .opd. Check bfd_alloc return value.
- (ppc_stub_name): Return immediately on bfd_malloc fail.
- * elf64-ppc.h (ppc64_elf_edit_opd): Update prototype.
-
-2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * dwarf2.c (comp_unit): Fix a typo in comment.
-
-2005-06-03 Jan-Benedict Glaw <jbglaw at lug-owl.de>
-
- * elf32-vax.c (rtype_to_howto): Remove PARAMS.
- (reloc_type_lookup): Dito.
- (elf_vax_discard_copies): Dito.
- (elf_vax_instantiate_got_entries): Dito.
- (elf_vax_link_hash_traverse): Dito.
- (elf_vax_link_hash_newfunc): Dito.
- (elf_vax_link_hash_table_create): Dito.
- (elf32_vax_set_private_flags): Dito.
- (elf32_vax_merge_private_bfd_data): Dito.
- (elf32_vax_print_private_bfd_data): Dito.
- (elf_vax_check_relocs): Dito.
- (elf_vax_gc_mark_hook): Dito.
- (elf_vax_gc_sweep_hook): Dito.
- (elf_vax_size_dynamic_sections): Dito.
- (elf_vax_discard_copies): Dito.
- (elf_vax_instantiate_got_entries): Dito.
- (elf_vax_relocate_section): Dito.
- (elf_vax_finish_dynamic_symbol): Dito.
- (elf_vax_finish_dynamic_sections): Dito.
- (elf_vax_hash_table): Break-up of line isn't needed.
- (elf_vax_check_relocs): Remove leading whitespace
- (elf_vax_relocate_section): Remove redundant whitespace
- (elf_vax_link_hash_newfunc): Don't cast NULL.
- (elf_vax_link_hash_table_create): Dito.
- * cpu-vax.c (bfd_vax_arch) Remove a trailing space.
-
-2005-06-03 Alan Modra <amodra at bigpond.net.au>
-
- PR 568
- * configure.in: Bump version
- * configure: Regenerate.
- * elflink.c (elf_link_input_bfd): Use einfo linker callback to print
- discarded section sym refs and kill linker output.
- * simple.c (simple_dummy_einfo): New function.
- (bfd_simple_get_relocated_section_contents): Init callbacks.einfo.
-
- * elf32-i386.c (elf_i386_relocate_section): Handle zero symndx
- for all reloc types.
-
-2005-06-02 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (add_symbol_adjust): Set sym visibility to most
- restrictive of func code and func descr for undefined syms as well
- as defined.
-
-2005-05-31 Jim Blandy <jimb at redhat.com>
-
- * Makefile.am: Regenerate dependencies with 'make dep-am'.
- * Makefile.in: Regenerate.
-
-2005-05-31 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (ALPHA_ELF_LINK_HASH_LU_JSRDIRECT): New.
- (ALPHA_ELF_LINK_HASH_TLS_IE): Renumber to 0x80.
- (ALPHA_ELF_LINK_HASH_LU_PLT): Rename from ALPHA_ELF_LINK_HASH_LU_FUNC.
- (elf64_alpha_want_plt): Update to match.
- (elf64_alpha_check_relocs): Collect JSRDIRECT in gotent_flags.
- (elf64_alpha_relax_with_lituse): Likewise. Handle JSRDIRECT.
-
-2005-05-31 Zack Weinberg <zack at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_reloc_type_lookup)
- (elf32_arm_nabi_grok_prstatus, elf32_arm_nabi_grok_psinfo):
- Use ISO C90 function declaration style.
-
-2005-05-31 James E Wilson <wilson at specifixinc.com>
-
- * elfcode.h (NAME(bfd_elf,bfd_from_remote_memory)): Check for program
- header PF_R flag on PT_LOAD segments.
-
-2005-05-30 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_relocate_section): Use dtp_base for
- the zero index relocs produced by elf64_alpha_relax_tls_get_addr.
-
-2005-05-29 Richard Henderson <rth at redhat.com>
-
- * configure.in (--enable-secureplt): New.
- * elf64-alpha.c (INSN_LDA, INSN_LDAH, INSN_LDQ, INSN_BR): New.
- (INSN_SUBQ, INSN_S4SUBQ, INSN_JMP): New.
- (INSN_A, INSN_AB, INSN_ABC, INSN_ABO, INSN_AD): New.
- (elf64_alpha_use_secureplt): New.
- (OLD_PLT_HEADER_SIZE, OLD_PLT_ENTRY_SIZE): New.
- (NEW_PLT_HEADER_SIZE, NEW_PLT_ENTRY_SIZE): New.
- (PLT_HEADER_SIZE, PLT_ENTRY_SIZE): Conditionalize on secureplt.
- (ALPHA_ELF_LINK_HASH_PLT_LOC): Remove.
- (struct alpha_elf_link_hash_entry): Add plt_offset.
- (PLT_HEADER_WORD1, PLT_HEADER_WORD2, PLT_HEADER_WORD3): Remove.
- (PLT_HEADER_WORD4, PLT_ENTRY_WORD1, PLT_ENTRY_WORD2): Remove.
- (PLT_ENTRY_WORD3): Remove.
- (elf64_alpha_create_dynamic_sections): If secureplt, set SEC_READONLY
- on .plt and create .got.plt.
- (elf64_alpha_output_extsym): Remove .plt frobbing for symbol values.
- (get_got_entry): Initialize plt_offset.
- (elf64_alpha_want_plt): New.
- (elf64_alpha_check_relocs): Use it.
- (elf64_alpha_adjust_dynamic_symbol): Likewise. Don't allocate
- plt entries here.
- (elf64_alpha_calc_got_offsets_for_symbol): Don't report internal
- error as user error.
- (elf64_alpha_size_plt_section_1): Allocate one plt entry per
- got subsection.
- (elf64_alpha_size_plt_section): Size .got.plt section.
- (elf64_alpha_size_rela_got_1): Don't allocate relocations if
- plt entries used.
- (elf64_alpha_size_dynamic_sections): Call elf64_alpha_size_plt_section.
- Add PLTRO DYNAMIC entry.
- (elf64_alpha_finish_dynamic_symbol): Generate secureplt format.
- (elf64_alpha_finish_dynamic_sections): Likewise.
-
-2005-05-28 David Daney <ddaney at avtrex.com>
-
- * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Move
- calculation of DT_RELSZ to occur after all dynamic relocations
- are created.
-
-2005-05-28 Eli Zaretskii <eliz at gnu.org>
-
- * configure.in: Add snprintf and vsnprintf to AC_CHECK_DECLS.
- * config.in, configure: Regenerate.
-
-2005-05-26 Mark Kettenis <kettenis at gnu.org>
- Maciej W. Rozycki <macro at linux-mips.org>
-
- * elfxx-mips.c (_bfd_mips_elf_section_processing): Warn and
- stop processing of options if one of invalid size is
- encountered.
- (_bfd_mips_elf_section_from_shdr): Likewise.
- (_bfd_mips_elf_fake_sections): Reset the type of empty special
- sections.
-
-2005-05-26 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (struct alpha_elf_link_hash_entry): Remove
- plt_old_section, plt_old_value.
- (elf64_alpha_adjust_dynamic_symbol): Don't set it.
- (elf64_alpha_size_plt_section_1): Don't use it.
-
-2005-05-26 Jakub Jelinek <jakub at redhat.com>
-
- * elfcode.h (elf_object_p): Fail if e_shoff != 0, e_shnum == 0 and
- first shdr has sh_size == 0. Fail if e_shnum is large to cause
- arithmetic overflow when allocating the i_shdr array.
- Sanity check sh_link and sh_info fields. Fix e_shstrndx sanity check.
-
-2005-05-25 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c: Update all function definitions to ISO C. Remove
- all function prototypes; rearrange functions into def-use order.
-
-2005-05-25 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_merge_gots): Fix gotent iteration
- in the presence of deleting elements.
- (elf64_alpha_size_got_sections): Zero dead got section size.
-
-2005-05-23 Fred Fish <fnf at specifixinc.com>
-
- * dwarf2.c (struct dwarf2_debug): Add inliner_chain member.
- (struct funcinfo): Add caller_func, caller_file, caller_line.
- tag, and nesting_level members.
- (lookup_address_in_function_table): Change first passed parameter
- from "struct funcinfo *" to "struct comp_unit *".
- (lookup_address_in_function_table): Dereference unit to find function
- table.
- (lookup_address_in_function_table): Traverse the function list to
- create a chain of inlined functions back to the first non inlined
- function.
- (scan_unit_for_functions): Remember tag and nesting level. Handle
- DW_AT_call_file and DW_AT_call_line.
- (comp_unit_find_nearest_line): Adjust lookup_address_in_function_table
- call to pass unit pointer instead of function table pointer. For
- inlined functions, save pointer to the inliner chain.
- (_bfd_dwarf2_find_nearest_line): Initialize inliner_chain to NULL.
- (_bfd_dwarf2_find_inliner_info): New function that returns information
- from the inliner chain after a call to bfd_find_nearest_line.
-
- * bfd.c (bfd_find_inliner_info): Define using BFD_SEND.
- * targets.c (BFD_JUMP_TABLE_SYMBOLS): Add entry for
- NAME##_find_inliner_info.
- (bfd_target): Add _bfd_find_inliner_info.
- * bfd-in2.h: Regenerate.
-
- * libbfd-in.h (_bfd_nosymbols_find_inliner_info): Define as
- macro that always returns bfd_false.
- (_bfd_dwarf2_find_inliner_info): Declare.
- * libbfd.h: Regenerate.
-
- * elf32-arm.c (elf32_arm_find_inliner_info): New function
- that calls _bfd_dwarf2_find_inliner_info.
- (bfd_elf32_find_inliner_info): Define to elf32_arm_find_inliner_info.
-
- * elfxx-mips.c (_bfd_mips_elf_find_inliner_info): New function
- that calls _bfd_dwarf2_find_inliner_info.
- * elfxx-mips.h (_bfd_mips_elf_find_inliner_info): Declare.
- * elfn32-mips.c (bfd_elf32_find_inliner_info): Define to
- _bfd_mips_elf_find_inliner_info.
- * elf64-mips.c (bfd_elf64_find_inliner_info): Ditto.
- * elf32-mips.c (bfd_elf32_find_inliner_info): Ditto.
-
- * elf.c (_bfd_elf_find_inliner_info): New function that calls
- _bfd_dwarf2_find_inliner_info.
- * elf-bfd.h (_bfd_elf_find_inliner_info): Declare.
- * elfxx-target.h (bfd_elfNN_find_inliner_info): Define to
- _bfd_elf_find_inliner_info.
-
- * coffgen.c (coff_find_inliner_info): New function that
- calls _bfd_dwarf2_find_inliner_info.
- * libcoff-in.h (coff_find_inliner_info): Declare.
- * libcoff.h: Regenerate.
- * coff-rs6000.c (rs6000coff_vec): Add coff_find_inliner_info.
- (pmac_xcoff_vec) Ditto.
- * coff64-rs6000.c (rs6000coff64_vec): Ditto.
- (aix5coff64_vec): Ditto.
-
- * aout-target.h (MY_find_inliner_info): Define as
- _bfd_nosymbols_find_inliner_info.
- * aout-tic30.c (MY_find_inliner_info): Ditto.
- * binary.c (binary_find_inliner_info): Ditto.
- * i386msdos.c (msdos_find_inliner_info): Ditto.
- * ihex.c (ihex_find_inliner_info): Ditto.
- * libaout.h (aout_32_find_inliner_info): Ditto.
- * libecoff.h (_bfd_ecoff_find_inliner_info): Ditto.
- * mach-o.c (bfd_mach_o_find_inliner_info): Ditto.
- * mmo.c (mmo_find_inliner_info): Ditto.
- * nlm-target.h (nlm_find_inliner_info): Ditto.
- * pef.c (bfd_pef_find_inliner_info): Ditto.
- * ppcboot.c (ppcboot_find_inliner_info): Ditto.
- * srec.c (srec_find_inliner_info): Ditto.
- * tekhex.c (tekhex_find_inliner_info): Ditto.
- * versados.c (versados_find_inliner_info): Ditto.
- * xsym.c (bfd_sym_find_inliner_info): Ditto.
-
- * ieee.c (ieee_find_inliner_info): New function that always
- returns FALSE.
- * oasys.c (oasys_find_inliner_info): Ditto.
- * vms.c (vms_find_inliner_info): Ditto.
-
-2005-05-24 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_check_relocs): For old gcc -fPIC code
- force old plt layout.
-
-2005-05-22 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_relax_section): Ignore non-allocated
- sections.
- (elf64_alpha_check_relocs): Likewise.
- (elf64_alpha_relocate_section): Don't emit dynamic relocations to
- non-allocated sections.
-
-2005-05-22 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_relax_with_lituse): Relax jsr to
- undefweak to use zero register. Call elf64_alpha_relax_got_load
- if not all uses removed.
- (elf64_alpha_relax_got_load): Relax undefweak to lda zero.
- (elf64_alpha_relax_section): Handle undefweak symbols.
- (elf64_alpha_calc_dynrel_sizes): Don't add relocs for undefweak.
- (elf64_alpha_size_rela_got_1): Likewise.
- (elf64_alpha_relocate_section): Likewise.
-
-2005-05-22 Richard Henderson <rth at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_relax_section): Only operate
- on SEC_CODE sections.
-
-2005-05-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * som.c (try_prev_fixup): Changed type of subspace_reloc_sizep to
- unsigned int *.
- (som_write_space_strings): Change type of tmp_space and p to char *.
- (som_write_symbol_strings): Likewise. Also change type of comp to
- char *comp[4].
- (som_begin_writing): Change type of strings_size to unsigned int.
- (som_finish_writing): Likewise.
- (som_slurp_reloc_table): Change type of external_relocs to unsigned
- char *.
- * som.h (struct som_section_data_struct): Change type of reloc_stream
- field to unsigned char *.
-
-2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-i386.c (elf_i386_adjust_dynamic_symbol): Don't eliminate
- copy relocations for VxWorks.
-
-2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
-
- * bfd/elf32-ppc.c (struct ppc_elf_link_hash_entry): Add new field
- has_sda_refs.
- (ppc_elf_copy_indirect_symbol): Copy has_sda_refs.
- (ppc_elf_check_relocs): Set has_sda_refs.
- (ppc_elf_adjust_dynamic_symbol): Check has_sda_refs before eliminating
- copy relocations. Use has_sda_refs to place variables in .sbss.
- (ppc_elf_finish_dynamic_symbol): Use has_sda_refs to place variables in
- .sbss.
-
-2005-05-20 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (bfd_elf_xtensa_reloc): Make sure that
- xtensa_default_isa is initialized.
-
-2005-05-20 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (allocate_dynrelocs): Correct plt offset assigned
- for second and subsequent list entries. Only allocate multiple
- glink stubs when shared or pie.
- (ppc_elf_finish_dynamic_symbol): Break out early when only one
- glink stub is needed.
-
-2005-05-19 Zack Weinberg <zack at codesourcery.com>
-
- * Makefile.am: Have 'all' depend on 'info'.
- * Makefile.in: Regenerate.
-
-2005-05-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_link_hash_table): Delete init_refcount and
- init_offset. Add init_got_refcount, init_plt_refcount,
- init_got_offset and init_plt_offset.
- * elf.c (_bfd_elf_link_hash_newfunc): Adjust for above change.
- (_bfd_elf_link_hash_hide_symbol): Likewise.
- (_bfd_elf_link_hash_table_init): Likewise.
- * elf32-hppa.c (elf32_hppa_hide_symbol): Likewise.
- * elf64-ppc.c (ppc64_elf_link_hash_table_create): Likewise.
- * elflink.c (_bfd_elf_adjust_dynamic_symbol): Likewise.
- (bfd_elf_size_dynamic_sections): Likewise.
- * elf32-ppc.c (GLINK_PLTRESOLVE): Now 16 insns.
- (LWZU_0_X_12, LWZ_0_4_30, LWZ_0_X_12, LWZ_11_X_11, LWZ_11_X_30,
- LWZ_12_4_12, LWZ_12_8_30, LWZ_12_X_12, SUB_11_11_30): Delete.
- (ADDIS_12_12, BCL_20_31, LWZU_0_12, LWZ_0_12, LWZ_11_11, LWZ_11_30,
- LWZ_12_12, MFLR_0, MFLR_12, MTLR_0, SUB_11_11_12): Define.
- (struct plt_entry): New.
- (ppc_elf_link_hash_table_create): Set new init_plt fields.
- (ppc_elf_copy_indirect_symbol): Handle merge of plt plist. Don't
- use _bfd_elf_link_hash_copy_indirect.
- (update_plt_info, find_plt_ent): New functions.
- (ppc_elf_check_relocs): Handle R_PPC_PLTREL24 with non-zero addend
- and adjust for use of plt list rather than refcount.
- (ppc_elf_gc_sweep_hook): Likewise.
- (ppc_elf_tls_optimize): Likewise.
- (ppc_elf_adjust_dynamic_symbol): Likewise.
- (allocate_dynrelocs): Likewise.
- (ppc_elf_relax_section): Likewise.
- (ppc_elf_relocate_section): Likewise. Adjust R_PPC_PLTREL24 addends
- when performing a relocatable link.
- (ppc_elf_finish_dynamic_symbol): Likewise. Write .glink stubs here..
- (ppc_elf_finish_dynamic_sections): ..rather than here. Use new
- pic resolver stub.
-
-2005-05-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (assign_file_positions_for_segments): Use maximum of
- maxpagesize and section alignment when adjusting initial
- segment offset and section offsets.
-
-2005-05-18 Zack Weinberg <zack at codesourcery.com>
-
- * elf32-arm.c: Make all #ifndef OLD_ARM_ABI blocks
- unconditional.
-
-2005-05-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (group_signature): Undo the last change. Check if the
- symbol table section is correct.
-
-2005-05-17 Zack Weinberg <zack at codesourcery.com>
-
- * elf32-arm.c: Wherever possible, use official reloc names
- from AAELF.
- (elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
- (elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
- (elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
- (elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
- (elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
- (elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
- elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
- Add many new relocations from AAELF.
- (elf32_arm_howto_from_type): Update to match.
- (elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
- R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
- R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
- (elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
- (elf32_arm_final_link_relocate): Add support for
- R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
- case entries redundant with default.
-
- * reloc.c: Reorganize ARM relocations. Add Thumb
- assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
- BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
- Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
- BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
- Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
- * bfd-in2.h, libbfd.h: Regenerate.
-
-2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf.c (_bfd_elf_write_object_contents): Check for non-NULL
- elf_shstrtab.
- * format.c (bfd_check_format_matches): Set output_has_begun
- for both_direction.
- * section.c (bfd_set_section_contents): Use bfd_write_p. Remove
- special case for both_direction.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- * elf.c (group_signature): Check for a group section which is
- actually a (corrupt) symbol table section in disguise and prevent
- an infinite loop from occurring.
-
-2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_brl): Undo the change made on
- 2005-02-16.
-
-2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_br): Keep the original
- predicate on slot 0 only if slot 0 isn't br.
-
-2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 797
- * elf32-i386.c (elf_i386_size_dynamic_sections): Also remove
- empty sdynbss section.
- * elf64-x86-64.c (elf64_x86_64_size_dynamic_sections): Likewise.
-
-2005-05-17 Tavis Ormandy <taviso at gentoo.org>
-
- * elf.c (bfd_section_from_shdr): Add sanity check when parsing
- dynamic sections.
-
-2005-05-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (LIS_11. LIS_12): Define.
- (LWZU_0_X_12, LWZ_0_X_12, LWZ_12_4_12, LWZ_12_X_12): Define.
- (ppc_elf_finish_dynamic_sections): Provide non-pic plt call stub
- for --data-plt when building non-pie executables.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): Gracefully handle
- the situation where a symbols's section is not known but a section
- relative R_ARM_RELATIVE reloc has to be generated for the Symbian
- OS.
-
- * elf32-v850.c (v850_elf_relocate_section): Move code to test for
- the presence of a symbol table to just before the symbol table is
- actually used.
-
-2005-05-16 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 834
- * elfxx-ia64.c (elfNN_ia64_relax_br): New.
- (elfNN_ia64_relax_section): Use it.
-
-2005-05-14 Mark Kettenis <kettenis at gnu.org>
-
- * elflink.c (bfd_elf_size_dynamic_sections): Use lbasename instead
- of basename.
-
-2005-05-14 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_size_dynamic_sections): Set DT_PPC_GOT,
- not DT_PPC_GLINK.
- (ppc_elf_finish_dynamic_sections): Likewise.
-
-2005-05-13 Fred Fish <fnf at specifixinc.com>
-
- * libbfd-in.h: Fix a comment typo, 'neaderst' -> 'nearest'
- * libbfd.h: Rebuilt.
-
-2005-05-13 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (xtensa_get_property_section_name): Add missing
- periods in linkonce_kind values.
-
-2005-05-12 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-i386.c (elf_i386_relocate_section): Allow R_386_GOTOFF
- against protected function when building executable.
-
-2005-05-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (LWZU_0_X_11): Delete.
- (B, LWZ_11_X_11, LWZ_11_X_30, MTCTR_11): Define.
- (ppc_elf_select_plt_layout): Set .got flags too. Formatting.
- (ppc_elf_size_dynamic_sections): Allocate space for .glink branch
- table.
- (ppc_elf_finish_dynamic_symbol): Point .plt entries into the branch
- table.
- (ppc_elf_finish_dynamic_sections): Adjust DT_PPC_GLINK value.
- Generate .glink branch table and updated stubs.
-
-2005-05-11 Alan Modra <amodra at bigpond.net.au>
-
- * reloc.c (BFD_RELOC_HI16_PCREL): Define.
- (BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL): Define.
- * elf32-ppc.c (GLINK_PLTRESOLVE, GLINK_ENTRY_SIZE): Define.
- (CROR_151515, CROR_313131): Delete.
- (ADDIS_11_11, ADDI_11_11, SUB_11_11_30, ADD_0_11_11, ADD_11_0_11,
- LWZ_0_4_30, MTCTR_0, LWZ_12_8_30, BCTR, ADDIS_11_30,
- LWZU_0_X_11): Define.
- (ppc_elf_howto_raw): Add R_PPC_REL16, R_PPC_REL16_LO, R_PPC_REL16_HI
- and R_PPC_REL16_HA entries.
- (ppc_elf_reloc_type_lookup): Convert new bfd reloc types.
- (ppc_elf_addr16_ha_reloc): Also handle R_PPC_REL16_HA.
- (struct ppc_elf_link_hash_table): Add glink, glink_pltresolve,
- new_plt, and old_plt.
- (ppc_elf_create_dynamic_sections): Create .glink section.
- (ppc_elf_check_relocs): Set new_plt and old_plt.
- (ppc_elf_select_plt_layout): New function.
- (ppc_elf_tls_setup): Set plt output section elf type and flags.
- (allocate_got): Handle differences between old and new got layout.
- (allocate_dynrelocs): Likewise for plt.
- (ppc_elf_size_dynamic_sections): Likewise. Allocate memory for
- .glink. Don't allocate memory for old bss .plt. Emit DT_PPC_GLINK.
- (ppc_elf_relax_section): Rename ppc_info to htab. Handle .glink
- destination of R_PPC_PLTREL24 relocs.
- (ppc_elf_relocate_section): Handle new relocs and changed destination
- of R_PPC_PLTREL24.
- (ppc_elf_finish_dynamic_symbol): Init new style plt and handle
- differences in layout.
- (ppc_elf_finish_dynamic_sections): Set DT_PPC_GLINK value. Don't
- put a blrl in new got. Write glink contents.
- * elf32-ppc.h (ppc_elf_select_plt_layout): Declare.
- * libbfd.h: Regenerate.
- * bfd-in2.h: Regenerate.
-
-2005-05-11 Andreas Schwab <schwab at suse.de>
-
- * elf32-i386.c (elf_i386_finish_dynamic_sections): Fix signedness
- warning.
-
-2005-05-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (_bfd_elf_make_section_from_shdr): Only check debug
- section if SEC_ALLOC isn't set.
-
-2005-05-09 Kelley Cook <kcook at gcc.gnu.org>
-
- * configure.in: Replace AC_COMPILE_CHECK_SIZEOF with AC_CHECK_SIZEOF.
- * acinclude.m4: Don't sinclude accross.m4.
- * config.in, configure, Makefile.in, doc/Makefile.in: Regenerate.
-
-2005-05-09 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add has_dotsym.
- (ppc64_elf_add_symbol_hook): Set has_dotsym.
- (ppc64_elf_check_directives): Only process syms when has_dotsym.
- (func_desc_adjust): Hide fake function descriptors when function
- code entry is defined.
- (adjust_opd_syms): Adjust for deleted_section becoming union field.
-
-2005-05-09 Alan Modra <amodra at bigpond.net.au>
-
- * elfcode.h (elf_object_p): Add more sanity checks on elf header.
-
-2005-05-08 Dave Korn <dave.korn at artimi.com>
-
- * coff-tic80.c: Undefine _CONST after system headers to prevent
- clash with tic80-specific definition in include/coff/tic80.h
-
-2005-05-08 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 939
- * elflink.c (elf_link_output_extsym): Use output_bfd if
- h->root.u.def.section is bfd_abs_section_ptr when reporting
- error.
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_backend_data): Update special_sections to
- array of pointer to bfd_elf_special_section.
- * elf.c (special_sections): Likewise.
- * elf32-arm.c (elf32_arm_symbian_special_sections): Likewise.
- * elf32-m32r.c (m32r_elf_special_sections): Likewise.
- * elf32-m68hc11.c (elf32_m68hc11_special_sections): Likewise.
- * elf32-m68hc12.c (elf32_m68hc12_special_sections): Likewise.
- * elf32-mcore.c (mcore_elf_special_sections): Likewise.
- * elf32-ppc.c (ppc_elf_special_sections): Likewise.
- * elf32-sh64.c (sh64_elf_special_sections): Likewise.
- * elf32-v850.c (v850_elf_special_sections): Likewise.
- * elf32-xtensa.c (elf_xtensa_special_sections): Likewise.
- * elf64-alpha.c (elf64_alpha_special_sections): Likewise.
- * elf64-hppa.c (elf64_hppa_special_sections): Likewise.
- * elf64-ppc.c (ppc64_elf_special_sections): Likewise.
- * elf64-sh64.c (sh64_elf64_special_sections): Likewise.
- * elfxx-ia64.c (elfNN_ia64_special_sections): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_special_sections): Likewise.
- * elfxx-mips.h (_bfd_mips_elf_special_sections): Likewise.
-
- * elf.c (get_special_section): Updated.
-
-2005-05-07 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_backend_data): Remove got_symbol_offset.
- * elfxx-target.h (elf_backend_got_symbol_offset): Delete.
- * elflink.c (_bfd_elf_create_got_section): Use zero in place of
- got_symbol_offset.
- * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Likewise.
- * elf32-frv.c (_frv_create_got_section): Likewise.
- * elf32-i370.c (i370_elf_finish_dynamic_sections): Delete ppc code.
- (elf_backend_got_symbol_offset): Don't define.
- * elf64-ppc.c (elf_backend_got_symbol_offset): Don't define.
- * elf32-ppc.c (struct ppc_elf_link_hash_table): Add got_header_size
- and got_gap.
- (ppc_elf_create_got): Tidy.
- (ppc_elf_create_dynamic_sections): Don't set SEC_IN_MEMORY for .plt.
- (ppc_elf_check_relocs): Reduce string comparisons by using elf.hgot.
- (ppc_elf_gc_sweep_hook): Likewise.
- (ppc_elf_relocate_section): Likewise.
- (ppc_elf_finish_dynamic_symbol): Likewise.
- (allocate_got): New function.
- (allocate_dynrelocs): Use allocate_got.
- (ppc_elf_size_dynamic_sections): Likewise. Delay tlsld_got allocation
- so that local got can refcount it. Set got_header_size.
- (ppc_elf_relocate_section): Use value of elf.hgot rather than hard-
- coded 4.
- (ppc_elf_finish_dynamic_sections): Likewise.
- (elf_backend_got_symbol_offset): Don't define.
- (elf_backend_got_header_size): Ditto.
-
-2005-05-05 Steve Ellcey <sje at cup.hp.com>
-
- * configure.in (ACX_HEADER_STRING): New.
- * configure: Regenerate.
- * config.in: Regenerate.
- * sysdep.h (STRING_WITH_STRINGS): Use.
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (_bfd_elf_close_and_cleanup): Only call
- _bfd_dwarf2_cleanup_debug_info on bfd_object.
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_provide_section_bound_symbols): Use
- "__bss_start" instead of "_edata" as fallback.
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd-in2.h: Regenerated.
-
-2005-05-05 Paul Brook <paul at codesourcery.com>
-
- * config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
- * configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
- elf-vxworks.lo.
- * configure: Regenerate.
- * Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
- (BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
- (elf32-i386.lo): Depend on elf-vxworks.h.
- (elf-vxworks.lo): New rule.
- * Makefile.in: Regenerate.
- * elf-bfd.h (elf_backend_data): Update type of
- elf_backend_emit_relocs.
- (_bfd_elf_link_output_relocs): Update prototype.
- * elflink.c (_bfd_elf_link_output_relocs): Always use
- bed->elf_backend_emit_relocs when outputting relocations.
- * elfxx-target.h (elf_backend_emit_relocs): Default to
- _bfd_elf_link_output_relocs.
- * targets.c (bfd_elf32_i386_vxworks_vec): Declare.
- (_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
- * elf32-i386.c: Add elf32-i386-vxworks target BFD.
- (elf_i386_plt0_entry): Remove padding.
- (elf_i386_pic_plt0_entry): Ditto.
- (PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
- (PLT_NON_JUMP_SLOT_RELOCS): Define.
- (elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
- plt0_pad_byte fields.
- (elf_i386_link_hash_table_create): Zero them.
- (elf_i386_create_dynamic_sections): Create static relocation section.
- (allocate_dynrelocs): Allocate space for static PLT relocations.
- (elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
- symbols. Give PLT symbols function type. Don't strip PLT sections
- if we have exported symbols from them.
- (elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
- relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
- VxWorks.
- (elf_i386_finish_dynamic_sections): Allow different pad bytes.
- Add relocation for GOT location. Fill in PLT static relocations.
- (elf_i386_vxworks_link_hash_table_create): New function.
- (elf_i386_vxworks_link_output_symbol_hook): New function.
- * elf-vxworks.h: New file.
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * section.c (bfd_make_section_anyway_with_flags): New.
- (bfd_make_section_anyway): Call bfd_make_section_anyway_with_flags,
- (bfd_make_section_with_flags): New.
- (bfd_make_section): Call bfd_make_section_with_flags.
-
- * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Call
- bfd_make_section_with_flags/bfd_make_section_anyway_with_flags
- instead of bfd_make_section/bfd_make_section and don't call
- bfd_set_section_flags.
- (mn10300_elf_check_relocs): Likewise.
- (_bfd_mn10300_elf_create_dynamic_sections): Likewise.
- * elf32-arm.c (create_got_section): Likewise.
- (bfd_elf32_arm_add_glue_sections_to_bfd): Likewise.
- (elf32_arm_check_relocs): Likewise.
- * elf32-cris.c (cris_elf_check_relocs): Likewise.
- * elf32-frv.c (elf32_frv_add_symbol_hook): Likewise.
- (_frv_create_got_section): Likewise.
- (elf32_frvfdpic_create_dynamic_sections): Likewise.
- * elf32-hppa.c (elf32_hppa_create_dynamic_sections): Likewise.
- (elf32_hppa_check_relocs): Likewise.
- * elf32-i370.c (i370_elf_create_dynamic_sections): Likewise.
- (i370_elf_check_relocs): Likewise.
- * elf32-i386.c (create_got_section): Likewise.
- (elf_i386_check_relocs): Likewise.
- * elf32-m32r.c (m32r_elf_add_symbol_hook): Likewise.
- (create_got_section): Likewise.
- (m32r_elf_create_dynamic_sections): Likewise.
- (m32r_elf_check_relocs): Likewise.
- * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
- * elf32-ppc.c (ppc_elf_create_got): Likewise.
- (ppc_elf_create_dynamic_sections): Likewise.
- (ppc_elf_add_symbol_hook): Likewise.
- (ppc_elf_check_relocs): Likewise.
- * elf32-s390.c (create_got_section): Likewise.
- (elf_s390_check_relocs): Likewise.
- * elf32-sh.c (create_got_section): Likewise.
- (sh_elf_create_dynamic_sections): Likewise.
- (sh_elf_check_relocs): Likewise.
- * elf32-vax.c (elf_vax_check_relocs): Likewise.
- * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
- * elf32-xtensa.c (elf_xtensa_create_dynamic_sections): Likewise.
- (add_extra_plt_sections): Likewise.
- * elf64-alpha.c (elf64_alpha_add_symbol_hook): Likewise.
- (elf64_alpha_create_got_section): Likewise.
- (elf64_alpha_create_dynamic_sections): Likewise.
- (elf64_alpha_check_relocs): Likewise.
- * elf64-hppa.c (get_reloc_section): Likewise.
- (get_opd): Likewise.
- (get_plt): Likewise.
- (get_dlt): Likewise.
- (get_stub): Likewise.
- (elf64_hppa_create_dynamic_sectionso): Likewise.
- * elf64-mmix.c (mmix_elf_check_common_relocs): Likewise.
- * elf64-ppc.c (create_linkage_sections): Likewise.
- (ppc64_elf_check_relocs): Likewise.
- * elf64-s390.c (create_got_section): Likewise.
- (elf_s390_check_relocs): Likewise.
- * elf64-sh64.c (sh_elf64_check_relocs): Likewise.
- (sh64_elf64_create_dynamic_sections): Likewise.
- * elf64-x86-64.c (create_got_section): Likewise.
- (elf64_x86_64_check_relocs): Likewise.
- * elflink.c (_bfd_elf_create_got_section): Likewise.
- (_bfd_elf_link_create_dynamic_sections): Likewise.
- (elf_link_add_object_symbols): Likewise.
- * elfxx-ia64.c (elfNN_ia64_add_symbol_hook): Likewise.
- (elfNN_ia64_create_dynamic_sections): Likewise.
- (get_fptr): Likewise.
- (get_pltoff): Likewise.
- (get_reloc_section): Likewise.
- (elfNN_ia64_object_p): Likewise.
- * elfxx-mips.c (mips_elf_rel_dyn_section): Likewise.
- (mips_elf_create_compact_rel_section): Likewise.
- (mips_elf_create_got_section): Likewise.
- (_bfd_mips_elf_create_dynamic_sections): Likewise.
- * elfxx-sparc.c (create_got_section): Likewise.
- (_bfd_sparc_elf_check_relocs): Likewise.
-
- * elf.c (_bfd_elf_new_section_hook): Call _bfd_elf_get_sec_type_attr
- on linker created sections.
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 882
- * elflink.c (_bfd_elf_link_assign_sym_version): Allow version
- script on executable.
-
-2005-05-05 John Levon <levon at movementarian.org>
-
- * dwarf2.c (read_abbrevs): If bfd_realloc fails, free currently
- allocated memory before returning.
- (decode_line_info): Likewise.
- (_bfd_dwarf2_cleanup_debug_info): New function: Frees memory
- allocated by functions in this file.
- * elf-bfd.h (_bfd_dwarf2_cleanup_debug_info): Prototype.
- * elf.c (_bfd_elf_close_and_cleanup): Call
- _bfd_dwarf2_cleanup_debug_info.
-
-2005-05-05 Hans-Peter Nilsson <hp at axis.com>
-
- * Makefile.am (INCLUDES): Don't -D_GNU_SOURCE here.
- * configure.in: Call AC_GNU_SOURCE here, after AC_PROG_CC.
- * configure, config.in, Makefile.in: Regenerate.
- * sysdep.h (stpcpy): Revert last change.
-
-2005-05-05 Hans-Peter Nilsson <hp at axis.com>
-
- * sysdep.h (stpcpy): Wrap declaration in parentheses.
-
-2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (ARCH_SIZE): New.
- (LOG_SECTION_ALIGN): Likewise.
- (elfNN_ia64_create_dynamic_sections): Use LOG_SECTION_ALIGN to
- align relocation sections.
- (get_fptr): Likewise.
- (get_reloc_section): Likewise.
- (elfNN_ia64_tprel_base): Likewise.
- (elfNN_ia64_check_relocs): Support 32bit relocations.
- (allocate_global_fptr_got): Likewise.
- (allocate_dynrel_entries): Likewise.
- (set_got_entry): Likewise.
- (set_pltoff_entry): Likewise.
- (elfNN_ia64_relocate_section): Likewise.
-
-2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * configure.in: Add AC_CHECK_DECLS(stpcpy).
- * configure: Regenerate.
- * config.in: Likewise.
-
- * sysdep.h (stpcpy): New.
-
-2005-05-04 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- aix386-core.c, aix5ppc-core.c, aout-adobe.c, aout-arm.c,
- aout-cris.c, aout-ns32k.c, aout-sparcle.c, aout-target.h,
- aout-tic30.c, aout0.c, aout32.c, aout64.c, aoutf1.h, aoutx.h,
- archive.c, archive64.c, archures.c, armnetbsd.c, bfd-in.h,
- bfd-in2.h, bfd.c, bfdio.c, bfdwin.c, binary.c, bout.c, cache.c,
- cf-i386lynx.c, cf-m68klynx.c, cf-sparclynx.c, cisco-core.c,
- coff-a29k.c, coff-alpha.c, coff-apollo.c, coff-arm.c, coff-aux.c,
- coff-go32.c, coff-h8300.c, coff-h8500.c, coff-i386.c, coff-i860.c,
- coff-i960.c, coff-ia64.c, coff-m68k.c, coff-m88k.c, coff-maxq.c,
- coff-mcore.c, coff-mips.c, coff-or32.c, coff-pmac.c, coff-ppc.c,
- coff-rs6000.c, coff-sh.c, coff-sparc.c, coff-stgo32.c,
- coff-svm68k.c, coff-tic30.c, coff-tic4x.c, coff-tic54x.c,
- coff-tic80.c, coff-u68k.c, coff-w65.c, coff-we32k.c, coff-z8k.c,
- coff64-rs6000.c, coffcode.h, coffgen.c, cofflink.c, coffswap.h,
- corefile.c, cpu-a29k.c, cpu-alpha.c, cpu-arc.c, cpu-arm.c,
- cpu-avr.c, cpu-cr16c.c, cpu-cris.c, cpu-crx.c, cpu-d10v.c,
- cpu-d30v.c, cpu-dlx.c, cpu-fr30.c, cpu-frv.c, cpu-h8300.c,
- cpu-h8500.c, cpu-hppa.c, cpu-i370.c, cpu-i386.c, cpu-i860.c,
- cpu-i960.c, cpu-ia64-opc.c, cpu-ia64.c, cpu-ip2k.c, cpu-iq2000.c,
- cpu-m10200.c, cpu-m10300.c, cpu-m32r.c, cpu-m68hc11.c,
- cpu-m68hc12.c, cpu-m68k.c, cpu-m88k.c, cpu-maxq.c, cpu-mcore.c,
- cpu-mips.c, cpu-mmix.c, cpu-msp430.c, cpu-ns32k.c, cpu-openrisc.c,
- cpu-or32.c, cpu-pdp11.c, cpu-pj.c, cpu-powerpc.c, cpu-rs6000.c,
- cpu-s390.c, cpu-sh.c, cpu-sparc.c, cpu-tic30.c, cpu-tic4x.c,
- cpu-tic54x.c, cpu-tic80.c, cpu-v850.c, cpu-vax.c, cpu-w65.c,
- cpu-we32k.c, cpu-xstormy16.c, cpu-xtensa.c, cpu-z8k.c, demo64.c,
- dwarf1.c, dwarf2.c, ecoff.c, ecofflink.c, ecoffswap.h,
- efi-app-ia32.c, efi-app-ia64.c, elf-bfd.h, elf-eh-frame.c,
- elf-hppa.h, elf-m10200.c, elf-m10300.c, elf-strtab.c, elf.c,
- elf32-am33lin.c, elf32-arc.c, elf32-arm.c, elf32-avr.c,
- elf32-cr16c.c, elf32-cris.c, elf32-crx.c, elf32-d10v.c,
- elf32-d30v.c, elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-gen.c,
- elf32-h8300.c, elf32-hppa.c, elf32-hppa.h, elf32-i370.c,
- elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c,
- elf32-iq2000.c, elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c,
- elf32-m68hc1x.c, elf32-m68hc1x.h, elf32-m68k.c, elf32-m88k.c,
- elf32-mcore.c, elf32-mips.c, elf32-msp430.c, elf32-openrisc.c,
- elf32-or32.c, elf32-pj.c, elf32-ppc.c, elf32-ppc.h, elf32-s390.c,
- elf32-sh-symbian.c, elf32-sh.c, elf32-sh64-com.c, elf32-sh64.c,
- elf32-sh64.h, elf32-sparc.c, elf32-v850.c, elf32-vax.c,
- elf32-xstormy16.c, elf32-xtensa.c, elf32.c, elf64-alpha.c,
- elf64-gen.c, elf64-hppa.c, elf64-hppa.h, elf64-mips.c,
- elf64-mmix.c, elf64-ppc.c, elf64-ppc.h, elf64-s390.c,
- elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c, elf64.c, elfcode.h,
- elfcore.h, elflink.c, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c,
- elfxx-mips.h, elfxx-sparc.c, elfxx-sparc.h, elfxx-target.h,
- epoc-pe-arm.c, epoc-pei-arm.c, format.c, freebsd.h, gen-aout.c,
- genlink.h, hash.c, host-aout.c, hp300bsd.c, hp300hpux.c,
- hppabsd-core.c, hpux-core.c, i386aout.c, i386bsd.c, i386dynix.c,
- i386freebsd.c, i386linux.c, i386lynx.c, i386mach3.c, i386msdos.c,
- i386netbsd.c, i386os9k.c, ieee.c, ihex.c, init.c, irix-core.c,
- libaout.h, libbfd-in.h, libbfd.c, libbfd.h, libcoff-in.h,
- libcoff.h, libecoff.h, libhppa.h, libieee.h, libnlm.h, liboasys.h,
- libpei.h, libxcoff.h, linker.c, lynx-core.c, m68k4knetbsd.c,
- m68klinux.c, m68klynx.c, m68knetbsd.c, m88kmach3.c, m88kopenbsd.c,
- mach-o-target.c, mach-o.c, mach-o.h, merge.c, mipsbsd.c, mmo.c,
- netbsd-core.c, netbsd.h, newsos3.c, nlm-target.h, nlm.c,
- nlm32-alpha.c, nlm32-i386.c, nlm32-ppc.c, nlm32-sparc.c, nlm32.c,
- nlm64.c, nlmcode.h, nlmswap.h, ns32k.h, ns32knetbsd.c, oasys.c,
- opncls.c, osf-core.c, pc532-mach.c, pdp11.c, pe-arm.c, pe-i386.c,
- pe-mcore.c, pe-mips.c, pe-ppc.c, pe-sh.c, peXXigen.c,
- pef-traceback.h, pef.c, pef.h, pei-arm.c, pei-i386.c, pei-mcore.c,
- pei-mips.c, pei-ppc.c, pei-sh.c, peicode.h, ppcboot.c,
- ptrace-core.c, reloc.c, reloc16.c, riscix.c, rs6000-core.c,
- sco5-core.c, section.c, simple.c, som.c, som.h, sparclinux.c,
- sparclynx.c, sparcnetbsd.c, srec.c, stab-syms.c, stabs.c, sunos.c,
- syms.c, sysdep.h, targets.c, tekhex.c, ticoff.h, trad-core.c,
- vax1knetbsd.c, vaxbsd.c, vaxnetbsd.c, versados.c, vms-gsd.c,
- vms-hdr.c, vms-misc.c, vms-tir.c, vms.c, vms.h, xcoff-target.h,
- xcofflink.c, xsym.c, xsym.h, xtensa-isa.c, xtensa-modules.c,
- hosts/alphavms.h
-
-2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd-in.h (_bfd_elf_provide_section_bound_symbols): New.
- * bfd-in2.h: Regenerated.
-
- * elflink.c (bfd_elf_set_symbol): New.
- (_bfd_elf_provide_symbol): Call it.
- (_bfd_elf_provide_section_bound_symbols): New.
-
-2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Only skip weak definitions
- at the end, if a strong definition has already been seen.
-
-2005-05-04 Alan Modra <amodra at bigpond.net.au>
-
- * section.c (struct bfd_section): Replace link_order_head and
- link_order_tail with map_head and map_tail union.
- (STD_SECTION): Update.
- (_bfd_strip_section_from_output): Delete.
- * aoutx.h: Update throughout for above changes.
+ PR 2434
+ * elflink.c (struct elf_smash_syms_data, elf_smash_syms): Delete.
+ (elf_link_add_object_symbols): Delete unnecessary locals. Rename
+ hash_table -> htab. Formatting. Save entire symbol table
+ before loading as-needed syms, and restore afterwards if lib not
+ needed. Use bfd_hash_allocate rather than bfd_alloc for sym
+ name. Free some buffers earlier.
+ * bfd-in.h (struct bfd_hash_table): Add entsize.
+ (bfd_hash_table_init, bfd_hash_table_init_n): Adjust prototype.
+ * elf-bfd.h (_bfd_elf_link_hash_table_init): Likewise
+ * hash.c (bfd_hash_table_init_n): Add entsize param, save to
+ hash table.
+ (bfd_hash_table_init): Add param, adjust calls.
+ * aoutx.h: Adjust all hash_table_init functions and calls.
+ * bfd.c: Likewise.
+ * coff-arm.c: Likewise.
+ * coff-h8300.c: Likewise.
* coff-ppc.c: Likewise.
* cofflink.c: Likewise.
* ecoff.c: Likewise.
- * elf-eh-frame.c: Likewise.
+ * ecofflink.c: Likewise.
* elf-m10300.c: Likewise.
+ * elf-strtab.c: Likewise.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
+ * elf32-bfin.c: Likewise.
* elf32-cris.c: Likewise.
+ * elf32-frv.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
@@ -2963,7171 +481,662 @@
* elf32-s390.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-vax.c: Likewise.
- * elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
- * elflink.c: Likewise.
* elfxx-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
+ * i386linux.c: Likewise.
+ * libaout.h: Likewise.
+ * libbfd-in.h: Likewise.
+ * libcoff-in.h: Likewise.
* linker.c: Likewise.
+ * m68klinux.c: Likewise.
* merge.c: Likewise.
+ * opncls.c: Likewise.
* pdp11.c: Likewise.
+ * sparclinux.c: Likewise.
+ * stabs.c: Likewise.
+ * sunos.c: Likewise.
+ * vms.c: Likewise.
* xcofflink.c: Likewise.
- * elflink.c (bfd_boolean bfd_elf_size_dynsym_hash_dynstr): Split
- out from bfd_elf_size_dynamic_sections.
- * bfd-in.h (bfd_boolean bfd_elf_size_dynsym_hash_dynstr): Declare.
- * bfd-in2.h: Regenerate.
-
-2005-05-04 Alan Modra <amodra at bigpond.net.au>
-
- * section.c (bfd_section_list_remove): Don't clear s->next.
- (bfd_section_list_append): Always init s->prev.
- (bfd_section_list_prepend): Define.
- (bfd_section_list_insert_after): Minor optimization.
- (bfd_section_removed_from_list): Rewrite.
- * elf.c (assign_section_numbers): Simplify list traversal now that
- bfd_section_list_remove doesn't destroy removed section next ptr.
- * sunos.c (sunos_add_dynamic_symbols): Likewise.
- * elfxx-ia64.c (elfNN_ia64_object_p): Use bfd_section_list_prepend.
- * xcofflink.c (_bfd_xcoff_bfd_final_link): Simplify list traversal.
- * bfd-in2.h: Regenerate.
-
-2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd.c (bfd): Remove section_tail and add section_last.
- (bfd_preserve): Likewise.
- (bfd_preserve_save): Likewise.
- (bfd_preserve_restore): Likewise.
- * opncls.c (_bfd_new_bfd): Likewise.
-
- * coffcode.h (coff_compute_section_file_positions): Updated.
- (coff_compute_section_file_positions): Likewise.
- * elf.c (assign_section_numbers): Likewise.
- * elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
- * elf64-mmix.c (mmix_elf_final_link): Likewise.
- * elfxx-ia64.c (elfNN_ia64_object_p): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_link_hash_table_create): Likewise.
- * sunos.c (sunos_add_dynamic_symbols): Likewise.
- * xcofflink.c (_bfd_xcoff_bfd_final_link): Likewise.
-
- * ecoff.c (bfd_debug_section): Initialize prev.
-
- * section.c (bfd_section): Add prev.
- (bfd_section_list_remove): Updated.
- (bfd_section_list_append): New.
- (bfd_section_list_insert_after): New.
- (bfd_section_list_insert_before): New.
- (bfd_section_list_insert): Removed.
- (bfd_section_removed_from_list): Updated.
- (STD_SECTION): Initialize prev.
- (bfd_section_init): Updated.
- (bfd_section_list_clear): Updated.
-
- * bfd-in2.h: Regenerated.
-
-2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (_bfd_elf_new_section_hook): Don't call
- _bfd_elf_get_sec_type_attr on sections from input files.
-
-2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * merge.c (sec_merge_init): Call bfd_hash_table_init_n with
- hash table size 16699 instead of bfd_hash_table_init.
-
-2005-05-01 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Skip weak definitions if a strong
- definition has already been seen.
-
-2005-05-01 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (bfd_elf32_arm_process_before_allocation): Treat
- R_ARM_PLT32 the same as R_ARM_PC24.
- (arm_add_to_rel): Ditto.
-
-2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * config.bfd: Add h8300*-*-rtemscoff.
- Switch h8300*-*-rtems* to elf.
-
-2005-04-29 Daniel Jacobowitz <dan at codesourcery.com>
-
- * aclocal.m4, Makefile.in: Regnerated.
-
-2005-04-28 Paul Brook <paul at codesourcery.com>
-
- Merge changes only applied to Makefile.in.
- * Makefile.am (BFD32_BACKENDS): Add elfxx-sparc.lo
- (BFD32_BACKENDS_CFILES): Add elfxx-sparc.c
- (elfxx-sparc.lo): New rule.
- (elf32-sparc.lo): Add elfxx-sparc.h dependency.
- (elf64-sparc.lo): Likewise.
-
-2005-04-28 Julian Brown <julian at codesourcery.com>
-
- * elflink.c (_bfd_elf_provide_symbol): Provide symbol for weak
- import.
-
-2005-04-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (bfd_elf_sym_name): Also take "asection *".
-
- * elf.c (bfd_elf_sym_name): Updated.
- (group_signature): Likewise.
- * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
- * elf64-ppc.c (ppc64_elf_edit_opd): Likewise.
- (ppc64_elf_edit_toc): Likewise.
- (ppc64_elf_relocate_section): Likewise.
- * elfcode.h (elf_slurp_symbol_table): Likewise.
- * elflink.c (elf_link_input_bfd): Likewise.
-
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Call
- bfd_elf_sym_name to get local symbol name when reporting errors.
-
-2005-04-27 Nick Clifton <nickc at redhat.com>
-
- * elflink.c (elf_link_input_bfd): Handle the case where a badly
- formatted input file results in a reloc which has no associated
- global symbol.
-
-2005-04-26 Jerome Guitton <guitton at gnat.com>
-
- * bfd.m4 (BFD_NEED_DECLARATION): Restore.
-
-2005-04-25 David S. Miller <davem at davemloft.net>
-
- * elfxx-sparc.c (sparc_elf_append_rela_64): Add BFD64 protection.
- (sparc_elf_r_info_64, _bfd_sparc_elf_finish_dynamic_symbol,
- sparc64_finish_dyn, _bfd_sparc_elf_finish_dynamic_sections):
- Likewise.
-
-2005-04-25 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 858
- * elflink.c (elf_link_input_bfd): Make non-debugging reference
- to discarded section an error.
-
-2005-04-21 Jerome Guitton <guitton at gnat.com>
-
- * configure.in: Replace BFD_NEED_DECLARATION checks by the
- corresponding AC_CHECK_DECLS.
- * sysdep.h: Replace NEED_DECLARATION_* checks by the corresponding
- HAVE_DECL_*.
- * bfd.m4 (BFD_NEED_DECLARATION): Remove, obsolete.
- * configure: Regenerate.
- * config.in: Ditto.
-
-2005-04-21 Andreas Schwab <schwab at suse.de>
-
- * elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Remove
- unsigned from type of dynamic_interpreter.
- * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create): Remove
- casts again.
-
- * elf.c (assign_section_numbers): Fix comment.
-
-2005-04-21 Jerome Guitton <guitton at gnat.com>
-
- * som.c (som_bfd_print_private_bfd_data): Add explicit cast to long
- for struct som_exec_auxhdr fields.
-
-2005-04-21 Nick Clifton <nickc at redhat.com>
-
- * aout-adobe.c: Convert to ISO C and fix formatting.
- * aout-arm.c: Convert to ISO C and fix formatting.
- * aout-cris.c: Convert to ISO C and fix formatting.
- * aout-ns32k.c: Convert to ISO C and fix formatting.
- * aout-tic30.c: Convert to ISO C and fix formatting.
- * coffcode.h: Convert to ISO C and fix formatting.
- * coffswap.h: Convert to ISO C and fix formatting.
- * i386aout.c: Convert to ISO C and fix formatting.
- * libaout.h: Convert to ISO C and fix formatting.
- * libcoff-in.h: Convert to ISO C and fix formatting.
- * libcoff.h: Convert to ISO C and fix formatting.
- * libecoff.h: Convert to ISO C and fix formatting.
- * libnlm.h: Convert to ISO C and fix formatting.
- * libpei.h: Convert to ISO C and fix formatting.
- * libxcoff.h: Convert to ISO C and fix formatting.
- * nlm-target.h: Convert to ISO C and fix formatting.
- * nlm.c: Convert to ISO C and fix formatting.
- * nlm32-alpha.c: Convert to ISO C and fix formatting.
- * nlm32-i386.c: Convert to ISO C and fix formatting.
- * nlm32-ppc.c: Convert to ISO C and fix formatting.
- * nlm32-sparc.c: Convert to ISO C and fix formatting.
- * nlmcode.h: Convert to ISO C and fix formatting.
- * nlmswap.h: Convert to ISO C and fix formatting.
- * pe-mips.c: Convert to ISO C and fix formatting.
- * peXXigen.c: Convert to ISO C and fix formatting.
- * peicode.h: Convert to ISO C and fix formatting.
- * vms-gsd.c: Convert to ISO C and fix formatting.
- * vms-hdr.c: Convert to ISO C and fix formatting.
- * vms-misc.c: Convert to ISO C and fix formatting.
- * vms-tir.c: Convert to ISO C and fix formatting.
- * vms.c: Convert to ISO C and fix formatting.
- * vms.h: Convert to ISO C and fix formatting.
-
- * coffgen.c (coff_print_symbol): Restore correct formatting of
- output.
-
-2005-04-20 David S. Miller <davem at davemloft.net>
-
- * elfxx-sparc.c (sparc_elf_r_symndx_64): Fix compiler warning.
- (_bfd_sparc_elf_link_hash_table_create): Likewise.
- (allocate_dynrelocs): Likewise.
-
-2005-04-20 Jerome Guitton <guitton at gnat.com>
-
- * configure.in: Fix the check for basename declaration. Add check
- for declarations of ftello, ftello64, fseeko, fseeko64.
- * configure: Regenerate.
- * config.in: Ditto.
- * sysdep.h: If needed, declare ftello, ftello64, fseeko, fseeko64.
-
-2005-04-19 David S. Miller <davem at davemloft.net>
-
- * elfxx-sparc.c: New file.
- * elfxx-sparc.h: New file.
- * Makefile.in (BFD32_BACKENDS): Add elfxx-sparc.lo
- (BFD32_BACKENDS_CFILES): Add elfxx-sparc.c
- (elfxx-sparc.lo): New rule.
- (elf32-sparc.lo): Add elfxx-sparc.h dependency.
- (elf64-sparc.lo): Likewise.
- * configure.in (bfd_elf32_sparc_vec): Add elfxx-sparc.lo
- (bfd_elf64_sparc_vec): Likewise.
- * configure: Regenerate.
- * elf32-sparc.c: Remove common code now in elfxx-sparc.c
- * elf64-sparc.c: Likewise, also use elf64_sparc_*() naming
- which is more consistent with elf32-sparc.c
-
-2005-04-19 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elfxx-mips.c (struct mips_elf_link_hash_entry): Update comment.
- (mips_elf_create_local_got_entry): Check h->root.forced_local.
-
-2005-04-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_check_relocs): Don't bother with
- dynamic relocs in non-SEC_ALLOC sections.
- (ppc_elf_gc_sweep_hook): Likewise.
- (ppc_elf_relax_section): Likewise.
- (ppc_elf_relocate_section): Likewise.
-
-2005-04-18 Nick Clifton <nickc at redhat.com>
-
- * aix5ppc-core.c (xcoff64_core_p): Fix compile time warning
- assigning a value to return_value.
-
-2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 855
- * elf.c (_bfd_elf_copy_private_section_data): Don't copy linker
- created group data.
-
-2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 855
- * elf.c (setup_group): Properly handle zero group count.
-
-2005-04-17 Mark Kettenis <kettenis at gnu.org>
-
- * som.c (hppa_som_reloc, som_mkobject, som_is_space)
- (som_is_subspace, compare_subspaces, som_compute_checksum)
- (som_build_and_write_symbol_table, som_slurp_symbol_table): New
- protoypes.
- (hppa_som_reloc, compare_syms, compare_subspaces)
- (som_print_symbol, som_get_section_contents)
- (som_set_section_contents): Remove space after 'void *'.
- (som_bfd_print_private_bfd_data): Use %lx to print longs.
- (som_bfd_merge_private_bfd_data)
- (som_bfd_copy_private_header_data, som_bfd_set_private_flags): New
- defines.
-
-2004-04-15 Julian Brown <julian at codesourcery.com>
-
- * bfd-in.h (bfd_elf32_arm_set_target_relocs): Update prototype.
- * bfd-in2.h: Regenerate.
- * elf32-arm.c (elf32_arm_link_hash_table): New field, 'use_blx'.
- (elf32_arm_link_hash_table_create): Initialise fix_v4bx, use_blx.
- (bfd_elf32_arm_set_target_relocs): Handle use_blx.
- (elf32_arm_final_link_relocate): Use Thumb BLX for R_ARM_THM_PC22
- relocations if requested to.
- (allocate_dynrelocs): Don't count size of omitted Thumb stubs based on
- use_blx rather than symbian_p.
- (elf32_arm_finish_dynamic_symbol): Don't output Thumb PLT stubs if
- use_blx is in effect.
- (elf32_arm_symbian_link_hash_table_create): Enable use_blx by default
- for SymbianOS.
-
-2005-04-15 Nick Clifton <nickc at redhat.com>
-
- * coffgen.c (coff_print_symbol): Use fprintf_vma to print vma
- values.
-
-2005-04-15 Alan Modra <amodra at bigpond.net.au>
-
- PR ld/815
- * elflink.c (elf_smash_syms): Clear undef.next if it's not being
- used as a list pointer.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define.
- * warning.m4: New file
- * acinclude.m4: Include warning.m4.
- * configure.in: Invoke AM_BINUTILS_WARNINGS.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * merge.c (sec_merge_emit): Tidy. Check for bfd_zmalloc errors.
- Write trailing padding.
-
- * merge.c (merge_strings): Round up section size for alignment.
-
-2005-04-14 David S. Miller <davem at davemloft.net>
-
- Add TLS support for 64-bit Sparc ELF.
- * elf64-sparc.c (sparc64_elf_dyn_relocs,
- sparc64_elf_link_hash_entry, sparc64_elf_obj_tdata): New structs.
- (GOT_UNKNOWN, GOT_NORMAL, GOT_TLD_GD, GOT_TLD_IE,
- sparc64_elf_hash_entry, sparc64_elf_tdata,
- sparc64_elf_local_got_tls_type): New defines.
- (sparc64_elf_mkobject): New function.
- (sparc64_elf_link_hash_table): Add members for dynamic linker
- sections PLT, RELPLT, DYNBSS, and RELBSS. Add tls_ldm_got
- uion to track TLS GOT references. Add sym_sec to cache
- mappings from local sym to section.
- (link_hash_newfunc): New function.
- (sparc64_elf_bfd_link_hash_table_create): Rename to
- sparc64_elf_link_hash_table_create for consistency.
- Pass link_hash_newfunc to _bfd_elf_link_hash_table_init.
- (sparc64_elf_create_dynamic_sections): Initialize new section
- members of sparc64_elf_link_hash_table. Only init srelbss
- if not-shared.
- (sparc64_elf_copy_indirect_symbol, sparc64_elf_tls_transition):
- New functions.
- (SPARC_NOP): Define.
- (sparc64_elf_build_plt, sparc64_elf_plt_entry_offset,
- sparc64_elf_plt_ptr_offset): Delete.
- (sparc64_plt_entry_build): New function to build PLT entries
- gradually instread of all at once at the end of linking.
- (sparc64_elf_check_relocs): Delete dynobj, sgot, and srelgot
- local vars. Get them from sparc64_elf_hash_table instead.
- Check early on if r_symndx is in bounds. Handle TLS transitions.
- Account for TLS GOT references and DF_STATIC_TLS, as needed.
- For TLS relocs, record the tls_type in either
- sparc64_elf_local_got_tls_type or sparc64_elf_hash_entry as
- appropriate. For R_SPARC_TLS_{GD,LDM}_CALL, emit a reference
- to the __tls_get_addr symbol. For PLT relocs, track references
- via h->plt.refcount. When R_SPARC_{PC10,PC22,PC_HH22,PC_HM10,
- PC_LM22} and h not-NULL, set h->non_got_ref. For global data
- symbol references, count the number of relocations needed for
- that symbol. For default switch case, don't error, this lets
- the TLS relocs not explicitly handled by this function get
- accepted.
- (sparc64_elf_gc_mark_hook, sparc64_gc_sweep_hook): New functions.
- (sparc64_elf_adjust_dynamic_symbol): Remove dynobj local var, get
- it from sparc64_elf_hash_table. Store the real PLT offset
- in h->plt.offset, and build PLT entries one at a time. Also
- get .dynbss section pointer from htab.
- (allocate_dynrelocs, readonly_dynrelocs,
- sparc64_omit_section_dynsym): New functions.
- (sparc64_elf_omit_section_dynsym): Use these new functions as
- helpers.
- (dtpoff_base, tpoff): New functions.
- (sparc64_elf_relocate_section): Kill dynobj, sgot, and splt
- locals, get them from sparc64_elf_hash_table. Handle TLS
- relocations and refcounting in main relocation loop.
- (sparc64_elf_finish_dynamic_symbol): Use
- sparc64_elf_link_hash_table. Build PLT entries as we see
- them. Handle TLS GOT relocations.
- (sparc64_elf_finish_dynamic_sections): Get sgot and dynobj
- from sparc64_elf_hash_table. Initialize only PLT header
- not all entries since we not build PLT entries one by one.
- (elf_backend_copy_indirect_symbol, bfd_elf64_mkobject,
- elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook,
- elf_backend_can_gc_sections, elf_backend_can_refcount): Define.
-
-2005-04-13 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elflink.c (elf_link_input_bfd): Update check for removed
- sections.
-
-2005-04-12 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * libcoff.h: Regenerate.
-
-2005-04-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * linker.c (_bfd_generic_link_output_symbols): Also check if
- the output section of an input section has been removed from
- the output file.
-
- * section.c (bfd_section_list_remove): Clear the next field
- of the removed section.
- (bfd_section_removed_from_list): New.
- * bfd-in2.h: Regenerated.
-
-2005-04-11 David S. Miller <davem at davemloft.net>
-
- * elf32-sparc.c (elf32_sparc_relocate_section,
- R_SPARC_TLS_LDO_{HIX22,LOX10}): When not shared, transition to
- R_SPARC_TLS_LE_{HIX22,LOX10}.
- (elf32_sparc_relocate_section, R_SPARC_TLS_{LDO,LE}_HIX22): Only
- xor relocation with 0xffffffff if R_SPARC_TLS_LE_HIX22.
- (elf32_sparc_relocate_section, R_SPARC_TLS_{LDO,LE}_LOX10): Only
- or 0x1c00 into relocation if R_SPARC_TLS_LE_HIX22.
-
-2005-04-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * coffcode.h (STRING_SIZE_SIZE): Updated to match libcoff-in.h.
-
-2005-04-11 Nick Clifton <nickc at redhat.com>
-
- * aout-target.h: Convert to ISO C.
- * aoutf1.h: Convert to ISO C.
- * aoutx.h: Convert to ISO C.
- * bout.c: Convert to ISO C.
- * dwarf1.c: Convert to ISO C.
- * ecoffswap.h: Convert to ISO C.
- * freebsd.h: Convert to ISO C.
- * genlink.h: Convert to ISO C.
- * ieee.c: Convert to ISO C.
- * ihex.c: Convert to ISO C.
- * libcoff-in.h: Convert to ISO C.
- * mach-o.c: Convert to ISO C.
- * mach-o.h: Convert to ISO C.
- * netbsd.h: Convert to ISO C.
- * ns32k.h: Convert to ISO C.
- * ns32knetbsd.c: Convert to ISO C.
- * oasys.c: Convert to ISO C.
- * pdp11.c: Convert to ISO C.
- * pef-traceback.h: Convert to ISO C.
- * pef.c: Convert to ISO C.
- * pef.h: Convert to ISO C.
- * riscix.c: Convert to ISO C.
- * som.c: Convert to ISO C.
- * som.h: Convert to ISO C.
- * srec.c: Convert to ISO C.
- * stabs.c: Convert to ISO C.
- * sunos.c: Convert to ISO C.
- * tekhex.c: Convert to ISO C.
- * versados.c: Convert to ISO C.
- * version.h: Convert to ISO C.
- * xcoff-target.h: Convert to ISO C.
- * xcofflink.c: Convert to ISO C.
- * xsym.c: Convert to ISO C.
- * xsym.h: Convert to ISO C.
-
-2005-04-08 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (ARM2THUMB_GLUE_SIZE): Rename...
- (ARM2THUMB_STATIC_GLUE_SIZE): ... to this.
- (ARM2THUMB_PIC_GLUE_SIZE): Define.
- (a2t1p_ldr_insn, a2t2p_add_pc_insn, a2t3p_bx_r12_insn): Add.
- (elf32_arm_to_thumb_stub): Create PIC stubs.
- (record_arm_to_thumb_glue): Use different stub size for relocatable
- images.
-
-2005-04-05 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (dec_dynrel_count): New function split out from
- ppc64_elf_edit_toc, with additional code from ppc64_elf_edit_opd.
- (ppc64_elf_edit_toc, ppc64_elf_edit_opd): Use it.
- (ppc64_elf_tls_optimize): Likewise.
-
-2005-04-05 Mark Kettenis <kettenis at gnu.org>
-
- * netbsd-core.c (SPARC_WCOOKIE_OFFSET): Renamed from
- CORE_WCOOKIE_OFFSET.
- (SPARC64_WCOOKIE_OFFSET): New.
- (netbsd_core_file_p): Provide .wcookie section for OpenBSD/sparc64.
-
-2005-04-05 Nick Clifton <nickc at redhat.com>
-
- * po/rw.po: New translation: Kinyarwanda
- * configure.in (ALL_LINGUAS): Add rw
- * configure: Regenerate.
-
-2005-04-05 Richard Sandiford <rsandifo at redhat.com>
-
- * elfxx-mips.c (MIPS_ELF_OPTIONS_SECTION_NAME_P): New macro.
- (_bfd_mips_elf_section_from_shdr): Use it to check for recognized
- SHT_MIPS_OPTIONS names. Allow all sections with unrecognised
- section flags.
- (_bfd_mips_elf_fake_sections): Use MIPS_ELF_OPTIONS_SECTION_NAME_P
- to check for SHT_MIPS_OPTIONS sections.
- (_bfd_mips_elf_set_section_contents): Likewise.
-
-2005-04-04 Eric Christopher <echristo at redhat.com>
-
- * elfxx-mips.c (_bfd_elf_mips_get_relocated_section_contents):
- Clean up gp handling code.
-
-2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (bfd_elf_set_group_contents): Ignore linker created
- group section.
- (assign_section_numbers): Accept link_info. Check SHT_GROUP
- sections for relocatable files only. Remove the linker created
- group sections.
- (_bfd_elf_compute_section_file_positions): Pass link_info to
- assign_section_numbers.
-
- * elfxx-ia64.c (elfNN_ia64_object_p): New.
- (elf_backend_object_p): Defined.
-
-2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_section_data): Use (sec) instead of sec.
-
-2005-04-03 Fred Fish <fnf at specifixinc.com>
-
- * dwarf2.c (struct dwarf2_debug): Add dwarf_ranges_buffer and
- dwarf_ranges_size members.
- (struct comp_unit): Add base_address member.
- (struct funcinfo): Replace low/high members with an arange.
- (arange_add): Replace incoming "unit" parameter with "abfd" and
- "first_arange" pointers. Reorganize/rewrite function body.
- (decode_line_info): Change arange_add call to pass bfd and arange
- pointers.
- (lookup_address_in_line_info_table): Use arange list instead of
- individual low/high members. Walk function's arange list to find
- lowest PC in list, to test for overlapping functions.
- (read_debug_ranges): New function, reads the debug_ranges section.
- (lookup_address_in_function_table): Use arange list instead of
- individual low/high members. Rewrite to find smallest range that
- matches.
- (read_rangelist): Read a given rangelist from debug_ranges.
- (scan_unit_for_functions): Use arange list instead of individual
- low/high members. Handle a DW_AT_ranges attribute.
- (parse_comp_unit): Use arange list instead of individual low/high
- members. Save comp unit base address. Handle a DW_AT_ranges
- attribute.
-
-2005-04-01 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (assign_section_numbers): Really use the kept section.
-
-2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (_bfd_elf_check_kept_section): New.
-
- * elf.c (assign_section_numbers): When sh_link points to a
- discarded section, call _bfd_elf_check_kept_section to see if
- the kept section can be used. Otherwise reject sh_link
- pointing to discarded section.
-
- * elflink.c (_bfd_elf_check_kept_section): New.
- (elf_link_input_bfd): Use it.
-
-2005-04-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_edit_toc): Account for dynamic relocs
- that we no longer need.
-
-2005-04-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Return -1 on errors
- rather than 0.
- (ppc64_elf_check_relocs): Remove unnecessary SEC_ALLOC check.
-
-2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (assign_section_numbers): Fix a typo.
-
-2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_link_input_bfd): Remove the extra `\n' in
- error message.
- (_bfd_elf_section_already_linked): Likewise.
-
-2005-03-31 Jerome Guitton <guitton at gnat.com>
-
- * config.in: Regenerate.
-
-2005-03-31 Jerome Guitton <guitton at gnat.com>
-
- * config.in (HAVE_DECL_BASENAME): New configure macro.
- * configure.in: Check for basename.
- * configure: Regenerate.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * bfd-in.h (bfd_is_arm_mapping_symbol_name): Rename from
- bfd_elf32_is_arm_mapping_symbol_name.
- * bfd-in2.h: Regenerate.
- * cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename from
- bfd_elf32_is_arm_mapping_symbol_name.
- * elf32-arm.c (elf32_arm_is_target_special_symbol): Rename
- bfd_elf32_is_arm_mapping_symbol_name to bfd_is_arm_mapping_symbol_name.
- (arm_elf_find_function): Likewise.
- (elf32_arm_output_symbol_hook): Likewise.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * bfd-in.h (bfd_elf32_is_arm_mapping_symbol_name): Add prototype.
- * bfd-in2.h: Regenerate.
- * elf32-arm.c (elf32_arm_is_target_special_symbol): Rename call to
- bfd_elf32_is_arm_mapping_symbol_name.
- (elf32_arm_output_symbol_hook): Likewise.
- (arm_elf_find_function): Likewise, and include STT_NOTYPE in test for
- mapping symbols.
- (is_arm_mapping_symbol_name): Function moved from here...
- * cpu-arm.c (bfd_elf32_is_arm_mapping_symbol_name): ...to here, renamed
- and made global.
-
-2005-03-29 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * configure.in: Check for ffs decl and alphabetize.
- * config.in: Regenerate.
- * configure: Regenerate.
- * sysdep.h [NEED_DECLARATION_FFS] (ffs): Prototype and alphabetize.
-
-2005-03-29 Fred Fish <fnf at specifixinc.com>
-
- * dwarf2.c (struct comp_unit): Fix typo.
- (scan_unit_for_functions): Remove unused local variable "name"
- and dead code that set it.
-
-2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
- Phil Blundell <philb at gnu.org>
-
- * bfd-in2.h, libbfd.h: Regenerated.
- * reloc.c: Add ARM TLS relocations.
- * elf32-arm.c (elf32_arm_howto_table): Add dynamic TLS
- relocations.
- (elf32_arm_tls_gd32_howto, elf32_arm_tls_ldo32_howto)
- (elf32_arm_tls_ldm32_howto, elf32_arm_tls_le32_howto)
- (elf32_arm_tls_ie32_howto): New.
- (elf32_arm_howto_from_type): Support TLS relocations.
- (elf32_arm_reloc_map): Likewise.
- (elf32_arm_reloc_type_lookup): Likewise.
- (TCB_SIZE): Define.
- (struct elf32_arm_obj_tdata): New.
- (elf32_arm_tdata, elf32_arm_local_got_tls_type): Define.
- (elf32_arm_mkobject): New function.
- (struct elf32_arm_relocs_copied): Add pc_count.
- (elf32_arm_hash_entry, GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD)
- (GOT_TLS_IE): Define.
- (struct elf32_arm_link_hash_table): Add tls_ldm_got.
- (elf32_arm_link_hash_newfunc): Initialize tls_type.
- (elf32_arm_copy_indirect_symbol): Copy pc_count and tls_type.
- (elf32_arm_link_hash_table_create): Initialize tls_ldm_got.
- (dtpoff_base, tpoff): New functions.
- (elf32_arm_final_link_relocate): Handle TLS relocations.
- (IS_ARM_TLS_RELOC): Define.
- (elf32_arm_relocate_section): Warn about TLS mismatches.
- (elf32_arm_gc_sweep_hook): Handle TLS relocations and pc_count.
- (elf32_arm_check_relocs): Detect invalid symbol indexes. Handle
- TLS relocations and pc_count.
- (elf32_arm_adjust_dynamic_symbol): Check non_got_ref.
- (allocate_dynrelocs): Handle TLS. Bind REL32 relocs to local
- calls.
- (elf32_arm_size_dynamic_sections): Handle TLS.
- (elf32_arm_finish_dynamic_symbol): Likewise.
- (bfd_elf32_mkobject): Define.
-
-2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_check_relocs): Increment count for all
- relocation types. Don't count relocations which will use a PLT.
-
-2005-03-29 Joel Brobecker <brobecker at gnat.com>
-
- * elf.c (elfcore_grok_nto_status): Print tid as long.
- (elfcore_grok_nto_regs): Likewise.
-
-2005-03-29 Joel Brobecker <brobecker at gnat.com>
-
- * irix-core.c: Remove some unnecessary prototypes.
-
-2005-03-28 Joel Brobecker <brobecker at adacore.com>
-
- * irix-core.c: Convert to ISO C.
-
-2005-03-28 Joel Brobecker <brobecker at adacore.com>
-
- * irix-core.c (do_sections): Replace + by | in expression.
- (irix_core_core_file_matches_executable_p): Add ATTRIBUTE_UNUSED
- to unused parameters to avoid a compiler warning.
-
-2005-03-28 Mark Kettenis <kettenis at gnu.org>
-
- * netbsd-core.c: Convert to ISO C. Fix formatting.
-
-2005-03-24 Eric Christopher <echristo at redhat.com>
-
- * elfxx-mips.c: Revert previous patch.
-
-2005-03-24 Nick Clifton <nickc at redhat.com>
-
- * targets.c (_bfd_target_vector): Only include the
- bfd_elf32_ia64_hpux_big_vec vector when building a 64-bit BFD with
- all targets enabled.
-
-2005-03-24 James E Wilson <wilson at specifixinc.com>
-
- * Makefile.am (BFD32_BACKENDS): Delete elf32-ia64.lo.
- (BFD64_BACKENDS): Add elf32-ia64.lo.
- * Makefile.in: Regenerate.
-
-2005-03-23 Eric Christopher <echristo at redhat.com>
-
- * elfxx-mips.c (MIPS_ELF_READONLY_SECTION): New.
- (mips_elf_calculate_relocation): Use. Define DF_TEXTREL
- after emitting relocation.
- (_bfd_mips_elf_adjust_dynamic_symbol): Ditto.
- (_bfd_mips_elf_check_relocs): Remove code to set DF_TEXTREL
- and readonly_reloc.
-
-2005-03-23 Mike Frysinger <vapier at gentoo.org>
- Nick Clifton <nickc at redhat.com>
-
- * config.bfd: Accept any C library to accompany a GNU Linux
- implementation, not just the GNU C library.
- * configure.in: Likewise.
- * configure: Regenerate.
-
-2005-03-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd-in.h (_bfd_elf_provide_symbol): New.
- * bfd-in2.h: Regenerated.
-
- * elf32-ppc.c (set_linker_sym): Moved to elflink.c.
- (ppc_elf_set_sdata_syms): Call _bfd_elf_provide_symbol instead
- of set_linker_sym.
-
- * elflink.c (_bfd_elf_provide_symbol): New. Moved and renamed
- from elf32-ppc.c.
-
-2005-03-22 Hans-Peter Nilsson <hp at axis.com>
-
- * hash.c (strtab_hash_newfunc): Fix typo in allocated size.
-
-2005-03-22 Bob Wilson <bob.wilson at acm.org>
-
- * xtensa-isa.c (xtensa_opcode_lookup, xtensa_state_lookup,
- xtensa_sysreg_lookup_name, xtensa_interface_lookup,
- xtensa_funcUnit_lookup): Skip bsearch call if count is zero.
- (xtensa_opcode_decode): Rearrange code.
-
-2005-03-22 Nick Clifton <nickc at redhat.com>
-
- * binary.c: Convert to ISO C90 formatting.
- * coff-arm.c: Convert to ISO C90 formatting.
- * coffgen.c: Convert to ISO C90 formatting.
- * elf32-gen.c: Convert to ISO C90 formatting.
- * elf64-gen.c: Convert to ISO C90 formatting.
- * hash.c: Convert to ISO C90 formatting.
- * ieee.c: Convert to ISO C90 formatting.
-
-2005-03-22 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): Don't fail for
- unresolved symbols in R_ARM_NONE relocations.
-
-2005-03-22 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): Add
- UNRESOLVED_RELOC_P argument. Set it appropriately.
- (elf32_arm_relocate_section): Update call to
- elf32_arm_final_link_relocate. Don't clobber RELOCATION; use
- unresolved_reloc instead.
-
-2005-03-23 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_add_object_symbols): Set SEC_EXCLUDE on
- .gnu.warning.* sections.
-
-2005-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (elf_linker_section_pointers_t): Remove
- written_address_p.
- (ppc_elf_create_linker_section): Don't try to reuse existing section.
- (elf_create_pointer_linker_section): Delete info parm. Don't make
- h dynamic. Don't set written_address_p.
- (ppc_elf_check_relocs): Adjust ppc_elf_create_linker_section calls.
- (bfd_put_ptr): Delete.
- (elf_finish_pointer_linker_section): Remove output_bfd and info parms.
- Always write section contents. Assert global sym is def_regular.
- Use offset bottom bit as a written flag.
- (ppc_elf_relocate_section): Adjust elf_finish_pointer_linker_section
- calls.
-
-2005-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_set_sdata_syms): New function, extracted from..
- (ppc_elf_set_sdata_syms): ..here. Expand comment. Set .sbss start
- and end syms.
-
-2005-03-21 Nick Clifton <nickc at redhat.com>
-
- * coff-arm.c (coff_link_hash_entry): Only define for non WINCE
- targets.
- (t2a1_bx_pc_insn): Likewise.
- (t2a2_noop_insn): Likewise.
- (t2a3_b_insn): Likewise.
- (t2a1_push_insn): Likewise.
- (t2a2_ldr_insn): Likewise.
- (t2a3_mov_insn): Likewise.
- (t2a4_bx_insn): Likewise.
- (t2a5_pop_insn): Likewise.
- (t2a6_bx_insn): Likewise.
- (coff_arm_relocate_section): Only declare the high_address
- variable for non WINCE targets.
-
-2005-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_add_symbol_hook): Make htab->sbss
- SEC_LINKER_CREATED. Attach to dynobj.
- (ppc_elf_size_dynamic_sections): Strip htab->sbss if zero size.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (struct elf_linker_section): Remove sym_hash and
- sym_offset. Add name, bss_name, sym_name, sym_val.
- (struct ppc_elf_link_hash_table): Remove sdata and sdata2 pointers.
- Add sdata array of elf_linker_section_t.
- (ppc_elf_link_hash_table_create): Set name, sym_name, and bss_name.
- (enum elf_linker_section_enum): Delete.
- (ppc_elf_create_linker_section): Rewrite. Don't create syms here.
- (ppc_elf_check_relocs): Delay ppc_elf_create_linker_section until
- the special sections are needed. Adjust htab->sdata refs.
- Ensure dynobj is set in sreloc code.
- (ppc_elf_size_dynamic_sections): Strip sdata sections.
- (ppc_elf_set_sdata_syms): New function.
- (elf_finish_pointer_linker_section): Use 0x8000 for sym_offset.
- (ppc_elf_relocate_section): Adjust references to htab->sdata. Use
- sym_val instead of sym_hash.
- * elf32-ppc.h (ppc_elf_set_sdata_syms): Declare.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (is_ppc_elf_target): Move to linker part of file.
- (ppc_elf_merge_private_bfd_data): Likewise.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (struct elf_linker_section): Remove rel_section.
- (ppc_elf_create_linker_section): Don't create rel_section.
- (elf_create_pointer_linker_section): Don't size relocs.
- (elf_finish_pointer_linker_section): Remove relative_reloc parm.
- Don't generate relocs.
- (ppc_elf_relocate_section): Adjust calls to
- elf_finish_pointer_linker_section.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (is_ppc_elf_target): New function.
- (ppc_elf_merge_private_bfd_data): Use it rather than just testing
- for bfd_target_elf_flavour. Do this test before endian check.
- (ppc_elf_add_symbol_hook): Use is_pcc_elf_target.
- (ppc_elf_size_dynamic_sections): Likewise.
-
-2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_backend_data): Add int to
- elf_backend_section_from_shdr.
- (bfd_elf_section_data): Update comment for this_idx.
- (_bfd_elf_make_section_from_shdr): Add int.
- * elfxx-mips.h (_bfd_mips_elf_section_from_shdr): Likewise.
-
- * elf.c (_bfd_elf_make_section_from_shdr): Take section index
- and use it to set this_idx in bfd_elf_section_data.
- (bfd_section_from_shdr): Pass shindex to
- _bfd_elf_make_section_from_shdr.
- (_bfd_elf_section_from_bfd_section): Use this_idx in
- bfd_elf_section_data to find section index.
-
- * elf32-arm.c (elf32_arm_section_from_shdr): Take section
- index and pass it to _bfd_elf_make_section_from_shdr.
- * elf32-i370.c(i370_elf_section_from_shdr): Likewise.
- * elf32-ppc.c (ppc_elf_section_from_shdr): Likewise.
- * elf32-sh64.c (sh64_backend_section_from_shdr): Likewise.
- * elf32-v850.c (v850_elf_section_from_shdr): Likewise.
- * elf64-alpha.c (elf64_alpha_section_from_shdr): Likewise.
- * elf64-hppa.c (elf64_hppa_section_from_shdr): Likewise.
- * elf64-x86-64.c (elf64_x86_64_section_from_shdr): Likewise.
- * elfxx-ia64.c (elfNN_ia64_section_from_shdr): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_section_from_shdr): Likewise.
-
-2005-03-19 Danny Smith <dannysmith at users.sourceforge.net>
- Ross Ridge <rridge at csclub.uwaterloo.ca>
-
- * peicode.h (pe_ILF_build_a_bfd): Strip only one prefix
- character in IMPORT_NAME_UNDECORATE and IMPORT_NAME_NOPREFIX
- cases. Add comment.
-
-2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_mark_used_section): Remove check for special
- sections.
-
-2005-03-18 Andreas Schwab <schwab at suse.de>
-
- * elfxx-ia64.c (elfNN_ia64_install_value): Change type of insn
- from bfd_vma to ia64_insn, remove broken cast.
-
-2005-03-18 C Jaiprakash <cjaiprakash at noida.hcltech.com>
-
- * elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e.
- (elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
- elf_m68k_finish_dynamic_sections): Use it.
-
-2005-03-17 Paul Brook <paul at codesourcery.com>
- Dan Jacobowitz <dan at codesourcery.com>
- Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_modify_segment_map): New function.
- (elf32_arm_additional_program_headers): Likewise.
- (elf_backend_modify_segment_map): Define.
- (elf_backend_additional_program_headers): Likewise.
- (elf32_arm_symbian_modify_segment_map): Use
- elf32_arm_modify_segment_map.
-
-2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_mark_used_section): Check bfd_is_const_section
- for special sections.
-
-2005-03-18 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (_bfd_elf_link_renumber_dynsyms): Delete.
- * elflink.c (_bfd_elf_link_renumber_dynsyms): Make static, add
- section_sym_count param, and return number of section symbols.
- (bfd_elf_size_dynamic_sections): Clear section symbol area of
- .dynsym contents. Don't bother calling swap_symbol_out on the
- first all-zero dynsym.
- (elf_mark_used_section): Formatting. Avoid twiddling flags in
- special sections like bfd_abs_section.
- (bfd_elf_gc_sections): Spelling fix.
-
-2005-03-16 Fred Fish <fnf at specifixinc.com>
-
- PR binutils/790
- * dwarf2.c (read_indirect_string): Fix apparent typo, check
- dwarf_str_buffer allocation, not dwarf_abbrev_buffer.
-
-2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_mark_used_section): New.
- (bfd_elf_gc_sections): Call elf_gc_mark_section for
- non-relocatable link if we don't do GC.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
-
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
- * configure: Regenerate.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
-
- * ecoff.c: Convert to ISO C90 formatting.
-
-2005-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c: Divide file into general and linker specific
- functions. Sort linker functions into roughly the order in which
- they are called by the ELF linker code.
-
-2005-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED
- on section. Correct comment, and add FIXME.
- (ppc_elf_additional_program_headers): Don't bump header count for
- interp. Test SEC_ALLOC, not SEC_LOAD, and don't test size.
- (ppc_elf_size_dynamic_sections): Don't strip sdata and sdata2, but
- do allocate memory if they need it.
-
-2005-03-15 Mikkel Krautz <krautz at gmail.com>
-
- * config.bfd (x86_64-elf): Add target.
-
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * po/es.po: Commit new Spanish translation.
-
-2005-03-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Set symbo name
- for global symbol when reporting overflow.
-
-2005-03-11 Jakub Jelinek <jakub at redhat.com>
-
- * libbfd-in.h (_bfd_ar_spacepad): New prototype.
- * libbfd.h: Rebuilt.
- * archive.c (_bfd_ar_spacepad): New function.
- (_bfd_construct_extended_name_table, _bfd_write_archive_contents,
- bsd_write_armap, _bfd_archive_bsd_update_armap_timestamp,
- coff_write_armap): Use it.
- (bfd_ar_hdr_from_filesystem): Likewise. Fix HP-UX large
- uid/gid support.
- * archive64.c (bfd_elf64_archive_write_armap): Use _bfd_ar_spacepad.
-
-2005-03-10 Mark Kettenis <kettenis at gnu.org>
-
- * archive.c (_bfd_look_for_bfd_in_cache): Move declaration of
- has_table to the start of the function.
-
-2005-03-10 Ben Elliston <bje at au.ibm.com>
-
- * archive.c: Include hashtab.h.
- (struct ar_cache): Rename `arelt' to `arbfd' and remove `next'.
- (_bfd_look_for_bfd_in_cache): Reimplement using htab_find.
- (hash_file_ptr): New function.
- (eq_file_ptr): Likewise.
- (_bfd_add_bfd_to_archive_cache): Reimplement using a hash table.
- * libbfd-in.h: Include hashtab.h.
- (struct artdata): Change `cache' member type to htab_t.
- * libbfd.h: Rebuild.
-
-2005-03-08 Daniel Jacobowitz <dan at codesourcery.com>
-
- * configure.in: Bump version to 2.16.90.
- * configure: Regenerated.
-
-2005-03-07 Jakub Jelinek <jakub at redhat.com>
-
- * opncls.c (opncls_bread, opncls_bclose): Fix if pread resp.
- close is a function like macro in system headers.
-
-2005-03-07 Alan Modra <amodra at bigpond.net.au>
-
- PR ld/778
- * elf32-hppa.c (elf32_hppa_create_dynamic_sections): Reinstate
- _GLOBAL_OFFSET_TABLE_ as a normal dynamic symbol.
-
-2005-03-06 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (elfcore_grok_win32pstatus): Warning fixes.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/bfd.pot: Regenerate.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (update_plt_info): Don't mark new ABI call syms
- with is_func.
- (func_desc_adjust): Force dot-syms local in executables as well
- as shared libs.
-
-2005-03-04 David Daney <ddaney at avtrex.com>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Handle special
- '__gnu_local_gp' symbol used by gas -mno-shared.
-
-2005-03-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (elf_backend_data): Add "const char *" to
- elf_backend_section_from_phdr.
-
- * elf.c (bfd_section_from_phdr): Pass "proc" to the
- elf_backend_section_from_phdr hook.
-
-2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
- Joseph Myers <joseph at codesourcery.com>
-
- * elfxx-mips.c (struct mips_got_entry): Add tls_type.
- (struct mips_got_info): Add tls_gotno, tls_assigned_gotno,
- and tls_ldm_offset.
- (struct mips_elf_got_per_bfd_arg): Add global_count.
- (struct mips_elf_count_tls_arg): New.
- (struct mips_elf_hash_sort_data): Update comment for min_got_dynindx.
- (struct mips_elf_link_hash_entry): Add tls_type and tls_got_offset.
- (GOT_NORMAL, GOT_TLS_GD, GOT_TLS_LDM, GOT_TLS_IE)
- (GOT_TLS_OFFSET_DONE, GOT_TLS_DONE): Define.
- (TLS_RELOC_P): Define.
- (TP_OFFSET, DTP_OFFSET): Define.
- (dtprel_base, tprel_base): New functions.
- (mips_elf_link_hash_newfunc): Initialize tls_type.
- (mips_elf_got_entry_hash, mips_elf_got_entry_eq)
- (mips_elf_multi_got_entry_hash, mips_elf_multi_got_entry_eq): Handle
- TLS entries.
- (mips_tls_got_relocs, mips_elf_count_local_tls_relocs)
- (mips_elf_count_global_tls_entries, mips_elf_count_global_tls_relocs)
- (mips_elf_output_dynamic_relocation, mips_elf_initialize_tls_slots)
- (mips_tls_got_index): New functions.
- (mips_elf_local_got_index): Add new R_SYMNDX, H, and R_TYPE
- arguments. Pass them to mips_elf_create_local_got_entry. Use
- mips_tls_got_index.
- (mips_elf_global_got_index): Add new R_TYPE and INFO arguments.
- Handle TLS entries.
- (mips_elf_got_page, mips_elf_got16_entry): Update calls to
- mips_elf_create_local_got_entry.
- (mips_elf_create_local_got_entry): Add new R_SYMNDX, H, and R_TYPE
- arguments. Handle TLS entries.
- (mips_elf_sort_hash_table_f): Add non-TLS assertions.
- (mips_elf_record_local_got_symbol): Add new TLS_FLAG argument. Handle
- TLS entries.
- (mips_elf_record_global_got_symbol): Likewise.
- (mips_elf_make_got_per_bfd): Initialize new mips_got_info members.
- Count TLS entries.
- (mips_elf_merge_gots): Handle TLS entries when merging.
- (mips_elf_initialize_tls_index): New function.
- (mips_elf_set_global_got_offset): Handle TLS entries.
- (mips_elf_adjust_gp): Handle TLS.
- (mips_elf_multi_got): Remove redundant call to
- mips_elf_resolve_final_got_entries. Initialize global_count.
- Correct a comment. Initialize new TLS members of mips_got_info.
- Assign TLS GOT indexes for new GOTs.
- (mips_elf_create_got_section): Initialize new TLS members of
- mips_got_info.
- (mips_elf_calculate_relocation): Handle TLS relocs.
- (_bfd_mips_elf_check_relocs): Likewise. Update calls to changed
- functions.
- (_bfd_mips_elf_always_size_sections): Handle TLS.
- (_bfd_mips_elf_size_dynamic_sections): Likewise.
- (_bfd_mips_elf_finish_dynamic_symbol): Likewise. Update calls to
- changed functions.
- (_bfd_mips_elf_copy_indirect_symbol): Copy tls_type.
- (_bfd_mips_elf_hide_symbol): Handle TLS.
- * elfn32-mips.c (elf_mips_howto_table_rel, elf_mips_howto_table_rela)
- (mips_reloc_map): Add TLS relocs.
- * elf32-mips.c (elf_mips_howto_table_rel, mips_reloc_map): Likewise.
- * elf64-mips.c (mips_elf64_howto_table_rel)
- (mips_elf64_howto_table_rela, mips_reloc_map): Likewise.
- * reloc.c: Define new MIPS TLS relocations.
- * libbfd.h, bfd-in2.h: Regenerated.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * Makefile.am: Add dependency of cache.o on libiberty.h.
- * cache.c: Include libiberty.h.
- (bfd_open_file): Use unlink_if_ordinary instead of unlink.
-
-2005-03-01 Zack Weinberg <zack at codesourcery.com>
-
- * elf.c (bfd_section_from_shdr <default case>): Call
- elf_backend_section_from_shdr hook unconditionally, and return
- what it returns.
- (bfd_section_from_phdr): Similarly, for elf_backend_section_from_phdr.
- * elfxx-target.h (elf_backend_section_from_shdr)
- (elf_backend_section_from_phdr): Default to
- _bfd_elf_make_section_from_shdr and _bfd_elf_make_section_from_phdr
- respectively.
-
-2005-03-01 Alan Modra <amodra at bigpond.net.au>
-
- * targets.h: Typo fix.
- * bfd-in2.h: Regenerate.
-
- * bout.c (b_out_write_object_contents): Don't use sizeof on host
- structs to size on-disk structures.
- (b_out_set_section_contents): Size the external struct, not the
- internal one for on-disk size.
- (b_out_sizeof_headers): Likewise.
-
-2005-03-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_size_stubs): Override defined dot-sym
- entry points with the func descriptor as well as undefweak.
-
-2005-02-28 Ross Ridge <rridge at csclub.uwaterloo.ca>
-
- * peicode.h (pe_ILF_build_a_bfd): Do not assume that an @ will be
- present when IMPORT_NAME_UNDOECRATE is used.
-
-2005-02-28 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 757
- * elf-bfd.h (_bfd_elf_merge_symbol): Add a pointer to unsigned
- int.
-
- * elf32-sh-symbian.c (sh_symbian_relocate_section): Pass NULL
- to _bfd_elf_merge_symbol.
-
- * elflink.c (_bfd_elf_merge_symbol): Use the pointer to
- unsigned int to return the alignment of the old common symbol
- in the dynamic object.
- (_bfd_elf_add_default_symbol): Pass NULL to
- _bfd_elf_merge_symbol.
- (elf_link_add_object_symbols): Pass &old_alignment to
- _bfd_elf_merge_symbol. Get the alignment of the new common
- symbol in the dynamic object.
-
-2005-02-24 Ben Elliston <bje at au.ibm.com>
-
- * coffcode.h (coff_sym_filepos): Remove GNU960 conditional code.
- * format.c (bfd_check_format_matches): Likewise.
- * archive.c (BFD_GNU960_ARMAG): Likewise.
- (bfd_generic_archive_p): Likewise.
- (_bfd_write_archive_contents): Likewise.
-
-2005-02-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.95.
- * configure: Regenerate.
-
-2005-02-24 Julian Brown <julian at sirius.codesourcery.com>
-
- * elflink.c (elf_link_add_object_symbols): Force symbols in discarded
- COMDAT group sections to have default visibility.
-
-2005-02-24 Alan Modra <amodra at bigpond.net.au>
-
- * coffcode.h (coff_print_aux): Warning fix.
- * elf-m10300.c (mn10300_elf_relax_section): Use section->id
- instead of section pointer to identify.
- * coff-h8300.c (h8300_reloc16_extra_cases): Likewise. Allocate
- the correct size buffer for local sym mangling too.
- (h8300_bfd_link_add_symbols): Likewise.
- * elf32-sh-symbian.c (sh_symbian_process_embedded_commands): Fix
- warning.
- * elf32-sh64.c (shmedia_prepare_reloc): Use %B and %p in error message
- * elf32-xtensa.c (literal_value_hash): Warning fix.
- * versados.c (process_otr): Warning fix.
- (versados_canonicalize_reloc): Likewise.
- * vms-gsd.c (_bfd_vms_slurp_gsd): Warning fix.
- * vms.c (fill_section_ptr): Warning fix.
-
-2005-02-23 H.J. Lu <hongjiu.lu at intel.com>
-
- * coff-tic54x.c (SWAP_OUT_RELOC_EXTRA): Defined.
- * coff-tic80.c (SWAP_OUT_RELOC_EXTRA): Likewise.
-
-2005-02-23 Nick Clifton <nickc at redhat.com>
-
- * elfxx-mips.c (mips_elf_create_dynamic_relocation): Initialise
- the relvaddr field of the Elf32_crinfo structure.
-
- * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Initialise
- variables that are passed by reference to
- m68hc11_get_relocation_value in case that function does not
- initialise them.
-
- * elf32-cr16c.c (cr16c_elf_final_link_relocate): Remove duplicated
- return statements and replace with a single return at the end of
- the function. This helps pacify the flow analysis code in gcc 4.0.
-
- * elf.c (_bfd_elf_compute_section_file_positions): Initialise
- strtab to avoid compile time warning.
-
-2005-02-23 Ben Elliston <bje at au.ibm.com>
-
- * opncls.c (bfd_zalloc): Document this function.
-
-2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * coffcode.h (sec_to_styp_flags): Replaced SEC_CLINK with
- SEC_TIC54X_CLINK. Replace SEC_BLOCK with SEC_TIC54X_BLOCK.
- Replace SEC_SHARED with SEC_COFF_SHARED.
- (styp_to_sec_flags): Likewise.
-
- * elfxx-target.h (TARGET_BIG_SYM): Remove SEC_ARCH_BIT_0.
- (TARGET_LITTLE_SYM): Likewise.
-
- * section.c (SEC_ARCH_BIT_0): Removed.
- (SEC_LINK_DUPLICATES_SAME_CONTENTS): Defined with
- SEC_LINK_DUPLICATES_ONE_ONLY and SEC_LINK_DUPLICATES_SAME_SIZE.
- (SEC_SHARED): Renamed to ...
- (SEC_COFF_SHARED): This.
- (SEC_BLOCK): Renamed to ...
- (SEC_TIC54X_BLOCK): This.
- (SEC_CLINK): Renamed to ...
- (SEC_TIC54X_CLINK): This.
- (SEC_XXX): Rearranged. Move SEC_COFF_SHARED_LIBRARY,
- SEC_COFF_SHARED, SEC_TIC54X_BLOCK and SEC_TIC54X_CLINK to the
- end.
- * bfd-in2.h: Regenerated.
-
-2005-02-21 Fred Fish <fnf at specifixinc.com>
-
- * dwarf2.c (find_abstract_instance_name): Call recursively
- to handle a DW_AT_specification.
-
-2005-02-21 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * elfxx-mips.c (ecoff_swap_rpdr_out, mips_elf_output_extsym,
- mips_elf_create_dynamic_relocation,
- _bfd_mips_elf_size_dynamic_sections, _bfd_mips_elf_final_link):
- Remove #if 0'd code.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
+ * section.c (struct section_hash_entry): Move to..
+ * libbfd-in.h: ..here.
* Makefile.am: Run "make dep-am"
* Makefile.in: Regenerate.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * coffgen.c (bfd_coff_get_comdat_section): Check that
- coff_section_data isn't NULL.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * bfd-in.h (bfd_elf_bfd_from_remote_memory): Warning fix.
- * coff-m68k.c (bfd_m68k_coff_create_embedded_relocs): Likewise.
- * coff-rs6000.c (xcoff_write_armap_big): Warning fixes. Remove
- useless assignments.
- (xcoff_write_archive_contents_big): Likewise.
- (_bfd_xcoff_put_ldsymbol_name): Likewise.
- * coff64-rs6000.c (_bfd_xcoff64_put_ldsymbol_name): Likewise.
- * coffgen.c (coff_write_symbols): Make "written" a bfd_vma.
- * cofflink.c (process_embedded_commands): Warning fixes.
- * cpu-arm.c: Delete unnecessary prototypes. Convert to C90.
- Warning fixes.
- * dwarf2.c: Warning fixes.
- * elf-bfd.h: Likewise.
- * elf-eh-frame.c: Likewise.
- * elf-strtab.c: Likewise.
- * elf.c: Likewise.
- * elf32-m68k.c: Likewise.
- * elf32-ppc.c: Likewise.
- * elf32-sh-symbian.c: Likewise.
- * elf32-sh.c: Delete unnecessary prototypes. Warning fixes.
- * elf64-sh64.c: Likewise.
- * peicode.h: Likewise.
- * elf64-mmix.c: Warning fixes.
- * elfcode.h: Likewise.
- * elfxx-mips.c: Likewise.
- * libbfd-in.h: Likewise.
- * libbfd.c: Likewise.
- * mach-o.c: Likewise.
- * merge.c: Likewise.
- * mmo.c: Likewise.
- * opncls.c: Likewise.
- * pef.c: Likewise.
- * srec.c: Likewise.
- * vms-hdr.c: Likewise.
- * vms-tir.c: Likewise.
- * xtensa-isa.c: Likewise.
- * xtensa-modules.c: Likewise.
- * xsym.c: Likewise.
- (pstrcmp): Use correct choice of string lengths. Fix return value.
- (bfd_sym_module_name): Correct string length.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
+ * libcoff.h: Regenerate.
-2005-02-17 Alexandre Oliva <aoliva at redhat.com>
+2006-03-16 Alan Modra <amodra at bigpond.net.au>
- * elf32-frv.c (elf32_frv_relocate_section): Remove warning from
- uninitialized check_segment[1] in TLSMOFF case.
- Reported by Alan Modra.
- (elf32_frv_relocate_section): Improve errors and warnings.
+ * elf32-ppc.c (ppc_elf_check_relocs): REL24 and REL14 relocs
+ against __GLOBAL_OFFSET_TABLE__ need never be dynamic. Tweak
+ last change to REL32 relocs so that they are counted as
+ possibly dynamic as per REL24 and REL14.
-2005-02-17 Alan Modra <amodra at bigpond.net.au>
+2006-03-16 Alan Modra <amodra at bigpond.net.au>
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Fix warning.
+ * elf32-ppc.c (ppc_elf_check_relocs): Don't fall into REL24
+ checks from REL32.
-2005-02-16 Alan Modra <amodra at bigpond.net.au>
+2006-03-15 Ben Elliston <bje at au.ibm.com>
- * coff-arm.c (coff_arm_is_local_label_name): Warning fix.
- * elf32-frv.c (frvfdpic_relocs_info_hash): Likewise.
- * pef.c (bfd_pef_scan): Don't ignore return value of
- bfd_pef_scan_start_address.
- * mach-o.c (bfd_mach_o_scan): Don't ignore return value of
- bfd_mach_o_scan_start_address.
- * elfxx-ia64.c (elfNN_ia64_relax_brl): Rewrite for 32-bit bfd_vma.
- * elfxx-mips.c: Remove unnecessary prototypes.
- (sort_dynamic_relocs_64): Abort if not BFD64.
+ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Iterate over all
+ in_list elements, not just the first.
+
+2006-03-14 Richard Sandiford <richard at codesourcery.com>
-2005-02-16 Alan Modra <amodra at bigpond.net.au>
+ * elf32-mips.c (mips_elf_adjust_addend): New function, mostly split
+ out from...
+ (_bfd_mips_elf_relocate_section): ...here. Use it to adjust r_addend
+ for final links too.
- * elf64-ppc.c (ppc64_elf_edit_toc): Skip toc if size is zero.
- Skip toc reloc adjust if reloc_count is zero.
+2006-03-13 Richard Sandiford <richard at codesourcery.com>
-2005-02-15 Nigel Stephens <nigel at mips.com>
- Maciej W. Rozycki <macro at mips.com>
+ * elfxx-mips.c (mips_elf_create_got_section): Initialize hgot.
- * elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
- reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
- R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
- (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
- (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
- dst_mask.
- (mips16_gprel_reloc): Remove bit shuffling; call
- _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
- and _bfd_mips16_elf_reloc_shuffle() instead.
- (mips16_reloc_map): New reloc map for MIPS16 relocs.
- (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
- relocs.
- (mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from
- elf_mips16_howto_table_rel.
- * elf64-mips.c (mips16_elf64_howto_table_rel): New array for
- MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16
- relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
- (elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel.
- (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
- dst_mask.
- (mips16_elf64_howto_table_rela): New array for MIPS16 RELA
- reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and
- R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16
- placeholders.
- (mips16_gprel_reloc): Remove bit shuffling; call
- _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
- and _bfd_mips16_elf_reloc_shuffle() instead.
- (mips16_reloc_map): New reloc map for MIPS16 relocs.
- (bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
- relocs.
- (mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from
- mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel.
- * elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
- REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
- R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
- (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
- (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
- dst_mask.
- (mips16_gprel_reloc): Remove bit shuffling; call
- _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
- and _bfd_mips16_elf_reloc_shuffle() instead.
- (mips16_reloc_map): New reloc map for MIPS16 relocs.
- (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
- relocs.
- (mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from
- elf_mips16_howto_table_rela or elf_mips16_howto_table_rel.
- * elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to
- handle bit shuffling for MIPS16 relocs.
- (_bfd_mips16_elf_reloc_shuffle): Likewise.
- (_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle()
- and _bfd_mips16_elf_reloc_shuffle().
- (_bfd_mips_elf_generic_reloc): Likewise.
- (mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16
- and R_MIPS16_LO16.
- (mips_elf_obtain_contents): Remove bit shuffling.
- (mips_elf_perform_relocation): Likewise; call
- _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle()
- instead.
- (_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16
- and R_MIPS16_LO16.
- * elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare.
- (_bfd_mips16_elf_reloc_shuffle): Likewise.
- * reloc.c (BFD_RELOC_MIPS16_HI16): New reloc.
- (BFD_RELOC_MIPS16_HI16_S): Likewise.
- (BFD_RELOC_MIPS16_LO16): Likewise.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
+2006-03-11 H.J. Lu <hongjiu.lu at intel.com>
-2005-02-15 Jan Beulich <jbeulich at novell.com>
+ PR ld/2443
+ * dwarf2.c (concat_filename): Don't issue an error if file is
+ 0.
- * elfxx-ia64.c (ia64_howto_table): Correct strings for
- R_IA64_DTPMOD64[LM]SB.
+2006-03-10 Paul Brook <paul at codesourcery.com>
-2005-02-14 H.J. Lu <hongjiu.lu at intel.com>
+ * elf32-arm.c (INTERWORK_FLAG): Handle EABIv5.
+ (elf32_arm_print_private_bfd_data): Ditto.
- * elfxx-ia64.c (elfNN_ia64_relax_section): Allow relax
- backward branch in the same section.
- (elfNN_ia64_relocate_section): Inform users that the input
- section is too big to relax br instruction when overflow
- happens to R_IA64_PCREL21B, R_IA64_PCREL21BI, R_IA64_PCREL21M
- and R_IA64_PCREL21F.
+2006-03-09 Paul Brook <paul at codesourcery.com>
-2005-02-14 Orjan Friberg <orjanf at axis.com>
+ * cpu-arm.c (bfd_is_arm_mapping_symbol_name): Recognise additional
+ mapping symbols.
- * elfcore.h (elf_core_file_p): Move the call to
- elf_backend_object_p to allow the correct machine to be set before
- processing the program headers.
+2006-03-09 Khem Raj <khem at mvista.com>
-2005-02-14 Nick Clifton <nickc at redhat.com>
+ * elf32-arm.c(elf32_arm_finish_dynamic_sections): Use unsigned
+ char type.
- PR binutils/716
- * peicode.h (pe_bfd_copy_private_bfd_data): Copy the large address
- aware flag from the input bfd to the output bfd.
+2006-03-08 H.J. Lu <hongjiu.lu at intel.com>
-2005-02-11 Maciej W. Rozycki <macro at mips.com>
+ * elfxx-ia64.c (elfNN_ia64_choose_gp): Properly choose gp.
- * elf32-mips.c (_bfd_mips_elf32_gprel16_reloc): Reject
- R_MIPS_LITERAL relocations for external symbols.
- * elf64-mips.c (mips_elf64_literal_reloc): Likewise.
- * elfn32-mips.c (mips_elf_literal_reloc): Likewise.
+2006-03-07 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
+ Paul Brook <paul at codesourcery.com>
+ Ricardo Anguiano <anguiano at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd-in2.h: Rebuilt.
-
-2005-02-11 Paul Brook <paul at codesourcery.com>
-
- * elf-bfd.h (struct elf_link_hash_table): Add
- is_relocatable_executable.
- * elf.c (_bfd_elf_link_hash_table_init): Initialize it.
- * elflink.c (bfd_elf_link_record_dynamic_symbol): Create local dynamic
- symbols in relocatable executables.
- (bfd_elf_record_link_assignment): Create dynamic section symbols in
- relocatable executables.
- (_bfd_elf_link_renumber_dynsyms): Ditto.
- (bfd_elf_final_link): Ditto.
- * elf32-arm.c (elf32_arm_final_link_relocate): Copy absolute
- relocations into relocatable executables.
- (elf32_arm_check_relocs): Crate dynamic sections for relocatable
- executables. Also copy absolute relocations.
- (elf32_arm_adjust_dynamic_symbol): Don't create copy relocations
- in relocatable executables.
- (allocate_dynrelocs): Copy relocations for relocatable executables.
- Output dynamic symbols for symbols defined in linker scripts.
-
-2005-02-11 Nick Clifton <nickc at redhat.com>
-
- * libbfd.c (read_signed_leb128): Use an unsigned type for 'shift'
- to avoid a compile time warning.
-
- * coff-alpha.c (alpha_adjust_reloc_in): Remove redundant test from
- BFD_ASSERT.
-
- * coff-tic4x.c (coff_rtype_to_howto): Move definition before
- inclusion of coffcode.h so that it is actually picked up.
-
- * coffcode.h (coff_std_swap_table): Add an unused attribute in
- case it is not used.
-
- * elf32-ip2k.c (ip2k_call_opcode, IS_CALL_OPCODE): Remove unused
- structure and macro.
-
- * elf32-iq2000.c (iq2000_reloc_map): Remove unused structure and
- array.
-
- * elf32-m32r.c (m32r_reloc_map_old): Use #ifdef USE_M32R_OLD_RELOC
- to protect the declaration of this array.
-
- * xsym.c (bfd_sym_parse_contained_variables_table_entry_v32):
- Avoid call to memcpy with a size of 0.
-
-2005-02-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (toc_adjusting_stub_needed): Return true for
- old-style branches to undefined dot-symbols which will be
- satisfied by a plt call.
-
-2005-02-11 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (move_plt_plist): New function, extracted from..
- (ppc64_elf_copy_indirect_symbol): ..here.
- (func_desc_adjust): Use move_plt_plist.
-
-2005-02-10 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): Handle R_ARM_THM_PC9.
-
-2005-02-10 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (bfd_elf_record_link_assignment): Make hidden and internal
- symbols local.
- (elf_link_renumber_hash_table_dynsyms): Ignore local symbols.
- (elf_link_renumber_local_hash_table_dynsyms): New function.
- (_bfd_elf_link_renumber_dynsyms): Number local dynamic symbols.
-
-2005-02-10 Jakub Jelinek <jakub at redhat.com>
-
- * bfd-in.h (BFD_LINKER_CREATED): Define.
- * bfd-in2.h: Rebuilt.
- * elflink.c (bfd_elf_size_dynamic_sections): Disregard
- BFD_LINKER_CREATED bfds when determining input bfds without
- .note.GNU-stack section.
-
-2005-02-10 Maciej W. Rozycki <macro at mips.com>
-
- * elf64-mips.c (mips16_gprel_reloc): Update a comment.
- * elfn32-mips.c (mips16_gprel_reloc): Keep R_MIPS16_GPREL
- relocations against external symbols unchanged.
-
-2005-02-08 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (elf_link_input_bfd): Ignore symbols from null input
- sections.
-
-2005-02-08 Hans-Peter Nilsson <hp at axis.com>
-
- * elflink.c (elf_link_add_object_symbols): Don't add "warning: "
- prefix here.
-
-2005-02-07 Maciej W. Rozycki <macro at mips.com>
-
- * elf64-mips.c: Fix formatting throughout.
-
-2005-02-07 Maciej W. Rozycki <macro at mips.com>
-
- * elfn32-mips.c (elf_mips_howto_table_rela): Fix a comment typo.
-
-2005-02-07 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (FRVFDPIC_SYM_LOCAL): Remove special handling for
- *ABS*/*UND* sections.
- (elf32_frv_relocate_section): Move zero-addend-required error...
- (_frv_emit_got_relocs_plt_entries): ... here. Report error for
- missing needed TLS section.
-
-2005-02-07 Hans-Peter Nilsson <hp at axis.com>
-
- * aoutx.h (NAME(aout,find_nearest_line)): Correct case for N_SO
- being the last symbol.
- (aout_link_add_symbols): Just return TRUE if a warning
- symbol was last.
-
-2005-02-07 Maciej W. Rozycki <macro at mips.com>
-
- * elf32-mips.c (mips_elf_gprel32_reloc): Reject
- R_MIPS_GPREL32 relocations against external symbols.
- * elf64-mips.c (mips_elf64_gprel32_reloc): Replace an incorrect
- comment.
-
-2005-02-07 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (elf_string_from_elf_strtab): Delete macro.
- * elf.c (bfd_elf_string_from_elf_section): Expand occurrence of
- elf_string_from_elf_strtab.
- (_bfd_elf_setup_group_pointers, bfd_section_from_shdr): Likewise.
- (bfd_section_from_shdr): For SHT_SYMTAB, load SHT_SYMTAB_SHNDX too
- if it exists. Don't do the reverse for SHT_SYMTAB_SHNDX. For
- SHT_STRTAB, check whether the strtab is for symtab or dynsymtab by
- looking at cached symtab info first, before iterating over headers.
- For SHT_REL and SHT_RELA, load dynsymtab if needed.
- * elfcode.h (elf_object_p): Don't load section header stringtab
- specially.
-
-2005-02-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-i386.c (elf_i386_relocate_section): Disallow R_386_GOTOFF
- against protected function when building shared library.
-
- PR 584
- * elf64-x86-64.c (is_32bit_relative_branch): New.
- (elf64_x86_64_relocate_section): Alllow R_X86_64_PC32 on a
- protected function symbol when building shared library for
- 32bit relative branch instruction.
-
-2005-02-06 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (add_symbol_adjust): Don't create fake descriptor
- syms when doing a relocatable link.
- (ppc64_elf_gc_mark_hook): Check that syms are defined before looking
- at u.def.section.
- (ppc64_elf_tls_setup): Likewise.
- (ppc64_elf_edit_opd): Don't use an undefined func desc sym.
-
-2005-02-04 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc_link_hash_entry): Add "fake".
- (link_hash_newfunc): Clear all locals using memset.
- (make_fdh): Remove flags param. Always create fake func desc
- weak. Link the descriptor with the code entry sym.
- (ppc64_elf_archive_symbol_lookup): Don't return fake syms.
- (add_symbol_adjust): Adjust make_fdh call.
- (func_desc_adjust): Likewise. Twiddle any pre-existing fake
- descriptor to strong undefined if code entry is strong.
-
-2005-02-04 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (bfd_elf_record_link_assignment): Do "provide" symbol
- lookup here. Set to new before calling bfd_link_repair_undef_list.
- (elf_smash_syms): Check that u.undef.weak isn't the not_needed bfd.
-
-2005-02-03 Alan Modra <amodra at bigpond.net.au>
-
- * linker.c (_bfd_link_hash_newfunc): Set all local fields.
-
-2005-02-03 Alan Modra <amodra at bigpond.net.au>
-
- * linker.c (_bfd_generic_link_add_one_symbol): Set u.undef.weak.
- * elflink.c (elf_smash_syms): Restore symbols that were undefweak
- before the as-needed lib was loaded. Abort on unexpected refs.
-
-2005-02-02 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_smash_syms): Expand comments.
- (elf_link_add_object_symbols): Only call elf_smash_syms for
- as-needed dynamic objects.
-
- * elfxx-ia64.c (elfNN_ia64_new_elf_hash_entry): Don't clear
- everything, just the field specific to ia64.
- * elf64-hppa.c (elf64_hppa_new_dyn_hash_entry): Likewise.
-
-2005-02-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (func_desc_adjust): Move code creating func desc sym to..
- (make_fdh): ..here. New function. Don't set BSF_OBJECT for
- undefined syms.
- (struct add_symbol_adjust_data): New.
- (add_symbol_adjust): Make an undefweak func desc for old ABI
- objects to link with --as-needed shared libs. Return fail status.
- Don't adjust old ABI func entry sym to weak if func desc syms
- isn't defined.
- (ppc64_elf_check_directives): Adjust call to add_symbol_adjust,
- and return status.
-
-2005-02-01 Hans-Peter Nilsson <hp at axis.com>
-
- * cpu-cris.c (get_compatible): Rearrange disabled code and comment
- for clarity.
-
-2005-02-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_check_directives): Move undefs list fixup..
- * linker.c (bfd_link_repair_undef_list): ..to new function, but don't
- remove anything but new and undefweak.
- * elflink.c (_bfd_elf_link_create_dynamic_sections): Override any
- existing _DYNAMIC.
- (_bfd_elf_create_dynamic_sections): Formatting.
- (bfd_elf_record_link_assignment): Call bfd_link_repair_undef_list.
- (_bfd_elf_merge_symbol): Don't handle as-needed syms here.
- (struct elf_smash_data): New.
- (elf_smash_syms): New function.
- (elf_link_add_object_symbols): Call elf_smash_syms. Don't add
- unneeded dynamic objects to loaded list.
- (elf_link_output_extsym): Don't handle as-needed here. Strip
- bfd_link_hash_new symbols.
- * elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't
- delref when dynindx is already -1.
- * elf64-alpha.c (elf64_alpha_output_extsym): Strip bfd_link_hash_new
- symbols.
- * elfxx-mips.c (mips_elf_output_extsym): Likewise.
-
-2005-02-01 Ben Elliston <bje at au.ibm.com>
-
- * elfxx-target.h (bfd_elfNN_bfd_discard_group): Redefine.
-
-2005-02-01 Ben Elliston <bje at au.ibm.com>
-
- * aout-arm.c, aout-target.h, aoutx.h, archive.c, armnetbsd.c,
- bfd-in.h, bfdio.c, coff-alpha.c, coff-arm.c, coff-h8300.c,
- coff-i860.c, coff-mcore.c, coff-or32.c, coff-ppc.c, coff-sh.c,
- coff-sparc.c, coffcode.h, coffgen.c, cofflink.c, cpu-cris.c,
- cpu-h8500.c, cpu-ns32k.c, ecoff.c, ecofflink.c, elf.c,
- elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-hppa.c,
- elf32-i860.c, elf32-ip2k.c, elf32-m32r.c, elf32-sh.c,
- elf32-v850.c, elf64-mips.c, elf64-sparc.c, elflink.c,
- i386aout.c, i386msdos.c, i386os9k.c, ieee.c, mach-o.c,
- nlm32-sparc.c, oasys.c, opncls.c, pdp11.c, pe-mips.c, peXXigen.c,
- pef.c, peicode.h, reloc.c, riscix.c, section.c, simple.c, som.c,
- sparclynx.c, targets.c, vms-misc.c, vms-tir.c, xsym.c,
- hosts/delta68.h, hosts/vaxbsd.h: Remove #if 0'd code
- throughout. Similarly, collapse #if 1'd code.
-
-2005-02-01 Ben Elliston <bje at au.ibm.com>
-
- * elf-bfd.h (bfd_elf_discard_group): Remove.
- * elf.c (bfd_elf_discard_group): Likewise.
- * elfxx-target.h (bfd_elfNN_bfd_discard_group): Remove macro.
-
-2005-01-31 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-bfd.h (elf_backend_data): Add elf_backend_eh_frame_address_size.
- (_bfd_elf_eh_frame_address_size): Declare.
- * elfxx-target.h (elf_backend_eh_frame_address_size): Define a default.
- (elfNN_bed): Initialize elf_backend_eh_frame_address_size.
- * elfxx-mips.h (_bfd_mips_elf_eh_frame_address_size): Declare.
- (elf_backend_eh_frame_address_size): Define.
- * elfxx-mips.c (_bfd_mips_elf_eh_frame_address_size): New function.
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Get the address
- size from the new backend hook.
- (_bfd_elf_write_section_eh_frame): Likewise.
- (_bfd_elf_eh_frame_address_size): New function.
-
-2005-01-31 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4.
-
-2005-01-31 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_symbian_special_sections): Do not set
- SHF_WRITE for .init_array, .fini_array, and .preinit_array.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * confg.bfd: Make targets scheduled for obsoletion (m68k-lynxos,
- sparc-lynxos, vax-vms) be obsolete.
-
-2005-01-28 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf-bfd.h (struct elf_backend_data): Add minpagesize.
- * elf32-arm.c (ELF_MINPAGESIZE): Define.
- * elf32-ppc.c (ELF_MINPAGESIZE): Define.
- * elfcode.h (elf_object_p): Use minpagesize instead of
- maxpagesize.
- * elfxx-target.h (ELF_MINPAGESIZE): Default to ELF_MAXPAGESIZE.
- (elfNN_bed): Include ELF_MINPAGESIZE.
-
-2005-01-28 Julian Brown <julian at codesourcery.com>
-
- * bin-in.h (bfd_elf32_arm_set_target_relocs): Update prototype.
- * bin-in2.h (bfd_elf32_arm_set_target_relocs): Update prototype.
- * elf32-arm.c (elf32_arm_link_hash_table): Add fix_v4bx flag.
- (bfd_elf32_arm_set_target_relocs): Add formal parameter fix_v4bx for
- passing flag value from ld. Set flag value in global hash table entry.
- (elf32_arm_final_link_relocate): Add code to implement R_ARM_V4BX
- relocation.
-
-2005-01-27 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4 change.
-
-2005-01-25 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf_backend_default_use_rela_p): Define to zero for
- SymbianOS.
-
-2005-01-25 Alexandre Oliva <aoliva at redhat.com>
-
- 2004-12-10 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_relocate_section): Force local binding
- for TLSMOFF.
- * reloc.c: Add R_FRV_TLSMOFF.
- * elf32-frv.c (elf32_frv_howto_table): Likewise.
- (frv_reloc_map, frv_reloc_type_lookup): Map it.
- (elf32_frv_relocate_section): Handle it.
- (elf32_frv_check_relocs): Likewise.
- * libbfd.h, bfd-in2.h: Rebuilt.
- 2004-11-26 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
- when given an undefweak TLS symbol. Fix constant TLS PLT entries
- such that they return the constant in gr9.
- (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
- symbols.
- (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
- too, such that they shrink on relaxation.
- (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
- marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
- (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
- if we can guarantee the use of 16-bit constants.
- 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
- Introduce TLS support for FR-V FDPIC.
- * reloc.c: Add TLS relocations.
- * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
- (elf32_frv_rel_tlsdesc_value_howto): New.
- (elf32_frv_rel_tlsoff_howto): New.
- (frv_reloc_map): Add new mappings.
- (struct frvfdpic_elf_link_hash_table): Add pointer to summary
- reloc information.
- (frvfdpic_dynamic_got_plt_info): New.
- (frvfdpic_plt_tls_ret_offset): New.
- (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
- (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members.
- (struct _frvfdpic_dynamic_got_plt_info): Likewise.
- (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
- section as local.
- (struct frvfdpic_relocs_info): Add TLS fields.
- (frvfdpic_relocs_info_hash): Warning clean up.
- (frvfdpic_relocs_info_find): Initialize tlsplt_entry.
- (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
- (FRVFDPIC_TLS_BIAS): Define.
- (tls_biased_base): New.
- (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
- relocations.
- (frv_reloc_type_lookup): Likewise.
- (frvfdpic_info_to_howto_rel): Likewise.
- (elf32_frv_relocate_section): Likewise.
- (_frv_create_got_section): Create the PLT section here.
- (elf32_frvfdpic_create_dynamic_sections): Not here.
- (_frvfdpic_count_nontls_entries): Move out of...
- (_frvfdpic_count_got_plt_entries): ... here.
- (_frvfdpic_count_tls_entries): Likewise. Add TLS support.
- (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation
- support.
- (_frvfdpic_relax_tls_entries): New.
- (_frvfdpic_compute_got_alloc_data): Add TLS support.
- (_frvfdpic_get_tlsdesc_entry): New.
- (_frvfdpic_assign_got_entries): Add TLS support.
- (_frvfdpic_assign_plt_entries): Likewise.
- (_frvfdpic_reset_got_plt_entries): New.
- (_frvfdpic_size_got_plt): Move out of...
- (elf32_frvfdpic_size_dynamic_sections): ... here.
- (_frvfdpic_relax_got_plt_entries): New.
- (elf32_frvfdpic_relax_section): New.
- (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
- (elf32_frv_check_relocs): Add TLS support.
- (bfd_elf32_bfd_relax_section): Define for FDPIC.
- * libbfd.h, bfd-in2.h: Rebuilt.
-
-2005-01-25 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (_bfd_elf_get_dynamic_reloc_upper_bound): Only include
- loadable reloc sections.
- (_bfd_elf_canonicalize_dynamic_reloc): Likewise.
- (_bfd_elf_get_synthetic_symtab): Return 0 if no dynamic syms.
-
-2005-01-25 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_add_object_symbols): Don't create link dynamic
- sections immediately when linking shared libs. Instead, wait until
- we know a lib is needed.
- (_bfd_elf_link_create_dynstrtab): Extract from..
- (_bfd_elf_link_create_dynamic_sections_): ..here.
- (elf_add_dt_needed_tag): Call _bfd_elf_link_create_dynstrtab and
- _bfd_elf_link_create_dynamic_sections. Add abfd param. Allow
- for non-existent .dynamic.
- (elf_link_output_extsym): Don't complain about undefined symbols
- in as-needed dynamic libs that aren't actually linked.
-
-2005-01-24 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate, ../gettext.m4 was updated.
-
-2005-01-21 Ben Elliston <bje at au.ibm.com>
-
- * aout-encap.c: Remove unused file.
-
-2005-01-19 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 679
- * elflink.c (_bfd_elf_dynamic_symbol_p): Only protected
- non-function symbols are local.
- (_bfd_elf_symbol_refs_local_p): Likewise.
-
-2005-01-18 Alan Modra <amodra at bigpond.net.au>
-
- * bfd.c (bfd_link_just_syms): Add abfd param.
- * bfd-in2.h: Regenerate.
-
-2005-01-17 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-eh-frame.c (skip_cfa_op, skip_non_nops): New functions.
- (_bfd_elf_discard_section_eh_frame): Use them to interpret the CFA
- instructions. If the amount of padding is known, reduce the size
- of the CIE or FDE by that amount.
-
-2005-01-17 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-bfd.h (struct cie): Use bfd_vmas for code_align, ra_column and
- augmentation_size. Use bfd_signed_vmas for data_align.
- * elf-eh-frame.c (read_uleb128, read_sleb128): Delete in favor of...
- (read_byte, skip_leb128, read_uleb128, read_sleb128): ...these new
- functions. Don't read past the end of the enclosing CIE or FDE.
- (skip_bytes): New utility function.
- (_bfd_elf_discard_section_eh_frame): Use new functions, adding more
- sanity checking.
- (_bfd_elf_write_section_eh_frame): Use new functions.
-
-2005-01-17 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Use an
- assert-style REQUIRE() macro to handle sanity checks.
-
-2005-01-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * dwarf2.c (dwarf2_debug): Move info_ptr_unit to ...
- (comp_unit): Here.
- (read_unsigned_leb128): Removed.
- (read_signed_leb128): Removed.
- (find_abstract_instance_name): Updated.
- (parse_comp_unit): Accept info_ptr_unit.
- (_bfd_dwarf2_find_nearest_line): Set info_ptr_unit for each
- comp unit and pass it to parse_comp_unit.
-
- * elf-eh-frame.c (read_unsigned_leb128): Moved to ...
- (read_signed_leb128): Moved to ...
- * libbfd.c: Here.
-
- * libbfd-in.h (read_unsigned_leb128): New prototype.
- (read_signed_leb128): Likewise.
- * libbfd.h: Regenerated.
-
-2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
- Nick Clifton <nickc at redhat.com>
-
- * cpu-sh.c (bfd_to_arch_table): Change arch_sh1_up to arch_sh_up,
- arch__sh4_nofp_up to arch_sh4_nofpu_up and arch_sh4a_nofp_up to
- arch_sh4a_nofpu_up in order to match the external names and make the
- testsuite's job easier.
- * archuires.c: Rename bfd_mach_sh2a_fake? to more meaningful
- names.
- * bfd-in2.h: Regenerate.
-
-2005-01-15 Andrew Cagney <cagney at gnu.org>
-
- * bfd.m4: New file.
- * acinclude.m4: Move BFD_NEED_DECLARATION,
- BFD_HAVE_SYS_PROCFS_TYPE and BFD_HAVE_SYS_PROCFS_TYPE_MEMBER to
- the new file bfd.m4. Include ../bfd/bfd.m4.
- * configure: Re-generate.
-
-2005-01-12 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_howto_raw): Delete RELAX32* entries.
- (ppc_elf_relax_section): Use PLT variants of RELAX32 relocs for
- reaching PLT.
- (ppc_elf_relocate_section): Handle R_PPC_RELAX32_PLT and
- R_PPC_RELAX32PC_PLT.
-
-2005-01-11 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_gc_sweep_hook): Follow indirect and warning
- symbols.
- * elf32-arm.c (elf32_arm_gc_sweep_hook): Likewise.
- * elf32-cris.c (cris_elf_gc_sweep_hook): Likewise.
- * elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise.
- * elf32-i386.c (elf_i386_gc_sweep_hook): Likewise.
- * elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise.
- * elf32-m68k.c (elf_m68k_gc_sweep_hook): Likewise.
- * elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise.
- * elf32-s390.c (elf_s390_gc_sweep_hook): Likewise.
- * elf32-sh.c (sh_elf_gc_sweep_hook): Likewise.
- * elf32-sparc.c (elf32_sparc_gc_sweep_hook): Likewise.
- * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise.
- * elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise.
- * elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
- * elf64-x86-64.c (elf64_x86_64_gc_sweep_hook): Likewise.
-
-2005-01-11 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_create_dynamic_sections): Correct
- .dynsbss flags.
-
-2005-01-10 Inderpreet Singh <inderpreetb at noida.hcltech.com>
-
- * archures.c: Define bfd_mach_maxq10 and bfd_mach_maxq20.
- * bfd-in2.h: Regenerate.
- * coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Add code
- to support these new machine values.
- * cpu-maxq.c (bfd_maxq10_arch): New architecture definition for
- the maxq10.
- (bfd_maxq_arch): Update values for the maxq20.
-
-2005-01-10 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * elf64-sparc.c (sparc64_elf_adjust_dynamic_symbol): When linking a
- non-shared object, do not reserve space in .plt and .rela.plt for
- regular symbols neither defined nor referenced in shared objects.
-
-2005-01-09 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * elf32-sparc.c (elf32_sparc_link_hash_table_create): Use bfd_zmalloc
- to zero the structure.
- (create_got_section): Use BFD_ASSERT instead of abort.
- * elf64-sparc.c (struct sparc64_elf_link_hash_table): New 'sgot' and
- 'srelgot' fields.
- (create_got_section): New function.
- (sparc64_elf_create_dynamic_sections): Likewise.
- (sparc64_elf_check_relocs): Invoke create_got_section instead of
- _bfd_elf_create_got_section. Use the sgot and srelgot shortcuts.
- (sparc64_elf_size_dynamic_sections): Use the srelgot shortcut.
- (sparc64_elf_relocate_section): Use the sgot and srelgot shortcuts.
- (sparc64_elf_finish_dynamic_symbol): Likewise.
- (sparc64_elf_finish_dynamic_sections): Use the sgot shortcut.
- (elf_backend_create_dynamic_sections): Define to
- sparc64_elf_create_dynamic_sections.
-
-2005-01-09 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * elf32-sparc.c (elf32_sparc_omit_section_dynsym): New function.
- (elf_backend_omit_section_dynsym): Define to it.
- * elf64-sparc.c (sparc64_elf_omit_section_dynsym): New function.
- (elf_backend_omit_section_dynsym): Define to it.
-
-2005-01-07 Jakub Jelinek <jakub at redhat.com>
-
- * bfd/elf.c (INCLUDE_SECTION_IN_SEGMENT): Don't put empty sections into
- PT_DYNAMIC segment, unless .dynamic.
-
-2005-01-06 Paul Brook <paul at codesourcery.com>
-
- * config.bfd: Add entry for arm-*-vxworks and arm-*-windiss.
- * configure.in: Add bfd_elf32_{big,little}arm_vxworks_vec.
+ * configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
+ (bfd_elf32_bigarm_symbian_vec): Likewise.
+ (bfd_elf32_bigarm_vxworks_vec): Likewise.
+ (bfd_elf32_littlearm_vec): Likewise.
+ (bfd_elf32_littlearm_symbian_vec): Likewise.
+ (bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
- * elf32-arm.c: Add VxWorks target bfd.
- (USE_REL): Remove.
- (elf32_arm_link_hash_table): Add use_rel.
- (elf32_arm_link_hash_table_create, elf32_arm_final_link_relocate,
- elf32_arm_relocate_section): Replace USE_REL with runtime check.
- Correct offset calculation for RELA case.
- (elf_backend_may_use_rel_p, elf_backend_may_use_rela_p,
- elf_backend_default_use_rela_p, elf_backend_rela_normal): Define.
- (elf32_arm_vxworks_link_hash_table_create): New function.
- * targets.c (bfd_elf32_bigarm_vxworks_vec): Add declaration.
- (bfd_elf32_littlearm_vxworks_vec): Ditto.
- (_bfd_target_vector): Add bfd_elf32_{big,little}arm_vxworks_vec.
+ * elf32-arm.c: Include libiberty.h and elf-vxworks.h.
+ (RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
+ (elf32_arm_vxworks_bed): Add forward declaration.
+ (elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
+ (elf32_arm_vxworks_exec_plt0_entry): New table.
+ (elf32_arm_vxworks_exec_plt_entry): Likewise.
+ (elf32_arm_vxworks_shared_plt_entry): Likewise.
+ (elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
+ (reloc_section_p): New function.
+ (create_got_section): Use RELOC_SECTION.
+ (elf32_arm_create_dynamic_sections): Likewise. Call
+ elf_vxworks_create_dynamic_sections for VxWorks targets.
+ Choose between the two possible values of plt_header_size
+ and plt_entry_size.
+ (elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
+ (elf32_arm_abs12_reloc): New function.
+ (elf32_arm_final_link_relocate): Call it. Allow the creation of
+ dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
+ RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
+ r_addend fields of relocs. On rela targets, skip any code that
+ adjusts in-place addends. When using _bfd_link_final_relocate
+ to perform a final relocation, pass rel->r_addend as the addend
+ argument.
+ (elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
+ object, ignore flags that are not standard on VxWorks.
+ (elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
+ relocs on VxWorks. Use reloc_section_p.
+ (elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
+ (allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
+ .rela.plt.unloaded relocs on VxWorks targets.
+ (elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
+ .rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
+ instead of DT_REL* tags on RELA targets.
+ (elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
+ and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
+ PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
+ (elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
+ and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
+ like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
+ Correct the .rela.plt.unreloaded symbol indexes.
+ (elf32_arm_output_symbol_hook): Call the VxWorks version of this
+ hook on VxWorks targets.
+ (elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
+ Minor formatting tweak.
+ (elf32_arm_vxworks_final_write_processing): New function.
+ (elf_backend_add_symbol_hook): Override for VxWorks and reset
+ for Symbian.
+ (elf_backend_final_write_processing): Likewise.
+ (elf_backend_emit_relocs): Likewise.
+ (elf_backend_want_plt_sym): Likewise.
+ (ELF_MAXPAGESIZE): Likewise.
+ (elf_backend_may_use_rel_p): Minor formatting tweak.
+ (elf_backend_may_use_rela_p): Likewise.
+ (elf_backend_default_use_rela_p): Likewise.
+ (elf_backend_rela_normal): Likewise.
+ * Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
-2005-01-06 Alan Modra <amodra at bigpond.net.au>
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
- * elf64-ppc.c (struct ppc_link_hash_table): Add no_multi_toc and
- multi_toc_needed.
- (has_toc_reloc, makes_toc_func_call, call_check_in_progress): Define.
- (ppc64_elf_check_relocs): Update references to has_gp_reloc.
- (ppc64_elf_setup_section_lists): Add no_multi_toc parm, set htab bit.
- (ppc64_elf_next_toc_section): Heed no_multi_toc.
- (ppc64_elf_reinit_toc): Set multi_toc_needed.
- (toc_adjusting_stub_needed): Rewrite.
- (ppc64_elf_next_input_section): Use multi_toc_needed to shortcut
- toc tests. Adjust for toc_adjusting_stub_needed changes.
- (ppc64_elf_size_stubs): Update references to has_gp_reloc.
- * elf64-ppc.h (ppc64_elf_setup_section_lists): Update prototype.
- * section.c: Expand comment on backend bits.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
-
-2005-01-06 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_size_stubs): When determining need for
- toc adjusting stub, do not test source section flags.
-
-2005-01-05 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * elf64-sparc.c (sparc64_elf_relocate_section): Ignore overflows
- from STABS debugging sections again.
-
-2005-01-05 Fred Fish <fnf at specifixinc.com>
-
- * dwarf2.c (struct dwarf2_debug): Add info_ptr_unit member.
- (find_abstract_instance_name): New function.
- (scan_unit_for_functions): Handle DW_TAG_inlined_subroutine.
- (scan_unit_for_functions): Handle DW_AT_abstract_origin.
- (_bfd_dwarf2_find_nearest_line): Initialize info_ptr_unit.
-
-2004-12-31 Paul Brook <paul at copdesourcery.com>
-
- * elf32-arm.c (elf32_arm_symbian_plt_entry): Fix comment typo.
-
-2004-12-31 Alan Modra <amodra at bigpond.net.au>
-
- * reloc.c (BFD_RELOC_AVR_LDI, BFD_RELOC_AVR_6, BFD_RELOC_AVR_6_ADIW):
- Commit missing changes from 2004-12-22.
- * bfd-in2.h: Regenerate.
-
-2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
-
- * elf32-crx.c (elf32_crx_relax_section): Support 'bcop' relaxation.
-
-2004-12-21 Kris Warkentin <kewarken at qnx.com>
-
- * elf.c (elfcore_grok_nto_gregs): Change name to elfcore_grok_nto_regs.
- Add 'base' argument for constructing register sections. Reformat.
- (elfcore_grok_nto_note): Call elfcore_grok_nto_regs for both
- gp and fp regs. Reformat.
-
-2004-12-22 Klaus Rudolph <lts-rudolph at gmx.de>
-
- * reloc.c: Add new relocs R_AVR_LDI, R_AVR_6, R_AVR_6_ADIW.
- * bfd-in2.h: Regenerate.
- * elf32-avr.c (elf_avr_nowto_table): Add the new relocs.
- (avr_reloc_map): Likewise.
- (avr_final_link_relocate): Likewise.
-
-2004-12-22 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (_bfd_elf_merge_symbol): Treat old definitions from
- as-needed dynamic libs as undefined.
- (elf_link_add_object_symbols): Remove DYN_AS_NEEDED from as-needed
- libs when finding they are needed.
-
-2004-12-20 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add opd_relocs.
- (opd_entry_value): Use opd_relocs if available.
- (ppc64_elf_relocate_section): Don't set reloc_done. Instead
- copy .opd relocations to opd_relocs.
- (ppc64_elf_edit_toc): Set rel_hdr.sh_size after editing relocs.
-
-2004-12-16 Richard Sandiford <rsandifo at redhat.com>
-
- * reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type.
- * elf32-v850.c (v850_elf_howto_table): Add entry for
- R_V850_LO16_SPLIT_OFFSET.
- (v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET.
- (v850_elf_perform_lo16_relocation): New function, extracted from...
- (v850_elf_perform_relocation): ...here. Use it to handle
- R_V850_LO16_SPLIT_OFFSET.
- (v850_elf_check_relocs, v850_elf_final_link_relocate): Handle
- R_V850_LO16_SPLIT_OFFSET.
- * libbfd.h, bfd-in2.h: Regenerate.
-
-2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
-
- * config.bfd: Add s390x-ibm-tpf support.
-
-2004-12-14 Tomer Levi <Tomer.Levi at nsc.com>
-
- * elf32-crx.c (elf32_crx_relax_delete_bytes): Add 'struct bfd_link_info *'
- to prototype, to make hash info available.
- Prevent wrapped symbols from being adjusted twice.
-
-2004-12-14 Richard Sandiford <rsandifo at redhat.com>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Don't report an
- overflow for calls to undefined weak symbols.
-
-2004-12-11 Alan Modra <amodra at bigpond.net.au>
-
- * elfcode.h (elf_slurp_symbol_table): Use bfd_elf_sym_name so that
- canonical sections syms have a name.
-
-2004-12-11 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (opd_entry_value): Don't use cached relocs if they
- have been adjusted for output.
- (ppc64_elf_relocate_section): Mark sections with reloc_done.
-
-2004-12-10 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (bfd_elf_sym_name): Rename from bfd_elf_local_sym_name and
- add symtab_hdr param.
- (group_signature): Update calls.
- * elf-bfd.h (bfd_elf_sym_name): Update.
- * elf32-ppc.c (ppc_elf_relocate_section): Update.
- * elf64-ppc.c (ppc64_elf_edit_opd, ppc64_elf_edit_toc): Update.
- (ppc64_elf_relocate_section): Update.
- * elflink.c (elf_link_input_bfd): Update.
-
-2004-12-10 Jakub Jelinek <jakub at redhat.com>
-
- * elf.c (bfd_elf_local_sym_name): Avoid crashes with invalid
- st_shndx on STT_SECTION sections.
-
-2004-12-09 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elfcode.h (elf_slurp_reloc_table_from_section): Don't canonicalize
- ELF section symbols.
-
-2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): For R_MIPS_JALR,
- return a real value, unless it is a PLT symbol.
- (mips_elf_perform_relocation): On the RM9000, turn a jal into a
- bal if possible.
-
- * elfn32-mips.c (elf_mips_howto_table_rela): Change dst_mask of
- R_MIPS_JALR entry to 0.
-
- * archures.c: Define bfd_mach_mips9000.
- * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_9000.
- (mips_set_isa_flags): Handle bfd_mach_mips9000.
- * cpu-mips.c (I_mips9000): Define.
- (arch_info_struct): Add case for bfd_mach_mips9000.
- * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mips9000.
- * bfd-in2.h: Regenerate.
-
-2004-12-08 Ian Lance Taylor <ian at wasabisystems.com>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Test for R_MIPS_26
- overflow.
-
-2004-12-07 Ben Elliston <bje at gnu.org>
-
- * netbsd-core.c (netbsd_core_file_p): Make `i' unsigned.
-
-2004-12-06 Daniel Jacobowitz <dan at debian.org>
-
- Suggested by Fergal Daly <fergal at esatclear.ie>:
- * simple.c (simple_dummy_multiple_definition): New function.
- (bfd_simple_get_relocated_section_contents): Use it.
-
-2004-12-03 Jan Beulich <jbeulich at novell.com>
-
- * elf.c (elf_find_function): Don't use the last file symbol ever,
- seen, but the last one seen prior to the symbol being reported.
- Don't report a filename at all for global symbols when that might
- be ambiguous/wrong.
-
-2004-12-01 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_copy_private_bfd_data): Set EI_OSABI.
- (elf32_arm_post_process_headers): Set EI_OSABI depending on ABI
- version.
-
-2004-12-01 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (elf_link_add_object_symbols): Make symbols from discarded
- sections undefined.
-
-2004-11-30 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (struct elf32_arm_link_hash_table): Remove
- no_pipeline_knowledge
- (elf32_arm_link_hash_table_create): Ditto.
- (bfd_elf32_arm_process_before_allocation): Ditto.
- (elf32_arm_final_link_relocate): Ditto. Remove oabi relocation
- handling.
- * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update
- prototype.
- * bfd-in2.h: Regenerate.
-
-2004-11-30 Randolph Chung <tausq at debian.org>
-
- * elf32-hppa.c (elf32_hppa_grok_prstatus): New function.
- (elf32_hppa_grok_psinfo): New function.
- (elf_backend_grok_prstatus): Define.
- (elf_backend_grok_psinfo): Define.
-
-2004-11-24 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 574:
- * elfcode.h (elf_slurp_symbol_table): Handle STT_TLS.
-
-2004-11-24 Paul Brook <paul at codesourcery.com>
-
- * elf.c (assign_section_numbers): Number SHT_GROUP sections first.
-
-2004-11-24 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_swap_symbol_in): New function.
- (elf32_arm_swap_symbol_out): New function.
- (elf32_arm_size_info): Add.
- (elf_backend_size_info): Define.
-
-2004-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * hpux-core.c (hpux_core_core_file_p): Use offsetof macro in calls to
- make_bfd_asection.
-
-2004-11-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-arm.c (elf32_arm_finish_dynamic_sections): Warning fix.
- * elf32-iq2000.c (iq2000_reloc_type_lookup): C90 function decl.
- * nlmcode.h (nlm_write_object_contents): Warning fix.
-
-2004-11-18 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (ebb_propose_action): Fix argument order.
-
-2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * elf32-arm.c (PLT_THUMB_STUB_SIZE): Define.
- (elf32_arm_plt_thumb_stub): New.
- (struct elf32_arm_link_hash_entry): Add plt_thumb_refcount
- and plt_got_offset.
- (elf32_arm_link_hash_traverse): Fix typo.
- (elf32_arm_link_hash_table): Add obfd.
- (elf32_arm_link_hash_newfunc): Initialize new fields.
- (elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount.
- (elf32_arm_link_hash_table_create): Initialize obfd.
- (record_arm_to_thumb_glue): Mark the glue as a local ARM function.
- (record_thumb_to_arm_glue): Mark the glue as a local Thumb function.
- (bfd_elf32_arm_get_bfd_for_interworking): Verify that the
- interworking BFD is not dynamic.
- (bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do
- not emit glue for PLT references.
- (elf32_arm_final_link_relocate): Handle Thumb functions. Do not
- emit glue for PLT references. Support the Thumb PLT prefix.
- (elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and
- plt_thumb_refcount.
- (elf32_arm_check_relocs): Likewise.
- (elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and
- plt_thumb_refcount.
- (allocate_dynrelocs): Handle Thumb PLT references.
- (elf32_arm_finish_dynamic_symbol): Likewise.
- (elf32_arm_symbol_processing): New function.
- (elf_backend_symbol_processing): Define.
-
-2004-11-16 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-bfd.h (eh_cie_fde): Add new fields: add_augmentation_size and
- add_fde_encoding. Remove need_relative.
- * elf-eh-frame.c (extra_augmentation_string_bytes)
- (extra_augmentation_data_bytes, size_of_output_cie_fde): New functions.
- (_bfd_elf_discard_section_eh_frame): Consider changing the FDE encoding
- in cases where the CIE has no existing 'R' augmentation. Use
- size_of_output_cie_fde when assigning offsets. Use the final offset
- as the new section size.
- (_bfd_elf_eh_frame_section_offset): Remove need_relative handling.
- Account for any extra augmentation bytes in the returned offset.
- (_bfd_elf_write_section_eh_frame): Rework so that the entries are
- moved before being modified. Pad growing entries with DW_CFA_nops.
- Add 'z' and 'R' augmentations as directed by add_augmentation_size
- and add_fde_encoding.
-
-2004-11-15 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_relocate_section): Use
- arm_real_reloc_type.
-
-2004-11-16 Richard Sandiford <rsandifo at redhat.com>
-
- * elfxx-mips.c (mips_elf_create_dynamic_relocation): Return early
- for discard relocations; don't add an R_MIPS_NONE to the main body
- of .rel.dyn.
-
-2004-11-04 Paul Brook <paul at codesourcery.com>
-
- * elf-bfd.h (_bfd_elf_slurp_version_tables): Update prototype.
- * elf.c (_bfd_elf_print_private_bfd_data): Pass extra argument.
- (_bfd_elf_slurp_version_tables): Add extra argument. Create extra
- default version definition for unversioned symbols.
- * elfcode.h (elf_slurp_symbol_table): Pass extra argument.
- * elflink.c (elf_link_add_object_symbols): Pass extra argument to
- _bfd_elf_slurp_version_tables. Set default version for unversioned
- imported symbols.
-
-2004-11-15 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (elf_link_add_object_symbols): Don't assume version
- indices are consecutive.
-
-2004-11-14 Richard Sandiford <rsandifo at redhat.com>
-
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Deal with
- composite relocations against the personality data.
-
-2004-11-13 Paul Brook <paul at codesourcery.com>
-
- * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Resolve
- R_ARM_PREL31 relocations to PLT entries.
- (elf32_arm_relocate_section, elf32_arm_gc_sweep_hook): Ditto.
- (elf32_arm_check_relocs): Ditto.
-
-2004-11-12 Bob Wilson <bob.wilson at acm.org>
-
- * xtensa-isa.c (xtensa_interface_class_id): New.
-
-2004-11-11 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (property_table_compare): Remove assertion about
- entries with the same address and non-zero size.
- (xtensa_read_table_entries): Report such entries as errors.
-
-2004-11-11 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): Correct logic for
- R_ARM_RELATIVE on Symbian OS.
-
-2004-11-09 Mark Mitchell <mark at codesourcery.com>
-
- * som.c (som_bfd_print_private_bfd_data): New function.
- (som_object_setup): Save the auxiliary header. Don't assume that
- zero is an invalid entry point for a shared library.
- (som_object_p): Allocate the auxiliary header on the heap.
-
- * elf32-arm.c (elf32_arm_begin_write_processing): Do not use a K&R
- declaration.
- (elf32_arm_symbian_modify_segment_map): Likewise.
-
-2004-11-09 Daniel Jacobowitz <dan at debian.org>
-
- From David Poole <daveml at mbuf.com>:
- * elf32-arm.c (elf32_arm_readonly_dynrelocs): New function.
- (elf32_arm_size_dynamic_sections): Call it.
-
-2004-11-09 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (SOURCE_HFILES): Remove elf32-arm.h.
- (ALL_MACHINES_CFILES): Fix typo.
- * Makefile.in: Regenerate.
- * po/SRC-POTFILES.in: Regenerate.
-
-2004-11-08 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_final_link_relocate): When generating an
- R_ARM_RELATIVE relocation for Symbian OS, mention the section
- symbol in the relocation.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * coff-maxq.c: New File.
- * cpu-maxq.c: New File.
- * coffcode.h: Likewise.
- * config.bfd: Likewise.
- * configure.in (maxqcoff_vec): New target vector.
- * Makefile.am: Add support for maxq target.
- * configure.in: Likewise.
- * archures.c:. Likewise.
- * targets.c: Likewise.
- * bfd_in2.h : Regenerated.
- * Makefile.in: Regenerated.
- * configure: Regenerated.
- * doc/Makefile.in: Regenerated.
-
-2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * coff-i386.c (coff_i386_reloc): Fix weak symbols.
- * cofflink.c (_bfd_coff_link_input_bfd): Don't process
- C_NT_WEAK aux entries.
- (_bfd_coff_generic_relocate_section): Handle undefined
- aliases.
-
-2004-11-07 Andreas Schwab <schwab at suse.de>
-
- * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Use
- SYMBOL_CALLS_LOCAL and check for undefweak symbols with
- non-default visibility.
-
-2004-11-01 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.c (elf32_arm_symbian_begin_write_processing): Clear
- D_PAGED.
- (elf32_arm_symbian_modify_segment_map): Don't
- reset includes_filehdr and includes_phdrs here.
-
-2004-11-04 Daniel Jacobowitz <dan at debian.org>
-
- * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace
- elfarm-nabi with elf32-arm. Remove elfarm-oabi.
- (elf32-arm.lo): Replace elfarm-nabi.lo rule. Remove elf32-arm.h
- dependency.
- * config.bfd: Move arm-*-oabi* and thumb-*-oabi* from obsolete list
- to a new removed list. Remove normal configuration stanzas.
- * configure.in: (bfd_elf32_bigarm_vec, bfd_elf32_bigarm_symbian_vec)
- (bfd_elf32_littlearm_symbian_vec, bfd_elf32_littlearm_vec): Replace
- elfarm-nabi.lo with elf32-arm.lo.
- (bfd_elf32_bigarm_oabi_vec, bfd_elf32_littlearm_oabi_vec): Remove.
- * elf32-arm.c: Renamed from elfarm-nabi.c. Inline elf32-arm.h.
- * elf32-arm.h: Remove.
- * elfarm-oabi.c: Remove.
- * targets.c (_bfd_target_vector): Remove bfd_elf32_bigarm_oabi_vec
- and bfd_elf32_littlearm_oabi_vec.
- * aclocal.m4, Makefile.in, configure, doc/Makefile.in: Regenerated.
-
-2004-11-04 Hans-Peter Nilsson <hp at axis.com>
-
- * config.bfd: Support crisv32-*-* like cris-*-*.
- * archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32)
- (bfd_mach_cris_v10_v32): New macros.
- * cpu-cris.c: Tweak formatting.
- (get_compatible): New function.
- (N): New macro.
- (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New
- bfd_arch_info_type:s.
- (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach,
- get_compatible for member compatible and link bfd_cris_arch_v32 as
- next.
- * elf32-cris.c (cris_elf_pcrel_reloc)
- (cris_elf_set_mach_from_flags): New functions.
- (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL>
- <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc.
- (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct
- numbers for bfd_mach_cris_v32.
- (PLT_ENTRY_SIZE_V32): New macro.
- (elf_cris_plt0_entry): Drop last comma in initializer.
- (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32)
- (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New
- PLT initializers.
- (cris_elf_relocate_section): Change all "%B(%A)" messages to
- "%B, section %A".
- (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries.
- (elf_cris_finish_dynamic_sections): Similar.
- (elf_cris_adjust_dynamic_symbol): Similar.
- (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B,
- section %A".
- <switch with PIC relocs>: Emit error and return FALSE for
- bfd_mach_cris_v10_v32.
- <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>:
- Emit warning when generating textrel reloc.
- (cris_elf_object_p): Call cris_elf_set_mach_from_flags.
- (cris_elf_final_write_processing): Set flags according to mach.
- (cris_elf_print_private_bfd_data): Display
- EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32.
- (cris_elf_merge_private_bfd_data): Drop variables old_flags,
- new_flags. Don't call cris_elf_final_write_processing. Don't
- look at the actual elf header flags at all; use
- bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference
- in bfd_get_mach for ibfd and obfd and handle merging of compatible
- objects.
- (bfd_elf32_bfd_copy_private_bfd_data): Define.
- * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8)
- (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16)
- (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs.
- * bfd-in2.h, libbfd.h: Regenerate.
-
-2004-11-04 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.h (ppc64_elf_edit_toc): Declare.
- * elf64-ppc.c (struct ppc_link_hash_entry <adjust_done>): Update
- comment.
- (struct adjust_toc_info): New.
- (adjust_toc_syms, ppc64_elf_edit_toc): New functions.
-
-2004-11-03 Bob Wilson <bob.wilson at acm.org>
-
- * elf.c (assign_file_positions_for_segments): Set next_file_pos even
- if there are no segments.
-
-2004-11-02 Daniel Jacobowitz <dan at debian.org>
-
- * config.bfd: Mark arm-*-oabi and thumb-*-oabi as obsolete.
-
-2004-11-02 Nick Clifton <nickc at redhat.com>
-
- * elf32-iq2000.c: Convert to ISO C90 formatting.
-
-2004-11-02 Hans-Peter Nilsson <hp at axis.com>
-
- * elflink.c (_bfd_elf_create_got_section): Hide _GLOBAL_OFFSET_TABLE_.
-
-2004-10-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Handle weak
- undefined symbols for R_IA64_SECREL32MSB, R_IA64_SECREL32LSB,
- R_IA64_SECREL64MSB and R_IA64_SECREL64LSB.
-
-2004-10-28 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * elf32-sh.c (tpoff): Take alignment into account.
-
-2004-10-28 Nick Clifton <nickc at redhat.com>
-
- * elf32-iq2000.c (iq2000_elf_relocate_section): Do nothing when
- performing a relocatable link.
- (iq2000_elf_object_p): Do not set elf_bad_symtab. This is only
- for MIPS ports under Irix.
-
-2004-10-27 Richard Earnshaw <rearnsha at arm.com>
-
- * elf32-arm.h (bfd_elf32_arm_process_before_allocation): Handle
- R_ARM_CALL and R_ARM_JUMP24 as aliases of R_ARM_PC24.
- (elf32_arm_final_link_relocate): Ditto.
- (arm_add_to_rel, elf32_arm_relocate_section): Ditto.
- (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto
- (elf32_arm_adjust_dynamic_symbol): Ditto.
- * elfarm-nabi.c (elf32_arm_howto_table): Add R_ARM_CALL and
- R_ARM_JUMP32. Move R_ARM_R{REL32,ABS32,PC24,BASE}...
- (elf32_arm_r_howto): ... To here.
- (elf32_arm_howto_from_type): Use elf32_arm_r_howto.
-
-2004-10-26 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 475
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Correct
- R_IA64_SECREL32MSB, R_IA64_SECREL32LSB, R_IA64_SECREL64MSB
- and R_IA64_SECREL64LSB.
-
-2004-10-26 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (elf_finalize_dynstr): Skip shared aux structure.
- (bfd_elf_size_dynamic_sections): Create default version definition.
- (elf_link_output_extsym): Adjust for default symbol version.
-
-2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
-
- * mmo.c: Adjust to ISO C.
-
- * mmo.c (mmo_write_section_description): New function broken out
- of mmo_internal_write_section.
- (mmo_internal_write_section): For each of .text and .data, call
- mmo_write_section_description before outputting contents if it has
- nontrivially deducible vma or contents.
- (mmo_has_leading_or_trailing_zero_tetra_p): New function.
- (mmo_canonicalize_symtab): Adjust absolute symbols to .data
- symbols if found within the .data address range.
-
-2004-10-24 Daniel Jacobowitz <dan at debian.org>
-
- * opncls.c (bfd_close): Return TRUE for BFD_IN_MEMORY.
-
-2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
-
- * mmo.c (File Layout): Correct place of misplaced blurb about
- special data.
-
-2004-10-22 Mark Kettenis <kettenis at gnu.org>
-
- * config.bfd: Add mips64*-*-openbsd.
-
-2004-10-21 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (ebb_propose_action): Put declarations before
- statements.
-
-2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.94.
- * configure: Regenerate.
-
-2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 463
- * aoutx.h (aout_link_input_section_std): Pass proper hash entry
- to linker reloc_overflow callback.
- (aout_link_input_section_ext): Likewise.
- (aout_link_reloc_link_order): Likewise.
- * coff-a29k.c (coff_a29k_relocate_section): Likewise.
- * coff-alpha.c (alpha_ecoff_get_relocated_section_contents):
- Likewise.
- (alpha_relocate_section): Likewise.
- * coff-arm.c (coff_arm_relocate_section): Likewise.
- * coff-h8300.c (h8300_reloc16_extra_cases): Likewise.
- * coff-h8500.c (extra_case): Likewise.
- * coff-i960.c (coff_i960_relocate_section): Likewise.
- * coff-mcore.c (coff_mcore_relocate_section): Likewise.
- * coff-mips.c (mips_relocate_section): Likewise.
- * coff-or32.c (coff_or32_relocate_section): Likewise.
- * coff-ppc.c (coff_ppc_relocate_section): Likewise.
- * coff-rs6000.c (xcoff_ppc_relocate_section): Likewise.
- * coff-sh.c (sh_relocate_section): Likewise.
- * coff-tic80.c (coff_tic80_relocate_section): Likewise.
- * coff-w65.c (w65_reloc16_extra_cases): Likewise.
- * coff-z8k.c (extra_case): Likewise.
- * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
- * cofflink.c (_bfd_coff_reloc_link_order): Likewise.
- (_bfd_coff_generic_relocate_section): Likewise.
- * ecoff.c (ecoff_reloc_link_order): Likewise.
- * elf-hppa.h (elf_hppa_relocate_section): Likewise.
- * elf-m10200.c (mn10200_elf_relocate_section): Likewise.
- * elf-m10300.c (mn10300_elf_relocate_section): Likewise.
- * elf32-arm.h (elf32_arm_relocate_section): Likewise.
- * elf32-avr.c (elf32_avr_relocate_section): Likewise.
- * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise.
- * elf32-cris.c (cris_elf_relocate_section): Likewise.
- * elf32-crx.c (elf32_crx_relocate_section): Likewise.
- * elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
- * elf32-fr30.c (fr30_elf_relocate_section): Likewise.
- * elf32-frv.c (elf32_frv_relocate_section): Likewise.
- * elf32-h8300.c (elf32_h8_relocate_section): Likewise.
- * elf32-hppa.c (elf32_hppa_relocate_section): Likewise.
- * elf32-i370.c (i370_elf_relocate_section): Likewise.
- * elf32-i386.c (elf_i386_relocate_section): Likewise.
- * elf32-i860.c (elf32_i860_relocate_section): Likewise.
- * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise.
- * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise.
- * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
- * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise.
- * elf32-m68k.c (elf_m68k_relocate_section): Likewise.
- * elf32-mcore.c (mcore_elf_relocate_section): Likewise.
- * elf32-msp430.c (elf32_msp430_relocate_section): Likewise.
- * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
- * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
- * elf32-s390.c (elf_s390_relocate_section): Likewise.
- * elf32-sh.c (sh_elf_relocate_section): Likewise.
- * elf32-sparc.c (elf32_sparc_relocate_section): Likewise.
- * elf32-v850.c (v850_elf_relocate_section): Likewise.
- * elf32-vax.c (elf_vax_relocate_section): Likewise.
- * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise.
- * elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
- * elf64-mmix.c (mmix_elf_relocate_section): Likewise.
- * elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
- * elf64-s390.c (elf_s390_relocate_section): Likewise.
- * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
- * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
- * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
- * elflink.c (elf_reloc_link_order): Likewise.
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise.
- (_bfd_elf_mips_get_relocated_section_contents): Likewise.
- * linker.c (_bfd_generic_reloc_link_order): Likewise.
- * pdp11.c (pdp11_aout_link_input_section): Likewise.
- (aout_link_reloc_link_order): Likewise.
- * reloc.c (bfd_generic_get_relocated_section_contents):
- Likewise.
- * xcofflink.c (xcoff_reloc_link_order): Likewise.
- * simple.c (simple_dummy_reloc_overflow): Updated.
-
-2004-10-20 Andreas Schwab <schwab at suse.de>
-
- * elf32-m68k.c (elf_m68k_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
-
-2004-10-19 Danny Smith <dannysmith at users.sourceforege.net>
-
- * config.bfd: Set targ_underscore=yes for PE COFF targets
-
-2004-10-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (opd_entry_value): Handle --just-symbols objects.
- (ppc64_elf_edit_opd): Likewise.
-
-2004-10-18 Mark Mitchell <mark at codesourcery.com>
-
- * elfarm-nabi.c (ELF_DYNAMIC_SEC_FLAGS): Add comment.
- * elflink.c (_bfd_elf_create_dynamic_sections): For a loaded PLT,
- set SEC_ALLOC and SEC_LOAD.
-
-2004-10-18 Nick Clifton <nickc at redhat.com>
-
- * elf32-xstormy16.c (xstormy16_elf_relocate_section): Compute
- 'name' for relocs against both local and global symbols.
-
-2004-10-16 Daniel Jacobowitz <dan at debian.org>
-
- * bfd-in2.h: Regenerate.
- * bfd.c (struct bfd): Add no_export.
- * elflink.c (elf_link_add_object_symbols): Handle no_export.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * config.bfd: Whitespace cleanup.
- * Makefile.am: Run "make dep-am"
- * Makefile.in: Regenerate.
-
-2004-10-15 Jakub Jelinek <jakub at redhat.com>
-
- * elflink.c (struct already_linked_section): Removed.
- (try_match_symbols_in_sections, already_linked): Removed.
- (_bfd_elf_section_already_linked): Skip ^\.gnu\.linkonce\.[^.]*\.
- prefix of section names when finding already_linked_table
- chain. Compare section names. Instead of calling already_linked,
- do it inline and only for sections in the same already_linked_list.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Add "info"
- parameter. If called after _bfd_elf_write_section_eh_frame,
- don't allow a -2 return unless need_* bit is already set, and
- handle offsets adjusted for output_offset.
- * elf-bfd.h (_bfd_elf_eh_frame_section_offset): Update prototype.
- * elf.c (_bfd_elf_section_offset): Update call.
-
-2004-10-13 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 440
- * coffcode.h (coff_compute_section_file_positions): Cast to
- bfd_vma when computing page alignment.
-
-2004-10-13 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.h (elf32_arm_finish_dynamic_sections): Use file
- offsets, not VMAs, for DT_VERSYM, DT_VERDEF, DT_VERNEED.
-
-2004-10-12 Mark Mitchell <mark at codesourcery.com>
-
- * elf32-arm.h (elf32_arm_finish_dynamic_symbol): Make .rel.plt
- relocations use a virtual address, not a section offset.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (elf_xtensa_get_private_bfd_flags): Delete.
- (narrow_instruction, widen_instruction): Remove unnecessary calls to
- xtensa_format_encode.
- (ebb_propose_action): Inline call to ebb_add_proposed_action.
- (ebb_add_proposed_action): Delete.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c: Use ISO C90 formatting.
-
-2004-10-12 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (elf32_arm_merge_private_bfd_data): Rephrase error
- message.
-
-2004-10-12 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h: Support EABI version 4 objects.
-
-2004-10-12 Alan Modra <amodra at bigpond.net.au>
-
- PR 325
- * cpu-i386.c (bfd_x86_64_arch_intel_syntax): Place last in chain.
- Don't mark as default.
- (bfd_x86_64_arch): Don't mark as default.
-
-2004-10-12 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (enum action_discarded): New.
- (elf_section_complain_discarded): Delete.
- (elf_action_discarded): New function subsuming the above and also
- controlling reloc behaviour.
- (elf_link_input_bfd): Use it.
-
-2004-10-11 Jakub Jelinek <jakub at redhat.com>
-
- * elf.c (bfd_section_from_shdr): Handle SHT_GNU_LIBLIST.
- (special_sections): Add .gnu.liblist and .gnu.conflict.
- (assign_section_numbers): Handle SHT_GNU_LIBLIST.
-
-2004-10-11 Alan Modra <amodra at bigpond.net.au>
-
- PR 233
- * elflink.c (elf_link_input_bfd): Try harder to support
- relocations against symbols in removed linkonce sections.
-
-2004-10-11 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_input_bfd): Revert PR 354 change.
-
- PR 354
- * elflink.c (elf_link_input_bfd): Check that relocs in SEC_ALLOC
- sections do not reference symbols in non-SEC_ALLOC sections.
-
-2004-10-11 Alan Modra <amodra at bigpond.net.au>
-
- PR 437
- * elflink.c (elf_link_sort_relocs): Don't bomb on unusual sections.
- (_bfd_elf_link_omit_section_dynsym): Formatting.
-
-2004-10-10 Alan Modra <amodra at bigpond.net.au>
-
- * libbfd-in.h (BFD_ASSERT, BFD_FAIL): Wrap macro body in do while.
- * libbfd.h: Regnerate.
- * elf32-cris.c: Add missing semicolon to BFD_ASSERTs.
- * elf32-frv.c: Likewise.
- * elf32-m32r.c: Likewise.
- * elf32-ppc.c: Likewise.
- * elf64-hppa.c: Likewise.
- * elfxx-ia64.c: Likewise.
- * opncls.c: Likewise.
-
-2004-10-10 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct eh_frame_hdr_info): Add offsets_adjusted.
- * elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Adjust
- offsets stored in struct eh_cie_fde entries before doing other
- work.
-
- * elf-bfd.h (struct eh_cie_fde): Add cie_inf, remove sec.
- (struct eh_frame_hdr_info): Add last_cie_inf, remove last_cie_offset.
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Delete code
- setting offsets for removed CIEs. Don't set "sec", instead set
- cie_inf for FDEs. Keep a pointer to last struct eh_cie_fde for a
- CIE in hdr_info. Only set make_relative and make_lsda_relative
- for CIEs. Use pointers rather than array indices.
- (_bfd_elf_eh_frame_section_offset): Test/set make_relative,
- make_lsda_relative, need_* on cie_inf for FDEs.
- (_bfd_elf_write_section_eh_frame): Adjust offset and new_offset for
- section output_offset. Delete cie_offset, instead use cie_inf
- pointer to CIE entry. Use need_relative and need_lsda_relative on
- CIE entry for FDEs. Use pointers rather than array indices.
-
-2004-10-09 Alan Modra <amodra at bigpond.net.au>
-
- * coff-rs6000.c (rs6000coff_vec): Add initializer for
- bfd_is_target_special_symbol.
- * coff64-rs6000.c (rs6000coff64_vec): Likewise.
- * som.c (som_bfd_is_target_special_symbol): Define.
-
-2004-10-08 Nick Clifton <nickc at redhat.com>
-
- * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.93.
- * configure: Regenerate.
- * bfd-in2.h: Regenerate.
- * syms.c (bfd_is_target_special_symbol): New interface function.
- Returns true when a symbol should be considered to be special.
- * targets.c (bfd_target): Include bfd_is_target_special_symbol in
- the symbol jump table.
- * elf32-arm.h (elf32_arm_is_target_special_symbol): New function.
- Return true iff the symbol is a mapping symbol.
- (bfd_elf32_bfd_is_target_special_symbol): Define.
- * elfxx-target.h: Provide a default definition for
- bfd_is_target_special_symbol.
- * aout-target.h: Likewise.
- * aout-tic30.c: Likewise.
- * binary.c: Likewise.
- * coffcode.h: Likewise.
- * i386msdos.c: Likewise.
- * ieee.c: Likewise.
- * ihex.c: Likewise.
- * libaout.h: Likewise.
- * libbfd-in.h: Likewise
- * libecoff.h: Likewise.
- * mach-o.c: Likewise.
- * mmo.c: Likewise.
- * nlm-target.h: Likewise.
- * oasys.c: Likewise.
- * pef.c: Likewise.
- * ppcboot.c: Likewise.
- * srec.c: Likewise.
- * tekhex.c: Likewise.
- * versados.c: Likewise.
- * vms.c: Likewise.
- * xcoff-target.h: Likewise.
- * xsym.c: Likewise.
- * libbfd.h: Regenerate.
-
-2004-10-08 Daniel Jacobowitz <dan at debian.org>
-
- * config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*.
- * elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function.
- (elf_backend_section_from_shdr): Define.
-
-2004-10-08 Alan Modra <amodra at bigpond.net.au>
-
- * syms.c (bfd_is_local_label): Return false for file symbols.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
- David Heine <dlheine at tensilica.com>
-
- * elf32-xtensa.c (elf32xtensa_size_opt): New global variable.
- (xtensa_default_isa): Global variable moved here from xtensa-isa.c.
- (elf32xtensa_no_literal_movement): New global variable.
- (elf_howto_table): Add entries for new relocations.
- (elf_xtensa_reloc_type_lookup): Handle new relocations.
- (property_table_compare): When addresses are equal, compare sizes and
- various property flags.
- (property_table_matches): New.
- (xtensa_read_table_entries): Extend to read new property tables. Add
- output_addr parameter to indicate that output addresses should be used.
- Use bfd_get_section_limit.
- (elf_xtensa_find_property_entry): New.
- (elf_xtensa_in_literal_pool): Use elf_xtensa_find_property_entry.
- (elf_xtensa_check_relocs): Handle new relocations.
- (elf_xtensa_do_reloc): Use bfd_get_section_limit. Handle new
- relocations. Use new xtensa-isa.h functions.
- (build_encoding_error_message): Remove encode_result parameter. Add
- new target_address parameter used to detect alignment errors.
- (elf_xtensa_relocate_section): Use bfd_get_section_limit. Clean up
- error handling. Use new is_operand_relocation function.
- (elf_xtensa_combine_prop_entries, elf_xtensa_merge_private_bfd_data):
- Use underbar macro for error messages. Formatting.
- (get_const16_opcode): New.
- (get_l32r_opcode): Add a separate flag for initialization.
- (get_relocation_opnd): Operand number is no longer explicit in the
- relocation. Change to decode the opcode and analyze its operands.
- (get_relocation_slot): New.
- (get_relocation_opcode): Add bfd parameter. Use bfd_get_section_limit.
- Use new xtensa-isa.h functions to handle multislot instructions.
- (is_l32r_relocation): Add bfd parameter. Use is_operand_relocation.
- (get_asm_simplify_size, is_alt_relocation, is_operand_relocation,
- insn_decode_len, insn_decode_opcode, check_branch_target_aligned,
- check_loop_aligned, check_branch_target_aligned_address, narrowable,
- widenable, narrow_instruction, widen_instruction, op_single_fmt_table,
- get_single_format, init_op_single_format_table): New.
- (elf_xtensa_do_asm_simplify): Add error_message parameter and use it
- instead of calling _bfd_error_handler. Use new xtensa-isa.h functions.
- (contract_asm_expansion): Add error_message parameter and pass it to
- elf_xtensa_do_asm_simplify. Replace use of R_XTENSA_OP0 relocation
- with R_XTENSA_SLOT0_OP.
- (get_expanded_call_opcode): Extend to handle either L32R or CONST16
- instructions. Use new xtensa-isa.h functions.
- (r_reloc struct): Add new virtual_offset field.
- (r_reloc_init): Add contents and content_length parameters. Set
- virtual_offset field to zero. Add contents to target_offset field for
- partial_inplace relocations.
- (r_reloc_is_defined): Check for null.
- (print_r_reloc): New debug function.
- (source_reloc struct): Replace xtensa_operand field with pair of the
- opcode and the operand position. Add is_abs_literal field.
- (init_source_reloc): Specify operand by opcode/position pair. Set
- is_abs_literal field.
- (source_reloc_compare): When target_offsets are equal, compare other
- fields to make sorting predictable.
- (literal_value struct): Add is_abs_literal field.
- (value_map_hash_table struct): Add has_last_loc and last_loc fields.
- (init_literal_value): New.
- (is_same_value): Replace with ...
- (literal_value_equal): ... this function. Add comparisons of
- virtual_offset and is_abs_literal fields.
- (value_map_hash_table_init): Use bfd_zmalloc. Check for allocation
- failure. Initialize has_last_loc field.
- (value_map_hash_table_delete): New.
- (hash_literal_value): Rename to ...
- (literal_value_hash): ... this. Include is_abs_literal flag and
- virtual_offset field in the hash value.
- (get_cached_value): Rename to ...
- (value_map_get_cached_value): ... this. Update calls to
- literal_value_hash and literal_value_equal.
- (add_value_map): Check for allocation failure. Update calls to
- value_map_get_cached_value and literal_value_hash.
- (text_action, text_action_list, text_action_t): New types.
- (find_fill_action, compute_removed_action_diff, adjust_fill_action,
- text_action_add, text_action_add_literal, offset_with_removed_text,
- offset_with_removed_text_before_fill, find_insn_action,
- print_action_list, print_removed_literals): New.
- (offset_with_removed_literals): Delete.
- (xtensa_relax_info struct): Add is_relaxable_asm_section, action_list,
- fix_array, fix_array_count, allocated_relocs, relocs_count, and
- allocated_relocs_count fields.
- (init_xtensa_relax_info): Initialize new fields.
- (reloc_bfd_fix struct): Add new translated field.
- (reloc_bfd_fix_init): Add translated parameter and use it to set the
- translated field.
- (fix_compare, cache_fix_array): New.
- (get_bfd_fix): Remove fix_list parameter and get all relax_info for the
- section via get_xtensa_relax_info. Use cache_fix_array to set up
- sorted fix_array and use bsearch instead of linear search.
- (section_cache_t): New struct.
- (init_section_cache, section_cache_section, clear_section_cache): New.
- (ebb_t, ebb_target_enum, proposed_action, ebb_constraint): New types.
- (init_ebb_constraint, free_ebb_constraint, init_ebb, extend_ebb_bounds,
- extend_ebb_bounds_forward, extend_ebb_bounds_backward,
- insn_block_decodable_len, ebb_propose_action, ebb_add_proposed_action):
- New.
- (retrieve_contents): Use bfd_get_section_limit.
- (elf_xtensa_relax_section): Add relocations_analyzed flag. Update call
- to compute_removed_literals. Free value_map_hash_table when no longer
- needed.
- (analyze_relocations): Check is_relaxable_asm_section flag. Call
- compute_text_actions for all sections.
- (find_relaxable_sections): Mark sections as relaxable if they contain
- ASM_EXPAND relocations that can be optimized. Adjust r_reloc_init
- call. Increment relax_info src_count field only for appropriate
- relocation types. Remove is_literal_section check.
- (collect_source_relocs): Use bfd_get_section_limit. Adjust calls to
- r_reloc_init and find_associated_l32r_irel. Check
- is_relaxable_asm_section flag. Handle L32R instructions with absolute
- literals. Pass is_abs_literal flag to init_source_reloc.
- (is_resolvable_asm_expansion): Use bfd_get_section_limit. Check for
- CONST16 instructions. Adjust calls to r_reloc_init and
- pcrel_reloc_fits. Handle weak symbols conservatively.
- (find_associated_l32r_irel): Add bfd parameter and pass it to
- is_l32r_relocation.
- (compute_text_actions, compute_ebb_proposed_actions,
- compute_ebb_actions, check_section_ebb_pcrels_fit,
- check_section_ebb_reduces, text_action_add_proposed,
- compute_fill_extra_space): New.
- (remove_literals): Replace with ...
- (compute_removed_literals): ... this function. Call
- init_section_cache. Use bfd_get_section_limit. Sort internal_relocs.
- Call xtensa_read_table_entries to get the property table. Skip
- relocations other than R_XTENSA_32 and R_XTENSA_PLT. Use new
- is_removable_literal, remove_dead_literal, and
- identify_literal_placement functions.
- (get_irel_at_offset): Rewrite to use bsearch on sorted relocations
- instead of linear search.
- (is_removable_literal, remove_dead_literal,
- identify_literal_placement): New.
- (relocations_reach): Update check for literal not referenced by any
- PC-relative relocations. Adjust call to pcrel_reloc_fits.
- (coalesce_shared_literal, move_shared_literal): New.
- (relax_section): Use bfd_get_section_limit. Call
- translate_section_fixes. Update calls to r_reloc_init and
- offset_with_removed_text. Check new is_relaxable_asm_section flag.
- Add call to pin_internal_relocs. Add special handling for
- R_XTENSA_ASM_SIMPLIFY and R_XTENSA_DIFF* relocs. Use virtual_offset
- info to calculate new addend_displacement variable. Replace code for
- deleting literals with more general code to perform the actions
- determined by the action_list for the section.
- (translate_section_fixes, translate_reloc_bfd_fix): New.
- (translate_reloc): Check new is_relaxable_asm_section flag. Call
- find_removed_literal only if is_operand_relocation. Update call to
- offset_with_removed_text. Use new target_offset and removed_bytes
- variables.
- (move_literal): New.
- (relax_property_section): Use bfd_get_section_limit. Set new
- is_full_prop_section flag and handle new property tables. Update calls
- to r_reloc_init and offset_with_removed_text. Check
- is_relaxable_asm_section flag. Handle expansion of zero-sized
- unreachable entries, with use of offset_with_removed_text_before_fill.
- For relocatable links, combine entries only for literal tables.
- (relax_section_symbols): Check is_relaxable_asm_section flag. Update
- calls to offset_with_removed_text. Translate st_size field for
- function symbols.
- (do_fix_for_relocatable_link): Change to return bfd_boolean to indicate
- failure. Add contents parameter. Update call to get_bfd_fix. Update
- call to r_reloc_init. Call _bfd_error_handler and return FALSE for
- R_XTENSA_ASM_EXPAND relocs.
- (do_fix_for_final_link): Add input_bfd and contents parameters. Update
- call to get_bfd_fix. Include offset from contents for partial_inplace
- relocations.
- (is_reloc_sym_weak): New.
- (pcrel_reloc_fits): Use new xtensa-isa.h functions.
- (prop_sec_len): New.
- (xtensa_is_property_section): Handle new property sections.
- (is_literal_section): Delete.
- (internal_reloc_compare): When r_offset matches, compare r_info and
- r_addend to make sorting predictable.
- (internal_reloc_matches): New.
- (xtensa_get_property_section_name): Handle new property sections.
- (xtensa_get_property_predef_flags): New.
- (xtensa_callback_required_dependence): Use bfd_get_section_limit.
- Update calls to xtensa_isa_init, is_l32r_relocation, and r_reloc_init.
- * xtensa-isa.c (xtensa_default_isa): Moved to elf32-xtensa.c.
- (xtisa_errno, xtisa_error_msg): New variables.
- (xtensa_isa_errno, xtensa_isa_error_msg): New.
- (xtensa_insnbuf_alloc): Add error handling.
- (xtensa_insnbuf_to_chars): Add num_chars parameter. Update to
- use xtensa_format_decode. Add error handling.
- (xtensa_insnbuf_from_chars): Add num_chars parameter. Decode the
- instruction length to find the number of bytes to copy.
- (xtensa_isa_init): Add error handling. Replace calls to
- xtensa_load_isa and xtensa_extend_isa with code to initialize lookup
- tables in the xtensa_modules structure.
- (xtensa_check_isa_config, xtensa_add_isa, xtensa_load_isa,
- xtensa_extend_isa): Delete.
- (xtensa_isa_free): Change to only free lookup tables.
- (opname_lookup_compare): Replace with ...
- (xtensa_isa_name_compare): ... this function. Use strcasecmp.
- (xtensa_insn_maxlength): Rename to ...
- (xtensa_isa_maxlength): ... this.
- (xtensa_insn_length): Delete.
- (xtensa_insn_length_from_first_byte): Replace with ...
- (xtensa_isa_length_from_chars): ... this function.
- (xtensa_num_opcodes): Rename to ...
- (xtensa_isa_num_opcodes): ... this.
- (xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
- xtensa_isa_num_regfiles, xtensa_isa_num_stages,
- xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
- xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
- xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
- xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
- xtensa_format_get_slot, xtensa_format_set_slot): New functions.
- (xtensa_opcode_lookup): Add error handling.
- (xtensa_decode_insn): Replace with ...
- (xtensa_opcode_decode): ... this function, with new format and
- slot parameters. Add error handling.
- (xtensa_encode_insn): Replace with ...
- (xtensa_opcode_encode): ... this function, which does the encoding via
- one of the entries in the "encode_fns" array. Add error handling.
- (xtensa_opcode_name): Add error handling.
- (xtensa_opcode_is_branch, xtensa_opcode_is_jump, xtensa_opcode_is_loop,
- xtensa_opcode_is_call): New.
- (xtensa_num_operands): Replace with ...
- (xtensa_opcode_num_operands): ... this function. Add error handling.
- (xtensa_opcode_num_stateOperands,
- xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
- xtensa_opcode_funcUnit_use, xtensa_operand_name,
- xtensa_operand_is_visible): New.
- (xtensa_get_operand, xtensa_operand_kind): Delete.
- (xtensa_operand_inout): Add error handling and special-case for
- "sout" operands.
- (xtensa_operand_get_field, xtensa_operand_set_field): Rewritten to
- operate on one slot of an instruction. Added error handling.
- (xtensa_operand_encode): Handle default operands with no encoding
- functions. Check for success by comparing against decoded value.
- Add error handling.
- (xtensa_operand_decode): Handle default operands. Return decoded value
- through argument pointer. Add error handling.
- (xtensa_operand_is_register, xtensa_operand_regfile,
- xtensa_operand_num_regs, xtensa_operand_is_known_reg): New.
- (xtensa_operand_isPCRelative): Rename to ...
- (xtensa_operand_is_PCrelative): ... this. Add error handling.
- (xtensa_operand_do_reloc, xtensa_operand_undo_reloc): Return value
- through argument pointer. Add error handling.
- (xtensa_stateOperand_state, xtensa_stateOperand_inout,
- xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
- xtensa_regfile_lookup_shortname, xtensa_regfile_name,
- xtensa_regfile_shortname, xtensa_regfile_view_parent,
- xtensa_regfile_num_bits, xtensa_regfile_num_entries,
- xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
- xtensa_state_is_exported, xtensa_sysreg_lookup,
- xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
- xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
- xtensa_interface_num_bits, xtensa_interface_inout,
- xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
- xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New.
- * xtensa-modules.c: Rewrite to use new data structures.
- * reloc.c (BFD_RELOC_XTENSA_DIFF8, BFD_RELOC_XTENSA_DIFF16,
- BFD_RELOC_XTENSA_DIFF32, BFD_RELOC_XTENSA_SLOT0_OP,
- BFD_RELOC_XTENSA_SLOT1_OP, BFD_RELOC_XTENSA_SLOT2_OP,
- BFD_RELOC_XTENSA_SLOT3_OP, BFD_RELOC_XTENSA_SLOT4_OP,
- BFD_RELOC_XTENSA_SLOT5_OP, BFD_RELOC_XTENSA_SLOT6_OP,
- BFD_RELOC_XTENSA_SLOT7_OP, BFD_RELOC_XTENSA_SLOT8_OP,
- BFD_RELOC_XTENSA_SLOT9_OP, BFD_RELOC_XTENSA_SLOT10_OP,
- BFD_RELOC_XTENSA_SLOT11_OP, BFD_RELOC_XTENSA_SLOT12_OP,
- BFD_RELOC_XTENSA_SLOT13_OP, BFD_RELOC_XTENSA_SLOT14_OP,
- BFD_RELOC_XTENSA_SLOT0_ALT, BFD_RELOC_XTENSA_SLOT1_ALT,
- BFD_RELOC_XTENSA_SLOT2_ALT, BFD_RELOC_XTENSA_SLOT3_ALT,
- BFD_RELOC_XTENSA_SLOT4_ALT, BFD_RELOC_XTENSA_SLOT5_ALT,
- BFD_RELOC_XTENSA_SLOT6_ALT, BFD_RELOC_XTENSA_SLOT7_ALT,
- BFD_RELOC_XTENSA_SLOT8_ALT, BFD_RELOC_XTENSA_SLOT9_ALT,
- BFD_RELOC_XTENSA_SLOT10_ALT, BFD_RELOC_XTENSA_SLOT11_ALT,
- BFD_RELOC_XTENSA_SLOT12_ALT, BFD_RELOC_XTENSA_SLOT13_ALT,
- BFD_RELOC_XTENSA_SLOT14_ALT): Add new relocations.
- * Makefile.am (xtensa-isa.lo, xtensa-modules.lo): Update dependencies.
- * Makefile.in: Regenerate.
- * bfd-in2.h: Likewise.
- * libbfd.h: Likewise.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * elf64-mips.c (mips_elf64_write_rel): Use STN_UNDEF for relocs
- against the absolute section.
- (mips_elf64_write_rela): Likewise.
-
-2004-10-07 Jan Beulich <jbeulich at novell.com>
-
- * elf.c (elf_find_function): Don't generally check for matching
- section, just for non-file symbols. Remove redunant comparison
- for the latter.
- * elf32-arm.h (arm_elf_find_function): Likewise.
-
-2004-10-07 Jeff Baker <jbaker at qnx.com>
-
- * elflink.c (_bfd_elf_add_dynamic_entry): Add code to warn if
- adding a DT_TEXTREL to a shared object and --warn-shared-textrel
- was specified.
-
-2004-10-04 Roland McGrath <roland at redhat.com>
-
- * hash.c (bfd_hash_set_default_size): Use const for table.
- Use size_t instead of int for variable compared to sizeof results.
-
-2004-10-05 Alan Modra <amodra at bigpond.net.au>
-
- PR 425
- * syms.c (_bfd_stab_section_find_nearest_line): Ignore R_*_NONE relocs.
-
-2004-10-01 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (elf32_arm_fake_sections,
- is_arm_elf_unwind_section_name, elf32_arm_section_from_shdr): New
- functions.
- (elf_backend_fake_sections, elf_backend_section_from_shdr): Define.
-
-2004-10-01 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct eh_cie_fde): Add need_relative and
- need_lsda_relative.
- * elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Set
- need_relative or need_lsda_relative if we are processing an
- offset for a reloc on a FDE initial loc or LSDA field
- respectively.
- (_bfd_elf_write_section_eh_frame): Test need_relative and
- need_lsda_relative in place of corresponding make_* field
- when deciding to use pc-relative encodings.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (bfd_elf32_arm_set_target_relocs): Handle "abs"
- target2 relocation type.
-
-2004-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 414
- * elflink.c (_bfd_elf_merge_symbol): Check TLS symbol.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * reloc.c: Add BFD_RELOC_ARM_SMI.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Ditto.
-
-2004-09-24 Alan Modra <amodra at bigpond.net.au>
-
- * dwarf2.c (_bfd_dwarf2_find_nearest_line): Add output section
- vma and output offset to address.
- * simple.c (simple_save_output_info): Only set output section
- and offset for debug sections, or those not already set up by
- the linker.
- (bfd_simple_get_relocated_section_contents): Update comment.
-
-2004-09-24 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (IS_LOADED): Delete.
- (assign_file_positions_for_segments): Just test SEC_LOAD instead.
- Restore SEC_HAS_CONTENTS test to the one place it was used prior
- to 2004-09-22.
-
-2004-09-23 Alan Modra <amodra at bigpond.net.au>
-
- PR gas/396
- * elf32-sparc.c (elf32_sparc_final_write_processing): Handle
- bfd_mach_sparc_sparclet and bfd_mach_sparc_sparclite. Remove
- redundant assignment of EM_SPARC.
-
-2004-09-22 Brian Ford <ford at vss.fsi.com>
-
- * pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Enable 16 byte
- alignment for .rdata sections so sse[2] code works with gcc >= 3.3.3
- constants.
- * pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
-
-2004-09-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_modify_segment_map): Delete.
- (elf_backend_modify_segment_map): Don't define.
-
-2004-09-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (IS_LOADED): Define.
- (assign_file_positions_for_segments): Don't round up file offset of
- PT_LOAD segments containing no SEC_LOAD sections, instead round down.
- Delete code handling link script adjustment of lma. Do the adjust
- in later code handling similar ajustments. Remove dead code error
- check. Warn if section lma would require a negative offset
- adjustment. Tweak lma adjustment to use p_filesz rather than p_memsz.
- Use p_vaddr + p_memsz inside section loop in place of voff. Don't
- update voff in section loop. Change voff in segment loop to be an
- adjustment on top of "off". Set sec->filepos and update "off" later.
- Test for loadable sections consistently using IS_LOADED. Similarly,
- test for alloc-only sections other than .tbss consistently.
- Don't bother checking SEC_ALLOC in PT_LOAD segments. Remove FIXME.
- Tidy PT_NOTE handling. Use %B and %A in error messages.
- (assign_file_positions_except_relocs): Use %B in error message.
-
-2004-09-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
- (CONFIG_STATUS_DEPENDENCIES): New.
- (Makefile): Removed.
- (config.status): Likewise.
- * Makefile.in: Regenerated.
-
-2004-09-17 Paul Brook <paul at codesourcery.com>
-
- * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add prototype.
- (bfd_elf32_arm_process_before_allocation): Update prototype.
- * bfd-in2.h: Regenerate.
- * bfd/elf32-arm.h (elf32_arm_link_hash_table): Add target2_reloc.
- (elf32_arm_link_hash_table_create): Set it.
- (bfd_elf32_arm_process_before_allocation): Remove target1_is_rel.
- (bfd_elf32_arm_set_target_relocs): New function.
- (arm_real_reloc_type): New function.
- (elf32_arm_final_link_relocate): Use it. Handle R_ARM_PREL31 and
- R_ARM_GOT_PREL. Remove R_ARM_TARGET1.
- (elf32_arm_gc_sweep_hook): Ditto.
- (elf32_arm_check_relocs): Ditto.
- (elf32_arm_relocate_section): Handle R_ARM_GOT_PREL.
- * elfarm-nabi.c (elf32_arm_howto_table): Add R_ARM_PREL31 and
- R_ARM_GOT_TARGET2.
- (elf32_arm_got_prel): New variable.
- (elf32_arm_howto_from_type): New function.
- (elf32_arm_info_to_howto): Use it.
- (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PREL31 and
- BFD_RELOC_ARM_TARGET2.
- * libbfd.h: Regenerate.
- * reloc.c: Add BFD_RELOC_ARM_TARGET2 and BFD_RELOC_ARM_PREL31.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * ecoff.c: Update u.undef.next refs.
- * elf64-ppc.c: Likewise.
- * elflink.c: Likewise.
- * linker.c: Likewise.
- * xcofflink.c: Likewise.
-
- * elf-bfd.h (struct elf_link_hash_entry): Rearrange. Add FIXME to
- dynamic_def. Combine weakdef and elf_hash_value. Move vtable
- fields to indirect struct.
- * elf-m10300.c: Update u.weakdef refs.
- * elf32-arm.h: Likewise.
- * elf32-cris.c: Likewise.
- * elf32-frv.c: Likewise.
- * elf32-hppa.c: Likewise.
- * elf32-i370.c: Likewise.
- * elf32-i386.c: Likewise.
- * elf32-m32r.c: Likewise.
- * elf32-m68k.c: Likewise.
- * elf32-ppc.c: Likewise.
- * elf32-s390.c: Likewise.
- * elf32-sh.c: Likewise.
- * elf32-sparc.c: Likewise.
- * elf32-vax.c: Likewise.
- * elf32-xtensa.c: Likewise.
- * elf64-alpha.c: Likewise.
- * elf64-hppa.c: Likewise.
- * elf64-ppc.c: Likewise.
- * elf64-s390.c: Likewise.
- * elf64-sh64.c: Likewise.
- * elf64-sparc.c: Likewise.
- * elf64-x86-64.c: Likewise.
- * elfxx-ia64.c: Likewise.
- * elfxx-mips.c: Likewise.
- * elflink.c: Likewise. Also u.elf_hash_value.
- (elf_gc_propagate_vtable_entries_used): Update for h->vtable
- indirection.
- (elf_gc_smash_unused_vtentry_relocs): Likewise.
- (bfd_elf_gc_record_vtinherit): Alloc vtable.
- (bfd_elf_gc_record_vtentry): Likewise.
- * elf.c (_bfd_elf_link_hash_newfunc): Use memset.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * bfd-in2.h: Regenerate.
- * po/SRC-POTFILES.in: Regenerate.
- * po/bfd.pot: Regenerate.
-
-2004-09-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_link_hash_entry): Replace elf_link_hash_flags
- with bitfields. Make "type" and "other" bitfields too.
- (ELF_LINK_HASH_REF_REGULAR, ELF_LINK_HASH_DEF_REGULAR,
- ELF_LINK_HASH_REF_DYNAMIC, ELF_LINK_HASH_DEF_DYNAMIC,
- ELF_LINK_HASH_REF_REGULAR_NONWEAK, ELF_LINK_HASH_DYNAMIC_ADJUSTED,
- ELF_LINK_HASH_NEEDS_COPY, ELF_LINK_HASH_NEEDS_PLT, ELF_LINK_NON_ELF,
- ELF_LINK_HIDDEN, ELF_LINK_FORCED_LOCAL, ELF_LINK_HASH_MARK,
- ELF_LINK_NON_GOT_REF, ELF_LINK_DYNAMIC_DEF, ELF_LINK_DYNAMIC_WEAK,
- ELF_LINK_POINTER_EQUALITY_NEEDED): Delete.
- (ELF_COMMON_DEF_P, WILL_CALL_FINISH_DYNAMIC_SYMBOL): Update.
- * elf-hppa.h: Update all uses of elf_link_hash_flags.
- * elf-m10300.c: Likewise.
- * elf.c: Likewise.
- * elf32-arm.h: Likewise.
- * elf32-cris.c: Likewise.
- * elf32-frv.c: Likewise.
- * elf32-hppa.c: Likewise.
- * elf32-i370.c: Likewise.
- * elf32-i386.c: Likewise.
- * elf32-m32r.c: Likewise.
- * elf32-m68k.c: Likewise.
- * elf32-ppc.c: Likewise.
- * elf32-s390.c: Likewise.
- * elf32-sh-symbian.c: Likewise.
- * elf32-sh.c: Likewise.
- * elf32-sh64.c: Likewise.
- * elf32-sparc.c: Likewise.
- * elf32-vax.c: Likewise.
- * elf32-xtensa.c: Likewise.
- * elf64-alpha.c: Likewise.
- * elf64-hppa.c: Likewise.
- * elf64-ppc.c: Likewise.
- * elf64-s390.c: Likewise.
- * elf64-sh64.c: Likewise.
- * elf64-sparc.c: Likewise.
- * elf64-x86-64.c: Likewise.
- * elflink.c: Likewise.
- * elfxx-ia64.c: Likewise.
- * elfxx-mips.c: Likewise.
- * configure.in (AM_INIT_AUTOMAKE): Set version to 2.15.92.
- * configure: Regenerate.
- * aclocal.m4: Regenerate.
-
-2004-09-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-arm.h (elf32_arm_gc_sweep_hook): Add #ifndef OLD_ARM_ABI
- around uses of R_ARM_TARGET1.
- (elf32_arm_check_relocs): Likewise.
-
-2004-09-13 Paul Brook <paul at codesourcery.com>
-
- * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update
- prototype.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
- * elf32-arm.h (elf32_arm_link_hash_table): Add target1_is_rel.
- (elf32_arm_link_hash_table_create): Set target1_is_rel.
- (bfd_elf32_arm_process_before_allocation): Ditto.
- (elf32_arm_final_link_relocate): Handle R_ARM_TARGET1.
- (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
- * elfarm-nabi.c (elf32_arm_howto_table): Rename RELABS to TARGET1.
- * reloc.c: Ditto.
-
-2004-09-10 Joel Brobecker <brobecker at gnat.com>
-
- * hpux-core.c (thread_section_p): New function.
- (hpux_core_core_file_p): Fix computation of offset in call
- to bfd_seek. Create a ".reg" section from an arbitrary
- ".reg/<id>" section if none was created after having read
- all sections.
-
-2004-09-11 Andreas Schwab <schwab at suse.de>
-
- * acinclude.m4: Fix spelling of ACX_NONCANONICAL_*.
- * aclocal.m4: Rebuild.
- * configure: Rebuild.
-
-2004-09-10 Joel Brobecker <brobecker at gnat.com>
-
- * section.c (bfd_sections_find_if): Fix parameter name in
- comment to match code.
-
-2004-09-10 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (assign_file_positions_except_relocs): Assign relocs
- stored in a bfd section.
-
-2004-09-08 Hans-Peter Nilsson <hp at axis.com>
-
- * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Reset
- h->gotplt_refcount to 0, not -1.
-
-2004-09-07 Hans-Peter Nilsson <hp at axis.com>
-
- * elf32-cris.c (cris_elf_relocate_section) <case R_CRIS_16_GOTPLT,
- case R_CRIS_32_GOTPLT>: For internal error message, handle NULL
- symname.
- (cris_elf_check_relocs) <case R_CRIS_32_PLT_PCREL>: Don't try to
- handle symbol visibility here.
-
-2004-09-07 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc_link_hash_table): Add stub_globals.
- (is_ppc64_elf_target): Rename from is_ppc64_target. Update all
- callers.
- (ppc_stub_name): Remove trailing "+0" on stub name.
- (create_linkage_sections): Create relocations for
- branch lookup table when --emit-relocs as well as when --shared.
- (ppc_build_one_stub): Emit relocs for long branch stubs. Adjust
- relbrlt test. For --emit-stub-syms, always output a sym even when
- one already exists on a plt call stub. Put stub type in the stub
- symbol name.
- (ppc_size_one_stub): Size long branch stub relocs. Adjust relbrlt
- test.
- (ppc64_elf_size_stubs): Count global sym stubs added. Zero
- reloc_count in stub sections. Adjust relbrlt test.
- (ppc64_elf_build_stubs): Adjust relbrlt test. Tweak stats output.
- * elflink.c (bfd_elf_size_dynamic_sections): Fix comment typo.
- (elf_link_input_bfd): Ignore symbol index zero relocs when checking
- for relocs against discarded symbols. Fix comments.
-
-2004-09-06 Mark Mitchell <mark at codesourcery.com>
-
- * elf-bfd.h (_bfd_elf_make_dynamic_segment): Declare it.
- * elf.c (_bfd_elf_make_dynamic_segment): New function, split out
- from ...
- (map_sections_to_segments): ... here. Use it. Assign a file
- position to the .dynamic section if it is not loadable, but part
- of the PT_DYNAMIC segment.
- * elf32-arm.h (elf32_arm_finish_dynamic_sections): Use file
- offsets, not VMAs, for the BPABI. Do not fill in the header in
- the .got.plt section for the BPABI.
- * elfarm-nabi.c (elf32_arm_symbian_modify_segment_map): Add a
- PT_DYNAMIC segment.
- (elf_backend_want_got_plt): Define to zero for Symbian OS.
-
-2004-09-06 Nick Clifton <nickc at redhat.com>
-
- * elflink.c (elf_link_add_object_symbols): Set the error code to
- bfd_error_wrong_format when the input format does not match the
- output format.
-
-2004-09-06 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (is_ppc64_target): New function, extracted from..
- (ppc64_elf_check_directives): ..here.
- (ppc64_elf_size_dynamic_sections): Use it here to check bfd type
- before accessing ppc64_elf_tdata.
- (ppc64_elf_finish_dynamic_sections): And here too.
-
-2004-09-04 Alan Modra <amodra at bigpond.net.au>
-
- * bfd.c (_bfd_default_error_handler): Correct loop exit.
-
-2004-09-03 Mark Mitchell <mark at codesourcery.com>
-
- * config.bfd (arm*-*-symbianelf*): Use OS-specific target vectors.
- * configure.in (bfd_elf32_bigarm_symbian_vec): Add it.
- (bfd_elf32_littlearm_symbian_vec): Likewise.
- * configure: Regenerated.
- * elf-bfd.h (elf_backend_data): Add dynamic_sec_flags.
- * elf32-arm.h (PLT_HEADER_SIZE): Do not define.
- (PLT_ENTRY_SIZE): Likewise.
- (bfd_vma_elf32_arm_symbian_plt_entry): New
- variable.
- (elf32_arm_link_hash_table): Add plt_header_size, plt_entry_size,
- and symbian_p.
- (create_got_section): Don't create sections when generating BPABI
- objects.
- (elf32_arm_create_dynamic_sections): Tidy.
- (elf32_arm_link_hash_table_create): Set plt_header_size,
- plt_entry_size, and symbian_p.
- (elf32_arm_check_relocs): Do not mark .rel.dyn as loadable when
- generating BPABI objects.
- (allocate_dynrelocs): Use htab->plt_header_size, not
- PLT_HEADER_SIZE. Do not add to .got.plt when
- generating BPABI objects.
- (elf32_arm_finish_dynamic_symbol): Generate Symbian OS PLTs.
- * elfarm-nabi.c: Add SymbianOS target vectors.
- * elflink.c (_bfd_elf_create_got_section): Use dynamic_sec_flags.
- (_bfd_elf_link_create_dynamic_sections): Likewise.
- * elfxx-target.h (ELF_DYNAMIC_SEC_FLAGS): New macro.
- (elfNN_bed): Use it.
- * targets.c (bfd_elf32_bigarm_symbian_vec): New variable.
- (bfd_elf32_littlearm_symbian_vec): Likewise.
- (_bfd_target_vector): Add them.
-
-2004-09-03 Nick Clifton <nickc at redhat.com>
-
- PR 360
- * coffcode.h (handle_COMDAT): Replace abort with an warning
- message and allow the scan to continue.
-
-2004-09-02 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Use static_syms passed
- in when reading relocs, not our sorted syms. Remove unnecessary
- var.
-
-2004-08-31 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * elf.c (special_sections): Add .gnu.linkonce.b modelled on .bss.
-
-2004-08-30 Nathanael Nerode <neroden at gcc.gnu.org>
-
- * acinclude.m4: Require AC_CANONICAL_TARGET, not AC_CANONICAL_SYSTEM.
- Include ../config/acx.m4 and use ACX_NONCANONICAL_* where appropriate;
- replace uses of *_alias with *_noncanonical.
- * aclocal.m4: Rebuild with aclocal 1.4p6.
- * Makefile.in: Rebuild with automake 1.4p6.
- * doc/Makefile.in: Rebuild with automake 1.4p6.
- * configure.in: Autoupdate with autoupdate 2.59.
- * config.in: Regenerate with autoheader 2.59.
- * configure: Regnerate with autoconf 2.59.
-
-2004-08-28 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Copy input
- symbol pointer arrays before modifying.
-
-2004-08-28 Alan Modra <amodra at bigpond.net.au>
-
- * bfd.c (bfd_get_synthetic_symtab): Pass counts and both symbol tables.
- * elf-bfd.h (_bfd_elf_get_synthetic_symtab): Adjust.
- * elf.c (_bfd_elf_get_synthetic_symtab): Adjust.
- * libbfd-in.h (_bfd_nodynamic_get_synthetic_symtab): Adjust.
- * targets.c (struct bfd_target <_bfd_get_synthetic_symtab>): Adjust.
- * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Don't read symbols.
- Use both symbol tables on non-relocatable objects. Use a common
- error exit. Fix "mid" warning.
- * libbfd.h: Regenerate.
- * bfd-in2.h: Regenerate.
-
-2004-08-28 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_branch_reloc): Check .opd is in a regular
- object file.
- (struct sfpr_def_parms): Save some space.
- (sfpr_define): Here too.
-
- * elf64-ppc.c (compare_symbols): Put section syms first.
- (sym_exists_at): New function.
- (ppc64_elf_get_synthetic_symtab): Use relocs to find code entry
- points only for relocatable files. Use .opd section contents
- otherwise. Generally clean up the code.
-
-2004-08-27 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (STD_R0_0R1, STD_R0_0R12, LD_R0_0R1, LD_R0_0R12,
- LI_R12_0, STVX_VR0_R12_R0, LVX_VR0_R12_R0, MTLR_R0, SFPR_MAX): Define.
- (struct sfpr_def_parms): New.
- (sfpr_define): New function.
- (savegpr0, savegpr0_tail, restgpr0, restgpr0_tail): New functions.
- (savegpr1, savegpr1_tail, restgpr1, restgpr1_tail): New functions.
- (savefpr, savefpr0_tail, restfpr, restfpr0_tail): New functions.
- (savefpr1_tail, restfpr1_tail): New functions.
- (savevr, savevr_tail, restvr, restvr_tail): New functions.
- (MIN_SAVE_FPR, MAX_SAVE_FPR): Don't define.
- (ppc64_elf_func_desc_adjust): Use sfpr_define in place of existing
- code. Define all ABI mandated _save and _rest functions.
-
-2004-08-26 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (INTERWORK_FLAG): Return true for EABIv3 objects.
-
-2004-08-26 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-m32r.c (m32r_elf_relocate_section): Don't compare with
- TRUE or FALSE.
-
-2004-08-26 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-i386.c (elf_i386_relocate_section): Tweak last change so
- that pcrel correction is applied for R_386_PC32.
-
-2004-08-25 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-i386.c (elf_i386_relocate_section): Zero section contents
- for R_386_32 and R_386_PC32 relocs against symbols defined in
- discarded sections.
-
-2004-08-25 Dmitry Diky <diwil at spec.ru>
-
- * reloc.c (BFD_RELOC_MSP430_2X_PCREL,BFD_RELOC_MSP430_RL_PCREL):
- Add new relocations.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
- * elf32-msp430.c: Clean-up code.
- (elf_msp430_howto_table): Add new relocation entries.
- (bfd_elf32_bfd_reloc_type_lookup): New relocation handlers.
- (msp430_elf_relax_section): New function.
- (msp430_elf_relax_delete_bytes): New function.
- (msp430_elf_symbol_address_p): New function.
-
-2004-08-24 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * elf32-m32r.c (m32r_elf_relocate_section): Handle
- R_M32R_SDA16_RELA in the same way as R_M32R_SDA16.
-
-2004-08-20 Daniel Jacobowitz <dan at debian.org>
-
- * elflink.c (_bfd_elf_section_already_linked): Handle
- SEC_LINK_DUPLICATES_SAME_CONTENTS.
-
-2004-08-19 Mark Mitchell <mark at codesourcery.com>
-
- * config.bfd (arm*-*-symbianelf*): New target.
- (arm*-*-eabi*): Likewise.
-
-2004-08-19 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc_get_stub_entry): Change third param to a
- "struct ppc_link_hash_entry *".
- (ppc64_elf_relocate_section): Ditto for type of h. Introduce h_elf
- to satisfy RELOC_FOR_GLOBAL_SYMBOL.
-
-2004-08-19 Jakub Jelinek <jakub at redhat.com>
-
- * elf64-ppc.c (ppc64_elf_edit_opd): Support 16 byte long .opd
- entries (where fd_aux overlaps next entry's fd_func).
- Add non_overlapping argument, use it.
- (ppc64_elf_check_relocs, ppc64_elf_gc_mark_hook, adjust_opd_syms,
- ppc64_elf_size_stubs, ppc64_elf_relocate_section,
- ppc64_elf_output_symbol_hook): Use address / 8 instead of address / 24
- as indexes into opd_sym_map/opd_adjust array.
- * elf64-ppc.h (ppc64_elf_edit_opd): Adjust prototype.
-
-2004-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (func_desc_adjust): Give undefined dot-symbols a value
- if we can look up their function descriptor in a regular file.
-
-2004-08-18 Nick Clifton <nickc at redhat.com>
-
- PR 324
- * cofflink.c (coff_link_add_symbols): Check that the comdat
- pointer in the coff_section_data structure has been initialised
- before using it.
-
-2004-08-18 Alan Modra <amodra at bigpond.net.au>
-
- PR 338
- * elflink.c (bfd_elf_record_link_assignment): Add comment about
- changing bfd_link_hash_undefined to bfd_link_hash_new.
-
-2004-08-17 Jakub Jelinek <jakub at redhat.com>
-
- * elfxx-target.h (bfd_elfNN_get_synthetic_symtab): Only define
- if not yet defined.
- * elf64-ppc.c (bfd_elf64_get_synthetic_symtab): Define.
- (synthetic_opd, synthetic_relocatable): New variables.
- (compare_symbols, compare_relocs): New helper routines.
- (ppc64_elf_get_synthetic_symtab): New function.
- * bfd.c (bfd_get_synthetic_symtab): Rename dynsyms argument
- to relsyms.
- * bfd-in2.h: Regenerated.
- * elf.c (_bfd_elf_get_synthetic_symtab): Rename dynsyms argument
- to relsyms. Return 0 if abfd is relocatable.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.h (elf_gc_sweep): Keep non-alloc, non-load sections.
-
-2004-08-17 Nick Clifton <nickc at redhat.com>
-
- * (is_arm_mapping_symbol_name): New function - return true
- when a symbol name matches the requirements for an ARM mapping
- symbol name.
- (arm_elf_find_function): New function based on
- elf_find_function in elf.c but skipping ARM mapping symbols
- and including thumb function symbols.
- (elf32_arm_find_nearest_line): Use arm_elf_find_function.
- (elf32_arm_output_symbol_hook): Use is_arm_mapping_symbol_name.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_branch_reloc): New function.
- (ppc64_elf_howto_raw): Use ppc64_elf_branch_reloc.
- (ppc64_elf_brtaken_reloc): Here too.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (add_symbol_adjust): Correct mismatched function
- symbol visibility.
- (ppc64_elf_check_directives): Check that we have the right hash
- table before proceeding.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add "deleted_section".
- (adjust_opd_syms): Attach opd syms for deleted entries to one of
- the sections that will be discarded.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_section_complain_discarded): Ignore .fixup.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * bfd.c (_bfd_default_error_handler): Account for doubled '%' in
- free space available.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * pdp11.c (struct pdp11_aout_reloc_external): Delete. Replace
- occurrences with bfd_byte * thoughout file.
-
- * coff-rs6000.c (do_shared_object_padding): Warning fix.
- (xcoff_write_armap_big): Likewise.
- (xcoff_write_archive_contents_old): Likewise.
- (xcoff_write_archive_contents_big): Likewise.
-
- * elf64-mmix.c (mmix_elf_get_section_contents): Delete declaration.
-
-2004-08-13 Nick Clifton <nickc at redhat.com>
-
- * elf32-arm.h: Convert to ISO C90.
-
-2004-08-13 Alan Modra <amodra at bigpond.net.au>
-
- PR 293
- * elf32-hppa.c (elf32_hppa_hide_symbol): Use init_refcount to
- zero the plt field.
-
-2004-08-13 Alan Modra <amodra at bigpond.net.au>
-
- * bfd.c (_bfd_default_error_handler): Handle %A and %B.
- (bfd_archive_filename, bfd_get_section_ident): Delete.
- * ecofflink.c (bfd_ecoff_debug_accumulate_other): Don't call
- bfd_archive_filename.
- * elflink.c (elf_link_input_bfd): Don't use callbacks->error_handler
- to warn about symbols in discarded sections. Use _bfd_error_handler.
- * aout-adobe.c (aout_adobe_callback): See below.
- * aout-cris.c (swap_ext_reloc_in): ..
- * coff-arm.c (find_thumb_glue, find_arm_glue,
- coff_arm_relocate_section, bfd_arm_process_before_allocation,
- coff_arm_merge_private_bfd_data, _bfd_coff_arm_set_private_flags,
- coff_arm_copy_private_bfd_data): ..
- * coff-i860.c (i860_reloc_processing): ..
- * coff-mcore.c (mcore_coff_unsupported_reloc,
- coff_mcore_relocate_section): ..
- * coff-ppc.c (coff_ppc_relocate_section): ..
- * coff-rs6000.c (xcoff_create_csect_from_smclas
- * coff-sh.c (sh_relax_section, sh_relax_delete_bytes,
- sh_swap_insns, sh_relocate_section): ..
- * coff-tic54x.c (tic54x_reloc_processing): ..
- * coff-tic80.c (coff_tic80_relocate_section): ..
- * coff64-rs6000.c (xcoff64_create_csect_from_smclas): ..
- * coffcode.h (styp_to_sec_flags, coff_slurp_line_table,
- coff_slurp_symbol_table, coff_classify_symbol,
- coff_slurp_reloc_table): ..
- * coffgen.c (_bfd_coff_read_string_table): ..
- * cofflink.c (coff_link_add_symbols, _bfd_coff_link_input_bfd,
- _bfd_coff_generic_relocate_section): ..
- * cpu-arm.c (bfd_arm_merge_machines): ..
- * cpu-sh.c (sh_merge_bfd_arch): ..
- * elf-hppa.h (elf_hppa_relocate_section): ..
- * elf.c (bfd_elf_string_from_elf_section, setup_group,
- _bfd_elf_setup_group_pointers, bfd_section_from_shdr,
- assign_section_numbers, _bfd_elf_symbol_from_bfd_symbol,
- copy_private_bfd_data, _bfd_elf_validate_reloc): ..
- * elf32-arm.h (find_thumb_glue, find_arm_glue,
- bfd_elf32_arm_process_before_allocation, elf32_thumb_to_arm_stub,
- elf32_arm_to_thumb_stub, elf32_arm_final_link_relocate,
- elf32_arm_relocate_section, elf32_arm_set_private_flags,
- elf32_arm_copy_private_bfd_data, elf32_arm_merge_private_bfd_data): ..
- * elf32-cris.c (cris_elf_relocate_section, cris_elf_check_relocs,
- cris_elf_merge_private_bfd_data
- * elf32-frv.c (elf32_frv_relocate_section, elf32_frv_check_relocs): ..
- * elf32-gen.c (elf32_generic_link_add_symbols): ..
- * elf32-hppa.c (hppa_add_stub, hppa_build_one_stub,
- elf32_hppa_check_relocs, get_local_syms, final_link_relocate,
- elf32_hppa_relocate_section): ..
- * elf32-i370.c (i370_elf_merge_private_bfd_data,
- i370_elf_check_relocs, i370_elf_relocate_section): ..
- * elf32-i386.c (elf_i386_info_to_howto_rel, elf_i386_check_relocs,
- elf_i386_relocate_section): ..
- * elf32-m32r.c (m32r_elf_relocate_section,
- m32r_elf_merge_private_bfd_data): ..
- * elf32-m68hc1x.c (m68hc12_add_stub,
- _bfd_m68hc11_elf_merge_private_bfd_data): ..
- * elf32-m68k.c (elf_m68k_relocate_section): ..
- * elf32-mcore.c (mcore_elf_unsupported_reloc,
- mcore_elf_relocate_section): ..
- * elf32-ppc.c (ppc_elf_merge_private_bfd_data, bad_shared_reloc,
- ppc_elf_check_relocs, ppc_elf_relocate_section,
- ppc_elf_begin_write_processing): ..
- * elf32-s390.c (elf_s390_check_relocs, invalid_tls_insn,
- elf_s390_relocate_section): ..
- * elf32-sh-symbian.c (sh_symbian_import_as,
- sh_symbian_process_embedded_commands,
- sh_symbian_relocate_section): ..
- * elf32-sh.c (sh_elf_relax_section, sh_elf_relax_delete_bytes,
- sh_elf_swap_insns, sh_elf_relocate_section, sh_elf_check_relocs,
- sh_elf_merge_private_data): ..
- * elf32-sparc.c (elf32_sparc_check_relocs,
- elf32_sparc_relocate_section,
- elf32_sparc_merge_private_bfd_data): ..
- * elf32-v850.c (v850_elf_check_relocs,
- v850_elf_merge_private_bfd_data): ..
- * elf32-xtensa.c (elf_xtensa_check_relocs,
- elf_xtensa_relocate_section, elf_xtensa_merge_private_bfd_data): ..
- * elf64-alpha.c (elf64_alpha_relax_with_lituse,
- elf64_alpha_relax_got_load, elf64_alpha_size_got_sections,
- elf64_alpha_relocate_section_r, elf64_alpha_relocate_section): ..
- * elf64-gen.c (elf64_generic_link_add_symbols): ..
- * elf64-ppc.c (ppc64_elf_merge_private_bfd_data, ppc_add_stub,
- ppc64_elf_check_relocs, ppc64_elf_edit_opd,
- ppc64_elf_relocate_section): ..
- * elf64-s390.c (elf_s390_check_relocs, invalid_tls_insn,
- elf_s390_relocate_section): ..
- * elf64-sh64.c (sh_elf64_relocate_section): ..
- * elf64-sparc.c (sparc64_elf_check_relocs,
- sparc64_elf_add_symbol_hook, sparc64_elf_relocate_section,
- sparc64_elf_merge_private_bfd_data): ..
- * elf64-x86-64.c (elf64_x86_64_check_relocs,
- elf64_x86_64_relocate_section): ..
- * elflink.c (_bfd_elf_add_default_symbol,
- _bfd_elf_link_assign_sym_version, elf_link_read_relocs_from_section,
- _bfd_elf_link_output_relocs, elf_link_add_object_symbols,
- bfd_elf_size_dynamic_sections, elf_link_output_extsym,
- elf_get_linked_section_vma, elf_fixup_link_order,
- bfd_elf_final_link, bfd_elf_gc_record_vtinherit,
- bfd_elf_gc_record_vtinherit, _bfd_elf_section_already_linked): ..
- * elfxx-ia64.c (elfNN_ia64_relax_section,
- elfNN_ia64_relocate_section, elfNN_ia64_merge_private_bfd_data): ..
- * elfxx-mips.c (mips_elf_perform_relocation,
- _bfd_mips_elf_check_relocs,
- _bfd_mips_elf_merge_private_bfd_data): ..
- * ieee.c (ieee_slurp_external_symbols): ..
- * ihex.c (ihex_bad_byte, ihex_scan, ihex_read_section): ..
- * libbfd.c (_bfd_generic_verify_endian_match): ..
- * linker.c (_bfd_generic_link_add_one_symbol,
- _bfd_generic_section_already_linked): ..
- * pdp11.c (translate_to_native_sym_flags): ..
- * pe-mips.c (coff_pe_mips_relocate_section): ..
- * peicode.h (pe_ILF_build_a_bfd): ..
- * srec.c (srec_bad_byte): ..
- * stabs.c (_bfd_link_section_stabs): ..
- * xcofflink.c (xcoff_link_add_symbols, xcoff_link_input_bfd): ..
- Replace all uses of bfd_archive_filename and bfd_get_section_ident
- with corresponding %B and %A in _bfd_error_handler format string.
- Replace occurrences of "fprintf (stderr," with _bfd_error_handler
- calls to use %A and %B. Fix "against symbol .. from section" and
- similar error messages. Combine multiple _bfd_error_handler calls
- where they were separated due to bfd_archive_filename deficiencies.
- * bfd-in2.h: Regenerate.
-
-2004-08-12 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-i386.c (elf_i386_relocate_section): Report unrecognized
- relocation.
-
-2004-08-10 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc_link_hash_entry): Add was_undefined.
- (struct ppc_link_hash_table): Remove no_multi_toc, multi_toc_needed.
- Make emit_stub_syms, stub_error and has_14bit_branch bit-fields.
- Add twiddled_syms.
- (link_hash_newfunc): Init was_undefined.
- (add_symbol_adjust): Don't set undefined dot symbols to defweak;
- Use undefweak instead.
- (ppc64_elf_check_directives): Fix undefs chain.
- (ppc64_elf_next_toc_section): Remove no_multi_toc and multi_toc_needed
- references.
- (ppc64_elf_size_stubs): Adjust for add_symbol_adjust change.
- (undo_symbol_twiddle, ppc64_elf_restore_symbols): New functions.
- * elf64-ppc.h (ppc64_elf_restore_symbols): Declare.
-
-2004-08-09 Jakub Jelinek <jakub at redhat.com>
-
- * elf64-x86-64.c (elf64_x86_64_relocate_section): For -fno-pic
- error, test input_section flags rather than sec.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_backend_data): Add
- elf_backend_archive_symbol_lookup.
- (_bfd_elf_archive_symbol_lookup): Declare.
- * elflink.c (_bfd_elf_archive_symbol_lookup): New function..
- (elf_link_add_archive_symbols): ..extracted from here. Call the
- backend version.
- * elfxx-target.h (elf_backend_archive_symbol_lookup): Provide default.
- (elfNN_bed): Init new field.
- * elf64-ppc.c (elf_backend_check_directives): Define.
- (elf_backend_archive_symbol_lookup): Define.
- (struct ppc_link_hash_table): Add tls_get_add_fd. Make tls_get_add
- a ppc_link_hash_entry pointer.
- (get_fdh): Move.
- (ppc64_elf_archive_symbol_lookup, opd_entry_value): New functions.
- (add_symbol_adjust, ppc64_elf_check_directives): New functions.
- (ppc64_elf_check_relocs, ppc64_elf_gc_mark_hook, func_desc_adjust,
- ppc64_elf_adjust_dynamic_symbol, ppc64_elf_tls_setup,
- ppc64_elf_tls_optimize, allocate_dynrelocs, ppc_type_of_stub,
- ppc_build_one_stub, ppc64_elf_size_stubs, ppc64_elf_relocate_section,
- ppc64_elf_finish_dynamic_symbol): Handle branch relocs to function
- descriptor symbols.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (struct ppc_link_hash_entry): Expand adjust_done comment.
- (ppc64_elf_add_symbol_hook): Test for NULL section.
- (get_sym_h): Formatting.
- (ppc64_elf_size_stubs): Include reloc addend in value stored as
- stub target_value.
-
- * elf64-ppc.c (ppc64_elf_relocate_section): Combine handling of
- long branch stubs with code handling plt and r2off branch stubs.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (_bfd_elf_gc_mark): Declare.
- * elflink.c (elf_link_input_bfd): Formatting.
- (_bfd_elf_gc_mark): Rename from elf_gc_mark and make global. Adjust
- all callers.
- * elf64-ppc.c (struct ppc_link_hash_entry): Remove is_entry.
- (link_hash_newfunc): Don't set it.
- (ppc64_elf_copy_indirect_symbol): Nor copy it.
- (ppc64_elf_mark_entry_syms): Delete.
- (ppc64_elf_gc_mark_hook): Mark entry syms here. Also mark opd
- sections. Use get_opd_info.
- * elf64-ppc.h (ppc64_elf_mark_entry_syms): Delete.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (adjust_opd_syms): Fix merge error.
-
- * elf64-ppc.c (struct ppc_link_hash_table): Remove have_undefweak.
- (func_desc_adjust): Don't set have_undefweak.
- (ppc64_elf_func_desc_adjust): Don't add an extr nop to sfpr.
- (ppc64_elf_relocate_section): NOP out calls to undefweak functions.
-
- * elf64-ppc.c (struct ppc_link_hash_entry): Make "oh" a
- "struct ppc_link_hash_entry *". Adjust all references.
- (ppc64_elf_hide_symbol): Correct a comment.
-
- * elf64-ppc.c (get_opd_info): New function.
- (adjust_opd_syms): Use get_opd_info. Define removed symbols as zero.
- (ppc64_elf_edit_opd): Use get_opd_info. Check that sym has a dot
- before calling get_fdh. Test fdh rather than h before dereferencing
- fdh. Mark removed symbols in opd_adjust.
- (ppc64_elf_tls_optimize): Don't bother with opd adjustment here.
- (ppc64_elf_relocate_section): Use get_opd_info, and handle removed
- opd symbols.
- (ppc64_elf_output_symbol_hook): Likewise.
-
-2004-08-06 Paul Brook <paul at codesourcery.com>
-
- * elfarm-nabi.c (elf32_arm_howto_table): Add new EABI relocations.
- (elf32_arm_reloc_map): Add BFD_RELOC_ARM_RELABS32,
- BFD_RELOC_ARM_ROSEGREL32 and BFD_RELOC_ARM_SBREL32.
- * reloc.c: Add BFD_RELOC_ARM_RELABS32, BFD_RELOC_ARM_ROSEGREL32
- and BFD_RELOC_ARM_SBREL32.
- * bfd-in2.h, bbfd.h: Regenerate.
-
-2004-08-01 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Test only for
- the dynamic link symbol actually in use.
-
-2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
-
- * elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Handle bfd_link_hash_new
-
-2004-07-31 Joel Brobecker <brobecker at gnat.com>
- Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * elfxx-mips.c (_bfd_mips_elf_symbol_processing): Handle
- SHN_MIPS_TEXT and SHN_MIPS_DATA.
-
-2004-07-30 H.J. Lu <hongjiu.lu at intel.com>
- Nick Clifton <nickc at redhat.com>
-
- PR 290
- * bfd.c (_bfd_default_error_handler): Make it global.
-
- * elf-bfd.h (elf_backend_data): Add link_order_error_handler.
-
- * elf.c (assign_section_numbers): Cope gracefully with sections
- which have SHF_LINK_ORDER set but no sh_link set up.
- * elflink.c (elf_get_linked_section_vma): Likewise.
-
- * elfxx-ia64.c (elf_backend_link_order_error_handler): New. Set
- it to NULL.
-
- * elfxx-target.h (elf_backend_link_order_error_handler): New.
- Set it to _bfd_default_error_handler.
- (elfNN_bed): Add elf_backend_link_order_error_handler.
-
- * libbfd-in.h (_bfd_default_error_handler): New.
-
- * libbfd.h: Regenerated.
-
-2004-07-30 Jakub Jelinek <jakub at redhat.com>
-
- * archures.c (bfd_mach_sparc_64bit_p): Define.
- * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Use it.
+ * archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp):
+ New. Adjust other variants.
+ (bfd_default_scan): Update.
* bfd-in2.h: Rebuilt.
+ * cpu-m68k.c: Adjust.
+ (bfd_m68k_compatible): New. Use it for architectures.
+ * elf32-m68k.c (elf32_m68k_object_p): Adjust.
+ (elf32_m68k_merge_private_bfd_data): Adjust. Correct isa-a/b
+ mismatch.
+ (elf32_m68k_print_private_bfd_data): Adjust.
+ * ieee.c (ieee_write_processor): Adjust.
+
+2006-03-06 Alan Modra <amodra at bigpond.net.au>
-2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+ * dwarf2.c: Formatting.
+ (add_line_info): Remove outer loop.
- Introduce SH2a support.
- 2004-02-18 Corinna Vinschen <vinschen at redhat.com>
- * archures.c (bfd_mach_sh2a_nofpu): New.
- * bfd-in2.h: Rebuilt.
- * cpu-sh.c (SH2A_NOFPU_NEXT): New.
- (arch_info_struct): Add sh2a_nofpu.
- * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
- 2003-12-29 DJ Delorie <dj at redhat.com>
- * reloc.c: Add relocs for sh2a.
- * bfd-in2.h: Regenerate.
- * libbfd.hh: Regenerate.
- 2003-12-01 Michael Snyder <msnyder at redhat.com>
- * archures.c (bfd_mach_sh2a): New.
- * bfd-in2.h: Rebuilt.
- * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
- (SH2A_NEXT): New.
- (arch_info_struct): Add sh2a.
- * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
+2006-03-05 H.J. Lu <hongjiu.lu at intel.com>
+ Alan Modra <amodra at bigpond.net.au>
-2004-07-28 Nick Clifton <nickc at redhat.com>
- John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+ PR binutils/2338
+ * dwarf2.c (loadable_section): New struct.
+ (dwarf2_debug): Add loadable_section_count and
+ loadable_sections.
+ (new_line_sorts_after): New.
+ (add_line_info): Use new_line_sorts_after to compare line
+ addresses.
+ (check_function_name): Removed.
+ (unset_sections): New.
+ (place_sections): New.
+ (_bfd_dwarf2_find_nearest_line): Updated. Call place_sections
+ and unset_sections on relocatable files.
+ (_bfd_dwarf2_find_line): Likewise.
- PR 273
- * som.c (setup_sections): Improve estimation of space sizes in
- relocatable objects.
+2006-03-03 Nick Clifton <nickc at redhat.com>
-2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
- * config.bfd (hppa*-*-netbsd*): Set targ_defvec to
- bfd_elf32_hppa_nbsd_vec. Add bfd_elf32_hppa_linux_vec
- to targ_selvecs.
- * configure.in (bfd_elf32_hppa_nbsd_vec): Add case.
- * configure: Regenerate.
- * elf32-hppa.c (elf32_hppa_object_p): Add "elf32-hppa-netbsd"
- case that accepts OSABI=NetBSD and OSABI=SysV.
- (elf32_hppa_set_gp): For "elf32-hppa-netbsd", set the GP to
- the base of .got or .data (if .got does not exist).
- (elf32_hppa_post_process_headers): For elf32-hppa-netbsd,
- set OSABI=NetBSD.
- (TARGET_BIG_SYM): Add bfd_elf32_hppa_nbsd_vec case.
- (TARGET_BIG_NAME): Add "elf32-hppa-netbsd" case.
- * targets.c (bfd_elf32_hppa_nbsd_vec): Add extern declaration.
- (_bfd_target_vector): Add bfd_elf32_hppa_nbsd_vec.
+ * cpu-avr.c: Update to ISO-C90 formatting.
+ * elf32-avr.c: Likewise.
-2004-07-27 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-03 Bjoern Haase <bjoern.m.haase at web.de>
- PR 161/251
- * elf-bfd.h (bfd_elf_section_data): Add sec_group.
- (elf_sec_group): Defined.
- (bfd_elf_match_symbols_in_sections): New prototype.
- (_bfd_elf_setup_group_pointers): Likewise.
-
- * elf.c (bfd_elf_discard_group): Abort.
- (bfd_elf_set_group_contents): Also include relocation sections.
- Remove zero-fill for ld -r.
- (_bfd_elf_setup_group_pointers): New function.
- (elf_sort_elf_symbol): Likewise.
- (elf_sym_name_compare): Likewise.
- (bfd_elf_match_symbols_in_sections): Likewise.
-
- * elfcode.h (elf_object_p): Call _bfd_elf_setup_group_pointers.
-
- * elflink.c (match_group_member): New.
- (elf_link_input_bfd): Check group member for discarded section.
- (try_match_symbols_in_sections): New function.
- (already_linked): Likewise.
- (_bfd_elf_section_already_linked): Support mixing comdat group
- and linkonce section.
-
- * libbfd-in.h (bfd_section_already_linked_table_traverse): New.
- * linker.c (bfd_section_already_linked_table_traverse): New.
-
- * libbfd.h: Regenerated.
-
-2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * reloc.c: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
- BFD_RELOC_CRX_SWITCH32.
- * bfd-in2.h: Regenerate.
+ * elf32-avr.c (avr_reloc_map): Insert BFD_RELOC_AVR_MS8_LDI
+ and R_AVR_MS8_LDI
+ (bfd_elf_avr_final_write_processing): Set
+ EF_AVR_LINKRELAX_PREPARED in e_flags field.
+ (elf32_avr_relax_section): New function.
+ (elf32_avr_relax_delete_bytes): New function.
+ (elf32_avr_get_relocated_section_contents): New function.
+ (avr_pc_wrap_around): New function.
+ (avr_relative_distance_considering_wrap_around): New function.
+ (avr_final_link_relocate): Handle negative int8t_t immediate for R_AVR_LDI.
+ * reloc.c: Add BFD_RELOC_AVR_MS8_LDI and BFD_RELOC_AVR_LDI_NEG
* libbfd.h: Regenerate.
- * elf32-crx.c: Support relocation/relaxation of
- BFD_RELOC_CRX_SWITCH* types.
-
-2004-07-27 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c: Correct "Linker stubs" comment.
-
-2004-07-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (bfd_elf_section_data): Add a pointer for the
- linked-to section.
- (elf_linked_to_section): New.
-
- * elf.c (assign_section_numbers): Set up sh_link for
- SHF_LINK_ORDER.
-
- * elfxx-ia64.c (elfNN_ia64_final_write_processing): Set sh_info
- to sh_link for SHT_IA_64_UNWIND sections.
-
-2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_fixup_link_order): Add _() to error message.
-
-2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (elf_fixup_link_order): Issue a warning and flag
- an error if failed.
-
-2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * aout-adobe.c (aout_32_section_already_linked): Defined.
- * aout-target.h (MY_section_already_linked): Likewise.
- * aout-tic30.c (MY_section_already_linked): Likewise.
- * binary.c (binary_section_already_linked): Likewise.
- * bout.c (b_out_section_already_linked): Likewise.
- * coff-alpha.c (_bfd_ecoff_section_already_linked): Likewise.
- * coff-mips.c (_bfd_ecoff_section_already_linked): Likewise.
- * coffcode.h (coff_section_already_linked): Likewise.
- * i386msdos.c (msdos_section_already_linked): Likewise.
- * i386os9k.c (os9k_section_already_linked): Likewise.
- * ieee.c (ieee_section_already_linked): Likewise.
- * ihex.c (ihex_section_already_linked): Likewise.
- * mach-o.c (bfd_mach_o_section_already_linked): Likewise.
- * mmo.c (mmo_section_already_linked): Likewise.
- * nlm-target.h (nlm_section_already_linked): Likewise.
- * oasys.c (oasys_section_already_linked): Likewise.
- * pef.c (bfd_pef_section_already_linked): Likewise.
- * ppcboot.c (ppcboot_section_already_linked): Likewise.
- * som.c (som_bfd_discard_group): Likewise.
- * srec.c (srec_section_already_linked): Likewise.
- * tekhex.c (tekhex_section_already_linked): Likewise.
- * versados.c (versados_section_already_linked): Likewise.
- * vms.c (vms_section_already_linked): Likewise.
- * coff-target.h (_bfd_xcoff_section_already_linked): Likewise.
- * xsym.c (bfd_sym_section_already_linked): Likewise.
-
- * bfd-in.h (bfd_section_already_linked_table_init): New.
- (bfd_section_already_linked_table_free): Likewise.
-
- * coff-rs6000.c (rs6000coff_vec): Add
- _bfd_generic_section_already_linked.
- (pmac_xcoff_vec): Likewise.
- * coff64-rs6000.c (rs6000coff64_vec): Likewise.
- (aix5coff64_vec): Likewise.
-
- * elf-bfd.h (_bfd_elf_section_already_linked): New prototype.
- * elflink.c (_bfd_elf_section_already_linked): New function.
-
- * elfxx-target.h (bfd_elfNN_section_already_linked): Defined.
-
- * libbfd-in.h (_bfd_nolink_section_already_linked): Defined.
- (_bfd_generic_section_already_linked): New.
- (bfd_section_already_linked_hash_entry): Likewise.
- (bfd_section_already_linked): Likewise.
- (bfd_section_already_linked_table_lookup): Likewise.
- (bfd_section_already_linked_table_insert): Likewise.
-
- * linker.c (bfd_section_already_linked): New.
- (_bfd_section_already_linked_table): Likewise.
- (bfd_section_already_linked_table_lookup): Likewise.
- (bfd_section_already_linked_table_insert): Likewise.
- (already_linked_newfunc): Likewise.
- (bfd_section_already_linked_table_init): Likewise.
- (bfd_section_already_linked_table_free): Likewise.
- (_bfd_generic_section_already_linked): Likewise.
-
- * section.c (bfd_section): Remove comdat.
- (bfd_comdat_info): Moved to ...
- * bfd-in.h (coff_comdat_info): Here.
- (bfd_coff_get_comdat_section): New.
- * coffgen.c (bfd_coff_get_comdat_section): Likewise.
- * libcoff-in.h (coff_section_tdata): Add comdat.
- * coffcode.h (handle_COMDAT): Updated.
- * cofflink.c (coff_link_add_symbols): Likewise.
- * ecoff.c (bfd_debug_section): Likewise.
-
- * targets.c (bfd_target): Add _section_already_linked.
- (BFD_JUMP_TABLE_LINK): Updated.
-
- * bfd-in2.h: Regenerated.
- * libbfd.h: Likewise.
- * libcoff.h: Likewise.
-
-2003-07-21 Paul Brook <paul at codesourcery.com>
-
- * elflink.c (elf_get_linked_section_vma, compare_link_order,
- elf_fixup_link_order): New functions.
- (bfd_elf_final_link): Call elf_fixup_link_order.
-
-2004-07-21 Alexandre Oliva <aoliva at redhat.com>
-
- * elf-bfd.h (ELF_COMMON_DEF_P): New.
- * elflink.c (_bfd_elf_symbol_refs_local_p): Use it to handle
- common definitions.
- * elf-m10300.c: Use SYMBOL_REFERENCES_LOCAL instead of
- _bfd_elf_symbol_refs_local_p.
- * elf32-frv.c (FRVFDPIC_SYM_LOCAL): Remove hack for common
- symbols.
-
-2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * bfd-in.h (dynamic_lib_link_class): Add DYN_NO_ADD_NEEDED and
- DYN_NO_NEEDED.
- (bfd_elf_get_dyn_lib_class): New prototype.
- * elf.c (bfd_elf_get_dyn_lib_class): New function.
-
- * elflink.c (elf_link_add_object_symbols): Check DYN_AS_NEEDED,
- DYN_DT_NEEDED and DYN_NO_NEEDED bits to see if a DT_NEEDED
- entry is needed. Issue an error if a DT_NEEDED entry is needed
- for a file marked DYN_NO_NEEDED.
- (elf_link_check_versioned_symbol): Check the DYN_DT_NEEDED bit
- for DT_NEEDED tags.
-
- * bfd-in2.h: Regenerated.
-
-2004-07-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * elflink.c (elf_section_complain_discarded): Don't complain in
- .PARISC.unwind.
-
-2004-07-10 James E Wilson <wilson at specifixinc.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_ldxmov): Remove abfd parameter.
- (elfNN_ia64_install_value, elfNN_ia64_relax_brl): Likewise.
- (elfNN_ia64_relax_section, elfNN_ia64_relocate_section,
- elfNN_ia64_finish_dynamic_symbol, elfNN_ia64_finish_dynamic_sections):
- Fix callers.
- (elfNN_ia64_relax_brl): Change bfd_get_64 to bfd_getl64. Change
- bfd_put_64 to bfd_putl64.
- (elfNN_ia64_relax_ldxmov, elfNN_ia64_install_value): Likewise.
-
-2004-07-09 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 240
- * elfxx-ia64.c (elfNN_ia64_relax_section): Only warn br in
- .init/.fini sections when trying to relax it.
-
-2004-07-09 Jie Zhang <zhangjie at magima.com.cn>
-
- * elf.c (assign_file_positions_for_segments): Make sure the
- .dynamic section is the first section in the PT_DYNAMIC segment.
-
-2004-07-09 Nick Clifton <nickc at redhat.com>
-
- * config.bfd: Change sh-sybmian-elf to sh-*-symbianelf.
- * elf32-sh-symbian.c: Rename the sh_find_elf_flags and
- sh_elf_get_flags_from_mach functions so that they do not conflict
- when this target is built with other sh-elf targets.
- * elf32-sh.c (sh_elf_get_flags_from_mach): Remove bogus
- suppression of this function.
- (sh_elf_find_flags): Likewise.
-
-2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * Makefile.am (ALL_MACHINES): Add cpu-crx.lo.
- (ALL_MACHINES_CFILES): Add cpu-crx.c.
- (BFD32_BACKENDS): Add elf32-crx.lo.
- (BFD32_BACKENDS_CFILES): Add elf32-crx.c.
- (cpu-crx.lo): New target.
- (elf32-crx.lo): New target.
- * Makefile.in: Regenerate.
- * archures.c (bfd_architecture): Add bfd_{arch,mach}_crx.
- (bfd_archures_list): Add bfd_crx_arch.
* bfd-in2.h: Regenerate.
- * config.bfd: Handle crx-*-elf*, crx*.
- * configure.in: Handle bfd_elf32_crx_vec.
- * configure: Regenerate.
- * cpu-crx.c: New file.
- * elf32-crx.c: Likewise.
- * libbfd.h: Regenerate.
- * reloc.c: Add BFD_RELOC_CRX_REL4, BFD_RELOC_CRX_REL8,
- BFD_RELOC_CRX_REL8_CMP, BFD_RELOC_CRX_REL16, BFD_RELOC_CRX_REL24,
- BFD_RELOC_CRX_REL32, BFD_RELOC_CRX_REGREL12, BFD_RELOC_CRX_REGREL22,
- BFD_RELOC_CRX_REGREL28, BFD_RELOC_CRX_REGREL32, BFD_RELOC_CRX_ABS16,
- BFD_RELOC_CRX_ABS32, BFD_RELOC_CRX_NUM8, BFD_RELOC_CRX_NUM16,
- BFD_RELOC_CRX_NUM32, BFD_RELOC_CRX_IMM16 and BFD_RELOC_CRX_IMM32
- * targets.c (bfd_elf32_crx_vec): Declare.
- (bfd_target_vector): Add bfd_elf32_crx_vec.
-2004-07-06 Nick Clifton <nickc at redhat.com>
+2006-03-02 DJ Delorie <dj at redhat.com>
- * config.bfd: Add sh-symbian-elf target.
- * configure.in: Add bfd_elf32_shl_symbian_vec.
- * configure: Regenerate.
- * elf-bfd.h (struct elf_backend_data): Add new field
- 'check_directives'.
- * elflink.c (elf_link_add_object_symbols): Invoke the
- check_directives function, if defined.
- * elfxx-target.h: Provide a default, NULL definition for
- check_directives.
- * targets.c: Add bfd_elf32_shl_symbian_vec.
- * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
- definition.
- (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
- * sh_elf_get_flags_from_mach, sh_elf_find_flags): Likewise.
- (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
- not already been defined.
- * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
- * sh-symbian.c: New file. Provide functions to support the
- * sh-symbian-elf target.
- * Makefile.am: Add elf32-sh-symbian.c
- * Makefile.in: Regenerate.
+ * elf32-m32c.c (m32c_offset_for_reloc): Fix local symbol
+ calculations.
-2004-07-05 Andrew Stubbs <andrew.stubbs at superh.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * elf32-sh.c: Include ../opcodes/sh-opc.h.
- * Makefile.am: Ran make dep-am.
- * Makefile.in: Ran make dep-in.
+ * elf32-ppc.c (is_ppc_elf_target): Return true if the target is
+ bfd_elf32_powerpc_vxworks_vec.
-2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+2006-03-02 Nick Clifton <nickc at redhat.com>
- * cofflink.c (_bfd_coff_generic_relocate_section): Resolve PE weak
- externals properly.
+ * elf32-m32c.c (m32c_elf_relax_section): Initialise 'gap'.
-2004-07-02 Martin Schwidefsky <schwidefsky at de.ibm.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * config.bfd: Add want64 to configuration target s390-*-linux*.
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Use
+ elf_vxworks_create_dynamic_sections.
+ (elf_i386_size_dynamic_sections): Remove VxWorks GOT and PLT
+ symbol handling.
+ * elf32-ppc.c (ppc_elf_create_dynamic_sections): Use
+ elf_vxworks_create_dynamic_sections.
+ (ppc_elf_size_dynamic_sections): Remove VxWorks GOT and PLT
+ symbol handling.
+ * elf-vxworks.c (elf_vxworks_create_dynamic_sections): New function.
+ * elf-vxworks.h (elf_vxworks_create_dynamic_sections): Declare.
-2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * bfd.c (bfd_get_section_ident): New.
+ * elf32-i386.c (elf_i386_vxworks_link_output_symbol_hook): Delete.
+ (elf_backend_link_output_symbol_hook): Use
+ elf_vxworks_link_output_symbol_hook instead.
+ * elf32-ppc.c (elf_i386_vxworks_link_output_symbol_hook): Delete.
+ (elf_backend_link_output_symbol_hook): Use
+ elf_vxworks_link_output_symbol_hook instead.
+ * elf-vxworks.c (elf_vxworks_link_output_symbol_hook): Provide the
+ same interface as elf_backend_link_output_symbol_hook.
+ * elf-vxworks.h (elf_vxworks_link_output_symbol_hook): Update
+ prototype accordingly.
- * elflink.c (elf_link_read_relocs_from_section): Call
- bfd_get_section_ident to identify the section when reporting
- error.
- (_bfd_elf_link_output_relocs): Likewise.
- (elf_link_output_extsym): Likewise.
- (elf_link_input_bfd): Likewise.
- (bfd_elf_gc_record_vtinherit): Likewise.
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * bfd-in2.h: Regenerated.
+ * elf32-ppc.c (ppc_elf_plt_type): New enumeration.
+ (ppc_elf_link_hash_table): Replace old_got and new_got with
+ plt_type and can_use_new_plt.
+ (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS,
+ SEC_LOAD and SEC_READONLY to the VxWorks .plt flags.
+ (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt.
+ Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt.
+ (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to
+ either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that
+ this function should not be called for VxWorks targets.
+ (ppc_elf_tls_setup): Use plt_type instead of old_got.
+ (allocate_got): Likewise. Rearrange so that max_before_header
+ is only used for PLT_OLD and PLT_NEW.
+ (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks.
+ (ppc_elf_size_dynamic_sections): Likewise.
+ (ppc_elf_relax_section): Likewise.
+ (ppc_elf_relocate_section): Likewise.
+ (ppc_elf_finish_dynamic_symbol): Likewise.
+ (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type.
-2004-07-01 Jie Zhang <zhangjie at magima.com.cn>
- Nick Clifton <nickc at redhat.com>
+2006-02-28 Richard Sandiford <richard at codesourcery.com>
- PR 204
- * elfxx-mips.c (_bfd_mips_elf_final_link): Pass the correct number
- of section symbols to mips_elf_sort_hash_table ().
+ * elf32-i386.c (elf_i386_link_hash_table): Add next_tls_desc_index.
+ (elf_i386_link_hash_table_create): Initialize it.
+ (elf_i386_compute_jump_table_size): Use it instead of
+ srelplt->reloc_count.
+ (allocate_dynrelocs): Likewise.
+ (elf_i386_size_dynamic_sections): Likewise.
+ (elf_i386_relocate_section): Likewise.
+
+2006-02-27 Jakub Jelinek <jakub at redhat.com>
-2004-07-01 Alan Modra <amodra at bigpond.net.au>
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Handle S flag.
+ (_bfd_elf_write_section_eh_frame): Likewise.
- * elflink.c (elf_section_ignore_discarded_relocs): Revert last
- change. Comment.
- (elf_section_complain_discarded): New function. Handle
- .gcc_except_table too.
- (elf_link_input_bfd): Rewrite handling of relocs against symbols
- in discarded sections.
- * elf-bfd.h (elf_discarded_section): Protect macro arg.
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
-2004-06-30 James E Wilson <wilson at specifixinc.com>
+ * po/Make-in: Add html target.
- * elfxx-ia64.c (elfNN_ia64_check_relocs): New local pltoff. Initialize
- to NULL. Call get_pltoff if NULL and NEED_PLTOFF is true.
+2006-02-27 Richard Sandiford <richard at codesourcery.com>
-2004-06-30 H.J. Lu <hongjiu.lu at intel.com>
+ * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_symbol): Use the
+ cached hgot entry to check for _GLOBAL_OFFSET_TABLE_.
+ * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Likewise.
+ * elf32-bfin.c (bfin_finish_dynamic_symbol): Likewise.
+ * elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise.
+ * elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise.
+ * elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise.
+ * elf32-m32r.c (m32r_elf_finish_dynamic_symbol): Likewise.
+ * elf32-m68k.c (elf_m68k_finish_dynamic_symbol): Likewise.
+ * elf32-sh.c (sh_elf_finish_dynamic_symbol): Likewise.
+ * elf32-vax.c (elf_vax_finish_dynamic_symbol): Likewise.
+ * elf32-xtensa.c (elf_xtensa_finish_dynamic_symbol): Likewise.
+ * elf64-sh64.c (sh64_elf64_finish_dynamic_symbol): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_finish_dynamic_symbol): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_symbol): Likewise.
+ * elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise. Also use
+ the cached hplt entry to check for _PROCEDURE_LINKAGE_TABLE_.
+ * elf64-alpha.c (elf64_alpha_finish_dynamic_symbol): Likewise.
+ * elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_finish_dynamic_symbol): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise.
- PR 233
- * elflink.c (elf_link_input_bfd): Issue an error for non-debug
- local references to discarded sections and report their
- locations.
+2006-02-25 Richard Sandiford <richard at codesourcery.com>
-2004-06-30 Alan Modra <amodra at bigpond.net.au>
+ * elf-bfd.h (elf_link_hash_table): Add hplt field.
+ * elflink.c (_bfd_elf_create_dynamic_sections): Initialize it.
+ * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Likewise.
+ * elf32-frv.c (_frv_create_got_section): Likewise.
+ * elf32-m32r.c (m32r_elf_create_dynamic_sections): Likewise.
+ * elf32-sh.c (sh_elf_create_dynamic_sections): Likewise.
+ * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Likewise.
+ * elf64-sh64.c (sh64_elf64_create_dynamic_sections): Likewise.
+ * elf32-i386.c (elf_i386_link_hash_table): Remove hgot and hplt.
+ (elf_i386_link_hash_table_create): Don't initialize them.
+ (elf_i386_size_dynamic_sections): Use the generic ELF hplt and
+ hgot fields.
+ (elf_i386_finish_dynamic_symbol): Likewise.
+ * elf32-ppc.c (ppc_elf_link_hash_table): Remove hplt.
+ (ppc_elf_size_dynamic_sections): Use the generic ELF hplt fields.
+ (ppc_elf_finish_dynamic_symbol): Likewise.
+
+2006-02-24 DJ Delorie <dj at redhat.com>
- * elflink.c (elf_section_ignore_discarded_relocs): Don't test
- sec_info_type, test section name instead.
+ * elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
+ (m32c_elf_relocate_section): Don't relocate them.
+ (compare_reloc): New.
+ (relax_reloc): Remove.
+ (m32c_offset_for_reloc): New.
+ (m16c_addr_encodings): New.
+ (m16c_jmpaddr_encodings): New.
+ (m32c_addr_encodings): New.
+ (m32c_elf_relax_section): Relax jumps and address displacements.
+ (m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
+ short jumps.
-2004-06-29 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 240
- * elfxx-ia64.c (elfNN_ia64_relax_section): Don't relax branch
- in .init/.fini sections.
-
-2004-06-29 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (elf_xtensa_relocate_section): Use
- bfd_get_section_limit.
-
-2004-06-29 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (elf_xtensa_combine_prop_entries): Don't change the
- output section size.
-
-2004-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-mmix.c (mmix_set_relaxable_size): Save original size in
- rawsize.
- (mmix_elf_perform_relocation): Adjust for above change.
- (mmix_elf_relocate_section): Likewise.
- (mmix_elf_relax_section): Likewise. Use output_section->rawsize.
- (mmix_elf_get_section_contents): Delete.
- (bfd_elf64_get_section_contents): Delete.
- (mmix_elf_relocate_section): Zero stub area.
- * linker.c (default_indirect_link_order): Alloc max of section size
- and rawsize.
- * simple.c (bfd_simple_get_relocated_section_contents): Likewise.
- * section.c (bfd_malloc_and_get_section): Likewise.
- (struct bfd_section): Update rawsize comment.
- * bfd-in2.h: Regenerate.
-
- * reloc16.c (bfd_coff_reloc16_relax_section): Set rawsize.
-
-2004-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * bfd-in.h (bfd_get_section_limit): Define.
- * reloc.c (bfd_perform_relocation, bfd_install_relocation)
- (_bfd_final_link_relocate): Use bfd_get_section_limit.
- * aout-tic30.c (tic30_aout_final_link_relocate): Likewise.
- * coff-arm.c (coff_arm_relocate_section): Likewise.
- * coff-mips.c (mips_refhi_reloc, mips_gprel_reloc): Likewise.
- * cpu-ns32k.c (do_ns32k_reloc): Likewise.
- (bfd_ns32k_final_link_relocate): Likewise.
- * elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): Likwise.
- * elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): Likewise.
- * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
- (i860_howto_highadj_reloc, i860_howto_splitn_reloc): Likewise.
- * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
- (m32r_elf_generic_reloc, m32r_elf_relocate_section): Likewise.
- * elf32-m68hc1x.c (m68hc11_elf_special_reloc): Likewise.
- * elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
- * elf32-or32.c (or32_elf_consth_reloc): Likewise.
- * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Likewise.
- * elf32-s390.c (s390_elf_ldisp_reloc): Likewise.
- * elf32-sh.c (sh_elf_reloc_loop): Likewise.
- * elf32-sparc.c (sparc_elf_wdisp16_reloc): Likewise.
- (sparc_elf_hix22_reloc, sparc_elf_lox10_reloc): Likwise.
- * elf32-v850.c (v850_elf_reloc): Likewise.
- * elf32-xstormy16.c (xstormy16_elf_24_reloc): Likewise.
- * elf32-xtensa.c (bfd_elf_xtensa_reloc): Likewise.
- * elf64-alpha.c (elf64_alpha_reloc_gpdisp): Likewise.
- * elf64-mips.c (mips_elf64_gprel32_reloc)
- (mips16_gprel_reloc): Likewise.
- * elf64-mmix.c (mmix_elf_reloc): Likewise.
- * elf64-s390.c (s390_elf_ldisp_reloc): Likewise.
- * elf64-sparc.c (init_insn_reloc): Likewise.
- * elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
- (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
- (_bfd_mips_elf_generic_reloc): Likewise.
- * bfd-in2.h: Regenerate.
-
-2004-06-28 Alan Modra <amodra at bigpond.net.au>
-
- * bfd-in.h (struct stab_info): Move from stabs.c.
- * stabs.c (struct stab_link_includes_table): Delete.
- (stab_link_includes_lookup): Delete.
- (_bfd_write_section_stabs, _bfd_write_stab_strings): Remove one
- level of indirection from sinfo parm.
- (_bfd_link_section_stabs): Likewise. Set SEC_LINKER_CREATED on
- stabstr section. Adjust hash table accesses.
- * coff-ppc.c (ppc_bfd_coff_final_link): Do include rawsize in contents
- alloc. Adjust stab_info test.
- * cofflink.c (_bfd_coff_link_hash_table_init): Clear stab_info.
- (_bfd_coff_final_link): Adjust stab_info test.
- (_bfd_coff_link_input_bfd): Ignore SEC_LINKER_CREATED sections.
- * elf-bfd.h (struct elf_link_hash_table): Include struct stab_info
- in place.
- * libcoff-in.h (struct coff_link_hash_table): Likewise.
- * elf.c (_bfd_elf_link_hash_table_init): Clear stab_info.
- * elflink.c (bfd_elf_final_link): Don't attempt to link linker created
- stabstr section. Adjust stab_info test.
- * libbfd-in.h (_bfd_link_section_stabs, _bfd_write_section_stabs)
- (_bfd_write_stab_strings): Adjust prototypes.
+ * reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
- * libcoff.h: Regenerate.
* bfd-in2.h: Regenerate.
+
+2006-02-24 H.J. Lu <hongjiu.lu at intel.com>
-2004-06-27 Mark Kettenis <kettenis at gnu.org>
+ PR ld/2218
+ * elf-bfd.h (elf_backend_data): Add elf_backend_fixup_symbol.
+ (_bfd_elf_link_hash_fixup_symbol): New.
- From Miod Vallat <miod at online.fr>:
- * aoutx.h (NAME(aout,machine_type)): Handle bfd_arch_m88k.
+ * elflink.c (_bfd_elf_link_hash_fixup_symbol): New.
+ (_bfd_elf_fix_symbol_flags): Call elf_backend_fixup_symbol if
+ it isn't NULL.
-2004-06-26 Alexandre Oliva <aoliva at redhat.com>
+ * elfxx-ia64.c (elf_backend_fixup_symbol): Defined.
- * elf-m10300.c (struct elf_mn10300_pcrel_relocs_copied): Delete.
- (struct elf32_mn10300_link_hash_entry): Remove
- pcrel_relocs_copied.
- (mn10300_elf_check_relocs): Only reserve dynamic relocations for
- R_MN10300_32. Don't adjust pcrel_relocs_copied.
- (mn10300_elf_final_link_relocate): Fail for direct, pc-relative
- and gotoff relocations if the symbol doesn't bind locally. Use
- _bfd_elf_symbol_refs_local_p to test. Don't create dynamic
- relocation for PCREL32.
- (mn10300_elf_relocate_section): Use _bfd_elf_symbol_refs_local_p
- to test whether a symbol binds locally.
- (elf32_mn10300_link_hash_newfunc): Don't initialize
- pcrel_relocs_copied.
- (_bfd_mn10300_elf_discard_copies): Delete.
- (_bfd_mn10300_elf_size_dynamic_sections): Don't call it.
+ * elfxx-target.h (elf_backend_fixup_symbol): New.
+ (elfNN_bed): Initialize elf_backend_fixup_symbol.
-2004-06-26 Mark Kettenis <kettenis at gnu.org>
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
- * config.bfd: Replace m88k-*-openbsd* with m88*-*-openbsd*.
+ * cpu-ia64-opc.c (ins_immu5b): New.
+ (ext_immu5b): Likewise.
+ (elf64_ia64_operands): Add IMMU5b.
-2004-06-25 Joel Brobecker <brobecker at gnat.com>
+2006-02-21 Alan Modra <amodra at bigpond.net.au>
- * som.c (som_set_reloc_info): Correct small typo.
+ PR ld/2218
+ * elf32-arm.c (allocate_dynrelocs): Ensure undef weak sym in pie
+ is dynamic.
+ * elf32-hppa.c (allocate_dynrelocs): Likewise.
+ * elf32-i386.c (allocate_dynrelocs): Likewise.
+ * elf32-s390.c (allocate_dynrelocs): Likewise.
+ * elf32-sh.c (allocate_dynrelocs): Likewise.
+ * elf64-s390.c (allocate_dynrelocs): Likewise.
+ * elf64-x86-64.c (allocate_dynrelocs): Likewise.
+ * elf32-m32r.c (allocate_dynrelocs): Likewise. Discard relocs
+ on undef weak with non-default visibility too.
+ * elfxx-sparc.c (allocate_dynrelocs): Ditto.
-2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+2006-02-21 Alan Modra <amodra at bigpond.net.au>
- * elf32-m32r.c (m32r_elf_howto_table): Support R_M32R_GOTOFF.
- (m32r_elf_relocate_section): Changed for R_M32R_GOTOFF.
- (m32r_elf_gcsweep_hook): Likewise.
- (m32r_elf_check_relocs): Likewise.
- (m32r_elf_howto_table): Added R_M32R_GOTOFF_HI_ULO,
- R_M32R_GOTOFF_HI_SLO and R_M32R_GOTOFF_LO.
- * reloc.c: Added BFD_RELOC_M32R_GOTOFF_HI_ULO,
- BFD_RELOC_M32R_GOTOFF_HI_SLO and BFD_RELOC_M32R_GOTOFF_LO.
- * bfd-in2.h: Regenerated.
- * libbfd.h: Regenerated.
+ * bfd.c: (_bfd_default_error_handler): Don't call abort on
+ error, instead call _exit.
+ (_bfd_abort): Call _exit not xexit.
-2004-06-24 H.J. Lu <hongjiu.lu at intel.com>
+2006-02-17 Kevin Buettner <kevinb at redhat.com>
- * elf64-x86-64.c (elf64_x86_64_check_relocs): Warn overflow
- relocation symbol.
- (elf64_x86_64_relocate_section): Issue an error for
- R_X86_64_PC8, R_X86_64_PC16 and R_X86_64_PC32 relocations
- against global symbols when building shared library.
+ * elf32-frv.c (elf32_frv_grok_prstatus, elf32_frv_grok_psinfo):
+ New functions.
+ * elf_backend_grok_prstatus, elf_backend_grok_psinfo): Define.
-2004-06-24 Alan Modra <amodra at bigpond.net.au>
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
- * section.c (struct sec): Rename "_cooked_size" to "size".
- Rename "_raw_size" to "rawsize".
- (STD_SECTION): Adjust comments.
- (bfd_set_section_size, bfd_get_section_contents): Use size.
- (bfd_malloc_and_get_section): New function.
- * bfd-in.h (bfd_section_size, bfd_get_section_size): Use size.
- * coff-sh.c (sh_relax_section): Alloc coff_section_data struct early.
- Correctly free reloc and contents memory.
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Delete FIXME
- and fake CIE now that we can shink section size to zero.
- (_bfd_elf_write_section_eh_frame): Likewise..
- * elf32-ppc.c (ppc_elf_relax_section): Delay reading section contents.
- * elf-m10300.c (mn10300_elf_final_link_relocate): Don't use
- _bfd_stab_section_offset. Use _bfd_elf_section_offset.
- * stabs.c (_bfd_stab_section_offset_): Remove unused args and
- unneeded indirection.
- * elf.c (_bfd_elf_section_offset): .. and update call.
- * libbfd-in.h (_bfd_stab_section_offset): Update prototype.
- * libbfd.h: Regenerate.
- * bfd-in2.h: Regenerate.
-
- Replace occurrences of "_raw_size" and "_cooked_size" in most places
- with "size". Set new "rawsize" for stabs, eh_frame, and SEC_MERGE
- sections. Use "rawsize", if non-zero, for bfd_get_section_contents
- calls if the section might be a stabs, eh_frame, or SEC_MERGE section.
- Similarly use "rawsize", if non-zero, in reloc functions to validate
- reloc addresses. Use new bfd_malloc_and_get_section in most places
- where bfd_get_section_contents was called. Expand all occurrences of
- bfd_section_size and bfd_get_section_size. Rename "raw_size" var in
- grok_prstatus and similar functions to "size".
- * aix386-core.c (aix386_core_file_p): ..
- * aix5ppc-core.c (xcoff64_core_p): ..
- * aout-adobe.c (aout_adobe_callback, aout_adobe_write_object_contents,
- aout_adobe_set_section_contents): ..
- * aout-target.h (callback): ..
- * aout-tic30.c (tic30_aout_callback, tic30_aout_final_link_relocate,
- MY_bfd_final_link): ..
- * aoutf1.h (sunos4_core_file_p): ..
- * aoutx.h (some_aout_object_p, adjust_o_magic, adjust_z_magic,
- adjust_n_magic, adjust_sizes_and_vmas, translate_from_native_sym_flags,
- final_link, aout_link_input_section): ..
- * binary.c (binary_object_p, binary_canonicalize_symtab,
- binary_set_section_contents): ..
- * bout.c (b_out_callback, b_out_write_object_contents,
- b_out_set_section_contents, b_out_bfd_relax_section,
- b_out_bfd_get_relocated_section_contents): ..
- * cisco-core.c (cisco_core_file_validate): ..
- * coff-alpha.c (alpha_ecoff_object_p,
- alpha_ecoff_get_relocated_section_conten, alpha_relocate_section): ..
- * coff-arm.c (coff_arm_relocate_section,
- bfd_arm_allocate_interworking_sections): ..
- * coff-h8300.c (h8300_reloc16_extra_cases,
- h8300_bfd_link_add_symbols): ..
- * coff-mips.c (mips_refhi_reloc, mips_gprel_reloc): ..
- * coff-ppc.c (coff_ppc_relocate_section, ppc_allocate_toc_section,
- ppc_bfd_coff_final_link): ..
- * coff-rs6000.c (xcoff_reloc_type_br, xcoff_ppc_relocate_section): ..
- * coff-sh.c (sh_relax_section, sh_relax_delete_bytes,
- sh_align_loads, sh_coff_get_relocated_section_contents): ..
- * coff64-rs6000.c (xcoff64_write_object_contents,
- xcoff64_reloc_type_br, xcoff64_ppc_relocate_section): ..
- * coffcode.h (coff_compute_section_file_positions,
- coff_write_object_contents): ..
- * coffgen.c (make_a_section_from_file, coff_write_symbols,
- coff_section_symbol, build_debug_section): ..
- * cofflink.c (coff_link_add_symbols, _bfd_coff_final_link,
- process_embedded_commands, _bfd_coff_link_input_bfd,
- _bfd_coff_write_global_sym): ..
- * cpu-arm.c (bfd_arm_update_notes, bfd_arm_get_mach_from_notes): ..
- * cpu-ns32k.c (do_ns32k_reloc, _bfd_ns32k_final_link_relocate): ..
- * dwarf1.c (parse_line_table, _bfd_dwarf1_find_nearest_line): ..
- * dwarf2.c (read_indirect_string, read_abbrevs, decode_line_info,
- _bfd_dwarf2_find_nearest_line): ..
- * ecoff.c (bfd_debug_section, ecoff_set_symbol_info,
- ecoff_compute_section_file_positions,
- _bfd_ecoff_write_object_contents, ecoff_indirect_link_order): ..
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame,
- _bfd_elf_discard_section_eh_frame_hdr,
- _bfd_elf_maybe_strip_eh_frame_hdr, _bfd_elf_eh_frame_section_offset,
- _bfd_elf_write_section_eh_frame,
- _bfd_elf_write_section_eh_frame_hdr): ..
- * elf-hppa.h (elf_hppa_sort_unwind): ..
- * elf-m10200.c (mn10200_elf_relax_section,
- mn10200_elf_relax_delete_bytes,
- mn10200_elf_get_relocated_section_contents): ..
- * elf-m10300.c (_bfd_mn10300_elf_create_got_section,
- mn10300_elf_check_relocs, mn10300_elf_relax_section,
- mn10300_elf_relax_delete_bytes,
- mn10300_elf_get_relocated_section_contents,
- _bfd_mn10300_elf_adjust_dynamic_symbol,
- _bfd_mn10300_elf_discard_copies,
- _bfd_mn10300_elf_size_dynamic_sections,
- _bfd_mn10300_elf_finish_dynamic_sections): ..
- * elf.c (_bfd_elf_print_private_bfd_data, bfd_elf_get_bfd_needed_list,
- _bfd_elf_make_section_from_phdr, elf_fake_sections,
- bfd_elf_set_group_contents, map_sections_to_segments,
- elf_sort_sections, assign_file_positions_for_segments,
- SECTION_SIZE, copy_private_bfd_data,
- _bfd_elf_get_dynamic_reloc_upper_bound,
- _bfd_elf_canonicalize_dynamic_reloc, elfcore_maybe_make_sect,
- _bfd_elfcore_make_pseudosection, elfcore_grok_prstatus,
- elfcore_grok_lwpstatus, elfcore_grok_win32pstatus,
- elfcore_grok_note, elfcore_grok_nto_status, elfcore_grok_nto_gregs,
- _bfd_elf_rel_local_sym, _bfd_elf_get_synthetic_symtab): ..
- * elf32-arm.h (bfd_elf32_arm_allocate_interworking_sect,
- bfd_elf32_arm_process_before_allocation,
- elf32_arm_adjust_dynamic_symbol, allocate_dynrelocs,
- elf32_arm_size_dynamic_sections, elf32_arm_finish_dynamic_sections,
- elf32_arm_write_section): ..
- * elf32-cris.c (cris_elf_grok_prstatus,
- elf_cris_finish_dynamic_sections, cris_elf_gc_sweep_hook,
- elf_cris_adjust_gotplt_to_got, elf_cris_adjust_dynamic_symbol,
- cris_elf_check_relocs, elf_cris_size_dynamic_sections,
- elf_cris_discard_excess_dso_dynamics,
- elf_cris_discard_excess_program_dynamics): ..
- * elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): ..
- * elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): ..
- * elf32-frv.c (_frvfdpic_add_dyn_reloc, _frvfdpic_add_rofixup,
- _frv_create_got_section, _frvfdpic_assign_plt_entries,
- elf32_frvfdpic_size_dynamic_sections,
- elf32_frvfdpic_modify_segment_map,
- elf32_frvfdpic_finish_dynamic_sections): ..
- * elf32-h8300.c (elf32_h8_relax_section, elf32_h8_relax_delete_bytes,
- elf32_h8_get_relocated_section_contents): ..
- * elf32-hppa.c (hppa_build_one_stub, hppa_size_one_stub,
- elf32_hppa_adjust_dynamic_symbol, allocate_plt_static,
- allocate_dynrelocs, elf32_hppa_size_dynamic_sections, group_sections,
- elf32_hppa_size_stubs, elf32_hppa_set_gp, elf32_hppa_build_stubs,
- elf32_hppa_finish_dynamic_sections): ..
- * elf32-i370.c (i370_elf_adjust_dynamic_symbol,
- i370_elf_size_dynamic_sections, i370_elf_check_relocs,
- i370_elf_finish_dynamic_sections): ..
- * elf32-i386.c (elf_i386_grok_prstatus, elf_i386_adjust_dynamic_symbol,
- allocate_dynrelocs, elf_i386_size_dynamic_sections,
- elf_i386_relocate_section, elf_i386_finish_dynamic_sections): ..
- * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc,
- i860_howto_highadj_reloc, i860_howto_splitn_reloc): ..
- * elf32-ip2k.c (ip2k_is_switch_table_128,
- ip2k_relax_switch_table_128, ip2k_is_switch_table_256,
- ip2k_relax_switch_table_256, ip2k_elf_relax_section,
- adjust_all_relocations, ip2k_elf_relax_delete_bytes): ..
- * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc,
- m32r_elf_generic_reloc, m32r_elf_adjust_dynamic_symbol,
- allocate_dynrelocs, m32r_elf_size_dynamic_sections,
- m32r_elf_relocate_section, m32r_elf_finish_dynamic_sections,
- m32r_elf_relax_section, m32r_elf_relax_delete_bytes,
- m32r_elf_get_relocated_section_contents): ..
- * elf32-m68hc11.c (m68hc11_elf_build_one_stub,
- m68hc11_elf_size_one_stub, m68hc11_elf_relax_section,
- m68hc11_elf_relax_delete_bytes): ..
- * elf32-m68hc12.c (m68hc12_elf_build_one_stub,
- m68hc12_elf_size_one_stub): ..
- * elf32-m68hc1x.c (elf32_m68hc11_size_stubs,
- elf32_m68hc11_build_stubs, m68hc11_elf_special_reloc): ..
- * elf32-m68k.c (elf_m68k_check_relocs, elf_m68k_gc_sweep_hook,
- elf_m68k_adjust_dynamic_symbol, elf_m68k_size_dynamic_sections,
- elf_m68k_discard_copies, elf_m68k_finish_dynamic_sections): ..
- * elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc,
- elf32_mips_grok_prstatus): ..
- * elf32-or32.c (or32_elf_consth_reloc): ..
- * elf32-ppc.c (ppc_elf_relax_section, ppc_elf_addr16_ha_reloc,
- elf_create_pointer_linker_section, ppc_elf_create_linker_section,
- ppc_elf_additional_program_headers, ppc_elf_adjust_dynamic_symbol,
- allocate_dynrelocs, ppc_elf_size_dynamic_sections,
- ppc_elf_finish_dynamic_sections, ppc_elf_grok_prstatus,
- ppc_elf_final_write_processing): ..
- * elf32-s390.c (s390_elf_ldisp_reloc, elf_s390_adjust_dynamic_symbol,
- allocate_dynrelocs, elf_s390_size_dynamic_sections,
- elf_s390_finish_dynamic_sections, elf_s390_grok_prstatus): ..
- * elf32-sh.c (sh_elf_reloc_loop, sh_elf_relax_section,
- sh_elf_relax_delete_bytes, sh_elf_align_loads,
- sh_elf_adjust_dynamic_symbol, allocate_dynrelocs,
- sh_elf_size_dynamic_sections, sh_elf_get_relocated_section_contents,
- sh_elf_finish_dynamic_sections, elf32_shlin_grok_prstatus): ..
- * elf32-sh64-com.c (sh64_address_in_cranges,
- sh64_get_contents_type): ..
- * elf32-sh64.c (sh64_find_section_for_address,
- sh64_elf_final_write_processing): ..
- * elf32-sparc.c (sparc_elf_wdisp16_reloc, sparc_elf_hix22_reloc,
- sparc_elf_lox10_reloc, elf32_sparc_adjust_dynamic_symbol,
- allocate_dynrelocs, elf32_sparc_size_dynamic_sections,
- elf32_sparc_relocate_section, elf32_sparc_finish_dynamic_sections): ..
- * elf32-v850.c (v850_elf_reloc, v850_elf_relax_section): ..
- * elf32-vax.c (elf_vax_check_relocs, elf_vax_adjust_dynamic_symbol,
- elf_vax_size_dynamic_sections, elf_vax_discard_copies,
- elf_vax_instantiate_got_entries, elf_vax_relocate_section,
- elf_vax_finish_dynamic_sections): ..
- * elf32-xstormy16.c (xstormy16_elf_24_reloc,
- xstormy16_elf_check_relocs, xstormy16_relax_plt_check,
- xstormy16_elf_relax_section, xstormy16_elf_always_size_sections,
- xstormy16_elf_finish_dynamic_sections): ..
- * elf32-xtensa.c (xtensa_read_table_entries,
- elf_xtensa_allocate_got_size, elf_xtensa_allocate_local_got_size,
- elf_xtensa_size_dynamic_sections, elf_xtensa_do_reloc,
- bfd_elf_xtensa_reloc, elf_xtensa_relocate_section,
- elf_xtensa_combine_prop_entries, elf_xtensa_finish_dynamic_sections,
- elf_xtensa_discard_info_for_section, elf_xtensa_grok_prstatus,
- get_relocation_opcode, retrieve_contents, find_relaxable_sections,
- collect_source_relocs, is_resolvable_asm_expansion, remove_literals,
- relax_section, shrink_dynamic_reloc_sections, relax_property_section,
- xtensa_callback_required_dependence): ..
- * elf64-alpha.c (elf64_alpha_reloc_gpdisp, elf64_alpha_relax_section,
- elf64_alpha_check_relocs, elf64_alpha_adjust_dynamic_symbol,
- elf64_alpha_calc_got_offsets_for_symbol, elf64_alpha_calc_got_offsets,
- elf64_alpha_size_plt_section, elf64_alpha_size_plt_section_1,
- elf64_alpha_always_size_sections, elf64_alpha_calc_dynrel_sizes,
- elf64_alpha_size_rela_got_section, elf64_alpha_size_rela_got_1,
- elf64_alpha_size_dynamic_sections, elf64_alpha_emit_dynrel,
- elf64_alpha_finish_dynamic_sections, elf64_alpha_final_link): ..
- * elf64-hppa.c (allocate_dynrel_entries,
- elf64_hppa_size_dynamic_sections,
- elf64_hppa_finish_dynamic_sections): ..
- * elf64-mips.c (mips_elf64_gprel32_reloc, mips16_gprel_reloc,
- mips_elf64_canonicalize_dynamic_reloc, mips_elf64_slurp_reloc_table,
- elf64_mips_grok_prstatus): ..
- * elf64-mmix.c (mmix_elf_perform_relocation, mmix_elf_reloc,
- mmix_elf_relocate_section, mmix_elf_final_link,
- mmix_set_relaxable_size, _bfd_mmix_after_linker_allocation,
- mmix_elf_relax_section, mmix_elf_get_section_contents): ..
- * elf64-ppc.c (ppc64_elf_object_p, ppc64_elf_grok_prstatus,
- ppc64_elf_check_relocs, ppc64_elf_func_desc_adjust,
- ppc64_elf_adjust_dynamic_symbol, ppc64_elf_edit_opd,
- allocate_dynrelocs, ppc64_elf_size_dynamic_sections,
- ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_next_toc_section,
- toc_adjusting_stub_needed, group_sections, ppc64_elf_size_stubs,
- ppc64_elf_build_stubs, ppc64_elf_relocate_section,
- ppc64_elf_finish_dynamic_sections): ..
- * elf64-s390.c (s390_elf_ldisp_reloc, elf_s390_adjust_dynamic_symbol,
- allocate_dynrelocs, elf_s390_size_dynamic_sections,
- elf_s390_finish_dynamic_sections): ..
- * elf64-sh64.c (sh_elf64_get_relocated_section_contents,
- sh_elf64_check_relocs, sh64_elf64_adjust_dynamic_symbol,
- sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections,
- sh64_elf64_finish_dynamic_sections): ..
- * elf64-sparc.c (sparc64_elf_slurp_reloc_table, init_insn_reloc,
- sparc64_elf_check_relocs, sparc64_elf_adjust_dynamic_symbol,
- sparc64_elf_size_dynamic_sections, sparc64_elf_relocate_section,
- sparc64_elf_finish_dynamic_symbol,
- sparc64_elf_finish_dynamic_sections): ..
- * elf64-x86-64.c (elf64_x86_64_grok_prstatus,
- elf64_x86_64_adjust_dynamic_symbol, allocate_dynrelocs,
- elf64_x86_64_size_dynamic_sections, elf64_x86_64_relocate_section,
- elf64_x86_64_finish_dynamic_sections): ..
- * elfarm-nabi.c (elf32_arm_nabi_grok_prstatus): ..
- * elfcode.h (elf_slurp_reloc_table): ..
- * elflink.c (_bfd_elf_create_got_section, elf_add_dt_needed_tag,
- elf_finalize_dynstr, elf_link_add_object_symbols,
- bfd_elf_size_dynamic_sections, elf_link_sort_relocs,
- elf_link_input_bfd, bfd_elf_final_link, bfd_elf_discard_info): ..
- * elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc,
- elf32_mips_grok_prstatus): ..
- * elfxx-ia64.c (elfNN_ia64_relax_section, allocate_dynrel_entries,
- elfNN_ia64_size_dynamic_sections, elfNN_ia64_install_dyn_reloc,
- elfNN_ia64_choose_gp, elfNN_ia64_final_link,
- elfNN_ia64_finish_dynamic_sections): ..
- * elfxx-mips.c (mips_elf_create_procedure_table,
- mips_elf_check_mips16_stubs, _bfd_mips_elf_gprel16_with_gp,
- _bfd_mips_elf_hi16_reloc, _bfd_mips_elf_generic_reloc,
- mips_elf_global_got_index, mips_elf_multi_got,
- mips_elf_create_compact_rel_section, mips_elf_calculate_relocation,
- mips_elf_allocate_dynamic_relocations,
- mips_elf_create_dynamic_relocation, _bfd_mips_elf_fake_sections,
- _bfd_mips_relax_section, _bfd_mips_elf_adjust_dynamic_symbol,
- _bfd_mips_elf_always_size_sections,
- _bfd_mips_elf_size_dynamic_sections,
- _bfd_mips_elf_finish_dynamic_symbol,
- _bfd_mips_elf_finish_dynamic_sections,
- _bfd_mips_elf_modify_segment_map, _bfd_mips_elf_discard_info,
- _bfd_mips_elf_write_section, _bfd_mips_elf_set_section_contents,
- _bfd_elf_mips_get_relocated_section_contents,
- _bfd_mips_elf_final_link, _bfd_mips_elf_merge_private_bfd_data): ..
- * hp300hpux.c (callback): ..
- * hppabsd-core.c (make_bfd_asection): ..
- * hpux-core.c (make_bfd_asection): ..
- * i386linux.c (linux_link_create_dynamic_sections,
- bfd_i386linux_size_dynamic_sections, linux_finish_dynamic_link): ..
- * i386msdos.c (msdos_write_object_contents): ..
- * i386os9k.c (os9k_callback, os9k_write_object_contents,
- os9k_set_section_contents): ..
- * ieee.c (parse_expression, ieee_slurp_external_symbols,
- ieee_slurp_sections, ieee_slurp_debug, ieee_slurp_section_data,
- ieee_write_section_part, do_with_relocs, do_as_repeat,
- do_without_relocs, ieee_write_debug_part, init_for_output,
- ieee_set_section_contents): ..
- * ihex.c (ihex_scan, ihex_read_section, ihex_get_section_contents): ..
- * irix-core.c (do_sections, make_bfd_asection): ..
- * libaout.h (aout_section_merge_with_text_p): ..
- * libbfd.c (_bfd_generic_get_section_contents,
- _bfd_generic_get_section_contents_in_window): ..
- * linker.c (default_indirect_link_order): ..
- * lynx-core.c (make_bfd_asection): ..
- * m68klinux.c (linux_link_create_dynamic_sections,
- bfd_m68klinux_size_dynamic_sections, linux_finish_dynamic_link): ..
- * mach-o.c (bfd_mach_o_make_bfd_section,
- bfd_mach_o_scan_read_dylinker, bfd_mach_o_scan_read_dylib,
- bfd_mach_o_scan_read_thread, bfd_mach_o_scan_read_symtab,
- bfd_mach_o_scan_read_segment): ..
- * merge.c (_bfd_add_merge_section, record_section, merge_strings,
- _bfd_merge_sections): ..
- * mmo.c (mmo_find_sec_w_addr, mmo_get_spec_section, mmo_get_loc,
- mmo_map_set_sizes, mmo_canonicalize_symtab,
- mmo_internal_write_section, mmo_write_object_contents): ..
- * netbsd-core.c (netbsd_core_file_p): ..
- * nlm32-alpha.c (nlm_alpha_read_reloc, nlm_alpha_write_import,
- nlm_alpha_set_public_section): ..
- * nlm32-ppc.c (nlm_powerpc_read_reloc, nlm_powerpc_write_reloc): ..
- * nlm32-sparc.c (nlm_sparc_write_import): ..
- * nlmcode.h (add_bfd_section, nlm_swap_auxiliary_headers_in,
- nlm_compute_section_file_positions): ..
- * oasys.c (oasys_object_p, oasys_slurp_section_data,
- oasys_write_sections, oasys_write_data, oasys_set_section_contents): ..
- * opncls.c (get_debug_link_info): ..
- * osf-core.c (make_bfd_asection): ..
- * pdp11.c (some_aout_object_p, adjust_o_magic, adjust_z_magic,
- adjust_n_magic, adjust_sizes_and_vmas, squirt_out_relocs,
- final_link, aout_link_input_section): ..
- * peXXigen.c (_bfd_XXi_swap_sym_in, _bfd_XXi_swap_aouthdr_out,
- pe_print_idata, pe_print_edata, pe_print_pdata, pe_print_reloc): ..
- * pef.c (bfd_pef_make_bfd_section, bfd_pef_print_loader_section,
- bfd_pef_scan_start_address, bfd_pef_parse_symbols): ..
- * ppcboot.c (ppcboot_object_p, ppcboot_canonicalize_symtab): ..
- * ptrace-core.c (ptrace_unix_core_file_p): ..
- * reloc.c (bfd_perform_relocation, bfd_install_relocation,
- _bfd_final_link_relocate, bfd_generic_relax_section,
- bfd_generic_get_relocated_section_contents): ..
- * reloc16.c (bfd_coff_reloc16_relax_section,
- bfd_coff_reloc16_get_relocated_section_c): ..
- * riscix.c (riscix_some_aout_object_p): ..
- * rs6000-core.c (read_hdr, make_bfd_asection): ..
- * sco5-core.c (make_bfd_asection): ..
- * simple.c (bfd_simple_get_relocated_section_contents): ..
- * som.c (som_object_setup, setup_sections, som_prep_headers,
- som_write_fixups, som_begin_writing, bfd_section_from_som_symbol,
- som_set_reloc_info, som_get_section_contents,
- som_bfd_link_split_section): ..
- * sparclinux.c (linux_link_create_dynamic_sections,
- bfd_sparclinux_size_dynamic_sections, linux_finish_dynamic_link): ..
- * srec.c (srec_scan, srec_read_section, srec_get_section_contents): ..
- * stabs.c (_bfd_link_section_stabs, _bfd_discard_section_stabs,
- _bfd_write_stab_strings, _bfd_stab_section_offset): ..
- * sunos.c (sunos_read_dynamic_info, sunos_create_dynamic_sections,
- bfd_sunos_size_dynamic_sections, sunos_scan_std_relocs,
- sunos_scan_ext_relocs, sunos_scan_dynamic_symbol,
- sunos_write_dynamic_symbol, sunos_check_dynamic_reloc,
- sunos_finish_dynamic_link): ..
- * syms.c (_bfd_stab_section_find_nearest_line): ..
- * tekhex.c (first_phase, tekhex_set_section_contents,
- tekhex_write_object_contents): ..
- * trad-core.c (trad_unix_core_file_p): ..
- * versados.c (process_esd, process_otr, process_otr): ..
- * vms-gsd.c (_bfd_vms_slurp_gsd, _bfd_vms_write_gsd): ..
- * vms-misc.c (add_new_contents): ..
- * vms-tir.c (check_section, new_section, _bfd_vms_write_tir): ..
- * vms.c (vms_set_section_contents): ..
- * xcofflink.c (xcoff_get_section_contents, xcoff_link_add_symbols,
- xcoff_sweep, bfd_xcoff_size_dynamic_sections, xcoff_build_ldsyms,
- _bfd_xcoff_bfd_final_link, xcoff_link_input_bfd): ..
- * xsym.c (bfd_sym_scan): .. See above.
-
-2004-06-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_section): Add addend when
- calling _bfd_merged_section_offset only for section symbols.
-
-2004-06-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-ppc.c (ppc_elf_relax_section): Implement reference code
- for handling SEC_MERGE symbols in relax_section.
-
-2004-06-21 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-05-15 Richard Sandiford <rsandifo at redhat.com>
- * cpu-h8300.c (compatible): Allow h8300s and h8300sx code to be
- linked together. Mark the result as h8300sx code.
-
-2004-06-21 Alexandre Oliva <aoliva at redhat.com>
-
- * elf-bfd.h (struct elf_backend_data): Added
- elf_backend_omit_section_dynsym.
- (_bfd_elf_link_omit_section_dynsym): Declare.
- * elf32-frv.c (_frvfdpic_link_omit_section_dynsym): New.
- (elf_backend_omit_section_dynsym): Use it for frvfdpic.
- * elflink.c (_bfd_elf_link_omit_section_dynsym): Split out of...
- (_bfd_elf_link_renumber_dynsyms): ... this function.
- * elfxx-target.h (elf_backend_omit_section_dynsym): Default to
- _bfd_elf_link_omit_section_dynsym).
- (elfNN_bed): Added elf_backend_omit_section_dynsym.
-
-2004-06-21 Nick Clifton <nickc at redhat.com>
-
- * coffcode.h (styp_to_sec_flags): Ignore IMAGE_SCN_MEM_NOT_PAGED
- flags.
-
-2004-06-17 Jerome Guitton <guitton at gnat.com>
-
- * bfd-in.h (bfd_cache_close_all): New function declaration.
- * bfd-in2.h: Regenerate.
- * cache.c (bfd_cache_close_all): New function definition.
-
-2004-06-16 Mark Kettenis <kettenis at gnu.org>
-
- * configure.in: Don't set COREFILE to trad-core.lo for FreeBSD
- 4.10 and beyond.
+ * Makefile.am: Add xc16x related entry
+ * Makefile.in: Regenerate
+ * archures.c: Add bfd_xc16x_arch
+ * bfd-in2.h: Regenerate
+ * config.bfd: Add xc16x-*-elf
+ * configure.in: Add bfd_elf32_xc16x_vec
* configure: Regenerate.
+ * targets.c: Added xc16x related information
+ * cpu-xc16x.c: New file
+ * reloc.c: Add new relocations specific to xc16x:
+ BFD_RELOC_XC16X_PAG, BFD_RELOC_XC16X_POF, BFD_RELOC_XC16X_SEG,
+ BFD_RELOC_XC16X_SOF
+ * elf32-xc16x.c: New file.
-2004-06-16 Daniel Jacobowitz <dan at debian.org>
+2006-02-17 Alan Modra <amodra at bigpond.net.au>
- * elf32-ppc.c (ppc_elf_create_linker_section): Create symbols in
- the pre-existing section.
+ * elf32-ppc.c (allocate_dynrelocs): Tweak undef weak handling.
+ * elf64-ppc.c (allocate_dynrelocs): Likewise.
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
+2006-02-17 Alan Modra <amodra at bigpond.net.au>
- * section.c (struct sec): Remove usused flags. Reorganize a little.
- (bfd_get_section_size_before_reloc): Delete.
- (bfd_get_section_size_after_reloc): Delete.
- (STD_SECTION): Update.
- (bfd_get_section_size_now): Delete.
- (bfd_set_section_contents): Don't referece reloc_done.
- (bfd_get_section_contents): Remove reloc_done comment.
- * bout.c (b_out_bfd_get_relocated_section_contents): Don't set
- reloc_done.
- * coff-alpha.c (alpha_ecoff_get_relocated_section_contents): Likewise.
- * ecoff.c (bfd_debug_section): Update initializer.
- * elfxx-mips.c (_bfd_elf_mips_get_relocated_section_contents): Ditto.
- * reloc.c (bfd_generic_get_relocated_section_contents): Likewise.
- * bfd-in.h (bfd_section_size): Expand.
- (bfd_get_section_size): New macro.
- * bfd-in2.h: Regenerate.
- * coff64-rs6000.c (xcoff64_write_object_contents): Replace
- bfd_get_section_size_before_reloc with bfd_get_section_size.
- * coffcode.h (coff_write_object_contents): Likewise.
- * coffgen.c (build_debug_section): Likewise.
- * dwarf1.c (parse_line_table): Likewise.
- (_bfd_dwarf1_find_nearest_line): Likewise.
- * ecoff.c (_bfd_ecoff_write_object_contents): Likewise.
- * i386msdos.c (msdos_write_object_contents): Likewise.
- * pdp11.c (squirt_out_relocs): Likewise.
- * elf32-sh64.c (sh64_find_section_for_address): Remove comment.
- * elf64-mmix.c (mmix_elf_final_link): Update comment.
+ PR ld/2218
+ * elf64-ppc.c (allocate_dynrelocs): Ensure undef weak sym is
+ dynamic.
+ (ppc64_elf_relocate_section): Check output reloc section size.
+ * elf32-ppc.c (allocate_dynrelocs): Simplify undef weak test.
-2004-06-14 Chris Demetriou <cgd at broadcom.com>
+2006-02-16 H.J. Lu <hongjiu.lu at intel.com>
- * elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
- removal) with updated comment.
- (bfd_elf32_bfd_reloc_type_lookup): Add back case for
- BFD_RELOC_32_PCREL.
- (mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
- * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
+ PR ld/2322
+ * elf.c (get_segment_type): New function.
+ (_bfd_elf_print_private_bfd_data): Use it.
+ (print_segment_map): New function.
+ (assign_file_positions_for_segments): Call print_segment_map
+ when there are not enough room for program headers.
-2004-06-12 Alan Modra <amodra at bigpond.net.au>
+2006-02-16 Nick Hudson <nick.hudson at dsl.pipex.com>
- * elf64-x86-64.c (elf64_x86_64_relocate_section): Ignore reloc
- overflow on branches to undefweaks.
+ * config.bfd (mips*el-*-netbsd*, mips*-*-netbsd*): Use
+ traditional MIPS ELF targets.
-2004-06-11 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+2006-02-15 H.J. Lu <hongjiu.lu at intel.com>
- * coff-alpha.c (alpha_relocate_section): Set used_by_bfd directly
- as ecoff_section_data() does not return a valid lvalue.
+ PR binutils/2338
+ * dwarf2.c (check_function_name): New function.
+ (_bfd_dwarf2_find_nearest_line): Use check_function_name to
+ check if function is correct.
-2004-06-09 Alexandre Oliva <aoliva at redhat.com>
+2006-02-16 Alan Modra <amodra at bigpond.net.au>
- * elflink.c (elf_sort_symbol): Compare section id, not pointers.
- (elf_link_add_object_symbols): Likewise.
+ * elflink.c (_bfd_elf_default_action_discarded): Return 0 for
+ debug sections.
+ (elf_link_input_bfd): Adjust comments.
- * elf-m10300.c (_bfd_mn10300_elf_reloc_type_class): New.
- (elf_backend_reloc_type_class): New.
+2006-02-10 H.J. Lu <hongjiu.lu at intel.com>
-2004-06-08 Mark Kettenis <kettenis at gnu.org>
+ * elf.c (copy_private_bfd_data): Minor update.
- * configure.in (hppa*-*-netbsd*, hppa*-*-openbsd): Set COREFILE to
- netbsd-core.lo.
- * configure: Regenerate.
+2006-02-10 H.J. Lu <hongjiu.lu at intel.com>
-2004-06-07 Daniel Jacobowitz <dan at debian.org>
+ PR binutils/2258
+ * elf.c (copy_private_bfd_data): Renamed to ...
+ (rewrite_elf_program_header): This.
+ (copy_elf_program_header): New function.
+ (copy_private_bfd_data): Likewise.
- From: Albert Chin-A-Young <china at thewrittenword.com>
- * bfd/elf-bfd.h (struct eh_cie_fde): Convert unsigned char bitfields
- to unsigned int.
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
-2004-05-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_section): Undo the last
- change.
-
-2004-05-28 DJ Delorie <dj at redhat.com>
-
- * elf-m10300.c (mn10300_elf_relax_section): Preserve reloc addend
- for linking, but otherwise adjust reloc for merged sections.
-
-2004-05-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_section): Properly call
- _bfd_merged_section_offset for local symbols.
-
-2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * Makefile.am: Regenerate dependencies.
- * Makefile.in: Regenerate.
- * archures.c: Add bfd_mach_sh3_nommu .
- * bfd-in2.h: Regenerate.
- * cpu-sh.c: Add sh3-nommu architecture.
- (bfd_to_arch_table): Create new table.
- (sh_get_arch_from_bfd_mach): Create new function.
- (sh_get_arch_up_from_bfd_mach): Create new function.
- (sh_merge_bfd_arch): Create new function.
- * elf32-sh.c (sh_ef_bfd_table): Add table.
- (sh_elf_check_relocs): Replace switch statement with
- use of sh_ef_bfd_table .
- (sh_elf_get_flags_from_mach): Add new function.
- (sh_find_elf_flags): Likewise.
- (sh_elf_copy_private_data): Replace most of non-elf contents
- with a call to sh_merge_bfd_arch() .
-
-2004-05-27 Michael Chastain <mec.gnu at mindspring.com>
-
- * Makefile.am (bfdver.h): Use explicit filename, not $< .
- * Makefile.in: Regenerate.
-
-2004-05-27 Alexandre Oliva <aoliva at redhat.com>
-
- * elf-m10300.c (elf32_mn10300_finish_hash_table_entry): Avoid
- custom calling conventions for dynamic symbols.
- (mn10300_elf_relax_section): Avoid relaxing a function as a local
- symbol if it's an alias to a global one.
-
-2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (_bfd_elf_make_section_from_shdr): Undo the last
- change.
-
-2004-05-27 Alexandre Oliva <aoliva at redhat.com>
-
- * elf-m10300.c (mn10300_elf_relax_section): Don't test isym within
- loop over hashes.
-
-2004-05-26 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (_bfd_elf_make_section_from_shdr): Don't set SEC_EXCLUDE
- for SHT_GROUP sections.
-
-2004-05-25 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_add_object_symbols): Don't set up merge
- section data here..
- * elf.c (_bfd_elf_merge_sections): .. Do it here instead.
- * merge.c: Formatting. Remove unnecessary casts. Expand
- bfd_get_section_alignment macro.
- (struct sec_merge_sec_info): Rename "first" to "first_str". Update
- use throughout file.
- (_bfd_add_merge_section): Rename from _bfd_merge_section. Update
- comment. Abort on dynamic or non-SEC_MERGE input. Don't test
- section name to determine sinfo group, instead test output section
- and alignment.
- (_bfd_merge_sections): Add struct bfd_link_info param. Call
- _bfd_strip_section_from_output rather than just twiddling flags.
- * libbfd-in.h (_bfd_add_merge_section): Rename, update comment.
- (_bfd_merge_sections): Update prototype.
- * libbfd.h: Regenerate.
-
-2004-05-24 Mark Kettenis <kettenis at gnu.org>
-
- * netbsd-core.c: Correctly indent section that sets architecture
- from machine ID.
-
- From Miod Vallat <miod at online.fr>:
- * m88kopenbsd.c: New file.
- * targets.c (m88k_openbsd_vec): New.
- * config.bfd: Add m88k-*-openbsd*.
- * configure.in (m88k-*-openbsd*): Set COREFILE to netbsd-core.lo.
- (m88kopenbsd_vec): New.
- * configure: Regenerate.
- * Makefile.am (BFD32_BACKENDS): Add m88kopenbsd.lo.
- (BFD32_BACKENDS_CFILES): Add m88kopenbsd.c.
- Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/SRC-POTFILES.in: Regenerate.
-
-2004-05-24 Nick Clifton <nickc at redhat.com>
-
- * hash.c: Remove bogus node "Changing the default Hash Table Size"
- introduced by hash table size patch.
-
-2004-05-22 Ben Elliston <bje at au.ibm.com>
-
- * configure.in (is_release): Remove.
- (bfd_version_date, bfd_version, bfd_version_string): Likewise.
- (AC_OUTPUT): Don't output bfdver.h from version.h.
- * configure: Regenerate.
- * Makefile.am (RELEASE): New variable.
- (bfdver.h): New target.
- * Makefile.in: Regenerate.
- * doc/Makefile.in: Likewise.
-
-2004-05-22 Ben Elliston <bje at au.ibm.com>
-
- * Makefile.am (config.status): Don't depend on version.h.
- * Makefile.in: Regenerate.
-
-2004-05-22 Alan Modra <amodra at bigpond.net.au>
-
- * merge.c (_bfd_merged_section_offset): Remove "addend" param.
- * libbfd-in.h (_bfd_merged_section_offset): Adjust prototype.
- * libbfd.h: Regenerate.
- * elf.c (_bfd_elf_rela_local_sym): Adjust call.
- (_bfd_elf_rel_local_sym): Likewise.
- * elflink.c (_bfd_elf_link_sec_merge_syms): Likewise.
- (elf_link_input_bfd): Likewise.
- * elf32-ppc.c (ppc_elf_relax_section): Likewise.
- * elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
- * elfxx-ia64.c (elfNN_ia64_relax_section): Likewise.
- (elfNN_ia64_relocate_section): Likewise.
-
-2004-05-21 Andy Chittenden <achittenden at bluearc.com>
-
- * hash.c (bfd_default_hash_table_size): New variable.
- (bfd_hash_table_init): Use new variable instead of DEFAULT_SIZE.
- (bfd_hash_set_default_size): New function. Set the default size
- to a selected prime number close to the argument. Document new
- function.
- * bfd-in.h: Add prototype for bfd_hash_set_default_size.
- * bfd-in2.h: Regenerate.
- * Makefile.am (hash.lo): Add dependency upon libiberty.h.
- * Makefile.in: Regenerate.
-
-2004-05-21 Mark Kettenis <kettenis at gnu.org>
-
- * libaout.h (machine_type): Add M_88K_OPENBSD and M_HPPA_OPENBSD.
- * netbsd-core.c (netbsd_core_file_p): Set architecture for alpha,
- arm, m68k, m88k and hppa core files.
-
-2004-05-21 Nick Clifton <nickc at redhat.com>
-
- * bfdio.c (bfd_bread): Do not use iovec if it is NULL.
- (bfd_bwrite): Likewise.
- (bfd_tell): Likewise.
- (bfd_flush): Likewise.
- (bfd_stat): Likewise.
- (bfd_seek): Likewise.
- (bfd_get_mtime): Likewise.
- (bfd_get_size): Likewise.
-
-2004-05-19 Ben Elliston <bje at au.ibm.com>
-
- * dwarf2.c (_bfd_dwarf2_find_nearest_line): Comment correction.
-
-2004-05-19 Mikulas Patocka <mikulas at artax.karlin.mff.cuni.cz>
-
- * archive.c (_bfd_get_elt_at_filepos): Cope with a nested archives.
- (bfd_generic_openr_next_archived_file): Likewise.
-
-2004-05-17 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (xtensa_get_property_section_name): Determine linkonce
- section names by inserting a new substring after .gnu.linkonce, except
- for .gnu.linkonce.t.* where the "t." is replaced.
-
-2004-05-17 Adam Nemet <anemet at lnxw.com>
-
- * config.bfd (sparc-*-lynxos* case): Add to obsolete list.
- (m68-*-lynxos* case): Likewise.
- (powerpc-*-lyxnos* case): New case.
- (i[3-7]86-*-lynxos* case): Update to LynxOS 4.0 ELF.
-
-2004-05-17 David Heine <dlheine at tensilica.com>
-
- * aout-target.h (MY_bfd_copy_private_header_data): Define.
- * aout-tic30.c (MY_bfd_copy_private_header_data): Define.
- * bfd.c (bfd_copy_private_header_data): Define.
- * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Add entries for new
- interface.
- * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
- * coffcode.h (coff_bfd_copy_private_header_data): Define.
- * elf-bfd.h (_bfd_elf_copy_private_header_data): Declare.
- * elf.c (_bfd_elf_copy_private_section_data): Remove code to set up
- segments by calling copy_private_bfd_data.
- (_bfd_elf_copy_private_header_data): Define.
- * elfxx-target.h (bfd_elfNN_bfd_copy_private_header_data): Define.
- * libbfd-in.h (_bfd_generic_bfd_copy_private_header_data): Define.
- * libecoff.h (_bfd_ecoff_bfd_copy_private_header_data): Define.
- * mach-o.c (bfd_mach_o_bfd_copy_private_header_data): Define.
- * mmo.c (mmo_bfd_copy_private_header_data): Define.
- * ppcboot.c (ppcboot_bfd_copy_private_header_data): Define.
- * som.c (som_bfd_copy_private_header_data): Define.
- * targets.c (BFD_JUMP_TABLE_COPY): Add _bfd_copy_private_header_data.
- * vms.c (vms_bfd_copy_private_header_data): Define.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
-
-2004-05-15 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * elfxx-mips.c (MINUS_TWO): Define.
- (mips_elf_higher, mips_elf_highest,
- mips_elf_create_dynamic_relocation): Use MINUS_ONE and MINUS_TWO for
- some bfd_vma values.
- (_bfd_mips_elf_finish_dynamic_symbol): Likewise. Code cleanup.
-
-2004-05-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * som.c (log2): Rename to exact_log2. Adjust all callers.
-
-2004-05-13 Paul Brook <paul at codesourcery.com>
-
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Handle
- dwarf3 format CIE entries. Remove comment about the size of the
- ra_column field. It is now correctly deduced.
-
-2004-05-13 Joel Sherrill <joel at oarcorp.com>
-
- * config.bfd (or32-*-rtems*): Switch to elf.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-05-11 Jakub Jelinek <jakub at redhat.com>
-
- * elflink.c (bfd_elf_final_link): Don't output STT_SECTION symbol
- into .dynsym if elf_section_data (sec)->dynindx <= 0.
- Adjust counting of last_local.
- (_bfd_elf_link_renumber_dynsyms): Don't assign dynindx to sections
- other than SHT_PROGBITS/SHT_NOBITS and neither for .got/.got.plt/.plt
- created by the linker nor !SHF_ALLOC.
-
- * elf32-i386.c (elf_i386_finish_dynamic_sections): Point
- DT_PLTGOT to the start of the .got.plt section instead of the
- .got output section. Set sh_entsize for .got section in addition
- to .got.plt.
- (elf_i386_relocate_section): Don't assume _GLOBAL_OFFSET_TABLE_
- is at sgot->output_section->vma.
- * elf64-x86-64.c (elf64_x86_64_finish_dynamic_sections): Point
- DT_PLTGOT to the start of the .got.plt section instead of the
- .got output section.
- (elf64_x86_64_relocate_section): Don't assume _GLOBAL_OFFSET_TABLE_
- is at sgot->output_section->vma. Set sh_entsize for .got section
- in addition to .got.plt.
- * elf.c (_bfd_elf_print_private_bfd_data): Handle PT_GNU_RELRO.
- (bfd_section_from_phdr): Likewise.
- (map_sections_to_segments): Likewise.
- (assign_file_positions_for_segments): Likewise.
- (get_program_header_size): Likewise.
- * elflink.c (bfd_elf_size_dynamic_sections): Set
- elf_tdata (output_bfd)->relro from info->relro.
- * elf-bfd.h (struct elf_obj_tdata): Add relro field.
-
-2004-05-08 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (_frvfdpic_add_dyn_reloc): Don't warn when we get
- a zero symndx for which we hadn't accounted a dynamic relocation.
- (_frvfdpic_add_rofixup): Likewise.
-
-2004-05-07 Brian Ford <ford at vss.fsi.com>
- DJ Delorie <dj at redhat.com>
-
- * coffcode.h (coff_write_object_contents) [COFF_IMAGE_WITH_PE]:
- Propagate IMAGE_FILE_LARGE_ADDRESS_AWARE.
- * peXXigen.c (_bfd_XX_print_private_bfd_data_common): Recognize
- IMAGE_FILE_LARGE_ADDRESS_AWARE. Use PE defines.
-
-2004-05-07 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (elf32_frvfdpic_modify_segment_map): Return
- immediately if there's no link info.
- (elf32_frvfdpic_copy_private_bfd_data): New.
- (bfd_elf32_bfd_copy_private_bfd_data): Use it for frvfdpic.
-
-2004-05-06 Zack Weinberg <zack at codesourcery.com>
-
- * dwarf2.c (add_line_info): Also set info->filename to NULL if
- filename argument is null; do not call strlen on a null pointer.
-
-2004-05-06 Daniel Jacobowitz <drow at mvista.com>
-
- * elf32-arm.h (elf32_arm_relocate_section): Remove R_ARM_PLT32
- special case.
-
-2004-05-05 Alexandre Oliva <aoliva at redhat.com>
-
- * configure.in (bfd_elf32_frvfdpic_vec): New.
- * configure: Rebuilt.
- * targets.c (bfd_elf32_frvfdpic_vec): New.
- * config.bfd: Enable it on frv-*-elf and frv-*-*linux*, as default
- on the latter.
- * elf32-frv.c: Prefix all identifiers added for FDPIC support with
- frvfdpic instead of frv. Rearrange elf-target macros such that
- the FDPIC-specific ones are only defined for this new target
- vector.
- (bfd_elf32_frvfdpic_vec): Declare.
- (IS_FDPIC): New.
- (elf32_frv_relocate_section): Use it to enable segment checking
- and to control rofixup emission. Add output section vma to
- applied relocation in non-LOAD non-ALLOC sections. Use
- _bfd_error_handler for errors.
- (_frv_create_got_section): Create .rel.got and .rofixup only in
- FDPIC. Create non-dynamic _gp at .got+2048 in non-FDPIC, like the
- linker script.
- (elf32_frvfdpic_size_dynamic_sections): Assume FDPIC.
- (elf32_frvfdpic_modify_segment_map): Likewise.
- (elf32_frv_finish_dynamic_sections): New, do-nothing.
- (elf32_frvfdpic_finish_dynamic_sections): Assume FDPIC. Improve
- error message if we miscompute the rofixup size.
- (frvfdpic_elf_use_relative_eh_frame): Assume FDPIC.
- (frvfdpic_elf_encode_eh_address): Likewise.
- (elf32_frv_check_relocs): Reject FDPIC-only relocs in non-FDPIC.
- Record relocs only in FDPIC. Make sure _gp is defined for GPREL
- relocs. Reject unknown relocation types.
- (elf32_frv_object_p): Make sure target vector matches FDPIC bits.
- (frv_elf_merge_private_bfd_data): Likewise.
- (ELF_MAXPAGESIZE): Revert to 0x1000 for elf32-frv; keep it as
- 0x4000 for newly-added elf32-frvfdpic.
-
-2004-05-05 Nick Clifton <nickc at redhat.com>
-
- PR/136
- * cache.c (bfd_cache_lookup_worker): Call abort() rather than
- returning NULL as most users of this function do not check its
- return value.
- * hppabsd-core.c (hppabsd_core_core_file_p): Do not check result
- of bfd_cache_lookup().
- * sco5-core.c (sco5_core_file_p): Likewise.
- * trad-core.c (trad_unix_core_file_p): Likewise.
-
-2004-05-05 Nick Clifton <nickc at redhat.com>
-
- * cache.c (bfd_cache_lookup): Improve formatting.
- * archive.c: Fix formatting.
-
-2004-05-05 Peter Barada <peter at the-baradas.com>
-
- * bfd_archures.c(bfd_architecture): Add 521x,5249,547x,548x.
- * cpu-m68k.c(bfd_m68k_arch): Likewise.
- * bfd-in2.h(bfd_architecture): Regenerate.
-
-2004-05-03 Alan Modra <amodra at bigpond.net.au>
-
- * elf.c (_bfd_elf_rela_local_sym): Set kept_section for excluded
- SEC_MERGE sections.
- * elflink.c (elf_link_input_bfd): Adjust output reloc index for
- those against discarded link-once and SEC_MERGE section symbols.
-
-2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * section.c (bfd_get_section_by_name_if): New.
- * bfd-in2.h: Regenerated.
-
-2004-05-02 Alan Modra <amodra at bigpond.net.au>
-
- * som.c (som_bfd_is_group_section): Define.
-
-2004-05-01 Alan Modra <amodra at bigpond.net.au>
-
- * section.c (bfd_make_section_anyway): Copy the whole
- bfd_hash_entry, not just "next" from existing entry.
-
-2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf.c (bfd_section_from_shdr): Maintain the section order in
- a section group.
- (special_sections): Add ".note.GNU-stack".
- (elf_fake_sections): Handle section group for relocatable
- link..
-
-2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * section.c (bfd_sections_find_if): New.
- * bfd-in2.h: Regenerated.
-
-2004-04-30 Alan Modra <amodra at bigpond.net.au>
-
- * section.c (bfd_make_section_anyway): Add all sections to hash tab.
-
- * elf-bfd.h (bfd_elf_is_group_section): Declare.
- * elf.c (bfd_elf_is_group_section): New function.
- * elfxx-target.h (bfd_elfNN_bfd_is_group_section
- * section.c (bfd_generic_is_group_section): New function.
- * targets.c (struct bfd_target): Add _bfd_is_group_section field.
- (BFD_JUMP_TABLE_LINK): Adjust.
- * aout-adobe.c (aout_32_bfd_is_group_section): Define.
- * aout-target.h (MY_bfd_is_group_section): Define.
- * aout-tic30.c (MY_bfd_is_group_section): Define.
- * bfd.c (bfd_is_group_section): Define.
- * binary.c (binary_bfd_is_group_section): Define.
- * bout.c (b_out_bfd_is_group_section): Define.
- * coff-alpha.c (_bfd_ecoff_bfd_is_group_section): Define.
- * coff-mips.c (_bfd_ecoff_bfd_is_group_section): Define.
- * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Adjust.
- * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Adjust.
- * coffcode.h (coff_bfd_is_group_section): Define.
- * i386msdos.c (msdos_bfd_is_group_section): Define.
- * i386os9k.c (os9k_bfd_is_group_section): Define.
- * ieee.c (ieee_bfd_is_group_section): Define.
- * ihex.c (ihex_bfd_is_group_section): Define.
- * libbfd-in.h (_bfd_nolink_bfd_is_group_section): Define.
- * mach-o.c (bfd_mach_o_bfd_is_group_section): Define.
- * mmo.c (mmo_bfd_is_group_section): Define.
- * nlm-target.h (nlm_bfd_is_group_section): Define.
- * oasys.c (oasys_bfd_is_group_section): Define.
- * pef.c (bfd_pef_bfd_is_group_section): Define.
- * ppcboot.c (ppcboot_bfd_is_group_section): Define.
- * srec.c (srec_bfd_is_group_section): Define.
- * tekhex.c (tekhex_bfd_is_group_section): Define.
- * versados.c (versados_bfd_is_group_section): Define.
- * vms.c (vms_bfd_is_group_section): Define.
- * xsym.c (bfd_sym_bfd_is_group_section): Define.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Regenerate.
-
-2004-04-30 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_gc_mark): Follow indirect and warning syms.
-
-2004-04-30 Hans-Peter Nilsson <hp at axis.com>
-
- * configure.in: Update version to 2.15.91.
- * configure: Regenerate.
-
-2004-04-29 Brian Ford <ford at vss.fsi.com>
-
- * bfd.c (bfd_get_sign_extend_vma): Add pe[i]-i386 case to DJGPP hack.
- * coffcode.h (DOT_DEBUG, GNU_LINKONCE_WI): Define.
- [!COFF_WITH_PE] (sec_to_styp_flags, styp_to_sec_flags): Use them.
- (coff_compute_section_file_positions) [RS6000COFF_C]: Likewise.
- [COFF_WITH_PE] (sec_to_styp_flags): Handle DWARF 2/3 .debug* and
- .gnu.linkonce.wi. sections.
- * pe-i386.c (COFF_SUPPORT_GNU_LINKONCE): Define.
- (COFF_SECTION_ALIGNMENT_ENTRIES): Add entries for .debug and
- .gnu.linkonce.wi..
- * pei-i386.c (COFF_SUPPORT_GNU_LINKONCE): Likewise.
- (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
-
-2004-04-28 Chris Demetriou <cgd at broadcom.com>
-
- * reloc.c: Remove BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Likewise.
-
-2004-04-28 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * som.c (struct som_misc_symbol_info): Add is_comdat, is_common and
- dup_common fields.
- (setup_sections): Use som_subspace_dictionary_record struct instead
- subspace_dictionary_record. Set SEC_LINK_ONCE if subspace is
- is_comdat, is_common or dup_common.
- (som_prep_headers): Use som_subspace_dictionary_record struct. Set
- is_comdat, is_common and dup_common in section subspace_dict from
- copy_data.
- (som_begin_writing): Use som_subspace_dictionary_record struct.
- (som_finish_writing): Likewise.
- (som_bfd_derive_misc_symbol_info): Add support to set is_comdat,
- is_common and dup_common flags in info for symbol. Add comment
- regarding linker support for these fields. Slightly reorganize
- function.
- (som_build_and_write_symbol_table): Set is_comdat, is_common and
- dup_common fields in symbol table from symbol info.
- (bfd_som_set_subsection_attributes): Add comdat, common and dup_common
- arguments. Set corresponding fields in copy_data. Change all callers.
- (som_bfd_ar_write_symbol_stuff): Set dup_common flag in library
- symbol table.
- (som_vec): Add SEC_LINK_ONCE to applicable section flags.
- * som.h (som_subspace_dictionary_record): Define.
- (som_copyable_section_data_struct): Add is_comdat, is_common and
- dup_common fields.
- (som_section_data_struct): Use som_subspace_dictionary_record struct
- instead of subspace_dictionary_record.
- (bfd_boolean bfd_som_set_subsection_attributes): Adjust prototype.
-
-2004-04-27 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (xtensa_read_table_entries): Use section _cooked_size
- if set. Check reloc_done flag before applying relocations. Use
- output addresses, both when applying relocations and when comparing
- against the specified section.
- (elf_xtensa_relocate_section): Use output address to check if dynamic
- reloc is in a literal pool. Set section's reloc_done flag.
-
-2004-04-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-sh64.c (elf_backend_section_flags): New. Defined.
- (sh64_elf_set_mach_from_flags): Remove the kludge for .cranges
- section.
- (sh64_elf_section_flags): New. Set SEC_DEBUGGING for .cranges
- section.
-
-2004-04-27 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-alpha.c (elf64_alpha_read_ecoff_info): Don't assign
- structure field removed in 2004-04-24 patch.
- * elf64-sparc.c (sparc64_elf_plt_sym_val): Warning fix.
-
- * elf-bfd.h (struct elf_backend_data <elf_backend_section_flags>):
- Constify hdr arg.
- * elf32-arm.h (elf32_arm_section_flags): Likewise.
- * elf64-alpha.c (elf64_alpha_section_flags): Likewise.
- * elfxx-ia64.c (elfNN_ia64_section_flags): Likewise.
- * elf.c (_bfd_elf_make_section_from_shdr): Set the bfd_section
- field before calling elf_backend_section_flags.
-
-2004-04-24 Chris Demetriou <cgd at broadcom.com>
-
- * elf32-mips.c (elf_mips_gnu_rel_hi16, elf_mips_gnu_rel_lo16)
- (elf_mips_gnu_pcrel64, elf_mips_gnu_pcrel32): Remove.
- (bfd_elf32_bfd_reloc_type_lookup): Remove cases for
- BFD_RELOC_PCREL_HI16_S, BFD_RELOC_PCREL_LO16, BFD_RELOC_64_PCREL,
- and BFD_RELOC_32_PCREL.
- (mips_elf32_rtype_to_howto): Remove cases for R_MIPS_GNU_REL_HI16,
- R_MIPS_GNU_REL_LO16, R_MIPS_PC64, R_MIPS_PC32.
- * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
- (_bfd_mips_elf_lo16_reloc): Remove handling for R_MIPS_GNU_REL_HI16.
- (mips_elf_next_relocation): Move comment about matching HI/LO
- relocations to...
- (_bfd_mips_elf_relocate_section): Here. Remove handling for
- R_MIPS_GNU_REL_HI16.
-
-2004-04-23 Chris Demetriou <cgd at broadcom.com>
-
- * coff-mips.c (mips_relhi_reloc, mips_rello_reloc)
- (mips_switch_reloc, mips_read_relocs, mips_relax_section)
- (mips_relax_pcrel16, PCREL16_EXPANSION_ADJUSTMENT): Remove.
- (mips_relocate_hi): Remove now-unused 'adjust' and 'pcrel' arguments,
- and update comments to reflect current usage.
- (mips_howto_table): Remove entries for MIPS_R_RELHI, MIPS_R_RELLO,
- and MIPS_R_SWITCH, as well as several empty entries. Update comment
- for MIPS_R_PCREL16.
- (mips_ecoff_swap_reloc_in, mips_ecoff_swap_reloc_out)
- (mips_adjust_reloc_out, mips_bfd_reloc_type_lookup): Remove support
- for MIPS_R_SWITCH, MIPS_R_RELLO, and MIPS_R_RELHI relocations.
- (mips_adjust_reloc_in): Likewise, adjust maximum accepted relocation
- type number to be MIPS_R_PCREL16.
- (mips_relocate_section): Remove support for link-time relaxation
- of branches used by embedded-PIC. Remove support for MIPS_R_SWITCH,
- MIPS_R_RELLO, and MIPS_R_RELHI relocations.
- (_bfd_ecoff_bfd_relax_section): Redefine to bfd_generic_relax_section.
- * ecoff.c (ecoff_indirect_link_order): Remove support for link-time
- relaxation of branches used by embedded-PIC.
- * ecofflink.c (bfd_ecoff_debug_accumulate): Likewise.
- * libecoff.h (struct ecoff_section_tdata): Remove embedded-PIC
- related members, update comment.
- * pe-mips.c: Remove disabled (commented-out and #if 0'd)
- code related to embedded-PIC.
- * elfxx-mips.c (_bfd_mips_elf_read_ecoff_info): Remove
- initialization of now-removed 'adjust' member of
- 'struct ecoff_debug_info'.
-
-2004-04-23 Chris Demetriou <cgd at broadcom.com>
-
- * elfxx-mips.c (mips_elf_get_global_gotsym_index): Remove.
-
-2004-04-21 Philip Blundell <pb at nexus.co.uk>
-
- * elf32-arm.h (elf32_arm_check_relocs): Don't output REL32
- relocs for locally defined symbols during -shared final link.
- (elf32_arm_final_link_relocate): Likewise.
-
-2004-04-22 Jakub Jelinek <jakub at redhat.com>
-
- * elf64-x86-64.c (elf64_x86_64_copy_indirect_symbol): Copy also
- ELF_LINK_POINTER_EQUALITY_NEEDED.
- (elf64_x86_64_check_relocs): Set ELF_LINK_POINTER_EQUALITY_NEEDED
- if r_type is not R_X86_64_PC32.
- (elf64_x86_64_finish_dynamic_symbol): If
- ELF_LINK_POINTER_EQUALITY_NEEDED is not set, clear st_value of
- SHN_UNDEF symbols.
-
-2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * elf32-sh.c (sh_elf_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
-
-2004-04-22 Andrew Cagney <cagney at redhat.com>
-
- * opncls.c (bfd_alloc): Fix type of "wanted" in doco.
-
-2004-04-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * hpux-core.c (hpux_core_core_file_p): Add cast in call to
- make_bfd_asection.
- * som.c (som_set_section_contents): Constantify second argument.
- (hppa_som_gen_reloc_type): Abort for unsupported selectors.
- (som_object_setup): Rework to avoid warning.
- (setup_sections, som_write_fixups, bfd_section_from_som_symbol):
- Likewise.
-
-2004-04-22 Andrew Cagney <cagney at redhat.com>
-
- * cache.c (bfd_cache_close): Check for a previously closed file.
-
-2004-04-22 Jakub Jelinek <jakub at redhat.com>
-
- * bfd.c (bfd_get_synthetic_symtab): Define.
- * targets.c (BFD_JUMP_TABLE_DYNAMIC): Add
- NAME##_get_synthetic_symtab.
- (struct bfd_target): Add _bfd_get_synthetic_symtab.
- * libbfd-in.h (_bfd_nodynamic_get_synthetic_symtab): Define.
- * elf-bfd.h (struct elf_backend_data): Add plt_sym_val and
- relplt_name fields.
- (_bfd_elf_get_synthetic_symtab): New prototype.
- * elfcode.h (elf_get_synthetic_symtab): Define.
- * elf.c (_bfd_elf_get_synthetic_symtab): New function.
- * elfxx-target.h (bfd_elfNN_get_synthetic_symtab): Define.
- (elf_backend_plt_sym_val, elf_backend_relplt_name): Define.
- (elfNN_bed): Add elf_backend_plt_sym_val and elf_backend_relplt_name.
+ * archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
+ bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
+ bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
+ bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
+ (bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
+ bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
+ bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
+ bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
+ bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
+ bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
+ bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
+ bfd_mach_mcf_isa_b_usp_float_emac): New.
+ (bfd_default_scan): Update coldfire mapping.
+ * bfd-in.h (bfd_m68k_mach_to_features,
+ bfd_m68k_features_to_mach): Declare.
* bfd-in2.h: Rebuilt.
+ * cpu-m68k.c (arch_info_struct): Add new coldfire machines,
+ adjust legacy names.
+ (m68k_arch_features): New.
+ (bfd_m68k_mach_to_features,
+ bfd_m68k_features_to_mach): Define.
+ * elf32-m68k.c (elf32_m68k_object_p): New.
+ (elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
+ (elf32_m68k_print_private_bfd_data): Print the CF EF flags.
+ (elf_backend_object_p): Define.
+ * ieee.c (ieee_write_processor): Update coldfire machines.
* libbfd.h: Rebuilt.
- * elf32-i386.c (elf_i386_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf64-x86-64.c (elf64_x86_64_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf32-s390.c (elf_s390_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf64-s390.c (elf_s390_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf32-sparc (elf32_sparc_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf64-sparc.c (sparc64_elf_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * elf32-ppc.c (ppc_elf_plt_sym_val): New function.
- (elf_backend_plt_sym_val): Define.
- * aout-target.h (MY_get_synthetic_symtab): Define.
- * aout-tic30.c (MY_get_synthetic_symtab): Define.
- * coff-rs6000.c (rs6000coff_vec): Add
- _bfd_nodynamic_get_synthetic_symtab.
- (pmac_xcoff_vec): Likewise.
- * coff64-rs6000.c (rs6000coff64_vec): Add
- _bfd_nodynamic_get_synthetic_symtab.
- (aix5coff64_vec): Likewise.
- * sunos.c (MY_get_synthetic_symtab): Define.
- * vms.c (vms_get_synthetic_symtab): Define.
-2004-04-22 Nick Clifton <nickc at redhat.com>
+2006-02-06 Steve Ellcey <sje at cup.hp.com>
- * bfd.c (bfd_archive_filename): Return NULL on NULL input.
+ * elfxx-ia64.c (elfNN_ia64_fake_sections): Set SHF_IA_64_HP_TLS
+ if SHF_TLS is set.
-2004-04-22 Peter Barada <peter at the-baradas.com>
+2006-02-05 Arnold Metselaar <arnold.metselaar at planet.nl>
- * archures.c: Add bfd_mach_mcfv4e to bfd_architecture.
- * bfd2-in.h: Regenerate.
- * cpu-m68k.c: Add 'm68k:mcfv4e' to arch_info_struct[].
+ * coff-z80.c (r_imm24): New howto.
+ (rtype2howto): New case R_IMM24.
+ (coff_z80_reloc_type_lookup): New case BFD_RELOC_24.
+ (extra_case): Use bfd_get_8 for R_IMM8, new case R_IMM24.
-2004-04-21 Chris Demetriou <cgd at broadcom.com>
+2006-02-04 Richard Sandiford <richard at codesourcery.com>
- * coff-mips.c (bfd_mips_ecoff_create_embedded_relocs): Remove.
- * elf32-mips.c (bfd_mips_elf32_create_embedded_relocs): Remove.
- * bfd-in.h (bfd_mips_ecoff_create_embedded_relocs)
- (bfd_mips_elf32_create_embedded_relocs): Remove prototypes
- * bfd-in2.h: Regenerate.
+ * elfxx-mips.c (mips_elf_initialize_tls_index): If a TLS symbol
+ has already been assigned a GOT index, copy that index to the
+ current hash table entry.
-2004-04-21 Bob Wilson <bob.wilson at acm.org>
+2006-02-01 Eric Botcazou <ebotcazou at libertysurf.fr>
- * elf32-xtensa.c (is_same_value): Add final_static_link argument and
- require relocations against a weak symbol to reference the same
- symbol hash entry if not a final, static link.
- (get_cached_value, add_value_map): Add final_static_link argument.
- (remove_literals): Pass final_static_link argument as needed.
+ * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Reinstate bypass
+ for call-to-undefweak reloc overflow.
-2004-04-21 Andrew Cagney <cagney at redhat.com>
+2006-01-31 Eric Botcazou <ebotcazou at libertysurf.fr>
- * opncls.c (_bfd_new_bfd_contained_in): Copy "iovec".
- (struct opncls, opncls_btell, opncls_bseek, opncls_bread)
- (opncls_bwrite, opncls_bclose, opncls_bflush)
- (opncls_bstat, opncls_iovec, bfd_openr_iovec): Implement a
- bfd iovec that uses function callbacks.
- (bfd_close): Use the iovec's bclose.
- * cache.c (cache_btell, cache_bseek, cache_bread, cache_bwrite)
- (cache_bclose, cache_bflush, cache_bstat)
- (cache_iovec): New functions and global variable, implement a
- cache "iovec", where applicable set bfd_error.
- (bfd_cache_init, bfd_cache_close): Set/test the bfd's iovec.
- * bfdio.c (struct bfd_iovec): Define.
- (real_read): Delete function.
- (bfd_bread, bfd_bread, bfd_bwrite, bfd_tell, bfd_flush, bfd_stat)
- (bfd_seek, bfd_get_mtime, bfd_get_size): Use the bfd's "iovec",
- assume that bread and bwrite set bfd_error.
- * bfd.c (struct bfd): Add "iovec", update comments.
- * bfd-in2.h, libbfd.h: Re-generate.
+ * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Reinstate bypass
+ for 32-bit relocs overflow.
-2004-04-21 Andrew Cagney <cagney at redhat.com>
+2006-01-27 Paul Brook <paul at codesourcery.com>
- * libaout.h (enum machine_type): Add M_POWERPC_NETBSD.
+ * elf32-arm.c (elf32_arm_get_symbol_type): Allow STT_TLS thumb
+ objects.
-2004-04-21 Eric Botcazou <ebotcazou at act-europe.fr>
+2006-01-18 Alexandre Oliva <aoliva at redhat.com>
- * elflink.c (elf_gc_mark_dynamic_ref_symbol): New function.
- (bfd_elf_gc_sections): Fail if a shared object is being created.
- Do not fail if dynamic sections have been created. Instead call
- elf_gc_mark_dynamic_ref_symbol to mark sections that contain
- dynamically referenced symbols. Do not mark the whole graph
- rooted at .eh_frame, only the section proper.
+ Introduce TLS descriptors for i386 and x86_64.
+ * reloc.c (BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC,
+ BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC,
+ BFD_RELOC_X86_64_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL): New.
+ * libbfd.h, bfd-in2.h: Rebuilt.
+ * elf32-i386.c (elf_howto_table): New relocations.
+ (R_386_tls): Adjust.
+ (elf_i386_reloc_type_lookup): Map new relocations.
+ (GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
+ (GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
+ (struct elf_i386_link_hash_entry): Add tlsdesc_got field.
+ (struct elf_i386_obj_tdata): Add local_tlsdesc_gotent field.
+ (elf_i386_local_tlsdesc_gotent): New macro.
+ (struct elf_i386_link_hash_table): Add sgotplt_jump_table_size.
+ (elf_i386_compute_jump_table_size): New macro.
+ (link_hash_newfunc): Initialize tlsdesc_got.
+ (elf_i386_link_hash_table_create): Set sgotplt_jump_table_size.
+ (elf_i386_tls_transition): Handle R_386_TLS_GOTDESC and
+ R_386_TLS_DESC_CALL.
+ (elf_i386_check_relocs): Likewise. Allocate space for
+ local_tlsdesc_gotent.
+ (elf_i386_gc_sweep_hook): Handle R_386_TLS_GOTDESC and
+ R_386_TLS_DESC_CALL.
+ (allocate_dynrelocs): Count function PLT relocations. Reserve
+ space for TLS descriptors and relocations.
+ (elf_i386_size_dynamic_sections): Reserve space for TLS
+ descriptors and relocations. Set up sgotplt_jump_table_size.
+ Don't zero reloc_count in srelplt.
+ (elf_i386_always_size_sections): New. Set up _TLS_MODULE_BASE_.
+ (elf_i386_relocate_section): Handle R_386_TLS_GOTDESC and
+ R_386_TLS_DESC_CALL.
+ (elf_i386_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
+ (elf_backend_always_size_sections): Define.
+ * elf64-x86-64.c (x86_64_elf_howto): Add R_X86_64_GOTPC32_TLSDESC,
+ R_X86_64_TLSDESC, R_X86_64_TLSDESC_CALL.
+ (R_X86_64_standard): Adjust.
+ (x86_64_reloc_map): Map new relocs.
+ (elf64_x86_64_rtype_to_howto): New, split out of...
+ (elf64_x86_64_info_to_howto): ... this function, and...
+ (elf64_x86_64_reloc_type_lookup): ... use it to map elf_reloc_val.
+ (GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
+ (GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
+ (struct elf64_x86_64_link_hash_entry): Add tlsdesc_got field.
+ (struct elf64_x86_64_obj_tdata): Add local_tlsdesc_gotent field.
+ (elf64_x86_64_local_tlsdesc_gotent): New macro.
+ (struct elf64_x86_64_link_hash_table): Add tlsdesc_plt,
+ tlsdesc_got and sgotplt_jump_table_size fields.
+ (elf64_x86_64_compute_jump_table_size): New macro.
+ (link_hash_newfunc): Initialize tlsdesc_got.
+ (elf64_x86_64_link_hash_table_create): Initialize new fields.
+ (elf64_x86_64_tls_transition): Handle R_X86_64_GOTPC32_TLSDESC and
+ R_X86_64_TLSDESC_CALL.
+ (elf64_x86_64_check_relocs): Likewise. Allocate space for
+ local_tlsdesc_gotent.
+ (elf64_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPC32_TLSDESC and
+ R_X86_64_TLSDESC_CALL.
+ (allocate_dynrelocs): Count function PLT relocations. Reserve
+ space for TLS descriptors and relocations.
+ (elf64_x86_64_size_dynamic_sections): Reserve space for TLS
+ descriptors and relocations. Set up sgotplt_jump_table_size,
+ tlsdesc_plt and tlsdesc_got. Make room for them. Don't zero
+ reloc_count in srelplt. Add dynamic entries for DT_TLSDESC_PLT
+ and DT_TLSDESC_GOT.
+ (elf64_x86_64_always_size_sections): New. Set up
+ _TLS_MODULE_BASE_.
+ (elf64_x86_64_relocate_section): Handle R_386_TLS_GOTDESC and
+ R_386_TLS_DESC_CALL.
+ (elf64_x86_64_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
+ (elf64_x86_64_finish_dynamic_sections): Set DT_TLSDESC_PLT and
+ DT_TLSDESC_GOT. Set up TLS descriptor lazy resolver PLT entry.
+ (elf_backend_always_size_sections): Define.
-2004-04-20 DJ Delorie <dj at redhat.com>
+2006-01-17 H.J. Lu <hongjiu.lu at intel.com>
- * reloc.c: Add BFD_RELOC_32_SECREL.
- * bfd-in2.h: Regenerate.
- * libbfd.h: Likewise.
- * coff-i386.c (howto_table) [COFF_WITH_PE]: Add R_SECREL32.
- (coff_i386_rtype_to_howto) [COFF_WITH_PE]: Handle it.
- (coff_i386_reloc_type_lookup) [COFF_WITH_PE]: Likewise.
+ PR binutils/2096
+ * dwarf2.c (comp_unit_contains_address): Update comment.
+ (_bfd_dwarf2_find_nearest_line): Use section's vma, instead of
+ lma. Return TRUE only if both comp_unit_contains_address and
+ comp_unit_find_nearest_line return TRUE.
+ (_bfd_dwarf2_find_line): Use section's vma, instead of lma.
-2004-04-19 Jakub Jelinek <jakub at redhat.com>
+2006-01-18 Alan Modra <amodra at bigpond.net.au>
- * elf32-sparc.c (elf32_sparc_relocate_section): Handle
- relocs against hidden/protected undefweak symbols properly.
- * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
+ * elf-bfd.h (struct elf_backend_data): Add gc_mark_dynamic_ref.
+ (bfd_elf_gc_mark_dynamic_ref_symbol): Declare.
+ * elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Rename from
+ elf_gc_mark_dynamic_ref_symbol. Make global.
+ (bfd_elf_gc_sections): Call bed->gc_mark_dynamic_ref.
+ * elfxx-target.h (elf_backend_gc_mark_dynamic_ref): Define.
+ (elfNN_bed): Init new field.
+ * elf64-ppc.c (elf_backend_gc_mark_dynamic_ref): Define.
+ (ppc64_elf_gc_mark_dynamic_ref): New function.
-2004-04-18 Mark Kettenis <kettenis at gnu.org>
+2006-01-17 Alan Modra <amodra at bigpond.net.au>
- * libaout.h (enum machine_type): Add M_POWERPC_NETBSD.
- * netbsd-core.c (netbsd_core_file_p): Set architecture for PowerPC
- core files.
+ * elf64-ppc.c (ppc64_elf_gc_mark_hook): Don't hang forever in loop.
-2004-04-17 Brian Ford <ford at vss.fsi.com>
+2006-01-17 Nick Clifton <nickc at redhat.com>
- * peXXigen.c (_bfd_XXi_swap_aouthdr_out): Use the first non-zero
- filepos for the SizeOfHeaders field.
- (_bfd_XXi_swap_scnhdr_out): Correct section flags lossage on reloc
- overflow.
- (_bfd_XXi_swap_sym_in): Remove redundant section flags assignment.
+ PR binutils/2159
+ * elf.c (elfcore_write_pstatus): Add ATTRIBUTE_UNUSED to unused
+ parameters.
-2004-04-16 Alan Modra <amodra at bigpond.net.au>
+2006-01-11 Nick Clifton <nickc at redhat.com>
- * simple.c (bfd_simple_get_relocated_section_contents): Don't
- change reloc_done. Set and restore _cooked_size.
- (RETURN): Delete.
+ * elf32-arm.c (elf32_arm_output_symbol_hook): Install new entry
+ into the newly (re)allocated map array.
-2004-04-15 Mark Kettenis <kettenis at gnu.org>
+2006-01-09 Alexis Wilke <alexis_wilke at yahoo.com>
- * netbsd-core.c (netbsd_core_file_p): Set architecture for VAX
- core files.
+ * peXXigen.c (tbl): Add comma after "HIGH3ADJ".
-2004-04-15 Nick Clifton <nickc at redhat.com>
+2006-01-01 Jakub Jelinek <jakub at redhat.com>
- * bfd.c (bfd_archive_filename): Catch NULL bfd pointers.
+ * elf64-ppc.c (ppc64_elf_action_discarded): Return 0
+ for .toc1 section.
-2004-04-15 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-sparc.c (sparc64_elf_check_relocs): Fix thinko last change.
-
-2004-04-15 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Treat weak as strong only
- when it is a definition.
-
-2004-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-sparc.c (elf32_sparc_relocate_section): Don't abort
- when statically linking PIC code.
- * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
-
-2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config.bfd: Remove mips*-*-mach3* and mips*-dec-mach3* targets.
- * configure.in: Remove mips-dec-bsd*, mips-dec-mach3*, mips-*-mach3*
- targets amd aout_mips_big_vec, aout_mips_little_vec target vectors.
- * configure: Regenerate.
-
-2004-04-08 Richard Sandiford <rsandifo at redhat.com>
-
- * elflink.c: Include libiberty.h.
- * Makefile.am (elflink.lo): Depend on libiberty.h.
- * Makefile.in: Regenerate.
-
-2004-04-06 Daniel Jacobowitz <drow at mvista.com>
-
- * elfxx-mips.c (MIPS_ELF_STUB_SECTION_NAME): Always use
- ".MIPS.stubs".
-
-2004-04-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_size_dynamic_sections): Always
- reserve the memory for dynamic linker
-
-2004-04-05 Mark Kettenis <kettenis at gnu.org>
-
- * netbsd-core.c (CORE_WCOOKIE_OFFSET): New define.
- (netbsd_core_file_p): Create a .wcookie section for OpenBSD/sparc.
-
-2004-04-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-cr16c.c (elf32_cr16c_relocate_section): Use
- RELOC_FOR_GLOBAL_SYMBOL.
- (elf32_cr16c_add_symbol_hook): Remove const from Elf_Internal_Sym.
-
-2004-04-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf32-arm.h (elf32_arm_final_link_relocate): Handle
- R_ARM_ALU* only if OLD_ARM_ABI is not defined.
-
-2004-04-01 Paul Brook <paul at codesourcery.com>
-
- * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update.
- * elf32-arm.h (struct elf32_elf_section_map): New.
- (struct _arm_elf_section_data): New.
- (elf32_arm_section_data): Define.
- (struct elf32_arm_link_hash_table): Add byteswap_code.
- (elf32_arm_link_hash_table_create): Initialize byteswap_code.
- (bfd_elf32_arm_process_before_allocation): Add byteswap_code.
- (elf32_arm_post_process_headers): Set EF_ARM_BE8.
- (elf32_arm_output_symbol_hook, elf32_arm_new_section_hook,
- elf32_arm_compare_mapping, elf32_arm_write_section): New functions.
- (bfd_elf32_new_section_hook, elf_backend_write_section,
- elf_backend_link_output_symbol_hook): Define.
-
-2004-04-01 Andy Chittenden <achittenden at bluearc.com>
-
- * stabs.c (struct stab_link_includes_totals): Add field 'symb'
- that keeps the characters in a B_INCL..B_EINCL range.
- (_bfd_link_section_stabs): When computing the sum of the
- characters in a B_INCL..B_EINCL range also keep a copy of those
- characters. Use this information to distinguish between
- include sections that have the same sum and the same length
- but which are nevertheless unique.
-
-2004-03-31 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (elf32_arm_final_link_relocate): Add R_ARM_ALU*.
- * elfarm-nabi.c (elf32_arm_howto_table): Ditto.
-
-2004-03-31 Andy Chittenden <achittenden at bluearc.com>
-
- * stabs.c (struct stab_link_includes_totals): Rename field 'total'
- to 'sum_chars' and add field 'num_chars'.
- (_bfd_link_section_stabs): When computing the sum of the
- characters in a B_INCL..B_EINCL range also keep a count of the
- number of characters. Use this information to help distinguish
- between include sections when have the same sum but which
- nevertheless are still unique.
-
-2004-03-31 Mattias Engdegård <mattias at virtutech.se>
-
- * stabs.c (_bfd_link_section_stabs): Do not skip N_EXCL stabs.
-
-2004-03-30 Galit Heller <Galit.Heller at nsc.com>
- Tomer Levi <Tomer.Levi at nsc.com>
-
- * Makefile.am (ALL_MACHINES): Add cpu-cr16c.lo.
- (ALL_MACHINES_CFILES): Add cpu-cr16c.c.
- (BFD32_BACKENDS): Add elf32-cr16c.lo.
- (BFD32_BACKENDS_CFILES): Add elf32-cr16c.c.
- (cpu-cr16c.lo): New target.
- (elf32-cr16c.lo): Likewise.
- * Makefile.in: Regenerate.
- * archures.c (bfd_architecture): Add bfd_{arch,mach}_cr16c.
- (bfd_archures_list): Add bfd_cr16c_arch.
- * config.bfd: Handle cr16c-*-elf*.
- * configure.in: Handle bfd_elf32_cr16c_vec.
- * configure: Regenerate.
- * reloc.c: Add BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C,
- BFD_RELOC_16C_NUM16, BFD_RELOC_16C_NUM16_C,
- BFD_RELOC_16C_NUM32, BFD_RELOC_16C_NUM32_C,
- BFD_RELOC_16C_DISP04, BFD_RELOC_16C_DISP04_C,
- BFD_RELOC_16C_DISP08, BFD_RELOC_16C_DISP08_C,
- BFD_RELOC_16C_DISP16, BFD_RELOC_16C_DISP16_C,
- BFD_RELOC_16C_DISP24, BFD_RELOC_16C_DISP24_C,
- BFD_RELOC_16C_DISP24a, BFD_RELOC_16C_DISP24a_C,
- BFD_RELOC_16C_REG04, BFD_RELOC_16C_REG04_C,
- BFD_RELOC_16C_REG04a, BFD_RELOC_16C_REG04a_C,
- BFD_RELOC_16C_REG14, BFD_RELOC_16C_REG14_C,
- BFD_RELOC_16C_REG16, BFD_RELOC_16C_REG16_C,
- BFD_RELOC_16C_REG20, BFD_RELOC_16C_REG20_C,
- BFD_RELOC_16C_ABS20, BFD_RELOC_16C_ABS20_C,
- BFD_RELOC_16C_ABS24, BFD_RELOC_16C_ABS24_C,
- BFD_RELOC_16C_IMM04, BFD_RELOC_16C_IMM04_C,
- BFD_RELOC_16C_IMM16, BFD_RELOC_16C_IMM16_C,
- BFD_RELOC_16C_IMM20, BFD_RELOC_16C_IMM20_C,
- BFD_RELOC_16C_IMM24, BFD_RELOC_16C_IMM24_C,
- BFD_RELOC_16C_IMM32, BFD_RELOC_16C_IMM32_C.
- * targets.c (bfd_elf32_cr16c_vec): Declare.
- (bfd_target_vector): Add bfd_elf32_cr16c_vec.
- * cpu-cr16c.c: New file.
- * elf32-cr16c.c: Likewise.
- * libbfd.h: Regenerate.
- * bfd-in2.h: Likewise.
-
-2004-03-30 Jakub Jelinek <jakub at redhat.com>
-
- * elf.c (map_sections_to_segments): Fix handling of .tbss.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Remove all mention of elflink.h.
- * Makefile.in: Regenerate.
- * bfd-in.h (bfd_elf_discard_info): Declare.
- (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete.
- * bfd-in2.h: Regenerate.
- * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol,
- bfd_elf32_link_record_dynamic_symbol,
- bfd_elf64_link_record_dynamic_symbol,
- _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link,
- bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol,
- _bfd_elf32_link_record_local_dynamic_symbol,
- _bfd_elf64_link_record_local_dynamic_symbol,
- _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets,
- _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link,
- _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry,
- _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets,
- _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry,
- _bfd_elf32_reloc_symbol_deleted_p,
- _bfd_elf64_reloc_symbol_deleted_p): Delete.
- (bfd_elf_link_record_dynamic_symbol,
- bfd_elf_link_record_local_dynamic_symbol,
- bfd_elf_final_link, bfd_elf_gc_sections,
- bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry,
- bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link,
- bfd_elf_reloc_symbol_deleted_p): Declare.
- (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define.
- * elf32-arm.h: Update for changed function names. Remove local
- WILL_CALL_FINISH_DYNAMIC_SECTION define.
- * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c,
- * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c,
- * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c,
- * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c,
- * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c,
- * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c,
- * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c,
- * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise.
- * elfxx-target.h (bfd_elfNN_bfd_final_link): Define.
- (bfd_elfNN_print_symbol): Define.
- * elfcode.h: Don't include elflink.h.
- (elf_bfd_discard_info, elf_reloc_symbol_deleted_p,
- elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections,
- elf_gc_common_finalize_got_offsets, elf_gc_common_final_link,
- elf_gc_record_vtinherit, elf_gc_record_vtentry,
- elf_link_record_local_dynamic_symbol): Don't define.
- * elflink.c: Update for changed function names. Move elflink.h
- code here.
- * elflink.h: Delete file.
- * po/SRC-POTFILES.in: Regenerate.
- * po/bfd.pot: Regenerate.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-mmix.c (mmix_elf_relocate_section): Restore code setting
- "name" for global syms accidentally removed in 2004-03-20 change.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_reloc_cookie): Add r_sym_shift field.
- * elflink.h: Replace all occurrences of sizeof (Elf_External_*)
- where Elf_External_* is different for 64 and 32 bit, with
- corresponding elf_size_info field.
- (struct elf_final_link_info): Use "bfd_byte *" instead
- of "Elf_External_Sym *" for external_syms and symbuf.
- (elf_link_adjust_relocs): Set up r_type_mask and r_sym_shift local
- vars and use instead of ELF_R_INFO and ELF_R_TYPE macros.
- (struct elf_link_sort_rela): Add "sym_mask" alias for "offset".
- (elf_link_sort_cmp1): Use sym_mask field instead of ELF_R_SYM.
- (elf_link_sort_cmp2): Adjust.
- (elf_link_sort_relocs): Set up r_sym_mask local var instead of
- using ELF_R_SYM macro. Set u.sym_mask.
- (elf_bfd_final_link): Call _bfd_elf_stringtab_init instead of macro
- version, elf_stringtab_init. Ditto for bfd_section_from_elf_index
- vs. section_from_elf_index. Adjust Elf_External_Sym pointer
- arithmetic. Pass bed to elf_link_flush_output_syms. Adjust
- Elf_External_Dyn pointer arithmentic. Use bed swap_dyn_in and
- swap_syn_out functions. Rearrange dyn swap in/out switch.
- (elf_link_output_sym): Adjust Elf_External_Sym pointer arithmentic.
- Pass bed to elf_link_flush_output_syms. Use bed swap_symbol_out.
- (elf_link_flush_output_syms): Add elf_backend_data arg.
- (elf_link_check_versioned_symbol): Likewise.
- (elf_link_output_extsym): Pass bed to elf_link_check_versioned_symbol.
- Adjust Elf_External_Sym pointer arithmetic. Use bed swap_symbol_out.
- (elf_link_input_bfd): Use bfd_section_from_elf_index. Set up
- r_type_mask and r_sym_shift local vars and use instead of ELF_R_SYM,
- ELF_R_TYPE and ELF_R_INFO macros.
- (elf_reloc_link_order): Select ELF32_R_INFO or ELF64_R_INFO invocation
- based on size rather than using ELF_R_INFO.
- (elf_gc_mark): Set up r_sym_shift local var and use instead of
- ELF_R_SYM macro.
- (struct alloc_got_off_arg): New.
- (elf_gc_common_finalize_got_offsets): Use elf_size_info instead of
- ARCH_SIZE. Pass get entry size down to elf_gc_allocate_got_offsets.
- (elf_gc_allocate_got_offsets): Adjust.
- (elf_reloc_symbol_deleted_p): Usee cookie.r_sym_shift instead of
- ELF_R_SYM. Use bfd_section_from_elf_index.
- (elf_bfd_discard_info): Set cookie.r_sym_shift.
- * elfcode.h (elf_stringtab_init, section_from_elf_index): Delete.
- (elf_slurp_symbol_table): Use bfd_section_from_elf_index.
-
-2004-03-26 Stan Shebs <shebs at apple.com>
-
- Remove MPW support, no longer used.
- * config.bfd (powerpc-*-mpw*): Remove configuration.
- * mpw-config.in, mpw-make.sed: Remove files.
- * ecoffswap.h [MPW_C]: Remove MPW-C-friendly version of code.
-
-2004-03-26 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (elf_backend_add_symbol_hook): Define.
- (ppc64_elf_add_symbol_hook): New function.
- * elf-bfd.h (struct elf_backend_data <elf_add_symbol_hook>): Remove
- const from Elf_Internal_Sym param.
- * elflink.c (elf_link_add_object_symbols): Adjust.
- * elf-hppa.h (elf_hppa_add_symbol_hook): Adjust.
- * elf32-frv.c (elf32_frv_add_symbol_hook): Adjust.
- * elf32-i370.c (elf_backend_add_symbol_hook): Adjust.
- * elf32-m32r.c (m32r_elf_add_symbol_hook): Adjust.
- * elf32-m68hc1x.c (elf32_m68hc11_add_symbol_hook): Adjust.
- * elf32-m68hc1x.h (elf32_m68hc11_add_symbol_hook): Adjust.
- * elf32-ppc.c (ppc_elf_add_symbol_hook): Adjust.
- * elf32-sh64.c (sh64_elf_add_symbol_hook): Adjust.
- * elf32-v850.c (v850_elf_add_symbol_hook): Adjust.
- * elf64-alpha.c (elf64_alpha_add_symbol_hook): Adjust.
- * elf64-mmix.c (mmix_elf_add_symbol_hook): Adjust.
- * elf64-sh64.c (sh64_elf64_add_symbol_hook): Adjust.
- * elf64-sparc.c (sparc64_elf_add_symbol_hook): Adjust.
- * elfxx-ia64.c (elfNN_ia64_add_symbol_hook): Adjust.
- * elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Adjust.
- * elfxx-mips.h (_bfd_mips_elf_add_symbol_hook): Adjust.
-
-2004-03-26 Alan Modra <amodra at bigpond.net.au>
-
- * elfxx-target.h (bfd_elfNN_bfd_link_add_symbols): Define.
- * elf-bfd.h (_bfd_elf_link_add_archive_symbols): Delete.
- (_bfd_elf_sort_symbol, _bfd_elf_add_dt_needed_tag): Delete.
- (_bfd_elf_finalize_dynstr, bfd_elf32_bfd_link_add_symbols): Delete.
- (bfd_elf64_bfd_link_add_symbols): Delete.
- (bfd_elf_link_add_symbols): Declare.
- * elfcode.h (elf_bfd_link_add_symbols): Delete.
- * elflink.c: Include safe-ctype.h.
- (elf_add_dt_needed_tag): Rename from _bfd_elf_add_dt_needed_tag,
- make static.
- (elf_sort_symbol): Rename from _bfd_elf_sort_symbol, make static.
- (elf_finalize_dynstr): Rename from _bfd_elf_finalize_dynstr, make
- static.
- (elf_link_add_archive_symbols): Rename from
- _bfd_elf_link_add_archive_symbols, make static.
- (elf_link_add_object_symbols): New function. Corresponding
- elflink.h function converted to use elf_size_info.
- (bfd_elf_link_add_symbols): Likewise.
- (bfd_elf_size_dynamic_sections): Adjust.
- * elflink.h (elf_bfd_link_add_symbols): Delete.
- (elf_link_add_object_symbols): Delete.
- * elf32-gen.c (elf32_generic_link_add_symbols): Call
- bfd_elf_link_add_symbols.
- * elf64-gen.c (elf64_generic_link_add_symbols): Likewise.
-
-2004-03-25 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.h (elf_link_add_object_symbols): Add DT_NEEDED for as-needed
- and chained shared libs only if dynsym. Clear dynsym on forced-local.
-
- * elf-bfd.h (_bfd_elf_add_dynamic_entry): Declare.
- (bfd_elf32_add_dynamic_entry, bfd_elf64_add_dynamic_entry): Delete.
- (_bfd_elf_add_dt_needed_tag): Declare.
- (_bfd_elf_sort_symbol): Declare.
- (_bfd_elf_finalize_dynstr): Declare.
- (RELOC_FOR_GLOBAL_SYM): Formatting.
- * elfcode.h (elf_add_dynamic_entry): Delete.
- * elflink.c (_bfd_elf_add_dynamic_entry): New function. Corresponding
- elflink.h function converted to use elf_size_info.
- (_bfd_elf_add_dt_needed_tag): Likewise.
- (_bfd_elf_sort_symbol): Likewise.
- (_bfd_elf_finalize_dynstr): Likewise.
- (compute_bucket_count): Likewise.
- (bfd_elf_size_dynamic_sections): Likewise. Check result of
- _bfd_elf_strtab_add before calling _bfd_elf_strtab_addref.
- (elf_adjust_dynstr_offsets, elf_collect_hash_codes): Moved from..
- * elflink.h: ..here.
- (sort_symbol, add_dt_needed_tag): Delete.
- (elf_add_dynamic_entry, elf_finalize_dynstr): Delete.
- (compute_bucket_count, NAME(bfd_elf,size_dynamic_sections)): Delete.
- Update all users.
- * elf32-arm.h (add_dynamic_entry): Update. Remove casts.
- * elf32-cris.c (add_dynamic_entry): Likewise.
- * elf32-hppa.c (add_dynamic_entry): Likewise.
- * elf32-i370.c (add_dynamic_entry): Likewise.
- * elf32-i386.c (add_dynamic_entry): Likewise.
- * elf32-m32r.c (add_dynamic_entry): Likewise.
- * elf32-m68k.c (add_dynamic_entry): Likewise.
- * elf32-ppc.c (add_dynamic_entry): Likewise.
- * elf32-s390.c (add_dynamic_entry): Likewise.
- * elf32-sh.c (add_dynamic_entry): Likewise.
- * elf32-sparc.c (add_dynamic_entry): Likewise.
- * elf32-vax.c (add_dynamic_entry): Likewise.
- * elf32-xtensa.c (add_dynamic_entry): Likewise.
- * elf64-alpha.c (add_dynamic_entry): Likewise.
- * elf64-hppa.c (add_dynamic_entry): Likewise.
- * elf64-ppc.c (add_dynamic_entry): Likewise.
- * elf64-s390.c (add_dynamic_entry): Likewise.
- * elf64-sparc.c (add_dynamic_entry): Likewise.
- * elf64-x86-64.c (add_dynamic_entry): Likewise.
- * elfxx-ia64.c (add_dynamic_entry): Likewise.
- * elfxx-mips.c (MIPS_ELF_ADD_DYNAMIC_ENTRY): Likewise.
- * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Likewise.
- * elf32-frv.c (elf32_frv_size_dynamic_sections): Likewise.
- * elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
-
-2004-03-23 Paul Brook <paul at codesourcery.com>
-
- * elf32-arm.h (arm_print_private_bfd_data): Add EABI v3.
-
-2004-03-22 Bob Wilson <bob.wilson at acm.org>
-
- * elf32-xtensa.c (elf_xtensa_check_relocs): Remove code to read
- literal tables and check for relocs outside of literal pools.
- (elf_xtensa_make_sym_local): Don't clear ELF_LINK_NON_GOT_REF flag.
- (elf_xtensa_fix_refcounts): Don't check ELF_LINK_NON_GOT_REF or
- set DF_TEXTREL.
- (elf_xtensa_size_dynamic_sections): Don't add DT_TEXTREL entry.
- (elf_xtensa_relocate_section): Read literal tables and check for
- dynamic relocations in read-only sections and not in literal pools.
-
-2004-03-23 Alan Modra <amodra at bigpond.net.au>
-
- PR 51.
- * linker.c (bfd_wrapped_link_hash_lookup): Handle info->wrap_char.
-
-2004-03-22 Hans-Peter Nilsson <hp at axis.com>
-
- * elf32-cris.c (cris_elf_relocate_section) <case R_CRIS_16_GOTPLT,
- R_CRIS_16_GOTPLT>: Also error if there's no PLT for a symbol
- not defined by the executable, or defined in a DSO.
- <eliding run-time relocation of .got>: Initialize GOT entry for a
- function symbol or ELF_LINK_HASH_NEEDS_PLT statically in an
- executable.
- (cris_elf_gc_sweep_hook): Improve fallthrough marking.
- (elf_cris_try_fold_plt_to_got): Improve head comment. Do not fold
- a PLT reloc to GOT for an executable.
- (elf_cris_adjust_dynamic_symbol): Only fold a .got.plt entry with
- .got for a DSO and explain why.
- (elf_cris_discard_excess_program_dynamics): Also lose GOT-relocs
- and unreferenced symbols for which a PLT is defined. Adjust
- dynamic-symbol pruning correspondingly, to make sure we don't lose
- a dynamic symbol also defined by a DSO.
-
-2004-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add input_bfd, input_section
- and rel args. Group input and output args. Wrap to 80 columns.
- * elf-m10200.c, elf-m10300.c, elf32-arm.h, elf32-avr.c,
- elf32-cris.c, elf32-d10v.c, elf32-fr30.c, elf32-h8300.c,
- elf32-hppa.c, elf32-i386.c, elf32-i860.c, elf32-ip2k.c,
- elf32-iq2000.c, elf32-m68hc1x.c, elf32-m68k.c, elf32-mcore.c,
- elf32-msp430.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c,
- elf32-sparc.c, elf32-v850.c, elf32-vax.c, elf32-xstormy16.c,
- elf32-xtensa.c, elf64-alpha.c, elf64-mmix.c, elf64-ppc.c,
- elf64-s390.c, elf64-sparc.c, elf64-x86-64.c, elfxx-ia64.c: Update
- RELOC_FOR_GLOBAL_SYMBOL invocation.
-
-2004-03-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Report error if
- unresolved symbols in objects aren't allowed.
-
- * elf-hppa.h (elf_hppa_relocate_section): Properly handle
- unresolved symbols.
- (elf_hppa_remark_useless_dynamic_symbols): Likewise.
- (elf_hppa_unmark_useless_dynamic_symbols):
- * elf32-frv.c (elf32_frv_relocate_section): Likewise.
- * elf32-hppa.c (elf32_hppa_size_stubs): Likewise.
- (elf32_hppa_relocate_section): Likewise.
- * elf32-i370.c (i370_elf_relocate_section): Likewise.
- * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
- * elf32-sh.c (sh_elf_relocate_section): Likewise.
- * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
- * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
-
- * elf-m10200.c (mn10200_elf_relocate_section): Use
- RELOC_FOR_GLOBAL_SYMBOL.
- * elf32-avr.c (elf32_avr_relocate_section): Likewise.
- * elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
- * elf32-fr30.c (fr30_elf_relocate_section): Likewise.
- * elf32-h8300.c (elf32_h8_relocate_section): Likewise.
- * elf32-i860.c (elf32_i860_relocate_section): Likewise.
- * elf32-m68hc1x.c (m68hc11_get_relocation_value): Likewise.
- * elf32-mcore.c (mcore_elf_relocate_section): Likewise.
- * elf32-msp430.c (elf32_msp430_relocate_section): Likewise.
- * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
- * elf32-v850.c (v850_elf_relocate_section): Likewise.
- * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise.
- * elf64-mmix.c (mmix_elf_relocate_section): Likewise.
-
-2004-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * elf32-hppa.c (elf32_hppa_check_relocs): Handle R_PARISC_PCREL32.
- (final_link_relocate): Likewise.
- * elf-hppa.h (elf_hppa_reloc_final_type): Handle selectors for
- R_PARISC_PCREL32 and R_PARISC_PCREL64 relocations.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * po/bfd.pot: Regenerate.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Revert last change. Move
- type and size change code to where it was previously. Remove
- dt_needed param. Treat old weak syms as strong if new sym is
- from a shared lib, even when old sym is from another shared
- lib. Remove unnecessary tests of oldweak and newweak. Correct
- comments.
- (_bfd_elf_add_default_symbol): Remove dt_needed param. Update
- _bfd_elf_merge_symbol calls.
- * elflink.h (elf_link_add_object_symbols): Update calls. Remove
- dt_needed local var. Update comments.
- * elf-bfd.h (_bfd_elf_merge_symbol): Update prototype.
- (_bfd_elf_add_default_symbol): Likewise.
-
- * elflink.c (_bfd_elf_merge_symbol): Reinstate code to handle
- strong syms in one shared object overriding weak syms in another.
-
-2004-03-18 Alan Modra <amodra at bigpond.net.au>
-
- * elf-bfd.h (struct elf_obj_tdata): Delete dt_soname field. Add
- dyn_lib_class field. Rearrange for better packing.
- (elf_dt_soname): Delete.
- (elf_dyn_lib_class): Define.
- * elf.c (bfd_elf_set_dt_needed_name): Update comment.
- (bfd_elf_set_dt_needed_soname): Delete.
- (bfd_elf_set_dyn_lib_class): New function.
- * elflink.h (add_dt_needed_tag): New function. Split out from..
- (elf_link_add_object_symbols): ..here. Rename "name" to "soname".
- Use elf_dyn_lib_class to set dt_needed and add_needed. Move fallback
- initialization of soname.
- (elf_link_check_versioned_symbol): Test elf_dyn_lib_class instead of
- elf_dt_soname.
- * bfd-in.h (enum dynamic_lib_link_class): New.
- (bfd_elf_set_dt_needed_soname): Delete.
- (bfd_elf_set_dyn_lib_class): Declare.
- * bfd-in2.h: Regenerate.
-
- * elflink.c (_bfd_elf_merge_symbol): Rewrite weak symbol handling.
- (_bfd_elf_add_default_symbol): Remove indirect BFD_ASSERTs.
- * elflink.h (elf_link_add_object_symbols): Don't clear dt_needed in
- symbol loop. Instead use add_needed to flag tag as written.
-
-2004-03-17 Nathan Sidwell <nathan at codesourcery.com>
-
- * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
- logic for null_input_bfd detection.
-
-2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
-
- * config.bfd: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
-
-2004-03-16 Mark Kettenis <kettenis at gnu.org>
-
- * netbsd-core.c (netbsd_core_file_p) [CORE_FPU_OFFSET]: Remove
- code.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * elflink.c (elf_link_read_relocs_from_section): Don't use
- NUM_SHDR_ENTRIES in end of reloc calc. Move NULL shdr check..
- (_bfd_elf_link_read_relocs): ..to here.
- * elf32-ppc.c (ppc_elf_relax_section): Formatting.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * configure.in (HOST_64BIT_TYPE, HOST_U_64BIT_TYPE): Don't override
- values selected in configure.host. Require both to be defined
- before setting BFD_HOST_64_BIT_DEFINED. Protect assignment to
- corresponding BFD_HOST vars with quotes.
- <${host64}-${target64}-${want64} in *true*>: Don't exempt gcc;
- Always require BFD_HOST_64_BIT_DEFINED.
- <file_ptr type>: Find off_t size before emitting message. Combine
- off_t and ftello64 conditional.
- * configure: Regenerate.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * elf32-m32r.c (m32r_elf_create_dynamic_sections): Fix pointer
- aliasing warning. Remove trailing whitespace throughout file.
-
-2004-03-15 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * elf-hppa.h (elf_hppa_relocate_section): Pass input_bfd instead of
- input_section in calls to get_dyn_name.
- * elf64-hppa.c (get_dyn_name): Change type of first argument to "bfd *". Use section id of first section in input BFD to build dynamic name for
- local symbols.
- (elf64_hppa_check_relocs): Pass abfd in call to get_dyn_name.
-
-2004-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * bfd-in.h (bfd_int64_t, bfd_uint64_t): New types.
- (BFD_HOST_64_BIT, BFD_HOST_U_64_BIT): Don't define here.
- (bfd_getb64, bfd_getl64, bfd_get_bits): Return bfd_uint64_t.
- (bfd_getb_signed_64, bfd_getl_signed_64): Return bfd_int64_t.
- (bfd_putb64, bfd_putl64, bfd_put_bits): Accept bfd_uint64_t.
- * configure.in (HOST_U_64BIT_TYPE): Set when sizeof long is 8.
- (BFD_HOST_64_BIT_DEFINED, BFD_HOST_64_BIT, BFD_HOST_U_64_BIT): Set
- when using long.
- * libbfd.c (EIGHT_GAZILLION, COERCE64): Use bfd_int64_t.
- (bfd_getb64): Return bfd_uint64_t. Enable when BFD_HOST_64_BIT.
- (bfd_getl64, bfd_getb_signed_64, bfd_getl_signed_64): Likewise.
- (bfd_putb64): Accept bfd_uint64_t. Enable when BFD_HOST_64_BIT.
- (bfd_putl64, bfd_put_bits, bfd_get_bits): Likewise.
- * dwarf2.c (struct attribute): Use bfd_int64_t and bfd_uint64_t.
- (read_8_bytes, read_indirect_string, read_address): Likewise.
- (read_abbrevs, parse_comp_unit): Likewise.
- * targets.c (struct bfd_target): Likewise.
- * aix386-core.c (NO_GET64, NO_PUT64, NO_GETS64): Define and use.
- * hppabsd-core.c: Likewise. Formatting.
- * hpux-core.c: Likewise.
- * irix-core.c: Likewise.
- * netbsd-core.c: Likewise.
- * osf-core.c: Likewise.
- * ptrace-core.c: Likewise.
- * sco5-core.c: Likewise.
- * trad-core.c: Likewise.
- * configure: Regenerate.
- * bfd-in2.h: Regenerate.
-
-2004-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * bfd-in.h (bfd_getb64, bfd_getl64): Replace bfd_byte* with void*.
- (bfd_getb32, bfd_getl32, bfd_getb16, bfd_getl16): Likewise.
- (bfd_getb_signed_64, bfd_getl_signed_64): Likewise.
- (bfd_getb_signed_32, bfd_getl_signed_32): Likewise.
- (bfd_getb_signed_16, bfd_getl_signed_16): Likewise.
- (bfd_putb64, bfd_putl64, bfd_putb32, bfd_putl32): Likewise.
- (bfd_putb16, bfd_putl16, bfd_get_bits, bfd_put_bits): Likewise.
- * libbfd.c: Likewise in function definitions.
- (bfd_put_8): Mask with 0xff rather than casting to char.
- (bfd_putb16, bfd_putl16, bfd_putb32, bfd_putl32): Likewise.
- (bfd_putb64, bfd_putl64, bfd_put_bits): Likewise.
- (H_PUT_64, H_PUT_32, H_PUT_16, H_PUT_8): Remove casts, simplify.
- (H_PUT_S64, H_PUT_S32, H_PUT_S16, H_PUT_S8): Likewise.
- (H_GET_64, H_GET_32, H_GET_16, H_GET_8): Likewise.
- (H_GET_S64, H_GET_S32, H_GET_S16, H_GET_S8): Likewise.
- * libaout.h (H_PUT_64 H_PUT_32, H_PUT_16): Remove casts, simplify.
- (H_PUT_S64, H_PUT_S32, H_PUT_S16): Likewise.
- (H_GET_64, H_GET_32, H_GET_16): Likewise.
- (H_GET_S64, H_GET_S32, H_GET_S16): Likewise.
- * archive.c (do_slurp_coff_armap): Update swap prototype.
- * coff-tic54x.c (tic54x_getl32): Replace bfd_byte* with void*.
- (tic54x_getl_signed_32): Likewise.
- (tic54x_putl32): Likewise. Mask with 0xff rather than casting to char.
- * mach-o.c (bfd_mach_o_read_header): Update get32 prototype.
- * pdp11.c (bfd_getp32): Make static, replace bfd_byte* with void*.
- (bfd_getp_signed_32, bfd_putp32): Likewise.
- * targets.c (struct bfd_target): Use void* in place of bfd_byte* for
- bfd_getx64, bfd_getx_signed_64, bfd_putx64, bfd_getx32,
- bfd_getx_signed_32, bfd_putx32, bfd_getx16, bfd_getx_signed_16,
- bfd_putx16, bfd_h_getx64, bfd_h_getx_signed_64, bfd_h_putx64,
- bfd_h_getx32, bfd_h_getx_signed_32, bfd_h_putx32, bfd_h_getx16,
- bfd_h_getx_signed_16, bfd_h_putx16.
- * aix386-core.c (NO_GET, NO_GETS, NO_PUT): Update prototypes.
- * hppabsd-core.c: Similarly. Rename NO_SIGNED_GET to NO_GETS.
- * hpux-core.c: Likewise.
- * irix-core.c: Likewise.
- * netbsd-core.c: Likewise.
- * osf-core.c: Likewise.
- * ptrace-core.c: Likewise.
- * sco5-core.c: Likewise.
- * trad-core.c: Likewise.
- * bfd-in2.h: Regenerate.
-
-2004-03-15 Matt Thomas <matt at 3am-software.com>
-
- * config.bfd: Add x86-64 vector to NetBSD/i386 if 64bit BFD is
- selected.
-
-2004-03-13 Mark Kettenis <kettenis at gnu.org>
-
- * config.bfd: Add x86_64-*-openbsd*.
- * configure.in (x86_64-*-openbsd*): Set COREFILE to
- netbsd-core.lo.
- * configure: Regenerate.
-
-2004-03-12 Nick Clifton <nickc at redhat.com>
- Dave Murphy <wintermute2k4 at ntlworld.com>
-
- * elf32-arm.h (elf32_arm_merge_private_bfd_data): Skip most checks
- if the input bfd does not contain any code.
-
-2004-03-09 Steve Ellcey <sje at cup.hp.com>
-
- * elfxx-ia64.c (plt_full_entry): Change ld8 to ld8.acq.
-
-2004-03-05 Fred Fish <fnf at redhat.com>
-
- * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_symbol): Just force
- mips16 symbols to be even rather than testing first for even/odd.
- (_bfd_mips_elf_link_output_symbol_hook): Ditto.
-
-2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
-
- * elf.c (map_sections_to_segments): Ignore .tbss sections for
- layout purposes.
-
-2004-03-03 Alexandre Oliva <aoliva at redhat.com>
-
- * elflink.c (bfd_elf_record_link_assignment): Mark undefweak and
- undefined symbols as hash_new.
-
-2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * archures.c: Add bfd_mach_sh4_nommu_nofpu.
- * cpu-sh.c: Ditto.
- * elf32-sh.c: Ditto.
- * bfd-in2.h: Regenerate.
-
-2004-03-02 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (struct frv_pic_relocs_info): Added fixups and
- dynrelocs.
- (_frv_count_got_plt_entries): Initialize them.
- (frv_pic_relocs_info_find): Add insert argument. Adjust all
- callers.
- (frv_pic_relocs_info_for_global): Likewise.
- (frv_pic_relocs_info_for_local): Likewise.
- (frv_pic_merge_early_relocs_info): New.
- (_frv_resolve_final_relocs_info): Use it in case one entry maps to
- another.
- (_frv_add_dyn_reloc): Add entry argument. Adjust all callers.
- Check that we don't exceed the allocated count for entry.
- (_frv_add_rofixup): Likewise.
- (_frv_emit_got_relocs_plt_entries): Adjust for coding standards.
- (elf32_frv_finish_dynamic_sections): Improve error message in case
- we emit too few rofixup entries.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * archures.c (bfd_mach_fr450): New.
- * bfd-in2.h: Regenerate.
- * cpu-frv.c (arch_info_450): New bfd_arch_info_type.
- (arch_info_500): Link to it.
- * elf32-frv.c (elf32_frv_machine, frv_elf_merge_private_bfd_data)
- (frv_elf_print_private_bfd_data): Handle fr405 and fr450 header flags.
- (frv_elf_arch_extension_p): New function.
- (frv_elf_merge_private_bfd_data): Use it.
-
-2004-02-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * elf-bfd.h (_bfd_elf_link_add_archive_symbols): New prototype.
-
- * elflink.h (is_global_data_symbol_definition): Moved to
- elflink.c.
- (elf_link_is_defined_archive_symbol): Likewise.
- (elf_link_add_archive_symbols): Likewise. Renamed to
- _bfd_elf_link_add_archive_symbols.
-
- * elflink.c (elf_link_is_defined_archive_symbol): Get the size
- of ELF symbol table entry from backend.
- (_bfd_elf_link_add_archive_symbols): Call bfd_link_add_symbols
- instead of elf_link_add_object_symbols.
-
-2004-02-27 Alexandre Oliva <aoliva at redhat.com>
-
- * elf-bfd.h (struct elf_backend_data): Added
- elf_backend_can_make_relative_eh_frame,
- elf_backend_can_make_lsda_relative_eh_frame and
- elf_backend_encode_eh_address.
- (_bfd_elf_encode_eh_address): Declare.
- (_bfd_elf_can_make_relative): Declare.
- * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Use new
- hooks to decide whether to attempt to make_relative and
- make_lsda_relative.
- (_bfd_elf_write_section_eh_frame_hdr): Call encode_eh_address.
- (_bfd_elf_can_make_relative): New.
- (_bfd_elf_encode_eh_address): New.
- * elf32-frv.c (frv_elf_use_relative_eh_frame): New.
- (frv_elf_encode_eh_address): New.
- (elf_backend_can_make_relative_eh_frame): Define.
- (elf_backend_can_make_lsda_relative_eh_frame): Define.
- (elf_backend_encode_eh_address): Define.
- * elfxx-target.h
- (elf_backend_can_make_relative_eh_frame): Define.
- (elf_backend_can_make_lsda_relative_eh_frame): Define.
- (elf_backend_encode_eh_address): Define.
- (elfNN_bed): Add them.
-
-2004-02-27 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (elf32_frv_howto_table) <R_FRV_LABEL16>: Set
- complain_on_overflow to signed.
-
-2004-02-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.h (sort_symbol): New.
- (elf_link_add_object_symbols): Use a sorted symbol array for
- weakdef.
-
-2004-02-27 Jakub Jelinek <jakub at redhat.com>
-
- * elf32-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL
- for pc relative relocs.
- (elf_s390_relocate_section): Likewise.
- * elf64-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL
- for pc relative relocs.
- (elf_s390_relocate_section): Likewise.
-
-2004-02-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_check_relocs): Fix call to
- count_dyn_reloc.
-
-2004-02-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_dyn_reloc_entry): Add the reltext.
- field to track if a relocation is against readonly section.
- (count_dyn_reloc): Take a new argument for rent->reltext.
- (elfNN_ia64_check_relocs): Adjust call to count_dyn_reloc.
- (get_reloc_section): Don't set ia64_info->reltext here.
- (allocate_dynrel_entries): Set ia64_info->reltext here.
-
-2004-02-24 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (FRV_SYM_LOCAL): Weak undefined doesn't imply local.
- (_frv_emit_got_relocs_plt_entries): Decay relocation to protected
- function's descriptor to symbol+offset, and map local undefweak
- symbol to NULL function descriptor.
- (elf32_frv_relocate_section): Likewise.
-
-2004-02-23 Mark Kettenis <kettenis at gnu.org>
-
- * libaout.h (enum machine_type): Add M_SPARC64_NETBSD and
- M_X86_64_NETBSD.
- * netbsd-core.c (M_SPARC64_OPENBSD): Define.
- (netbsd_core_file_p): Set architecture from machine ID for
- selected machines.
-
-2004-02-23 Jakub Jelinek <jakub at redhat.com>
-
- * elflink.h (size_dynamic_sections): If not adding DT_FLAGS and
- DF_BIND_NOW is set in info->flags, create DT_BIND_NOW dynamic entry.
-
-2004-02-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * elflink.c (_bfd_elf_merge_symbol): Properly handle undefined
- symbols with non-default visibility.
-
-2004-02-21 Danny Smith <daanysmith at users.sourceforge.net>
-
- * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Clear
- IMAGE_SCN_MEM_WRITE on known sections only.
-
-2004-02-20 Jakub Jelinek <jakub at redhat.com>
-
- * elf32-ppc.c (allocate_dynrelocs): Create dynsym for undef weak
- symbols used in PIE relocs.
-
-2004-02-19 Jakub Jelinek <jakub at redhat.com>
-
- * elf32-sparc.c (elf32_sparc_finish_dynamic_sections): Clear
- .plt sh_entsize.
-
-2004-02-18 Daniel Jacobowitz <drow at mvista.com>
-
- * configure.in: Update version to 2.15.90.
- * configure: Regenerate.
-
-2004-02-17 Daniel Jacobowitz <drow at mvista.com>
- Richard Sandiford <rsandifo at redhat.com>
-
- * elfxx-mips.c (mips_elf_calculate_relocation): Use
- _bfd_elf_symbol_refs_local_p to decide whether to decay
- a GOT_PAGE/GOT_OFST pair to GOT_DISP/addend.
- (_bfd_mips_elf_check_relocs): Add a global GOT entry for GOT_PAGE
- relocs if the symbol wasn't defined by a regular object file.
- Don't check the symbol's dynindx.
-
-2004-02-16 Andrew Cagney <cagney at redhat.com>
-
- * bfd-in.h (file_ptr, ufile_ptr): Configure type using
- @bfd_file_ptr at .
- * bfd-in2.h: Re-generate.
-
-2004-02-14 Andrew Cagney <cagney at redhat.com>
-
- * configure.host (HDEFINES): When hppa*-*-hpux*, define
- _LARGEFILE64_SOURCE.
-
-2004-02-13 Andrew Cagney <cagney at redhat.com>
-
- * elf.c (vma_page_aligned_bias): New function.
- (assign_file_positions_except_relocs)
- (assign_file_positions_for_segments): Replace broken modulo
- arithmetic with call to vma_page_aligned_bias.
-
-2004-02-11 Andrew Cagney <cagney at redhat.com>
-
- * bfd-in.h: Update copyright.
- (bfd_tell): Change return type to file_ptr.
- * bfd-in2.h: Re-generate.
- * cache.c: Update copyright.
- (bfd_cache_lookup_worker): Use real_fseek, do not cast offset
- parameter.
- (close_one): Use real_ftell.
- * bfdio.c: Update copyright.
- (real_ftell, real_fseek): New functions.
- (bfd_tell): Use real_fseek and real_ftell, change return type to
- file_ptr.
- (bfd_seek): Use real_ftell and real_fseek, change type of
- file_position to a file_ptr.
- * libbfd-in.h: Update copyright.
- (real_ftell, real_fseek): Declare.
- * libbfd.h: Re-generate.
-
- * configure.in (AC_CHECK_FUNCS): Check for ftello, ftello64,
- fseeko and fseeko64. Determine bfd_file_ptr.
- * configure: Re-generate.
- * config.in: Re-generate.
-
-2004-02-09 Anil Paranjpe <anilp1 at KPITCummins.com>
-
- * coff-h8300.c: Added comments about relaxation for ldc.w and stc.w.
- * elf32-h8300.c: Likewise.
-
-2004-02-09 Christian Vogel <vogelchr at vogel.cx>
- Nick Clifton <nickc at redhat.com>
-
- * elf64-alpha.c (elf64_alpha_calc_got_offsets_for_symbol): Catch
- GOT entries with no associated GOT subsection.
-
-2004-02-09 Richard Sandiford <rsandifo at redhat.com>
-
- * bfd-elf.h (elf_backend_name_local_section_symbols): New hook.
- * elf.c (swap_out_syms): Use it to decide whether local section
- symbols should be named.
- * elfxx-target.h (elf_backend_name_local_section_symbols): New macro.
- * elfxx-mips.h (_bfd_mips_elf_name_local_section_symbols): Declare.
- (elf_backend_name_local_section_symbols): Define.
- * elfxx-mips.c (_bfd_mips_elf_name_local_section_symbols): New.
-
-2004-01-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_brl): New function.
- (elfNN_ia64_relax_section): Optimize brl to br during the relax
- finalize pass.
-
-2004-01-30 Alexandre Oliva <aoliva at redhat.com>
-
- * elf32-frv.c (elf32_frv_always_size_sections): Initialize pointer
- to bfd_link_hash_entry passed by reference to
- _bfd_generic_link_add_one_symbol.
-
-2004-01-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Disallow imm
- relocations against dynamic symbols.
-
-2004-01-23 Daniel Jacobowitz <drow at mvista.com>
-
- * elf32-arm.h (elf32_arm_check_relocs): Revert part of 2004-01-13
- change.
-
-2004-01-21 Tom Rix <tcrix at worldnet.att.net>
-
- * reloc.c: New 5 bit reloc, BFD_RELOC_M68HC12_5B, for m68hc12 movb/movw.
- * bfd-in2.h, libbfd.h: Rebuilt.
-
-2004-01-20 Danny Smith <dannysmith at users.sourceforge.net>
-
- * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Don't remove
- IMAGE_SCN_MEM_WRITE flag from .text section if WP_TEXT
- flag has been cleared.
-
-2004-01-19 Kazu Hirata <kazu at cs.umass.edu>
-
- * coff-h8300.c: Add and adjust comments about relaxation.
- * elf32-h8300.c: Likewise.
-
-2004-01-16 Kazu Hirata <kazu at cs.umass.edu>
-
- * coff-h8300.c: Fix comment typos.
- * elf32-h8300.c: Likewise.
-
-2004-01-16 Kazu Hirata <kazu at cs.umass.edu>
-
- * coff-h8300.c: Add comments about relaxation.
- * elf32-h8300.c: Likewise.
-
-2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
- throughout.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
-
-2004-01-13 Ian Lance Taylor <ian at wasabisystems.com>
-
- * elf64-mips.c (mips_elf64_slurp_one_reloc_table): Call
- mips_elf64_rtype_to_howto instead of using howto_table.
-
-2004-01-13 Daniel Jacobowitz <drow at mvista.com>
-
- * elf32-arm.h (elf32_arm_final_link_relocate): Check that we created
- the .plt section.
- (elf32_arm_check_relocs): Don't increment the PLT refcount for
- relocs which would not use the PLT.
-
-2004-01-13 Alan Modra <amodra at bigpond.net.au>
-
- * elf64-ppc.c (ppc64_elf_check_relocs): Ignore !SEC_ALLOC relocs.
- (ppc64_elf_gc_sweep_hook): Likewise.
- (ppc64_elf_size_dynamic_sections): Test for .plt directly.
-
-2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
-
- Adds linker relaxation support for bit manipulation insns like
- band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset,
- bst, btst, bxor.
- * elf32-h8300.c: Opcode for bit manipulation insn is checked in
- elf32_h8_relax_section function while relxation for aa:16 and aa:32.
- * coff-h8300.c: Opcode for bit manipulation insn is checked in
- h8300_reloc16_extra_cases function while relxation for aa:16 and aa:32.
-
-2004-01-12 Alan Modra <amodra at bigpond.net.au>
-
- * dwarf2.c: Convert to C90, remove unneeded casts and prototypes.
-
-2004-01-11 Kazu Hirata <kazu at cs.umass.edu>
-
- * elf32-h8300.c: Fix formatting.
-
-2004-01-11 Kazu Hirata <kazu at cs.umass.edu>
-
- * elf32-cris.c (cris_elf_gc_sweep_hook): Return early if no
- dynamic object is present. Declare r_symndx and h in an inner
- scope.
- * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise.
-
-2004-01-09 Daniel Jacobowitz <drow at mvista.com>
-
- * elf32-arm.h (struct elf32_arm_relocs_copied): Remove pc_count.
- (elf32_arm_copy_indirect_symbol): Don't copy pc_count.
- (elf32_arm_final_link_relocate): Handle PLT32 and PC24 relocs
- identically. Do not emit PC24 relocations for shared libraries.
- (elf32_arm_gc_sweep_hook): Handle PLT32 and PC24 relocs
- identically. Don't adjust pc_count.
- (elf32_arm_check_relocs): Handle PLT32 and PC24 relocs identically.
- Set ELF_LINK_HASH_NEEDS_PLT for both. Don't adjust pc_count; don't
- adjust count for branch relocations.
- (allocate_dynrelocs): Correct typo in call to
- WILL_CALL_FINISH_DYNAMIC_SYMBOL. Never allocate space for
- PC24 or PLT32 relocs when linking.
-
-2004-01-09 Dmitry Semyonov <Dmitry.Semyonov at oktet.ru>
-
- * coff-arm.c (aoutarm_std_reloc_howto): [ARM_WINCE] Synchronize ARM_26D
- relocation howto with ARM_26 one for consistency.
- (coff_arm_relocate_section): Set partial_inplace for ARM_26 relocations
- that will be converted to ARM_26D ones, since we always want 'done'
- relocations to be reflected in section's data.
- (coff_arm_relocate_section): [ARM_WINCE] Quick fix for BL instruction
- offset.
- (_bfd_final_link_relocate): Do not modify "inplace" data, if not
- requested.
-
-2004-01-08 Dmitry Semyonov <Dmitry.Semyonov at oktet.ru>
-
- * coff-arm.c (coff_arm_relocate_section): Do not alter relocs that
- are not partial_inplace during a relocatable link.
-
-2004-01-08 Kazu Hirata <kazu at cs.umass.edu>
-
- * elf32-m68k.c (elf_m68k_gc_sweep_hook): Return early
- if no dynamic object is present. Declare r_symndx and h in an
- inner scope.
-
-2004-01-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * elfxx-ia64.c (elfNN_ia64_relax_section): Don't install
- trampoline if it is known out of range.
-
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-12-17 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (_frv_osec_readonly_p): New.
- (_frv_emit_got_relocs_plt_entries): Don't emit rofixup for
- undefweak symbol.
- (_frv_count_got_plt_entries): Adjust expected count accordingly.
- (elf32_frv_relocate_section): Likewise. Error out if attempting
- to emit rofixups or dynamic relocs in read-only segments. Use
- _bfd_elf_section_offset to adjust r_offsets in rofixups and
- dynamic relocations.
- 2003-12-12 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_relocate_section): Compute dynamic
- relocations or fixups involving merged sections correctly. Avoid
- crash when undefined symbol is referenced by R_FRV_32 or
- R_FRV_FUNCDESC_VALUE.
- 2003-12-02 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_relocate_section): Add output_offset of
- input section holding local symbol to addend of R_FRV_32 or
- R_FRV_FUNCDESC_VALUE dynamic relocation.
- 2003-11-27 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_modify_segment_map): Add link info arg.
- (elf32_frv_always_size_sections): Don't store pointer to
- __stacksize symbol in sec_info.
- (elf32_frv_modify_segment_map): Look it up here.
- 2003-11-26 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Emit the address
- of the lazy PLT entry, not only its offset, as the low word of a
- function descriptor.
- 2003-11-10 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_always_size_sections): Define __stacksize
- if a hash table entry already exists but is not a definition.
- 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (frv_elf_link_hash_table_create): Use bfd_zalloc.
- (_frv_add_rofixup): Don't inline.
- (_frv_emit_got_relocs_plt_entries): Use NULL as funcdesc address
- for undefweak symbols.
- (elf32_frv_relocate_section): Avoid crash while computing
- relocation when linking with shared library. Only emit rofixups
- and dynamic relocations for alloc&load sections. Mark binaries
- with inter-segment relocations for relocation as a unit.
- (_frv_create_got_section): Rename .rofixup.got to .rofixup.
- (DEFAULT_STACK_SIZE): New.
- (_frv_count_got_plt_entries): Fix thinko in deciding whether to
- emit rofixups or dynamic relocs when linking dynamic non-PIE
- executables.
- (elf32_frv_size_dynamic_sections): Generate rofixup on PIEs and
- shared libs too. Reserve the last entry for the GOT pointer.
- (elf32_frv_finish_dynamic_sections): Emit it.
- (elf32_frv_always_size_sections): New.
- (elf32_frv_modify_segment_map): New.
- (elf32_frv_check_relocs): Reserve relocs32 space only in ALLOC
- sections.
- (frv_elf_merge_private_bfd_data): Clear PIC bit if FDPIC is set.
- (frv_elf_print_private_bfd_data): Handle FDPIC and LIBPIC.
- (elf_backend_always_size_sections): New.
- (elf_backend_modify_segment_map): New.
- 2003-10-31 Alexandre Oliva <aoliva at redhat.com>
- * config.bfd: Added frv-*-*linux*.
- * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Use idx 0 for
- ABS section, instead of crashing.
- (elf32_frv_relocate_section): Don't crash before warning about
- different segments in non-PIC relocation.
- 2003-10-17 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_relocate_section): Don't warn on LABEL24
- relocs to undefweak symbols.
- (elf32_frv_relocate_section): Ditto for undefined symbols.
- 2003-10-06 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_create_dynamic_sections): Make sure
- gotfixup section was created.
- 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (elf32_frv_howto_table): Change GOT12,
- FUNCDESC_GOT12, GOTOFF12 and FUNCDESC_GOTOFF12 to
- complain_overflow_signed.
- * elf32-frv.c (_frv_add_rofixup): Do not error out if contents
- have not been allocated.
- (_frv_emit_got_relocs_plt_entries): Return non-void. Assert
- privfd only if dynamic sections were created.
- (elf32_frv_relocate_section): Compute gprel_segment, and use it
- for GPREL relocs. When linking relocatable FDPIC executables,
- emit warnings for relocations that would be illegal on PIE or
- shared libraries. Emit rofixup for R_FRV_32 only if input object
- is not FDPIC.
- (_frv_create_got_section): Define _gp symbol in the rofixup
- section.
- (elf32_frv_finish_dynamic_sections): If rofixups needed but
- dynamic sections missing, error out requesting -melf32frvfd.
- 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Rearrange
- computation of addends from section and global or local symbol
- value. Change return type to bfd_boolean, and return a failure if
- a dynamic FUNCDESC or FUNCDESC_VALUE relocation that requires a
- nonzero addend is required.
- (elf32_frv_relocate_section): Likewise. Print error for
- unsupported nonzero addends.
- 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (FRV_SYM_LOCAL): In the absence of dynamic sections,
- force everything local.
- (_frv_emit_got_relocs_plt_entries): Cope with NULL sec.
- * elf32-frv.c (struct frv_elf_link_hash_table): Added sgotfixup.
- (frv_gotfixup_section): New.
- (FRV_SYM_LOCAL): Accept undefweak and local common symbols.
- (struct frv_pic_relocs_info): Split relocs into relocs32, relocsfd
- and relocsfdv.
- (_frv_add_rofixup): New.
- (_frv_emit_got_relocs_plt_entries): Generate fixups for non-PIE
- fdpic executables. Use FRV_SYM_LOCAL more widely to simplify and
- improve some ugly conditions.
- (elf32_frv_relocate_section): Likewise. Reject inter-segment
- relocations in fdpic.
- (_frv_create_got_section): Create .rofixup.got section.
- (struct _frv_dynamic_got_info): Added fixups.
- (_frv_count_got_plt_entries): Account in-GOT relocations into
- relocs32, relocsfd and relocsfdv. Account them into relocs or
- fixups, as appropriate.
- (elf32_frv_size_dynamic_sections): Size rofixup section. Simplify
- sizing of gotrel.
- (elf32_frv_finish_dynamic_sections): Verify that the right number
- of relocations and fixups was generated.
- (elf32_frv_check_relocs): Compute relocs32, relocsfd and
- relocsfdv.
- * elf32-frv.c (FRV_SYM_LOCAL): New macro, used instead of
- SYMBOL_CALLS_LOCAL and SYMBOL_REFERENCES_LOCAL.
- (FRV_FUNCDESC_LOCAL): New macro, used to decide whether a function
- descriptor of a (formerly-)global symbol is local.
- (struct frv_pic_relocs_info): Adjust comments.
- (_frv_emit_got_relocs_plt_entries): Adjust.
- (elf32_frv_relocate_section): Likewise.
- (_frv_count_got_plt_entries): Likewise.
- * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Don't add global
- symbol's value to addend in the common preamble. Decay dynamic
- symbols to section+offset if they bind or call locally, for GOT
- and FUNCDESC_VALUE, respectively.
- (elf32_frv_relocate_section): Likewise.
- (elf32_frv_check_relocs): Don't register as dynamic symbols of
- internal or hidden visibility.
- 2003-09-17 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Get addend as
- argument, so as to not call _bfd_elf_rel_local_sym to compute it.
- (elf32_frv_relocate_section): Pass relocation addend in. Use
- original relocation addend to look up the got relocs/plt entries
- table. Do not call _bfd_elf_rel_local_sym. Don't error out when
- processing relocations that reference .scommon symbols.
- 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
- Introduce support for dynamic linking.
- * elf32-frv.c (R_FRV_FUNCDESC_VALUE): Mark it as 64 bits.
- (elf32_frv_rel_32_howto, elf32_frv_rel_funcdesc_howto,
- elf32_frv_rel_funcdesc_value_howto): New REL descriptors.
- (frv_reloc_type_lookup): Return REL howtos for executables and
- dynamic libraries.
- (frv_info_to_howto_rel): New.
- (struct frv_elf_link_hash_table): New.
- (frv_hash_table, frv_got_section, frv_gotrel_section,
- frv_plt_section, frv_pltrel_section, frv_relocs_info,
- frv_got_initial_offset, frv_plt_initial_offset): New macros.
- (frv_elf_link_hash_table_create): New.
- (struct frv_pic_relocs_info): New.
- (frv_pic_relocs_info_hash, frv_pic_relocs_info_eq): New.
- (frv_pic_relocs_info_find): New.
- (frv_pic_relocs_info_for_global, frv_pic_relocs_info_for_local):
- New.
- (FRV_LZPLT_BLOCK_SIZE, FRV_LZPLT_RESOLVE_LOC): New.
- (_frv_add_dyn_reloc, _frv_osec_to_segment): New.
- (_frv_emit_got_relocs_plt_entries): New.
- (elf32_frv_relocate_section): Add support for dynamic linking.
- Handle new relocations.
- (_frv_create_got_section): New.
- (elf32_frv_create_dynamic_sections): New.
- (ELF_DYNAMIC_INTERPRETER): New.
- (struct _frv_dynamic_got_info): New.
- (_frv_count_got_plt_entries): New.
- (struct _frv_dynamic_got_plt_info): New.
- (_frv_compute_got_alloc_data): New.
- (_frv_get_got_entry, _frv_get_fd_entry): New.
- (_frv_assign_got_entries, _frv_assign_plt_entries): New.
- (_frv_resolve_final_relocs_info): New.
- (elf32_frv_size_dynamic_sections): New.
- (elf32_frv_finish_dynamic_sections): New.
- (elf32_frv_adjust_dynamic_symbol): New.
- (elf32_frv_finish_dynamic_symbol): New.
- (elf32_frv_check_relocs): Handle new relocs. Explain how the
- whole thing works.
- (elf_info_to_howto_rel): Define.
- (bfd_elf32_bfd_link_hash_table_create): Define.
- (elf_backend_create_dynamic_sections): Define.
- (elf_backend_adjust_dynamic_symbol): Define.
- (elf_backend_size_dynamic_sections): Define.
- (elf_backend_finish_dynamic_symbol): Define.
- (elf_backend_finish_dynamic_sections): Define.
- (elf_backend_want_got_sym): Define.
- (elf_backend_got_header_size): Define.
- (elf_backend_want_got_plt): Define.
- (elf_backend_plt_readonly): Define.
- (elf_backend_want_plt_sym): Define.
- (elf_backend_plt_header_size): Define.
- (elf_backend_may_use_rel_p): Define.
- (elf_backend_may_use_rela_p): Define.
- (elf_backend_default_use_rela_p): Define.
- 2003-08-08 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (R_FRV_FUNCDESC_VALUE, R_FRV_FUNCDESC_GOTOFF12,
- R_FRV_FUNCDESC_GOTOFFHI, R_FRV_FUNCDESC_GOTOFFLO, R_FRV_GOTOFF12,
- R_FRV_GOTOFFHI, R_FRV_GOTOFFLO): New.
- (frv_reloc_map): Map the corresponding BFD relocs to them.
- (frv_reloc_type_lookup): ... and back to BFD relocs.
- * reloc.c: New relocs.
- * bfd-in2.h, libbfd.h: Rebuilt.
- 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
- * elf32-frv.c (R_FRV_GOT12, R_FRV_GOTHI, R_FRV_GOTLO,
- R_FRV_FUNCDESC, R_FRV_FUNCDESC_GOT12, R_FRV_FUNCDESC_GOTHI,
- R_FRV_FUNCDESC_GOTLO): New.
- (frv_reloc_map): Map the corresponding BFD relocs to them.
- (frv_reloc_type_lookup): ... and back to BFD relocs.
- * reloc.c: New relocs.
- * bfd-in2.h, libbfd.h: Rebuilt.
-
-2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * elf32-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
- targets to support pages of up to 64kB.
- (elf32_bed): Redefine to get a separate backend data structure for
- traditional targets.
- * elf64-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
- targets to support pages of up to 64kB.
- (elf64_bed): Redefine to get a separate backend data structure for
- traditional targets.
- * elfn32-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
- targets to support pages of up to 64kB.
- (elf32_bed): Redefine to get a separate backend data structure for
- traditional targets.
-
-2004-01-04 Mark Kettenis <kettenis at gnu.org>
-
- * elf32-sparc.c (elf32_sparc_grok_psinfo): New function.
-
-2004-01-02 Mark Kettenis <kettenis at gnu.org>
-
- * elf32-i386.c (elf_i386_grok_prstatus): Add support for FreeBSD.
- (elf_i386_grok_psinfo): Likewise.
-
-2004-01-02 Bernardo Innocenti <bernie at develer.com>
-
- * config.bfd: Add m68k-uClinux target.
-
-2004-01-01 Grant Edwards <grante at visi.com>
-
- * elflink.h (elf_gc_sections): Warn when gc-sections option is ignored.
- * elf32-h8300.c (elf32_h8_gc_mark_hook): New function.
- (elf32_h8_gc_sweep_hook): New function.
- (elf_backend_gc_mark_hook): Define.
- (elf_backend_gc_sweep_hook): Define.
- (elf_backend_can_gc_sections): Define.
-
-For older changes see ChangeLog-0203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/bfd/ChangeLog-2004
===================================================================
--- branches/binutils/package/bfd/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5063 @@
+2004-12-31 Paul Brook <paul at copdesourcery.com>
+
+ * elf32-arm.c (elf32_arm_symbian_plt_entry): Fix comment typo.
+
+2004-12-31 Alan Modra <amodra at bigpond.net.au>
+
+ * reloc.c (BFD_RELOC_AVR_LDI, BFD_RELOC_AVR_6, BFD_RELOC_AVR_6_ADIW):
+ Commit missing changes from 2004-12-22.
+ * bfd-in2.h: Regenerate.
+
+2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * elf32-crx.c (elf32_crx_relax_section): Support 'bcop' relaxation.
+
+2004-12-21 Kris Warkentin <kewarken at qnx.com>
+
+ * elf.c (elfcore_grok_nto_gregs): Change name to elfcore_grok_nto_regs.
+ Add 'base' argument for constructing register sections. Reformat.
+ (elfcore_grok_nto_note): Call elfcore_grok_nto_regs for both
+ gp and fp regs. Reformat.
+
+2004-12-22 Klaus Rudolph <lts-rudolph at gmx.de>
+
+ * reloc.c: Add new relocs R_AVR_LDI, R_AVR_6, R_AVR_6_ADIW.
+ * bfd-in2.h: Regenerate.
+ * elf32-avr.c (elf_avr_nowto_table): Add the new relocs.
+ (avr_reloc_map): Likewise.
+ (avr_final_link_relocate): Likewise.
+
+2004-12-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (_bfd_elf_merge_symbol): Treat old definitions from
+ as-needed dynamic libs as undefined.
+ (elf_link_add_object_symbols): Remove DYN_AS_NEEDED from as-needed
+ libs when finding they are needed.
+
+2004-12-20 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add opd_relocs.
+ (opd_entry_value): Use opd_relocs if available.
+ (ppc64_elf_relocate_section): Don't set reloc_done. Instead
+ copy .opd relocations to opd_relocs.
+ (ppc64_elf_edit_toc): Set rel_hdr.sh_size after editing relocs.
+
+2004-12-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type.
+ * elf32-v850.c (v850_elf_howto_table): Add entry for
+ R_V850_LO16_SPLIT_OFFSET.
+ (v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET.
+ (v850_elf_perform_lo16_relocation): New function, extracted from...
+ (v850_elf_perform_relocation): ...here. Use it to handle
+ R_V850_LO16_SPLIT_OFFSET.
+ (v850_elf_check_relocs, v850_elf_final_link_relocate): Handle
+ R_V850_LO16_SPLIT_OFFSET.
+ * libbfd.h, bfd-in2.h: Regenerate.
+
+2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
+
+ * config.bfd: Add s390x-ibm-tpf support.
+
+2004-12-14 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * elf32-crx.c (elf32_crx_relax_delete_bytes): Add 'struct bfd_link_info *'
+ to prototype, to make hash info available.
+ Prevent wrapped symbols from being adjusted twice.
+
+2004-12-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Don't report an
+ overflow for calls to undefined weak symbols.
+
+2004-12-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elfcode.h (elf_slurp_symbol_table): Use bfd_elf_sym_name so that
+ canonical sections syms have a name.
+
+2004-12-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (opd_entry_value): Don't use cached relocs if they
+ have been adjusted for output.
+ (ppc64_elf_relocate_section): Mark sections with reloc_done.
+
+2004-12-10 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (bfd_elf_sym_name): Rename from bfd_elf_local_sym_name and
+ add symtab_hdr param.
+ (group_signature): Update calls.
+ * elf-bfd.h (bfd_elf_sym_name): Update.
+ * elf32-ppc.c (ppc_elf_relocate_section): Update.
+ * elf64-ppc.c (ppc64_elf_edit_opd, ppc64_elf_edit_toc): Update.
+ (ppc64_elf_relocate_section): Update.
+ * elflink.c (elf_link_input_bfd): Update.
+
+2004-12-10 Jakub Jelinek <jakub at redhat.com>
+
+ * elf.c (bfd_elf_local_sym_name): Avoid crashes with invalid
+ st_shndx on STT_SECTION sections.
+
+2004-12-09 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elfcode.h (elf_slurp_reloc_table_from_section): Don't canonicalize
+ ELF section symbols.
+
+2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): For R_MIPS_JALR,
+ return a real value, unless it is a PLT symbol.
+ (mips_elf_perform_relocation): On the RM9000, turn a jal into a
+ bal if possible.
+
+ * elfn32-mips.c (elf_mips_howto_table_rela): Change dst_mask of
+ R_MIPS_JALR entry to 0.
+
+ * archures.c: Define bfd_mach_mips9000.
+ * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_9000.
+ (mips_set_isa_flags): Handle bfd_mach_mips9000.
+ * cpu-mips.c (I_mips9000): Define.
+ (arch_info_struct): Add case for bfd_mach_mips9000.
+ * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mips9000.
+ * bfd-in2.h: Regenerate.
+
+2004-12-08 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Test for R_MIPS_26
+ overflow.
+
+2004-12-07 Ben Elliston <bje at gnu.org>
+
+ * netbsd-core.c (netbsd_core_file_p): Make `i' unsigned.
+
+2004-12-06 Daniel Jacobowitz <dan at debian.org>
+
+ Suggested by Fergal Daly <fergal at esatclear.ie>:
+ * simple.c (simple_dummy_multiple_definition): New function.
+ (bfd_simple_get_relocated_section_contents): Use it.
+
+2004-12-03 Jan Beulich <jbeulich at novell.com>
+
+ * elf.c (elf_find_function): Don't use the last file symbol ever,
+ seen, but the last one seen prior to the symbol being reported.
+ Don't report a filename at all for global symbols when that might
+ be ambiguous/wrong.
+
+2004-12-01 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_copy_private_bfd_data): Set EI_OSABI.
+ (elf32_arm_post_process_headers): Set EI_OSABI depending on ABI
+ version.
+
+2004-12-01 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (elf_link_add_object_symbols): Make symbols from discarded
+ sections undefined.
+
+2004-11-30 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (struct elf32_arm_link_hash_table): Remove
+ no_pipeline_knowledge
+ (elf32_arm_link_hash_table_create): Ditto.
+ (bfd_elf32_arm_process_before_allocation): Ditto.
+ (elf32_arm_final_link_relocate): Ditto. Remove oabi relocation
+ handling.
+ * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update
+ prototype.
+ * bfd-in2.h: Regenerate.
+
+2004-11-30 Randolph Chung <tausq at debian.org>
+
+ * elf32-hppa.c (elf32_hppa_grok_prstatus): New function.
+ (elf32_hppa_grok_psinfo): New function.
+ (elf_backend_grok_prstatus): Define.
+ (elf_backend_grok_psinfo): Define.
+
+2004-11-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 574:
+ * elfcode.h (elf_slurp_symbol_table): Handle STT_TLS.
+
+2004-11-24 Paul Brook <paul at codesourcery.com>
+
+ * elf.c (assign_section_numbers): Number SHT_GROUP sections first.
+
+2004-11-24 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_swap_symbol_in): New function.
+ (elf32_arm_swap_symbol_out): New function.
+ (elf32_arm_size_info): Add.
+ (elf_backend_size_info): Define.
+
+2004-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hpux-core.c (hpux_core_core_file_p): Use offsetof macro in calls to
+ make_bfd_asection.
+
+2004-11-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-arm.c (elf32_arm_finish_dynamic_sections): Warning fix.
+ * elf32-iq2000.c (iq2000_reloc_type_lookup): C90 function decl.
+ * nlmcode.h (nlm_write_object_contents): Warning fix.
+
+2004-11-18 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (ebb_propose_action): Fix argument order.
+
+2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-arm.c (PLT_THUMB_STUB_SIZE): Define.
+ (elf32_arm_plt_thumb_stub): New.
+ (struct elf32_arm_link_hash_entry): Add plt_thumb_refcount
+ and plt_got_offset.
+ (elf32_arm_link_hash_traverse): Fix typo.
+ (elf32_arm_link_hash_table): Add obfd.
+ (elf32_arm_link_hash_newfunc): Initialize new fields.
+ (elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount.
+ (elf32_arm_link_hash_table_create): Initialize obfd.
+ (record_arm_to_thumb_glue): Mark the glue as a local ARM function.
+ (record_thumb_to_arm_glue): Mark the glue as a local Thumb function.
+ (bfd_elf32_arm_get_bfd_for_interworking): Verify that the
+ interworking BFD is not dynamic.
+ (bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do
+ not emit glue for PLT references.
+ (elf32_arm_final_link_relocate): Handle Thumb functions. Do not
+ emit glue for PLT references. Support the Thumb PLT prefix.
+ (elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and
+ plt_thumb_refcount.
+ (elf32_arm_check_relocs): Likewise.
+ (elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and
+ plt_thumb_refcount.
+ (allocate_dynrelocs): Handle Thumb PLT references.
+ (elf32_arm_finish_dynamic_symbol): Likewise.
+ (elf32_arm_symbol_processing): New function.
+ (elf_backend_symbol_processing): Define.
+
+2004-11-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-bfd.h (eh_cie_fde): Add new fields: add_augmentation_size and
+ add_fde_encoding. Remove need_relative.
+ * elf-eh-frame.c (extra_augmentation_string_bytes)
+ (extra_augmentation_data_bytes, size_of_output_cie_fde): New functions.
+ (_bfd_elf_discard_section_eh_frame): Consider changing the FDE encoding
+ in cases where the CIE has no existing 'R' augmentation. Use
+ size_of_output_cie_fde when assigning offsets. Use the final offset
+ as the new section size.
+ (_bfd_elf_eh_frame_section_offset): Remove need_relative handling.
+ Account for any extra augmentation bytes in the returned offset.
+ (_bfd_elf_write_section_eh_frame): Rework so that the entries are
+ moved before being modified. Pad growing entries with DW_CFA_nops.
+ Add 'z' and 'R' augmentations as directed by add_augmentation_size
+ and add_fde_encoding.
+
+2004-11-15 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_relocate_section): Use
+ arm_real_reloc_type.
+
+2004-11-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * elfxx-mips.c (mips_elf_create_dynamic_relocation): Return early
+ for discard relocations; don't add an R_MIPS_NONE to the main body
+ of .rel.dyn.
+
+2004-11-04 Paul Brook <paul at codesourcery.com>
+
+ * elf-bfd.h (_bfd_elf_slurp_version_tables): Update prototype.
+ * elf.c (_bfd_elf_print_private_bfd_data): Pass extra argument.
+ (_bfd_elf_slurp_version_tables): Add extra argument. Create extra
+ default version definition for unversioned symbols.
+ * elfcode.h (elf_slurp_symbol_table): Pass extra argument.
+ * elflink.c (elf_link_add_object_symbols): Pass extra argument to
+ _bfd_elf_slurp_version_tables. Set default version for unversioned
+ imported symbols.
+
+2004-11-15 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (elf_link_add_object_symbols): Don't assume version
+ indices are consecutive.
+
+2004-11-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Deal with
+ composite relocations against the personality data.
+
+2004-11-13 Paul Brook <paul at codesourcery.com>
+
+ * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Resolve
+ R_ARM_PREL31 relocations to PLT entries.
+ (elf32_arm_relocate_section, elf32_arm_gc_sweep_hook): Ditto.
+ (elf32_arm_check_relocs): Ditto.
+
+2004-11-12 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-isa.c (xtensa_interface_class_id): New.
+
+2004-11-11 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (property_table_compare): Remove assertion about
+ entries with the same address and non-zero size.
+ (xtensa_read_table_entries): Report such entries as errors.
+
+2004-11-11 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): Correct logic for
+ R_ARM_RELATIVE on Symbian OS.
+
+2004-11-09 Mark Mitchell <mark at codesourcery.com>
+
+ * som.c (som_bfd_print_private_bfd_data): New function.
+ (som_object_setup): Save the auxiliary header. Don't assume that
+ zero is an invalid entry point for a shared library.
+ (som_object_p): Allocate the auxiliary header on the heap.
+
+ * elf32-arm.c (elf32_arm_begin_write_processing): Do not use a K&R
+ declaration.
+ (elf32_arm_symbian_modify_segment_map): Likewise.
+
+2004-11-09 Daniel Jacobowitz <dan at debian.org>
+
+ From David Poole <daveml at mbuf.com>:
+ * elf32-arm.c (elf32_arm_readonly_dynrelocs): New function.
+ (elf32_arm_size_dynamic_sections): Call it.
+
+2004-11-09 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (SOURCE_HFILES): Remove elf32-arm.h.
+ (ALL_MACHINES_CFILES): Fix typo.
+ * Makefile.in: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2004-11-08 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): When generating an
+ R_ARM_RELATIVE relocation for Symbian OS, mention the section
+ symbol in the relocation.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * coff-maxq.c: New File.
+ * cpu-maxq.c: New File.
+ * coffcode.h: Likewise.
+ * config.bfd: Likewise.
+ * configure.in (maxqcoff_vec): New target vector.
+ * Makefile.am: Add support for maxq target.
+ * configure.in: Likewise.
+ * archures.c:. Likewise.
+ * targets.c: Likewise.
+ * bfd_in2.h : Regenerated.
+ * Makefile.in: Regenerated.
+ * configure: Regenerated.
+ * doc/Makefile.in: Regenerated.
+
+2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * coff-i386.c (coff_i386_reloc): Fix weak symbols.
+ * cofflink.c (_bfd_coff_link_input_bfd): Don't process
+ C_NT_WEAK aux entries.
+ (_bfd_coff_generic_relocate_section): Handle undefined
+ aliases.
+
+2004-11-07 Andreas Schwab <schwab at suse.de>
+
+ * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Use
+ SYMBOL_CALLS_LOCAL and check for undefweak symbols with
+ non-default visibility.
+
+2004-11-01 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_symbian_begin_write_processing): Clear
+ D_PAGED.
+ (elf32_arm_symbian_modify_segment_map): Don't
+ reset includes_filehdr and includes_phdrs here.
+
+2004-11-04 Daniel Jacobowitz <dan at debian.org>
+
+ * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace
+ elfarm-nabi with elf32-arm. Remove elfarm-oabi.
+ (elf32-arm.lo): Replace elfarm-nabi.lo rule. Remove elf32-arm.h
+ dependency.
+ * config.bfd: Move arm-*-oabi* and thumb-*-oabi* from obsolete list
+ to a new removed list. Remove normal configuration stanzas.
+ * configure.in: (bfd_elf32_bigarm_vec, bfd_elf32_bigarm_symbian_vec)
+ (bfd_elf32_littlearm_symbian_vec, bfd_elf32_littlearm_vec): Replace
+ elfarm-nabi.lo with elf32-arm.lo.
+ (bfd_elf32_bigarm_oabi_vec, bfd_elf32_littlearm_oabi_vec): Remove.
+ * elf32-arm.c: Renamed from elfarm-nabi.c. Inline elf32-arm.h.
+ * elf32-arm.h: Remove.
+ * elfarm-oabi.c: Remove.
+ * targets.c (_bfd_target_vector): Remove bfd_elf32_bigarm_oabi_vec
+ and bfd_elf32_littlearm_oabi_vec.
+ * aclocal.m4, Makefile.in, configure, doc/Makefile.in: Regenerated.
+
+2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+
+ * config.bfd: Support crisv32-*-* like cris-*-*.
+ * archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32)
+ (bfd_mach_cris_v10_v32): New macros.
+ * cpu-cris.c: Tweak formatting.
+ (get_compatible): New function.
+ (N): New macro.
+ (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New
+ bfd_arch_info_type:s.
+ (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach,
+ get_compatible for member compatible and link bfd_cris_arch_v32 as
+ next.
+ * elf32-cris.c (cris_elf_pcrel_reloc)
+ (cris_elf_set_mach_from_flags): New functions.
+ (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL>
+ <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc.
+ (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct
+ numbers for bfd_mach_cris_v32.
+ (PLT_ENTRY_SIZE_V32): New macro.
+ (elf_cris_plt0_entry): Drop last comma in initializer.
+ (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32)
+ (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New
+ PLT initializers.
+ (cris_elf_relocate_section): Change all "%B(%A)" messages to
+ "%B, section %A".
+ (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries.
+ (elf_cris_finish_dynamic_sections): Similar.
+ (elf_cris_adjust_dynamic_symbol): Similar.
+ (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B,
+ section %A".
+ <switch with PIC relocs>: Emit error and return FALSE for
+ bfd_mach_cris_v10_v32.
+ <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>:
+ Emit warning when generating textrel reloc.
+ (cris_elf_object_p): Call cris_elf_set_mach_from_flags.
+ (cris_elf_final_write_processing): Set flags according to mach.
+ (cris_elf_print_private_bfd_data): Display
+ EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32.
+ (cris_elf_merge_private_bfd_data): Drop variables old_flags,
+ new_flags. Don't call cris_elf_final_write_processing. Don't
+ look at the actual elf header flags at all; use
+ bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference
+ in bfd_get_mach for ibfd and obfd and handle merging of compatible
+ objects.
+ (bfd_elf32_bfd_copy_private_bfd_data): Define.
+ * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8)
+ (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16)
+ (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs.
+ * bfd-in2.h, libbfd.h: Regenerate.
+
+2004-11-04 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.h (ppc64_elf_edit_toc): Declare.
+ * elf64-ppc.c (struct ppc_link_hash_entry <adjust_done>): Update
+ comment.
+ (struct adjust_toc_info): New.
+ (adjust_toc_syms, ppc64_elf_edit_toc): New functions.
+
+2004-11-03 Bob Wilson <bob.wilson at acm.org>
+
+ * elf.c (assign_file_positions_for_segments): Set next_file_pos even
+ if there are no segments.
+
+2004-11-02 Daniel Jacobowitz <dan at debian.org>
+
+ * config.bfd: Mark arm-*-oabi and thumb-*-oabi as obsolete.
+
+2004-11-02 Nick Clifton <nickc at redhat.com>
+
+ * elf32-iq2000.c: Convert to ISO C90 formatting.
+
+2004-11-02 Hans-Peter Nilsson <hp at axis.com>
+
+ * elflink.c (_bfd_elf_create_got_section): Hide _GLOBAL_OFFSET_TABLE_.
+
+2004-10-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Handle weak
+ undefined symbols for R_IA64_SECREL32MSB, R_IA64_SECREL32LSB,
+ R_IA64_SECREL64MSB and R_IA64_SECREL64LSB.
+
+2004-10-28 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * elf32-sh.c (tpoff): Take alignment into account.
+
+2004-10-28 Nick Clifton <nickc at redhat.com>
+
+ * elf32-iq2000.c (iq2000_elf_relocate_section): Do nothing when
+ performing a relocatable link.
+ (iq2000_elf_object_p): Do not set elf_bad_symtab. This is only
+ for MIPS ports under Irix.
+
+2004-10-27 Richard Earnshaw <rearnsha at arm.com>
+
+ * elf32-arm.h (bfd_elf32_arm_process_before_allocation): Handle
+ R_ARM_CALL and R_ARM_JUMP24 as aliases of R_ARM_PC24.
+ (elf32_arm_final_link_relocate): Ditto.
+ (arm_add_to_rel, elf32_arm_relocate_section): Ditto.
+ (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto
+ (elf32_arm_adjust_dynamic_symbol): Ditto.
+ * elfarm-nabi.c (elf32_arm_howto_table): Add R_ARM_CALL and
+ R_ARM_JUMP32. Move R_ARM_R{REL32,ABS32,PC24,BASE}...
+ (elf32_arm_r_howto): ... To here.
+ (elf32_arm_howto_from_type): Use elf32_arm_r_howto.
+
+2004-10-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 475
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Correct
+ R_IA64_SECREL32MSB, R_IA64_SECREL32LSB, R_IA64_SECREL64MSB
+ and R_IA64_SECREL64LSB.
+
+2004-10-26 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (elf_finalize_dynstr): Skip shared aux structure.
+ (bfd_elf_size_dynamic_sections): Create default version definition.
+ (elf_link_output_extsym): Adjust for default symbol version.
+
+2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * mmo.c: Adjust to ISO C.
+
+ * mmo.c (mmo_write_section_description): New function broken out
+ of mmo_internal_write_section.
+ (mmo_internal_write_section): For each of .text and .data, call
+ mmo_write_section_description before outputting contents if it has
+ nontrivially deducible vma or contents.
+ (mmo_has_leading_or_trailing_zero_tetra_p): New function.
+ (mmo_canonicalize_symtab): Adjust absolute symbols to .data
+ symbols if found within the .data address range.
+
+2004-10-24 Daniel Jacobowitz <dan at debian.org>
+
+ * opncls.c (bfd_close): Return TRUE for BFD_IN_MEMORY.
+
+2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * mmo.c (File Layout): Correct place of misplaced blurb about
+ special data.
+
+2004-10-22 Mark Kettenis <kettenis at gnu.org>
+
+ * config.bfd: Add mips64*-*-openbsd.
+
+2004-10-21 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (ebb_propose_action): Put declarations before
+ statements.
+
+2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.94.
+ * configure: Regenerate.
+
+2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 463
+ * aoutx.h (aout_link_input_section_std): Pass proper hash entry
+ to linker reloc_overflow callback.
+ (aout_link_input_section_ext): Likewise.
+ (aout_link_reloc_link_order): Likewise.
+ * coff-a29k.c (coff_a29k_relocate_section): Likewise.
+ * coff-alpha.c (alpha_ecoff_get_relocated_section_contents):
+ Likewise.
+ (alpha_relocate_section): Likewise.
+ * coff-arm.c (coff_arm_relocate_section): Likewise.
+ * coff-h8300.c (h8300_reloc16_extra_cases): Likewise.
+ * coff-h8500.c (extra_case): Likewise.
+ * coff-i960.c (coff_i960_relocate_section): Likewise.
+ * coff-mcore.c (coff_mcore_relocate_section): Likewise.
+ * coff-mips.c (mips_relocate_section): Likewise.
+ * coff-or32.c (coff_or32_relocate_section): Likewise.
+ * coff-ppc.c (coff_ppc_relocate_section): Likewise.
+ * coff-rs6000.c (xcoff_ppc_relocate_section): Likewise.
+ * coff-sh.c (sh_relocate_section): Likewise.
+ * coff-tic80.c (coff_tic80_relocate_section): Likewise.
+ * coff-w65.c (w65_reloc16_extra_cases): Likewise.
+ * coff-z8k.c (extra_case): Likewise.
+ * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
+ * cofflink.c (_bfd_coff_reloc_link_order): Likewise.
+ (_bfd_coff_generic_relocate_section): Likewise.
+ * ecoff.c (ecoff_reloc_link_order): Likewise.
+ * elf-hppa.h (elf_hppa_relocate_section): Likewise.
+ * elf-m10200.c (mn10200_elf_relocate_section): Likewise.
+ * elf-m10300.c (mn10300_elf_relocate_section): Likewise.
+ * elf32-arm.h (elf32_arm_relocate_section): Likewise.
+ * elf32-avr.c (elf32_avr_relocate_section): Likewise.
+ * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise.
+ * elf32-cris.c (cris_elf_relocate_section): Likewise.
+ * elf32-crx.c (elf32_crx_relocate_section): Likewise.
+ * elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
+ * elf32-fr30.c (fr30_elf_relocate_section): Likewise.
+ * elf32-frv.c (elf32_frv_relocate_section): Likewise.
+ * elf32-h8300.c (elf32_h8_relocate_section): Likewise.
+ * elf32-hppa.c (elf32_hppa_relocate_section): Likewise.
+ * elf32-i370.c (i370_elf_relocate_section): Likewise.
+ * elf32-i386.c (elf_i386_relocate_section): Likewise.
+ * elf32-i860.c (elf32_i860_relocate_section): Likewise.
+ * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise.
+ * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise.
+ * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
+ * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise.
+ * elf32-m68k.c (elf_m68k_relocate_section): Likewise.
+ * elf32-mcore.c (mcore_elf_relocate_section): Likewise.
+ * elf32-msp430.c (elf32_msp430_relocate_section): Likewise.
+ * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
+ * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
+ * elf32-s390.c (elf_s390_relocate_section): Likewise.
+ * elf32-sh.c (sh_elf_relocate_section): Likewise.
+ * elf32-sparc.c (elf32_sparc_relocate_section): Likewise.
+ * elf32-v850.c (v850_elf_relocate_section): Likewise.
+ * elf32-vax.c (elf_vax_relocate_section): Likewise.
+ * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise.
+ * elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
+ * elf64-mmix.c (mmix_elf_relocate_section): Likewise.
+ * elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
+ * elf64-s390.c (elf_s390_relocate_section): Likewise.
+ * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
+ * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
+ * elflink.c (elf_reloc_link_order): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise.
+ (_bfd_elf_mips_get_relocated_section_contents): Likewise.
+ * linker.c (_bfd_generic_reloc_link_order): Likewise.
+ * pdp11.c (pdp11_aout_link_input_section): Likewise.
+ (aout_link_reloc_link_order): Likewise.
+ * reloc.c (bfd_generic_get_relocated_section_contents):
+ Likewise.
+ * xcofflink.c (xcoff_reloc_link_order): Likewise.
+ * simple.c (simple_dummy_reloc_overflow): Updated.
+
+2004-10-20 Andreas Schwab <schwab at suse.de>
+
+ * elf32-m68k.c (elf_m68k_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+
+2004-10-19 Danny Smith <dannysmith at users.sourceforege.net>
+
+ * config.bfd: Set targ_underscore=yes for PE COFF targets
+
+2004-10-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (opd_entry_value): Handle --just-symbols objects.
+ (ppc64_elf_edit_opd): Likewise.
+
+2004-10-18 Mark Mitchell <mark at codesourcery.com>
+
+ * elfarm-nabi.c (ELF_DYNAMIC_SEC_FLAGS): Add comment.
+ * elflink.c (_bfd_elf_create_dynamic_sections): For a loaded PLT,
+ set SEC_ALLOC and SEC_LOAD.
+
+2004-10-18 Nick Clifton <nickc at redhat.com>
+
+ * elf32-xstormy16.c (xstormy16_elf_relocate_section): Compute
+ 'name' for relocs against both local and global symbols.
+
+2004-10-16 Daniel Jacobowitz <dan at debian.org>
+
+ * bfd-in2.h: Regenerate.
+ * bfd.c (struct bfd): Add no_export.
+ * elflink.c (elf_link_add_object_symbols): Handle no_export.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * config.bfd: Whitespace cleanup.
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2004-10-15 Jakub Jelinek <jakub at redhat.com>
+
+ * elflink.c (struct already_linked_section): Removed.
+ (try_match_symbols_in_sections, already_linked): Removed.
+ (_bfd_elf_section_already_linked): Skip ^\.gnu\.linkonce\.[^.]*\.
+ prefix of section names when finding already_linked_table
+ chain. Compare section names. Instead of calling already_linked,
+ do it inline and only for sections in the same already_linked_list.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Add "info"
+ parameter. If called after _bfd_elf_write_section_eh_frame,
+ don't allow a -2 return unless need_* bit is already set, and
+ handle offsets adjusted for output_offset.
+ * elf-bfd.h (_bfd_elf_eh_frame_section_offset): Update prototype.
+ * elf.c (_bfd_elf_section_offset): Update call.
+
+2004-10-13 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 440
+ * coffcode.h (coff_compute_section_file_positions): Cast to
+ bfd_vma when computing page alignment.
+
+2004-10-13 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.h (elf32_arm_finish_dynamic_sections): Use file
+ offsets, not VMAs, for DT_VERSYM, DT_VERDEF, DT_VERNEED.
+
+2004-10-12 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.h (elf32_arm_finish_dynamic_symbol): Make .rel.plt
+ relocations use a virtual address, not a section offset.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (elf_xtensa_get_private_bfd_flags): Delete.
+ (narrow_instruction, widen_instruction): Remove unnecessary calls to
+ xtensa_format_encode.
+ (ebb_propose_action): Inline call to ebb_add_proposed_action.
+ (ebb_add_proposed_action): Delete.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c: Use ISO C90 formatting.
+
+2004-10-12 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (elf32_arm_merge_private_bfd_data): Rephrase error
+ message.
+
+2004-10-12 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h: Support EABI version 4 objects.
+
+2004-10-12 Alan Modra <amodra at bigpond.net.au>
+
+ PR 325
+ * cpu-i386.c (bfd_x86_64_arch_intel_syntax): Place last in chain.
+ Don't mark as default.
+ (bfd_x86_64_arch): Don't mark as default.
+
+2004-10-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (enum action_discarded): New.
+ (elf_section_complain_discarded): Delete.
+ (elf_action_discarded): New function subsuming the above and also
+ controlling reloc behaviour.
+ (elf_link_input_bfd): Use it.
+
+2004-10-11 Jakub Jelinek <jakub at redhat.com>
+
+ * elf.c (bfd_section_from_shdr): Handle SHT_GNU_LIBLIST.
+ (special_sections): Add .gnu.liblist and .gnu.conflict.
+ (assign_section_numbers): Handle SHT_GNU_LIBLIST.
+
+2004-10-11 Alan Modra <amodra at bigpond.net.au>
+
+ PR 233
+ * elflink.c (elf_link_input_bfd): Try harder to support
+ relocations against symbols in removed linkonce sections.
+
+2004-10-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_input_bfd): Revert PR 354 change.
+
+ PR 354
+ * elflink.c (elf_link_input_bfd): Check that relocs in SEC_ALLOC
+ sections do not reference symbols in non-SEC_ALLOC sections.
+
+2004-10-11 Alan Modra <amodra at bigpond.net.au>
+
+ PR 437
+ * elflink.c (elf_link_sort_relocs): Don't bomb on unusual sections.
+ (_bfd_elf_link_omit_section_dynsym): Formatting.
+
+2004-10-10 Alan Modra <amodra at bigpond.net.au>
+
+ * libbfd-in.h (BFD_ASSERT, BFD_FAIL): Wrap macro body in do while.
+ * libbfd.h: Regnerate.
+ * elf32-cris.c: Add missing semicolon to BFD_ASSERTs.
+ * elf32-frv.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * opncls.c: Likewise.
+
+2004-10-10 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct eh_frame_hdr_info): Add offsets_adjusted.
+ * elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Adjust
+ offsets stored in struct eh_cie_fde entries before doing other
+ work.
+
+ * elf-bfd.h (struct eh_cie_fde): Add cie_inf, remove sec.
+ (struct eh_frame_hdr_info): Add last_cie_inf, remove last_cie_offset.
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Delete code
+ setting offsets for removed CIEs. Don't set "sec", instead set
+ cie_inf for FDEs. Keep a pointer to last struct eh_cie_fde for a
+ CIE in hdr_info. Only set make_relative and make_lsda_relative
+ for CIEs. Use pointers rather than array indices.
+ (_bfd_elf_eh_frame_section_offset): Test/set make_relative,
+ make_lsda_relative, need_* on cie_inf for FDEs.
+ (_bfd_elf_write_section_eh_frame): Adjust offset and new_offset for
+ section output_offset. Delete cie_offset, instead use cie_inf
+ pointer to CIE entry. Use need_relative and need_lsda_relative on
+ CIE entry for FDEs. Use pointers rather than array indices.
+
+2004-10-09 Alan Modra <amodra at bigpond.net.au>
+
+ * coff-rs6000.c (rs6000coff_vec): Add initializer for
+ bfd_is_target_special_symbol.
+ * coff64-rs6000.c (rs6000coff64_vec): Likewise.
+ * som.c (som_bfd_is_target_special_symbol): Define.
+
+2004-10-08 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.93.
+ * configure: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * syms.c (bfd_is_target_special_symbol): New interface function.
+ Returns true when a symbol should be considered to be special.
+ * targets.c (bfd_target): Include bfd_is_target_special_symbol in
+ the symbol jump table.
+ * elf32-arm.h (elf32_arm_is_target_special_symbol): New function.
+ Return true iff the symbol is a mapping symbol.
+ (bfd_elf32_bfd_is_target_special_symbol): Define.
+ * elfxx-target.h: Provide a default definition for
+ bfd_is_target_special_symbol.
+ * aout-target.h: Likewise.
+ * aout-tic30.c: Likewise.
+ * binary.c: Likewise.
+ * coffcode.h: Likewise.
+ * i386msdos.c: Likewise.
+ * ieee.c: Likewise.
+ * ihex.c: Likewise.
+ * libaout.h: Likewise.
+ * libbfd-in.h: Likewise
+ * libecoff.h: Likewise.
+ * mach-o.c: Likewise.
+ * mmo.c: Likewise.
+ * nlm-target.h: Likewise.
+ * oasys.c: Likewise.
+ * pef.c: Likewise.
+ * ppcboot.c: Likewise.
+ * srec.c: Likewise.
+ * tekhex.c: Likewise.
+ * versados.c: Likewise.
+ * vms.c: Likewise.
+ * xcoff-target.h: Likewise.
+ * xsym.c: Likewise.
+ * libbfd.h: Regenerate.
+
+2004-10-08 Daniel Jacobowitz <dan at debian.org>
+
+ * config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*.
+ * elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function.
+ (elf_backend_section_from_shdr): Define.
+
+2004-10-08 Alan Modra <amodra at bigpond.net.au>
+
+ * syms.c (bfd_is_local_label): Return false for file symbols.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+ David Heine <dlheine at tensilica.com>
+
+ * elf32-xtensa.c (elf32xtensa_size_opt): New global variable.
+ (xtensa_default_isa): Global variable moved here from xtensa-isa.c.
+ (elf32xtensa_no_literal_movement): New global variable.
+ (elf_howto_table): Add entries for new relocations.
+ (elf_xtensa_reloc_type_lookup): Handle new relocations.
+ (property_table_compare): When addresses are equal, compare sizes and
+ various property flags.
+ (property_table_matches): New.
+ (xtensa_read_table_entries): Extend to read new property tables. Add
+ output_addr parameter to indicate that output addresses should be used.
+ Use bfd_get_section_limit.
+ (elf_xtensa_find_property_entry): New.
+ (elf_xtensa_in_literal_pool): Use elf_xtensa_find_property_entry.
+ (elf_xtensa_check_relocs): Handle new relocations.
+ (elf_xtensa_do_reloc): Use bfd_get_section_limit. Handle new
+ relocations. Use new xtensa-isa.h functions.
+ (build_encoding_error_message): Remove encode_result parameter. Add
+ new target_address parameter used to detect alignment errors.
+ (elf_xtensa_relocate_section): Use bfd_get_section_limit. Clean up
+ error handling. Use new is_operand_relocation function.
+ (elf_xtensa_combine_prop_entries, elf_xtensa_merge_private_bfd_data):
+ Use underbar macro for error messages. Formatting.
+ (get_const16_opcode): New.
+ (get_l32r_opcode): Add a separate flag for initialization.
+ (get_relocation_opnd): Operand number is no longer explicit in the
+ relocation. Change to decode the opcode and analyze its operands.
+ (get_relocation_slot): New.
+ (get_relocation_opcode): Add bfd parameter. Use bfd_get_section_limit.
+ Use new xtensa-isa.h functions to handle multislot instructions.
+ (is_l32r_relocation): Add bfd parameter. Use is_operand_relocation.
+ (get_asm_simplify_size, is_alt_relocation, is_operand_relocation,
+ insn_decode_len, insn_decode_opcode, check_branch_target_aligned,
+ check_loop_aligned, check_branch_target_aligned_address, narrowable,
+ widenable, narrow_instruction, widen_instruction, op_single_fmt_table,
+ get_single_format, init_op_single_format_table): New.
+ (elf_xtensa_do_asm_simplify): Add error_message parameter and use it
+ instead of calling _bfd_error_handler. Use new xtensa-isa.h functions.
+ (contract_asm_expansion): Add error_message parameter and pass it to
+ elf_xtensa_do_asm_simplify. Replace use of R_XTENSA_OP0 relocation
+ with R_XTENSA_SLOT0_OP.
+ (get_expanded_call_opcode): Extend to handle either L32R or CONST16
+ instructions. Use new xtensa-isa.h functions.
+ (r_reloc struct): Add new virtual_offset field.
+ (r_reloc_init): Add contents and content_length parameters. Set
+ virtual_offset field to zero. Add contents to target_offset field for
+ partial_inplace relocations.
+ (r_reloc_is_defined): Check for null.
+ (print_r_reloc): New debug function.
+ (source_reloc struct): Replace xtensa_operand field with pair of the
+ opcode and the operand position. Add is_abs_literal field.
+ (init_source_reloc): Specify operand by opcode/position pair. Set
+ is_abs_literal field.
+ (source_reloc_compare): When target_offsets are equal, compare other
+ fields to make sorting predictable.
+ (literal_value struct): Add is_abs_literal field.
+ (value_map_hash_table struct): Add has_last_loc and last_loc fields.
+ (init_literal_value): New.
+ (is_same_value): Replace with ...
+ (literal_value_equal): ... this function. Add comparisons of
+ virtual_offset and is_abs_literal fields.
+ (value_map_hash_table_init): Use bfd_zmalloc. Check for allocation
+ failure. Initialize has_last_loc field.
+ (value_map_hash_table_delete): New.
+ (hash_literal_value): Rename to ...
+ (literal_value_hash): ... this. Include is_abs_literal flag and
+ virtual_offset field in the hash value.
+ (get_cached_value): Rename to ...
+ (value_map_get_cached_value): ... this. Update calls to
+ literal_value_hash and literal_value_equal.
+ (add_value_map): Check for allocation failure. Update calls to
+ value_map_get_cached_value and literal_value_hash.
+ (text_action, text_action_list, text_action_t): New types.
+ (find_fill_action, compute_removed_action_diff, adjust_fill_action,
+ text_action_add, text_action_add_literal, offset_with_removed_text,
+ offset_with_removed_text_before_fill, find_insn_action,
+ print_action_list, print_removed_literals): New.
+ (offset_with_removed_literals): Delete.
+ (xtensa_relax_info struct): Add is_relaxable_asm_section, action_list,
+ fix_array, fix_array_count, allocated_relocs, relocs_count, and
+ allocated_relocs_count fields.
+ (init_xtensa_relax_info): Initialize new fields.
+ (reloc_bfd_fix struct): Add new translated field.
+ (reloc_bfd_fix_init): Add translated parameter and use it to set the
+ translated field.
+ (fix_compare, cache_fix_array): New.
+ (get_bfd_fix): Remove fix_list parameter and get all relax_info for the
+ section via get_xtensa_relax_info. Use cache_fix_array to set up
+ sorted fix_array and use bsearch instead of linear search.
+ (section_cache_t): New struct.
+ (init_section_cache, section_cache_section, clear_section_cache): New.
+ (ebb_t, ebb_target_enum, proposed_action, ebb_constraint): New types.
+ (init_ebb_constraint, free_ebb_constraint, init_ebb, extend_ebb_bounds,
+ extend_ebb_bounds_forward, extend_ebb_bounds_backward,
+ insn_block_decodable_len, ebb_propose_action, ebb_add_proposed_action):
+ New.
+ (retrieve_contents): Use bfd_get_section_limit.
+ (elf_xtensa_relax_section): Add relocations_analyzed flag. Update call
+ to compute_removed_literals. Free value_map_hash_table when no longer
+ needed.
+ (analyze_relocations): Check is_relaxable_asm_section flag. Call
+ compute_text_actions for all sections.
+ (find_relaxable_sections): Mark sections as relaxable if they contain
+ ASM_EXPAND relocations that can be optimized. Adjust r_reloc_init
+ call. Increment relax_info src_count field only for appropriate
+ relocation types. Remove is_literal_section check.
+ (collect_source_relocs): Use bfd_get_section_limit. Adjust calls to
+ r_reloc_init and find_associated_l32r_irel. Check
+ is_relaxable_asm_section flag. Handle L32R instructions with absolute
+ literals. Pass is_abs_literal flag to init_source_reloc.
+ (is_resolvable_asm_expansion): Use bfd_get_section_limit. Check for
+ CONST16 instructions. Adjust calls to r_reloc_init and
+ pcrel_reloc_fits. Handle weak symbols conservatively.
+ (find_associated_l32r_irel): Add bfd parameter and pass it to
+ is_l32r_relocation.
+ (compute_text_actions, compute_ebb_proposed_actions,
+ compute_ebb_actions, check_section_ebb_pcrels_fit,
+ check_section_ebb_reduces, text_action_add_proposed,
+ compute_fill_extra_space): New.
+ (remove_literals): Replace with ...
+ (compute_removed_literals): ... this function. Call
+ init_section_cache. Use bfd_get_section_limit. Sort internal_relocs.
+ Call xtensa_read_table_entries to get the property table. Skip
+ relocations other than R_XTENSA_32 and R_XTENSA_PLT. Use new
+ is_removable_literal, remove_dead_literal, and
+ identify_literal_placement functions.
+ (get_irel_at_offset): Rewrite to use bsearch on sorted relocations
+ instead of linear search.
+ (is_removable_literal, remove_dead_literal,
+ identify_literal_placement): New.
+ (relocations_reach): Update check for literal not referenced by any
+ PC-relative relocations. Adjust call to pcrel_reloc_fits.
+ (coalesce_shared_literal, move_shared_literal): New.
+ (relax_section): Use bfd_get_section_limit. Call
+ translate_section_fixes. Update calls to r_reloc_init and
+ offset_with_removed_text. Check new is_relaxable_asm_section flag.
+ Add call to pin_internal_relocs. Add special handling for
+ R_XTENSA_ASM_SIMPLIFY and R_XTENSA_DIFF* relocs. Use virtual_offset
+ info to calculate new addend_displacement variable. Replace code for
+ deleting literals with more general code to perform the actions
+ determined by the action_list for the section.
+ (translate_section_fixes, translate_reloc_bfd_fix): New.
+ (translate_reloc): Check new is_relaxable_asm_section flag. Call
+ find_removed_literal only if is_operand_relocation. Update call to
+ offset_with_removed_text. Use new target_offset and removed_bytes
+ variables.
+ (move_literal): New.
+ (relax_property_section): Use bfd_get_section_limit. Set new
+ is_full_prop_section flag and handle new property tables. Update calls
+ to r_reloc_init and offset_with_removed_text. Check
+ is_relaxable_asm_section flag. Handle expansion of zero-sized
+ unreachable entries, with use of offset_with_removed_text_before_fill.
+ For relocatable links, combine entries only for literal tables.
+ (relax_section_symbols): Check is_relaxable_asm_section flag. Update
+ calls to offset_with_removed_text. Translate st_size field for
+ function symbols.
+ (do_fix_for_relocatable_link): Change to return bfd_boolean to indicate
+ failure. Add contents parameter. Update call to get_bfd_fix. Update
+ call to r_reloc_init. Call _bfd_error_handler and return FALSE for
+ R_XTENSA_ASM_EXPAND relocs.
+ (do_fix_for_final_link): Add input_bfd and contents parameters. Update
+ call to get_bfd_fix. Include offset from contents for partial_inplace
+ relocations.
+ (is_reloc_sym_weak): New.
+ (pcrel_reloc_fits): Use new xtensa-isa.h functions.
+ (prop_sec_len): New.
+ (xtensa_is_property_section): Handle new property sections.
+ (is_literal_section): Delete.
+ (internal_reloc_compare): When r_offset matches, compare r_info and
+ r_addend to make sorting predictable.
+ (internal_reloc_matches): New.
+ (xtensa_get_property_section_name): Handle new property sections.
+ (xtensa_get_property_predef_flags): New.
+ (xtensa_callback_required_dependence): Use bfd_get_section_limit.
+ Update calls to xtensa_isa_init, is_l32r_relocation, and r_reloc_init.
+ * xtensa-isa.c (xtensa_default_isa): Moved to elf32-xtensa.c.
+ (xtisa_errno, xtisa_error_msg): New variables.
+ (xtensa_isa_errno, xtensa_isa_error_msg): New.
+ (xtensa_insnbuf_alloc): Add error handling.
+ (xtensa_insnbuf_to_chars): Add num_chars parameter. Update to
+ use xtensa_format_decode. Add error handling.
+ (xtensa_insnbuf_from_chars): Add num_chars parameter. Decode the
+ instruction length to find the number of bytes to copy.
+ (xtensa_isa_init): Add error handling. Replace calls to
+ xtensa_load_isa and xtensa_extend_isa with code to initialize lookup
+ tables in the xtensa_modules structure.
+ (xtensa_check_isa_config, xtensa_add_isa, xtensa_load_isa,
+ xtensa_extend_isa): Delete.
+ (xtensa_isa_free): Change to only free lookup tables.
+ (opname_lookup_compare): Replace with ...
+ (xtensa_isa_name_compare): ... this function. Use strcasecmp.
+ (xtensa_insn_maxlength): Rename to ...
+ (xtensa_isa_maxlength): ... this.
+ (xtensa_insn_length): Delete.
+ (xtensa_insn_length_from_first_byte): Replace with ...
+ (xtensa_isa_length_from_chars): ... this function.
+ (xtensa_num_opcodes): Rename to ...
+ (xtensa_isa_num_opcodes): ... this.
+ (xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
+ xtensa_isa_num_regfiles, xtensa_isa_num_stages,
+ xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
+ xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
+ xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
+ xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
+ xtensa_format_get_slot, xtensa_format_set_slot): New functions.
+ (xtensa_opcode_lookup): Add error handling.
+ (xtensa_decode_insn): Replace with ...
+ (xtensa_opcode_decode): ... this function, with new format and
+ slot parameters. Add error handling.
+ (xtensa_encode_insn): Replace with ...
+ (xtensa_opcode_encode): ... this function, which does the encoding via
+ one of the entries in the "encode_fns" array. Add error handling.
+ (xtensa_opcode_name): Add error handling.
+ (xtensa_opcode_is_branch, xtensa_opcode_is_jump, xtensa_opcode_is_loop,
+ xtensa_opcode_is_call): New.
+ (xtensa_num_operands): Replace with ...
+ (xtensa_opcode_num_operands): ... this function. Add error handling.
+ (xtensa_opcode_num_stateOperands,
+ xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
+ xtensa_opcode_funcUnit_use, xtensa_operand_name,
+ xtensa_operand_is_visible): New.
+ (xtensa_get_operand, xtensa_operand_kind): Delete.
+ (xtensa_operand_inout): Add error handling and special-case for
+ "sout" operands.
+ (xtensa_operand_get_field, xtensa_operand_set_field): Rewritten to
+ operate on one slot of an instruction. Added error handling.
+ (xtensa_operand_encode): Handle default operands with no encoding
+ functions. Check for success by comparing against decoded value.
+ Add error handling.
+ (xtensa_operand_decode): Handle default operands. Return decoded value
+ through argument pointer. Add error handling.
+ (xtensa_operand_is_register, xtensa_operand_regfile,
+ xtensa_operand_num_regs, xtensa_operand_is_known_reg): New.
+ (xtensa_operand_isPCRelative): Rename to ...
+ (xtensa_operand_is_PCrelative): ... this. Add error handling.
+ (xtensa_operand_do_reloc, xtensa_operand_undo_reloc): Return value
+ through argument pointer. Add error handling.
+ (xtensa_stateOperand_state, xtensa_stateOperand_inout,
+ xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
+ xtensa_regfile_lookup_shortname, xtensa_regfile_name,
+ xtensa_regfile_shortname, xtensa_regfile_view_parent,
+ xtensa_regfile_num_bits, xtensa_regfile_num_entries,
+ xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
+ xtensa_state_is_exported, xtensa_sysreg_lookup,
+ xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
+ xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
+ xtensa_interface_num_bits, xtensa_interface_inout,
+ xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
+ xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New.
+ * xtensa-modules.c: Rewrite to use new data structures.
+ * reloc.c (BFD_RELOC_XTENSA_DIFF8, BFD_RELOC_XTENSA_DIFF16,
+ BFD_RELOC_XTENSA_DIFF32, BFD_RELOC_XTENSA_SLOT0_OP,
+ BFD_RELOC_XTENSA_SLOT1_OP, BFD_RELOC_XTENSA_SLOT2_OP,
+ BFD_RELOC_XTENSA_SLOT3_OP, BFD_RELOC_XTENSA_SLOT4_OP,
+ BFD_RELOC_XTENSA_SLOT5_OP, BFD_RELOC_XTENSA_SLOT6_OP,
+ BFD_RELOC_XTENSA_SLOT7_OP, BFD_RELOC_XTENSA_SLOT8_OP,
+ BFD_RELOC_XTENSA_SLOT9_OP, BFD_RELOC_XTENSA_SLOT10_OP,
+ BFD_RELOC_XTENSA_SLOT11_OP, BFD_RELOC_XTENSA_SLOT12_OP,
+ BFD_RELOC_XTENSA_SLOT13_OP, BFD_RELOC_XTENSA_SLOT14_OP,
+ BFD_RELOC_XTENSA_SLOT0_ALT, BFD_RELOC_XTENSA_SLOT1_ALT,
+ BFD_RELOC_XTENSA_SLOT2_ALT, BFD_RELOC_XTENSA_SLOT3_ALT,
+ BFD_RELOC_XTENSA_SLOT4_ALT, BFD_RELOC_XTENSA_SLOT5_ALT,
+ BFD_RELOC_XTENSA_SLOT6_ALT, BFD_RELOC_XTENSA_SLOT7_ALT,
+ BFD_RELOC_XTENSA_SLOT8_ALT, BFD_RELOC_XTENSA_SLOT9_ALT,
+ BFD_RELOC_XTENSA_SLOT10_ALT, BFD_RELOC_XTENSA_SLOT11_ALT,
+ BFD_RELOC_XTENSA_SLOT12_ALT, BFD_RELOC_XTENSA_SLOT13_ALT,
+ BFD_RELOC_XTENSA_SLOT14_ALT): Add new relocations.
+ * Makefile.am (xtensa-isa.lo, xtensa-modules.lo): Update dependencies.
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Likewise.
+ * libbfd.h: Likewise.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf64-mips.c (mips_elf64_write_rel): Use STN_UNDEF for relocs
+ against the absolute section.
+ (mips_elf64_write_rela): Likewise.
+
+2004-10-07 Jan Beulich <jbeulich at novell.com>
+
+ * elf.c (elf_find_function): Don't generally check for matching
+ section, just for non-file symbols. Remove redunant comparison
+ for the latter.
+ * elf32-arm.h (arm_elf_find_function): Likewise.
+
+2004-10-07 Jeff Baker <jbaker at qnx.com>
+
+ * elflink.c (_bfd_elf_add_dynamic_entry): Add code to warn if
+ adding a DT_TEXTREL to a shared object and --warn-shared-textrel
+ was specified.
+
+2004-10-04 Roland McGrath <roland at redhat.com>
+
+ * hash.c (bfd_hash_set_default_size): Use const for table.
+ Use size_t instead of int for variable compared to sizeof results.
+
+2004-10-05 Alan Modra <amodra at bigpond.net.au>
+
+ PR 425
+ * syms.c (_bfd_stab_section_find_nearest_line): Ignore R_*_NONE relocs.
+
+2004-10-01 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (elf32_arm_fake_sections,
+ is_arm_elf_unwind_section_name, elf32_arm_section_from_shdr): New
+ functions.
+ (elf_backend_fake_sections, elf_backend_section_from_shdr): Define.
+
+2004-10-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct eh_cie_fde): Add need_relative and
+ need_lsda_relative.
+ * elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Set
+ need_relative or need_lsda_relative if we are processing an
+ offset for a reloc on a FDE initial loc or LSDA field
+ respectively.
+ (_bfd_elf_write_section_eh_frame): Test need_relative and
+ need_lsda_relative in place of corresponding make_* field
+ when deciding to use pc-relative encodings.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (bfd_elf32_arm_set_target_relocs): Handle "abs"
+ target2 relocation type.
+
+2004-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 414
+ * elflink.c (_bfd_elf_merge_symbol): Check TLS symbol.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * reloc.c: Add BFD_RELOC_ARM_SMI.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Ditto.
+
+2004-09-24 Alan Modra <amodra at bigpond.net.au>
+
+ * dwarf2.c (_bfd_dwarf2_find_nearest_line): Add output section
+ vma and output offset to address.
+ * simple.c (simple_save_output_info): Only set output section
+ and offset for debug sections, or those not already set up by
+ the linker.
+ (bfd_simple_get_relocated_section_contents): Update comment.
+
+2004-09-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (IS_LOADED): Delete.
+ (assign_file_positions_for_segments): Just test SEC_LOAD instead.
+ Restore SEC_HAS_CONTENTS test to the one place it was used prior
+ to 2004-09-22.
+
+2004-09-23 Alan Modra <amodra at bigpond.net.au>
+
+ PR gas/396
+ * elf32-sparc.c (elf32_sparc_final_write_processing): Handle
+ bfd_mach_sparc_sparclet and bfd_mach_sparc_sparclite. Remove
+ redundant assignment of EM_SPARC.
+
+2004-09-22 Brian Ford <ford at vss.fsi.com>
+
+ * pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Enable 16 byte
+ alignment for .rdata sections so sse[2] code works with gcc >= 3.3.3
+ constants.
+ * pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
+
+2004-09-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_modify_segment_map): Delete.
+ (elf_backend_modify_segment_map): Don't define.
+
+2004-09-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (IS_LOADED): Define.
+ (assign_file_positions_for_segments): Don't round up file offset of
+ PT_LOAD segments containing no SEC_LOAD sections, instead round down.
+ Delete code handling link script adjustment of lma. Do the adjust
+ in later code handling similar ajustments. Remove dead code error
+ check. Warn if section lma would require a negative offset
+ adjustment. Tweak lma adjustment to use p_filesz rather than p_memsz.
+ Use p_vaddr + p_memsz inside section loop in place of voff. Don't
+ update voff in section loop. Change voff in segment loop to be an
+ adjustment on top of "off". Set sec->filepos and update "off" later.
+ Test for loadable sections consistently using IS_LOADED. Similarly,
+ test for alloc-only sections other than .tbss consistently.
+ Don't bother checking SEC_ALLOC in PT_LOAD segments. Remove FIXME.
+ Tidy PT_NOTE handling. Use %B and %A in error messages.
+ (assign_file_positions_except_relocs): Use %B in error message.
+
+2004-09-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
+ (CONFIG_STATUS_DEPENDENCIES): New.
+ (Makefile): Removed.
+ (config.status): Likewise.
+ * Makefile.in: Regenerated.
+
+2004-09-17 Paul Brook <paul at codesourcery.com>
+
+ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add prototype.
+ (bfd_elf32_arm_process_before_allocation): Update prototype.
+ * bfd-in2.h: Regenerate.
+ * bfd/elf32-arm.h (elf32_arm_link_hash_table): Add target2_reloc.
+ (elf32_arm_link_hash_table_create): Set it.
+ (bfd_elf32_arm_process_before_allocation): Remove target1_is_rel.
+ (bfd_elf32_arm_set_target_relocs): New function.
+ (arm_real_reloc_type): New function.
+ (elf32_arm_final_link_relocate): Use it. Handle R_ARM_PREL31 and
+ R_ARM_GOT_PREL. Remove R_ARM_TARGET1.
+ (elf32_arm_gc_sweep_hook): Ditto.
+ (elf32_arm_check_relocs): Ditto.
+ (elf32_arm_relocate_section): Handle R_ARM_GOT_PREL.
+ * elfarm-nabi.c (elf32_arm_howto_table): Add R_ARM_PREL31 and
+ R_ARM_GOT_TARGET2.
+ (elf32_arm_got_prel): New variable.
+ (elf32_arm_howto_from_type): New function.
+ (elf32_arm_info_to_howto): Use it.
+ (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PREL31 and
+ BFD_RELOC_ARM_TARGET2.
+ * libbfd.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_ARM_TARGET2 and BFD_RELOC_ARM_PREL31.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ecoff.c: Update u.undef.next refs.
+ * elf64-ppc.c: Likewise.
+ * elflink.c: Likewise.
+ * linker.c: Likewise.
+ * xcofflink.c: Likewise.
+
+ * elf-bfd.h (struct elf_link_hash_entry): Rearrange. Add FIXME to
+ dynamic_def. Combine weakdef and elf_hash_value. Move vtable
+ fields to indirect struct.
+ * elf-m10300.c: Update u.weakdef refs.
+ * elf32-arm.h: Likewise.
+ * elf32-cris.c: Likewise.
+ * elf32-frv.c: Likewise.
+ * elf32-hppa.c: Likewise.
+ * elf32-i370.c: Likewise.
+ * elf32-i386.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-s390.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-sparc.c: Likewise.
+ * elf32-vax.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-s390.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elf64-sparc.c: Likewise.
+ * elf64-x86-64.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * elflink.c: Likewise. Also u.elf_hash_value.
+ (elf_gc_propagate_vtable_entries_used): Update for h->vtable
+ indirection.
+ (elf_gc_smash_unused_vtentry_relocs): Likewise.
+ (bfd_elf_gc_record_vtinherit): Alloc vtable.
+ (bfd_elf_gc_record_vtentry): Likewise.
+ * elf.c (_bfd_elf_link_hash_newfunc): Use memset.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+ * po/bfd.pot: Regenerate.
+
+2004-09-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_link_hash_entry): Replace elf_link_hash_flags
+ with bitfields. Make "type" and "other" bitfields too.
+ (ELF_LINK_HASH_REF_REGULAR, ELF_LINK_HASH_DEF_REGULAR,
+ ELF_LINK_HASH_REF_DYNAMIC, ELF_LINK_HASH_DEF_DYNAMIC,
+ ELF_LINK_HASH_REF_REGULAR_NONWEAK, ELF_LINK_HASH_DYNAMIC_ADJUSTED,
+ ELF_LINK_HASH_NEEDS_COPY, ELF_LINK_HASH_NEEDS_PLT, ELF_LINK_NON_ELF,
+ ELF_LINK_HIDDEN, ELF_LINK_FORCED_LOCAL, ELF_LINK_HASH_MARK,
+ ELF_LINK_NON_GOT_REF, ELF_LINK_DYNAMIC_DEF, ELF_LINK_DYNAMIC_WEAK,
+ ELF_LINK_POINTER_EQUALITY_NEEDED): Delete.
+ (ELF_COMMON_DEF_P, WILL_CALL_FINISH_DYNAMIC_SYMBOL): Update.
+ * elf-hppa.h: Update all uses of elf_link_hash_flags.
+ * elf-m10300.c: Likewise.
+ * elf.c: Likewise.
+ * elf32-arm.h: Likewise.
+ * elf32-cris.c: Likewise.
+ * elf32-frv.c: Likewise.
+ * elf32-hppa.c: Likewise.
+ * elf32-i370.c: Likewise.
+ * elf32-i386.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-s390.c: Likewise.
+ * elf32-sh-symbian.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-sh64.c: Likewise.
+ * elf32-sparc.c: Likewise.
+ * elf32-vax.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-s390.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elf64-sparc.c: Likewise.
+ * elf64-x86-64.c: Likewise.
+ * elflink.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * configure.in (AM_INIT_AUTOMAKE): Set version to 2.15.92.
+ * configure: Regenerate.
+ * aclocal.m4: Regenerate.
+
+2004-09-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-arm.h (elf32_arm_gc_sweep_hook): Add #ifndef OLD_ARM_ABI
+ around uses of R_ARM_TARGET1.
+ (elf32_arm_check_relocs): Likewise.
+
+2004-09-13 Paul Brook <paul at codesourcery.com>
+
+ * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update
+ prototype.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+ * elf32-arm.h (elf32_arm_link_hash_table): Add target1_is_rel.
+ (elf32_arm_link_hash_table_create): Set target1_is_rel.
+ (bfd_elf32_arm_process_before_allocation): Ditto.
+ (elf32_arm_final_link_relocate): Handle R_ARM_TARGET1.
+ (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
+ * elfarm-nabi.c (elf32_arm_howto_table): Rename RELABS to TARGET1.
+ * reloc.c: Ditto.
+
+2004-09-10 Joel Brobecker <brobecker at gnat.com>
+
+ * hpux-core.c (thread_section_p): New function.
+ (hpux_core_core_file_p): Fix computation of offset in call
+ to bfd_seek. Create a ".reg" section from an arbitrary
+ ".reg/<id>" section if none was created after having read
+ all sections.
+
+2004-09-11 Andreas Schwab <schwab at suse.de>
+
+ * acinclude.m4: Fix spelling of ACX_NONCANONICAL_*.
+ * aclocal.m4: Rebuild.
+ * configure: Rebuild.
+
+2004-09-10 Joel Brobecker <brobecker at gnat.com>
+
+ * section.c (bfd_sections_find_if): Fix parameter name in
+ comment to match code.
+
+2004-09-10 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (assign_file_positions_except_relocs): Assign relocs
+ stored in a bfd section.
+
+2004-09-08 Hans-Peter Nilsson <hp at axis.com>
+
+ * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Reset
+ h->gotplt_refcount to 0, not -1.
+
+2004-09-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * elf32-cris.c (cris_elf_relocate_section) <case R_CRIS_16_GOTPLT,
+ case R_CRIS_32_GOTPLT>: For internal error message, handle NULL
+ symname.
+ (cris_elf_check_relocs) <case R_CRIS_32_PLT_PCREL>: Don't try to
+ handle symbol visibility here.
+
+2004-09-07 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc_link_hash_table): Add stub_globals.
+ (is_ppc64_elf_target): Rename from is_ppc64_target. Update all
+ callers.
+ (ppc_stub_name): Remove trailing "+0" on stub name.
+ (create_linkage_sections): Create relocations for
+ branch lookup table when --emit-relocs as well as when --shared.
+ (ppc_build_one_stub): Emit relocs for long branch stubs. Adjust
+ relbrlt test. For --emit-stub-syms, always output a sym even when
+ one already exists on a plt call stub. Put stub type in the stub
+ symbol name.
+ (ppc_size_one_stub): Size long branch stub relocs. Adjust relbrlt
+ test.
+ (ppc64_elf_size_stubs): Count global sym stubs added. Zero
+ reloc_count in stub sections. Adjust relbrlt test.
+ (ppc64_elf_build_stubs): Adjust relbrlt test. Tweak stats output.
+ * elflink.c (bfd_elf_size_dynamic_sections): Fix comment typo.
+ (elf_link_input_bfd): Ignore symbol index zero relocs when checking
+ for relocs against discarded symbols. Fix comments.
+
+2004-09-06 Mark Mitchell <mark at codesourcery.com>
+
+ * elf-bfd.h (_bfd_elf_make_dynamic_segment): Declare it.
+ * elf.c (_bfd_elf_make_dynamic_segment): New function, split out
+ from ...
+ (map_sections_to_segments): ... here. Use it. Assign a file
+ position to the .dynamic section if it is not loadable, but part
+ of the PT_DYNAMIC segment.
+ * elf32-arm.h (elf32_arm_finish_dynamic_sections): Use file
+ offsets, not VMAs, for the BPABI. Do not fill in the header in
+ the .got.plt section for the BPABI.
+ * elfarm-nabi.c (elf32_arm_symbian_modify_segment_map): Add a
+ PT_DYNAMIC segment.
+ (elf_backend_want_got_plt): Define to zero for Symbian OS.
+
+2004-09-06 Nick Clifton <nickc at redhat.com>
+
+ * elflink.c (elf_link_add_object_symbols): Set the error code to
+ bfd_error_wrong_format when the input format does not match the
+ output format.
+
+2004-09-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (is_ppc64_target): New function, extracted from..
+ (ppc64_elf_check_directives): ..here.
+ (ppc64_elf_size_dynamic_sections): Use it here to check bfd type
+ before accessing ppc64_elf_tdata.
+ (ppc64_elf_finish_dynamic_sections): And here too.
+
+2004-09-04 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd.c (_bfd_default_error_handler): Correct loop exit.
+
+2004-09-03 Mark Mitchell <mark at codesourcery.com>
+
+ * config.bfd (arm*-*-symbianelf*): Use OS-specific target vectors.
+ * configure.in (bfd_elf32_bigarm_symbian_vec): Add it.
+ (bfd_elf32_littlearm_symbian_vec): Likewise.
+ * configure: Regenerated.
+ * elf-bfd.h (elf_backend_data): Add dynamic_sec_flags.
+ * elf32-arm.h (PLT_HEADER_SIZE): Do not define.
+ (PLT_ENTRY_SIZE): Likewise.
+ (bfd_vma_elf32_arm_symbian_plt_entry): New
+ variable.
+ (elf32_arm_link_hash_table): Add plt_header_size, plt_entry_size,
+ and symbian_p.
+ (create_got_section): Don't create sections when generating BPABI
+ objects.
+ (elf32_arm_create_dynamic_sections): Tidy.
+ (elf32_arm_link_hash_table_create): Set plt_header_size,
+ plt_entry_size, and symbian_p.
+ (elf32_arm_check_relocs): Do not mark .rel.dyn as loadable when
+ generating BPABI objects.
+ (allocate_dynrelocs): Use htab->plt_header_size, not
+ PLT_HEADER_SIZE. Do not add to .got.plt when
+ generating BPABI objects.
+ (elf32_arm_finish_dynamic_symbol): Generate Symbian OS PLTs.
+ * elfarm-nabi.c: Add SymbianOS target vectors.
+ * elflink.c (_bfd_elf_create_got_section): Use dynamic_sec_flags.
+ (_bfd_elf_link_create_dynamic_sections): Likewise.
+ * elfxx-target.h (ELF_DYNAMIC_SEC_FLAGS): New macro.
+ (elfNN_bed): Use it.
+ * targets.c (bfd_elf32_bigarm_symbian_vec): New variable.
+ (bfd_elf32_littlearm_symbian_vec): Likewise.
+ (_bfd_target_vector): Add them.
+
+2004-09-03 Nick Clifton <nickc at redhat.com>
+
+ PR 360
+ * coffcode.h (handle_COMDAT): Replace abort with an warning
+ message and allow the scan to continue.
+
+2004-09-02 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Use static_syms passed
+ in when reading relocs, not our sorted syms. Remove unnecessary
+ var.
+
+2004-08-31 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * elf.c (special_sections): Add .gnu.linkonce.b modelled on .bss.
+
+2004-08-30 Nathanael Nerode <neroden at gcc.gnu.org>
+
+ * acinclude.m4: Require AC_CANONICAL_TARGET, not AC_CANONICAL_SYSTEM.
+ Include ../config/acx.m4 and use ACX_NONCANONICAL_* where appropriate;
+ replace uses of *_alias with *_noncanonical.
+ * aclocal.m4: Rebuild with aclocal 1.4p6.
+ * Makefile.in: Rebuild with automake 1.4p6.
+ * doc/Makefile.in: Rebuild with automake 1.4p6.
+ * configure.in: Autoupdate with autoupdate 2.59.
+ * config.in: Regenerate with autoheader 2.59.
+ * configure: Regnerate with autoconf 2.59.
+
+2004-08-28 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Copy input
+ symbol pointer arrays before modifying.
+
+2004-08-28 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd.c (bfd_get_synthetic_symtab): Pass counts and both symbol tables.
+ * elf-bfd.h (_bfd_elf_get_synthetic_symtab): Adjust.
+ * elf.c (_bfd_elf_get_synthetic_symtab): Adjust.
+ * libbfd-in.h (_bfd_nodynamic_get_synthetic_symtab): Adjust.
+ * targets.c (struct bfd_target <_bfd_get_synthetic_symtab>): Adjust.
+ * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Don't read symbols.
+ Use both symbol tables on non-relocatable objects. Use a common
+ error exit. Fix "mid" warning.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+2004-08-28 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_branch_reloc): Check .opd is in a regular
+ object file.
+ (struct sfpr_def_parms): Save some space.
+ (sfpr_define): Here too.
+
+ * elf64-ppc.c (compare_symbols): Put section syms first.
+ (sym_exists_at): New function.
+ (ppc64_elf_get_synthetic_symtab): Use relocs to find code entry
+ points only for relocatable files. Use .opd section contents
+ otherwise. Generally clean up the code.
+
+2004-08-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (STD_R0_0R1, STD_R0_0R12, LD_R0_0R1, LD_R0_0R12,
+ LI_R12_0, STVX_VR0_R12_R0, LVX_VR0_R12_R0, MTLR_R0, SFPR_MAX): Define.
+ (struct sfpr_def_parms): New.
+ (sfpr_define): New function.
+ (savegpr0, savegpr0_tail, restgpr0, restgpr0_tail): New functions.
+ (savegpr1, savegpr1_tail, restgpr1, restgpr1_tail): New functions.
+ (savefpr, savefpr0_tail, restfpr, restfpr0_tail): New functions.
+ (savefpr1_tail, restfpr1_tail): New functions.
+ (savevr, savevr_tail, restvr, restvr_tail): New functions.
+ (MIN_SAVE_FPR, MAX_SAVE_FPR): Don't define.
+ (ppc64_elf_func_desc_adjust): Use sfpr_define in place of existing
+ code. Define all ABI mandated _save and _rest functions.
+
+2004-08-26 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (INTERWORK_FLAG): Return true for EABIv3 objects.
+
+2004-08-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-m32r.c (m32r_elf_relocate_section): Don't compare with
+ TRUE or FALSE.
+
+2004-08-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-i386.c (elf_i386_relocate_section): Tweak last change so
+ that pcrel correction is applied for R_386_PC32.
+
+2004-08-25 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-i386.c (elf_i386_relocate_section): Zero section contents
+ for R_386_32 and R_386_PC32 relocs against symbols defined in
+ discarded sections.
+
+2004-08-25 Dmitry Diky <diwil at spec.ru>
+
+ * reloc.c (BFD_RELOC_MSP430_2X_PCREL,BFD_RELOC_MSP430_RL_PCREL):
+ Add new relocations.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+ * elf32-msp430.c: Clean-up code.
+ (elf_msp430_howto_table): Add new relocation entries.
+ (bfd_elf32_bfd_reloc_type_lookup): New relocation handlers.
+ (msp430_elf_relax_section): New function.
+ (msp430_elf_relax_delete_bytes): New function.
+ (msp430_elf_symbol_address_p): New function.
+
+2004-08-24 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_relocate_section): Handle
+ R_M32R_SDA16_RELA in the same way as R_M32R_SDA16.
+
+2004-08-20 Daniel Jacobowitz <dan at debian.org>
+
+ * elflink.c (_bfd_elf_section_already_linked): Handle
+ SEC_LINK_DUPLICATES_SAME_CONTENTS.
+
+2004-08-19 Mark Mitchell <mark at codesourcery.com>
+
+ * config.bfd (arm*-*-symbianelf*): New target.
+ (arm*-*-eabi*): Likewise.
+
+2004-08-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc_get_stub_entry): Change third param to a
+ "struct ppc_link_hash_entry *".
+ (ppc64_elf_relocate_section): Ditto for type of h. Introduce h_elf
+ to satisfy RELOC_FOR_GLOBAL_SYMBOL.
+
+2004-08-19 Jakub Jelinek <jakub at redhat.com>
+
+ * elf64-ppc.c (ppc64_elf_edit_opd): Support 16 byte long .opd
+ entries (where fd_aux overlaps next entry's fd_func).
+ Add non_overlapping argument, use it.
+ (ppc64_elf_check_relocs, ppc64_elf_gc_mark_hook, adjust_opd_syms,
+ ppc64_elf_size_stubs, ppc64_elf_relocate_section,
+ ppc64_elf_output_symbol_hook): Use address / 8 instead of address / 24
+ as indexes into opd_sym_map/opd_adjust array.
+ * elf64-ppc.h (ppc64_elf_edit_opd): Adjust prototype.
+
+2004-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (func_desc_adjust): Give undefined dot-symbols a value
+ if we can look up their function descriptor in a regular file.
+
+2004-08-18 Nick Clifton <nickc at redhat.com>
+
+ PR 324
+ * cofflink.c (coff_link_add_symbols): Check that the comdat
+ pointer in the coff_section_data structure has been initialised
+ before using it.
+
+2004-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ PR 338
+ * elflink.c (bfd_elf_record_link_assignment): Add comment about
+ changing bfd_link_hash_undefined to bfd_link_hash_new.
+
+2004-08-17 Jakub Jelinek <jakub at redhat.com>
+
+ * elfxx-target.h (bfd_elfNN_get_synthetic_symtab): Only define
+ if not yet defined.
+ * elf64-ppc.c (bfd_elf64_get_synthetic_symtab): Define.
+ (synthetic_opd, synthetic_relocatable): New variables.
+ (compare_symbols, compare_relocs): New helper routines.
+ (ppc64_elf_get_synthetic_symtab): New function.
+ * bfd.c (bfd_get_synthetic_symtab): Rename dynsyms argument
+ to relsyms.
+ * bfd-in2.h: Regenerated.
+ * elf.c (_bfd_elf_get_synthetic_symtab): Rename dynsyms argument
+ to relsyms. Return 0 if abfd is relocatable.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.h (elf_gc_sweep): Keep non-alloc, non-load sections.
+
+2004-08-17 Nick Clifton <nickc at redhat.com>
+
+ * (is_arm_mapping_symbol_name): New function - return true
+ when a symbol name matches the requirements for an ARM mapping
+ symbol name.
+ (arm_elf_find_function): New function based on
+ elf_find_function in elf.c but skipping ARM mapping symbols
+ and including thumb function symbols.
+ (elf32_arm_find_nearest_line): Use arm_elf_find_function.
+ (elf32_arm_output_symbol_hook): Use is_arm_mapping_symbol_name.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_branch_reloc): New function.
+ (ppc64_elf_howto_raw): Use ppc64_elf_branch_reloc.
+ (ppc64_elf_brtaken_reloc): Here too.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (add_symbol_adjust): Correct mismatched function
+ symbol visibility.
+ (ppc64_elf_check_directives): Check that we have the right hash
+ table before proceeding.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add "deleted_section".
+ (adjust_opd_syms): Attach opd syms for deleted entries to one of
+ the sections that will be discarded.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_section_complain_discarded): Ignore .fixup.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd.c (_bfd_default_error_handler): Account for doubled '%' in
+ free space available.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * pdp11.c (struct pdp11_aout_reloc_external): Delete. Replace
+ occurrences with bfd_byte * thoughout file.
+
+ * coff-rs6000.c (do_shared_object_padding): Warning fix.
+ (xcoff_write_armap_big): Likewise.
+ (xcoff_write_archive_contents_old): Likewise.
+ (xcoff_write_archive_contents_big): Likewise.
+
+ * elf64-mmix.c (mmix_elf_get_section_contents): Delete declaration.
+
+2004-08-13 Nick Clifton <nickc at redhat.com>
+
+ * elf32-arm.h: Convert to ISO C90.
+
+2004-08-13 Alan Modra <amodra at bigpond.net.au>
+
+ PR 293
+ * elf32-hppa.c (elf32_hppa_hide_symbol): Use init_refcount to
+ zero the plt field.
+
+2004-08-13 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd.c (_bfd_default_error_handler): Handle %A and %B.
+ (bfd_archive_filename, bfd_get_section_ident): Delete.
+ * ecofflink.c (bfd_ecoff_debug_accumulate_other): Don't call
+ bfd_archive_filename.
+ * elflink.c (elf_link_input_bfd): Don't use callbacks->error_handler
+ to warn about symbols in discarded sections. Use _bfd_error_handler.
+ * aout-adobe.c (aout_adobe_callback): See below.
+ * aout-cris.c (swap_ext_reloc_in): ..
+ * coff-arm.c (find_thumb_glue, find_arm_glue,
+ coff_arm_relocate_section, bfd_arm_process_before_allocation,
+ coff_arm_merge_private_bfd_data, _bfd_coff_arm_set_private_flags,
+ coff_arm_copy_private_bfd_data): ..
+ * coff-i860.c (i860_reloc_processing): ..
+ * coff-mcore.c (mcore_coff_unsupported_reloc,
+ coff_mcore_relocate_section): ..
+ * coff-ppc.c (coff_ppc_relocate_section): ..
+ * coff-rs6000.c (xcoff_create_csect_from_smclas
+ * coff-sh.c (sh_relax_section, sh_relax_delete_bytes,
+ sh_swap_insns, sh_relocate_section): ..
+ * coff-tic54x.c (tic54x_reloc_processing): ..
+ * coff-tic80.c (coff_tic80_relocate_section): ..
+ * coff64-rs6000.c (xcoff64_create_csect_from_smclas): ..
+ * coffcode.h (styp_to_sec_flags, coff_slurp_line_table,
+ coff_slurp_symbol_table, coff_classify_symbol,
+ coff_slurp_reloc_table): ..
+ * coffgen.c (_bfd_coff_read_string_table): ..
+ * cofflink.c (coff_link_add_symbols, _bfd_coff_link_input_bfd,
+ _bfd_coff_generic_relocate_section): ..
+ * cpu-arm.c (bfd_arm_merge_machines): ..
+ * cpu-sh.c (sh_merge_bfd_arch): ..
+ * elf-hppa.h (elf_hppa_relocate_section): ..
+ * elf.c (bfd_elf_string_from_elf_section, setup_group,
+ _bfd_elf_setup_group_pointers, bfd_section_from_shdr,
+ assign_section_numbers, _bfd_elf_symbol_from_bfd_symbol,
+ copy_private_bfd_data, _bfd_elf_validate_reloc): ..
+ * elf32-arm.h (find_thumb_glue, find_arm_glue,
+ bfd_elf32_arm_process_before_allocation, elf32_thumb_to_arm_stub,
+ elf32_arm_to_thumb_stub, elf32_arm_final_link_relocate,
+ elf32_arm_relocate_section, elf32_arm_set_private_flags,
+ elf32_arm_copy_private_bfd_data, elf32_arm_merge_private_bfd_data): ..
+ * elf32-cris.c (cris_elf_relocate_section, cris_elf_check_relocs,
+ cris_elf_merge_private_bfd_data
+ * elf32-frv.c (elf32_frv_relocate_section, elf32_frv_check_relocs): ..
+ * elf32-gen.c (elf32_generic_link_add_symbols): ..
+ * elf32-hppa.c (hppa_add_stub, hppa_build_one_stub,
+ elf32_hppa_check_relocs, get_local_syms, final_link_relocate,
+ elf32_hppa_relocate_section): ..
+ * elf32-i370.c (i370_elf_merge_private_bfd_data,
+ i370_elf_check_relocs, i370_elf_relocate_section): ..
+ * elf32-i386.c (elf_i386_info_to_howto_rel, elf_i386_check_relocs,
+ elf_i386_relocate_section): ..
+ * elf32-m32r.c (m32r_elf_relocate_section,
+ m32r_elf_merge_private_bfd_data): ..
+ * elf32-m68hc1x.c (m68hc12_add_stub,
+ _bfd_m68hc11_elf_merge_private_bfd_data): ..
+ * elf32-m68k.c (elf_m68k_relocate_section): ..
+ * elf32-mcore.c (mcore_elf_unsupported_reloc,
+ mcore_elf_relocate_section): ..
+ * elf32-ppc.c (ppc_elf_merge_private_bfd_data, bad_shared_reloc,
+ ppc_elf_check_relocs, ppc_elf_relocate_section,
+ ppc_elf_begin_write_processing): ..
+ * elf32-s390.c (elf_s390_check_relocs, invalid_tls_insn,
+ elf_s390_relocate_section): ..
+ * elf32-sh-symbian.c (sh_symbian_import_as,
+ sh_symbian_process_embedded_commands,
+ sh_symbian_relocate_section): ..
+ * elf32-sh.c (sh_elf_relax_section, sh_elf_relax_delete_bytes,
+ sh_elf_swap_insns, sh_elf_relocate_section, sh_elf_check_relocs,
+ sh_elf_merge_private_data): ..
+ * elf32-sparc.c (elf32_sparc_check_relocs,
+ elf32_sparc_relocate_section,
+ elf32_sparc_merge_private_bfd_data): ..
+ * elf32-v850.c (v850_elf_check_relocs,
+ v850_elf_merge_private_bfd_data): ..
+ * elf32-xtensa.c (elf_xtensa_check_relocs,
+ elf_xtensa_relocate_section, elf_xtensa_merge_private_bfd_data): ..
+ * elf64-alpha.c (elf64_alpha_relax_with_lituse,
+ elf64_alpha_relax_got_load, elf64_alpha_size_got_sections,
+ elf64_alpha_relocate_section_r, elf64_alpha_relocate_section): ..
+ * elf64-gen.c (elf64_generic_link_add_symbols): ..
+ * elf64-ppc.c (ppc64_elf_merge_private_bfd_data, ppc_add_stub,
+ ppc64_elf_check_relocs, ppc64_elf_edit_opd,
+ ppc64_elf_relocate_section): ..
+ * elf64-s390.c (elf_s390_check_relocs, invalid_tls_insn,
+ elf_s390_relocate_section): ..
+ * elf64-sh64.c (sh_elf64_relocate_section): ..
+ * elf64-sparc.c (sparc64_elf_check_relocs,
+ sparc64_elf_add_symbol_hook, sparc64_elf_relocate_section,
+ sparc64_elf_merge_private_bfd_data): ..
+ * elf64-x86-64.c (elf64_x86_64_check_relocs,
+ elf64_x86_64_relocate_section): ..
+ * elflink.c (_bfd_elf_add_default_symbol,
+ _bfd_elf_link_assign_sym_version, elf_link_read_relocs_from_section,
+ _bfd_elf_link_output_relocs, elf_link_add_object_symbols,
+ bfd_elf_size_dynamic_sections, elf_link_output_extsym,
+ elf_get_linked_section_vma, elf_fixup_link_order,
+ bfd_elf_final_link, bfd_elf_gc_record_vtinherit,
+ bfd_elf_gc_record_vtinherit, _bfd_elf_section_already_linked): ..
+ * elfxx-ia64.c (elfNN_ia64_relax_section,
+ elfNN_ia64_relocate_section, elfNN_ia64_merge_private_bfd_data): ..
+ * elfxx-mips.c (mips_elf_perform_relocation,
+ _bfd_mips_elf_check_relocs,
+ _bfd_mips_elf_merge_private_bfd_data): ..
+ * ieee.c (ieee_slurp_external_symbols): ..
+ * ihex.c (ihex_bad_byte, ihex_scan, ihex_read_section): ..
+ * libbfd.c (_bfd_generic_verify_endian_match): ..
+ * linker.c (_bfd_generic_link_add_one_symbol,
+ _bfd_generic_section_already_linked): ..
+ * pdp11.c (translate_to_native_sym_flags): ..
+ * pe-mips.c (coff_pe_mips_relocate_section): ..
+ * peicode.h (pe_ILF_build_a_bfd): ..
+ * srec.c (srec_bad_byte): ..
+ * stabs.c (_bfd_link_section_stabs): ..
+ * xcofflink.c (xcoff_link_add_symbols, xcoff_link_input_bfd): ..
+ Replace all uses of bfd_archive_filename and bfd_get_section_ident
+ with corresponding %B and %A in _bfd_error_handler format string.
+ Replace occurrences of "fprintf (stderr," with _bfd_error_handler
+ calls to use %A and %B. Fix "against symbol .. from section" and
+ similar error messages. Combine multiple _bfd_error_handler calls
+ where they were separated due to bfd_archive_filename deficiencies.
+ * bfd-in2.h: Regenerate.
+
+2004-08-12 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-i386.c (elf_i386_relocate_section): Report unrecognized
+ relocation.
+
+2004-08-10 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc_link_hash_entry): Add was_undefined.
+ (struct ppc_link_hash_table): Remove no_multi_toc, multi_toc_needed.
+ Make emit_stub_syms, stub_error and has_14bit_branch bit-fields.
+ Add twiddled_syms.
+ (link_hash_newfunc): Init was_undefined.
+ (add_symbol_adjust): Don't set undefined dot symbols to defweak;
+ Use undefweak instead.
+ (ppc64_elf_check_directives): Fix undefs chain.
+ (ppc64_elf_next_toc_section): Remove no_multi_toc and multi_toc_needed
+ references.
+ (ppc64_elf_size_stubs): Adjust for add_symbol_adjust change.
+ (undo_symbol_twiddle, ppc64_elf_restore_symbols): New functions.
+ * elf64-ppc.h (ppc64_elf_restore_symbols): Declare.
+
+2004-08-09 Jakub Jelinek <jakub at redhat.com>
+
+ * elf64-x86-64.c (elf64_x86_64_relocate_section): For -fno-pic
+ error, test input_section flags rather than sec.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_backend_data): Add
+ elf_backend_archive_symbol_lookup.
+ (_bfd_elf_archive_symbol_lookup): Declare.
+ * elflink.c (_bfd_elf_archive_symbol_lookup): New function..
+ (elf_link_add_archive_symbols): ..extracted from here. Call the
+ backend version.
+ * elfxx-target.h (elf_backend_archive_symbol_lookup): Provide default.
+ (elfNN_bed): Init new field.
+ * elf64-ppc.c (elf_backend_check_directives): Define.
+ (elf_backend_archive_symbol_lookup): Define.
+ (struct ppc_link_hash_table): Add tls_get_add_fd. Make tls_get_add
+ a ppc_link_hash_entry pointer.
+ (get_fdh): Move.
+ (ppc64_elf_archive_symbol_lookup, opd_entry_value): New functions.
+ (add_symbol_adjust, ppc64_elf_check_directives): New functions.
+ (ppc64_elf_check_relocs, ppc64_elf_gc_mark_hook, func_desc_adjust,
+ ppc64_elf_adjust_dynamic_symbol, ppc64_elf_tls_setup,
+ ppc64_elf_tls_optimize, allocate_dynrelocs, ppc_type_of_stub,
+ ppc_build_one_stub, ppc64_elf_size_stubs, ppc64_elf_relocate_section,
+ ppc64_elf_finish_dynamic_symbol): Handle branch relocs to function
+ descriptor symbols.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc_link_hash_entry): Expand adjust_done comment.
+ (ppc64_elf_add_symbol_hook): Test for NULL section.
+ (get_sym_h): Formatting.
+ (ppc64_elf_size_stubs): Include reloc addend in value stored as
+ stub target_value.
+
+ * elf64-ppc.c (ppc64_elf_relocate_section): Combine handling of
+ long branch stubs with code handling plt and r2off branch stubs.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (_bfd_elf_gc_mark): Declare.
+ * elflink.c (elf_link_input_bfd): Formatting.
+ (_bfd_elf_gc_mark): Rename from elf_gc_mark and make global. Adjust
+ all callers.
+ * elf64-ppc.c (struct ppc_link_hash_entry): Remove is_entry.
+ (link_hash_newfunc): Don't set it.
+ (ppc64_elf_copy_indirect_symbol): Nor copy it.
+ (ppc64_elf_mark_entry_syms): Delete.
+ (ppc64_elf_gc_mark_hook): Mark entry syms here. Also mark opd
+ sections. Use get_opd_info.
+ * elf64-ppc.h (ppc64_elf_mark_entry_syms): Delete.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (adjust_opd_syms): Fix merge error.
+
+ * elf64-ppc.c (struct ppc_link_hash_table): Remove have_undefweak.
+ (func_desc_adjust): Don't set have_undefweak.
+ (ppc64_elf_func_desc_adjust): Don't add an extr nop to sfpr.
+ (ppc64_elf_relocate_section): NOP out calls to undefweak functions.
+
+ * elf64-ppc.c (struct ppc_link_hash_entry): Make "oh" a
+ "struct ppc_link_hash_entry *". Adjust all references.
+ (ppc64_elf_hide_symbol): Correct a comment.
+
+ * elf64-ppc.c (get_opd_info): New function.
+ (adjust_opd_syms): Use get_opd_info. Define removed symbols as zero.
+ (ppc64_elf_edit_opd): Use get_opd_info. Check that sym has a dot
+ before calling get_fdh. Test fdh rather than h before dereferencing
+ fdh. Mark removed symbols in opd_adjust.
+ (ppc64_elf_tls_optimize): Don't bother with opd adjustment here.
+ (ppc64_elf_relocate_section): Use get_opd_info, and handle removed
+ opd symbols.
+ (ppc64_elf_output_symbol_hook): Likewise.
+
+2004-08-06 Paul Brook <paul at codesourcery.com>
+
+ * elfarm-nabi.c (elf32_arm_howto_table): Add new EABI relocations.
+ (elf32_arm_reloc_map): Add BFD_RELOC_ARM_RELABS32,
+ BFD_RELOC_ARM_ROSEGREL32 and BFD_RELOC_ARM_SBREL32.
+ * reloc.c: Add BFD_RELOC_ARM_RELABS32, BFD_RELOC_ARM_ROSEGREL32
+ and BFD_RELOC_ARM_SBREL32.
+ * bfd-in2.h, bbfd.h: Regenerate.
+
+2004-08-01 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Test only for
+ the dynamic link symbol actually in use.
+
+2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
+
+ * elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Handle bfd_link_hash_new
+
+2004-07-31 Joel Brobecker <brobecker at gnat.com>
+ Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * elfxx-mips.c (_bfd_mips_elf_symbol_processing): Handle
+ SHN_MIPS_TEXT and SHN_MIPS_DATA.
+
+2004-07-30 H.J. Lu <hongjiu.lu at intel.com>
+ Nick Clifton <nickc at redhat.com>
+
+ PR 290
+ * bfd.c (_bfd_default_error_handler): Make it global.
+
+ * elf-bfd.h (elf_backend_data): Add link_order_error_handler.
+
+ * elf.c (assign_section_numbers): Cope gracefully with sections
+ which have SHF_LINK_ORDER set but no sh_link set up.
+ * elflink.c (elf_get_linked_section_vma): Likewise.
+
+ * elfxx-ia64.c (elf_backend_link_order_error_handler): New. Set
+ it to NULL.
+
+ * elfxx-target.h (elf_backend_link_order_error_handler): New.
+ Set it to _bfd_default_error_handler.
+ (elfNN_bed): Add elf_backend_link_order_error_handler.
+
+ * libbfd-in.h (_bfd_default_error_handler): New.
+
+ * libbfd.h: Regenerated.
+
+2004-07-30 Jakub Jelinek <jakub at redhat.com>
+
+ * archures.c (bfd_mach_sparc_64bit_p): Define.
+ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Use it.
+ * bfd-in2.h: Rebuilt.
+
+2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+
+ Introduce SH2a support.
+ 2004-02-18 Corinna Vinschen <vinschen at redhat.com>
+ * archures.c (bfd_mach_sh2a_nofpu): New.
+ * bfd-in2.h: Rebuilt.
+ * cpu-sh.c (SH2A_NOFPU_NEXT): New.
+ (arch_info_struct): Add sh2a_nofpu.
+ * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
+ 2003-12-29 DJ Delorie <dj at redhat.com>
+ * reloc.c: Add relocs for sh2a.
+ * bfd-in2.h: Regenerate.
+ * libbfd.hh: Regenerate.
+ 2003-12-01 Michael Snyder <msnyder at redhat.com>
+ * archures.c (bfd_mach_sh2a): New.
+ * bfd-in2.h: Rebuilt.
+ * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
+ (SH2A_NEXT): New.
+ (arch_info_struct): Add sh2a.
+ * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
+
+2004-07-28 Nick Clifton <nickc at redhat.com>
+ John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ PR 273
+ * som.c (setup_sections): Improve estimation of space sizes in
+ relocatable objects.
+
+2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
+ * config.bfd (hppa*-*-netbsd*): Set targ_defvec to
+ bfd_elf32_hppa_nbsd_vec. Add bfd_elf32_hppa_linux_vec
+ to targ_selvecs.
+ * configure.in (bfd_elf32_hppa_nbsd_vec): Add case.
+ * configure: Regenerate.
+ * elf32-hppa.c (elf32_hppa_object_p): Add "elf32-hppa-netbsd"
+ case that accepts OSABI=NetBSD and OSABI=SysV.
+ (elf32_hppa_set_gp): For "elf32-hppa-netbsd", set the GP to
+ the base of .got or .data (if .got does not exist).
+ (elf32_hppa_post_process_headers): For elf32-hppa-netbsd,
+ set OSABI=NetBSD.
+ (TARGET_BIG_SYM): Add bfd_elf32_hppa_nbsd_vec case.
+ (TARGET_BIG_NAME): Add "elf32-hppa-netbsd" case.
+ * targets.c (bfd_elf32_hppa_nbsd_vec): Add extern declaration.
+ (_bfd_target_vector): Add bfd_elf32_hppa_nbsd_vec.
+
+2004-07-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 161/251
+ * elf-bfd.h (bfd_elf_section_data): Add sec_group.
+ (elf_sec_group): Defined.
+ (bfd_elf_match_symbols_in_sections): New prototype.
+ (_bfd_elf_setup_group_pointers): Likewise.
+
+ * elf.c (bfd_elf_discard_group): Abort.
+ (bfd_elf_set_group_contents): Also include relocation sections.
+ Remove zero-fill for ld -r.
+ (_bfd_elf_setup_group_pointers): New function.
+ (elf_sort_elf_symbol): Likewise.
+ (elf_sym_name_compare): Likewise.
+ (bfd_elf_match_symbols_in_sections): Likewise.
+
+ * elfcode.h (elf_object_p): Call _bfd_elf_setup_group_pointers.
+
+ * elflink.c (match_group_member): New.
+ (elf_link_input_bfd): Check group member for discarded section.
+ (try_match_symbols_in_sections): New function.
+ (already_linked): Likewise.
+ (_bfd_elf_section_already_linked): Support mixing comdat group
+ and linkonce section.
+
+ * libbfd-in.h (bfd_section_already_linked_table_traverse): New.
+ * linker.c (bfd_section_already_linked_table_traverse): New.
+
+ * libbfd.h: Regenerated.
+
+2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * reloc.c: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
+ BFD_RELOC_CRX_SWITCH32.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+ * elf32-crx.c: Support relocation/relaxation of
+ BFD_RELOC_CRX_SWITCH* types.
+
+2004-07-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c: Correct "Linker stubs" comment.
+
+2004-07-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (bfd_elf_section_data): Add a pointer for the
+ linked-to section.
+ (elf_linked_to_section): New.
+
+ * elf.c (assign_section_numbers): Set up sh_link for
+ SHF_LINK_ORDER.
+
+ * elfxx-ia64.c (elfNN_ia64_final_write_processing): Set sh_info
+ to sh_link for SHT_IA_64_UNWIND sections.
+
+2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_fixup_link_order): Add _() to error message.
+
+2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_fixup_link_order): Issue a warning and flag
+ an error if failed.
+
+2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * aout-adobe.c (aout_32_section_already_linked): Defined.
+ * aout-target.h (MY_section_already_linked): Likewise.
+ * aout-tic30.c (MY_section_already_linked): Likewise.
+ * binary.c (binary_section_already_linked): Likewise.
+ * bout.c (b_out_section_already_linked): Likewise.
+ * coff-alpha.c (_bfd_ecoff_section_already_linked): Likewise.
+ * coff-mips.c (_bfd_ecoff_section_already_linked): Likewise.
+ * coffcode.h (coff_section_already_linked): Likewise.
+ * i386msdos.c (msdos_section_already_linked): Likewise.
+ * i386os9k.c (os9k_section_already_linked): Likewise.
+ * ieee.c (ieee_section_already_linked): Likewise.
+ * ihex.c (ihex_section_already_linked): Likewise.
+ * mach-o.c (bfd_mach_o_section_already_linked): Likewise.
+ * mmo.c (mmo_section_already_linked): Likewise.
+ * nlm-target.h (nlm_section_already_linked): Likewise.
+ * oasys.c (oasys_section_already_linked): Likewise.
+ * pef.c (bfd_pef_section_already_linked): Likewise.
+ * ppcboot.c (ppcboot_section_already_linked): Likewise.
+ * som.c (som_bfd_discard_group): Likewise.
+ * srec.c (srec_section_already_linked): Likewise.
+ * tekhex.c (tekhex_section_already_linked): Likewise.
+ * versados.c (versados_section_already_linked): Likewise.
+ * vms.c (vms_section_already_linked): Likewise.
+ * coff-target.h (_bfd_xcoff_section_already_linked): Likewise.
+ * xsym.c (bfd_sym_section_already_linked): Likewise.
+
+ * bfd-in.h (bfd_section_already_linked_table_init): New.
+ (bfd_section_already_linked_table_free): Likewise.
+
+ * coff-rs6000.c (rs6000coff_vec): Add
+ _bfd_generic_section_already_linked.
+ (pmac_xcoff_vec): Likewise.
+ * coff64-rs6000.c (rs6000coff64_vec): Likewise.
+ (aix5coff64_vec): Likewise.
+
+ * elf-bfd.h (_bfd_elf_section_already_linked): New prototype.
+ * elflink.c (_bfd_elf_section_already_linked): New function.
+
+ * elfxx-target.h (bfd_elfNN_section_already_linked): Defined.
+
+ * libbfd-in.h (_bfd_nolink_section_already_linked): Defined.
+ (_bfd_generic_section_already_linked): New.
+ (bfd_section_already_linked_hash_entry): Likewise.
+ (bfd_section_already_linked): Likewise.
+ (bfd_section_already_linked_table_lookup): Likewise.
+ (bfd_section_already_linked_table_insert): Likewise.
+
+ * linker.c (bfd_section_already_linked): New.
+ (_bfd_section_already_linked_table): Likewise.
+ (bfd_section_already_linked_table_lookup): Likewise.
+ (bfd_section_already_linked_table_insert): Likewise.
+ (already_linked_newfunc): Likewise.
+ (bfd_section_already_linked_table_init): Likewise.
+ (bfd_section_already_linked_table_free): Likewise.
+ (_bfd_generic_section_already_linked): Likewise.
+
+ * section.c (bfd_section): Remove comdat.
+ (bfd_comdat_info): Moved to ...
+ * bfd-in.h (coff_comdat_info): Here.
+ (bfd_coff_get_comdat_section): New.
+ * coffgen.c (bfd_coff_get_comdat_section): Likewise.
+ * libcoff-in.h (coff_section_tdata): Add comdat.
+ * coffcode.h (handle_COMDAT): Updated.
+ * cofflink.c (coff_link_add_symbols): Likewise.
+ * ecoff.c (bfd_debug_section): Likewise.
+
+ * targets.c (bfd_target): Add _section_already_linked.
+ (BFD_JUMP_TABLE_LINK): Updated.
+
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Likewise.
+ * libcoff.h: Likewise.
+
+2003-07-21 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (elf_get_linked_section_vma, compare_link_order,
+ elf_fixup_link_order): New functions.
+ (bfd_elf_final_link): Call elf_fixup_link_order.
+
+2004-07-21 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-bfd.h (ELF_COMMON_DEF_P): New.
+ * elflink.c (_bfd_elf_symbol_refs_local_p): Use it to handle
+ common definitions.
+ * elf-m10300.c: Use SYMBOL_REFERENCES_LOCAL instead of
+ _bfd_elf_symbol_refs_local_p.
+ * elf32-frv.c (FRVFDPIC_SYM_LOCAL): Remove hack for common
+ symbols.
+
+2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd-in.h (dynamic_lib_link_class): Add DYN_NO_ADD_NEEDED and
+ DYN_NO_NEEDED.
+ (bfd_elf_get_dyn_lib_class): New prototype.
+ * elf.c (bfd_elf_get_dyn_lib_class): New function.
+
+ * elflink.c (elf_link_add_object_symbols): Check DYN_AS_NEEDED,
+ DYN_DT_NEEDED and DYN_NO_NEEDED bits to see if a DT_NEEDED
+ entry is needed. Issue an error if a DT_NEEDED entry is needed
+ for a file marked DYN_NO_NEEDED.
+ (elf_link_check_versioned_symbol): Check the DYN_DT_NEEDED bit
+ for DT_NEEDED tags.
+
+ * bfd-in2.h: Regenerated.
+
+2004-07-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * elflink.c (elf_section_complain_discarded): Don't complain in
+ .PARISC.unwind.
+
+2004-07-10 James E Wilson <wilson at specifixinc.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_ldxmov): Remove abfd parameter.
+ (elfNN_ia64_install_value, elfNN_ia64_relax_brl): Likewise.
+ (elfNN_ia64_relax_section, elfNN_ia64_relocate_section,
+ elfNN_ia64_finish_dynamic_symbol, elfNN_ia64_finish_dynamic_sections):
+ Fix callers.
+ (elfNN_ia64_relax_brl): Change bfd_get_64 to bfd_getl64. Change
+ bfd_put_64 to bfd_putl64.
+ (elfNN_ia64_relax_ldxmov, elfNN_ia64_install_value): Likewise.
+
+2004-07-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 240
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Only warn br in
+ .init/.fini sections when trying to relax it.
+
+2004-07-09 Jie Zhang <zhangjie at magima.com.cn>
+
+ * elf.c (assign_file_positions_for_segments): Make sure the
+ .dynamic section is the first section in the PT_DYNAMIC segment.
+
+2004-07-09 Nick Clifton <nickc at redhat.com>
+
+ * config.bfd: Change sh-sybmian-elf to sh-*-symbianelf.
+ * elf32-sh-symbian.c: Rename the sh_find_elf_flags and
+ sh_elf_get_flags_from_mach functions so that they do not conflict
+ when this target is built with other sh-elf targets.
+ * elf32-sh.c (sh_elf_get_flags_from_mach): Remove bogus
+ suppression of this function.
+ (sh_elf_find_flags): Likewise.
+
+2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * Makefile.am (ALL_MACHINES): Add cpu-crx.lo.
+ (ALL_MACHINES_CFILES): Add cpu-crx.c.
+ (BFD32_BACKENDS): Add elf32-crx.lo.
+ (BFD32_BACKENDS_CFILES): Add elf32-crx.c.
+ (cpu-crx.lo): New target.
+ (elf32-crx.lo): New target.
+ * Makefile.in: Regenerate.
+ * archures.c (bfd_architecture): Add bfd_{arch,mach}_crx.
+ (bfd_archures_list): Add bfd_crx_arch.
+ * bfd-in2.h: Regenerate.
+ * config.bfd: Handle crx-*-elf*, crx*.
+ * configure.in: Handle bfd_elf32_crx_vec.
+ * configure: Regenerate.
+ * cpu-crx.c: New file.
+ * elf32-crx.c: Likewise.
+ * libbfd.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_CRX_REL4, BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP, BFD_RELOC_CRX_REL16, BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32, BFD_RELOC_CRX_REGREL12, BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28, BFD_RELOC_CRX_REGREL32, BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32, BFD_RELOC_CRX_NUM8, BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32, BFD_RELOC_CRX_IMM16 and BFD_RELOC_CRX_IMM32
+ * targets.c (bfd_elf32_crx_vec): Declare.
+ (bfd_target_vector): Add bfd_elf32_crx_vec.
+
+2004-07-06 Nick Clifton <nickc at redhat.com>
+
+ * config.bfd: Add sh-symbian-elf target.
+ * configure.in: Add bfd_elf32_shl_symbian_vec.
+ * configure: Regenerate.
+ * elf-bfd.h (struct elf_backend_data): Add new field
+ 'check_directives'.
+ * elflink.c (elf_link_add_object_symbols): Invoke the
+ check_directives function, if defined.
+ * elfxx-target.h: Provide a default, NULL definition for
+ check_directives.
+ * targets.c: Add bfd_elf32_shl_symbian_vec.
+ * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
+ definition.
+ (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
+ * sh_elf_get_flags_from_mach, sh_elf_find_flags): Likewise.
+ (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
+ not already been defined.
+ * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
+ * sh-symbian.c: New file. Provide functions to support the
+ * sh-symbian-elf target.
+ * Makefile.am: Add elf32-sh-symbian.c
+ * Makefile.in: Regenerate.
+
+2004-07-05 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * elf32-sh.c: Include ../opcodes/sh-opc.h.
+ * Makefile.am: Ran make dep-am.
+ * Makefile.in: Ran make dep-in.
+
+2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * cofflink.c (_bfd_coff_generic_relocate_section): Resolve PE weak
+ externals properly.
+
+2004-07-02 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * config.bfd: Add want64 to configuration target s390-*-linux*.
+
+2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd.c (bfd_get_section_ident): New.
+
+ * elflink.c (elf_link_read_relocs_from_section): Call
+ bfd_get_section_ident to identify the section when reporting
+ error.
+ (_bfd_elf_link_output_relocs): Likewise.
+ (elf_link_output_extsym): Likewise.
+ (elf_link_input_bfd): Likewise.
+ (bfd_elf_gc_record_vtinherit): Likewise.
+
+ * bfd-in2.h: Regenerated.
+
+2004-07-01 Jie Zhang <zhangjie at magima.com.cn>
+ Nick Clifton <nickc at redhat.com>
+
+ PR 204
+ * elfxx-mips.c (_bfd_mips_elf_final_link): Pass the correct number
+ of section symbols to mips_elf_sort_hash_table ().
+
+2004-07-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_section_ignore_discarded_relocs): Revert last
+ change. Comment.
+ (elf_section_complain_discarded): New function. Handle
+ .gcc_except_table too.
+ (elf_link_input_bfd): Rewrite handling of relocs against symbols
+ in discarded sections.
+ * elf-bfd.h (elf_discarded_section): Protect macro arg.
+
+2004-06-30 James E Wilson <wilson at specifixinc.com>
+
+ * elfxx-ia64.c (elfNN_ia64_check_relocs): New local pltoff. Initialize
+ to NULL. Call get_pltoff if NULL and NEED_PLTOFF is true.
+
+2004-06-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 233
+ * elflink.c (elf_link_input_bfd): Issue an error for non-debug
+ local references to discarded sections and report their
+ locations.
+
+2004-06-30 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_section_ignore_discarded_relocs): Don't test
+ sec_info_type, test section name instead.
+
+2004-06-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 240
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Don't relax branch
+ in .init/.fini sections.
+
+2004-06-29 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (elf_xtensa_relocate_section): Use
+ bfd_get_section_limit.
+
+2004-06-29 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (elf_xtensa_combine_prop_entries): Don't change the
+ output section size.
+
+2004-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-mmix.c (mmix_set_relaxable_size): Save original size in
+ rawsize.
+ (mmix_elf_perform_relocation): Adjust for above change.
+ (mmix_elf_relocate_section): Likewise.
+ (mmix_elf_relax_section): Likewise. Use output_section->rawsize.
+ (mmix_elf_get_section_contents): Delete.
+ (bfd_elf64_get_section_contents): Delete.
+ (mmix_elf_relocate_section): Zero stub area.
+ * linker.c (default_indirect_link_order): Alloc max of section size
+ and rawsize.
+ * simple.c (bfd_simple_get_relocated_section_contents): Likewise.
+ * section.c (bfd_malloc_and_get_section): Likewise.
+ (struct bfd_section): Update rawsize comment.
+ * bfd-in2.h: Regenerate.
+
+ * reloc16.c (bfd_coff_reloc16_relax_section): Set rawsize.
+
+2004-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (bfd_get_section_limit): Define.
+ * reloc.c (bfd_perform_relocation, bfd_install_relocation)
+ (_bfd_final_link_relocate): Use bfd_get_section_limit.
+ * aout-tic30.c (tic30_aout_final_link_relocate): Likewise.
+ * coff-arm.c (coff_arm_relocate_section): Likewise.
+ * coff-mips.c (mips_refhi_reloc, mips_gprel_reloc): Likewise.
+ * cpu-ns32k.c (do_ns32k_reloc): Likewise.
+ (bfd_ns32k_final_link_relocate): Likewise.
+ * elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): Likwise.
+ * elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): Likewise.
+ * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
+ (i860_howto_highadj_reloc, i860_howto_splitn_reloc): Likewise.
+ * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
+ (m32r_elf_generic_reloc, m32r_elf_relocate_section): Likewise.
+ * elf32-m68hc1x.c (m68hc11_elf_special_reloc): Likewise.
+ * elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
+ * elf32-or32.c (or32_elf_consth_reloc): Likewise.
+ * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Likewise.
+ * elf32-s390.c (s390_elf_ldisp_reloc): Likewise.
+ * elf32-sh.c (sh_elf_reloc_loop): Likewise.
+ * elf32-sparc.c (sparc_elf_wdisp16_reloc): Likewise.
+ (sparc_elf_hix22_reloc, sparc_elf_lox10_reloc): Likwise.
+ * elf32-v850.c (v850_elf_reloc): Likewise.
+ * elf32-xstormy16.c (xstormy16_elf_24_reloc): Likewise.
+ * elf32-xtensa.c (bfd_elf_xtensa_reloc): Likewise.
+ * elf64-alpha.c (elf64_alpha_reloc_gpdisp): Likewise.
+ * elf64-mips.c (mips_elf64_gprel32_reloc)
+ (mips16_gprel_reloc): Likewise.
+ * elf64-mmix.c (mmix_elf_reloc): Likewise.
+ * elf64-s390.c (s390_elf_ldisp_reloc): Likewise.
+ * elf64-sparc.c (init_insn_reloc): Likewise.
+ * elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
+ (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
+ (_bfd_mips_elf_generic_reloc): Likewise.
+ * bfd-in2.h: Regenerate.
+
+2004-06-28 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (struct stab_info): Move from stabs.c.
+ * stabs.c (struct stab_link_includes_table): Delete.
+ (stab_link_includes_lookup): Delete.
+ (_bfd_write_section_stabs, _bfd_write_stab_strings): Remove one
+ level of indirection from sinfo parm.
+ (_bfd_link_section_stabs): Likewise. Set SEC_LINKER_CREATED on
+ stabstr section. Adjust hash table accesses.
+ * coff-ppc.c (ppc_bfd_coff_final_link): Do include rawsize in contents
+ alloc. Adjust stab_info test.
+ * cofflink.c (_bfd_coff_link_hash_table_init): Clear stab_info.
+ (_bfd_coff_final_link): Adjust stab_info test.
+ (_bfd_coff_link_input_bfd): Ignore SEC_LINKER_CREATED sections.
+ * elf-bfd.h (struct elf_link_hash_table): Include struct stab_info
+ in place.
+ * libcoff-in.h (struct coff_link_hash_table): Likewise.
+ * elf.c (_bfd_elf_link_hash_table_init): Clear stab_info.
+ * elflink.c (bfd_elf_final_link): Don't attempt to link linker created
+ stabstr section. Adjust stab_info test.
+ * libbfd-in.h (_bfd_link_section_stabs, _bfd_write_section_stabs)
+ (_bfd_write_stab_strings): Adjust prototypes.
+ * libbfd.h: Regenerate.
+ * libcoff.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+2004-06-27 Mark Kettenis <kettenis at gnu.org>
+
+ From Miod Vallat <miod at online.fr>:
+ * aoutx.h (NAME(aout,machine_type)): Handle bfd_arch_m88k.
+
+2004-06-26 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-m10300.c (struct elf_mn10300_pcrel_relocs_copied): Delete.
+ (struct elf32_mn10300_link_hash_entry): Remove
+ pcrel_relocs_copied.
+ (mn10300_elf_check_relocs): Only reserve dynamic relocations for
+ R_MN10300_32. Don't adjust pcrel_relocs_copied.
+ (mn10300_elf_final_link_relocate): Fail for direct, pc-relative
+ and gotoff relocations if the symbol doesn't bind locally. Use
+ _bfd_elf_symbol_refs_local_p to test. Don't create dynamic
+ relocation for PCREL32.
+ (mn10300_elf_relocate_section): Use _bfd_elf_symbol_refs_local_p
+ to test whether a symbol binds locally.
+ (elf32_mn10300_link_hash_newfunc): Don't initialize
+ pcrel_relocs_copied.
+ (_bfd_mn10300_elf_discard_copies): Delete.
+ (_bfd_mn10300_elf_size_dynamic_sections): Don't call it.
+
+2004-06-26 Mark Kettenis <kettenis at gnu.org>
+
+ * config.bfd: Replace m88k-*-openbsd* with m88*-*-openbsd*.
+
+2004-06-25 Joel Brobecker <brobecker at gnat.com>
+
+ * som.c (som_set_reloc_info): Correct small typo.
+
+2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_howto_table): Support R_M32R_GOTOFF.
+ (m32r_elf_relocate_section): Changed for R_M32R_GOTOFF.
+ (m32r_elf_gcsweep_hook): Likewise.
+ (m32r_elf_check_relocs): Likewise.
+ (m32r_elf_howto_table): Added R_M32R_GOTOFF_HI_ULO,
+ R_M32R_GOTOFF_HI_SLO and R_M32R_GOTOFF_LO.
+ * reloc.c: Added BFD_RELOC_M32R_GOTOFF_HI_ULO,
+ BFD_RELOC_M32R_GOTOFF_HI_SLO and BFD_RELOC_M32R_GOTOFF_LO.
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Regenerated.
+
+2004-06-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf64-x86-64.c (elf64_x86_64_check_relocs): Warn overflow
+ relocation symbol.
+ (elf64_x86_64_relocate_section): Issue an error for
+ R_X86_64_PC8, R_X86_64_PC16 and R_X86_64_PC32 relocations
+ against global symbols when building shared library.
+
+2004-06-24 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (struct sec): Rename "_cooked_size" to "size".
+ Rename "_raw_size" to "rawsize".
+ (STD_SECTION): Adjust comments.
+ (bfd_set_section_size, bfd_get_section_contents): Use size.
+ (bfd_malloc_and_get_section): New function.
+ * bfd-in.h (bfd_section_size, bfd_get_section_size): Use size.
+ * coff-sh.c (sh_relax_section): Alloc coff_section_data struct early.
+ Correctly free reloc and contents memory.
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Delete FIXME
+ and fake CIE now that we can shink section size to zero.
+ (_bfd_elf_write_section_eh_frame): Likewise..
+ * elf32-ppc.c (ppc_elf_relax_section): Delay reading section contents.
+ * elf-m10300.c (mn10300_elf_final_link_relocate): Don't use
+ _bfd_stab_section_offset. Use _bfd_elf_section_offset.
+ * stabs.c (_bfd_stab_section_offset_): Remove unused args and
+ unneeded indirection.
+ * elf.c (_bfd_elf_section_offset): .. and update call.
+ * libbfd-in.h (_bfd_stab_section_offset): Update prototype.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+ Replace occurrences of "_raw_size" and "_cooked_size" in most places
+ with "size". Set new "rawsize" for stabs, eh_frame, and SEC_MERGE
+ sections. Use "rawsize", if non-zero, for bfd_get_section_contents
+ calls if the section might be a stabs, eh_frame, or SEC_MERGE section.
+ Similarly use "rawsize", if non-zero, in reloc functions to validate
+ reloc addresses. Use new bfd_malloc_and_get_section in most places
+ where bfd_get_section_contents was called. Expand all occurrences of
+ bfd_section_size and bfd_get_section_size. Rename "raw_size" var in
+ grok_prstatus and similar functions to "size".
+ * aix386-core.c (aix386_core_file_p): ..
+ * aix5ppc-core.c (xcoff64_core_p): ..
+ * aout-adobe.c (aout_adobe_callback, aout_adobe_write_object_contents,
+ aout_adobe_set_section_contents): ..
+ * aout-target.h (callback): ..
+ * aout-tic30.c (tic30_aout_callback, tic30_aout_final_link_relocate,
+ MY_bfd_final_link): ..
+ * aoutf1.h (sunos4_core_file_p): ..
+ * aoutx.h (some_aout_object_p, adjust_o_magic, adjust_z_magic,
+ adjust_n_magic, adjust_sizes_and_vmas, translate_from_native_sym_flags,
+ final_link, aout_link_input_section): ..
+ * binary.c (binary_object_p, binary_canonicalize_symtab,
+ binary_set_section_contents): ..
+ * bout.c (b_out_callback, b_out_write_object_contents,
+ b_out_set_section_contents, b_out_bfd_relax_section,
+ b_out_bfd_get_relocated_section_contents): ..
+ * cisco-core.c (cisco_core_file_validate): ..
+ * coff-alpha.c (alpha_ecoff_object_p,
+ alpha_ecoff_get_relocated_section_conten, alpha_relocate_section): ..
+ * coff-arm.c (coff_arm_relocate_section,
+ bfd_arm_allocate_interworking_sections): ..
+ * coff-h8300.c (h8300_reloc16_extra_cases,
+ h8300_bfd_link_add_symbols): ..
+ * coff-mips.c (mips_refhi_reloc, mips_gprel_reloc): ..
+ * coff-ppc.c (coff_ppc_relocate_section, ppc_allocate_toc_section,
+ ppc_bfd_coff_final_link): ..
+ * coff-rs6000.c (xcoff_reloc_type_br, xcoff_ppc_relocate_section): ..
+ * coff-sh.c (sh_relax_section, sh_relax_delete_bytes,
+ sh_align_loads, sh_coff_get_relocated_section_contents): ..
+ * coff64-rs6000.c (xcoff64_write_object_contents,
+ xcoff64_reloc_type_br, xcoff64_ppc_relocate_section): ..
+ * coffcode.h (coff_compute_section_file_positions,
+ coff_write_object_contents): ..
+ * coffgen.c (make_a_section_from_file, coff_write_symbols,
+ coff_section_symbol, build_debug_section): ..
+ * cofflink.c (coff_link_add_symbols, _bfd_coff_final_link,
+ process_embedded_commands, _bfd_coff_link_input_bfd,
+ _bfd_coff_write_global_sym): ..
+ * cpu-arm.c (bfd_arm_update_notes, bfd_arm_get_mach_from_notes): ..
+ * cpu-ns32k.c (do_ns32k_reloc, _bfd_ns32k_final_link_relocate): ..
+ * dwarf1.c (parse_line_table, _bfd_dwarf1_find_nearest_line): ..
+ * dwarf2.c (read_indirect_string, read_abbrevs, decode_line_info,
+ _bfd_dwarf2_find_nearest_line): ..
+ * ecoff.c (bfd_debug_section, ecoff_set_symbol_info,
+ ecoff_compute_section_file_positions,
+ _bfd_ecoff_write_object_contents, ecoff_indirect_link_order): ..
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame,
+ _bfd_elf_discard_section_eh_frame_hdr,
+ _bfd_elf_maybe_strip_eh_frame_hdr, _bfd_elf_eh_frame_section_offset,
+ _bfd_elf_write_section_eh_frame,
+ _bfd_elf_write_section_eh_frame_hdr): ..
+ * elf-hppa.h (elf_hppa_sort_unwind): ..
+ * elf-m10200.c (mn10200_elf_relax_section,
+ mn10200_elf_relax_delete_bytes,
+ mn10200_elf_get_relocated_section_contents): ..
+ * elf-m10300.c (_bfd_mn10300_elf_create_got_section,
+ mn10300_elf_check_relocs, mn10300_elf_relax_section,
+ mn10300_elf_relax_delete_bytes,
+ mn10300_elf_get_relocated_section_contents,
+ _bfd_mn10300_elf_adjust_dynamic_symbol,
+ _bfd_mn10300_elf_discard_copies,
+ _bfd_mn10300_elf_size_dynamic_sections,
+ _bfd_mn10300_elf_finish_dynamic_sections): ..
+ * elf.c (_bfd_elf_print_private_bfd_data, bfd_elf_get_bfd_needed_list,
+ _bfd_elf_make_section_from_phdr, elf_fake_sections,
+ bfd_elf_set_group_contents, map_sections_to_segments,
+ elf_sort_sections, assign_file_positions_for_segments,
+ SECTION_SIZE, copy_private_bfd_data,
+ _bfd_elf_get_dynamic_reloc_upper_bound,
+ _bfd_elf_canonicalize_dynamic_reloc, elfcore_maybe_make_sect,
+ _bfd_elfcore_make_pseudosection, elfcore_grok_prstatus,
+ elfcore_grok_lwpstatus, elfcore_grok_win32pstatus,
+ elfcore_grok_note, elfcore_grok_nto_status, elfcore_grok_nto_gregs,
+ _bfd_elf_rel_local_sym, _bfd_elf_get_synthetic_symtab): ..
+ * elf32-arm.h (bfd_elf32_arm_allocate_interworking_sect,
+ bfd_elf32_arm_process_before_allocation,
+ elf32_arm_adjust_dynamic_symbol, allocate_dynrelocs,
+ elf32_arm_size_dynamic_sections, elf32_arm_finish_dynamic_sections,
+ elf32_arm_write_section): ..
+ * elf32-cris.c (cris_elf_grok_prstatus,
+ elf_cris_finish_dynamic_sections, cris_elf_gc_sweep_hook,
+ elf_cris_adjust_gotplt_to_got, elf_cris_adjust_dynamic_symbol,
+ cris_elf_check_relocs, elf_cris_size_dynamic_sections,
+ elf_cris_discard_excess_dso_dynamics,
+ elf_cris_discard_excess_program_dynamics): ..
+ * elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): ..
+ * elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): ..
+ * elf32-frv.c (_frvfdpic_add_dyn_reloc, _frvfdpic_add_rofixup,
+ _frv_create_got_section, _frvfdpic_assign_plt_entries,
+ elf32_frvfdpic_size_dynamic_sections,
+ elf32_frvfdpic_modify_segment_map,
+ elf32_frvfdpic_finish_dynamic_sections): ..
+ * elf32-h8300.c (elf32_h8_relax_section, elf32_h8_relax_delete_bytes,
+ elf32_h8_get_relocated_section_contents): ..
+ * elf32-hppa.c (hppa_build_one_stub, hppa_size_one_stub,
+ elf32_hppa_adjust_dynamic_symbol, allocate_plt_static,
+ allocate_dynrelocs, elf32_hppa_size_dynamic_sections, group_sections,
+ elf32_hppa_size_stubs, elf32_hppa_set_gp, elf32_hppa_build_stubs,
+ elf32_hppa_finish_dynamic_sections): ..
+ * elf32-i370.c (i370_elf_adjust_dynamic_symbol,
+ i370_elf_size_dynamic_sections, i370_elf_check_relocs,
+ i370_elf_finish_dynamic_sections): ..
+ * elf32-i386.c (elf_i386_grok_prstatus, elf_i386_adjust_dynamic_symbol,
+ allocate_dynrelocs, elf_i386_size_dynamic_sections,
+ elf_i386_relocate_section, elf_i386_finish_dynamic_sections): ..
+ * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc,
+ i860_howto_highadj_reloc, i860_howto_splitn_reloc): ..
+ * elf32-ip2k.c (ip2k_is_switch_table_128,
+ ip2k_relax_switch_table_128, ip2k_is_switch_table_256,
+ ip2k_relax_switch_table_256, ip2k_elf_relax_section,
+ adjust_all_relocations, ip2k_elf_relax_delete_bytes): ..
+ * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc,
+ m32r_elf_generic_reloc, m32r_elf_adjust_dynamic_symbol,
+ allocate_dynrelocs, m32r_elf_size_dynamic_sections,
+ m32r_elf_relocate_section, m32r_elf_finish_dynamic_sections,
+ m32r_elf_relax_section, m32r_elf_relax_delete_bytes,
+ m32r_elf_get_relocated_section_contents): ..
+ * elf32-m68hc11.c (m68hc11_elf_build_one_stub,
+ m68hc11_elf_size_one_stub, m68hc11_elf_relax_section,
+ m68hc11_elf_relax_delete_bytes): ..
+ * elf32-m68hc12.c (m68hc12_elf_build_one_stub,
+ m68hc12_elf_size_one_stub): ..
+ * elf32-m68hc1x.c (elf32_m68hc11_size_stubs,
+ elf32_m68hc11_build_stubs, m68hc11_elf_special_reloc): ..
+ * elf32-m68k.c (elf_m68k_check_relocs, elf_m68k_gc_sweep_hook,
+ elf_m68k_adjust_dynamic_symbol, elf_m68k_size_dynamic_sections,
+ elf_m68k_discard_copies, elf_m68k_finish_dynamic_sections): ..
+ * elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc,
+ elf32_mips_grok_prstatus): ..
+ * elf32-or32.c (or32_elf_consth_reloc): ..
+ * elf32-ppc.c (ppc_elf_relax_section, ppc_elf_addr16_ha_reloc,
+ elf_create_pointer_linker_section, ppc_elf_create_linker_section,
+ ppc_elf_additional_program_headers, ppc_elf_adjust_dynamic_symbol,
+ allocate_dynrelocs, ppc_elf_size_dynamic_sections,
+ ppc_elf_finish_dynamic_sections, ppc_elf_grok_prstatus,
+ ppc_elf_final_write_processing): ..
+ * elf32-s390.c (s390_elf_ldisp_reloc, elf_s390_adjust_dynamic_symbol,
+ allocate_dynrelocs, elf_s390_size_dynamic_sections,
+ elf_s390_finish_dynamic_sections, elf_s390_grok_prstatus): ..
+ * elf32-sh.c (sh_elf_reloc_loop, sh_elf_relax_section,
+ sh_elf_relax_delete_bytes, sh_elf_align_loads,
+ sh_elf_adjust_dynamic_symbol, allocate_dynrelocs,
+ sh_elf_size_dynamic_sections, sh_elf_get_relocated_section_contents,
+ sh_elf_finish_dynamic_sections, elf32_shlin_grok_prstatus): ..
+ * elf32-sh64-com.c (sh64_address_in_cranges,
+ sh64_get_contents_type): ..
+ * elf32-sh64.c (sh64_find_section_for_address,
+ sh64_elf_final_write_processing): ..
+ * elf32-sparc.c (sparc_elf_wdisp16_reloc, sparc_elf_hix22_reloc,
+ sparc_elf_lox10_reloc, elf32_sparc_adjust_dynamic_symbol,
+ allocate_dynrelocs, elf32_sparc_size_dynamic_sections,
+ elf32_sparc_relocate_section, elf32_sparc_finish_dynamic_sections): ..
+ * elf32-v850.c (v850_elf_reloc, v850_elf_relax_section): ..
+ * elf32-vax.c (elf_vax_check_relocs, elf_vax_adjust_dynamic_symbol,
+ elf_vax_size_dynamic_sections, elf_vax_discard_copies,
+ elf_vax_instantiate_got_entries, elf_vax_relocate_section,
+ elf_vax_finish_dynamic_sections): ..
+ * elf32-xstormy16.c (xstormy16_elf_24_reloc,
+ xstormy16_elf_check_relocs, xstormy16_relax_plt_check,
+ xstormy16_elf_relax_section, xstormy16_elf_always_size_sections,
+ xstormy16_elf_finish_dynamic_sections): ..
+ * elf32-xtensa.c (xtensa_read_table_entries,
+ elf_xtensa_allocate_got_size, elf_xtensa_allocate_local_got_size,
+ elf_xtensa_size_dynamic_sections, elf_xtensa_do_reloc,
+ bfd_elf_xtensa_reloc, elf_xtensa_relocate_section,
+ elf_xtensa_combine_prop_entries, elf_xtensa_finish_dynamic_sections,
+ elf_xtensa_discard_info_for_section, elf_xtensa_grok_prstatus,
+ get_relocation_opcode, retrieve_contents, find_relaxable_sections,
+ collect_source_relocs, is_resolvable_asm_expansion, remove_literals,
+ relax_section, shrink_dynamic_reloc_sections, relax_property_section,
+ xtensa_callback_required_dependence): ..
+ * elf64-alpha.c (elf64_alpha_reloc_gpdisp, elf64_alpha_relax_section,
+ elf64_alpha_check_relocs, elf64_alpha_adjust_dynamic_symbol,
+ elf64_alpha_calc_got_offsets_for_symbol, elf64_alpha_calc_got_offsets,
+ elf64_alpha_size_plt_section, elf64_alpha_size_plt_section_1,
+ elf64_alpha_always_size_sections, elf64_alpha_calc_dynrel_sizes,
+ elf64_alpha_size_rela_got_section, elf64_alpha_size_rela_got_1,
+ elf64_alpha_size_dynamic_sections, elf64_alpha_emit_dynrel,
+ elf64_alpha_finish_dynamic_sections, elf64_alpha_final_link): ..
+ * elf64-hppa.c (allocate_dynrel_entries,
+ elf64_hppa_size_dynamic_sections,
+ elf64_hppa_finish_dynamic_sections): ..
+ * elf64-mips.c (mips_elf64_gprel32_reloc, mips16_gprel_reloc,
+ mips_elf64_canonicalize_dynamic_reloc, mips_elf64_slurp_reloc_table,
+ elf64_mips_grok_prstatus): ..
+ * elf64-mmix.c (mmix_elf_perform_relocation, mmix_elf_reloc,
+ mmix_elf_relocate_section, mmix_elf_final_link,
+ mmix_set_relaxable_size, _bfd_mmix_after_linker_allocation,
+ mmix_elf_relax_section, mmix_elf_get_section_contents): ..
+ * elf64-ppc.c (ppc64_elf_object_p, ppc64_elf_grok_prstatus,
+ ppc64_elf_check_relocs, ppc64_elf_func_desc_adjust,
+ ppc64_elf_adjust_dynamic_symbol, ppc64_elf_edit_opd,
+ allocate_dynrelocs, ppc64_elf_size_dynamic_sections,
+ ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_next_toc_section,
+ toc_adjusting_stub_needed, group_sections, ppc64_elf_size_stubs,
+ ppc64_elf_build_stubs, ppc64_elf_relocate_section,
+ ppc64_elf_finish_dynamic_sections): ..
+ * elf64-s390.c (s390_elf_ldisp_reloc, elf_s390_adjust_dynamic_symbol,
+ allocate_dynrelocs, elf_s390_size_dynamic_sections,
+ elf_s390_finish_dynamic_sections): ..
+ * elf64-sh64.c (sh_elf64_get_relocated_section_contents,
+ sh_elf64_check_relocs, sh64_elf64_adjust_dynamic_symbol,
+ sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections,
+ sh64_elf64_finish_dynamic_sections): ..
+ * elf64-sparc.c (sparc64_elf_slurp_reloc_table, init_insn_reloc,
+ sparc64_elf_check_relocs, sparc64_elf_adjust_dynamic_symbol,
+ sparc64_elf_size_dynamic_sections, sparc64_elf_relocate_section,
+ sparc64_elf_finish_dynamic_symbol,
+ sparc64_elf_finish_dynamic_sections): ..
+ * elf64-x86-64.c (elf64_x86_64_grok_prstatus,
+ elf64_x86_64_adjust_dynamic_symbol, allocate_dynrelocs,
+ elf64_x86_64_size_dynamic_sections, elf64_x86_64_relocate_section,
+ elf64_x86_64_finish_dynamic_sections): ..
+ * elfarm-nabi.c (elf32_arm_nabi_grok_prstatus): ..
+ * elfcode.h (elf_slurp_reloc_table): ..
+ * elflink.c (_bfd_elf_create_got_section, elf_add_dt_needed_tag,
+ elf_finalize_dynstr, elf_link_add_object_symbols,
+ bfd_elf_size_dynamic_sections, elf_link_sort_relocs,
+ elf_link_input_bfd, bfd_elf_final_link, bfd_elf_discard_info): ..
+ * elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc,
+ elf32_mips_grok_prstatus): ..
+ * elfxx-ia64.c (elfNN_ia64_relax_section, allocate_dynrel_entries,
+ elfNN_ia64_size_dynamic_sections, elfNN_ia64_install_dyn_reloc,
+ elfNN_ia64_choose_gp, elfNN_ia64_final_link,
+ elfNN_ia64_finish_dynamic_sections): ..
+ * elfxx-mips.c (mips_elf_create_procedure_table,
+ mips_elf_check_mips16_stubs, _bfd_mips_elf_gprel16_with_gp,
+ _bfd_mips_elf_hi16_reloc, _bfd_mips_elf_generic_reloc,
+ mips_elf_global_got_index, mips_elf_multi_got,
+ mips_elf_create_compact_rel_section, mips_elf_calculate_relocation,
+ mips_elf_allocate_dynamic_relocations,
+ mips_elf_create_dynamic_relocation, _bfd_mips_elf_fake_sections,
+ _bfd_mips_relax_section, _bfd_mips_elf_adjust_dynamic_symbol,
+ _bfd_mips_elf_always_size_sections,
+ _bfd_mips_elf_size_dynamic_sections,
+ _bfd_mips_elf_finish_dynamic_symbol,
+ _bfd_mips_elf_finish_dynamic_sections,
+ _bfd_mips_elf_modify_segment_map, _bfd_mips_elf_discard_info,
+ _bfd_mips_elf_write_section, _bfd_mips_elf_set_section_contents,
+ _bfd_elf_mips_get_relocated_section_contents,
+ _bfd_mips_elf_final_link, _bfd_mips_elf_merge_private_bfd_data): ..
+ * hp300hpux.c (callback): ..
+ * hppabsd-core.c (make_bfd_asection): ..
+ * hpux-core.c (make_bfd_asection): ..
+ * i386linux.c (linux_link_create_dynamic_sections,
+ bfd_i386linux_size_dynamic_sections, linux_finish_dynamic_link): ..
+ * i386msdos.c (msdos_write_object_contents): ..
+ * i386os9k.c (os9k_callback, os9k_write_object_contents,
+ os9k_set_section_contents): ..
+ * ieee.c (parse_expression, ieee_slurp_external_symbols,
+ ieee_slurp_sections, ieee_slurp_debug, ieee_slurp_section_data,
+ ieee_write_section_part, do_with_relocs, do_as_repeat,
+ do_without_relocs, ieee_write_debug_part, init_for_output,
+ ieee_set_section_contents): ..
+ * ihex.c (ihex_scan, ihex_read_section, ihex_get_section_contents): ..
+ * irix-core.c (do_sections, make_bfd_asection): ..
+ * libaout.h (aout_section_merge_with_text_p): ..
+ * libbfd.c (_bfd_generic_get_section_contents,
+ _bfd_generic_get_section_contents_in_window): ..
+ * linker.c (default_indirect_link_order): ..
+ * lynx-core.c (make_bfd_asection): ..
+ * m68klinux.c (linux_link_create_dynamic_sections,
+ bfd_m68klinux_size_dynamic_sections, linux_finish_dynamic_link): ..
+ * mach-o.c (bfd_mach_o_make_bfd_section,
+ bfd_mach_o_scan_read_dylinker, bfd_mach_o_scan_read_dylib,
+ bfd_mach_o_scan_read_thread, bfd_mach_o_scan_read_symtab,
+ bfd_mach_o_scan_read_segment): ..
+ * merge.c (_bfd_add_merge_section, record_section, merge_strings,
+ _bfd_merge_sections): ..
+ * mmo.c (mmo_find_sec_w_addr, mmo_get_spec_section, mmo_get_loc,
+ mmo_map_set_sizes, mmo_canonicalize_symtab,
+ mmo_internal_write_section, mmo_write_object_contents): ..
+ * netbsd-core.c (netbsd_core_file_p): ..
+ * nlm32-alpha.c (nlm_alpha_read_reloc, nlm_alpha_write_import,
+ nlm_alpha_set_public_section): ..
+ * nlm32-ppc.c (nlm_powerpc_read_reloc, nlm_powerpc_write_reloc): ..
+ * nlm32-sparc.c (nlm_sparc_write_import): ..
+ * nlmcode.h (add_bfd_section, nlm_swap_auxiliary_headers_in,
+ nlm_compute_section_file_positions): ..
+ * oasys.c (oasys_object_p, oasys_slurp_section_data,
+ oasys_write_sections, oasys_write_data, oasys_set_section_contents): ..
+ * opncls.c (get_debug_link_info): ..
+ * osf-core.c (make_bfd_asection): ..
+ * pdp11.c (some_aout_object_p, adjust_o_magic, adjust_z_magic,
+ adjust_n_magic, adjust_sizes_and_vmas, squirt_out_relocs,
+ final_link, aout_link_input_section): ..
+ * peXXigen.c (_bfd_XXi_swap_sym_in, _bfd_XXi_swap_aouthdr_out,
+ pe_print_idata, pe_print_edata, pe_print_pdata, pe_print_reloc): ..
+ * pef.c (bfd_pef_make_bfd_section, bfd_pef_print_loader_section,
+ bfd_pef_scan_start_address, bfd_pef_parse_symbols): ..
+ * ppcboot.c (ppcboot_object_p, ppcboot_canonicalize_symtab): ..
+ * ptrace-core.c (ptrace_unix_core_file_p): ..
+ * reloc.c (bfd_perform_relocation, bfd_install_relocation,
+ _bfd_final_link_relocate, bfd_generic_relax_section,
+ bfd_generic_get_relocated_section_contents): ..
+ * reloc16.c (bfd_coff_reloc16_relax_section,
+ bfd_coff_reloc16_get_relocated_section_c): ..
+ * riscix.c (riscix_some_aout_object_p): ..
+ * rs6000-core.c (read_hdr, make_bfd_asection): ..
+ * sco5-core.c (make_bfd_asection): ..
+ * simple.c (bfd_simple_get_relocated_section_contents): ..
+ * som.c (som_object_setup, setup_sections, som_prep_headers,
+ som_write_fixups, som_begin_writing, bfd_section_from_som_symbol,
+ som_set_reloc_info, som_get_section_contents,
+ som_bfd_link_split_section): ..
+ * sparclinux.c (linux_link_create_dynamic_sections,
+ bfd_sparclinux_size_dynamic_sections, linux_finish_dynamic_link): ..
+ * srec.c (srec_scan, srec_read_section, srec_get_section_contents): ..
+ * stabs.c (_bfd_link_section_stabs, _bfd_discard_section_stabs,
+ _bfd_write_stab_strings, _bfd_stab_section_offset): ..
+ * sunos.c (sunos_read_dynamic_info, sunos_create_dynamic_sections,
+ bfd_sunos_size_dynamic_sections, sunos_scan_std_relocs,
+ sunos_scan_ext_relocs, sunos_scan_dynamic_symbol,
+ sunos_write_dynamic_symbol, sunos_check_dynamic_reloc,
+ sunos_finish_dynamic_link): ..
+ * syms.c (_bfd_stab_section_find_nearest_line): ..
+ * tekhex.c (first_phase, tekhex_set_section_contents,
+ tekhex_write_object_contents): ..
+ * trad-core.c (trad_unix_core_file_p): ..
+ * versados.c (process_esd, process_otr, process_otr): ..
+ * vms-gsd.c (_bfd_vms_slurp_gsd, _bfd_vms_write_gsd): ..
+ * vms-misc.c (add_new_contents): ..
+ * vms-tir.c (check_section, new_section, _bfd_vms_write_tir): ..
+ * vms.c (vms_set_section_contents): ..
+ * xcofflink.c (xcoff_get_section_contents, xcoff_link_add_symbols,
+ xcoff_sweep, bfd_xcoff_size_dynamic_sections, xcoff_build_ldsyms,
+ _bfd_xcoff_bfd_final_link, xcoff_link_input_bfd): ..
+ * xsym.c (bfd_sym_scan): .. See above.
+
+2004-06-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Add addend when
+ calling _bfd_merged_section_offset only for section symbols.
+
+2004-06-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_relax_section): Implement reference code
+ for handling SEC_MERGE symbols in relax_section.
+
+2004-06-21 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-05-15 Richard Sandiford <rsandifo at redhat.com>
+ * cpu-h8300.c (compatible): Allow h8300s and h8300sx code to be
+ linked together. Mark the result as h8300sx code.
+
+2004-06-21 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-bfd.h (struct elf_backend_data): Added
+ elf_backend_omit_section_dynsym.
+ (_bfd_elf_link_omit_section_dynsym): Declare.
+ * elf32-frv.c (_frvfdpic_link_omit_section_dynsym): New.
+ (elf_backend_omit_section_dynsym): Use it for frvfdpic.
+ * elflink.c (_bfd_elf_link_omit_section_dynsym): Split out of...
+ (_bfd_elf_link_renumber_dynsyms): ... this function.
+ * elfxx-target.h (elf_backend_omit_section_dynsym): Default to
+ _bfd_elf_link_omit_section_dynsym).
+ (elfNN_bed): Added elf_backend_omit_section_dynsym.
+
+2004-06-21 Nick Clifton <nickc at redhat.com>
+
+ * coffcode.h (styp_to_sec_flags): Ignore IMAGE_SCN_MEM_NOT_PAGED
+ flags.
+
+2004-06-17 Jerome Guitton <guitton at gnat.com>
+
+ * bfd-in.h (bfd_cache_close_all): New function declaration.
+ * bfd-in2.h: Regenerate.
+ * cache.c (bfd_cache_close_all): New function definition.
+
+2004-06-16 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.in: Don't set COREFILE to trad-core.lo for FreeBSD
+ 4.10 and beyond.
+ * configure: Regenerate.
+
+2004-06-16 Daniel Jacobowitz <dan at debian.org>
+
+ * elf32-ppc.c (ppc_elf_create_linker_section): Create symbols in
+ the pre-existing section.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (struct sec): Remove usused flags. Reorganize a little.
+ (bfd_get_section_size_before_reloc): Delete.
+ (bfd_get_section_size_after_reloc): Delete.
+ (STD_SECTION): Update.
+ (bfd_get_section_size_now): Delete.
+ (bfd_set_section_contents): Don't referece reloc_done.
+ (bfd_get_section_contents): Remove reloc_done comment.
+ * bout.c (b_out_bfd_get_relocated_section_contents): Don't set
+ reloc_done.
+ * coff-alpha.c (alpha_ecoff_get_relocated_section_contents): Likewise.
+ * ecoff.c (bfd_debug_section): Update initializer.
+ * elfxx-mips.c (_bfd_elf_mips_get_relocated_section_contents): Ditto.
+ * reloc.c (bfd_generic_get_relocated_section_contents): Likewise.
+ * bfd-in.h (bfd_section_size): Expand.
+ (bfd_get_section_size): New macro.
+ * bfd-in2.h: Regenerate.
+ * coff64-rs6000.c (xcoff64_write_object_contents): Replace
+ bfd_get_section_size_before_reloc with bfd_get_section_size.
+ * coffcode.h (coff_write_object_contents): Likewise.
+ * coffgen.c (build_debug_section): Likewise.
+ * dwarf1.c (parse_line_table): Likewise.
+ (_bfd_dwarf1_find_nearest_line): Likewise.
+ * ecoff.c (_bfd_ecoff_write_object_contents): Likewise.
+ * i386msdos.c (msdos_write_object_contents): Likewise.
+ * pdp11.c (squirt_out_relocs): Likewise.
+ * elf32-sh64.c (sh64_find_section_for_address): Remove comment.
+ * elf64-mmix.c (mmix_elf_final_link): Update comment.
+
+2004-06-14 Chris Demetriou <cgd at broadcom.com>
+
+ * elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
+ removal) with updated comment.
+ (bfd_elf32_bfd_reloc_type_lookup): Add back case for
+ BFD_RELOC_32_PCREL.
+ (mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
+ * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
+
+2004-06-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-x86-64.c (elf64_x86_64_relocate_section): Ignore reloc
+ overflow on branches to undefweaks.
+
+2004-06-11 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * coff-alpha.c (alpha_relocate_section): Set used_by_bfd directly
+ as ecoff_section_data() does not return a valid lvalue.
+
+2004-06-09 Alexandre Oliva <aoliva at redhat.com>
+
+ * elflink.c (elf_sort_symbol): Compare section id, not pointers.
+ (elf_link_add_object_symbols): Likewise.
+
+ * elf-m10300.c (_bfd_mn10300_elf_reloc_type_class): New.
+ (elf_backend_reloc_type_class): New.
+
+2004-06-08 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.in (hppa*-*-netbsd*, hppa*-*-openbsd): Set COREFILE to
+ netbsd-core.lo.
+ * configure: Regenerate.
+
+2004-06-07 Daniel Jacobowitz <dan at debian.org>
+
+ From: Albert Chin-A-Young <china at thewrittenword.com>
+ * bfd/elf-bfd.h (struct eh_cie_fde): Convert unsigned char bitfields
+ to unsigned int.
+
+2004-05-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Undo the last
+ change.
+
+2004-05-28 DJ Delorie <dj at redhat.com>
+
+ * elf-m10300.c (mn10300_elf_relax_section): Preserve reloc addend
+ for linking, but otherwise adjust reloc for merged sections.
+
+2004-05-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Properly call
+ _bfd_merged_section_offset for local symbols.
+
+2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * Makefile.am: Regenerate dependencies.
+ * Makefile.in: Regenerate.
+ * archures.c: Add bfd_mach_sh3_nommu .
+ * bfd-in2.h: Regenerate.
+ * cpu-sh.c: Add sh3-nommu architecture.
+ (bfd_to_arch_table): Create new table.
+ (sh_get_arch_from_bfd_mach): Create new function.
+ (sh_get_arch_up_from_bfd_mach): Create new function.
+ (sh_merge_bfd_arch): Create new function.
+ * elf32-sh.c (sh_ef_bfd_table): Add table.
+ (sh_elf_check_relocs): Replace switch statement with
+ use of sh_ef_bfd_table .
+ (sh_elf_get_flags_from_mach): Add new function.
+ (sh_find_elf_flags): Likewise.
+ (sh_elf_copy_private_data): Replace most of non-elf contents
+ with a call to sh_merge_bfd_arch() .
+
+2004-05-27 Michael Chastain <mec.gnu at mindspring.com>
+
+ * Makefile.am (bfdver.h): Use explicit filename, not $< .
+ * Makefile.in: Regenerate.
+
+2004-05-27 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-m10300.c (elf32_mn10300_finish_hash_table_entry): Avoid
+ custom calling conventions for dynamic symbols.
+ (mn10300_elf_relax_section): Avoid relaxing a function as a local
+ symbol if it's an alias to a global one.
+
+2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (_bfd_elf_make_section_from_shdr): Undo the last
+ change.
+
+2004-05-27 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-m10300.c (mn10300_elf_relax_section): Don't test isym within
+ loop over hashes.
+
+2004-05-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (_bfd_elf_make_section_from_shdr): Don't set SEC_EXCLUDE
+ for SHT_GROUP sections.
+
+2004-05-25 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_add_object_symbols): Don't set up merge
+ section data here..
+ * elf.c (_bfd_elf_merge_sections): .. Do it here instead.
+ * merge.c: Formatting. Remove unnecessary casts. Expand
+ bfd_get_section_alignment macro.
+ (struct sec_merge_sec_info): Rename "first" to "first_str". Update
+ use throughout file.
+ (_bfd_add_merge_section): Rename from _bfd_merge_section. Update
+ comment. Abort on dynamic or non-SEC_MERGE input. Don't test
+ section name to determine sinfo group, instead test output section
+ and alignment.
+ (_bfd_merge_sections): Add struct bfd_link_info param. Call
+ _bfd_strip_section_from_output rather than just twiddling flags.
+ * libbfd-in.h (_bfd_add_merge_section): Rename, update comment.
+ (_bfd_merge_sections): Update prototype.
+ * libbfd.h: Regenerate.
+
+2004-05-24 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c: Correctly indent section that sets architecture
+ from machine ID.
+
+ From Miod Vallat <miod at online.fr>:
+ * m88kopenbsd.c: New file.
+ * targets.c (m88k_openbsd_vec): New.
+ * config.bfd: Add m88k-*-openbsd*.
+ * configure.in (m88k-*-openbsd*): Set COREFILE to netbsd-core.lo.
+ (m88kopenbsd_vec): New.
+ * configure: Regenerate.
+ * Makefile.am (BFD32_BACKENDS): Add m88kopenbsd.lo.
+ (BFD32_BACKENDS_CFILES): Add m88kopenbsd.c.
+ Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2004-05-24 Nick Clifton <nickc at redhat.com>
+
+ * hash.c: Remove bogus node "Changing the default Hash Table Size"
+ introduced by hash table size patch.
+
+2004-05-22 Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (is_release): Remove.
+ (bfd_version_date, bfd_version, bfd_version_string): Likewise.
+ (AC_OUTPUT): Don't output bfdver.h from version.h.
+ * configure: Regenerate.
+ * Makefile.am (RELEASE): New variable.
+ (bfdver.h): New target.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Likewise.
+
+2004-05-22 Ben Elliston <bje at au.ibm.com>
+
+ * Makefile.am (config.status): Don't depend on version.h.
+ * Makefile.in: Regenerate.
+
+2004-05-22 Alan Modra <amodra at bigpond.net.au>
+
+ * merge.c (_bfd_merged_section_offset): Remove "addend" param.
+ * libbfd-in.h (_bfd_merged_section_offset): Adjust prototype.
+ * libbfd.h: Regenerate.
+ * elf.c (_bfd_elf_rela_local_sym): Adjust call.
+ (_bfd_elf_rel_local_sym): Likewise.
+ * elflink.c (_bfd_elf_link_sec_merge_syms): Likewise.
+ (elf_link_input_bfd): Likewise.
+ * elf32-ppc.c (ppc_elf_relax_section): Likewise.
+ * elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Likewise.
+ (elfNN_ia64_relocate_section): Likewise.
+
+2004-05-21 Andy Chittenden <achittenden at bluearc.com>
+
+ * hash.c (bfd_default_hash_table_size): New variable.
+ (bfd_hash_table_init): Use new variable instead of DEFAULT_SIZE.
+ (bfd_hash_set_default_size): New function. Set the default size
+ to a selected prime number close to the argument. Document new
+ function.
+ * bfd-in.h: Add prototype for bfd_hash_set_default_size.
+ * bfd-in2.h: Regenerate.
+ * Makefile.am (hash.lo): Add dependency upon libiberty.h.
+ * Makefile.in: Regenerate.
+
+2004-05-21 Mark Kettenis <kettenis at gnu.org>
+
+ * libaout.h (machine_type): Add M_88K_OPENBSD and M_HPPA_OPENBSD.
+ * netbsd-core.c (netbsd_core_file_p): Set architecture for alpha,
+ arm, m68k, m88k and hppa core files.
+
+2004-05-21 Nick Clifton <nickc at redhat.com>
+
+ * bfdio.c (bfd_bread): Do not use iovec if it is NULL.
+ (bfd_bwrite): Likewise.
+ (bfd_tell): Likewise.
+ (bfd_flush): Likewise.
+ (bfd_stat): Likewise.
+ (bfd_seek): Likewise.
+ (bfd_get_mtime): Likewise.
+ (bfd_get_size): Likewise.
+
+2004-05-19 Ben Elliston <bje at au.ibm.com>
+
+ * dwarf2.c (_bfd_dwarf2_find_nearest_line): Comment correction.
+
+2004-05-19 Mikulas Patocka <mikulas at artax.karlin.mff.cuni.cz>
+
+ * archive.c (_bfd_get_elt_at_filepos): Cope with a nested archives.
+ (bfd_generic_openr_next_archived_file): Likewise.
+
+2004-05-17 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (xtensa_get_property_section_name): Determine linkonce
+ section names by inserting a new substring after .gnu.linkonce, except
+ for .gnu.linkonce.t.* where the "t." is replaced.
+
+2004-05-17 Adam Nemet <anemet at lnxw.com>
+
+ * config.bfd (sparc-*-lynxos* case): Add to obsolete list.
+ (m68-*-lynxos* case): Likewise.
+ (powerpc-*-lyxnos* case): New case.
+ (i[3-7]86-*-lynxos* case): Update to LynxOS 4.0 ELF.
+
+2004-05-17 David Heine <dlheine at tensilica.com>
+
+ * aout-target.h (MY_bfd_copy_private_header_data): Define.
+ * aout-tic30.c (MY_bfd_copy_private_header_data): Define.
+ * bfd.c (bfd_copy_private_header_data): Define.
+ * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Add entries for new
+ interface.
+ * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
+ * coffcode.h (coff_bfd_copy_private_header_data): Define.
+ * elf-bfd.h (_bfd_elf_copy_private_header_data): Declare.
+ * elf.c (_bfd_elf_copy_private_section_data): Remove code to set up
+ segments by calling copy_private_bfd_data.
+ (_bfd_elf_copy_private_header_data): Define.
+ * elfxx-target.h (bfd_elfNN_bfd_copy_private_header_data): Define.
+ * libbfd-in.h (_bfd_generic_bfd_copy_private_header_data): Define.
+ * libecoff.h (_bfd_ecoff_bfd_copy_private_header_data): Define.
+ * mach-o.c (bfd_mach_o_bfd_copy_private_header_data): Define.
+ * mmo.c (mmo_bfd_copy_private_header_data): Define.
+ * ppcboot.c (ppcboot_bfd_copy_private_header_data): Define.
+ * som.c (som_bfd_copy_private_header_data): Define.
+ * targets.c (BFD_JUMP_TABLE_COPY): Add _bfd_copy_private_header_data.
+ * vms.c (vms_bfd_copy_private_header_data): Define.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2004-05-15 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * elfxx-mips.c (MINUS_TWO): Define.
+ (mips_elf_higher, mips_elf_highest,
+ mips_elf_create_dynamic_relocation): Use MINUS_ONE and MINUS_TWO for
+ some bfd_vma values.
+ (_bfd_mips_elf_finish_dynamic_symbol): Likewise. Code cleanup.
+
+2004-05-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * som.c (log2): Rename to exact_log2. Adjust all callers.
+
+2004-05-13 Paul Brook <paul at codesourcery.com>
+
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Handle
+ dwarf3 format CIE entries. Remove comment about the size of the
+ ra_column field. It is now correctly deduced.
+
+2004-05-13 Joel Sherrill <joel at oarcorp.com>
+
+ * config.bfd (or32-*-rtems*): Switch to elf.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-05-11 Jakub Jelinek <jakub at redhat.com>
+
+ * elflink.c (bfd_elf_final_link): Don't output STT_SECTION symbol
+ into .dynsym if elf_section_data (sec)->dynindx <= 0.
+ Adjust counting of last_local.
+ (_bfd_elf_link_renumber_dynsyms): Don't assign dynindx to sections
+ other than SHT_PROGBITS/SHT_NOBITS and neither for .got/.got.plt/.plt
+ created by the linker nor !SHF_ALLOC.
+
+ * elf32-i386.c (elf_i386_finish_dynamic_sections): Point
+ DT_PLTGOT to the start of the .got.plt section instead of the
+ .got output section. Set sh_entsize for .got section in addition
+ to .got.plt.
+ (elf_i386_relocate_section): Don't assume _GLOBAL_OFFSET_TABLE_
+ is at sgot->output_section->vma.
+ * elf64-x86-64.c (elf64_x86_64_finish_dynamic_sections): Point
+ DT_PLTGOT to the start of the .got.plt section instead of the
+ .got output section.
+ (elf64_x86_64_relocate_section): Don't assume _GLOBAL_OFFSET_TABLE_
+ is at sgot->output_section->vma. Set sh_entsize for .got section
+ in addition to .got.plt.
+ * elf.c (_bfd_elf_print_private_bfd_data): Handle PT_GNU_RELRO.
+ (bfd_section_from_phdr): Likewise.
+ (map_sections_to_segments): Likewise.
+ (assign_file_positions_for_segments): Likewise.
+ (get_program_header_size): Likewise.
+ * elflink.c (bfd_elf_size_dynamic_sections): Set
+ elf_tdata (output_bfd)->relro from info->relro.
+ * elf-bfd.h (struct elf_obj_tdata): Add relro field.
+
+2004-05-08 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (_frvfdpic_add_dyn_reloc): Don't warn when we get
+ a zero symndx for which we hadn't accounted a dynamic relocation.
+ (_frvfdpic_add_rofixup): Likewise.
+
+2004-05-07 Brian Ford <ford at vss.fsi.com>
+ DJ Delorie <dj at redhat.com>
+
+ * coffcode.h (coff_write_object_contents) [COFF_IMAGE_WITH_PE]:
+ Propagate IMAGE_FILE_LARGE_ADDRESS_AWARE.
+ * peXXigen.c (_bfd_XX_print_private_bfd_data_common): Recognize
+ IMAGE_FILE_LARGE_ADDRESS_AWARE. Use PE defines.
+
+2004-05-07 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (elf32_frvfdpic_modify_segment_map): Return
+ immediately if there's no link info.
+ (elf32_frvfdpic_copy_private_bfd_data): New.
+ (bfd_elf32_bfd_copy_private_bfd_data): Use it for frvfdpic.
+
+2004-05-06 Zack Weinberg <zack at codesourcery.com>
+
+ * dwarf2.c (add_line_info): Also set info->filename to NULL if
+ filename argument is null; do not call strlen on a null pointer.
+
+2004-05-06 Daniel Jacobowitz <drow at mvista.com>
+
+ * elf32-arm.h (elf32_arm_relocate_section): Remove R_ARM_PLT32
+ special case.
+
+2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * configure.in (bfd_elf32_frvfdpic_vec): New.
+ * configure: Rebuilt.
+ * targets.c (bfd_elf32_frvfdpic_vec): New.
+ * config.bfd: Enable it on frv-*-elf and frv-*-*linux*, as default
+ on the latter.
+ * elf32-frv.c: Prefix all identifiers added for FDPIC support with
+ frvfdpic instead of frv. Rearrange elf-target macros such that
+ the FDPIC-specific ones are only defined for this new target
+ vector.
+ (bfd_elf32_frvfdpic_vec): Declare.
+ (IS_FDPIC): New.
+ (elf32_frv_relocate_section): Use it to enable segment checking
+ and to control rofixup emission. Add output section vma to
+ applied relocation in non-LOAD non-ALLOC sections. Use
+ _bfd_error_handler for errors.
+ (_frv_create_got_section): Create .rel.got and .rofixup only in
+ FDPIC. Create non-dynamic _gp at .got+2048 in non-FDPIC, like the
+ linker script.
+ (elf32_frvfdpic_size_dynamic_sections): Assume FDPIC.
+ (elf32_frvfdpic_modify_segment_map): Likewise.
+ (elf32_frv_finish_dynamic_sections): New, do-nothing.
+ (elf32_frvfdpic_finish_dynamic_sections): Assume FDPIC. Improve
+ error message if we miscompute the rofixup size.
+ (frvfdpic_elf_use_relative_eh_frame): Assume FDPIC.
+ (frvfdpic_elf_encode_eh_address): Likewise.
+ (elf32_frv_check_relocs): Reject FDPIC-only relocs in non-FDPIC.
+ Record relocs only in FDPIC. Make sure _gp is defined for GPREL
+ relocs. Reject unknown relocation types.
+ (elf32_frv_object_p): Make sure target vector matches FDPIC bits.
+ (frv_elf_merge_private_bfd_data): Likewise.
+ (ELF_MAXPAGESIZE): Revert to 0x1000 for elf32-frv; keep it as
+ 0x4000 for newly-added elf32-frvfdpic.
+
+2004-05-05 Nick Clifton <nickc at redhat.com>
+
+ PR/136
+ * cache.c (bfd_cache_lookup_worker): Call abort() rather than
+ returning NULL as most users of this function do not check its
+ return value.
+ * hppabsd-core.c (hppabsd_core_core_file_p): Do not check result
+ of bfd_cache_lookup().
+ * sco5-core.c (sco5_core_file_p): Likewise.
+ * trad-core.c (trad_unix_core_file_p): Likewise.
+
+2004-05-05 Nick Clifton <nickc at redhat.com>
+
+ * cache.c (bfd_cache_lookup): Improve formatting.
+ * archive.c: Fix formatting.
+
+2004-05-05 Peter Barada <peter at the-baradas.com>
+
+ * bfd_archures.c(bfd_architecture): Add 521x,5249,547x,548x.
+ * cpu-m68k.c(bfd_m68k_arch): Likewise.
+ * bfd-in2.h(bfd_architecture): Regenerate.
+
+2004-05-03 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (_bfd_elf_rela_local_sym): Set kept_section for excluded
+ SEC_MERGE sections.
+ * elflink.c (elf_link_input_bfd): Adjust output reloc index for
+ those against discarded link-once and SEC_MERGE section symbols.
+
+2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * section.c (bfd_get_section_by_name_if): New.
+ * bfd-in2.h: Regenerated.
+
+2004-05-02 Alan Modra <amodra at bigpond.net.au>
+
+ * som.c (som_bfd_is_group_section): Define.
+
+2004-05-01 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (bfd_make_section_anyway): Copy the whole
+ bfd_hash_entry, not just "next" from existing entry.
+
+2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (bfd_section_from_shdr): Maintain the section order in
+ a section group.
+ (special_sections): Add ".note.GNU-stack".
+ (elf_fake_sections): Handle section group for relocatable
+ link..
+
+2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * section.c (bfd_sections_find_if): New.
+ * bfd-in2.h: Regenerated.
+
+2004-04-30 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (bfd_make_section_anyway): Add all sections to hash tab.
+
+ * elf-bfd.h (bfd_elf_is_group_section): Declare.
+ * elf.c (bfd_elf_is_group_section): New function.
+ * elfxx-target.h (bfd_elfNN_bfd_is_group_section
+ * section.c (bfd_generic_is_group_section): New function.
+ * targets.c (struct bfd_target): Add _bfd_is_group_section field.
+ (BFD_JUMP_TABLE_LINK): Adjust.
+ * aout-adobe.c (aout_32_bfd_is_group_section): Define.
+ * aout-target.h (MY_bfd_is_group_section): Define.
+ * aout-tic30.c (MY_bfd_is_group_section): Define.
+ * bfd.c (bfd_is_group_section): Define.
+ * binary.c (binary_bfd_is_group_section): Define.
+ * bout.c (b_out_bfd_is_group_section): Define.
+ * coff-alpha.c (_bfd_ecoff_bfd_is_group_section): Define.
+ * coff-mips.c (_bfd_ecoff_bfd_is_group_section): Define.
+ * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Adjust.
+ * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Adjust.
+ * coffcode.h (coff_bfd_is_group_section): Define.
+ * i386msdos.c (msdos_bfd_is_group_section): Define.
+ * i386os9k.c (os9k_bfd_is_group_section): Define.
+ * ieee.c (ieee_bfd_is_group_section): Define.
+ * ihex.c (ihex_bfd_is_group_section): Define.
+ * libbfd-in.h (_bfd_nolink_bfd_is_group_section): Define.
+ * mach-o.c (bfd_mach_o_bfd_is_group_section): Define.
+ * mmo.c (mmo_bfd_is_group_section): Define.
+ * nlm-target.h (nlm_bfd_is_group_section): Define.
+ * oasys.c (oasys_bfd_is_group_section): Define.
+ * pef.c (bfd_pef_bfd_is_group_section): Define.
+ * ppcboot.c (ppcboot_bfd_is_group_section): Define.
+ * srec.c (srec_bfd_is_group_section): Define.
+ * tekhex.c (tekhex_bfd_is_group_section): Define.
+ * versados.c (versados_bfd_is_group_section): Define.
+ * vms.c (vms_bfd_is_group_section): Define.
+ * xsym.c (bfd_sym_bfd_is_group_section): Define.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2004-04-30 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_gc_mark): Follow indirect and warning syms.
+
+2004-04-30 Hans-Peter Nilsson <hp at axis.com>
+
+ * configure.in: Update version to 2.15.91.
+ * configure: Regenerate.
+
+2004-04-29 Brian Ford <ford at vss.fsi.com>
+
+ * bfd.c (bfd_get_sign_extend_vma): Add pe[i]-i386 case to DJGPP hack.
+ * coffcode.h (DOT_DEBUG, GNU_LINKONCE_WI): Define.
+ [!COFF_WITH_PE] (sec_to_styp_flags, styp_to_sec_flags): Use them.
+ (coff_compute_section_file_positions) [RS6000COFF_C]: Likewise.
+ [COFF_WITH_PE] (sec_to_styp_flags): Handle DWARF 2/3 .debug* and
+ .gnu.linkonce.wi. sections.
+ * pe-i386.c (COFF_SUPPORT_GNU_LINKONCE): Define.
+ (COFF_SECTION_ALIGNMENT_ENTRIES): Add entries for .debug and
+ .gnu.linkonce.wi..
+ * pei-i386.c (COFF_SUPPORT_GNU_LINKONCE): Likewise.
+ (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
+
+2004-04-28 Chris Demetriou <cgd at broadcom.com>
+
+ * reloc.c: Remove BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Likewise.
+
+2004-04-28 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * som.c (struct som_misc_symbol_info): Add is_comdat, is_common and
+ dup_common fields.
+ (setup_sections): Use som_subspace_dictionary_record struct instead
+ subspace_dictionary_record. Set SEC_LINK_ONCE if subspace is
+ is_comdat, is_common or dup_common.
+ (som_prep_headers): Use som_subspace_dictionary_record struct. Set
+ is_comdat, is_common and dup_common in section subspace_dict from
+ copy_data.
+ (som_begin_writing): Use som_subspace_dictionary_record struct.
+ (som_finish_writing): Likewise.
+ (som_bfd_derive_misc_symbol_info): Add support to set is_comdat,
+ is_common and dup_common flags in info for symbol. Add comment
+ regarding linker support for these fields. Slightly reorganize
+ function.
+ (som_build_and_write_symbol_table): Set is_comdat, is_common and
+ dup_common fields in symbol table from symbol info.
+ (bfd_som_set_subsection_attributes): Add comdat, common and dup_common
+ arguments. Set corresponding fields in copy_data. Change all callers.
+ (som_bfd_ar_write_symbol_stuff): Set dup_common flag in library
+ symbol table.
+ (som_vec): Add SEC_LINK_ONCE to applicable section flags.
+ * som.h (som_subspace_dictionary_record): Define.
+ (som_copyable_section_data_struct): Add is_comdat, is_common and
+ dup_common fields.
+ (som_section_data_struct): Use som_subspace_dictionary_record struct
+ instead of subspace_dictionary_record.
+ (bfd_boolean bfd_som_set_subsection_attributes): Adjust prototype.
+
+2004-04-27 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (xtensa_read_table_entries): Use section _cooked_size
+ if set. Check reloc_done flag before applying relocations. Use
+ output addresses, both when applying relocations and when comparing
+ against the specified section.
+ (elf_xtensa_relocate_section): Use output address to check if dynamic
+ reloc is in a literal pool. Set section's reloc_done flag.
+
+2004-04-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-sh64.c (elf_backend_section_flags): New. Defined.
+ (sh64_elf_set_mach_from_flags): Remove the kludge for .cranges
+ section.
+ (sh64_elf_section_flags): New. Set SEC_DEBUGGING for .cranges
+ section.
+
+2004-04-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-alpha.c (elf64_alpha_read_ecoff_info): Don't assign
+ structure field removed in 2004-04-24 patch.
+ * elf64-sparc.c (sparc64_elf_plt_sym_val): Warning fix.
+
+ * elf-bfd.h (struct elf_backend_data <elf_backend_section_flags>):
+ Constify hdr arg.
+ * elf32-arm.h (elf32_arm_section_flags): Likewise.
+ * elf64-alpha.c (elf64_alpha_section_flags): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_section_flags): Likewise.
+ * elf.c (_bfd_elf_make_section_from_shdr): Set the bfd_section
+ field before calling elf_backend_section_flags.
+
+2004-04-24 Chris Demetriou <cgd at broadcom.com>
+
+ * elf32-mips.c (elf_mips_gnu_rel_hi16, elf_mips_gnu_rel_lo16)
+ (elf_mips_gnu_pcrel64, elf_mips_gnu_pcrel32): Remove.
+ (bfd_elf32_bfd_reloc_type_lookup): Remove cases for
+ BFD_RELOC_PCREL_HI16_S, BFD_RELOC_PCREL_LO16, BFD_RELOC_64_PCREL,
+ and BFD_RELOC_32_PCREL.
+ (mips_elf32_rtype_to_howto): Remove cases for R_MIPS_GNU_REL_HI16,
+ R_MIPS_GNU_REL_LO16, R_MIPS_PC64, R_MIPS_PC32.
+ * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
+ (_bfd_mips_elf_lo16_reloc): Remove handling for R_MIPS_GNU_REL_HI16.
+ (mips_elf_next_relocation): Move comment about matching HI/LO
+ relocations to...
+ (_bfd_mips_elf_relocate_section): Here. Remove handling for
+ R_MIPS_GNU_REL_HI16.
+
+2004-04-23 Chris Demetriou <cgd at broadcom.com>
+
+ * coff-mips.c (mips_relhi_reloc, mips_rello_reloc)
+ (mips_switch_reloc, mips_read_relocs, mips_relax_section)
+ (mips_relax_pcrel16, PCREL16_EXPANSION_ADJUSTMENT): Remove.
+ (mips_relocate_hi): Remove now-unused 'adjust' and 'pcrel' arguments,
+ and update comments to reflect current usage.
+ (mips_howto_table): Remove entries for MIPS_R_RELHI, MIPS_R_RELLO,
+ and MIPS_R_SWITCH, as well as several empty entries. Update comment
+ for MIPS_R_PCREL16.
+ (mips_ecoff_swap_reloc_in, mips_ecoff_swap_reloc_out)
+ (mips_adjust_reloc_out, mips_bfd_reloc_type_lookup): Remove support
+ for MIPS_R_SWITCH, MIPS_R_RELLO, and MIPS_R_RELHI relocations.
+ (mips_adjust_reloc_in): Likewise, adjust maximum accepted relocation
+ type number to be MIPS_R_PCREL16.
+ (mips_relocate_section): Remove support for link-time relaxation
+ of branches used by embedded-PIC. Remove support for MIPS_R_SWITCH,
+ MIPS_R_RELLO, and MIPS_R_RELHI relocations.
+ (_bfd_ecoff_bfd_relax_section): Redefine to bfd_generic_relax_section.
+ * ecoff.c (ecoff_indirect_link_order): Remove support for link-time
+ relaxation of branches used by embedded-PIC.
+ * ecofflink.c (bfd_ecoff_debug_accumulate): Likewise.
+ * libecoff.h (struct ecoff_section_tdata): Remove embedded-PIC
+ related members, update comment.
+ * pe-mips.c: Remove disabled (commented-out and #if 0'd)
+ code related to embedded-PIC.
+ * elfxx-mips.c (_bfd_mips_elf_read_ecoff_info): Remove
+ initialization of now-removed 'adjust' member of
+ 'struct ecoff_debug_info'.
+
+2004-04-23 Chris Demetriou <cgd at broadcom.com>
+
+ * elfxx-mips.c (mips_elf_get_global_gotsym_index): Remove.
+
+2004-04-21 Philip Blundell <pb at nexus.co.uk>
+
+ * elf32-arm.h (elf32_arm_check_relocs): Don't output REL32
+ relocs for locally defined symbols during -shared final link.
+ (elf32_arm_final_link_relocate): Likewise.
+
+2004-04-22 Jakub Jelinek <jakub at redhat.com>
+
+ * elf64-x86-64.c (elf64_x86_64_copy_indirect_symbol): Copy also
+ ELF_LINK_POINTER_EQUALITY_NEEDED.
+ (elf64_x86_64_check_relocs): Set ELF_LINK_POINTER_EQUALITY_NEEDED
+ if r_type is not R_X86_64_PC32.
+ (elf64_x86_64_finish_dynamic_symbol): If
+ ELF_LINK_POINTER_EQUALITY_NEEDED is not set, clear st_value of
+ SHN_UNDEF symbols.
+
+2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * elf32-sh.c (sh_elf_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+
+2004-04-22 Andrew Cagney <cagney at redhat.com>
+
+ * opncls.c (bfd_alloc): Fix type of "wanted" in doco.
+
+2004-04-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hpux-core.c (hpux_core_core_file_p): Add cast in call to
+ make_bfd_asection.
+ * som.c (som_set_section_contents): Constantify second argument.
+ (hppa_som_gen_reloc_type): Abort for unsupported selectors.
+ (som_object_setup): Rework to avoid warning.
+ (setup_sections, som_write_fixups, bfd_section_from_som_symbol):
+ Likewise.
+
+2004-04-22 Andrew Cagney <cagney at redhat.com>
+
+ * cache.c (bfd_cache_close): Check for a previously closed file.
+
+2004-04-22 Jakub Jelinek <jakub at redhat.com>
+
+ * bfd.c (bfd_get_synthetic_symtab): Define.
+ * targets.c (BFD_JUMP_TABLE_DYNAMIC): Add
+ NAME##_get_synthetic_symtab.
+ (struct bfd_target): Add _bfd_get_synthetic_symtab.
+ * libbfd-in.h (_bfd_nodynamic_get_synthetic_symtab): Define.
+ * elf-bfd.h (struct elf_backend_data): Add plt_sym_val and
+ relplt_name fields.
+ (_bfd_elf_get_synthetic_symtab): New prototype.
+ * elfcode.h (elf_get_synthetic_symtab): Define.
+ * elf.c (_bfd_elf_get_synthetic_symtab): New function.
+ * elfxx-target.h (bfd_elfNN_get_synthetic_symtab): Define.
+ (elf_backend_plt_sym_val, elf_backend_relplt_name): Define.
+ (elfNN_bed): Add elf_backend_plt_sym_val and elf_backend_relplt_name.
+ * bfd-in2.h: Rebuilt.
+ * libbfd.h: Rebuilt.
+ * elf32-i386.c (elf_i386_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf64-x86-64.c (elf64_x86_64_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf32-s390.c (elf_s390_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf64-s390.c (elf_s390_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf32-sparc (elf32_sparc_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf64-sparc.c (sparc64_elf_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * elf32-ppc.c (ppc_elf_plt_sym_val): New function.
+ (elf_backend_plt_sym_val): Define.
+ * aout-target.h (MY_get_synthetic_symtab): Define.
+ * aout-tic30.c (MY_get_synthetic_symtab): Define.
+ * coff-rs6000.c (rs6000coff_vec): Add
+ _bfd_nodynamic_get_synthetic_symtab.
+ (pmac_xcoff_vec): Likewise.
+ * coff64-rs6000.c (rs6000coff64_vec): Add
+ _bfd_nodynamic_get_synthetic_symtab.
+ (aix5coff64_vec): Likewise.
+ * sunos.c (MY_get_synthetic_symtab): Define.
+ * vms.c (vms_get_synthetic_symtab): Define.
+
+2004-04-22 Nick Clifton <nickc at redhat.com>
+
+ * bfd.c (bfd_archive_filename): Return NULL on NULL input.
+
+2004-04-22 Peter Barada <peter at the-baradas.com>
+
+ * archures.c: Add bfd_mach_mcfv4e to bfd_architecture.
+ * bfd2-in.h: Regenerate.
+ * cpu-m68k.c: Add 'm68k:mcfv4e' to arch_info_struct[].
+
+2004-04-21 Chris Demetriou <cgd at broadcom.com>
+
+ * coff-mips.c (bfd_mips_ecoff_create_embedded_relocs): Remove.
+ * elf32-mips.c (bfd_mips_elf32_create_embedded_relocs): Remove.
+ * bfd-in.h (bfd_mips_ecoff_create_embedded_relocs)
+ (bfd_mips_elf32_create_embedded_relocs): Remove prototypes
+ * bfd-in2.h: Regenerate.
+
+2004-04-21 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (is_same_value): Add final_static_link argument and
+ require relocations against a weak symbol to reference the same
+ symbol hash entry if not a final, static link.
+ (get_cached_value, add_value_map): Add final_static_link argument.
+ (remove_literals): Pass final_static_link argument as needed.
+
+2004-04-21 Andrew Cagney <cagney at redhat.com>
+
+ * opncls.c (_bfd_new_bfd_contained_in): Copy "iovec".
+ (struct opncls, opncls_btell, opncls_bseek, opncls_bread)
+ (opncls_bwrite, opncls_bclose, opncls_bflush)
+ (opncls_bstat, opncls_iovec, bfd_openr_iovec): Implement a
+ bfd iovec that uses function callbacks.
+ (bfd_close): Use the iovec's bclose.
+ * cache.c (cache_btell, cache_bseek, cache_bread, cache_bwrite)
+ (cache_bclose, cache_bflush, cache_bstat)
+ (cache_iovec): New functions and global variable, implement a
+ cache "iovec", where applicable set bfd_error.
+ (bfd_cache_init, bfd_cache_close): Set/test the bfd's iovec.
+ * bfdio.c (struct bfd_iovec): Define.
+ (real_read): Delete function.
+ (bfd_bread, bfd_bread, bfd_bwrite, bfd_tell, bfd_flush, bfd_stat)
+ (bfd_seek, bfd_get_mtime, bfd_get_size): Use the bfd's "iovec",
+ assume that bread and bwrite set bfd_error.
+ * bfd.c (struct bfd): Add "iovec", update comments.
+ * bfd-in2.h, libbfd.h: Re-generate.
+
+2004-04-21 Andrew Cagney <cagney at redhat.com>
+
+ * libaout.h (enum machine_type): Add M_POWERPC_NETBSD.
+
+2004-04-21 Eric Botcazou <ebotcazou at act-europe.fr>
+
+ * elflink.c (elf_gc_mark_dynamic_ref_symbol): New function.
+ (bfd_elf_gc_sections): Fail if a shared object is being created.
+ Do not fail if dynamic sections have been created. Instead call
+ elf_gc_mark_dynamic_ref_symbol to mark sections that contain
+ dynamically referenced symbols. Do not mark the whole graph
+ rooted at .eh_frame, only the section proper.
+
+2004-04-20 DJ Delorie <dj at redhat.com>
+
+ * reloc.c: Add BFD_RELOC_32_SECREL.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Likewise.
+ * coff-i386.c (howto_table) [COFF_WITH_PE]: Add R_SECREL32.
+ (coff_i386_rtype_to_howto) [COFF_WITH_PE]: Handle it.
+ (coff_i386_reloc_type_lookup) [COFF_WITH_PE]: Likewise.
+
+2004-04-19 Jakub Jelinek <jakub at redhat.com>
+
+ * elf32-sparc.c (elf32_sparc_relocate_section): Handle
+ relocs against hidden/protected undefweak symbols properly.
+ * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
+
+2004-04-18 Mark Kettenis <kettenis at gnu.org>
+
+ * libaout.h (enum machine_type): Add M_POWERPC_NETBSD.
+ * netbsd-core.c (netbsd_core_file_p): Set architecture for PowerPC
+ core files.
+
+2004-04-17 Brian Ford <ford at vss.fsi.com>
+
+ * peXXigen.c (_bfd_XXi_swap_aouthdr_out): Use the first non-zero
+ filepos for the SizeOfHeaders field.
+ (_bfd_XXi_swap_scnhdr_out): Correct section flags lossage on reloc
+ overflow.
+ (_bfd_XXi_swap_sym_in): Remove redundant section flags assignment.
+
+2004-04-16 Alan Modra <amodra at bigpond.net.au>
+
+ * simple.c (bfd_simple_get_relocated_section_contents): Don't
+ change reloc_done. Set and restore _cooked_size.
+ (RETURN): Delete.
+
+2004-04-15 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c (netbsd_core_file_p): Set architecture for VAX
+ core files.
+
+2004-04-15 Nick Clifton <nickc at redhat.com>
+
+ * bfd.c (bfd_archive_filename): Catch NULL bfd pointers.
+
+2004-04-15 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-sparc.c (sparc64_elf_check_relocs): Fix thinko last change.
+
+2004-04-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Treat weak as strong only
+ when it is a definition.
+
+2004-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-sparc.c (elf32_sparc_relocate_section): Don't abort
+ when statically linking PIC code.
+ * elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
+
+2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config.bfd: Remove mips*-*-mach3* and mips*-dec-mach3* targets.
+ * configure.in: Remove mips-dec-bsd*, mips-dec-mach3*, mips-*-mach3*
+ targets amd aout_mips_big_vec, aout_mips_little_vec target vectors.
+ * configure: Regenerate.
+
+2004-04-08 Richard Sandiford <rsandifo at redhat.com>
+
+ * elflink.c: Include libiberty.h.
+ * Makefile.am (elflink.lo): Depend on libiberty.h.
+ * Makefile.in: Regenerate.
+
+2004-04-06 Daniel Jacobowitz <drow at mvista.com>
+
+ * elfxx-mips.c (MIPS_ELF_STUB_SECTION_NAME): Always use
+ ".MIPS.stubs".
+
+2004-04-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_size_dynamic_sections): Always
+ reserve the memory for dynamic linker
+
+2004-04-05 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c (CORE_WCOOKIE_OFFSET): New define.
+ (netbsd_core_file_p): Create a .wcookie section for OpenBSD/sparc.
+
+2004-04-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-cr16c.c (elf32_cr16c_relocate_section): Use
+ RELOC_FOR_GLOBAL_SYMBOL.
+ (elf32_cr16c_add_symbol_hook): Remove const from Elf_Internal_Sym.
+
+2004-04-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-arm.h (elf32_arm_final_link_relocate): Handle
+ R_ARM_ALU* only if OLD_ARM_ABI is not defined.
+
+2004-04-01 Paul Brook <paul at codesourcery.com>
+
+ * bfd-in.h (bfd_elf32_arm_process_before_allocation): Update.
+ * elf32-arm.h (struct elf32_elf_section_map): New.
+ (struct _arm_elf_section_data): New.
+ (elf32_arm_section_data): Define.
+ (struct elf32_arm_link_hash_table): Add byteswap_code.
+ (elf32_arm_link_hash_table_create): Initialize byteswap_code.
+ (bfd_elf32_arm_process_before_allocation): Add byteswap_code.
+ (elf32_arm_post_process_headers): Set EF_ARM_BE8.
+ (elf32_arm_output_symbol_hook, elf32_arm_new_section_hook,
+ elf32_arm_compare_mapping, elf32_arm_write_section): New functions.
+ (bfd_elf32_new_section_hook, elf_backend_write_section,
+ elf_backend_link_output_symbol_hook): Define.
+
+2004-04-01 Andy Chittenden <achittenden at bluearc.com>
+
+ * stabs.c (struct stab_link_includes_totals): Add field 'symb'
+ that keeps the characters in a B_INCL..B_EINCL range.
+ (_bfd_link_section_stabs): When computing the sum of the
+ characters in a B_INCL..B_EINCL range also keep a copy of those
+ characters. Use this information to distinguish between
+ include sections that have the same sum and the same length
+ but which are nevertheless unique.
+
+2004-03-31 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (elf32_arm_final_link_relocate): Add R_ARM_ALU*.
+ * elfarm-nabi.c (elf32_arm_howto_table): Ditto.
+
+2004-03-31 Andy Chittenden <achittenden at bluearc.com>
+
+ * stabs.c (struct stab_link_includes_totals): Rename field 'total'
+ to 'sum_chars' and add field 'num_chars'.
+ (_bfd_link_section_stabs): When computing the sum of the
+ characters in a B_INCL..B_EINCL range also keep a count of the
+ number of characters. Use this information to help distinguish
+ between include sections when have the same sum but which
+ nevertheless are still unique.
+
+2004-03-31 Mattias Engdegård <mattias at virtutech.se>
+
+ * stabs.c (_bfd_link_section_stabs): Do not skip N_EXCL stabs.
+
+2004-03-30 Galit Heller <Galit.Heller at nsc.com>
+ Tomer Levi <Tomer.Levi at nsc.com>
+
+ * Makefile.am (ALL_MACHINES): Add cpu-cr16c.lo.
+ (ALL_MACHINES_CFILES): Add cpu-cr16c.c.
+ (BFD32_BACKENDS): Add elf32-cr16c.lo.
+ (BFD32_BACKENDS_CFILES): Add elf32-cr16c.c.
+ (cpu-cr16c.lo): New target.
+ (elf32-cr16c.lo): Likewise.
+ * Makefile.in: Regenerate.
+ * archures.c (bfd_architecture): Add bfd_{arch,mach}_cr16c.
+ (bfd_archures_list): Add bfd_cr16c_arch.
+ * config.bfd: Handle cr16c-*-elf*.
+ * configure.in: Handle bfd_elf32_cr16c_vec.
+ * configure: Regenerate.
+ * reloc.c: Add BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C,
+ BFD_RELOC_16C_NUM16, BFD_RELOC_16C_NUM16_C,
+ BFD_RELOC_16C_NUM32, BFD_RELOC_16C_NUM32_C,
+ BFD_RELOC_16C_DISP04, BFD_RELOC_16C_DISP04_C,
+ BFD_RELOC_16C_DISP08, BFD_RELOC_16C_DISP08_C,
+ BFD_RELOC_16C_DISP16, BFD_RELOC_16C_DISP16_C,
+ BFD_RELOC_16C_DISP24, BFD_RELOC_16C_DISP24_C,
+ BFD_RELOC_16C_DISP24a, BFD_RELOC_16C_DISP24a_C,
+ BFD_RELOC_16C_REG04, BFD_RELOC_16C_REG04_C,
+ BFD_RELOC_16C_REG04a, BFD_RELOC_16C_REG04a_C,
+ BFD_RELOC_16C_REG14, BFD_RELOC_16C_REG14_C,
+ BFD_RELOC_16C_REG16, BFD_RELOC_16C_REG16_C,
+ BFD_RELOC_16C_REG20, BFD_RELOC_16C_REG20_C,
+ BFD_RELOC_16C_ABS20, BFD_RELOC_16C_ABS20_C,
+ BFD_RELOC_16C_ABS24, BFD_RELOC_16C_ABS24_C,
+ BFD_RELOC_16C_IMM04, BFD_RELOC_16C_IMM04_C,
+ BFD_RELOC_16C_IMM16, BFD_RELOC_16C_IMM16_C,
+ BFD_RELOC_16C_IMM20, BFD_RELOC_16C_IMM20_C,
+ BFD_RELOC_16C_IMM24, BFD_RELOC_16C_IMM24_C,
+ BFD_RELOC_16C_IMM32, BFD_RELOC_16C_IMM32_C.
+ * targets.c (bfd_elf32_cr16c_vec): Declare.
+ (bfd_target_vector): Add bfd_elf32_cr16c_vec.
+ * cpu-cr16c.c: New file.
+ * elf32-cr16c.c: Likewise.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Likewise.
+
+2004-03-30 Jakub Jelinek <jakub at redhat.com>
+
+ * elf.c (map_sections_to_segments): Fix handling of .tbss.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Remove all mention of elflink.h.
+ * Makefile.in: Regenerate.
+ * bfd-in.h (bfd_elf_discard_info): Declare.
+ (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete.
+ * bfd-in2.h: Regenerate.
+ * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol,
+ bfd_elf32_link_record_dynamic_symbol,
+ bfd_elf64_link_record_dynamic_symbol,
+ _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link,
+ bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol,
+ _bfd_elf32_link_record_local_dynamic_symbol,
+ _bfd_elf64_link_record_local_dynamic_symbol,
+ _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets,
+ _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link,
+ _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry,
+ _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets,
+ _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry,
+ _bfd_elf32_reloc_symbol_deleted_p,
+ _bfd_elf64_reloc_symbol_deleted_p): Delete.
+ (bfd_elf_link_record_dynamic_symbol,
+ bfd_elf_link_record_local_dynamic_symbol,
+ bfd_elf_final_link, bfd_elf_gc_sections,
+ bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry,
+ bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link,
+ bfd_elf_reloc_symbol_deleted_p): Declare.
+ (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define.
+ * elf32-arm.h: Update for changed function names. Remove local
+ WILL_CALL_FINISH_DYNAMIC_SECTION define.
+ * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c,
+ * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c,
+ * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c,
+ * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c,
+ * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c,
+ * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c,
+ * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c,
+ * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise.
+ * elfxx-target.h (bfd_elfNN_bfd_final_link): Define.
+ (bfd_elfNN_print_symbol): Define.
+ * elfcode.h: Don't include elflink.h.
+ (elf_bfd_discard_info, elf_reloc_symbol_deleted_p,
+ elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections,
+ elf_gc_common_finalize_got_offsets, elf_gc_common_final_link,
+ elf_gc_record_vtinherit, elf_gc_record_vtentry,
+ elf_link_record_local_dynamic_symbol): Don't define.
+ * elflink.c: Update for changed function names. Move elflink.h
+ code here.
+ * elflink.h: Delete file.
+ * po/SRC-POTFILES.in: Regenerate.
+ * po/bfd.pot: Regenerate.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-mmix.c (mmix_elf_relocate_section): Restore code setting
+ "name" for global syms accidentally removed in 2004-03-20 change.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_reloc_cookie): Add r_sym_shift field.
+ * elflink.h: Replace all occurrences of sizeof (Elf_External_*)
+ where Elf_External_* is different for 64 and 32 bit, with
+ corresponding elf_size_info field.
+ (struct elf_final_link_info): Use "bfd_byte *" instead
+ of "Elf_External_Sym *" for external_syms and symbuf.
+ (elf_link_adjust_relocs): Set up r_type_mask and r_sym_shift local
+ vars and use instead of ELF_R_INFO and ELF_R_TYPE macros.
+ (struct elf_link_sort_rela): Add "sym_mask" alias for "offset".
+ (elf_link_sort_cmp1): Use sym_mask field instead of ELF_R_SYM.
+ (elf_link_sort_cmp2): Adjust.
+ (elf_link_sort_relocs): Set up r_sym_mask local var instead of
+ using ELF_R_SYM macro. Set u.sym_mask.
+ (elf_bfd_final_link): Call _bfd_elf_stringtab_init instead of macro
+ version, elf_stringtab_init. Ditto for bfd_section_from_elf_index
+ vs. section_from_elf_index. Adjust Elf_External_Sym pointer
+ arithmetic. Pass bed to elf_link_flush_output_syms. Adjust
+ Elf_External_Dyn pointer arithmentic. Use bed swap_dyn_in and
+ swap_syn_out functions. Rearrange dyn swap in/out switch.
+ (elf_link_output_sym): Adjust Elf_External_Sym pointer arithmentic.
+ Pass bed to elf_link_flush_output_syms. Use bed swap_symbol_out.
+ (elf_link_flush_output_syms): Add elf_backend_data arg.
+ (elf_link_check_versioned_symbol): Likewise.
+ (elf_link_output_extsym): Pass bed to elf_link_check_versioned_symbol.
+ Adjust Elf_External_Sym pointer arithmetic. Use bed swap_symbol_out.
+ (elf_link_input_bfd): Use bfd_section_from_elf_index. Set up
+ r_type_mask and r_sym_shift local vars and use instead of ELF_R_SYM,
+ ELF_R_TYPE and ELF_R_INFO macros.
+ (elf_reloc_link_order): Select ELF32_R_INFO or ELF64_R_INFO invocation
+ based on size rather than using ELF_R_INFO.
+ (elf_gc_mark): Set up r_sym_shift local var and use instead of
+ ELF_R_SYM macro.
+ (struct alloc_got_off_arg): New.
+ (elf_gc_common_finalize_got_offsets): Use elf_size_info instead of
+ ARCH_SIZE. Pass get entry size down to elf_gc_allocate_got_offsets.
+ (elf_gc_allocate_got_offsets): Adjust.
+ (elf_reloc_symbol_deleted_p): Usee cookie.r_sym_shift instead of
+ ELF_R_SYM. Use bfd_section_from_elf_index.
+ (elf_bfd_discard_info): Set cookie.r_sym_shift.
+ * elfcode.h (elf_stringtab_init, section_from_elf_index): Delete.
+ (elf_slurp_symbol_table): Use bfd_section_from_elf_index.
+
+2004-03-26 Stan Shebs <shebs at apple.com>
+
+ Remove MPW support, no longer used.
+ * config.bfd (powerpc-*-mpw*): Remove configuration.
+ * mpw-config.in, mpw-make.sed: Remove files.
+ * ecoffswap.h [MPW_C]: Remove MPW-C-friendly version of code.
+
+2004-03-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (elf_backend_add_symbol_hook): Define.
+ (ppc64_elf_add_symbol_hook): New function.
+ * elf-bfd.h (struct elf_backend_data <elf_add_symbol_hook>): Remove
+ const from Elf_Internal_Sym param.
+ * elflink.c (elf_link_add_object_symbols): Adjust.
+ * elf-hppa.h (elf_hppa_add_symbol_hook): Adjust.
+ * elf32-frv.c (elf32_frv_add_symbol_hook): Adjust.
+ * elf32-i370.c (elf_backend_add_symbol_hook): Adjust.
+ * elf32-m32r.c (m32r_elf_add_symbol_hook): Adjust.
+ * elf32-m68hc1x.c (elf32_m68hc11_add_symbol_hook): Adjust.
+ * elf32-m68hc1x.h (elf32_m68hc11_add_symbol_hook): Adjust.
+ * elf32-ppc.c (ppc_elf_add_symbol_hook): Adjust.
+ * elf32-sh64.c (sh64_elf_add_symbol_hook): Adjust.
+ * elf32-v850.c (v850_elf_add_symbol_hook): Adjust.
+ * elf64-alpha.c (elf64_alpha_add_symbol_hook): Adjust.
+ * elf64-mmix.c (mmix_elf_add_symbol_hook): Adjust.
+ * elf64-sh64.c (sh64_elf64_add_symbol_hook): Adjust.
+ * elf64-sparc.c (sparc64_elf_add_symbol_hook): Adjust.
+ * elfxx-ia64.c (elfNN_ia64_add_symbol_hook): Adjust.
+ * elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Adjust.
+ * elfxx-mips.h (_bfd_mips_elf_add_symbol_hook): Adjust.
+
+2004-03-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elfxx-target.h (bfd_elfNN_bfd_link_add_symbols): Define.
+ * elf-bfd.h (_bfd_elf_link_add_archive_symbols): Delete.
+ (_bfd_elf_sort_symbol, _bfd_elf_add_dt_needed_tag): Delete.
+ (_bfd_elf_finalize_dynstr, bfd_elf32_bfd_link_add_symbols): Delete.
+ (bfd_elf64_bfd_link_add_symbols): Delete.
+ (bfd_elf_link_add_symbols): Declare.
+ * elfcode.h (elf_bfd_link_add_symbols): Delete.
+ * elflink.c: Include safe-ctype.h.
+ (elf_add_dt_needed_tag): Rename from _bfd_elf_add_dt_needed_tag,
+ make static.
+ (elf_sort_symbol): Rename from _bfd_elf_sort_symbol, make static.
+ (elf_finalize_dynstr): Rename from _bfd_elf_finalize_dynstr, make
+ static.
+ (elf_link_add_archive_symbols): Rename from
+ _bfd_elf_link_add_archive_symbols, make static.
+ (elf_link_add_object_symbols): New function. Corresponding
+ elflink.h function converted to use elf_size_info.
+ (bfd_elf_link_add_symbols): Likewise.
+ (bfd_elf_size_dynamic_sections): Adjust.
+ * elflink.h (elf_bfd_link_add_symbols): Delete.
+ (elf_link_add_object_symbols): Delete.
+ * elf32-gen.c (elf32_generic_link_add_symbols): Call
+ bfd_elf_link_add_symbols.
+ * elf64-gen.c (elf64_generic_link_add_symbols): Likewise.
+
+2004-03-25 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.h (elf_link_add_object_symbols): Add DT_NEEDED for as-needed
+ and chained shared libs only if dynsym. Clear dynsym on forced-local.
+
+ * elf-bfd.h (_bfd_elf_add_dynamic_entry): Declare.
+ (bfd_elf32_add_dynamic_entry, bfd_elf64_add_dynamic_entry): Delete.
+ (_bfd_elf_add_dt_needed_tag): Declare.
+ (_bfd_elf_sort_symbol): Declare.
+ (_bfd_elf_finalize_dynstr): Declare.
+ (RELOC_FOR_GLOBAL_SYM): Formatting.
+ * elfcode.h (elf_add_dynamic_entry): Delete.
+ * elflink.c (_bfd_elf_add_dynamic_entry): New function. Corresponding
+ elflink.h function converted to use elf_size_info.
+ (_bfd_elf_add_dt_needed_tag): Likewise.
+ (_bfd_elf_sort_symbol): Likewise.
+ (_bfd_elf_finalize_dynstr): Likewise.
+ (compute_bucket_count): Likewise.
+ (bfd_elf_size_dynamic_sections): Likewise. Check result of
+ _bfd_elf_strtab_add before calling _bfd_elf_strtab_addref.
+ (elf_adjust_dynstr_offsets, elf_collect_hash_codes): Moved from..
+ * elflink.h: ..here.
+ (sort_symbol, add_dt_needed_tag): Delete.
+ (elf_add_dynamic_entry, elf_finalize_dynstr): Delete.
+ (compute_bucket_count, NAME(bfd_elf,size_dynamic_sections)): Delete.
+ Update all users.
+ * elf32-arm.h (add_dynamic_entry): Update. Remove casts.
+ * elf32-cris.c (add_dynamic_entry): Likewise.
+ * elf32-hppa.c (add_dynamic_entry): Likewise.
+ * elf32-i370.c (add_dynamic_entry): Likewise.
+ * elf32-i386.c (add_dynamic_entry): Likewise.
+ * elf32-m32r.c (add_dynamic_entry): Likewise.
+ * elf32-m68k.c (add_dynamic_entry): Likewise.
+ * elf32-ppc.c (add_dynamic_entry): Likewise.
+ * elf32-s390.c (add_dynamic_entry): Likewise.
+ * elf32-sh.c (add_dynamic_entry): Likewise.
+ * elf32-sparc.c (add_dynamic_entry): Likewise.
+ * elf32-vax.c (add_dynamic_entry): Likewise.
+ * elf32-xtensa.c (add_dynamic_entry): Likewise.
+ * elf64-alpha.c (add_dynamic_entry): Likewise.
+ * elf64-hppa.c (add_dynamic_entry): Likewise.
+ * elf64-ppc.c (add_dynamic_entry): Likewise.
+ * elf64-s390.c (add_dynamic_entry): Likewise.
+ * elf64-sparc.c (add_dynamic_entry): Likewise.
+ * elf64-x86-64.c (add_dynamic_entry): Likewise.
+ * elfxx-ia64.c (add_dynamic_entry): Likewise.
+ * elfxx-mips.c (MIPS_ELF_ADD_DYNAMIC_ENTRY): Likewise.
+ * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Likewise.
+ * elf32-frv.c (elf32_frv_size_dynamic_sections): Likewise.
+ * elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
+
+2004-03-23 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.h (arm_print_private_bfd_data): Add EABI v3.
+
+2004-03-22 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (elf_xtensa_check_relocs): Remove code to read
+ literal tables and check for relocs outside of literal pools.
+ (elf_xtensa_make_sym_local): Don't clear ELF_LINK_NON_GOT_REF flag.
+ (elf_xtensa_fix_refcounts): Don't check ELF_LINK_NON_GOT_REF or
+ set DF_TEXTREL.
+ (elf_xtensa_size_dynamic_sections): Don't add DT_TEXTREL entry.
+ (elf_xtensa_relocate_section): Read literal tables and check for
+ dynamic relocations in read-only sections and not in literal pools.
+
+2004-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ PR 51.
+ * linker.c (bfd_wrapped_link_hash_lookup): Handle info->wrap_char.
+
+2004-03-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * elf32-cris.c (cris_elf_relocate_section) <case R_CRIS_16_GOTPLT,
+ R_CRIS_16_GOTPLT>: Also error if there's no PLT for a symbol
+ not defined by the executable, or defined in a DSO.
+ <eliding run-time relocation of .got>: Initialize GOT entry for a
+ function symbol or ELF_LINK_HASH_NEEDS_PLT statically in an
+ executable.
+ (cris_elf_gc_sweep_hook): Improve fallthrough marking.
+ (elf_cris_try_fold_plt_to_got): Improve head comment. Do not fold
+ a PLT reloc to GOT for an executable.
+ (elf_cris_adjust_dynamic_symbol): Only fold a .got.plt entry with
+ .got for a DSO and explain why.
+ (elf_cris_discard_excess_program_dynamics): Also lose GOT-relocs
+ and unreferenced symbols for which a PLT is defined. Adjust
+ dynamic-symbol pruning correspondingly, to make sure we don't lose
+ a dynamic symbol also defined by a DSO.
+
+2004-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add input_bfd, input_section
+ and rel args. Group input and output args. Wrap to 80 columns.
+ * elf-m10200.c, elf-m10300.c, elf32-arm.h, elf32-avr.c,
+ elf32-cris.c, elf32-d10v.c, elf32-fr30.c, elf32-h8300.c,
+ elf32-hppa.c, elf32-i386.c, elf32-i860.c, elf32-ip2k.c,
+ elf32-iq2000.c, elf32-m68hc1x.c, elf32-m68k.c, elf32-mcore.c,
+ elf32-msp430.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c,
+ elf32-sparc.c, elf32-v850.c, elf32-vax.c, elf32-xstormy16.c,
+ elf32-xtensa.c, elf64-alpha.c, elf64-mmix.c, elf64-ppc.c,
+ elf64-s390.c, elf64-sparc.c, elf64-x86-64.c, elfxx-ia64.c: Update
+ RELOC_FOR_GLOBAL_SYMBOL invocation.
+
+2004-03-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Report error if
+ unresolved symbols in objects aren't allowed.
+
+ * elf-hppa.h (elf_hppa_relocate_section): Properly handle
+ unresolved symbols.
+ (elf_hppa_remark_useless_dynamic_symbols): Likewise.
+ (elf_hppa_unmark_useless_dynamic_symbols):
+ * elf32-frv.c (elf32_frv_relocate_section): Likewise.
+ * elf32-hppa.c (elf32_hppa_size_stubs): Likewise.
+ (elf32_hppa_relocate_section): Likewise.
+ * elf32-i370.c (i370_elf_relocate_section): Likewise.
+ * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
+ * elf32-sh.c (sh_elf_relocate_section): Likewise.
+ * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
+ * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
+
+ * elf-m10200.c (mn10200_elf_relocate_section): Use
+ RELOC_FOR_GLOBAL_SYMBOL.
+ * elf32-avr.c (elf32_avr_relocate_section): Likewise.
+ * elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
+ * elf32-fr30.c (fr30_elf_relocate_section): Likewise.
+ * elf32-h8300.c (elf32_h8_relocate_section): Likewise.
+ * elf32-i860.c (elf32_i860_relocate_section): Likewise.
+ * elf32-m68hc1x.c (m68hc11_get_relocation_value): Likewise.
+ * elf32-mcore.c (mcore_elf_relocate_section): Likewise.
+ * elf32-msp430.c (elf32_msp430_relocate_section): Likewise.
+ * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
+ * elf32-v850.c (v850_elf_relocate_section): Likewise.
+ * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise.
+ * elf64-mmix.c (mmix_elf_relocate_section): Likewise.
+
+2004-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * elf32-hppa.c (elf32_hppa_check_relocs): Handle R_PARISC_PCREL32.
+ (final_link_relocate): Likewise.
+ * elf-hppa.h (elf_hppa_reloc_final_type): Handle selectors for
+ R_PARISC_PCREL32 and R_PARISC_PCREL64 relocations.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * config.in: Regenerate.
+ * po/bfd.pot: Regenerate.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Revert last change. Move
+ type and size change code to where it was previously. Remove
+ dt_needed param. Treat old weak syms as strong if new sym is
+ from a shared lib, even when old sym is from another shared
+ lib. Remove unnecessary tests of oldweak and newweak. Correct
+ comments.
+ (_bfd_elf_add_default_symbol): Remove dt_needed param. Update
+ _bfd_elf_merge_symbol calls.
+ * elflink.h (elf_link_add_object_symbols): Update calls. Remove
+ dt_needed local var. Update comments.
+ * elf-bfd.h (_bfd_elf_merge_symbol): Update prototype.
+ (_bfd_elf_add_default_symbol): Likewise.
+
+ * elflink.c (_bfd_elf_merge_symbol): Reinstate code to handle
+ strong syms in one shared object overriding weak syms in another.
+
+2004-03-18 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_obj_tdata): Delete dt_soname field. Add
+ dyn_lib_class field. Rearrange for better packing.
+ (elf_dt_soname): Delete.
+ (elf_dyn_lib_class): Define.
+ * elf.c (bfd_elf_set_dt_needed_name): Update comment.
+ (bfd_elf_set_dt_needed_soname): Delete.
+ (bfd_elf_set_dyn_lib_class): New function.
+ * elflink.h (add_dt_needed_tag): New function. Split out from..
+ (elf_link_add_object_symbols): ..here. Rename "name" to "soname".
+ Use elf_dyn_lib_class to set dt_needed and add_needed. Move fallback
+ initialization of soname.
+ (elf_link_check_versioned_symbol): Test elf_dyn_lib_class instead of
+ elf_dt_soname.
+ * bfd-in.h (enum dynamic_lib_link_class): New.
+ (bfd_elf_set_dt_needed_soname): Delete.
+ (bfd_elf_set_dyn_lib_class): Declare.
+ * bfd-in2.h: Regenerate.
+
+ * elflink.c (_bfd_elf_merge_symbol): Rewrite weak symbol handling.
+ (_bfd_elf_add_default_symbol): Remove indirect BFD_ASSERTs.
+ * elflink.h (elf_link_add_object_symbols): Don't clear dt_needed in
+ symbol loop. Instead use add_needed to flag tag as written.
+
+2004-03-17 Nathan Sidwell <nathan at codesourcery.com>
+
+ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
+ logic for null_input_bfd detection.
+
+2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
+
+ * config.bfd: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
+
+2004-03-16 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c (netbsd_core_file_p) [CORE_FPU_OFFSET]: Remove
+ code.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_read_relocs_from_section): Don't use
+ NUM_SHDR_ENTRIES in end of reloc calc. Move NULL shdr check..
+ (_bfd_elf_link_read_relocs): ..to here.
+ * elf32-ppc.c (ppc_elf_relax_section): Formatting.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * configure.in (HOST_64BIT_TYPE, HOST_U_64BIT_TYPE): Don't override
+ values selected in configure.host. Require both to be defined
+ before setting BFD_HOST_64_BIT_DEFINED. Protect assignment to
+ corresponding BFD_HOST vars with quotes.
+ <${host64}-${target64}-${want64} in *true*>: Don't exempt gcc;
+ Always require BFD_HOST_64_BIT_DEFINED.
+ <file_ptr type>: Find off_t size before emitting message. Combine
+ off_t and ftello64 conditional.
+ * configure: Regenerate.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-m32r.c (m32r_elf_create_dynamic_sections): Fix pointer
+ aliasing warning. Remove trailing whitespace throughout file.
+
+2004-03-15 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * elf-hppa.h (elf_hppa_relocate_section): Pass input_bfd instead of
+ input_section in calls to get_dyn_name.
+ * elf64-hppa.c (get_dyn_name): Change type of first argument to "bfd *". Use section id of first section in input BFD to build dynamic name for
+ local symbols.
+ (elf64_hppa_check_relocs): Pass abfd in call to get_dyn_name.
+
+2004-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (bfd_int64_t, bfd_uint64_t): New types.
+ (BFD_HOST_64_BIT, BFD_HOST_U_64_BIT): Don't define here.
+ (bfd_getb64, bfd_getl64, bfd_get_bits): Return bfd_uint64_t.
+ (bfd_getb_signed_64, bfd_getl_signed_64): Return bfd_int64_t.
+ (bfd_putb64, bfd_putl64, bfd_put_bits): Accept bfd_uint64_t.
+ * configure.in (HOST_U_64BIT_TYPE): Set when sizeof long is 8.
+ (BFD_HOST_64_BIT_DEFINED, BFD_HOST_64_BIT, BFD_HOST_U_64_BIT): Set
+ when using long.
+ * libbfd.c (EIGHT_GAZILLION, COERCE64): Use bfd_int64_t.
+ (bfd_getb64): Return bfd_uint64_t. Enable when BFD_HOST_64_BIT.
+ (bfd_getl64, bfd_getb_signed_64, bfd_getl_signed_64): Likewise.
+ (bfd_putb64): Accept bfd_uint64_t. Enable when BFD_HOST_64_BIT.
+ (bfd_putl64, bfd_put_bits, bfd_get_bits): Likewise.
+ * dwarf2.c (struct attribute): Use bfd_int64_t and bfd_uint64_t.
+ (read_8_bytes, read_indirect_string, read_address): Likewise.
+ (read_abbrevs, parse_comp_unit): Likewise.
+ * targets.c (struct bfd_target): Likewise.
+ * aix386-core.c (NO_GET64, NO_PUT64, NO_GETS64): Define and use.
+ * hppabsd-core.c: Likewise. Formatting.
+ * hpux-core.c: Likewise.
+ * irix-core.c: Likewise.
+ * netbsd-core.c: Likewise.
+ * osf-core.c: Likewise.
+ * ptrace-core.c: Likewise.
+ * sco5-core.c: Likewise.
+ * trad-core.c: Likewise.
+ * configure: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+2004-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (bfd_getb64, bfd_getl64): Replace bfd_byte* with void*.
+ (bfd_getb32, bfd_getl32, bfd_getb16, bfd_getl16): Likewise.
+ (bfd_getb_signed_64, bfd_getl_signed_64): Likewise.
+ (bfd_getb_signed_32, bfd_getl_signed_32): Likewise.
+ (bfd_getb_signed_16, bfd_getl_signed_16): Likewise.
+ (bfd_putb64, bfd_putl64, bfd_putb32, bfd_putl32): Likewise.
+ (bfd_putb16, bfd_putl16, bfd_get_bits, bfd_put_bits): Likewise.
+ * libbfd.c: Likewise in function definitions.
+ (bfd_put_8): Mask with 0xff rather than casting to char.
+ (bfd_putb16, bfd_putl16, bfd_putb32, bfd_putl32): Likewise.
+ (bfd_putb64, bfd_putl64, bfd_put_bits): Likewise.
+ (H_PUT_64, H_PUT_32, H_PUT_16, H_PUT_8): Remove casts, simplify.
+ (H_PUT_S64, H_PUT_S32, H_PUT_S16, H_PUT_S8): Likewise.
+ (H_GET_64, H_GET_32, H_GET_16, H_GET_8): Likewise.
+ (H_GET_S64, H_GET_S32, H_GET_S16, H_GET_S8): Likewise.
+ * libaout.h (H_PUT_64 H_PUT_32, H_PUT_16): Remove casts, simplify.
+ (H_PUT_S64, H_PUT_S32, H_PUT_S16): Likewise.
+ (H_GET_64, H_GET_32, H_GET_16): Likewise.
+ (H_GET_S64, H_GET_S32, H_GET_S16): Likewise.
+ * archive.c (do_slurp_coff_armap): Update swap prototype.
+ * coff-tic54x.c (tic54x_getl32): Replace bfd_byte* with void*.
+ (tic54x_getl_signed_32): Likewise.
+ (tic54x_putl32): Likewise. Mask with 0xff rather than casting to char.
+ * mach-o.c (bfd_mach_o_read_header): Update get32 prototype.
+ * pdp11.c (bfd_getp32): Make static, replace bfd_byte* with void*.
+ (bfd_getp_signed_32, bfd_putp32): Likewise.
+ * targets.c (struct bfd_target): Use void* in place of bfd_byte* for
+ bfd_getx64, bfd_getx_signed_64, bfd_putx64, bfd_getx32,
+ bfd_getx_signed_32, bfd_putx32, bfd_getx16, bfd_getx_signed_16,
+ bfd_putx16, bfd_h_getx64, bfd_h_getx_signed_64, bfd_h_putx64,
+ bfd_h_getx32, bfd_h_getx_signed_32, bfd_h_putx32, bfd_h_getx16,
+ bfd_h_getx_signed_16, bfd_h_putx16.
+ * aix386-core.c (NO_GET, NO_GETS, NO_PUT): Update prototypes.
+ * hppabsd-core.c: Similarly. Rename NO_SIGNED_GET to NO_GETS.
+ * hpux-core.c: Likewise.
+ * irix-core.c: Likewise.
+ * netbsd-core.c: Likewise.
+ * osf-core.c: Likewise.
+ * ptrace-core.c: Likewise.
+ * sco5-core.c: Likewise.
+ * trad-core.c: Likewise.
+ * bfd-in2.h: Regenerate.
+
+2004-03-15 Matt Thomas <matt at 3am-software.com>
+
+ * config.bfd: Add x86-64 vector to NetBSD/i386 if 64bit BFD is
+ selected.
+
+2004-03-13 Mark Kettenis <kettenis at gnu.org>
+
+ * config.bfd: Add x86_64-*-openbsd*.
+ * configure.in (x86_64-*-openbsd*): Set COREFILE to
+ netbsd-core.lo.
+ * configure: Regenerate.
+
+2004-03-12 Nick Clifton <nickc at redhat.com>
+ Dave Murphy <wintermute2k4 at ntlworld.com>
+
+ * elf32-arm.h (elf32_arm_merge_private_bfd_data): Skip most checks
+ if the input bfd does not contain any code.
+
+2004-03-09 Steve Ellcey <sje at cup.hp.com>
+
+ * elfxx-ia64.c (plt_full_entry): Change ld8 to ld8.acq.
+
+2004-03-05 Fred Fish <fnf at redhat.com>
+
+ * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_symbol): Just force
+ mips16 symbols to be even rather than testing first for even/odd.
+ (_bfd_mips_elf_link_output_symbol_hook): Ditto.
+
+2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
+
+ * elf.c (map_sections_to_segments): Ignore .tbss sections for
+ layout purposes.
+
+2004-03-03 Alexandre Oliva <aoliva at redhat.com>
+
+ * elflink.c (bfd_elf_record_link_assignment): Mark undefweak and
+ undefined symbols as hash_new.
+
+2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * archures.c: Add bfd_mach_sh4_nommu_nofpu.
+ * cpu-sh.c: Ditto.
+ * elf32-sh.c: Ditto.
+ * bfd-in2.h: Regenerate.
+
+2004-03-02 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (struct frv_pic_relocs_info): Added fixups and
+ dynrelocs.
+ (_frv_count_got_plt_entries): Initialize them.
+ (frv_pic_relocs_info_find): Add insert argument. Adjust all
+ callers.
+ (frv_pic_relocs_info_for_global): Likewise.
+ (frv_pic_relocs_info_for_local): Likewise.
+ (frv_pic_merge_early_relocs_info): New.
+ (_frv_resolve_final_relocs_info): Use it in case one entry maps to
+ another.
+ (_frv_add_dyn_reloc): Add entry argument. Adjust all callers.
+ Check that we don't exceed the allocated count for entry.
+ (_frv_add_rofixup): Likewise.
+ (_frv_emit_got_relocs_plt_entries): Adjust for coding standards.
+ (elf32_frv_finish_dynamic_sections): Improve error message in case
+ we emit too few rofixup entries.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * archures.c (bfd_mach_fr450): New.
+ * bfd-in2.h: Regenerate.
+ * cpu-frv.c (arch_info_450): New bfd_arch_info_type.
+ (arch_info_500): Link to it.
+ * elf32-frv.c (elf32_frv_machine, frv_elf_merge_private_bfd_data)
+ (frv_elf_print_private_bfd_data): Handle fr405 and fr450 header flags.
+ (frv_elf_arch_extension_p): New function.
+ (frv_elf_merge_private_bfd_data): Use it.
+
+2004-02-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (_bfd_elf_link_add_archive_symbols): New prototype.
+
+ * elflink.h (is_global_data_symbol_definition): Moved to
+ elflink.c.
+ (elf_link_is_defined_archive_symbol): Likewise.
+ (elf_link_add_archive_symbols): Likewise. Renamed to
+ _bfd_elf_link_add_archive_symbols.
+
+ * elflink.c (elf_link_is_defined_archive_symbol): Get the size
+ of ELF symbol table entry from backend.
+ (_bfd_elf_link_add_archive_symbols): Call bfd_link_add_symbols
+ instead of elf_link_add_object_symbols.
+
+2004-02-27 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf-bfd.h (struct elf_backend_data): Added
+ elf_backend_can_make_relative_eh_frame,
+ elf_backend_can_make_lsda_relative_eh_frame and
+ elf_backend_encode_eh_address.
+ (_bfd_elf_encode_eh_address): Declare.
+ (_bfd_elf_can_make_relative): Declare.
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Use new
+ hooks to decide whether to attempt to make_relative and
+ make_lsda_relative.
+ (_bfd_elf_write_section_eh_frame_hdr): Call encode_eh_address.
+ (_bfd_elf_can_make_relative): New.
+ (_bfd_elf_encode_eh_address): New.
+ * elf32-frv.c (frv_elf_use_relative_eh_frame): New.
+ (frv_elf_encode_eh_address): New.
+ (elf_backend_can_make_relative_eh_frame): Define.
+ (elf_backend_can_make_lsda_relative_eh_frame): Define.
+ (elf_backend_encode_eh_address): Define.
+ * elfxx-target.h
+ (elf_backend_can_make_relative_eh_frame): Define.
+ (elf_backend_can_make_lsda_relative_eh_frame): Define.
+ (elf_backend_encode_eh_address): Define.
+ (elfNN_bed): Add them.
+
+2004-02-27 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (elf32_frv_howto_table) <R_FRV_LABEL16>: Set
+ complain_on_overflow to signed.
+
+2004-02-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.h (sort_symbol): New.
+ (elf_link_add_object_symbols): Use a sorted symbol array for
+ weakdef.
+
+2004-02-27 Jakub Jelinek <jakub at redhat.com>
+
+ * elf32-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL
+ for pc relative relocs.
+ (elf_s390_relocate_section): Likewise.
+ * elf64-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL
+ for pc relative relocs.
+ (elf_s390_relocate_section): Likewise.
+
+2004-02-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_check_relocs): Fix call to
+ count_dyn_reloc.
+
+2004-02-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_dyn_reloc_entry): Add the reltext.
+ field to track if a relocation is against readonly section.
+ (count_dyn_reloc): Take a new argument for rent->reltext.
+ (elfNN_ia64_check_relocs): Adjust call to count_dyn_reloc.
+ (get_reloc_section): Don't set ia64_info->reltext here.
+ (allocate_dynrel_entries): Set ia64_info->reltext here.
+
+2004-02-24 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (FRV_SYM_LOCAL): Weak undefined doesn't imply local.
+ (_frv_emit_got_relocs_plt_entries): Decay relocation to protected
+ function's descriptor to symbol+offset, and map local undefweak
+ symbol to NULL function descriptor.
+ (elf32_frv_relocate_section): Likewise.
+
+2004-02-23 Mark Kettenis <kettenis at gnu.org>
+
+ * libaout.h (enum machine_type): Add M_SPARC64_NETBSD and
+ M_X86_64_NETBSD.
+ * netbsd-core.c (M_SPARC64_OPENBSD): Define.
+ (netbsd_core_file_p): Set architecture from machine ID for
+ selected machines.
+
+2004-02-23 Jakub Jelinek <jakub at redhat.com>
+
+ * elflink.h (size_dynamic_sections): If not adding DT_FLAGS and
+ DF_BIND_NOW is set in info->flags, create DT_BIND_NOW dynamic entry.
+
+2004-02-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Properly handle undefined
+ symbols with non-default visibility.
+
+2004-02-21 Danny Smith <daanysmith at users.sourceforge.net>
+
+ * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Clear
+ IMAGE_SCN_MEM_WRITE on known sections only.
+
+2004-02-20 Jakub Jelinek <jakub at redhat.com>
+
+ * elf32-ppc.c (allocate_dynrelocs): Create dynsym for undef weak
+ symbols used in PIE relocs.
+
+2004-02-19 Jakub Jelinek <jakub at redhat.com>
+
+ * elf32-sparc.c (elf32_sparc_finish_dynamic_sections): Clear
+ .plt sh_entsize.
+
+2004-02-18 Daniel Jacobowitz <drow at mvista.com>
+
+ * configure.in: Update version to 2.15.90.
+ * configure: Regenerate.
+
+2004-02-17 Daniel Jacobowitz <drow at mvista.com>
+ Richard Sandiford <rsandifo at redhat.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Use
+ _bfd_elf_symbol_refs_local_p to decide whether to decay
+ a GOT_PAGE/GOT_OFST pair to GOT_DISP/addend.
+ (_bfd_mips_elf_check_relocs): Add a global GOT entry for GOT_PAGE
+ relocs if the symbol wasn't defined by a regular object file.
+ Don't check the symbol's dynindx.
+
+2004-02-16 Andrew Cagney <cagney at redhat.com>
+
+ * bfd-in.h (file_ptr, ufile_ptr): Configure type using
+ @bfd_file_ptr at .
+ * bfd-in2.h: Re-generate.
+
+2004-02-14 Andrew Cagney <cagney at redhat.com>
+
+ * configure.host (HDEFINES): When hppa*-*-hpux*, define
+ _LARGEFILE64_SOURCE.
+
+2004-02-13 Andrew Cagney <cagney at redhat.com>
+
+ * elf.c (vma_page_aligned_bias): New function.
+ (assign_file_positions_except_relocs)
+ (assign_file_positions_for_segments): Replace broken modulo
+ arithmetic with call to vma_page_aligned_bias.
+
+2004-02-11 Andrew Cagney <cagney at redhat.com>
+
+ * bfd-in.h: Update copyright.
+ (bfd_tell): Change return type to file_ptr.
+ * bfd-in2.h: Re-generate.
+ * cache.c: Update copyright.
+ (bfd_cache_lookup_worker): Use real_fseek, do not cast offset
+ parameter.
+ (close_one): Use real_ftell.
+ * bfdio.c: Update copyright.
+ (real_ftell, real_fseek): New functions.
+ (bfd_tell): Use real_fseek and real_ftell, change return type to
+ file_ptr.
+ (bfd_seek): Use real_ftell and real_fseek, change type of
+ file_position to a file_ptr.
+ * libbfd-in.h: Update copyright.
+ (real_ftell, real_fseek): Declare.
+ * libbfd.h: Re-generate.
+
+ * configure.in (AC_CHECK_FUNCS): Check for ftello, ftello64,
+ fseeko and fseeko64. Determine bfd_file_ptr.
+ * configure: Re-generate.
+ * config.in: Re-generate.
+
+2004-02-09 Anil Paranjpe <anilp1 at KPITCummins.com>
+
+ * coff-h8300.c: Added comments about relaxation for ldc.w and stc.w.
+ * elf32-h8300.c: Likewise.
+
+2004-02-09 Christian Vogel <vogelchr at vogel.cx>
+ Nick Clifton <nickc at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_calc_got_offsets_for_symbol): Catch
+ GOT entries with no associated GOT subsection.
+
+2004-02-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * bfd-elf.h (elf_backend_name_local_section_symbols): New hook.
+ * elf.c (swap_out_syms): Use it to decide whether local section
+ symbols should be named.
+ * elfxx-target.h (elf_backend_name_local_section_symbols): New macro.
+ * elfxx-mips.h (_bfd_mips_elf_name_local_section_symbols): Declare.
+ (elf_backend_name_local_section_symbols): Define.
+ * elfxx-mips.c (_bfd_mips_elf_name_local_section_symbols): New.
+
+2004-01-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_brl): New function.
+ (elfNN_ia64_relax_section): Optimize brl to br during the relax
+ finalize pass.
+
+2004-01-30 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (elf32_frv_always_size_sections): Initialize pointer
+ to bfd_link_hash_entry passed by reference to
+ _bfd_generic_link_add_one_symbol.
+
+2004-01-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Disallow imm
+ relocations against dynamic symbols.
+
+2004-01-23 Daniel Jacobowitz <drow at mvista.com>
+
+ * elf32-arm.h (elf32_arm_check_relocs): Revert part of 2004-01-13
+ change.
+
+2004-01-21 Tom Rix <tcrix at worldnet.att.net>
+
+ * reloc.c: New 5 bit reloc, BFD_RELOC_M68HC12_5B, for m68hc12 movb/movw.
+ * bfd-in2.h, libbfd.h: Rebuilt.
+
+2004-01-20 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Don't remove
+ IMAGE_SCN_MEM_WRITE flag from .text section if WP_TEXT
+ flag has been cleared.
+
+2004-01-19 Kazu Hirata <kazu at cs.umass.edu>
+
+ * coff-h8300.c: Add and adjust comments about relaxation.
+ * elf32-h8300.c: Likewise.
+
+2004-01-16 Kazu Hirata <kazu at cs.umass.edu>
+
+ * coff-h8300.c: Fix comment typos.
+ * elf32-h8300.c: Likewise.
+
+2004-01-16 Kazu Hirata <kazu at cs.umass.edu>
+
+ * coff-h8300.c: Add comments about relaxation.
+ * elf32-h8300.c: Likewise.
+
+2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
+ throughout.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2004-01-13 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * elf64-mips.c (mips_elf64_slurp_one_reloc_table): Call
+ mips_elf64_rtype_to_howto instead of using howto_table.
+
+2004-01-13 Daniel Jacobowitz <drow at mvista.com>
+
+ * elf32-arm.h (elf32_arm_final_link_relocate): Check that we created
+ the .plt section.
+ (elf32_arm_check_relocs): Don't increment the PLT refcount for
+ relocs which would not use the PLT.
+
+2004-01-13 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_check_relocs): Ignore !SEC_ALLOC relocs.
+ (ppc64_elf_gc_sweep_hook): Likewise.
+ (ppc64_elf_size_dynamic_sections): Test for .plt directly.
+
+2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
+
+ Adds linker relaxation support for bit manipulation insns like
+ band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset,
+ bst, btst, bxor.
+ * elf32-h8300.c: Opcode for bit manipulation insn is checked in
+ elf32_h8_relax_section function while relxation for aa:16 and aa:32.
+ * coff-h8300.c: Opcode for bit manipulation insn is checked in
+ h8300_reloc16_extra_cases function while relxation for aa:16 and aa:32.
+
+2004-01-12 Alan Modra <amodra at bigpond.net.au>
+
+ * dwarf2.c: Convert to C90, remove unneeded casts and prototypes.
+
+2004-01-11 Kazu Hirata <kazu at cs.umass.edu>
+
+ * elf32-h8300.c: Fix formatting.
+
+2004-01-11 Kazu Hirata <kazu at cs.umass.edu>
+
+ * elf32-cris.c (cris_elf_gc_sweep_hook): Return early if no
+ dynamic object is present. Declare r_symndx and h in an inner
+ scope.
+ * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise.
+
+2004-01-09 Daniel Jacobowitz <drow at mvista.com>
+
+ * elf32-arm.h (struct elf32_arm_relocs_copied): Remove pc_count.
+ (elf32_arm_copy_indirect_symbol): Don't copy pc_count.
+ (elf32_arm_final_link_relocate): Handle PLT32 and PC24 relocs
+ identically. Do not emit PC24 relocations for shared libraries.
+ (elf32_arm_gc_sweep_hook): Handle PLT32 and PC24 relocs
+ identically. Don't adjust pc_count.
+ (elf32_arm_check_relocs): Handle PLT32 and PC24 relocs identically.
+ Set ELF_LINK_HASH_NEEDS_PLT for both. Don't adjust pc_count; don't
+ adjust count for branch relocations.
+ (allocate_dynrelocs): Correct typo in call to
+ WILL_CALL_FINISH_DYNAMIC_SYMBOL. Never allocate space for
+ PC24 or PLT32 relocs when linking.
+
+2004-01-09 Dmitry Semyonov <Dmitry.Semyonov at oktet.ru>
+
+ * coff-arm.c (aoutarm_std_reloc_howto): [ARM_WINCE] Synchronize ARM_26D
+ relocation howto with ARM_26 one for consistency.
+ (coff_arm_relocate_section): Set partial_inplace for ARM_26 relocations
+ that will be converted to ARM_26D ones, since we always want 'done'
+ relocations to be reflected in section's data.
+ (coff_arm_relocate_section): [ARM_WINCE] Quick fix for BL instruction
+ offset.
+ (_bfd_final_link_relocate): Do not modify "inplace" data, if not
+ requested.
+
+2004-01-08 Dmitry Semyonov <Dmitry.Semyonov at oktet.ru>
+
+ * coff-arm.c (coff_arm_relocate_section): Do not alter relocs that
+ are not partial_inplace during a relocatable link.
+
+2004-01-08 Kazu Hirata <kazu at cs.umass.edu>
+
+ * elf32-m68k.c (elf_m68k_gc_sweep_hook): Return early
+ if no dynamic object is present. Declare r_symndx and h in an
+ inner scope.
+
+2004-01-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Don't install
+ trampoline if it is known out of range.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-12-17 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (_frv_osec_readonly_p): New.
+ (_frv_emit_got_relocs_plt_entries): Don't emit rofixup for
+ undefweak symbol.
+ (_frv_count_got_plt_entries): Adjust expected count accordingly.
+ (elf32_frv_relocate_section): Likewise. Error out if attempting
+ to emit rofixups or dynamic relocs in read-only segments. Use
+ _bfd_elf_section_offset to adjust r_offsets in rofixups and
+ dynamic relocations.
+ 2003-12-12 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_relocate_section): Compute dynamic
+ relocations or fixups involving merged sections correctly. Avoid
+ crash when undefined symbol is referenced by R_FRV_32 or
+ R_FRV_FUNCDESC_VALUE.
+ 2003-12-02 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_relocate_section): Add output_offset of
+ input section holding local symbol to addend of R_FRV_32 or
+ R_FRV_FUNCDESC_VALUE dynamic relocation.
+ 2003-11-27 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_modify_segment_map): Add link info arg.
+ (elf32_frv_always_size_sections): Don't store pointer to
+ __stacksize symbol in sec_info.
+ (elf32_frv_modify_segment_map): Look it up here.
+ 2003-11-26 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Emit the address
+ of the lazy PLT entry, not only its offset, as the low word of a
+ function descriptor.
+ 2003-11-10 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_always_size_sections): Define __stacksize
+ if a hash table entry already exists but is not a definition.
+ 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (frv_elf_link_hash_table_create): Use bfd_zalloc.
+ (_frv_add_rofixup): Don't inline.
+ (_frv_emit_got_relocs_plt_entries): Use NULL as funcdesc address
+ for undefweak symbols.
+ (elf32_frv_relocate_section): Avoid crash while computing
+ relocation when linking with shared library. Only emit rofixups
+ and dynamic relocations for alloc&load sections. Mark binaries
+ with inter-segment relocations for relocation as a unit.
+ (_frv_create_got_section): Rename .rofixup.got to .rofixup.
+ (DEFAULT_STACK_SIZE): New.
+ (_frv_count_got_plt_entries): Fix thinko in deciding whether to
+ emit rofixups or dynamic relocs when linking dynamic non-PIE
+ executables.
+ (elf32_frv_size_dynamic_sections): Generate rofixup on PIEs and
+ shared libs too. Reserve the last entry for the GOT pointer.
+ (elf32_frv_finish_dynamic_sections): Emit it.
+ (elf32_frv_always_size_sections): New.
+ (elf32_frv_modify_segment_map): New.
+ (elf32_frv_check_relocs): Reserve relocs32 space only in ALLOC
+ sections.
+ (frv_elf_merge_private_bfd_data): Clear PIC bit if FDPIC is set.
+ (frv_elf_print_private_bfd_data): Handle FDPIC and LIBPIC.
+ (elf_backend_always_size_sections): New.
+ (elf_backend_modify_segment_map): New.
+ 2003-10-31 Alexandre Oliva <aoliva at redhat.com>
+ * config.bfd: Added frv-*-*linux*.
+ * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Use idx 0 for
+ ABS section, instead of crashing.
+ (elf32_frv_relocate_section): Don't crash before warning about
+ different segments in non-PIC relocation.
+ 2003-10-17 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_relocate_section): Don't warn on LABEL24
+ relocs to undefweak symbols.
+ (elf32_frv_relocate_section): Ditto for undefined symbols.
+ 2003-10-06 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_create_dynamic_sections): Make sure
+ gotfixup section was created.
+ 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_howto_table): Change GOT12,
+ FUNCDESC_GOT12, GOTOFF12 and FUNCDESC_GOTOFF12 to
+ complain_overflow_signed.
+ * elf32-frv.c (_frv_add_rofixup): Do not error out if contents
+ have not been allocated.
+ (_frv_emit_got_relocs_plt_entries): Return non-void. Assert
+ privfd only if dynamic sections were created.
+ (elf32_frv_relocate_section): Compute gprel_segment, and use it
+ for GPREL relocs. When linking relocatable FDPIC executables,
+ emit warnings for relocations that would be illegal on PIE or
+ shared libraries. Emit rofixup for R_FRV_32 only if input object
+ is not FDPIC.
+ (_frv_create_got_section): Define _gp symbol in the rofixup
+ section.
+ (elf32_frv_finish_dynamic_sections): If rofixups needed but
+ dynamic sections missing, error out requesting -melf32frvfd.
+ 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Rearrange
+ computation of addends from section and global or local symbol
+ value. Change return type to bfd_boolean, and return a failure if
+ a dynamic FUNCDESC or FUNCDESC_VALUE relocation that requires a
+ nonzero addend is required.
+ (elf32_frv_relocate_section): Likewise. Print error for
+ unsupported nonzero addends.
+ 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (FRV_SYM_LOCAL): In the absence of dynamic sections,
+ force everything local.
+ (_frv_emit_got_relocs_plt_entries): Cope with NULL sec.
+ * elf32-frv.c (struct frv_elf_link_hash_table): Added sgotfixup.
+ (frv_gotfixup_section): New.
+ (FRV_SYM_LOCAL): Accept undefweak and local common symbols.
+ (struct frv_pic_relocs_info): Split relocs into relocs32, relocsfd
+ and relocsfdv.
+ (_frv_add_rofixup): New.
+ (_frv_emit_got_relocs_plt_entries): Generate fixups for non-PIE
+ fdpic executables. Use FRV_SYM_LOCAL more widely to simplify and
+ improve some ugly conditions.
+ (elf32_frv_relocate_section): Likewise. Reject inter-segment
+ relocations in fdpic.
+ (_frv_create_got_section): Create .rofixup.got section.
+ (struct _frv_dynamic_got_info): Added fixups.
+ (_frv_count_got_plt_entries): Account in-GOT relocations into
+ relocs32, relocsfd and relocsfdv. Account them into relocs or
+ fixups, as appropriate.
+ (elf32_frv_size_dynamic_sections): Size rofixup section. Simplify
+ sizing of gotrel.
+ (elf32_frv_finish_dynamic_sections): Verify that the right number
+ of relocations and fixups was generated.
+ (elf32_frv_check_relocs): Compute relocs32, relocsfd and
+ relocsfdv.
+ * elf32-frv.c (FRV_SYM_LOCAL): New macro, used instead of
+ SYMBOL_CALLS_LOCAL and SYMBOL_REFERENCES_LOCAL.
+ (FRV_FUNCDESC_LOCAL): New macro, used to decide whether a function
+ descriptor of a (formerly-)global symbol is local.
+ (struct frv_pic_relocs_info): Adjust comments.
+ (_frv_emit_got_relocs_plt_entries): Adjust.
+ (elf32_frv_relocate_section): Likewise.
+ (_frv_count_got_plt_entries): Likewise.
+ * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Don't add global
+ symbol's value to addend in the common preamble. Decay dynamic
+ symbols to section+offset if they bind or call locally, for GOT
+ and FUNCDESC_VALUE, respectively.
+ (elf32_frv_relocate_section): Likewise.
+ (elf32_frv_check_relocs): Don't register as dynamic symbols of
+ internal or hidden visibility.
+ 2003-09-17 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (_frv_emit_got_relocs_plt_entries): Get addend as
+ argument, so as to not call _bfd_elf_rel_local_sym to compute it.
+ (elf32_frv_relocate_section): Pass relocation addend in. Use
+ original relocation addend to look up the got relocs/plt entries
+ table. Do not call _bfd_elf_rel_local_sym. Don't error out when
+ processing relocations that reference .scommon symbols.
+ 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
+ Introduce support for dynamic linking.
+ * elf32-frv.c (R_FRV_FUNCDESC_VALUE): Mark it as 64 bits.
+ (elf32_frv_rel_32_howto, elf32_frv_rel_funcdesc_howto,
+ elf32_frv_rel_funcdesc_value_howto): New REL descriptors.
+ (frv_reloc_type_lookup): Return REL howtos for executables and
+ dynamic libraries.
+ (frv_info_to_howto_rel): New.
+ (struct frv_elf_link_hash_table): New.
+ (frv_hash_table, frv_got_section, frv_gotrel_section,
+ frv_plt_section, frv_pltrel_section, frv_relocs_info,
+ frv_got_initial_offset, frv_plt_initial_offset): New macros.
+ (frv_elf_link_hash_table_create): New.
+ (struct frv_pic_relocs_info): New.
+ (frv_pic_relocs_info_hash, frv_pic_relocs_info_eq): New.
+ (frv_pic_relocs_info_find): New.
+ (frv_pic_relocs_info_for_global, frv_pic_relocs_info_for_local):
+ New.
+ (FRV_LZPLT_BLOCK_SIZE, FRV_LZPLT_RESOLVE_LOC): New.
+ (_frv_add_dyn_reloc, _frv_osec_to_segment): New.
+ (_frv_emit_got_relocs_plt_entries): New.
+ (elf32_frv_relocate_section): Add support for dynamic linking.
+ Handle new relocations.
+ (_frv_create_got_section): New.
+ (elf32_frv_create_dynamic_sections): New.
+ (ELF_DYNAMIC_INTERPRETER): New.
+ (struct _frv_dynamic_got_info): New.
+ (_frv_count_got_plt_entries): New.
+ (struct _frv_dynamic_got_plt_info): New.
+ (_frv_compute_got_alloc_data): New.
+ (_frv_get_got_entry, _frv_get_fd_entry): New.
+ (_frv_assign_got_entries, _frv_assign_plt_entries): New.
+ (_frv_resolve_final_relocs_info): New.
+ (elf32_frv_size_dynamic_sections): New.
+ (elf32_frv_finish_dynamic_sections): New.
+ (elf32_frv_adjust_dynamic_symbol): New.
+ (elf32_frv_finish_dynamic_symbol): New.
+ (elf32_frv_check_relocs): Handle new relocs. Explain how the
+ whole thing works.
+ (elf_info_to_howto_rel): Define.
+ (bfd_elf32_bfd_link_hash_table_create): Define.
+ (elf_backend_create_dynamic_sections): Define.
+ (elf_backend_adjust_dynamic_symbol): Define.
+ (elf_backend_size_dynamic_sections): Define.
+ (elf_backend_finish_dynamic_symbol): Define.
+ (elf_backend_finish_dynamic_sections): Define.
+ (elf_backend_want_got_sym): Define.
+ (elf_backend_got_header_size): Define.
+ (elf_backend_want_got_plt): Define.
+ (elf_backend_plt_readonly): Define.
+ (elf_backend_want_plt_sym): Define.
+ (elf_backend_plt_header_size): Define.
+ (elf_backend_may_use_rel_p): Define.
+ (elf_backend_may_use_rela_p): Define.
+ (elf_backend_default_use_rela_p): Define.
+ 2003-08-08 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (R_FRV_FUNCDESC_VALUE, R_FRV_FUNCDESC_GOTOFF12,
+ R_FRV_FUNCDESC_GOTOFFHI, R_FRV_FUNCDESC_GOTOFFLO, R_FRV_GOTOFF12,
+ R_FRV_GOTOFFHI, R_FRV_GOTOFFLO): New.
+ (frv_reloc_map): Map the corresponding BFD relocs to them.
+ (frv_reloc_type_lookup): ... and back to BFD relocs.
+ * reloc.c: New relocs.
+ * bfd-in2.h, libbfd.h: Rebuilt.
+ 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (R_FRV_GOT12, R_FRV_GOTHI, R_FRV_GOTLO,
+ R_FRV_FUNCDESC, R_FRV_FUNCDESC_GOT12, R_FRV_FUNCDESC_GOTHI,
+ R_FRV_FUNCDESC_GOTLO): New.
+ (frv_reloc_map): Map the corresponding BFD relocs to them.
+ (frv_reloc_type_lookup): ... and back to BFD relocs.
+ * reloc.c: New relocs.
+ * bfd-in2.h, libbfd.h: Rebuilt.
+
+2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * elf32-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
+ targets to support pages of up to 64kB.
+ (elf32_bed): Redefine to get a separate backend data structure for
+ traditional targets.
+ * elf64-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
+ targets to support pages of up to 64kB.
+ (elf64_bed): Redefine to get a separate backend data structure for
+ traditional targets.
+ * elfn32-mips.c (ELF_MAXPAGESIZE): Redefine for traditional
+ targets to support pages of up to 64kB.
+ (elf32_bed): Redefine to get a separate backend data structure for
+ traditional targets.
+
+2004-01-04 Mark Kettenis <kettenis at gnu.org>
+
+ * elf32-sparc.c (elf32_sparc_grok_psinfo): New function.
+
+2004-01-02 Mark Kettenis <kettenis at gnu.org>
+
+ * elf32-i386.c (elf_i386_grok_prstatus): Add support for FreeBSD.
+ (elf_i386_grok_psinfo): Likewise.
+
+2004-01-02 Bernardo Innocenti <bernie at develer.com>
+
+ * config.bfd: Add m68k-uClinux target.
+
+2004-01-01 Grant Edwards <grante at visi.com>
+
+ * elflink.h (elf_gc_sections): Warn when gc-sections option is ignored.
+ * elf32-h8300.c (elf32_h8_gc_mark_hook): New function.
+ (elf32_h8_gc_sweep_hook): New function.
+ (elf_backend_gc_mark_hook): Define.
+ (elf_backend_gc_sweep_hook): Define.
+ (elf_backend_can_gc_sections): Define.
+
+For older changes see ChangeLog-0203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/bfd/ChangeLog-2005
===================================================================
--- branches/binutils/package/bfd/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5269 @@
+2005-12-31 Valeriy E. Ushakov <uwe at NetBSD.org>
+ Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * elf32-sh.c (sh_elf_relocate_section): Don't reset relocation
+ for R_SH_REL32 in shared objects if the symbol is locally called.
+
+2005-12-31 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_relocate_section): Adjust relocs against
+ opd section sym when opd has been edited. Use correct addend
+ when determining branch 'y' bit and branch overflow. Adjust and
+ save opd relocs for ld -r too.
+
+2005-12-30 Eric Christopher <echristo at apple.com>
+
+ * elfxx-mips.c (mips_elf_record_global_got_symbol): Add assert
+ to verify we have a got.
+ (_bfd_mips_elf_check_relocs): Add R_MIPS_TLS_GOTTPREL to relocs
+ needing a GOT.
+
+2005-12-30 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * configure.host (hppa*64*-*-hpux*): Set host64 to true.
+
+2005-12-29 Nick Clifton <nickc at redhat.com>
+
+ * hash.c (bfd_hash_set_default_size): Add more entries to the
+ hash_size_primes table.
+
+ * stabs.c (_bfd_link_section_stabs): Use bfd_hash_table_init
+ rather than bfd_hash_table_init_n(...,251) so that the size of the
+ hash table can be controlled by the user.
+
+2005-12-27 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * elf32-hppa.c (elf32_hppa_size_dynamic_sections): Use info->executable
+ instead of !info->shared.
+
+2005-12-27 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * vaxlinux.h: New file. (TRAD_CORE_EXTRA_SIZE_ALLOWED): Define.
+ (HOST_MACHINE_ARCH): Define. This allows cross-building vax-linux
+ hosted binutils.
+
+2005-12-27 Nathan Sidwell <nathan at codesourcery.com>
+
+ * elf32-mt.c (mt_elf_merge_private_bfd_data): Do not allow mixing
+ object files from different mt variants.
+
+2005-12-27 Leif Ekblad <leif at rdos.net>
+
+ * config.bfd: Add support for RDOS targets.
+
+2005-12-27 Marty Leisner <leisner at rochester.rr.com>
+
+ * dwarf2.c (lookup_symbol_in_function_table): Check for a function
+ name before passing it to strcmp.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (elf_find_function): Don't ignore section syms.
+ Simplify filename logic.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (add_stub_sym): Pass info rather than htab.
+ Use different names for pic vs non-pic, '.' instead of '_'.
+ (allocate_dynrelocs): Adjust add_stub_sym call.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (bfd_section_from_shdr): Treat invalid reloc sections as
+ normal sections rather than returning false.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * coff-h8300.c (h8300_reloc16_extra_cases): Use input section
+ "output_offset" instead of link order "offset".
+ * coff-h8500.c (extra_case): Likewise.
+ * coff-w65.c (w65_reloc16_extra_cases): Likewise.
+ * coff-z80.c (extra_case): Likewise.
+ * coff-z8k.c (extra_case): Likewise.
+ * linker.c (default_indirect_link_order): Likewise, "size" too.
+ * ecoff.c (ecoff_indirect_link_order): Likewise.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2005-12-24 Alan Modra <amodra at bigpond.net.au>
+
+ * aix5ppc-core.c: Remove duplicate prototypes.
+ (xcoff64_core_file_matches_executable_p): Provide implementation
+ for !AIX_5_CORE.
+ * corefile.c (generic_core_file_matches_executable_p): Correct
+ syntax error in prototype.
+ * libbfd-in.h (generic_core_file_matches_executable_p): Delete.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+2005-12-23 Michael Weiser <michael at weiser.dinsnail.net>
+
+ PR 1150
+ * elf-bfd.h (struct elf_backend_data): New field
+ 'elf_backend_ignore_undef_symbol'.
+ * elfxx-target.h (elf_backend_ignore_undef_symbol): Define to NULL
+ if not already defined.
+ (elfNN_bed): Initialise the elf_backend_ignore_undef_symbol field.
+ * elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): New function.
+ * elfxx-mips.h (elf_backend_ignore_undef_symbol): Define and
+ prototype.
+ * elflink.c (elf_link_output_extsym): Check
+ elf_backend_ignore_undef_symbol before reporting an undefined
+ symbol in a shared library.
+
+2005-12-23 Joel Brobecker <brobecker at adacore.com>
+
+ * corefile.c (generic_core_file_matches_executable_p): New function.
+ * libbfd-in.h (generic_core_file_matches_executable_p): Add
+ declaration.
+ * libbfd.h: Regenerate.
+ * hpux-core.c: ANSIfy function declarations and prototypes.
+ (thread_section_p): Manually expand bfd_section_name macro
+ to make it clear that parameter ABFD is not used.
+ (hpux_core_core_file_matches_executable_p): Delete, replaced
+ by macro pointing to generic_core_file_matches_executable_p.
+
+ * aix386-core.c: Replace core_file_matches_executable_p null
+ implementation by generic_core_file_matches_executable_p by
+ using a macro.
+ * aix5ppc-core.c: Likewise.
+ * cisco-core.c: Likewise.
+ * hppabsd-core.c: Likewise.
+ * irix-core.c: Likewise.
+ * lynx-core.c: Likewise.
+ * mach-o.c: Likewise.
+ * netbsd-core.c: Likewise.
+ * osf-core.c: Likewise.
+ * ptrace-core.c: Likewise.
+ * sco5-core.c: Likewise.
+ * trad-core.c: Likewise.
+
+2005-12-19 David Heine <dlheine at tensilica.com>
+
+ * elf32-xtensa.c (action_list_count, xlate_map_entry, xlate_map,
+ xlate_offset_with_removed_text, build_xlate_map, free_xlate_map): New.
+ (check_section_ebb_pcrels_fit): Build new xlate_map, use it and free it
+ when finished.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * archures.c (bfd_arch_mt): Renamed.
+ (bfd_mt_arch): Renamed.
+ (bfd_archures_list): Adjusted.
+ * bfd-in2.h: Rebuilt.
+ * config.bfd (mt): Remove special case targ_archs.
+ (mt-*-elf): Rename bfd_elf32_mt_vec.
+ * configure: Rebuilt.
+ * configure.in (bfd_elf32_mt_vec): Renamed.
+ (selarchs) Remove mt special case.
+ * cpu-mt.c (arch_info_struct): Adjust.
+ (bfd_mt_arch): Renamed, adjust.
+ * elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
+ mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
+ mt_elf_howto_table): Renamed, adjusted.
+ (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
+ elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
+ mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
+ mt_elf_print_private_bfd_data): Renamed, adjusted.
+ (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
+ ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
+ bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
+ elf_backend_gc_sweep_hook, elf_backend_check_relocs,
+ eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
+ bfd_elf32_bfd_copy_private_bfd_data,
+ bfd_elf32_bfd_merge_private_bfd_data,
+ bfd_elf32_bfd_print_private_bfd_data): Adjusted.
+ * libbfd.h: Regenerated.
+ * reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
+ BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
+ BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
+ * targets.c (bfd_elf32_mt_vec): Renamed.
+ (_bfd_target_vector): Adjusted.
+
+2005-12-13 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/2008
+ * elf.c (_bfd_elf_setup_sections): Return FALSE if
+ elf_linked_to_section will be set to NULL.
+
+ * format.c (bfd_check_format_matches): Don't check the default
+ target twice.
+
+2005-12-13 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_relocate_section): Force tail calls in
+ shared libs to resolve locally.
+
+2005-12-12 Paul Brook <paul at codesourcery.com>
+
+ * bfd-in2.h: Regenerate.
+ * elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and
+ BFD_RELOC_ARM_PCREL_JUMP.
+ (check_use_blx): New function.
+ (bfd_elf32_arm_process_before_allocation): Don't allocate glue if
+ using BLX.
+ (elf32_arm_final_link_relocate): Perform bl<->blx conversion for
+ R_ARM_CALL and R_ARM_THM.
+ (elf32_arm_get_eabi_attr_int): New function.
+ (elf32_arm_size_dynamic_sections): Call check_use_blx.
+ * libbfd.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
+ BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
+ (cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
+ * Makefile.in: Rebuilt.
+ * config.bfd: Replace ms1 arch with mt.
+ * configure.in: Replace ms1 files with mt files.
+ * configure: Rebuilt.
+ * elf32-mt.c: Renamed from elf32-ms1.c. Update include files.
+ * cpu-mt.c: Renamed from cpu-ms1.c.
+
+2005-12-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_size_stubs): Don't consider non-ppc64 input.
+
+2005-12-10 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_gc_mark_dynamic_ref_symbol): Use !info-executable
+ to test for linking shared libs, not info->shared.
+
+2005-12-08 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add emit_stub_syms.
+ (ppc_elf_select_plt_layout): Add emit_stub_syms param, save to htab.
+ (add_stub_sym): New function.
+ (allocate_dynrelocs): Call add_stub_sym.
+ (ppc_elf_size_dynamic_sections): Emit __glink and __glink_PLTresolve
+ when emit_stub_syms.
+ * elf32-ppc.h (ppc_elf_select_plt_layout): Update prototype.
+
+2005-12-08 Alan Modra <amodra at bigpond.net.au>
+
+ * reloc.c (enum complain_overflow): Correct comments.
+ (bfd_check_overflow): Combine complain_overflow_bitfield and
+ complain_overflow_signed code.
+ (_bfd_relocate_contents): Likewise.
+ (bfd_howto_32): Use complain_overflow_dont.
+ * elf32-d10v.c (elf_d10v_howto_table): Revert 2002-06-17 change.
+ * bfd-in2.h: Regenerate.
+
+2005-12-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (assign_section_numbers): Remove extra code in the last
+ change.
+
+2005-12-07 H.J. Lu <hongjiu.lu at intel.com>
+ Andreas Schwab <schwab at suse.de>
+
+ PR binutils/1991
+ * elf.c (assign_section_numbers): Always use the output section
+ when setting up sh_link for SHF_LINK_ORDER.
+
+2005-12-07 Thiemo Seufer <ths at networkno.de>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1932
+ * bfd-in.h (bfd_elf_record_link_assignment): Add output_bfd
+ and hidden arguments.
+
+ * bfd.c (bfd_hide_symbol): Removed.
+
+ * bfd-in2.h: Regenerated.
+
+ * elflink.c (bfd_elf_record_link_assignment): Handle hidden
+ symbols which were provided by a linker script.
+
+2005-12-06 Paul Gilliam <pgilliam at us.ibm.com>
+
+ * cpu-powerpc.c (bfd_powerpc_archs): Add ppc 750.
+
+2005-11-18 Mark Kettenis <kettenis at gnu.org>
+
+ * elf64-hppa.c (elf64_hppa_section_from_phdr): Create .kernel
+ pseudo-section. Make sure .reg section comes after the proc
+ section it's generated from.
+
+2005-12-01 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_sweep_hook): Fix an illegal duplicate check.
+ (m32r_elf_relocate_section): Fix R_M32R_10_PCREL_RELA linkage bug.
+ (m32r_elf_gc_sweep_hook): Likewise.
+ (m32r_elf_check_relocs): Likewise.
+
+2005-11-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (_bfd_generic_match_sections_by_type): Don't define.
+ * libbfd-in.h (_bfd_generic_match_sections_by_type): Delete.
+ * libbfd.c (_bfd_generic_match_sections_by_type): Delete.
+ * targets.c (bfd_match_sections_by_type): Don't define.
+ (BFD_JUMP_TABLE_LINK): Remove _bfd_generic_match_sections_by_type.
+ * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Likewise.
+ * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
+ Thiemo Seufer <ths at networkno.de>
+
+ * elf32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
+ R_MIPS_PC16.
+ (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
+ (bfd_elf32_bfd_reloc_type_lookup): Don't handle
+ BFD_RELOC_16_PCREL_S2.
+ * elf64-mips.c (mips_elf64_howto_table_rel): Use rightshift 2 for
+ R_MIPS_PC16.
+ (mips_elf64_howto_table_rela): Likewise.
+ (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
+ (bfd_elf64_bfd_reloc_type_lookup): Don't handle
+ BFD_RELOC_16_PCREL_S2.
+ * elfn32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
+ R_MIPS_PC16.
+ (elf_mips_howto_table_rela): Likewise.
+ (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
+ (bfd_elf32_bfd_reloc_type_lookup): Don't handle
+ BFD_RELOC_16_PCREL_S2.
+ * elfxx-mips.c: Formatting fixes.
+ (mips_elf_calculate_relocation): Handle R_MIPS_GNU_REL16_S2
+ and R_MIPS_PC16 identically.
+
+2005-11-23 Frederic Riss <frederic.riss at st.com>
+
+ * elfcode.h (elf_object_p): Delay the setting of start_address
+ until we're sure the backend matches the binary.
+
+2005-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * som.c (som_decode_symclass): Decode BSF_WEAK symbols in the same
+ manner as bfd_decode_symclass.
+
+2005-11-18 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_check_relocs): Don't set has_14bit_branch
+ on branches to same section.
+
+2005-11-17 Randolph Chung <tausq at debian.org>
+
+ * elf64-hppa.c (elf64_hppa_object_p): Recognize corefiles under
+ hppa64-hp-hpux11.11.
+ (elf64_hppa_section_from_phdr): New function.
+ (elf_backend_section_from_phdr): Define.
+
+2005-11-11 Nick Clifton <nickc at redhat.com>
+
+ PR 1150
+ * elfxx-mips.c (mips_elf_calculate_relocation): Ignore an
+ undefined symbol if it is optional.
+ (_bfd_mips_elf_merge_symbol_attribute): Make sure that the
+ optional flag is merged as well as the visibility.
+ * elfxx-mips.h (_bfd_mips_elf_merge_symbol_attribute): Prototype.
+ (elf_backend_merge_symbol_attribute): Define.
+
+2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
+
+ Add ms2 support
+ * archures.c (bfd_mach_ms2): Define.
+ * cpu-ms1.c (arch_info_struct): Add ms2 stanza.
+ * elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
+ (ms1_elf_merge_private_bfd_data): Remove unused variables. Add
+ correct merging logic, with workaround.
+ (ms1_elf_print_private_bfd_data): Add ms2 case.
+ * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
+ * libbfd.h: Regenerated.
+ * bfd-in2.h: Regenerated.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * warning.m4 (AM_BINUTILS_WARNINGS): Default to empty string
+ if compiler is not GCC.
+ * configure: Regenerate
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure.host (ia64-*-hpux*): Set _LARGEFILE64_SOURCE.
+
+2005-11-03 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * configure.in: Check for fopen64.
+ * libbfd-in.h (real_fopen): New prototype.
+ * configure, config.in, libbfd.h: Regenerated.
+ * bfdio.c (real_fopen): New function.
+ * opncls.c (bfd_fopen, bfd_fill_in_gnu_debuglink_section): Use it.
+ * cache.c (bfd_open_file): Likewise.
+
+2005-11-03 Thiemo Seufer <ths at networkno.de>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Handle only
+ forced local symbols here.
+ (mips_elf_create_dynamic_relocation): Likewise.
+ (_bfd_mips_elf_finish_dynamic_symbol): Fix typo in comment.
+
+2005-11-03 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (elf_fake_sections): When calculating tbss size, just use
+ the last link_order.
+ (assign_file_positions_for_segments): Likewise.
+ * elflink.c (bfd_elf_final_link): Likewise.
+ (elf_reloc_link_order): Correct comment.
+
+2005-11-02 Alan Modra <amodra at bigpond.net.au>
+
+ PR ld/1775
+ * elf32-m68k.c (elf_m68k_finish_dynamic_symbol): Add required
+ parentheses.
+
+2005-10-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+
+ * dep-in.sed: Replace " ./" with " ".
+
+2005-10-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * hpux-core.c: Include <machine/reg.h> only if HPUX_CORE is
+ define.
+ * osf-core.c: Include <sys/core.h> only if OSF_CORE is defined.
+ * sco5-core.c: Include <sys/paccess.h> and <sys/region.h> only
+ if SCO5_CORE is defined.
+
+2005-10-29 Mark Kettenis <kettenis at gnu.org>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2005-10-28 Joel Brobecker <brobecker at adacore.com>
+
+ From Eric Botcazou <botcazou at adacore.com>
+ * coffcode.h (coff_compute_section_file_positions): Fix small
+ error in preprocessor directives.
+
+2005-10-28 Joel Brobecker <brobecker at adacore.com>
+
+ Mostly from Eric Botcazou <botcazou at adacore.com>
+ * rs6000-core.c: ANSIfy all function definitions.
+ Add missing function prototypes.
+ (ptr_to_uint): New type.
+ (rs6000coff_core_p): Use it as intermediate step in casts.
+ (rs6000coff_core_file_matches_executable_p): Likewise.
+ * xcoff-target.h (rs6000coff_core_p): Fix prototype.
+ (rs6000coff_core_file_matches_executable_p): Likewise.
+
+2005-10-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/1472
+ * aoutx.h (NAME (aout, machine_type)): Handle
+ bfd_mach_sparc_v8plus, bfd_mach_sparc_v8plusa,
+ bfd_mach_sparc_v8plusb, bfd_mach_sparc_v9, bfd_mach_sparc_v9a
+ and bfd_mach_sparc_v9b.
+
+2005-10-28 Hans-Peter Nilsson <hp at axis.com>
+
+ PR ld/1567
+ * elf32-cris.c (cris_elf_howto_table) <R_CRIS_32>: Set
+ complain_on_overflow field to complain_overflow_dont.
+
+2005-10-27 Alan Modra <amodra at bigpond.net.au>
+
+ PR 973
+ * cache.c (enum cache_flag): New.
+ (close_one): Save file mtime.
+ (bfd_cache_lookup): Add flag arg, adjust all users.
+ (bfd_cache_lookup_worker): Likewise.
+ (cache_btell): Use CACHE_NO_OPEN and return abfd->where if file
+ not open.
+ (cache_bflush): Similarly, and return success of file not open.
+ (cache_bseek): Use CACHE_NO_SEEK if SEEK_SET or SEEK_END.
+ (cache_bstat): Use CACHE_NO_SEEK_ERROR.
+
+ * bfdwin.c (bfd_get_file_window): Seek into file in place of
+ using bfd_cache_lookup.
+
+ * cache.c (BFD_CACHE_MAX_OPEN): Make private to this file.
+ (bfd_last_cache, bfd_cache_lookup, bfd_cache_lookup_worker): Likewise.
+ * libbfd-in.h (bfd_cache_lookup_worker, bfd_last_cache): Delete.
+ * libbfd.h: Regenerate.
+
+ * hppabsd-core.c (hppabsd_core_core_file_p): Use bfd_stat, not fstat.
+ * sco5-core.c (sco5_core_file_p): Likewise.
+ * trad-core.c (trad_unix_core_file_p): Likewise.
+
+ * cache.c: Reorganize file to avoid forward reference.
+
+2005-10-26 Alan Modra <amodra at bigpond.net.au>
+
+ * cache.c (bfd_cache_lookup_worker): Don't abort on failing to
+ reopen file.
+ (cache_btell, cache_bseek, cache_bflush, cache_bstat): Return -1 on
+ bfd_cache_lookup failure.
+ (cache_bread, cache_bwrite): Return 0 on the same.
+ * bfdwin.c (bfd_get_file_window): Likewise.
+ * hppabsd-core.c (hppabsd_core_core_file_p): Likewise.
+ * sco5-core.c (sco5_core_file_p): Likewise.
+ * trad-core.c (trad_unix_core_file_p): Likewise.
+
+2005-10-26 Alan Modra <amodra at bigpond.net.au>
+
+ * cache.c (bfd_cache_lookup_worker): Use bfd_error_handler
+ rather than bfd_perror. Print file name. Internationalise.
+
+2005-10-26 Alan Modra <amodra at bigpond.net.au>
+
+ * cache.c (bfd_open_file): Set bfd_error_system_call on failure
+ to open file.
+ (bfd_cache_lookup_worker): Remove check that file pos is in
+ unsigned long range. Print system error before aborting.
+
+2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * Makefile.am: Add rules for coff-z80 and cpu-z80.
+ * Makefile.in: Regenerated.
+ * archures.c: Add bfd_arch_z80 and support for it.
+ * coffcode.h(coff_set_arch_mach_hook): Add case Z80MAGIC.
+ (coff_set_flags): Add case bfd_arch_z80.
+ * config.bfd: Add z80coff_vec.
+ * configure.in: Add z80coff_vec.
+ * reloc.c: Add BFD_RELOC_Z80_DISP8
+ * targets.c: Add z80coff_vec.
+ * coff-z80.c: New file
+ * cpu-z80.c: New file
+ * configure: Regenerated.
+ * libbfd.h: Regenerated.
+ * bfd-in2.h: Regenerated.
+
+2005-10-26 Alan Modra <amodra at bigpond.net.au>
+
+ PR ld/1540
+ * elf-bfd.h (elf_backend_copy_indirect_symbol): Replace pointer to
+ elf_backend_data with pointer to bfd_link_info.
+ (_bfd_elf_link_hash_copy_indirect): Likewise.
+ * elf.c (_bfd_elf_link_hash_copy_indirect): Likewise. Handle
+ direct and indirect symbols both having dynamic link info.
+ * elf32-arm.c (elf32_arm_copy_indirect_symbol): Likewise.
+ * elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Likewise.
+ * elf32-i386.c (elf_i386_copy_indirect_symbol): Likewise.
+ * elf32-m32r.c (m32r_elf_copy_indirect_symbol): Likewise.
+ * elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise.
+ * elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise.
+ * elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise.
+ * elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
+ * elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_copy_indirect_symbol): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_copy_indirect_symbol): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_copy_indirect_symbol): Likewise.
+ * elflink.c: Adjust all calls to bed->elf_backend_copy_indirect_symbol.
+ * elfxx-mips.h (_bfd_mips_elf_copy_indirect_symbol): Update prototype.
+ * elfxx-sparc.h (_bfd_sparc_elf_copy_indirect_symbol): Likewise.
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * po/SRC-POTFILES.in: Regenerate.
+ * po/bfd.pot: Regenerate.
+
+2005-10-24 Jie Zhang <jie.zhang at analog.com>
+
+ * elf32-bfin.c (bfd_bfin_elf32_create_embedded_relocs): Fix signedness
+ warning.
+
+2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
+
+ * elf32-bfin.c (bfin_howto_table): Set src_mask to 0 for all relocs.
+ (bfin_imm16_reloc): Always add in the addend. Don't fetch existing
+ contents from section.
+ (bfin_relocate_section): Rework so as to not call special_functions.
+ Handle the relocation stack here. Treat pcrel24 relocs specially.
+
+2005-10-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_input_bfd): Don't use linker_mark and
+ SEC_EXCLUDE to test for sections dropped from output. Instead,
+ use bfd_section_removed_from_list on normal sections. Don't
+ attempt to handle symbols with unknown reserved section indices.
+ * linker.c (_bfd_generic_link_output_symbols): Don't use
+ linker_mark to test for symbols belonging to dropped sections.
+ Do allow absolute symbols.
+
+2005-10-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-i370.c (i370_elf_fake_sections): Don't set SHF_EXCLUDE on
+ group sections.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
+ set of indirect operands.
+
+2005-10-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_fake_sections): Don't set SHF_EXCLUDE on
+ group sections.
+
+2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ * coff-rs6000.c (rs6000coff_vec): Initialize
+ _bfd_init_private_section_data with
+ _bfd_generic_init_private_section_data.
+ (pmac_xcoff_vec): Likewise.
+ * coff64-rs6000.c (rs6000coff64_vec): Likewise.
+ (aix5coff64_vec): Likewise.
+
+2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1487
+ * elf-bfd.h (_bfd_generic_init_private_section_data): New.
+ (_bfd_elf_init_private_section_data): New.
+
+ * elf.c (elf_fake_sections): Don't set SHF_GROUP for
+ relocatable link.
+ (bfd_elf_set_group_contents): Don't handle relocatable link
+ specially.
+ (assign_section_numbers): If it isn't called by assembler,
+ use the output section of elf_linked_to_section for
+ SHF_LINK_ORDER.
+ (_bfd_elf_init_private_section_data): New.
+ (_bfd_elf_copy_private_section_data): Call it.
+
+ * libbfd-in.h (_bfd_generic_init_private_section_data): New.
+
+ * libbfd.c (_bfd_generic_init_private_section_data): New.
+
+ * targets.c (BFD_JUMP_TABLE_COPY): Add
+ _bfd_generic_init_private_section_data.
+ (bfd_init_private_section_data): Likewise.
+
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Likewise.
+
+2005-10-23 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (dec_dynrel_count): Don't report errors for local
+ syms in gc'd sections.
+ (ppc64_elf_edit_opd): Don't adjust reloc counts when NO_OPD_RELOCS.
+ (elf_backend_action_discarded): Define.
+ (ppc64_elf_action_discarded): New function.
+
+2005-10-19 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (find_arm_elf_section_entry): New function.
+ (get_arm_elf_section_data): Use it.
+ (unrecord_section_with_arm_elf_section_data): Use it.
+
+2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ * coff-rs6000.c (rs6000coff_vec): Initialize
+ _bfd_match_sections_by_type with
+ _bfd_generic_match_sections_by_type.
+ (pmac_xcoff_vec): Likewise.
+ * coff64-rs6000.c (rs6000coff64_vec): Likewise.
+ (aix5coff64_vec): Likewise.
+
+2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1467
+ * elf-bfd.h (_bfd_elf_match_sections_by_type): New.
+ (_bfd_generic_match_sections_by_type): New. Defined.
+
+ * elf.c (_bfd_elf_match_sections_by_type): New.
+
+ * libbfd-in.h (_bfd_generic_match_sections_by_type): New.
+
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Likewise.
+
+ * libbfd.c (_bfd_generic_match_sections_by_type): New.
+
+ * targets.c (BFD_JUMP_TABLE_LINK): Initialize
+ _bfd_match_sections_by_type with
+ _bfd_generic_match_sections_by_type.
+ (bfd_target): Add _bfd_match_sections_by_type.
+
+2005-10-08 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c: Move #include "elf/arm.h" after libbfd.h.
+ (NUM_KNOWN_ATTRIBUTES): Define.
+ (aeabi_attribute, aeabi_attribute_list): Define.
+ (elf32_arm_obj_tdata): Add known_eabi_attributes and
+ other_eabi_attributes.
+ (uleb128_size, is_default_attr, eabi_attr_size,
+ elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
+ elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
+ elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int,
+ elf32_arm_add_eabi_attr_compat, copy_eabi_attributes,
+ elf32_arm_merge_eabi_attributes): New functions.
+ (elf32_arm_copy_private_bfd_data): Copy EABI object attributes.
+ (elf32_arm_fake_sections): Handle .ARM.attributes.
+ (elf32_arm_parse_attributes): New function.
+ (elf32_arm_section_from_shdr): Use it.
+ (bfd_elf32_bfd_final_link): Define.
+
+2005-10-06 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_check_relocs): Avoid aliasing warnings from
+ GCC.
+ (elf32_arm_size_dynamic_sections): Likewise.
+ * ecofflink.c (bfd_ecoff_debug_one_external): Likewise.
+ * elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
+ * elf32-m32r.c (m32r_elf_check_relocs): Likewise.
+ * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
+ * elf32-ppc.c (ppc_elf_check_relocs): Likewise.
+ * elf32-s390.c (elf_s390_check_relocs): Likewise.
+ (elf_s390_size_dynamic_sections): Likewise.
+ * elf32-sh.c (sh_elf_check_relocs): Likewise.
+ * elf64-ppc.c (ppc64_elf_check_relocs, dec_dynrel_count)
+ (ppc64_elf_size_dynamic_sections): Likewise.
+ * elf64-s390.c (elf_s390_check_relocs): Likewise.
+ (elf_s390_size_dynamic_sections): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
+ (_bfd_sparc_elf_size_dynamic_sections): Likewise.
+ * ieee.c (ieee_slurp_section_data): Likewise.
+ * oasys.c (oasys_slurp_section_data): Likewise.
+
+2005-10-04 Bob Wilson <bob.wilson at acm.org>
+
+ * archive.c: Add missing SUBSECTION for documentation.
+ * bfd.c: Likewise.
+ * cache.c: Likewise.
+ * corefile.c: Likewise.
+ * format.c: Likewise.
+ * init.c: Likewise.
+ * libbfd.c: Likewise.
+ * opncls.c: Likewise.
+ * elf.c: Remove blank line after SECTION heading.
+ * reloc.c: Change "howto manager" SECTION to a SUBSECTION.
+
+2005-10-04 Nick Clifton <nickc at redhat.com>
+
+ * elf32-arm.c (get_arm_elf_section_data): Cache the last pointer
+ matched so that the typical case of scanning for the previous
+ section to last one can be handled quickly.
+
+2005-10-03 David Heine <dlheine at tensilica.com>
+
+ * elf32-xtensa.c (relocations_reach): Skip range check for
+ absolute literals.
+
+2005-10-03 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (_bfd_elf_get_synthetic_symtab): Set BSF_GLOBAL on
+ synthetic syms.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * archures.c (bfd_mach_bfin): New.
+ (bfd_arch_bfin): New.
+ bfd-in.h (bfd_bfin_elf32_create_embedded_relocs): New.
+ * bfd-in2.h: Regenerated.
+ * config.bfd: Bfin support.
+ * configure: Regenerated.
+ * configure.in: Bfin support.
+ * libbfd.h: Regenerated.
+ * reloc.c: Add BFD relocations for Bfin.
+ * targets.c (bfd_elf32_bfin_vec): New.
+ * cpu-bfin.c: New file.
+ * elf32-bfin.c: New file.
+
+2005-09-30 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc_type_of_stub): Check both func desc and func
+ entry sym before deciding no stub is needed.
+ (ppc64_elf_size_stubs): When calculating branch destination,
+ don't use func desc sym for old ABI objects unless func entry
+ is undefined.
+
+2005-09-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/1321
+ * elf-bfd.h (_bfd_elf_setup_group_pointers): Renamed to ...
+ (_bfd_elf_setup_sections): This.
+ * elf.c: Likewise.
+ * elfcode.h (elf_object_p): Likewise.
+
+ * elf.c (_bfd_elf_setup_sections): Process SHF_LINK_ORDER.
+ (_bfd_elf_copy_private_section_data): Likewise.
+
+2005-09-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_fixup_link_order): Report locations for mixed
+ ordered and unordered input sections.
+
+2005-09-22 James E. Wilson <wilson at specifix.com>
+
+ * dwarf2.c (struct funcinfo): Delete nesting_level field.
+ (lookup_address_in_function_table): Delete code to set funcinfo
+ caller_func field. Delete local curr_func.
+ (scan_unit_for_symbols): New locals nested_funcs, nested_funcs_size.
+ Delete code setting funcinfo nesting_level field. Add code to set
+ funcinfo caller_func field.
+
+2005-09-20 James E. Wilson <wilson at specifix.com>
+
+ * dwarf2.c (find_abstract_instance_name): Don't early exit when name
+ set. For DW_AT_name case, only set name if not already set. Handle
+ DW_AT_MIPS_linkage_name.
+
+2005-09-20 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (_bfd_elf_merge_symbol): Simplify.
+
+2005-09-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc_build_one_stub): Replace assertion that long
+ branch offset is in range with an error. Print full stub name on
+ errors.
+ (ppc_size_one_stub): Print full stub name on errors.
+ (group_sections): Warn if section size exceeds group size.
+ (ppc64_elf_size_stubs): Continue relaxing when stub types change.
+
+2005-09-09 Kevin Buettner <kevinb at redhat.com>
+
+ * elf32-am33lin.c (bfd.h, sysdep.h, elf-bfd.h, elf/mn10300.h):
+ Include.
+ (elf32_am33lin_grok_prstatus, elf32_am33lin_grok_psinfo): New
+ functions.
+ (elf_backend_grok_prstatus, elf_backend_grok_psinfo): Define.
+
+2005-09-09 Richard Earnshaw <richard.earnshaw at arm.com>
+
+ * elf32-arm.c (elf32_arm_section_from_shdr): Accept SHT_ARM_PREEMPTMAP
+ and SHT_ARM_ATTRIBUTES.
+
+2005-09-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_get_linked_section_vma): Fix a typo in comment.
+ * elfxx-ia64.c (elf_backend_link_order_error_handler): Likewise.
+
+2005-09-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1263
+ * elflink.c (elf_link_add_object_symbols): Abort for
+ --just-symbols on DSO.
+
+2005-09-08 Paul Brook <paul at codesourcery.com>
+
+ * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-09-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1301
+ * elflink.c (_bfd_elf_merge_symbol): Don't check undefined
+ symbol introduced by "ld -u" for TLS.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * libbdf.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
+
+2005-09-01 Dmitry Diky <diwil at spec.ru>
+
+ * elf32-msp430.c (msp430_elf_relax_delete_bytes): Do not adjust
+ local symbols and move it to
+ (msp430_elf_relax_adjust_locals): New function - walk over the
+ sections in the bfd and adjust relocations as necessary.
+
+2005-08-31 DJ Delorie <dj at redhat.com>
+
+ * elf32-i386.c (elf_i386_check_relocs): Don't cast a unary &
+ address operator, as that breaks GCC's strict aliasing rules.
+ (elf_i386_size_dynamic_sections): Avoid the need for type
+ punning.
+ * elf64-x86-64.c (elf_x86_64_check_relocs): Don't cast a unary
+ & address operator, as that breaks GCC's strict aliasing
+ rules.
+ (elf_x86_64_size_dynamic_sections): Avoid the need for type
+ punning.
+
+2005-08-30 Phil Edwards <phil at codesourcery.com>
+
+ * config.bfd (i[3-7]86-*-vxworks): Match vxworks* instead.
+
+2005-08-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1247
+ * elfxx-ia64.c (allocate_fptr): Check undefined symbol.
+
+2005-08-29 Steven J. Hill <sjhill at realitydiluted.com>
+
+ * elfxx-mips.c (_bfd_mips_elf_relocate_section): Initialise
+ 'value' to avoid compile time warning message.
+
+2005-08-26 Christian Groessler <chris at groessler.org>
+
+ * coff-z8k.c: (r_jr, r_disp7, r_callr): Fix src_mask and dst_mask
+ of HOWTO.
+ (coff_z8k_select_reloc): Remove.
+ (SELECT_RELOC): Remove.
+ (coff_z8k_reloc_type_lookup): New function.
+ (coff_bfd_reloc_type_lookup): Define.
+ * configure.in: Add cofflink.lo to z8kcoff_vec.
+ * configure: Regenerate.
+ * reloc.c: (bfd_reloc_code_type): Add z8k relocations.
+ (bfd_install_relocation): Don't clear reloc_entry->addend for
+ coff-z8k target.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-08-25 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * elf32-sh.c (sh_elf_get_flags_from_mach): Fix off-by-one error.
+
+2005-08-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1208
+ * elf-hppa.h (elf_hppa_relocate_section): Print out the name
+ of unresolvable relocation.
+ * elf-m10300.c (mn10300_elf_relocate_section): Likewise.
+ * elf32-arm.c (elf32_arm_relocate_section): Likewise.
+ * elf32-i386.c (elf_i386_relocate_section): Likewise.
+ * elf32-m32r.c (m32r_elf_relocate_section): Likewise.
+ * elf32-m68k.c (elf_m68k_relocate_section): Likewise.
+ * elf32-s390.c (elf_s390_relocate_section): Likewise.
+ * elf32-sh.c (sh_elf_relocate_section): Likewise.
+ * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
+ * elf64-s390.c (elf_s390_relocate_section): Likewise.
+ * elf64-sh64.c (sh_elf64_relocate_section): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise.
+
+2005-08-18 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * config.bfd: Add bfd_elf32_shnbsd_vec and bfd_elf32_shlnbsd_vec
+ to targ_selvecs for sh5*-*-netbsd* and sh64*-*-netbsd*.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * coff-a29k.c: Delete.
+ * cpu-a29k.c: Delete.
+ * Makefile.am: Remove mention of a29k files.
+ * aoutf1.h: Remove a29k support.
+ * aoutx.h: Likewise.
+ * archures.c: Likewise.
+ * coffcode.h: Likewise.
+ * config.bfd: Likewise.
+ * configure.in: Likewise.
+ * ieee.c: Likewise.
+ * mipsbsd.c: Likewise.
+ * pdp11.c: Likewise.
+ * sparclynx.c: Likewise.
+ * targets.c: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Warn on
+ zero size dynamic variables.
+ * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
+ * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
+ * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
+ * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
+ * elf32-i386.c (elf_i386_adjust_dynamic_symbol): Likewise.
+ * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
+ * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
+ * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
+ * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
+ * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
+ * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
+ * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
+ * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
+ * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_adjust_dynamic_symbol): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
+
+2005-08-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/1179
+ * dwarf2.c (_bfd_dwarf2_find_nearest_line): Use section lma
+ instead of vma.
+ (_bfd_dwarf2_find_line): Likewise.
+
+2005-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-mmix.c (mmix_elf_add_symbol_hook): Mark reg section
+ SEC_LINKER_CREATED.
+ (mmix_elf_final_link): Check that section hasn't already been
+ removed before removing.
+ * mmo.c (mmo_scan): Mark reg contents section SEC_LINKER_CREATED.
+ (mmo_canonicalize_symtab): Likewise for reg section.
+
+2005-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Move assert later.
+ * elfxx-mips.c (_bfd_mips_elf_hide_symbol): Cope with being called
+ without any got section.
+
+2005-08-17 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * cofflink.c (_bfd_coff_generic_relocate_section): Correct
+ comment.
+
+2005-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (_bfd_elf_define_linkage_sym): Don't call
+ bfd_elf_link_record_dynamic_symbol. Call elf_backend_hide_symbol.
+ (_bfd_elf_link_renumber_dynsyms): Formatting.
+ (struct elf_gc_sweep_symbol_info): New.
+ (elf_gc_sweep_symbol): Rewrite.
+ (elf_gc_sweep): Adjust params and elf_gc_sweep_symbol call.
+ Call _bfd_elf_link_renumber_dynsyms.
+ (bfd_elf_gc_sections): Adjust elf_gc_sweep call.
+
+2005-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_edit_opd): Don't call dec_dynrel_count
+ when relocatable.
+
+2005-08-15 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (ELF_MACHINE_CODE, ELF_MACHINE_ALT1): Swap values
+ of EM_XTENSA and EM_XTENSA_OLD.
+
+2005-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (_bfd_elf_define_linkage_sym): Declare.
+ * elflink.c (_bfd_elf_define_linkage_sym): New function, extracted
+ from..
+ (_bfd_elf_create_got_section): ..here.
+ (_bfd_elf_link_create_dynamic_sections): Call it for _DYNAMIC.
+ (_bfd_elf_create_dynamic_sections): ..and _PROCEDURE_LINKAGE_TABLE_.
+ * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Use
+ _bfd_elf_define_linkage_sym.
+ * elf32-frv.c (_frv_create_got_section): Likewise.
+ * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Likewise.
+
+2005-08-15 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_howto_table_1): Make R_ARM_PLT32 the same as
+ R_ARM_PC24.
+
+2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ PR ld/1135
+ * elf64-hppa.c (elf64_hppa_special_sections): Add flag definitions for
+ .plt, .dlt, .sdata, .sbss and .tbss.
+
+2005-08-12 Dmitry Diky <diwil at spec.ru>
+
+ * elf32-msp430.c (msp430_elf_relax_delete_bytes): Adjust relocations
+ referenced by .section + DISPLACEMENT.
+
+2005-08-10 James E. Wilson <wilson at specifix.com>
+
+ * dwarf2.c (scan_unit_for_symbols, case DT_AT_location): Verify that
+ DW_OP_addr is only opcode in location before using it.
+
+2005-08-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_final_link): Reset gp.
+
+2005-08-09 Rodney Brown <rbrown at bravurasolutions.com.au>
+ Nick Clifton <nickc at redhat.com>
+
+ * aix5ppc-core.c (xcoff64_core_p): Constify return_value
+ variable. Also, do not use core_hdr macro as it evaluates to a
+ cast of an lvalue which is no longer supported by GCC 4.0.
+
+2005-08-08 Eric Dönges <Eric.Doenges at betty-tv.com>
+
+ * archures.c (bfd_mach_msp21): New MSP430 machine number.
+ * bfd-in2.h: Regenerate.
+ * cpu-msp430.c (arch_info_struct): Add support for msp430x21xx
+ variants.
+
+2005-08-07 Nick Clifton <nickc at redhat.com>
+ Paul Brook <paul at codesourcery.com>
+
+ PR 1147
+ * elf32-arm.c (bfd_elf32_close_and_cleanup): Define.
+ (elf32_arm_close_and_cleanup): New function - walk over the
+ sections in the bfd that is being closed removing them from the
+ list of recorded sections.
+ (unrecord_section_via_map_over_sections): New helper function.
+ (record_section_with_arm_elf_section_data): Call bfd_malloc
+ instead of bfd_alloc. Remove unneeded abfd parameter.
+ (elf32_arm_new_section_hook): Do not pass bfd to
+ record_section_with_arm_elf_section_data.
+
+ * elfxx-target.h (bfd_elfNN_close_and_cleanup): Only define if not
+ already defined by the target.
+
+2005-08-05 Fred Fish <fnf at specifix.com>
+
+ * dwarf2.c (read_rangelist): Use addr_size instead of offset_size
+ to determine how many bytes to read from each rangelist entry.
+
+2005-08-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd.c (bfd_hide_symbol): New.
+ * bfd-in2.h: Regenerated.
+
+2005-08-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf64-x86-64.c (elf64_x86_64_merge_symbol): When mixing a
+ large common symbol and a normal common symbol, always turn
+ the large common symbol into a normal one.
+
+2005-08-04 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (struct elf_linker_section): Replace sym_val field
+ with sym.
+ (ppc_elf_relocate_section): Adjust for above.
+ (create_sdata_sym): New function.
+ (ppc_elf_create_linker_section): Call it.
+ (ppc_elf_check_relocs): Correct has_sda_refs and non_got_refs.
+ Create sdata syms for all SDA relocs.
+ (ppc_elf_adjust_dynamic_symbol): Don't special case _SDA_BASE_
+ and _SDA2_BASE_.
+ (ppc_elf_set_sdata_syms): Delete.
+ * elflink.c (bfd_elf_size_dynamic_sections): Don't create DT_INIT
+ and DT_FINI tags unless associated section has input.
+ (bfd_elf_set_symbol, _bfd_elf_provide_symbol): Delete.
+ (_bfd_elf_provide_section_bound_symbols): Delete.
+ * bfd-in.h (_bfd_elf_provide_symbol): Delete.
+ (_bfd_elf_provide_section_bound_symbols): Delete.
+ * bfd-in2.h: Regenerate.
+
+2005-08-04 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (fix_syms, _bfd_elf_fix_excluded_sec_syms): Move to..
+ * linker.c (fix_syms, _bfd_fix_excluded_sec_syms): ..here.
+ * bfd-in.h (_bfd_fix_excluded_sec_syms): Rename.
+ * bfd-in2.h: Regenerate.
+
+2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Resize .rela.got
+ only if it isn't NULL.
+
+2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-i386.c (elf_howto_table): Undo the overflow change for
+ R_386_PC16 made on 2005-07-18.
+
+ * elf64-x86-64.c (x86_64_elf_howto_table): Undo the overflow
+ change for R_X86_64_PC16 made on 2005-07-18.
+
+2005-08-03 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (struct ppc_elf_link_hash_table): Remove hgot. Use
+ elf.hgot throughout file.
+
+2005-08-03 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Correct value of
+ _GLOBAL_OFFSET_TABLE_ for > 32k GOT.
+
+2005-08-02 Andreas Schwab <schwab at suse.de>
+
+ * elfxx-ia64.c (struct elfNN_ia64_allocate_data): Add only_got.
+ (elfNN_ia64_relax_section): Reallocate .rela.got when .got has
+ changed.
+ (allocate_dynrel_entries): Look only at GOT relocations when
+ only_got is true.
+ (elfNN_ia64_size_dynamic_sections): Set only_got to false before
+ calling allocate_dynrel_entries.
+
+2005-08-02 Nick Clifton <nickc at redhat.com>
+
+ PR 1147
+ * elf32-arm.c (struct _arm_elf_section_data): Turn into a typedef
+ and make the mapcount field unsigned.
+ (struct section_list): New: Used to keep track of which sections
+ have an _arm_elf_section_data structure.
+ (record_section_with_arm_elf_section_data): New function.
+ (get_arm_elf_section_data): New function.
+ (unrecord_section_with_arm_elf_section_data): New function.
+ (elf32_arm_output_symbol_hook): Use get_arm_elf_section_data.
+ (elf32_arm_new_section_hook): Call
+ record_section_with_arm_elf_section_data.
+ (elf32_arm_write_section): Use get_arm_elf_section_data and
+ unrecord_section_with_arm_elf_section_data.
+
+2005-08-01 Richard Sandiford <richard at codesourcery.com>
+
+ * elfxx-mips.c (mips_mach_extends_p): Treat MIPS64 as an extension
+ of MIPS32 and MIPS64r2 as an extension of MIPS32r2.
+
+2005-07-30 David Daney <ddaney at avtrex.com>
+
+ * elflink.c (elf_gc_sweep): Set dynsymcount to correct value.
+
+2005-07-29 David Daney <ddaney at avtrex.com>
+
+ * elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Ignore _gp_disp
+ if it is in the *ABS* section.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
+ * bfd-in2.h: Regeenrate.
+ * libbfd.h: Regenerate.
+
+2005-07-29 Pavel Kankovsky <peak at argo.troja.mff.cuni.cz>
+
+ * peXXigen.c (pe_print_edata): Compute the size of the export
+ table from the size field in the DataDictionary and not the size
+ of the section. Some linkers embed the export table inside a
+ larger section.
+
+2005-07-29 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_backend_data): Add action_discarded.
+ (enum action_discarded): Move from..
+ * elflink.c (enum action_discarded): ..here.
+ (_bfd_elf_default_action_discarded): Rename from elf_action_discarded.
+ Remove target specific section checks.
+ (elf_link_input_bfd): Adjust.
+ * elfxx-target.h (elf_backend_action_discarded): Define.
+ (elfNN_bed): Init new field.
+ * bfd-in.h (_bfd_elf_default_action_discarded): Declare.
+ * bfd-in2.h: Regenerate.
+ * elf-hppa.h (elf_hppa_action_discarded): New function.
+ * elf32-hppa.c (elf_backend_action_discarded): Define.
+ * elf64-hppa.c (elf_backend_action_discarded): Define.
+ * elf32-ppc.c (ppc_elf_action_discarded): New function.
+ (elf_backend_action_discarded): Define.
+
+2005-07-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (fix_syms): Handle symbols defined in input sections.
+
+2005-07-27 Jan Beulich <jbeulich at novell.com>
+
+ * elf64-x86-64.c (R_X86_64_standard, R_X86_64_vt_offset): New.
+ (elf64_x86_64_info_to_howto): Use them.
+
+2005-07-27 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (_bfd_elf_merge_symbol): Skip weak redefinition
+ regardless of strength of previous definition.
+
+2005-07-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_gc_mark_dynamic_ref_symbol): Handle -shared.
+ (bfd_elf_gc_sections): Allow -gc-sections when -shared.
+ * elf32-ppc.c (ppc_elf_gc_sweep_hook): Correct for -shared.
+
+2005-07-26 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_gc_sweep): Move gcc_except_table code..
+ (bfd_elf_gc_sections): ..to here.
+
+2005-07-25 DJ Delorie <dj at redhat.com>
+
+ * reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+ * elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
+ R_M32C_HI8, R_M32C_HI16.
+ (m32c_reloc_map): Likewise.
+ (m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
+
+2005-07-25 Jan Hubicka <jh at suse.cz>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (_bfd_elf_large_com_section): New.
+ * elf.c (_bfd_elf_large_com_section): New. Defined.
+
+ * elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
+ (elf64_x86_64_elf_section_from_bfd_section): New.
+ (elf64_x86_64_symbol_processing): New.
+ (elf64_x86_64_common_definition): New.
+ (elf64_x86_64_common_section_index): New.
+ (elf64_x86_64_common_section): New.
+ (elf64_x86_64_merge_symbol): New.
+ (elf64_x86_64_additional_program_headers): New.
+ (elf64_x86_64_special_sections): New.
+ (elf_backend_section_from_bfd_section): New. Defined.
+ (elf_backend_add_symbol_hook): Likewise.
+ (elf_backend_common_section_index): Likewise.
+ (elf_backend_common_section): Likewise.
+ (elf_backend_common_definition): Likewise.
+ (elf_backend_merge_symbol): Likewise.
+ (elf_backend_special_sections): Likewise.
+ (elf_backend_additional_program_headers): Likewise.
+
+2005-07-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_backend_data): Add common_definition,
+ common_section_index, common_section, and merge_symbol.
+ (_bfd_elf_common_definition): New.
+ (_bfd_elf_common_section_index): New.
+ (_bfd_elf_common_section): New.
+
+ * elf.c (elf_fake_sections): Don't clear sh_flags.
+
+ * elflink.c (_bfd_elf_merge_symbol): Call backend merge_symbol
+ if it is available.
+ (is_global_data_symbol_definition): Call backend
+ common_definition instead of checking SHN_COMMON.
+ (elf_link_add_object_symbols): Likewise.
+ (elf_link_output_extsym): Call backend common_section_index
+ for common section index.
+ (_bfd_elf_common_definition): New.
+ (_bfd_elf_common_section_index): New.
+ (_bfd_elf_common_section): New.
+
+ * elfxx-target.h (elf_backend_common_definition): New.
+ (elf_backend_common_section_index): New.
+ (elf_backend_common_section): New.
+ (elf_backend_merge_symbol): New.
+ (elfNN_bed): Initialize common_definition, common_section_index,
+ common_section, and merge_symbol.
+
+ * section.c (BFD_FAKE_SECTION): New.
+ (STD_SECTION): Use it.
+ * bfd-in2.h: Regenerated.
+
+2005-07-23 Olaf Hering <olh at suse.de>
+
+ * elflink.c (elf_link_input_bfd): Add '\n' for linker einfo
+ callback.
+
+2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * config.bfd: Remove i[3-7]86-*-rtemself*.
+ Remove sparc-*-rtemself*.
+
+2005-07-22 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_check_relocs): Fix pc count for
+ R_M32R_REL32.
+
+2005-07-21 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (BFD32_BACKENDS): Remove cf-m68klynx.lo.
+ (BFD32_BACKENDS): Likewise, remove m68klynx.lo.
+ (BFD32_BACKENDS_CFILES): Remove cf-m68klynx.c, m68klynx.c.
+ (cf-m68klynx.lo, m68klynx.lo): Remove targets.
+ * Makefile.in: Regenerate.
+ * cf-m68klynx.c: Remove.
+ * m68klynx.c: Likewise.
+ * configure.in (m68klynx_aout_vec): Remove vector.
+ (m68klynx_coff_vec): Likewise.
+ * configure: Regenerate.
+ * targets.c (m68klynx_aout_vec): Remove extern.
+ (m68klynx_coff_vec): Likewise.
+ (_bfd_target_vector): Remove m68klynx_{aout,coff}_vec.
+ * po/SRC-POTFILES.in: Remove cf-m68klynx.c, m68klynx.c.
+
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_howto_table): Support R_M32R_REL32.
+ (m32r_reloc_map): Likewise.
+ (m32r_elf_relocate_section): Likewise.
+ (m32r_elf_gc_sweep_hook): Likewise.
+ (m32r_elf_check_relocs): Likewise.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * reloc.c: Add M32C and MS1 relocs.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * config.bfd: Move m32c entry to correct location.
+ * archures.c: Likewise.
+ * configure.in: Likewise.
+ * configure: Regenerate.
+ * targets.c: Move ms1 vector to correct location.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * elf32-i386.c (elf_howto_table): Adjust overflow complaint handler
+ for R_386_PC16.
+ * elf64-x86-64.c (x86_64_elf_howto_table): Adjust overflow complaint
+ handler for R_X86_64_PC16, R_X86_64_8, and R_X86_64_DTPOFF.
+
+2005-07-16 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ PR ld/1021
+ PR ld/1031
+ * elflink.c (elf_link_add_object_symbols): Also append the version
+ name to non-hidden absolute symbols that are functions.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_set_sdata_syms): Return void. Remove hack
+ for zero size sections. Don't set .sbss syms here.
+ * elf32-ppc.h (ppc_elf_set_sdata_syms): Adjust prototype.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2005-07-15 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (vsprint_msg): Add prototype.
+ (build_encoding_error_message): Delete. Code moved into....
+ (elf_xtensa_do_reloc): ....here, and changed to give better
+ error messages for out of range literals.
+
+2005-07-15 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (bfd_elf_record_link_assignment): Remove output_bfd param.
+ (_bfd_elf_provide_symbol): Allow redefinition of weak syms and those
+ defined in output sections. Call bfd_elf_record_link_assignment.
+ * bfd-in.h (bfd_elf_record_link_assignment): Update prototype.
+ * bfd-in2.h: Regenerate.
+
+2005-07-14 Jim Blandy <jimb at redhat.com>
+
+ Add support for m32c-*-elf (Renesas m32c and m16c).
+ * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
+ (ALL_MACHINES_CFILES): Add cpu-m32c.c.
+ (BFD32_BACKENDS): Add elf32-m32c.lo.
+ (BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
+ (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
+ * Makefile.in: Regenerated.
+ * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
+ arch and mach codes.
+ (bfd_m32c_arch): New arch info object.
+ (bfd_archures_list): List bfd_m32c_arch.
+ * bfd-in2.h: Regenerated.
+ * config.bfd: Add case for the m32c.
+ * configure.in: Add case for the m32c.
+ * configure: Regenerated.
+ * cpu-m32c.c, elf32-m32c.c: New files.
+ * libbfd.h: Regenerated.
+ * targets.c (bfd_elf32_m32c_vec): Declare.
+ (_bfd_target_vector): List bfd_elf32_m32c_vec.
+
+2005-07-14 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (_bfd_elf_fix_excluded_sec_syms): Declare.
+ (_bfd_elf_provide_section_bound_symbols): Remove param name.
+ Formatting.
+ * bfd-in2.h: Regenerate.
+ * elflink.c (bfd_elf_gc_sections): Don't call generic function.
+ (_bfd_elf_provide_symbol): Formatting.
+ (_bfd_elf_provide_section_bound_symbols): Remove all hacks, just
+ create section relative syms.
+ (fix_syms, _bfd_elf_fix_excluded_sec_syms): New functions.
+ * elf32-ppc.c (ppc_elf_set_sdata_syms): Use
+ _bfd_elf_provide_section_bound_symbols.
+ * reloc.c (bfd_mark_used_section): Delete.
+ (bfd_generic_gc_sections): Don't call the above.
+
+2005-07-14 Paul Woegerer <paul.woegerer at nsc.com>
+
+ PR 1063
+ * cache.c (bfd_last_cache): Initialise to NULL.
+
+2005-07-14 Daniel Marques <marques at cs.cornell.edu>
+ Nick Clifton <nickc at redhat.com>
+
+ * coff-alpha.c (alpha_ecoff_bad_format_hook): Detect compressed
+ Alpha binaries and issue a helpful error message.
+ (alpha_ecoff_swap_reloc_out): Increase maximum allowed internal
+ symbol index to 15 to allow for binaries produced by DEC
+ compilers.
+
+2005-07-13 Steve Ellcey <sje at cup.hp.com>
+
+ * bfd.m4 (BFD_NEED_DECLARATION): Remove.
+
+2005-07-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_relocate_section): Don't use a plt stub
+ when !can_plt_call.
+
+2005-07-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-xtensa.c (bfd_elf_xtensa_reloc): Warning fix.
+
+2005-07-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_set_sdata_syms): Correct __sbss_start value.
+
+2005-07-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_symbol_refs_local_p): Revert the last
+ change.
+
+2005-07-08 Paul Koning <pkoning at equallogic.com>
+
+ * dwarf2.c (read_address): Check sign_extend_vma to handle targets
+ where addresses are sign extended.
+
+2005-07-08 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * config.bfd: Mark i960-*-rtems*, or32-*-rtems* as obsolete.
+ Mark a29k-*rtems*, hppa*-*-rtems*, *-go32-rtems*,
+ i[3-7]86*-*-rtemscoff*, mips*el-*-rtems*, powerpcle-*-rtems*,
+ sparc*-*-rtemsaout* as removed
+
+2005-07-08 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-hppa.h (elf_hppa_final_link): Use gp val of zero when none
+ of the usual sections are found.
+ * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Tidy.
+ Strip .dynbss if it is zero size.
+ * elf32-arm.c (elf32_arm_size_dynamic_sections): Likewise.
+ * elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
+ * elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
+ * elf32-i370.c (i370_elf_size_dynamic_sections): Likewise, and
+ .dynsbss.
+ (i370_elf_finish_dynamic_sections): Don't attempt to write .got
+ when it is zero size.
+ * elf32-i386.c (elf_i386_size_dynamic_sections): Correct handling
+ of .dynbss and zero size sections.
+ * elf32-m32r.c (m32r_elf_size_dynamic_sections): Strip .dynbss if
+ it is zero size.
+ * elf32-m68k.c (elf_m68k_size_dynamic_sections): Tidy. Strip
+ .dynbss if zero size.
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise, .dynsbss
+ too.
+ * elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
+ * elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
+ * elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
+ * elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Tidy. Strip
+ .plt.* and .got.plt.* if zero size.
+ * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Tidy. Strip
+ .got* and .dynbss if zero size.
+ * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Tidy. Strip
+ * elf64-ppc.c (create_linkage_sections): Create branch lookup table
+ in .data.rel.ro.brlt or .rodata.brlt, and similarly for associated
+ reloc section.
+ (create_got_section): Always create new .got and .rela.got sections.
+ (ppc64_elf_size_dynamic_sections): Tidy. Strip .dynbss if zero size.
+ * elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
+ * elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_size_dynamic_sections): Handle
+ dynamic bss sections correctly.
+ * elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Tidy.
+ * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Tidy. Strip
+ .dynbss if zero size.
+
+2005-07-08 Ben Elliston <bje at au.ibm.com>
+
+ * elf32-xtensa.c: Include <stdarg.h> unconditionally, not only
+ when ANSI_PROTOTYPES is defined. Remove #ifdef logic.
+
+2005-07-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_backend_data): Add special_sections.
+
+ * elf.c (_bfd_elf_get_sec_type_attr): Check special_sections
+ first.
+
+ * elf32-arm.c (elf_backend_get_sec_type_attr): Removed.
+ (elf_backend_special_sections): New. Defined.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68hc11.c: Likewise.
+ * elf32-m68hc12.c: Likewise.
+ * elf32-mcore.c: Likewise.
+ * elf32-sh64.c: Likewise.
+ * elf32-v850.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * elfxx-mips.h: Likewise.
+
+ * elfxx-target.h (elf_backend_special_sections): New.
+ (elfNN_bed): Initialize special_sections.
+
+2005-07-07 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-modules.c: Update tables with Xtensa MMU features.
+
+2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
+
+ * elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
+ format bugs.
+ * vms.h (_bfd_vms_debug): Add format attribute.
+ (_bfd_vms_debug, _bfd_hexdump): Fix typos.
+
+2005-07-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 975
+ * elflink.c (_bfd_elf_symbol_refs_local_p): Only undefined
+ symbol with default visibility is local.
+
+2005-07-07 Ben Elliston <bje at gnu.org>
+
+ * config.bfd: Mark m68*-*-rtemscoff as obsolete.
+
+2005-07-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dwarf2.c (varinfo): Add addr.
+ (lookup_symbol_in_variable_table): Also check addr.
+ (scan_unit_for_symbols): Set addr for variable.
+ (comp_unit_find_line): Updated.
+
+2005-07-06 Nick Clifton <nickc at redhat.com>
+
+ * coff-alpha.c (alpha_adjust_reloc_in): Issue an informative error
+ message if an unknown reloc is encountered.
+ (alpha_relocate_section): Likewise.
+
+ * ecoff.c (_bfd_ecoff_write_object_contents): Cope with a reloc
+ with a missing howto field.
+
+2005-07-06 Alan Modra <amodra at bigpond.net.au>
+
+ * po/SRC-POTFILES.in: Add cpu-ms1.c, elf32-ms1.c, elf-vxworks.c,
+ elfxx-sparc.c.
+
+2005-07-05 Paul Brook <paul at codesourcery.com>
+
+ * elf32-ppc.c (ppc_elf_vxworks_special_sections): Remove.
+ (ppc_elf_vxworks_get_sec_type_attr): New function.
+ (elf_backend_special_sections): Remove vxwords definition.
+ (elf_backend_get_sec_type_attr): Define for vxworks.
+
+2005-07-05 Nick Clifton <nickc at redhat.com>
+
+ * elf64-ppc.c (ppc64_elf_info_to_howto): Fix typo.
+
+2005-07-05 Paul Brook <paul at codesourcery.com>
+
+ * config.bfd: Add separate case for ppc-vxworks.
+ * configure: Regenerate.
+ * configure.in: Include elf-vxworks.lo on ppc targets.
+ * elf-vxworks.c (elf_vxworks_final_write_processing): Handle
+ .rela.plt.unloaded.
+ * elf32-ppc.c: Add VxWorks target vec. Include elf-vxworks.h.
+ (PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove.
+ (VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry,
+ ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE,
+ ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry,
+ VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS,
+ VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New.
+ (ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt,
+ is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size.
+ (ppc_elf_link_hash_table_create): Initialize hadtab plt fields.
+ (ppc_elf_create_got): Create .got.plt for VxWorks.
+ (ppc_elf_create_dynamic_sections): Create unloaded plt relocation
+ section for VxWorks.
+ (ppc_elf_select_plt_layout): Handle VxWorks plt format.
+ (allocate_got): VxWorks does not need a got header.
+ (allocate_dynrelocs): Handle VxWorks plt format.
+ (ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for
+ VxWorks. Handle VxWorks plt/got.
+ (ppc_elf_finish_dynamic_sections): Fill in VxWorks plt.
+ (ppc_elf_vxworks_special_sections): New.
+ (ppc_elf_vxworks_link_hash_table_create,
+ ppc_elf_vxworks_add_symbol_hook,
+ elf_i386_vxworks_link_output_symbol_hook,
+ ppc_elf_vxworks_final_write_processing): New functions.
+ * targets.c (bfd_elf32_powerpc_vxworks_vec): Declare.
+ (_bfd_target_vector): Use it.
+
+2005-07-05 Jakub Jelinek <jakub at redhat.com>
+
+ * libbfd-in.h (struct artdata): Add extended_names_size field.
+ * libbfd.h: Rebuilt.
+ * coff-rs600.c (_bfd_xcoff_archive_p): Don't clear fields in freshly
+ allocated object by bfd_zalloc.
+ * coff64-rs6000.c (xcoff64_archive_p): Likewise.
+ * ecoff.c (_bfd_ecoff_archive_p): Likewise.
+ * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p): Likewise.
+ (get_extended_arelt_filename): Fail if index is bigger or equal to
+ extended_names_size.
+ (_bfd_generic_read_ar_hdr_mag): Don't set bfd_error_malformed_archive,
+ get_extended_arelt_filename already did that.
+ (_bfd_slurp_extended_name_table): Initialize extended_names_size field.
+ Allocate one extra byte and clear it, in case extended names table
+ is not terminated.
+
+ * libbfd-in.h (bfd_malloc2, bfd_realloc2, bfd_zmalloc2, bfd_alloc2,
+ bfd_zalloc2): New prototypes.
+ * bfd-in.h (HALF_BFD_SIZE_TYPE): Define.
+ * libbfd.c (bfd_malloc2, bfd_realloc2, bfd_zmalloc2): New functions.
+ * opncls.c (bfd_alloc2, bfd_zalloc2): New functions.
+ * elf.c (bfd_elf_get_elf_syms, setup_group, assign_section_numbers,
+ elf_map_symbols, map_sections_to_segments,
+ assign_file_positions_for_segments, copy_private_bfd_data,
+ swap_out_syms, _bfd_elf_slurp_version_tables): Use bfd_*alloc2
+ where appropriate.
+ * bfd-in2.h: Rebuilt.
+ * libbfd.h: Rebuilt.
+
+ * elf.c (_bfd_elf_print_private_bfd_data): Don't crash on bogus
+ verdef or verneed section.
+ (_bfd_elf_slurp_version_tables): Handle corrupt verdef and/or
+ verneed sections gracefully.
+ * elfxx-sparc.c (_bfd_sparc_elf_info_to_howto_ptr): Don't crash on
+ bogus relocation values.
+ * elf64-ppc.c (ppc64_elf_info_to_howto): Likewise.
+ * elf64-s390.c (elf_s390_info_to_howto): Likewise.
+ * elf32-s390.c (elf_s390_info_to_howto): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_info_to_howto): Likewise.
+ * elfxx-ia64.c (lookup_howto): Likewise.
+
+ * elf.c (bfd_elf_get_str_section): Allocate an extra byte after
+ the end of strtab and clear it.
+ (elf_read): Remove.
+
+2005-07-05 Nick Clifton <nickc at redhat.com>
+
+ * po/vi.po: New Vietnamese translation.
+ * configure.in (ALL_LINGUAS): Add vi.
+ * configure: Regenerate.
+
+2005-07-05 Peter S. Mazinger <ps.m at gmx.net>
+
+ * elf32-arm.c (elf32_arm_size_dynamic_sections): Fix a typo and
+ touchup logic like i386/ppc.
+
+2005-07-05 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (special_sections): Move const qualifier.
+ (special_sections_b..special_sections_t): Likewise.
+ * elf32-arm.c (elf32_arm_symbian_get_sec_type_attr): Remove duplicate
+ const.
+ (elf32_arm_symbian_special_sections): Move const qualifier.
+ * elf32-m32r.c: Similarly.
+ * elf32-m68hc11.c: Similarly.
+ * elf32-m68hc12.c: Similarly.
+ * elf32-mcore.c: Similarly.
+ * elf32-ppc.c: Similarly.
+ * elf32-sh64.c: Similarly.
+ * elf32-v850.c: Similarly.
+ * elf32-xtensa.c: Similarly.
+ * elf64-alpha.c: Similarly.
+ * elf64-hppa.c: Similarly.
+ * elf64-ppc.c: Similarly.
+ * elf64-sh64.c: Similarly.
+ * elfxx-ia64.c: Similarly.
+ * elfxx-mips.c: Similarly.
+
+2005-07-04 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * elf32-m32r.c (m32r_elf_size_dynamic_sections): Use
+ info->executable instead of !info->shared where appropriate.
+
+2005-07-04 Alan Modra <amodra at bigpond.net.au>
+
+ PR 1042
+ * elf.c (assign_file_positions_for_segments): Remove excluded
+ sections from the segment map.
+
+2005-07-04 Alan Modra <amodra at bigpond.net.au>
+
+ PR 1004
+ * elf-bfd.h (struct elf_backend_data): Add get_sec_type_attr. Delete
+ special_sections.
+ (_bfd_elf_get_special_section): Declare.
+ (bfd_elf_special_section): Update prototype.
+ * elf.c (special_sections): Remove unused outer entries.
+ (get_special_section): Delete.
+ (_bfd_elf_get_special_section): New function.
+ (_bfd_elf_get_sec_type_attr): Replace "name" arg with "sec". Update
+ special_sections indexing.
+ (_bfd_elf_new_section_hook): Call backend get_sec_type_attr.
+ * elf32-arm.c (symbian_special_sections_d): Delete.
+ (symbian_special_sections_g, symbian_special_sections_h): Delete.
+ (symbian_special_sections_i, symbian_special_sections_f): Delete.
+ (symbian_special_sections_p): Delete.
+ (elf32_arm_symbian_special_sections): Merge above to here.
+ (elf32_arm_symbian_get_sec_type_attr): New function.
+ (elf_backend_special_sections): Don't define.
+ (elf_backend_get_sec_type_attr): Define.
+ * elf32-m32r.c: Similarly to elf32-arm.c.
+ * elf32-m68hc11.c: Likewise.
+ * elf32-m68hc12.c: Likewise.
+ * elf32-mcore.c: Likewise.
+ * elf32-sh64.c: Likewise.
+ * elf32-v850.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ (bfd_elf_special_section ppc_alt_plt): New. Use it if .plt loadable.
+ * elfxx-mips.h (_bfd_mips_elf_get_sec_type_attr): Declare.
+ (_bfd_mips_elf_special_sections, elf_backend_special_sections): Delete.
+ (elf_backend_get_sec_type_attr): Define.
+ * elfxx-target.h (elf_backend_get_sec_type_attr): Define.
+ (elf_backend_special_sections): Don't define.
+ (elfNN_bed): Update.
+
+2005-07-01 Nick Clifton <nickc at redhat.com>
+
+ * cpu-d10v.c: Update to ISO C90 style function declarations and
+ fix formatting.
+ * cpu-d30v.c: Likewsie.
+ * cpu-i370.c: Likewsie.
+ * cpu-xstormy16.c: Likewsie.
+ * elf32-arc.c: Likewsie.
+ * elf32-d10v.c: Likewsie.
+ * elf32-d30v.c: Likewsie.
+ * elf32-dlx.c: Likewsie.
+ * elf32-i370.c: Likewsie.
+ * elf32-i960.c: Likewsie.
+ * elf32-ip2k.c: Likewsie.
+ * elf32-m32r.c: Likewsie.
+ * elf32-mcore.c: Likewsie.
+ * elf32-openrisc.c: Likewsie.
+ * elf32-or32.c: Likewsie.
+ * elf32-pj.c: Likewsie.
+ * elf32-v850.c: Likewsie.
+ * elf32-xstormy16.c: Likewsie.
+
+2005-07-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-alpha.c (elf64_alpha_create_got_section): Always create
+ a new .got section.
+ (elf64_alpha_create_dynamic_sections): Always make new sections
+ by using bfd_make_section_anyway_with_flags. Check that .got not
+ already created.
+ (elf64_alpha_check_relocs): Delete "got_created". Use tdata->gotobj
+ instead.
+
+2005-06-30 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Ignore dynamic
+ _SDA_BASE_ and _SDA2_BASE_ symbols.
+ * elflink.c (_bfd_elf_provide_symbol): Correct comment. Define
+ sym if not def_regular.
+ (_bfd_elf_provide_section_bound_symbols): Similarly.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * config.bfd: Mark as obsolete:
+ m68*-apollo-*
+ m68*-apple-aux*
+ m68*-bull-sysv*
+
+2005-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (_bfd_elf_gc_mark): Mark sections referenced by
+ .eh_frame specially..
+ (bfd_elf_gc_sections): ..rather than totally ignoring .eh_frame.
+ Don't recheck sections we have already marked.
+ (elf_gc_sweep): Keep non-code sections referenced from .eh_frame.
+ * section.c (struct bfd_section): Add gc_mark_from_eh.
+ (STD_SECTION): Adjust.
+ * ecoff.c (bfd_debug_section): Adjust.
+ * bfd-in2.h: Regenerate.
+
+2005-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_gc_sweep): Do not refcount on sections that have
+ not been processed by check_relocs.
+
+2005-06-29 Paul Brook <paul at codesourcery.com>
+
+ * bfd-in.h (_bfd_elf_provide_symbol): Update prototype.
+ * bfd-in2.h: Regenerate.
+ * elf32-ppc.c (ppc_elf_set_sdata_syms): Make sdata symbols section
+ relative.
+ * elflink.c (bfd_elf_set_symbol): Add section argument.
+ (_bfd_elf_provide_symbol): Ditto.
+ (_bfd_elf_provide_section_bound_symbols): Pass NULL section argument.
+
+2005-06-27 Carlos O'Donell <carlos at systemhalted.org>
+
+ * bfd/elf32-hppa.c (struct elf32_hppa_stub_hash_entry):
+ Use bh_root, and hh.
+ (struct elf32_hppa_link_hash_entry): Use eh, and hsh_cache.
+ (struct elf32_hppa_dyn_reloc_entry): Use hdh_next.
+ (struct elf32_hppa_link_hash_table): Use etab and bstab.
+ (stub_hash_newfunc): Use hh.
+ (hppa_link_hash_newfunc): Use hsh_cache.
+ (elf32_hppa_link_hash_table_create): Use etab, and bstab.
+ (elf32_hppa_link_hash_table_free): Use bstab.
+ (hppa_stub_name): Use eh.
+ (hppa_get_stub_entry): Use hh, hsh_entry, and hsh_cache.
+ (hppa_add_stub): Use bstab.
+ (hppa_type_of_stub): Use eh.
+ (hppa_build_one_stub): Use hh and bh_root.
+ (elf32_hppa_copy_indirect_symbol): Use hdh_next.
+ (elf32_hppa_check_relocs): Use eh, etab, and hdh_next.
+ (elf32_hppa_gc_sweep_hook): Use hdh_next.
+ (elf32_hppa_adjust_dynamic_symbol): Use hdh_next, and etab.
+ (allocate_plt_static): Use etab.
+ (allocate_dynrelocs): Use etab, and hdh_next.
+ (readonly_dynrelocs): Use hdh_next.
+ (elf32_hppa_size_dynamic_sections): Use etab, and hdh_next.
+ (get_local_syms): Use eh, bstab, and hh.
+ (elf32_hppa_size_stubs): Use eh, bstab, and hh.
+ (elf32_hppa_set_gp): Use etab.
+ (elf32_hppa_build_stubs): Use bstab.
+ (final_link_relocate): Use eh, bh_root.
+ (elf32_hppa_relocate_section): Use elf, etab.
+ (elf32_hppa_finish_dynamic_sections): Use etab.
+
+2005-06-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_hpux_backend_symbol_processing): Remove
+ the extra `;'.
+
+2005-06-21 Carlos O'Donell <carlos at systemhalted.org>
+
+ * bfd/elf32-hppa.c (hppa_elf_hash_entry): Define.
+ (hppa_stub_hash_entry): Define.
+ (stub_hash_newfunc): Rename variables.
+ (hppa_link_hash_newfunc): Likewise.
+ (elf32_hppa_link_hash_table_free): Likewise.
+ (hppa_stub_name): Likewise.
+ (hppa_get_stub_entry): Likewise.
+ (hppa_add_stub): Likewise.
+ (hppa_type_of_stub): Likewise.
+ (hppa_build_one_stub): Likewise.
+ (hppa_size_one_stub): Likewise.
+ (elf32_hppa_create_dynamic_sections): Likewise.
+ (elf32_hppa_copy_indirect_symbol): Likewise.
+ (elf32_hppa_check_relocs): Likewise.
+ (elf32_hppa_gc_mark_hook): Likewise.
+ (elf32_hppa_gc_sweep_hook): Likewise.
+ (elf32_hppa_grok_psinfo): Likewise.
+ (elf32_hppa_hide_symbol): Likewise.
+ (elf32_hppa_adjust_dynamic_symbol): Likewise.
+ (allocate_dynrelocs): Likewise.
+ (clobber_millicode_symbols): Likewise.
+ (readonly_dynrelocs): Likewise.
+ (elf32_hppa_size_dynamic_sections): Likewise.
+ (get_local_syms): Likewise.
+ (elf32_hppa_size_stubs): Likewise.
+ (hppa_record_segment_addr): Likewise.
+ (final_link_relocate): Likewise.
+ (elf32_hppa_relocate_section): Likewise.
+ (elf32_hppa_finish_dynamic_symbol): Likewise.
+
+2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1025
+ * elf-m10300.c (mn10300_elf_check_relocs): Handle indirect
+ symbol.
+ * elf32-arm.c (elf32_arm_check_relocs): Likewise.
+ * elf32-avr.c (elf32_avr_check_relocs): Likewise.
+ * elf32-cris.c (cris_elf_check_relocs): Likewise.
+ * elf32-d10v.c (elf32_d10v_check_relocs): Likewise.
+ * elf32-dlx.c (elf32_dlx_check_relocs): Likewise.
+ * elf32-fr30.c (fr30_elf_check_relocs): Likewise.
+ * elf32-frv.c (elf32_frv_check_relocs): Likewise.
+ * elf32-i370.c (i370_elf_check_relocs): Likewise.
+ * elf32-iq2000.c (iq2000_elf_check_relocs): Likewise.
+ * elf32-m32r.c (m32r_elf_check_relocs): Likewise.
+ * elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise.
+ * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
+ * elf32-mcore.c (mcore_elf_check_relocs): Likewise.
+ * elf32-ms1.c (ms1_elf_check_relocs): Likewise.
+ * elf32-msp430.c (elf32_msp430_check_relocs): Likewise.
+ * elf32-openrisc.c (openrisc_elf_check_relocs): Likewise.
+ * elf32-ppc.c (ppc_elf_check_relocs): Likewise.
+ * elf32-s390.c (elf_s390_check_relocs): Likewise.
+ * elf32-sh.c (sh_elf_check_relocs): Likewise.
+ * elf32-v850.c (v850_elf_check_relocs): Likewise.
+ * elf32-vax.c (elf_vax_check_relocs): Likewise.
+ * elf64-mmix.c (mmix_elf_check_relocs): Likewise.
+ * elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
+ * elf64-s390.c (elf_s390_check_relocs): Likewise.
+ * elf64-sh64.c (sh_elf64_check_relocs): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
+ * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
+
+2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1022
+ * elf32-hppa.c (elf32_hppa_check_relocs): Handle indirect
+ symbol.
+
+2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1025
+ * elf32-i386.c (elf_i386_check_relocs): Handle indirect symbol.
+ * elf64-x86-64.c (elf64_x86_64_check_relocs): Likewise.
+
+2005-06-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * reloc.c: Add BFD_RELOC_X86_64_GOTOFF64 and
+ BFD_RELOC_X86_64_GOTPC32.
+ * bfd-in2.h: Regenerated.
+
+2005-06-17 Jakub Jelinek <jakub at redhat.com>
+
+ * elf.c (bfd_section_from_shdr): Kill bogus warning.
+
+ * elf.c (bfd_section_from_shdr): Fail if sh_entsize is bogus for
+ symbol, relocation, group or versym sections.
+
+ * coffcode.h (coff_slurp_reloc_table): Don't crash if native_relocs
+ is NULL.
+ * peXXigen.c (pe_print_idata): Don't crash if dll_name or start_address
+ doesn't point into the section.
+
+2005-06-17 Jan Beulich <jbeulich at novell.com>
+
+ * bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
+ and BFD_RELOC_X86_64_GOTPC32.
+ * libbfd.h (bfd_reloc_code_real_names): Likewise.
+ * elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
+ R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
+ (x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
+ and R_X86_64_GOTPC32.
+ (elf64_x86_64_info_to_howto): Adjust bounding relocation type.
+ (elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
+ R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
+ (elf64_x86_64_relocate_section): Likewise.
+ (elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
+
+2005-06-15 Mark Kettenis <kettenis at gnu.org>
+
+ * archive.c: Include "libiberty.h".
+
+2005-06-15 Nick Clifton <nickc at redhat.com>
+
+ * elf32-v850.c (ELF_MACHINE_ALT2): Define so that binaries
+ produced by the GreenHills toolchain can be assimilated.
+
+2005-06-14 Steve Ellcey <sje at cup.hp.com>
+
+ * som.c (som_find_inliner_info): New.
+
+2005-06-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Fix a typo in comment.
+
+2005-06-14 Jakub Jelinek <jakub at redhat.com>
+
+ * elf.c (bfd_section_from_shdr): Fail if name is NULL.
+ Prevent endless recursion on broken objects.
+
+ * archive.c (do_slurp_coff_armap): Check for overflows.
+
+2005-06-10 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elfcode.h (elf_write_relocs): Do nothing if there are no
+ relocations.
+
+2005-06-10 Alan Modra <amodra at bigpond.net.au>
+
+ * dwarf2.c (decode_line_info): Revert last change. Instead set
+ initial low_pc to -1 to avoid need to test whether loc_pc has
+ been set.
+
+2005-06-09 Christopher Faylor <cgf at timesys.com>
+
+ * coffcode.h (sec_to_styp_flags): Set appropriate section flags when
+ either SEC_ALLOC OR SEC_LOAD.
+
+2005-06-09 Christopher Faylor <cgf at timesys.com>
+
+ * coffcode.h (sec_to_styp_flags): Remove read/write flags from noload
+ section header. Do not add STYP_NOLOAD since it does not appear to be
+ a valid PE flag.
+
+2005-06-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1000
+ * dwarf2.c (lookup_address_in_line_info_table): Restore code
+ handling NULL function info, removed with 2005-04-03 change.
+
+2005-06-08 Mark Mitchell <mark at codesourcery.com>
+
+ * opncls.c (bfd_fopen): Mark returned BFD as cacheable if FD == -1.
+
+2005-06-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_mark_used_section): Delete.
+ (bfd_elf_gc_sections): Call bfd_generic_gc_sections.
+ * reloc.c (bfd_mark_used_section): New function.
+ (bfd_generic_gc_sections): Call bfd_mark_used_section.
+
+2005-06-08 Alan Modra <amodra at bigpond.net.au>
+
+ * opncls.c (bfd_fopen): Don't set bfd_error unconditionally.
+ (bfd_fdopenr): Same.
+
+2005-06-07 Mark Mitchell <mark at codesourcery.com>
+
+ * opncls.c (bfd_fdopenr): Add missing break statements.
+
+2005-06-07 Mark Mitchell <mark at codesourcery.com>
+
+ * opncls.c (bfd_fopen): New API.
+ (bfd_openr): Use it.
+ (bfd_fdopenr): Likewise.
+ * bfd-in2.h: Regenerated.
+
+2005-06-07 Aldy Hernandez <aldyh at redhat.com>
+ Michael Snyder <msnyder at redhat.com>
+ Stan Cox <scox at redhat.com>
+
+ * Makefile.am (ALL_MACHINES): Add ms1 support.
+ (ALL_MACHINES_CFILES): Same.
+ (BFD32_BACKENDS): Same.
+ (BFD32_BACKENDS_CFILES): Same.
+
+ * Makefile.in: Regenerate.
+
+ * archures.c (bfd_architecture): Add ms1 entries.
+ Externalize bfd_ms1_arch.
+ (bfd_archures_list): Add bfd_ms1_arch.
+
+ * bfd-in2.h: Regenerate.
+
+ * cpu-ms1.c: New file.
+
+ * elf32-ms1.c: New file.
+
+ * targets.c: Define extern of bfd_elf32_ms1_vec.
+ Add bfd_elf32_ms1_vec to _bfd_target_vector.
+
+ * configure.in: Add bfd_elf32_ms1_vec case.
+
+ * configure: Regenerate.
+
+ * config.bfd: Add ms1-*-elf to table.
+
+2005-06-07 Zack Weinberg <zack at codesourcery.com>
+
+ * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment.
+
+2005-06-07 Alan Modra <amodra at bigpond.net.au>
+
+ * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Init _bfd_find_line.
+ * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Likewise.
+
+2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 990
+ * bfd.c (bfd_find_line): New.
+
+ * dwarf2.c (comp_unit): Add variable_table.
+ (funcinfo): Add file, line, and sec.
+ (varinfo): New.
+ (lookup_symbol_in_function_table): New.
+ (lookup_symbol_in_variable_table): New.
+ (scan_unit_for_functions): Renamed to ...
+ (scan_unit_for_symbols): This. Handle DW_TAG_entry_point and
+ DW_TAG_variable.
+ (comp_unit_find_nearest_line): Updated.
+ (comp_unit_find_line): New.
+ (_bfd_dwarf2_find_line): New.
+
+ * elf-bfd.h (_bfd_elf_find_line): New.
+ (_bfd_generic_find_line): New. Defined.
+
+ * elf.c (_bfd_elf_find_line): New.
+
+ * libbfd-in.h (_bfd_dwarf2_find_line): New.
+ (_bfd_generic_find_line): New.
+
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Likewise.
+
+ * libbfd.c (_bfd_generic_find_line): New.
+
+ * targets.c (BFD_JUMP_TABLE_SYMBOLS): Initialize _bfd_find_line
+ with _bfd_generic_find_line.
+ (bfd_target): Add _bfd_find_line.
+
+2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dwarf2.c (decode_line_info): Properly set low_pc.
+
+2005-06-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-pcc.c (ppc64_elf_gc_mark_hook): For the local sym in .opd
+ case, include addend when indexing .opd section map.
+ (ppc64_elf_edit_opd): Add no_opd_opt param. Do nothing besides
+ clear opd_adjust array if no_opd_opt set. Tidy code.
+ Ignore zero size .opd. Check bfd_alloc return value.
+ (ppc_stub_name): Return immediately on bfd_malloc fail.
+ * elf64-ppc.h (ppc64_elf_edit_opd): Update prototype.
+
+2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dwarf2.c (comp_unit): Fix a typo in comment.
+
+2005-06-03 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * elf32-vax.c (rtype_to_howto): Remove PARAMS.
+ (reloc_type_lookup): Dito.
+ (elf_vax_discard_copies): Dito.
+ (elf_vax_instantiate_got_entries): Dito.
+ (elf_vax_link_hash_traverse): Dito.
+ (elf_vax_link_hash_newfunc): Dito.
+ (elf_vax_link_hash_table_create): Dito.
+ (elf32_vax_set_private_flags): Dito.
+ (elf32_vax_merge_private_bfd_data): Dito.
+ (elf32_vax_print_private_bfd_data): Dito.
+ (elf_vax_check_relocs): Dito.
+ (elf_vax_gc_mark_hook): Dito.
+ (elf_vax_gc_sweep_hook): Dito.
+ (elf_vax_size_dynamic_sections): Dito.
+ (elf_vax_discard_copies): Dito.
+ (elf_vax_instantiate_got_entries): Dito.
+ (elf_vax_relocate_section): Dito.
+ (elf_vax_finish_dynamic_symbol): Dito.
+ (elf_vax_finish_dynamic_sections): Dito.
+ (elf_vax_hash_table): Break-up of line isn't needed.
+ (elf_vax_check_relocs): Remove leading whitespace
+ (elf_vax_relocate_section): Remove redundant whitespace
+ (elf_vax_link_hash_newfunc): Don't cast NULL.
+ (elf_vax_link_hash_table_create): Dito.
+ * cpu-vax.c (bfd_vax_arch) Remove a trailing space.
+
+2005-06-03 Alan Modra <amodra at bigpond.net.au>
+
+ PR 568
+ * configure.in: Bump version
+ * configure: Regenerate.
+ * elflink.c (elf_link_input_bfd): Use einfo linker callback to print
+ discarded section sym refs and kill linker output.
+ * simple.c (simple_dummy_einfo): New function.
+ (bfd_simple_get_relocated_section_contents): Init callbacks.einfo.
+
+ * elf32-i386.c (elf_i386_relocate_section): Handle zero symndx
+ for all reloc types.
+
+2005-06-02 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (add_symbol_adjust): Set sym visibility to most
+ restrictive of func code and func descr for undefined syms as well
+ as defined.
+
+2005-05-31 Jim Blandy <jimb at redhat.com>
+
+ * Makefile.am: Regenerate dependencies with 'make dep-am'.
+ * Makefile.in: Regenerate.
+
+2005-05-31 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (ALPHA_ELF_LINK_HASH_LU_JSRDIRECT): New.
+ (ALPHA_ELF_LINK_HASH_TLS_IE): Renumber to 0x80.
+ (ALPHA_ELF_LINK_HASH_LU_PLT): Rename from ALPHA_ELF_LINK_HASH_LU_FUNC.
+ (elf64_alpha_want_plt): Update to match.
+ (elf64_alpha_check_relocs): Collect JSRDIRECT in gotent_flags.
+ (elf64_alpha_relax_with_lituse): Likewise. Handle JSRDIRECT.
+
+2005-05-31 Zack Weinberg <zack at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_reloc_type_lookup)
+ (elf32_arm_nabi_grok_prstatus, elf32_arm_nabi_grok_psinfo):
+ Use ISO C90 function declaration style.
+
+2005-05-31 James E Wilson <wilson at specifixinc.com>
+
+ * elfcode.h (NAME(bfd_elf,bfd_from_remote_memory)): Check for program
+ header PF_R flag on PT_LOAD segments.
+
+2005-05-30 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_relocate_section): Use dtp_base for
+ the zero index relocs produced by elf64_alpha_relax_tls_get_addr.
+
+2005-05-29 Richard Henderson <rth at redhat.com>
+
+ * configure.in (--enable-secureplt): New.
+ * elf64-alpha.c (INSN_LDA, INSN_LDAH, INSN_LDQ, INSN_BR): New.
+ (INSN_SUBQ, INSN_S4SUBQ, INSN_JMP): New.
+ (INSN_A, INSN_AB, INSN_ABC, INSN_ABO, INSN_AD): New.
+ (elf64_alpha_use_secureplt): New.
+ (OLD_PLT_HEADER_SIZE, OLD_PLT_ENTRY_SIZE): New.
+ (NEW_PLT_HEADER_SIZE, NEW_PLT_ENTRY_SIZE): New.
+ (PLT_HEADER_SIZE, PLT_ENTRY_SIZE): Conditionalize on secureplt.
+ (ALPHA_ELF_LINK_HASH_PLT_LOC): Remove.
+ (struct alpha_elf_link_hash_entry): Add plt_offset.
+ (PLT_HEADER_WORD1, PLT_HEADER_WORD2, PLT_HEADER_WORD3): Remove.
+ (PLT_HEADER_WORD4, PLT_ENTRY_WORD1, PLT_ENTRY_WORD2): Remove.
+ (PLT_ENTRY_WORD3): Remove.
+ (elf64_alpha_create_dynamic_sections): If secureplt, set SEC_READONLY
+ on .plt and create .got.plt.
+ (elf64_alpha_output_extsym): Remove .plt frobbing for symbol values.
+ (get_got_entry): Initialize plt_offset.
+ (elf64_alpha_want_plt): New.
+ (elf64_alpha_check_relocs): Use it.
+ (elf64_alpha_adjust_dynamic_symbol): Likewise. Don't allocate
+ plt entries here.
+ (elf64_alpha_calc_got_offsets_for_symbol): Don't report internal
+ error as user error.
+ (elf64_alpha_size_plt_section_1): Allocate one plt entry per
+ got subsection.
+ (elf64_alpha_size_plt_section): Size .got.plt section.
+ (elf64_alpha_size_rela_got_1): Don't allocate relocations if
+ plt entries used.
+ (elf64_alpha_size_dynamic_sections): Call elf64_alpha_size_plt_section.
+ Add PLTRO DYNAMIC entry.
+ (elf64_alpha_finish_dynamic_symbol): Generate secureplt format.
+ (elf64_alpha_finish_dynamic_sections): Likewise.
+
+2005-05-28 David Daney <ddaney at avtrex.com>
+
+ * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Move
+ calculation of DT_RELSZ to occur after all dynamic relocations
+ are created.
+
+2005-05-28 Eli Zaretskii <eliz at gnu.org>
+
+ * configure.in: Add snprintf and vsnprintf to AC_CHECK_DECLS.
+ * config.in, configure: Regenerate.
+
+2005-05-26 Mark Kettenis <kettenis at gnu.org>
+ Maciej W. Rozycki <macro at linux-mips.org>
+
+ * elfxx-mips.c (_bfd_mips_elf_section_processing): Warn and
+ stop processing of options if one of invalid size is
+ encountered.
+ (_bfd_mips_elf_section_from_shdr): Likewise.
+ (_bfd_mips_elf_fake_sections): Reset the type of empty special
+ sections.
+
+2005-05-26 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (struct alpha_elf_link_hash_entry): Remove
+ plt_old_section, plt_old_value.
+ (elf64_alpha_adjust_dynamic_symbol): Don't set it.
+ (elf64_alpha_size_plt_section_1): Don't use it.
+
+2005-05-26 Jakub Jelinek <jakub at redhat.com>
+
+ * elfcode.h (elf_object_p): Fail if e_shoff != 0, e_shnum == 0 and
+ first shdr has sh_size == 0. Fail if e_shnum is large to cause
+ arithmetic overflow when allocating the i_shdr array.
+ Sanity check sh_link and sh_info fields. Fix e_shstrndx sanity check.
+
+2005-05-25 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c: Update all function definitions to ISO C. Remove
+ all function prototypes; rearrange functions into def-use order.
+
+2005-05-25 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_merge_gots): Fix gotent iteration
+ in the presence of deleting elements.
+ (elf64_alpha_size_got_sections): Zero dead got section size.
+
+2005-05-23 Fred Fish <fnf at specifixinc.com>
+
+ * dwarf2.c (struct dwarf2_debug): Add inliner_chain member.
+ (struct funcinfo): Add caller_func, caller_file, caller_line.
+ tag, and nesting_level members.
+ (lookup_address_in_function_table): Change first passed parameter
+ from "struct funcinfo *" to "struct comp_unit *".
+ (lookup_address_in_function_table): Dereference unit to find function
+ table.
+ (lookup_address_in_function_table): Traverse the function list to
+ create a chain of inlined functions back to the first non inlined
+ function.
+ (scan_unit_for_functions): Remember tag and nesting level. Handle
+ DW_AT_call_file and DW_AT_call_line.
+ (comp_unit_find_nearest_line): Adjust lookup_address_in_function_table
+ call to pass unit pointer instead of function table pointer. For
+ inlined functions, save pointer to the inliner chain.
+ (_bfd_dwarf2_find_nearest_line): Initialize inliner_chain to NULL.
+ (_bfd_dwarf2_find_inliner_info): New function that returns information
+ from the inliner chain after a call to bfd_find_nearest_line.
+
+ * bfd.c (bfd_find_inliner_info): Define using BFD_SEND.
+ * targets.c (BFD_JUMP_TABLE_SYMBOLS): Add entry for
+ NAME##_find_inliner_info.
+ (bfd_target): Add _bfd_find_inliner_info.
+ * bfd-in2.h: Regenerate.
+
+ * libbfd-in.h (_bfd_nosymbols_find_inliner_info): Define as
+ macro that always returns bfd_false.
+ (_bfd_dwarf2_find_inliner_info): Declare.
+ * libbfd.h: Regenerate.
+
+ * elf32-arm.c (elf32_arm_find_inliner_info): New function
+ that calls _bfd_dwarf2_find_inliner_info.
+ (bfd_elf32_find_inliner_info): Define to elf32_arm_find_inliner_info.
+
+ * elfxx-mips.c (_bfd_mips_elf_find_inliner_info): New function
+ that calls _bfd_dwarf2_find_inliner_info.
+ * elfxx-mips.h (_bfd_mips_elf_find_inliner_info): Declare.
+ * elfn32-mips.c (bfd_elf32_find_inliner_info): Define to
+ _bfd_mips_elf_find_inliner_info.
+ * elf64-mips.c (bfd_elf64_find_inliner_info): Ditto.
+ * elf32-mips.c (bfd_elf32_find_inliner_info): Ditto.
+
+ * elf.c (_bfd_elf_find_inliner_info): New function that calls
+ _bfd_dwarf2_find_inliner_info.
+ * elf-bfd.h (_bfd_elf_find_inliner_info): Declare.
+ * elfxx-target.h (bfd_elfNN_find_inliner_info): Define to
+ _bfd_elf_find_inliner_info.
+
+ * coffgen.c (coff_find_inliner_info): New function that
+ calls _bfd_dwarf2_find_inliner_info.
+ * libcoff-in.h (coff_find_inliner_info): Declare.
+ * libcoff.h: Regenerate.
+ * coff-rs6000.c (rs6000coff_vec): Add coff_find_inliner_info.
+ (pmac_xcoff_vec) Ditto.
+ * coff64-rs6000.c (rs6000coff64_vec): Ditto.
+ (aix5coff64_vec): Ditto.
+
+ * aout-target.h (MY_find_inliner_info): Define as
+ _bfd_nosymbols_find_inliner_info.
+ * aout-tic30.c (MY_find_inliner_info): Ditto.
+ * binary.c (binary_find_inliner_info): Ditto.
+ * i386msdos.c (msdos_find_inliner_info): Ditto.
+ * ihex.c (ihex_find_inliner_info): Ditto.
+ * libaout.h (aout_32_find_inliner_info): Ditto.
+ * libecoff.h (_bfd_ecoff_find_inliner_info): Ditto.
+ * mach-o.c (bfd_mach_o_find_inliner_info): Ditto.
+ * mmo.c (mmo_find_inliner_info): Ditto.
+ * nlm-target.h (nlm_find_inliner_info): Ditto.
+ * pef.c (bfd_pef_find_inliner_info): Ditto.
+ * ppcboot.c (ppcboot_find_inliner_info): Ditto.
+ * srec.c (srec_find_inliner_info): Ditto.
+ * tekhex.c (tekhex_find_inliner_info): Ditto.
+ * versados.c (versados_find_inliner_info): Ditto.
+ * xsym.c (bfd_sym_find_inliner_info): Ditto.
+
+ * ieee.c (ieee_find_inliner_info): New function that always
+ returns FALSE.
+ * oasys.c (oasys_find_inliner_info): Ditto.
+ * vms.c (vms_find_inliner_info): Ditto.
+
+2005-05-24 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_check_relocs): For old gcc -fPIC code
+ force old plt layout.
+
+2005-05-22 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_relax_section): Ignore non-allocated
+ sections.
+ (elf64_alpha_check_relocs): Likewise.
+ (elf64_alpha_relocate_section): Don't emit dynamic relocations to
+ non-allocated sections.
+
+2005-05-22 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_relax_with_lituse): Relax jsr to
+ undefweak to use zero register. Call elf64_alpha_relax_got_load
+ if not all uses removed.
+ (elf64_alpha_relax_got_load): Relax undefweak to lda zero.
+ (elf64_alpha_relax_section): Handle undefweak symbols.
+ (elf64_alpha_calc_dynrel_sizes): Don't add relocs for undefweak.
+ (elf64_alpha_size_rela_got_1): Likewise.
+ (elf64_alpha_relocate_section): Likewise.
+
+2005-05-22 Richard Henderson <rth at redhat.com>
+
+ * elf64-alpha.c (elf64_alpha_relax_section): Only operate
+ on SEC_CODE sections.
+
+2005-05-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * som.c (try_prev_fixup): Changed type of subspace_reloc_sizep to
+ unsigned int *.
+ (som_write_space_strings): Change type of tmp_space and p to char *.
+ (som_write_symbol_strings): Likewise. Also change type of comp to
+ char *comp[4].
+ (som_begin_writing): Change type of strings_size to unsigned int.
+ (som_finish_writing): Likewise.
+ (som_slurp_reloc_table): Change type of external_relocs to unsigned
+ char *.
+ * som.h (struct som_section_data_struct): Change type of reloc_stream
+ field to unsigned char *.
+
+2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-i386.c (elf_i386_adjust_dynamic_symbol): Don't eliminate
+ copy relocations for VxWorks.
+
+2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * bfd/elf32-ppc.c (struct ppc_elf_link_hash_entry): Add new field
+ has_sda_refs.
+ (ppc_elf_copy_indirect_symbol): Copy has_sda_refs.
+ (ppc_elf_check_relocs): Set has_sda_refs.
+ (ppc_elf_adjust_dynamic_symbol): Check has_sda_refs before eliminating
+ copy relocations. Use has_sda_refs to place variables in .sbss.
+ (ppc_elf_finish_dynamic_symbol): Use has_sda_refs to place variables in
+ .sbss.
+
+2005-05-20 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (bfd_elf_xtensa_reloc): Make sure that
+ xtensa_default_isa is initialized.
+
+2005-05-20 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (allocate_dynrelocs): Correct plt offset assigned
+ for second and subsequent list entries. Only allocate multiple
+ glink stubs when shared or pie.
+ (ppc_elf_finish_dynamic_symbol): Break out early when only one
+ glink stub is needed.
+
+2005-05-19 Zack Weinberg <zack at codesourcery.com>
+
+ * Makefile.am: Have 'all' depend on 'info'.
+ * Makefile.in: Regenerate.
+
+2005-05-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_link_hash_table): Delete init_refcount and
+ init_offset. Add init_got_refcount, init_plt_refcount,
+ init_got_offset and init_plt_offset.
+ * elf.c (_bfd_elf_link_hash_newfunc): Adjust for above change.
+ (_bfd_elf_link_hash_hide_symbol): Likewise.
+ (_bfd_elf_link_hash_table_init): Likewise.
+ * elf32-hppa.c (elf32_hppa_hide_symbol): Likewise.
+ * elf64-ppc.c (ppc64_elf_link_hash_table_create): Likewise.
+ * elflink.c (_bfd_elf_adjust_dynamic_symbol): Likewise.
+ (bfd_elf_size_dynamic_sections): Likewise.
+ * elf32-ppc.c (GLINK_PLTRESOLVE): Now 16 insns.
+ (LWZU_0_X_12, LWZ_0_4_30, LWZ_0_X_12, LWZ_11_X_11, LWZ_11_X_30,
+ LWZ_12_4_12, LWZ_12_8_30, LWZ_12_X_12, SUB_11_11_30): Delete.
+ (ADDIS_12_12, BCL_20_31, LWZU_0_12, LWZ_0_12, LWZ_11_11, LWZ_11_30,
+ LWZ_12_12, MFLR_0, MFLR_12, MTLR_0, SUB_11_11_12): Define.
+ (struct plt_entry): New.
+ (ppc_elf_link_hash_table_create): Set new init_plt fields.
+ (ppc_elf_copy_indirect_symbol): Handle merge of plt plist. Don't
+ use _bfd_elf_link_hash_copy_indirect.
+ (update_plt_info, find_plt_ent): New functions.
+ (ppc_elf_check_relocs): Handle R_PPC_PLTREL24 with non-zero addend
+ and adjust for use of plt list rather than refcount.
+ (ppc_elf_gc_sweep_hook): Likewise.
+ (ppc_elf_tls_optimize): Likewise.
+ (ppc_elf_adjust_dynamic_symbol): Likewise.
+ (allocate_dynrelocs): Likewise.
+ (ppc_elf_relax_section): Likewise.
+ (ppc_elf_relocate_section): Likewise. Adjust R_PPC_PLTREL24 addends
+ when performing a relocatable link.
+ (ppc_elf_finish_dynamic_symbol): Likewise. Write .glink stubs here..
+ (ppc_elf_finish_dynamic_sections): ..rather than here. Use new
+ pic resolver stub.
+
+2005-05-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (assign_file_positions_for_segments): Use maximum of
+ maxpagesize and section alignment when adjusting initial
+ segment offset and section offsets.
+
+2005-05-18 Zack Weinberg <zack at codesourcery.com>
+
+ * elf32-arm.c: Make all #ifndef OLD_ARM_ABI blocks
+ unconditional.
+
+2005-05-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (group_signature): Undo the last change. Check if the
+ symbol table section is correct.
+
+2005-05-17 Zack Weinberg <zack at codesourcery.com>
+
+ * elf32-arm.c: Wherever possible, use official reloc names
+ from AAELF.
+ (elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
+ (elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
+ (elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
+ (elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
+ (elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
+ (elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
+ elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
+ Add many new relocations from AAELF.
+ (elf32_arm_howto_from_type): Update to match.
+ (elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
+ R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
+ R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
+ (elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
+ (elf32_arm_final_link_relocate): Add support for
+ R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
+ case entries redundant with default.
+
+ * reloc.c: Reorganize ARM relocations. Add Thumb
+ assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
+ BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
+ Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
+ BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
+ Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
+ * bfd-in2.h, libbfd.h: Regenerate.
+
+2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf.c (_bfd_elf_write_object_contents): Check for non-NULL
+ elf_shstrtab.
+ * format.c (bfd_check_format_matches): Set output_has_begun
+ for both_direction.
+ * section.c (bfd_set_section_contents): Use bfd_write_p. Remove
+ special case for both_direction.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ * elf.c (group_signature): Check for a group section which is
+ actually a (corrupt) symbol table section in disguise and prevent
+ an infinite loop from occurring.
+
+2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_brl): Undo the change made on
+ 2005-02-16.
+
+2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_br): Keep the original
+ predicate on slot 0 only if slot 0 isn't br.
+
+2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 797
+ * elf32-i386.c (elf_i386_size_dynamic_sections): Also remove
+ empty sdynbss section.
+ * elf64-x86-64.c (elf64_x86_64_size_dynamic_sections): Likewise.
+
+2005-05-17 Tavis Ormandy <taviso at gentoo.org>
+
+ * elf.c (bfd_section_from_shdr): Add sanity check when parsing
+ dynamic sections.
+
+2005-05-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (LIS_11. LIS_12): Define.
+ (LWZU_0_X_12, LWZ_0_X_12, LWZ_12_4_12, LWZ_12_X_12): Define.
+ (ppc_elf_finish_dynamic_sections): Provide non-pic plt call stub
+ for --data-plt when building non-pie executables.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): Gracefully handle
+ the situation where a symbols's section is not known but a section
+ relative R_ARM_RELATIVE reloc has to be generated for the Symbian
+ OS.
+
+ * elf32-v850.c (v850_elf_relocate_section): Move code to test for
+ the presence of a symbol table to just before the symbol table is
+ actually used.
+
+2005-05-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 834
+ * elfxx-ia64.c (elfNN_ia64_relax_br): New.
+ (elfNN_ia64_relax_section): Use it.
+
+2005-05-14 Mark Kettenis <kettenis at gnu.org>
+
+ * elflink.c (bfd_elf_size_dynamic_sections): Use lbasename instead
+ of basename.
+
+2005-05-14 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Set DT_PPC_GOT,
+ not DT_PPC_GLINK.
+ (ppc_elf_finish_dynamic_sections): Likewise.
+
+2005-05-13 Fred Fish <fnf at specifixinc.com>
+
+ * libbfd-in.h: Fix a comment typo, 'neaderst' -> 'nearest'
+ * libbfd.h: Rebuilt.
+
+2005-05-13 Bob Wilson <bob.wilson at acm.org>
+
+ * elf32-xtensa.c (xtensa_get_property_section_name): Add missing
+ periods in linkonce_kind values.
+
+2005-05-12 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-i386.c (elf_i386_relocate_section): Allow R_386_GOTOFF
+ against protected function when building executable.
+
+2005-05-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (LWZU_0_X_11): Delete.
+ (B, LWZ_11_X_11, LWZ_11_X_30, MTCTR_11): Define.
+ (ppc_elf_select_plt_layout): Set .got flags too. Formatting.
+ (ppc_elf_size_dynamic_sections): Allocate space for .glink branch
+ table.
+ (ppc_elf_finish_dynamic_symbol): Point .plt entries into the branch
+ table.
+ (ppc_elf_finish_dynamic_sections): Adjust DT_PPC_GLINK value.
+ Generate .glink branch table and updated stubs.
+
+2005-05-11 Alan Modra <amodra at bigpond.net.au>
+
+ * reloc.c (BFD_RELOC_HI16_PCREL): Define.
+ (BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL): Define.
+ * elf32-ppc.c (GLINK_PLTRESOLVE, GLINK_ENTRY_SIZE): Define.
+ (CROR_151515, CROR_313131): Delete.
+ (ADDIS_11_11, ADDI_11_11, SUB_11_11_30, ADD_0_11_11, ADD_11_0_11,
+ LWZ_0_4_30, MTCTR_0, LWZ_12_8_30, BCTR, ADDIS_11_30,
+ LWZU_0_X_11): Define.
+ (ppc_elf_howto_raw): Add R_PPC_REL16, R_PPC_REL16_LO, R_PPC_REL16_HI
+ and R_PPC_REL16_HA entries.
+ (ppc_elf_reloc_type_lookup): Convert new bfd reloc types.
+ (ppc_elf_addr16_ha_reloc): Also handle R_PPC_REL16_HA.
+ (struct ppc_elf_link_hash_table): Add glink, glink_pltresolve,
+ new_plt, and old_plt.
+ (ppc_elf_create_dynamic_sections): Create .glink section.
+ (ppc_elf_check_relocs): Set new_plt and old_plt.
+ (ppc_elf_select_plt_layout): New function.
+ (ppc_elf_tls_setup): Set plt output section elf type and flags.
+ (allocate_got): Handle differences between old and new got layout.
+ (allocate_dynrelocs): Likewise for plt.
+ (ppc_elf_size_dynamic_sections): Likewise. Allocate memory for
+ .glink. Don't allocate memory for old bss .plt. Emit DT_PPC_GLINK.
+ (ppc_elf_relax_section): Rename ppc_info to htab. Handle .glink
+ destination of R_PPC_PLTREL24 relocs.
+ (ppc_elf_relocate_section): Handle new relocs and changed destination
+ of R_PPC_PLTREL24.
+ (ppc_elf_finish_dynamic_symbol): Init new style plt and handle
+ differences in layout.
+ (ppc_elf_finish_dynamic_sections): Set DT_PPC_GLINK value. Don't
+ put a blrl in new got. Write glink contents.
+ * elf32-ppc.h (ppc_elf_select_plt_layout): Declare.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+
+2005-05-11 Andreas Schwab <schwab at suse.de>
+
+ * elf32-i386.c (elf_i386_finish_dynamic_sections): Fix signedness
+ warning.
+
+2005-05-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (_bfd_elf_make_section_from_shdr): Only check debug
+ section if SEC_ALLOC isn't set.
+
+2005-05-09 Kelley Cook <kcook at gcc.gnu.org>
+
+ * configure.in: Replace AC_COMPILE_CHECK_SIZEOF with AC_CHECK_SIZEOF.
+ * acinclude.m4: Don't sinclude accross.m4.
+ * config.in, configure, Makefile.in, doc/Makefile.in: Regenerate.
+
+2005-05-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add has_dotsym.
+ (ppc64_elf_add_symbol_hook): Set has_dotsym.
+ (ppc64_elf_check_directives): Only process syms when has_dotsym.
+ (func_desc_adjust): Hide fake function descriptors when function
+ code entry is defined.
+ (adjust_opd_syms): Adjust for deleted_section becoming union field.
+
+2005-05-09 Alan Modra <amodra at bigpond.net.au>
+
+ * elfcode.h (elf_object_p): Add more sanity checks on elf header.
+
+2005-05-08 Dave Korn <dave.korn at artimi.com>
+
+ * coff-tic80.c: Undefine _CONST after system headers to prevent
+ clash with tic80-specific definition in include/coff/tic80.h
+
+2005-05-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 939
+ * elflink.c (elf_link_output_extsym): Use output_bfd if
+ h->root.u.def.section is bfd_abs_section_ptr when reporting
+ error.
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_backend_data): Update special_sections to
+ array of pointer to bfd_elf_special_section.
+ * elf.c (special_sections): Likewise.
+ * elf32-arm.c (elf32_arm_symbian_special_sections): Likewise.
+ * elf32-m32r.c (m32r_elf_special_sections): Likewise.
+ * elf32-m68hc11.c (elf32_m68hc11_special_sections): Likewise.
+ * elf32-m68hc12.c (elf32_m68hc12_special_sections): Likewise.
+ * elf32-mcore.c (mcore_elf_special_sections): Likewise.
+ * elf32-ppc.c (ppc_elf_special_sections): Likewise.
+ * elf32-sh64.c (sh64_elf_special_sections): Likewise.
+ * elf32-v850.c (v850_elf_special_sections): Likewise.
+ * elf32-xtensa.c (elf_xtensa_special_sections): Likewise.
+ * elf64-alpha.c (elf64_alpha_special_sections): Likewise.
+ * elf64-hppa.c (elf64_hppa_special_sections): Likewise.
+ * elf64-ppc.c (ppc64_elf_special_sections): Likewise.
+ * elf64-sh64.c (sh64_elf64_special_sections): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_special_sections): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_special_sections): Likewise.
+ * elfxx-mips.h (_bfd_mips_elf_special_sections): Likewise.
+
+ * elf.c (get_special_section): Updated.
+
+2005-05-07 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (struct elf_backend_data): Remove got_symbol_offset.
+ * elfxx-target.h (elf_backend_got_symbol_offset): Delete.
+ * elflink.c (_bfd_elf_create_got_section): Use zero in place of
+ got_symbol_offset.
+ * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Likewise.
+ * elf32-frv.c (_frv_create_got_section): Likewise.
+ * elf32-i370.c (i370_elf_finish_dynamic_sections): Delete ppc code.
+ (elf_backend_got_symbol_offset): Don't define.
+ * elf64-ppc.c (elf_backend_got_symbol_offset): Don't define.
+ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add got_header_size
+ and got_gap.
+ (ppc_elf_create_got): Tidy.
+ (ppc_elf_create_dynamic_sections): Don't set SEC_IN_MEMORY for .plt.
+ (ppc_elf_check_relocs): Reduce string comparisons by using elf.hgot.
+ (ppc_elf_gc_sweep_hook): Likewise.
+ (ppc_elf_relocate_section): Likewise.
+ (ppc_elf_finish_dynamic_symbol): Likewise.
+ (allocate_got): New function.
+ (allocate_dynrelocs): Use allocate_got.
+ (ppc_elf_size_dynamic_sections): Likewise. Delay tlsld_got allocation
+ so that local got can refcount it. Set got_header_size.
+ (ppc_elf_relocate_section): Use value of elf.hgot rather than hard-
+ coded 4.
+ (ppc_elf_finish_dynamic_sections): Likewise.
+ (elf_backend_got_symbol_offset): Don't define.
+ (elf_backend_got_header_size): Ditto.
+
+2005-05-05 Steve Ellcey <sje at cup.hp.com>
+
+ * configure.in (ACX_HEADER_STRING): New.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h (STRING_WITH_STRINGS): Use.
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (_bfd_elf_close_and_cleanup): Only call
+ _bfd_dwarf2_cleanup_debug_info on bfd_object.
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_provide_section_bound_symbols): Use
+ "__bss_start" instead of "_edata" as fallback.
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd-in2.h: Regenerated.
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
+ * configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
+ elf-vxworks.lo.
+ * configure: Regenerate.
+ * Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
+ (BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
+ (elf32-i386.lo): Depend on elf-vxworks.h.
+ (elf-vxworks.lo): New rule.
+ * Makefile.in: Regenerate.
+ * elf-bfd.h (elf_backend_data): Update type of
+ elf_backend_emit_relocs.
+ (_bfd_elf_link_output_relocs): Update prototype.
+ * elflink.c (_bfd_elf_link_output_relocs): Always use
+ bed->elf_backend_emit_relocs when outputting relocations.
+ * elfxx-target.h (elf_backend_emit_relocs): Default to
+ _bfd_elf_link_output_relocs.
+ * targets.c (bfd_elf32_i386_vxworks_vec): Declare.
+ (_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
+ * elf32-i386.c: Add elf32-i386-vxworks target BFD.
+ (elf_i386_plt0_entry): Remove padding.
+ (elf_i386_pic_plt0_entry): Ditto.
+ (PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
+ (PLT_NON_JUMP_SLOT_RELOCS): Define.
+ (elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
+ plt0_pad_byte fields.
+ (elf_i386_link_hash_table_create): Zero them.
+ (elf_i386_create_dynamic_sections): Create static relocation section.
+ (allocate_dynrelocs): Allocate space for static PLT relocations.
+ (elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
+ symbols. Give PLT symbols function type. Don't strip PLT sections
+ if we have exported symbols from them.
+ (elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
+ relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
+ VxWorks.
+ (elf_i386_finish_dynamic_sections): Allow different pad bytes.
+ Add relocation for GOT location. Fill in PLT static relocations.
+ (elf_i386_vxworks_link_hash_table_create): New function.
+ (elf_i386_vxworks_link_output_symbol_hook): New function.
+ * elf-vxworks.h: New file.
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * section.c (bfd_make_section_anyway_with_flags): New.
+ (bfd_make_section_anyway): Call bfd_make_section_anyway_with_flags,
+ (bfd_make_section_with_flags): New.
+ (bfd_make_section): Call bfd_make_section_with_flags.
+
+ * elf-m10300.c (_bfd_mn10300_elf_create_got_section): Call
+ bfd_make_section_with_flags/bfd_make_section_anyway_with_flags
+ instead of bfd_make_section/bfd_make_section and don't call
+ bfd_set_section_flags.
+ (mn10300_elf_check_relocs): Likewise.
+ (_bfd_mn10300_elf_create_dynamic_sections): Likewise.
+ * elf32-arm.c (create_got_section): Likewise.
+ (bfd_elf32_arm_add_glue_sections_to_bfd): Likewise.
+ (elf32_arm_check_relocs): Likewise.
+ * elf32-cris.c (cris_elf_check_relocs): Likewise.
+ * elf32-frv.c (elf32_frv_add_symbol_hook): Likewise.
+ (_frv_create_got_section): Likewise.
+ (elf32_frvfdpic_create_dynamic_sections): Likewise.
+ * elf32-hppa.c (elf32_hppa_create_dynamic_sections): Likewise.
+ (elf32_hppa_check_relocs): Likewise.
+ * elf32-i370.c (i370_elf_create_dynamic_sections): Likewise.
+ (i370_elf_check_relocs): Likewise.
+ * elf32-i386.c (create_got_section): Likewise.
+ (elf_i386_check_relocs): Likewise.
+ * elf32-m32r.c (m32r_elf_add_symbol_hook): Likewise.
+ (create_got_section): Likewise.
+ (m32r_elf_create_dynamic_sections): Likewise.
+ (m32r_elf_check_relocs): Likewise.
+ * elf32-m68k.c (elf_m68k_check_relocs): Likewise.
+ * elf32-ppc.c (ppc_elf_create_got): Likewise.
+ (ppc_elf_create_dynamic_sections): Likewise.
+ (ppc_elf_add_symbol_hook): Likewise.
+ (ppc_elf_check_relocs): Likewise.
+ * elf32-s390.c (create_got_section): Likewise.
+ (elf_s390_check_relocs): Likewise.
+ * elf32-sh.c (create_got_section): Likewise.
+ (sh_elf_create_dynamic_sections): Likewise.
+ (sh_elf_check_relocs): Likewise.
+ * elf32-vax.c (elf_vax_check_relocs): Likewise.
+ * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
+ * elf32-xtensa.c (elf_xtensa_create_dynamic_sections): Likewise.
+ (add_extra_plt_sections): Likewise.
+ * elf64-alpha.c (elf64_alpha_add_symbol_hook): Likewise.
+ (elf64_alpha_create_got_section): Likewise.
+ (elf64_alpha_create_dynamic_sections): Likewise.
+ (elf64_alpha_check_relocs): Likewise.
+ * elf64-hppa.c (get_reloc_section): Likewise.
+ (get_opd): Likewise.
+ (get_plt): Likewise.
+ (get_dlt): Likewise.
+ (get_stub): Likewise.
+ (elf64_hppa_create_dynamic_sectionso): Likewise.
+ * elf64-mmix.c (mmix_elf_check_common_relocs): Likewise.
+ * elf64-ppc.c (create_linkage_sections): Likewise.
+ (ppc64_elf_check_relocs): Likewise.
+ * elf64-s390.c (create_got_section): Likewise.
+ (elf_s390_check_relocs): Likewise.
+ * elf64-sh64.c (sh_elf64_check_relocs): Likewise.
+ (sh64_elf64_create_dynamic_sections): Likewise.
+ * elf64-x86-64.c (create_got_section): Likewise.
+ (elf64_x86_64_check_relocs): Likewise.
+ * elflink.c (_bfd_elf_create_got_section): Likewise.
+ (_bfd_elf_link_create_dynamic_sections): Likewise.
+ (elf_link_add_object_symbols): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_add_symbol_hook): Likewise.
+ (elfNN_ia64_create_dynamic_sections): Likewise.
+ (get_fptr): Likewise.
+ (get_pltoff): Likewise.
+ (get_reloc_section): Likewise.
+ (elfNN_ia64_object_p): Likewise.
+ * elfxx-mips.c (mips_elf_rel_dyn_section): Likewise.
+ (mips_elf_create_compact_rel_section): Likewise.
+ (mips_elf_create_got_section): Likewise.
+ (_bfd_mips_elf_create_dynamic_sections): Likewise.
+ * elfxx-sparc.c (create_got_section): Likewise.
+ (_bfd_sparc_elf_check_relocs): Likewise.
+
+ * elf.c (_bfd_elf_new_section_hook): Call _bfd_elf_get_sec_type_attr
+ on linker created sections.
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 882
+ * elflink.c (_bfd_elf_link_assign_sym_version): Allow version
+ script on executable.
+
+2005-05-05 John Levon <levon at movementarian.org>
+
+ * dwarf2.c (read_abbrevs): If bfd_realloc fails, free currently
+ allocated memory before returning.
+ (decode_line_info): Likewise.
+ (_bfd_dwarf2_cleanup_debug_info): New function: Frees memory
+ allocated by functions in this file.
+ * elf-bfd.h (_bfd_dwarf2_cleanup_debug_info): Prototype.
+ * elf.c (_bfd_elf_close_and_cleanup): Call
+ _bfd_dwarf2_cleanup_debug_info.
+
+2005-05-05 Hans-Peter Nilsson <hp at axis.com>
+
+ * Makefile.am (INCLUDES): Don't -D_GNU_SOURCE here.
+ * configure.in: Call AC_GNU_SOURCE here, after AC_PROG_CC.
+ * configure, config.in, Makefile.in: Regenerate.
+ * sysdep.h (stpcpy): Revert last change.
+
+2005-05-05 Hans-Peter Nilsson <hp at axis.com>
+
+ * sysdep.h (stpcpy): Wrap declaration in parentheses.
+
+2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (ARCH_SIZE): New.
+ (LOG_SECTION_ALIGN): Likewise.
+ (elfNN_ia64_create_dynamic_sections): Use LOG_SECTION_ALIGN to
+ align relocation sections.
+ (get_fptr): Likewise.
+ (get_reloc_section): Likewise.
+ (elfNN_ia64_tprel_base): Likewise.
+ (elfNN_ia64_check_relocs): Support 32bit relocations.
+ (allocate_global_fptr_got): Likewise.
+ (allocate_dynrel_entries): Likewise.
+ (set_got_entry): Likewise.
+ (set_pltoff_entry): Likewise.
+ (elfNN_ia64_relocate_section): Likewise.
+
+2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * configure.in: Add AC_CHECK_DECLS(stpcpy).
+ * configure: Regenerate.
+ * config.in: Likewise.
+
+ * sysdep.h (stpcpy): New.
+
+2005-05-04 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ aix386-core.c, aix5ppc-core.c, aout-adobe.c, aout-arm.c,
+ aout-cris.c, aout-ns32k.c, aout-sparcle.c, aout-target.h,
+ aout-tic30.c, aout0.c, aout32.c, aout64.c, aoutf1.h, aoutx.h,
+ archive.c, archive64.c, archures.c, armnetbsd.c, bfd-in.h,
+ bfd-in2.h, bfd.c, bfdio.c, bfdwin.c, binary.c, bout.c, cache.c,
+ cf-i386lynx.c, cf-m68klynx.c, cf-sparclynx.c, cisco-core.c,
+ coff-a29k.c, coff-alpha.c, coff-apollo.c, coff-arm.c, coff-aux.c,
+ coff-go32.c, coff-h8300.c, coff-h8500.c, coff-i386.c, coff-i860.c,
+ coff-i960.c, coff-ia64.c, coff-m68k.c, coff-m88k.c, coff-maxq.c,
+ coff-mcore.c, coff-mips.c, coff-or32.c, coff-pmac.c, coff-ppc.c,
+ coff-rs6000.c, coff-sh.c, coff-sparc.c, coff-stgo32.c,
+ coff-svm68k.c, coff-tic30.c, coff-tic4x.c, coff-tic54x.c,
+ coff-tic80.c, coff-u68k.c, coff-w65.c, coff-we32k.c, coff-z8k.c,
+ coff64-rs6000.c, coffcode.h, coffgen.c, cofflink.c, coffswap.h,
+ corefile.c, cpu-a29k.c, cpu-alpha.c, cpu-arc.c, cpu-arm.c,
+ cpu-avr.c, cpu-cr16c.c, cpu-cris.c, cpu-crx.c, cpu-d10v.c,
+ cpu-d30v.c, cpu-dlx.c, cpu-fr30.c, cpu-frv.c, cpu-h8300.c,
+ cpu-h8500.c, cpu-hppa.c, cpu-i370.c, cpu-i386.c, cpu-i860.c,
+ cpu-i960.c, cpu-ia64-opc.c, cpu-ia64.c, cpu-ip2k.c, cpu-iq2000.c,
+ cpu-m10200.c, cpu-m10300.c, cpu-m32r.c, cpu-m68hc11.c,
+ cpu-m68hc12.c, cpu-m68k.c, cpu-m88k.c, cpu-maxq.c, cpu-mcore.c,
+ cpu-mips.c, cpu-mmix.c, cpu-msp430.c, cpu-ns32k.c, cpu-openrisc.c,
+ cpu-or32.c, cpu-pdp11.c, cpu-pj.c, cpu-powerpc.c, cpu-rs6000.c,
+ cpu-s390.c, cpu-sh.c, cpu-sparc.c, cpu-tic30.c, cpu-tic4x.c,
+ cpu-tic54x.c, cpu-tic80.c, cpu-v850.c, cpu-vax.c, cpu-w65.c,
+ cpu-we32k.c, cpu-xstormy16.c, cpu-xtensa.c, cpu-z8k.c, demo64.c,
+ dwarf1.c, dwarf2.c, ecoff.c, ecofflink.c, ecoffswap.h,
+ efi-app-ia32.c, efi-app-ia64.c, elf-bfd.h, elf-eh-frame.c,
+ elf-hppa.h, elf-m10200.c, elf-m10300.c, elf-strtab.c, elf.c,
+ elf32-am33lin.c, elf32-arc.c, elf32-arm.c, elf32-avr.c,
+ elf32-cr16c.c, elf32-cris.c, elf32-crx.c, elf32-d10v.c,
+ elf32-d30v.c, elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-gen.c,
+ elf32-h8300.c, elf32-hppa.c, elf32-hppa.h, elf32-i370.c,
+ elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c,
+ elf32-iq2000.c, elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c,
+ elf32-m68hc1x.c, elf32-m68hc1x.h, elf32-m68k.c, elf32-m88k.c,
+ elf32-mcore.c, elf32-mips.c, elf32-msp430.c, elf32-openrisc.c,
+ elf32-or32.c, elf32-pj.c, elf32-ppc.c, elf32-ppc.h, elf32-s390.c,
+ elf32-sh-symbian.c, elf32-sh.c, elf32-sh64-com.c, elf32-sh64.c,
+ elf32-sh64.h, elf32-sparc.c, elf32-v850.c, elf32-vax.c,
+ elf32-xstormy16.c, elf32-xtensa.c, elf32.c, elf64-alpha.c,
+ elf64-gen.c, elf64-hppa.c, elf64-hppa.h, elf64-mips.c,
+ elf64-mmix.c, elf64-ppc.c, elf64-ppc.h, elf64-s390.c,
+ elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c, elf64.c, elfcode.h,
+ elfcore.h, elflink.c, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c,
+ elfxx-mips.h, elfxx-sparc.c, elfxx-sparc.h, elfxx-target.h,
+ epoc-pe-arm.c, epoc-pei-arm.c, format.c, freebsd.h, gen-aout.c,
+ genlink.h, hash.c, host-aout.c, hp300bsd.c, hp300hpux.c,
+ hppabsd-core.c, hpux-core.c, i386aout.c, i386bsd.c, i386dynix.c,
+ i386freebsd.c, i386linux.c, i386lynx.c, i386mach3.c, i386msdos.c,
+ i386netbsd.c, i386os9k.c, ieee.c, ihex.c, init.c, irix-core.c,
+ libaout.h, libbfd-in.h, libbfd.c, libbfd.h, libcoff-in.h,
+ libcoff.h, libecoff.h, libhppa.h, libieee.h, libnlm.h, liboasys.h,
+ libpei.h, libxcoff.h, linker.c, lynx-core.c, m68k4knetbsd.c,
+ m68klinux.c, m68klynx.c, m68knetbsd.c, m88kmach3.c, m88kopenbsd.c,
+ mach-o-target.c, mach-o.c, mach-o.h, merge.c, mipsbsd.c, mmo.c,
+ netbsd-core.c, netbsd.h, newsos3.c, nlm-target.h, nlm.c,
+ nlm32-alpha.c, nlm32-i386.c, nlm32-ppc.c, nlm32-sparc.c, nlm32.c,
+ nlm64.c, nlmcode.h, nlmswap.h, ns32k.h, ns32knetbsd.c, oasys.c,
+ opncls.c, osf-core.c, pc532-mach.c, pdp11.c, pe-arm.c, pe-i386.c,
+ pe-mcore.c, pe-mips.c, pe-ppc.c, pe-sh.c, peXXigen.c,
+ pef-traceback.h, pef.c, pef.h, pei-arm.c, pei-i386.c, pei-mcore.c,
+ pei-mips.c, pei-ppc.c, pei-sh.c, peicode.h, ppcboot.c,
+ ptrace-core.c, reloc.c, reloc16.c, riscix.c, rs6000-core.c,
+ sco5-core.c, section.c, simple.c, som.c, som.h, sparclinux.c,
+ sparclynx.c, sparcnetbsd.c, srec.c, stab-syms.c, stabs.c, sunos.c,
+ syms.c, sysdep.h, targets.c, tekhex.c, ticoff.h, trad-core.c,
+ vax1knetbsd.c, vaxbsd.c, vaxnetbsd.c, versados.c, vms-gsd.c,
+ vms-hdr.c, vms-misc.c, vms-tir.c, vms.c, vms.h, xcoff-target.h,
+ xcofflink.c, xsym.c, xsym.h, xtensa-isa.c, xtensa-modules.c,
+ hosts/alphavms.h
+
+2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd-in.h (_bfd_elf_provide_section_bound_symbols): New.
+ * bfd-in2.h: Regenerated.
+
+ * elflink.c (bfd_elf_set_symbol): New.
+ (_bfd_elf_provide_symbol): Call it.
+ (_bfd_elf_provide_section_bound_symbols): New.
+
+2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Only skip weak definitions
+ at the end, if a strong definition has already been seen.
+
+2005-05-04 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (struct bfd_section): Replace link_order_head and
+ link_order_tail with map_head and map_tail union.
+ (STD_SECTION): Update.
+ (_bfd_strip_section_from_output): Delete.
+ * aoutx.h: Update throughout for above changes.
+ * coff-ppc.c: Likewise.
+ * cofflink.c: Likewise.
+ * ecoff.c: Likewise.
+ * elf-eh-frame.c: Likewise.
+ * elf-m10300.c: Likewise.
+ * elf.c: Likewise.
+ * elf32-arm.c: Likewise.
+ * elf32-cris.c: Likewise.
+ * elf32-hppa.c: Likewise.
+ * elf32-i386.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68hc1x.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-s390.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-vax.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-s390.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elf64-x86-64.c: Likewise.
+ * elflink.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * elfxx-sparc.c: Likewise.
+ * linker.c: Likewise.
+ * merge.c: Likewise.
+ * pdp11.c: Likewise.
+ * xcofflink.c: Likewise.
+ * elflink.c (bfd_boolean bfd_elf_size_dynsym_hash_dynstr): Split
+ out from bfd_elf_size_dynamic_sections.
+ * bfd-in.h (bfd_boolean bfd_elf_size_dynsym_hash_dynstr): Declare.
+ * bfd-in2.h: Regenerate.
+
+2005-05-04 Alan Modra <amodra at bigpond.net.au>
+
+ * section.c (bfd_section_list_remove): Don't clear s->next.
+ (bfd_section_list_append): Always init s->prev.
+ (bfd_section_list_prepend): Define.
+ (bfd_section_list_insert_after): Minor optimization.
+ (bfd_section_removed_from_list): Rewrite.
+ * elf.c (assign_section_numbers): Simplify list traversal now that
+ bfd_section_list_remove doesn't destroy removed section next ptr.
+ * sunos.c (sunos_add_dynamic_symbols): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_object_p): Use bfd_section_list_prepend.
+ * xcofflink.c (_bfd_xcoff_bfd_final_link): Simplify list traversal.
+ * bfd-in2.h: Regenerate.
+
+2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd.c (bfd): Remove section_tail and add section_last.
+ (bfd_preserve): Likewise.
+ (bfd_preserve_save): Likewise.
+ (bfd_preserve_restore): Likewise.
+ * opncls.c (_bfd_new_bfd): Likewise.
+
+ * coffcode.h (coff_compute_section_file_positions): Updated.
+ (coff_compute_section_file_positions): Likewise.
+ * elf.c (assign_section_numbers): Likewise.
+ * elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
+ * elf64-mmix.c (mmix_elf_final_link): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_object_p): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_link_hash_table_create): Likewise.
+ * sunos.c (sunos_add_dynamic_symbols): Likewise.
+ * xcofflink.c (_bfd_xcoff_bfd_final_link): Likewise.
+
+ * ecoff.c (bfd_debug_section): Initialize prev.
+
+ * section.c (bfd_section): Add prev.
+ (bfd_section_list_remove): Updated.
+ (bfd_section_list_append): New.
+ (bfd_section_list_insert_after): New.
+ (bfd_section_list_insert_before): New.
+ (bfd_section_list_insert): Removed.
+ (bfd_section_removed_from_list): Updated.
+ (STD_SECTION): Initialize prev.
+ (bfd_section_init): Updated.
+ (bfd_section_list_clear): Updated.
+
+ * bfd-in2.h: Regenerated.
+
+2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (_bfd_elf_new_section_hook): Don't call
+ _bfd_elf_get_sec_type_attr on sections from input files.
+
+2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * merge.c (sec_merge_init): Call bfd_hash_table_init_n with
+ hash table size 16699 instead of bfd_hash_table_init.
+
+2005-05-01 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Skip weak definitions if a strong
+ definition has already been seen.
+
+2005-05-01 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (bfd_elf32_arm_process_before_allocation): Treat
+ R_ARM_PLT32 the same as R_ARM_PC24.
+ (arm_add_to_rel): Ditto.
+
+2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * config.bfd: Add h8300*-*-rtemscoff.
+ Switch h8300*-*-rtems* to elf.
+
+2005-04-29 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * aclocal.m4, Makefile.in: Regnerated.
+
+2005-04-28 Paul Brook <paul at codesourcery.com>
+
+ Merge changes only applied to Makefile.in.
+ * Makefile.am (BFD32_BACKENDS): Add elfxx-sparc.lo
+ (BFD32_BACKENDS_CFILES): Add elfxx-sparc.c
+ (elfxx-sparc.lo): New rule.
+ (elf32-sparc.lo): Add elfxx-sparc.h dependency.
+ (elf64-sparc.lo): Likewise.
+
+2005-04-28 Julian Brown <julian at codesourcery.com>
+
+ * elflink.c (_bfd_elf_provide_symbol): Provide symbol for weak
+ import.
+
+2005-04-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (bfd_elf_sym_name): Also take "asection *".
+
+ * elf.c (bfd_elf_sym_name): Updated.
+ (group_signature): Likewise.
+ * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
+ * elf64-ppc.c (ppc64_elf_edit_opd): Likewise.
+ (ppc64_elf_edit_toc): Likewise.
+ (ppc64_elf_relocate_section): Likewise.
+ * elfcode.h (elf_slurp_symbol_table): Likewise.
+ * elflink.c (elf_link_input_bfd): Likewise.
+
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Call
+ bfd_elf_sym_name to get local symbol name when reporting errors.
+
+2005-04-27 Nick Clifton <nickc at redhat.com>
+
+ * elflink.c (elf_link_input_bfd): Handle the case where a badly
+ formatted input file results in a reloc which has no associated
+ global symbol.
+
+2005-04-26 Jerome Guitton <guitton at gnat.com>
+
+ * bfd.m4 (BFD_NEED_DECLARATION): Restore.
+
+2005-04-25 David S. Miller <davem at davemloft.net>
+
+ * elfxx-sparc.c (sparc_elf_append_rela_64): Add BFD64 protection.
+ (sparc_elf_r_info_64, _bfd_sparc_elf_finish_dynamic_symbol,
+ sparc64_finish_dyn, _bfd_sparc_elf_finish_dynamic_sections):
+ Likewise.
+
+2005-04-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 858
+ * elflink.c (elf_link_input_bfd): Make non-debugging reference
+ to discarded section an error.
+
+2005-04-21 Jerome Guitton <guitton at gnat.com>
+
+ * configure.in: Replace BFD_NEED_DECLARATION checks by the
+ corresponding AC_CHECK_DECLS.
+ * sysdep.h: Replace NEED_DECLARATION_* checks by the corresponding
+ HAVE_DECL_*.
+ * bfd.m4 (BFD_NEED_DECLARATION): Remove, obsolete.
+ * configure: Regenerate.
+ * config.in: Ditto.
+
+2005-04-21 Andreas Schwab <schwab at suse.de>
+
+ * elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Remove
+ unsigned from type of dynamic_interpreter.
+ * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create): Remove
+ casts again.
+
+ * elf.c (assign_section_numbers): Fix comment.
+
+2005-04-21 Jerome Guitton <guitton at gnat.com>
+
+ * som.c (som_bfd_print_private_bfd_data): Add explicit cast to long
+ for struct som_exec_auxhdr fields.
+
+2005-04-21 Nick Clifton <nickc at redhat.com>
+
+ * aout-adobe.c: Convert to ISO C and fix formatting.
+ * aout-arm.c: Convert to ISO C and fix formatting.
+ * aout-cris.c: Convert to ISO C and fix formatting.
+ * aout-ns32k.c: Convert to ISO C and fix formatting.
+ * aout-tic30.c: Convert to ISO C and fix formatting.
+ * coffcode.h: Convert to ISO C and fix formatting.
+ * coffswap.h: Convert to ISO C and fix formatting.
+ * i386aout.c: Convert to ISO C and fix formatting.
+ * libaout.h: Convert to ISO C and fix formatting.
+ * libcoff-in.h: Convert to ISO C and fix formatting.
+ * libcoff.h: Convert to ISO C and fix formatting.
+ * libecoff.h: Convert to ISO C and fix formatting.
+ * libnlm.h: Convert to ISO C and fix formatting.
+ * libpei.h: Convert to ISO C and fix formatting.
+ * libxcoff.h: Convert to ISO C and fix formatting.
+ * nlm-target.h: Convert to ISO C and fix formatting.
+ * nlm.c: Convert to ISO C and fix formatting.
+ * nlm32-alpha.c: Convert to ISO C and fix formatting.
+ * nlm32-i386.c: Convert to ISO C and fix formatting.
+ * nlm32-ppc.c: Convert to ISO C and fix formatting.
+ * nlm32-sparc.c: Convert to ISO C and fix formatting.
+ * nlmcode.h: Convert to ISO C and fix formatting.
+ * nlmswap.h: Convert to ISO C and fix formatting.
+ * pe-mips.c: Convert to ISO C and fix formatting.
+ * peXXigen.c: Convert to ISO C and fix formatting.
+ * peicode.h: Convert to ISO C and fix formatting.
+ * vms-gsd.c: Convert to ISO C and fix formatting.
+ * vms-hdr.c: Convert to ISO C and fix formatting.
+ * vms-misc.c: Convert to ISO C and fix formatting.
+ * vms-tir.c: Convert to ISO C and fix formatting.
+ * vms.c: Convert to ISO C and fix formatting.
+ * vms.h: Convert to ISO C and fix formatting.
+
+ * coffgen.c (coff_print_symbol): Restore correct formatting of
+ output.
+
+2005-04-20 David S. Miller <davem at davemloft.net>
+
+ * elfxx-sparc.c (sparc_elf_r_symndx_64): Fix compiler warning.
+ (_bfd_sparc_elf_link_hash_table_create): Likewise.
+ (allocate_dynrelocs): Likewise.
+
+2005-04-20 Jerome Guitton <guitton at gnat.com>
+
+ * configure.in: Fix the check for basename declaration. Add check
+ for declarations of ftello, ftello64, fseeko, fseeko64.
+ * configure: Regenerate.
+ * config.in: Ditto.
+ * sysdep.h: If needed, declare ftello, ftello64, fseeko, fseeko64.
+
+2005-04-19 David S. Miller <davem at davemloft.net>
+
+ * elfxx-sparc.c: New file.
+ * elfxx-sparc.h: New file.
+ * Makefile.in (BFD32_BACKENDS): Add elfxx-sparc.lo
+ (BFD32_BACKENDS_CFILES): Add elfxx-sparc.c
+ (elfxx-sparc.lo): New rule.
+ (elf32-sparc.lo): Add elfxx-sparc.h dependency.
+ (elf64-sparc.lo): Likewise.
+ * configure.in (bfd_elf32_sparc_vec): Add elfxx-sparc.lo
+ (bfd_elf64_sparc_vec): Likewise.
+ * configure: Regenerate.
+ * elf32-sparc.c: Remove common code now in elfxx-sparc.c
+ * elf64-sparc.c: Likewise, also use elf64_sparc_*() naming
+ which is more consistent with elf32-sparc.c
+
+2005-04-19 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elfxx-mips.c (struct mips_elf_link_hash_entry): Update comment.
+ (mips_elf_create_local_got_entry): Check h->root.forced_local.
+
+2005-04-19 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_check_relocs): Don't bother with
+ dynamic relocs in non-SEC_ALLOC sections.
+ (ppc_elf_gc_sweep_hook): Likewise.
+ (ppc_elf_relax_section): Likewise.
+ (ppc_elf_relocate_section): Likewise.
+
+2005-04-18 Nick Clifton <nickc at redhat.com>
+
+ * aix5ppc-core.c (xcoff64_core_p): Fix compile time warning
+ assigning a value to return_value.
+
+2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 855
+ * elf.c (_bfd_elf_copy_private_section_data): Don't copy linker
+ created group data.
+
+2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 855
+ * elf.c (setup_group): Properly handle zero group count.
+
+2005-04-17 Mark Kettenis <kettenis at gnu.org>
+
+ * som.c (hppa_som_reloc, som_mkobject, som_is_space)
+ (som_is_subspace, compare_subspaces, som_compute_checksum)
+ (som_build_and_write_symbol_table, som_slurp_symbol_table): New
+ protoypes.
+ (hppa_som_reloc, compare_syms, compare_subspaces)
+ (som_print_symbol, som_get_section_contents)
+ (som_set_section_contents): Remove space after 'void *'.
+ (som_bfd_print_private_bfd_data): Use %lx to print longs.
+ (som_bfd_merge_private_bfd_data)
+ (som_bfd_copy_private_header_data, som_bfd_set_private_flags): New
+ defines.
+
+2005-04-15 Julian Brown <julian at codesourcery.com>
+
+ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Update prototype.
+ * bfd-in2.h: Regenerate.
+ * elf32-arm.c (elf32_arm_link_hash_table): New field, 'use_blx'.
+ (elf32_arm_link_hash_table_create): Initialise fix_v4bx, use_blx.
+ (bfd_elf32_arm_set_target_relocs): Handle use_blx.
+ (elf32_arm_final_link_relocate): Use Thumb BLX for R_ARM_THM_PC22
+ relocations if requested to.
+ (allocate_dynrelocs): Don't count size of omitted Thumb stubs based on
+ use_blx rather than symbian_p.
+ (elf32_arm_finish_dynamic_symbol): Don't output Thumb PLT stubs if
+ use_blx is in effect.
+ (elf32_arm_symbian_link_hash_table_create): Enable use_blx by default
+ for SymbianOS.
+
+2005-04-15 Nick Clifton <nickc at redhat.com>
+
+ * coffgen.c (coff_print_symbol): Use fprintf_vma to print vma
+ values.
+
+2005-04-15 Alan Modra <amodra at bigpond.net.au>
+
+ PR ld/815
+ * elflink.c (elf_smash_syms): Clear undef.next if it's not being
+ used as a list pointer.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define.
+ * warning.m4: New file
+ * acinclude.m4: Include warning.m4.
+ * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * merge.c (sec_merge_emit): Tidy. Check for bfd_zmalloc errors.
+ Write trailing padding.
+
+ * merge.c (merge_strings): Round up section size for alignment.
+
+2005-04-14 David S. Miller <davem at davemloft.net>
+
+ Add TLS support for 64-bit Sparc ELF.
+ * elf64-sparc.c (sparc64_elf_dyn_relocs,
+ sparc64_elf_link_hash_entry, sparc64_elf_obj_tdata): New structs.
+ (GOT_UNKNOWN, GOT_NORMAL, GOT_TLD_GD, GOT_TLD_IE,
+ sparc64_elf_hash_entry, sparc64_elf_tdata,
+ sparc64_elf_local_got_tls_type): New defines.
+ (sparc64_elf_mkobject): New function.
+ (sparc64_elf_link_hash_table): Add members for dynamic linker
+ sections PLT, RELPLT, DYNBSS, and RELBSS. Add tls_ldm_got
+ uion to track TLS GOT references. Add sym_sec to cache
+ mappings from local sym to section.
+ (link_hash_newfunc): New function.
+ (sparc64_elf_bfd_link_hash_table_create): Rename to
+ sparc64_elf_link_hash_table_create for consistency.
+ Pass link_hash_newfunc to _bfd_elf_link_hash_table_init.
+ (sparc64_elf_create_dynamic_sections): Initialize new section
+ members of sparc64_elf_link_hash_table. Only init srelbss
+ if not-shared.
+ (sparc64_elf_copy_indirect_symbol, sparc64_elf_tls_transition):
+ New functions.
+ (SPARC_NOP): Define.
+ (sparc64_elf_build_plt, sparc64_elf_plt_entry_offset,
+ sparc64_elf_plt_ptr_offset): Delete.
+ (sparc64_plt_entry_build): New function to build PLT entries
+ gradually instread of all at once at the end of linking.
+ (sparc64_elf_check_relocs): Delete dynobj, sgot, and srelgot
+ local vars. Get them from sparc64_elf_hash_table instead.
+ Check early on if r_symndx is in bounds. Handle TLS transitions.
+ Account for TLS GOT references and DF_STATIC_TLS, as needed.
+ For TLS relocs, record the tls_type in either
+ sparc64_elf_local_got_tls_type or sparc64_elf_hash_entry as
+ appropriate. For R_SPARC_TLS_{GD,LDM}_CALL, emit a reference
+ to the __tls_get_addr symbol. For PLT relocs, track references
+ via h->plt.refcount. When R_SPARC_{PC10,PC22,PC_HH22,PC_HM10,
+ PC_LM22} and h not-NULL, set h->non_got_ref. For global data
+ symbol references, count the number of relocations needed for
+ that symbol. For default switch case, don't error, this lets
+ the TLS relocs not explicitly handled by this function get
+ accepted.
+ (sparc64_elf_gc_mark_hook, sparc64_gc_sweep_hook): New functions.
+ (sparc64_elf_adjust_dynamic_symbol): Remove dynobj local var, get
+ it from sparc64_elf_hash_table. Store the real PLT offset
+ in h->plt.offset, and build PLT entries one at a time. Also
+ get .dynbss section pointer from htab.
+ (allocate_dynrelocs, readonly_dynrelocs,
+ sparc64_omit_section_dynsym): New functions.
+ (sparc64_elf_omit_section_dynsym): Use these new functions as
+ helpers.
+ (dtpoff_base, tpoff): New functions.
+ (sparc64_elf_relocate_section): Kill dynobj, sgot, and splt
+ locals, get them from sparc64_elf_hash_table. Handle TLS
+ relocations and refcounting in main relocation loop.
+ (sparc64_elf_finish_dynamic_symbol): Use
+ sparc64_elf_link_hash_table. Build PLT entries as we see
+ them. Handle TLS GOT relocations.
+ (sparc64_elf_finish_dynamic_sections): Get sgot and dynobj
+ from sparc64_elf_hash_table. Initialize only PLT header
+ not all entries since we not build PLT entries one by one.
+ (elf_backend_copy_indirect_symbol, bfd_elf64_mkobject,
+ elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook,
+ elf_backend_can_gc_sections, elf_backend_can_refcount): Define.
+
+2005-04-13 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elflink.c (elf_link_input_bfd): Update check for removed
+ sections.
+
+2005-04-12 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * libcoff.h: Regenerate.
+
+2005-04-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * linker.c (_bfd_generic_link_output_symbols): Also check if
+ the output section of an input section has been removed from
+ the output file.
+
+ * section.c (bfd_section_list_remove): Clear the next field
+ of the removed section.
+ (bfd_section_removed_from_list): New.
+ * bfd-in2.h: Regenerated.
+
+2005-04-11 David S. Miller <davem at davemloft.net>
+
+ * elf32-sparc.c (elf32_sparc_relocate_section,
+ R_SPARC_TLS_LDO_{HIX22,LOX10}): When not shared, transition to
+ R_SPARC_TLS_LE_{HIX22,LOX10}.
+ (elf32_sparc_relocate_section, R_SPARC_TLS_{LDO,LE}_HIX22): Only
+ xor relocation with 0xffffffff if R_SPARC_TLS_LE_HIX22.
+ (elf32_sparc_relocate_section, R_SPARC_TLS_{LDO,LE}_LOX10): Only
+ or 0x1c00 into relocation if R_SPARC_TLS_LE_HIX22.
+
+2005-04-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * coffcode.h (STRING_SIZE_SIZE): Updated to match libcoff-in.h.
+
+2005-04-11 Nick Clifton <nickc at redhat.com>
+
+ * aout-target.h: Convert to ISO C.
+ * aoutf1.h: Convert to ISO C.
+ * aoutx.h: Convert to ISO C.
+ * bout.c: Convert to ISO C.
+ * dwarf1.c: Convert to ISO C.
+ * ecoffswap.h: Convert to ISO C.
+ * freebsd.h: Convert to ISO C.
+ * genlink.h: Convert to ISO C.
+ * ieee.c: Convert to ISO C.
+ * ihex.c: Convert to ISO C.
+ * libcoff-in.h: Convert to ISO C.
+ * mach-o.c: Convert to ISO C.
+ * mach-o.h: Convert to ISO C.
+ * netbsd.h: Convert to ISO C.
+ * ns32k.h: Convert to ISO C.
+ * ns32knetbsd.c: Convert to ISO C.
+ * oasys.c: Convert to ISO C.
+ * pdp11.c: Convert to ISO C.
+ * pef-traceback.h: Convert to ISO C.
+ * pef.c: Convert to ISO C.
+ * pef.h: Convert to ISO C.
+ * riscix.c: Convert to ISO C.
+ * som.c: Convert to ISO C.
+ * som.h: Convert to ISO C.
+ * srec.c: Convert to ISO C.
+ * stabs.c: Convert to ISO C.
+ * sunos.c: Convert to ISO C.
+ * tekhex.c: Convert to ISO C.
+ * versados.c: Convert to ISO C.
+ * version.h: Convert to ISO C.
+ * xcoff-target.h: Convert to ISO C.
+ * xcofflink.c: Convert to ISO C.
+ * xsym.c: Convert to ISO C.
+ * xsym.h: Convert to ISO C.
+
+2005-04-08 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (ARM2THUMB_GLUE_SIZE): Rename...
+ (ARM2THUMB_STATIC_GLUE_SIZE): ... to this.
+ (ARM2THUMB_PIC_GLUE_SIZE): Define.
+ (a2t1p_ldr_insn, a2t2p_add_pc_insn, a2t3p_bx_r12_insn): Add.
+ (elf32_arm_to_thumb_stub): Create PIC stubs.
+ (record_arm_to_thumb_glue): Use different stub size for relocatable
+ images.
+
+2005-04-05 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (dec_dynrel_count): New function split out from
+ ppc64_elf_edit_toc, with additional code from ppc64_elf_edit_opd.
+ (ppc64_elf_edit_toc, ppc64_elf_edit_opd): Use it.
+ (ppc64_elf_tls_optimize): Likewise.
+
+2005-04-05 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c (SPARC_WCOOKIE_OFFSET): Renamed from
+ CORE_WCOOKIE_OFFSET.
+ (SPARC64_WCOOKIE_OFFSET): New.
+ (netbsd_core_file_p): Provide .wcookie section for OpenBSD/sparc64.
+
+2005-04-05 Nick Clifton <nickc at redhat.com>
+
+ * po/rw.po: New translation: Kinyarwanda
+ * configure.in (ALL_LINGUAS): Add rw
+ * configure: Regenerate.
+
+2005-04-05 Richard Sandiford <rsandifo at redhat.com>
+
+ * elfxx-mips.c (MIPS_ELF_OPTIONS_SECTION_NAME_P): New macro.
+ (_bfd_mips_elf_section_from_shdr): Use it to check for recognized
+ SHT_MIPS_OPTIONS names. Allow all sections with unrecognised
+ section flags.
+ (_bfd_mips_elf_fake_sections): Use MIPS_ELF_OPTIONS_SECTION_NAME_P
+ to check for SHT_MIPS_OPTIONS sections.
+ (_bfd_mips_elf_set_section_contents): Likewise.
+
+2005-04-04 Eric Christopher <echristo at redhat.com>
+
+ * elfxx-mips.c (_bfd_elf_mips_get_relocated_section_contents):
+ Clean up gp handling code.
+
+2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (bfd_elf_set_group_contents): Ignore linker created
+ group section.
+ (assign_section_numbers): Accept link_info. Check SHT_GROUP
+ sections for relocatable files only. Remove the linker created
+ group sections.
+ (_bfd_elf_compute_section_file_positions): Pass link_info to
+ assign_section_numbers.
+
+ * elfxx-ia64.c (elfNN_ia64_object_p): New.
+ (elf_backend_object_p): Defined.
+
+2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_section_data): Use (sec) instead of sec.
+
+2005-04-03 Fred Fish <fnf at specifixinc.com>
+
+ * dwarf2.c (struct dwarf2_debug): Add dwarf_ranges_buffer and
+ dwarf_ranges_size members.
+ (struct comp_unit): Add base_address member.
+ (struct funcinfo): Replace low/high members with an arange.
+ (arange_add): Replace incoming "unit" parameter with "abfd" and
+ "first_arange" pointers. Reorganize/rewrite function body.
+ (decode_line_info): Change arange_add call to pass bfd and arange
+ pointers.
+ (lookup_address_in_line_info_table): Use arange list instead of
+ individual low/high members. Walk function's arange list to find
+ lowest PC in list, to test for overlapping functions.
+ (read_debug_ranges): New function, reads the debug_ranges section.
+ (lookup_address_in_function_table): Use arange list instead of
+ individual low/high members. Rewrite to find smallest range that
+ matches.
+ (read_rangelist): Read a given rangelist from debug_ranges.
+ (scan_unit_for_functions): Use arange list instead of individual
+ low/high members. Handle a DW_AT_ranges attribute.
+ (parse_comp_unit): Use arange list instead of individual low/high
+ members. Save comp unit base address. Handle a DW_AT_ranges
+ attribute.
+
+2005-04-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (assign_section_numbers): Really use the kept section.
+
+2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (_bfd_elf_check_kept_section): New.
+
+ * elf.c (assign_section_numbers): When sh_link points to a
+ discarded section, call _bfd_elf_check_kept_section to see if
+ the kept section can be used. Otherwise reject sh_link
+ pointing to discarded section.
+
+ * elflink.c (_bfd_elf_check_kept_section): New.
+ (elf_link_input_bfd): Use it.
+
+2005-04-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_edit_toc): Account for dynamic relocs
+ that we no longer need.
+
+2005-04-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Return -1 on errors
+ rather than 0.
+ (ppc64_elf_check_relocs): Remove unnecessary SEC_ALLOC check.
+
+2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf.c (assign_section_numbers): Fix a typo.
+
+2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_link_input_bfd): Remove the extra `\n' in
+ error message.
+ (_bfd_elf_section_already_linked): Likewise.
+
+2005-03-31 Jerome Guitton <guitton at gnat.com>
+
+ * config.in: Regenerate.
+
+2005-03-31 Jerome Guitton <guitton at gnat.com>
+
+ * config.in (HAVE_DECL_BASENAME): New configure macro.
+ * configure.in: Check for basename.
+ * configure: Regenerate.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * bfd-in.h (bfd_is_arm_mapping_symbol_name): Rename from
+ bfd_elf32_is_arm_mapping_symbol_name.
+ * bfd-in2.h: Regenerate.
+ * cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename from
+ bfd_elf32_is_arm_mapping_symbol_name.
+ * elf32-arm.c (elf32_arm_is_target_special_symbol): Rename
+ bfd_elf32_is_arm_mapping_symbol_name to bfd_is_arm_mapping_symbol_name.
+ (arm_elf_find_function): Likewise.
+ (elf32_arm_output_symbol_hook): Likewise.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * bfd-in.h (bfd_elf32_is_arm_mapping_symbol_name): Add prototype.
+ * bfd-in2.h: Regenerate.
+ * elf32-arm.c (elf32_arm_is_target_special_symbol): Rename call to
+ bfd_elf32_is_arm_mapping_symbol_name.
+ (elf32_arm_output_symbol_hook): Likewise.
+ (arm_elf_find_function): Likewise, and include STT_NOTYPE in test for
+ mapping symbols.
+ (is_arm_mapping_symbol_name): Function moved from here...
+ * cpu-arm.c (bfd_elf32_is_arm_mapping_symbol_name): ...to here, renamed
+ and made global.
+
+2005-03-29 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * configure.in: Check for ffs decl and alphabetize.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * sysdep.h [NEED_DECLARATION_FFS] (ffs): Prototype and alphabetize.
+
+2005-03-29 Fred Fish <fnf at specifixinc.com>
+
+ * dwarf2.c (struct comp_unit): Fix typo.
+ (scan_unit_for_functions): Remove unused local variable "name"
+ and dead code that set it.
+
+2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Blundell <philb at gnu.org>
+
+ * bfd-in2.h, libbfd.h: Regenerated.
+ * reloc.c: Add ARM TLS relocations.
+ * elf32-arm.c (elf32_arm_howto_table): Add dynamic TLS
+ relocations.
+ (elf32_arm_tls_gd32_howto, elf32_arm_tls_ldo32_howto)
+ (elf32_arm_tls_ldm32_howto, elf32_arm_tls_le32_howto)
+ (elf32_arm_tls_ie32_howto): New.
+ (elf32_arm_howto_from_type): Support TLS relocations.
+ (elf32_arm_reloc_map): Likewise.
+ (elf32_arm_reloc_type_lookup): Likewise.
+ (TCB_SIZE): Define.
+ (struct elf32_arm_obj_tdata): New.
+ (elf32_arm_tdata, elf32_arm_local_got_tls_type): Define.
+ (elf32_arm_mkobject): New function.
+ (struct elf32_arm_relocs_copied): Add pc_count.
+ (elf32_arm_hash_entry, GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD)
+ (GOT_TLS_IE): Define.
+ (struct elf32_arm_link_hash_table): Add tls_ldm_got.
+ (elf32_arm_link_hash_newfunc): Initialize tls_type.
+ (elf32_arm_copy_indirect_symbol): Copy pc_count and tls_type.
+ (elf32_arm_link_hash_table_create): Initialize tls_ldm_got.
+ (dtpoff_base, tpoff): New functions.
+ (elf32_arm_final_link_relocate): Handle TLS relocations.
+ (IS_ARM_TLS_RELOC): Define.
+ (elf32_arm_relocate_section): Warn about TLS mismatches.
+ (elf32_arm_gc_sweep_hook): Handle TLS relocations and pc_count.
+ (elf32_arm_check_relocs): Detect invalid symbol indexes. Handle
+ TLS relocations and pc_count.
+ (elf32_arm_adjust_dynamic_symbol): Check non_got_ref.
+ (allocate_dynrelocs): Handle TLS. Bind REL32 relocs to local
+ calls.
+ (elf32_arm_size_dynamic_sections): Handle TLS.
+ (elf32_arm_finish_dynamic_symbol): Likewise.
+ (bfd_elf32_mkobject): Define.
+
+2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_check_relocs): Increment count for all
+ relocation types. Don't count relocations which will use a PLT.
+
+2005-03-29 Joel Brobecker <brobecker at gnat.com>
+
+ * elf.c (elfcore_grok_nto_status): Print tid as long.
+ (elfcore_grok_nto_regs): Likewise.
+
+2005-03-29 Joel Brobecker <brobecker at gnat.com>
+
+ * irix-core.c: Remove some unnecessary prototypes.
+
+2005-03-28 Joel Brobecker <brobecker at adacore.com>
+
+ * irix-core.c: Convert to ISO C.
+
+2005-03-28 Joel Brobecker <brobecker at adacore.com>
+
+ * irix-core.c (do_sections): Replace + by | in expression.
+ (irix_core_core_file_matches_executable_p): Add ATTRIBUTE_UNUSED
+ to unused parameters to avoid a compiler warning.
+
+2005-03-28 Mark Kettenis <kettenis at gnu.org>
+
+ * netbsd-core.c: Convert to ISO C. Fix formatting.
+
+2005-03-24 Eric Christopher <echristo at redhat.com>
+
+ * elfxx-mips.c: Revert previous patch.
+
+2005-03-24 Nick Clifton <nickc at redhat.com>
+
+ * targets.c (_bfd_target_vector): Only include the
+ bfd_elf32_ia64_hpux_big_vec vector when building a 64-bit BFD with
+ all targets enabled.
+
+2005-03-24 James E Wilson <wilson at specifixinc.com>
+
+ * Makefile.am (BFD32_BACKENDS): Delete elf32-ia64.lo.
+ (BFD64_BACKENDS): Add elf32-ia64.lo.
+ * Makefile.in: Regenerate.
+
+2005-03-23 Eric Christopher <echristo at redhat.com>
+
+ * elfxx-mips.c (MIPS_ELF_READONLY_SECTION): New.
+ (mips_elf_calculate_relocation): Use. Define DF_TEXTREL
+ after emitting relocation.
+ (_bfd_mips_elf_adjust_dynamic_symbol): Ditto.
+ (_bfd_mips_elf_check_relocs): Remove code to set DF_TEXTREL
+ and readonly_reloc.
+
+2005-03-23 Mike Frysinger <vapier at gentoo.org>
+ Nick Clifton <nickc at redhat.com>
+
+ * config.bfd: Accept any C library to accompany a GNU Linux
+ implementation, not just the GNU C library.
+ * configure.in: Likewise.
+ * configure: Regenerate.
+
+2005-03-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd-in.h (_bfd_elf_provide_symbol): New.
+ * bfd-in2.h: Regenerated.
+
+ * elf32-ppc.c (set_linker_sym): Moved to elflink.c.
+ (ppc_elf_set_sdata_syms): Call _bfd_elf_provide_symbol instead
+ of set_linker_sym.
+
+ * elflink.c (_bfd_elf_provide_symbol): New. Moved and renamed
+ from elf32-ppc.c.
+
+2005-03-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * hash.c (strtab_hash_newfunc): Fix typo in allocated size.
+
+2005-03-22 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-isa.c (xtensa_opcode_lookup, xtensa_state_lookup,
+ xtensa_sysreg_lookup_name, xtensa_interface_lookup,
+ xtensa_funcUnit_lookup): Skip bsearch call if count is zero.
+ (xtensa_opcode_decode): Rearrange code.
+
+2005-03-22 Nick Clifton <nickc at redhat.com>
+
+ * binary.c: Convert to ISO C90 formatting.
+ * coff-arm.c: Convert to ISO C90 formatting.
+ * coffgen.c: Convert to ISO C90 formatting.
+ * elf32-gen.c: Convert to ISO C90 formatting.
+ * elf64-gen.c: Convert to ISO C90 formatting.
+ * hash.c: Convert to ISO C90 formatting.
+ * ieee.c: Convert to ISO C90 formatting.
+
+2005-03-22 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): Don't fail for
+ unresolved symbols in R_ARM_NONE relocations.
+
+2005-03-22 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): Add
+ UNRESOLVED_RELOC_P argument. Set it appropriately.
+ (elf32_arm_relocate_section): Update call to
+ elf32_arm_final_link_relocate. Don't clobber RELOCATION; use
+ unresolved_reloc instead.
+
+2005-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_add_object_symbols): Set SEC_EXCLUDE on
+ .gnu.warning.* sections.
+
+2005-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (elf_linker_section_pointers_t): Remove
+ written_address_p.
+ (ppc_elf_create_linker_section): Don't try to reuse existing section.
+ (elf_create_pointer_linker_section): Delete info parm. Don't make
+ h dynamic. Don't set written_address_p.
+ (ppc_elf_check_relocs): Adjust ppc_elf_create_linker_section calls.
+ (bfd_put_ptr): Delete.
+ (elf_finish_pointer_linker_section): Remove output_bfd and info parms.
+ Always write section contents. Assert global sym is def_regular.
+ Use offset bottom bit as a written flag.
+ (ppc_elf_relocate_section): Adjust elf_finish_pointer_linker_section
+ calls.
+
+2005-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_set_sdata_syms): New function, extracted from..
+ (ppc_elf_set_sdata_syms): ..here. Expand comment. Set .sbss start
+ and end syms.
+
+2005-03-21 Nick Clifton <nickc at redhat.com>
+
+ * coff-arm.c (coff_link_hash_entry): Only define for non WINCE
+ targets.
+ (t2a1_bx_pc_insn): Likewise.
+ (t2a2_noop_insn): Likewise.
+ (t2a3_b_insn): Likewise.
+ (t2a1_push_insn): Likewise.
+ (t2a2_ldr_insn): Likewise.
+ (t2a3_mov_insn): Likewise.
+ (t2a4_bx_insn): Likewise.
+ (t2a5_pop_insn): Likewise.
+ (t2a6_bx_insn): Likewise.
+ (coff_arm_relocate_section): Only declare the high_address
+ variable for non WINCE targets.
+
+2005-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_add_symbol_hook): Make htab->sbss
+ SEC_LINKER_CREATED. Attach to dynobj.
+ (ppc_elf_size_dynamic_sections): Strip htab->sbss if zero size.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (struct elf_linker_section): Remove sym_hash and
+ sym_offset. Add name, bss_name, sym_name, sym_val.
+ (struct ppc_elf_link_hash_table): Remove sdata and sdata2 pointers.
+ Add sdata array of elf_linker_section_t.
+ (ppc_elf_link_hash_table_create): Set name, sym_name, and bss_name.
+ (enum elf_linker_section_enum): Delete.
+ (ppc_elf_create_linker_section): Rewrite. Don't create syms here.
+ (ppc_elf_check_relocs): Delay ppc_elf_create_linker_section until
+ the special sections are needed. Adjust htab->sdata refs.
+ Ensure dynobj is set in sreloc code.
+ (ppc_elf_size_dynamic_sections): Strip sdata sections.
+ (ppc_elf_set_sdata_syms): New function.
+ (elf_finish_pointer_linker_section): Use 0x8000 for sym_offset.
+ (ppc_elf_relocate_section): Adjust references to htab->sdata. Use
+ sym_val instead of sym_hash.
+ * elf32-ppc.h (ppc_elf_set_sdata_syms): Declare.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (is_ppc_elf_target): Move to linker part of file.
+ (ppc_elf_merge_private_bfd_data): Likewise.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (struct elf_linker_section): Remove rel_section.
+ (ppc_elf_create_linker_section): Don't create rel_section.
+ (elf_create_pointer_linker_section): Don't size relocs.
+ (elf_finish_pointer_linker_section): Remove relative_reloc parm.
+ Don't generate relocs.
+ (ppc_elf_relocate_section): Adjust calls to
+ elf_finish_pointer_linker_section.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (is_ppc_elf_target): New function.
+ (ppc_elf_merge_private_bfd_data): Use it rather than just testing
+ for bfd_target_elf_flavour. Do this test before endian check.
+ (ppc_elf_add_symbol_hook): Use is_pcc_elf_target.
+ (ppc_elf_size_dynamic_sections): Likewise.
+
+2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_backend_data): Add int to
+ elf_backend_section_from_shdr.
+ (bfd_elf_section_data): Update comment for this_idx.
+ (_bfd_elf_make_section_from_shdr): Add int.
+ * elfxx-mips.h (_bfd_mips_elf_section_from_shdr): Likewise.
+
+ * elf.c (_bfd_elf_make_section_from_shdr): Take section index
+ and use it to set this_idx in bfd_elf_section_data.
+ (bfd_section_from_shdr): Pass shindex to
+ _bfd_elf_make_section_from_shdr.
+ (_bfd_elf_section_from_bfd_section): Use this_idx in
+ bfd_elf_section_data to find section index.
+
+ * elf32-arm.c (elf32_arm_section_from_shdr): Take section
+ index and pass it to _bfd_elf_make_section_from_shdr.
+ * elf32-i370.c(i370_elf_section_from_shdr): Likewise.
+ * elf32-ppc.c (ppc_elf_section_from_shdr): Likewise.
+ * elf32-sh64.c (sh64_backend_section_from_shdr): Likewise.
+ * elf32-v850.c (v850_elf_section_from_shdr): Likewise.
+ * elf64-alpha.c (elf64_alpha_section_from_shdr): Likewise.
+ * elf64-hppa.c (elf64_hppa_section_from_shdr): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_section_from_shdr): Likewise.
+ * elfxx-ia64.c (elfNN_ia64_section_from_shdr): Likewise.
+ * elfxx-mips.c (_bfd_mips_elf_section_from_shdr): Likewise.
+
+2005-03-19 Danny Smith <dannysmith at users.sourceforge.net>
+ Ross Ridge <rridge at csclub.uwaterloo.ca>
+
+ * peicode.h (pe_ILF_build_a_bfd): Strip only one prefix
+ character in IMPORT_NAME_UNDECORATE and IMPORT_NAME_NOPREFIX
+ cases. Add comment.
+
+2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_mark_used_section): Remove check for special
+ sections.
+
+2005-03-18 Andreas Schwab <schwab at suse.de>
+
+ * elfxx-ia64.c (elfNN_ia64_install_value): Change type of insn
+ from bfd_vma to ia64_insn, remove broken cast.
+
+2005-03-18 C Jaiprakash <cjaiprakash at noida.hcltech.com>
+
+ * elf32-m68k.c (elf_cfv4e_plt0_entry): plt entry for coldfire v4e.
+ (elf_m68k_adjust_dynamic_symbol,elf_m68k_finish_dynamic_symbol,
+ elf_m68k_finish_dynamic_sections): Use it.
+
+2005-03-17 Paul Brook <paul at codesourcery.com>
+ Dan Jacobowitz <dan at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_modify_segment_map): New function.
+ (elf32_arm_additional_program_headers): Likewise.
+ (elf_backend_modify_segment_map): Define.
+ (elf_backend_additional_program_headers): Likewise.
+ (elf32_arm_symbian_modify_segment_map): Use
+ elf32_arm_modify_segment_map.
+
+2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_mark_used_section): Check bfd_is_const_section
+ for special sections.
+
+2005-03-18 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (_bfd_elf_link_renumber_dynsyms): Delete.
+ * elflink.c (_bfd_elf_link_renumber_dynsyms): Make static, add
+ section_sym_count param, and return number of section symbols.
+ (bfd_elf_size_dynamic_sections): Clear section symbol area of
+ .dynsym contents. Don't bother calling swap_symbol_out on the
+ first all-zero dynsym.
+ (elf_mark_used_section): Formatting. Avoid twiddling flags in
+ special sections like bfd_abs_section.
+ (bfd_elf_gc_sections): Spelling fix.
+
+2005-03-16 Fred Fish <fnf at specifixinc.com>
+
+ PR binutils/790
+ * dwarf2.c (read_indirect_string): Fix apparent typo, check
+ dwarf_str_buffer allocation, not dwarf_abbrev_buffer.
+
+2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elflink.c (elf_mark_used_section): New.
+ (bfd_elf_gc_sections): Call elf_gc_mark_section for
+ non-relocatable link if we don't do GC.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+
+ * ecoff.c: Convert to ISO C90 formatting.
+
+2005-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c: Divide file into general and linker specific
+ functions. Sort linker functions into roughly the order in which
+ they are called by the ELF linker code.
+
+2005-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_create_linker_section): Set SEC_LINKER_CREATED
+ on section. Correct comment, and add FIXME.
+ (ppc_elf_additional_program_headers): Don't bump header count for
+ interp. Test SEC_ALLOC, not SEC_LOAD, and don't test size.
+ (ppc_elf_size_dynamic_sections): Don't strip sdata and sdata2, but
+ do allocate memory if they need it.
+
+2005-03-15 Mikkel Krautz <krautz at gmail.com>
+
+ * config.bfd (x86_64-elf): Add target.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+2005-03-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relocate_section): Set symbo name
+ for global symbol when reporting overflow.
+
+2005-03-11 Jakub Jelinek <jakub at redhat.com>
+
+ * libbfd-in.h (_bfd_ar_spacepad): New prototype.
+ * libbfd.h: Rebuilt.
+ * archive.c (_bfd_ar_spacepad): New function.
+ (_bfd_construct_extended_name_table, _bfd_write_archive_contents,
+ bsd_write_armap, _bfd_archive_bsd_update_armap_timestamp,
+ coff_write_armap): Use it.
+ (bfd_ar_hdr_from_filesystem): Likewise. Fix HP-UX large
+ uid/gid support.
+ * archive64.c (bfd_elf64_archive_write_armap): Use _bfd_ar_spacepad.
+
+2005-03-10 Mark Kettenis <kettenis at gnu.org>
+
+ * archive.c (_bfd_look_for_bfd_in_cache): Move declaration of
+ has_table to the start of the function.
+
+2005-03-10 Ben Elliston <bje at au.ibm.com>
+
+ * archive.c: Include hashtab.h.
+ (struct ar_cache): Rename `arelt' to `arbfd' and remove `next'.
+ (_bfd_look_for_bfd_in_cache): Reimplement using htab_find.
+ (hash_file_ptr): New function.
+ (eq_file_ptr): Likewise.
+ (_bfd_add_bfd_to_archive_cache): Reimplement using a hash table.
+ * libbfd-in.h: Include hashtab.h.
+ (struct artdata): Change `cache' member type to htab_t.
+ * libbfd.h: Rebuild.
+
+2005-03-08 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * configure.in: Bump version to 2.16.90.
+ * configure: Regenerated.
+
+2005-03-07 Jakub Jelinek <jakub at redhat.com>
+
+ * opncls.c (opncls_bread, opncls_bclose): Fix if pread resp.
+ close is a function like macro in system headers.
+
+2005-03-07 Alan Modra <amodra at bigpond.net.au>
+
+ PR ld/778
+ * elf32-hppa.c (elf32_hppa_create_dynamic_sections): Reinstate
+ _GLOBAL_OFFSET_TABLE_ as a normal dynamic symbol.
+
+2005-03-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (elfcore_grok_win32pstatus): Warning fixes.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/bfd.pot: Regenerate.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (update_plt_info): Don't mark new ABI call syms
+ with is_func.
+ (func_desc_adjust): Force dot-syms local in executables as well
+ as shared libs.
+
+2005-03-04 David Daney <ddaney at avtrex.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation): Handle special
+ '__gnu_local_gp' symbol used by gas -mno-shared.
+
+2005-03-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf-bfd.h (elf_backend_data): Add "const char *" to
+ elf_backend_section_from_phdr.
+
+ * elf.c (bfd_section_from_phdr): Pass "proc" to the
+ elf_backend_section_from_phdr hook.
+
+2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
+ Joseph Myers <joseph at codesourcery.com>
+
+ * elfxx-mips.c (struct mips_got_entry): Add tls_type.
+ (struct mips_got_info): Add tls_gotno, tls_assigned_gotno,
+ and tls_ldm_offset.
+ (struct mips_elf_got_per_bfd_arg): Add global_count.
+ (struct mips_elf_count_tls_arg): New.
+ (struct mips_elf_hash_sort_data): Update comment for min_got_dynindx.
+ (struct mips_elf_link_hash_entry): Add tls_type and tls_got_offset.
+ (GOT_NORMAL, GOT_TLS_GD, GOT_TLS_LDM, GOT_TLS_IE)
+ (GOT_TLS_OFFSET_DONE, GOT_TLS_DONE): Define.
+ (TLS_RELOC_P): Define.
+ (TP_OFFSET, DTP_OFFSET): Define.
+ (dtprel_base, tprel_base): New functions.
+ (mips_elf_link_hash_newfunc): Initialize tls_type.
+ (mips_elf_got_entry_hash, mips_elf_got_entry_eq)
+ (mips_elf_multi_got_entry_hash, mips_elf_multi_got_entry_eq): Handle
+ TLS entries.
+ (mips_tls_got_relocs, mips_elf_count_local_tls_relocs)
+ (mips_elf_count_global_tls_entries, mips_elf_count_global_tls_relocs)
+ (mips_elf_output_dynamic_relocation, mips_elf_initialize_tls_slots)
+ (mips_tls_got_index): New functions.
+ (mips_elf_local_got_index): Add new R_SYMNDX, H, and R_TYPE
+ arguments. Pass them to mips_elf_create_local_got_entry. Use
+ mips_tls_got_index.
+ (mips_elf_global_got_index): Add new R_TYPE and INFO arguments.
+ Handle TLS entries.
+ (mips_elf_got_page, mips_elf_got16_entry): Update calls to
+ mips_elf_create_local_got_entry.
+ (mips_elf_create_local_got_entry): Add new R_SYMNDX, H, and R_TYPE
+ arguments. Handle TLS entries.
+ (mips_elf_sort_hash_table_f): Add non-TLS assertions.
+ (mips_elf_record_local_got_symbol): Add new TLS_FLAG argument. Handle
+ TLS entries.
+ (mips_elf_record_global_got_symbol): Likewise.
+ (mips_elf_make_got_per_bfd): Initialize new mips_got_info members.
+ Count TLS entries.
+ (mips_elf_merge_gots): Handle TLS entries when merging.
+ (mips_elf_initialize_tls_index): New function.
+ (mips_elf_set_global_got_offset): Handle TLS entries.
+ (mips_elf_adjust_gp): Handle TLS.
+ (mips_elf_multi_got): Remove redundant call to
+ mips_elf_resolve_final_got_entries. Initialize global_count.
+ Correct a comment. Initialize new TLS members of mips_got_info.
+ Assign TLS GOT indexes for new GOTs.
+ (mips_elf_create_got_section): Initialize new TLS members of
+ mips_got_info.
+ (mips_elf_calculate_relocation): Handle TLS relocs.
+ (_bfd_mips_elf_check_relocs): Likewise. Update calls to changed
+ functions.
+ (_bfd_mips_elf_always_size_sections): Handle TLS.
+ (_bfd_mips_elf_size_dynamic_sections): Likewise.
+ (_bfd_mips_elf_finish_dynamic_symbol): Likewise. Update calls to
+ changed functions.
+ (_bfd_mips_elf_copy_indirect_symbol): Copy tls_type.
+ (_bfd_mips_elf_hide_symbol): Handle TLS.
+ * elfn32-mips.c (elf_mips_howto_table_rel, elf_mips_howto_table_rela)
+ (mips_reloc_map): Add TLS relocs.
+ * elf32-mips.c (elf_mips_howto_table_rel, mips_reloc_map): Likewise.
+ * elf64-mips.c (mips_elf64_howto_table_rel)
+ (mips_elf64_howto_table_rela, mips_reloc_map): Likewise.
+ * reloc.c: Define new MIPS TLS relocations.
+ * libbfd.h, bfd-in2.h: Regenerated.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * Makefile.am: Add dependency of cache.o on libiberty.h.
+ * cache.c: Include libiberty.h.
+ (bfd_open_file): Use unlink_if_ordinary instead of unlink.
+
+2005-03-01 Zack Weinberg <zack at codesourcery.com>
+
+ * elf.c (bfd_section_from_shdr <default case>): Call
+ elf_backend_section_from_shdr hook unconditionally, and return
+ what it returns.
+ (bfd_section_from_phdr): Similarly, for elf_backend_section_from_phdr.
+ * elfxx-target.h (elf_backend_section_from_shdr)
+ (elf_backend_section_from_phdr): Default to
+ _bfd_elf_make_section_from_shdr and _bfd_elf_make_section_from_phdr
+ respectively.
+
+2005-03-01 Alan Modra <amodra at bigpond.net.au>
+
+ * targets.h: Typo fix.
+ * bfd-in2.h: Regenerate.
+
+ * bout.c (b_out_write_object_contents): Don't use sizeof on host
+ structs to size on-disk structures.
+ (b_out_set_section_contents): Size the external struct, not the
+ internal one for on-disk size.
+ (b_out_sizeof_headers): Likewise.
+
+2005-03-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_size_stubs): Override defined dot-sym
+ entry points with the func descriptor as well as undefweak.
+
+2005-02-28 Ross Ridge <rridge at csclub.uwaterloo.ca>
+
+ * peicode.h (pe_ILF_build_a_bfd): Do not assume that an @ will be
+ present when IMPORT_NAME_UNDOECRATE is used.
+
+2005-02-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 757
+ * elf-bfd.h (_bfd_elf_merge_symbol): Add a pointer to unsigned
+ int.
+
+ * elf32-sh-symbian.c (sh_symbian_relocate_section): Pass NULL
+ to _bfd_elf_merge_symbol.
+
+ * elflink.c (_bfd_elf_merge_symbol): Use the pointer to
+ unsigned int to return the alignment of the old common symbol
+ in the dynamic object.
+ (_bfd_elf_add_default_symbol): Pass NULL to
+ _bfd_elf_merge_symbol.
+ (elf_link_add_object_symbols): Pass &old_alignment to
+ _bfd_elf_merge_symbol. Get the alignment of the new common
+ symbol in the dynamic object.
+
+2005-02-24 Ben Elliston <bje at au.ibm.com>
+
+ * coffcode.h (coff_sym_filepos): Remove GNU960 conditional code.
+ * format.c (bfd_check_format_matches): Likewise.
+ * archive.c (BFD_GNU960_ARMAG): Likewise.
+ (bfd_generic_archive_p): Likewise.
+ (_bfd_write_archive_contents): Likewise.
+
+2005-02-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * configure.in: (AM_INIT_AUTOMAKE): Set version to 2.15.95.
+ * configure: Regenerate.
+
+2005-02-24 Julian Brown <julian at sirius.codesourcery.com>
+
+ * elflink.c (elf_link_add_object_symbols): Force symbols in discarded
+ COMDAT group sections to have default visibility.
+
+2005-02-24 Alan Modra <amodra at bigpond.net.au>
+
+ * coffcode.h (coff_print_aux): Warning fix.
+ * elf-m10300.c (mn10300_elf_relax_section): Use section->id
+ instead of section pointer to identify.
+ * coff-h8300.c (h8300_reloc16_extra_cases): Likewise. Allocate
+ the correct size buffer for local sym mangling too.
+ (h8300_bfd_link_add_symbols): Likewise.
+ * elf32-sh-symbian.c (sh_symbian_process_embedded_commands): Fix
+ warning.
+ * elf32-sh64.c (shmedia_prepare_reloc): Use %B and %p in error message
+ * elf32-xtensa.c (literal_value_hash): Warning fix.
+ * versados.c (process_otr): Warning fix.
+ (versados_canonicalize_reloc): Likewise.
+ * vms-gsd.c (_bfd_vms_slurp_gsd): Warning fix.
+ * vms.c (fill_section_ptr): Warning fix.
+
+2005-02-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ * coff-tic54x.c (SWAP_OUT_RELOC_EXTRA): Defined.
+ * coff-tic80.c (SWAP_OUT_RELOC_EXTRA): Likewise.
+
+2005-02-23 Nick Clifton <nickc at redhat.com>
+
+ * elfxx-mips.c (mips_elf_create_dynamic_relocation): Initialise
+ the relvaddr field of the Elf32_crinfo structure.
+
+ * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Initialise
+ variables that are passed by reference to
+ m68hc11_get_relocation_value in case that function does not
+ initialise them.
+
+ * elf32-cr16c.c (cr16c_elf_final_link_relocate): Remove duplicated
+ return statements and replace with a single return at the end of
+ the function. This helps pacify the flow analysis code in gcc 4.0.
+
+ * elf.c (_bfd_elf_compute_section_file_positions): Initialise
+ strtab to avoid compile time warning.
+
+2005-02-23 Ben Elliston <bje at au.ibm.com>
+
+ * opncls.c (bfd_zalloc): Document this function.
+
+2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * coffcode.h (sec_to_styp_flags): Replaced SEC_CLINK with
+ SEC_TIC54X_CLINK. Replace SEC_BLOCK with SEC_TIC54X_BLOCK.
+ Replace SEC_SHARED with SEC_COFF_SHARED.
+ (styp_to_sec_flags): Likewise.
+
+ * elfxx-target.h (TARGET_BIG_SYM): Remove SEC_ARCH_BIT_0.
+ (TARGET_LITTLE_SYM): Likewise.
+
+ * section.c (SEC_ARCH_BIT_0): Removed.
+ (SEC_LINK_DUPLICATES_SAME_CONTENTS): Defined with
+ SEC_LINK_DUPLICATES_ONE_ONLY and SEC_LINK_DUPLICATES_SAME_SIZE.
+ (SEC_SHARED): Renamed to ...
+ (SEC_COFF_SHARED): This.
+ (SEC_BLOCK): Renamed to ...
+ (SEC_TIC54X_BLOCK): This.
+ (SEC_CLINK): Renamed to ...
+ (SEC_TIC54X_CLINK): This.
+ (SEC_XXX): Rearranged. Move SEC_COFF_SHARED_LIBRARY,
+ SEC_COFF_SHARED, SEC_TIC54X_BLOCK and SEC_TIC54X_CLINK to the
+ end.
+ * bfd-in2.h: Regenerated.
+
+2005-02-21 Fred Fish <fnf at specifixinc.com>
+
+ * dwarf2.c (find_abstract_instance_name): Call recursively
+ to handle a DW_AT_specification.
+
+2005-02-21 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * elfxx-mips.c (ecoff_swap_rpdr_out, mips_elf_output_extsym,
+ mips_elf_create_dynamic_relocation,
+ _bfd_mips_elf_size_dynamic_sections, _bfd_mips_elf_final_link):
+ Remove #if 0'd code.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * coffgen.c (bfd_coff_get_comdat_section): Check that
+ coff_section_data isn't NULL.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd-in.h (bfd_elf_bfd_from_remote_memory): Warning fix.
+ * coff-m68k.c (bfd_m68k_coff_create_embedded_relocs): Likewise.
+ * coff-rs6000.c (xcoff_write_armap_big): Warning fixes. Remove
+ useless assignments.
+ (xcoff_write_archive_contents_big): Likewise.
+ (_bfd_xcoff_put_ldsymbol_name): Likewise.
+ * coff64-rs6000.c (_bfd_xcoff64_put_ldsymbol_name): Likewise.
+ * coffgen.c (coff_write_symbols): Make "written" a bfd_vma.
+ * cofflink.c (process_embedded_commands): Warning fixes.
+ * cpu-arm.c: Delete unnecessary prototypes. Convert to C90.
+ Warning fixes.
+ * dwarf2.c: Warning fixes.
+ * elf-bfd.h: Likewise.
+ * elf-eh-frame.c: Likewise.
+ * elf-strtab.c: Likewise.
+ * elf.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-sh-symbian.c: Likewise.
+ * elf32-sh.c: Delete unnecessary prototypes. Warning fixes.
+ * elf64-sh64.c: Likewise.
+ * peicode.h: Likewise.
+ * elf64-mmix.c: Warning fixes.
+ * elfcode.h: Likewise.
+ * elfxx-mips.c: Likewise.
+ * libbfd-in.h: Likewise.
+ * libbfd.c: Likewise.
+ * mach-o.c: Likewise.
+ * merge.c: Likewise.
+ * mmo.c: Likewise.
+ * opncls.c: Likewise.
+ * pef.c: Likewise.
+ * srec.c: Likewise.
+ * vms-hdr.c: Likewise.
+ * vms-tir.c: Likewise.
+ * xtensa-isa.c: Likewise.
+ * xtensa-modules.c: Likewise.
+ * xsym.c: Likewise.
+ (pstrcmp): Use correct choice of string lengths. Fix return value.
+ (bfd_sym_module_name): Correct string length.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-02-17 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (elf32_frv_relocate_section): Remove warning from
+ uninitialized check_segment[1] in TLSMOFF case.
+ Reported by Alan Modra.
+ (elf32_frv_relocate_section): Improve errors and warnings.
+
+2005-02-17 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Fix warning.
+
+2005-02-16 Alan Modra <amodra at bigpond.net.au>
+
+ * coff-arm.c (coff_arm_is_local_label_name): Warning fix.
+ * elf32-frv.c (frvfdpic_relocs_info_hash): Likewise.
+ * pef.c (bfd_pef_scan): Don't ignore return value of
+ bfd_pef_scan_start_address.
+ * mach-o.c (bfd_mach_o_scan): Don't ignore return value of
+ bfd_mach_o_scan_start_address.
+ * elfxx-ia64.c (elfNN_ia64_relax_brl): Rewrite for 32-bit bfd_vma.
+ * elfxx-mips.c: Remove unnecessary prototypes.
+ (sort_dynamic_relocs_64): Abort if not BFD64.
+
+2005-02-16 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_edit_toc): Skip toc if size is zero.
+ Skip toc reloc adjust if reloc_count is zero.
+
+2005-02-15 Nigel Stephens <nigel at mips.com>
+ Maciej W. Rozycki <macro at mips.com>
+
+ * elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
+ reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
+ R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
+ (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
+ (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
+ dst_mask.
+ (mips16_gprel_reloc): Remove bit shuffling; call
+ _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
+ and _bfd_mips16_elf_reloc_shuffle() instead.
+ (mips16_reloc_map): New reloc map for MIPS16 relocs.
+ (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
+ relocs.
+ (mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from
+ elf_mips16_howto_table_rel.
+ * elf64-mips.c (mips16_elf64_howto_table_rel): New array for
+ MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16
+ relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
+ (elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel.
+ (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
+ dst_mask.
+ (mips16_elf64_howto_table_rela): New array for MIPS16 RELA
+ reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and
+ R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16
+ placeholders.
+ (mips16_gprel_reloc): Remove bit shuffling; call
+ _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
+ and _bfd_mips16_elf_reloc_shuffle() instead.
+ (mips16_reloc_map): New reloc map for MIPS16 relocs.
+ (bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
+ relocs.
+ (mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from
+ mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel.
+ * elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
+ REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
+ R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
+ (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
+ (elf_mips16_gprel_howto): Likewise. Redefine src_mask and
+ dst_mask.
+ (mips16_gprel_reloc): Remove bit shuffling; call
+ _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
+ and _bfd_mips16_elf_reloc_shuffle() instead.
+ (mips16_reloc_map): New reloc map for MIPS16 relocs.
+ (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
+ relocs.
+ (mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from
+ elf_mips16_howto_table_rela or elf_mips16_howto_table_rel.
+ * elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to
+ handle bit shuffling for MIPS16 relocs.
+ (_bfd_mips16_elf_reloc_shuffle): Likewise.
+ (_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle()
+ and _bfd_mips16_elf_reloc_shuffle().
+ (_bfd_mips_elf_generic_reloc): Likewise.
+ (mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16
+ and R_MIPS16_LO16.
+ (mips_elf_obtain_contents): Remove bit shuffling.
+ (mips_elf_perform_relocation): Likewise; call
+ _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle()
+ instead.
+ (_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16
+ and R_MIPS16_LO16.
+ * elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare.
+ (_bfd_mips16_elf_reloc_shuffle): Likewise.
+ * reloc.c (BFD_RELOC_MIPS16_HI16): New reloc.
+ (BFD_RELOC_MIPS16_HI16_S): Likewise.
+ (BFD_RELOC_MIPS16_LO16): Likewise.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * elfxx-ia64.c (ia64_howto_table): Correct strings for
+ R_IA64_DTPMOD64[LM]SB.
+
+2005-02-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elfxx-ia64.c (elfNN_ia64_relax_section): Allow relax
+ backward branch in the same section.
+ (elfNN_ia64_relocate_section): Inform users that the input
+ section is too big to relax br instruction when overflow
+ happens to R_IA64_PCREL21B, R_IA64_PCREL21BI, R_IA64_PCREL21M
+ and R_IA64_PCREL21F.
+
+2005-02-14 Orjan Friberg <orjanf at axis.com>
+
+ * elfcore.h (elf_core_file_p): Move the call to
+ elf_backend_object_p to allow the correct machine to be set before
+ processing the program headers.
+
+2005-02-14 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/716
+ * peicode.h (pe_bfd_copy_private_bfd_data): Copy the large address
+ aware flag from the input bfd to the output bfd.
+
+2005-02-11 Maciej W. Rozycki <macro at mips.com>
+
+ * elf32-mips.c (_bfd_mips_elf32_gprel16_reloc): Reject
+ R_MIPS_LITERAL relocations for external symbols.
+ * elf64-mips.c (mips_elf64_literal_reloc): Likewise.
+ * elfn32-mips.c (mips_elf_literal_reloc): Likewise.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfd-in2.h: Rebuilt.
+
+2005-02-11 Paul Brook <paul at codesourcery.com>
+
+ * elf-bfd.h (struct elf_link_hash_table): Add
+ is_relocatable_executable.
+ * elf.c (_bfd_elf_link_hash_table_init): Initialize it.
+ * elflink.c (bfd_elf_link_record_dynamic_symbol): Create local dynamic
+ symbols in relocatable executables.
+ (bfd_elf_record_link_assignment): Create dynamic section symbols in
+ relocatable executables.
+ (_bfd_elf_link_renumber_dynsyms): Ditto.
+ (bfd_elf_final_link): Ditto.
+ * elf32-arm.c (elf32_arm_final_link_relocate): Copy absolute
+ relocations into relocatable executables.
+ (elf32_arm_check_relocs): Crate dynamic sections for relocatable
+ executables. Also copy absolute relocations.
+ (elf32_arm_adjust_dynamic_symbol): Don't create copy relocations
+ in relocatable executables.
+ (allocate_dynrelocs): Copy relocations for relocatable executables.
+ Output dynamic symbols for symbols defined in linker scripts.
+
+2005-02-11 Nick Clifton <nickc at redhat.com>
+
+ * libbfd.c (read_signed_leb128): Use an unsigned type for 'shift'
+ to avoid a compile time warning.
+
+ * coff-alpha.c (alpha_adjust_reloc_in): Remove redundant test from
+ BFD_ASSERT.
+
+ * coff-tic4x.c (coff_rtype_to_howto): Move definition before
+ inclusion of coffcode.h so that it is actually picked up.
+
+ * coffcode.h (coff_std_swap_table): Add an unused attribute in
+ case it is not used.
+
+ * elf32-ip2k.c (ip2k_call_opcode, IS_CALL_OPCODE): Remove unused
+ structure and macro.
+
+ * elf32-iq2000.c (iq2000_reloc_map): Remove unused structure and
+ array.
+
+ * elf32-m32r.c (m32r_reloc_map_old): Use #ifdef USE_M32R_OLD_RELOC
+ to protect the declaration of this array.
+
+ * xsym.c (bfd_sym_parse_contained_variables_table_entry_v32):
+ Avoid call to memcpy with a size of 0.
+
+2005-02-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (toc_adjusting_stub_needed): Return true for
+ old-style branches to undefined dot-symbols which will be
+ satisfied by a plt call.
+
+2005-02-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (move_plt_plist): New function, extracted from..
+ (ppc64_elf_copy_indirect_symbol): ..here.
+ (func_desc_adjust): Use move_plt_plist.
+
+2005-02-10 Paul Brook <paul at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_final_link_relocate): Handle R_ARM_THM_PC9.
+
+2005-02-10 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (bfd_elf_record_link_assignment): Make hidden and internal
+ symbols local.
+ (elf_link_renumber_hash_table_dynsyms): Ignore local symbols.
+ (elf_link_renumber_local_hash_table_dynsyms): New function.
+ (_bfd_elf_link_renumber_dynsyms): Number local dynamic symbols.
+
+2005-02-10 Jakub Jelinek <jakub at redhat.com>
+
+ * bfd-in.h (BFD_LINKER_CREATED): Define.
+ * bfd-in2.h: Rebuilt.
+ * elflink.c (bfd_elf_size_dynamic_sections): Disregard
+ BFD_LINKER_CREATED bfds when determining input bfds without
+ .note.GNU-stack section.
+
+2005-02-10 Maciej W. Rozycki <macro at mips.com>
+
+ * elf64-mips.c (mips16_gprel_reloc): Update a comment.
+ * elfn32-mips.c (mips16_gprel_reloc): Keep R_MIPS16_GPREL
+ relocations against external symbols unchanged.
+
+2005-02-08 Paul Brook <paul at codesourcery.com>
+
+ * elflink.c (elf_link_input_bfd): Ignore symbols from null input
+ sections.
+
+2005-02-08 Hans-Peter Nilsson <hp at axis.com>
+
+ * elflink.c (elf_link_add_object_symbols): Don't add "warning: "
+ prefix here.
+
+2005-02-07 Maciej W. Rozycki <macro at mips.com>
+
+ * elf64-mips.c: Fix formatting throughout.
+
+2005-02-07 Maciej W. Rozycki <macro at mips.com>
+
+ * elfn32-mips.c (elf_mips_howto_table_rela): Fix a comment typo.
+
+2005-02-07 Alexandre Oliva <aoliva at redhat.com>
+
+ * elf32-frv.c (FRVFDPIC_SYM_LOCAL): Remove special handling for
+ *ABS*/*UND* sections.
+ (elf32_frv_relocate_section): Move zero-addend-required error...
+ (_frv_emit_got_relocs_plt_entries): ... here. Report error for
+ missing needed TLS section.
+
+2005-02-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * aoutx.h (NAME(aout,find_nearest_line)): Correct case for N_SO
+ being the last symbol.
+ (aout_link_add_symbols): Just return TRUE if a warning
+ symbol was last.
+
+2005-02-07 Maciej W. Rozycki <macro at mips.com>
+
+ * elf32-mips.c (mips_elf_gprel32_reloc): Reject
+ R_MIPS_GPREL32 relocations against external symbols.
+ * elf64-mips.c (mips_elf64_gprel32_reloc): Replace an incorrect
+ comment.
+
+2005-02-07 Alan Modra <amodra at bigpond.net.au>
+
+ * elf-bfd.h (elf_string_from_elf_strtab): Delete macro.
+ * elf.c (bfd_elf_string_from_elf_section): Expand occurrence of
+ elf_string_from_elf_strtab.
+ (_bfd_elf_setup_group_pointers, bfd_section_from_shdr): Likewise.
+ (bfd_section_from_shdr): For SHT_SYMTAB, load SHT_SYMTAB_SHNDX too
+ if it exists. Don't do the reverse for SHT_SYMTAB_SHNDX. For
+ SHT_STRTAB, check whether the strtab is for symtab or dynsymtab by
+ looking at cached symtab info first, before iterating over headers.
+ For SHT_REL and SHT_RELA, load dynsymtab if needed.
+ * elfcode.h (elf_object_p): Don't load section header stringtab
+ specially.
+
+2005-02-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * elf32-i386.c (elf_i386_relocate_section): Disallow R_386_GOTOFF
+ against protected function when building shared library.
+
+ PR 584
+ * elf64-x86-64.c (is_32bit_relative_branch): New.
+ (elf64_x86_64_relocate_section): Alllow R_X86_64_PC32 on a
+ protected function symbol when building shared library for
+ 32bit relative branch instruction.
+
+2005-02-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (add_symbol_adjust): Don't create fake descriptor
+ syms when doing a relocatable link.
+ (ppc64_elf_gc_mark_hook): Check that syms are defined before looking
+ at u.def.section.
+ (ppc64_elf_tls_setup): Likewise.
+ (ppc64_elf_edit_opd): Don't use an undefined func desc sym.
+
+2005-02-04 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc_link_hash_entry): Add "fake".
+ (link_hash_newfunc): Clear all locals using memset.
+ (make_fdh): Remove flags param. Always create fake func desc
+ weak. Link the descriptor with the code entry sym.
+ (ppc64_elf_archive_symbol_lookup): Don't return fake syms.
+ (add_symbol_adjust): Adjust make_fdh call.
+ (func_desc_adjust): Likewise. Twiddle any pre-existing fake
+ descriptor to strong undefined if code entry is strong.
+
+2005-02-04 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (bfd_elf_record_link_assignment): Do "provide" symbol
+ lookup here. Set to new before calling bfd_link_repair_undef_list.
+ (elf_smash_syms): Check that u.undef.weak isn't the not_needed bfd.
+
+2005-02-03 Alan Modra <amodra at bigpond.net.au>
+
+ * linker.c (_bfd_link_hash_newfunc): Set all local fields.
+
+2005-02-03 Alan Modra <amodra at bigpond.net.au>
+
+ * linker.c (_bfd_generic_link_add_one_symbol): Set u.undef.weak.
+ * elflink.c (elf_smash_syms): Restore symbols that were undefweak
+ before the as-needed lib was loaded. Abort on unexpected refs.
+
+2005-02-02 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_smash_syms): Expand comments.
+ (elf_link_add_object_symbols): Only call elf_smash_syms for
+ as-needed dynamic objects.
+
+ * elfxx-ia64.c (elfNN_ia64_new_elf_hash_entry): Don't clear
+ everything, just the field specific to ia64.
+ * elf64-hppa.c (elf64_hppa_new_dyn_hash_entry): Likewise.
+
+2005-02-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (func_desc_adjust): Move code creating func desc sym to..
+ (make_fdh): ..here. New function. Don't set BSF_OBJECT for
+ undefined syms.
+ (struct add_symbol_adjust_data): New.
+ (add_symbol_adjust): Make an undefweak func desc for old ABI
+ objects to link with --as-needed shared libs. Return fail status.
+ Don't adjust old ABI func entry sym to weak if func desc syms
+ isn't defined.
+ (ppc64_elf_check_directives): Adjust call to add_symbol_adjust,
+ and return status.
+
+2005-02-01 Hans-Peter Nilsson <hp at axis.com>
+
+ * cpu-cris.c (get_compatible): Rearrange disabled code and comment
+ for clarity.
+
+2005-02-01 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_check_directives): Move undefs list fixup..
+ * linker.c (bfd_link_repair_undef_list): ..to new function, but don't
+ remove anything but new and undefweak.
+ * elflink.c (_bfd_elf_link_create_dynamic_sections): Override any
+ existing _DYNAMIC.
+ (_bfd_elf_create_dynamic_sections): Formatting.
+ (bfd_elf_record_link_assignment): Call bfd_link_repair_undef_list.
+ (_bfd_elf_merge_symbol): Don't handle as-needed syms here.
+ (struct elf_smash_data): New.
+ (elf_smash_syms): New function.
+ (elf_link_add_object_symbols): Call elf_smash_syms. Don't add
+ unneeded dynamic objects to loaded list.
+ (elf_link_output_extsym): Don't handle as-needed here. Strip
+ bfd_link_hash_new symbols.
+ * elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't
+ delref when dynindx is already -1.
+ * elf64-alpha.c (elf64_alpha_output_extsym): Strip bfd_link_hash_new
+ symbols.
+ * elfxx-mips.c (mips_elf_output_extsym): Likewise.
+
+2005-02-01 Ben Elliston <bje at au.ibm.com>
+
+ * elfxx-target.h (bfd_elfNN_bfd_discard_group): Redefine.
+
+2005-02-01 Ben Elliston <bje at au.ibm.com>
+
+ * aout-arm.c, aout-target.h, aoutx.h, archive.c, armnetbsd.c,
+ bfd-in.h, bfdio.c, coff-alpha.c, coff-arm.c, coff-h8300.c,
+ coff-i860.c, coff-mcore.c, coff-or32.c, coff-ppc.c, coff-sh.c,
+ coff-sparc.c, coffcode.h, coffgen.c, cofflink.c, cpu-cris.c,
+ cpu-h8500.c, cpu-ns32k.c, ecoff.c, ecofflink.c, elf.c,
+ elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-hppa.c,
+ elf32-i860.c, elf32-ip2k.c, elf32-m32r.c, elf32-sh.c,
+ elf32-v850.c, elf64-mips.c, elf64-sparc.c, elflink.c,
+ i386aout.c, i386msdos.c, i386os9k.c, ieee.c, mach-o.c,
+ nlm32-sparc.c, oasys.c, opncls.c, pdp11.c, pe-mips.c, peXXigen.c,
+ pef.c, peicode.h, reloc.c, riscix.c, section.c, simple.c, som.c,
+ sparclynx.c, targets.c, vms-misc.c, vms-tir.c, xsym.c,
+ hosts/delta68.h, hosts/vaxbsd.h: Remove #if 0'd code
+ throughout. Similarly, collapse #if 1'd code.
+
+2005-02-01 Ben Elliston <bje at au.ibm.com>
+
+ * elf-bfd.h (bfd_elf_discard_group): Remove.
+ * elf.c (bfd_elf_discard_group): Likewise.
+ * elfxx-target.h (bfd_elfNN_bfd_discard_group): Remove macro.
+
+2005-01-31 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-bfd.h (elf_backend_data): Add elf_backend_eh_frame_address_size.
+ (_bfd_elf_eh_frame_address_size): Declare.
+ * elfxx-target.h (elf_backend_eh_frame_address_size): Define a default.
+ (elfNN_bed): Initialize elf_backend_eh_frame_address_size.
+ * elfxx-mips.h (_bfd_mips_elf_eh_frame_address_size): Declare.
+ (elf_backend_eh_frame_address_size): Define.
+ * elfxx-mips.c (_bfd_mips_elf_eh_frame_address_size): New function.
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Get the address
+ size from the new backend hook.
+ (_bfd_elf_write_section_eh_frame): Likewise.
+ (_bfd_elf_eh_frame_address_size): New function.
+
+2005-01-31 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_symbian_special_sections): Do not set
+ SHF_WRITE for .init_array, .fini_array, and .preinit_array.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * confg.bfd: Make targets scheduled for obsoletion (m68k-lynxos,
+ sparc-lynxos, vax-vms) be obsolete.
+
+2005-01-28 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * elf-bfd.h (struct elf_backend_data): Add minpagesize.
+ * elf32-arm.c (ELF_MINPAGESIZE): Define.
+ * elf32-ppc.c (ELF_MINPAGESIZE): Define.
+ * elfcode.h (elf_object_p): Use minpagesize instead of
+ maxpagesize.
+ * elfxx-target.h (ELF_MINPAGESIZE): Default to ELF_MAXPAGESIZE.
+ (elfNN_bed): Include ELF_MINPAGESIZE.
+
+2005-01-28 Julian Brown <julian at codesourcery.com>
+
+ * bin-in.h (bfd_elf32_arm_set_target_relocs): Update prototype.
+ * bin-in2.h (bfd_elf32_arm_set_target_relocs): Update prototype.
+ * elf32-arm.c (elf32_arm_link_hash_table): Add fix_v4bx flag.
+ (bfd_elf32_arm_set_target_relocs): Add formal parameter fix_v4bx for
+ passing flag value from ld. Set flag value in global hash table entry.
+ (elf32_arm_final_link_relocate): Add code to implement R_ARM_V4BX
+ relocation.
+
+2005-01-27 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-25 Mark Mitchell <mark at codesourcery.com>
+
+ * elf32-arm.c (elf_backend_default_use_rela_p): Define to zero for
+ SymbianOS.
+
+2005-01-25 Alexandre Oliva <aoliva at redhat.com>
+
+ 2004-12-10 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (elf32_frv_relocate_section): Force local binding
+ for TLSMOFF.
+ * reloc.c: Add R_FRV_TLSMOFF.
+ * elf32-frv.c (elf32_frv_howto_table): Likewise.
+ (frv_reloc_map, frv_reloc_type_lookup): Map it.
+ (elf32_frv_relocate_section): Handle it.
+ (elf32_frv_check_relocs): Likewise.
+ * libbfd.h, bfd-in2.h: Rebuilt.
+ 2004-11-26 Alexandre Oliva <aoliva at redhat.com>
+ * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
+ when given an undefweak TLS symbol. Fix constant TLS PLT entries
+ such that they return the constant in gr9.
+ (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
+ symbols.
+ (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
+ too, such that they shrink on relaxation.
+ (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
+ marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
+ (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
+ if we can guarantee the use of 16-bit constants.
+ 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
+ Introduce TLS support for FR-V FDPIC.
+ * reloc.c: Add TLS relocations.
+ * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
+ (elf32_frv_rel_tlsdesc_value_howto): New.
+ (elf32_frv_rel_tlsoff_howto): New.
+ (frv_reloc_map): Add new mappings.
+ (struct frvfdpic_elf_link_hash_table): Add pointer to summary
+ reloc information.
+ (frvfdpic_dynamic_got_plt_info): New.
+ (frvfdpic_plt_tls_ret_offset): New.
+ (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
+ (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members.
+ (struct _frvfdpic_dynamic_got_plt_info): Likewise.
+ (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
+ section as local.
+ (struct frvfdpic_relocs_info): Add TLS fields.
+ (frvfdpic_relocs_info_hash): Warning clean up.
+ (frvfdpic_relocs_info_find): Initialize tlsplt_entry.
+ (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
+ (FRVFDPIC_TLS_BIAS): Define.
+ (tls_biased_base): New.
+ (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
+ relocations.
+ (frv_reloc_type_lookup): Likewise.
+ (frvfdpic_info_to_howto_rel): Likewise.
+ (elf32_frv_relocate_section): Likewise.
+ (_frv_create_got_section): Create the PLT section here.
+ (elf32_frvfdpic_create_dynamic_sections): Not here.
+ (_frvfdpic_count_nontls_entries): Move out of...
+ (_frvfdpic_count_got_plt_entries): ... here.
+ (_frvfdpic_count_tls_entries): Likewise. Add TLS support.
+ (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation
+ support.
+ (_frvfdpic_relax_tls_entries): New.
+ (_frvfdpic_compute_got_alloc_data): Add TLS support.
+ (_frvfdpic_get_tlsdesc_entry): New.
+ (_frvfdpic_assign_got_entries): Add TLS support.
+ (_frvfdpic_assign_plt_entries): Likewise.
+ (_frvfdpic_reset_got_plt_entries): New.
+ (_frvfdpic_size_got_plt): Move out of...
+ (elf32_frvfdpic_size_dynamic_sections): ... here.
+ (_frvfdpic_relax_got_plt_entries): New.
+ (elf32_frvfdpic_relax_section): New.
+ (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
+ (elf32_frv_check_relocs): Add TLS support.
+ (bfd_elf32_bfd_relax_section): Define for FDPIC.
+ * libbfd.h, bfd-in2.h: Rebuilt.
+
+2005-01-25 Alan Modra <amodra at bigpond.net.au>
+
+ * elf.c (_bfd_elf_get_dynamic_reloc_upper_bound): Only include
+ loadable reloc sections.
+ (_bfd_elf_canonicalize_dynamic_reloc): Likewise.
+ (_bfd_elf_get_synthetic_symtab): Return 0 if no dynamic syms.
+
+2005-01-25 Alan Modra <amodra at bigpond.net.au>
+
+ * elflink.c (elf_link_add_object_symbols): Don't create link dynamic
+ sections immediately when linking shared libs. Instead, wait until
+ we know a lib is needed.
+ (_bfd_elf_link_create_dynstrtab): Extract from..
+ (_bfd_elf_link_create_dynamic_sections_): ..here.
+ (elf_add_dt_needed_tag): Call _bfd_elf_link_create_dynstrtab and
+ _bfd_elf_link_create_dynamic_sections. Add abfd param. Allow
+ for non-existent .dynamic.
+ (elf_link_output_extsym): Don't complain about undefined symbols
+ in as-needed dynamic libs that aren't actually linked.
+
+2005-01-24 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate, ../gettext.m4 was updated.
+
+2005-01-21 Ben Elliston <bje at au.ibm.com>
+
+ * aout-encap.c: Remove unused file.
+
+2005-01-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 679
+ * elflink.c (_bfd_elf_dynamic_symbol_p): Only protected
+ non-function symbols are local.
+ (_bfd_elf_symbol_refs_local_p): Likewise.
+
+2005-01-18 Alan Modra <amodra at bigpond.net.au>
+
+ * bfd.c (bfd_link_just_syms): Add abfd param.
+ * bfd-in2.h: Regenerate.
+
+2005-01-17 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-eh-frame.c (skip_cfa_op, skip_non_nops): New functions.
+ (_bfd_elf_discard_section_eh_frame): Use them to interpret the CFA
+ instructions. If the amount of padding is known, reduce the size
+ of the CIE or FDE by that amount.
+
+2005-01-17 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-bfd.h (struct cie): Use bfd_vmas for code_align, ra_column and
+ augmentation_size. Use bfd_signed_vmas for data_align.
+ * elf-eh-frame.c (read_uleb128, read_sleb128): Delete in favor of...
+ (read_byte, skip_leb128, read_uleb128, read_sleb128): ...these new
+ functions. Don't read past the end of the enclosing CIE or FDE.
+ (skip_bytes): New utility function.
+ (_bfd_elf_discard_section_eh_frame): Use new functions, adding more
+ sanity checking.
+ (_bfd_elf_write_section_eh_frame): Use new functions.
+
+2005-01-17 Richard Sandiford <rsandifo at redhat.com>
+
+ * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Use an
+ assert-style REQUIRE() macro to handle sanity checks.
+
+2005-01-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dwarf2.c (dwarf2_debug): Move info_ptr_unit to ...
+ (comp_unit): Here.
+ (read_unsigned_leb128): Removed.
+ (read_signed_leb128): Removed.
+ (find_abstract_instance_name): Updated.
+ (parse_comp_unit): Accept info_ptr_unit.
+ (_bfd_dwarf2_find_nearest_line): Set info_ptr_unit for each
+ comp unit and pass it to parse_comp_unit.
+
+ * elf-eh-frame.c (read_unsigned_leb128): Moved to ...
+ (read_signed_leb128): Moved to ...
+ * libbfd.c: Here.
+
+ * libbfd-in.h (read_unsigned_leb128): New prototype.
+ (read_signed_leb128): Likewise.
+ * libbfd.h: Regenerated.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
+ Nick Clifton <nickc at redhat.com>
+
+ * cpu-sh.c (bfd_to_arch_table): Change arch_sh1_up to arch_sh_up,
+ arch__sh4_nofp_up to arch_sh4_nofpu_up and arch_sh4a_nofp_up to
+ arch_sh4a_nofpu_up in order to match the external names and make the
+ testsuite's job easier.
+ * archuires.c: Rename bfd_mach_sh2a_fake? to more meaningful
+ names.
+ * bfd-in2.h: Regenerate.
+
+2005-01-15 Andrew Cagney <cagney at gnu.org>
+
+ * bfd.m4: New file.
+ * acinclude.m4: Move BFD_NEED_DECLARATION,
+ BFD_HAVE_SYS_PROCFS_TYPE and BFD_HAVE_SYS_PROCFS_TYPE_MEMBER to
+ the new file bfd.m4. Include ../bfd/bfd.m4.
+ * configure: Re-generate.
+
+2005-01-12 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_howto_raw): Delete RELAX32* entries.
+ (ppc_elf_relax_section): Use PLT variants of RELAX32 relocs for
+ reaching PLT.
+ (ppc_elf_relocate_section): Handle R_PPC_RELAX32_PLT and
+ R_PPC_RELAX32PC_PLT.
+
+2005-01-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_gc_sweep_hook): Follow indirect and warning
+ symbols.
+ * elf32-arm.c (elf32_arm_gc_sweep_hook): Likewise.
+ * elf32-cris.c (cris_elf_gc_sweep_hook): Likewise.
+ * elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise.
+ * elf32-i386.c (elf_i386_gc_sweep_hook): Likewise.
+ * elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise.
+ * elf32-m68k.c (elf_m68k_gc_sweep_hook): Likewise.
+ * elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise.
+ * elf32-s390.c (elf_s390_gc_sweep_hook): Likewise.
+ * elf32-sh.c (sh_elf_gc_sweep_hook): Likewise.
+ * elf32-sparc.c (elf32_sparc_gc_sweep_hook): Likewise.
+ * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise.
+ * elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise.
+ * elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
+ * elf64-x86-64.c (elf64_x86_64_gc_sweep_hook): Likewise.
+
+2005-01-11 Alan Modra <amodra at bigpond.net.au>
+
+ * elf32-ppc.c (ppc_elf_create_dynamic_sections): Correct
+ .dynsbss flags.
+
+2005-01-10 Inderpreet Singh <inderpreetb at noida.hcltech.com>
+
+ * archures.c: Define bfd_mach_maxq10 and bfd_mach_maxq20.
+ * bfd-in2.h: Regenerate.
+ * coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Add code
+ to support these new machine values.
+ * cpu-maxq.c (bfd_maxq10_arch): New architecture definition for
+ the maxq10.
+ (bfd_maxq_arch): Update values for the maxq20.
+
+2005-01-10 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * elf64-sparc.c (sparc64_elf_adjust_dynamic_symbol): When linking a
+ non-shared object, do not reserve space in .plt and .rela.plt for
+ regular symbols neither defined nor referenced in shared objects.
+
+2005-01-09 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * elf32-sparc.c (elf32_sparc_link_hash_table_create): Use bfd_zmalloc
+ to zero the structure.
+ (create_got_section): Use BFD_ASSERT instead of abort.
+ * elf64-sparc.c (struct sparc64_elf_link_hash_table): New 'sgot' and
+ 'srelgot' fields.
+ (create_got_section): New function.
+ (sparc64_elf_create_dynamic_sections): Likewise.
+ (sparc64_elf_check_relocs): Invoke create_got_section instead of
+ _bfd_elf_create_got_section. Use the sgot and srelgot shortcuts.
+ (sparc64_elf_size_dynamic_sections): Use the srelgot shortcut.
+ (sparc64_elf_relocate_section): Use the sgot and srelgot shortcuts.
+ (sparc64_elf_finish_dynamic_symbol): Likewise.
+ (sparc64_elf_finish_dynamic_sections): Use the sgot shortcut.
+ (elf_backend_create_dynamic_sections): Define to
+ sparc64_elf_create_dynamic_sections.
+
+2005-01-09 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * elf32-sparc.c (elf32_sparc_omit_section_dynsym): New function.
+ (elf_backend_omit_section_dynsym): Define to it.
+ * elf64-sparc.c (sparc64_elf_omit_section_dynsym): New function.
+ (elf_backend_omit_section_dynsym): Define to it.
+
+2005-01-07 Jakub Jelinek <jakub at redhat.com>
+
+ * bfd/elf.c (INCLUDE_SECTION_IN_SEGMENT): Don't put empty sections into
+ PT_DYNAMIC segment, unless .dynamic.
+
+2005-01-06 Paul Brook <paul at codesourcery.com>
+
+ * config.bfd: Add entry for arm-*-vxworks and arm-*-windiss.
+ * configure.in: Add bfd_elf32_{big,little}arm_vxworks_vec.
+ * configure: Regenerate.
+ * elf32-arm.c: Add VxWorks target bfd.
+ (USE_REL): Remove.
+ (elf32_arm_link_hash_table): Add use_rel.
+ (elf32_arm_link_hash_table_create, elf32_arm_final_link_relocate,
+ elf32_arm_relocate_section): Replace USE_REL with runtime check.
+ Correct offset calculation for RELA case.
+ (elf_backend_may_use_rel_p, elf_backend_may_use_rela_p,
+ elf_backend_default_use_rela_p, elf_backend_rela_normal): Define.
+ (elf32_arm_vxworks_link_hash_table_create): New function.
+ * targets.c (bfd_elf32_bigarm_vxworks_vec): Add declaration.
+ (bfd_elf32_littlearm_vxworks_vec): Ditto.
+ (_bfd_target_vector): Add bfd_elf32_{big,little}arm_vxworks_vec.
+
+2005-01-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (struct ppc_link_hash_table): Add no_multi_toc and
+ multi_toc_needed.
+ (has_toc_reloc, makes_toc_func_call, call_check_in_progress): Define.
+ (ppc64_elf_check_relocs): Update references to has_gp_reloc.
+ (ppc64_elf_setup_section_lists): Add no_multi_toc parm, set htab bit.
+ (ppc64_elf_next_toc_section): Heed no_multi_toc.
+ (ppc64_elf_reinit_toc): Set multi_toc_needed.
+ (toc_adjusting_stub_needed): Rewrite.
+ (ppc64_elf_next_input_section): Use multi_toc_needed to shortcut
+ toc tests. Adjust for toc_adjusting_stub_needed changes.
+ (ppc64_elf_size_stubs): Update references to has_gp_reloc.
+ * elf64-ppc.h (ppc64_elf_setup_section_lists): Update prototype.
+ * section.c: Expand comment on backend bits.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2005-01-06 Alan Modra <amodra at bigpond.net.au>
+
+ * elf64-ppc.c (ppc64_elf_size_stubs): When determining need for
+ toc adjusting stub, do not test source section flags.
+
+2005-01-05 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * elf64-sparc.c (sparc64_elf_relocate_section): Ignore overflows
+ from STABS debugging sections again.
+
+2005-01-05 Fred Fish <fnf at specifixinc.com>
+
+ * dwarf2.c (struct dwarf2_debug): Add info_ptr_unit member.
+ (find_abstract_instance_name): New function.
+ (scan_unit_for_functions): Handle DW_TAG_inlined_subroutine.
+ (scan_unit_for_functions): Handle DW_AT_abstract_origin.
+ (_bfd_dwarf2_find_nearest_line): Initialize info_ptr_unit.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/bfd/Makefile.am
===================================================================
--- branches/binutils/package/bfd/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -11,10 +11,14 @@
SUBDIRS = doc po
-docdir = doc
+bfddocdir = doc
bfdlibdir = @bfdlibdir@
bfdincludedir = @bfdincludedir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+htmldir = @htmldir@
+
bfdlib_LTLIBRARIES = libbfd.la
WARN_CFLAGS = @WARN_CFLAGS@
@@ -111,6 +115,7 @@
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
+ cpu-xc16x.lo \
cpu-z80.lo \
cpu-z8k.lo
@@ -172,6 +177,7 @@
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
+ cpu-xc16x.c \
cpu-z80.c \
cpu-z8k.c
@@ -275,6 +281,7 @@
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
+ elf32-xc16x.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@@ -446,6 +453,7 @@
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
+ elf32-xc16x.c \
elf32.c \
elflink.c \
elf-strtab.c \
@@ -657,6 +665,35 @@
all diststuff: info
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
# Various kinds of .o files to put in libbfd.a:
# BFD_BACKENDS Routines the configured targets need.
# BFD_MACHINES Architecture-specific routines the configured targets need.
@@ -855,12 +892,12 @@
# Could really use a "copy-if-change"...
headers:
- (cd $(docdir); $(MAKE) protos $(FLAGS_TO_PASS))
- cp $(docdir)/bfd.h bfd-in2.h-new
+ (cd $(bfddocdir); $(MAKE) protos $(FLAGS_TO_PASS))
+ cp $(bfddocdir)/bfd.h bfd-in2.h-new
$(SHELL) $(srcdir)/../move-if-change bfd-in2.h-new $(srcdir)/bfd-in2.h
- cp $(docdir)/libbfd.h libbfd.h-new
+ cp $(bfddocdir)/libbfd.h libbfd.h-new
$(SHELL) $(srcdir)/../move-if-change libbfd.h-new $(srcdir)/libbfd.h
- cp $(docdir)/libcoff.h libcoff.h-new
+ cp $(bfddocdir)/libcoff.h libcoff.h-new
$(SHELL) $(srcdir)/../move-if-change libcoff.h-new $(srcdir)/libcoff.h
# We only rebuild the header files automatically if we have been
@@ -868,22 +905,22 @@
$(srcdir)/bfd-in2.h: @MAINT@ stmp-bin2-h ; @true
stmp-bin2-h: $(BFD_H_FILES) $(BFD64_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) bfd.h)
- cp $(docdir)/bfd.h bfd-in2.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) bfd.h)
+ cp $(bfddocdir)/bfd.h bfd-in2.h-new
$(SHELL) $(srcdir)/../move-if-change bfd-in2.h-new $(srcdir)/bfd-in2.h
touch stmp-bin2-h
$(srcdir)/libbfd.h: @MAINT@ stmp-lbfd-h ; @true
stmp-lbfd-h: $(LIBBFD_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) libbfd.h)
- cp $(docdir)/libbfd.h libbfd.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) libbfd.h)
+ cp $(bfddocdir)/libbfd.h libbfd.h-new
$(SHELL) $(srcdir)/../move-if-change libbfd.h-new $(srcdir)/libbfd.h
touch stmp-lbfd-h
$(srcdir)/libcoff.h: @MAINT@ stmp-lcoff-h ; @true
stmp-lcoff-h: $(LIBCOFF_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) libcoff.h)
- cp $(docdir)/libcoff.h libcoff.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) libcoff.h)
+ cp $(bfddocdir)/libcoff.h libcoff.h-new
$(SHELL) $(srcdir)/../move-if-change libcoff.h-new $(srcdir)/libcoff.h
touch stmp-lcoff-h
@@ -996,7 +1033,8 @@
$(INCDIR)/hashtab.h
cpu-m68hc12.lo: cpu-m68hc12.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
-cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
+ $(INCDIR)/opcode/m68k.h
cpu-m88k.lo: cpu-m88k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-m10200.lo: cpu-m10200.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
@@ -1032,6 +1070,7 @@
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@@ -1088,8 +1127,7 @@
libcoff.h $(INCDIR)/bfdlink.h coffcode.h coffswap.h
coff-aux.lo: coff-aux.c $(INCDIR)/filenames.h $(INCDIR)/coff/aux-coff.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h \
- coff-m68k.c $(INCDIR)/hashtab.h $(INCDIR)/coff/m68k.h \
- $(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
+ coff-m68k.c $(INCDIR)/hashtab.h libcoff.h $(INCDIR)/bfdlink.h \
coffcode.h coffswap.h
coff-h8300.lo: coff-h8300.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h $(INCDIR)/coff/h8300.h \
@@ -1214,10 +1252,11 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
-elf32-arm.lo: elf32-arm.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
- elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h elf32-target.h
+elf32-arm.lo: elf32-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ elf-vxworks.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h \
@@ -1308,7 +1347,8 @@
elf32-m68k.lo: elf32-m68k.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/m68k.h \
- $(INCDIR)/elf/reloc-macros.h elf32-target.h
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/m68k.h \
+ elf32-target.h
elf32-m68hc11.lo: elf32-m68hc11.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elf32-m68hc1x.h \
@@ -1343,14 +1383,14 @@
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elfxx-mips.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h $(INCDIR)/coff/ecoff.h \
- $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h
+ $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h elf-vxworks.h
elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfxx-mips.h \
$(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/symconst.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h \
- ecoffswap.h elf32-target.h
+ ecoffswap.h elf32-target.h elf-vxworks.h
elf32-mt.lo: elf32-mt.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mt.h \
@@ -1409,12 +1449,12 @@
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/sparc.h \
- elfxx-sparc.h
+ elfxx-sparc.h elf-vxworks.h
elf32-sparc.lo: elf32-sparc.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/sparc.h \
- elfxx-sparc.h elf32-target.h
+ elfxx-sparc.h elf32-target.h elf-vxworks.h
elf32-v850.lo: elf32-v850.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/v850.h \
@@ -1434,13 +1474,18 @@
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-config.h elf32-target.h
+elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
+ $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/elf/xc16x.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/elf/dwarf2.h $(INCDIR)/libiberty.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
elflink.lo: elflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/libiberty.h
+ $(INCDIR)/libiberty.h $(INCDIR)/objalloc.h
elf-strtab.lo: elf-strtab.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h
@@ -1779,12 +1824,12 @@
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \
- $(INCDIR)/hashtab.h elf32-target.h
+ elf32-target.h
elf64-ia64.lo: elf64-ia64.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \
- $(INCDIR)/hashtab.h elf64-target.h
+ elf64-target.h
peigen.lo: peigen.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
$(INCDIR)/coff/pe.h libcoff.h $(INCDIR)/bfdlink.h libpei.h
Modified: branches/binutils/package/bfd/Makefile.in
===================================================================
--- branches/binutils/package/bfd/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -217,6 +217,8 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
@@ -224,6 +226,7 @@
host_noncanonical = @host_noncanonical@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -255,7 +258,7 @@
CSEARCH = -I. -I$(srcdir) -I$(INCDIR)
MKDEP = gcc -MM
SUBDIRS = doc po
-docdir = doc
+bfddocdir = doc
bfdlib_LTLIBRARIES = libbfd.la
AM_CFLAGS = $(WARN_CFLAGS)
@@ -348,6 +351,7 @@
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
+ cpu-xc16x.lo \
cpu-z80.lo \
cpu-z8k.lo
@@ -409,6 +413,7 @@
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
+ cpu-xc16x.c \
cpu-z80.c \
cpu-z8k.c
@@ -513,6 +518,7 @@
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
+ elf32-xc16x.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@@ -684,6 +690,7 @@
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
+ elf32-xc16x.c \
elf32.c \
elflink.c \
elf-strtab.c \
@@ -1261,6 +1268,35 @@
all diststuff: info
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
stamp-ofiles: Makefile
rm -f tofiles
f=""; \
@@ -1429,12 +1465,12 @@
# Could really use a "copy-if-change"...
headers:
- (cd $(docdir); $(MAKE) protos $(FLAGS_TO_PASS))
- cp $(docdir)/bfd.h bfd-in2.h-new
+ (cd $(bfddocdir); $(MAKE) protos $(FLAGS_TO_PASS))
+ cp $(bfddocdir)/bfd.h bfd-in2.h-new
$(SHELL) $(srcdir)/../move-if-change bfd-in2.h-new $(srcdir)/bfd-in2.h
- cp $(docdir)/libbfd.h libbfd.h-new
+ cp $(bfddocdir)/libbfd.h libbfd.h-new
$(SHELL) $(srcdir)/../move-if-change libbfd.h-new $(srcdir)/libbfd.h
- cp $(docdir)/libcoff.h libcoff.h-new
+ cp $(bfddocdir)/libcoff.h libcoff.h-new
$(SHELL) $(srcdir)/../move-if-change libcoff.h-new $(srcdir)/libcoff.h
# We only rebuild the header files automatically if we have been
@@ -1442,22 +1478,22 @@
$(srcdir)/bfd-in2.h: @MAINT@ stmp-bin2-h ; @true
stmp-bin2-h: $(BFD_H_FILES) $(BFD64_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) bfd.h)
- cp $(docdir)/bfd.h bfd-in2.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) bfd.h)
+ cp $(bfddocdir)/bfd.h bfd-in2.h-new
$(SHELL) $(srcdir)/../move-if-change bfd-in2.h-new $(srcdir)/bfd-in2.h
touch stmp-bin2-h
$(srcdir)/libbfd.h: @MAINT@ stmp-lbfd-h ; @true
stmp-lbfd-h: $(LIBBFD_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) libbfd.h)
- cp $(docdir)/libbfd.h libbfd.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) libbfd.h)
+ cp $(bfddocdir)/libbfd.h libbfd.h-new
$(SHELL) $(srcdir)/../move-if-change libbfd.h-new $(srcdir)/libbfd.h
touch stmp-lbfd-h
$(srcdir)/libcoff.h: @MAINT@ stmp-lcoff-h ; @true
stmp-lcoff-h: $(LIBCOFF_H_FILES)
- (cd $(docdir); $(MAKE) $(FLAGS_TO_PASS) libcoff.h)
- cp $(docdir)/libcoff.h libcoff.h-new
+ (cd $(bfddocdir); $(MAKE) $(FLAGS_TO_PASS) libcoff.h)
+ cp $(bfddocdir)/libcoff.h libcoff.h-new
$(SHELL) $(srcdir)/../move-if-change libcoff.h-new $(srcdir)/libcoff.h
touch stmp-lcoff-h
@@ -1563,7 +1599,8 @@
$(INCDIR)/hashtab.h
cpu-m68hc12.lo: cpu-m68hc12.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
-cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-m68k.lo: cpu-m68k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
+ $(INCDIR)/opcode/m68k.h
cpu-m88k.lo: cpu-m88k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-m10200.lo: cpu-m10200.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-m10300.lo: cpu-m10300.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
@@ -1599,6 +1636,7 @@
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/hashtab.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-xc16x.lo: cpu-xc16x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z80.lo: cpu-z80.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
@@ -1655,8 +1693,7 @@
libcoff.h $(INCDIR)/bfdlink.h coffcode.h coffswap.h
coff-aux.lo: coff-aux.c $(INCDIR)/filenames.h $(INCDIR)/coff/aux-coff.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h \
- coff-m68k.c $(INCDIR)/hashtab.h $(INCDIR)/coff/m68k.h \
- $(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
+ coff-m68k.c $(INCDIR)/hashtab.h libcoff.h $(INCDIR)/bfdlink.h \
coffcode.h coffswap.h
coff-h8300.lo: coff-h8300.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h $(INCDIR)/coff/h8300.h \
@@ -1781,10 +1818,11 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
-elf32-arm.lo: elf32-arm.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
- elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h elf32-target.h
+elf32-arm.lo: elf32-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ elf-vxworks.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h \
@@ -1875,7 +1913,8 @@
elf32-m68k.lo: elf32-m68k.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/m68k.h \
- $(INCDIR)/elf/reloc-macros.h elf32-target.h
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/m68k.h \
+ elf32-target.h
elf32-m68hc11.lo: elf32-m68hc11.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elf32-m68hc1x.h \
@@ -1910,14 +1949,14 @@
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elfxx-mips.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h $(INCDIR)/coff/ecoff.h \
- $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h
+ $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h elf-vxworks.h
elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfxx-mips.h \
$(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/symconst.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h \
- ecoffswap.h elf32-target.h
+ ecoffswap.h elf32-target.h elf-vxworks.h
elf32-mt.lo: elf32-mt.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mt.h \
@@ -1976,12 +2015,12 @@
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/sparc.h \
- elfxx-sparc.h
+ elfxx-sparc.h elf-vxworks.h
elf32-sparc.lo: elf32-sparc.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/sparc.h \
- elfxx-sparc.h elf32-target.h
+ elfxx-sparc.h elf32-target.h elf-vxworks.h
elf32-v850.lo: elf32-v850.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/v850.h \
@@ -2001,13 +2040,18 @@
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/xtensa.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-config.h elf32-target.h
+elf32-xc16x.lo: elf32-xc16x.c $(INCDIR)/filenames.h \
+ $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/elf/xc16x.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/elf/dwarf2.h $(INCDIR)/libiberty.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
elflink.lo: elflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/libiberty.h
+ $(INCDIR)/libiberty.h $(INCDIR)/objalloc.h
elf-strtab.lo: elf-strtab.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h
@@ -2346,12 +2390,12 @@
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \
- $(INCDIR)/hashtab.h elf32-target.h
+ elf32-target.h
elf64-ia64.lo: elf64-ia64.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/objalloc.h \
- $(INCDIR)/hashtab.h elf64-target.h
+ elf64-target.h
peigen.lo: peigen.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
$(INCDIR)/coff/pe.h libcoff.h $(INCDIR)/bfdlink.h libpei.h
Modified: branches/binutils/package/bfd/aix386-core.c
===================================================================
--- branches/binutils/package/bfd/aix386-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/aix386-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -204,14 +204,7 @@
return core_hdr (abfd)->cd_cursig;
}
-static bfd_boolean
-aix386_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd;
- bfd *exec_bfd;
-{
- /* FIXME: We have no way of telling at this point. */
- return TRUE;
-}
+#define aix386_core_file_matches_executable_p generic_core_file_matches_executable_p
/* If somebody calls any byte-swapping routines, shoot them. */
Modified: branches/binutils/package/bfd/aix5ppc-core.c
===================================================================
--- branches/binutils/package/bfd/aix5ppc-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/aix5ppc-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -23,16 +23,16 @@
#include "bfd.h"
-#ifdef AIX_5_CORE
-
-#include "sysdep.h"
-#include "libbfd.h"
-
const bfd_target *xcoff64_core_p (bfd *);
bfd_boolean xcoff64_core_file_matches_executable_p (bfd *, bfd *);
char *xcoff64_core_file_failing_command (bfd *);
int xcoff64_core_file_failing_signal (bfd *);
+#ifdef AIX_5_CORE
+
+#include "sysdep.h"
+#include "libbfd.h"
+
/* Aix 5.1 system include file. */
/* Need to define this macro so struct ld_info64 get included. */
@@ -318,11 +318,6 @@
#else /* AIX_5_CORE */
-const bfd_target *xcoff64_core_p (bfd *);
-bfd_boolean xcoff64_core_file_matches_executable_p (bfd *, bfd *);
-char *xcoff64_core_file_failing_command (bfd *);
-int xcoff64_core_file_failing_signal (bfd *);
-
const bfd_target *
xcoff64_core_p (bfd *abfd ATTRIBUTE_UNUSED)
{
@@ -331,10 +326,9 @@
}
bfd_boolean
-xcoff64_core_file_matches_executable_p (bfd *core_bfd ATTRIBUTE_UNUSED,
- bfd *exec_bfd ATTRIBUTE_UNUSED)
+xcoff64_core_file_matches_executable_p (bfd *core_bfd, bfd *exec_bfd)
{
- return FALSE;
+ return generic_core_file_matches_executable_p (core_bfd, exec_bfd);
}
char *
Modified: branches/binutils/package/bfd/aoutx.h
===================================================================
--- branches/binutils/package/bfd/aoutx.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/aoutx.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD semi-generic back-end for a.out binaries.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -2859,9 +2859,10 @@
bfd *abfd,
struct bfd_hash_entry *(*newfunc)
(struct bfd_hash_entry *, struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
- return _bfd_link_hash_table_init (&table->root, abfd, newfunc);
+ return _bfd_link_hash_table_init (&table->root, abfd, newfunc, entsize);
}
/* Create an a.out link hash table. */
@@ -2876,8 +2877,9 @@
if (ret == NULL)
return NULL;
- if (! NAME (aout, link_hash_table_init) (ret, abfd,
- NAME (aout, link_hash_newfunc)))
+ if (!NAME (aout, link_hash_table_init) (ret, abfd,
+ NAME (aout, link_hash_newfunc),
+ sizeof (struct aout_link_hash_entry)))
{
free (ret);
return NULL;
@@ -5252,9 +5254,10 @@
aout_info.symbol_map = NULL;
aout_info.output_syms = NULL;
- if (! bfd_hash_table_init_n (&aout_info.includes.root,
- aout_link_includes_newfunc,
- 251))
+ if (!bfd_hash_table_init_n (&aout_info.includes.root,
+ aout_link_includes_newfunc,
+ sizeof (struct aout_link_includes_entry),
+ 251))
goto error_return;
includes_hash_initialized = TRUE;
Modified: branches/binutils/package/bfd/archures.c
===================================================================
--- branches/binutils/package/bfd/archures.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/archures.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD library support routines for architectures.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
@@ -80,16 +80,22 @@
.#define bfd_mach_m68040 6
.#define bfd_mach_m68060 7
.#define bfd_mach_cpu32 8
-.#define bfd_mach_mcf5200 9
-.#define bfd_mach_mcf5206e 10
-.#define bfd_mach_mcf5307 11
-.#define bfd_mach_mcf5407 12
-.#define bfd_mach_mcf528x 13
-.#define bfd_mach_mcfv4e 14
-.#define bfd_mach_mcf521x 15
-.#define bfd_mach_mcf5249 16
-.#define bfd_mach_mcf547x 17
-.#define bfd_mach_mcf548x 18
+.#define bfd_mach_mcf_isa_a_nodiv 9
+.#define bfd_mach_mcf_isa_a 10
+.#define bfd_mach_mcf_isa_a_mac 11
+.#define bfd_mach_mcf_isa_a_emac 12
+.#define bfd_mach_mcf_isa_aplus 13
+.#define bfd_mach_mcf_isa_aplus_mac 14
+.#define bfd_mach_mcf_isa_aplus_emac 15
+.#define bfd_mach_mcf_isa_b_nousp 16
+.#define bfd_mach_mcf_isa_b_nousp_mac 17
+.#define bfd_mach_mcf_isa_b_nousp_emac 18
+.#define bfd_mach_mcf_isa_b 19
+.#define bfd_mach_mcf_isa_b_mac 20
+.#define bfd_mach_mcf_isa_b_emac 21
+.#define bfd_mach_mcf_isa_b_float 22
+.#define bfd_mach_mcf_isa_b_float_mac 23
+.#define bfd_mach_mcf_isa_b_float_emac 24
. bfd_arch_vax, {* DEC Vax *}
. bfd_arch_i960, {* Intel 960 *}
. {* The order of the following is important.
@@ -317,7 +323,7 @@
. bfd_arch_iq2000, {* Vitesse IQ2000. *}
.#define bfd_mach_iq2000 1
.#define bfd_mach_iq10 2
-. bfd_arch_ms1,
+. bfd_arch_mt,
.#define bfd_mach_ms1 1
.#define bfd_mach_mrisc2 2
.#define bfd_mach_ms2 3
@@ -352,7 +358,7 @@
.#define bfd_mach_msp13 13
.#define bfd_mach_msp14 14
.#define bfd_mach_msp15 15
-.#define bfd_mach_msp16 16
+.#define bfd_mach_msp16 16
.#define bfd_mach_msp21 21
.#define bfd_mach_msp31 31
.#define bfd_mach_msp32 32
@@ -361,6 +367,10 @@
.#define bfd_mach_msp42 42
.#define bfd_mach_msp43 43
.#define bfd_mach_msp44 44
+. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
+.#define bfd_mach_xc16x 1
+.#define bfd_mach_xc16xl 2
+.#define bfd_mach_xc16xs 3
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
. bfd_arch_maxq, {* Dallas MAXQ 10/20 *}
@@ -445,7 +455,7 @@
extern const bfd_arch_info_type bfd_mn10200_arch;
extern const bfd_arch_info_type bfd_mn10300_arch;
extern const bfd_arch_info_type bfd_msp430_arch;
-extern const bfd_arch_info_type bfd_ms1_arch;
+extern const bfd_arch_info_type bfd_mt_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
extern const bfd_arch_info_type bfd_openrisc_arch;
extern const bfd_arch_info_type bfd_or32_arch;
@@ -467,6 +477,7 @@
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
extern const bfd_arch_info_type bfd_xtensa_arch;
+extern const bfd_arch_info_type bfd_xc16x_arch;
extern const bfd_arch_info_type bfd_z80_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
@@ -510,7 +521,7 @@
&bfd_mmix_arch,
&bfd_mn10200_arch,
&bfd_mn10300_arch,
- &bfd_ms1_arch,
+ &bfd_mt_arch,
&bfd_msp430_arch,
&bfd_ns32k_arch,
&bfd_openrisc_arch,
@@ -531,6 +542,7 @@
&bfd_we32k_arch,
&bfd_xstormy16_arch,
&bfd_xtensa_arch,
+ &bfd_xc16x_arch,
&bfd_z80_arch,
&bfd_z8k_arch,
#endif
@@ -1004,23 +1016,23 @@
break;
case 5200:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf5200;
+ number = bfd_mach_mcf_isa_a_nodiv;
break;
case 5206:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf5206e;
+ number = bfd_mach_mcf_isa_a_mac;
break;
case 5307:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf5307;
+ number = bfd_mach_mcf_isa_a_mac;
break;
case 5407:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf5407;
+ number = bfd_mach_mcf_isa_b_nousp_mac;
break;
case 5282:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf528x;
+ number = bfd_mach_mcf_isa_aplus_emac;
break;
case 32000:
Modified: branches/binutils/package/bfd/bfd-in.h
===================================================================
--- branches/binutils/package/bfd/bfd-in.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/bfd-in.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,8 @@
/* Main header file for the bfd library -- portable access to object files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by Cygnus Support.
@@ -375,6 +376,8 @@
struct bfd_hash_entry **table;
/* The number of slots in the hash table. */
unsigned int size;
+ /* The size of elements. */
+ unsigned int entsize;
/* A function used to create new elements in the hash table. The
first entry is itself a pointer to an element. When this
function is first invoked, this pointer will be NULL. However,
@@ -394,7 +397,8 @@
(struct bfd_hash_table *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
/* Initialize a hash table specifying a size. */
extern bfd_boolean bfd_hash_table_init_n
@@ -402,7 +406,7 @@
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
const char *),
- unsigned int size);
+ unsigned int, unsigned int);
/* Free up a hash table. */
extern void bfd_hash_table_free
@@ -706,6 +710,10 @@
extern void _bfd_fix_excluded_sec_syms
(bfd *, struct bfd_link_info *);
+extern unsigned bfd_m68k_mach_to_features (int);
+
+extern int bfd_m68k_features_to_mach (unsigned);
+
extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs
(bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
char **);
Modified: branches/binutils/package/bfd/bfd-in2.h
===================================================================
--- branches/binutils/package/bfd/bfd-in2.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/bfd-in2.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -8,7 +8,8 @@
/* Main header file for the bfd library -- portable access to object files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by Cygnus Support.
@@ -382,6 +383,8 @@
struct bfd_hash_entry **table;
/* The number of slots in the hash table. */
unsigned int size;
+ /* The size of elements. */
+ unsigned int entsize;
/* A function used to create new elements in the hash table. The
first entry is itself a pointer to an element. When this
function is first invoked, this pointer will be NULL. However,
@@ -401,7 +404,8 @@
(struct bfd_hash_table *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
/* Initialize a hash table specifying a size. */
extern bfd_boolean bfd_hash_table_init_n
@@ -409,7 +413,7 @@
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
const char *),
- unsigned int size);
+ unsigned int, unsigned int);
/* Free up a hash table. */
extern void bfd_hash_table_free
@@ -713,6 +717,10 @@
extern void _bfd_fix_excluded_sec_syms
(bfd *, struct bfd_link_info *);
+extern unsigned bfd_m68k_mach_to_features (int);
+
+extern int bfd_m68k_features_to_mach (unsigned);
+
extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs
(bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
char **);
@@ -1669,16 +1677,22 @@
#define bfd_mach_m68040 6
#define bfd_mach_m68060 7
#define bfd_mach_cpu32 8
-#define bfd_mach_mcf5200 9
-#define bfd_mach_mcf5206e 10
-#define bfd_mach_mcf5307 11
-#define bfd_mach_mcf5407 12
-#define bfd_mach_mcf528x 13
-#define bfd_mach_mcfv4e 14
-#define bfd_mach_mcf521x 15
-#define bfd_mach_mcf5249 16
-#define bfd_mach_mcf547x 17
-#define bfd_mach_mcf548x 18
+#define bfd_mach_mcf_isa_a_nodiv 9
+#define bfd_mach_mcf_isa_a 10
+#define bfd_mach_mcf_isa_a_mac 11
+#define bfd_mach_mcf_isa_a_emac 12
+#define bfd_mach_mcf_isa_aplus 13
+#define bfd_mach_mcf_isa_aplus_mac 14
+#define bfd_mach_mcf_isa_aplus_emac 15
+#define bfd_mach_mcf_isa_b_nousp 16
+#define bfd_mach_mcf_isa_b_nousp_mac 17
+#define bfd_mach_mcf_isa_b_nousp_emac 18
+#define bfd_mach_mcf_isa_b 19
+#define bfd_mach_mcf_isa_b_mac 20
+#define bfd_mach_mcf_isa_b_emac 21
+#define bfd_mach_mcf_isa_b_float 22
+#define bfd_mach_mcf_isa_b_float_mac 23
+#define bfd_mach_mcf_isa_b_float_emac 24
bfd_arch_vax, /* DEC Vax */
bfd_arch_i960, /* Intel 960 */
/* The order of the following is important.
@@ -1906,7 +1920,7 @@
bfd_arch_iq2000, /* Vitesse IQ2000. */
#define bfd_mach_iq2000 1
#define bfd_mach_iq10 2
- bfd_arch_ms1,
+ bfd_arch_mt,
#define bfd_mach_ms1 1
#define bfd_mach_mrisc2 2
#define bfd_mach_ms2 3
@@ -1941,7 +1955,7 @@
#define bfd_mach_msp13 13
#define bfd_mach_msp14 14
#define bfd_mach_msp15 15
-#define bfd_mach_msp16 16
+#define bfd_mach_msp16 16
#define bfd_mach_msp21 21
#define bfd_mach_msp31 31
#define bfd_mach_msp32 32
@@ -1950,6 +1964,10 @@
#define bfd_mach_msp42 42
#define bfd_mach_msp43 43
#define bfd_mach_msp44 44
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+#define bfd_mach_xc16x 1
+#define bfd_mach_xc16xl 2
+#define bfd_mach_xc16xs 3
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_maxq, /* Dallas MAXQ 10/20 */
@@ -2570,6 +2588,11 @@
BFD_RELOC_MIPS_TLS_TPREL_LO16,
+/* MIPS ELF relocations (VxWorks extensions). */
+ BFD_RELOC_MIPS_COPY,
+ BFD_RELOC_MIPS_JUMP_SLOT,
+
+
/* Fujitsu Frv Relocations. */
BFD_RELOC_FRV_LABEL16,
BFD_RELOC_FRV_LABEL24,
@@ -2661,6 +2684,9 @@
BFD_RELOC_386_TLS_DTPMOD32,
BFD_RELOC_386_TLS_DTPOFF32,
BFD_RELOC_386_TLS_TPOFF32,
+ BFD_RELOC_386_TLS_GOTDESC,
+ BFD_RELOC_386_TLS_DESC_CALL,
+ BFD_RELOC_386_TLS_DESC,
/* x86-64/elf relocations */
BFD_RELOC_X86_64_GOT32,
@@ -2681,6 +2707,14 @@
BFD_RELOC_X86_64_TPOFF32,
BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_GOTPC32,
+ BFD_RELOC_X86_64_GOT64,
+ BFD_RELOC_X86_64_GOTPCREL64,
+ BFD_RELOC_X86_64_GOTPC64,
+ BFD_RELOC_X86_64_GOTPLT64,
+ BFD_RELOC_X86_64_PLTOFF64,
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC,
+ BFD_RELOC_X86_64_TLSDESC_CALL,
+ BFD_RELOC_X86_64_TLSDESC,
/* ns32k relocations */
BFD_RELOC_NS32K_IMM_8,
@@ -3051,6 +3085,22 @@
/* ADI Blackfin Long Jump pcrel. */
BFD_RELOC_BFIN_24_PCREL_JUMP_L,
+/* ADI Blackfin FD-PIC relocations. */
+ BFD_RELOC_BFIN_GOT17M4,
+ BFD_RELOC_BFIN_GOTHI,
+ BFD_RELOC_BFIN_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC,
+ BFD_RELOC_BFIN_FUNCDESC_GOT17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTLO,
+ BFD_RELOC_BFIN_FUNCDESC_VALUE,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI,
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO,
+ BFD_RELOC_BFIN_GOTOFF17M4,
+ BFD_RELOC_BFIN_GOTOFFHI,
+ BFD_RELOC_BFIN_GOTOFFLO,
+
/* ADI Blackfin GOT relocation. */
BFD_RELOC_BFIN_GOT,
@@ -3196,6 +3246,9 @@
/* Renesas M16C/M32C Relocations. */
BFD_RELOC_M32C_HI8,
+ BFD_RELOC_M32C_RL_JUMP,
+ BFD_RELOC_M32C_RL_1ADDR,
+ BFD_RELOC_M32C_RL_2ADDR,
/* Renesas M32R (formerly Mitsubishi M32R) relocs.
This is a 24 bit absolute address. */
@@ -3460,6 +3513,10 @@
of program memory address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_HH8_LDI,
+/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI,
+
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(usually data memory address) into 8 bit immediate value of SUBI insn. */
BFD_RELOC_AVR_LO8_LDI_NEG,
@@ -3474,6 +3531,10 @@
of LDI or SUBI insn. */
BFD_RELOC_AVR_HH8_LDI_NEG,
+/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
+of 32 bit value) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_AVR_MS8_LDI_NEG,
+
/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
command address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_LO8_LDI_PM,
@@ -3959,28 +4020,34 @@
BFD_RELOC_XSTORMY16_24,
BFD_RELOC_XSTORMY16_FPTR16,
+/* Infineon Relocations. */
+ BFD_RELOC_XC16X_PAG,
+ BFD_RELOC_XC16X_POF,
+ BFD_RELOC_XC16X_SEG,
+ BFD_RELOC_XC16X_SOF,
+
/* Relocations used by VAX ELF. */
BFD_RELOC_VAX_GLOB_DAT,
BFD_RELOC_VAX_JMP_SLOT,
BFD_RELOC_VAX_RELATIVE,
-/* Morpho MS1 - 16 bit immediate relocation. */
- BFD_RELOC_MS1_PC16,
+/* Morpho MT - 16 bit immediate relocation. */
+ BFD_RELOC_MT_PC16,
-/* Morpho MS1 - Hi 16 bits of an address. */
- BFD_RELOC_MS1_HI16,
+/* Morpho MT - Hi 16 bits of an address. */
+ BFD_RELOC_MT_HI16,
-/* Morpho MS1 - Low 16 bits of an address. */
- BFD_RELOC_MS1_LO16,
+/* Morpho MT - Low 16 bits of an address. */
+ BFD_RELOC_MT_LO16,
-/* Morpho MS1 - Used to tell the linker which vtable entries are used. */
- BFD_RELOC_MS1_GNU_VTINHERIT,
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTINHERIT,
-/* Morpho MS1 - Used to tell the linker which vtable entries are used. */
- BFD_RELOC_MS1_GNU_VTENTRY,
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTENTRY,
-/* Morpho MS1 - 8 bit immediate relocation. */
- BFD_RELOC_MS1_PCINSN8,
+/* Morpho MT - 8 bit immediate relocation. */
+ BFD_RELOC_MT_PCINSN8,
/* msp430 specific relocation codes */
BFD_RELOC_MSP430_10_PCREL,
@@ -4064,14 +4131,14 @@
BFD_RELOC_XTENSA_OP1,
BFD_RELOC_XTENSA_OP2,
-/* Xtensa relocation to mark that the assembler expanded the
+/* Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size. */
BFD_RELOC_XTENSA_ASM_EXPAND,
-/* Xtensa relocation to mark that the linker should simplify
-assembler-expanded instructions. This is commonly used
-internally by the linker after analysis of a
+/* Xtensa relocation to mark that the linker should simplify
+assembler-expanded instructions. This is commonly used
+internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND. */
BFD_RELOC_XTENSA_ASM_SIMPLIFY,
@@ -4637,6 +4704,9 @@
bfd_boolean core_file_matches_executable_p
(bfd *core_bfd, bfd *exec_bfd);
+bfd_boolean generic_core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
/* Extracted from targets.c. */
#define BFD_SEND(bfd, message, arglist) \
((*((bfd)->xvec->message)) arglist)
Modified: branches/binutils/package/bfd/bfd.c
===================================================================
--- branches/binutils/package/bfd/bfd.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/bfd.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Generic BFD library interface and support routines.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -216,6 +216,11 @@
#include "libecoff.h"
#undef obj_symbols
#include "elf-bfd.h"
+
+#ifndef EXIT_FAILURE
+#define EXIT_FAILURE 1
+#endif
+
/* provide storage for subsystem, stack and heap data which may have been
passed in on the command line. Ld puts this data into a bfd_link_info
@@ -437,7 +442,7 @@
/* Reserve enough space for the existing format string. */
avail -= strlen (fmt) + 1;
if (avail > 1000)
- abort ();
+ _exit (EXIT_FAILURE);
p = fmt;
while (1)
@@ -775,10 +780,6 @@
/* A more or less friendly abort message. In libbfd.h abort is
defined to call this function. */
-#ifndef EXIT_FAILURE
-#define EXIT_FAILURE 1
-#endif
-
void
_bfd_abort (const char *file, int line, const char *fn)
{
@@ -791,7 +792,7 @@
(_("BFD %s internal error, aborting at %s line %d\n"),
BFD_VERSION_STRING, file, line);
(*_bfd_error_handler) (_("Please report this bug.\n"));
- xexit (EXIT_FAILURE);
+ _exit (EXIT_FAILURE);
}
/*
@@ -1439,7 +1440,8 @@
preserve->section_count = abfd->section_count;
preserve->section_htab = abfd->section_htab;
- if (! bfd_hash_table_init (&abfd->section_htab, bfd_section_hash_newfunc))
+ if (! bfd_hash_table_init (&abfd->section_htab, bfd_section_hash_newfunc,
+ sizeof (struct section_hash_entry)))
return FALSE;
abfd->tdata.any = NULL;
Modified: branches/binutils/package/bfd/cisco-core.c
===================================================================
--- branches/binutils/package/bfd/cisco-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cisco-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -75,7 +75,7 @@
static const bfd_target *cisco_core_file_p PARAMS ((bfd *));
char *cisco_core_file_failing_command PARAMS ((bfd *));
int cisco_core_file_failing_signal PARAMS ((bfd *));
-bfd_boolean cisco_core_file_matches_executable_p PARAMS ((bfd *, bfd *));
+#define cisco_core_file_matches_executable_p generic_core_file_matches_executable_p
/* Examine the file for a crash info struct at the offset given by
CRASH_INFO_LOC. */
@@ -317,14 +317,6 @@
{
return abfd->tdata.cisco_core_data->sig;
}
-
-bfd_boolean
-cisco_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd ATTRIBUTE_UNUSED;
- bfd *exec_bfd ATTRIBUTE_UNUSED;
-{
- return TRUE;
-}
extern const bfd_target cisco_core_little_vec;
Modified: branches/binutils/package/bfd/coff-arm.c
===================================================================
--- branches/binutils/package/bfd/coff-arm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-arm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for ARM COFF files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -879,8 +879,10 @@
if (ret == NULL)
return NULL;
- if (! _bfd_coff_link_hash_table_init
- (& ret->root, abfd, _bfd_coff_link_hash_newfunc))
+ if (!_bfd_coff_link_hash_table_init (&ret->root,
+ abfd,
+ _bfd_coff_link_hash_newfunc,
+ sizeof (struct coff_link_hash_entry)))
{
free (ret);
return NULL;
Modified: branches/binutils/package/bfd/coff-h8300.c
===================================================================
--- branches/binutils/package/bfd/coff-h8300.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-h8300.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for Renesas H8/300 COFF binaries.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Steve Chamberlain, <sac at cygnus.com>.
@@ -63,13 +63,6 @@
funcvec_hash_newfunc
(struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
-static bfd_boolean
-funcvec_hash_table_init
- (struct funcvec_hash_table *, bfd *,
- struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
- struct bfd_hash_table *,
- const char *));
-
static bfd_reloc_status_type special
(bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
static int select_reloc
@@ -181,13 +174,14 @@
struct bfd_hash_entry *(*newfunc)
(struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
/* Initialize our local fields, then call the generic initialization
routine. */
table->offset = 0;
table->abfd = abfd;
- return (bfd_hash_table_init (&table->root, newfunc));
+ return (bfd_hash_table_init (&table->root, newfunc, entsize));
}
/* Create the derived linker hash table. We use a derived hash table
@@ -204,7 +198,8 @@
if (ret == NULL)
return NULL;
if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
- _bfd_generic_link_hash_newfunc))
+ _bfd_generic_link_hash_newfunc,
+ sizeof (struct generic_link_hash_entry)))
{
free (ret);
return NULL;
@@ -671,7 +666,7 @@
/* Get the address of the target of this branch. */
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma);
@@ -703,7 +698,7 @@
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
/* Get the address of the instruction (not the reloc). */
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma + 1);
@@ -817,7 +812,7 @@
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
/* Get the address of the next instruction. */
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma + 1);
@@ -864,7 +859,7 @@
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
/* Get the address of the instruction (not the reloc). */
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma - 1);
@@ -925,7 +920,7 @@
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
/* Get the address of the instruction (not the reloc). */
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma + 2);
@@ -1064,7 +1059,7 @@
/* Get the address of the target of this branch. */
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
- dot = (link_order->offset
+ dot = (input_section->output_offset
+ dst_address
+ link_order->u.indirect.section->output_section->vma) + 1;
@@ -1298,7 +1293,8 @@
/* And initialize the funcvec hash table. */
if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
- funcvec_hash_newfunc))
+ funcvec_hash_newfunc,
+ sizeof (struct funcvec_hash_entry)))
{
bfd_release (abfd, funcvec_hash_table);
return FALSE;
Modified: branches/binutils/package/bfd/coff-h8500.c
===================================================================
--- branches/binutils/package/bfd/coff-h8500.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-h8500.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* BFD back-end for Renesas H8/500 COFF binaries.
- Copyright 1993, 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1993, 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
Contributed by Cygnus Support.
Written by Steve Chamberlain, <sac at cygnus.com>.
@@ -245,9 +245,9 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = link_order->offset
- + *dst_ptr
- + link_order->u.indirect.section->output_section->vma;
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ + input_section->output_section->vma);
int gap = dst - dot - 1; /* -1 since were in the odd byte of the
word and the pc's been incremented. */
@@ -269,9 +269,9 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = link_order->offset
- + *dst_ptr
- + link_order->u.indirect.section->output_section->vma;
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ + input_section->output_section->vma);
int gap = dst - dot - 1; /* -1 since were in the odd byte of the
word and the pc's been incremented. */
Modified: branches/binutils/package/bfd/coff-ppc.c
===================================================================
--- branches/binutils/package/bfd/coff-ppc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-ppc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for PowerPC Microsoft Portable Executable files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Original version pieced together by Kim Knuttila (krk at cygnus.com)
@@ -127,11 +127,6 @@
static struct bfd_hash_entry *ppc_coff_link_hash_newfunc
PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *,
const char *));
-static bfd_boolean ppc_coff_link_hash_table_init
- PARAMS ((struct ppc_coff_link_hash_table *, bfd *,
- struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
- struct bfd_hash_table *,
- const char *)));
static struct bfd_link_hash_table *ppc_coff_link_hash_table_create
PARAMS ((bfd *));
static bfd_boolean coff_ppc_relocate_section
@@ -184,14 +179,14 @@
/* Initialize a PE linker hash table. */
static bfd_boolean
-ppc_coff_link_hash_table_init (table, abfd, newfunc)
- struct ppc_coff_link_hash_table *table;
- bfd *abfd;
- struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *,
- struct bfd_hash_table *,
- const char *));
+ppc_coff_link_hash_table_init (struct ppc_coff_link_hash_table *table,
+ bfd *abfd,
+ struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
+ struct bfd_hash_table *,
+ const char *),
+ unsigned int entsize)
{
- return _bfd_coff_link_hash_table_init (&table->root, abfd, newfunc);
+ return _bfd_coff_link_hash_table_init (&table->root, abfd, newfunc, entsize);
}
/* Create a PE linker hash table. */
@@ -206,8 +201,9 @@
ret = (struct ppc_coff_link_hash_table *) bfd_malloc (amt);
if (ret == NULL)
return NULL;
- if (! ppc_coff_link_hash_table_init (ret, abfd,
- ppc_coff_link_hash_newfunc))
+ if (!ppc_coff_link_hash_table_init (ret, abfd,
+ ppc_coff_link_hash_newfunc,
+ sizeof (struct ppc_coff_link_hash_entry)))
{
free (ret);
return (struct bfd_link_hash_table *) NULL;
Modified: branches/binutils/package/bfd/coff-w65.c
===================================================================
--- branches/binutils/package/bfd/coff-w65.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-w65.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* BFD back-end for WDC 65816 COFF binaries.
- Copyright 1995, 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1995, 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
Written by Steve Chamberlain, <sac at cygnus.com>.
@@ -316,9 +316,9 @@
{
int gap = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = link_order->offset
- + dst_address
- + link_order->u.indirect.section->output_section->vma;
+ bfd_vma dot = (dst_address
+ + input_section->output_offset
+ + input_section->output_section->vma);
gap -= dot + 1;
if (gap < -128 || gap > 127)
@@ -340,9 +340,9 @@
{
bfd_vma gap = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = link_order->offset
- + dst_address
- + link_order->u.indirect.section->output_section->vma;
+ bfd_vma dot = (dst_address
+ + input_section->output_offset
+ + input_section->output_section->vma);
/* This wraps within the page, so ignore the relativeness, look at the
high part. */
Modified: branches/binutils/package/bfd/coff-z80.c
===================================================================
--- branches/binutils/package/bfd/coff-z80.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-z80.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -34,6 +34,11 @@
complain_overflow_dont, 0, "r_imm32", TRUE, 0xffffffff, 0xffffffff,
FALSE);
+static reloc_howto_type r_imm24 =
+HOWTO (R_IMM24, 0, 1, 24, FALSE, 0,
+ complain_overflow_dont, 0, "r_imm24", TRUE, 0x00ffffff, 0x00ffffff,
+ FALSE);
+
static reloc_howto_type r_imm16 =
HOWTO (R_IMM16, 0, 1, 16, FALSE, 0,
complain_overflow_dont, 0, "r_imm16", TRUE, 0x0000ffff, 0x0000ffff,
@@ -84,6 +89,9 @@
case R_IMM16:
internal->howto = &r_imm16;
break;
+ case R_IMM24:
+ internal->howto = &r_imm24;
+ break;
case R_IMM32:
internal->howto = &r_imm32;
break;
@@ -106,6 +114,7 @@
{
case BFD_RELOC_8: return & r_imm8;
case BFD_RELOC_16: return & r_imm16;
+ case BFD_RELOC_24: return & r_imm24;
case BFD_RELOC_32: return & r_imm32;
case BFD_RELOC_8_PCREL: return & r_jr;
case BFD_RELOC_Z80_DISP8: return & r_off8;
@@ -173,7 +182,7 @@
break;
case R_IMM8:
- val = bfd_get_16 ( in_abfd, data+*src_ptr)
+ val = bfd_get_8 ( in_abfd, data+*src_ptr)
+ bfd_coff_reloc16_get_value (reloc, link_info, input_section);
bfd_put_8 (in_abfd, val, data + *dst_ptr);
(*dst_ptr) += 1;
@@ -188,6 +197,16 @@
(*src_ptr) += 2;
break;
+ case R_IMM24:
+ val = bfd_get_16 ( in_abfd, data+*src_ptr)
+ + (bfd_get_8 ( in_abfd, data+*src_ptr+2) << 16)
+ + bfd_coff_reloc16_get_value (reloc, link_info, input_section);
+ bfd_put_16 (in_abfd, val, data + *dst_ptr);
+ bfd_put_8 (in_abfd, val >> 16, data + *dst_ptr+2);
+ (*dst_ptr) += 3;
+ (*src_ptr) += 3;
+ break;
+
case R_IMM32:
val = bfd_get_32 ( in_abfd, data+*src_ptr)
+ bfd_coff_reloc16_get_value (reloc, link_info, input_section);
@@ -200,8 +219,8 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = (link_order->offset
- + *dst_ptr
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ input_section->output_section->vma);
int gap = dst - dot - 1; /* -1, Since the offset is relative
to the value of PC after reading
Modified: branches/binutils/package/bfd/coff-z8k.c
===================================================================
--- branches/binutils/package/bfd/coff-z8k.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/coff-z8k.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -230,8 +230,8 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = (link_order->offset
- + *dst_ptr
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ input_section->output_section->vma);
int gap = dst - dot - 1; /* -1, since we're in the odd byte of the
word and the pc's been incremented. */
@@ -258,8 +258,8 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = (link_order->offset
- + *dst_ptr
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ input_section->output_section->vma);
int gap = dst - dot - 1; /* -1, since we're in the odd byte of the
word and the pc's been incremented. */
@@ -289,8 +289,8 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = (link_order->offset
- + *dst_ptr
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ input_section->output_section->vma);
int gap = dst - dot - 2;
@@ -318,8 +318,8 @@
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- bfd_vma dot = (link_order->offset
- + *dst_ptr
+ bfd_vma dot = (*dst_ptr
+ + input_section->output_offset
+ input_section->output_section->vma);
int gap = dst - dot - 2;
Modified: branches/binutils/package/bfd/cofflink.c
===================================================================
--- branches/binutils/package/bfd/cofflink.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cofflink.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* COFF specific linker code.
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -94,10 +94,11 @@
bfd *abfd,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
memset (&table->stab_info, 0, sizeof (table->stab_info));
- return _bfd_link_hash_table_init (&table->root, abfd, newfunc);
+ return _bfd_link_hash_table_init (&table->root, abfd, newfunc, entsize);
}
/* Create a COFF linker hash table. */
@@ -113,7 +114,8 @@
return NULL;
if (! _bfd_coff_link_hash_table_init (ret, abfd,
- _bfd_coff_link_hash_newfunc))
+ _bfd_coff_link_hash_newfunc,
+ sizeof (struct coff_link_hash_entry)))
{
free (ret);
return (struct bfd_link_hash_table *) NULL;
Modified: branches/binutils/package/bfd/config.bfd
===================================================================
--- branches/binutils/package/bfd/config.bfd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/config.bfd 2006-04-19 08:33:31 UTC (rev 12)
@@ -87,7 +87,6 @@
m88*) targ_archs=bfd_m88k_arch ;;
maxq*) targ_archs=bfd_maxq_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
-mt) targ_archs=bfd_ms1_arch ;;
or32*) targ_archs=bfd_or32_arch ;;
pdp11*) targ_archs=bfd_pdp11_arch ;;
pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
@@ -314,7 +313,8 @@
bfin-*-*)
targ_defvec=bfd_elf32_bfin_vec
- tar_underscore=yes
+ targ_selvecs=bfd_elf32_bfinfdpic_vec
+ targ_underscore=yes
;;
c30-*-*aout* | tic30-*-*aout*)
@@ -600,6 +600,10 @@
# FIXME: This should eventually be checked at runtime.
targ_cflags=-DSTRICT_PE_FORMAT
;;
+ i[3-7]86-*-rdos*)
+ targ_defvec=bfd_elf32_i386_vec
+ targ_selvecs=i386coff_vec
+ ;;
i[3-7]86-*-mingw32* | i[3-7]86-*-cygwin* | i[3-7]86-*-winnt | i[3-7]86-*-pe)
targ_defvec=i386pe_vec
targ_selvecs="i386pe_vec i386pei_vec bfd_elf32_i386_vec"
@@ -824,12 +828,12 @@
targ_selvecs=ecoff_little_vec
;;
mips*el-*-netbsd*)
- targ_defvec=bfd_elf32_littlemips_vec
- targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_little_vec ecoff_big_vec"
+ targ_defvec=bfd_elf32_tradlittlemips_vec
+ targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_little_vec ecoff_big_vec"
;;
mips*-*-netbsd*)
- targ_defvec=bfd_elf32_bigmips_vec
- targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec"
+ targ_defvec=bfd_elf32_tradbigmips_vec
+ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
;;
mips*-dec-* | mips*el-*-ecoff*)
targ_defvec=ecoff_little_vec
@@ -865,6 +869,16 @@
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
+#ifdef BFD64
+ mips*el-*-vxworks*)
+ targ_defvec=bfd_elf32_littlemips_vxworks_vec
+ targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+ ;;
+ mips*-*-vxworks*)
+ targ_defvec=bfd_elf32_bigmips_vxworks_vec
+ targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+ ;;
+#endif
mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
@@ -927,7 +941,7 @@
;;
mt-*-elf)
- targ_defvec=bfd_elf32_ms1_vec
+ targ_defvec=bfd_elf32_mt_vec
;;
msp430-*-*)
@@ -1270,6 +1284,10 @@
sparc-*-sysv4*)
targ_defvec=bfd_elf32_sparc_vec
;;
+ sparc-*-vxworks*)
+ targ_defvec=bfd_elf32_sparc_vxworks_vec
+ targ_selvecs="bfd_elf32_sparc_vec sunos_big_vec"
+ ;;
sparc-*-netware*)
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs="nlm32_sparc_vec sunos_big_vec"
@@ -1367,7 +1385,10 @@
targ_defvec=bfd_elf32_xtensa_le_vec
targ_selvecs=bfd_elf32_xtensa_be_vec
;;
-
+ xc16x-*-elf)
+ targ_defvec=bfd_elf32_xc16x_vec
+ ;;
+
z80-*-*)
targ_defvec=z80coff_vec
targ_underscore=no
Modified: branches/binutils/package/bfd/configure
===================================================================
--- branches/binutils/package/bfd/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE AR ac_ct_AR RANLIB ac_ct_RANLIB LN_S LIBTOOL WARN_CFLAGS NO_WERROR MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT INSTALL_LIBBFD_TRUE INSTALL_LIBBFD_FALSE host_noncanonical target_noncanonical bfdlibdir bfdincludedir CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l HDEFINES BFD_HOST_64BIT_LONG BFD_HOST_LONG_LONG BFD_HOST_64_BIT_DEFINED BFD_HOST_64_BIT BFD_HOST_U_64_BIT CC_FOR_BUILD EXEEXT_FOR_BUILD COREFILE COREFLAG WIN32LDFLAGS WIN32LIBADD TDEFINES wordsize bfd_libs all_backends bfd_backends bfd_machines bfd_default_target_size bfd_file_ptr bfd_ufile_ptr tdefaults LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE AR ac_ct_AR RANLIB ac_ct_RANLIB LN_S LIBTOOL WARN_CFLAGS NO_WERROR MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT INSTALL_LIBBFD_TRUE INSTALL_LIBBFD_FALSE host_noncanonical target_noncanonical bfdlibdir bfdincludedir CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l HDEFINES BFD_HOST_64BIT_LONG BFD_HOST_LONG_LONG BFD_HOST_64_BIT_DEFINED BFD_HOST_64_BIT BFD_HOST_U_64_BIT CC_FOR_BUILD EXEEXT_FOR_BUILD COREFILE COREFLAG WIN32LDFLAGS WIN32LIBADD TDEFINES wordsize bfd_libs all_backends bfd_backends bfd_machines bfd_default_target_size bfd_file_ptr bfd_ufile_ptr tdefaults datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
ac_subst_files=''
# Initialize some variables set by options.
@@ -3505,6 +3505,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3515,6 +3516,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3575,14 +3577,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3643,6 +3638,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3976,7 +4032,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3979 "configure"' > conftest.$ac_ext
+ echo '#line 4035 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -4031,6 +4087,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -12969,14 +13071,17 @@
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
bfd_elf32_bfin_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
+ bfd_elf32_bfinfdpic_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_bigarc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
- bfd_elf32_bigarm_vec) tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ bfd_elf32_bigarm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_symbian_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_vxworks_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_bigmips_vxworks_vec)
+ tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
@@ -13004,11 +13109,13 @@
bfd_elf32_little_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_littlearc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
bfd_elf32_littlearm_symbian_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlearm_vxworks_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_littlemips_vxworks_vec)
+ tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_m32c_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
@@ -13022,12 +13129,12 @@
bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
- bfd_elf32_ms1_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
+ bfd_elf32_mt_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
- bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
@@ -13052,26 +13159,28 @@
bfd_elf32_shlin_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shlnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
- bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf32.lo $elf" ;;
- bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
- bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
+ bfd_elf32_sparc_vxworks_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
+ bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
+ bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_powerpc_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_powerpcle_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
@@ -13082,9 +13191,9 @@
bfd_elf64_sh64blin_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64lnbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64nbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
- bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
+ bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_x86_64_vec) tb="$tb elf64-x86-64.lo elf64.lo $elf"; target_size=64 ;;
bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;;
bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;;
@@ -13223,7 +13332,7 @@
# Target architecture .o files.
# A couple of CPUs use shorter file names to avoid problems on DOS
# filesystems.
-ta=`echo $selarchs | sed -e s/_ms1_/_mt_/ -e s/bfd_/cpu-/g -e s/_arch/.lo/g -e s/mn10200/m10200/ -e s/mn10300/m10300/`
+ta=`echo $selarchs | sed -e s/bfd_/cpu-/g -e s/_arch/.lo/g -e s/mn10200/m10200/ -e s/mn10300/m10300/`
# Weed out duplicate .o files.
f=""
@@ -14417,6 +14526,11 @@
ac_config_commands="$ac_config_commands default"
+
+
+
+
+
cat >confcache <<\_ACEOF
# This file is a shell script that caches the results of configure
# tests run on this system so they can be shared between configure
@@ -15185,6 +15299,9 @@
s, at bfd_file_ptr@,$bfd_file_ptr,;t t
s, at bfd_ufile_ptr@,$bfd_ufile_ptr,;t t
s, at tdefaults@,$tdefaults,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LIBOBJS@,$LIBOBJS,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
CEOF
Modified: branches/binutils/package/bfd/configure.host
===================================================================
--- branches/binutils/package/bfd/configure.host 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/configure.host 2006-04-19 08:33:31 UTC (rev 12)
@@ -19,11 +19,13 @@
case "${host}" in
-hppa*-*-hpux*) # HP/UX's ftello64 et.al. declarations are only
+hppa*64*-*-hpux*) # HP/UX's ftello64 et.al. declarations are only
# visible when _LARGEFILE64_SOURCE is defined.
# Without those declarations, real_ftell et.al.
# get mis-compiled.
- HDEFINES="-DHOST_HPPAHPUX -D_LARGEFILE64_SOURCE" ;;
+ HDEFINES="-DHOST_HPPAHPUX -D_LARGEFILE64_SOURCE"
+ host64=true;;
+hppa*-*-hpux*) HDEFINES="-DHOST_HPPAHPUX -D_LARGEFILE64_SOURCE" ;;
hppa*-*-hiux*) HDEFINES=-DHOST_HPPAHPUX ;;
hppa*-*-mpeix*) HDEFINES=-DHOST_HPPAMPEIX ;;
hppa*-*-bsd*) HDEFINES=-DHOST_HPPABSD ;;
Modified: branches/binutils/package/bfd/configure.in
===================================================================
--- branches/binutils/package/bfd/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -584,14 +584,17 @@
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
bfd_elf32_bfin_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
+ bfd_elf32_bfinfdpic_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_bigarc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
- bfd_elf32_bigarm_vec) tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ bfd_elf32_bigarm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_symbian_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_vxworks_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_bigmips_vxworks_vec)
+ tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
@@ -619,11 +622,13 @@
bfd_elf32_little_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
bfd_elf32_littlearc_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
bfd_elf32_littlearm_symbian_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlearm_vxworks_vec)
- tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo $elf" ;;
- bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
+ bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_littlemips_vxworks_vec)
+ tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_m32c_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
@@ -637,12 +642,12 @@
bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
- bfd_elf32_ms1_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
+ bfd_elf32_mt_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
- bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
@@ -667,26 +672,28 @@
bfd_elf32_shlin_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shlnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
- bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf32.lo $elf" ;;
- bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
- bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
+ bfd_elf32_sparc_vxworks_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
+ bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
+ bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
+ bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_powerpc_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_powerpcle_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
@@ -697,9 +704,9 @@
bfd_elf64_sh64blin_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64lnbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64nbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
- bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf64.lo $elf"; target_size=64 ;;
- bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf64.lo $elf"; target_size=64 ;;
+ bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_x86_64_vec) tb="$tb elf64-x86-64.lo elf64.lo $elf"; target_size=64 ;;
bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;;
bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;;
@@ -836,7 +843,7 @@
# Target architecture .o files.
# A couple of CPUs use shorter file names to avoid problems on DOS
# filesystems.
-ta=`echo $selarchs | sed -e s/_ms1_/_mt_/ -e s/bfd_/cpu-/g -e s/_arch/.lo/g -e s/mn10200/m10200/ -e s/mn10300/m10300/`
+ta=`echo $selarchs | sed -e s/bfd_/cpu-/g -e s/_arch/.lo/g -e s/mn10200/m10200/ -e s/mn10300/m10300/`
# Weed out duplicate .o files.
f=""
@@ -956,5 +963,11 @@
rm -f doc/config.status
AC_CONFIG_FILES([Makefile doc/Makefile bfd-in3.h:bfd-in2.h po/Makefile.in:po/Make-in])
AC_CONFIG_COMMANDS([default],[[sed -e '/SRC-POTFILES =/r po/SRC-POTFILES' -e '/BLD-POTFILES =/r po/BLD-POTFILES' po/Makefile.in > po/Makefile]],[[]])
+
+dnl Required by html and install-html
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
AC_OUTPUT
Modified: branches/binutils/package/bfd/corefile.c
===================================================================
--- branches/binutils/package/bfd/corefile.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/corefile.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* Core file generic interface routines for BFD.
- Copyright 1990, 1991, 1992, 1993, 1994, 2000, 2001, 2002, 2003
+ Copyright 1990, 1991, 1992, 1993, 1994, 2000, 2001, 2002, 2003, 2005
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -107,3 +107,59 @@
return BFD_SEND (core_bfd, _core_file_matches_executable_p,
(core_bfd, exec_bfd));
}
+
+/*
+FUNCTION
+ generic_core_file_matches_executable_p
+
+SYNOPSIS
+ bfd_boolean generic_core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
+DESCRIPTION
+ Return TRUE if the core file attached to @var{core_bfd}
+ was generated by a run of the executable file attached
+ to @var{exec_bfd}. The match is based on executable
+ basenames only.
+
+ Note: When not able to determine the core file failing
+ command or the executable name, we still return TRUE even
+ though we're not sure that core file and executable match.
+ This is to avoid generating a false warning in situations
+ where we really don't know whether they match or not.
+*/
+
+bfd_boolean
+generic_core_file_matches_executable_p (bfd *core_bfd, bfd *exec_bfd)
+{
+ char *exec;
+ char *core;
+ char *last_slash;
+
+ if (exec_bfd == NULL || core_bfd == NULL)
+ return TRUE;
+
+ /* The cast below is to avoid a compiler warning due to the assignment
+ of the const char * returned by bfd_core_file_failing_command to a
+ non-const char *. In this case, the assignement does not lead to
+ breaking the const, as we're only reading the string. */
+
+ core = (char *) bfd_core_file_failing_command (core_bfd);
+ if (core == NULL)
+ return TRUE;
+
+ exec = bfd_get_filename (exec_bfd);
+ if (exec == NULL)
+ return TRUE;
+
+ last_slash = strrchr (core, '/');
+ if (last_slash != NULL)
+ core = last_slash + 1;
+
+ last_slash = strrchr (exec, '/');
+ if (last_slash != NULL)
+ exec = last_slash + 1;
+
+ return strcmp (exec, core) == 0;
+}
+
Modified: branches/binutils/package/bfd/cpu-arm.c
===================================================================
--- branches/binutils/package/bfd/cpu-arm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-arm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -404,9 +404,12 @@
bfd_boolean
bfd_is_arm_mapping_symbol_name (const char * name)
{
+ /* The ARM compiler outputs several obsolete forms. Recognize them
+ in addition to the standard $a, $t and $d. */
return (name != NULL)
&& (name[0] == '$')
- && ((name[1] == 'a') || (name[1] == 't') || (name[1] == 'd'))
- && (name[2] == 0);
+ && ((name[1] == 'a') || (name[1] == 't') || (name[1] == 'd')
+ || (name[1] == 'm') || (name[1] == 'f') || (name[1] == 'p'))
+ && (name[2] == 0 || name[2] == '.');
}
Modified: branches/binutils/package/bfd/cpu-avr.c
===================================================================
--- branches/binutils/package/bfd/cpu-avr.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-avr.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,75 +1,34 @@
/* BFD library support routines for the AVR architecture.
- Copyright 1999, 2000, 2002 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2002, 2006 Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc at overta.ru>
-This file is part of BFD, the Binary File Descriptor library.
+ This file is part of BFD, the Binary File Descriptor library.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
-static const bfd_arch_info_type *compatible
- PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *));
-
-#define N(addr_bits, machine, print, default, next) \
-{ \
- 8, /* 8 bits in a word */ \
- addr_bits, /* bits in an address */ \
- 8, /* 8 bits in a byte */ \
- bfd_arch_avr, \
- machine, /* machine */ \
- "avr", /* arch_name */ \
- print, /* printable name */ \
- 1, /* section align power */ \
- default, /* the default machine */ \
- compatible, \
- bfd_default_scan, \
- next \
-}
-
-static const bfd_arch_info_type arch_info_struct[] =
-{
- /* AT90S1200, ATtiny1x, ATtiny28 */
- N (16, bfd_mach_avr1, "avr:1", FALSE, & arch_info_struct[1]),
-
- /* AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22 */
- N (16, bfd_mach_avr2, "avr:2", FALSE, & arch_info_struct[2]),
-
- /* ATmega103, ATmega603 */
- N (22, bfd_mach_avr3, "avr:3", FALSE, & arch_info_struct[3]),
-
- /* ATmega83, ATmega85 */
- N (16, bfd_mach_avr4, "avr:4", FALSE, & arch_info_struct[4]),
-
- /* ATmega161, ATmega163, ATmega32, AT94K */
- N (22, bfd_mach_avr5, "avr:5", FALSE, NULL)
-};
-
-const bfd_arch_info_type bfd_avr_arch =
- N (16, bfd_mach_avr2, "avr", TRUE, & arch_info_struct[0]);
-
/* This routine is provided two arch_infos and works out which AVR
machine which would be compatible with both and returns a pointer
to its info structure. */
static const bfd_arch_info_type *
-compatible (a,b)
- const bfd_arch_info_type * a;
- const bfd_arch_info_type * b;
+compatible (const bfd_arch_info_type * a,
+ const bfd_arch_info_type * b)
{
/* If a & b are for different architectures we can do nothing. */
if (a->arch != b->arch)
@@ -91,3 +50,40 @@
/* Never reached! */
return NULL;
}
+
+#define N(addr_bits, machine, print, default, next) \
+{ \
+ 8, /* 8 bits in a word. */ \
+ addr_bits, /* bits in an address. */ \
+ 8, /* 8 bits in a byte. */ \
+ bfd_arch_avr, \
+ machine, /* Machine number. */ \
+ "avr", /* Architecture name. */ \
+ print, /* Printable name. */ \
+ 1, /* Section align power. */ \
+ default, /* Is this the default ? */ \
+ compatible, \
+ bfd_default_scan, \
+ next \
+}
+
+static const bfd_arch_info_type arch_info_struct[] =
+{
+ /* AT90S1200, ATtiny1x, ATtiny28. */
+ N (16, bfd_mach_avr1, "avr:1", FALSE, & arch_info_struct[1]),
+
+ /* AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22. */
+ N (16, bfd_mach_avr2, "avr:2", FALSE, & arch_info_struct[2]),
+
+ /* ATmega103, ATmega603. */
+ N (22, bfd_mach_avr3, "avr:3", FALSE, & arch_info_struct[3]),
+
+ /* ATmega83, ATmega85. */
+ N (16, bfd_mach_avr4, "avr:4", FALSE, & arch_info_struct[4]),
+
+ /* ATmega161, ATmega163, ATmega32, AT94K. */
+ N (22, bfd_mach_avr5, "avr:5", FALSE, NULL)
+};
+
+const bfd_arch_info_type bfd_avr_arch =
+ N (16, bfd_mach_avr2, "avr", TRUE, & arch_info_struct[0]);
Modified: branches/binutils/package/bfd/cpu-ia64-opc.c
===================================================================
--- branches/binutils/package/bfd/cpu-ia64-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-ia64-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-/* Copyright 1998, 1999, 2000, 2001, 2002, 2003
+/* Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
@@ -114,6 +114,29 @@
}
static const char*
+ins_immu5b (const struct ia64_operand *self, ia64_insn value,
+ ia64_insn *code)
+{
+ if (value < 32 || value > 63)
+ return "value must be between 32 and 63";
+ return ins_immu (self, value - 32, code);
+}
+
+static const char*
+ext_immu5b (const struct ia64_operand *self, ia64_insn code,
+ ia64_insn *valuep)
+{
+ const char *result;
+
+ result = ext_immu (self, code, valuep);
+ if (result)
+ return result;
+
+ *valuep = *valuep + 32;
+ return 0;
+}
+
+static const char*
ins_immus8 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
{
if (value & 0x7)
@@ -506,6 +529,8 @@
"a 1-bit integer (-1, 0)" },
{ ABS, ins_immu, ext_immu, 0, {{ 2, 13}}, UDEC, /* IMMU2 */
"a 2-bit unsigned (0-3)" },
+ { ABS, ins_immu5b, ext_immu5b, 0, {{ 5, 14}}, UDEC, /* IMMU5b */
+ "a 5-bit unsigned (32 + (0-31))" },
{ ABS, ins_immu, ext_immu, 0, {{ 7, 13}}, 0, /* IMMU7a */
"a 7-bit unsigned (0-127)" },
{ ABS, ins_immu, ext_immu, 0, {{ 7, 20}}, 0, /* IMMU7b */
Modified: branches/binutils/package/bfd/cpu-m68k.c
===================================================================
--- branches/binutils/package/bfd/cpu-m68k.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-m68k.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD library support routines for architectures.
Copyright 1990, 1991, 1992, 1993, 1994, 1997, 1998, 2000, 2001, 2002,
- 2003, 2004 Free Software Foundation, Inc.
+ 2003, 2004, 2006 Free Software Foundation, Inc.
Hacked by Steve Chamberlain of Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -22,9 +22,14 @@
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
+#include "opcode/m68k.h"
+static const bfd_arch_info_type *
+bfd_m68k_compatible (const bfd_arch_info_type *a,
+ const bfd_arch_info_type *b);
+
#define N(name, print,d,next) \
-{ 32, 32, 8, bfd_arch_m68k, name, "m68k",print,2,d,bfd_default_compatible,bfd_default_scan, next, }
+{ 32, 32, 8, bfd_arch_m68k, name, "m68k",print,2,d,bfd_m68k_compatible,bfd_default_scan, next, }
static const bfd_arch_info_type arch_info_struct[] =
{
@@ -34,19 +39,187 @@
N(bfd_mach_m68020, "m68k:68020", FALSE, &arch_info_struct[4]),
N(bfd_mach_m68030, "m68k:68030", FALSE, &arch_info_struct[5]),
N(bfd_mach_m68040, "m68k:68040", FALSE, &arch_info_struct[6]),
- N(bfd_mach_cpu32, "m68k:cpu32", FALSE, &arch_info_struct[7]),
- N(bfd_mach_mcf5200, "m68k:5200", FALSE, &arch_info_struct[8]),
- N(bfd_mach_mcf5206e,"m68k:5206e", FALSE, &arch_info_struct[9]),
- N(bfd_mach_mcf5307, "m68k:5307", FALSE, &arch_info_struct[10]),
- N(bfd_mach_mcf5407, "m68k:5407", FALSE, &arch_info_struct[11]),
- N(bfd_mach_m68060, "m68k:68060", FALSE, &arch_info_struct[12]),
- N(bfd_mach_mcf528x, "m68k:528x", FALSE, &arch_info_struct[13]),
- N(bfd_mach_mcf521x, "m68k:521x", FALSE, &arch_info_struct[14]),
- N(bfd_mach_mcf5249, "m68k:5249", FALSE, &arch_info_struct[15]),
- N(bfd_mach_mcf547x, "m68k:547x", FALSE, &arch_info_struct[16]),
- N(bfd_mach_mcf548x, "m68k:548x", FALSE, &arch_info_struct[17]),
- N(bfd_mach_mcfv4e, "m68k:cfv4e", FALSE, 0),
+ N(bfd_mach_m68060, "m68k:68060", FALSE, &arch_info_struct[7]),
+ N(bfd_mach_cpu32, "m68k:cpu32", FALSE, &arch_info_struct[8]),
+
+ /* Various combinations of CF architecture features */
+ N(bfd_mach_mcf_isa_a_nodiv, "m68k:isa-a:nodiv",
+ FALSE, &arch_info_struct[9]),
+ N(bfd_mach_mcf_isa_a, "m68k:isa-a",
+ FALSE, &arch_info_struct[10]),
+ N(bfd_mach_mcf_isa_a_mac, "m68k:isa-a:mac",
+ FALSE, &arch_info_struct[11]),
+ N(bfd_mach_mcf_isa_a_emac, "m68k:isa-a:emac",
+ FALSE, &arch_info_struct[12]),
+ N(bfd_mach_mcf_isa_aplus, "m68k:isa-aplus",
+ FALSE, &arch_info_struct[13]),
+ N(bfd_mach_mcf_isa_aplus_mac, "m68k:isa-aplus:mac",
+ FALSE, &arch_info_struct[14]),
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:isa-aplus:emac",
+ FALSE, &arch_info_struct[15]),
+ N(bfd_mach_mcf_isa_b_nousp, "m68k:isa-b:nousp",
+ FALSE, &arch_info_struct[16]),
+ N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:isa-b:nousp:mac",
+ FALSE, &arch_info_struct[17]),
+ N(bfd_mach_mcf_isa_b_nousp_emac, "m68k:isa-b:nousp:emac",
+ FALSE, &arch_info_struct[18]),
+ N(bfd_mach_mcf_isa_b, "m68k:isa-b",
+ FALSE, &arch_info_struct[19]),
+ N(bfd_mach_mcf_isa_b_mac, "m68k:isa-b:mac",
+ FALSE, &arch_info_struct[20]),
+ N(bfd_mach_mcf_isa_b_emac, "m68k:isa-b:emac",
+ FALSE, &arch_info_struct[21]),
+ N(bfd_mach_mcf_isa_b_float, "m68k:isa-b:float",
+ FALSE, &arch_info_struct[22]),
+ N(bfd_mach_mcf_isa_b_float_mac, "m68k:isa-b:float:mac",
+ FALSE, &arch_info_struct[23]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:isa-b:float:emac",
+ FALSE, &arch_info_struct[24]),
+
+ /* Legacy names for CF architectures */
+ N(bfd_mach_mcf_isa_a_nodiv, "m68k:5200", FALSE, &arch_info_struct[25]),
+ N(bfd_mach_mcf_isa_a_mac,"m68k:5206e", FALSE, &arch_info_struct[26]),
+ N(bfd_mach_mcf_isa_a_mac, "m68k:5307", FALSE, &arch_info_struct[27]),
+ N(bfd_mach_mcf_isa_b_nousp_mac, "m68k:5407", FALSE, &arch_info_struct[28]),
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:528x", FALSE, &arch_info_struct[29]),
+ N(bfd_mach_mcf_isa_aplus_emac, "m68k:521x", FALSE, &arch_info_struct[30]),
+ N(bfd_mach_mcf_isa_a_emac, "m68k:5249", FALSE, &arch_info_struct[31]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:547x",
+ FALSE, &arch_info_struct[32]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:548x",
+ FALSE, &arch_info_struct[33]),
+ N(bfd_mach_mcf_isa_b_float_emac, "m68k:cfv4e", FALSE, 0),
};
const bfd_arch_info_type bfd_m68k_arch =
N(0, "m68k", TRUE, &arch_info_struct[0]);
+
+/* Table indexed by bfd_mach_arch number indicating which
+ architectural features are supported. */
+static const unsigned m68k_arch_features[] =
+{
+ 0,
+ m68000|m68881|m68851,
+ m68000|m68881|m68851,
+ m68010|m68881|m68851,
+ m68020|m68881|m68851,
+ m68030|m68881|m68851,
+ m68040|m68881|m68851,
+ m68060|m68881|m68851,
+ cpu32|m68881,
+ mcfisa_a,
+ mcfisa_a|mcfhwdiv,
+ mcfisa_a|mcfhwdiv|mcfmac,
+ mcfisa_a|mcfhwdiv|mcfemac,
+ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfusp,
+ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfusp|mcfmac,
+ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfusp|mcfemac,
+ mcfisa_a|mcfhwdiv|mcfisa_b,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|mcfmac,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|mcfemac,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfmac,
+ mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfemac,
+};
+
+/* Return the count of bits set in MASK */
+static unsigned
+bit_count (unsigned mask)
+{
+ unsigned ix;
+
+ for (ix = 0; mask; ix++)
+ /* Clear the LSB set */
+ mask ^= mask & -mask;
+ return ix;
+}
+
+/* Return the architectural features supported by MACH */
+
+unsigned
+bfd_m68k_mach_to_features (int mach)
+{
+ if ((unsigned)mach
+ >= sizeof (m68k_arch_features) / sizeof (m68k_arch_features[0]))
+ mach = 0;
+ return m68k_arch_features[mach];
+}
+
+/* Return the bfd machine that most closely represents the
+ architectural features. We find the machine with the smallest
+ number of additional features. If there is no such machine, we
+ find the one with the smallest number of missing features. */
+
+int bfd_m68k_features_to_mach (unsigned features)
+{
+ int superset = 0, subset = 0;
+ unsigned extra = 99, missing = 99;
+ unsigned ix;
+
+ for (ix = 0;
+ ix != sizeof (m68k_arch_features) / sizeof (m68k_arch_features[0]);
+ ix++)
+ {
+ unsigned this_extra, this_missing;
+
+ if (m68k_arch_features[ix] == features)
+ return ix;
+ this_extra = bit_count (m68k_arch_features[ix] & ~features);
+ if (this_extra < extra)
+ {
+ extra = this_extra;
+ superset = ix;
+ }
+
+ this_missing = bit_count (features & ~m68k_arch_features[ix]);
+ if (this_missing < missing)
+ {
+ missing = this_missing;
+ superset = ix;
+ }
+ }
+ return superset ? superset : subset;
+}
+
+static const bfd_arch_info_type *
+bfd_m68k_compatible (const bfd_arch_info_type *a,
+ const bfd_arch_info_type *b)
+{
+ if (a->arch != b->arch)
+ return NULL;
+
+ if (a->bits_per_word != b->bits_per_word)
+ return NULL;
+
+ if (!a->mach)
+ return b;
+ if (!b->mach)
+ return a;
+
+ if (a->mach <= bfd_mach_m68060 && b->mach <= bfd_mach_m68060)
+ /* Merge m68k machine. */
+ return a->mach > b->mach ? a : b;
+ else if (a->mach >= bfd_mach_mcf_isa_a_nodiv
+ && b->mach >= bfd_mach_mcf_isa_a_nodiv)
+ {
+ /* Merge cf machine. */
+ unsigned features = (bfd_m68k_mach_to_features (a->mach)
+ | bfd_m68k_mach_to_features (b->mach));
+
+ /* ISA A+ and ISA B are incompatible. */
+ if ((~features & (mcfisa_aa | mcfisa_b)) == 0)
+ return NULL;
+
+ /* MAC and EMAC code cannot be merged. */
+ if ((~features & (mcfmac | mcfemac)) == 0)
+ return NULL;
+
+ return bfd_lookup_arch (a->arch, bfd_m68k_features_to_mach (features));
+ }
+ else
+ /* They are incompatible. */
+ return NULL;
+}
Modified: branches/binutils/package/bfd/cpu-mt.c
===================================================================
--- branches/binutils/package/bfd/cpu-mt.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-mt.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-/* BFD support for the Morpho Technologies MS1 processor.
+/* BFD support for the Morpho Technologies MT processor.
Copyright (C) 2001, 2002, 2005 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -27,9 +27,9 @@
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
- bfd_arch_ms1, /* Architecture. */
+ bfd_arch_mt, /* Architecture. */
bfd_mach_mrisc2, /* Machine. */
- "ms1", /* Architecture name. */
+ "mt", /* Architecture name. */
"ms1-003", /* Printable name. */
1, /* Section align power. */
FALSE, /* The default ? */
@@ -41,9 +41,9 @@
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
- bfd_arch_ms1, /* Architecture. */
+ bfd_arch_mt, /* Architecture. */
bfd_mach_ms2, /* Machine. */
- "ms1", /* Architecture name. */
+ "mt", /* Architecture name. */
"ms2", /* Printable name. */
1, /* Section align power. */
FALSE, /* The default ? */
@@ -53,14 +53,14 @@
},
};
-const bfd_arch_info_type bfd_ms1_arch =
+const bfd_arch_info_type bfd_mt_arch =
{
32, /* Bits per word - not really true. */
32, /* Bits per address. */
8, /* Bits per byte. */
- bfd_arch_ms1, /* Architecture. */
+ bfd_arch_mt, /* Architecture. */
bfd_mach_ms1, /* Machine. */
- "ms1", /* Architecture name. */
+ "mt", /* Architecture name. */
"ms1", /* Printable name. */
1, /* Section align power. */
TRUE, /* The default ? */
Added: branches/binutils/package/bfd/cpu-xc16x.c
===================================================================
--- branches/binutils/package/bfd/cpu-xc16x.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/cpu-xc16x.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,73 @@
+/* BFD support for the Infineon XC16X Microcontroller.
+ Copyright 2006 Free Software Foundation, Inc.
+ Contributed by KPIT Cummins Infosystems
+
+ This file is part of BFD, the Binary File Descriptor library.
+ Contributed by Anil Paranjpe(anilp1 at kpitcummins.com)
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type xc16xs_info_struct =
+{
+ 16, /* Bits per word. */
+ 16, /* Bits per address. */
+ 8, /* Bits per byte. */
+ bfd_arch_xc16x, /* Architecture. */
+ bfd_mach_xc16xs, /* Machine. */
+ "xc16x", /* Architecture name. */
+ "xc16xs", /* Printable name. */
+ 1, /* Section alignment - 16 bit. */
+ TRUE, /* The default ? */
+ bfd_default_compatible, /* Architecture comparison fn. */
+ bfd_default_scan, /* String to architecture convert fn. */
+ NULL /* Next in list. */
+};
+
+const bfd_arch_info_type xc16xl_info_struct =
+{
+ 16, /* Bits per word. */
+ 32, /* Bits per address. */
+ 8, /* Bits per byte. */
+ bfd_arch_xc16x, /* Architecture. */
+ bfd_mach_xc16xl, /* Machine. */
+ "xc16x", /* Architecture name. */
+ "xc16xl", /* Printable name. */
+ 1, /* Section alignment - 16 bit. */
+ TRUE, /* The default ? */
+ bfd_default_compatible, /* Architecture comparison fn. */
+ bfd_default_scan, /* String to architecture convert fn. */
+ & xc16xs_info_struct /* Next in list. */
+};
+
+const bfd_arch_info_type bfd_xc16x_arch =
+{
+ 16, /* Bits per word. */
+ 16, /* Bits per address. */
+ 8, /* Bits per byte. */
+ bfd_arch_xc16x, /* Architecture. */
+ bfd_mach_xc16x, /* Machine. */
+ "xc16x", /* Architecture name. */
+ "xc16x", /* Printable name. */
+ 1, /* Section alignment - 16 bit. */
+ TRUE, /* The default ? */
+ bfd_default_compatible, /* Architecture comparison fn. */
+ bfd_default_scan, /* String to architecture convert fn. */
+ & xc16xl_info_struct /* Next in list. */
+};
Modified: branches/binutils/package/bfd/doc/ChangeLog
===================================================================
--- branches/binutils/package/bfd/doc/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/doc/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,14 @@
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.am: Add install-html and install-html-am targets.
+ Define datarootdir, docdir and htmldir.
+ * Makefile.in: Regenerate.
+
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.am: Add html target.
+ * Makefile.in: Regenerate.
+
2005-07-24 Daniel Jacobowitz <dan at codesourcery.com>
* chew.c: Include <string.h>.
Modified: branches/binutils/package/bfd/doc/Makefile.am
===================================================================
--- branches/binutils/package/bfd/doc/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/doc/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -68,7 +68,7 @@
protos: libbfd.h libcoff.h bfd.h
-$(srcdir)/bfd.info bfd.dvi: $(DOCFILES) bfdsumm.texi bfd.texinfo
+$(srcdir)/bfd.info bfd.dvi bfd.html: $(DOCFILES) bfdsumm.texi bfd.texinfo
# We can't replace these rules with an implicit rule, because
# makes without VPATH support couldn't find the .h files in `..'.
@@ -287,3 +287,28 @@
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install: install-info
+
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+
+
+
Modified: branches/binutils/package/bfd/doc/Makefile.in
===================================================================
--- branches/binutils/package/bfd/doc/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/doc/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -181,6 +181,8 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
@@ -188,6 +190,7 @@
host_noncanonical = @host_noncanonical@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -313,6 +316,7 @@
CLEANFILES = *.p *.ip
DISTCLEANFILES = bfd.?? bfd.??? bfd.h libbfd.h libcoff.h texput.log
MAINTAINERCLEANFILES = $(DOCFILES)
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
all: all-am
.SUFFIXES:
@@ -596,7 +600,7 @@
protos: libbfd.h libcoff.h bfd.h
-$(srcdir)/bfd.info bfd.dvi: $(DOCFILES) bfdsumm.texi bfd.texinfo
+$(srcdir)/bfd.info bfd.dvi bfd.html: $(DOCFILES) bfdsumm.texi bfd.texinfo
# We can't replace these rules with an implicit rule, because
# makes without VPATH support couldn't find the .h files in `..'.
@@ -761,6 +765,25 @@
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install: install-info
+
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:
Modified: branches/binutils/package/bfd/dwarf2.c
===================================================================
--- branches/binutils/package/bfd/dwarf2.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/dwarf2.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* DWARF 2 support.
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Adapted from gdb/dwarf2read.c by Gavin Koch of Cygnus Solutions
(gavin at cygnus.com).
@@ -74,6 +74,12 @@
bfd_byte *data;
};
+struct loadable_section
+{
+ asection *section;
+ bfd_vma adj_vma;
+};
+
struct dwarf2_debug
{
/* A list of all previously read comp_units. */
@@ -124,6 +130,12 @@
calling chain for subsequent calls to bfd_find_inliner_info to
use. */
struct funcinfo *inliner_chain;
+
+ /* Number of loadable sections. */
+ unsigned int loadable_section_count;
+
+ /* Array of loadable sections. */
+ struct loadable_section *loadable_sections;
};
struct arange
@@ -481,21 +493,21 @@
amt *= sizeof (struct attr_abbrev);
tmp = bfd_realloc (cur_abbrev->attrs, amt);
if (tmp == NULL)
- {
- size_t i;
+ {
+ size_t i;
- for (i = 0; i < ABBREV_HASH_SIZE; i++)
- {
- struct abbrev_info *abbrev = abbrevs[i];
+ for (i = 0; i < ABBREV_HASH_SIZE; i++)
+ {
+ struct abbrev_info *abbrev = abbrevs[i];
- while (abbrev)
- {
- free (abbrev->attrs);
- abbrev = abbrev->next;
- }
- }
- return NULL;
- }
+ while (abbrev)
+ {
+ free (abbrev->attrs);
+ abbrev = abbrev->next;
+ }
+ }
+ return NULL;
+ }
cur_abbrev->attrs = tmp;
}
@@ -521,7 +533,7 @@
for the next compile unit) or if the end of the abbreviation
table is reached. */
if ((unsigned int) (abbrev_ptr - stash->dwarf_abbrev_buffer)
- >= stash->dwarf_abbrev_size)
+ >= stash->dwarf_abbrev_size)
break;
abbrev_number = read_unsigned_leb128 (abfd, abbrev_ptr, &bytes_read);
abbrev_ptr += bytes_read;
@@ -744,6 +756,17 @@
unsigned int stack: 1;
};
+/* Return TRUE if NEW_LINE should sort after LINE. */
+
+static inline bfd_boolean
+new_line_sorts_after (struct line_info *new_line, struct line_info *line)
+{
+ return (new_line->address > line->address
+ || (new_line->address == line->address
+ && new_line->end_sequence < line->end_sequence));
+}
+
+
/* Adds a new entry to the line_info list in the line_info_table, ensuring
that the list is sorted. Note that the line_info list is sorted from
highest to lowest VMA (with possible duplicates); that is,
@@ -760,6 +783,21 @@
bfd_size_type amt = sizeof (struct line_info);
struct line_info* info = bfd_alloc (table->abfd, amt);
+ /* Set member data of 'info'. */
+ info->address = address;
+ info->line = line;
+ info->column = column;
+ info->end_sequence = end_sequence;
+
+ if (filename && filename[0])
+ {
+ info->filename = bfd_alloc (table->abfd, strlen (filename) + 1);
+ if (info->filename)
+ strcpy (info->filename, filename);
+ }
+ else
+ info->filename = NULL;
+
/* Find the correct location for 'info'. Normally we will receive
new line_info data 1) in order and 2) with increasing VMAs.
However some compilers break the rules (cf. decode_line_info) and
@@ -775,70 +813,45 @@
Note: we may receive duplicate entries from 'decode_line_info'. */
- while (1)
- if (!table->last_line
- || address >= table->last_line->address)
- {
- /* Normal case: add 'info' to the beginning of the list */
- info->prev_line = table->last_line;
- table->last_line = info;
+ if (!table->last_line
+ || new_line_sorts_after (info, table->last_line))
+ {
+ /* Normal case: add 'info' to the beginning of the list */
+ info->prev_line = table->last_line;
+ table->last_line = info;
- /* lcl_head: initialize to head a *possible* sequence at the end. */
- if (!table->lcl_head)
- table->lcl_head = info;
- break;
- }
- else if (!table->lcl_head->prev_line
- && table->lcl_head->address > address)
- {
- /* Abnormal but easy: lcl_head is 1) at the *end* of the line
- list and 2) the head of 'info'. */
- info->prev_line = NULL;
- table->lcl_head->prev_line = info;
- break;
- }
- else if (table->lcl_head->prev_line
- && table->lcl_head->address > address
- && address >= table->lcl_head->prev_line->address)
- {
- /* Abnormal but easy: lcl_head is 1) in the *middle* of the line
- list and 2) the head of 'info'. */
- info->prev_line = table->lcl_head->prev_line;
- table->lcl_head->prev_line = info;
- break;
- }
- else
- {
- /* Abnormal and hard: Neither 'last_line' nor 'lcl_head' are valid
- heads for 'info'. Reset 'lcl_head' and repeat. */
- struct line_info* li2 = table->last_line; /* always non-NULL */
- struct line_info* li1 = li2->prev_line;
+ /* lcl_head: initialize to head a *possible* sequence at the end. */
+ if (!table->lcl_head)
+ table->lcl_head = info;
+ }
+ else if (!new_line_sorts_after (info, table->lcl_head)
+ && (!table->lcl_head->prev_line
+ || new_line_sorts_after (info, table->lcl_head->prev_line)))
+ {
+ /* Abnormal but easy: lcl_head is the head of 'info'. */
+ info->prev_line = table->lcl_head->prev_line;
+ table->lcl_head->prev_line = info;
+ }
+ else
+ {
+ /* Abnormal and hard: Neither 'last_line' nor 'lcl_head' are valid
+ heads for 'info'. Reset 'lcl_head'. */
+ struct line_info* li2 = table->last_line; /* always non-NULL */
+ struct line_info* li1 = li2->prev_line;
- while (li1)
- {
- if (li2->address > address && address >= li1->address)
- break;
+ while (li1)
+ {
+ if (!new_line_sorts_after (info, li2)
+ && new_line_sorts_after (info, li1))
+ break;
- li2 = li1; /* always non-NULL */
- li1 = li1->prev_line;
- }
- table->lcl_head = li2;
- }
-
- /* Set member data of 'info'. */
- info->address = address;
- info->line = line;
- info->column = column;
- info->end_sequence = end_sequence;
-
- if (filename && filename[0])
- {
- info->filename = bfd_alloc (table->abfd, strlen (filename) + 1);
- if (info->filename)
- strcpy (info->filename, filename);
+ li2 = li1; /* always non-NULL */
+ li1 = li1->prev_line;
+ }
+ table->lcl_head = li2;
+ info->prev_line = table->lcl_head->prev_line;
+ table->lcl_head->prev_line = info;
}
- else
- info->filename = NULL;
}
/* Extract a fully qualified filename from a line info table.
@@ -852,8 +865,10 @@
if (file - 1 >= table->num_files)
{
- (*_bfd_error_handler)
- (_("Dwarf Error: mangled line number section (bad file number)."));
+ /* FILE == 0 means unknown. */
+ if (file)
+ (*_bfd_error_handler)
+ (_("Dwarf Error: mangled line number section (bad file number)."));
return strdup ("<unknown>");
}
@@ -1168,12 +1183,12 @@
amt *= sizeof (struct fileinfo);
tmp = bfd_realloc (table->files, amt);
if (tmp == NULL)
- {
+ {
free (table->files);
free (table->dirs);
free (filename);
return NULL;
- }
+ }
table->files = tmp;
}
table->files[table->num_files].name = cur_file;
@@ -1467,6 +1482,7 @@
if ((!each_func->sec || each_func->sec == sec)
&& addr >= arange->low
&& addr < arange->high
+ && each_func->name
&& strcmp (name, each_func->name) == 0
&& (!best_fit
|| ((arange->high - arange->low)
@@ -1584,7 +1600,7 @@
return;
}
ranges_ptr = unit->stash->dwarf_ranges_buffer + offset;
-
+
for (;;)
{
bfd_vma low_pc;
@@ -1801,7 +1817,7 @@
attr.u.blk->data + 1);
}
break;
-
+
default:
break;
}
@@ -2005,7 +2021,11 @@
return unit;
}
-/* Return TRUE if UNIT contains the address given by ADDR. */
+/* Return TRUE if UNIT may contain the address given by ADDR. When
+ there are functions written entirely with inline asm statements, the
+ range info in the compilation unit header may not be correct. We
+ need to consult the line info table to see if a compilation unit
+ really contains the given address. */
static bfd_boolean
comp_unit_contains_address (struct comp_unit *unit, bfd_vma addr)
@@ -2174,6 +2194,97 @@
return NULL;
}
+/* Unset vmas for loadable sections in STASH. */
+
+static void
+unset_sections (struct dwarf2_debug *stash)
+{
+ unsigned int i;
+ struct loadable_section *p;
+
+ i = stash->loadable_section_count;
+ p = stash->loadable_sections;
+ for (; i > 0; i--, p++)
+ p->section->vma = 0;
+}
+
+/* Set unique vmas for loadable sections in ABFD and save vmas in
+ STASH for unset_sections. */
+
+static bfd_boolean
+place_sections (bfd *abfd, struct dwarf2_debug *stash)
+{
+ struct loadable_section *p;
+ unsigned int i;
+
+ if (stash->loadable_section_count != 0)
+ {
+ i = stash->loadable_section_count;
+ p = stash->loadable_sections;
+ for (; i > 0; i--, p++)
+ p->section->vma = p->adj_vma;
+ }
+ else
+ {
+ asection *sect;
+ bfd_vma last_vma = 0;
+ bfd_size_type amt;
+ struct loadable_section *p;
+
+ i = 0;
+ for (sect = abfd->sections; sect != NULL; sect = sect->next)
+ {
+ bfd_size_type sz;
+
+ if (sect->vma != 0 || (sect->flags & SEC_LOAD) == 0)
+ continue;
+
+ sz = sect->rawsize ? sect->rawsize : sect->size;
+ if (sz == 0)
+ continue;
+
+ i++;
+ }
+
+ amt = i * sizeof (struct loadable_section);
+ p = (struct loadable_section *) bfd_zalloc (abfd, amt);
+ if (! p)
+ return FALSE;
+
+ stash->loadable_sections = p;
+ stash->loadable_section_count = i;
+
+ for (sect = abfd->sections; sect != NULL; sect = sect->next)
+ {
+ bfd_size_type sz;
+
+ if (sect->vma != 0 || (sect->flags & SEC_LOAD) == 0)
+ continue;
+
+ sz = sect->rawsize ? sect->rawsize : sect->size;
+ if (sz == 0)
+ continue;
+
+ p->section = sect;
+ if (last_vma != 0)
+ {
+ /* Align the new address to the current section
+ alignment. */
+ last_vma = ((last_vma
+ + ~((bfd_vma) -1 << sect->alignment_power))
+ & ((bfd_vma) -1 << sect->alignment_power));
+ sect->vma = last_vma;
+ }
+ p->adj_vma = sect->vma;
+ last_vma += sect->vma + sz;
+
+ p++;
+ }
+ }
+
+ return TRUE;
+}
+
/* The DWARF2 version of find_nearest_line. Return TRUE if the line
is found without error. ADDR_SIZE is the number of bytes in the
initial .debug_info length field and in the abbreviation offset.
@@ -2206,12 +2317,32 @@
struct comp_unit* each;
+ bfd_vma found = FALSE;
+
stash = *pinfo;
+
+ if (! stash)
+ {
+ bfd_size_type amt = sizeof (struct dwarf2_debug);
+
+ stash = bfd_zalloc (abfd, amt);
+ if (! stash)
+ return FALSE;
+ }
+
+ /* In a relocatable file, 2 functions may have the same address.
+ We change the section vma so that they won't overlap. */
+ if ((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
+ {
+ if (! place_sections (abfd, stash))
+ return FALSE;
+ }
+
addr = offset;
if (section->output_section)
- addr += section->output_section->lma + section->output_offset;
+ addr += section->output_section->vma + section->output_offset;
else
- addr += section->lma;
+ addr += section->vma;
*filename_ptr = NULL;
*functionname_ptr = NULL;
*linenumber_ptr = 0;
@@ -2223,16 +2354,11 @@
addr_size = 4;
BFD_ASSERT (addr_size == 4 || addr_size == 8);
- if (! stash)
+ if (! *pinfo)
{
bfd_size_type total_size;
asection *msec;
- bfd_size_type amt = sizeof (struct dwarf2_debug);
- stash = bfd_zalloc (abfd, amt);
- if (! stash)
- return FALSE;
-
*pinfo = stash;
msec = find_debug_info (abfd, NULL);
@@ -2240,7 +2366,7 @@
/* No dwarf2 info. Note that at this point the stash
has been allocated, but contains zeros, this lets
future calls to this function fail quicker. */
- return FALSE;
+ goto done;
/* There can be more than one DWARF2 info section in a BFD these days.
Read them all in and produce one large stash. We do this in two
@@ -2252,7 +2378,7 @@
stash->info_ptr = bfd_alloc (abfd, total_size);
if (stash->info_ptr == NULL)
- return FALSE;
+ goto done;
stash->info_ptr_end = stash->info_ptr;
@@ -2286,22 +2412,25 @@
/* A null info_ptr indicates that there is no dwarf2 info
(or that an error occured while setting up the stash). */
if (! stash->info_ptr)
- return FALSE;
+ goto done;
stash->inliner_chain = NULL;
/* Check the previously read comp. units first. */
for (each = stash->all_comp_units; each; each = each->next_unit)
- if (comp_unit_contains_address (each, addr))
- return comp_unit_find_nearest_line (each, addr, filename_ptr,
- functionname_ptr, linenumber_ptr,
- stash);
+ if (comp_unit_contains_address (each, addr)
+ && comp_unit_find_nearest_line (each, addr, filename_ptr,
+ functionname_ptr,
+ linenumber_ptr, stash))
+ {
+ found = TRUE;
+ goto done;
+ }
/* Read each remaining comp. units checking each as they are read. */
while (stash->info_ptr < stash->info_ptr_end)
{
bfd_vma length;
- bfd_boolean found;
unsigned int offset_size = addr_size;
bfd_byte *info_ptr_unit = stash->info_ptr;
@@ -2357,30 +2486,26 @@
unit->high == 0), we need to consult the line info
table to see if a compilation unit contains the given
address. */
- if (each->arange.high > 0)
+ if ((each->arange.high == 0
+ || comp_unit_contains_address (each, addr))
+ && comp_unit_find_nearest_line (each, addr,
+ filename_ptr,
+ functionname_ptr,
+ linenumber_ptr,
+ stash))
{
- if (comp_unit_contains_address (each, addr))
- return comp_unit_find_nearest_line (each, addr,
- filename_ptr,
- functionname_ptr,
- linenumber_ptr,
- stash);
+ found = TRUE;
+ goto done;
}
- else
- {
- found = comp_unit_find_nearest_line (each, addr,
- filename_ptr,
- functionname_ptr,
- linenumber_ptr,
- stash);
- if (found)
- return TRUE;
- }
}
}
}
- return FALSE;
+done:
+ if ((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
+ unset_sections (stash);
+
+ return found;
}
/* The DWARF2 version of find_line. Return TRUE if the line is found
@@ -2412,31 +2537,44 @@
asection *section;
- bfd_boolean found;
+ bfd_boolean found = FALSE;
section = bfd_get_section (symbol);
+ stash = *pinfo;
+
+ if (! stash)
+ {
+ bfd_size_type amt = sizeof (struct dwarf2_debug);
+
+ stash = bfd_zalloc (abfd, amt);
+ if (! stash)
+ return FALSE;
+ }
+
+ /* In a relocatable file, 2 functions may have the same address.
+ We change the section vma so that they won't overlap. */
+ if (!stash && (abfd->flags & (EXEC_P | DYNAMIC)) == 0)
+ {
+ if (! place_sections (abfd, stash))
+ return FALSE;
+ }
+
addr = symbol->value;
if (section->output_section)
- addr += section->output_section->lma + section->output_offset;
+ addr += section->output_section->vma + section->output_offset;
else
- addr += section->lma;
+ addr += section->vma;
*filename_ptr = NULL;
- stash = *pinfo;
*filename_ptr = NULL;
*linenumber_ptr = 0;
- if (! stash)
+ if (! *pinfo)
{
bfd_size_type total_size;
asection *msec;
- bfd_size_type amt = sizeof (struct dwarf2_debug);
- stash = bfd_zalloc (abfd, amt);
- if (! stash)
- return FALSE;
-
*pinfo = stash;
msec = find_debug_info (abfd, NULL);
@@ -2444,7 +2582,7 @@
/* No dwarf2 info. Note that at this point the stash
has been allocated, but contains zeros, this lets
future calls to this function fail quicker. */
- return FALSE;
+ goto done;
/* There can be more than one DWARF2 info section in a BFD these days.
Read them all in and produce one large stash. We do this in two
@@ -2456,7 +2594,7 @@
stash->info_ptr = bfd_alloc (abfd, total_size);
if (stash->info_ptr == NULL)
- return FALSE;
+ goto done;
stash->info_ptr_end = stash->info_ptr;
@@ -2490,7 +2628,7 @@
/* A null info_ptr indicates that there is no dwarf2 info
(or that an error occured while setting up the stash). */
if (! stash->info_ptr)
- return FALSE;
+ goto done;
stash->inliner_chain = NULL;
@@ -2502,7 +2640,7 @@
found = comp_unit_find_line (each, symbol, addr, filename_ptr,
linenumber_ptr, stash);
if (found)
- return found;
+ goto done;
}
/* The DWARF2 spec says that the initial length field, and the
@@ -2579,12 +2717,16 @@
linenumber_ptr,
stash));
if (found)
- return TRUE;
+ goto done;
}
}
}
- return FALSE;
+done:
+ if ((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
+ unset_sections (stash);
+
+ return found;
}
bfd_boolean
@@ -2633,21 +2775,21 @@
size_t i;
for (i = 0; i < ABBREV_HASH_SIZE; i++)
- {
- struct abbrev_info *abbrev = abbrevs[i];
+ {
+ struct abbrev_info *abbrev = abbrevs[i];
- while (abbrev)
- {
- free (abbrev->attrs);
- abbrev = abbrev->next;
- }
- }
+ while (abbrev)
+ {
+ free (abbrev->attrs);
+ abbrev = abbrev->next;
+ }
+ }
if (each->line_table)
- {
- free (each->line_table->dirs);
- free (each->line_table->files);
- }
+ {
+ free (each->line_table->dirs);
+ free (each->line_table->files);
+ }
}
free (stash->dwarf_abbrev_buffer);
Modified: branches/binutils/package/bfd/ecoff.c
===================================================================
--- branches/binutils/package/bfd/ecoff.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ecoff.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Generic ECOFF (Extended-COFF) routines.
Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Original version by Per Bothner.
Full support added by Ian Lance Taylor, ian at cygnus.com.
@@ -3285,8 +3285,9 @@
ret = bfd_malloc (amt);
if (ret == NULL)
return NULL;
- if (! _bfd_link_hash_table_init (&ret->root, abfd,
- ecoff_link_hash_newfunc))
+ if (!_bfd_link_hash_table_init (&ret->root, abfd,
+ ecoff_link_hash_newfunc,
+ sizeof (struct ecoff_link_hash_entry)))
{
free (ret);
return NULL;
@@ -4002,11 +4003,10 @@
BFD_ASSERT ((output_section->flags & SEC_HAS_CONTENTS) != 0);
- if (link_order->size == 0)
- return TRUE;
-
input_section = link_order->u.indirect.section;
input_bfd = input_section->owner;
+ if (input_section->size == 0)
+ return TRUE;
BFD_ASSERT (input_section->output_section == output_section);
BFD_ASSERT (input_section->output_offset == link_order->offset);
Modified: branches/binutils/package/bfd/ecofflink.c
===================================================================
--- branches/binutils/package/bfd/ecofflink.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ecofflink.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Routines to link ECOFF debugging information.
Copyright 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support, <ian at cygnus.com>.
This file is part of BFD, the Binary File Descriptor library.
@@ -501,8 +501,8 @@
ainfo = (struct accumulate *) bfd_malloc (amt);
if (!ainfo)
return NULL;
- if (! bfd_hash_table_init_n (&ainfo->fdr_hash.table, string_hash_newfunc,
- 1021))
+ if (!bfd_hash_table_init_n (&ainfo->fdr_hash.table, string_hash_newfunc,
+ sizeof (struct string_hash_entry), 1021))
return NULL;
ainfo->line = NULL;
@@ -528,7 +528,8 @@
if (! info->relocatable)
{
- if (! bfd_hash_table_init (&ainfo->str_hash.table, string_hash_newfunc))
+ if (!bfd_hash_table_init (&ainfo->str_hash.table, string_hash_newfunc,
+ sizeof (struct string_hash_entry)))
return NULL;
/* The first entry in the string table is the empty string. */
Modified: branches/binutils/package/bfd/elf-bfd.h
===================================================================
--- branches/binutils/package/bfd/elf-bfd.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-bfd.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end data structures for ELF files.
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -378,6 +378,9 @@
/* The _GLOBAL_OFFSET_TABLE_ symbol. */
struct elf_link_hash_entry *hgot;
+ /* The _PROCEDURE_LINKAGE_TABLE_ symbol. */
+ struct elf_link_hash_entry *hplt;
+
/* A pointer to information used to merge SEC_MERGE sections. */
void *merge_info;
@@ -830,6 +833,11 @@
bfd_boolean (*elf_backend_modify_segment_map)
(bfd *, struct bfd_link_info *);
+ /* This function is called during section garbage collection to
+ mark sections that define global symbols. */
+ bfd_boolean (*gc_mark_dynamic_ref)
+ (struct elf_link_hash_entry *h, void *inf);
+
/* This function is called during section gc to discover the section a
particular relocation refers to. */
asection * (*gc_mark_hook)
@@ -878,11 +886,21 @@
void (*elf_backend_hide_symbol)
(struct bfd_link_info *, struct elf_link_hash_entry *, bfd_boolean);
+ /* A function to do additional symbol fixup, called by
+ _bfd_elf_fix_symbol_flags. */
+ bfd_boolean (*elf_backend_fixup_symbol)
+ (struct bfd_link_info *, struct elf_link_hash_entry *);
+
/* Merge the backend specific symbol attribute. */
void (*elf_backend_merge_symbol_attribute)
(struct elf_link_hash_entry *, const Elf_Internal_Sym *, bfd_boolean,
bfd_boolean);
+ /* Decide whether an undefined symbol is special and can be ignored.
+ This is the case for OPTIONAL symbols on IRIX. */
+ bfd_boolean (*elf_backend_ignore_undef_symbol)
+ (struct elf_link_hash_entry *);
+
/* Emit relocations. Overrides default routine for emitting relocs,
except during a relocatable link, or if all relocs are being emitted. */
bfd_boolean (*elf_backend_emit_relocs)
@@ -1466,10 +1484,13 @@
struct elf_link_hash_entry *);
extern void _bfd_elf_link_hash_hide_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *, bfd_boolean);
+extern bfd_boolean _bfd_elf_link_hash_fixup_symbol
+ (struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_elf_link_hash_table_init
(struct elf_link_hash_table *, bfd *,
struct bfd_hash_entry *(*)
- (struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
+ (struct bfd_hash_entry *, struct bfd_hash_table *, const char *),
+ unsigned int);
extern bfd_boolean _bfd_elf_slurp_version_tables
(bfd *, bfd_boolean);
extern bfd_boolean _bfd_elf_merge_sections
@@ -1803,6 +1824,9 @@
extern bfd_boolean bfd_elf_final_link
(bfd *, struct bfd_link_info *);
+extern bfd_boolean bfd_elf_gc_mark_dynamic_ref_symbol
+ (struct elf_link_hash_entry *h, void *inf);
+
extern bfd_boolean bfd_elf_gc_sections
(bfd *, struct bfd_link_info *);
Modified: branches/binutils/package/bfd/elf-eh-frame.c
===================================================================
--- branches/binutils/package/bfd/elf-eh-frame.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-eh-frame.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* .eh_frame section optimization.
- Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Jakub Jelinek <jakub at redhat.com>.
This file is part of BFD, the Binary File Descriptor library.
@@ -613,6 +613,8 @@
ENSURE_NO_RELOCS (buf);
REQUIRE (get_DW_EH_PE_width (cie.fde_encoding, ptr_size));
break;
+ case 'S':
+ break;
case 'P':
{
int per_width;
@@ -1178,6 +1180,8 @@
}
buf++;
break;
+ case 'S':
+ break;
default:
BFD_FAIL ();
}
Modified: branches/binutils/package/bfd/elf-m10300.c
===================================================================
--- branches/binutils/package/bfd/elf-m10300.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-m10300.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Matsushita 10300 specific support for 32-bit ELF
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -582,10 +582,14 @@
/* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
.plt section. */
- if (bed->want_plt_sym
- && !_bfd_elf_define_linkage_sym (abfd, info, s,
- "_PROCEDURE_LINKAGE_TABLE_"))
- return FALSE;
+ if (bed->want_plt_sym)
+ {
+ h = _bfd_elf_define_linkage_sym (abfd, info, s,
+ "_PROCEDURE_LINKAGE_TABLE_");
+ elf_hash_table (info)->hplt = h;
+ if (h == NULL)
+ return FALSE;
+ }
s = bfd_make_section_with_flags (abfd, ".got", flags);
if (s == NULL
@@ -3691,8 +3695,9 @@
if (ret == (struct elf32_mn10300_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- elf32_mn10300_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf32_mn10300_link_hash_newfunc,
+ sizeof (struct elf32_mn10300_link_hash_entry)))
{
free (ret);
return NULL;
@@ -3708,8 +3713,9 @@
return NULL;
}
- if (! _bfd_elf_link_hash_table_init (&ret->static_hash_table->root, abfd,
- elf32_mn10300_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->static_hash_table->root, abfd,
+ elf32_mn10300_link_hash_newfunc,
+ sizeof (struct elf32_mn10300_link_hash_entry)))
{
free (ret->static_hash_table);
free (ret);
@@ -4498,7 +4504,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf-strtab.c
===================================================================
--- branches/binutils/package/bfd/elf-strtab.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-strtab.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* ELF strtab with GC and suffix merging support.
- Copyright 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
+ Copyright 2001, 2002, 2003, 2005, 2006 Free Software Foundation, Inc.
Written by Jakub Jelinek <jakub at redhat.com>.
This file is part of BFD, the Binary File Descriptor library.
@@ -99,7 +99,8 @@
if (table == NULL)
return NULL;
- if (! bfd_hash_table_init (&table->table, elf_strtab_hash_newfunc))
+ if (!bfd_hash_table_init (&table->table, elf_strtab_hash_newfunc,
+ sizeof (struct elf_strtab_hash_entry)))
{
free (table);
return NULL;
Modified: branches/binutils/package/bfd/elf-vxworks.c
===================================================================
--- branches/binutils/package/bfd/elf-vxworks.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-vxworks.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -55,12 +55,72 @@
return TRUE;
}
+/* Perform VxWorks-specific handling of the create_dynamic_sections hook.
+ When creating an executable, set *SRELPLT2_OUT to the .rel(a).plt.unloaded
+ section. */
+bfd_boolean
+elf_vxworks_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info,
+ asection **srelplt2_out)
+{
+ struct elf_link_hash_table *htab;
+ const struct elf_backend_data *bed;
+ asection *s;
+
+ htab = elf_hash_table (info);
+ bed = get_elf_backend_data (dynobj);
+
+ if (!info->shared)
+ {
+ s = bfd_make_section_with_flags (dynobj,
+ bed->default_use_rela_p
+ ? ".rela.plt.unloaded"
+ : ".rel.plt.unloaded",
+ SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_READONLY | SEC_LINKER_CREATED);
+ if (s == NULL
+ || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
+ return FALSE;
+
+ *srelplt2_out = s;
+ }
+
+ /* Mark the GOT and PLT symbols as having relocations; they might
+ not, but we won't know for sure until we build the GOT in
+ finish_dynamic_symbol. Also make sure that the GOT symbol
+ is entered into the dynamic symbol table; the loader uses it
+ to initialize __GOTT_BASE__[__GOTT_INDEX__]. */
+ if (htab->hgot)
+ {
+ htab->hgot->indx = -2;
+ htab->hgot->other &= ~ELF_ST_VISIBILITY (-1);
+ htab->hgot->forced_local = 0;
+ if (!bfd_elf_link_record_dynamic_symbol (info, htab->hgot))
+ return FALSE;
+ }
+ if (htab->hplt)
+ {
+ htab->hplt->indx = -2;
+ htab->hplt->type = STT_FUNC;
+ }
+
+ return TRUE;
+}
+
/* Tweak magic VxWorks symbols as they are written to the output file. */
bfd_boolean
-elf_vxworks_link_output_symbol_hook (const char *name,
- Elf_Internal_Sym *sym)
+elf_vxworks_link_output_symbol_hook (struct bfd_link_info *info
+ ATTRIBUTE_UNUSED,
+ const char *name,
+ Elf_Internal_Sym *sym,
+ asection *input_sec ATTRIBUTE_UNUSED,
+ struct elf_link_hash_entry *h
+ ATTRIBUTE_UNUSED)
{
+ /* Ignore the first dummy symbol. */
+ if (!name)
+ return TRUE;
+
/* Reverse the effects of the hack in elf_vxworks_add_symbol_hook. */
if (strcmp (name, "__GOTT_INDEX__") == 0
|| strcmp (name, "__GOTT_BASE__") == 0)
Modified: branches/binutils/package/bfd/elf-vxworks.h
===================================================================
--- branches/binutils/package/bfd/elf-vxworks.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf-vxworks.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -25,8 +25,11 @@
(bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
flagword *, asection **, bfd_vma *);
bfd_boolean elf_vxworks_link_output_symbol_hook
- (const char *, Elf_Internal_Sym *);
+ (struct bfd_link_info *, const char *name, Elf_Internal_Sym *,
+ asection *, struct elf_link_hash_entry *);
bfd_boolean elf_vxworks_emit_relocs
(bfd *, asection *, Elf_Internal_Shdr *, Elf_Internal_Rela *,
struct elf_link_hash_entry **);
void elf_vxworks_final_write_processing (bfd *, bfd_boolean);
+bfd_boolean elf_vxworks_create_dynamic_sections
+ (bfd *, struct bfd_link_info *, asection **);
Modified: branches/binutils/package/bfd/elf.c
===================================================================
--- branches/binutils/package/bfd/elf.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,7 @@
/* ELF executable support for BFD.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -1068,6 +1068,28 @@
return TRUE;
}
+static const char *
+get_segment_type (unsigned int p_type)
+{
+ const char *pt;
+ switch (p_type)
+ {
+ case PT_NULL: pt = "NULL"; break;
+ case PT_LOAD: pt = "LOAD"; break;
+ case PT_DYNAMIC: pt = "DYNAMIC"; break;
+ case PT_INTERP: pt = "INTERP"; break;
+ case PT_NOTE: pt = "NOTE"; break;
+ case PT_SHLIB: pt = "SHLIB"; break;
+ case PT_PHDR: pt = "PHDR"; break;
+ case PT_TLS: pt = "TLS"; break;
+ case PT_GNU_EH_FRAME: pt = "EH_FRAME"; break;
+ case PT_GNU_STACK: pt = "STACK"; break;
+ case PT_GNU_RELRO: pt = "RELRO"; break;
+ default: pt = NULL; break;
+ }
+ return pt;
+}
+
/* Print out the program headers. */
bfd_boolean
@@ -1087,23 +1109,13 @@
c = elf_elfheader (abfd)->e_phnum;
for (i = 0; i < c; i++, p++)
{
- const char *pt;
+ const char *pt = get_segment_type (p->p_type);
char buf[20];
- switch (p->p_type)
+ if (pt == NULL)
{
- case PT_NULL: pt = "NULL"; break;
- case PT_LOAD: pt = "LOAD"; break;
- case PT_DYNAMIC: pt = "DYNAMIC"; break;
- case PT_INTERP: pt = "INTERP"; break;
- case PT_NOTE: pt = "NOTE"; break;
- case PT_SHLIB: pt = "SHLIB"; break;
- case PT_PHDR: pt = "PHDR"; break;
- case PT_TLS: pt = "TLS"; break;
- case PT_GNU_EH_FRAME: pt = "EH_FRAME"; break;
- case PT_GNU_STACK: pt = "STACK"; break;
- case PT_GNU_RELRO: pt = "RELRO"; break;
- default: sprintf (buf, "0x%lx", p->p_type); pt = buf; break;
+ sprintf (buf, "0x%lx", p->p_type);
+ pt = buf;
}
fprintf (f, "%8s off 0x", pt);
bfd_fprintf_vma (abfd, f, p->p_offset);
@@ -1549,7 +1561,8 @@
bfd *abfd,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
bfd_boolean ret;
int can_refcount = get_elf_backend_data (abfd)->can_refcount;
@@ -1576,7 +1589,7 @@
table->loaded = NULL;
table->is_relocatable_executable = FALSE;
- ret = _bfd_link_hash_table_init (&table->root, abfd, newfunc);
+ ret = _bfd_link_hash_table_init (&table->root, abfd, newfunc, entsize);
table->root.type = bfd_link_elf_hash_table;
return ret;
@@ -1594,7 +1607,8 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (ret, abfd, _bfd_elf_link_hash_newfunc))
+ if (! _bfd_elf_link_hash_table_init (ret, abfd, _bfd_elf_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -2045,15 +2059,16 @@
represent such a section, so at least for now, we don't
try. We just present it as a normal section. We also
can't use it as a reloc section if it points to the null
- section. */
- if (hdr->sh_link != elf_onesymtab (abfd) || hdr->sh_info == SHN_UNDEF)
+ section, an invalid section, or another reloc section. */
+ if (hdr->sh_link != elf_onesymtab (abfd)
+ || hdr->sh_info == SHN_UNDEF
+ || (hdr->sh_info >= SHN_LORESERVE && hdr->sh_info <= SHN_HIRESERVE)
+ || hdr->sh_info >= num_sec
+ || elf_elfsections (abfd)[hdr->sh_info]->sh_type == SHT_REL
+ || elf_elfsections (abfd)[hdr->sh_info]->sh_type == SHT_RELA)
return _bfd_elf_make_section_from_shdr (abfd, hdr, name,
shindex);
- /* Prevent endless recursion on broken objects. */
- if (elf_elfsections (abfd)[hdr->sh_info]->sh_type == SHT_REL
- || elf_elfsections (abfd)[hdr->sh_info]->sh_type == SHT_RELA)
- return FALSE;
if (! bfd_section_from_shdr (abfd, hdr->sh_info))
return FALSE;
target_sect = bfd_section_from_elf_index (abfd, hdr->sh_info);
@@ -4017,6 +4032,42 @@
return ((vma - off) % maxpagesize);
}
+static void
+print_segment_map (bfd *abfd)
+{
+ struct elf_segment_map *m;
+ unsigned int i, j;
+
+ fprintf (stderr, _(" Section to Segment mapping:\n"));
+ fprintf (stderr, _(" Segment Sections...\n"));
+
+ for (i= 0, m = elf_tdata (abfd)->segment_map;
+ m != NULL;
+ i++, m = m->next)
+ {
+ const char *pt = get_segment_type (m->p_type);
+ char buf[32];
+
+ if (pt == NULL)
+ {
+ if (m->p_type >= PT_LOPROC && m->p_type <= PT_HIPROC)
+ sprintf (buf, "LOPROC+%7.7x",
+ (unsigned int) (m->p_type - PT_LOPROC));
+ else if (m->p_type >= PT_LOOS && m->p_type <= PT_HIOS)
+ sprintf (buf, "LOOS+%7.7x",
+ (unsigned int) (m->p_type - PT_LOOS));
+ else
+ snprintf (buf, sizeof (buf), "%8.8x",
+ (unsigned int) m->p_type);
+ pt = buf;
+ }
+ fprintf (stderr, " %2.2d: %14.14s: ", i, pt);
+ for (j = 0; j < m->count; j++)
+ fprintf (stderr, "%s ", m->sections [j]->name);
+ putc ('\n',stderr);
+ }
+}
+
/* Assign file positions to the sections based on the mapping from
sections to segments. This function also sets up some fields in
the file header, and writes out the program headers. */
@@ -4100,6 +4151,7 @@
((*_bfd_error_handler)
(_("%B: Not enough room for program headers (allocated %u, need %u)"),
abfd, alloc, count));
+ print_segment_map (abfd);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
@@ -5044,10 +5096,10 @@
return idx;
}
-/* Copy private BFD data. This copies any program header information. */
+/* Rewrite program header information. */
static bfd_boolean
-copy_private_bfd_data (bfd *ibfd, bfd *obfd)
+rewrite_elf_program_header (bfd *ibfd, bfd *obfd)
{
Elf_Internal_Ehdr *iehdr;
struct elf_segment_map *map;
@@ -5063,13 +5115,6 @@
unsigned int phdr_adjust_num = 0;
const struct elf_backend_data *bed;
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
- return TRUE;
-
- if (elf_tdata (ibfd)->phdr == NULL)
- return TRUE;
-
bed = get_elf_backend_data (ibfd);
iehdr = elf_elfheader (ibfd);
@@ -5629,6 +5674,185 @@
return TRUE;
}
+/* Copy ELF program header information. */
+
+static bfd_boolean
+copy_elf_program_header (bfd *ibfd, bfd *obfd)
+{
+ Elf_Internal_Ehdr *iehdr;
+ struct elf_segment_map *map;
+ struct elf_segment_map *map_first;
+ struct elf_segment_map **pointer_to_map;
+ Elf_Internal_Phdr *segment;
+ unsigned int i;
+ unsigned int num_segments;
+ bfd_boolean phdr_included = FALSE;
+
+ iehdr = elf_elfheader (ibfd);
+
+ map_first = NULL;
+ pointer_to_map = &map_first;
+
+ num_segments = elf_elfheader (ibfd)->e_phnum;
+ for (i = 0, segment = elf_tdata (ibfd)->phdr;
+ i < num_segments;
+ i++, segment++)
+ {
+ asection *section;
+ unsigned int section_count;
+ bfd_size_type amt;
+ Elf_Internal_Shdr *this_hdr;
+
+ /* FIXME: Do we need to copy PT_NULL segment? */
+ if (segment->p_type == PT_NULL)
+ continue;
+
+ /* Compute how many sections are in this segment. */
+ for (section = ibfd->sections, section_count = 0;
+ section != NULL;
+ section = section->next)
+ {
+ this_hdr = &(elf_section_data(section)->this_hdr);
+ if (ELF_IS_SECTION_IN_SEGMENT_FILE (this_hdr, segment))
+ section_count++;
+ }
+
+ /* Allocate a segment map big enough to contain
+ all of the sections we have selected. */
+ amt = sizeof (struct elf_segment_map);
+ if (section_count != 0)
+ amt += ((bfd_size_type) section_count - 1) * sizeof (asection *);
+ map = bfd_alloc (obfd, amt);
+ if (map == NULL)
+ return FALSE;
+
+ /* Initialize the fields of the output segment map with the
+ input segment. */
+ map->next = NULL;
+ map->p_type = segment->p_type;
+ map->p_flags = segment->p_flags;
+ map->p_flags_valid = 1;
+ map->p_paddr = segment->p_paddr;
+ map->p_paddr_valid = 1;
+
+ /* Determine if this segment contains the ELF file header
+ and if it contains the program headers themselves. */
+ map->includes_filehdr = (segment->p_offset == 0
+ && segment->p_filesz >= iehdr->e_ehsize);
+
+ map->includes_phdrs = 0;
+ if (! phdr_included || segment->p_type != PT_LOAD)
+ {
+ map->includes_phdrs =
+ (segment->p_offset <= (bfd_vma) iehdr->e_phoff
+ && (segment->p_offset + segment->p_filesz
+ >= ((bfd_vma) iehdr->e_phoff
+ + iehdr->e_phnum * iehdr->e_phentsize)));
+
+ if (segment->p_type == PT_LOAD && map->includes_phdrs)
+ phdr_included = TRUE;
+ }
+
+ if (section_count != 0)
+ {
+ unsigned int isec = 0;
+
+ for (section = ibfd->sections;
+ section != NULL;
+ section = section->next)
+ {
+ this_hdr = &(elf_section_data(section)->this_hdr);
+ if (ELF_IS_SECTION_IN_SEGMENT_FILE (this_hdr, segment))
+ map->sections[isec++] = section->output_section;
+ }
+ }
+
+ map->count = section_count;
+ *pointer_to_map = map;
+ pointer_to_map = &map->next;
+ }
+
+ elf_tdata (obfd)->segment_map = map_first;
+ return TRUE;
+}
+
+/* Copy private BFD data. This copies or rewrites ELF program header
+ information. */
+
+static bfd_boolean
+copy_private_bfd_data (bfd *ibfd, bfd *obfd)
+{
+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
+ || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
+ return TRUE;
+
+ if (elf_tdata (ibfd)->phdr == NULL)
+ return TRUE;
+
+ if (ibfd->xvec == obfd->xvec)
+ {
+ /* Check if any sections in the input BFD covered by ELF program
+ header are changed. */
+ Elf_Internal_Phdr *segment;
+ asection *section, *osec;
+ unsigned int i, num_segments;
+ Elf_Internal_Shdr *this_hdr;
+
+ /* Initialize the segment mark field. */
+ for (section = obfd->sections; section != NULL;
+ section = section->next)
+ section->segment_mark = FALSE;
+
+ num_segments = elf_elfheader (ibfd)->e_phnum;
+ for (i = 0, segment = elf_tdata (ibfd)->phdr;
+ i < num_segments;
+ i++, segment++)
+ {
+ for (section = ibfd->sections;
+ section != NULL; section = section->next)
+ {
+ /* We mark the output section so that we know it comes
+ from the input BFD. */
+ osec = section->output_section;
+ if (osec)
+ osec->segment_mark = TRUE;
+
+ /* Check if this section is covered by the segment. */
+ this_hdr = &(elf_section_data(section)->this_hdr);
+ if (ELF_IS_SECTION_IN_SEGMENT_FILE (this_hdr, segment))
+ {
+ /* FIXME: Check if its output section is changed or
+ removed. What else do we need to check? */
+ if (osec == NULL
+ || section->flags != osec->flags
+ || section->lma != osec->lma
+ || section->vma != osec->vma
+ || section->size != osec->size
+ || section->rawsize != osec->rawsize
+ || section->alignment_power != osec->alignment_power)
+ goto rewrite;
+ }
+ }
+ }
+
+ /* Check to see if any output section doesn't come from the
+ input BFD. */
+ for (section = obfd->sections; section != NULL;
+ section = section->next)
+ {
+ if (section->segment_mark == FALSE)
+ goto rewrite;
+ else
+ section->segment_mark = FALSE;
+ }
+
+ return copy_elf_program_header (ibfd, obfd);
+ }
+
+rewrite:
+ return rewrite_elf_program_header (ibfd, obfd);
+}
+
/* Initialize private output section information from input section. */
bfd_boolean
@@ -6685,8 +6909,6 @@
if (state == symbol_seen)
state = file_after_symbol_seen;
continue;
- case STT_SECTION:
- continue;
case STT_NOTYPE:
case STT_FUNC:
if (bfd_get_section (&q->symbol) == section
@@ -6695,12 +6917,10 @@
{
func = (asymbol *) q;
low_func = q->symbol.value;
- if (file == NULL)
- filename = NULL;
- else if (ELF_ST_BIND (q->internal_elf_sym.st_info) != STB_LOCAL
- && state == file_after_symbol_seen)
- filename = NULL;
- else
+ filename = NULL;
+ if (file != NULL
+ && (ELF_ST_BIND (q->internal_elf_sym.st_info) == STB_LOCAL
+ || state != file_after_symbol_seen))
filename = bfd_asymbol_name (file);
}
break;
@@ -7892,8 +8112,8 @@
char *buf,
int *bufsiz,
long pid,
- int cursig,
- const void *gregs)
+ int cursig ATTRIBUTE_UNUSED,
+ const void *gregs ATTRIBUTE_UNUSED)
{
pstatus_t pstat;
char *note_name = "CORE";
Modified: branches/binutils/package/bfd/elf32-arm.c
===================================================================
--- branches/binutils/package/bfd/elf32-arm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-arm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* 32-bit ELF support for ARM
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -20,20 +20,50 @@
#include "bfd.h"
#include "sysdep.h"
+#include "libiberty.h"
#include "libbfd.h"
#include "elf-bfd.h"
+#include "elf-vxworks.h"
#include "elf/arm.h"
#ifndef NUM_ELEM
#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
#endif
+/* Return the relocation section associated with NAME. HTAB is the
+ bfd's elf32_arm_link_hash_entry. */
+#define RELOC_SECTION(HTAB, NAME) \
+ ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
+
+/* Return size of a relocation entry. HTAB is the bfd's
+ elf32_arm_link_hash_entry. */
+#define RELOC_SIZE(HTAB) \
+ ((HTAB)->use_rel \
+ ? sizeof (Elf32_External_Rel) \
+ : sizeof (Elf32_External_Rela))
+
+/* Return function to swap relocations in. HTAB is the bfd's
+ elf32_arm_link_hash_entry. */
+#define SWAP_RELOC_IN(HTAB) \
+ ((HTAB)->use_rel \
+ ? bfd_elf32_swap_reloc_in \
+ : bfd_elf32_swap_reloca_in)
+
+/* Return function to swap relocations out. HTAB is the bfd's
+ elf32_arm_link_hash_entry. */
+#define SWAP_RELOC_OUT(HTAB) \
+ ((HTAB)->use_rel \
+ ? bfd_elf32_swap_reloc_out \
+ : bfd_elf32_swap_reloca_out)
+
#define elf_info_to_howto 0
#define elf_info_to_howto_rel elf32_arm_info_to_howto
#define ARM_ELF_ABI_VERSION 0
#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
+static const struct elf_backend_data elf32_arm_vxworks_bed;
+
/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
in that slot. */
@@ -140,8 +170,8 @@
bfd_elf_generic_reloc, /* special_function */
"R_ARM_ABS12", /* name */
FALSE, /* partial_inplace */
- 0x000008ff, /* src_mask */
- 0x000008ff, /* dst_mask */
+ 0x00000fff, /* src_mask */
+ 0x00000fff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_ARM_THM_ABS5, /* type */
@@ -1422,9 +1452,10 @@
typedef unsigned long int insn32;
typedef unsigned short int insn16;
-/* In lieu of proper flags, assume all EABIv4 objects are interworkable. */
+/* In lieu of proper flags, assume all EABIv4 or later objects are
+ interworkable. */
#define INTERWORK_FLAG(abfd) \
- (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) == EF_ARM_EABI_VER4 \
+ (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
|| (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
/* The linker script knows the section names for placement.
@@ -1491,6 +1522,38 @@
#endif
+/* The format of the first entry in the procedure linkage table
+ for a VxWorks executable. */
+static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
+ {
+ 0xe52dc008, /* str ip,[sp,#-8]! */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe59cf008, /* ldr pc,[ip,#8] */
+ 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
+ };
+
+/* The format of subsequent entries in a VxWorks executable. */
+static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
+ {
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe59cf000, /* ldr pc,[ip] */
+ 0x00000000, /* .long @got */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xea000000, /* b _PLT */
+ 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
+ };
+
+/* The format of entries in a VxWorks shared library. */
+static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
+ {
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe79cf009, /* ldr pc,[ip,r9] */
+ 0x00000000, /* .long @got */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe599f008, /* ldr pc,[r9,#8] */
+ 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
+ };
+
/* An initial stub used if the PLT entry is referenced from Thumb code. */
#define PLT_THUMB_STUB_SIZE 4
static const bfd_vma elf32_arm_plt_thumb_stub [] =
@@ -1668,6 +1731,9 @@
/* The number of bytes in the subsequent PLT etries. */
bfd_size_type plt_entry_size;
+ /* True if the target system is VxWorks. */
+ int vxworks_p;
+
/* True if the target system is Symbian OS. */
int symbian_p;
@@ -1683,6 +1749,9 @@
asection *sdynbss;
asection *srelbss;
+ /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
+ asection *srelplt2;
+
/* Data for R_ARM_TLS_LDM32 relocations. */
union {
bfd_signed_vma refcount;
@@ -1728,7 +1797,20 @@
return (struct bfd_hash_entry *) ret;
}
-/* Create .got, .gotplt, and .rel.got sections in DYNOBJ, and set up
+/* Return true if NAME is the name of the relocation section associated
+ with S. */
+
+static bfd_boolean
+reloc_section_p (struct elf32_arm_link_hash_table *htab,
+ const char *name, asection *s)
+{
+ if (htab->use_rel)
+ return strncmp (name, ".rel", 4) == 0 && strcmp (s->name, name + 4) == 0;
+ else
+ return strncmp (name, ".rela", 5) == 0 && strcmp (s->name, name + 5) == 0;
+}
+
+/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
shortcuts to them in our hash table. */
static bfd_boolean
@@ -1749,7 +1831,8 @@
if (!htab->sgot || !htab->sgotplt)
abort ();
- htab->srelgot = bfd_make_section_with_flags (dynobj, ".rel.got",
+ htab->srelgot = bfd_make_section_with_flags (dynobj,
+ RELOC_SECTION (htab, ".got"),
(SEC_ALLOC | SEC_LOAD
| SEC_HAS_CONTENTS
| SEC_IN_MEMORY
@@ -1761,8 +1844,8 @@
return TRUE;
}
-/* Create .plt, .rel.plt, .got, .got.plt, .rel.got, .dynbss, and
- .rel.bss sections in DYNOBJ, and set up shortcuts to them in our
+/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
+ .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
hash table. */
static bfd_boolean
@@ -1778,11 +1861,33 @@
return FALSE;
htab->splt = bfd_get_section_by_name (dynobj, ".plt");
- htab->srelplt = bfd_get_section_by_name (dynobj, ".rel.plt");
+ htab->srelplt = bfd_get_section_by_name (dynobj,
+ RELOC_SECTION (htab, ".plt"));
htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
if (!info->shared)
- htab->srelbss = bfd_get_section_by_name (dynobj, ".rel.bss");
+ htab->srelbss = bfd_get_section_by_name (dynobj,
+ RELOC_SECTION (htab, ".bss"));
+ if (htab->vxworks_p)
+ {
+ if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
+ return FALSE;
+
+ if (info->shared)
+ {
+ htab->plt_header_size = 0;
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
+ }
+ else
+ {
+ htab->plt_header_size
+ = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
+ }
+ }
+
if (!htab->splt
|| !htab->srelplt
|| !htab->sdynbss
@@ -1862,7 +1967,8 @@
return NULL;
if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
- elf32_arm_link_hash_newfunc))
+ elf32_arm_link_hash_newfunc,
+ sizeof (struct elf32_arm_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1875,6 +1981,7 @@
ret->srelplt = NULL;
ret->sdynbss = NULL;
ret->srelbss = NULL;
+ ret->srelplt2 = NULL;
ret->thumb_glue_size = 0;
ret->arm_glue_size = 0;
ret->bfd_of_glue_owner = NULL;
@@ -1890,6 +1997,7 @@
#endif
ret->fix_v4bx = 0;
ret->use_blx = 0;
+ ret->vxworks_p = 0;
ret->symbian_p = 0;
ret->use_rel = 1;
ret->sym_sec.abfd = NULL;
@@ -2805,6 +2913,20 @@
return address - htab->tls_sec->vma + base;
}
+/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
+ VALUE is the relocation value. */
+
+static bfd_reloc_status_type
+elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
+{
+ if (value > 0xfff)
+ return bfd_reloc_overflow;
+
+ value |= bfd_get_32 (abfd, data) & 0xfffff000;
+ bfd_put_32 (abfd, value, data);
+ return bfd_reloc_ok;
+}
+
/* Perform a relocation as part of a final link. */
static bfd_reloc_status_type
@@ -2891,6 +3013,10 @@
*unresolved_reloc_p = FALSE;
return bfd_reloc_ok;
+ case R_ARM_ABS12:
+ if (!globals->vxworks_p)
+ return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
+
case R_ARM_PC24:
case R_ARM_ABS32:
case R_ARM_REL32:
@@ -2925,7 +3051,7 @@
*unresolved_reloc_p = FALSE;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
}
/* When generating a shared object or relocatable executable, these
@@ -2961,10 +3087,7 @@
if (name == NULL)
return bfd_reloc_notsupported;
- BFD_ASSERT (strncmp (name, ".rel", 4) == 0
- && strcmp (bfd_get_section_name (input_bfd,
- input_section),
- name + 4) == 0);
+ BFD_ASSERT (reloc_section_p (globals, name, input_section));
sreloc = bfd_get_section_by_name (dynobj, name);
BFD_ASSERT (sreloc != NULL);
@@ -2973,6 +3096,7 @@
skip = FALSE;
relocate = FALSE;
+ outrel.r_addend = addend;
outrel.r_offset =
_bfd_elf_section_offset (output_bfd, info, input_section,
rel->r_offset);
@@ -2996,7 +3120,6 @@
int symbol;
/* This symbol is local, or marked to become local. */
- relocate = TRUE;
if (sym_flags == STT_ARM_TFUNC)
value |= 1;
if (globals->symbian_p)
@@ -3021,11 +3144,15 @@
so the symbol does not matter. */
symbol = 0;
outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
+ if (globals->use_rel)
+ relocate = TRUE;
+ else
+ outrel.r_addend += value;
}
loc = sreloc->contents;
- loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
/* If this reloc is against an external symbol, we do not want to
fiddle with the addend. Otherwise, we need to include the symbol
@@ -3039,6 +3166,9 @@
}
else switch (r_type)
{
+ case R_ARM_ABS12:
+ return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
+
case R_ARM_XPC25: /* Arm BLX instruction. */
case R_ARM_CALL:
case R_ARM_JUMP24:
@@ -3186,18 +3316,6 @@
bfd_put_16 (input_bfd, value, hit_data);
return bfd_reloc_ok;
- case R_ARM_ABS12:
- /* Support ldr and str instruction for the arm */
- /* Also thumb b (unconditional branch). ??? Really? */
- value += addend;
-
- if ((long) value > 0x7ff || (long) value < -0x800)
- return bfd_reloc_overflow;
-
- value |= (bfd_get_32 (input_bfd, hit_data) & 0xfffff000);
- bfd_put_32 (input_bfd, value, hit_data);
- return bfd_reloc_ok;
-
case R_ARM_THM_ABS5:
/* Support ldr and str instructions for the thumb. */
if (globals->use_rel)
@@ -3589,7 +3707,7 @@
value -= sgot->output_section->vma;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
case R_ARM_GOTPC:
/* Use global offset table as symbol value. */
@@ -3602,7 +3720,7 @@
value = sgot->output_section->vma;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
case R_ARM_GOT32:
case R_ARM_GOT_PREL:
@@ -3632,7 +3750,7 @@
always be a multiple of 4, we use the least significant bit
to record whether we have initialized it already.
- When doing a dynamic link, we create a .rel.got relocation
+ When doing a dynamic link, we create a .rel(a).got relocation
entry to initialize the value. This is done in the
finish_dynamic_symbol routine. */
if ((off & 1) != 0)
@@ -3678,7 +3796,8 @@
if (sym_flags == STT_ARM_TFUNC)
value |= 1;
- bfd_put_32 (output_bfd, value, sgot->contents + off);
+ if (globals->use_rel)
+ bfd_put_32 (output_bfd, value, sgot->contents + off);
if (info->shared)
{
@@ -3686,16 +3805,18 @@
Elf_Internal_Rela outrel;
bfd_byte *loc;
- srelgot = bfd_get_section_by_name (dynobj, ".rel.got");
+ srelgot = (bfd_get_section_by_name
+ (dynobj, RELOC_SECTION (globals, ".got")));
BFD_ASSERT (srelgot != NULL);
+ outrel.r_addend = addend + value;
outrel.r_offset = (sgot->output_section->vma
+ sgot->output_offset
+ off);
outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
loc = srelgot->contents;
- loc += srelgot->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
}
local_got_offsets[r_symndx] |= 1;
@@ -3708,13 +3829,14 @@
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
case R_ARM_TLS_LDO32:
value = value - dtpoff_base (info);
return _bfd_final_link_relocate (howto, input_bfd, input_section,
- contents, rel->r_offset, value, (bfd_vma) 0);
+ contents, rel->r_offset, value,
+ rel->r_addend);
case R_ARM_TLS_LDM32:
{
@@ -3739,15 +3861,18 @@
if (globals->srelgot == NULL)
abort ();
+ outrel.r_addend = 0;
outrel.r_offset = (globals->sgot->output_section->vma
+ globals->sgot->output_offset + off);
outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
- bfd_put_32 (output_bfd, 0, globals->sgot->contents + off);
+ if (globals->use_rel)
+ bfd_put_32 (output_bfd, outrel.r_addend,
+ globals->sgot->contents + off);
loc = globals->srelgot->contents;
- loc += globals->srelgot->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
}
else
bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
@@ -3760,7 +3885,7 @@
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
}
case R_ARM_TLS_GD32:
@@ -3821,36 +3946,45 @@
if (globals->srelgot == NULL)
abort ();
loc = globals->srelgot->contents;
- loc += globals->srelgot->reloc_count * sizeof (Elf32_External_Rel);
+ loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
}
if (tls_type & GOT_TLS_GD)
{
if (need_relocs)
{
+ outrel.r_addend = 0;
outrel.r_offset = (globals->sgot->output_section->vma
- + globals->sgot->output_offset + cur_off);
+ + globals->sgot->output_offset
+ + cur_off);
outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
- bfd_put_32 (output_bfd, 0, globals->sgot->contents + cur_off);
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ if (globals->use_rel)
+ bfd_put_32 (output_bfd, outrel.r_addend,
+ globals->sgot->contents + cur_off);
+
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
globals->srelgot->reloc_count++;
- loc += sizeof (Elf32_External_Rel);
+ loc += RELOC_SIZE (globals);
if (indx == 0)
bfd_put_32 (output_bfd, value - dtpoff_base (info),
globals->sgot->contents + cur_off + 4);
else
{
- bfd_put_32 (output_bfd, 0,
- globals->sgot->contents + cur_off + 4);
-
+ outrel.r_addend = 0;
outrel.r_info = ELF32_R_INFO (indx,
R_ARM_TLS_DTPOFF32);
outrel.r_offset += 4;
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+
+ if (globals->use_rel)
+ bfd_put_32 (output_bfd, outrel.r_addend,
+ globals->sgot->contents + cur_off + 4);
+
+
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
globals->srelgot->reloc_count++;
- loc += sizeof (Elf32_External_Rel);
+ loc += RELOC_SIZE (globals);
}
}
else
@@ -3873,21 +4007,22 @@
{
if (need_relocs)
{
+ if (indx == 0)
+ outrel.r_addend = value - dtpoff_base (info);
+ else
+ outrel.r_addend = 0;
outrel.r_offset = (globals->sgot->output_section->vma
+ globals->sgot->output_offset
+ cur_off);
outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
- if (indx == 0)
- bfd_put_32 (output_bfd, value - dtpoff_base (info),
+ if (globals->use_rel)
+ bfd_put_32 (output_bfd, outrel.r_addend,
globals->sgot->contents + cur_off);
- else
- bfd_put_32 (output_bfd, 0,
- globals->sgot->contents + cur_off);
- bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
globals->srelgot->reloc_count++;
- loc += sizeof (Elf32_External_Rel);
+ loc += RELOC_SIZE (globals);
}
else
bfd_put_32 (output_bfd, tpoff (info, value),
@@ -3908,7 +4043,7 @@
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
- (bfd_vma) 0);
+ rel->r_addend);
}
case R_ARM_TLS_LE32:
@@ -3924,7 +4059,8 @@
value = tpoff (info, value);
return _bfd_final_link_relocate (howto, input_bfd, input_section,
- contents, rel->r_offset, value, (bfd_vma) 0);
+ contents, rel->r_offset, value,
+ rel->r_addend);
case R_ARM_V4BX:
if (globals->fix_v4bx)
@@ -5011,14 +5147,31 @@
for (; in_list; in_list = in_list->next)
{
if ((in_list->tag & 128) < 64)
- _bfd_error_handler
- (_("Warning: %B: Unknown EABI object attribute %d"),
- ibfd, in_list->tag);
- break;
+ {
+ _bfd_error_handler
+ (_("Warning: %B: Unknown EABI object attribute %d"),
+ ibfd, in_list->tag);
+ break;
+ }
}
return TRUE;
}
+
+/* Return TRUE if the two EABI versions are incompatible. */
+
+static bfd_boolean
+elf32_arm_versions_compatible (unsigned iver, unsigned over)
+{
+ /* v4 and v5 are the same spec before and after it was released,
+ so allow mixing them. */
+ if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
+ || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
+ return TRUE;
+
+ return (iver == over);
+}
+
/* Merge backend specific data from an object file to the output
object file when linking. */
@@ -5117,7 +5270,8 @@
}
/* Complain about various flag mismatches. */
- if (EF_ARM_EABI_VERSION (in_flags) != EF_ARM_EABI_VERSION (out_flags))
+ if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
+ EF_ARM_EABI_VERSION (out_flags)))
{
_bfd_error_handler
(_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
@@ -5128,7 +5282,10 @@
}
/* Not sure what needs to be checked for EABI versions >= 1. */
- if (EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
+ /* VxWorks libraries do not use these flags. */
+ if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
+ && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
+ && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
{
if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
{
@@ -5325,7 +5482,11 @@
case EF_ARM_EABI_VER4:
fprintf (file, _(" [Version4 EABI]"));
+ goto eabi;
+ case EF_ARM_EABI_VER5:
+ fprintf (file, _(" [Version5 EABI]"));
+ eabi:
if (flags & EF_ARM_BE8)
fprintf (file, _(" [BE8]"));
@@ -5371,7 +5532,7 @@
This allows us to distinguish between data used by Thumb instructions
and non-data (which is probably code) inside Thumb regions of an
executable. */
- if (type != STT_OBJECT)
+ if (type != STT_OBJECT && type != STT_TLS)
return ELF_ST_TYPE (elf_sym->st_info);
break;
@@ -5683,6 +5844,13 @@
}
break;
+ case R_ARM_ABS12:
+ /* VxWorks uses dynamic R_ARM_ABS12 relocations for
+ ldr __GOTT_INDEX__ offsets. */
+ if (!htab->vxworks_p)
+ break;
+ /* Fall through */
+
case R_ARM_ABS32:
case R_ARM_REL32:
case R_ARM_PC24:
@@ -5757,9 +5925,7 @@
if (name == NULL)
return FALSE;
- BFD_ASSERT (strncmp (name, ".rel", 4) == 0
- && strcmp (bfd_get_section_name (abfd, sec),
- name + 4) == 0);
+ BFD_ASSERT (reloc_section_p (htab, name, sec));
sreloc = bfd_get_section_by_name (dynobj, name);
if (sreloc == NULL)
@@ -6094,14 +6260,14 @@
/* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
copy the initial value out of the dynamic object and into the
runtime process image. We need to remember the offset into the
- .rel.bss section we are going to use. */
+ .rel(a).bss section we are going to use. */
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
{
asection *srel;
- srel = bfd_get_section_by_name (dynobj, ".rel.bss");
+ srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
BFD_ASSERT (srel != NULL);
- srel->size += sizeof (Elf32_External_Rel);
+ srel->size += RELOC_SIZE (globals);
h->needs_copy = 1;
}
@@ -6215,8 +6381,24 @@
htab->sgotplt->size += 4;
}
- /* We also need to make an entry in the .rel.plt section. */
- htab->srelplt->size += sizeof (Elf32_External_Rel);
+ /* We also need to make an entry in the .rel(a).plt section. */
+ htab->srelplt->size += RELOC_SIZE (htab);
+
+ /* VxWorks executables have a second set of relocations for
+ each PLT entry. They go in a separate relocation section,
+ which is processed by the kernel loader. */
+ if (htab->vxworks_p && !info->shared)
+ {
+ /* There is a relocation for the initial PLT entry:
+ an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
+ if (h->plt.offset == htab->plt_header_size)
+ htab->srelplt2->size += RELOC_SIZE (htab);
+
+ /* There are two extra relocations for each subsequent
+ PLT entry: an R_ARM_32 relocation for the GOT entry,
+ and an R_ARM_32 relocation for the PLT entry. */
+ htab->srelplt2->size += RELOC_SIZE (htab) * 2;
+ }
}
else
{
@@ -6281,19 +6463,19 @@
|| h->root.type != bfd_link_hash_undefweak))
{
if (tls_type & GOT_TLS_IE)
- htab->srelgot->size += sizeof (Elf32_External_Rel);
+ htab->srelgot->size += RELOC_SIZE (htab);
if (tls_type & GOT_TLS_GD)
- htab->srelgot->size += sizeof (Elf32_External_Rel);
+ htab->srelgot->size += RELOC_SIZE (htab);
if ((tls_type & GOT_TLS_GD) && indx != 0)
- htab->srelgot->size += sizeof (Elf32_External_Rel);
+ htab->srelgot->size += RELOC_SIZE (htab);
}
else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
&& (info->shared
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
- htab->srelgot->size += sizeof (Elf32_External_Rel);
+ htab->srelgot->size += RELOC_SIZE (htab);
}
}
else
@@ -6333,9 +6515,22 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->relocs_copied != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->relocs_copied = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->relocs_copied = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
+
else if (htab->root.is_relocatable_executable && h->dynindx == -1
&& h->root.type == bfd_link_hash_new)
{
@@ -6384,7 +6579,7 @@
for (p = eh->relocs_copied; p != NULL; p = p->next)
{
asection *sreloc = elf_section_data (p->section)->sreloc;
- sreloc->size += p->count * sizeof (Elf32_External_Rel);
+ sreloc->size += p->count * RELOC_SIZE (htab);
}
return TRUE;
@@ -6480,7 +6675,7 @@
else if (p->count != 0)
{
srel = elf_section_data (p->section)->sreloc;
- srel->size += p->count * sizeof (Elf32_External_Rel);
+ srel->size += p->count * RELOC_SIZE (htab);
if ((p->section->output_section->flags & SEC_READONLY) != 0)
info->flags |= DF_TEXTREL;
}
@@ -6511,7 +6706,7 @@
s->size += 4;
if (info->shared || *local_tls_type == GOT_TLS_GD)
- srel->size += sizeof (Elf32_External_Rel);
+ srel->size += RELOC_SIZE (htab);
}
else
*local_got = (bfd_vma) -1;
@@ -6525,7 +6720,7 @@
htab->tls_ldm_got.offset = htab->sgot->size;
htab->sgot->size += 8;
if (info->shared)
- htab->srelgot->size += sizeof (Elf32_External_Rel);
+ htab->srelgot->size += RELOC_SIZE (htab);
}
else
htab->tls_ldm_got.offset = -1;
@@ -6560,8 +6755,8 @@
if (s->size != 0)
{
/* Remember whether there are any reloc sections other
- than .rel.plt. */
- if (strcmp (name, ".rel.plt") != 0)
+ than .rel(a).plt and .rela.plt.unloaded. */
+ if (s != htab->srelplt && s != htab->srelplt2)
relocs = TRUE;
/* We use the reloc_count field as a counter if we need
@@ -6579,8 +6774,8 @@
if (s->size == 0)
{
/* If we don't need this section, strip it from the
- output file. This is mostly to handle .rel.bss and
- .rel.plt. We must create both sections in
+ output file. This is mostly to handle .rel(a).bss and
+ .rel(a).plt. We must create both sections in
create_dynamic_sections, because they must be created
before the linker maps input sections to output
sections. The linker does that before
@@ -6620,17 +6815,28 @@
{
if ( !add_dynamic_entry (DT_PLTGOT, 0)
|| !add_dynamic_entry (DT_PLTRELSZ, 0)
- || !add_dynamic_entry (DT_PLTREL, DT_REL)
+ || !add_dynamic_entry (DT_PLTREL,
+ htab->use_rel ? DT_REL : DT_RELA)
|| !add_dynamic_entry (DT_JMPREL, 0))
return FALSE;
}
if (relocs)
{
- if ( !add_dynamic_entry (DT_REL, 0)
- || !add_dynamic_entry (DT_RELSZ, 0)
- || !add_dynamic_entry (DT_RELENT, sizeof (Elf32_External_Rel)))
- return FALSE;
+ if (htab->use_rel)
+ {
+ if (!add_dynamic_entry (DT_REL, 0)
+ || !add_dynamic_entry (DT_RELSZ, 0)
+ || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
+ return FALSE;
+ }
+ else
+ {
+ if (!add_dynamic_entry (DT_RELA, 0)
+ || !add_dynamic_entry (DT_RELASZ, 0)
+ || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
+ return FALSE;
+ }
}
/* If any dynamic relocs apply to a read-only section,
@@ -6679,7 +6885,7 @@
BFD_ASSERT (h->dynindx != -1);
splt = bfd_get_section_by_name (dynobj, ".plt");
- srel = bfd_get_section_by_name (dynobj, ".rel.plt");
+ srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
BFD_ASSERT (splt != NULL && srel != NULL);
/* Fill in the entry in the procedure linkage table. */
@@ -6706,7 +6912,7 @@
}
else
{
- bfd_vma got_offset;
+ bfd_vma got_offset, got_address, plt_address;
bfd_vma got_displacement;
asection * sgot;
@@ -6724,38 +6930,103 @@
symbols appear in the same order as in .plt. */
plt_index = (got_offset - 12) / 4;
- /* Calculate the displacement between the PLT slot and the
- entry in the GOT. The eight-byte offset accounts for the
- value produced by adding to pc in the first instruction
- of the PLT stub. */
- got_displacement = (sgot->output_section->vma
- + sgot->output_offset
- + got_offset
- - splt->output_section->vma
- - splt->output_offset
- - h->plt.offset
- - 8);
+ /* Calculate the address of the GOT entry. */
+ got_address = (sgot->output_section->vma
+ + sgot->output_offset
+ + got_offset);
- BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
+ /* ...and the address of the PLT entry. */
+ plt_address = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
- if (!htab->use_blx && eh->plt_thumb_refcount > 0)
+ if (htab->vxworks_p && info->shared)
{
- bfd_put_16 (output_bfd, elf32_arm_plt_thumb_stub[0],
- splt->contents + h->plt.offset - 4);
- bfd_put_16 (output_bfd, elf32_arm_plt_thumb_stub[1],
- splt->contents + h->plt.offset - 2);
+ unsigned int i;
+ bfd_vma val;
+
+ for (i = 0; i != htab->plt_entry_size / 4; i++)
+ {
+ val = elf32_arm_vxworks_shared_plt_entry[i];
+ if (i == 2)
+ val |= got_address - sgot->output_section->vma;
+ if (i == 5)
+ val |= plt_index * RELOC_SIZE (htab);
+ bfd_put_32 (output_bfd, val,
+ htab->splt->contents + h->plt.offset + i * 4);
+ }
}
+ else if (htab->vxworks_p)
+ {
+ unsigned int i;
+ bfd_vma val;
- bfd_put_32 (output_bfd, elf32_arm_plt_entry[0] | ((got_displacement & 0x0ff00000) >> 20),
- splt->contents + h->plt.offset + 0);
- bfd_put_32 (output_bfd, elf32_arm_plt_entry[1] | ((got_displacement & 0x000ff000) >> 12),
- splt->contents + h->plt.offset + 4);
- bfd_put_32 (output_bfd, elf32_arm_plt_entry[2] | (got_displacement & 0x00000fff),
- splt->contents + h->plt.offset + 8);
+ for (i = 0; i != htab->plt_entry_size / 4; i++)
+ {
+ val = elf32_arm_vxworks_exec_plt_entry[i];
+ if (i == 2)
+ val |= got_address;
+ if (i == 4)
+ val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
+ if (i == 5)
+ val |= plt_index * RELOC_SIZE (htab);
+ bfd_put_32 (output_bfd, val,
+ htab->splt->contents + h->plt.offset + i * 4);
+ }
+
+ loc = (htab->srelplt2->contents
+ + (plt_index * 2 + 1) * RELOC_SIZE (htab));
+
+ /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
+ referencing the GOT for this PLT entry. */
+ rel.r_offset = plt_address + 8;
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
+ rel.r_addend = got_offset;
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ loc += RELOC_SIZE (htab);
+
+ /* Create the R_ARM_ABS32 relocation referencing the
+ beginning of the PLT for this GOT entry. */
+ rel.r_offset = got_address;
+ rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
+ rel.r_addend = 0;
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ }
+ else
+ {
+ /* Calculate the displacement between the PLT slot and the
+ entry in the GOT. The eight-byte offset accounts for the
+ value produced by adding to pc in the first instruction
+ of the PLT stub. */
+ got_displacement = got_address - (plt_address + 8);
+
+ BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
+
+ if (!htab->use_blx && eh->plt_thumb_refcount > 0)
+ {
+ bfd_put_16 (output_bfd, elf32_arm_plt_thumb_stub[0],
+ splt->contents + h->plt.offset - 4);
+ bfd_put_16 (output_bfd, elf32_arm_plt_thumb_stub[1],
+ splt->contents + h->plt.offset - 2);
+ }
+
+ bfd_put_32 (output_bfd,
+ elf32_arm_plt_entry[0]
+ | ((got_displacement & 0x0ff00000) >> 20),
+ splt->contents + h->plt.offset + 0);
+ bfd_put_32 (output_bfd,
+ elf32_arm_plt_entry[1]
+ | ((got_displacement & 0x000ff000) >> 12),
+ splt->contents + h->plt.offset + 4);
+ bfd_put_32 (output_bfd,
+ elf32_arm_plt_entry[2]
+ | (got_displacement & 0x00000fff),
+ splt->contents + h->plt.offset + 8);
#ifdef FOUR_WORD_PLT
- bfd_put_32 (output_bfd, elf32_arm_plt_entry[3],
- splt->contents + h->plt.offset + 12);
+ bfd_put_32 (output_bfd, elf32_arm_plt_entry[3],
+ splt->contents + h->plt.offset + 12);
#endif
+ }
/* Fill in the entry in the global offset table. */
bfd_put_32 (output_bfd,
@@ -6763,15 +7034,14 @@
+ splt->output_offset),
sgot->contents + got_offset);
- /* Fill in the entry in the .rel.plt section. */
- rel.r_offset = (sgot->output_section->vma
- + sgot->output_offset
- + got_offset);
+ /* Fill in the entry in the .rel(a).plt section. */
+ rel.r_addend = 0;
+ rel.r_offset = got_address;
rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
}
- loc = srel->contents + plt_index * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc = srel->contents + plt_index * RELOC_SIZE (htab);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
if (!h->def_regular)
{
@@ -6795,16 +7065,19 @@
asection * srel;
Elf_Internal_Rela rel;
bfd_byte *loc;
+ bfd_vma offset;
/* This symbol has an entry in the global offset table. Set it
up. */
sgot = bfd_get_section_by_name (dynobj, ".got");
- srel = bfd_get_section_by_name (dynobj, ".rel.got");
+ srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
BFD_ASSERT (sgot != NULL && srel != NULL);
+ offset = (h->got.offset & ~(bfd_vma) 1);
+ rel.r_addend = 0;
rel.r_offset = (sgot->output_section->vma
+ sgot->output_offset
- + (h->got.offset &~ (bfd_vma) 1));
+ + offset);
/* If this is a static link, or it is a -Bsymbolic link and the
symbol is defined locally or was forced to be local because
@@ -6816,16 +7089,21 @@
{
BFD_ASSERT((h->got.offset & 1) != 0);
rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
+ if (!htab->use_rel)
+ {
+ rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
+ }
}
else
{
BFD_ASSERT((h->got.offset & 1) == 0);
- bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
}
- loc = srel->contents + srel->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
}
if (h->needs_copy)
@@ -6840,20 +7118,23 @@
|| h->root.type == bfd_link_hash_defweak));
s = bfd_get_section_by_name (h->root.u.def.section->owner,
- ".rel.bss");
+ RELOC_SECTION (htab, ".bss"));
BFD_ASSERT (s != NULL);
+ rel.r_addend = 0;
rel.r_offset = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
- loc = s->contents + s->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
}
- /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
+ /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
+ the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
+ to the ".got" section. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || (!htab->vxworks_p && h == htab->root.hgot))
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -6925,7 +7206,7 @@
name = ".got";
goto get_vma;
case DT_JMPREL:
- name = ".rel.plt";
+ name = RELOC_SECTION (htab, ".plt");
get_vma:
s = bfd_get_section_by_name (output_bfd, name);
BFD_ASSERT (s != NULL);
@@ -6945,13 +7226,15 @@
break;
case DT_PLTRELSZ:
- s = bfd_get_section_by_name (output_bfd, ".rel.plt");
+ s = bfd_get_section_by_name (output_bfd,
+ RELOC_SECTION (htab, ".plt"));
BFD_ASSERT (s != NULL);
dyn.d_un.d_val = s->size;
bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
break;
case DT_RELSZ:
+ case DT_RELASZ:
if (!htab->symbian_p)
{
/* My reading of the SVR4 ABI indicates that the
@@ -6960,10 +7243,11 @@
what Solaris does. However, UnixWare can not handle
that case. Therefore, we override the DT_RELSZ entry
here to make it not include the JMPREL relocs. Since
- the linker script arranges for .rel.plt to follow all
+ the linker script arranges for .rel(a).plt to follow all
other relocation sections, we don't have to worry
about changing the DT_REL entry. */
- s = bfd_get_section_by_name (output_bfd, ".rel.plt");
+ s = bfd_get_section_by_name (output_bfd,
+ RELOC_SECTION (htab, ".plt"));
if (s != NULL)
dyn.d_un.d_val -= s->size;
bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
@@ -6973,7 +7257,6 @@
case DT_REL:
case DT_RELA:
- case DT_RELASZ:
/* In the BPABI, the DT_REL tag must point at the file
offset, not the VMA, of the first relocation
section. So, we use code similar to that in
@@ -7036,31 +7319,83 @@
/* Fill in the first entry in the procedure linkage table. */
if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
{
- bfd_vma got_displacement;
+ const bfd_vma *plt0_entry;
+ bfd_vma got_address, plt_address, got_displacement;
- /* Calculate the displacement between the PLT slot and &GOT[0]. */
- got_displacement = (sgot->output_section->vma
- + sgot->output_offset
- - splt->output_section->vma
- - splt->output_offset
- - 16);
+ /* Calculate the addresses of the GOT and PLT. */
+ got_address = sgot->output_section->vma + sgot->output_offset;
+ plt_address = splt->output_section->vma + splt->output_offset;
- bfd_put_32 (output_bfd, elf32_arm_plt0_entry[0], splt->contents + 0);
- bfd_put_32 (output_bfd, elf32_arm_plt0_entry[1], splt->contents + 4);
- bfd_put_32 (output_bfd, elf32_arm_plt0_entry[2], splt->contents + 8);
- bfd_put_32 (output_bfd, elf32_arm_plt0_entry[3], splt->contents + 12);
+ if (htab->vxworks_p)
+ {
+ /* The VxWorks GOT is relocated by the dynamic linker.
+ Therefore, we must emit relocations rather than simply
+ computing the values now. */
+ Elf_Internal_Rela rel;
+
+ plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
+ bfd_put_32 (output_bfd, plt0_entry[0], splt->contents + 0);
+ bfd_put_32 (output_bfd, plt0_entry[1], splt->contents + 4);
+ bfd_put_32 (output_bfd, plt0_entry[2], splt->contents + 8);
+ bfd_put_32 (output_bfd, got_address, splt->contents + 12);
+
+ /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
+ rel.r_offset = plt_address + 12;
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
+ rel.r_addend = 0;
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel,
+ htab->srelplt2->contents);
+ }
+ else
+ {
+ got_displacement = got_address - (plt_address + 16);
+
+ plt0_entry = elf32_arm_plt0_entry;
+ bfd_put_32 (output_bfd, plt0_entry[0], splt->contents + 0);
+ bfd_put_32 (output_bfd, plt0_entry[1], splt->contents + 4);
+ bfd_put_32 (output_bfd, plt0_entry[2], splt->contents + 8);
+ bfd_put_32 (output_bfd, plt0_entry[3], splt->contents + 12);
+
#ifdef FOUR_WORD_PLT
- /* The displacement value goes in the otherwise-unused last word of
- the second entry. */
- bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
+ /* The displacement value goes in the otherwise-unused
+ last word of the second entry. */
+ bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
#else
- bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
+ bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
#endif
+ }
}
/* UnixWare sets the entsize of .plt to 4, although that doesn't
really seem like the right value. */
elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
+
+ if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
+ {
+ /* Correct the .rel(a).plt.unloaded relocations. They will have
+ incorrect symbol indexes. */
+ int num_plts;
+ unsigned char *p;
+
+ num_plts = ((htab->splt->size - htab->plt_header_size)
+ / htab->plt_entry_size);
+ p = htab->srelplt2->contents + RELOC_SIZE (htab);
+
+ for (; num_plts; num_plts--)
+ {
+ Elf_Internal_Rela rel;
+
+ SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
+ p += RELOC_SIZE (htab);
+
+ SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
+ rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
+ p += RELOC_SIZE (htab);
+ }
+ }
}
/* Fill in the first three entries in the global offset table. */
@@ -7430,7 +7765,7 @@
const char *name,
Elf_Internal_Sym *elfsym,
asection *input_sec,
- struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
+ struct elf_link_hash_entry *h)
{
int mapcount;
elf32_arm_section_map *map;
@@ -7438,12 +7773,17 @@
_arm_elf_section_data *arm_data;
struct elf32_arm_link_hash_table *globals;
+ globals = elf32_arm_hash_table (info);
+ if (globals->vxworks_p
+ && !elf_vxworks_link_output_symbol_hook (info, name, elfsym,
+ input_sec, h))
+ return FALSE;
+
/* Only do this on final link. */
if (info->relocatable)
return TRUE;
/* Only build a map if we need to byteswap code. */
- globals = elf32_arm_hash_table (info);
if (!globals->byteswap_code)
return TRUE;
@@ -7459,6 +7799,7 @@
mapcount = arm_data->mapcount + 1;
map = arm_data->map;
+
/* TODO: This may be inefficient, but we probably don't usually have many
mapping symbols per section. */
newmap = bfd_realloc (map, mapcount * sizeof (* map));
@@ -7467,8 +7808,8 @@
arm_data->map = newmap;
arm_data->mapcount = mapcount;
- map[mapcount - 1].vma = elfsym->st_value;
- map[mapcount - 1].type = name[1];
+ newmap[mapcount - 1].vma = elfsym->st_value;
+ newmap[mapcount - 1].type = name[1];
}
return TRUE;
@@ -7823,27 +8164,48 @@
if (ret)
{
struct elf32_arm_link_hash_table *htab
- = (struct elf32_arm_link_hash_table *)ret;
+ = (struct elf32_arm_link_hash_table *) ret;
htab->use_rel = 0;
+ htab->vxworks_p = 1;
}
return ret;
}
+static void
+elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
+{
+ elf32_arm_final_write_processing (abfd, linker);
+ elf_vxworks_final_write_processing (abfd, linker);
+}
+
#undef elf32_bed
#define elf32_bed elf32_arm_vxworks_bed
#undef bfd_elf32_bfd_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_create \
elf32_arm_vxworks_link_hash_table_create
+#undef elf_backend_add_symbol_hook
+#define elf_backend_add_symbol_hook \
+ elf_vxworks_add_symbol_hook
+#undef elf_backend_final_write_processing
+#define elf_backend_final_write_processing \
+ elf32_arm_vxworks_final_write_processing
+#undef elf_backend_emit_relocs
+#define elf_backend_emit_relocs \
+ elf_vxworks_emit_relocs
#undef elf_backend_may_use_rel_p
-#define elf_backend_may_use_rel_p 0
+#define elf_backend_may_use_rel_p 0
#undef elf_backend_may_use_rela_p
-#define elf_backend_may_use_rela_p 1
+#define elf_backend_may_use_rela_p 1
#undef elf_backend_default_use_rela_p
-#define elf_backend_default_use_rela_p 1
+#define elf_backend_default_use_rela_p 1
#undef elf_backend_rela_normal
-#define elf_backend_rela_normal 1
+#define elf_backend_rela_normal 1
+#undef elf_backend_want_plt_sym
+#define elf_backend_want_plt_sym 1
+#undef ELF_MAXPAGESIZE
+#define ELF_MAXPAGESIZE 0x1000
#include "elf32-target.h"
@@ -7955,6 +8317,7 @@
#undef bfd_elf32_bfd_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_create \
elf32_arm_symbian_link_hash_table_create
+#undef elf_backend_add_symbol_hook
#undef elf_backend_special_sections
#define elf_backend_special_sections elf32_arm_symbian_special_sections
@@ -7962,6 +8325,10 @@
#undef elf_backend_begin_write_processing
#define elf_backend_begin_write_processing \
elf32_arm_symbian_begin_write_processing
+#undef elf_backend_final_write_processing
+#define elf_backend_final_write_processing \
+ elf32_arm_final_write_processing
+#undef elf_backend_emit_relocs
#undef elf_backend_modify_segment_map
#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
@@ -7975,12 +8342,16 @@
#define elf_backend_want_got_plt 0
#undef elf_backend_may_use_rel_p
-#define elf_backend_may_use_rel_p 1
+#define elf_backend_may_use_rel_p 1
#undef elf_backend_may_use_rela_p
-#define elf_backend_may_use_rela_p 0
+#define elf_backend_may_use_rela_p 0
#undef elf_backend_default_use_rela_p
-#define elf_backend_default_use_rela_p 0
+#define elf_backend_default_use_rela_p 0
#undef elf_backend_rela_normal
-#define elf_backend_rela_normal 0
+#define elf_backend_rela_normal 0
+#undef elf_backend_want_plt_sym
+#define elf_backend_want_plt_sym 0
+#undef ELF_MAXPAGESIZE
+#define ELF_MAXPAGESIZE 0x8000
#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-avr.c
===================================================================
--- branches/binutils/package/bfd/elf32-avr.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-avr.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* AVR-specific support for 32-bit ELF
- Copyright 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2006
Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc at overta.ru>
@@ -17,7 +17,8 @@
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include "bfd.h"
#include "sysdep.h"
@@ -25,28 +26,6 @@
#include "elf-bfd.h"
#include "elf/avr.h"
-static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
- PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
-static void avr_info_to_howto_rela
- PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
-static asection *elf32_avr_gc_mark_hook
- PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *,
- struct elf_link_hash_entry *, Elf_Internal_Sym *));
-static bfd_boolean elf32_avr_gc_sweep_hook
- PARAMS ((bfd *, struct bfd_link_info *, asection *,
- const Elf_Internal_Rela *));
-static bfd_boolean elf32_avr_check_relocs
- PARAMS ((bfd *, struct bfd_link_info *, asection *,
- const Elf_Internal_Rela *));
-static bfd_reloc_status_type avr_final_link_relocate
- PARAMS ((reloc_howto_type *, bfd *, asection *, bfd_byte *,
- Elf_Internal_Rela *, bfd_vma));
-static bfd_boolean elf32_avr_relocate_section
- PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
- Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
-static void bfd_elf_avr_final_write_processing PARAMS ((bfd *, bfd_boolean));
-static bfd_boolean elf32_avr_object_p PARAMS ((bfd *));
-
static reloc_howto_type elf_avr_howto_table[] =
{
HOWTO (R_AVR_NONE, /* type */
@@ -167,7 +146,8 @@
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A high 6 bit absolute relocation of 22 bit address.
- For LDI command. */
+ For LDI command. As well second most significant 8 bit value of
+ a 32 bit link-time constant. */
HOWTO (R_AVR_HH8_LDI, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
@@ -196,7 +176,7 @@
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
- /* A hegative high 8 bit absolute relocation of 16 bit address.
+ /* A negative high 8 bit absolute relocation of 16 bit address.
For LDI command. */
HOWTO (R_AVR_HI8_LDI_NEG, /* type */
8, /* rightshift */
@@ -211,7 +191,7 @@
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
- /* A hegative high 6 bit absolute relocation of 22 bit address.
+ /* A negative high 6 bit absolute relocation of 22 bit address.
For LDI command. */
HOWTO (R_AVR_HH8_LDI_NEG, /* type */
16, /* rightshift */
@@ -374,7 +354,35 @@
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
- FALSE) /* pcrel_offset */
+ FALSE), /* pcrel_offset */
+ /* Most significant 8 bit value of a 32 bit link-time constant. */
+ HOWTO (R_AVR_MS8_LDI, /* type */
+ 24, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_AVR_MS8_LDI", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+ /* Negative most significant 8 bit value of a 32 bit link-time constant. */
+ HOWTO (R_AVR_MS8_LDI_NEG, /* type */
+ 24, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_AVR_MS8_LDI_NEG", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE) /* pcrel_offset */
};
/* Map BFD reloc types to AVR ELF reloc types. */
@@ -396,9 +404,11 @@
{ BFD_RELOC_AVR_LO8_LDI, R_AVR_LO8_LDI},
{ BFD_RELOC_AVR_HI8_LDI, R_AVR_HI8_LDI },
{ BFD_RELOC_AVR_HH8_LDI, R_AVR_HH8_LDI },
+ { BFD_RELOC_AVR_MS8_LDI, R_AVR_MS8_LDI },
{ BFD_RELOC_AVR_LO8_LDI_NEG, R_AVR_LO8_LDI_NEG },
{ BFD_RELOC_AVR_HI8_LDI_NEG, R_AVR_HI8_LDI_NEG },
{ BFD_RELOC_AVR_HH8_LDI_NEG, R_AVR_HH8_LDI_NEG },
+ { BFD_RELOC_AVR_MS8_LDI_NEG, R_AVR_MS8_LDI_NEG },
{ BFD_RELOC_AVR_LO8_LDI_PM, R_AVR_LO8_LDI_PM },
{ BFD_RELOC_AVR_HI8_LDI_PM, R_AVR_HI8_LDI_PM },
{ BFD_RELOC_AVR_HH8_LDI_PM, R_AVR_HH8_LDI_PM },
@@ -411,10 +421,34 @@
{ BFD_RELOC_AVR_6_ADIW, R_AVR_6_ADIW }
};
+/* Meant to be filled one day with the wrap around address for the
+ specific device. I.e. should get the value 0x4000 for 16k devices,
+ 0x8000 for 32k devices and so on.
+
+ We initialize it here with a value of 0x1000000 resulting in
+ that we will never suggest a wrap-around jump during relaxation.
+ The logic of the source code later on assumes that in
+ avr_pc_wrap_around one single bit is set. */
+
+unsigned int avr_pc_wrap_around = 0x10000000;
+
+/* Calculates the effective distance of a pc relative jump/call. */
+static int
+avr_relative_distance_considering_wrap_around (unsigned int distance)
+{
+ unsigned int wrap_around_mask = avr_pc_wrap_around - 1;
+ int dist_with_wrap_around = distance & wrap_around_mask;
+
+ if (dist_with_wrap_around > ((int) (avr_pc_wrap_around >> 1)))
+ dist_with_wrap_around -= avr_pc_wrap_around;
+
+ return dist_with_wrap_around;
+}
+
+
static reloc_howto_type *
-bfd_elf32_bfd_reloc_type_lookup (abfd, code)
- bfd *abfd ATTRIBUTE_UNUSED;
- bfd_reloc_code_real_type code;
+bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
{
unsigned int i;
@@ -432,10 +466,9 @@
/* Set the howto pointer for an AVR ELF reloc. */
static void
-avr_info_to_howto_rela (abfd, cache_ptr, dst)
- bfd *abfd ATTRIBUTE_UNUSED;
- arelent *cache_ptr;
- Elf_Internal_Rela *dst;
+avr_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *cache_ptr,
+ Elf_Internal_Rela *dst)
{
unsigned int r_type;
@@ -445,12 +478,11 @@
}
static asection *
-elf32_avr_gc_mark_hook (sec, info, rel, h, sym)
- asection *sec;
- struct bfd_link_info *info ATTRIBUTE_UNUSED;
- Elf_Internal_Rela *rel;
- struct elf_link_hash_entry *h;
- Elf_Internal_Sym *sym;
+elf32_avr_gc_mark_hook (asection *sec,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ Elf_Internal_Rela *rel,
+ struct elf_link_hash_entry *h,
+ Elf_Internal_Sym *sym)
{
if (h != NULL)
{
@@ -478,11 +510,10 @@
}
static bfd_boolean
-elf32_avr_gc_sweep_hook (abfd, info, sec, relocs)
- bfd *abfd ATTRIBUTE_UNUSED;
- struct bfd_link_info *info ATTRIBUTE_UNUSED;
- asection *sec ATTRIBUTE_UNUSED;
- const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
+elf32_avr_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
{
/* We don't use got and plt entries for avr. */
return TRUE;
@@ -493,11 +524,10 @@
virtual table relocs for gc. */
static bfd_boolean
-elf32_avr_check_relocs (abfd, info, sec, relocs)
- bfd *abfd;
- struct bfd_link_info *info;
- asection *sec;
- const Elf_Internal_Rela *relocs;
+elf32_avr_check_relocs (bfd *abfd,
+ struct bfd_link_info *info,
+ asection *sec,
+ const Elf_Internal_Rela *relocs)
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
@@ -509,7 +539,7 @@
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
- sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
+ sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
@@ -538,14 +568,12 @@
routines, but a few relocs, we have to do them ourselves. */
static bfd_reloc_status_type
-avr_final_link_relocate (howto, input_bfd, input_section,
- contents, rel, relocation)
- reloc_howto_type * howto;
- bfd * input_bfd;
- asection * input_section;
- bfd_byte * contents;
- Elf_Internal_Rela * rel;
- bfd_vma relocation;
+avr_final_link_relocate (reloc_howto_type * howto,
+ bfd * input_bfd,
+ asection * input_section,
+ bfd_byte * contents,
+ Elf_Internal_Rela * rel,
+ bfd_vma relocation)
{
bfd_reloc_status_type r = bfd_reloc_ok;
bfd_vma x;
@@ -583,13 +611,17 @@
if (srel & 1)
return bfd_reloc_outofrange;
+ srel = avr_relative_distance_considering_wrap_around (srel);
+
/* AVR addresses commands as words. */
srel >>= 1;
/* Check for overflow. */
if (srel < -2048 || srel > 2047)
{
- /* Apply WRAPAROUND if possible. */
+ /* Relative distance is too large. */
+
+ /* Always apply WRAPAROUND for avr2 and avr4. */
switch (bfd_get_mach (input_bfd))
{
case bfd_mach_avr2:
@@ -617,9 +649,11 @@
case R_AVR_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
- if ((srel & 0xffff) > 255)
- /* Remove offset for data/eeprom section. */
- return bfd_reloc_overflow;
+ if (((srel > 0) && (srel & 0xffff) > 255)
+ || ((srel < 0) && ((-srel) & 0xffff) > 128))
+ /* Remove offset for data/eeprom section. */
+ return bfd_reloc_overflow;
+
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
@@ -632,7 +666,8 @@
/* Remove offset for data/eeprom section. */
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
- x = (x & 0xd3f8) | ((srel & 7) | ((srel & (3 << 3)) << 7) | ((srel & (1 << 5)) << 8));
+ x = (x & 0xd3f8) | ((srel & 7) | ((srel & (3 << 3)) << 7)
+ | ((srel & (1 << 5)) << 8));
bfd_put_16 (input_bfd, x, contents);
break;
@@ -643,7 +678,7 @@
/* Remove offset for data/eeprom section. */
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
- x = (x & 0xff30) | (srel & 0xf) | ((srel & 0x30) << 2);
+ x = (x & 0xff30) | (srel & 0xf) | ((srel & 0x30) << 2);
bfd_put_16 (input_bfd, x, contents);
break;
@@ -665,6 +700,15 @@
bfd_put_16 (input_bfd, x, contents);
break;
+ case R_AVR_MS8_LDI:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ srel = (srel >> 24) & 0xff;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
case R_AVR_LO8_LDI_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
@@ -694,6 +738,16 @@
bfd_put_16 (input_bfd, x, contents);
break;
+ case R_AVR_MS8_LDI_NEG:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ srel = -srel;
+ srel = (srel >> 24) & 0xff;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
case R_AVR_LO8_LDI_PM:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
@@ -789,17 +843,16 @@
}
/* Relocate an AVR ELF section. */
+
static bfd_boolean
-elf32_avr_relocate_section (output_bfd, info, input_bfd, input_section,
- contents, relocs, local_syms, local_sections)
- bfd *output_bfd ATTRIBUTE_UNUSED;
- struct bfd_link_info *info;
- bfd *input_bfd;
- asection *input_section;
- bfd_byte *contents;
- Elf_Internal_Rela *relocs;
- Elf_Internal_Sym *local_syms;
- asection **local_sections;
+elf32_avr_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ Elf_Internal_Rela *relocs,
+ Elf_Internal_Sym *local_syms,
+ asection **local_sections)
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
@@ -910,9 +963,8 @@
number. */
static void
-bfd_elf_avr_final_write_processing (abfd, linker)
- bfd *abfd;
- bfd_boolean linker ATTRIBUTE_UNUSED;
+bfd_elf_avr_final_write_processing (bfd *abfd,
+ bfd_boolean linker ATTRIBUTE_UNUSED)
{
unsigned long val;
@@ -943,19 +995,21 @@
elf_elfheader (abfd)->e_machine = EM_AVR;
elf_elfheader (abfd)->e_flags &= ~ EF_AVR_MACH;
elf_elfheader (abfd)->e_flags |= val;
+ elf_elfheader (abfd)->e_flags |= EF_AVR_LINKRELAX_PREPARED;
}
/* Set the right machine number. */
static bfd_boolean
-elf32_avr_object_p (abfd)
- bfd *abfd;
+elf32_avr_object_p (bfd *abfd)
{
unsigned int e_set = bfd_mach_avr2;
+
if (elf_elfheader (abfd)->e_machine == EM_AVR
|| elf_elfheader (abfd)->e_machine == EM_AVR_OLD)
{
int e_mach = elf_elfheader (abfd)->e_flags & EF_AVR_MACH;
+
switch (e_mach)
{
default:
@@ -984,6 +1038,920 @@
e_set);
}
+
+/* Enable debugging printout at stdout with a value of 1. */
+#define DEBUG_RELAX 0
+
+/* Delete some bytes from a section while changing the size of an instruction.
+ The parameter "addr" denotes the section-relative offset pointing just
+ behind the shrinked instruction. "addr+count" point at the first
+ byte just behind the original unshrinked instruction. */
+
+static bfd_boolean
+elf32_avr_relax_delete_bytes (bfd *abfd,
+ asection *sec,
+ bfd_vma addr,
+ int count)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ unsigned int sec_shndx;
+ bfd_byte *contents;
+ Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Rela *irelalign;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymbuf = NULL;
+ Elf_Internal_Sym *isymend;
+ bfd_vma toaddr;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+ unsigned int symcount;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+ contents = elf_section_data (sec)->this_hdr.contents;
+
+ /* The deletion must stop at the next ALIGN reloc for an aligment
+ power larger than the number of bytes we are deleting. */
+
+ irelalign = NULL;
+ toaddr = sec->size;
+
+ irel = elf_section_data (sec)->relocs;
+ irelend = irel + sec->reloc_count;
+
+ /* Actually delete the bytes. */
+ if (toaddr - addr - count > 0)
+ memmove (contents + addr, contents + addr + count,
+ (size_t) (toaddr - addr - count));
+ sec->size -= count;
+
+ /* Adjust all the relocs. */
+ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ {
+ bfd_vma symval;
+ bfd_vma old_reloc_address;
+ bfd_vma shrinked_insn_address;
+
+ old_reloc_address = (sec->output_section->vma
+ + sec->output_offset + irel->r_offset);
+ shrinked_insn_address = (sec->output_section->vma
+ + sec->output_offset + addr - count);
+
+ /* Get the new reloc address. */
+ if ((irel->r_offset > addr
+ && irel->r_offset < toaddr))
+ {
+ if (DEBUG_RELAX)
+ printf ("Relocation at address 0x%x needs to be moved.\n"
+ "Old section offset: 0x%x, New section offset: 0x%x \n",
+ (unsigned int) old_reloc_address,
+ (unsigned int) irel->r_offset,
+ (unsigned int) ((irel->r_offset) - count));
+
+ irel->r_offset -= count;
+ }
+
+ /* The reloc's own addresses are now ok. However, we need to readjust
+ the reloc's addend if two conditions are met:
+ 1.) the reloc is relative to a symbol in this section that
+ is located in front of the shrinked instruction
+ 2.) symbol plus addend end up behind the shrinked instruction.
+
+ This should happen only for local symbols that are progmem related. */
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ return FALSE;
+ }
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = isym->st_value;
+ /* If the reloc is absolute, it will not have
+ a symbol or section associated with it. */
+ if (sym_sec)
+ {
+ symval += sym_sec->output_section->vma
+ + sym_sec->output_offset;
+
+ if (DEBUG_RELAX)
+ printf ("Checking if the relocation's "
+ "addend needs corrections.\n"
+ "Address of anchor symbol: 0x%x \n"
+ "Address of relocation target: 0x%x \n"
+ "Address of relaxed insn: 0x%x \n",
+ (unsigned int) symval,
+ (unsigned int) (symval + irel->r_addend),
+ (unsigned int) shrinked_insn_address);
+
+ if (symval <= shrinked_insn_address
+ && (symval + irel->r_addend) > shrinked_insn_address)
+ {
+ irel->r_addend -= count;
+
+ if (DEBUG_RELAX)
+ printf ("Anchor symbol and relocation target bracket "
+ "shrinked insn address.\n"
+ "Need for new addend : 0x%x\n",
+ (unsigned int) irel->r_addend);
+ }
+ }
+ /* else ... Reference symbol is absolute. No adjustment needed. */
+ }
+ /* else ... Reference symbol is extern. No need for adjusting the addend. */
+ }
+
+ /* Adjust the local symbols defined in this section. */
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ isymend = isym + symtab_hdr->sh_info;
+ for (; isym < isymend; isym++)
+ {
+ if (isym->st_shndx == sec_shndx
+ && isym->st_value > addr
+ && isym->st_value < toaddr)
+ isym->st_value -= count;
+ }
+
+ /* Now adjust the global symbols defined in this section. */
+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type == bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && sym_hash->root.u.def.value > addr
+ && sym_hash->root.u.def.value < toaddr)
+ {
+ sym_hash->root.u.def.value -= count;
+ }
+ }
+
+ return TRUE;
+}
+
+/* This function handles relaxing for the avr.
+ Many important relaxing opportunities within functions are already
+ realized by the compiler itself.
+ Here we try to replace call (4 bytes) -> rcall (2 bytes)
+ and jump -> rjmp (safes also 2 bytes).
+ As well we now optimize seqences of
+ - call/rcall function
+ - ret
+ to yield
+ - jmp/rjmp function
+ - ret
+ . In case that within a sequence
+ - jmp/rjmp label
+ - ret
+ the ret could no longer be reached it is optimized away. In order
+ to check if the ret is no longer needed, it is checked that the ret's address
+ is not the target of a branch or jump within the same section, it is checked
+ that there is no skip instruction before the jmp/rjmp and that there
+ is no local or global label place at the address of the ret.
+
+ We refrain from relaxing within sections ".vectors" and
+ ".jumptables" in order to maintain the position of the instructions.
+ There, however, we substitute jmp/call by a sequence rjmp,nop/rcall,nop
+ if possible. (In future one could possibly use the space of the nop
+ for the first instruction of the irq service function.
+
+ The .jumptables sections is meant to be used for a future tablejump variant
+ for the devices with 3-byte program counter where the table itself
+ contains 4-byte jump instructions whose relative offset must not
+ be changed. */
+
+static bfd_boolean
+elf32_avr_relax_section (bfd *abfd,
+ asection *sec,
+ struct bfd_link_info *link_info,
+ bfd_boolean *again)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ Elf_Internal_Rela *internal_relocs;
+ Elf_Internal_Rela *irel, *irelend;
+ bfd_byte *contents = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+ static asection *last_input_section = NULL;
+ static Elf_Internal_Rela *last_reloc = NULL;
+
+ /* Assume nothing changes. */
+ *again = FALSE;
+
+ /* We don't have to do anything for a relocatable link, if
+ this section does not have relocs, or if this is not a
+ code section. */
+ if (link_info->relocatable
+ || (sec->flags & SEC_RELOC) == 0
+ || sec->reloc_count == 0
+ || (sec->flags & SEC_CODE) == 0)
+ return TRUE;
+
+ /* Check if the object file to relax uses internal symbols so that we
+ could fix up the relocations. */
+ if (!(elf_elfheader (abfd)->e_flags & EF_AVR_LINKRELAX_PREPARED))
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+
+ /* Get a copy of the native relocations. */
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (abfd, sec, NULL, NULL, link_info->keep_memory));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ if (sec != last_input_section)
+ last_reloc = NULL;
+
+ last_input_section = sec;
+
+ /* Walk through the relocs looking for relaxing opportunities. */
+ irelend = internal_relocs + sec->reloc_count;
+ for (irel = internal_relocs; irel < irelend; irel++)
+ {
+ bfd_vma symval;
+
+ if ( ELF32_R_TYPE (irel->r_info) != R_AVR_13_PCREL
+ && ELF32_R_TYPE (irel->r_info) != R_AVR_7_PCREL
+ && ELF32_R_TYPE (irel->r_info) != R_AVR_CALL)
+ continue;
+
+ /* Get the section contents if we haven't done so already. */
+ if (contents == NULL)
+ {
+ /* Get cached copy if it exists. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ else
+ {
+ /* Go get them off disk. */
+ if (! bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+ }
+ }
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = isym->st_value;
+ /* If the reloc is absolute, it will not have
+ a symbol or section associated with it. */
+ if (sym_sec)
+ symval += sym_sec->output_section->vma
+ + sym_sec->output_offset;
+ }
+ else
+ {
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it--it will be caught by the
+ regular reloc processing. */
+ continue;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+
+ /* For simplicity of coding, we are going to modify the section
+ contents, the section relocs, and the BFD symbol table. We
+ must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
+ switch (ELF32_R_TYPE (irel->r_info))
+ {
+ /* Try to turn a 22-bit absolute call/jump into an 13-bit
+ pc-relative rcall/rjmp. */
+ case R_AVR_CALL:
+ {
+ bfd_vma value = symval + irel->r_addend;
+ bfd_vma dot, gap;
+ int distance_short_enough = 0;
+
+ /* Get the address of this instruction. */
+ dot = (sec->output_section->vma
+ + sec->output_offset + irel->r_offset);
+
+ /* Compute the distance from this insn to the branch target. */
+ gap = value - dot;
+
+ /* If the distance is within -4094..+4098 inclusive, then we can
+ relax this jump/call. +4098 because the call/jump target
+ will be closer after the relaxation. */
+ if ((int) gap >= -4094 && (int) gap <= 4098)
+ distance_short_enough = 1;
+
+ /* Here we handle the wrap-around case. E.g. for a 16k device
+ we could use a rjmp to jump from address 0x100 to 0x3d00!
+ In order to make this work properly, we need to fill the
+ vaiable avr_pc_wrap_around with the appropriate value.
+ I.e. 0x4000 for a 16k device. */
+ {
+ /* Shrinking the code size makes the gaps larger in the
+ case of wrap-arounds. So we use a heuristical safety
+ margin to avoid that during relax the distance gets
+ again too large for the short jumps. Let's assume
+ a typical code-size reduction due to relax for a
+ 16k device of 600 bytes. So let's use twice the
+ typical value as safety margin. */
+ int rgap;
+ int safety_margin;
+
+ int assumed_shrink = 600;
+ if (avr_pc_wrap_around > 0x4000)
+ assumed_shrink = 900;
+
+ safety_margin = 2 * assumed_shrink;
+
+ rgap = avr_relative_distance_considering_wrap_around (gap);
+
+ if (rgap >= (-4092 + safety_margin)
+ && rgap <= (4094 - safety_margin))
+ distance_short_enough = 1;
+ }
+
+ if (distance_short_enough)
+ {
+ unsigned char code_msb;
+ unsigned char code_lsb;
+
+ if (DEBUG_RELAX)
+ printf ("shrinking jump/call instruction at address 0x%x"
+ " in section %s\n\n",
+ (int) dot, sec->name);
+
+ /* Note that we've changed the relocs, section contents,
+ etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Get the instruction code for relaxing. */
+ code_lsb = bfd_get_8 (abfd, contents + irel->r_offset);
+ code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1);
+
+ /* Mask out the relocation bits. */
+ code_msb &= 0x94;
+ code_lsb &= 0x0E;
+ if (code_msb == 0x94 && code_lsb == 0x0E)
+ {
+ /* we are changing call -> rcall . */
+ bfd_put_8 (abfd, 0x00, contents + irel->r_offset);
+ bfd_put_8 (abfd, 0xD0, contents + irel->r_offset + 1);
+ }
+ else if (code_msb == 0x94 && code_lsb == 0x0C)
+ {
+ /* we are changeing jump -> rjmp. */
+ bfd_put_8 (abfd, 0x00, contents + irel->r_offset);
+ bfd_put_8 (abfd, 0xC0, contents + irel->r_offset + 1);
+ }
+ else
+ abort ();
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_AVR_13_PCREL);
+
+ /* Check for the vector section. There we don't want to
+ modify the ordering! */
+
+ if (!strcmp (sec->name,".vectors")
+ || !strcmp (sec->name,".jumptables"))
+ {
+ /* Let's insert a nop. */
+ bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 2);
+ bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 3);
+ }
+ else
+ {
+ /* Delete two bytes of data. */
+ if (!elf32_avr_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+ }
+
+ default:
+ {
+ unsigned char code_msb;
+ unsigned char code_lsb;
+ bfd_vma dot;
+
+ code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1);
+ code_lsb = bfd_get_8 (abfd, contents + irel->r_offset + 0);
+
+ /* Get the address of this instruction. */
+ dot = (sec->output_section->vma
+ + sec->output_offset + irel->r_offset);
+
+ /* Here we look for rcall/ret or call/ret sequences that could be
+ safely replaced by rjmp/ret or jmp/ret */
+ if (0xd0 == (code_msb & 0xf0))
+ {
+ /* This insn is a rcall. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+
+ if (irel->r_offset + 3 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 3);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 2);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We now convert the rcall insn
+ into a rjmp instruction. */
+ code_msb &= 0xef;
+ bfd_put_8 (abfd, code_msb, contents + irel->r_offset + 1);
+ if (DEBUG_RELAX)
+ printf ("converted rcall/ret sequence at address 0x%x"
+ " into rjmp/ret sequence. Section is %s\n\n",
+ (int) dot, sec->name);
+ *again = TRUE;
+ break;
+ }
+ }
+ else if ((0x94 == (code_msb & 0xfe))
+ && (0x0e == (code_lsb & 0x0e)))
+ {
+ /* This insn is a call. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+
+ if (irel->r_offset + 5 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 5);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 4);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We now convert the call insn
+ into a jmp instruction. */
+
+ code_lsb &= 0xfd;
+ bfd_put_8 (abfd, code_lsb, contents + irel->r_offset);
+ if (DEBUG_RELAX)
+ printf ("converted call/ret sequence at address 0x%x"
+ " into jmp/ret sequence. Section is %s\n\n",
+ (int) dot, sec->name);
+ *again = TRUE;
+ break;
+ }
+ }
+ else if ((0xc0 == (code_msb & 0xf0))
+ || ((0x94 == (code_msb & 0xfe))
+ && (0x0c == (code_lsb & 0x0e))))
+ {
+ /* This insn is a rjmp or a jmp. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+ int insn_size;
+
+ if (0xc0 == (code_msb & 0xf0))
+ insn_size = 2; /* rjmp insn */
+ else
+ insn_size = 4; /* jmp insn */
+
+ if (irel->r_offset + insn_size + 1 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset
+ + insn_size + 1);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset
+ + insn_size);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We possibly could delete
+ this ret. First we need to check for preceeding
+ sbis/sbic/sbrs or cpse "skip" instructions. */
+
+ int there_is_preceeding_non_skip_insn = 1;
+ bfd_vma address_of_ret;
+
+ address_of_ret = dot + insn_size;
+
+ if (DEBUG_RELAX && (insn_size == 2))
+ printf ("found rjmp / ret sequence at address 0x%x\n",
+ (int) dot);
+ if (DEBUG_RELAX && (insn_size == 4))
+ printf ("found jmp / ret sequence at address 0x%x\n",
+ (int) dot);
+
+ /* We have to make sure that there is a preceeding insn. */
+ if (irel->r_offset >= 2)
+ {
+ unsigned char preceeding_msb;
+ unsigned char preceeding_lsb;
+ preceeding_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset - 1);
+ preceeding_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset - 2);
+
+ /* sbic. */
+ if (0x99 == preceeding_msb)
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbis. */
+ if (0x9b == preceeding_msb)
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbrc */
+ if ((0xfc == (preceeding_msb & 0xfe)
+ && (0x00 == (preceeding_lsb & 0x08))))
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbrs */
+ if ((0xfe == (preceeding_msb & 0xfe)
+ && (0x00 == (preceeding_lsb & 0x08))))
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* cpse */
+ if (0x10 == (preceeding_msb & 0xfc))
+ there_is_preceeding_non_skip_insn = 0;
+
+ if (there_is_preceeding_non_skip_insn == 0)
+ if (DEBUG_RELAX)
+ printf ("preceeding skip insn prevents deletion of"
+ " ret insn at addr 0x%x in section %s\n",
+ (int) dot + 2, sec->name);
+ }
+ else
+ {
+ /* There is no previous instruction. */
+ there_is_preceeding_non_skip_insn = 0;
+ }
+
+ if (there_is_preceeding_non_skip_insn)
+ {
+ /* We now only have to make sure that there is no
+ local label defined at the address of the ret
+ instruction and that there is no local relocation
+ in this section pointing to the ret. */
+
+ int deleting_ret_is_safe = 1;
+ unsigned int section_offset_of_ret_insn =
+ irel->r_offset + insn_size;
+ Elf_Internal_Sym *isym, *isymend;
+ unsigned int sec_shndx;
+
+ sec_shndx =
+ _bfd_elf_section_from_bfd_section (abfd, sec);
+
+ /* Check for local symbols. */
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ isymend = isym + symtab_hdr->sh_info;
+ for (; isym < isymend; isym++)
+ {
+ if (isym->st_value == section_offset_of_ret_insn
+ && isym->st_shndx == sec_shndx)
+ {
+ deleting_ret_is_safe = 0;
+ if (DEBUG_RELAX)
+ printf ("local label prevents deletion of ret "
+ "insn at address 0x%x\n",
+ (int) dot + insn_size);
+ }
+ }
+
+ /* Now check for global symbols. */
+ {
+ int symcount;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+
+ symcount = (symtab_hdr->sh_size
+ / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash =
+ *sym_hashes;
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type ==
+ bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && sym_hash->root.u.def.value == section_offset_of_ret_insn)
+ {
+ deleting_ret_is_safe = 0;
+ if (DEBUG_RELAX)
+ printf ("global label prevents deletion of "
+ "ret insn at address 0x%x\n",
+ (int) dot + insn_size);
+ }
+ }
+ }
+ /* Now we check for relocations pointing to ret. */
+ {
+ Elf_Internal_Rela *irel;
+ Elf_Internal_Rela *relend;
+ Elf_Internal_Shdr *symtab_hdr;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ relend = elf_section_data (sec)->relocs
+ + sec->reloc_count;
+
+ for (irel = elf_section_data (sec)->relocs;
+ irel < relend; irel++)
+ {
+ bfd_vma reloc_target = 0;
+ bfd_vma symval;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* Read this BFD's local symbols if we haven't
+ done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *)
+ symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms
+ (abfd,
+ symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ break;
+ }
+
+ /* Get the value of the symbol referred to
+ by the reloc. */
+ if (ELF32_R_SYM (irel->r_info)
+ < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf
+ + ELF32_R_SYM (irel->r_info);
+ sym_sec = bfd_section_from_elf_index
+ (abfd, isym->st_shndx);
+ symval = isym->st_value;
+
+ /* If the reloc is absolute, it will not
+ have a symbol or section associated
+ with it. */
+
+ if (sym_sec)
+ {
+ symval +=
+ sym_sec->output_section->vma
+ + sym_sec->output_offset;
+ reloc_target = symval + irel->r_addend;
+ }
+ else
+ {
+ reloc_target = symval + irel->r_addend;
+ /* Reference symbol is absolute. */
+ }
+ }
+ /* else ... reference symbol is extern. */
+
+ if (address_of_ret == reloc_target)
+ {
+ deleting_ret_is_safe = 0;
+ if (DEBUG_RELAX)
+ printf ("ret from "
+ "rjmp/jmp ret sequence at address"
+ " 0x%x could not be deleted. ret"
+ " is target of a relocation.\n",
+ (int) address_of_ret);
+ }
+ }
+ }
+
+ if (deleting_ret_is_safe)
+ {
+ if (DEBUG_RELAX)
+ printf ("unreachable ret instruction "
+ "at address 0x%x deleted.\n",
+ (int) dot + insn_size);
+
+ /* Delete two bytes of data. */
+ if (!elf32_avr_relax_delete_bytes (abfd, sec,
+ irel->r_offset + insn_size, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax
+ again. Note that this is not required, and it
+ may be slow. */
+ *again = TRUE;
+ break;
+ }
+ }
+
+ }
+ }
+ break;
+ }
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ {
+ if (! link_info->keep_memory)
+ free (contents);
+ else
+ {
+ /* Cache the section contents for elf_link_input_bfd. */
+ elf_section_data (sec)->this_hdr.contents = contents;
+ }
+ }
+
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return TRUE;
+
+ error_return:
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return FALSE;
+}
+
+/* This is a version of bfd_generic_get_relocated_section_contents
+ which uses elf32_avr_relocate_section.
+
+ For avr it's essentially a cut and paste taken from the H8300 port.
+ The author of the relaxation support patch for avr had absolutely no
+ clue what is happening here but found out that this part of the code
+ seems to be important. */
+
+static bfd_byte *
+elf32_avr_get_relocated_section_contents (bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ asection *input_section = link_order->u.indirect.section;
+ bfd *input_bfd = input_section->owner;
+ asection **sections = NULL;
+ Elf_Internal_Rela *internal_relocs = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* We only need to handle the case of relaxing, or of having a
+ particular set of section contents, specially. */
+ if (relocatable
+ || elf_section_data (input_section)->this_hdr.contents == NULL)
+ return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
+ link_order, data,
+ relocatable,
+ symbols);
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+
+ memcpy (data, elf_section_data (input_section)->this_hdr.contents,
+ (size_t) input_section->size);
+
+ if ((input_section->flags & SEC_RELOC) != 0
+ && input_section->reloc_count > 0)
+ {
+ asection **secpp;
+ Elf_Internal_Sym *isym, *isymend;
+ bfd_size_type amt;
+
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (input_bfd, input_section, NULL, NULL, FALSE));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ if (symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ amt = symtab_hdr->sh_info;
+ amt *= sizeof (asection *);
+ sections = bfd_malloc (amt);
+ if (sections == NULL && amt != 0)
+ goto error_return;
+
+ isymend = isymbuf + symtab_hdr->sh_info;
+ for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
+ {
+ asection *isec;
+
+ if (isym->st_shndx == SHN_UNDEF)
+ isec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ isec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ isec = bfd_com_section_ptr;
+ else
+ isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
+
+ *secpp = isec;
+ }
+
+ if (! elf32_avr_relocate_section (output_bfd, link_info, input_bfd,
+ input_section, data, internal_relocs,
+ isymbuf, sections))
+ goto error_return;
+
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ }
+
+ return data;
+
+ error_return:
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (internal_relocs != NULL
+ && elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ return NULL;
+}
+
+
#define ELF_ARCH bfd_arch_avr
#define ELF_MACHINE_CODE EM_AVR
#define ELF_MACHINE_ALT1 EM_AVR_OLD
@@ -1004,4 +1972,8 @@
bfd_elf_avr_final_write_processing
#define elf_backend_object_p elf32_avr_object_p
+#define bfd_elf32_bfd_relax_section elf32_avr_relax_section
+#define bfd_elf32_bfd_get_relocated_section_contents \
+ elf32_avr_get_relocated_section_contents
+
#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-bfin.c
===================================================================
--- branches/binutils/package/bfd/elf32-bfin.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-bfin.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
-/* ADI Blackfin BFD support for 32-bit ELF.
- Copyright 2005 Free Software Foundation, Inc.
+/* ADI Blackfin BFD support for 32-bit ELF.
+ Copyright 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -23,168 +23,9 @@
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/bfin.h"
+#include "elf/dwarf2.h"
+#include "hashtab.h"
-/* Handling expression relocations for blackfin. Blackfin
- will generate relocations in an expression form with a stack.
- A relocation such as P1.H = _typenames-4000000;
- will generate the following relocs at offset 4:
-00000004 R_expst_push _typenames
-00000004 R_expst_const .__constant
-00000004 R_expst_sub .__operator
-00000006 R_huimm16 .__operator
-
- The .__constant and .__operator symbol names are fake.
- Special case is a single relocation
- P1.L = _typenames; generates
-00000002 R_luimm16 _typenames
-
- Thus, if you get a R_luimm16, R_huimm16, R_imm16,
- if the stack is not empty, pop the stack and
- put the value, else do the normal thing
- We will currently assume that the max the stack
- would grow to is 100. . */
-
-#define RELOC_STACK_SIZE 100
-static bfd_vma reloc_stack[RELOC_STACK_SIZE];
-static unsigned int reloc_stack_tos = 0;
-
-#define is_reloc_stack_empty() ((reloc_stack_tos > 0) ? 0 : 1)
-
-static void
-reloc_stack_push (bfd_vma value)
-{
- reloc_stack[reloc_stack_tos++] = value;
-}
-
-static bfd_vma
-reloc_stack_pop (void)
-{
- return reloc_stack[--reloc_stack_tos];
-}
-
-static bfd_vma
-reloc_stack_operate (unsigned int oper)
-{
- bfd_vma value;
- switch (oper)
- {
- case R_add:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] + reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_sub:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] - reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_mult:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] * reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_div:
- {
- if (reloc_stack[reloc_stack_tos - 1] == 0)
- {
- _bfd_abort (__FILE__, __LINE__, _("Division by zero. "));
- }
- else
- {
- value =
- reloc_stack[reloc_stack_tos - 2] / reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- }
- break;
- }
- case R_mod:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] % reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_lshift:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] << reloc_stack[reloc_stack_tos -
- 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_rshift:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] >> reloc_stack[reloc_stack_tos -
- 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_and:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] & reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_or:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] | reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_xor:
- {
- value =
- reloc_stack[reloc_stack_tos - 2] ^ reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_land:
- {
- value = reloc_stack[reloc_stack_tos - 2]
- && reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_lor:
- {
- value = reloc_stack[reloc_stack_tos - 2]
- || reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 2;
- break;
- }
- case R_neg:
- {
- value = -reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos--;
- break;
- }
- case R_comp:
- {
- value = ~reloc_stack[reloc_stack_tos - 1];
- reloc_stack_tos -= 1;
- break;
- }
- default:
- {
- fprintf (stderr, "bfin relocation : Internal bug\n");
- return 0;
- }
- }
-
- reloc_stack_push (value);
-
- return value;
-}
-
/* FUNCTION : bfin_pltpc_reloc
ABSTRACT : TODO : figure out how to handle pltpc relocs. */
static bfd_reloc_status_type
@@ -195,10 +36,10 @@
PTR data ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd ATTRIBUTE_UNUSED,
- char **error_message ATTRIBUTE_UNUSED)
+ char **error_message ATTRIBUTE_UNUSED)
{
bfd_reloc_status_type flag = bfd_reloc_ok;
- return flag;
+ return flag;
}
@@ -221,49 +62,44 @@
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
- if (!is_reloc_stack_empty ())
- relocation = reloc_stack_pop();
+ if (bfd_is_und_section (symbol->section)
+ && (symbol->flags & BSF_WEAK) == 0
+ && !relocatable)
+ return bfd_reloc_undefined;
+
+ if (bfd_is_com_section (symbol->section))
+ relocation = 0;
else
- {
- if (bfd_is_und_section (symbol->section)
- && (symbol->flags & BSF_WEAK) == 0
- && !relocatable)
- return bfd_reloc_undefined;
+ relocation = symbol->value;
- if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
- relocation = symbol->value;
+ output_section = symbol->section->output_section;
- output_section = symbol->section->output_section;
+ if (relocatable)
+ output_base = 0;
+ else
+ output_base = output_section->vma;
- if (relocatable)
- output_base = 0;
- else
- output_base = output_section->vma;
-
- if (!relocatable || !strcmp (symbol->name, symbol->section->name))
- relocation += output_base + symbol->section->output_offset;
-
- if (!relocatable && !strcmp (symbol->name, symbol->section->name))
- relocation += reloc_entry->addend;
- }
-
+ if (!relocatable || !strcmp (symbol->name, symbol->section->name))
+ relocation += output_base + symbol->section->output_offset;
+
+ if (!relocatable && !strcmp (symbol->name, symbol->section->name))
+ relocation += reloc_entry->addend;
+
relocation -= input_section->output_section->vma + input_section->output_offset;
relocation -= reloc_entry->address;
if (howto->complain_on_overflow != complain_overflow_dont)
{
bfd_reloc_status_type status;
- status= bfd_check_overflow (howto->complain_on_overflow,
- howto->bitsize,
- howto->rightshift,
- bfd_arch_bits_per_address(abfd),
- relocation);
+ status = bfd_check_overflow (howto->complain_on_overflow,
+ howto->bitsize,
+ howto->rightshift,
+ bfd_arch_bits_per_address(abfd),
+ relocation);
if (status != bfd_reloc_ok)
return status;
}
-
+
/* if rightshift is 1 and the number odd, return error. */
if (howto->rightshift && (relocation & 0x01))
{
@@ -286,11 +122,11 @@
short x;
/* We are getting reloc_entry->address 2 byte off from
- the start of instruction. Assuming absolute postion
- of the reloc data. But, following code had been written assuming
- reloc address is starting at begining of instruction.
- To compensate that I have increased the value of
- relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
+ the start of instruction. Assuming absolute postion
+ of the reloc data. But, following code had been written assuming
+ reloc address is starting at begining of instruction.
+ To compensate that I have increased the value of
+ relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
relocation += 1;
x = bfd_get_16 (abfd, (bfd_byte *) data + addr - 2);
@@ -305,30 +141,32 @@
}
static bfd_reloc_status_type
-bfin_push_reloc (bfd *abfd ATTRIBUTE_UNUSED,
- arelent *reloc_entry,
- asymbol *symbol,
- PTR data ATTRIBUTE_UNUSED,
- asection *input_section,
- bfd *output_bfd,
- char **error_message ATTRIBUTE_UNUSED)
+bfin_imm16_reloc (bfd *abfd,
+ arelent *reloc_entry,
+ asymbol *symbol,
+ PTR data,
+ asection *input_section,
+ bfd *output_bfd,
+ char **error_message ATTRIBUTE_UNUSED)
{
- bfd_vma relocation;
+ bfd_vma relocation, x;
+ bfd_size_type reloc_addr = reloc_entry->address;
bfd_vma output_base = 0;
+ reloc_howto_type *howto = reloc_entry->howto;
asection *output_section;
bfd_boolean relocatable = (output_bfd != NULL);
+ /* Is the address of the relocation really within the section? */
+ if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
+ return bfd_reloc_outofrange;
+
if (bfd_is_und_section (symbol->section)
&& (symbol->flags & BSF_WEAK) == 0
&& !relocatable)
return bfd_reloc_undefined;
- /* Is the address of the relocation really within the section? */
- if (reloc_entry->address > bfd_get_section_limit(abfd, input_section))
- return bfd_reloc_outofrange;
-
output_section = symbol->section->output_section;
- relocation = symbol->value;
+ relocation = symbol->value;
/* Convert input-section-relative symbol value to absolute. */
if (relocatable)
@@ -336,7 +174,7 @@
else
output_base = output_section->vma;
- if (!relocatable || !strcmp(symbol->name, symbol->section->name))
+ if (!relocatable || !strcmp (symbol->name, symbol->section->name))
relocation += output_base + symbol->section->output_offset;
/* Add in supplied addend. */
@@ -347,107 +185,8 @@
reloc_entry->address += input_section->output_offset;
reloc_entry->addend += symbol->section->output_offset;
}
-
- /* Now that we have the value, push it. */
- reloc_stack_push (relocation);
-
- return bfd_reloc_ok;
-}
-
-static bfd_reloc_status_type
-bfin_oper_reloc (bfd *abfd ATTRIBUTE_UNUSED,
- arelent *reloc_entry,
- asymbol *symbol ATTRIBUTE_UNUSED,
- PTR data ATTRIBUTE_UNUSED,
- asection *input_section,
- bfd *output_bfd,
- char **error_message ATTRIBUTE_UNUSED)
-{
- bfd_boolean relocatable = (output_bfd != NULL);
-
- /* Just call the operation based on the reloc_type. */
- reloc_stack_operate (reloc_entry->howto->type);
-
- if (relocatable)
- reloc_entry->address += input_section->output_offset;
-
- return bfd_reloc_ok;
-}
-
-static bfd_reloc_status_type
-bfin_const_reloc (bfd *abfd ATTRIBUTE_UNUSED,
- arelent *reloc_entry,
- asymbol *symbol ATTRIBUTE_UNUSED,
- PTR data ATTRIBUTE_UNUSED,
- asection *input_section,
- bfd *output_bfd,
- char **error_message ATTRIBUTE_UNUSED)
-{
- bfd_boolean relocatable = (output_bfd != NULL);
-
- /* Push the addend portion of the relocation. */
- reloc_stack_push (reloc_entry->addend);
-
- if (relocatable)
- reloc_entry->address += input_section->output_offset;
-
- return bfd_reloc_ok;
-}
-
-static bfd_reloc_status_type
-bfin_imm16_reloc (bfd *abfd,
- arelent *reloc_entry,
- asymbol *symbol,
- PTR data,
- asection *input_section,
- bfd *output_bfd,
- char **error_message ATTRIBUTE_UNUSED)
-{
- bfd_vma relocation, x;
- bfd_size_type reloc_addr = reloc_entry->address;
- bfd_vma output_base = 0;
- reloc_howto_type *howto = reloc_entry->howto;
- asection *output_section;
- bfd_boolean relocatable = (output_bfd != NULL);
-
- /* Is the address of the relocation really within the section? */
- if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
- return bfd_reloc_outofrange;
-
- if (is_reloc_stack_empty ())
- {
- if (bfd_is_und_section (symbol->section)
- && (symbol->flags & BSF_WEAK) == 0
- && !relocatable)
- return bfd_reloc_undefined;
-
- output_section = symbol->section->output_section;
- relocation = symbol->value;
-
- /* Convert input-section-relative symbol value to absolute. */
- if (relocatable)
- output_base = 0;
- else
- output_base = output_section->vma;
-
- if (!relocatable || !strcmp (symbol->name, symbol->section->name))
- relocation += output_base + symbol->section->output_offset;
-
- /* Add in supplied addend. */
- relocation += reloc_entry->addend;
- }
else
{
- relocation = reloc_stack_pop ();
- }
-
- if (relocatable)
- {
- reloc_entry->address += input_section->output_offset;
- reloc_entry->addend += symbol->section->output_offset;
- }
- else
- {
reloc_entry->addend = 0;
}
@@ -455,15 +194,14 @@
{
bfd_reloc_status_type flag;
flag = bfd_check_overflow (howto->complain_on_overflow,
- howto->bitsize,
- howto->rightshift,
- bfd_arch_bits_per_address(abfd),
- relocation);
+ howto->bitsize,
+ howto->rightshift,
+ bfd_arch_bits_per_address(abfd),
+ relocation);
if (flag != bfd_reloc_ok)
- return flag;
+ return flag;
}
-
/* Here the variable relocation holds the final address of the
symbol we are relocating against, plus any addend. */
@@ -481,7 +219,7 @@
PTR data,
asection *input_section,
bfd *output_bfd,
- char **error_message ATTRIBUTE_UNUSED)
+ char **error_message ATTRIBUTE_UNUSED)
{
bfd_vma relocation, x;
bfd_size_type addr = reloc_entry->address;
@@ -493,39 +231,31 @@
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
- if (is_reloc_stack_empty ())
- {
- if (bfd_is_und_section (symbol->section)
- && (symbol->flags & BSF_WEAK) == 0
- && !relocatable)
- return bfd_reloc_undefined;
+ if (bfd_is_und_section (symbol->section)
+ && (symbol->flags & BSF_WEAK) == 0
+ && !relocatable)
+ return bfd_reloc_undefined;
- output_section = symbol->section->output_section;
- relocation = symbol->value;
- /* Convert input-section-relative symbol value to absolute. */
- if (relocatable)
- output_base = 0;
- else
- output_base = output_section->vma;
-
- if ((symbol->name
- && symbol->section->name
- && !strcmp (symbol->name, symbol->section->name))
- || !relocatable)
- {
- relocation += output_base + symbol->section->output_offset;
- }
+ output_section = symbol->section->output_section;
+ relocation = symbol->value;
+ /* Convert input-section-relative symbol value to absolute. */
+ if (relocatable)
+ output_base = 0;
+ else
+ output_base = output_section->vma;
- relocation += reloc_entry->addend;
- }
- else
+ if ((symbol->name
+ && symbol->section->name
+ && !strcmp (symbol->name, symbol->section->name))
+ || !relocatable)
{
- relocation = reloc_stack_pop();
- relocation += reloc_entry->addend;
+ relocation += output_base + symbol->section->output_offset;
}
+ relocation += reloc_entry->addend;
+
if (relocatable)
- {
+ {
/* This output will be relocatable ... like ld -r. */
reloc_entry->address += input_section->output_offset;
reloc_entry->addend += symbol->section->output_offset;
@@ -540,7 +270,7 @@
x = relocation & 0xFFFF0000;
x >>=16;
bfd_put_16 (abfd, x, (unsigned char *) data + addr + 2);
-
+
x = relocation & 0x0000FFFF;
bfd_put_16 (abfd, x, (unsigned char *) data + addr);
return bfd_reloc_ok;
@@ -568,42 +298,34 @@
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
- if (is_reloc_stack_empty())
- {
- if (bfd_is_und_section (symbol->section)
- && (symbol->flags & BSF_WEAK) == 0
- && !relocatable)
- return bfd_reloc_undefined;
+ if (bfd_is_und_section (symbol->section)
+ && (symbol->flags & BSF_WEAK) == 0
+ && !relocatable)
+ return bfd_reloc_undefined;
- /* Get symbol value. (Common symbols are special.) */
- if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
- relocation = symbol->value;
-
- output_section = symbol->section->output_section;
-
- /* Convert input-section-relative symbol value to absolute. */
- if (relocatable)
- output_base = 0;
- else
- output_base = output_section->vma;
-
- if (!relocatable || !strcmp (symbol->name, symbol->section->name))
- relocation += output_base + symbol->section->output_offset;
+ /* Get symbol value. (Common symbols are special.) */
+ if (bfd_is_com_section (symbol->section))
+ relocation = 0;
+ else
+ relocation = symbol->value;
- if (!relocatable && !strcmp (symbol->name, symbol->section->name))
- {
- /* Add in supplied addend. */
- relocation += reloc_entry->addend;
- }
-
- }
+ output_section = symbol->section->output_section;
+
+ /* Convert input-section-relative symbol value to absolute. */
+ if (relocatable)
+ output_base = 0;
else
+ output_base = output_section->vma;
+
+ if (!relocatable || !strcmp (symbol->name, symbol->section->name))
+ relocation += output_base + symbol->section->output_offset;
+
+ if (!relocatable && !strcmp (symbol->name, symbol->section->name))
{
- relocation = reloc_stack_pop();
+ /* Add in supplied addend. */
+ relocation += reloc_entry->addend;
}
-
+
/* Here the variable relocation holds the final address of the
symbol we are relocating against, plus any addend. */
@@ -625,15 +347,15 @@
{
bfd_reloc_status_type status;
- status = bfd_check_overflow (howto->complain_on_overflow,
+ status = bfd_check_overflow (howto->complain_on_overflow,
howto->bitsize,
- howto->rightshift,
+ howto->rightshift,
bfd_arch_bits_per_address(abfd),
relocation);
if (status != bfd_reloc_ok)
return status;
}
-
+
/* If rightshift is 1 and the number odd, return error. */
if (howto->rightshift && (relocation & 0x01))
{
@@ -647,7 +369,7 @@
relocation <<= (bfd_vma) howto->bitpos;
-#define DOIT(x) \
+#define DOIT(x) \
x = ( (x & ~howto->dst_mask) | (relocation & howto->dst_mask))
/* handle 8 and 16 bit relocations here. */
@@ -673,41 +395,9 @@
return bfd_reloc_other;
}
- return bfd_reloc_ok;
+ return bfd_reloc_ok;
}
-#if 0
-static bfd_reloc_status_type bfin_bfd_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_imm16_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_pcrel24_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_pltpc_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_const_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_oper_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_byte4_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_reloc_status_type bfin_push_reloc
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-
-static bfd_boolean bfin_is_local_label_name
- PARAMS ((bfd *, const char *));
-#endif
-bfd_boolean bfd_bfin_elf32_create_embedded_relocs
- PARAMS ((bfd *, struct bfd_link_info *, asection *, asection *, char **));
-
-
/* HOWTO Table for blackfin.
Blackfin relocations are fairly complicated.
Some of the salient features are
@@ -722,7 +412,7 @@
the relocation stack. . */
#define BFIN_RELOC_MIN 0
-#define BFIN_RELOC_MAX 0x13
+#define BFIN_RELOC_MAX 0x21
#define BFIN_GNUEXT_RELOC_MIN 0x40
#define BFIN_GNUEXT_RELOC_MAX 0x43
#define BFIN_ARELOC_MIN 0xE0
@@ -786,7 +476,7 @@
0, /* src_mask. */
0x000003FF, /* dst_mask. */
TRUE), /* pcrel_offset. */
-
+
HOWTO (R_pcrel12_jump, /* type. */
1, /* rightshift. */
/* the offset is actually 13 bit
@@ -832,7 +522,7 @@
0, /* src_mask. */
0x0000FFFF, /* dst_mask. */
TRUE), /* pcrel_offset. */
-
+
HOWTO (R_huimm16, /* type. */
16, /* rightshift. */
1, /* size (0 = byte, 1 = short, 2 = long). */
@@ -1014,289 +704,229 @@
0, /* src_mask. */
0x000003FF, /* dst_mask. */
FALSE), /* pcrel_offset. */
-};
-static reloc_howto_type bfin_areloc_howto_table [] =
-{
- HOWTO (R_push,
- 0,
- 2,
- 0,
- FALSE,
- 0,
- complain_overflow_dont,
- bfin_push_reloc,
- "R_expst_push",
- FALSE,
- 0,
- 0,
- FALSE),
- HOWTO (R_const,
- 0,
- 2,
- 0,
- FALSE,
- 0,
- complain_overflow_dont,
- bfin_const_reloc,
- "R_expst_const",
- FALSE,
- 0,
- 0,
- FALSE),
+ /* A 18-bit signed operand with the GOT offset for the address of
+ the symbol. */
+ HOWTO (R_BFIN_GOT17M4, /* type */
+ 2, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOT12", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_add,
- 0,
- 0,
- 0,
- FALSE,
- 0,
- complain_overflow_dont,
- bfin_oper_reloc,
- "R_expst_add",
- FALSE,
- 0,
- 0,
- FALSE),
+ /* The upper 16 bits of the GOT offset for the address of the
+ symbol. */
+ HOWTO (R_BFIN_GOTHI, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOTHI", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_sub,
- 0,
- 0,
- 0,
- FALSE,
- 0,
- complain_overflow_dont,
- bfin_oper_reloc,
- "R_expst_sub",
- FALSE,
- 0,
- 0,
- FALSE),
+ /* The lower 16 bits of the GOT offset for the address of the
+ symbol. */
+ HOWTO (R_BFIN_GOTLO, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOTLO", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_mult,
- 0,
- 0,
- 0,
- FALSE,
- 0,
- complain_overflow_dont,
- bfin_oper_reloc,
- "R_expst_mult",
- FALSE,
- 0,
- 0,
- FALSE),
+ /* The 32-bit address of the canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_div, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_div", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* A 12-bit signed operand with the GOT offset for the address of
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOT17M4, /* type */
+ 2, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOT17M4", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_mod, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_mod", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The upper 16 bits of the GOT offset for the address of the
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOTHI, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOTHI", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_lshift, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_lshift", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The lower 16 bits of the GOT offset for the address of the
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOTLO, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOTLO", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_rshift, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_rshift", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The 32-bit address of the canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_VALUE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 64, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_VALUE", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_and, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_and", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* A 12-bit signed operand with the GOT offset for the address of
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOTOFF17M4, /* type */
+ 2, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOTOFF17M4", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_or, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_or", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The upper 16 bits of the GOT offset for the address of the
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOTOFFHI, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOTOFFHI", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_xor, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_xor", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The lower 16 bits of the GOT offset for the address of the
+ canonical descriptor of a function. */
+ HOWTO (R_BFIN_FUNCDESC_GOTOFFLO, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_FUNCDESC_GOTOFFLO", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_land, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_land", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* A 12-bit signed operand with the GOT offset for the address of
+ the symbol. */
+ HOWTO (R_BFIN_GOTOFF17M4, /* type */
+ 2, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOTOFF17M4", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_lor, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_lor", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The upper 16 bits of the GOT offset for the address of the
+ symbol. */
+ HOWTO (R_BFIN_GOTOFFHI, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOTOFFHI", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
- HOWTO (R_len, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_len", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
-
- HOWTO (R_neg, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_neg", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
-
- HOWTO (R_comp, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_comp", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
-
- HOWTO (R_page, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_page", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
-
- HOWTO (R_hwpage, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_hwpage", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
-
- HOWTO (R_addr, /* type. */
- 0, /* rightshift. */
- 0, /* size (0 = byte, 1 = short, 2 = long). */
- 0, /* bitsize. */
- FALSE, /* pc_relative. */
- 0, /* bitpos. */
- complain_overflow_dont, /* complain_on_overflow. */
- bfin_oper_reloc, /* special_function. */
- "R_expst_addr", /* name. */
- FALSE, /* partial_inplace. */
- 0, /* src_mask. */
- 0, /* dst_mask. */
- FALSE), /* pcrel_offset. */
+ /* The lower 16 bits of the GOT offset for the address of the
+ symbol. */
+ HOWTO (R_BFIN_GOTOFFLO, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_BFIN_GOTOFFLO", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
};
static reloc_howto_type bfin_gnuext_howto_table [] =
@@ -1389,29 +1019,24 @@
{ BFD_RELOC_BFIN_11_PCREL, R_pcrel11 },
{ BFD_RELOC_BFIN_GOT, R_got },
{ BFD_RELOC_BFIN_PLTPC, R_pltpc },
+
+ { BFD_RELOC_BFIN_GOT17M4, R_BFIN_GOT17M4 },
+ { BFD_RELOC_BFIN_GOTHI, R_BFIN_GOTHI },
+ { BFD_RELOC_BFIN_GOTLO, R_BFIN_GOTLO },
+ { BFD_RELOC_BFIN_FUNCDESC, R_BFIN_FUNCDESC },
+ { BFD_RELOC_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOT17M4 },
+ { BFD_RELOC_BFIN_FUNCDESC_GOTHI, R_BFIN_FUNCDESC_GOTHI },
+ { BFD_RELOC_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_GOTLO },
+ { BFD_RELOC_BFIN_FUNCDESC_VALUE, R_BFIN_FUNCDESC_VALUE },
+ { BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFF17M4 },
+ { BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI, R_BFIN_FUNCDESC_GOTOFFHI },
+ { BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_FUNCDESC_GOTOFFLO },
+ { BFD_RELOC_BFIN_GOTOFF17M4, R_BFIN_GOTOFF17M4 },
+ { BFD_RELOC_BFIN_GOTOFFHI, R_BFIN_GOTOFFHI },
+ { BFD_RELOC_BFIN_GOTOFFLO, R_BFIN_GOTOFFLO },
+
{ BFD_RELOC_VTABLE_INHERIT, R_BFIN_GNU_VTINHERIT },
{ BFD_RELOC_VTABLE_ENTRY, R_BFIN_GNU_VTENTRY },
- { BFD_ARELOC_BFIN_PUSH, R_push },
- { BFD_ARELOC_BFIN_CONST, R_const },
- { BFD_ARELOC_BFIN_ADD, R_add },
- { BFD_ARELOC_BFIN_SUB, R_sub },
- { BFD_ARELOC_BFIN_MULT, R_mult },
- { BFD_ARELOC_BFIN_DIV, R_div },
- { BFD_ARELOC_BFIN_MOD, R_mod },
- { BFD_ARELOC_BFIN_LSHIFT, R_lshift },
- { BFD_ARELOC_BFIN_RSHIFT, R_rshift },
- { BFD_ARELOC_BFIN_AND, R_and },
- { BFD_ARELOC_BFIN_OR, R_or },
- { BFD_ARELOC_BFIN_XOR, R_xor },
- { BFD_ARELOC_BFIN_LAND, R_land },
- { BFD_ARELOC_BFIN_LOR, R_lor },
- { BFD_ARELOC_BFIN_LEN, R_len },
- { BFD_ARELOC_BFIN_NEG, R_neg },
- { BFD_ARELOC_BFIN_COMP, R_comp },
- { BFD_ARELOC_BFIN_PAGE, R_page },
- { BFD_ARELOC_BFIN_HWPAGE, R_hwpage },
- { BFD_ARELOC_BFIN_ADDR, R_addr }
-
};
@@ -1427,9 +1052,6 @@
if (r_type <= BFIN_RELOC_MAX)
cache_ptr->howto = &bfin_howto_table [r_type];
- else if (r_type >= BFIN_ARELOC_MIN && r_type <= BFIN_ARELOC_MAX)
- cache_ptr->howto = &bfin_areloc_howto_table [r_type - BFIN_ARELOC_MIN];
-
else if (r_type >= BFIN_GNUEXT_RELOC_MIN && r_type <= BFIN_GNUEXT_RELOC_MAX)
cache_ptr->howto = &bfin_gnuext_howto_table [r_type - BFIN_GNUEXT_RELOC_MIN];
@@ -1452,9 +1074,6 @@
if (r_type <= BFIN_RELOC_MAX && r_type > BFIN_RELOC_MIN)
return &bfin_howto_table [r_type];
- else if (r_type >= BFIN_ARELOC_MIN && r_type <= BFIN_ARELOC_MAX)
- return &bfin_areloc_howto_table [r_type - BFIN_ARELOC_MIN];
-
else if (r_type >= BFIN_GNUEXT_RELOC_MIN && r_type <= BFIN_GNUEXT_RELOC_MAX)
return &bfin_gnuext_howto_table [r_type - BFIN_GNUEXT_RELOC_MIN];
@@ -1469,9 +1088,6 @@
if (r_type <= BFIN_RELOC_MAX)
return &bfin_howto_table [r_type];
- else if (r_type >= BFIN_ARELOC_MIN && r_type <= BFIN_ARELOC_MAX)
- return &bfin_areloc_howto_table [r_type - BFIN_ARELOC_MIN];
-
else if (r_type >= BFIN_GNUEXT_RELOC_MIN && r_type <= BFIN_GNUEXT_RELOC_MAX)
return &bfin_gnuext_howto_table [r_type - BFIN_GNUEXT_RELOC_MIN];
@@ -1492,7 +1108,798 @@
return _bfd_elf_is_local_label_name (abfd, label);
}
+extern const bfd_target bfd_elf32_bfinfdpic_vec;
+#define IS_FDPIC(bfd) ((bfd)->xvec == &bfd_elf32_bfinfdpic_vec)
+/* An extension of the elf hash table data structure, containing some
+ additional Blackfin-specific data. */
+struct bfinfdpic_elf_link_hash_table
+{
+ struct elf_link_hash_table elf;
+
+ /* A pointer to the .got section. */
+ asection *sgot;
+ /* A pointer to the .rel.got section. */
+ asection *sgotrel;
+ /* A pointer to the .rofixup section. */
+ asection *sgotfixup;
+ /* A pointer to the .plt section. */
+ asection *splt;
+ /* A pointer to the .rel.plt section. */
+ asection *spltrel;
+ /* GOT base offset. */
+ bfd_vma got0;
+ /* Location of the first non-lazy PLT entry, i.e., the number of
+ bytes taken by lazy PLT entries. */
+ bfd_vma plt0;
+ /* A hash table holding information about which symbols were
+ referenced with which PIC-related relocations. */
+ struct htab *relocs_info;
+};
+
+/* Get the Blackfin ELF linker hash table from a link_info structure. */
+
+#define bfinfdpic_hash_table(info) \
+ ((struct bfinfdpic_elf_link_hash_table *) ((info)->hash))
+
+#define bfinfdpic_got_section(info) \
+ (bfinfdpic_hash_table (info)->sgot)
+#define bfinfdpic_gotrel_section(info) \
+ (bfinfdpic_hash_table (info)->sgotrel)
+#define bfinfdpic_gotfixup_section(info) \
+ (bfinfdpic_hash_table (info)->sgotfixup)
+#define bfinfdpic_plt_section(info) \
+ (bfinfdpic_hash_table (info)->splt)
+#define bfinfdpic_pltrel_section(info) \
+ (bfinfdpic_hash_table (info)->spltrel)
+#define bfinfdpic_relocs_info(info) \
+ (bfinfdpic_hash_table (info)->relocs_info)
+#define bfinfdpic_got_initial_offset(info) \
+ (bfinfdpic_hash_table (info)->got0)
+#define bfinfdpic_plt_initial_offset(info) \
+ (bfinfdpic_hash_table (info)->plt0)
+
+/* Create a Blackfin ELF linker hash table. */
+
+static struct bfd_link_hash_table *
+bfinfdpic_elf_link_hash_table_create (bfd *abfd)
+{
+ struct bfinfdpic_elf_link_hash_table *ret;
+ bfd_size_type amt = sizeof (struct bfinfdpic_elf_link_hash_table);
+
+ ret = bfd_zalloc (abfd, amt);
+ if (ret == NULL)
+ return NULL;
+
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd,
+ _bfd_elf_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
+ {
+ free (ret);
+ return NULL;
+ }
+
+ return &ret->elf.root;
+}
+
+/* Decide whether a reference to a symbol can be resolved locally or
+ not. If the symbol is protected, we want the local address, but
+ its function descriptor must be assigned by the dynamic linker. */
+#define BFINFDPIC_SYM_LOCAL(INFO, H) \
+ (_bfd_elf_symbol_refs_local_p ((H), (INFO), 1) \
+ || ! elf_hash_table (INFO)->dynamic_sections_created)
+#define BFINFDPIC_FUNCDESC_LOCAL(INFO, H) \
+ ((H)->dynindx == -1 || ! elf_hash_table (INFO)->dynamic_sections_created)
+
+/* This structure collects information on what kind of GOT, PLT or
+ function descriptors are required by relocations that reference a
+ certain symbol. */
+struct bfinfdpic_relocs_info
+{
+ /* The index of the symbol, as stored in the relocation r_info, if
+ we have a local symbol; -1 otherwise. */
+ long symndx;
+ union
+ {
+ /* The input bfd in which the symbol is defined, if it's a local
+ symbol. */
+ bfd *abfd;
+ /* If symndx == -1, the hash table entry corresponding to a global
+ symbol (even if it turns out to bind locally, in which case it
+ should ideally be replaced with section's symndx + addend). */
+ struct elf_link_hash_entry *h;
+ } d;
+ /* The addend of the relocation that references the symbol. */
+ bfd_vma addend;
+
+ /* The fields above are used to identify an entry. The fields below
+ contain information on how an entry is used and, later on, which
+ locations it was assigned. */
+ /* The following 2 fields record whether the symbol+addend above was
+ ever referenced with a GOT relocation. The 17M4 suffix indicates a
+ GOT17M4 relocation; hilo is used for GOTLO/GOTHI pairs. */
+ unsigned got17m4:1;
+ unsigned gothilo:1;
+ /* Whether a FUNCDESC relocation references symbol+addend. */
+ unsigned fd:1;
+ /* Whether a FUNCDESC_GOT relocation references symbol+addend. */
+ unsigned fdgot17m4:1;
+ unsigned fdgothilo:1;
+ /* Whether a FUNCDESC_GOTOFF relocation references symbol+addend. */
+ unsigned fdgoff17m4:1;
+ unsigned fdgoffhilo:1;
+ /* Whether symbol+addend is referenced with GOTOFF17M4, GOTOFFLO or
+ GOTOFFHI relocations. The addend doesn't really matter, since we
+ envision that this will only be used to check whether the symbol
+ is mapped to the same segment as the got. */
+ unsigned gotoff:1;
+ /* Whether symbol+addend is referenced by a LABEL24 relocation. */
+ unsigned call:1;
+ /* Whether symbol+addend is referenced by a 32 or FUNCDESC_VALUE
+ relocation. */
+ unsigned sym:1;
+ /* Whether we need a PLT entry for a symbol. Should be implied by
+ something like:
+ (call && symndx == -1 && ! BFINFDPIC_SYM_LOCAL (info, d.h)) */
+ unsigned plt:1;
+ /* Whether a function descriptor should be created in this link unit
+ for symbol+addend. Should be implied by something like:
+ (plt || fdgotoff17m4 || fdgotofflohi
+ || ((fd || fdgot17m4 || fdgothilo)
+ && (symndx != -1 || BFINFDPIC_FUNCDESC_LOCAL (info, d.h)))) */
+ unsigned privfd:1;
+ /* Whether a lazy PLT entry is needed for this symbol+addend.
+ Should be implied by something like:
+ (privfd && symndx == -1 && ! BFINFDPIC_SYM_LOCAL (info, d.h)
+ && ! (info->flags & DF_BIND_NOW)) */
+ unsigned lazyplt:1;
+ /* Whether we've already emitted GOT relocations and PLT entries as
+ needed for this symbol. */
+ unsigned done:1;
+
+ /* The number of R_byte4_data, R_BFIN_FUNCDESC and R_BFIN_FUNCDESC_VALUE
+ relocations referencing the symbol. */
+ unsigned relocs32, relocsfd, relocsfdv;
+
+ /* The number of .rofixups entries and dynamic relocations allocated
+ for this symbol, minus any that might have already been used. */
+ unsigned fixups, dynrelocs;
+
+ /* The offsets of the GOT entries assigned to symbol+addend, to the
+ function descriptor's address, and to a function descriptor,
+ respectively. Should be zero if unassigned. The offsets are
+ counted from the value that will be assigned to the PIC register,
+ not from the beginning of the .got section. */
+ bfd_signed_vma got_entry, fdgot_entry, fd_entry;
+ /* The offsets of the PLT entries assigned to symbol+addend,
+ non-lazy and lazy, respectively. If unassigned, should be
+ (bfd_vma)-1. */
+ bfd_vma plt_entry, lzplt_entry;
+};
+
+/* Compute a hash with the key fields of an bfinfdpic_relocs_info entry. */
+static hashval_t
+bfinfdpic_relocs_info_hash (const void *entry_)
+{
+ const struct bfinfdpic_relocs_info *entry = entry_;
+
+ return (entry->symndx == -1
+ ? (long) entry->d.h->root.root.hash
+ : entry->symndx + (long) entry->d.abfd->id * 257) + entry->addend;
+}
+
+/* Test whether the key fields of two bfinfdpic_relocs_info entries are
+ identical. */
+static int
+bfinfdpic_relocs_info_eq (const void *entry1, const void *entry2)
+{
+ const struct bfinfdpic_relocs_info *e1 = entry1;
+ const struct bfinfdpic_relocs_info *e2 = entry2;
+
+ return e1->symndx == e2->symndx && e1->addend == e2->addend
+ && (e1->symndx == -1 ? e1->d.h == e2->d.h : e1->d.abfd == e2->d.abfd);
+}
+
+/* Find or create an entry in a hash table HT that matches the key
+ fields of the given ENTRY. If it's not found, memory for a new
+ entry is allocated in ABFD's obstack. */
+static struct bfinfdpic_relocs_info *
+bfinfdpic_relocs_info_find (struct htab *ht,
+ bfd *abfd,
+ const struct bfinfdpic_relocs_info *entry,
+ enum insert_option insert)
+{
+ struct bfinfdpic_relocs_info **loc =
+ (struct bfinfdpic_relocs_info **) htab_find_slot (ht, entry, insert);
+
+ if (! loc)
+ return NULL;
+
+ if (*loc)
+ return *loc;
+
+ *loc = bfd_zalloc (abfd, sizeof (**loc));
+
+ if (! *loc)
+ return *loc;
+
+ (*loc)->symndx = entry->symndx;
+ (*loc)->d = entry->d;
+ (*loc)->addend = entry->addend;
+ (*loc)->plt_entry = (bfd_vma)-1;
+ (*loc)->lzplt_entry = (bfd_vma)-1;
+
+ return *loc;
+}
+
+/* Obtain the address of the entry in HT associated with H's symbol +
+ addend, creating a new entry if none existed. ABFD is only used
+ for memory allocation purposes. */
+inline static struct bfinfdpic_relocs_info *
+bfinfdpic_relocs_info_for_global (struct htab *ht,
+ bfd *abfd,
+ struct elf_link_hash_entry *h,
+ bfd_vma addend,
+ enum insert_option insert)
+{
+ struct bfinfdpic_relocs_info entry;
+
+ entry.symndx = -1;
+ entry.d.h = h;
+ entry.addend = addend;
+
+ return bfinfdpic_relocs_info_find (ht, abfd, &entry, insert);
+}
+
+/* Obtain the address of the entry in HT associated with the SYMNDXth
+ local symbol of the input bfd ABFD, plus the addend, creating a new
+ entry if none existed. */
+inline static struct bfinfdpic_relocs_info *
+bfinfdpic_relocs_info_for_local (struct htab *ht,
+ bfd *abfd,
+ long symndx,
+ bfd_vma addend,
+ enum insert_option insert)
+{
+ struct bfinfdpic_relocs_info entry;
+
+ entry.symndx = symndx;
+ entry.d.abfd = abfd;
+ entry.addend = addend;
+
+ return bfinfdpic_relocs_info_find (ht, abfd, &entry, insert);
+}
+
+/* Merge fields set by check_relocs() of two entries that end up being
+ mapped to the same (presumably global) symbol. */
+
+inline static void
+bfinfdpic_pic_merge_early_relocs_info (struct bfinfdpic_relocs_info *e2,
+ struct bfinfdpic_relocs_info const *e1)
+{
+ e2->got17m4 |= e1->got17m4;
+ e2->gothilo |= e1->gothilo;
+ e2->fd |= e1->fd;
+ e2->fdgot17m4 |= e1->fdgot17m4;
+ e2->fdgothilo |= e1->fdgothilo;
+ e2->fdgoff17m4 |= e1->fdgoff17m4;
+ e2->fdgoffhilo |= e1->fdgoffhilo;
+ e2->gotoff |= e1->gotoff;
+ e2->call |= e1->call;
+ e2->sym |= e1->sym;
+}
+
+/* Every block of 65535 lazy PLT entries shares a single call to the
+ resolver, inserted in the 32768th lazy PLT entry (i.e., entry #
+ 32767, counting from 0). All other lazy PLT entries branch to it
+ in a single instruction. */
+
+#define LZPLT_RESOLVER_EXTRA 10
+#define LZPLT_NORMAL_SIZE 6
+#define LZPLT_ENTRIES 1362
+
+#define BFINFDPIC_LZPLT_BLOCK_SIZE ((bfd_vma) LZPLT_NORMAL_SIZE * LZPLT_ENTRIES + LZPLT_RESOLVER_EXTRA)
+#define BFINFDPIC_LZPLT_RESOLV_LOC (LZPLT_NORMAL_SIZE * LZPLT_ENTRIES / 2)
+
+/* Add a dynamic relocation to the SRELOC section. */
+
+inline static bfd_vma
+_bfinfdpic_add_dyn_reloc (bfd *output_bfd, asection *sreloc, bfd_vma offset,
+ int reloc_type, long dynindx, bfd_vma addend,
+ struct bfinfdpic_relocs_info *entry)
+{
+ Elf_Internal_Rela outrel;
+ bfd_vma reloc_offset;
+
+ outrel.r_offset = offset;
+ outrel.r_info = ELF32_R_INFO (dynindx, reloc_type);
+ outrel.r_addend = addend;
+
+ reloc_offset = sreloc->reloc_count * sizeof (Elf32_External_Rel);
+ BFD_ASSERT (reloc_offset < sreloc->size);
+ bfd_elf32_swap_reloc_out (output_bfd, &outrel,
+ sreloc->contents + reloc_offset);
+ sreloc->reloc_count++;
+
+ /* If the entry's index is zero, this relocation was probably to a
+ linkonce section that got discarded. We reserved a dynamic
+ relocation, but it was for another entry than the one we got at
+ the time of emitting the relocation. Unfortunately there's no
+ simple way for us to catch this situation, since the relocation
+ is cleared right before calling relocate_section, at which point
+ we no longer know what the relocation used to point to. */
+ if (entry->symndx)
+ {
+ BFD_ASSERT (entry->dynrelocs > 0);
+ entry->dynrelocs--;
+ }
+
+ return reloc_offset;
+}
+
+/* Add a fixup to the ROFIXUP section. */
+
+static bfd_vma
+_bfinfdpic_add_rofixup (bfd *output_bfd, asection *rofixup, bfd_vma offset,
+ struct bfinfdpic_relocs_info *entry)
+{
+ bfd_vma fixup_offset;
+
+ if (rofixup->flags & SEC_EXCLUDE)
+ return -1;
+
+ fixup_offset = rofixup->reloc_count * 4;
+ if (rofixup->contents)
+ {
+ BFD_ASSERT (fixup_offset < rofixup->size);
+ bfd_put_32 (output_bfd, offset, rofixup->contents + fixup_offset);
+ }
+ rofixup->reloc_count++;
+
+ if (entry && entry->symndx)
+ {
+ /* See discussion about symndx == 0 in _bfinfdpic_add_dyn_reloc
+ above. */
+ BFD_ASSERT (entry->fixups > 0);
+ entry->fixups--;
+ }
+
+ return fixup_offset;
+}
+
+/* Find the segment number in which OSEC, and output section, is
+ located. */
+
+static unsigned
+_bfinfdpic_osec_to_segment (bfd *output_bfd, asection *osec)
+{
+ struct elf_segment_map *m;
+ Elf_Internal_Phdr *p;
+
+ /* Find the segment that contains the output_section. */
+ for (m = elf_tdata (output_bfd)->segment_map,
+ p = elf_tdata (output_bfd)->phdr;
+ m != NULL;
+ m = m->next, p++)
+ {
+ int i;
+
+ for (i = m->count - 1; i >= 0; i--)
+ if (m->sections[i] == osec)
+ break;
+
+ if (i >= 0)
+ break;
+ }
+
+ return p - elf_tdata (output_bfd)->phdr;
+}
+
+inline static bfd_boolean
+_bfinfdpic_osec_readonly_p (bfd *output_bfd, asection *osec)
+{
+ unsigned seg = _bfinfdpic_osec_to_segment (output_bfd, osec);
+
+ return ! (elf_tdata (output_bfd)->phdr[seg].p_flags & PF_W);
+}
+
+/* Generate relocations for GOT entries, function descriptors, and
+ code for PLT and lazy PLT entries. */
+
+inline static bfd_boolean
+_bfinfdpic_emit_got_relocs_plt_entries (struct bfinfdpic_relocs_info *entry,
+ bfd *output_bfd,
+ struct bfd_link_info *info,
+ asection *sec,
+ Elf_Internal_Sym *sym,
+ bfd_vma addend)
+
+{
+ bfd_vma fd_lazy_rel_offset = (bfd_vma)-1;
+ int dynindx = -1;
+
+ if (entry->done)
+ return TRUE;
+ entry->done = 1;
+
+ if (entry->got_entry || entry->fdgot_entry || entry->fd_entry)
+ {
+ /* If the symbol is dynamic, consider it for dynamic
+ relocations, otherwise decay to section + offset. */
+ if (entry->symndx == -1 && entry->d.h->dynindx != -1)
+ dynindx = entry->d.h->dynindx;
+ else
+ {
+ if (sec->output_section
+ && ! bfd_is_abs_section (sec->output_section)
+ && ! bfd_is_und_section (sec->output_section))
+ dynindx = elf_section_data (sec->output_section)->dynindx;
+ else
+ dynindx = 0;
+ }
+ }
+
+ /* Generate relocation for GOT entry pointing to the symbol. */
+ if (entry->got_entry)
+ {
+ int idx = dynindx;
+ bfd_vma ad = addend;
+
+ /* If the symbol is dynamic but binds locally, use
+ section+offset. */
+ if (sec && (entry->symndx != -1
+ || BFINFDPIC_SYM_LOCAL (info, entry->d.h)))
+ {
+ if (entry->symndx == -1)
+ ad += entry->d.h->root.u.def.value;
+ else
+ ad += sym->st_value;
+ ad += sec->output_offset;
+ if (sec->output_section && elf_section_data (sec->output_section))
+ idx = elf_section_data (sec->output_section)->dynindx;
+ else
+ idx = 0;
+ }
+
+ /* If we're linking an executable at a fixed address, we can
+ omit the dynamic relocation as long as the symbol is local to
+ this module. */
+ if (info->executable && !info->pie
+ && (entry->symndx != -1
+ || BFINFDPIC_SYM_LOCAL (info, entry->d.h)))
+ {
+ if (sec)
+ ad += sec->output_section->vma;
+ if (entry->symndx != -1
+ || entry->d.h->root.type != bfd_link_hash_undefweak)
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section (info),
+ bfinfdpic_got_section (info)->output_section
+ ->vma
+ + bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info)
+ + entry->got_entry, entry);
+ }
+ else
+ _bfinfdpic_add_dyn_reloc (output_bfd, bfinfdpic_gotrel_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ bfinfdpic_got_section (info),
+ bfinfdpic_got_initial_offset (info)
+ + entry->got_entry)
+ + bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)->output_offset,
+ R_byte4_data, idx, ad, entry);
+
+ bfd_put_32 (output_bfd, ad,
+ bfinfdpic_got_section (info)->contents
+ + bfinfdpic_got_initial_offset (info)
+ + entry->got_entry);
+ }
+
+ /* Generate relocation for GOT entry pointing to a canonical
+ function descriptor. */
+ if (entry->fdgot_entry)
+ {
+ int reloc, idx;
+ bfd_vma ad = 0;
+
+ if (! (entry->symndx == -1
+ && entry->d.h->root.type == bfd_link_hash_undefweak
+ && BFINFDPIC_SYM_LOCAL (info, entry->d.h)))
+ {
+ /* If the symbol is dynamic and there may be dynamic symbol
+ resolution because we are, or are linked with, a shared
+ library, emit a FUNCDESC relocation such that the dynamic
+ linker will allocate the function descriptor. If the
+ symbol needs a non-local function descriptor but binds
+ locally (e.g., its visibility is protected, emit a
+ dynamic relocation decayed to section+offset. */
+ if (entry->symndx == -1
+ && ! BFINFDPIC_FUNCDESC_LOCAL (info, entry->d.h)
+ && BFINFDPIC_SYM_LOCAL (info, entry->d.h)
+ && !(info->executable && !info->pie))
+ {
+ reloc = R_BFIN_FUNCDESC;
+ idx = elf_section_data (entry->d.h->root.u.def.section
+ ->output_section)->dynindx;
+ ad = entry->d.h->root.u.def.section->output_offset
+ + entry->d.h->root.u.def.value;
+ }
+ else if (entry->symndx == -1
+ && ! BFINFDPIC_FUNCDESC_LOCAL (info, entry->d.h))
+ {
+ reloc = R_BFIN_FUNCDESC;
+ idx = dynindx;
+ ad = addend;
+ if (ad)
+ return FALSE;
+ }
+ else
+ {
+ /* Otherwise, we know we have a private function descriptor,
+ so reference it directly. */
+ if (elf_hash_table (info)->dynamic_sections_created)
+ BFD_ASSERT (entry->privfd);
+ reloc = R_byte4_data;
+ idx = elf_section_data (bfinfdpic_got_section (info)
+ ->output_section)->dynindx;
+ ad = bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info) + entry->fd_entry;
+ }
+
+ /* If there is room for dynamic symbol resolution, emit the
+ dynamic relocation. However, if we're linking an
+ executable at a fixed location, we won't have emitted a
+ dynamic symbol entry for the got section, so idx will be
+ zero, which means we can and should compute the address
+ of the private descriptor ourselves. */
+ if (info->executable && !info->pie
+ && (entry->symndx != -1
+ || BFINFDPIC_FUNCDESC_LOCAL (info, entry->d.h)))
+ {
+ ad += bfinfdpic_got_section (info)->output_section->vma;
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section (info),
+ bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)
+ ->output_offset
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fdgot_entry, entry);
+ }
+ else
+ _bfinfdpic_add_dyn_reloc (output_bfd,
+ bfinfdpic_gotrel_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ bfinfdpic_got_section (info),
+ bfinfdpic_got_initial_offset (info)
+ + entry->fdgot_entry)
+ + bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)
+ ->output_offset,
+ reloc, idx, ad, entry);
+ }
+
+ bfd_put_32 (output_bfd, ad,
+ bfinfdpic_got_section (info)->contents
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fdgot_entry);
+ }
+
+ /* Generate relocation to fill in a private function descriptor in
+ the GOT. */
+ if (entry->fd_entry)
+ {
+ int idx = dynindx;
+ bfd_vma ad = addend;
+ bfd_vma ofst;
+ long lowword, highword;
+
+ /* If the symbol is dynamic but binds locally, use
+ section+offset. */
+ if (sec && (entry->symndx != -1
+ || BFINFDPIC_SYM_LOCAL (info, entry->d.h)))
+ {
+ if (entry->symndx == -1)
+ ad += entry->d.h->root.u.def.value;
+ else
+ ad += sym->st_value;
+ ad += sec->output_offset;
+ if (sec->output_section && elf_section_data (sec->output_section))
+ idx = elf_section_data (sec->output_section)->dynindx;
+ else
+ idx = 0;
+ }
+
+ /* If we're linking an executable at a fixed address, we can
+ omit the dynamic relocation as long as the symbol is local to
+ this module. */
+ if (info->executable && !info->pie
+ && (entry->symndx != -1 || BFINFDPIC_SYM_LOCAL (info, entry->d.h)))
+ {
+ if (sec)
+ ad += sec->output_section->vma;
+ ofst = 0;
+ if (entry->symndx != -1
+ || entry->d.h->root.type != bfd_link_hash_undefweak)
+ {
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section (info),
+ bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)
+ ->output_offset
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fd_entry, entry);
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section (info),
+ bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)
+ ->output_offset
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fd_entry + 4, entry);
+ }
+ }
+ else
+ {
+ ofst
+ = _bfinfdpic_add_dyn_reloc (output_bfd,
+ entry->lazyplt
+ ? bfinfdpic_pltrel_section (info)
+ : bfinfdpic_gotrel_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ bfinfdpic_got_section (info),
+ bfinfdpic_got_initial_offset (info)
+ + entry->fd_entry)
+ + bfinfdpic_got_section (info)
+ ->output_section->vma
+ + bfinfdpic_got_section (info)
+ ->output_offset,
+ R_BFIN_FUNCDESC_VALUE, idx, ad, entry);
+ }
+
+ /* If we've omitted the dynamic relocation, just emit the fixed
+ addresses of the symbol and of the local GOT base offset. */
+ if (info->executable && !info->pie && sec && sec->output_section)
+ {
+ lowword = ad;
+ highword = bfinfdpic_got_section (info)->output_section->vma
+ + bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info);
+ }
+ else if (entry->lazyplt)
+ {
+ if (ad)
+ return FALSE;
+
+ fd_lazy_rel_offset = ofst;
+
+ /* A function descriptor used for lazy or local resolving is
+ initialized such that its high word contains the output
+ section index in which the PLT entries are located, and
+ the low word contains the address of the lazy PLT entry
+ entry point, that must be within the memory region
+ assigned to that section. */
+ lowword = entry->lzplt_entry + 4
+ + bfinfdpic_plt_section (info)->output_offset
+ + bfinfdpic_plt_section (info)->output_section->vma;
+ highword = _bfinfdpic_osec_to_segment
+ (output_bfd, bfinfdpic_plt_section (info)->output_section);
+ }
+ else
+ {
+ /* A function descriptor for a local function gets the index
+ of the section. For a non-local function, it's
+ disregarded. */
+ lowword = ad;
+ if (entry->symndx == -1 && entry->d.h->dynindx != -1
+ && entry->d.h->dynindx == idx)
+ highword = 0;
+ else
+ highword = _bfinfdpic_osec_to_segment
+ (output_bfd, sec->output_section);
+ }
+
+ bfd_put_32 (output_bfd, lowword,
+ bfinfdpic_got_section (info)->contents
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fd_entry);
+ bfd_put_32 (output_bfd, highword,
+ bfinfdpic_got_section (info)->contents
+ + bfinfdpic_got_initial_offset (info)
+ + entry->fd_entry + 4);
+ }
+
+ /* Generate code for the PLT entry. */
+ if (entry->plt_entry != (bfd_vma) -1)
+ {
+ bfd_byte *plt_code = bfinfdpic_plt_section (info)->contents
+ + entry->plt_entry;
+
+ BFD_ASSERT (entry->fd_entry);
+
+ /* Figure out what kind of PLT entry we need, depending on the
+ location of the function descriptor within the GOT. */
+ if (entry->fd_entry >= -(1 << (18 - 1))
+ && entry->fd_entry + 4 < (1 << (18 - 1)))
+ {
+ /* P1 = [P3 + fd_entry]; P3 = [P3 + fd_entry + 4] */
+ bfd_put_32 (output_bfd,
+ 0xe519 | ((entry->fd_entry << 14) & 0xFFFF0000),
+ plt_code);
+ bfd_put_32 (output_bfd,
+ 0xe51b | (((entry->fd_entry + 4) << 14) & 0xFFFF0000),
+ plt_code + 4);
+ plt_code += 8;
+ }
+ else
+ {
+ /* P1.L = fd_entry; P1.H = fd_entry;
+ P3 = P3 + P1;
+ P1 = [P3];
+ P3 = [P3 + 4]; */
+ bfd_put_32 (output_bfd,
+ 0xe109 | (entry->fd_entry << 16),
+ plt_code);
+ bfd_put_32 (output_bfd,
+ 0xe149 | (entry->fd_entry & 0xFFFF0000),
+ plt_code + 4);
+ bfd_put_16 (output_bfd, 0x5ad9, plt_code + 8);
+ bfd_put_16 (output_bfd, 0x9159, plt_code + 10);
+ bfd_put_16 (output_bfd, 0xac5b, plt_code + 12);
+ plt_code += 14;
+ }
+ /* JUMP (P1) */
+ bfd_put_16 (output_bfd, 0x0051, plt_code);
+ }
+
+ /* Generate code for the lazy PLT entry. */
+ if (entry->lzplt_entry != (bfd_vma) -1)
+ {
+ bfd_byte *lzplt_code = bfinfdpic_plt_section (info)->contents
+ + entry->lzplt_entry;
+ bfd_vma resolverStub_addr;
+
+ bfd_put_32 (output_bfd, fd_lazy_rel_offset, lzplt_code);
+ lzplt_code += 4;
+
+ resolverStub_addr = entry->lzplt_entry / BFINFDPIC_LZPLT_BLOCK_SIZE
+ * BFINFDPIC_LZPLT_BLOCK_SIZE + BFINFDPIC_LZPLT_RESOLV_LOC;
+ if (resolverStub_addr >= bfinfdpic_plt_initial_offset (info))
+ resolverStub_addr = bfinfdpic_plt_initial_offset (info) - LZPLT_NORMAL_SIZE - LZPLT_RESOLVER_EXTRA;
+
+ if (entry->lzplt_entry == resolverStub_addr)
+ {
+ /* This is a lazy PLT entry that includes a resolver call.
+ P2 = [P3];
+ R3 = [P3 + 4];
+ JUMP (P2); */
+ bfd_put_32 (output_bfd,
+ 0xa05b915a,
+ lzplt_code);
+ bfd_put_16 (output_bfd, 0x0052, lzplt_code + 4);
+ }
+ else
+ {
+ /* JUMP.S resolverStub */
+ bfd_put_16 (output_bfd,
+ 0x2000
+ | (((resolverStub_addr - entry->lzplt_entry)
+ / 2) & (((bfd_vma)1 << 12) - 1)),
+ lzplt_code);
+ }
+ }
+
+ return TRUE;
+}
+
+
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
table. */
@@ -1656,8 +2063,748 @@
return reloc_class_normal;
}
}
+
+/* Relocate an Blackfin ELF section.
+ The RELOCATE_SECTION function is called by the new ELF backend linker
+ to handle the relocations for a section.
+
+ The relocs are always passed as Rela structures; if the section
+ actually uses Rel structures, the r_addend field will always be
+ zero.
+
+ This function is responsible for adjusting the section contents as
+ necessary, and (if using Rela relocs and generating a relocatable
+ output file) adjusting the reloc addend as necessary.
+
+ This function does not have to worry about setting the reloc
+ address or the reloc symbol index.
+
+ LOCAL_SYMS is a pointer to the swapped in local symbols.
+
+ LOCAL_SECTIONS is an array giving the section in the input file
+ corresponding to the st_shndx field of each local symbol.
+
+ The global hash table entry for the global symbols can be found
+ via elf_sym_hashes (input_bfd).
+
+ When generating relocatable output, this function must handle
+ STB_LOCAL/STT_SECTION symbols specially. The output symbol is
+ going to be the section symbol corresponding to the output
+ section, which means that the addend must be adjusted
+ accordingly. */
+
static bfd_boolean
+bfinfdpic_relocate_section (bfd * output_bfd,
+ struct bfd_link_info *info,
+ bfd * input_bfd,
+ asection * input_section,
+ bfd_byte * contents,
+ Elf_Internal_Rela * relocs,
+ Elf_Internal_Sym * local_syms,
+ asection ** local_sections)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ Elf_Internal_Rela *rel;
+ Elf_Internal_Rela *relend;
+ unsigned isec_segment, got_segment, plt_segment,
+ check_segment[2];
+ int silence_segment_error = !(info->shared || info->pie);
+
+ if (info->relocatable)
+ return TRUE;
+
+ symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+ relend = relocs + input_section->reloc_count;
+
+ isec_segment = _bfinfdpic_osec_to_segment (output_bfd,
+ input_section->output_section);
+ if (IS_FDPIC (output_bfd) && bfinfdpic_got_section (info))
+ got_segment = _bfinfdpic_osec_to_segment (output_bfd,
+ bfinfdpic_got_section (info)
+ ->output_section);
+ else
+ got_segment = -1;
+ if (IS_FDPIC (output_bfd) && elf_hash_table (info)->dynamic_sections_created)
+ plt_segment = _bfinfdpic_osec_to_segment (output_bfd,
+ bfinfdpic_plt_section (info)
+ ->output_section);
+ else
+ plt_segment = -1;
+
+ for (rel = relocs; rel < relend; rel ++)
+ {
+ reloc_howto_type *howto;
+ unsigned long r_symndx;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ struct elf_link_hash_entry *h;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+ const char * name = NULL;
+ int r_type;
+ asection *osec;
+ struct bfinfdpic_relocs_info *picrel;
+ bfd_vma orig_addend = rel->r_addend;
+
+ r_type = ELF32_R_TYPE (rel->r_info);
+
+ if (r_type == R_BFIN_GNU_VTINHERIT
+ || r_type == R_BFIN_GNU_VTENTRY)
+ continue;
+
+ /* This is a final link. */
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ howto = bfin_reloc_type_lookup (input_bfd, r_type);
+ if (howto == NULL)
+ {
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ osec = sec = local_sections [r_symndx];
+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+
+ name = bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name);
+ name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
+ }
+ else
+ {
+ h = sym_hashes [r_symndx - symtab_hdr->sh_info];
+
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+
+ name = h->root.root.string;
+
+ if ((h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak)
+ && ! BFINFDPIC_SYM_LOCAL (info, h))
+ {
+ sec = NULL;
+ relocation = 0;
+ }
+ else
+ if (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak)
+ {
+ sec = h->root.u.def.section;
+ relocation = (h->root.u.def.value
+ + sec->output_section->vma
+ + sec->output_offset);
+ }
+ else if (h->root.type == bfd_link_hash_undefweak)
+ {
+ relocation = 0;
+ }
+ else if (info->unresolved_syms_in_objects == RM_IGNORE
+ && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
+ relocation = 0;
+ else
+ {
+ if (! ((*info->callbacks->undefined_symbol)
+ (info, h->root.root.string, input_bfd,
+ input_section, rel->r_offset,
+ (info->unresolved_syms_in_objects == RM_GENERATE_ERROR
+ || ELF_ST_VISIBILITY (h->other)))))
+ return FALSE;
+ relocation = 0;
+ }
+ osec = sec;
+ }
+
+ switch (r_type)
+ {
+ case R_pcrel24:
+ case R_pcrel24_jump_l:
+ case R_byte4_data:
+ if (! IS_FDPIC (output_bfd))
+ goto non_fdpic;
+
+ case R_BFIN_GOT17M4:
+ case R_BFIN_GOTHI:
+ case R_BFIN_GOTLO:
+ case R_BFIN_FUNCDESC_GOT17M4:
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTLO:
+ case R_BFIN_GOTOFF17M4:
+ case R_BFIN_GOTOFFHI:
+ case R_BFIN_GOTOFFLO:
+ case R_BFIN_FUNCDESC_GOTOFF17M4:
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ case R_BFIN_FUNCDESC:
+ case R_BFIN_FUNCDESC_VALUE:
+ if (h != NULL)
+ picrel = bfinfdpic_relocs_info_for_global (bfinfdpic_relocs_info
+ (info), input_bfd, h,
+ orig_addend, INSERT);
+ else
+ /* In order to find the entry we created before, we must
+ use the original addend, not the one that may have been
+ modified by _bfd_elf_rela_local_sym(). */
+ picrel = bfinfdpic_relocs_info_for_local (bfinfdpic_relocs_info
+ (info), input_bfd, r_symndx,
+ orig_addend, INSERT);
+ if (! picrel)
+ return FALSE;
+
+ if (!_bfinfdpic_emit_got_relocs_plt_entries (picrel, output_bfd, info,
+ osec, sym,
+ rel->r_addend))
+ {
+ (*_bfd_error_handler)
+ (_("%B: relocation at `%A+0x%x' references symbol `%s' with nonzero addend"),
+ input_bfd, input_section, rel->r_offset, name);
+ return FALSE;
+
+ }
+
+ break;
+
+ default:
+ non_fdpic:
+ picrel = NULL;
+ if (h && ! BFINFDPIC_SYM_LOCAL (info, h))
+ {
+ info->callbacks->warning
+ (info, _("relocation references symbol not defined in the module"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ break;
+ }
+
+ switch (r_type)
+ {
+ case R_pcrel24:
+ case R_pcrel24_jump_l:
+ check_segment[0] = isec_segment;
+ if (! IS_FDPIC (output_bfd))
+ check_segment[1] = isec_segment;
+ else if (picrel->plt)
+ {
+ relocation = bfinfdpic_plt_section (info)->output_section->vma
+ + bfinfdpic_plt_section (info)->output_offset
+ + picrel->plt_entry;
+ check_segment[1] = plt_segment;
+ }
+ /* We don't want to warn on calls to undefined weak symbols,
+ as calls to them must be protected by non-NULL tests
+ anyway, and unprotected calls would invoke undefined
+ behavior. */
+ else if (picrel->symndx == -1
+ && picrel->d.h->root.type == bfd_link_hash_undefweak)
+ check_segment[1] = check_segment[0];
+ else
+ check_segment[1] = sec
+ ? _bfinfdpic_osec_to_segment (output_bfd, sec->output_section)
+ : (unsigned)-1;
+ break;
+
+ case R_BFIN_GOT17M4:
+ case R_BFIN_GOTHI:
+ case R_BFIN_GOTLO:
+ relocation = picrel->got_entry;
+ check_segment[0] = check_segment[1] = got_segment;
+ break;
+
+ case R_BFIN_FUNCDESC_GOT17M4:
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTLO:
+ relocation = picrel->fdgot_entry;
+ check_segment[0] = check_segment[1] = got_segment;
+ break;
+
+ case R_BFIN_GOTOFFHI:
+ case R_BFIN_GOTOFF17M4:
+ case R_BFIN_GOTOFFLO:
+ relocation -= bfinfdpic_got_section (info)->output_section->vma
+ + bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info);
+ check_segment[0] = got_segment;
+ check_segment[1] = sec
+ ? _bfinfdpic_osec_to_segment (output_bfd, sec->output_section)
+ : (unsigned)-1;
+ break;
+
+ case R_BFIN_FUNCDESC_GOTOFF17M4:
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ relocation = picrel->fd_entry;
+ check_segment[0] = check_segment[1] = got_segment;
+ break;
+
+ case R_BFIN_FUNCDESC:
+ {
+ int dynindx;
+ bfd_vma addend = rel->r_addend;
+
+ if (! (h && h->root.type == bfd_link_hash_undefweak
+ && BFINFDPIC_SYM_LOCAL (info, h)))
+ {
+ /* If the symbol is dynamic and there may be dynamic
+ symbol resolution because we are or are linked with a
+ shared library, emit a FUNCDESC relocation such that
+ the dynamic linker will allocate the function
+ descriptor. If the symbol needs a non-local function
+ descriptor but binds locally (e.g., its visibility is
+ protected, emit a dynamic relocation decayed to
+ section+offset. */
+ if (h && ! BFINFDPIC_FUNCDESC_LOCAL (info, h)
+ && BFINFDPIC_SYM_LOCAL (info, h)
+ && !(info->executable && !info->pie))
+ {
+ dynindx = elf_section_data (h->root.u.def.section
+ ->output_section)->dynindx;
+ addend += h->root.u.def.section->output_offset
+ + h->root.u.def.value;
+ }
+ else if (h && ! BFINFDPIC_FUNCDESC_LOCAL (info, h))
+ {
+ if (addend)
+ {
+ info->callbacks->warning
+ (info, _("R_BFIN_FUNCDESC references dynamic symbol with nonzero addend"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ dynindx = h->dynindx;
+ }
+ else
+ {
+ /* Otherwise, we know we have a private function
+ descriptor, so reference it directly. */
+ BFD_ASSERT (picrel->privfd);
+ r_type = R_byte4_data;
+ dynindx = elf_section_data (bfinfdpic_got_section (info)
+ ->output_section)->dynindx;
+ addend = bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info)
+ + picrel->fd_entry;
+ }
+
+ /* If there is room for dynamic symbol resolution, emit
+ the dynamic relocation. However, if we're linking an
+ executable at a fixed location, we won't have emitted a
+ dynamic symbol entry for the got section, so idx will
+ be zero, which means we can and should compute the
+ address of the private descriptor ourselves. */
+ if (info->executable && !info->pie
+ && (!h || BFINFDPIC_FUNCDESC_LOCAL (info, h)))
+ {
+ addend += bfinfdpic_got_section (info)->output_section->vma;
+ if ((bfd_get_section_flags (output_bfd,
+ input_section->output_section)
+ & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD))
+ {
+ if (_bfinfdpic_osec_readonly_p (output_bfd,
+ input_section
+ ->output_section))
+ {
+ info->callbacks->warning
+ (info,
+ _("cannot emit fixups in read-only section"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section
+ (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ input_section, rel->r_offset)
+ + input_section
+ ->output_section->vma
+ + input_section->output_offset,
+ picrel);
+ }
+ }
+ else if ((bfd_get_section_flags (output_bfd,
+ input_section->output_section)
+ & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD))
+ {
+ if (_bfinfdpic_osec_readonly_p (output_bfd,
+ input_section
+ ->output_section))
+ {
+ info->callbacks->warning
+ (info,
+ _("cannot emit dynamic relocations in read-only section"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ _bfinfdpic_add_dyn_reloc (output_bfd,
+ bfinfdpic_gotrel_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ input_section, rel->r_offset)
+ + input_section
+ ->output_section->vma
+ + input_section->output_offset,
+ r_type, dynindx, addend, picrel);
+ }
+ else
+ addend += bfinfdpic_got_section (info)->output_section->vma;
+ }
+
+ /* We want the addend in-place because dynamic
+ relocations are REL. Setting relocation to it should
+ arrange for it to be installed. */
+ relocation = addend - rel->r_addend;
+ }
+ check_segment[0] = check_segment[1] = got_segment;
+ break;
+
+ case R_byte4_data:
+ if (! IS_FDPIC (output_bfd))
+ {
+ check_segment[0] = check_segment[1] = -1;
+ break;
+ }
+ /* Fall through. */
+ case R_BFIN_FUNCDESC_VALUE:
+ {
+ int dynindx;
+ bfd_vma addend = rel->r_addend;
+
+ /* If the symbol is dynamic but binds locally, use
+ section+offset. */
+ if (h && ! BFINFDPIC_SYM_LOCAL (info, h))
+ {
+ if (addend && r_type == R_BFIN_FUNCDESC_VALUE)
+ {
+ info->callbacks->warning
+ (info, _("R_BFIN_FUNCDESC_VALUE references dynamic symbol with nonzero addend"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ dynindx = h->dynindx;
+ }
+ else
+ {
+ if (h)
+ addend += h->root.u.def.value;
+ else
+ addend += sym->st_value;
+ if (osec)
+ addend += osec->output_offset;
+ if (osec && osec->output_section
+ && ! bfd_is_abs_section (osec->output_section)
+ && ! bfd_is_und_section (osec->output_section))
+ dynindx = elf_section_data (osec->output_section)->dynindx;
+ else
+ dynindx = 0;
+ }
+
+ /* If we're linking an executable at a fixed address, we
+ can omit the dynamic relocation as long as the symbol
+ is defined in the current link unit (which is implied
+ by its output section not being NULL). */
+ if (info->executable && !info->pie
+ && (!h || BFINFDPIC_SYM_LOCAL (info, h)))
+ {
+ if (osec)
+ addend += osec->output_section->vma;
+ if (IS_FDPIC (input_bfd)
+ && (bfd_get_section_flags (output_bfd,
+ input_section->output_section)
+ & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD))
+ {
+ if (_bfinfdpic_osec_readonly_p (output_bfd,
+ input_section
+ ->output_section))
+ {
+ info->callbacks->warning
+ (info,
+ _("cannot emit fixups in read-only section"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ if (!h || h->root.type != bfd_link_hash_undefweak)
+ {
+ _bfinfdpic_add_rofixup (output_bfd,
+ bfinfdpic_gotfixup_section
+ (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ input_section, rel->r_offset)
+ + input_section
+ ->output_section->vma
+ + input_section->output_offset,
+ picrel);
+ if (r_type == R_BFIN_FUNCDESC_VALUE)
+ _bfinfdpic_add_rofixup
+ (output_bfd,
+ bfinfdpic_gotfixup_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ input_section, rel->r_offset)
+ + input_section->output_section->vma
+ + input_section->output_offset + 4, picrel);
+ }
+ }
+ }
+ else
+ {
+ if ((bfd_get_section_flags (output_bfd,
+ input_section->output_section)
+ & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD))
+ {
+ if (_bfinfdpic_osec_readonly_p (output_bfd,
+ input_section
+ ->output_section))
+ {
+ info->callbacks->warning
+ (info,
+ _("cannot emit dynamic relocations in read-only section"),
+ name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ _bfinfdpic_add_dyn_reloc (output_bfd,
+ bfinfdpic_gotrel_section (info),
+ _bfd_elf_section_offset
+ (output_bfd, info,
+ input_section, rel->r_offset)
+ + input_section
+ ->output_section->vma
+ + input_section->output_offset,
+ r_type, dynindx, addend, picrel);
+ }
+ else if (osec)
+ addend += osec->output_section->vma;
+ /* We want the addend in-place because dynamic
+ relocations are REL. Setting relocation to it
+ should arrange for it to be installed. */
+ relocation = addend - rel->r_addend;
+ }
+
+ if (r_type == R_BFIN_FUNCDESC_VALUE)
+ {
+ /* If we've omitted the dynamic relocation, just emit
+ the fixed addresses of the symbol and of the local
+ GOT base offset. */
+ if (info->executable && !info->pie
+ && (!h || BFINFDPIC_SYM_LOCAL (info, h)))
+ bfd_put_32 (output_bfd,
+ bfinfdpic_got_section (info)->output_section->vma
+ + bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info),
+ contents + rel->r_offset + 4);
+ else
+ /* A function descriptor used for lazy or local
+ resolving is initialized such that its high word
+ contains the output section index in which the
+ PLT entries are located, and the low word
+ contains the offset of the lazy PLT entry entry
+ point into that section. */
+ bfd_put_32 (output_bfd,
+ h && ! BFINFDPIC_SYM_LOCAL (info, h)
+ ? 0
+ : _bfinfdpic_osec_to_segment (output_bfd,
+ sec
+ ->output_section),
+ contents + rel->r_offset + 4);
+ }
+ }
+ check_segment[0] = check_segment[1] = got_segment;
+ break;
+
+ default:
+ check_segment[0] = isec_segment;
+ check_segment[1] = sec
+ ? _bfinfdpic_osec_to_segment (output_bfd, sec->output_section)
+ : (unsigned)-1;
+ break;
+ }
+
+ if (check_segment[0] != check_segment[1] && IS_FDPIC (output_bfd))
+ {
+#if 1 /* If you take this out, remove the #error from fdpic-static-6.d
+ in the ld testsuite. */
+ /* This helps catch problems in GCC while we can't do more
+ than static linking. The idea is to test whether the
+ input file basename is crt0.o only once. */
+ if (silence_segment_error == 1)
+ silence_segment_error =
+ (strlen (input_bfd->filename) == 6
+ && strcmp (input_bfd->filename, "crt0.o") == 0)
+ || (strlen (input_bfd->filename) > 6
+ && strcmp (input_bfd->filename
+ + strlen (input_bfd->filename) - 7,
+ "/crt0.o") == 0)
+ ? -1 : 0;
+#endif
+ if (!silence_segment_error
+ /* We don't want duplicate errors for undefined
+ symbols. */
+ && !(picrel && picrel->symndx == -1
+ && picrel->d.h->root.type == bfd_link_hash_undefined))
+ info->callbacks->warning
+ (info,
+ (info->shared || info->pie)
+ ? _("relocations between different segments are not supported")
+ : _("warning: relocation references a different segment"),
+ name, input_bfd, input_section, rel->r_offset);
+ if (!silence_segment_error && (info->shared || info->pie))
+ return FALSE;
+ elf_elfheader (output_bfd)->e_flags |= EF_BFIN_PIC;
+ }
+
+ switch (r_type)
+ {
+ case R_BFIN_GOTOFFHI:
+ /* We need the addend to be applied before we shift the
+ value right. */
+ relocation += rel->r_addend;
+ /* Fall through. */
+ case R_BFIN_GOTHI:
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ relocation >>= 16;
+ /* Fall through. */
+
+ case R_BFIN_GOTLO:
+ case R_BFIN_FUNCDESC_GOTLO:
+ case R_BFIN_GOTOFFLO:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ relocation &= 0xffff;
+ break;
+
+ default:
+ break;
+ }
+
+ switch (r_type)
+ {
+ case R_pcrel24:
+ case R_pcrel24_jump_l:
+ if (! IS_FDPIC (output_bfd) || ! picrel->plt)
+ break;
+ /* Fall through. */
+
+ /* When referencing a GOT entry, a function descriptor or a
+ PLT, we don't want the addend to apply to the reference,
+ but rather to the referenced symbol. The actual entry
+ will have already been created taking the addend into
+ account, so cancel it out here. */
+ case R_BFIN_GOT17M4:
+ case R_BFIN_GOTHI:
+ case R_BFIN_GOTLO:
+ case R_BFIN_FUNCDESC_GOT17M4:
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTLO:
+ case R_BFIN_FUNCDESC_GOTOFF17M4:
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ /* Note that we only want GOTOFFHI, not GOTOFFLO or GOTOFF17M4
+ here, since we do want to apply the addend to the others.
+ Note that we've applied the addend to GOTOFFHI before we
+ shifted it right. */
+ case R_BFIN_GOTOFFHI:
+ relocation -= rel->r_addend;
+ break;
+
+ default:
+ break;
+ }
+
+ if (r_type == R_pcrel24
+ || r_type == R_pcrel24_jump_l)
+ {
+ bfd_vma x;
+ bfd_vma address = rel->r_offset;
+
+ relocation += rel->r_addend;
+
+ /* Perform usual pc-relative correction. */
+ relocation -= input_section->output_section->vma + input_section->output_offset;
+ relocation -= address;
+
+ /* We are getting reloc_entry->address 2 byte off from
+ the start of instruction. Assuming absolute postion
+ of the reloc data. But, following code had been written assuming
+ reloc address is starting at begining of instruction.
+ To compensate that I have increased the value of
+ relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
+
+ relocation += 2;
+ address -= 2;
+
+ relocation >>= 1;
+
+ x = bfd_get_16 (input_bfd, contents + address);
+ x = (x & 0xff00) | ((relocation >> 16) & 0xff);
+ bfd_put_16 (input_bfd, x, contents + address);
+
+ x = bfd_get_16 (input_bfd, contents + address + 2);
+ x = relocation & 0xFFFF;
+ bfd_put_16 (input_bfd, x, contents + address + 2);
+ r = bfd_reloc_ok;
+ }
+ else
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+
+ if (r != bfd_reloc_ok)
+ {
+ const char * msg = (const char *) NULL;
+
+ switch (r)
+ {
+ case bfd_reloc_overflow:
+ r = info->callbacks->reloc_overflow
+ (info, (h ? &h->root : NULL), name, howto->name,
+ (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
+ break;
+
+ case bfd_reloc_undefined:
+ r = info->callbacks->undefined_symbol
+ (info, name, input_bfd, input_section, rel->r_offset, TRUE);
+ break;
+
+ case bfd_reloc_outofrange:
+ msg = _("internal error: out of range error");
+ break;
+
+ case bfd_reloc_notsupported:
+ msg = _("internal error: unsupported relocation error");
+ break;
+
+ case bfd_reloc_dangerous:
+ msg = _("internal error: dangerous relocation");
+ break;
+
+ default:
+ msg = _("internal error: unknown error");
+ break;
+ }
+
+ if (msg)
+ r = info->callbacks->warning
+ (info, msg, name, input_bfd, input_section, rel->r_offset);
+
+ if (! r)
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+static bfd_boolean
bfin_relocate_section (bfd * output_bfd,
struct bfd_link_info *info,
bfd * input_bfd,
@@ -1735,64 +2882,16 @@
}
else
{
- h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
- if (!
- (!strcmp (h->root.root.string, ".__constant")
- || !strcmp (h->root.root.string, ".__operator")))
- {
- bfd_boolean warned;
- h = NULL;
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
- unresolved_reloc, warned);
-
- }
+ bfd_boolean warned;
+ h = NULL;
+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+ r_symndx, symtab_hdr, sym_hashes,
+ h, sec, relocation,
+ unresolved_reloc, warned);
}
address = rel->r_offset;
- /* First, get stack relocs out of the way. */
- switch (r_type)
- {
- case R_push:
- reloc_stack_push (relocation + rel->r_addend);
- r = bfd_reloc_ok;
- goto done_reloc;
- case R_const:
- reloc_stack_push (rel->r_addend);
- r = bfd_reloc_ok;
- goto done_reloc;
- case R_add:
- case R_sub:
- case R_mult:
- case R_div:
- case R_mod:
- case R_lshift:
- case R_rshift:
- case R_neg:
- case R_and:
- case R_or:
- case R_xor:
- case R_land:
- case R_lor:
- case R_comp:
- case R_page:
- case R_hwpage:
- reloc_stack_operate (r_type);
- r = bfd_reloc_ok;
- goto done_reloc;
- default:
- if (!is_reloc_stack_empty())
- relocation = reloc_stack_pop ();
- break;
- }
-
/* Then, process normally. */
switch (r_type)
{
@@ -1917,10 +3016,10 @@
/* We are getting reloc_entry->address 2 byte off from
the start of instruction. Assuming absolute postion
- of the reloc data. But, following code had been written assuming
+ of the reloc data. But, following code had been written assuming
reloc address is starting at begining of instruction.
- To compensate that I have increased the value of
- relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
+ To compensate that I have increased the value of
+ relocation by 1 (effectively 2) and used the addr -2 instead of addr. */
relocation += 2;
address -= 2;
@@ -1947,7 +3046,6 @@
break;
}
- done_reloc:
/* Dynamic relocs are not propagated for SEC_DEBUGGING sections
because such sections are not SEC_ALLOC and thus ld.so will
not process them. */
@@ -2040,6 +3138,17 @@
/* Update the got entry reference counts for the section being removed. */
static bfd_boolean
+bfinfdpic_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
+{
+ return TRUE;
+}
+
+/* Update the got entry reference counts for the section being removed. */
+
+static bfd_boolean
bfin_gc_sweep_hook (bfd * abfd,
struct bfd_link_info *info,
asection * sec,
@@ -2107,37 +3216,1511 @@
break;
}
}
+ return TRUE;
+}
+/* We need dynamic symbols for every section, since segments can
+ relocate independently. */
+static bfd_boolean
+_bfinfdpic_link_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info
+ ATTRIBUTE_UNUSED,
+ asection *p ATTRIBUTE_UNUSED)
+{
+ switch (elf_section_data (p)->this_hdr.sh_type)
+ {
+ case SHT_PROGBITS:
+ case SHT_NOBITS:
+ /* If sh_type is yet undecided, assume it could be
+ SHT_PROGBITS/SHT_NOBITS. */
+ case SHT_NULL:
+ return FALSE;
+
+ /* There shouldn't be section relative relocations
+ against any other section. */
+ default:
+ return TRUE;
+ }
+}
+
+/* Create a .got section, as well as its additional info field. This
+ is almost entirely copied from
+ elflink.c:_bfd_elf_create_got_section(). */
+
+static bfd_boolean
+_bfin_create_got_section (bfd *abfd, struct bfd_link_info *info)
+{
+ flagword flags, pltflags;
+ asection *s;
+ struct elf_link_hash_entry *h;
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+ int ptralign;
+ int offset;
+
+ /* This function may be called more than once. */
+ s = bfd_get_section_by_name (abfd, ".got");
+ if (s != NULL && (s->flags & SEC_LINKER_CREATED) != 0)
+ return TRUE;
+
+ /* Machine specific: although pointers are 32-bits wide, we want the
+ GOT to be aligned to a 64-bit boundary, such that function
+ descriptors in it can be accessed with 64-bit loads and
+ stores. */
+ ptralign = 3;
+
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED);
+ pltflags = flags;
+
+ s = bfd_make_section_with_flags (abfd, ".got", flags);
+ if (s == NULL
+ || !bfd_set_section_alignment (abfd, s, ptralign))
+ return FALSE;
+
+ if (bed->want_got_plt)
+ {
+ s = bfd_make_section_with_flags (abfd, ".got.plt", flags);
+ if (s == NULL
+ || !bfd_set_section_alignment (abfd, s, ptralign))
+ return FALSE;
+ }
+
+ if (bed->want_got_sym)
+ {
+ /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
+ (or .got.plt) section. We don't do this in the linker script
+ because we don't want to define the symbol if we are not creating
+ a global offset table. */
+ h = _bfd_elf_define_linkage_sym (abfd, info, s, "_GLOBAL_OFFSET_TABLE_");
+ elf_hash_table (info)->hgot = h;
+ if (h == NULL)
+ return FALSE;
+
+ /* Machine-specific: we want the symbol for executables as
+ well. */
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+
+ /* The first bit of the global offset table is the header. */
+ s->size += bed->got_header_size;
+
+ /* This is the machine-specific part. Create and initialize section
+ data for the got. */
+ if (IS_FDPIC (abfd))
+ {
+ bfinfdpic_got_section (info) = s;
+ bfinfdpic_relocs_info (info) = htab_try_create (1,
+ bfinfdpic_relocs_info_hash,
+ bfinfdpic_relocs_info_eq,
+ (htab_del) NULL);
+ if (! bfinfdpic_relocs_info (info))
+ return FALSE;
+
+ s = bfd_make_section_with_flags (abfd, ".rel.got",
+ (flags | SEC_READONLY));
+ if (s == NULL
+ || ! bfd_set_section_alignment (abfd, s, 2))
+ return FALSE;
+
+ bfinfdpic_gotrel_section (info) = s;
+
+ /* Machine-specific. */
+ s = bfd_make_section_with_flags (abfd, ".rofixup",
+ (flags | SEC_READONLY));
+ if (s == NULL
+ || ! bfd_set_section_alignment (abfd, s, 2))
+ return FALSE;
+
+ bfinfdpic_gotfixup_section (info) = s;
+ offset = -2048;
+ flags = BSF_GLOBAL;
+ }
+ else
+ {
+ offset = 2048;
+ flags = BSF_GLOBAL | BSF_WEAK;
+ }
+
return TRUE;
}
+/* Make sure the got and plt sections exist, and that our pointers in
+ the link hash table point to them. */
-/* Merge backend specific data from an object file to the output
- object file when linking. */
static bfd_boolean
-elf32_bfin_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+elf32_bfinfdpic_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
{
- flagword out_flags;
- flagword in_flags;
+ /* This is mostly copied from
+ elflink.c:_bfd_elf_create_dynamic_sections(). */
+ flagword flags, pltflags;
+ asection *s;
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
+ /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
+ .rel[a].bss sections. */
+
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED);
+
+ pltflags = flags;
+ pltflags |= SEC_CODE;
+ if (bed->plt_not_loaded)
+ pltflags &= ~ (SEC_CODE | SEC_LOAD | SEC_HAS_CONTENTS);
+ if (bed->plt_readonly)
+ pltflags |= SEC_READONLY;
+
+ s = bfd_make_section (abfd, ".plt");
+ if (s == NULL
+ || ! bfd_set_section_flags (abfd, s, pltflags)
+ || ! bfd_set_section_alignment (abfd, s, bed->plt_alignment))
+ return FALSE;
+ /* Blackfin-specific: remember it. */
+ bfinfdpic_plt_section (info) = s;
+
+ if (bed->want_plt_sym)
+ {
+ /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
+ .plt section. */
+ struct elf_link_hash_entry *h;
+ struct bfd_link_hash_entry *bh = NULL;
+
+ if (! (_bfd_generic_link_add_one_symbol
+ (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s, 0, NULL,
+ FALSE, get_elf_backend_data (abfd)->collect, &bh)))
+ return FALSE;
+ h = (struct elf_link_hash_entry *) bh;
+ h->def_regular = 1;
+ h->type = STT_OBJECT;
+
+ if (! info->executable
+ && ! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+
+ /* Blackfin-specific: we want rel relocations for the plt. */
+ s = bfd_make_section (abfd, ".rel.plt");
+ if (s == NULL
+ || ! bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
+ || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
+ return FALSE;
+ /* Blackfin-specific: remember it. */
+ bfinfdpic_pltrel_section (info) = s;
+
+ /* Blackfin-specific: we want to create the GOT in the Blackfin way. */
+ if (! _bfin_create_got_section (abfd, info))
+ return FALSE;
+
+ /* Blackfin-specific: make sure we created everything we wanted. */
+ BFD_ASSERT (bfinfdpic_got_section (info) && bfinfdpic_gotrel_section (info)
+ /* && bfinfdpic_gotfixup_section (info) */
+ && bfinfdpic_plt_section (info)
+ && bfinfdpic_pltrel_section (info));
+
+ if (bed->want_dynbss)
+ {
+ /* The .dynbss section is a place to put symbols which are defined
+ by dynamic objects, are referenced by regular objects, and are
+ not functions. We must allocate space for them in the process
+ image and use a R_*_COPY reloc to tell the dynamic linker to
+ initialize them at run time. The linker script puts the .dynbss
+ section into the .bss section of the final image. */
+ s = bfd_make_section (abfd, ".dynbss");
+ if (s == NULL
+ || ! bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
+ return FALSE;
+
+ /* The .rel[a].bss section holds copy relocs. This section is not
+ normally needed. We need to create it here, though, so that the
+ linker will map it to an output section. We can't just create it
+ only if we need it, because we will not know whether we need it
+ until we have seen all the input files, and the first time the
+ main linker code calls BFD after examining all the input files
+ (size_dynamic_sections) the input sections have already been
+ mapped to the output sections. If the section turns out not to
+ be needed, we can discard it later. We will never need this
+ section when generating a shared object, since they do not use
+ copy relocs. */
+ if (! info->shared)
+ {
+ s = bfd_make_section (abfd,
+ (bed->default_use_rela_p
+ ? ".rela.bss" : ".rel.bss"));
+ if (s == NULL
+ || ! bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
+ || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+/* The name of the dynamic interpreter. This is put in the .interp
+ section. */
+
+#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
+
+#define DEFAULT_STACK_SIZE 0x20000
+
+/* This structure is used to collect the number of entries present in
+ each addressable range of the got. */
+struct _bfinfdpic_dynamic_got_info
+{
+ /* Several bits of information about the current link. */
+ struct bfd_link_info *info;
+ /* Total size needed for GOT entries within the 18- or 32-bit
+ ranges. */
+ bfd_vma got17m4, gothilo;
+ /* Total size needed for function descriptor entries within the 18-
+ or 32-bit ranges. */
+ bfd_vma fd17m4, fdhilo;
+ /* Total size needed function descriptor entries referenced in PLT
+ entries, that would be profitable to place in offsets close to
+ the PIC register. */
+ bfd_vma fdplt;
+ /* Total size needed by lazy PLT entries. */
+ bfd_vma lzplt;
+ /* Number of relocations carried over from input object files. */
+ unsigned long relocs;
+ /* Number of fixups introduced by relocations in input object files. */
+ unsigned long fixups;
+};
+
+/* Compute the total GOT size required by each symbol in each range.
+ Symbols may require up to 4 words in the GOT: an entry pointing to
+ the symbol, an entry pointing to its function descriptor, and a
+ private function descriptors taking two words. */
+
+static int
+_bfinfdpic_count_got_plt_entries (void **entryp, void *dinfo_)
+{
+ struct bfinfdpic_relocs_info *entry = *entryp;
+ struct _bfinfdpic_dynamic_got_info *dinfo = dinfo_;
+ unsigned relocs = 0, fixups = 0;
+
+ /* Allocate space for a GOT entry pointing to the symbol. */
+ if (entry->got17m4)
+ dinfo->got17m4 += 4;
+ else if (entry->gothilo)
+ dinfo->gothilo += 4;
+ else
+ entry->relocs32--;
+ entry->relocs32++;
+
+ /* Allocate space for a GOT entry pointing to the function
+ descriptor. */
+ if (entry->fdgot17m4)
+ dinfo->got17m4 += 4;
+ else if (entry->fdgothilo)
+ dinfo->gothilo += 4;
+ else
+ entry->relocsfd--;
+ entry->relocsfd++;
+
+ /* Decide whether we need a PLT entry, a function descriptor in the
+ GOT, and a lazy PLT entry for this symbol. */
+ entry->plt = entry->call
+ && entry->symndx == -1 && ! BFINFDPIC_SYM_LOCAL (dinfo->info, entry->d.h)
+ && elf_hash_table (dinfo->info)->dynamic_sections_created;
+ entry->privfd = entry->plt
+ || entry->fdgoff17m4 || entry->fdgoffhilo
+ || ((entry->fd || entry->fdgot17m4 || entry->fdgothilo)
+ && (entry->symndx != -1
+ || BFINFDPIC_FUNCDESC_LOCAL (dinfo->info, entry->d.h)));
+ entry->lazyplt = entry->privfd
+ && entry->symndx == -1 && ! BFINFDPIC_SYM_LOCAL (dinfo->info, entry->d.h)
+ && ! (dinfo->info->flags & DF_BIND_NOW)
+ && elf_hash_table (dinfo->info)->dynamic_sections_created;
+
+ /* Allocate space for a function descriptor. */
+ if (entry->fdgoff17m4)
+ dinfo->fd17m4 += 8;
+ else if (entry->privfd && entry->plt)
+ dinfo->fdplt += 8;
+ else if (entry->privfd)
+ dinfo->fdhilo += 8;
+ else
+ entry->relocsfdv--;
+ entry->relocsfdv++;
+
+ if (entry->lazyplt)
+ dinfo->lzplt += LZPLT_NORMAL_SIZE;
+
+ if (!dinfo->info->executable || dinfo->info->pie)
+ relocs = entry->relocs32 + entry->relocsfd + entry->relocsfdv;
+ else
+ {
+ if (entry->symndx != -1 || BFINFDPIC_SYM_LOCAL (dinfo->info, entry->d.h))
+ {
+ if (entry->symndx != -1
+ || entry->d.h->root.type != bfd_link_hash_undefweak)
+ fixups += entry->relocs32 + 2 * entry->relocsfdv;
+ }
+ else
+ relocs += entry->relocs32 + entry->relocsfdv;
+
+ if (entry->symndx != -1
+ || BFINFDPIC_FUNCDESC_LOCAL (dinfo->info, entry->d.h))
+ {
+ if (entry->symndx != -1
+ || entry->d.h->root.type != bfd_link_hash_undefweak)
+ fixups += entry->relocsfd;
+ }
+ else
+ relocs += entry->relocsfd;
+ }
+
+ entry->dynrelocs += relocs;
+ entry->fixups += fixups;
+ dinfo->relocs += relocs;
+ dinfo->fixups += fixups;
+
+ return 1;
+}
+
+/* This structure is used to assign offsets to got entries, function
+ descriptors, plt entries and lazy plt entries. */
+
+struct _bfinfdpic_dynamic_got_plt_info
+{
+ /* Summary information collected with _bfinfdpic_count_got_plt_entries. */
+ struct _bfinfdpic_dynamic_got_info g;
+
+ /* For each addressable range, we record a MAX (positive) and MIN
+ (negative) value. CUR is used to assign got entries, and it's
+ incremented from an initial positive value to MAX, then from MIN
+ to FDCUR (unless FDCUR wraps around first). FDCUR is used to
+ assign function descriptors, and it's decreased from an initial
+ non-positive value to MIN, then from MAX down to CUR (unless CUR
+ wraps around first). All of MIN, MAX, CUR and FDCUR always point
+ to even words. ODD, if non-zero, indicates an odd word to be
+ used for the next got entry, otherwise CUR is used and
+ incremented by a pair of words, wrapping around when it reaches
+ MAX. FDCUR is decremented (and wrapped) before the next function
+ descriptor is chosen. FDPLT indicates the number of remaining
+ slots that can be used for function descriptors used only by PLT
+ entries. */
+ struct _bfinfdpic_dynamic_got_alloc_data
+ {
+ bfd_signed_vma max, cur, odd, fdcur, min;
+ bfd_vma fdplt;
+ } got17m4, gothilo;
+};
+
+/* Determine the positive and negative ranges to be used by each
+ offset range in the GOT. FDCUR and CUR, that must be aligned to a
+ double-word boundary, are the minimum (negative) and maximum
+ (positive) GOT offsets already used by previous ranges, except for
+ an ODD entry that may have been left behind. GOT and FD indicate
+ the size of GOT entries and function descriptors that must be
+ placed within the range from -WRAP to WRAP. If there's room left,
+ up to FDPLT bytes should be reserved for additional function
+ descriptors. */
+
+inline static bfd_signed_vma
+_bfinfdpic_compute_got_alloc_data (struct _bfinfdpic_dynamic_got_alloc_data *gad,
+ bfd_signed_vma fdcur,
+ bfd_signed_vma odd,
+ bfd_signed_vma cur,
+ bfd_vma got,
+ bfd_vma fd,
+ bfd_vma fdplt,
+ bfd_vma wrap)
+{
+ bfd_signed_vma wrapmin = -wrap;
+
+ /* Start at the given initial points. */
+ gad->fdcur = fdcur;
+ gad->cur = cur;
+
+ /* If we had an incoming odd word and we have any got entries that
+ are going to use it, consume it, otherwise leave gad->odd at
+ zero. We might force gad->odd to zero and return the incoming
+ odd such that it is used by the next range, but then GOT entries
+ might appear to be out of order and we wouldn't be able to
+ shorten the GOT by one word if it turns out to end with an
+ unpaired GOT entry. */
+ if (odd && got)
+ {
+ gad->odd = odd;
+ got -= 4;
+ odd = 0;
+ }
+ else
+ gad->odd = 0;
+
+ /* If we're left with an unpaired GOT entry, compute its location
+ such that we can return it. Otherwise, if got doesn't require an
+ odd number of words here, either odd was already zero in the
+ block above, or it was set to zero because got was non-zero, or
+ got was already zero. In the latter case, we want the value of
+ odd to carry over to the return statement, so we don't want to
+ reset odd unless the condition below is true. */
+ if (got & 4)
+ {
+ odd = cur + got;
+ got += 4;
+ }
+
+ /* Compute the tentative boundaries of this range. */
+ gad->max = cur + got;
+ gad->min = fdcur - fd;
+ gad->fdplt = 0;
+
+ /* If function descriptors took too much space, wrap some of them
+ around. */
+ if (gad->min < wrapmin)
+ {
+ gad->max += wrapmin - gad->min;
+ gad->min = wrapmin;
+ }
+ /* If there is space left and we have function descriptors
+ referenced in PLT entries that could take advantage of shorter
+ offsets, place them here. */
+ else if (fdplt && gad->min > wrapmin)
+ {
+ bfd_vma fds;
+ if ((bfd_vma) (gad->min - wrapmin) < fdplt)
+ fds = gad->min - wrapmin;
+ else
+ fds = fdplt;
+
+ fdplt -= fds;
+ gad->min -= fds;
+ gad->fdplt += fds;
+ }
+
+ /* If GOT entries took too much space, wrap some of them around.
+ This may well cause gad->min to become lower than wrapmin. This
+ will cause a relocation overflow later on, so we don't have to
+ report it here . */
+ if ((bfd_vma) gad->max > wrap)
+ {
+ gad->min -= gad->max - wrap;
+ gad->max = wrap;
+ }
+ /* If there is more space left, try to place some more function
+ descriptors for PLT entries. */
+ else if (fdplt && (bfd_vma) gad->max < wrap)
+ {
+ bfd_vma fds;
+ if ((bfd_vma) (wrap - gad->max) < fdplt)
+ fds = wrap - gad->max;
+ else
+ fds = fdplt;
+
+ fdplt -= fds;
+ gad->max += fds;
+ gad->fdplt += fds;
+ }
+
+ /* If odd was initially computed as an offset past the wrap point,
+ wrap it around. */
+ if (odd > gad->max)
+ odd = gad->min + odd - gad->max;
+
+ /* _bfinfdpic_get_got_entry() below will always wrap gad->cur if needed
+ before returning, so do it here too. This guarantees that,
+ should cur and fdcur meet at the wrap point, they'll both be
+ equal to min. */
+ if (gad->cur == gad->max)
+ gad->cur = gad->min;
+
+ return odd;
+}
+
+/* Compute the location of the next GOT entry, given the allocation
+ data for a range. */
+
+inline static bfd_signed_vma
+_bfinfdpic_get_got_entry (struct _bfinfdpic_dynamic_got_alloc_data *gad)
+{
+ bfd_signed_vma ret;
+
+ if (gad->odd)
+ {
+ /* If there was an odd word left behind, use it. */
+ ret = gad->odd;
+ gad->odd = 0;
+ }
+ else
+ {
+ /* Otherwise, use the word pointed to by cur, reserve the next
+ as an odd word, and skip to the next pair of words, possibly
+ wrapping around. */
+ ret = gad->cur;
+ gad->odd = gad->cur + 4;
+ gad->cur += 8;
+ if (gad->cur == gad->max)
+ gad->cur = gad->min;
+ }
+
+ return ret;
+}
+
+/* Compute the location of the next function descriptor entry in the
+ GOT, given the allocation data for a range. */
+
+inline static bfd_signed_vma
+_bfinfdpic_get_fd_entry (struct _bfinfdpic_dynamic_got_alloc_data *gad)
+{
+ /* If we're at the bottom, wrap around, and only then allocate the
+ next pair of words. */
+ if (gad->fdcur == gad->min)
+ gad->fdcur = gad->max;
+ return gad->fdcur -= 8;
+}
+
+/* Assign GOT offsets for every GOT entry and function descriptor.
+ Doing everything in a single pass is tricky. */
+
+static int
+_bfinfdpic_assign_got_entries (void **entryp, void *info_)
+{
+ struct bfinfdpic_relocs_info *entry = *entryp;
+ struct _bfinfdpic_dynamic_got_plt_info *dinfo = info_;
+
+ if (entry->got17m4)
+ entry->got_entry = _bfinfdpic_get_got_entry (&dinfo->got17m4);
+ else if (entry->gothilo)
+ entry->got_entry = _bfinfdpic_get_got_entry (&dinfo->gothilo);
+
+ if (entry->fdgot17m4)
+ entry->fdgot_entry = _bfinfdpic_get_got_entry (&dinfo->got17m4);
+ else if (entry->fdgothilo)
+ entry->fdgot_entry = _bfinfdpic_get_got_entry (&dinfo->gothilo);
+
+ if (entry->fdgoff17m4)
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->got17m4);
+ else if (entry->plt && dinfo->got17m4.fdplt)
+ {
+ dinfo->got17m4.fdplt -= 8;
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->got17m4);
+ }
+ else if (entry->plt)
+ {
+ dinfo->gothilo.fdplt -= 8;
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->gothilo);
+ }
+ else if (entry->privfd)
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->gothilo);
+
+ return 1;
+}
+
+/* Assign GOT offsets to private function descriptors used by PLT
+ entries (or referenced by 32-bit offsets), as well as PLT entries
+ and lazy PLT entries. */
+
+static int
+_bfinfdpic_assign_plt_entries (void **entryp, void *info_)
+{
+ struct bfinfdpic_relocs_info *entry = *entryp;
+ struct _bfinfdpic_dynamic_got_plt_info *dinfo = info_;
+
+ /* If this symbol requires a local function descriptor, allocate
+ one. */
+ if (entry->privfd && entry->fd_entry == 0)
+ {
+ if (dinfo->got17m4.fdplt)
+ {
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->got17m4);
+ dinfo->got17m4.fdplt -= 8;
+ }
+ else
+ {
+ BFD_ASSERT (dinfo->gothilo.fdplt);
+ entry->fd_entry = _bfinfdpic_get_fd_entry (&dinfo->gothilo);
+ dinfo->gothilo.fdplt -= 8;
+ }
+ }
+
+ if (entry->plt)
+ {
+ int size;
+
+ /* We use the section's raw size to mark the location of the
+ next PLT entry. */
+ entry->plt_entry = bfinfdpic_plt_section (dinfo->g.info)->size;
+
+ /* Figure out the length of this PLT entry based on the
+ addressing mode we need to reach the function descriptor. */
+ BFD_ASSERT (entry->fd_entry);
+ if (entry->fd_entry >= -(1 << (18 - 1))
+ && entry->fd_entry + 4 < (1 << (18 - 1)))
+ size = 10;
+ else
+ size = 16;
+
+ bfinfdpic_plt_section (dinfo->g.info)->size += size;
+ }
+
+ if (entry->lazyplt)
+ {
+ entry->lzplt_entry = dinfo->g.lzplt;
+ dinfo->g.lzplt += LZPLT_NORMAL_SIZE;
+ /* If this entry is the one that gets the resolver stub, account
+ for the additional instruction. */
+ if (entry->lzplt_entry % BFINFDPIC_LZPLT_BLOCK_SIZE
+ == BFINFDPIC_LZPLT_RESOLV_LOC)
+ dinfo->g.lzplt += LZPLT_RESOLVER_EXTRA;
+ }
+
+ return 1;
+}
+
+/* Follow indirect and warning hash entries so that each got entry
+ points to the final symbol definition. P must point to a pointer
+ to the hash table we're traversing. Since this traversal may
+ modify the hash table, we set this pointer to NULL to indicate
+ we've made a potentially-destructive change to the hash table, so
+ the traversal must be restarted. */
+static int
+_bfinfdpic_resolve_final_relocs_info (void **entryp, void *p)
+{
+ struct bfinfdpic_relocs_info *entry = *entryp;
+ htab_t *htab = p;
+
+ if (entry->symndx == -1)
+ {
+ struct elf_link_hash_entry *h = entry->d.h;
+ struct bfinfdpic_relocs_info *oentry;
+
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *)h->root.u.i.link;
+
+ if (entry->d.h == h)
+ return 1;
+
+ oentry = bfinfdpic_relocs_info_for_global (*htab, 0, h, entry->addend,
+ NO_INSERT);
+
+ if (oentry)
+ {
+ /* Merge the two entries. */
+ bfinfdpic_pic_merge_early_relocs_info (oentry, entry);
+ htab_clear_slot (*htab, entryp);
+ return 1;
+ }
+
+ entry->d.h = h;
+
+ /* If we can't find this entry with the new bfd hash, re-insert
+ it, and get the traversal restarted. */
+ if (! htab_find (*htab, entry))
+ {
+ htab_clear_slot (*htab, entryp);
+ entryp = htab_find_slot (*htab, entry, INSERT);
+ if (! *entryp)
+ *entryp = entry;
+ /* Abort the traversal, since the whole table may have
+ moved, and leave it up to the parent to restart the
+ process. */
+ *(htab_t *)p = NULL;
+ return 0;
+ }
+ }
+
+ return 1;
+}
+
+/* Set the sizes of the dynamic sections. */
+
+static bfd_boolean
+elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ bfd *dynobj;
+ asection *s;
+ struct _bfinfdpic_dynamic_got_plt_info gpinfo;
+ bfd_signed_vma odd;
+ bfd_vma limit;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ BFD_ASSERT (dynobj != NULL);
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Set the contents of the .interp section to the interpreter. */
+ if (info->executable)
+ {
+ s = bfd_get_section_by_name (dynobj, ".interp");
+ BFD_ASSERT (s != NULL);
+ s->size = sizeof ELF_DYNAMIC_INTERPRETER;
+ s->contents = (bfd_byte *) ELF_DYNAMIC_INTERPRETER;
+ }
+ }
+
+ memset (&gpinfo, 0, sizeof (gpinfo));
+ gpinfo.g.info = info;
+
+ for (;;)
+ {
+ htab_t relocs = bfinfdpic_relocs_info (info);
+
+ htab_traverse (relocs, _bfinfdpic_resolve_final_relocs_info, &relocs);
+
+ if (relocs == bfinfdpic_relocs_info (info))
+ break;
+ }
+
+ htab_traverse (bfinfdpic_relocs_info (info), _bfinfdpic_count_got_plt_entries,
+ &gpinfo.g);
+
+ odd = 12;
+ /* Compute the total size taken by entries in the 18-bit range,
+ to tell how many PLT function descriptors we can bring into it
+ without causing it to overflow. */
+ limit = odd + gpinfo.g.got17m4 + gpinfo.g.fd17m4;
+ if (limit < (bfd_vma)1 << 18)
+ limit = ((bfd_vma)1 << 18) - limit;
+ else
+ limit = 0;
+ if (gpinfo.g.fdplt < limit)
+ limit = gpinfo.g.fdplt;
+
+ /* Determine the ranges of GOT offsets that we can use for each
+ range of addressing modes. */
+ odd = _bfinfdpic_compute_got_alloc_data (&gpinfo.got17m4,
+ 0,
+ odd,
+ 16,
+ gpinfo.g.got17m4,
+ gpinfo.g.fd17m4,
+ limit,
+ (bfd_vma)1 << (18-1));
+ odd = _bfinfdpic_compute_got_alloc_data (&gpinfo.gothilo,
+ gpinfo.got17m4.min,
+ odd,
+ gpinfo.got17m4.max,
+ gpinfo.g.gothilo,
+ gpinfo.g.fdhilo,
+ gpinfo.g.fdplt - gpinfo.got17m4.fdplt,
+ (bfd_vma)1 << (32-1));
+
+ /* Now assign (most) GOT offsets. */
+ htab_traverse (bfinfdpic_relocs_info (info), _bfinfdpic_assign_got_entries,
+ &gpinfo);
+
+ bfinfdpic_got_section (info)->size = gpinfo.gothilo.max
+ - gpinfo.gothilo.min
+ /* If an odd word is the last word of the GOT, we don't need this
+ word to be part of the GOT. */
+ - (odd + 4 == gpinfo.gothilo.max ? 4 : 0);
+ if (bfinfdpic_got_section (info)->size == 0)
+ bfinfdpic_got_section (info)->flags |= SEC_EXCLUDE;
+ else if (bfinfdpic_got_section (info)->size == 12
+ && ! elf_hash_table (info)->dynamic_sections_created)
+ {
+ bfinfdpic_got_section (info)->flags |= SEC_EXCLUDE;
+ bfinfdpic_got_section (info)->size = 0;
+ }
+ else
+ {
+ bfinfdpic_got_section (info)->contents =
+ (bfd_byte *) bfd_zalloc (dynobj,
+ bfinfdpic_got_section (info)->size);
+ if (bfinfdpic_got_section (info)->contents == NULL)
+ return FALSE;
+ }
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ /* Subtract the number of lzplt entries, since those will generate
+ relocations in the pltrel section. */
+ bfinfdpic_gotrel_section (info)->size =
+ (gpinfo.g.relocs - gpinfo.g.lzplt / LZPLT_NORMAL_SIZE)
+ * get_elf_backend_data (output_bfd)->s->sizeof_rel;
+ else
+ BFD_ASSERT (gpinfo.g.relocs == 0);
+ if (bfinfdpic_gotrel_section (info)->size == 0)
+ bfinfdpic_gotrel_section (info)->flags |= SEC_EXCLUDE;
+ else
+ {
+ bfinfdpic_gotrel_section (info)->contents =
+ (bfd_byte *) bfd_zalloc (dynobj,
+ bfinfdpic_gotrel_section (info)->size);
+ if (bfinfdpic_gotrel_section (info)->contents == NULL)
+ return FALSE;
+ }
+
+ bfinfdpic_gotfixup_section (info)->size = (gpinfo.g.fixups + 1) * 4;
+ if (bfinfdpic_gotfixup_section (info)->size == 0)
+ bfinfdpic_gotfixup_section (info)->flags |= SEC_EXCLUDE;
+ else
+ {
+ bfinfdpic_gotfixup_section (info)->contents =
+ (bfd_byte *) bfd_zalloc (dynobj,
+ bfinfdpic_gotfixup_section (info)->size);
+ if (bfinfdpic_gotfixup_section (info)->contents == NULL)
+ return FALSE;
+ }
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ bfinfdpic_pltrel_section (info)->size =
+ gpinfo.g.lzplt / LZPLT_NORMAL_SIZE * get_elf_backend_data (output_bfd)->s->sizeof_rel;
+ if (bfinfdpic_pltrel_section (info)->size == 0)
+ bfinfdpic_pltrel_section (info)->flags |= SEC_EXCLUDE;
+ else
+ {
+ bfinfdpic_pltrel_section (info)->contents =
+ (bfd_byte *) bfd_zalloc (dynobj,
+ bfinfdpic_pltrel_section (info)->size);
+ if (bfinfdpic_pltrel_section (info)->contents == NULL)
+ return FALSE;
+ }
+ }
+
+ /* Add 4 bytes for every block of at most 65535 lazy PLT entries,
+ such that there's room for the additional instruction needed to
+ call the resolver. Since _bfinfdpic_assign_got_entries didn't
+ account for them, our block size is 4 bytes smaller than the real
+ block size. */
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ bfinfdpic_plt_section (info)->size = gpinfo.g.lzplt
+ + ((gpinfo.g.lzplt + (BFINFDPIC_LZPLT_BLOCK_SIZE - 4) - LZPLT_NORMAL_SIZE)
+ / (BFINFDPIC_LZPLT_BLOCK_SIZE - 4) * LZPLT_RESOLVER_EXTRA);
+ }
+
+ /* Reset it, such that _bfinfdpic_assign_plt_entries() can use it to
+ actually assign lazy PLT entries addresses. */
+ gpinfo.g.lzplt = 0;
+
+ /* Save information that we're going to need to generate GOT and PLT
+ entries. */
+ bfinfdpic_got_initial_offset (info) = -gpinfo.gothilo.min;
+
+ if (get_elf_backend_data (output_bfd)->want_got_sym)
+ elf_hash_table (info)->hgot->root.u.def.value
+ += bfinfdpic_got_initial_offset (info);
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ bfinfdpic_plt_initial_offset (info) =
+ bfinfdpic_plt_section (info)->size;
+
+ htab_traverse (bfinfdpic_relocs_info (info), _bfinfdpic_assign_plt_entries,
+ &gpinfo);
+
+ /* Allocate the PLT section contents only after
+ _bfinfdpic_assign_plt_entries has a chance to add the size of the
+ non-lazy PLT entries. */
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ if (bfinfdpic_plt_section (info)->size == 0)
+ bfinfdpic_plt_section (info)->flags |= SEC_EXCLUDE;
+ else
+ {
+ bfinfdpic_plt_section (info)->contents =
+ (bfd_byte *) bfd_zalloc (dynobj,
+ bfinfdpic_plt_section (info)->size);
+ if (bfinfdpic_plt_section (info)->contents == NULL)
+ return FALSE;
+ }
+ }
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ if (bfinfdpic_got_section (info)->size)
+ if (!_bfd_elf_add_dynamic_entry (info, DT_PLTGOT, 0))
+ return FALSE;
+
+ if (bfinfdpic_pltrel_section (info)->size)
+ if (!_bfd_elf_add_dynamic_entry (info, DT_PLTRELSZ, 0)
+ || !_bfd_elf_add_dynamic_entry (info, DT_PLTREL, DT_REL)
+ || !_bfd_elf_add_dynamic_entry (info, DT_JMPREL, 0))
+ return FALSE;
+
+ if (bfinfdpic_gotrel_section (info)->size)
+ if (!_bfd_elf_add_dynamic_entry (info, DT_REL, 0)
+ || !_bfd_elf_add_dynamic_entry (info, DT_RELSZ, 0)
+ || !_bfd_elf_add_dynamic_entry (info, DT_RELENT,
+ sizeof (Elf32_External_Rel)))
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+static bfd_boolean
+elf32_bfinfdpic_always_size_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ if (!info->relocatable)
+ {
+ struct elf_link_hash_entry *h;
+ asection *sec;
+
+ /* Force a PT_GNU_STACK segment to be created. */
+ if (! elf_tdata (output_bfd)->stack_flags)
+ elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X;
+
+ /* Define __stacksize if it's not defined yet. */
+ h = elf_link_hash_lookup (elf_hash_table (info), "__stacksize",
+ FALSE, FALSE, FALSE);
+ if (! h || h->root.type != bfd_link_hash_defined
+ || h->type != STT_OBJECT
+ || !h->def_regular)
+ {
+ struct bfd_link_hash_entry *bh = NULL;
+
+ if (!(_bfd_generic_link_add_one_symbol
+ (info, output_bfd, "__stacksize",
+ BSF_GLOBAL, bfd_abs_section_ptr, DEFAULT_STACK_SIZE,
+ (const char *) NULL, FALSE,
+ get_elf_backend_data (output_bfd)->collect, &bh)))
+ return FALSE;
+
+ h = (struct elf_link_hash_entry *) bh;
+ h->def_regular = 1;
+ h->type = STT_OBJECT;
+ }
+
+ /* Create a stack section, and set its alignment. */
+ sec = bfd_make_section (output_bfd, ".stack");
+
+ if (sec == NULL
+ || ! bfd_set_section_alignment (output_bfd, sec, 3))
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+static bfd_boolean
+elf32_bfinfdpic_modify_segment_map (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ struct elf_segment_map *m;
+
+ /* objcopy and strip preserve what's already there using
+ elf32_bfinfdpic_copy_private_bfd_data (). */
+ if (! info)
return TRUE;
- in_flags = elf_elfheader (ibfd)->e_flags;
- out_flags = elf_elfheader (obfd)->e_flags;
+ for (m = elf_tdata (output_bfd)->segment_map; m != NULL; m = m->next)
+ if (m->p_type == PT_GNU_STACK)
+ break;
- if (!elf_flags_init (obfd))
+ if (m)
{
- elf_flags_init (obfd) = TRUE;
- elf_elfheader (obfd)->e_flags = in_flags;
+ asection *sec = bfd_get_section_by_name (output_bfd, ".stack");
+ struct elf_link_hash_entry *h;
+
+ if (sec)
+ {
+ /* Obtain the pointer to the __stacksize symbol. */
+ h = elf_link_hash_lookup (elf_hash_table (info), "__stacksize",
+ FALSE, FALSE, FALSE);
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *)h->root.u.i.link;
+ BFD_ASSERT (h->root.type == bfd_link_hash_defined);
+
+ /* Set the section size from the symbol value. We
+ intentionally ignore the symbol section. */
+ if (h->root.type == bfd_link_hash_defined)
+ sec->size = h->root.u.def.value;
+ else
+ sec->size = DEFAULT_STACK_SIZE;
+
+ /* Add the stack section to the PT_GNU_STACK segment,
+ such that its size and alignment requirements make it
+ to the segment. */
+ m->sections[m->count] = sec;
+ m->count++;
+ }
}
return TRUE;
}
+static bfd_boolean
+elf32_bfinfdpic_finish_dynamic_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ bfd *dynobj;
+ asection *sdyn;
+ dynobj = elf_hash_table (info)->dynobj;
+
+ if (bfinfdpic_got_section (info))
+ {
+ BFD_ASSERT (bfinfdpic_gotrel_section (info)->size
+ == (bfinfdpic_gotrel_section (info)->reloc_count
+ * sizeof (Elf32_External_Rel)));
+
+ if (bfinfdpic_gotfixup_section (info))
+ {
+ struct elf_link_hash_entry *hgot = elf_hash_table (info)->hgot;
+ bfd_vma got_value = hgot->root.u.def.value
+ + hgot->root.u.def.section->output_section->vma
+ + hgot->root.u.def.section->output_offset;
+
+ _bfinfdpic_add_rofixup (output_bfd, bfinfdpic_gotfixup_section (info),
+ got_value, 0);
+
+ if (bfinfdpic_gotfixup_section (info)->size
+ != (bfinfdpic_gotfixup_section (info)->reloc_count * 4))
+ {
+ (*_bfd_error_handler)
+ ("LINKER BUG: .rofixup section size mismatch");
+ return FALSE;
+ }
+ }
+ }
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ BFD_ASSERT (bfinfdpic_pltrel_section (info)->size
+ == (bfinfdpic_pltrel_section (info)->reloc_count
+ * sizeof (Elf32_External_Rel)));
+ }
+
+ sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ Elf32_External_Dyn * dyncon;
+ Elf32_External_Dyn * dynconend;
+
+ BFD_ASSERT (sdyn != NULL);
+
+ dyncon = (Elf32_External_Dyn *) sdyn->contents;
+ dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
+
+ for (; dyncon < dynconend; dyncon++)
+ {
+ Elf_Internal_Dyn dyn;
+
+ bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
+
+ switch (dyn.d_tag)
+ {
+ default:
+ break;
+
+ case DT_PLTGOT:
+ dyn.d_un.d_ptr = bfinfdpic_got_section (info)->output_section->vma
+ + bfinfdpic_got_section (info)->output_offset
+ + bfinfdpic_got_initial_offset (info);
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_JMPREL:
+ dyn.d_un.d_ptr = bfinfdpic_pltrel_section (info)
+ ->output_section->vma
+ + bfinfdpic_pltrel_section (info)->output_offset;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_PLTRELSZ:
+ dyn.d_un.d_val = bfinfdpic_pltrel_section (info)->size;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+ }
+ }
+ }
+
+ return TRUE;
+}
+
+/* Adjust a symbol defined by a dynamic object and referenced by a
+ regular object. */
+
static bfd_boolean
+elf32_bfinfdpic_adjust_dynamic_symbol
+(struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
+{
+ bfd * dynobj;
+
+ dynobj = elf_hash_table (info)->dynobj;
+
+ /* Make sure we know what is going on here. */
+ BFD_ASSERT (dynobj != NULL
+ && (h->u.weakdef != NULL
+ || (h->def_dynamic
+ && h->ref_regular
+ && !h->def_regular)));
+
+ /* If this is a weak symbol, and there is a real definition, the
+ processor independent code will have arranged for us to see the
+ real definition first, and we can just use the same value. */
+ if (h->u.weakdef != NULL)
+ {
+ BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
+ || h->u.weakdef->root.type == bfd_link_hash_defweak);
+ h->root.u.def.section = h->u.weakdef->root.u.def.section;
+ h->root.u.def.value = h->u.weakdef->root.u.def.value;
+ }
+
+ return TRUE;
+}
+
+/* Perform any actions needed for dynamic symbols. */
+
+static bfd_boolean
+elf32_bfinfdpic_finish_dynamic_symbol
+(bfd *output_bfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ struct elf_link_hash_entry *h ATTRIBUTE_UNUSED,
+ Elf_Internal_Sym *sym ATTRIBUTE_UNUSED)
+{
+ return TRUE;
+}
+
+/* Decide whether to attempt to turn absptr or lsda encodings in
+ shared libraries into pcrel within the given input section. */
+
+static bfd_boolean
+bfinfdpic_elf_use_relative_eh_frame
+(bfd *input_bfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *eh_frame_section ATTRIBUTE_UNUSED)
+{
+ /* We can't use PC-relative encodings in FDPIC binaries, in general. */
+ return FALSE;
+}
+
+/* Adjust the contents of an eh_frame_hdr section before they're output. */
+
+static bfd_byte
+bfinfdpic_elf_encode_eh_address (bfd *abfd,
+ struct bfd_link_info *info,
+ asection *osec, bfd_vma offset,
+ asection *loc_sec, bfd_vma loc_offset,
+ bfd_vma *encoded)
+{
+ struct elf_link_hash_entry *h;
+
+ h = elf_hash_table (info)->hgot;
+ BFD_ASSERT (h && h->root.type == bfd_link_hash_defined);
+
+ if (! h || (_bfinfdpic_osec_to_segment (abfd, osec)
+ == _bfinfdpic_osec_to_segment (abfd, loc_sec->output_section)))
+ return _bfd_elf_encode_eh_address (abfd, info, osec, offset,
+ loc_sec, loc_offset, encoded);
+
+ BFD_ASSERT (_bfinfdpic_osec_to_segment (abfd, osec)
+ == (_bfinfdpic_osec_to_segment
+ (abfd, h->root.u.def.section->output_section)));
+
+ *encoded = osec->vma + offset
+ - (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+
+ return DW_EH_PE_datarel | DW_EH_PE_sdata4;
+}
+
+
+
+/* Look through the relocs for a section during the first phase.
+
+ Besides handling virtual table relocs for gc, we have to deal with
+ all sorts of PIC-related relocations. We describe below the
+ general plan on how to handle such relocations, even though we only
+ collect information at this point, storing them in hash tables for
+ perusal of later passes.
+
+ 32 relocations are propagated to the linker output when creating
+ position-independent output. LO16 and HI16 relocations are not
+ supposed to be encountered in this case.
+
+ LABEL16 should always be resolvable by the linker, since it's only
+ used by branches.
+
+ LABEL24, on the other hand, is used by calls. If it turns out that
+ the target of a call is a dynamic symbol, a PLT entry must be
+ created for it, which triggers the creation of a private function
+ descriptor and, unless lazy binding is disabled, a lazy PLT entry.
+
+ GPREL relocations require the referenced symbol to be in the same
+ segment as _gp, but this can only be checked later.
+
+ All GOT, GOTOFF and FUNCDESC relocations require a .got section to
+ exist. LABEL24 might as well, since it may require a PLT entry,
+ that will require a got.
+
+ Non-FUNCDESC GOT relocations require a GOT entry to be created
+ regardless of whether the symbol is dynamic. However, since a
+ global symbol that turns out to not be exported may have the same
+ address of a non-dynamic symbol, we don't assign GOT entries at
+ this point, such that we can share them in this case. A relocation
+ for the GOT entry always has to be created, be it to offset a
+ private symbol by the section load address, be it to get the symbol
+ resolved dynamically.
+
+ FUNCDESC GOT relocations require a GOT entry to be created, and
+ handled as if a FUNCDESC relocation was applied to the GOT entry in
+ an object file.
+
+ FUNCDESC relocations referencing a symbol that turns out to NOT be
+ dynamic cause a private function descriptor to be created. The
+ FUNCDESC relocation then decays to a 32 relocation that points at
+ the private descriptor. If the symbol is dynamic, the FUNCDESC
+ relocation is propagated to the linker output, such that the
+ dynamic linker creates the canonical descriptor, pointing to the
+ dynamically-resolved definition of the function.
+
+ Non-FUNCDESC GOTOFF relocations must always refer to non-dynamic
+ symbols that are assigned to the same segment as the GOT, but we
+ can only check this later, after we know the complete set of
+ symbols defined and/or exported.
+
+ FUNCDESC GOTOFF relocations require a function descriptor to be
+ created and, unless lazy binding is disabled or the symbol is not
+ dynamic, a lazy PLT entry. Since we can't tell at this point
+ whether a symbol is going to be dynamic, we have to decide later
+ whether to create a lazy PLT entry or bind the descriptor directly
+ to the private function.
+
+ FUNCDESC_VALUE relocations are not supposed to be present in object
+ files, but they may very well be simply propagated to the linker
+ output, since they have no side effect.
+
+
+ A function descriptor always requires a FUNCDESC_VALUE relocation.
+ Whether it's in .plt.rel or not depends on whether lazy binding is
+ enabled and on whether the referenced symbol is dynamic.
+
+ The existence of a lazy PLT requires the resolverStub lazy PLT
+ entry to be present.
+
+
+ As for assignment of GOT, PLT and lazy PLT entries, and private
+ descriptors, we might do them all sequentially, but we can do
+ better than that. For example, we can place GOT entries and
+ private function descriptors referenced using 12-bit operands
+ closer to the PIC register value, such that these relocations don't
+ overflow. Those that are only referenced with LO16 relocations
+ could come next, but we may as well place PLT-required function
+ descriptors in the 12-bit range to make them shorter. Symbols
+ referenced with LO16/HI16 may come next, but we may place
+ additional function descriptors in the 16-bit range if we can
+ reliably tell that we've already placed entries that are ever
+ referenced with only LO16. PLT entries are therefore generated as
+ small as possible, while not introducing relocation overflows in
+ GOT or FUNCDESC_GOTOFF relocations. Lazy PLT entries could be
+ generated before or after PLT entries, but not intermingled with
+ them, such that we can have more lazy PLT entries in range for a
+ branch to the resolverStub. The resolverStub should be emitted at
+ the most distant location from the first lazy PLT entry such that
+ it's still in range for a branch, or closer, if there isn't a need
+ for so many lazy PLT entries. Additional lazy PLT entries may be
+ emitted after the resolverStub, as long as branches are still in
+ range. If the branch goes out of range, longer lazy PLT entries
+ are emitted.
+
+ We could further optimize PLT and lazy PLT entries by giving them
+ priority in assignment to closer-to-gr17 locations depending on the
+ number of occurrences of references to them (assuming a function
+ that's called more often is more important for performance, so its
+ PLT entry should be faster), or taking hints from the compiler.
+ Given infinite time and money... :-) */
+
+static bfd_boolean
+bfinfdpic_check_relocs (bfd *abfd, struct bfd_link_info *info,
+ asection *sec, const Elf_Internal_Rela *relocs)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
+ const Elf_Internal_Rela *rel;
+ const Elf_Internal_Rela *rel_end;
+ bfd *dynobj;
+ struct bfinfdpic_relocs_info *picrel;
+
+ if (info->relocatable)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (abfd);
+ sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
+ if (!elf_bad_symtab (abfd))
+ sym_hashes_end -= symtab_hdr->sh_info;
+
+ dynobj = elf_hash_table (info)->dynobj;
+ rel_end = relocs + sec->reloc_count;
+ for (rel = relocs; rel < rel_end; rel++)
+ {
+ struct elf_link_hash_entry *h;
+ unsigned long r_symndx;
+
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ if (r_symndx < symtab_hdr->sh_info)
+ h = NULL;
+ else
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_BFIN_GOT17M4:
+ case R_BFIN_GOTHI:
+ case R_BFIN_GOTLO:
+ case R_BFIN_FUNCDESC_GOT17M4:
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTLO:
+ case R_BFIN_GOTOFF17M4:
+ case R_BFIN_GOTOFFHI:
+ case R_BFIN_GOTOFFLO:
+ case R_BFIN_FUNCDESC_GOTOFF17M4:
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ case R_BFIN_FUNCDESC:
+ case R_BFIN_FUNCDESC_VALUE:
+ if (! IS_FDPIC (abfd))
+ goto bad_reloc;
+ /* Fall through. */
+ case R_pcrel24:
+ case R_pcrel24_jump_l:
+ case R_byte4_data:
+ if (IS_FDPIC (abfd) && ! dynobj)
+ {
+ elf_hash_table (info)->dynobj = dynobj = abfd;
+ if (! _bfin_create_got_section (abfd, info))
+ return FALSE;
+ }
+ if (! IS_FDPIC (abfd))
+ {
+ picrel = NULL;
+ break;
+ }
+ if (h != NULL)
+ {
+ if (h->dynindx == -1)
+ switch (ELF_ST_VISIBILITY (h->other))
+ {
+ case STV_INTERNAL:
+ case STV_HIDDEN:
+ break;
+ default:
+ bfd_elf_link_record_dynamic_symbol (info, h);
+ break;
+ }
+ picrel
+ = bfinfdpic_relocs_info_for_global (bfinfdpic_relocs_info (info),
+ abfd, h,
+ rel->r_addend, INSERT);
+ }
+ else
+ picrel = bfinfdpic_relocs_info_for_local (bfinfdpic_relocs_info
+ (info), abfd, r_symndx,
+ rel->r_addend, INSERT);
+ if (! picrel)
+ return FALSE;
+ break;
+
+ default:
+ picrel = NULL;
+ break;
+ }
+
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ case R_pcrel24:
+ case R_pcrel24_jump_l:
+ if (IS_FDPIC (abfd))
+ picrel->call = 1;
+ break;
+
+ case R_BFIN_FUNCDESC_VALUE:
+ picrel->relocsfdv++;
+ if (bfd_get_section_flags (abfd, sec) & SEC_ALLOC)
+ picrel->relocs32--;
+ /* Fall through. */
+
+ case R_byte4_data:
+ if (! IS_FDPIC (abfd))
+ break;
+
+ picrel->sym = 1;
+ if (bfd_get_section_flags (abfd, sec) & SEC_ALLOC)
+ picrel->relocs32++;
+ break;
+
+ case R_BFIN_GOT17M4:
+ picrel->got17m4 = 1;
+ break;
+
+ case R_BFIN_GOTHI:
+ case R_BFIN_GOTLO:
+ picrel->gothilo = 1;
+ break;
+
+ case R_BFIN_FUNCDESC_GOT17M4:
+ picrel->fdgot17m4 = 1;
+ break;
+
+ case R_BFIN_FUNCDESC_GOTHI:
+ case R_BFIN_FUNCDESC_GOTLO:
+ picrel->fdgothilo = 1;
+ break;
+
+ case R_BFIN_GOTOFF17M4:
+ case R_BFIN_GOTOFFHI:
+ case R_BFIN_GOTOFFLO:
+ picrel->gotoff = 1;
+ break;
+
+ case R_BFIN_FUNCDESC_GOTOFF17M4:
+ picrel->fdgoff17m4 = 1;
+ break;
+
+ case R_BFIN_FUNCDESC_GOTOFFHI:
+ case R_BFIN_FUNCDESC_GOTOFFLO:
+ picrel->fdgoffhilo = 1;
+ break;
+
+ case R_BFIN_FUNCDESC:
+ picrel->fd = 1;
+ picrel->relocsfd++;
+ break;
+
+ /* This relocation describes the C++ object vtable hierarchy.
+ Reconstruct it for later use during GC. */
+ case R_BFIN_GNU_VTINHERIT:
+ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
+ return FALSE;
+ break;
+
+ /* This relocation describes which C++ vtable entries are actually
+ used. Record for later use during GC. */
+ case R_BFIN_GNU_VTENTRY:
+ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
+ return FALSE;
+ break;
+
+ case R_huimm16:
+ case R_luimm16:
+ case R_pcrel12_jump_s:
+ case R_pcrel10:
+ break;
+
+ default:
+ bad_reloc:
+ (*_bfd_error_handler)
+ (_("%B: unsupported relocation type %i"),
+ abfd, ELF32_R_TYPE (rel->r_info));
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+/* Set the right machine number for a Blackfin ELF file. */
+
+static bfd_boolean
+elf32_bfin_object_p (bfd *abfd)
+{
+ bfd_default_set_arch_mach (abfd, bfd_arch_bfin, 0);
+ return (((elf_elfheader (abfd)->e_flags & EF_BFIN_FDPIC) != 0)
+ == (IS_FDPIC (abfd)));
+}
+
+static bfd_boolean
elf32_bfin_set_private_flags (bfd * abfd, flagword flags)
{
elf_elfheader (abfd)->e_flags = flags;
@@ -2145,29 +4728,170 @@
return TRUE;
}
+/* Copy backend specific data from one object module to another. */
+static bfd_boolean
+bfin_elf_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
+{
+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
+ || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
+ return TRUE;
+
+ BFD_ASSERT (!elf_flags_init (obfd)
+ || elf_elfheader (obfd)->e_flags == elf_elfheader (ibfd)->e_flags);
+
+ elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
+ elf_flags_init (obfd) = TRUE;
+ return TRUE;
+}
+
+static bfd_boolean
+elf32_bfinfdpic_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
+{
+ unsigned i;
+
+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
+ || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
+ return TRUE;
+
+ if (! bfin_elf_copy_private_bfd_data (ibfd, obfd))
+ return FALSE;
+
+ if (! elf_tdata (ibfd) || ! elf_tdata (ibfd)->phdr
+ || ! elf_tdata (obfd) || ! elf_tdata (obfd)->phdr)
+ return TRUE;
+
+ /* Copy the stack size. */
+ for (i = 0; i < elf_elfheader (ibfd)->e_phnum; i++)
+ if (elf_tdata (ibfd)->phdr[i].p_type == PT_GNU_STACK)
+ {
+ Elf_Internal_Phdr *iphdr = &elf_tdata (ibfd)->phdr[i];
+
+ for (i = 0; i < elf_elfheader (obfd)->e_phnum; i++)
+ if (elf_tdata (obfd)->phdr[i].p_type == PT_GNU_STACK)
+ {
+ memcpy (&elf_tdata (obfd)->phdr[i], iphdr, sizeof (*iphdr));
+
+ /* Rewrite the phdrs, since we're only called after they
+ were first written. */
+ if (bfd_seek (obfd, (bfd_signed_vma) get_elf_backend_data (obfd)
+ ->s->sizeof_ehdr, SEEK_SET) != 0
+ || get_elf_backend_data (obfd)->s
+ ->write_out_phdrs (obfd, elf_tdata (obfd)->phdr,
+ elf_elfheader (obfd)->e_phnum) != 0)
+ return FALSE;
+ break;
+ }
+
+ break;
+ }
+
+ return TRUE;
+}
+
+
/* Display the flags field. */
static bfd_boolean
elf32_bfin_print_private_bfd_data (bfd * abfd, PTR ptr)
{
FILE *file = (FILE *) ptr;
+ flagword flags;
BFD_ASSERT (abfd != NULL && ptr != NULL);
/* Print normal ELF private data. */
_bfd_elf_print_private_bfd_data (abfd, ptr);
- /* Ignore init flag - it may not be set, despite the flags field
- containing valid data. */
+ flags = elf_elfheader (abfd)->e_flags;
/* xgettext:c-format */
fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
+ if (flags & EF_BFIN_PIC)
+ fprintf (file, " -fpic");
+
+ if (flags & EF_BFIN_FDPIC)
+ fprintf (file, " -mfdpic");
+
fputc ('\n', file);
return TRUE;
}
+/* Merge backend specific data from an object file to the output
+ object file when linking. */
+
+static bfd_boolean
+elf32_bfin_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
+{
+ flagword old_flags, old_partial;
+ flagword new_flags, new_partial;
+ bfd_boolean error = FALSE;
+
+ new_flags = elf_elfheader (ibfd)->e_flags;
+ old_flags = elf_elfheader (obfd)->e_flags;
+
+ if (new_flags & EF_BFIN_FDPIC)
+ new_flags &= ~EF_BFIN_PIC;
+
+#ifdef DEBUG
+ (*_bfd_error_handler) ("old_flags = 0x%.8lx, new_flags = 0x%.8lx, init = %s, filename = %s",
+ old_flags, new_flags, elf_flags_init (obfd) ? "yes" : "no",
+ bfd_get_filename (ibfd));
+#endif
+
+ if (!elf_flags_init (obfd)) /* First call, no flags set. */
+ {
+ elf_flags_init (obfd) = TRUE;
+ old_flags = new_flags;
+ }
+
+ else if (new_flags == old_flags) /* Compatible flags are ok. */
+ ;
+
+ else /* Possibly incompatible flags. */
+ {
+ /* We don't have to do anything if the pic flags are the same, or the new
+ module(s) were compiled with -mlibrary-pic. */
+ new_partial = (new_flags & EF_BFIN_PIC_FLAGS);
+ old_partial = (old_flags & EF_BFIN_PIC_FLAGS);
+ if (new_partial == old_partial)
+ ;
+
+ /* If we have mixtures of -fpic and -fPIC, or in both bits. */
+ else if (new_partial != 0 && old_partial != 0)
+ old_flags |= new_partial;
+
+ /* One module was compiled for pic and the other was not, see if we have
+ had any relocations that are not pic-safe. */
+ else
+ old_flags |= new_partial;
+
+ }
+
+ /* Update the old flags now with changes made above. */
+ elf_elfheader (obfd)->e_flags = old_flags;
+
+ if (((new_flags & EF_BFIN_FDPIC) == 0)
+ != (! IS_FDPIC (ibfd)))
+ {
+ error = TRUE;
+ if (IS_FDPIC (obfd))
+ (*_bfd_error_handler)
+ (_("%s: cannot link non-fdpic object file into fdpic executable"),
+ bfd_get_filename (ibfd));
+ else
+ (*_bfd_error_handler)
+ (_("%s: cannot link fdpic object file into non-fdpic executable"),
+ bfd_get_filename (ibfd));
+ }
+
+ if (error)
+ bfd_set_error (bfd_error_bad_value);
+
+ return !error;
+}
+
/* bfin ELF linker hash entry. */
struct bfin_link_hash_entry
@@ -2192,7 +4916,7 @@
static struct bfd_hash_entry *
bfin_link_hash_newfunc (struct bfd_hash_entry *entry,
- struct bfd_hash_table *table, const char *string)
+ struct bfd_hash_table *table, const char *string)
{
struct bfd_hash_entry *ret = entry;
@@ -2219,12 +4943,13 @@
struct bfin_link_hash_table *ret;
bfd_size_type amt = sizeof (struct bfin_link_hash_table);
- ret = (struct bfin_link_hash_table *) bfd_malloc (amt);
- if (ret == (struct bfin_link_hash_table *) NULL)
+ ret = bfd_zalloc (abfd, amt);
+ if (ret == NULL)
return NULL;
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
- bfin_link_hash_newfunc))
+ bfin_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -2337,7 +5062,7 @@
}
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -2511,9 +5236,6 @@
return TRUE;
}
-/* Set the sizes of the dynamic sections. */
-#define ELF_DYNAMIC_INTERPRETER "/usr/lib/libc.so.1"
-
static bfd_boolean
bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info)
@@ -2659,7 +5381,7 @@
return TRUE;
}
-
+
/* Given a .data section and a .emreloc in-memory section, store
relocation information into the .emreloc section which can be
used at runtime to relocate the section. This is called by the
@@ -2667,6 +5389,9 @@
after the add_symbols entry point has been called for all the
objects, and before the final_link entry point is called. */
+bfd_boolean bfd_bfin_elf32_create_embedded_relocs
+ PARAMS ((bfd *, struct bfd_link_info *, asection *, asection *, char **));
+
bfd_boolean
bfd_bfin_elf32_create_embedded_relocs (
bfd *abfd,
@@ -2782,17 +5507,18 @@
free (internal_relocs);
return FALSE;
}
-
+
#define TARGET_LITTLE_SYM bfd_elf32_bfin_vec
#define TARGET_LITTLE_NAME "elf32-bfin"
#define ELF_ARCH bfd_arch_bfin
-#define ELF_MACHINE_CODE EM_BLACKFIN
+#define ELF_MACHINE_CODE EM_BLACKFIN
#define ELF_MAXPAGESIZE 0x1000
#define elf_symbol_leading_char '_'
#define bfd_elf32_bfd_reloc_type_lookup bfin_bfd_reloc_type_lookup
#define elf_info_to_howto bfin_info_to_howto
#define elf_info_to_howto_rel 0
+#define elf_backend_object_p elf32_bfin_object_p
#define bfd_elf32_bfd_is_local_label_name \
bfin_is_local_label_name
@@ -2807,7 +5533,7 @@
bfin_link_hash_table_create
#define bfd_elf32_bfd_final_link bfd_elf_gc_common_final_link
-#define elf_backend_check_relocs bfin_check_relocs
+#define elf_backend_check_relocs bfin_check_relocs
#define elf_backend_adjust_dynamic_symbol \
bfin_adjust_dynamic_symbol
#define elf_backend_size_dynamic_sections \
@@ -2834,5 +5560,74 @@
#define elf_backend_got_header_size 12
#define elf_backend_rela_normal 1
+#include "elf32-target.h"
+#undef TARGET_LITTLE_SYM
+#define TARGET_LITTLE_SYM bfd_elf32_bfinfdpic_vec
+#undef TARGET_LITTLE_NAME
+#define TARGET_LITTLE_NAME "elf32-bfinfdpic"
+#undef elf32_bed
+#define elf32_bed elf32_bfinfdpic_bed
+
+#undef elf_backend_gc_sweep_hook
+#define elf_backend_gc_sweep_hook bfinfdpic_gc_sweep_hook
+
+#undef elf_backend_got_header_size
+#define elf_backend_got_header_size 0
+
+#undef elf_backend_relocate_section
+#define elf_backend_relocate_section bfinfdpic_relocate_section
+#undef elf_backend_check_relocs
+#define elf_backend_check_relocs bfinfdpic_check_relocs
+
+#undef bfd_elf32_bfd_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_create \
+ bfinfdpic_elf_link_hash_table_create
+#undef elf_backend_always_size_sections
+#define elf_backend_always_size_sections \
+ elf32_bfinfdpic_always_size_sections
+#undef elf_backend_modify_segment_map
+#define elf_backend_modify_segment_map \
+ elf32_bfinfdpic_modify_segment_map
+#undef bfd_elf32_bfd_copy_private_bfd_data
+#define bfd_elf32_bfd_copy_private_bfd_data \
+ elf32_bfinfdpic_copy_private_bfd_data
+
+#undef elf_backend_create_dynamic_sections
+#define elf_backend_create_dynamic_sections \
+ elf32_bfinfdpic_create_dynamic_sections
+#undef elf_backend_adjust_dynamic_symbol
+#define elf_backend_adjust_dynamic_symbol \
+ elf32_bfinfdpic_adjust_dynamic_symbol
+#undef elf_backend_size_dynamic_sections
+#define elf_backend_size_dynamic_sections \
+ elf32_bfinfdpic_size_dynamic_sections
+#undef elf_backend_finish_dynamic_symbol
+#define elf_backend_finish_dynamic_symbol \
+ elf32_bfinfdpic_finish_dynamic_symbol
+#undef elf_backend_finish_dynamic_sections
+#define elf_backend_finish_dynamic_sections \
+ elf32_bfinfdpic_finish_dynamic_sections
+
+#undef elf_backend_can_make_relative_eh_frame
+#define elf_backend_can_make_relative_eh_frame \
+ bfinfdpic_elf_use_relative_eh_frame
+#undef elf_backend_can_make_lsda_relative_eh_frame
+#define elf_backend_can_make_lsda_relative_eh_frame \
+ bfinfdpic_elf_use_relative_eh_frame
+#undef elf_backend_encode_eh_address
+#define elf_backend_encode_eh_address \
+ bfinfdpic_elf_encode_eh_address
+
+#undef elf_backend_may_use_rel_p
+#define elf_backend_may_use_rel_p 1
+#undef elf_backend_may_use_rela_p
+#define elf_backend_may_use_rela_p 1
+/* We use REL for dynamic relocations only. */
+#undef elf_backend_default_use_rela_p
+#define elf_backend_default_use_rela_p 1
+
+#undef elf_backend_omit_section_dynsym
+#define elf_backend_omit_section_dynsym _bfinfdpic_link_omit_section_dynsym
+
#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-cris.c
===================================================================
--- branches/binutils/package/bfd/elf32-cris.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-cris.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* CRIS-specific support for 32-bit ELF.
- Copyright 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Axis Communications AB.
Written by Hans-Peter Nilsson, based on elf32-fr30.c
@@ -849,8 +849,9 @@
if (ret == (struct elf_cris_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- elf_cris_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf_cris_link_hash_newfunc,
+ sizeof (struct elf_cris_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1769,7 +1770,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf32-frv.c
===================================================================
--- branches/binutils/package/bfd/elf32-frv.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-frv.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* FRV-specific support for 32-bit ELF.
- Copyright 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -78,6 +78,10 @@
PARAMS ((bfd *, bfd *));
static bfd_boolean frv_elf_print_private_bfd_data
PARAMS ((bfd *, PTR));
+static bfd_boolean elf32_frv_grok_prstatus (bfd * abfd,
+ Elf_Internal_Note * note);
+static bfd_boolean elf32_frv_grok_psinfo (bfd * abfd,
+ Elf_Internal_Note * note);
static reloc_howto_type elf32_frv_howto_table [] =
{
@@ -1004,8 +1008,9 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd,
- _bfd_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd,
+ _bfd_elf_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -4394,10 +4399,14 @@
/* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
.plt section. */
- if (bed->want_plt_sym
- && !_bfd_elf_define_linkage_sym (abfd, info, s,
- "_PROCEDURE_LINKAGE_TABLE_"))
- return FALSE;
+ if (bed->want_plt_sym)
+ {
+ h = _bfd_elf_define_linkage_sym (abfd, info, s,
+ "_PROCEDURE_LINKAGE_TABLE_");
+ elf_hash_table (info)->hplt = h;
+ if (h == NULL)
+ return FALSE;
+ }
/* FRV-specific: we want rel relocations for the plt. */
s = bfd_make_section_with_flags (abfd, ".rel.plt",
@@ -6823,6 +6832,86 @@
}
+/* Support for core dump NOTE sections. */
+
+static bfd_boolean
+elf32_frv_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
+{
+ int offset;
+ unsigned int raw_size;
+
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ /* The Linux/FRV elf_prstatus struct is 268 bytes long. The other
+ hardcoded offsets and sizes listed below (and contained within
+ this lexical block) refer to fields in the target's elf_prstatus
+ struct. */
+ case 268:
+ /* `pr_cursig' is at offset 12. */
+ elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
+
+ /* `pr_pid' is at offset 24. */
+ elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
+
+ /* `pr_reg' is at offset 72. */
+ offset = 72;
+
+ /* Most grok_prstatus implementations set `raw_size' to the size
+ of the pr_reg field. For Linux/FRV, we set `raw_size' to be
+ the size of `pr_reg' plus the size of `pr_exec_fdpic_loadmap'
+ and `pr_interp_fdpic_loadmap', both of which (by design)
+ immediately follow `pr_reg'. This will allow these fields to
+ be viewed by GDB as registers.
+
+ `pr_reg' is 184 bytes long. `pr_exec_fdpic_loadmap' and
+ `pr_interp_fdpic_loadmap' are 4 bytes each. */
+ raw_size = 184 + 4 + 4;
+
+ break;
+ }
+
+ /* Make a ".reg/999" section. */
+ return _bfd_elfcore_make_pseudosection (abfd, ".reg", raw_size,
+ note->descpos + offset);
+}
+
+static bfd_boolean
+elf32_frv_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
+{
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ /* The Linux/FRV elf_prpsinfo struct is 124 bytes long. */
+ case 124:
+
+ /* `pr_fname' is found at offset 28 and is 16 bytes long. */
+ elf_tdata (abfd)->core_program
+ = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
+
+ /* `pr_psargs' is found at offset 44 and is 80 bytes long. */
+ elf_tdata (abfd)->core_command
+ = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
+ }
+
+ /* Note that for some reason, a spurious space is tacked
+ onto the end of the args in some (at least one anyway)
+ implementations, so strip it off if it exists. */
+
+ {
+ char *command = elf_tdata (abfd)->core_command;
+ int n = strlen (command);
+
+ if (0 < n && command[n - 1] == ' ')
+ command[n - 1] = '\0';
+ }
+
+ return TRUE;
+}
#define ELF_ARCH bfd_arch_frv
#define ELF_MACHINE_CODE EM_CYGNUS_FRV
#define ELF_MAXPAGESIZE 0x1000
@@ -6857,6 +6946,9 @@
#define elf_backend_finish_dynamic_sections \
elf32_frv_finish_dynamic_sections
+#define elf_backend_grok_prstatus elf32_frv_grok_prstatus
+#define elf_backend_grok_psinfo elf32_frv_grok_psinfo
+
#include "elf32-target.h"
#undef ELF_MAXPAGESIZE
Modified: branches/binutils/package/bfd/elf32-hppa.c
===================================================================
--- branches/binutils/package/bfd/elf32-hppa.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-hppa.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for HP PA-RISC ELF files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Original code by
Center for Software Science
@@ -394,14 +394,16 @@
if (htab == NULL)
return NULL;
- if (!_bfd_elf_link_hash_table_init (&htab->etab, abfd, hppa_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&htab->etab, abfd, hppa_link_hash_newfunc,
+ sizeof (struct elf32_hppa_link_hash_entry)))
{
free (htab);
return NULL;
}
/* Init the stub hash table too. */
- if (!bfd_hash_table_init (&htab->bstab, stub_hash_newfunc))
+ if (!bfd_hash_table_init (&htab->bstab, stub_hash_newfunc,
+ sizeof (struct elf32_hppa_stub_hash_entry)))
return NULL;
htab->stub_bfd = NULL;
@@ -2020,9 +2022,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (eh->other) != STV_DEFAULT
+ if (hh->dyn_relocs != NULL
&& eh->root.type == bfd_link_hash_undefweak)
- hh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (eh->other) != STV_DEFAULT)
+ hh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (eh->dynindx == -1
+ && !eh->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, eh))
+ return FALSE;
+ }
+ }
}
else
{
@@ -2347,7 +2361,7 @@
must add the entries now so that we get the correct size for
the .dynamic section. The DT_DEBUG entry is filled in by the
dynamic linker and used by the debugger. */
- if (!info->shared)
+ if (info->executable)
{
if (!add_dynamic_entry (DT_DEBUG, 0))
return FALSE;
@@ -4045,7 +4059,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (eh->root.root.string[0] == '_'
&& (strcmp (eh->root.root.string, "_DYNAMIC") == 0
- || strcmp (eh->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0))
+ || eh == htab->etab.hgot))
{
sym->st_shndx = SHN_ABS;
}
Modified: branches/binutils/package/bfd/elf32-i386.c
===================================================================
--- branches/binutils/package/bfd/elf32-i386.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-i386.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Intel 80386/80486-specific support for 32-bit ELF
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -126,9 +126,19 @@
HOWTO(R_386_TLS_TPOFF32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
bfd_elf_generic_reloc, "R_386_TLS_TPOFF32",
TRUE, 0xffffffff, 0xffffffff, FALSE),
+ EMPTY_HOWTO (38),
+ HOWTO(R_386_TLS_GOTDESC, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_386_TLS_GOTDESC",
+ TRUE, 0xffffffff, 0xffffffff, FALSE),
+ HOWTO(R_386_TLS_DESC_CALL, 0, 0, 0, FALSE, 0, complain_overflow_dont,
+ bfd_elf_generic_reloc, "R_386_TLS_DESC_CALL",
+ FALSE, 0, 0, FALSE),
+ HOWTO(R_386_TLS_DESC, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_386_TLS_DESC",
+ TRUE, 0xffffffff, 0xffffffff, FALSE),
/* Another gap. */
-#define R_386_tls (R_386_TLS_TPOFF32 + 1 - R_386_tls_offset)
+#define R_386_tls (R_386_TLS_DESC + 1 - R_386_tls_offset)
#define R_386_vt_offset (R_386_GNU_VTINHERIT - R_386_tls)
/* GNU extension to record C++ vtable hierarchy. */
@@ -292,6 +302,18 @@
TRACE ("BFD_RELOC_386_TLS_TPOFF32");
return &elf_howto_table[R_386_TLS_TPOFF32 - R_386_tls_offset];
+ case BFD_RELOC_386_TLS_GOTDESC:
+ TRACE ("BFD_RELOC_386_TLS_GOTDESC");
+ return &elf_howto_table[R_386_TLS_GOTDESC - R_386_tls_offset];
+
+ case BFD_RELOC_386_TLS_DESC_CALL:
+ TRACE ("BFD_RELOC_386_TLS_DESC_CALL");
+ return &elf_howto_table[R_386_TLS_DESC_CALL - R_386_tls_offset];
+
+ case BFD_RELOC_386_TLS_DESC:
+ TRACE ("BFD_RELOC_386_TLS_DESC");
+ return &elf_howto_table[R_386_TLS_DESC - R_386_tls_offset];
+
case BFD_RELOC_VTABLE_INHERIT:
TRACE ("BFD_RELOC_VTABLE_INHERIT");
return &elf_howto_table[R_386_GNU_VTINHERIT - R_386_vt_offset];
@@ -559,7 +581,24 @@
#define GOT_TLS_IE_POS 5
#define GOT_TLS_IE_NEG 6
#define GOT_TLS_IE_BOTH 7
+#define GOT_TLS_GDESC 8
+#define GOT_TLS_MASK 0x0f
+#define GOT_TLS_IE_IE 0x10
+#define GOT_TLS_IE_GD 0x20
+#define GOT_TLS_IE_MASK 0x30
+#define GOT_TLS_GD_BOTH_P(type) \
+ ((type) == (GOT_TLS_GD | GOT_TLS_GDESC))
+#define GOT_TLS_GD_P(type) \
+ ((type) == GOT_TLS_GD || GOT_TLS_GD_BOTH_P (type))
+#define GOT_TLS_GDESC_P(type) \
+ ((type) == GOT_TLS_GDESC || GOT_TLS_GD_BOTH_P (type))
+#define GOT_TLS_GD_ANY_P(type) \
+ (GOT_TLS_GD_P (type) || GOT_TLS_GDESC_P (type))
unsigned char tls_type;
+
+ /* Offset of the GOTPLT entry reserved for the TLS descriptor,
+ starting at the end of the jump table. */
+ bfd_vma tlsdesc_got;
};
#define elf_i386_hash_entry(ent) ((struct elf_i386_link_hash_entry *)(ent))
@@ -570,6 +609,9 @@
/* tls_type for each local got entry. */
char *local_got_tls_type;
+
+ /* GOTPLT entries for TLS descriptors. */
+ bfd_vma *local_tlsdesc_gotent;
};
#define elf_i386_tdata(abfd) \
@@ -578,6 +620,9 @@
#define elf_i386_local_got_tls_type(abfd) \
(elf_i386_tdata (abfd)->local_got_tls_type)
+#define elf_i386_local_tlsdesc_gotent(abfd) \
+ (elf_i386_tdata (abfd)->local_tlsdesc_gotent)
+
static bfd_boolean
elf_i386_mkobject (bfd *abfd)
{
@@ -606,20 +651,24 @@
/* The (unloaded but important) .rel.plt.unloaded section on VxWorks. */
asection *srelplt2;
- /* Short-cuts to frequently used symbols for VxWorks targets. */
- struct elf_link_hash_entry *hgot, *hplt;
-
/* True if the target system is VxWorks. */
int is_vxworks;
/* Value used to fill the last word of the first plt entry. */
bfd_byte plt0_pad_byte;
+ /* The index of the next unused R_386_TLS_DESC slot in .rel.plt. */
+ bfd_vma next_tls_desc_index;
+
union {
bfd_signed_vma refcount;
bfd_vma offset;
} tls_ldm_got;
+ /* The amount of space used by the reserved portion of the sgotplt
+ section, plus whatever space is used by the jump slots. */
+ bfd_vma sgotplt_jump_table_size;
+
/* Small local sym to section mapping cache. */
struct sym_sec_cache sym_sec;
};
@@ -629,6 +678,9 @@
#define elf_i386_hash_table(p) \
((struct elf_i386_link_hash_table *) ((p)->hash))
+#define elf_i386_compute_jump_table_size(htab) \
+ ((htab)->next_tls_desc_index * 4)
+
/* Create an entry in an i386 ELF linker hash table. */
static struct bfd_hash_entry *
@@ -655,6 +707,7 @@
eh = (struct elf_i386_link_hash_entry *) entry;
eh->dyn_relocs = NULL;
eh->tls_type = GOT_UNKNOWN;
+ eh->tlsdesc_got = (bfd_vma) -1;
}
return entry;
@@ -672,7 +725,8 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
+ sizeof (struct elf_i386_link_hash_entry)))
{
free (ret);
return NULL;
@@ -686,11 +740,11 @@
ret->sdynbss = NULL;
ret->srelbss = NULL;
ret->tls_ldm_got.refcount = 0;
+ ret->next_tls_desc_index = 0;
+ ret->sgotplt_jump_table_size = 0;
ret->sym_sec.abfd = NULL;
ret->is_vxworks = 0;
ret->srelplt2 = NULL;
- ret->hgot = NULL;
- ret->hplt = NULL;
ret->plt0_pad_byte = 0;
return &ret->elf.root;
@@ -733,9 +787,6 @@
elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
{
struct elf_i386_link_hash_table *htab;
- asection * s;
- int flags;
- const struct elf_backend_data *bed = get_elf_backend_data (dynobj);
htab = elf_i386_hash_table (info);
if (!htab->sgot && !create_got_section (dynobj, info))
@@ -754,17 +805,9 @@
|| (!info->shared && !htab->srelbss))
abort ();
- if (htab->is_vxworks && !info->shared)
- {
- s = bfd_make_section (dynobj, ".rel.plt.unloaded");
- flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY
- | SEC_LINKER_CREATED);
- if (s == NULL
- || ! bfd_set_section_flags (dynobj, s, flags)
- || ! bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
- return FALSE;
- htab->srelplt2 = s;
- }
+ if (htab->is_vxworks
+ && !elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
+ return FALSE;
return TRUE;
}
@@ -845,6 +888,8 @@
switch (r_type)
{
case R_386_TLS_GD:
+ case R_386_TLS_GOTDESC:
+ case R_386_TLS_DESC_CALL:
case R_386_TLS_IE_32:
if (is_local)
return R_386_TLS_LE_32;
@@ -949,6 +994,8 @@
case R_386_GOT32:
case R_386_TLS_GD:
+ case R_386_TLS_GOTDESC:
+ case R_386_TLS_DESC_CALL:
/* This symbol requires a global offset table entry. */
{
int tls_type, old_tls_type;
@@ -958,15 +1005,31 @@
default:
case R_386_GOT32: tls_type = GOT_NORMAL; break;
case R_386_TLS_GD: tls_type = GOT_TLS_GD; break;
+ case R_386_TLS_GOTDESC:
+ case R_386_TLS_DESC_CALL:
+ tls_type = GOT_TLS_GDESC; break;
case R_386_TLS_IE_32:
if (ELF32_R_TYPE (rel->r_info) == r_type)
tls_type = GOT_TLS_IE_NEG;
+ else if (h
+ && ELF32_R_TYPE (rel->r_info) == R_386_TLS_GD)
+ /* If this is a GD->IE transition, we may use either
+ of R_386_TLS_TPOFF and R_386_TLS_TPOFF32. But if
+ we may have both R_386_TLS_IE and R_386_TLS_GD,
+ we can't share the same R_386_TLS_TPOFF since
+ they require different offsets. So we remember
+ it comes from R_386_TLS_GD. */
+ tls_type = GOT_TLS_IE | GOT_TLS_IE_GD;
else
- /* If this is a GD->IE transition, we may use either of
- R_386_TLS_TPOFF and R_386_TLS_TPOFF32. */
tls_type = GOT_TLS_IE;
break;
case R_386_TLS_IE:
+ if (h)
+ {
+ /* We remember it comes from R_386_TLS_IE. */
+ tls_type = GOT_TLS_IE_POS | GOT_TLS_IE_IE;
+ break;
+ }
case R_386_TLS_GOTIE:
tls_type = GOT_TLS_IE_POS; break;
}
@@ -987,13 +1050,16 @@
bfd_size_type size;
size = symtab_hdr->sh_info;
- size *= (sizeof (bfd_signed_vma) + sizeof(char));
+ size *= (sizeof (bfd_signed_vma)
+ + sizeof (bfd_vma) + sizeof(char));
local_got_refcounts = bfd_zalloc (abfd, size);
if (local_got_refcounts == NULL)
return FALSE;
elf_local_got_refcounts (abfd) = local_got_refcounts;
+ elf_i386_local_tlsdesc_gotent (abfd)
+ = (bfd_vma *) (local_got_refcounts + symtab_hdr->sh_info);
elf_i386_local_got_tls_type (abfd)
- = (char *) (local_got_refcounts + symtab_hdr->sh_info);
+ = (char *) (local_got_refcounts + 2 * symtab_hdr->sh_info);
}
local_got_refcounts[r_symndx] += 1;
old_tls_type = elf_i386_local_got_tls_type (abfd) [r_symndx];
@@ -1003,12 +1069,16 @@
tls_type |= old_tls_type;
/* If a TLS symbol is accessed using IE at least once,
there is no point to use dynamic model for it. */
- else if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN
- && (old_tls_type != GOT_TLS_GD
+ else if (old_tls_type != tls_type
+ && old_tls_type != GOT_UNKNOWN
+ && (! GOT_TLS_GD_ANY_P (old_tls_type)
|| (tls_type & GOT_TLS_IE) == 0))
{
- if ((old_tls_type & GOT_TLS_IE) && tls_type == GOT_TLS_GD)
+ if ((old_tls_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (tls_type))
tls_type = old_tls_type;
+ else if (GOT_TLS_GD_ANY_P (old_tls_type)
+ && GOT_TLS_GD_ANY_P (tls_type))
+ tls_type |= old_tls_type;
else
{
(*_bfd_error_handler)
@@ -1316,6 +1386,8 @@
break;
case R_386_TLS_GD:
+ case R_386_TLS_GOTDESC:
+ case R_386_TLS_DESC_CALL:
case R_386_TLS_IE_32:
case R_386_TLS_IE:
case R_386_TLS_GOTIE:
@@ -1579,6 +1651,7 @@
/* We also need to make an entry in the .rel.plt section. */
htab->srelplt->size += sizeof (Elf32_External_Rel);
+ htab->next_tls_desc_index++;
if (htab->is_vxworks && !info->shared)
{
@@ -1612,6 +1685,9 @@
h->needs_plt = 0;
}
+ eh = (struct elf_i386_link_hash_entry *) h;
+ eh->tlsdesc_got = (bfd_vma) -1;
+
/* If R_386_TLS_{IE_32,IE,GOTIE} symbol is now local to the binary,
make it a R_386_TLS_LE_32 requiring no TLS entry. */
if (h->got.refcount > 0
@@ -1624,6 +1700,14 @@
asection *s;
bfd_boolean dyn;
int tls_type = elf_i386_hash_entry(h)->tls_type;
+
+ /* If we have both R_386_TLS_IE and R_386_TLS_GD, GOT_TLS_IE_BOTH
+ should be used. */
+ if ((tls_type & GOT_TLS_IE_MASK)
+ == (GOT_TLS_IE_IE | GOT_TLS_IE_GD))
+ tls_type = GOT_TLS_IE_BOTH;
+ else
+ tls_type &= GOT_TLS_MASK;
/* Make sure this symbol is output as a dynamic symbol.
Undefined weak syms won't yet be marked as dynamic. */
@@ -1635,11 +1719,22 @@
}
s = htab->sgot;
- h->got.offset = s->size;
- s->size += 4;
- /* R_386_TLS_GD needs 2 consecutive GOT slots. */
- if (tls_type == GOT_TLS_GD || tls_type == GOT_TLS_IE_BOTH)
- s->size += 4;
+ if (GOT_TLS_GDESC_P (tls_type))
+ {
+ eh->tlsdesc_got = htab->sgotplt->size
+ - elf_i386_compute_jump_table_size (htab);
+ htab->sgotplt->size += 8;
+ h->got.offset = (bfd_vma) -2;
+ }
+ if (! GOT_TLS_GDESC_P (tls_type)
+ || GOT_TLS_GD_P (tls_type))
+ {
+ h->got.offset = s->size;
+ s->size += 4;
+ /* R_386_TLS_GD needs 2 consecutive GOT slots. */
+ if (GOT_TLS_GD_P (tls_type) || tls_type == GOT_TLS_IE_BOTH)
+ s->size += 4;
+ }
dyn = htab->elf.dynamic_sections_created;
/* R_386_TLS_IE_32 needs one dynamic relocation,
R_386_TLS_IE resp. R_386_TLS_GOTIE needs one dynamic relocation,
@@ -1648,21 +1743,23 @@
global. */
if (tls_type == GOT_TLS_IE_BOTH)
htab->srelgot->size += 2 * sizeof (Elf32_External_Rel);
- else if ((tls_type == GOT_TLS_GD && h->dynindx == -1)
+ else if ((GOT_TLS_GD_P (tls_type) && h->dynindx == -1)
|| (tls_type & GOT_TLS_IE))
htab->srelgot->size += sizeof (Elf32_External_Rel);
- else if (tls_type == GOT_TLS_GD)
+ else if (GOT_TLS_GD_P (tls_type))
htab->srelgot->size += 2 * sizeof (Elf32_External_Rel);
- else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
- || h->root.type != bfd_link_hash_undefweak)
+ else if (! GOT_TLS_GDESC_P (tls_type)
+ && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || h->root.type != bfd_link_hash_undefweak)
&& (info->shared
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
htab->srelgot->size += sizeof (Elf32_External_Rel);
+ if (GOT_TLS_GDESC_P (tls_type))
+ htab->srelplt->size += sizeof (Elf32_External_Rel);
}
else
h->got.offset = (bfd_vma) -1;
- eh = (struct elf_i386_link_hash_entry *) h;
if (eh->dyn_relocs == NULL)
return TRUE;
@@ -1697,9 +1794,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else if (ELIMINATE_COPY_RELOCS)
{
@@ -1810,6 +1919,7 @@
bfd_signed_vma *local_got;
bfd_signed_vma *end_local_got;
char *local_tls_type;
+ bfd_vma *local_tlsdesc_gotent;
bfd_size_type locsymcount;
Elf_Internal_Shdr *symtab_hdr;
asection *srel;
@@ -1852,25 +1962,42 @@
locsymcount = symtab_hdr->sh_info;
end_local_got = local_got + locsymcount;
local_tls_type = elf_i386_local_got_tls_type (ibfd);
+ local_tlsdesc_gotent = elf_i386_local_tlsdesc_gotent (ibfd);
s = htab->sgot;
srel = htab->srelgot;
- for (; local_got < end_local_got; ++local_got, ++local_tls_type)
+ for (; local_got < end_local_got;
+ ++local_got, ++local_tls_type, ++local_tlsdesc_gotent)
{
+ *local_tlsdesc_gotent = (bfd_vma) -1;
if (*local_got > 0)
{
- *local_got = s->size;
- s->size += 4;
- if (*local_tls_type == GOT_TLS_GD
- || *local_tls_type == GOT_TLS_IE_BOTH)
- s->size += 4;
+ if (GOT_TLS_GDESC_P (*local_tls_type))
+ {
+ *local_tlsdesc_gotent = htab->sgotplt->size
+ - elf_i386_compute_jump_table_size (htab);
+ htab->sgotplt->size += 8;
+ *local_got = (bfd_vma) -2;
+ }
+ if (! GOT_TLS_GDESC_P (*local_tls_type)
+ || GOT_TLS_GD_P (*local_tls_type))
+ {
+ *local_got = s->size;
+ s->size += 4;
+ if (GOT_TLS_GD_P (*local_tls_type)
+ || *local_tls_type == GOT_TLS_IE_BOTH)
+ s->size += 4;
+ }
if (info->shared
- || *local_tls_type == GOT_TLS_GD
+ || GOT_TLS_GD_ANY_P (*local_tls_type)
|| (*local_tls_type & GOT_TLS_IE))
{
if (*local_tls_type == GOT_TLS_IE_BOTH)
srel->size += 2 * sizeof (Elf32_External_Rel);
- else
+ else if (GOT_TLS_GD_P (*local_tls_type)
+ || ! GOT_TLS_GDESC_P (*local_tls_type))
srel->size += sizeof (Elf32_External_Rel);
+ if (GOT_TLS_GDESC_P (*local_tls_type))
+ htab->srelplt->size += sizeof (Elf32_External_Rel);
}
}
else
@@ -1889,31 +2016,18 @@
else
htab->tls_ldm_got.offset = -1;
- if (htab->is_vxworks)
- {
- /* Save the GOT and PLT symbols in the hash table for easy access.
- Mark them as having relocations; they might not, but we won't
- know for sure until we build the GOT in finish_dynamic_symbol. */
-
- htab->hgot = elf_link_hash_lookup (elf_hash_table (info),
- "_GLOBAL_OFFSET_TABLE_",
- FALSE, FALSE, FALSE);
- if (htab->hgot)
- htab->hgot->indx = -2;
- htab->hplt = elf_link_hash_lookup (elf_hash_table (info),
- "_PROCEDURE_LINKAGE_TABLE_",
- FALSE, FALSE, FALSE);
- if (htab->hplt)
- htab->hplt->indx = -2;
-
- if (htab->is_vxworks && htab->hplt && htab->splt->flags & SEC_CODE)
- htab->hplt->type = STT_FUNC;
- }
-
/* Allocate global sym .plt and .got entries, and space for global
sym dynamic relocs. */
elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info);
+ /* For every jump slot reserved in the sgotplt, reloc_count is
+ incremented. However, when we reserve space for TLS descriptors,
+ it's not incremented, so in order to compute the space reserved
+ for them, it suffices to multiply the reloc count by the jump
+ slot size. */
+ if (htab->srelplt)
+ htab->sgotplt_jump_table_size = htab->next_tls_desc_index * 4;
+
/* We now have determined the sizes of the various dynamic sections.
Allocate memory for them. */
relocs = FALSE;
@@ -1935,7 +2049,7 @@
we've exported dynamic symbols from them we must leave them.
It's too late to tell BFD to get rid of the symbols. */
- if (htab->hplt != NULL)
+ if (htab->elf.hplt != NULL)
strip_section = FALSE;
}
else if (strncmp (bfd_get_section_name (dynobj, s), ".rel", 4) == 0)
@@ -2032,6 +2146,41 @@
return TRUE;
}
+static bfd_boolean
+elf_i386_always_size_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ asection *tls_sec = elf_hash_table (info)->tls_sec;
+
+ if (tls_sec)
+ {
+ struct elf_link_hash_entry *tlsbase;
+
+ tlsbase = elf_link_hash_lookup (elf_hash_table (info),
+ "_TLS_MODULE_BASE_",
+ FALSE, FALSE, FALSE);
+
+ if (tlsbase && tlsbase->type == STT_TLS)
+ {
+ struct bfd_link_hash_entry *bh = NULL;
+ const struct elf_backend_data *bed
+ = get_elf_backend_data (output_bfd);
+
+ if (!(_bfd_generic_link_add_one_symbol
+ (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
+ tls_sec, 0, NULL, FALSE,
+ bed->collect, &bh)))
+ return FALSE;
+ tlsbase = (struct elf_link_hash_entry *)bh;
+ tlsbase->def_regular = 1;
+ tlsbase->other = STV_HIDDEN;
+ (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
+ }
+ }
+
+ return TRUE;
+}
+
/* Set the correct type for an x86 ELF section. We do this by the
section name, which is a hack, but ought to work. */
@@ -2109,6 +2258,7 @@
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
bfd_vma *local_got_offsets;
+ bfd_vma *local_tlsdesc_gotents;
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
@@ -2116,6 +2266,7 @@
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
local_got_offsets = elf_local_got_offsets (input_bfd);
+ local_tlsdesc_gotents = elf_i386_local_tlsdesc_gotent (input_bfd);
rel = relocs;
relend = relocs + input_section->reloc_count;
@@ -2127,7 +2278,7 @@
struct elf_link_hash_entry *h;
Elf_Internal_Sym *sym;
asection *sec;
- bfd_vma off;
+ bfd_vma off, offplt;
bfd_vma relocation;
bfd_boolean unresolved_reloc;
bfd_reloc_status_type r;
@@ -2549,6 +2700,8 @@
/* Fall through */
case R_386_TLS_GD:
+ case R_386_TLS_GOTDESC:
+ case R_386_TLS_DESC_CALL:
case R_386_TLS_IE_32:
case R_386_TLS_GOTIE:
r_type = elf_i386_tls_transition (info, r_type, h == NULL);
@@ -2558,12 +2711,21 @@
else if (h != NULL)
{
tls_type = elf_i386_hash_entry(h)->tls_type;
+ /* If we have both R_386_TLS_IE and R_386_TLS_GD,
+ GOT_TLS_IE_BOTH should be used. */
+ if ((tls_type & GOT_TLS_IE_MASK)
+ == (GOT_TLS_IE_IE | GOT_TLS_IE_GD))
+ tls_type = GOT_TLS_IE_BOTH;
+ else
+ tls_type &= GOT_TLS_MASK;
if (!info->shared && h->dynindx == -1 && (tls_type & GOT_TLS_IE))
r_type = R_386_TLS_LE_32;
}
if (tls_type == GOT_TLS_IE)
tls_type = GOT_TLS_IE_NEG;
- if (r_type == R_386_TLS_GD)
+ if (r_type == R_386_TLS_GD
+ || r_type == R_386_TLS_GOTDESC
+ || r_type == R_386_TLS_DESC_CALL)
{
if (tls_type == GOT_TLS_IE_POS)
r_type = R_386_TLS_GOTIE;
@@ -2637,6 +2799,63 @@
rel++;
continue;
}
+ else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_GOTDESC)
+ {
+ /* GDesc -> LE transition.
+ It's originally something like:
+ leal x at tlsdesc(%ebx), %eax
+
+ leal x at ntpoff, %eax
+
+ Registers other than %eax may be set up here. */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a leal adding ebx to a
+ 32-bit offset into any register, although it's
+ probably almost always going to be eax. */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff >= 2);
+ type = bfd_get_8 (input_bfd, contents + roff - 2);
+ BFD_ASSERT (type == 0x8d);
+ val = bfd_get_8 (input_bfd, contents + roff - 1);
+ BFD_ASSERT ((val & 0xc7) == 0x83);
+ BFD_ASSERT (roff + 4 <= input_section->size);
+
+ /* Now modify the instruction as appropriate. */
+ /* aoliva FIXME: remove the above and xor the byte
+ below with 0x86. */
+ bfd_put_8 (output_bfd, val ^ 0x86,
+ contents + roff - 1);
+ bfd_put_32 (output_bfd, -tpoff (info, relocation),
+ contents + roff);
+ continue;
+ }
+ else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_DESC_CALL)
+ {
+ /* GDesc -> LE transition.
+ It's originally:
+ call *(%eax)
+ Turn it into:
+ nop; nop */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a call *(%eax). */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff + 2 <= input_section->size);
+ type = bfd_get_8 (input_bfd, contents + roff);
+ BFD_ASSERT (type == 0xff);
+ val = bfd_get_8 (input_bfd, contents + roff + 1);
+ BFD_ASSERT (val == 0x10);
+
+ /* Now modify the instruction as appropriate. */
+ bfd_put_8 (output_bfd, 0x90, contents + roff);
+ bfd_put_8 (output_bfd, 0x90, contents + roff + 1);
+ continue;
+ }
else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_IE)
{
unsigned int val, type;
@@ -2751,13 +2970,17 @@
abort ();
if (h != NULL)
- off = h->got.offset;
+ {
+ off = h->got.offset;
+ offplt = elf_i386_hash_entry (h)->tlsdesc_got;
+ }
else
{
if (local_got_offsets == NULL)
abort ();
off = local_got_offsets[r_symndx];
+ offplt = local_tlsdesc_gotents[r_symndx];
}
if ((off & 1) != 0)
@@ -2767,35 +2990,77 @@
Elf_Internal_Rela outrel;
bfd_byte *loc;
int dr_type, indx;
+ asection *sreloc;
if (htab->srelgot == NULL)
abort ();
+ indx = h && h->dynindx != -1 ? h->dynindx : 0;
+
+ if (GOT_TLS_GDESC_P (tls_type))
+ {
+ outrel.r_info = ELF32_R_INFO (indx, R_386_TLS_DESC);
+ BFD_ASSERT (htab->sgotplt_jump_table_size + offplt + 8
+ <= htab->sgotplt->size);
+ outrel.r_offset = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + offplt
+ + htab->sgotplt_jump_table_size);
+ sreloc = htab->srelplt;
+ loc = sreloc->contents;
+ loc += (htab->next_tls_desc_index++
+ * sizeof (Elf32_External_Rel));
+ BFD_ASSERT (loc + sizeof (Elf32_External_Rel)
+ <= sreloc->contents + sreloc->size);
+ bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
+ if (indx == 0)
+ {
+ BFD_ASSERT (! unresolved_reloc);
+ bfd_put_32 (output_bfd,
+ relocation - dtpoff_base (info),
+ htab->sgotplt->contents + offplt
+ + htab->sgotplt_jump_table_size + 4);
+ }
+ else
+ {
+ bfd_put_32 (output_bfd, 0,
+ htab->sgotplt->contents + offplt
+ + htab->sgotplt_jump_table_size + 4);
+ }
+ }
+
+ sreloc = htab->srelgot;
+
outrel.r_offset = (htab->sgot->output_section->vma
+ htab->sgot->output_offset + off);
- indx = h && h->dynindx != -1 ? h->dynindx : 0;
- if (r_type == R_386_TLS_GD)
+ if (GOT_TLS_GD_P (tls_type))
dr_type = R_386_TLS_DTPMOD32;
+ else if (GOT_TLS_GDESC_P (tls_type))
+ goto dr_done;
else if (tls_type == GOT_TLS_IE_POS)
dr_type = R_386_TLS_TPOFF;
else
dr_type = R_386_TLS_TPOFF32;
+
if (dr_type == R_386_TLS_TPOFF && indx == 0)
bfd_put_32 (output_bfd, relocation - dtpoff_base (info),
htab->sgot->contents + off);
else if (dr_type == R_386_TLS_TPOFF32 && indx == 0)
bfd_put_32 (output_bfd, dtpoff_base (info) - relocation,
htab->sgot->contents + off);
- else
+ else if (dr_type != R_386_TLS_DESC)
bfd_put_32 (output_bfd, 0,
htab->sgot->contents + off);
outrel.r_info = ELF32_R_INFO (indx, dr_type);
- loc = htab->srelgot->contents;
- loc += htab->srelgot->reloc_count++ * sizeof (Elf32_External_Rel);
+
+ loc = sreloc->contents;
+ loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rel);
+ BFD_ASSERT (loc + sizeof (Elf32_External_Rel)
+ <= sreloc->contents + sreloc->size);
bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
- if (r_type == R_386_TLS_GD)
+ if (GOT_TLS_GD_P (tls_type))
{
if (indx == 0)
{
@@ -2811,8 +3076,10 @@
outrel.r_info = ELF32_R_INFO (indx,
R_386_TLS_DTPOFF32);
outrel.r_offset += 4;
- htab->srelgot->reloc_count++;
+ sreloc->reloc_count++;
loc += sizeof (Elf32_External_Rel);
+ BFD_ASSERT (loc + sizeof (Elf32_External_Rel)
+ <= sreloc->contents + sreloc->size);
bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
}
}
@@ -2823,25 +3090,33 @@
htab->sgot->contents + off + 4);
outrel.r_info = ELF32_R_INFO (indx, R_386_TLS_TPOFF);
outrel.r_offset += 4;
- htab->srelgot->reloc_count++;
+ sreloc->reloc_count++;
loc += sizeof (Elf32_External_Rel);
bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc);
}
+ dr_done:
if (h != NULL)
h->got.offset |= 1;
else
local_got_offsets[r_symndx] |= 1;
}
- if (off >= (bfd_vma) -2)
+ if (off >= (bfd_vma) -2
+ && ! GOT_TLS_GDESC_P (tls_type))
abort ();
- if (r_type == ELF32_R_TYPE (rel->r_info))
+ if (r_type == R_386_TLS_GOTDESC
+ || r_type == R_386_TLS_DESC_CALL)
{
+ relocation = htab->sgotplt_jump_table_size + offplt;
+ unresolved_reloc = FALSE;
+ }
+ else if (r_type == ELF32_R_TYPE (rel->r_info))
+ {
bfd_vma g_o_t = htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset;
relocation = htab->sgot->output_section->vma
- + htab->sgot->output_offset + off - g_o_t;
+ + htab->sgot->output_offset + off - g_o_t;
if ((r_type == R_386_TLS_IE || r_type == R_386_TLS_GOTIE)
&& tls_type == GOT_TLS_IE_BOTH)
relocation += 4;
@@ -2849,7 +3124,7 @@
relocation += g_o_t;
unresolved_reloc = FALSE;
}
- else
+ else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_GD)
{
unsigned int val, type;
bfd_vma roff;
@@ -2913,6 +3188,94 @@
rel++;
continue;
}
+ else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_GOTDESC)
+ {
+ /* GDesc -> IE transition.
+ It's originally something like:
+ leal x at tlsdesc(%ebx), %eax
+
+ Change it to:
+ movl x at gotntpoff(%ebx), %eax # before nop; nop
+ or:
+ movl x at gottpoff(%ebx), %eax # before negl %eax
+
+ Registers other than %eax may be set up here. */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a leal adding ebx to a 32-bit
+ offset into any register, although it's probably
+ almost always going to be eax. */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff >= 2);
+ type = bfd_get_8 (input_bfd, contents + roff - 2);
+ BFD_ASSERT (type == 0x8d);
+ val = bfd_get_8 (input_bfd, contents + roff - 1);
+ BFD_ASSERT ((val & 0xc7) == 0x83);
+ BFD_ASSERT (roff + 4 <= input_section->size);
+
+ /* Now modify the instruction as appropriate. */
+ /* To turn a leal into a movl in the form we use it, it
+ suffices to change the first byte from 0x8d to 0x8b.
+ aoliva FIXME: should we decide to keep the leal, all
+ we have to do is remove the statement below, and
+ adjust the relaxation of R_386_TLS_DESC_CALL. */
+ bfd_put_8 (output_bfd, 0x8b, contents + roff - 2);
+
+ if (tls_type == GOT_TLS_IE_BOTH)
+ off += 4;
+
+ bfd_put_32 (output_bfd,
+ htab->sgot->output_section->vma
+ + htab->sgot->output_offset + off
+ - htab->sgotplt->output_section->vma
+ - htab->sgotplt->output_offset,
+ contents + roff);
+ continue;
+ }
+ else if (ELF32_R_TYPE (rel->r_info) == R_386_TLS_DESC_CALL)
+ {
+ /* GDesc -> IE transition.
+ It's originally:
+ call *(%eax)
+
+ Change it to:
+ nop; nop
+ or
+ negl %eax
+ depending on how we transformed the TLS_GOTDESC above.
+ */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a call *(%eax). */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff + 2 <= input_section->size);
+ type = bfd_get_8 (input_bfd, contents + roff);
+ BFD_ASSERT (type == 0xff);
+ val = bfd_get_8 (input_bfd, contents + roff + 1);
+ BFD_ASSERT (val == 0x10);
+
+ /* Now modify the instruction as appropriate. */
+ if (tls_type != GOT_TLS_IE_NEG)
+ {
+ /* nop; nop */
+ bfd_put_8 (output_bfd, 0x90, contents + roff);
+ bfd_put_8 (output_bfd, 0x90, contents + roff + 1);
+ }
+ else
+ {
+ /* negl %eax */
+ bfd_put_8 (output_bfd, 0xf7, contents + roff);
+ bfd_put_8 (output_bfd, 0xd8, contents + roff + 1);
+ }
+
+ continue;
+ }
+ else
+ BFD_ASSERT (FALSE);
break;
case R_386_TLS_LDM:
@@ -3161,7 +3524,7 @@
rel.r_offset = (htab->splt->output_section->vma
+ htab->splt->output_offset
+ h->plt.offset + 2),
- rel.r_info = ELF32_R_INFO (htab->hgot->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
/* Create the R_386_32 relocation referencing the beginning of
@@ -3169,7 +3532,7 @@
rel.r_offset = (htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset
+ got_offset);
- rel.r_info = ELF32_R_INFO (htab->hplt->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hplt->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel,
loc + sizeof (Elf32_External_Rel));
}
@@ -3220,7 +3583,7 @@
}
if (h->got.offset != (bfd_vma) -1
- && elf_i386_hash_entry(h)->tls_type != GOT_TLS_GD
+ && ! GOT_TLS_GD_ANY_P (elf_i386_hash_entry(h)->tls_type)
&& (elf_i386_hash_entry(h)->tls_type & GOT_TLS_IE) == 0)
{
Elf_Internal_Rela rel;
@@ -3286,8 +3649,7 @@
On VxWorks, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it
is relative to the ".got" section. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || (strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- && !htab->is_vxworks))
+ || (!htab->is_vxworks && h == htab->elf.hgot))
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -3423,28 +3785,21 @@
if (htab->is_vxworks)
{
Elf_Internal_Rela rel;
- struct elf_link_hash_entry *hgot;
- /* The VxWorks GOT is relocated by the dynamic linker.
- Therefore, we must emit relocations rather than
- simply computing the values now. */
- hgot = elf_link_hash_lookup (elf_hash_table (info),
- "_GLOBAL_OFFSET_TABLE_",
- FALSE, FALSE, FALSE);
/* Generate a relocation for _GLOBAL_OFFSET_TABLE_ + 4.
On IA32 we use REL relocations so the addend goes in
the PLT directly. */
rel.r_offset = (htab->splt->output_section->vma
+ htab->splt->output_offset
+ 2);
- rel.r_info = ELF32_R_INFO (hgot->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel,
htab->srelplt2->contents);
/* Generate a relocation for _GLOBAL_OFFSET_TABLE_ + 8. */
rel.r_offset = (htab->splt->output_section->vma
+ htab->splt->output_offset
+ 8);
- rel.r_info = ELF32_R_INFO (hgot->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel,
htab->srelplt2->contents +
sizeof (Elf32_External_Rel));
@@ -3472,12 +3827,12 @@
{
Elf_Internal_Rela rel;
bfd_elf32_swap_reloc_in (output_bfd, p, &rel);
- rel.r_info = ELF32_R_INFO (htab->hgot->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel, p);
p += sizeof (Elf32_External_Rel);
bfd_elf32_swap_reloc_in (output_bfd, p, &rel);
- rel.r_info = ELF32_R_INFO (htab->hplt->indx, R_386_32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hplt->indx, R_386_32);
bfd_elf32_swap_reloc_out (output_bfd, &rel, p);
p += sizeof (Elf32_External_Rel);
}
@@ -3555,6 +3910,7 @@
#define elf_backend_reloc_type_class elf_i386_reloc_type_class
#define elf_backend_relocate_section elf_i386_relocate_section
#define elf_backend_size_dynamic_sections elf_i386_size_dynamic_sections
+#define elf_backend_always_size_sections elf_i386_always_size_sections
#define elf_backend_plt_sym_val elf_i386_plt_sym_val
#include "elf32-target.h"
@@ -3621,23 +3977,6 @@
}
-/* Tweak magic VxWorks symbols as they are written to the output file. */
-static bfd_boolean
-elf_i386_vxworks_link_output_symbol_hook (struct bfd_link_info *info
- ATTRIBUTE_UNUSED,
- const char *name,
- Elf_Internal_Sym *sym,
- asection *input_sec ATTRIBUTE_UNUSED,
- struct elf_link_hash_entry *h
- ATTRIBUTE_UNUSED)
-{
- /* Ignore the first dummy symbol. */
- if (!name)
- return TRUE;
-
- return elf_vxworks_link_output_symbol_hook (name, sym);
-}
-
#undef elf_backend_post_process_headers
#undef bfd_elf32_bfd_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_create \
@@ -3647,7 +3986,7 @@
elf_vxworks_add_symbol_hook
#undef elf_backend_link_output_symbol_hook
#define elf_backend_link_output_symbol_hook \
- elf_i386_vxworks_link_output_symbol_hook
+ elf_vxworks_link_output_symbol_hook
#undef elf_backend_emit_relocs
#define elf_backend_emit_relocs elf_vxworks_emit_relocs
#undef elf_backend_final_write_processing
Modified: branches/binutils/package/bfd/elf32-m32c.c
===================================================================
--- branches/binutils/package/bfd/elf32-m32c.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-m32c.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* M16C/M32C specific support for 32-bit ELF.
- Copyright (C) 2005
+ Copyright (C) 2005, 2006
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -74,7 +74,7 @@
"R_M32C_16", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x0000ffff, /* dst_mask */
+ 0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_M32C_24, /* type */
@@ -88,7 +88,7 @@
"R_M32C_24", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x00ffffff, /* dst_mask */
+ 0xffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_M32C_32, /* type */
@@ -116,7 +116,7 @@
"R_M32C_8_PCREL", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x000000ff, /* dst_mask */
+ 0xff, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_M32C_16_PCREL, /* type */
@@ -130,7 +130,7 @@
"R_M32C_16_PCREL", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0, /* dst_mask */
+ 0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_M32C_8, /* type */
@@ -144,7 +144,7 @@
"R_M32C_8", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x000000ff, /* dst_mask */
+ 0xff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_M32C_LO16, /* type */
@@ -158,7 +158,7 @@
"R_M32C_LO16", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x0000ffff, /* dst_mask */
+ 0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_M32C_HI8, /* type */
@@ -172,7 +172,7 @@
"R_M32C_HI8", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x000000ff, /* dst_mask */
+ 0xff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_M32C_HI16, /* type */
@@ -186,8 +186,51 @@
"R_M32C_HI16", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
- 0x0000ffff, /* dst_mask */
+ 0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
+
+ HOWTO (R_M32C_RL_JUMP, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M32C_RL_JUMP", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_M32C_RL_1ADDR, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M32C_RL_1ADDR", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_M32C_RL_2ADDR, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M32C_RL_2ADDR", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
};
/* Map BFD reloc types to M32C ELF reloc types. */
@@ -209,7 +252,10 @@
{ BFD_RELOC_8, R_M32C_8 },
{ BFD_RELOC_LO16, R_M32C_LO16 },
{ BFD_RELOC_HI16, R_M32C_HI16 },
- { BFD_RELOC_M32C_HI8, R_M32C_HI8 }
+ { BFD_RELOC_M32C_HI8, R_M32C_HI8 },
+ { BFD_RELOC_M32C_RL_JUMP, R_M32C_RL_JUMP },
+ { BFD_RELOC_M32C_RL_1ADDR, R_M32C_RL_1ADDR },
+ { BFD_RELOC_M32C_RL_2ADDR, R_M32C_RL_2ADDR }
};
static reloc_howto_type *
@@ -316,6 +362,13 @@
int r_type;
r_type = ELF32_R_TYPE (rel->r_info);
+
+ /* These are only used for relaxing; we don't actually relocate
+ anything with them, so skip them. */
+ if (r_type == R_M32C_RL_JUMP
+ || r_type == R_M32C_RL_1ADDR
+ || r_type == R_M32C_RL_2ADDR)
+ continue;
r_symndx = ELF32_R_SYM (rel->r_info);
@@ -344,7 +397,7 @@
h = NULL;
sym = NULL;
sec = NULL;
-
+
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
@@ -355,7 +408,7 @@
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
- name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
+ name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
@@ -429,6 +482,22 @@
relocation = (splt->output_section->vma
+ splt->output_offset
+ (*plt_offset & -2));
+ if (name)
+ {
+ char *newname = bfd_malloc (strlen(name)+5);
+ strcpy (newname, name);
+ strcat(newname, ".plt");
+ _bfd_generic_link_add_one_symbol (info,
+ input_bfd,
+ newname,
+ BSF_FUNCTION | BSF_WEAK,
+ splt,
+ (*plt_offset & -2),
+ 0,
+ 1,
+ 0,
+ 0);
+ }
}
}
break;
@@ -439,6 +508,18 @@
break;
}
+#if 0
+ printf ("relocate %s at %06lx relocation %06lx addend %ld ",
+ m32c_elf_howto_table[ELF32_R_TYPE(rel->r_info)].name,
+ rel->r_offset + input_section->output_section->vma + input_section->output_offset,
+ relocation, rel->r_addend);
+ {
+ int i;
+ for (i=0; i<4; i++)
+ printf (" %02x", contents[rel->r_offset+i]);
+ printf ("\n");
+ }
+#endif
r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, relocation,
rel->r_addend);
@@ -1143,169 +1224,169 @@
return TRUE;
}
-struct relax_reloc_s
+static int
+compare_reloc (const void *e1, const void *e2)
{
- int machine;
- int opcode_mask;
- bfd_vma opcode; /* original opcode or insn part */
- int relax_backward; /* lbound */
- int relax_forward; /* hbound */
- int value_shift;
- int mask;
- int new_opcode; /* new opcode */
- int old_reloc; /* old relocation */
- int new_reloc; /* new relocation */
- int use_pcrel;
- int delete_n; /* # bytes differ between original and new */
-};
-static struct relax_reloc_s relax_reloc [] =
- {
-#if 0
+ const Elf_Internal_Rela *i1 = (const Elf_Internal_Rela *) e1;
+ const Elf_Internal_Rela *i2 = (const Elf_Internal_Rela *) e2;
+
+ if (i1->r_offset == i2->r_offset)
+ return 0;
+ else
+ return i1->r_offset < i2->r_offset ? -1 : 1;
+}
+
+#define OFFSET_FOR_RELOC(rel) m32c_offset_for_reloc (abfd, rel, symtab_hdr, shndx_buf, intsyms)
+static bfd_vma
+m32c_offset_for_reloc (bfd *abfd,
+ Elf_Internal_Rela *rel,
+ Elf_Internal_Shdr *symtab_hdr,
+ Elf_External_Sym_Shndx *shndx_buf,
+ Elf_Internal_Sym *intsyms)
+{
+ bfd_vma symval;
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
{
- bfd_mach_m16c,
- 0xff,
- 0xfc, /* jmp.a */
- -32768,
- 32767,
- 2,
- 0xffffff00,
- 0xf4, /* jmp.w */
- R_M32C_8_ELABEL24,
- R_M32C_8_PCREL16,
- 1,
- 1,
- },
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ Elf_External_Sym_Shndx *shndx;
+ asection *ssec;
+
+
+ isym = intsyms + ELF32_R_SYM (rel->r_info);
+ ssec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ shndx = shndx_buf + (shndx_buf ? ELF32_R_SYM (rel->r_info) : 0);
+
+ symval = isym->st_value;
+ if (ssec)
+ symval += ssec->output_section->vma
+ + ssec->output_offset;
+ }
+ else
{
- bfd_mach_m32c,
- 0xff,
- 0xcc, /* jmp.a */
- -32768,
- 32767,
- 2,
- 0xffffff00,
- 0xce, /* jmp.w */
- R_M32C_8_ELABEL24,
- R_M32C_8_PCREL16,
- 1,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xff,
- 0xcd, /* jsr.a */
- -32768,
- 32767,
- 2,
- 0xffffff00,
- 0xcf, /* jsr.w */
- R_M32C_8_ELABEL24,
- R_M32C_8_PCREL16,
- 1,
- 1,
- },
- {
- bfd_mach_m16c,
- 0xff,
- 0xf4, /* jmp.w */
- -128,
- 127,
- 2,
- 0xffffff00,
- 0xfe, /* jmp.b */
- R_M32C_8_PCREL16,
- R_M32C_8_PCREL8,
- 1,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xff,
- 0xce, /* jmp.w */
- -128,
- 127,
- 2,
- 0xffffff00,
- 0xbb, /* jmp.b */
- R_M32C_8_PCREL16,
- R_M32C_8_PCREL8,
- 1,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xc0f6,
- 0x8096, /* dest */
- 0,
- 0xffff,
- 3,
- 0xffff3fff,
- 0xc000, /* abs16 */
- R_M32C_24_ABS24,
- R_M32C_24_ABS16,
- 0,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xc0f6,
- 0x80a6, /* dest */
- 0,
- 0xffff,
- 4,
- 0xffff3fff,
- 0xc000, /* abs16 */
- R_M32C_32_ABS24,
- R_M32C_32_ABS16,
- 0,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xc0f6,
- 0x80b6, /* dest */
- 0,
- 0xffff,
- 5,
- 0xffff3fff,
- 0xc000, /* abs16 */
- R_M32C_40_ABS24,
- R_M32C_40_ABS16,
- 0,
- 1,
- },
- {
- bfd_mach_m32c,
- 0x30f0,
- 0x20b0, /* src */
- 0,
- 0xffff,
- 2,
- 0xffffcfff,
- 0x3000, /* abs16 */
- R_M32C_16_ABS24,
- R_M32C_16_ABS16,
- 0,
- 1,
- },
- {
- bfd_mach_m32c,
- 0xc086,
- 0x8086, /* dest */
- 0,
- 0xffff,
- 2,
- 0xffff3fff,
- 0xc000, /* abs16 */
- R_M32C_16_ABS24,
- R_M32C_16_ABS16,
- 0,
- 1,
- },
-#endif
- {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it--it will be caught by the
+ regular reloc processing. */
+ return 0;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
}
- };
+ return symval;
+}
+
+static int bytes_saved = 0;
+
+static int bytes_to_reloc[] = {
+ R_M32C_NONE,
+ R_M32C_8,
+ R_M32C_16,
+ R_M32C_24,
+ R_M32C_32
+};
+
+/* What we use the bits in a relax reloc addend (R_M32C_RL_*) for. */
+
+/* Mask for the number of relocs associated with this insn. */
+#define RLA_RELOCS 0x0000000f
+/* Number of bytes gas emitted (before gas's relaxing) */
+#define RLA_NBYTES 0x00000ff0
+
+/* If the displacement is within the given range and the new encoding
+ differs from the old encoding (the index), then the insn can be
+ relaxed to the new encoding. */
+typedef struct {
+ int bytes;
+ unsigned int max_disp;
+ unsigned char new_encoding;
+} EncodingTable;
+
+static EncodingTable m16c_addr_encodings[] = {
+ { 0, 0, 0 }, /* R0 */
+ { 0, 0, 1 }, /* R1 */
+ { 0, 0, 2 }, /* R2 */
+ { 0, 0, 3 }, /* R3 */
+ { 0, 0, 4 }, /* A0 */
+ { 0, 0, 5 }, /* A1 */
+ { 0, 0, 6 }, /* [A0] */
+ { 0, 0, 7 }, /* [A1] */
+ { 1, 0, 6 }, /* udsp:8[A0] */
+ { 1, 0, 7 }, /* udsp:8[A1] */
+ { 1, 0, 10 }, /* udsp:8[SB] */
+ { 1, 0, 11 }, /* sdsp:8[FB] */
+ { 2, 255, 8 }, /* udsp:16[A0] */
+ { 2, 255, 9 }, /* udsp:16[A1] */
+ { 2, 255, 10 }, /* udsp:16[SB] */
+ { 2, 0, 15 }, /* abs:16 */
+};
+
+static EncodingTable m16c_jmpaddr_encodings[] = {
+ { 0, 0, 0 }, /* R0 */
+ { 0, 0, 1 }, /* R1 */
+ { 0, 0, 2 }, /* R2 */
+ { 0, 0, 3 }, /* R3 */
+ { 0, 0, 4 }, /* A0 */
+ { 0, 0, 5 }, /* A1 */
+ { 0, 0, 6 }, /* [A0] */
+ { 0, 0, 7 }, /* [A1] */
+ { 1, 0, 6 }, /* udsp:8[A0] */
+ { 1, 0, 7 }, /* udsp:8[A1] */
+ { 1, 0, 10 }, /* udsp:8[SB] */
+ { 1, 0, 11 }, /* sdsp:8[FB] */
+ { 3, 255, 8 }, /* udsp:20[A0] */
+ { 3, 255, 9 }, /* udsp:20[A1] */
+ { 2, 255, 10 }, /* udsp:16[SB] */
+ { 2, 0, 15 }, /* abs:16 */
+};
+
+static EncodingTable m32c_addr_encodings[] = {
+ { 0, 0, 0 }, /* [A0] */
+ { 0, 0, 1 }, /* [A1] */
+ { 0, 0, 2 }, /* A0 */
+ { 0, 0, 3 }, /* A1 */
+ { 1, 0, 0 }, /* udsp:8[A0] */
+ { 1, 0, 1 }, /* udsp:8[A1] */
+ { 1, 0, 6 }, /* udsp:8[SB] */
+ { 1, 0, 7 }, /* sdsp:8[FB] */
+ { 2, 255, 4 }, /* udsp:16[A0] */
+ { 2, 255, 5 }, /* udsp:16[A1] */
+ { 2, 255, 6 }, /* udsp:16[SB] */
+ { 2, 127, 7 }, /* sdsp:16[FB] */
+ { 3, 65535, 8 }, /* udsp:24[A0] */
+ { 3, 65535, 9 }, /* udsp:24[A1] */
+ { 3, 65535, 15 }, /* abs24 */
+ { 2, 0, 15 }, /* abs16 */
+ { 0, 0, 16 }, /* R2 */
+ { 0, 0, 17 }, /* R3 */
+ { 0, 0, 18 }, /* R0 */
+ { 0, 0, 19 }, /* R1 */
+ { 0, 0, 20 }, /* */
+ { 0, 0, 21 }, /* */
+ { 0, 0, 22 }, /* */
+ { 0, 0, 23 }, /* */
+ { 0, 0, 24 }, /* */
+ { 0, 0, 25 }, /* */
+ { 0, 0, 26 }, /* */
+ { 0, 0, 27 }, /* */
+ { 0, 0, 28 }, /* */
+ { 0, 0, 29 }, /* */
+ { 0, 0, 30 }, /* */
+ { 0, 0, 31 }, /* */
+};
+
static bfd_boolean
m32c_elf_relax_section
(bfd * abfd,
@@ -1317,11 +1398,11 @@
Elf_Internal_Shdr *shndx_hdr;
Elf_Internal_Rela *internal_relocs;
Elf_Internal_Rela *free_relocs = NULL;
- Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Rela *irel, *irelend, *srel;
bfd_byte * contents = NULL;
bfd_byte * free_contents = NULL;
- Elf32_External_Sym *extsyms = NULL;
- Elf32_External_Sym *free_extsyms = NULL;
+ Elf_Internal_Sym *intsyms = NULL;
+ Elf_Internal_Sym *free_intsyms = NULL;
Elf_External_Sym_Shndx *shndx_buf = NULL;
int machine;
@@ -1343,12 +1424,43 @@
|| (sec->flags & SEC_CODE) == 0)
return TRUE;
- /* Relaxing doesn't quite work right yet. */
- return TRUE;
-
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
+ /* Get the section contents. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ /* Go get them off disk. */
+ else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+
+ /* Read this BFD's symbols. */
+ /* Get cached copy if it exists. */
+ if (symtab_hdr->contents != NULL)
+ {
+ intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
+ }
+ else
+ {
+ intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
+ symtab_hdr->contents = (bfd_byte *) intsyms;
+ }
+
+ if (shndx_hdr->sh_size != 0)
+ {
+ bfd_size_type amt;
+
+ amt = symtab_hdr->sh_info;
+ amt *= sizeof (Elf_External_Sym_Shndx);
+ shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
+ if (shndx_buf == NULL)
+ goto error_return;
+ if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
+ || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
+ goto error_return;
+ shndx_hdr->contents = (bfd_byte *) shndx_buf;
+ }
+
/* Get a copy of the native relocations. */
internal_relocs = (_bfd_elf_link_read_relocs
(abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
@@ -1358,188 +1470,389 @@
if (! link_info->keep_memory)
free_relocs = internal_relocs;
+ /* The RL_ relocs must be just before the operand relocs they go
+ with, so we must sort them to guarantee this. */
+ qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
+ compare_reloc);
+
/* Walk through them looking for relaxing opportunities. */
irelend = internal_relocs + sec->reloc_count;
for (irel = internal_relocs; irel < irelend; irel++)
{
bfd_vma symval;
- bfd_vma insn;
+ unsigned char *insn, *gap, *einsn;
bfd_vma pc;
- bfd_signed_vma pcrel_value;
- bfd_vma addend;
- int to_delete;
- int i;
+ bfd_signed_vma pcrel;
+ int relax_relocs;
+ int gap_size;
+ int new_type;
+ int posn;
+ int enc;
+ EncodingTable *enctbl;
+ EncodingTable *e;
- /* Get the section contents. */
- if (contents == NULL)
+ if (ELF32_R_TYPE(irel->r_info) != R_M32C_RL_JUMP
+ && ELF32_R_TYPE(irel->r_info) != R_M32C_RL_1ADDR
+ && ELF32_R_TYPE(irel->r_info) != R_M32C_RL_2ADDR)
+ continue;
+
+ srel = irel;
+
+ /* There will always be room for the relaxed insn, since it is smaller
+ than the one it would replace. */
+ BFD_ASSERT (irel->r_offset < sec->size);
+
+ insn = contents + irel->r_offset;
+ relax_relocs = irel->r_addend % 16;
+
+ /* Ok, we only have three relocs we care about, and they're all
+ fake. The lower four bits of the addend is always the number
+ of following relocs (hence the qsort above) that are assigned
+ to this opcode. The next 8 bits of the addend indicates the
+ number of bytes in the insn. We use the rest of them
+ ourselves as flags for the more expensive operations (defines
+ above). The three relocs are:
+
+ RL_JUMP: This marks all direct jump insns. We check the
+ displacement and replace them with shorter jumps if
+ they're in range. We also use this to find JMP.S
+ insns and manually shorten them when we delete bytes.
+ We have to decode these insns to figure out what to
+ do.
+
+ RL_1ADDR: This is a :G or :Q insn, which has a single
+ "standard" operand. We have to extract the type
+ field, see if it's a wide displacement, then figure
+ out if we can replace it with a narrow displacement.
+ We don't have to decode these insns.
+
+ RL_2ADDR: Similarly, but two "standard" operands. Note that
+ r_addend may still be 1, as standard operands don't
+ always have displacements. Gas shouldn't give us one
+ with zero operands, but since we don't know which one
+ has the displacement, we check them both anyway.
+
+ These all point to the beginning of the insn itself, not the
+ operands.
+
+ Note that we only relax one step at a time, relying on the
+ linker to call us repeatedly. Thus, there is no code for
+ JMP.A->JMP.B although that will happen in two steps.
+ Likewise, for 2ADDR relaxes, we do one operand per cycle.
+ */
+
+ /* Get the value of the symbol referred to by the reloc. Just
+ in case this is the last reloc in the list, use the RL's
+ addend to choose between this reloc (no addend) or the next
+ (yes addend, which means at least one following reloc). */
+ srel = irel + (relax_relocs ? 1 : 0);
+ symval = OFFSET_FOR_RELOC (srel);
+
+ /* Setting gap_size nonzero is the flag which means "something
+ shrunk". */
+ gap_size = 0;
+ gap = NULL;
+ new_type = ELF32_R_TYPE(srel->r_info);
+
+ pc = sec->output_section->vma + sec->output_offset
+ + srel->r_offset;
+ pcrel = symval - pc + srel->r_addend;
+
+ if (machine == bfd_mach_m16c)
{
- if (elf_section_data (sec)->this_hdr.contents != NULL)
- contents = elf_section_data (sec)->this_hdr.contents;
- /* Go get them off disk. */
- else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
- goto error_return;
- }
+ /* R8C / M16C */
- /* Read this BFD's symbols if we haven't done so already. */
- if (extsyms == NULL)
- {
- /* Get cached copy if it exists. */
- if (symtab_hdr->contents != NULL)
- extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
- else
+ switch (ELF32_R_TYPE(irel->r_info))
{
- bfd_size_type amt = symtab_hdr->sh_size;
- /* Go get them off disk. */
- extsyms = (Elf32_External_Sym *) bfd_malloc (amt);
- if (extsyms == NULL)
- goto error_return;
- free_extsyms = extsyms;
- if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0
- || bfd_bread (extsyms, amt, abfd) != amt)
- goto error_return;
- symtab_hdr->contents = (bfd_byte *) extsyms;
- }
+ case R_M32C_RL_JUMP:
+ switch (insn[0])
+ {
+ case 0xfe: /* jmp.b */
+ if (pcrel >= 2 && pcrel <= 9)
+ {
+ /* Relax JMP.B -> JMP.S. We need to get rid of
+ the following reloc though. */
+ insn[0] = 0x60 | (pcrel - 2);
+ new_type = R_M32C_NONE;
+ irel->r_addend = 0x10;
+ gap_size = 1;
+ gap = insn + 1;
+ }
+ break;
- if (shndx_hdr->sh_size != 0)
- {
- bfd_size_type amt;
+ case 0xf4: /* jmp.w */
+ /* 128 is allowed because it will be one byte closer
+ after relaxing. Likewise for all other pc-rel
+ jumps. */
+ if (pcrel <= 128 && pcrel >= -128)
+ {
+ /* Relax JMP.W -> JMP.B */
+ insn[0] = 0xfe;
+ insn[1] = 0;
+ new_type = R_M32C_8_PCREL;
+ gap_size = 1;
+ gap = insn + 2;
+ }
+ break;
- amt = symtab_hdr->sh_info;
- amt *= sizeof (Elf_External_Sym_Shndx);
- shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
- if (shndx_buf == NULL)
- goto error_return;
- if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
- || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
- goto error_return;
- shndx_hdr->contents = (bfd_byte *) shndx_buf;
- }
- }
+ case 0xfc: /* jmp.a */
+ if (pcrel <= 32768 && pcrel >= -32768)
+ {
+ /* Relax JMP.A -> JMP.W */
+ insn[0] = 0xf4;
+ insn[1] = 0;
+ insn[2] = 0;
+ new_type = R_M32C_16_PCREL;
+ gap_size = 1;
+ gap = insn + 3;
+ }
+ break;
- /* Get the value of the symbol referred to by the reloc. */
- if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
- {
- /* A local symbol. */
- Elf32_External_Sym *esym;
- Elf_External_Sym_Shndx *shndx;
- Elf_Internal_Sym isym;
+ case 0xfd: /* jsr.a */
+ if (pcrel <= 32768 && pcrel >= -32768)
+ {
+ /* Relax JSR.A -> JSR.W */
+ insn[0] = 0xf5;
+ insn[1] = 0;
+ insn[2] = 0;
+ new_type = R_M32C_16_PCREL;
+ gap_size = 1;
+ gap = insn + 3;
+ }
+ break;
+ }
+ break;
- esym = extsyms + ELF32_R_SYM (irel->r_info);
- shndx = shndx_buf + (shndx_buf ? ELF32_R_SYM (irel->r_info) : 0);
- bfd_elf32_swap_symbol_in (abfd, esym, shndx, &isym);
+ case R_M32C_RL_2ADDR:
+ /* xxxx xxxx srce dest [src-disp] [dest-disp]*/
- symval = (isym.st_value
- + sec->output_section->vma
- + sec->output_offset);
- }
- else
- {
- unsigned long indx;
- struct elf_link_hash_entry *h;
+ enctbl = m16c_addr_encodings;
+ posn = 2;
+ enc = (insn[1] >> 4) & 0x0f;
+ e = & enctbl[enc];
- /* An external symbol. */
- indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
- h = elf_sym_hashes (abfd)[indx];
- BFD_ASSERT (h != NULL);
+ if (srel->r_offset == irel->r_offset + posn
+ && e->new_encoding != enc
+ && symval <= e->max_disp)
+ {
+ insn[1] &= 0x0f;
+ insn[1] |= e->new_encoding << 4;
+ gap_size = e->bytes - enctbl[e->new_encoding].bytes;
+ gap = insn + posn + enctbl[e->new_encoding].bytes;
+ new_type = bytes_to_reloc[enctbl[e->new_encoding].bytes];
+ break;
+ }
+ if (relax_relocs == 2)
+ srel ++;
+ posn += e->bytes;
- if (h->root.type != bfd_link_hash_defined
- && h->root.type != bfd_link_hash_defweak)
- /* This appears to be a reference to an undefined
- symbol. Just ignore it--it will be caught by the
- regular reloc processing. */
- continue;
+ goto try_1addr_16;
- symval = (h->root.u.def.value
- + h->root.u.def.section->output_section->vma
- + h->root.u.def.section->output_offset);
- }
+ case R_M32C_RL_1ADDR:
+ /* xxxx xxxx xxxx dest [disp] */
- /* There will always be room for the relaxed insn, since it is smaller
- than the one it would replace. */
- BFD_ASSERT (irel->r_offset <= sec->size - 2);
+ enctbl = m16c_addr_encodings;
+ posn = 2;
+
+ /* Check the opcode for jumps. We know it's safe to
+ do this because all 2ADDR insns are at least two
+ bytes long. */
+ enc = insn[0] * 256 + insn[1];
+ enc &= 0xfff0;
+ if (enc == 0x7d20
+ || enc == 0x7d00
+ || enc == 0x7d30
+ || enc == 0x7d10)
+ {
+ enctbl = m16c_jmpaddr_encodings;
+ }
- insn = bfd_get_16 (abfd, contents + irel->r_offset + 0);
+ try_1addr_16:
+ /* srel, posn, and enc must be set here. */
- addend = irel->r_addend;
- for (i = 0; relax_reloc[i].machine; i++)
+ symval = OFFSET_FOR_RELOC (srel);
+ enc = insn[1] & 0x0f;
+ e = & enctbl[enc];
+
+ if (srel->r_offset == irel->r_offset + posn
+ && e->new_encoding != enc
+ && symval <= e->max_disp)
+ {
+ insn[1] &= 0xf0;
+ insn[1] |= e->new_encoding;
+ gap_size = e->bytes - enctbl[e->new_encoding].bytes;
+ gap = insn + posn + enctbl[e->new_encoding].bytes;
+ new_type = bytes_to_reloc[enctbl[e->new_encoding].bytes];
+ break;
+ }
+
+ break;
+
+ } /* Ends switch (reloc type) for m16c. */
+ }
+ else /* machine == bfd_mach_m32c */
{
-#ifdef DEBUG
- _bfd_error_handler ("insn %x %d mask %x opcode %x =%x\n",
- insn, i, relax_reloc[i].opcode_mask,
- relax_reloc[i].opcode,
- (insn & relax_reloc[i].opcode_mask) == relax_reloc[i].opcode);
-#endif
- if (!(machine == relax_reloc[i].machine
- && (insn & relax_reloc[i].opcode_mask) == relax_reloc[i].opcode
- && (relax_reloc[i].old_reloc
- == (int) ELF32_R_TYPE(irel->r_info))))
- continue;
+ /* M32CM / M32C */
- /* At this point we've confirmed we have a matching insn. Now
- ensure the operand is in range. */
- if (relax_reloc[i].use_pcrel)
+ switch (ELF32_R_TYPE(irel->r_info))
{
- pc = sec->output_section->vma + sec->output_offset
- + irel->r_offset;
- pcrel_value = symval - pc;
-#ifndef USE_REL /* put in for learning purposes */
- pcrel_value += addend;
-#else
- addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
- pcrel_value += addend;
-#endif
- }
- else
- pcrel_value = symval;
- if (pcrel_value >= relax_reloc[i].relax_backward
- && pcrel_value < relax_reloc[i].relax_forward + 2)
- {
- /* We can relax to a shorter operand. */
- insn = (insn & relax_reloc[i].mask) | relax_reloc[i].new_opcode;
+ case R_M32C_RL_JUMP:
+ switch (insn[0])
+ {
+ case 0xbb: /* jmp.b */
+ if (pcrel >= 2 && pcrel <= 9)
+ {
+ int p = pcrel - 2;
+ /* Relax JMP.B -> JMP.S. We need to get rid of
+ the following reloc though. */
+ insn[0] = 0x4a | ((p << 3) & 0x30) | (p & 1);
+ new_type = R_M32C_NONE;
+ irel->r_addend = 0x10;
+ gap_size = 1;
+ gap = insn + 1;
+ }
+ break;
- to_delete = relax_reloc[i].delete_n;
+ case 0xce: /* jmp.w */
+ if (pcrel <= 128 && pcrel >= -128)
+ {
+ /* Relax JMP.W -> JMP.B */
+ insn[0] = 0xbb;
+ insn[1] = 0;
+ new_type = R_M32C_8_PCREL;
+ gap_size = 1;
+ gap = insn + 2;
+ }
+ break;
- /* Rewrite the insn. */
- bfd_put_16 (abfd, insn, contents + irel->r_offset);
+ case 0xcc: /* jmp.a */
+ if (pcrel <= 32768 && pcrel >= -32768)
+ {
+ /* Relax JMP.A -> JMP.W */
+ insn[0] = 0xce;
+ insn[1] = 0;
+ insn[2] = 0;
+ new_type = R_M32C_16_PCREL;
+ gap_size = 1;
+ gap = insn + 3;
+ }
+ break;
- /* Set the new reloc type. */
- irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
- relax_reloc[i].new_reloc);
- irel->r_addend = pcrel_value;
- }
- else
- continue;
+ case 0xcd: /* jsr.a */
+ if (pcrel <= 32768 && pcrel >= -32768)
+ {
+ /* Relax JSR.A -> JSR.W */
+ insn[0] = 0xcf;
+ insn[1] = 0;
+ insn[2] = 0;
+ new_type = R_M32C_16_PCREL;
+ gap_size = 1;
+ gap = insn + 3;
+ }
+ break;
+ }
+ break;
-#ifdef DEBUG
- _bfd_error_handler ("insn %x pc %x index %d mask %x shift %d delete %d\n"
- "old reloc %s new reloc %s",
- insn, sec->output_section->vma
- + sec->output_offset + irel->r_offset + 2,
- i, relax_reloc[i].opcode_mask,
- relax_reloc[i].value_shift, to_delete,
- m32c_get_reloc (relax_reloc[i].old_reloc),
- m32c_get_reloc (relax_reloc[i].new_reloc));
-#endif
+ case R_M32C_RL_2ADDR:
+ /* xSSS DDDx DDSS xxxx [src-disp] [dest-disp]*/
- /* Note that we've changed the relocs, section contents, etc. */
- elf_section_data (sec)->relocs = internal_relocs;
- free_relocs = NULL;
+ einsn = insn;
+ posn = 2;
+ if (einsn[0] == 1)
+ {
+ /* prefix; remove it as far as the RL reloc is concerned. */
+ einsn ++;
+ posn ++;
+ }
- elf_section_data (sec)->this_hdr.contents = contents;
- free_contents = NULL;
+ enctbl = m32c_addr_encodings;
+ enc = ((einsn[0] & 0x70) >> 2) | ((einsn[1] & 0x30) >> 4);
+ e = & enctbl[enc];
- symtab_hdr->contents = (bfd_byte *) extsyms;
- free_extsyms = NULL;
+ if (srel->r_offset == irel->r_offset + posn
+ && e->new_encoding != enc
+ && symval <= e->max_disp)
+ {
+ einsn[0] &= 0x8f;
+ einsn[0] |= (e->new_encoding & 0x1c) << 2;
+ einsn[1] &= 0xcf;
+ einsn[1] |= (e->new_encoding & 0x03) << 4;
+ gap_size = e->bytes - enctbl[e->new_encoding].bytes;
+ gap = insn + posn + enctbl[e->new_encoding].bytes;
+ new_type = bytes_to_reloc[enctbl[e->new_encoding].bytes];
+ break;
+ }
+ if (relax_relocs == 2)
+ srel ++;
+ posn += e->bytes;
- /* Delete TO_DELETE bytes of data. */
- if (! m32c_elf_relax_delete_bytes
- (abfd, sec, irel->r_offset + relax_reloc[i].value_shift,
- to_delete))
- goto error_return;
- } /* next relax_reloc */
+ goto try_1addr_32;
+
+ case R_M32C_RL_1ADDR:
+ /* xxxx DDDx DDxx xxxx [disp] */
+
+ einsn = insn;
+ posn = 2;
+ if (einsn[0] == 1)
+ {
+ /* prefix; remove it as far as the RL reloc is concerned. */
+ einsn ++;
+ posn ++;
+ }
+
+ enctbl = m32c_addr_encodings;
+
+ try_1addr_32:
+ /* srel, posn, and enc must be set here. */
+
+ symval = OFFSET_FOR_RELOC (srel);
+ enc = ((einsn[0] & 0x0e) << 1) | ((einsn[1] & 0xc0) >> 6);
+ e = & enctbl[enc];
+
+ if (srel->r_offset == irel->r_offset + posn
+ && e->new_encoding != enc
+ && symval <= e->max_disp)
+ {
+ einsn[0] &= 0xf1;
+ einsn[0] |= (e->new_encoding & 0x1c) >> 1;
+ einsn[1] &= 0x3f;
+ einsn[1] |= (e->new_encoding & 0x03) << 6;
+ gap_size = e->bytes - enctbl[e->new_encoding].bytes;
+ gap = insn + posn + enctbl[e->new_encoding].bytes;
+ new_type = bytes_to_reloc[enctbl[e->new_encoding].bytes];
+ break;
+ }
+
+ break;
+
+ } /* Ends switch (reloc type) for m32c. */
+ }
+
+ if (gap_size == 0)
+ continue;
+
+ *again = TRUE;
+
+ srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), new_type);
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ free_relocs = NULL;
+
+ elf_section_data (sec)->this_hdr.contents = contents;
+ free_contents = NULL;
+
+ symtab_hdr->contents = (bfd_byte *) intsyms;
+ free_intsyms = NULL;
+
+ bytes_saved += gap_size;
+
+ if (! m32c_elf_relax_delete_bytes(abfd, sec, gap - contents, gap_size))
+ goto error_return;
+
} /* next relocation */
if (free_relocs != NULL)
@@ -1565,18 +1878,18 @@
free (shndx_buf);
}
- if (free_extsyms != NULL)
+ if (free_intsyms != NULL)
{
if (! link_info->keep_memory)
- free (free_extsyms);
+ free (free_intsyms);
/* Cache the symbols for elf_link_input_bfd. */
else
- symtab_hdr->contents = NULL /* (unsigned char *) extsyms*/;
+ {
+ symtab_hdr->contents = NULL /* (unsigned char *) intsyms*/;
+ }
- free_extsyms = NULL;
+ free_intsyms = NULL;
}
- /* elf_link_input_bfd expects internal syms. */
- symtab_hdr->contents = NULL;
return TRUE;
@@ -1590,8 +1903,8 @@
shndx_hdr->contents = NULL;
free (shndx_buf);
}
- if (free_extsyms != NULL)
- free (free_extsyms);
+ if (free_intsyms != NULL)
+ free (free_intsyms);
return FALSE;
}
@@ -1612,20 +1925,15 @@
Elf_Internal_Rela *irelend;
Elf_Internal_Rela *irelalign;
bfd_vma toaddr;
- Elf32_External_Sym *esym;
- Elf32_External_Sym *esymend;
- Elf32_External_Sym *extsyms;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ Elf_Internal_Sym *intsyms;
Elf_External_Sym_Shndx *shndx_buf;
Elf_External_Sym_Shndx *shndx;
struct elf_link_hash_entry ** sym_hashes;
struct elf_link_hash_entry ** end_hashes;
unsigned int symcount;
-
- symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
- extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
- shndx_hdr = & elf_tdata (abfd)->symtab_shndx_hdr;
- shndx_buf = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
- sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+
contents = elf_section_data (sec)->this_hdr.contents;
/* The deletion must stop at the next ALIGN reloc for an aligment
@@ -1646,27 +1954,62 @@
/* Get the new reloc address. */
if (irel->r_offset > addr && irel->r_offset < toaddr)
irel->r_offset -= count;
- if (irel->r_addend > addr && irel->r_addend < toaddr)
- irel->r_addend -= count;
+
+ if (ELF32_R_TYPE(irel->r_info) == R_M32C_RL_JUMP
+ && irel->r_addend == 0x10 /* one byte insn, no relocs */
+ && irel->r_offset + 1 < addr
+ && irel->r_offset + 7 > addr)
+ {
+ bfd_vma disp;
+ unsigned char *insn = &contents[irel->r_offset];
+ disp = *insn;
+ /* This is a JMP.S, which we have to manually update. */
+ if (elf32_m32c_machine (abfd) == bfd_mach_m16c)
+ {
+ if ((*insn & 0xf8) != 0x60)
+ continue;
+ disp = (disp & 7);
+ }
+ else
+ {
+ if ((*insn & 0xce) != 0x4a)
+ continue;
+ disp = ((disp & 0x30) >> 3) | (disp & 1);
+ }
+ if (irel->r_offset + disp + 2 >= addr+count)
+ {
+ disp -= count;
+ if (elf32_m32c_machine (abfd) == bfd_mach_m16c)
+ {
+ *insn = (*insn & 0xf8) | disp;
+ }
+ else
+ {
+ *insn = (*insn & 0xce) | ((disp & 6) << 3) | (disp & 1);
+ }
+ }
+ }
}
/* Adjust the local symbols defined in this section. */
+ symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
+ intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
+ isym = intsyms;
+ isymend = isym + symtab_hdr->sh_info;
+
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+ shndx_hdr = & elf_tdata (abfd)->symtab_shndx_hdr;
+ shndx_buf = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
shndx = shndx_buf;
- esym = extsyms;
- esymend = esym + symtab_hdr->sh_info;
- for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
+
+ for (; isym < isymend; isym++, shndx = (shndx ? shndx + 1 : NULL))
{
- Elf_Internal_Sym isym;
- Elf_External_Sym_Shndx dummy;
- bfd_elf32_swap_symbol_in (abfd, esym, shndx, &isym);
-
- if ((int) isym.st_shndx == sec_shndx
- && isym.st_value > addr
- && isym.st_value < toaddr)
+ if ((int) isym->st_shndx == sec_shndx
+ && isym->st_value > addr
+ && isym->st_value < toaddr)
{
- isym.st_value -= count;
- bfd_elf32_swap_symbol_out (abfd, &isym, (PTR) esym, (PTR) & dummy);
+ isym->st_value -= count;
}
}
@@ -1687,7 +2030,9 @@
&& sym_hash->root.u.def.section == sec
&& sym_hash->root.u.def.value > addr
&& sym_hash->root.u.def.value < toaddr)
- sym_hash->root.u.def.value -= count;
+ {
+ sym_hash->root.u.def.value -= count;
+ }
}
return TRUE;
Modified: branches/binutils/package/bfd/elf32-m32r.c
===================================================================
--- branches/binutils/package/bfd/elf32-m32r.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-m32r.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* M32R-specific support for 32-bit ELF.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -1572,8 +1572,9 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- m32r_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ m32r_elf_link_hash_newfunc,
+ sizeof (struct elf_m32r_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1668,6 +1669,7 @@
h = (struct elf_link_hash_entry *) bh;
h->def_regular = 1;
h->type = STT_OBJECT;
+ htab->root.hplt = h;
if (info->shared
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
@@ -2101,6 +2103,24 @@
pp = &p->next;
}
}
+
+ /* Also discard relocs on undefined weak syms with non-default
+ visibility. */
+ if (eh->dyn_relocs != NULL
+ && h->root.type == bfd_link_hash_undefweak)
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else
{
@@ -3339,7 +3359,7 @@
/* Mark some specially defined symbols as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == htab->root.hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf32-m68hc1x.c
===================================================================
--- branches/binutils/package/bfd/elf32-m68hc1x.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-m68hc1x.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* Motorola 68HC11/HC12-specific support for 32-bit ELF
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez at nerim.fr)
@@ -70,8 +70,9 @@
return NULL;
memset (ret, 0, amt);
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- _bfd_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ _bfd_elf_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -85,7 +86,8 @@
free (ret);
return NULL;
}
- if (!bfd_hash_table_init (ret->stub_hash_table, stub_hash_newfunc))
+ if (!bfd_hash_table_init (ret->stub_hash_table, stub_hash_newfunc,
+ sizeof (struct elf32_m68hc11_stub_hash_entry)))
return NULL;
ret->stub_bfd = NULL;
Modified: branches/binutils/package/bfd/elf32-m68k.c
===================================================================
--- branches/binutils/package/bfd/elf32-m68k.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-m68k.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Motorola 68k series support for 32-bit ELF
Copyright 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -24,6 +24,7 @@
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/m68k.h"
+#include "opcode/m68k.h"
static reloc_howto_type *reloc_type_lookup
PARAMS ((bfd *, bfd_reloc_code_real_type));
@@ -220,7 +221,7 @@
#define CFV4E_PLT_ENTRY_SIZE 24
-#define CFV4E_FLAG(abfd) (elf_elfheader (abfd)->e_flags & EF_CFV4E)
+#define CFV4E_FLAG(abfd) (elf_elfheader (abfd)->e_flags & EF_M68K_CFV4E)
static const bfd_byte elf_cfv4e_plt0_entry[CFV4E_PLT_ENTRY_SIZE] =
{
@@ -248,7 +249,7 @@
0, 0, 0, 0 /* Replaced with offset to start of .plt. */
};
-#define CPU32_FLAG(abfd) (elf_elfheader (abfd)->e_flags & EF_CPU32)
+#define CPU32_FLAG(abfd) (elf_elfheader (abfd)->e_flags & EF_M68K_CPU32)
#define PLT_CPU32_ENTRY_SIZE 24
/* Procedure linkage table entries for the cpu32 */
@@ -360,8 +361,9 @@
if (ret == (struct elf_m68k_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- elf_m68k_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf_m68k_link_hash_newfunc,
+ sizeof (struct elf_m68k_link_hash_entry)))
{
free (ret);
return NULL;
@@ -372,6 +374,58 @@
return &ret->root.root;
}
+/* Set the right machine number. */
+
+static bfd_boolean
+elf32_m68k_object_p (bfd *abfd)
+{
+ unsigned int mach = 0;
+ unsigned features = 0;
+ flagword eflags = elf_elfheader (abfd)->e_flags;
+
+ if (eflags & EF_M68K_M68000)
+ features |= m68000;
+ else if (eflags & EF_M68K_CPU32)
+ features |= cpu32;
+ else if (eflags & EF_M68K_ISA_MASK)
+ {
+ switch (eflags & EF_M68K_ISA_MASK)
+ {
+ case EF_M68K_ISA_A_NODIV:
+ features |= mcfisa_a;
+ break;
+ case EF_M68K_ISA_A:
+ features |= mcfisa_a|mcfhwdiv;
+ break;
+ case EF_M68K_ISA_A_PLUS:
+ features |= mcfisa_a|mcfisa_aa|mcfhwdiv|mcfusp;
+ break;
+ case EF_M68K_ISA_B_NOUSP:
+ features |= mcfisa_a|mcfisa_b|mcfhwdiv;
+ break;
+ case EF_M68K_ISA_B:
+ features |= mcfisa_a|mcfisa_b|mcfhwdiv|mcfusp;
+ break;
+ }
+ switch (eflags & EF_M68K_MAC_MASK)
+ {
+ case EF_M68K_MAC:
+ features |= mcfmac;
+ break;
+ case EF_M68K_EMAC:
+ features |= mcfemac;
+ break;
+ }
+ if (eflags & EF_M68K_FLOAT)
+ features |= cfloat;
+ }
+
+ mach = bfd_m68k_features_to_mach (features);
+ bfd_default_set_arch_mach (abfd, bfd_arch_m68k, mach);
+
+ return TRUE;
+}
+
/* Keep m68k-specific flags in the ELF header. */
static bfd_boolean
elf32_m68k_set_private_flags (abfd, flags)
@@ -392,19 +446,39 @@
{
flagword out_flags;
flagword in_flags;
-
+ flagword out_isa;
+ flagword in_isa;
+ const bfd_arch_info_type *arch_info;
+
if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
|| bfd_get_flavour (obfd) != bfd_target_elf_flavour)
- return TRUE;
+ return FALSE;
- in_flags = elf_elfheader (ibfd)->e_flags;
- out_flags = elf_elfheader (obfd)->e_flags;
+ /* Get the merged machine. This checks for incompatibility between
+ Coldfire & non-Coldfire flags, incompability between different
+ Coldfire ISAs, and incompability between different MAC types. */
+ arch_info = bfd_arch_get_compatible (ibfd, obfd, FALSE);
+ if (!arch_info)
+ return FALSE;
+ bfd_set_arch_mach (obfd, bfd_arch_m68k, arch_info->mach);
+
+ in_flags = elf_elfheader (ibfd)->e_flags;
if (!elf_flags_init (obfd))
{
elf_flags_init (obfd) = TRUE;
- elf_elfheader (obfd)->e_flags = in_flags;
+ out_flags = in_flags;
}
+ else
+ {
+ out_flags = elf_elfheader (obfd)->e_flags;
+ in_isa = (in_flags & EF_M68K_ISA_MASK);
+ out_isa = (out_flags & EF_M68K_ISA_MASK);
+ if (in_isa > out_isa)
+ out_flags ^= in_isa ^ out_isa;
+ out_flags |= in_flags ^ in_isa;
+ }
+ elf_elfheader (obfd)->e_flags = out_flags;
return TRUE;
}
@@ -416,6 +490,7 @@
PTR ptr;
{
FILE *file = (FILE *) ptr;
+ flagword eflags = elf_elfheader (abfd)->e_flags;
BFD_ASSERT (abfd != NULL && ptr != NULL);
@@ -427,12 +502,60 @@
/* xgettext:c-format */
fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
- if (elf_elfheader (abfd)->e_flags & EF_CPU32)
- fprintf (file, _(" [cpu32]"));
+ if (eflags & EF_M68K_CPU32)
+ fprintf (file, " [cpu32]");
- if (elf_elfheader (abfd)->e_flags & EF_M68000)
- fprintf (file, _(" [m68000]"));
+ if (eflags & EF_M68K_M68000)
+ fprintf (file, " [m68000]");
+ if (eflags & EF_M68K_CFV4E)
+ fprintf (file, " [cfv4e]");
+
+ if (eflags & EF_M68K_ISA_MASK)
+ {
+ char const *isa = _("unknown");
+ char const *mac = _("unknown");
+ char const *additional = "";
+
+ switch (eflags & EF_M68K_ISA_MASK)
+ {
+ case EF_M68K_ISA_A_NODIV:
+ isa = "A";
+ additional = " [nodiv]";
+ break;
+ case EF_M68K_ISA_A:
+ isa = "A";
+ break;
+ case EF_M68K_ISA_A_PLUS:
+ isa = "A+";
+ break;
+ case EF_M68K_ISA_B_NOUSP:
+ isa = "B";
+ additional = " [nousp]";
+ break;
+ case EF_M68K_ISA_B:
+ isa = "B";
+ break;
+ }
+ fprintf (file, " [isa %s]%s", isa, additional);
+ if (eflags & EF_M68K_FLOAT)
+ fprintf (file, " [float]");
+ switch (eflags & EF_M68K_MAC_MASK)
+ {
+ case 0:
+ mac = NULL;
+ break;
+ case EF_M68K_MAC:
+ mac = "mac";
+ break;
+ case EF_M68K_EMAC:
+ mac = "emac";
+ break;
+ }
+ if (mac)
+ fprintf (file, " [%s]", mac);
+ }
+
fputc ('\n', file);
return TRUE;
@@ -1978,7 +2101,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -2313,6 +2436,7 @@
elf32_m68k_print_private_bfd_data
#define elf_backend_reloc_type_class elf32_m68k_reloc_type_class
#define elf_backend_plt_sym_val elf_m68k_plt_sym_val
+#define elf_backend_object_p elf32_m68k_object_p
#define elf_backend_can_gc_sections 1
#define elf_backend_can_refcount 1
Modified: branches/binutils/package/bfd/elf32-mips.c
===================================================================
--- branches/binutils/package/bfd/elf32-mips.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-mips.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -37,6 +37,7 @@
#include "elf-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"
+#include "elf-vxworks.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
@@ -1319,10 +1320,12 @@
static void
mips_info_to_howto_rel (bfd *abfd, arelent *cache_ptr, Elf_Internal_Rela *dst)
{
+ const struct elf_backend_data *bed;
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
- cache_ptr->howto = mips_elf32_rtype_to_howto (r_type, FALSE);
+ bed = get_elf_backend_data (abfd);
+ cache_ptr->howto = bed->elf_backend_mips_rtype_to_howto (r_type, FALSE);
/* The addend for a GPREL16 or LITERAL relocation comes from the GP
value for the object file. We get the addend now, rather than
@@ -1619,3 +1622,147 @@
/* Include the target file again for this target. */
#include "elf32-target.h"
+
+
+/* Specific to VxWorks. */
+static reloc_howto_type mips_vxworks_copy_howto_rela =
+ HOWTO (R_MIPS_COPY, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MIPS_COPY", /* name */
+ FALSE, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0x0, /* dst_mask */
+ FALSE); /* pcrel_offset */
+
+/* Specific to VxWorks. */
+static reloc_howto_type mips_vxworks_jump_slot_howto_rela =
+ HOWTO (R_MIPS_JUMP_SLOT, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MIPS_JUMP_SLOT", /* name */
+ FALSE, /* partial_inplace */
+ 0x0, /* src_mask */
+ 0x0, /* dst_mask */
+ FALSE); /* pcrel_offset */
+
+/* Implement elf_backend_bfd_reloc_type_lookup for VxWorks. */
+
+static reloc_howto_type *
+mips_vxworks_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
+{
+ switch (code)
+ {
+ case BFD_RELOC_MIPS_COPY:
+ return &mips_vxworks_copy_howto_rela;
+ case BFD_RELOC_MIPS_JUMP_SLOT:
+ return &mips_vxworks_jump_slot_howto_rela;
+ default:
+ return bfd_elf32_bfd_reloc_type_lookup (abfd, code);
+ }
+}
+
+/* Implement elf_backend_mips_rtype_to_lookup for VxWorks. */
+
+static reloc_howto_type *
+mips_vxworks_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p)
+{
+ switch (r_type)
+ {
+ case R_MIPS_COPY:
+ return &mips_vxworks_copy_howto_rela;
+ case R_MIPS_JUMP_SLOT:
+ return &mips_vxworks_jump_slot_howto_rela;
+ default:
+ return mips_elf32_rtype_to_howto (r_type, rela_p);
+ }
+}
+
+/* Implement elf_backend_final_write_processing for VxWorks. */
+
+static void
+mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
+{
+ _bfd_mips_elf_final_write_processing (abfd, linker);
+ elf_vxworks_final_write_processing (abfd, linker);
+}
+
+#undef TARGET_LITTLE_SYM
+#undef TARGET_LITTLE_NAME
+#undef TARGET_BIG_SYM
+#undef TARGET_BIG_NAME
+
+#define TARGET_LITTLE_SYM bfd_elf32_littlemips_vxworks_vec
+#define TARGET_LITTLE_NAME "elf32-littlemips-vxworks"
+#define TARGET_BIG_SYM bfd_elf32_bigmips_vxworks_vec
+#define TARGET_BIG_NAME "elf32-bigmips-vxworks"
+
+#undef elf32_bed
+#define elf32_bed elf32_mips_vxworks_bed
+
+#undef ELF_MAXPAGESIZE
+#define ELF_MAXPAGESIZE 0x1000
+
+#undef elf_backend_want_got_plt
+#define elf_backend_want_got_plt 1
+#undef elf_backend_want_plt_sym
+#define elf_backend_want_plt_sym 1
+#undef elf_backend_got_symbol_offset
+#define elf_backend_got_symbol_offset 0
+#undef elf_backend_want_dynbss
+#define elf_backend_want_dynbss 1
+#undef elf_backend_may_use_rel_p
+#define elf_backend_may_use_rel_p 0
+#undef elf_backend_may_use_rela_p
+#define elf_backend_may_use_rela_p 1
+#undef elf_backend_default_use_rela_p
+#define elf_backend_default_use_rela_p 1
+#undef elf_backend_got_header_size
+#define elf_backend_got_header_size (4 * 3)
+#undef elf_backend_plt_readonly
+#define elf_backend_plt_readonly 1
+
+#undef bfd_elf32_bfd_reloc_type_lookup
+#define bfd_elf32_bfd_reloc_type_lookup \
+ mips_vxworks_bfd_reloc_type_lookup
+#undef elf_backend_mips_rtype_to_howto
+#define elf_backend_mips_rtype_to_howto \
+ mips_vxworks_rtype_to_howto
+#undef elf_backend_adjust_dynamic_symbol
+#define elf_backend_adjust_dynamic_symbol \
+ _bfd_mips_vxworks_adjust_dynamic_symbol
+#undef elf_backend_finish_dynamic_symbol
+#define elf_backend_finish_dynamic_symbol \
+ _bfd_mips_vxworks_finish_dynamic_symbol
+#undef bfd_elf32_bfd_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_create \
+ _bfd_mips_vxworks_link_hash_table_create
+#undef elf_backend_add_symbol_hook
+#define elf_backend_add_symbol_hook \
+ elf_vxworks_add_symbol_hook
+#undef elf_backend_link_output_symbol_hook
+#define elf_backend_link_output_symbol_hook \
+ elf_vxworks_link_output_symbol_hook
+#undef elf_backend_emit_relocs
+#define elf_backend_emit_relocs \
+ elf_vxworks_emit_relocs
+#undef elf_backend_final_write_processing
+#define elf_backend_final_write_processing \
+ mips_vxworks_final_write_processing
+
+#undef elf_backend_additional_program_headers
+#undef elf_backend_modify_segment_map
+#undef elf_backend_symbol_processing
+/* NOTE: elf_backend_rela_normal is not defined for MIPS. */
+
+#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-mt.c
===================================================================
--- branches/binutils/package/bfd/elf32-mt.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-mt.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-/* Morpho Technologies MS1 specific support for 32-bit ELF
+/* Morpho Technologies MT specific support for 32-bit ELF
Copyright 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
@@ -25,28 +25,28 @@
#include "elf/mt.h"
/* Prototypes. */
-static reloc_howto_type * ms1_reloc_type_lookup
+static reloc_howto_type * mt_reloc_type_lookup
(bfd *, bfd_reloc_code_real_type);
-static void ms1_info_to_howto_rela
+static void mt_info_to_howto_rela
(bfd *, arelent *, Elf_Internal_Rela *);
-static bfd_reloc_status_type ms1_elf_relocate_hi16
+static bfd_reloc_status_type mt_elf_relocate_hi16
(bfd *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
-static bfd_reloc_status_type ms1_final_link_relocate
+static bfd_reloc_status_type mt_final_link_relocate
(reloc_howto_type *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, bfd_vma);
-static bfd_boolean ms1_elf_relocate_section
+static bfd_boolean mt_elf_relocate_section
(bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
/* Relocation tables. */
-static reloc_howto_type ms1_elf_howto_table [] =
+static reloc_howto_type mt_elf_howto_table [] =
{
/* This reloc does nothing. */
- HOWTO (R_MS1_NONE, /* type */
+ HOWTO (R_MT_NONE, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
@@ -54,14 +54,14 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_NONE", /* name */
+ "R_MT_NONE", /* name */
FALSE, /* partial_inplace */
0 , /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 16 bit absolute relocation. */
- HOWTO (R_MS1_16, /* type */
+ HOWTO (R_MT_16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
@@ -69,14 +69,14 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_16", /* name */
+ "R_MT_16", /* name */
FALSE, /* partial_inplace */
0 , /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 32 bit absolute relocation. */
- HOWTO (R_MS1_32, /* type */
+ HOWTO (R_MT_32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
@@ -84,14 +84,14 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_32", /* name */
+ "R_MT_32", /* name */
FALSE, /* partial_inplace */
0 , /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 32 bit pc-relative relocation. */
- HOWTO (R_MS1_32_PCREL, /* type */
+ HOWTO (R_MT_32_PCREL, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
@@ -99,14 +99,14 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_32_PCREL", /* name */
+ "R_MT_32_PCREL", /* name */
FALSE, /* partial_inplace */
0 , /* src_mask */
0xffffffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* A 16 bit pc-relative relocation. */
- HOWTO (R_MS1_PC16, /* type */
+ HOWTO (R_MT_PC16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
@@ -114,14 +114,14 @@
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_PC16", /* name */
+ "R_MT_PC16", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* high 16 bits of symbol value. */
- HOWTO (R_MS1_HI16, /* type */
+ HOWTO (R_MT_HI16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
@@ -129,14 +129,14 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_HI16", /* name */
+ "R_MT_HI16", /* name */
FALSE, /* partial_inplace */
0xffff0000, /* src_mask */
0xffff0000, /* dst_mask */
FALSE), /* pcrel_offset */
/* Low 16 bits of symbol value. */
- HOWTO (R_MS1_LO16, /* type */
+ HOWTO (R_MT_LO16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
@@ -144,41 +144,41 @@
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_MS1_LO16", /* name */
+ "R_MT_LO16", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
};
-/* Map BFD reloc types to MS1 ELF reloc types. */
+/* Map BFD reloc types to MT ELF reloc types. */
static reloc_howto_type *
-ms1_reloc_type_lookup
+mt_reloc_type_lookup
(bfd * abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
- /* Note that the ms1_elf_howto_table is indxed by the R_
+ /* Note that the mt_elf_howto_table is indxed by the R_
constants. Thus, the order that the howto records appear in the
table *must* match the order of the relocation types defined in
- include/elf/ms1.h. */
+ include/elf/mt.h. */
switch (code)
{
case BFD_RELOC_NONE:
- return &ms1_elf_howto_table[ (int) R_MS1_NONE];
+ return &mt_elf_howto_table[ (int) R_MT_NONE];
case BFD_RELOC_16:
- return &ms1_elf_howto_table[ (int) R_MS1_16];
+ return &mt_elf_howto_table[ (int) R_MT_16];
case BFD_RELOC_32:
- return &ms1_elf_howto_table[ (int) R_MS1_32];
+ return &mt_elf_howto_table[ (int) R_MT_32];
case BFD_RELOC_32_PCREL:
- return &ms1_elf_howto_table[ (int) R_MS1_32_PCREL];
+ return &mt_elf_howto_table[ (int) R_MT_32_PCREL];
case BFD_RELOC_16_PCREL:
- return &ms1_elf_howto_table[ (int) R_MS1_PC16];
+ return &mt_elf_howto_table[ (int) R_MT_PC16];
case BFD_RELOC_HI16:
- return &ms1_elf_howto_table[ (int) R_MS1_HI16];
+ return &mt_elf_howto_table[ (int) R_MT_HI16];
case BFD_RELOC_LO16:
- return &ms1_elf_howto_table[ (int) R_MS1_LO16];
+ return &mt_elf_howto_table[ (int) R_MT_LO16];
default:
/* Pacify gcc -Wall. */
@@ -188,7 +188,7 @@
}
bfd_reloc_status_type
-ms1_elf_relocate_hi16
+mt_elf_relocate_hi16
(bfd * input_bfd,
Elf_Internal_Rela * relhi,
bfd_byte * contents,
@@ -209,10 +209,10 @@
/* XXX: The following code is the result of a cut&paste. This unfortunate
practice is very widespread in the various target back-end files. */
-/* Set the howto pointer for a MS1 ELF reloc. */
+/* Set the howto pointer for a MT ELF reloc. */
static void
-ms1_info_to_howto_rela
+mt_info_to_howto_rela
(bfd * abfd ATTRIBUTE_UNUSED,
arelent * cache_ptr,
Elf_Internal_Rela * dst)
@@ -220,14 +220,14 @@
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
- cache_ptr->howto = & ms1_elf_howto_table [r_type];
+ cache_ptr->howto = & mt_elf_howto_table [r_type];
}
/* Perform a single relocation. By default we use the standard BFD
routines. */
static bfd_reloc_status_type
-ms1_final_link_relocate
+mt_final_link_relocate
(reloc_howto_type * howto,
bfd * input_bfd,
asection * input_section,
@@ -240,7 +240,7 @@
relocation, rel->r_addend);
}
-/* Relocate a MS1 ELF section.
+/* Relocate a MT ELF section.
There is some attempt to make this function usable for many architectures,
both USE_REL and USE_RELA ['twould be nice if such a critter existed],
if only to serve as a learning tool.
@@ -274,7 +274,7 @@
accordingly. */
static bfd_boolean
-ms1_elf_relocate_section
+mt_elf_relocate_section
(bfd * output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info * info,
bfd * input_bfd,
@@ -310,7 +310,7 @@
r_symndx = ELF32_R_SYM (rel->r_info);
/* This is a final link. */
- howto = ms1_elf_howto_table + ELF32_R_TYPE (rel->r_info);
+ howto = mt_elf_howto_table + ELF32_R_TYPE (rel->r_info);
h = NULL;
sym = NULL;
sec = NULL;
@@ -339,14 +339,14 @@
}
- /* Finally, the sole MS1-specific part. */
+ /* Finally, the sole MT-specific part. */
switch (r_type)
{
- case R_MS1_HI16:
- r = ms1_elf_relocate_hi16 (input_bfd, rel, contents, relocation);
+ case R_MT_HI16:
+ r = mt_elf_relocate_hi16 (input_bfd, rel, contents, relocation);
break;
default:
- r = ms1_final_link_relocate (howto, input_bfd, input_section,
+ r = mt_final_link_relocate (howto, input_bfd, input_section,
contents, rel, relocation);
break;
}
@@ -398,7 +398,7 @@
relocation. */
static asection *
-ms1_elf_gc_mark_hook
+mt_elf_gc_mark_hook
(asection * sec,
struct bfd_link_info * info ATTRIBUTE_UNUSED,
Elf_Internal_Rela * rel ATTRIBUTE_UNUSED,
@@ -436,7 +436,7 @@
removed. */
static bfd_boolean
-ms1_elf_gc_sweep_hook
+mt_elf_gc_sweep_hook
(bfd * abfd ATTRIBUTE_UNUSED,
struct bfd_link_info * info ATTRIBUTE_UNUSED,
asection * sec ATTRIBUTE_UNUSED,
@@ -450,7 +450,7 @@
virtual table relocs for gc. */
static bfd_boolean
-ms1_elf_check_relocs
+mt_elf_check_relocs
(bfd * abfd,
struct bfd_link_info * info,
asection * sec,
@@ -495,22 +495,22 @@
/* Return the MACH for an e_flags value. */
static int
-elf32_ms1_machine (bfd *abfd)
+elf32_mt_machine (bfd *abfd)
{
- switch (elf_elfheader (abfd)->e_flags & EF_MS1_CPU_MASK)
+ switch (elf_elfheader (abfd)->e_flags & EF_MT_CPU_MASK)
{
- case EF_MS1_CPU_MRISC: return bfd_mach_ms1;
- case EF_MS1_CPU_MRISC2: return bfd_mach_mrisc2;
- case EF_MS1_CPU_MS2: return bfd_mach_ms2;
+ case EF_MT_CPU_MRISC: return bfd_mach_ms1;
+ case EF_MT_CPU_MRISC2: return bfd_mach_mrisc2;
+ case EF_MT_CPU_MS2: return bfd_mach_ms2;
}
return bfd_mach_ms1;
}
static bfd_boolean
-ms1_elf_object_p (bfd * abfd)
+mt_elf_object_p (bfd * abfd)
{
- bfd_default_set_arch_mach (abfd, bfd_arch_ms1, elf32_ms1_machine (abfd));
+ bfd_default_set_arch_mach (abfd, bfd_arch_mt, elf32_mt_machine (abfd));
return TRUE;
}
@@ -518,7 +518,7 @@
/* Function to set the ELF flag bits. */
static bfd_boolean
-ms1_elf_set_private_flags (bfd * abfd,
+mt_elf_set_private_flags (bfd * abfd,
flagword flags)
{
elf_elfheader (abfd)->e_flags = flags;
@@ -527,7 +527,7 @@
}
static bfd_boolean
-ms1_elf_copy_private_bfd_data (bfd * ibfd, bfd * obfd)
+mt_elf_copy_private_bfd_data (bfd * ibfd, bfd * obfd)
{
if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
|| bfd_get_flavour (obfd) != bfd_target_elf_flavour)
@@ -545,20 +545,20 @@
object file when linking. */
static bfd_boolean
-ms1_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+mt_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
{
flagword old_flags, new_flags;
- bfd_boolean error = FALSE;
+ bfd_boolean ok = TRUE;
/* Check if we have the same endianess. */
if (_bfd_generic_verify_endian_match (ibfd, obfd) == FALSE)
return FALSE;
- /* If they're not both ms1, then merging is meaningless, so just
+ /* If they're not both mt, then merging is meaningless, so just
don't do it. */
- if (strcmp (ibfd->arch_info->arch_name, "ms1") != 0)
+ if (strcmp (ibfd->arch_info->arch_name, "mt") != 0)
return TRUE;
- if (strcmp (obfd->arch_info->arch_name, "ms1") != 0)
+ if (strcmp (obfd->arch_info->arch_name, "mt") != 0)
return TRUE;
new_flags = elf_elfheader (ibfd)->e_flags;
@@ -574,31 +574,24 @@
old_flags = new_flags;
elf_flags_init (obfd) = TRUE;
}
- else if ((new_flags & EF_MS1_CPU_MASK) != (old_flags & EF_MS1_CPU_MASK))
+ else if ((new_flags & EF_MT_CPU_MASK) != (old_flags & EF_MT_CPU_MASK))
{
/* CPU has changed. This is invalid, because MRISC, MRISC2 and
MS2 are not subsets of each other. */
- error = 1;
-
- /* FIXME:However, until the compiler is multilibbed, preventing
- mixing breaks the build. So we allow merging and use the
- greater CPU value. This is of course unsafe. */
- error = 0;
- if ((new_flags & EF_MS1_CPU_MASK) > (old_flags & EF_MS1_CPU_MASK))
- old_flags = ((old_flags & ~EF_MS1_CPU_MASK)
- | (new_flags & EF_MS1_CPU_MASK));
+ ok = FALSE;
}
- if (!error)
+
+ if (ok)
{
obfd->arch_info = ibfd->arch_info;
elf_elfheader (obfd)->e_flags = old_flags;
}
- return !error;
+ return ok;
}
static bfd_boolean
-ms1_elf_print_private_bfd_data (bfd * abfd, void * ptr)
+mt_elf_print_private_bfd_data (bfd * abfd, void * ptr)
{
FILE * file = (FILE *) ptr;
flagword flags;
@@ -611,12 +604,12 @@
flags = elf_elfheader (abfd)->e_flags;
fprintf (file, _("private flags = 0x%lx:"), (long)flags);
- switch (flags & EF_MS1_CPU_MASK)
+ switch (flags & EF_MT_CPU_MASK)
{
default:
- case EF_MS1_CPU_MRISC: fprintf (file, " ms1-16-002"); break;
- case EF_MS1_CPU_MRISC2: fprintf (file, " ms1-16-003"); break;
- case EF_MS1_CPU_MS2: fprintf (file, " ms2"); break;
+ case EF_MT_CPU_MRISC: fprintf (file, " ms1-16-002"); break;
+ case EF_MT_CPU_MRISC2: fprintf (file, " ms1-16-003"); break;
+ case EF_MT_CPU_MS2: fprintf (file, " ms2"); break;
}
fputc ('\n', file);
@@ -625,31 +618,31 @@
}
-#define TARGET_BIG_SYM bfd_elf32_ms1_vec
-#define TARGET_BIG_NAME "elf32-ms1"
+#define TARGET_BIG_SYM bfd_elf32_mt_vec
+#define TARGET_BIG_NAME "elf32-mt"
-#define ELF_ARCH bfd_arch_ms1
-#define ELF_MACHINE_CODE EM_MS1
-#define ELF_MAXPAGESIZE 1 /* No pages on the MS1. */
+#define ELF_ARCH bfd_arch_mt
+#define ELF_MACHINE_CODE EM_MT
+#define ELF_MAXPAGESIZE 1 /* No pages on the MT. */
#define elf_info_to_howto_rel NULL
-#define elf_info_to_howto ms1_info_to_howto_rela
+#define elf_info_to_howto mt_info_to_howto_rela
-#define elf_backend_relocate_section ms1_elf_relocate_section
+#define elf_backend_relocate_section mt_elf_relocate_section
-#define bfd_elf32_bfd_reloc_type_lookup ms1_reloc_type_lookup
+#define bfd_elf32_bfd_reloc_type_lookup mt_reloc_type_lookup
-#define elf_backend_gc_mark_hook ms1_elf_gc_mark_hook
-#define elf_backend_gc_sweep_hook ms1_elf_gc_sweep_hook
-#define elf_backend_check_relocs ms1_elf_check_relocs
-#define elf_backend_object_p ms1_elf_object_p
+#define elf_backend_gc_mark_hook mt_elf_gc_mark_hook
+#define elf_backend_gc_sweep_hook mt_elf_gc_sweep_hook
+#define elf_backend_check_relocs mt_elf_check_relocs
+#define elf_backend_object_p mt_elf_object_p
#define elf_backend_rela_normal 1
#define elf_backend_can_gc_sections 1
-#define bfd_elf32_bfd_set_private_flags ms1_elf_set_private_flags
-#define bfd_elf32_bfd_copy_private_bfd_data ms1_elf_copy_private_bfd_data
-#define bfd_elf32_bfd_merge_private_bfd_data ms1_elf_merge_private_bfd_data
-#define bfd_elf32_bfd_print_private_bfd_data ms1_elf_print_private_bfd_data
+#define bfd_elf32_bfd_set_private_flags mt_elf_set_private_flags
+#define bfd_elf32_bfd_copy_private_bfd_data mt_elf_copy_private_bfd_data
+#define bfd_elf32_bfd_merge_private_bfd_data mt_elf_merge_private_bfd_data
+#define bfd_elf32_bfd_print_private_bfd_data mt_elf_print_private_bfd_data
#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-ppc.c
===================================================================
--- branches/binutils/package/bfd/elf32-ppc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-ppc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* PowerPC-specific support for 32-bit ELF
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -2313,6 +2313,13 @@
#define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
+enum ppc_elf_plt_type {
+ PLT_UNSET,
+ PLT_OLD,
+ PLT_NEW,
+ PLT_VXWORKS
+};
+
/* PPC ELF linker hash table. */
struct ppc_elf_link_hash_table
@@ -2349,10 +2356,12 @@
/* Non-zero if allocating the header left a gap. */
unsigned int got_gap;
- /* Whether to use new plt/got layout or not. */
- unsigned int new_plt:1;
- unsigned int old_plt:1;
+ /* The type of PLT we have chosen to use. */
+ enum ppc_elf_plt_type plt_type;
+ /* Whether we can use the new PLT layout. */
+ unsigned int can_use_new_plt:1;
+
/* Set if we should emit symbols for stubs. */
unsigned int emit_stub_syms:1;
@@ -2365,9 +2374,6 @@
/* The .got.plt section (VxWorks only)*/
asection *sgotplt;
- /* Short-cuts to frequently used symbols on VxWorks targets. */
- struct elf_link_hash_entry *hplt;
-
/* True if the target system is VxWorks. */
int is_vxworks;
@@ -2424,8 +2430,9 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd,
- ppc_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd,
+ ppc_elf_link_hash_newfunc,
+ sizeof (struct ppc_elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -2542,19 +2549,9 @@
return FALSE;
}
- /* Create the section for VxWorks static plt relocations. */
- if (htab->is_vxworks && !info->shared)
- {
- s = bfd_make_section (abfd, ".rela.plt.unloaded");
- flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY
- | SEC_LINKER_CREATED);
- if (s == NULL
- || ! bfd_set_section_flags (abfd, s, flags)
- || ! bfd_set_section_alignment (abfd, s,
- get_elf_backend_data (abfd)->s->log_file_align))
- return FALSE;
- htab->srelplt2 = s;
- }
+ if (htab->is_vxworks
+ && !elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2))
+ return FALSE;
htab->relplt = bfd_get_section_by_name (abfd, ".rela.plt");
htab->plt = s = bfd_get_section_by_name (abfd, ".plt");
@@ -2562,6 +2559,9 @@
abort ();
flags = SEC_ALLOC | SEC_CODE | SEC_LINKER_CREATED;
+ if (htab->plt_type == PLT_VXWORKS)
+ /* The VxWorks PLT is a loaded section with contents. */
+ flags |= SEC_HAS_CONTENTS | SEC_LOAD | SEC_READONLY;
return bfd_set_section_flags (abfd, s, flags);
}
@@ -2680,9 +2680,12 @@
is_ppc_elf_target (const struct bfd_target *targ)
{
extern const bfd_target bfd_elf32_powerpc_vec;
+ extern const bfd_target bfd_elf32_powerpc_vxworks_vec;
extern const bfd_target bfd_elf32_powerpcle_vec;
- return targ == &bfd_elf32_powerpc_vec || targ == &bfd_elf32_powerpcle_vec;
+ return (targ == &bfd_elf32_powerpc_vec
+ || targ == &bfd_elf32_powerpc_vxworks_vec
+ || targ == &bfd_elf32_powerpcle_vec);
}
/* Hook called by the linker routine which adds symbols from an object
@@ -3248,7 +3251,7 @@
case R_PPC_REL16_LO:
case R_PPC_REL16_HI:
case R_PPC_REL16_HA:
- htab->new_plt = 1;
+ htab->can_use_new_plt = 1;
break;
/* These are just markers. */
@@ -3276,8 +3279,8 @@
/* This refers only to functions defined in the shared library. */
case R_PPC_LOCAL24PC:
- if (h && h == htab->elf.hgot)
- htab->old_plt = 1;
+ if (h && h == htab->elf.hgot && htab->plt_type == PLT_UNSET)
+ htab->plt_type = PLT_OLD;
break;
/* This relocation describes the C++ object vtable hierarchy.
@@ -3318,7 +3321,7 @@
&& got2 != NULL
&& (sec->flags & SEC_CODE) != 0
&& (info->shared || info->pie)
- && !htab->old_plt)
+ && htab->plt_type == PLT_UNSET)
{
/* Old -fPIC gcc code has .long LCTOC1-LCFx just before
the start of a function, which assembles to a REL32
@@ -3331,9 +3334,11 @@
s = bfd_section_from_r_symndx (abfd, &htab->sym_sec, sec,
r_symndx);
if (s == got2)
- htab->old_plt = 1;
+ htab->plt_type = PLT_OLD;
}
- /* fall through */
+ if (h == NULL || h == htab->elf.hgot)
+ break;
+ goto dodyn1;
case R_PPC_REL24:
case R_PPC_REL14:
@@ -3343,7 +3348,8 @@
break;
if (h == htab->elf.hgot)
{
- htab->old_plt = 1;
+ if (htab->plt_type == PLT_UNSET)
+ htab->plt_type = PLT_OLD;
break;
}
/* fall through */
@@ -3359,6 +3365,7 @@
case R_PPC_ADDR14_BRNTAKEN:
case R_PPC_UADDR32:
case R_PPC_UADDR16:
+ dodyn1:
if (h != NULL && !info->shared)
{
/* We may need a plt entry if the symbol turns out to be
@@ -3603,22 +3610,16 @@
flagword flags;
htab = ppc_elf_hash_table (info);
- if (force_old_plt || !htab->new_plt)
- htab->old_plt = 1;
+ if (htab->plt_type == PLT_UNSET)
+ htab->plt_type = (force_old_plt || !htab->can_use_new_plt
+ ? PLT_OLD : PLT_NEW);
+
htab->emit_stub_syms = emit_stub_syms;
- if (htab->is_vxworks)
- {
- /* The VxWorks PLT is a loaded section with contents. */
- flags = SEC_ALLOC | SEC_CODE | SEC_IN_MEMORY | SEC_LINKER_CREATED
- | SEC_HAS_CONTENTS | SEC_LOAD | SEC_READONLY;
+ BFD_ASSERT (htab->plt_type != PLT_VXWORKS);
- if (htab->plt != NULL
- && !bfd_set_section_flags (htab->elf.dynobj, htab->plt, flags))
- return -1;
- }
- else if (!htab->old_plt)
+ if (htab->plt_type == PLT_NEW)
{
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
| SEC_IN_MEMORY | SEC_LINKER_CREATED);
@@ -3640,7 +3641,7 @@
&& !bfd_set_section_alignment (htab->elf.dynobj, htab->glink, 0))
return -1;
}
- return !htab->old_plt;
+ return htab->plt_type == PLT_NEW;
}
/* Return the section that should be marked against GC for a given
@@ -3828,7 +3829,7 @@
struct ppc_elf_link_hash_table *htab;
htab = ppc_elf_hash_table (info);
- if (!htab->old_plt
+ if (htab->plt_type == PLT_NEW
&& htab->plt != NULL
&& htab->plt->output_section != NULL)
{
@@ -4213,34 +4214,41 @@
return TRUE;
}
-/* Generate a symbol to mark plt call stubs, of the form
- xxxxxxxx_plt_call_<callee> where xxxxxxxx is a hex number, usually 0,
- specifying the addend on the plt relocation, or for -fPIC,
- xxxxxxxx.got2_plt_call_<callee>. */
+/* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
+ xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
+ specifying the addend on the plt relocation. For -fpic code, the sym
+ is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
+ xxxxxxxx.got2.plt_pic32.<callee>. */
static bfd_boolean
add_stub_sym (struct plt_entry *ent,
struct elf_link_hash_entry *h,
- struct ppc_elf_link_hash_table *htab)
+ struct bfd_link_info *info)
{
struct elf_link_hash_entry *sh;
size_t len1, len2, len3;
char *name;
+ const char *stub;
+ struct ppc_elf_link_hash_table *htab = ppc_elf_hash_table (info);
+ if (info->shared || info->pie)
+ stub = ".plt_pic32.";
+ else
+ stub = ".plt_call32.";
+
len1 = strlen (h->root.root.string);
- len2 = sizeof ("plt_call_") - 1;
+ len2 = strlen (stub);
len3 = 0;
if (ent->sec)
len3 = strlen (ent->sec->name);
- name = bfd_malloc (len1 + len2 + len3 + 10);
+ name = bfd_malloc (len1 + len2 + len3 + 9);
if (name == NULL)
return FALSE;
sprintf (name, "%08x", (unsigned) ent->addend & 0xffffffff);
if (ent->sec)
memcpy (name + 8, ent->sec->name, len3);
- name[len3 + 8] = '_';
- memcpy (name + len3 + 9, "plt_call_", len2);
- memcpy (name + len3 + 9 + len2, h->root.root.string, len1 + 1);
+ memcpy (name + 8 + len3, stub, len2);
+ memcpy (name + 8 + len3 + len2, h->root.root.string, len1 + 1);
sh = elf_link_hash_lookup (&htab->elf, name, TRUE, FALSE, FALSE);
if (sh == NULL)
return FALSE;
@@ -4265,31 +4273,32 @@
allocate_got (struct ppc_elf_link_hash_table *htab, unsigned int need)
{
bfd_vma where;
- unsigned int max_before_header = 32768;
+ unsigned int max_before_header;
- if (htab->old_plt)
- max_before_header = 32764;
-
- if (htab->is_vxworks)
+ if (htab->plt_type == PLT_VXWORKS)
{
where = htab->got->size;
htab->got->size += need;
}
- else if (need <= htab->got_gap)
- {
- where = max_before_header - htab->got_gap;
- htab->got_gap -= need;
- }
else
{
- if (htab->got->size + need > max_before_header
- && htab->got->size <= max_before_header)
+ max_before_header = htab->plt_type == PLT_NEW ? 32768 : 32764;
+ if (need <= htab->got_gap)
{
- htab->got_gap = max_before_header - htab->got->size;
- htab->got->size = max_before_header + htab->got_header_size;
+ where = max_before_header - htab->got_gap;
+ htab->got_gap -= need;
}
- where = htab->got->size;
- htab->got->size += need;
+ else
+ {
+ if (htab->got->size + need > max_before_header
+ && htab->got->size <= max_before_header)
+ {
+ htab->got_gap = max_before_header - htab->got->size;
+ htab->got->size = max_before_header + htab->got_header_size;
+ }
+ where = htab->got->size;
+ htab->got->size += need;
+ }
}
return where;
}
@@ -4336,7 +4345,7 @@
{
asection *s = htab->plt;
- if (!(htab->old_plt || htab->is_vxworks))
+ if (htab->plt_type == PLT_NEW)
{
if (!doneone)
{
@@ -4361,7 +4370,7 @@
ent->glink_offset = glink_offset;
if (htab->emit_stub_syms
- && !add_stub_sym (ent, h, htab))
+ && !add_stub_sym (ent, h, info))
return FALSE;
}
else
@@ -4400,7 +4409,7 @@
s->size += htab->plt_entry_size;
/* After the 8192nd entry, room for two entries
is allocated. */
- if (!htab->is_vxworks
+ if (htab->plt_type == PLT_OLD
&& (s->size - htab->plt_initial_entry_size)
/ htab->plt_entry_size
> PLT_NUM_SINGLE_ENTRIES)
@@ -4414,7 +4423,7 @@
{
htab->relplt->size += sizeof (Elf32_External_Rela);
- if (htab->is_vxworks)
+ if (htab->plt_type == PLT_VXWORKS)
{
/* Allocate space for the unloaded relocations. */
if (!info->shared)
@@ -4539,20 +4548,20 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
-
- /* Make sure undefined weak symbols are output as a dynamic symbol
- in PIEs. */
- if (info->pie
- && eh->dyn_relocs != NULL
- && h->dynindx == -1
- && h->root.type == bfd_link_hash_undefweak
- && !h->forced_local)
{
- if (! bfd_elf_link_record_dynamic_symbol (info, h))
- return FALSE;
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
}
}
else if (ELIMINATE_COPY_RELOCS)
@@ -4655,9 +4664,9 @@
}
}
- if (htab->old_plt)
+ if (htab->plt_type == PLT_OLD)
htab->got_header_size = 16;
- else
+ else if (htab->plt_type == PLT_NEW)
htab->got_header_size = 12;
/* Set up .got offsets for local syms, and space for local dynamic
@@ -4753,29 +4762,10 @@
else
htab->tlsld_got.offset = (bfd_vma) -1;
- if (htab->is_vxworks)
- {
- /* Save the PLT symbol in the hash table for easy access.
- Mark GOT and PLT syms as having relocations; they might not,
- but we won't know for sure until we build the GOT in
- finish_dynamic_symbol. */
-
- if (htab->elf.hgot)
- htab->elf.hgot->indx = -2;
- htab->hplt = elf_link_hash_lookup (elf_hash_table (info),
- "_PROCEDURE_LINKAGE_TABLE_",
- FALSE, FALSE, FALSE);
- if (htab->hplt)
- htab->hplt->indx = -2;
- /* If the PLT is executable then give the symbol function type. */
- if (htab->hplt && htab->plt->flags & SEC_CODE)
- htab->hplt->type = STT_FUNC;
- }
-
/* Allocate space for global sym dynamic relocs. */
elf_link_hash_traverse (elf_hash_table (info), allocate_dynrelocs, info);
- if (htab->got != NULL && !htab->is_vxworks)
+ if (htab->got != NULL && htab->plt_type != PLT_VXWORKS)
{
unsigned int g_o_t = 32768;
@@ -4786,7 +4776,7 @@
if (htab->got->size <= 32768)
{
g_o_t = htab->got->size;
- if (htab->old_plt)
+ if (htab->plt_type == PLT_OLD)
g_o_t += 4;
htab->got->size += htab->got_header_size;
}
@@ -4860,7 +4850,7 @@
/* We'd like to strip these sections if they aren't needed, but if
we've exported dynamic symbols from them we must leave them.
It's too late to tell BFD to get rid of the symbols. */
- if ((s == htab->plt || s == htab->got) && htab->hplt != NULL)
+ if ((s == htab->plt || s == htab->got) && htab->elf.hplt != NULL)
strip_section = FALSE;
/* Strip this section if we don't need it; see the
comment below. */
@@ -5122,7 +5112,7 @@
if (ent != NULL)
{
- if (!htab->old_plt)
+ if (htab->plt_type == PLT_NEW)
{
tsec = htab->glink;
toff = ent->glink_offset;
@@ -5778,6 +5768,7 @@
insn1 |= 32 << 26; /* lwz */
insn2 = 0x7c631214; /* add 3,3,2 */
rel[1].r_info = ELF32_R_INFO (r_symndx2, R_PPC_NONE);
+ rel[1].r_addend = 0;
r_type = (((r_type - (R_PPC_GOT_TLSGD16 & 3)) & 3)
+ R_PPC_GOT_TPREL16);
rel->r_info = ELF32_R_INFO (r_symndx, r_type);
@@ -5792,13 +5783,13 @@
/* Was an LD reloc. */
r_symndx = 0;
rel->r_addend = htab->elf.tls_sec->vma + DTP_OFFSET;
- rel[1].r_addend = htab->elf.tls_sec->vma + DTP_OFFSET;
}
r_type = R_PPC_TPREL16_HA;
rel->r_info = ELF32_R_INFO (r_symndx, r_type);
rel[1].r_info = ELF32_R_INFO (r_symndx,
R_PPC_TPREL16_LO);
rel[1].r_offset += 2;
+ rel[1].r_addend = rel->r_addend;
}
bfd_put_32 (output_bfd, insn1, contents + rel->r_offset - 2);
bfd_put_32 (output_bfd, insn2, contents + offset);
@@ -6337,7 +6328,7 @@
{
struct plt_entry *ent = find_plt_ent (h, got2, addend);
- if (!htab->old_plt)
+ if (htab->plt_type == PLT_NEW)
relocation = (htab->glink->output_section->vma
+ htab->glink->output_offset
+ ent->glink_offset);
@@ -6427,7 +6418,7 @@
}
unresolved_reloc = FALSE;
- if (!htab->old_plt)
+ if (htab->plt_type == PLT_NEW)
relocation = (htab->glink->output_section->vma
+ htab->glink->output_offset
+ ent->glink_offset);
@@ -6747,20 +6738,20 @@
bfd_byte *loc;
bfd_vma reloc_index;
- if (!(htab->old_plt || htab->is_vxworks))
+ if (htab->plt_type == PLT_NEW)
reloc_index = ent->plt.offset / 4;
else
{
reloc_index = ((ent->plt.offset - htab->plt_initial_entry_size)
/ htab->plt_slot_size);
if (reloc_index > PLT_NUM_SINGLE_ENTRIES
- && !htab->is_vxworks)
+ && htab->plt_type == PLT_OLD)
reloc_index -= (reloc_index - PLT_NUM_SINGLE_ENTRIES) / 2;
}
/* This symbol has an entry in the procedure linkage table.
Set it up. */
- if (htab->is_vxworks)
+ if (htab->plt_type == PLT_VXWORKS)
{
bfd_vma got_offset;
const bfd_vma *plt_entry;
@@ -6873,7 +6864,7 @@
rela.r_offset = (htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset
+ got_offset);
- rela.r_info = ELF32_R_INFO (htab->hplt->indx,
+ rela.r_info = ELF32_R_INFO (htab->elf.hplt->indx,
R_PPC_ADDR32);
rela.r_addend = ent->plt.offset + 16;
bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
@@ -6894,7 +6885,7 @@
rela.r_offset = (htab->plt->output_section->vma
+ htab->plt->output_offset
+ ent->plt.offset);
- if (htab->old_plt)
+ if (htab->plt_type == PLT_OLD)
{
/* We don't need to fill in the .plt. The ppc dynamic
linker will fill it in. */
@@ -6932,7 +6923,7 @@
doneone = TRUE;
}
- if (!htab->old_plt)
+ if (htab->plt_type == PLT_NEW)
{
bfd_vma plt;
unsigned char *p;
@@ -7154,7 +7145,7 @@
bfd_vma val;
p += htab->elf.hgot->root.u.def.value;
- if (htab->old_plt && !htab->is_vxworks)
+ if (htab->plt_type == PLT_OLD)
bfd_put_32 (output_bfd, 0x4e800021 /* blrl */, p - 4);
val = 0;
@@ -7241,7 +7232,7 @@
loc += sizeof (Elf32_External_Rela);
bfd_elf32_swap_reloc_in (output_bfd, loc, &rel);
- rel.r_info = ELF32_R_INFO (htab->hplt->indx, R_PPC_ADDR32);
+ rel.r_info = ELF32_R_INFO (htab->elf.hplt->indx, R_PPC_ADDR32);
bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
loc += sizeof (Elf32_External_Rela);
}
@@ -7526,6 +7517,7 @@
struct ppc_elf_link_hash_table *htab
= (struct ppc_elf_link_hash_table *)ret;
htab->is_vxworks = 1;
+ htab->plt_type = PLT_VXWORKS;
htab->plt_entry_size = VXWORKS_PLT_ENTRY_SIZE;
htab->plt_slot_size = VXWORKS_PLT_ENTRY_SIZE;
htab->plt_initial_entry_size = VXWORKS_PLT_INITIAL_ENTRY_SIZE;
@@ -7550,23 +7542,6 @@
return ppc_elf_add_symbol_hook(abfd, info, sym,namep, flagsp, secp, valp);
}
-/* Tweak magic VxWorks symbols as they are written to the output file. */
-static bfd_boolean
-elf_i386_vxworks_link_output_symbol_hook (struct bfd_link_info *info
- ATTRIBUTE_UNUSED,
- const char *name,
- Elf_Internal_Sym *sym,
- asection *input_sec ATTRIBUTE_UNUSED,
- struct elf_link_hash_entry *h
- ATTRIBUTE_UNUSED)
-{
- /* Ignore the first dummy symbol. */
- if (!name)
- return TRUE;
-
- return elf_vxworks_link_output_symbol_hook (name, sym);
-}
-
static void
ppc_elf_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
{
@@ -7597,7 +7572,7 @@
ppc_elf_vxworks_add_symbol_hook
#undef elf_backend_link_output_symbol_hook
#define elf_backend_link_output_symbol_hook \
- elf_i386_vxworks_link_output_symbol_hook
+ elf_vxworks_link_output_symbol_hook
#undef elf_backend_final_write_processing
#define elf_backend_final_write_processing \
ppc_elf_vxworks_final_write_processing
Modified: branches/binutils/package/bfd/elf32-s390.c
===================================================================
--- branches/binutils/package/bfd/elf32-s390.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-s390.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* IBM S/390-specific support for 32-bit ELF
- Copyright 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Carl B. Pedersen and Martin Schwidefsky.
@@ -771,7 +771,8 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
+ sizeof (struct elf_s390_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1908,9 +1909,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else if (ELIMINATE_COPY_RELOCS)
{
@@ -3297,8 +3310,8 @@
/* Mark some specially defined symbols as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ || h == htab->elf.hgot
+ || h == htab->elf.hplt)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf32-sh.c
===================================================================
--- branches/binutils/package/bfd/elf32-sh.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-sh.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Renesas / SuperH SH specific support for 32-bit ELF
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Contributed by Ian Lance Taylor, Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -3612,8 +3612,9 @@
if (ret == (struct elf_sh_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- sh_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ sh_elf_link_hash_newfunc,
+ sizeof (struct elf_sh_link_hash_entry)))
{
free (ret);
return NULL;
@@ -3726,6 +3727,7 @@
h = (struct elf_link_hash_entry *) bh;
h->def_regular = 1;
h->type = STT_OBJECT;
+ htab->root.hplt = h;
if (info->shared
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
@@ -4160,9 +4162,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else
{
@@ -4693,7 +4707,8 @@
|| !h->def_regular)
&& ((r_type == R_SH_DIR32
&& !h->forced_local)
- || r_type == R_SH_REL32)
+ || (r_type == R_SH_REL32
+ && !SYMBOL_CALLS_LOCAL (info, h)))
&& ((input_section->flags & SEC_ALLOC) != 0
/* DWARF will emit R_SH_DIR32 relocations in its
sections against symbols defined externally
@@ -7022,7 +7037,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == htab->root.hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf32-sparc.c
===================================================================
--- branches/binutils/package/bfd/elf32-sparc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-sparc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -26,6 +26,7 @@
#include "elf/sparc.h"
#include "opcode/sparc.h"
#include "elfxx-sparc.h"
+#include "elf-vxworks.h"
/* Support for core dump NOTE sections. */
@@ -215,3 +216,68 @@
#define elf_backend_rela_normal 1
#include "elf32-target.h"
+
+/* A wrapper around _bfd_sparc_elf_link_hash_table_create that identifies
+ the target system as VxWorks. */
+
+static struct bfd_link_hash_table *
+elf32_sparc_vxworks_link_hash_table_create (bfd *abfd)
+{
+ struct bfd_link_hash_table *ret;
+
+ ret = _bfd_sparc_elf_link_hash_table_create (abfd);
+ if (ret)
+ {
+ struct _bfd_sparc_elf_link_hash_table *htab;
+
+ htab = (struct _bfd_sparc_elf_link_hash_table *) ret;
+ htab->is_vxworks = 1;
+ }
+ return ret;
+}
+
+/* A final_write_processing hook that does both the SPARC- and VxWorks-
+ specific handling. */
+
+static void
+elf32_sparc_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
+{
+ elf32_sparc_final_write_processing (abfd, linker);
+ elf_vxworks_final_write_processing (abfd, linker);
+}
+
+#undef TARGET_BIG_SYM
+#define TARGET_BIG_SYM bfd_elf32_sparc_vxworks_vec
+#undef TARGET_BIG_NAME
+#define TARGET_BIG_NAME "elf32-sparc-vxworks"
+
+#undef ELF_MINPAGESIZE
+#define ELF_MINPAGESIZE 0x1000
+
+#undef bfd_elf32_bfd_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_create \
+ elf32_sparc_vxworks_link_hash_table_create
+
+#undef elf_backend_want_got_plt
+#define elf_backend_want_got_plt 1
+#undef elf_backend_plt_readonly
+#define elf_backend_plt_readonly 1
+#undef elf_backend_got_header_size
+#define elf_backend_got_header_size 12
+#undef elf_backend_add_symbol_hook
+#define elf_backend_add_symbol_hook \
+ elf_vxworks_add_symbol_hook
+#undef elf_backend_link_output_symbol_hook
+#define elf_backend_link_output_symbol_hook \
+ elf_vxworks_link_output_symbol_hook
+#undef elf_backend_emit_relocs
+#define elf_backend_emit_relocs \
+ elf_vxworks_emit_relocs
+#undef elf_backend_final_write_processing
+#define elf_backend_final_write_processing \
+ elf32_sparc_vxworks_final_write_processing
+
+#undef elf32_bed
+#define elf32_bed sparc_elf_vxworks_bed
+
+#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-vax.c
===================================================================
--- branches/binutils/package/bfd/elf32-vax.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-vax.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* VAX series support for 32-bit ELF
Copyright 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Contributed by Matt Thomas <matt at 3am-software.com>.
This file is part of BFD, the Binary File Descriptor library.
@@ -468,8 +468,9 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- elf_vax_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf_vax_link_hash_newfunc,
+ sizeof (struct elf_vax_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1954,7 +1955,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Added: branches/binutils/package/bfd/elf32-xc16x.c
===================================================================
--- branches/binutils/package/bfd/elf32-xc16x.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-xc16x.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,449 @@
+/* Infineon XC16X-specific support for 16-bit ELF.
+ Copyright 2006 Free Software Foundation, Inc.
+ Contributed by KPIT Cummins Infosystems
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/xc16x.h"
+#include "elf/dwarf2.h"
+#include "libiberty.h"
+
+static reloc_howto_type xc16x_elf_howto_table [] =
+{
+ /* This reloc does nothing. */
+ HOWTO (R_XC16X_NONE, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_NONE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* An 8 bit absolute relocation. */
+ HOWTO (R_XC16X_ABS_8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 8, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_ABS_8", /* name */
+ TRUE, /* partial_inplace */
+ 0x0000, /* src_mask */
+ 0x00ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 16 bit absolute relocation. */
+ HOWTO (R_XC16X_ABS_16, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_ABS_16", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x0000ffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_XC16X_ABS_32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_ABS_32", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+
+ /* A PC relative 8 bit relocation. */
+ HOWTO (R_XC16X_8_PCREL, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 8, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_8_PCREL", /* name */
+ FALSE, /* partial_inplace */
+ 0x0000, /* src_mask */
+ 0x00ff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* Relocation regarding page number. */
+ HOWTO (R_XC16X_PAG, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_PAG", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x0000ffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+
+ /* Relocation regarding page number. */
+ HOWTO (R_XC16X_POF, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_POF", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x0000ffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+
+ /* Relocation regarding segment number. */
+ HOWTO (R_XC16X_SEG, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_SEG", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x0000ffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Relocation regarding segment offset. */
+ HOWTO (R_XC16X_SOF, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_XC16X_SOF", /* name */
+ TRUE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x0000ffff, /* dst_mask */
+ FALSE) /* pcrel_offset */
+};
+
+
+/* Map BFD reloc types to XC16X ELF reloc types. */
+
+struct xc16x_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_val;
+ unsigned int xc16x_reloc_val;
+};
+
+static const struct xc16x_reloc_map xc16x_reloc_map [] =
+{
+ { BFD_RELOC_NONE, R_XC16X_NONE },
+ { BFD_RELOC_8, R_XC16X_ABS_8 },
+ { BFD_RELOC_16, R_XC16X_ABS_16 },
+ { BFD_RELOC_32, R_XC16X_ABS_32 },
+ { BFD_RELOC_8_PCREL, R_XC16X_8_PCREL },
+ { BFD_RELOC_XC16X_PAG, R_XC16X_PAG},
+ { BFD_RELOC_XC16X_POF, R_XC16X_POF},
+ { BFD_RELOC_XC16X_SEG, R_XC16X_SEG},
+ { BFD_RELOC_XC16X_SOF, R_XC16X_SOF},
+};
+
+
+/* This function is used to search for correct relocation type from
+ howto structure. */
+
+static reloc_howto_type *
+xc16x_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
+{
+ unsigned int i;
+
+ for (i = ARRAY_SIZE (xc16x_reloc_map); --i;)
+ if (xc16x_reloc_map [i].bfd_reloc_val == code)
+ return & xc16x_elf_howto_table [xc16x_reloc_map[i].xc16x_reloc_val];
+
+ return NULL;
+}
+
+/* For a particular operand this function is
+ called to finalise the type of relocation. */
+
+static void
+elf32_xc16x_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
+ Elf_Internal_Rela *elf_reloc)
+{
+ unsigned int r;
+ unsigned int i;
+
+ r = ELF32_R_TYPE (elf_reloc->r_info);
+ for (i = 0; i < ARRAY_SIZE (xc16x_elf_howto_table); i++)
+ if (xc16x_elf_howto_table[i].type == r)
+ {
+ bfd_reloc->howto = &xc16x_elf_howto_table[i];
+ return;
+ }
+ abort ();
+}
+
+static bfd_reloc_status_type
+elf32_xc16x_final_link_relocate (unsigned long r_type,
+ bfd *input_bfd,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd_byte *contents,
+ bfd_vma offset,
+ bfd_vma value,
+ bfd_vma addend,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sym_sec ATTRIBUTE_UNUSED,
+ int is_local ATTRIBUTE_UNUSED)
+{
+ bfd_byte *hit_data = contents + offset;
+ bfd_vma val1;
+
+ switch (r_type)
+ {
+ case R_XC16X_NONE:
+ return bfd_reloc_ok;
+
+ case R_XC16X_ABS_16:
+ value += addend;
+ bfd_put_16 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ case R_XC16X_8_PCREL:
+ bfd_put_8 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ /* Following case is to find page number from actual
+ address for this divide value by 16k i.e. page size. */
+
+ case R_XC16X_PAG:
+ value += addend;
+ value /= 0x4000;
+ bfd_put_16 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ /* Following case is to find page offset from actual address
+ for this take modulo of value by 16k i.e. page size. */
+
+ case R_XC16X_POF:
+ value += addend;
+ value %= 0x4000;
+ bfd_put_16 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ /* Following case is to find segment number from actual
+ address for this divide value by 64k i.e. segment size. */
+
+ case R_XC16X_SEG:
+ value += addend;
+ value /= 0x10000;
+ bfd_put_16 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ /* Following case is to find segment offset from actual address
+ for this take modulo of value by 64k i.e. segment size. */
+
+ case R_XC16X_SOF:
+ value += addend;
+ value %= 0x10000;
+ bfd_put_16 (input_bfd, value, hit_data);
+ return bfd_reloc_ok;
+
+ case R_XC16X_ABS_32:
+ if (!strstr (input_section->name,".debug"))
+ {
+ value += addend;
+ val1 = value;
+ value %= 0x4000;
+ val1 /= 0x4000;
+ val1 = val1 << 16;
+ value += val1;
+ bfd_put_32 (input_bfd, value, hit_data);
+ }
+ else
+ {
+ value += addend;
+ bfd_put_32 (input_bfd, value, hit_data);
+ }
+ return bfd_reloc_ok;
+
+ default:
+ return bfd_reloc_notsupported;
+ }
+}
+
+static bfd_boolean
+elf32_xc16x_relocate_section (bfd *output_bfd,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ Elf_Internal_Rela *relocs,
+ Elf_Internal_Sym *local_syms,
+ asection **local_sections)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ Elf_Internal_Rela *rel, *relend;
+
+ if (info->relocatable)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+
+ rel = relocs;
+ relend = relocs + input_section->reloc_count;
+ for (; rel < relend; rel++)
+ {
+ unsigned int r_type;
+ unsigned long r_symndx;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ struct elf_link_hash_entry *h;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+
+ /* This is a final link. */
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ r_type = ELF32_R_TYPE (rel->r_info);
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections[r_symndx];
+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+ }
+ else
+ {
+ bfd_boolean unresolved_reloc, warned;
+
+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+ r_symndx, symtab_hdr, sym_hashes,
+ h, sec, relocation,
+ unresolved_reloc, warned);
+ }
+
+ r = elf32_xc16x_final_link_relocate (r_type, input_bfd, output_bfd,
+ input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend,
+ info, sec, h == NULL);
+ }
+
+ return TRUE;
+}
+
+
+static void
+elf32_xc16x_final_write_processing (bfd *abfd,
+ bfd_boolean linker ATTRIBUTE_UNUSED)
+{
+ unsigned long val;
+
+ switch (bfd_get_mach (abfd))
+ {
+ default:
+ case bfd_mach_xc16x:
+ val = 0x1000;
+ break;
+
+ case bfd_mach_xc16xl:
+ val = 0x1001;
+ break;
+
+ case bfd_mach_xc16xs:
+ val = 0x1002;
+ break;
+ }
+
+ elf_elfheader (abfd)->e_flags |= val;
+}
+
+static unsigned long
+elf32_xc16x_mach (flagword flags)
+{
+ switch (flags)
+ {
+ case 0x1000:
+ default:
+ return bfd_mach_xc16x;
+
+ case 0x1001:
+ return bfd_mach_xc16xl;
+
+ case 0x1002:
+ return bfd_mach_xc16xs;
+ }
+}
+
+
+static bfd_boolean
+elf32_xc16x_object_p (bfd *abfd)
+{
+ bfd_default_set_arch_mach (abfd, bfd_arch_xc16x,
+ elf32_xc16x_mach (elf_elfheader (abfd)->e_flags));
+ return TRUE;
+}
+
+
+#define ELF_ARCH bfd_arch_xc16x
+#define ELF_MACHINE_CODE EM_XC16X
+#define ELF_MAXPAGESIZE 0x100
+
+#define TARGET_LITTLE_SYM bfd_elf32_xc16x_vec
+#define TARGET_LITTLE_NAME "elf32-xc16x"
+#define elf_backend_final_write_processing elf32_xc16x_final_write_processing
+#define elf_backend_object_p elf32_xc16x_object_p
+#define elf_backend_can_gc_sections 1
+#define bfd_elf32_bfd_reloc_type_lookup xc16x_reloc_type_lookup
+#define elf_info_to_howto elf32_xc16x_info_to_howto
+#define elf_info_to_howto_rel elf32_xc16x_info_to_howto
+#define elf_backend_relocate_section elf32_xc16x_relocate_section
+#define elf_backend_rela_normal 1
+
+#include "elf32-target.h"
Modified: branches/binutils/package/bfd/elf32-xtensa.c
===================================================================
--- branches/binutils/package/bfd/elf32-xtensa.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf32-xtensa.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -640,7 +640,6 @@
{
bfd_vma sym_off = get_elf_r_symndx_offset (abfd, r_symndx);
BFD_ASSERT (sym_off == 0);
- BFD_ASSERT (rel->r_addend == 0);
blocks[block_count].address =
(section_addr + sym_off + rel->r_addend
+ bfd_get_32 (abfd, table_data + rel->r_offset));
@@ -2384,7 +2383,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -4756,6 +4755,19 @@
}
+static unsigned
+action_list_count (text_action_list *action_list)
+{
+ text_action *r = action_list->head;
+ unsigned count = 0;
+ for (r = action_list->head; r != NULL; r = r->next)
+ {
+ count++;
+ }
+ return count;
+}
+
+
static bfd_vma
offset_with_removed_text_before_fill (text_action_list *action_list,
bfd_vma offset)
@@ -6851,6 +6863,160 @@
}
+/* The xlate_map is a sorted array of address mappings designed to
+ answer the offset_with_removed_text() query with a binary search instead
+ of a linear search through the section's action_list. */
+
+typedef struct xlate_map_entry xlate_map_entry_t;
+typedef struct xlate_map xlate_map_t;
+
+struct xlate_map_entry
+{
+ unsigned orig_address;
+ unsigned new_address;
+ unsigned size;
+};
+
+struct xlate_map
+{
+ unsigned entry_count;
+ xlate_map_entry_t *entry;
+};
+
+
+static int
+xlate_compare (const void *a_v, const void *b_v)
+{
+ const xlate_map_entry_t *a = (const xlate_map_entry_t *) a_v;
+ const xlate_map_entry_t *b = (const xlate_map_entry_t *) b_v;
+ if (a->orig_address < b->orig_address)
+ return -1;
+ if (a->orig_address > (b->orig_address + b->size - 1))
+ return 1;
+ return 0;
+}
+
+
+static bfd_vma
+xlate_offset_with_removed_text (const xlate_map_t *map,
+ text_action_list *action_list,
+ bfd_vma offset)
+{
+ xlate_map_entry_t tmp;
+ void *r;
+ xlate_map_entry_t *e;
+
+ if (map == NULL)
+ return offset_with_removed_text (action_list, offset);
+
+ if (map->entry_count == 0)
+ return offset;
+
+ tmp.orig_address = offset;
+ tmp.new_address = offset;
+ tmp.size = 1;
+
+ r = bsearch (&offset, map->entry, map->entry_count,
+ sizeof (xlate_map_entry_t), &xlate_compare);
+ e = (xlate_map_entry_t *) r;
+
+ BFD_ASSERT (e != NULL);
+ if (e == NULL)
+ return offset;
+ return e->new_address - e->orig_address + offset;
+}
+
+
+/* Build a binary searchable offset translation map from a section's
+ action list. */
+
+static xlate_map_t *
+build_xlate_map (asection *sec, xtensa_relax_info *relax_info)
+{
+ xlate_map_t *map = (xlate_map_t *) bfd_malloc (sizeof (xlate_map_t));
+ text_action_list *action_list = &relax_info->action_list;
+ unsigned num_actions = 0;
+ text_action *r;
+ int removed;
+ xlate_map_entry_t *current_entry;
+
+ if (map == NULL)
+ return NULL;
+
+ num_actions = action_list_count (action_list);
+ map->entry = (xlate_map_entry_t *)
+ bfd_malloc (sizeof (xlate_map_entry_t) * (num_actions + 1));
+ if (map->entry == NULL)
+ {
+ free (map);
+ return NULL;
+ }
+ map->entry_count = 0;
+
+ removed = 0;
+ current_entry = &map->entry[0];
+
+ current_entry->orig_address = 0;
+ current_entry->new_address = 0;
+ current_entry->size = 0;
+
+ for (r = action_list->head; r != NULL; r = r->next)
+ {
+ unsigned orig_size = 0;
+ switch (r->action)
+ {
+ case ta_none:
+ case ta_remove_insn:
+ case ta_convert_longcall:
+ case ta_remove_literal:
+ case ta_add_literal:
+ break;
+ case ta_remove_longcall:
+ orig_size = 6;
+ break;
+ case ta_narrow_insn:
+ orig_size = 3;
+ break;
+ case ta_widen_insn:
+ orig_size = 2;
+ break;
+ case ta_fill:
+ break;
+ }
+ current_entry->size =
+ r->offset + orig_size - current_entry->orig_address;
+ if (current_entry->size != 0)
+ {
+ current_entry++;
+ map->entry_count++;
+ }
+ current_entry->orig_address = r->offset + orig_size;
+ removed += r->removed_bytes;
+ current_entry->new_address = r->offset + orig_size - removed;
+ current_entry->size = 0;
+ }
+
+ current_entry->size = (bfd_get_section_limit (sec->owner, sec)
+ - current_entry->orig_address);
+ if (current_entry->size != 0)
+ map->entry_count++;
+
+ return map;
+}
+
+
+/* Free an offset translation map. */
+
+static void
+free_xlate_map (xlate_map_t *map)
+{
+ if (map && map->entry)
+ free (map->entry);
+ if (map)
+ free (map);
+}
+
+
/* Use check_section_ebb_pcrels_fit to make sure that all of the
relocations in a section will fit if a proposed set of actions
are performed. */
@@ -6864,10 +7030,19 @@
{
unsigned i, j;
Elf_Internal_Rela *irel;
+ xlate_map_t *xmap = NULL;
+ bfd_boolean ok = TRUE;
xtensa_relax_info *relax_info;
relax_info = get_xtensa_relax_info (sec);
+ if (relax_info && sec->reloc_count > 100)
+ {
+ xmap = build_xlate_map (sec, relax_info);
+ /* NULL indicates out of memory, but the slow version
+ can still be used. */
+ }
+
for (i = 0; i < sec->reloc_count; i++)
{
r_reloc r_rel;
@@ -6903,10 +7078,12 @@
if (relax_info)
{
- self_offset = offset_with_removed_text (&relax_info->action_list,
- orig_self_offset);
- target_offset = offset_with_removed_text (&relax_info->action_list,
- orig_target_offset);
+ self_offset =
+ xlate_offset_with_removed_text (xmap, &relax_info->action_list,
+ orig_self_offset);
+ target_offset =
+ xlate_offset_with_removed_text (xmap, &relax_info->action_list,
+ orig_target_offset);
}
self_removed_bytes = 0;
@@ -6942,18 +7119,30 @@
opcode = get_relocation_opcode (abfd, sec, contents, irel);
if (opcode == XTENSA_UNDEFINED)
- return FALSE;
+ {
+ ok = FALSE;
+ break;
+ }
opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->r_info));
if (opnum == XTENSA_UNDEFINED)
- return FALSE;
+ {
+ ok = FALSE;
+ break;
+ }
if (!pcrel_reloc_fits (opcode, opnum, self_offset, target_offset))
- return FALSE;
+ {
+ ok = FALSE;
+ break;
+ }
}
}
- return TRUE;
+ if (xmap)
+ free_xlate_map (xmap);
+
+ return ok;
}
Modified: branches/binutils/package/bfd/elf64-alpha.c
===================================================================
--- branches/binutils/package/bfd/elf64-alpha.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-alpha.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Alpha specific support for 64-bit ELF
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Contributed by Richard Henderson <rth at tamu.edu>.
This file is part of BFD, the Binary File Descriptor library.
@@ -273,8 +273,9 @@
if (ret == (struct alpha_elf_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- elf64_alpha_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ elf64_alpha_link_hash_newfunc,
+ sizeof (struct alpha_elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1244,8 +1245,10 @@
/* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
.plt section. */
- if (!_bfd_elf_define_linkage_sym (abfd, info, s,
- "_PROCEDURE_LINKAGE_TABLE_"))
+ h = _bfd_elf_define_linkage_sym (abfd, info, s,
+ "_PROCEDURE_LINKAGE_TABLE_");
+ elf_hash_table (info)->hplt = h;
+ if (h == NULL)
return FALSE;
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
@@ -4715,8 +4718,8 @@
/* Mark some specially defined symbols as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot
+ || h == elf_hash_table (info)->hplt)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf64-hppa.c
===================================================================
--- branches/binutils/package/bfd/elf64-hppa.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-hppa.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* Support for HPPA 64-bit ELF
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -157,9 +157,6 @@
typedef struct bfd_hash_entry *(*new_hash_entry_func)
PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
-static bfd_boolean elf64_hppa_dyn_hash_table_init
- PARAMS ((struct elf64_hppa_dyn_hash_table *ht, bfd *abfd,
- new_hash_entry_func new));
static struct bfd_hash_entry *elf64_hppa_new_dyn_hash_entry
PARAMS ((struct bfd_hash_entry *entry, struct bfd_hash_table *table,
const char *string));
@@ -276,13 +273,13 @@
PARAMS ((Elf_Internal_Sym *, int));
static bfd_boolean
-elf64_hppa_dyn_hash_table_init (ht, abfd, new)
- struct elf64_hppa_dyn_hash_table *ht;
- bfd *abfd ATTRIBUTE_UNUSED;
- new_hash_entry_func new;
+elf64_hppa_dyn_hash_table_init (struct elf64_hppa_dyn_hash_table *ht,
+ bfd *abfd ATTRIBUTE_UNUSED,
+ new_hash_entry_func new,
+ unsigned int entsize)
{
memset (ht, 0, sizeof (*ht));
- return bfd_hash_table_init (&ht->root, new);
+ return bfd_hash_table_init (&ht->root, new, entsize);
}
static struct bfd_hash_entry*
@@ -328,14 +325,16 @@
if (!ret)
return 0;
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
- _bfd_elf_link_hash_newfunc))
+ _bfd_elf_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry)))
{
bfd_release (abfd, ret);
return 0;
}
if (!elf64_hppa_dyn_hash_table_init (&ret->dyn_hash_table, abfd,
- elf64_hppa_new_dyn_hash_entry))
+ elf64_hppa_new_dyn_hash_entry,
+ sizeof (struct elf64_hppa_dyn_hash_entry)))
return 0;
return &ret->root.root;
}
@@ -1130,6 +1129,7 @@
/* We never need an opd entry for a symbol which is not
defined by this output file. */
if (h && (h->root.type == bfd_link_hash_undefined
+ || h->root.type == bfd_link_hash_undefweak
|| h->root.u.def.section->output_section == NULL))
dyn_h->want_opd = 0;
@@ -2542,6 +2542,68 @@
return TRUE;
}
+/* Support for core dump NOTE sections. */
+
+static bfd_boolean
+elf64_hppa_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
+{
+ int offset;
+ size_t size;
+
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ case 760: /* Linux/hppa */
+ /* pr_cursig */
+ elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
+
+ /* pr_pid */
+ elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 32);
+
+ /* pr_reg */
+ offset = 112;
+ size = 640;
+
+ break;
+ }
+
+ /* Make a ".reg/999" section. */
+ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
+ size, note->descpos + offset);
+}
+
+static bfd_boolean
+elf64_hppa_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
+{
+ char * command;
+ int n;
+
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ case 136: /* Linux/hppa elf_prpsinfo. */
+ elf_tdata (abfd)->core_program
+ = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
+ elf_tdata (abfd)->core_command
+ = _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
+ }
+
+ /* Note that for some reason, a spurious space is tacked
+ onto the end of the args in some (at least one anyway)
+ implementations, so strip it off if it exists. */
+ command = elf_tdata (abfd)->core_command;
+ n = strlen (command);
+
+ if (0 < n && command[n - 1] == ' ')
+ command[n - 1] = '\0';
+
+ return TRUE;
+}
+
/* Return the number of additional phdrs we will need.
The generic ELF code only creates PT_PHDRs for executables. The HP
@@ -2703,7 +2765,7 @@
{ ".dlt", 4, 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_PARISC_SHORT },
{ ".sdata", 6, 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_PARISC_SHORT },
{ ".sbss", 5, 0, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_PARISC_SHORT },
- { ".tbss", 5, 0, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_PARISC_WEAKORDER },
+ { ".tbss", 5, 0, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_HP_TLS },
{ NULL, 0, 0, 0, 0 }
};
@@ -2775,7 +2837,9 @@
elf64_hppa_finish_dynamic_symbol
#define elf_backend_finish_dynamic_sections \
elf64_hppa_finish_dynamic_sections
-
+#define elf_backend_grok_prstatus elf64_hppa_grok_prstatus
+#define elf_backend_grok_psinfo elf64_hppa_grok_psinfo
+
/* Stuff for the BFD linker: */
#define bfd_elf64_bfd_link_hash_table_create \
elf64_hppa_hash_table_create
@@ -2814,7 +2878,5 @@
#undef TARGET_BIG_NAME
#define TARGET_BIG_NAME "elf64-hppa-linux"
-#undef elf_backend_special_sections
-
#define INCLUDED_TARGET_FILE 1
#include "elf64-target.h"
Modified: branches/binutils/package/bfd/elf64-ppc.c
===================================================================
--- branches/binutils/package/bfd/elf64-ppc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-ppc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* PowerPC64-specific support for 64-bit ELF.
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Linus Nordberg, Swox AB <info at swox.com>,
based on elf32-ppc.c by Ian Lance Taylor.
@@ -89,6 +89,7 @@
#define elf_backend_check_directives ppc64_elf_check_directives
#define elf_backend_archive_symbol_lookup ppc64_elf_archive_symbol_lookup
#define elf_backend_check_relocs ppc64_elf_check_relocs
+#define elf_backend_gc_mark_dynamic_ref ppc64_elf_gc_mark_dynamic_ref
#define elf_backend_gc_mark_hook ppc64_elf_gc_mark_hook
#define elf_backend_gc_sweep_hook ppc64_elf_gc_sweep_hook
#define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol
@@ -3463,18 +3464,21 @@
if (htab == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&htab->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&htab->elf, abfd, link_hash_newfunc,
+ sizeof (struct ppc_link_hash_entry)))
{
free (htab);
return NULL;
}
/* Init the stub hash table too. */
- if (!bfd_hash_table_init (&htab->stub_hash_table, stub_hash_newfunc))
+ if (!bfd_hash_table_init (&htab->stub_hash_table, stub_hash_newfunc,
+ sizeof (struct ppc_stub_hash_entry)))
return NULL;
/* And the branch hash table. */
- if (!bfd_hash_table_init (&htab->branch_hash_table, branch_hash_newfunc))
+ if (!bfd_hash_table_init (&htab->branch_hash_table, branch_hash_newfunc,
+ sizeof (struct ppc_branch_hash_entry)))
return NULL;
/* Initializing two fields of the union is just cosmetic. We really
@@ -4939,6 +4943,54 @@
return val;
}
+/* Mark sections containing dynamically referenced symbols. When
+ building shared libraries, we must assume that any visible symbol is
+ referenced. */
+
+static bfd_boolean
+ppc64_elf_gc_mark_dynamic_ref (struct elf_link_hash_entry *h, void *inf)
+{
+ struct bfd_link_info *info = (struct bfd_link_info *) inf;
+ struct ppc_link_hash_entry *eh = (struct ppc_link_hash_entry *) h;
+
+ if (eh->elf.root.type == bfd_link_hash_warning)
+ eh = (struct ppc_link_hash_entry *) eh->elf.root.u.i.link;
+
+ /* Dynamic linking info is on the func descriptor sym. */
+ if (eh->oh != NULL
+ && eh->oh->is_func_descriptor
+ && (eh->oh->elf.root.type == bfd_link_hash_defined
+ || eh->oh->elf.root.type == bfd_link_hash_defweak))
+ eh = eh->oh;
+
+ if ((eh->elf.root.type == bfd_link_hash_defined
+ || eh->elf.root.type == bfd_link_hash_defweak)
+ && (eh->elf.ref_dynamic
+ || (!info->executable
+ && eh->elf.def_regular
+ && ELF_ST_VISIBILITY (eh->elf.other) != STV_INTERNAL
+ && ELF_ST_VISIBILITY (eh->elf.other) != STV_HIDDEN)))
+ {
+ asection *code_sec;
+
+ eh->elf.root.u.def.section->flags |= SEC_KEEP;
+
+ /* Function descriptor syms cause the associated
+ function code sym section to be marked. */
+ if (eh->is_func_descriptor
+ && (eh->oh->elf.root.type == bfd_link_hash_defined
+ || eh->oh->elf.root.type == bfd_link_hash_defweak))
+ eh->oh->elf.root.u.def.section->flags |= SEC_KEEP;
+ else if (get_opd_info (eh->elf.root.u.def.section) != NULL
+ && opd_entry_value (eh->elf.root.u.def.section,
+ eh->elf.root.u.def.value,
+ &code_sec, NULL) != (bfd_vma) -1)
+ code_sec->flags |= SEC_KEEP;
+ }
+
+ return TRUE;
+}
+
/* Return the section that should be marked against GC for a given
relocation. */
@@ -4958,7 +5010,7 @@
struct bfd_sym_chain *sym = info->gc_sym_list;
info->gc_sym_list = NULL;
- do
+ for (; sym != NULL; sym = sym->next)
{
struct ppc_link_hash_entry *eh;
@@ -4988,10 +5040,7 @@
rsec = eh->elf.root.u.def.section;
if (!rsec->gc_mark)
_bfd_elf_gc_mark (info, rsec, ppc64_elf_gc_mark_hook);
-
- sym = sym->next;
}
- while (sym != NULL);
}
/* Syms return NULL if we're marking .opd, so we avoid marking all
@@ -7536,9 +7585,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure this symbol is output as a dynamic symbol.
+ Undefined weak syms won't yet be marked as dynamic. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else if (ELIMINATE_COPY_RELOCS)
{
@@ -9494,6 +9555,9 @@
if (strcmp (".toc", sec->name) == 0)
return 0;
+ if (strcmp (".toc1", sec->name) == 0)
+ return 0;
+
return _bfd_elf_default_action_discarded (sec);
}
@@ -9550,9 +9614,6 @@
/* Disabled until we sort out how ld should choose 'y' vs 'at'. */
bfd_boolean is_power4 = FALSE;
- if (info->relocatable)
- return TRUE;
-
/* Initialize howto table if needed. */
if (!ppc64_elf_howto_table[R_PPC64_ADDR32])
ppc_howto_init ();
@@ -9574,7 +9635,7 @@
for (; rel < relend; rel++)
{
enum elf_ppc64_reloc_type r_type;
- bfd_vma addend;
+ bfd_vma addend, orig_addend;
bfd_reloc_status_type r;
Elf_Internal_Sym *sym;
asection *sec;
@@ -9611,6 +9672,7 @@
sym_name = NULL;
unresolved_reloc = FALSE;
warned = FALSE;
+ orig_addend = rel->r_addend;
if (r_symndx < symtab_hdr->sh_info)
{
@@ -9629,11 +9691,25 @@
if (adjust == -1)
relocation = 0;
else
- relocation += adjust;
+ {
+ /* If this is a relocation against the opd section sym
+ and we have edited .opd, adjust the reloc addend so
+ that ld -r and ld --emit-relocs output is correct.
+ If it is a reloc against some other .opd symbol,
+ then the symbol value will be adjusted later. */
+ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ rel->r_addend += adjust;
+ else
+ relocation += adjust;
+ }
}
+ if (info->relocatable)
+ continue;
}
else
{
+ if (info->relocatable)
+ continue;
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h_elf, sec, relocation,
@@ -10126,8 +10202,9 @@
&& get_opd_info (sec) != NULL)
{
/* The branch destination is the value of the opd entry. */
- bfd_vma off = (relocation - sec->output_section->vma
- - sec->output_offset + rel->r_addend);
+ bfd_vma off = (relocation + addend
+ - sec->output_section->vma
+ - sec->output_offset);
bfd_vma dest = opd_entry_value (sec, off, NULL, NULL);
if (dest != (bfd_vma) -1)
{
@@ -10143,7 +10220,7 @@
+ input_section->output_section->vma);
if (stub_entry == NULL
- && (relocation + rel->r_addend - from + max_br_offset
+ && (relocation + addend - from + max_br_offset
>= 2 * max_br_offset)
&& r_type != R_PPC64_ADDR14_BRTAKEN
&& r_type != R_PPC64_ADDR14_BRNTAKEN)
@@ -10177,7 +10254,7 @@
else
{
/* Invert 'y' bit if not the default. */
- if ((bfd_signed_vma) (relocation + rel->r_addend - from) < 0)
+ if ((bfd_signed_vma) (relocation + addend - from) < 0)
insn ^= 0x01 << 21;
}
@@ -10191,7 +10268,7 @@
&& h->elf.root.type == bfd_link_hash_undefweak
&& r_type == R_PPC64_REL24
&& relocation == 0
- && rel->r_addend == 0)
+ && addend == 0)
{
bfd_put_32 (output_bfd, NOP, contents + rel->r_offset);
continue;
@@ -10300,7 +10377,7 @@
}
for (; ent != NULL; ent = ent->next)
- if (ent->addend == rel->r_addend
+ if (ent->addend == orig_addend
&& ent->owner == input_bfd
&& ent->tls_type == tls_type)
break;
@@ -10335,7 +10412,7 @@
outrel.r_offset = (got->output_section->vma
+ got->output_offset
+ off);
- outrel.r_addend = rel->r_addend;
+ outrel.r_addend = addend;
if (tls_type & (TLS_LD | TLS_GD))
{
outrel.r_addend = 0;
@@ -10348,7 +10425,7 @@
bfd_elf64_swap_reloca_out (output_bfd,
&outrel, loc);
outrel.r_offset += 8;
- outrel.r_addend = rel->r_addend;
+ outrel.r_addend = addend;
outrel.r_info
= ELF64_R_INFO (indx, R_PPC64_DTPREL64);
}
@@ -10386,7 +10463,7 @@
emitting a reloc. */
else
{
- relocation += rel->r_addend;
+ relocation += addend;
if (tls_type == (TLS_TLS | TLS_LD))
relocation = 1;
else if (tls_type != 0)
@@ -10439,7 +10516,7 @@
{
struct plt_entry *ent;
for (ent = h->elf.plt.plist; ent != NULL; ent = ent->next)
- if (ent->addend == rel->r_addend
+ if (ent->addend == orig_addend
&& ent->plt.offset != (bfd_vma) -1)
{
relocation = (htab->plt->output_section->vma
@@ -10695,6 +10772,9 @@
if (sreloc == NULL)
abort ();
+ if (sreloc->reloc_count * sizeof (Elf64_External_Rela)
+ >= sreloc->size)
+ abort ();
loc = sreloc->contents;
loc += sreloc->reloc_count++ * sizeof (Elf64_External_Rela);
bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc);
@@ -10885,7 +10965,7 @@
if (!((*info->callbacks->reloc_overflow)
(info, (h ? &h->elf.root : NULL), sym_name,
ppc64_elf_howto_table[r_type]->name,
- rel->r_addend, input_bfd, input_section, rel->r_offset)))
+ orig_addend, input_bfd, input_section, rel->r_offset)))
return FALSE;
}
else
@@ -10908,7 +10988,7 @@
adjusted. Worse, reloc symbol indices will be for the output
file rather than the input. Save a copy of the relocs for
opd_entry_value. */
- if (is_opd && info->emitrelocations)
+ if (is_opd && (info->emitrelocations || info->relocatable))
{
bfd_size_type amt;
amt = input_section->reloc_count * sizeof (Elf_Internal_Rela);
Modified: branches/binutils/package/bfd/elf64-s390.c
===================================================================
--- branches/binutils/package/bfd/elf64-s390.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-s390.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* IBM S/390-specific support for 64-bit ELF
- Copyright 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed Martin Schwidefsky (schwidefsky at de.ibm.com).
@@ -724,7 +724,8 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
+ sizeof (struct elf_s390_link_hash_entry)))
{
free (ret);
return NULL;
@@ -1881,9 +1882,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else if (ELIMINATE_COPY_RELOCS)
{
@@ -3240,8 +3253,8 @@
/* Mark some specially defined symbols as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ || h == htab->elf.hgot
+ || h == htab->elf.hplt)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf64-sh64.c
===================================================================
--- branches/binutils/package/bfd/elf64-sh64.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-sh64.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* SuperH SH64-specific support for 64-bit ELF
- Copyright 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -3138,8 +3138,9 @@
if (ret == (struct elf_sh64_link_hash_table *) NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- sh64_elf64_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ sh64_elf64_link_hash_newfunc,
+ sizeof (struct elf_sh64_link_hash_entry)))
{
free (ret);
return NULL;
@@ -3240,6 +3241,7 @@
h = (struct elf_link_hash_entry *) bh;
h->def_regular = 1;
h->type = STT_OBJECT;
+ elf_hash_table (info)->hplt = h;
if (info->shared
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
@@ -3888,7 +3890,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
Modified: branches/binutils/package/bfd/elf64-x86-64.c
===================================================================
--- branches/binutils/package/bfd/elf64-x86-64.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elf64-x86-64.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* X86-64 specific support for 64-bit ELF
- Copyright 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Jan Hubicka <jh at suse.cz>.
@@ -31,8 +31,8 @@
#define MINUS_ONE (~ (bfd_vma) 0)
/* The relocation "howto" table. Order of fields:
- type, size, bitsize, pc_relative, complain_on_overflow,
- special_function, name, partial_inplace, src_mask, dst_pack, pcrel_offset. */
+ type, rightshift, size, bitsize, pc_relative, bitpos, complain_on_overflow,
+ special_function, name, partial_inplace, src_mask, dst_mask, pcrel_offset. */
static reloc_howto_type x86_64_elf_howto_table[] =
{
HOWTO(R_X86_64_NONE, 0, 0, 0, FALSE, 0, complain_overflow_dont,
@@ -112,12 +112,41 @@
HOWTO(R_X86_64_GOTPC32, 0, 2, 32, TRUE, 0, complain_overflow_signed,
bfd_elf_generic_reloc, "R_X86_64_GOTPC32",
FALSE, 0xffffffff, 0xffffffff, TRUE),
+ HOWTO(R_X86_64_GOT64, 0, 4, 64, FALSE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_GOT64", FALSE, MINUS_ONE, MINUS_ONE,
+ FALSE),
+ HOWTO(R_X86_64_GOTPCREL64, 0, 4, 64, TRUE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_GOTPCREL64", FALSE, MINUS_ONE,
+ MINUS_ONE, TRUE),
+ HOWTO(R_X86_64_GOTPC64, 0, 4, 64, TRUE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_GOTPC64",
+ FALSE, MINUS_ONE, MINUS_ONE, TRUE),
+ HOWTO(R_X86_64_GOTPLT64, 0, 4, 64, FALSE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_GOTPLT64", FALSE, MINUS_ONE,
+ MINUS_ONE, FALSE),
+ HOWTO(R_X86_64_PLTOFF64, 0, 4, 64, FALSE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_PLTOFF64", FALSE, MINUS_ONE,
+ MINUS_ONE, FALSE),
+ EMPTY_HOWTO (32),
+ EMPTY_HOWTO (33),
+ HOWTO(R_X86_64_GOTPC32_TLSDESC, 0, 2, 32, TRUE, 0,
+ complain_overflow_bitfield, bfd_elf_generic_reloc,
+ "R_X86_64_GOTPC32_TLSDESC",
+ FALSE, 0xffffffff, 0xffffffff, TRUE),
+ HOWTO(R_X86_64_TLSDESC_CALL, 0, 0, 0, FALSE, 0,
+ complain_overflow_dont, bfd_elf_generic_reloc,
+ "R_X86_64_TLSDESC_CALL",
+ FALSE, 0, 0, FALSE),
+ HOWTO(R_X86_64_TLSDESC, 0, 4, 64, FALSE, 0,
+ complain_overflow_bitfield, bfd_elf_generic_reloc,
+ "R_X86_64_TLSDESC",
+ FALSE, MINUS_ONE, MINUS_ONE, FALSE),
/* We have a gap in the reloc numbers here.
R_X86_64_standard counts the number up to this point, and
R_X86_64_vt_offset is the value to subtract from a reloc type of
R_X86_64_GNU_VT* to form an index into this table. */
-#define R_X86_64_standard (R_X86_64_GOTPC32 + 1)
+#define R_X86_64_standard (R_X86_64_TLSDESC + 1)
#define R_X86_64_vt_offset (R_X86_64_GNU_VTINHERIT - R_X86_64_standard)
/* GNU extension to record C++ vtable hierarchy. */
@@ -166,14 +195,43 @@
{ BFD_RELOC_64_PCREL, R_X86_64_PC64, },
{ BFD_RELOC_X86_64_GOTOFF64, R_X86_64_GOTOFF64, },
{ BFD_RELOC_X86_64_GOTPC32, R_X86_64_GOTPC32, },
+ { BFD_RELOC_X86_64_GOT64, R_X86_64_GOT64, },
+ { BFD_RELOC_X86_64_GOTPCREL64,R_X86_64_GOTPCREL64, },
+ { BFD_RELOC_X86_64_GOTPC64, R_X86_64_GOTPC64, },
+ { BFD_RELOC_X86_64_GOTPLT64, R_X86_64_GOTPLT64, },
+ { BFD_RELOC_X86_64_PLTOFF64, R_X86_64_PLTOFF64, },
+ { BFD_RELOC_X86_64_GOTPC32_TLSDESC, R_X86_64_GOTPC32_TLSDESC, },
+ { BFD_RELOC_X86_64_TLSDESC_CALL, R_X86_64_TLSDESC_CALL, },
+ { BFD_RELOC_X86_64_TLSDESC, R_X86_64_TLSDESC, },
{ BFD_RELOC_VTABLE_INHERIT, R_X86_64_GNU_VTINHERIT, },
{ BFD_RELOC_VTABLE_ENTRY, R_X86_64_GNU_VTENTRY, },
};
+static reloc_howto_type *
+elf64_x86_64_rtype_to_howto (bfd *abfd, unsigned r_type)
+{
+ unsigned i;
+ if (r_type < (unsigned int) R_X86_64_GNU_VTINHERIT
+ || r_type >= (unsigned int) R_X86_64_max)
+ {
+ if (r_type >= (unsigned int) R_X86_64_standard)
+ {
+ (*_bfd_error_handler) (_("%B: invalid relocation type %d"),
+ abfd, (int) r_type);
+ r_type = R_X86_64_NONE;
+ }
+ i = r_type;
+ }
+ else
+ i = r_type - (unsigned int) R_X86_64_vt_offset;
+ BFD_ASSERT (x86_64_elf_howto_table[i].type == r_type);
+ return &x86_64_elf_howto_table[i];
+}
+
/* Given a BFD reloc type, return a HOWTO structure. */
static reloc_howto_type *
-elf64_x86_64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+elf64_x86_64_reloc_type_lookup (bfd *abfd,
bfd_reloc_code_real_type code)
{
unsigned int i;
@@ -182,7 +240,8 @@
i++)
{
if (x86_64_reloc_map[i].bfd_reloc_val == code)
- return &x86_64_elf_howto_table[i];
+ return elf64_x86_64_rtype_to_howto (abfd,
+ x86_64_reloc_map[i].elf_reloc_val);
}
return 0;
}
@@ -193,23 +252,10 @@
elf64_x86_64_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
Elf_Internal_Rela *dst)
{
- unsigned r_type, i;
+ unsigned r_type;
r_type = ELF64_R_TYPE (dst->r_info);
- if (r_type < (unsigned int) R_X86_64_GNU_VTINHERIT
- || r_type >= (unsigned int) R_X86_64_max)
- {
- if (r_type >= (unsigned int) R_X86_64_standard)
- {
- (*_bfd_error_handler) (_("%B: invalid relocation type %d"),
- abfd, (int) r_type);
- r_type = R_X86_64_NONE;
- }
- i = r_type;
- }
- else
- i = r_type - (unsigned int) R_X86_64_vt_offset;
- cache_ptr->howto = &x86_64_elf_howto_table[i];
+ cache_ptr->howto = elf64_x86_64_rtype_to_howto (abfd, r_type);
BFD_ASSERT (r_type == cache_ptr->howto->type);
}
@@ -353,7 +399,20 @@
#define GOT_NORMAL 1
#define GOT_TLS_GD 2
#define GOT_TLS_IE 3
+#define GOT_TLS_GDESC 4
+#define GOT_TLS_GD_BOTH_P(type) \
+ ((type) == (GOT_TLS_GD | GOT_TLS_GDESC))
+#define GOT_TLS_GD_P(type) \
+ ((type) == GOT_TLS_GD || GOT_TLS_GD_BOTH_P (type))
+#define GOT_TLS_GDESC_P(type) \
+ ((type) == GOT_TLS_GDESC || GOT_TLS_GD_BOTH_P (type))
+#define GOT_TLS_GD_ANY_P(type) \
+ (GOT_TLS_GD_P (type) || GOT_TLS_GDESC_P (type))
unsigned char tls_type;
+
+ /* Offset of the GOTPLT entry reserved for the TLS descriptor,
+ starting at the end of the jump table. */
+ bfd_vma tlsdesc_got;
};
#define elf64_x86_64_hash_entry(ent) \
@@ -365,6 +424,9 @@
/* tls_type for each local got entry. */
char *local_got_tls_type;
+
+ /* GOTPLT entries for TLS descriptors. */
+ bfd_vma *local_tlsdesc_gotent;
};
#define elf64_x86_64_tdata(abfd) \
@@ -373,6 +435,8 @@
#define elf64_x86_64_local_got_tls_type(abfd) \
(elf64_x86_64_tdata (abfd)->local_got_tls_type)
+#define elf64_x86_64_local_tlsdesc_gotent(abfd) \
+ (elf64_x86_64_tdata (abfd)->local_tlsdesc_gotent)
/* x86-64 ELF linker hash table. */
@@ -389,11 +453,23 @@
asection *sdynbss;
asection *srelbss;
+ /* The offset into splt of the PLT entry for the TLS descriptor
+ resolver. Special values are 0, if not necessary (or not found
+ to be necessary yet), and -1 if needed but not determined
+ yet. */
+ bfd_vma tlsdesc_plt;
+ /* The offset into sgot of the GOT entry used by the PLT entry
+ above. */
+ bfd_vma tlsdesc_got;
+
union {
bfd_signed_vma refcount;
bfd_vma offset;
} tls_ld_got;
+ /* The amount of space used by the jump slots in the GOT. */
+ bfd_vma sgotplt_jump_table_size;
+
/* Small local sym to section mapping cache. */
struct sym_sec_cache sym_sec;
};
@@ -403,6 +479,9 @@
#define elf64_x86_64_hash_table(p) \
((struct elf64_x86_64_link_hash_table *) ((p)->hash))
+#define elf64_x86_64_compute_jump_table_size(htab) \
+ ((htab)->srelplt->reloc_count * GOT_ENTRY_SIZE)
+
/* Create an entry in an x86-64 ELF linker hash table. */
static struct bfd_hash_entry *
@@ -428,6 +507,7 @@
eh = (struct elf64_x86_64_link_hash_entry *) entry;
eh->dyn_relocs = NULL;
eh->tls_type = GOT_UNKNOWN;
+ eh->tlsdesc_got = (bfd_vma) -1;
}
return entry;
@@ -445,7 +525,8 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
+ sizeof (struct elf64_x86_64_link_hash_entry)))
{
free (ret);
return NULL;
@@ -459,7 +540,10 @@
ret->sdynbss = NULL;
ret->srelbss = NULL;
ret->sym_sec.abfd = NULL;
+ ret->tlsdesc_plt = 0;
+ ret->tlsdesc_got = 0;
ret->tls_ld_got.refcount = 0;
+ ret->sgotplt_jump_table_size = 0;
return &ret->elf.root;
}
@@ -616,6 +700,8 @@
switch (r_type)
{
case R_X86_64_TLSGD:
+ case R_X86_64_GOTPC32_TLSDESC:
+ case R_X86_64_TLSDESC_CALL:
case R_X86_64_GOTTPOFF:
if (is_local)
return R_X86_64_TPOFF32;
@@ -706,6 +792,11 @@
case R_X86_64_GOT32:
case R_X86_64_GOTPCREL:
case R_X86_64_TLSGD:
+ case R_X86_64_GOT64:
+ case R_X86_64_GOTPCREL64:
+ case R_X86_64_GOTPLT64:
+ case R_X86_64_GOTPC32_TLSDESC:
+ case R_X86_64_TLSDESC_CALL:
/* This symbol requires a global offset table entry. */
{
int tls_type, old_tls_type;
@@ -715,10 +806,21 @@
default: tls_type = GOT_NORMAL; break;
case R_X86_64_TLSGD: tls_type = GOT_TLS_GD; break;
case R_X86_64_GOTTPOFF: tls_type = GOT_TLS_IE; break;
+ case R_X86_64_GOTPC32_TLSDESC:
+ case R_X86_64_TLSDESC_CALL:
+ tls_type = GOT_TLS_GDESC; break;
}
if (h != NULL)
{
+ if (r_type == R_X86_64_GOTPLT64)
+ {
+ /* This relocation indicates that we also need
+ a PLT entry, as this is a function. We don't need
+ a PLT entry for local symbols. */
+ h->needs_plt = 1;
+ h->plt.refcount += 1;
+ }
h->got.refcount += 1;
old_tls_type = elf64_x86_64_hash_entry (h)->tls_type;
}
@@ -733,14 +835,17 @@
bfd_size_type size;
size = symtab_hdr->sh_info;
- size *= sizeof (bfd_signed_vma) + sizeof (char);
+ size *= sizeof (bfd_signed_vma)
+ + sizeof (bfd_vma) + sizeof (char);
local_got_refcounts = ((bfd_signed_vma *)
bfd_zalloc (abfd, size));
if (local_got_refcounts == NULL)
return FALSE;
elf_local_got_refcounts (abfd) = local_got_refcounts;
+ elf64_x86_64_local_tlsdesc_gotent (abfd)
+ = (bfd_vma *) (local_got_refcounts + symtab_hdr->sh_info);
elf64_x86_64_local_got_tls_type (abfd)
- = (char *) (local_got_refcounts + symtab_hdr->sh_info);
+ = (char *) (local_got_refcounts + 2 * symtab_hdr->sh_info);
}
local_got_refcounts[r_symndx] += 1;
old_tls_type
@@ -750,10 +855,14 @@
/* If a TLS symbol is accessed using IE at least once,
there is no point to use dynamic model for it. */
if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN
- && (old_tls_type != GOT_TLS_GD || tls_type != GOT_TLS_IE))
+ && (! GOT_TLS_GD_ANY_P (old_tls_type)
+ || tls_type != GOT_TLS_IE))
{
- if (old_tls_type == GOT_TLS_IE && tls_type == GOT_TLS_GD)
+ if (old_tls_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (tls_type))
tls_type = old_tls_type;
+ else if (GOT_TLS_GD_ANY_P (old_tls_type)
+ && GOT_TLS_GD_ANY_P (tls_type))
+ tls_type |= old_tls_type;
else
{
(*_bfd_error_handler)
@@ -775,6 +884,7 @@
case R_X86_64_GOTOFF64:
case R_X86_64_GOTPC32:
+ case R_X86_64_GOTPC64:
create_got:
if (htab->sgot == NULL)
{
@@ -802,6 +912,16 @@
h->plt.refcount += 1;
break;
+ case R_X86_64_PLTOFF64:
+ /* This tries to form the 'address' of a function relative
+ to GOT. For global symbols we need a PLT entry. */
+ if (h != NULL)
+ {
+ h->needs_plt = 1;
+ h->plt.refcount += 1;
+ }
+ goto create_got;
+
case R_X86_64_8:
case R_X86_64_16:
case R_X86_64_32:
@@ -1101,11 +1221,18 @@
break;
case R_X86_64_TLSGD:
+ case R_X86_64_GOTPC32_TLSDESC:
+ case R_X86_64_TLSDESC_CALL:
case R_X86_64_GOTTPOFF:
case R_X86_64_GOT32:
case R_X86_64_GOTPCREL:
+ case R_X86_64_GOT64:
+ case R_X86_64_GOTPCREL64:
+ case R_X86_64_GOTPLT64:
if (h != NULL)
{
+ if (r_type == R_X86_64_GOTPLT64 && h->plt.refcount > 0)
+ h->plt.refcount -= 1;
if (h->got.refcount > 0)
h->got.refcount -= 1;
}
@@ -1130,6 +1257,7 @@
/* Fall thru */
case R_X86_64_PLT32:
+ case R_X86_64_PLTOFF64:
if (h != NULL)
{
if (h->plt.refcount > 0)
@@ -1368,6 +1496,7 @@
/* We also need to make an entry in the .rela.plt section. */
htab->srelplt->size += sizeof (Elf64_External_Rela);
+ htab->srelplt->reloc_count++;
}
else
{
@@ -1381,6 +1510,9 @@
h->needs_plt = 0;
}
+ eh = (struct elf64_x86_64_link_hash_entry *) h;
+ eh->tlsdesc_got = (bfd_vma) -1;
+
/* If R_X86_64_GOTTPOFF symbol is now local to the binary,
make it a R_X86_64_TPOFF32 requiring no GOT entry. */
if (h->got.refcount > 0
@@ -1403,31 +1535,46 @@
return FALSE;
}
- s = htab->sgot;
- h->got.offset = s->size;
- s->size += GOT_ENTRY_SIZE;
- /* R_X86_64_TLSGD needs 2 consecutive GOT slots. */
- if (tls_type == GOT_TLS_GD)
- s->size += GOT_ENTRY_SIZE;
+ if (GOT_TLS_GDESC_P (tls_type))
+ {
+ eh->tlsdesc_got = htab->sgotplt->size
+ - elf64_x86_64_compute_jump_table_size (htab);
+ htab->sgotplt->size += 2 * GOT_ENTRY_SIZE;
+ h->got.offset = (bfd_vma) -2;
+ }
+ if (! GOT_TLS_GDESC_P (tls_type)
+ || GOT_TLS_GD_P (tls_type))
+ {
+ s = htab->sgot;
+ h->got.offset = s->size;
+ s->size += GOT_ENTRY_SIZE;
+ if (GOT_TLS_GD_P (tls_type))
+ s->size += GOT_ENTRY_SIZE;
+ }
dyn = htab->elf.dynamic_sections_created;
/* R_X86_64_TLSGD needs one dynamic relocation if local symbol
and two if global.
R_X86_64_GOTTPOFF needs one dynamic relocation. */
- if ((tls_type == GOT_TLS_GD && h->dynindx == -1)
+ if ((GOT_TLS_GD_P (tls_type) && h->dynindx == -1)
|| tls_type == GOT_TLS_IE)
htab->srelgot->size += sizeof (Elf64_External_Rela);
- else if (tls_type == GOT_TLS_GD)
+ else if (GOT_TLS_GD_P (tls_type))
htab->srelgot->size += 2 * sizeof (Elf64_External_Rela);
- else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
- || h->root.type != bfd_link_hash_undefweak)
+ else if (! GOT_TLS_GDESC_P (tls_type)
+ && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || h->root.type != bfd_link_hash_undefweak)
&& (info->shared
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
htab->srelgot->size += sizeof (Elf64_External_Rela);
+ if (GOT_TLS_GDESC_P (tls_type))
+ {
+ htab->srelplt->size += sizeof (Elf64_External_Rela);
+ htab->tlsdesc_plt = (bfd_vma) -1;
+ }
}
else
h->got.offset = (bfd_vma) -1;
- eh = (struct elf64_x86_64_link_hash_entry *) h;
if (eh->dyn_relocs == NULL)
return TRUE;
@@ -1462,9 +1609,21 @@
/* Also discard relocs on undefined weak syms with non-default
visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
- eh->dyn_relocs = NULL;
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else if (ELIMINATE_COPY_RELOCS)
{
@@ -1575,6 +1734,7 @@
bfd_signed_vma *local_got;
bfd_signed_vma *end_local_got;
char *local_tls_type;
+ bfd_vma *local_tlsdesc_gotent;
bfd_size_type locsymcount;
Elf_Internal_Shdr *symtab_hdr;
asection *srel;
@@ -1618,20 +1778,43 @@
locsymcount = symtab_hdr->sh_info;
end_local_got = local_got + locsymcount;
local_tls_type = elf64_x86_64_local_got_tls_type (ibfd);
+ local_tlsdesc_gotent = elf64_x86_64_local_tlsdesc_gotent (ibfd);
s = htab->sgot;
srel = htab->srelgot;
- for (; local_got < end_local_got; ++local_got, ++local_tls_type)
+ for (; local_got < end_local_got;
+ ++local_got, ++local_tls_type, ++local_tlsdesc_gotent)
{
+ *local_tlsdesc_gotent = (bfd_vma) -1;
if (*local_got > 0)
{
- *local_got = s->size;
- s->size += GOT_ENTRY_SIZE;
- if (*local_tls_type == GOT_TLS_GD)
- s->size += GOT_ENTRY_SIZE;
+ if (GOT_TLS_GDESC_P (*local_tls_type))
+ {
+ *local_tlsdesc_gotent = htab->sgotplt->size
+ - elf64_x86_64_compute_jump_table_size (htab);
+ htab->sgotplt->size += 2 * GOT_ENTRY_SIZE;
+ *local_got = (bfd_vma) -2;
+ }
+ if (! GOT_TLS_GDESC_P (*local_tls_type)
+ || GOT_TLS_GD_P (*local_tls_type))
+ {
+ *local_got = s->size;
+ s->size += GOT_ENTRY_SIZE;
+ if (GOT_TLS_GD_P (*local_tls_type))
+ s->size += GOT_ENTRY_SIZE;
+ }
if (info->shared
- || *local_tls_type == GOT_TLS_GD
+ || GOT_TLS_GD_ANY_P (*local_tls_type)
|| *local_tls_type == GOT_TLS_IE)
- srel->size += sizeof (Elf64_External_Rela);
+ {
+ if (GOT_TLS_GDESC_P (*local_tls_type))
+ {
+ htab->srelplt->size += sizeof (Elf64_External_Rela);
+ htab->tlsdesc_plt = (bfd_vma) -1;
+ }
+ if (! GOT_TLS_GDESC_P (*local_tls_type)
+ || GOT_TLS_GD_P (*local_tls_type))
+ srel->size += sizeof (Elf64_External_Rela);
+ }
}
else
*local_got = (bfd_vma) -1;
@@ -1653,6 +1836,34 @@
sym dynamic relocs. */
elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info);
+ /* For every jump slot reserved in the sgotplt, reloc_count is
+ incremented. However, when we reserve space for TLS descriptors,
+ it's not incremented, so in order to compute the space reserved
+ for them, it suffices to multiply the reloc count by the jump
+ slot size. */
+ if (htab->srelplt)
+ htab->sgotplt_jump_table_size
+ = elf64_x86_64_compute_jump_table_size (htab);
+
+ if (htab->tlsdesc_plt)
+ {
+ /* If we're not using lazy TLS relocations, don't generate the
+ PLT and GOT entries they require. */
+ if ((info->flags & DF_BIND_NOW))
+ htab->tlsdesc_plt = 0;
+ else
+ {
+ htab->tlsdesc_got = htab->sgot->size;
+ htab->sgot->size += GOT_ENTRY_SIZE;
+ /* Reserve room for the initial entry.
+ FIXME: we could probably do away with it in this case. */
+ if (htab->splt->size == 0)
+ htab->splt->size += PLT_ENTRY_SIZE;
+ htab->tlsdesc_plt = htab->splt->size;
+ htab->splt->size += PLT_ENTRY_SIZE;
+ }
+ }
+
/* We now have determined the sizes of the various dynamic sections.
Allocate memory for them. */
relocs = FALSE;
@@ -1676,7 +1887,8 @@
/* We use the reloc_count field as a counter if we need
to copy relocs into the output file. */
- s->reloc_count = 0;
+ if (s != htab->srelplt)
+ s->reloc_count = 0;
}
else
{
@@ -1736,6 +1948,11 @@
|| !add_dynamic_entry (DT_PLTREL, DT_RELA)
|| !add_dynamic_entry (DT_JMPREL, 0))
return FALSE;
+
+ if (htab->tlsdesc_plt
+ && (!add_dynamic_entry (DT_TLSDESC_PLT, 0)
+ || !add_dynamic_entry (DT_TLSDESC_GOT, 0)))
+ return FALSE;
}
if (relocs)
@@ -1763,6 +1980,41 @@
return TRUE;
}
+static bfd_boolean
+elf64_x86_64_always_size_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ asection *tls_sec = elf_hash_table (info)->tls_sec;
+
+ if (tls_sec)
+ {
+ struct elf_link_hash_entry *tlsbase;
+
+ tlsbase = elf_link_hash_lookup (elf_hash_table (info),
+ "_TLS_MODULE_BASE_",
+ FALSE, FALSE, FALSE);
+
+ if (tlsbase && tlsbase->type == STT_TLS)
+ {
+ struct bfd_link_hash_entry *bh = NULL;
+ const struct elf_backend_data *bed
+ = get_elf_backend_data (output_bfd);
+
+ if (!(_bfd_generic_link_add_one_symbol
+ (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
+ tls_sec, 0, NULL, FALSE,
+ bed->collect, &bh)))
+ return FALSE;
+ tlsbase = (struct elf_link_hash_entry *)bh;
+ tlsbase->def_regular = 1;
+ tlsbase->other = STV_HIDDEN;
+ (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
+ }
+ }
+
+ return TRUE;
+}
+
/* Return the base VMA address which should be subtracted from real addresses
when resolving @dtpoff relocation.
This is PT_TLS segment p_vaddr. */
@@ -1821,6 +2073,7 @@
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
bfd_vma *local_got_offsets;
+ bfd_vma *local_tlsdesc_gotents;
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
@@ -1831,6 +2084,7 @@
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
local_got_offsets = elf_local_got_offsets (input_bfd);
+ local_tlsdesc_gotents = elf64_x86_64_local_tlsdesc_gotent (input_bfd);
rel = relocs;
relend = relocs + input_section->reloc_count;
@@ -1842,7 +2096,7 @@
struct elf_link_hash_entry *h;
Elf_Internal_Sym *sym;
asection *sec;
- bfd_vma off;
+ bfd_vma off, offplt;
bfd_vma relocation;
bfd_boolean unresolved_reloc;
bfd_reloc_status_type r;
@@ -1885,11 +2139,23 @@
copied into the output file to be resolved at run time. */
switch (r_type)
{
+ asection *base_got;
case R_X86_64_GOT32:
+ case R_X86_64_GOT64:
/* Relocation is to the entry for this symbol in the global
offset table. */
case R_X86_64_GOTPCREL:
- /* Use global offset table as symbol value. */
+ case R_X86_64_GOTPCREL64:
+ /* Use global offset table entry as symbol value. */
+ case R_X86_64_GOTPLT64:
+ /* This is the same as GOT64 for relocation purposes, but
+ indicates the existence of a PLT entry. The difficulty is,
+ that we must calculate the GOT slot offset from the PLT
+ offset, if this symbol got a PLT entry (it was global).
+ Additionally if it's computed from the PLT entry, then that
+ GOT offset is relative to .got.plt, not to .got. */
+ base_got = htab->sgot;
+
if (htab->sgot == NULL)
abort ();
@@ -1898,6 +2164,19 @@
bfd_boolean dyn;
off = h->got.offset;
+ if (h->needs_plt
+ && h->plt.offset != (bfd_vma)-1
+ && off == (bfd_vma)-1)
+ {
+ /* We can't use h->got.offset here to save
+ state, or even just remember the offset, as
+ finish_dynamic_symbol would use that as offset into
+ .got. */
+ bfd_vma plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
+ off = (plt_index + 3) * GOT_ENTRY_SIZE;
+ base_got = htab->sgotplt;
+ }
+
dyn = htab->elf.dynamic_sections_created;
if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
@@ -1922,7 +2201,9 @@
else
{
bfd_put_64 (output_bfd, relocation,
- htab->sgot->contents + off);
+ base_got->contents + off);
+ /* Note that this is harmless for the GOTPLT64 case,
+ as -1 | 1 still is -1. */
h->got.offset |= 1;
}
}
@@ -1944,7 +2225,7 @@
else
{
bfd_put_64 (output_bfd, relocation,
- htab->sgot->contents + off);
+ base_got->contents + off);
if (info->shared)
{
@@ -1958,8 +2239,8 @@
if (s == NULL)
abort ();
- outrel.r_offset = (htab->sgot->output_section->vma
- + htab->sgot->output_offset
+ outrel.r_offset = (base_got->output_section->vma
+ + base_got->output_offset
+ off);
outrel.r_info = ELF64_R_INFO (0, R_X86_64_RELATIVE);
outrel.r_addend = relocation;
@@ -1975,9 +2256,9 @@
if (off >= (bfd_vma) -2)
abort ();
- relocation = htab->sgot->output_section->vma
- + htab->sgot->output_offset + off;
- if (r_type != R_X86_64_GOTPCREL)
+ relocation = base_got->output_section->vma
+ + base_got->output_offset + off;
+ if (r_type != R_X86_64_GOTPCREL && r_type != R_X86_64_GOTPCREL64)
relocation -= htab->sgotplt->output_section->vma
- htab->sgotplt->output_offset;
@@ -2013,12 +2294,31 @@
break;
case R_X86_64_GOTPC32:
+ case R_X86_64_GOTPC64:
/* Use global offset table as symbol value. */
relocation = htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset;
unresolved_reloc = FALSE;
break;
+ case R_X86_64_PLTOFF64:
+ /* Relocation is PLT entry relative to GOT. For local
+ symbols it's the symbol itself relative to GOT. */
+ if (h != NULL
+ /* See PLT32 handling. */
+ && h->plt.offset != (bfd_vma) -1
+ && htab->splt != NULL)
+ {
+ relocation = (htab->splt->output_section->vma
+ + htab->splt->output_offset
+ + h->plt.offset);
+ unresolved_reloc = FALSE;
+ }
+
+ relocation -= htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset;
+ break;
+
case R_X86_64_PLT32:
/* Relocation is to the entry for this symbol in the
procedure linkage table. */
@@ -2201,6 +2501,8 @@
break;
case R_X86_64_TLSGD:
+ case R_X86_64_GOTPC32_TLSDESC:
+ case R_X86_64_TLSDESC_CALL:
case R_X86_64_GOTTPOFF:
r_type = elf64_x86_64_tls_transition (info, r_type, h == NULL);
tls_type = GOT_UNKNOWN;
@@ -2212,7 +2514,9 @@
if (!info->shared && h->dynindx == -1 && tls_type == GOT_TLS_IE)
r_type = R_X86_64_TPOFF32;
}
- if (r_type == R_X86_64_TLSGD)
+ if (r_type == R_X86_64_TLSGD
+ || r_type == R_X86_64_GOTPC32_TLSDESC
+ || r_type == R_X86_64_TLSDESC_CALL)
{
if (tls_type == GOT_TLS_IE)
r_type = R_X86_64_GOTTPOFF;
@@ -2254,6 +2558,67 @@
rel++;
continue;
}
+ else if (ELF64_R_TYPE (rel->r_info) == R_X86_64_GOTPC32_TLSDESC)
+ {
+ /* GDesc -> LE transition.
+ It's originally something like:
+ leaq x at tlsdesc(%rip), %rax
+
+ Change it to:
+ movl $x at tpoff, %rax
+
+ Registers other than %rax may be set up here. */
+
+ unsigned int val, type, type2;
+ bfd_vma roff;
+
+ /* First, make sure it's a leaq adding rip to a
+ 32-bit offset into any register, although it's
+ probably almost always going to be rax. */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff >= 3);
+ type = bfd_get_8 (input_bfd, contents + roff - 3);
+ BFD_ASSERT ((type & 0xfb) == 0x48);
+ type2 = bfd_get_8 (input_bfd, contents + roff - 2);
+ BFD_ASSERT (type2 == 0x8d);
+ val = bfd_get_8 (input_bfd, contents + roff - 1);
+ BFD_ASSERT ((val & 0xc7) == 0x05);
+ BFD_ASSERT (roff + 4 <= input_section->size);
+
+ /* Now modify the instruction as appropriate. */
+ bfd_put_8 (output_bfd, 0x48 | ((type >> 2) & 1),
+ contents + roff - 3);
+ bfd_put_8 (output_bfd, 0xc7, contents + roff - 2);
+ bfd_put_8 (output_bfd, 0xc0 | ((val >> 3) & 7),
+ contents + roff - 1);
+ bfd_put_32 (output_bfd, tpoff (info, relocation),
+ contents + roff);
+ continue;
+ }
+ else if (ELF64_R_TYPE (rel->r_info) == R_X86_64_TLSDESC_CALL)
+ {
+ /* GDesc -> LE transition.
+ It's originally:
+ call *(%rax)
+ Turn it into:
+ nop; nop. */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a call *(%rax). */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff + 2 <= input_section->size);
+ type = bfd_get_8 (input_bfd, contents + roff);
+ BFD_ASSERT (type == 0xff);
+ val = bfd_get_8 (input_bfd, contents + roff + 1);
+ BFD_ASSERT (val == 0x10);
+
+ /* Now modify the instruction as appropriate. */
+ bfd_put_8 (output_bfd, 0x90, contents + roff);
+ bfd_put_8 (output_bfd, 0x90, contents + roff + 1);
+ continue;
+ }
else
{
unsigned int val, type, reg;
@@ -2319,13 +2684,17 @@
abort ();
if (h != NULL)
- off = h->got.offset;
+ {
+ off = h->got.offset;
+ offplt = elf64_x86_64_hash_entry (h)->tlsdesc_got;
+ }
else
{
if (local_got_offsets == NULL)
abort ();
off = local_got_offsets[r_symndx];
+ offplt = local_tlsdesc_gotents[r_symndx];
}
if ((off & 1) != 0)
@@ -2335,30 +2704,61 @@
Elf_Internal_Rela outrel;
bfd_byte *loc;
int dr_type, indx;
+ asection *sreloc;
if (htab->srelgot == NULL)
abort ();
+ indx = h && h->dynindx != -1 ? h->dynindx : 0;
+
+ if (GOT_TLS_GDESC_P (tls_type))
+ {
+ outrel.r_info = ELF64_R_INFO (indx, R_X86_64_TLSDESC);
+ BFD_ASSERT (htab->sgotplt_jump_table_size + offplt
+ + 2 * GOT_ENTRY_SIZE <= htab->sgotplt->size);
+ outrel.r_offset = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + offplt
+ + htab->sgotplt_jump_table_size);
+ sreloc = htab->srelplt;
+ loc = sreloc->contents;
+ loc += sreloc->reloc_count++
+ * sizeof (Elf64_External_Rela);
+ BFD_ASSERT (loc + sizeof (Elf64_External_Rela)
+ <= sreloc->contents + sreloc->size);
+ if (indx == 0)
+ outrel.r_addend = relocation - dtpoff_base (info);
+ else
+ outrel.r_addend = 0;
+ bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc);
+ }
+
+ sreloc = htab->srelgot;
+
outrel.r_offset = (htab->sgot->output_section->vma
+ htab->sgot->output_offset + off);
- indx = h && h->dynindx != -1 ? h->dynindx : 0;
- if (r_type == R_X86_64_TLSGD)
+ if (GOT_TLS_GD_P (tls_type))
dr_type = R_X86_64_DTPMOD64;
+ else if (GOT_TLS_GDESC_P (tls_type))
+ goto dr_done;
else
dr_type = R_X86_64_TPOFF64;
bfd_put_64 (output_bfd, 0, htab->sgot->contents + off);
outrel.r_addend = 0;
- if (dr_type == R_X86_64_TPOFF64 && indx == 0)
+ if ((dr_type == R_X86_64_TPOFF64
+ || dr_type == R_X86_64_TLSDESC) && indx == 0)
outrel.r_addend = relocation - dtpoff_base (info);
outrel.r_info = ELF64_R_INFO (indx, dr_type);
- loc = htab->srelgot->contents;
- loc += htab->srelgot->reloc_count++ * sizeof (Elf64_External_Rela);
+ loc = sreloc->contents;
+ loc += sreloc->reloc_count++ * sizeof (Elf64_External_Rela);
+ BFD_ASSERT (loc + sizeof (Elf64_External_Rela)
+ <= sreloc->contents + sreloc->size);
bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc);
- if (r_type == R_X86_64_TLSGD)
+ if (GOT_TLS_GD_P (tls_type))
{
if (indx == 0)
{
@@ -2374,27 +2774,37 @@
outrel.r_info = ELF64_R_INFO (indx,
R_X86_64_DTPOFF64);
outrel.r_offset += GOT_ENTRY_SIZE;
- htab->srelgot->reloc_count++;
+ sreloc->reloc_count++;
loc += sizeof (Elf64_External_Rela);
+ BFD_ASSERT (loc + sizeof (Elf64_External_Rela)
+ <= sreloc->contents + sreloc->size);
bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc);
}
}
+ dr_done:
if (h != NULL)
h->got.offset |= 1;
else
local_got_offsets[r_symndx] |= 1;
}
- if (off >= (bfd_vma) -2)
+ if (off >= (bfd_vma) -2
+ && ! GOT_TLS_GDESC_P (tls_type))
abort ();
if (r_type == ELF64_R_TYPE (rel->r_info))
{
- relocation = htab->sgot->output_section->vma
- + htab->sgot->output_offset + off;
+ if (r_type == R_X86_64_GOTPC32_TLSDESC
+ || r_type == R_X86_64_TLSDESC_CALL)
+ relocation = htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + offplt + htab->sgotplt_jump_table_size;
+ else
+ relocation = htab->sgot->output_section->vma
+ + htab->sgot->output_offset + off;
unresolved_reloc = FALSE;
}
- else
+ else if (ELF64_R_TYPE (rel->r_info) == R_X86_64_TLSGD)
{
unsigned int i;
static unsigned char tlsgd[8]
@@ -2434,6 +2844,77 @@
rel++;
continue;
}
+ else if (ELF64_R_TYPE (rel->r_info) == R_X86_64_GOTPC32_TLSDESC)
+ {
+ /* GDesc -> IE transition.
+ It's originally something like:
+ leaq x at tlsdesc(%rip), %rax
+
+ Change it to:
+ movq x at gottpoff(%rip), %rax # before nop; nop
+
+ Registers other than %rax may be set up here. */
+
+ unsigned int val, type, type2;
+ bfd_vma roff;
+
+ /* First, make sure it's a leaq adding rip to a 32-bit
+ offset into any register, although it's probably
+ almost always going to be rax. */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff >= 3);
+ type = bfd_get_8 (input_bfd, contents + roff - 3);
+ BFD_ASSERT ((type & 0xfb) == 0x48);
+ type2 = bfd_get_8 (input_bfd, contents + roff - 2);
+ BFD_ASSERT (type2 == 0x8d);
+ val = bfd_get_8 (input_bfd, contents + roff - 1);
+ BFD_ASSERT ((val & 0xc7) == 0x05);
+ BFD_ASSERT (roff + 4 <= input_section->size);
+
+ /* Now modify the instruction as appropriate. */
+ /* To turn a leaq into a movq in the form we use it, it
+ suffices to change the second byte from 0x8d to
+ 0x8b. */
+ bfd_put_8 (output_bfd, 0x8b, contents + roff - 2);
+
+ bfd_put_32 (output_bfd,
+ htab->sgot->output_section->vma
+ + htab->sgot->output_offset + off
+ - rel->r_offset
+ - input_section->output_section->vma
+ - input_section->output_offset
+ - 4,
+ contents + roff);
+ continue;
+ }
+ else if (ELF64_R_TYPE (rel->r_info) == R_X86_64_TLSDESC_CALL)
+ {
+ /* GDesc -> IE transition.
+ It's originally:
+ call *(%rax)
+
+ Change it to:
+ nop; nop. */
+
+ unsigned int val, type;
+ bfd_vma roff;
+
+ /* First, make sure it's a call *(%eax). */
+ roff = rel->r_offset;
+ BFD_ASSERT (roff + 2 <= input_section->size);
+ type = bfd_get_8 (input_bfd, contents + roff);
+ BFD_ASSERT (type == 0xff);
+ val = bfd_get_8 (input_bfd, contents + roff + 1);
+ BFD_ASSERT (val == 0x10);
+
+ /* Now modify the instruction as appropriate. */
+ bfd_put_8 (output_bfd, 0x90, contents + roff);
+ bfd_put_8 (output_bfd, 0x90, contents + roff + 1);
+
+ continue;
+ }
+ else
+ BFD_ASSERT (FALSE);
break;
case R_X86_64_TLSLD:
@@ -2672,7 +3153,7 @@
}
if (h->got.offset != (bfd_vma) -1
- && elf64_x86_64_hash_entry (h)->tls_type != GOT_TLS_GD
+ && ! GOT_TLS_GD_ANY_P (elf64_x86_64_hash_entry (h)->tls_type)
&& elf64_x86_64_hash_entry (h)->tls_type != GOT_TLS_IE)
{
Elf_Internal_Rela rela;
@@ -2740,7 +3221,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == htab->elf.hgot)
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -2827,6 +3308,18 @@
dyn.d_un.d_val -= s->size;
}
break;
+
+ case DT_TLSDESC_PLT:
+ s = htab->splt;
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
+ + htab->tlsdesc_plt;
+ break;
+
+ case DT_TLSDESC_GOT:
+ s = htab->sgot;
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
+ + htab->tlsdesc_got;
+ break;
}
bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon);
@@ -2861,6 +3354,40 @@
elf_section_data (htab->splt->output_section)->this_hdr.sh_entsize =
PLT_ENTRY_SIZE;
+
+ if (htab->tlsdesc_plt)
+ {
+ bfd_put_64 (output_bfd, (bfd_vma) 0,
+ htab->sgot->contents + htab->tlsdesc_got);
+
+ memcpy (htab->splt->contents + htab->tlsdesc_plt,
+ elf64_x86_64_plt0_entry,
+ PLT_ENTRY_SIZE);
+
+ /* Add offset for pushq GOT+8(%rip), since the
+ instruction uses 6 bytes subtract this value. */
+ bfd_put_32 (output_bfd,
+ (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + 8
+ - htab->splt->output_section->vma
+ - htab->splt->output_offset
+ - htab->tlsdesc_plt
+ - 6),
+ htab->splt->contents + htab->tlsdesc_plt + 2);
+ /* Add offset for jmp *GOT+TDG(%rip), where TGD stands for
+ htab->tlsdesc_got. The 12 is the offset to the end of
+ the instruction. */
+ bfd_put_32 (output_bfd,
+ (htab->sgot->output_section->vma
+ + htab->sgot->output_offset
+ + htab->tlsdesc_got
+ - htab->splt->output_section->vma
+ - htab->splt->output_offset
+ - htab->tlsdesc_plt
+ - 12),
+ htab->splt->contents + htab->tlsdesc_plt + 8);
+ }
}
}
@@ -3132,6 +3659,7 @@
#define elf_backend_reloc_type_class elf64_x86_64_reloc_type_class
#define elf_backend_relocate_section elf64_x86_64_relocate_section
#define elf_backend_size_dynamic_sections elf64_x86_64_size_dynamic_sections
+#define elf_backend_always_size_sections elf64_x86_64_always_size_sections
#define elf_backend_plt_sym_val elf64_x86_64_plt_sym_val
#define elf_backend_object_p elf64_x86_64_elf_object_p
#define bfd_elf64_mkobject elf64_x86_64_mkobject
Modified: branches/binutils/package/bfd/elflink.c
===================================================================
--- branches/binutils/package/bfd/elflink.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elflink.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* ELF linking support for BFD.
- Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -26,6 +26,7 @@
#include "elf-bfd.h"
#include "safe-ctype.h"
#include "libiberty.h"
+#include "objalloc.h"
/* Define a symbol in a dynamic linkage section. */
@@ -263,6 +264,7 @@
_bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
{
flagword flags, pltflags;
+ struct elf_link_hash_entry *h;
asection *s;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
@@ -288,10 +290,14 @@
/* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
.plt section. */
- if (bed->want_plt_sym
- && !_bfd_elf_define_linkage_sym (abfd, info, s,
- "_PROCEDURE_LINKAGE_TABLE_"))
- return FALSE;
+ if (bed->want_plt_sym)
+ {
+ h = _bfd_elf_define_linkage_sym (abfd, info, s,
+ "_PROCEDURE_LINKAGE_TABLE_");
+ elf_hash_table (info)->hplt = h;
+ if (h == NULL)
+ return FALSE;
+ }
s = bfd_make_section_with_flags (abfd,
(bed->default_use_rela_p
@@ -883,6 +889,26 @@
&& h->root.type != bfd_link_hash_undefweak
&& h->root.type != bfd_link_hash_common);
+ /* When we try to create a default indirect symbol from the dynamic
+ definition with the default version, we skip it if its type and
+ the type of existing regular definition mismatch. We only do it
+ if the existing regular definition won't be dynamic. */
+ if (pold_alignment == NULL
+ && !info->shared
+ && !info->export_dynamic
+ && !h->ref_dynamic
+ && newdyn
+ && newdef
+ && !olddyn
+ && (olddef || h->root.type == bfd_link_hash_common)
+ && ELF_ST_TYPE (sym->st_info) != h->type
+ && ELF_ST_TYPE (sym->st_info) != STT_NOTYPE
+ && h->type != STT_NOTYPE)
+ {
+ *skip = TRUE;
+ return TRUE;
+ }
+
/* Check TLS symbol. We don't check undefined symbol introduced by
"ld -u". */
if ((ELF_ST_TYPE (sym->st_info) == STT_TLS || h->type == STT_TLS)
@@ -2187,6 +2213,20 @@
return TRUE;
}
+/* Make weak undefined symbols in PIE dynamic. */
+
+bfd_boolean
+_bfd_elf_link_hash_fixup_symbol (struct bfd_link_info *info,
+ struct elf_link_hash_entry *h)
+{
+ if (info->pie
+ && h->dynindx == -1
+ && h->root.type == bfd_link_hash_undefweak)
+ return bfd_elf_link_record_dynamic_symbol (info, h);
+
+ return TRUE;
+}
+
/* Fix up the flags for a symbol. This handles various cases which
can only be fixed after all the input files are seen. This is
currently called by both adjust_dynamic_symbol and
@@ -2197,6 +2237,8 @@
_bfd_elf_fix_symbol_flags (struct elf_link_hash_entry *h,
struct elf_info_failed *eif)
{
+ const struct elf_backend_data *bed = NULL;
+
/* If this symbol was mentioned in a non-ELF file, try to set
DEF_REGULAR and REF_REGULAR correctly. This is the only way to
permit a non-ELF file to correctly refer to a symbol defined in
@@ -2255,6 +2297,15 @@
h->def_regular = 1;
}
+ /* Backend specific symbol fixup. */
+ if (elf_hash_table (eif->info)->dynobj)
+ {
+ bed = get_elf_backend_data (elf_hash_table (eif->info)->dynobj);
+ if (bed->elf_backend_fixup_symbol
+ && !(*bed->elf_backend_fixup_symbol) (eif->info, h))
+ return FALSE;
+ }
+
/* If this is a final link, and the symbol was defined as a common
symbol in a regular object file, and there was no definition in
any dynamic object, then the linker will have allocated space for
@@ -2280,11 +2331,8 @@
|| ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
&& h->def_regular)
{
- const struct elf_backend_data *bed;
bfd_boolean force_local;
- bed = get_elf_backend_data (elf_hash_table (eif->info)->dynobj);
-
force_local = (ELF_ST_VISIBILITY (h->other) == STV_INTERNAL
|| ELF_ST_VISIBILITY (h->other) == STV_HIDDEN);
(*bed->elf_backend_hide_symbol) (eif->info, h, force_local);
@@ -2323,12 +2371,8 @@
if (weakdef->def_regular)
h->u.weakdef = NULL;
else
- {
- const struct elf_backend_data *bed;
-
- bed = get_elf_backend_data (elf_hash_table (eif->info)->dynobj);
- (*bed->elf_backend_copy_indirect_symbol) (eif->info, weakdef, h);
- }
+ (*bed->elf_backend_copy_indirect_symbol) (eif->info, weakdef,
+ h);
}
return TRUE;
@@ -2852,98 +2896,6 @@
return 0;
}
-/* Called via elf_link_hash_traverse, elf_smash_syms sets all symbols
- belonging to NOT_NEEDED to bfd_link_hash_new. We know there are no
- references from regular objects to these symbols.
-
- ??? Should we do something about references from other dynamic
- obects? If not, we potentially lose some warnings about undefined
- symbols. But how can we recover the initial undefined / undefweak
- state? */
-
-struct elf_smash_syms_data
-{
- bfd *not_needed;
- struct elf_link_hash_table *htab;
- bfd_boolean twiddled;
-};
-
-static bfd_boolean
-elf_smash_syms (struct elf_link_hash_entry *h, void *data)
-{
- struct elf_smash_syms_data *inf = (struct elf_smash_syms_data *) data;
- struct bfd_link_hash_entry *bh;
-
- switch (h->root.type)
- {
- default:
- case bfd_link_hash_new:
- return TRUE;
-
- case bfd_link_hash_undefined:
- if (h->root.u.undef.abfd != inf->not_needed)
- return TRUE;
- if (h->root.u.undef.weak != NULL
- && h->root.u.undef.weak != inf->not_needed)
- {
- /* Symbol was undefweak in u.undef.weak bfd, and has become
- undefined in as-needed lib. Restore weak. */
- h->root.type = bfd_link_hash_undefweak;
- h->root.u.undef.abfd = h->root.u.undef.weak;
- if (h->root.u.undef.next != NULL
- || inf->htab->root.undefs_tail == &h->root)
- inf->twiddled = TRUE;
- return TRUE;
- }
- break;
-
- case bfd_link_hash_undefweak:
- if (h->root.u.undef.abfd != inf->not_needed)
- return TRUE;
- break;
-
- case bfd_link_hash_defined:
- case bfd_link_hash_defweak:
- if (h->root.u.def.section->owner != inf->not_needed)
- return TRUE;
- break;
-
- case bfd_link_hash_common:
- if (h->root.u.c.p->section->owner != inf->not_needed)
- return TRUE;
- break;
-
- case bfd_link_hash_warning:
- case bfd_link_hash_indirect:
- elf_smash_syms ((struct elf_link_hash_entry *) h->root.u.i.link, data);
- if (h->root.u.i.link->type != bfd_link_hash_new)
- return TRUE;
- if (h->root.u.i.link->u.undef.abfd != inf->not_needed)
- return TRUE;
- break;
- }
-
- /* There is no way we can undo symbol table state from defined or
- defweak back to undefined. */
- if (h->ref_regular)
- abort ();
-
- /* Set sym back to newly created state, but keep undef.next if it is
- being used as a list pointer. */
- bh = h->root.u.undef.next;
- if (bh == &h->root)
- bh = NULL;
- if (bh != NULL || inf->htab->root.undefs_tail == &h->root)
- inf->twiddled = TRUE;
- (*inf->htab->root.table.newfunc) (&h->root.root,
- &inf->htab->root.table,
- h->root.root.string);
- h->root.u.undef.next = bh;
- h->root.u.undef.abfd = inf->not_needed;
- h->non_elf = 0;
- return TRUE;
-}
-
/* Sort symbol by value and section. */
static int
elf_sort_symbol (const void *arg1, const void *arg2)
@@ -3113,14 +3065,6 @@
static bfd_boolean
elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
{
- bfd_boolean (*add_symbol_hook)
- (bfd *, struct bfd_link_info *, Elf_Internal_Sym *,
- const char **, flagword *, asection **, bfd_vma *);
- bfd_boolean (*check_relocs)
- (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
- bfd_boolean (*check_directives)
- (bfd *, struct bfd_link_info *);
- bfd_boolean collect;
Elf_Internal_Shdr *hdr;
bfd_size_type symcount;
bfd_size_type extsymcount;
@@ -3137,14 +3081,20 @@
Elf_Internal_Sym *isymend;
const struct elf_backend_data *bed;
bfd_boolean add_needed;
- struct elf_link_hash_table * hash_table;
+ struct elf_link_hash_table *htab;
bfd_size_type amt;
+ void *alloc_mark = NULL;
+ void *old_tab = NULL;
+ void *old_hash;
+ void *old_ent;
+ struct bfd_link_hash_entry *old_undefs = NULL;
+ struct bfd_link_hash_entry *old_undefs_tail = NULL;
+ long old_dynsymcount = 0;
+ size_t tabsize = 0;
+ size_t hashsize = 0;
- hash_table = elf_hash_table (info);
-
+ htab = elf_hash_table (info);
bed = get_elf_backend_data (abfd);
- add_symbol_hook = bed->elf_add_symbol_hook;
- collect = bed->collect;
if ((abfd->flags & DYNAMIC) == 0)
dynamic = FALSE;
@@ -3156,8 +3106,8 @@
hope of using a dynamic object which does not exactly match
the format of the output file. */
if (info->relocatable
- || !is_elf_hash_table (hash_table)
- || hash_table->root.creator != abfd->xvec)
+ || !is_elf_hash_table (htab)
+ || htab->root.creator != abfd->xvec)
{
if (info->relocatable)
bfd_set_error (bfd_error_invalid_operation);
@@ -3200,8 +3150,7 @@
{
struct elf_link_hash_entry *h;
- h = elf_link_hash_lookup (hash_table, name,
- FALSE, FALSE, TRUE);
+ h = elf_link_hash_lookup (htab, name, FALSE, FALSE, TRUE);
/* FIXME: What about bfd_link_hash_common? */
if (h != NULL
@@ -3228,7 +3177,7 @@
if (! (_bfd_generic_link_add_one_symbol
(info, abfd, name, BSF_WARNING, s, 0, msg,
- FALSE, collect, NULL)))
+ FALSE, bed->collect, NULL)))
goto error_return;
if (! info->relocatable)
@@ -3254,15 +3203,15 @@
format. FIXME: If there are no input BFD's of the same
format as the output, we can't make a shared library. */
if (info->shared
- && is_elf_hash_table (hash_table)
- && hash_table->root.creator == abfd->xvec
- && ! hash_table->dynamic_sections_created)
+ && is_elf_hash_table (htab)
+ && htab->root.creator == abfd->xvec
+ && !htab->dynamic_sections_created)
{
if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
goto error_return;
}
}
- else if (!is_elf_hash_table (hash_table))
+ else if (!is_elf_hash_table (htab))
goto error_return;
else
{
@@ -3337,9 +3286,7 @@
n->name = anm;
n->by = abfd;
n->next = NULL;
- for (pn = & hash_table->needed;
- *pn != NULL;
- pn = &(*pn)->next)
+ for (pn = &htab->needed; *pn != NULL; pn = &(*pn)->next)
;
*pn = n;
}
@@ -3411,9 +3358,7 @@
if (rpath)
{
struct bfd_link_needed_list **pn;
- for (pn = & hash_table->runpath;
- *pn != NULL;
- pn = &(*pn)->next)
+ for (pn = &htab->runpath; *pn != NULL; pn = &(*pn)->next)
;
*pn = rpath;
}
@@ -3521,8 +3466,70 @@
}
}
+ /* If we are loading an as-needed shared lib, save the symbol table
+ state before we start adding symbols. If the lib turns out
+ to be unneeded, restore the state. */
+ if ((elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0)
+ {
+ unsigned int i;
+ size_t entsize;
+
+ for (entsize = 0, i = 0; i < htab->root.table.size; i++)
+ {
+ struct bfd_hash_entry *p;
+ struct elf_link_hash_entry *h;
+
+ for (p = htab->root.table.table[i]; p != NULL; p = p->next)
+ {
+ h = (struct elf_link_hash_entry *) p;
+ entsize += htab->root.table.entsize;
+ if (h->root.type == bfd_link_hash_warning)
+ entsize += htab->root.table.entsize;
+ }
+ }
+
+ tabsize = htab->root.table.size * sizeof (struct bfd_hash_entry *);
+ hashsize = extsymcount * sizeof (struct elf_link_hash_entry *);
+ old_tab = bfd_malloc (tabsize + entsize + hashsize);
+ if (old_tab == NULL)
+ goto error_free_vers;
+
+ /* Remember the current objalloc pointer, so that all mem for
+ symbols added can later be reclaimed. */
+ alloc_mark = bfd_hash_allocate (&htab->root.table, 1);
+ if (alloc_mark == NULL)
+ goto error_free_vers;
+
+ /* Clone the symbol table and sym hashes. Remember some
+ pointers into the symbol table, and dynamic symbol count. */
+ old_hash = (char *) old_tab + tabsize;
+ old_ent = (char *) old_hash + hashsize;
+ memcpy (old_tab, htab->root.table.table, tabsize);
+ memcpy (old_hash, sym_hash, hashsize);
+ old_undefs = htab->root.undefs;
+ old_undefs_tail = htab->root.undefs_tail;
+ old_dynsymcount = htab->dynsymcount;
+
+ for (i = 0; i < htab->root.table.size; i++)
+ {
+ struct bfd_hash_entry *p;
+ struct elf_link_hash_entry *h;
+
+ for (p = htab->root.table.table[i]; p != NULL; p = p->next)
+ {
+ memcpy (old_ent, p, htab->root.table.entsize);
+ old_ent = (char *) old_ent + htab->root.table.entsize;
+ h = (struct elf_link_hash_entry *) p;
+ if (h->root.type == bfd_link_hash_warning)
+ {
+ memcpy (old_ent, h->root.u.i.link, htab->root.table.entsize);
+ old_ent = (char *) old_ent + htab->root.table.entsize;
+ }
+ }
+ }
+ }
+
weaks = NULL;
-
ever = extversym != NULL ? extversym + extsymoff : NULL;
for (isym = isymbuf, isymend = isymbuf + extsymcount;
isym < isymend;
@@ -3574,7 +3581,8 @@
if (isym->st_shndx == SHN_UNDEF)
sec = bfd_und_section_ptr;
- else if (isym->st_shndx < SHN_LORESERVE || isym->st_shndx > SHN_HIRESERVE)
+ else if (isym->st_shndx < SHN_LORESERVE
+ || isym->st_shndx > SHN_HIRESERVE)
{
sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
if (sec == NULL)
@@ -3585,8 +3593,8 @@
default visibility. */
sec = bfd_und_section_ptr;
isym->st_shndx = SHN_UNDEF;
- isym->st_other = STV_DEFAULT
- | (isym->st_other & ~ ELF_ST_VISIBILITY(-1));
+ isym->st_other = (STV_DEFAULT
+ | (isym->st_other & ~ ELF_ST_VISIBILITY (-1)));
}
else if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
value -= sec->vma;
@@ -3627,10 +3635,10 @@
}
sec = tcomm;
}
- else if (add_symbol_hook)
+ else if (bed->elf_add_symbol_hook)
{
- if (! (*add_symbol_hook) (abfd, info, isym, &name, &flags, &sec,
- &value))
+ if (! (*bed->elf_add_symbol_hook) (abfd, info, isym, &name, &flags,
+ &sec, &value))
goto error_free_vers;
/* The hook function sets the name to NULL if this symbol
@@ -3653,12 +3661,12 @@
definition = TRUE;
size_change_ok = FALSE;
- type_change_ok = get_elf_backend_data (abfd)->type_change_ok;
+ type_change_ok = bed->type_change_ok;
old_alignment = 0;
old_bfd = NULL;
new_sec = sec;
- if (is_elf_hash_table (hash_table))
+ if (is_elf_hash_table (htab))
{
Elf_Internal_Versym iver;
unsigned int vernum = 0;
@@ -3753,7 +3761,7 @@
&& isym->st_shndx != SHN_UNDEF)
++newlen;
- newname = bfd_alloc (abfd, newlen);
+ newname = bfd_hash_allocate (&htab->root.table, newlen);
if (newname == NULL)
goto error_free_vers;
memcpy (newname, name, namelen);
@@ -3817,7 +3825,7 @@
}
if (! (_bfd_generic_link_add_one_symbol
- (info, abfd, name, flags, sec, value, NULL, FALSE, collect,
+ (info, abfd, name, flags, sec, value, NULL, FALSE, bed->collect,
(struct bfd_link_hash_entry **) sym_hash)))
goto error_free_vers;
@@ -3832,7 +3840,7 @@
&& definition
&& (flags & BSF_WEAK) != 0
&& ELF_ST_TYPE (isym->st_info) != STT_FUNC
- && is_elf_hash_table (hash_table)
+ && is_elf_hash_table (htab)
&& h->u.weakdef == NULL)
{
/* Keep a list of all weak defined non function symbols from
@@ -3875,7 +3883,7 @@
h->root.u.c.p->alignment_power = old_alignment;
}
- if (is_elf_hash_table (hash_table))
+ if (is_elf_hash_table (htab))
{
bfd_boolean dynsym;
@@ -3975,7 +3983,8 @@
&& (abfd->no_export
|| (abfd->my_archive && abfd->my_archive->no_export))
&& ELF_ST_VISIBILITY (isym->st_other) != STV_INTERNAL)
- isym->st_other = STV_HIDDEN | (isym->st_other & ~ ELF_ST_VISIBILITY (-1));
+ isym->st_other = (STV_HIDDEN
+ | (isym->st_other & ~ELF_ST_VISIBILITY (-1)));
if (isym->st_other != 0 && !dynamic)
{
@@ -4048,13 +4057,13 @@
{
/* Queue non-default versions so that .symver x, x at FOO
aliases can be checked. */
- if (! nondeflt_vers)
+ if (!nondeflt_vers)
{
- amt = (isymend - isym + 1)
- * sizeof (struct elf_link_hash_entry *);
+ amt = ((isymend - isym + 1)
+ * sizeof (struct elf_link_hash_entry *));
nondeflt_vers = bfd_malloc (amt);
}
- nondeflt_vers [nondeflt_vers_cnt++] = h;
+ nondeflt_vers[nondeflt_vers_cnt++] = h;
}
}
@@ -4066,7 +4075,7 @@
&& ! new_weakdef
&& h->u.weakdef->dynindx == -1)
{
- if (! bfd_elf_link_record_dynamic_symbol (info, h->u.weakdef))
+ if (!bfd_elf_link_record_dynamic_symbol (info, h->u.weakdef))
goto error_free_vers;
}
}
@@ -4116,6 +4125,68 @@
}
}
+ if (extversym != NULL)
+ {
+ free (extversym);
+ extversym = NULL;
+ }
+
+ if (isymbuf != NULL)
+ {
+ free (isymbuf);
+ isymbuf = NULL;
+ }
+
+ if ((elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0)
+ {
+ unsigned int i;
+
+ /* Restore the symbol table. */
+ old_hash = (char *) old_tab + tabsize;
+ old_ent = (char *) old_hash + hashsize;
+ sym_hash = elf_sym_hashes (abfd);
+ memcpy (htab->root.table.table, old_tab, tabsize);
+ memcpy (sym_hash, old_hash, hashsize);
+ htab->root.undefs = old_undefs;
+ htab->root.undefs_tail = old_undefs_tail;
+ for (i = 0; i < htab->root.table.size; i++)
+ {
+ struct bfd_hash_entry *p;
+ struct elf_link_hash_entry *h;
+
+ for (p = htab->root.table.table[i]; p != NULL; p = p->next)
+ {
+ h = (struct elf_link_hash_entry *) p;
+ if (h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ if (h->dynindx >= old_dynsymcount)
+ _bfd_elf_strtab_delref (htab->dynstr, h->dynstr_index);
+
+ memcpy (p, old_ent, htab->root.table.entsize);
+ old_ent = (char *) old_ent + htab->root.table.entsize;
+ h = (struct elf_link_hash_entry *) p;
+ if (h->root.type == bfd_link_hash_warning)
+ {
+ memcpy (h->root.u.i.link, old_ent, htab->root.table.entsize);
+ old_ent = (char *) old_ent + htab->root.table.entsize;
+ }
+ }
+ }
+
+ free (old_tab);
+ objalloc_free_block ((struct objalloc *) htab->root.table.memory,
+ alloc_mark);
+ if (nondeflt_vers != NULL)
+ free (nondeflt_vers);
+ return TRUE;
+ }
+
+ if (old_tab != NULL)
+ {
+ free (old_tab);
+ old_tab = NULL;
+ }
+
/* Now that all the symbols from this input file are created, handle
.symver foo, foo at BAR such that any relocs against foo become foo at BAR. */
if (nondeflt_vers != NULL)
@@ -4139,7 +4210,7 @@
shortname[amt] = '\0';
hi = (struct elf_link_hash_entry *)
- bfd_link_hash_lookup (&hash_table->root, shortname,
+ bfd_link_hash_lookup (&htab->root, shortname,
FALSE, FALSE, FALSE);
if (hi != NULL
&& hi->root.type == h->root.type
@@ -4165,31 +4236,6 @@
nondeflt_vers = NULL;
}
- if (extversym != NULL)
- {
- free (extversym);
- extversym = NULL;
- }
-
- if (isymbuf != NULL)
- free (isymbuf);
- isymbuf = NULL;
-
- if (!add_needed
- && (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0)
- {
- /* Remove symbols defined in an as-needed shared lib that wasn't
- needed. */
- struct elf_smash_syms_data inf;
- inf.not_needed = abfd;
- inf.htab = hash_table;
- inf.twiddled = FALSE;
- elf_link_hash_traverse (hash_table, elf_smash_syms, &inf);
- if (inf.twiddled)
- bfd_link_repair_undef_list (&hash_table->root);
- weaks = NULL;
- }
-
/* Now set the weakdefs field correctly for all the weak defined
symbols we found. The only way to do this is to search all the
symbols. Since we only need the information for non functions in
@@ -4329,9 +4375,8 @@
free (sorted_sym_hash);
}
- check_directives = get_elf_backend_data (abfd)->check_directives;
- if (check_directives)
- check_directives (abfd, info);
+ if (bed->check_directives)
+ (*bed->check_directives) (abfd, info);
/* If this object is the same format as the output object, and it is
not a shared library, then let the backend look through the
@@ -4350,11 +4395,10 @@
I have no idea how to handle linking PIC code into a file of a
different format. It probably can't be done. */
- check_relocs = get_elf_backend_data (abfd)->check_relocs;
if (! dynamic
- && is_elf_hash_table (hash_table)
- && hash_table->root.creator == abfd->xvec
- && check_relocs != NULL)
+ && is_elf_hash_table (htab)
+ && htab->root.creator == abfd->xvec
+ && bed->check_relocs != NULL)
{
asection *o;
@@ -4375,7 +4419,7 @@
if (internal_relocs == NULL)
goto error_return;
- ok = (*check_relocs) (abfd, info, o, internal_relocs);
+ ok = (*bed->check_relocs) (abfd, info, o, internal_relocs);
if (elf_section_data (o)->relocs != internal_relocs)
free (internal_relocs);
@@ -4389,7 +4433,7 @@
of the .stab/.stabstr sections. */
if (! dynamic
&& ! info->traditional_format
- && is_elf_hash_table (hash_table)
+ && is_elf_hash_table (htab)
&& (info->strip != strip_all && info->strip != strip_debugger))
{
asection *stabstr;
@@ -4410,10 +4454,8 @@
struct bfd_elf_section_data *secdata;
secdata = elf_section_data (stab);
- if (! _bfd_link_section_stabs (abfd,
- &hash_table->stab_info,
- stab, stabstr,
- &secdata->sec_info,
+ if (! _bfd_link_section_stabs (abfd, &htab->stab_info, stab,
+ stabstr, &secdata->sec_info,
&string_offset))
goto error_return;
if (secdata->sec_info)
@@ -4422,7 +4464,7 @@
}
}
- if (is_elf_hash_table (hash_table) && add_needed)
+ if (is_elf_hash_table (htab) && add_needed)
{
/* Add this bfd to the loaded list. */
struct elf_link_loaded_list *n;
@@ -4431,13 +4473,15 @@
if (n == NULL)
goto error_return;
n->abfd = abfd;
- n->next = hash_table->loaded;
- hash_table->loaded = n;
+ n->next = htab->loaded;
+ htab->loaded = n;
}
return TRUE;
error_free_vers:
+ if (old_tab != NULL)
+ free (old_tab);
if (nondeflt_vers != NULL)
free (nondeflt_vers);
if (extversym != NULL)
@@ -6160,6 +6204,24 @@
return TRUE;
}
+/* Return TRUE if the dynamic symbol SYM in ABFD is supported. */
+
+static bfd_boolean
+check_dynsym (bfd *abfd, Elf_Internal_Sym *sym)
+{
+ if (sym->st_shndx > SHN_HIRESERVE)
+ {
+ /* The gABI doesn't support dynamic symbols in output sections
+ beyond 64k. */
+ (*_bfd_error_handler)
+ (_("%B: Too many sections: %d (>= %d)"),
+ abfd, bfd_count_sections (abfd), SHN_LORESERVE);
+ bfd_set_error (bfd_error_nonrepresentable_section);
+ return FALSE;
+ }
+ return TRUE;
+}
+
/* For DSOs loaded in via a DT_NEEDED entry, emulate ld.so in
allowing an unsatisfied unversioned symbol in the DSO to match a
versioned symbol that would normally require an explicit version.
@@ -6346,22 +6408,32 @@
bed = get_elf_backend_data (finfo->output_bfd);
- /* If we have an undefined symbol reference here then it must have
- come from a shared library that is being linked in. (Undefined
- references in regular files have already been handled). If we
- are reporting errors for this situation then do so now. */
- if (h->root.type == bfd_link_hash_undefined
- && h->ref_dynamic
- && !h->ref_regular
- && ! elf_link_check_versioned_symbol (finfo->info, bed, h)
- && finfo->info->unresolved_syms_in_shared_libs != RM_IGNORE)
+ if (h->root.type == bfd_link_hash_undefined)
{
- if (! ((*finfo->info->callbacks->undefined_symbol)
- (finfo->info, h->root.root.string, h->root.u.undef.abfd,
- NULL, 0, finfo->info->unresolved_syms_in_shared_libs == RM_GENERATE_ERROR)))
+ /* If we have an undefined symbol reference here then it must have
+ come from a shared library that is being linked in. (Undefined
+ references in regular files have already been handled). */
+ bfd_boolean ignore_undef = FALSE;
+
+ /* Some symbols may be special in that the fact that they're
+ undefined can be safely ignored - let backend determine that. */
+ if (bed->elf_backend_ignore_undef_symbol)
+ ignore_undef = bed->elf_backend_ignore_undef_symbol (h);
+
+ /* If we are reporting errors for this situation then do so now. */
+ if (ignore_undef == FALSE
+ && h->ref_dynamic
+ && ! h->ref_regular
+ && ! elf_link_check_versioned_symbol (finfo->info, bed, h)
+ && finfo->info->unresolved_syms_in_shared_libs != RM_IGNORE)
{
- eoinfo->failed = TRUE;
- return FALSE;
+ if (! (finfo->info->callbacks->undefined_symbol
+ (finfo->info, h->root.root.string, h->root.u.undef.abfd,
+ NULL, 0, finfo->info->unresolved_syms_in_shared_libs == RM_GENERATE_ERROR)))
+ {
+ eoinfo->failed = TRUE;
+ return FALSE;
+ }
}
}
@@ -6582,6 +6654,11 @@
sym.st_name = h->dynstr_index;
esym = finfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
+ if (! check_dynsym (finfo->output_bfd, &sym))
+ {
+ eoinfo->failed = TRUE;
+ return FALSE;
+ }
bed->s->swap_symbol_out (finfo->output_bfd, &sym, esym, 0);
bucketcount = elf_hash_table (finfo->info)->bucketcount;
@@ -6681,7 +6758,7 @@
_bfd_elf_default_action_discarded (asection *sec)
{
if (sec->flags & SEC_DEBUGGING)
- return PRETEND;
+ return 0;
if (strcmp (".eh_frame", sec->name) == 0)
return 0;
@@ -6997,8 +7074,7 @@
from discarded sections and section symbols from
removed link-once sections. Complain about relocs
against discarded sections. Zero relocs against removed
- link-once sections. Preserve debug information as much
- as we can. */
+ link-once sections. */
if (!elf_section_ignore_discarded_relocs (o))
{
Elf_Internal_Rela *rel, *relend;
@@ -7070,16 +7146,11 @@
sym_name, o, input_bfd, sec, sec->owner);
/* Try to do the best we can to support buggy old
- versions of gcc. If we've warned, or this is
- debugging info, pretend that the symbol is
+ versions of gcc. Pretend that the symbol is
really defined in the kept linkonce section.
FIXME: This is quite broken. Modifying the
symbol here means we will be changing all later
- uses of the symbol, not just in this section.
- The only thing that makes this half reasonable
- is that we warn in non-debug sections, and
- debug sections tend to come after other
- sections. */
+ uses of the symbol, not just in this section. */
if (action & PRETEND)
{
asection *kept;
@@ -7637,7 +7708,7 @@
struct bfd_link_order *p;
bfd *sub;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
- int elfsec;
+ unsigned elfsec;
struct bfd_link_order **sections;
asection *s, *other_sec, *linkorder_sec;
bfd_vma offset;
@@ -7654,7 +7725,8 @@
sub = s->owner;
if (bfd_get_flavour (sub) == bfd_target_elf_flavour
&& elf_elfheader (sub)->e_ident[EI_CLASS] == bed->s->elfclass
- && (elfsec = _bfd_elf_section_from_bfd_section (sub, s)) != -1
+ && (elfsec = _bfd_elf_section_from_bfd_section (sub, s))
+ && elfsec < elf_numsections (sub)
&& elf_elfsections (sub)[elfsec]->sh_flags & SHF_LINK_ORDER)
{
seen_linkorder++;
@@ -7754,8 +7826,7 @@
dynobj = elf_hash_table (info)->dynobj;
emit_relocs = (info->relocatable
- || info->emitrelocations
- || bed->elf_backend_emit_relocs);
+ || info->emitrelocations);
finfo.info = info;
finfo.output_bfd = abfd;
@@ -8265,6 +8336,8 @@
indx = elf_section_data (s)->this_idx;
BFD_ASSERT (indx > 0);
sym.st_shndx = indx;
+ if (! check_dynsym (abfd, &sym))
+ return FALSE;
sym.st_value = s->vma;
dest = dynsym + dynindx * bed->s->sizeof_sym;
if (last_local < dynindx)
@@ -8299,6 +8372,8 @@
sym.st_shndx =
elf_section_data (s->output_section)->this_idx;
+ if (! check_dynsym (abfd, &sym))
+ return FALSE;
sym.st_value = (s->output_section->vma
+ s->output_offset
+ e->isym.st_value);
@@ -9057,8 +9132,8 @@
building shared libraries, we must assume that any visible symbol is
referenced. */
-static bfd_boolean
-elf_gc_mark_dynamic_ref_symbol (struct elf_link_hash_entry *h, void *inf)
+bfd_boolean
+bfd_elf_gc_mark_dynamic_ref_symbol (struct elf_link_hash_entry *h, void *inf)
{
struct bfd_link_info *info = (struct bfd_link_info *) inf;
@@ -9087,8 +9162,9 @@
asection * (*gc_mark_hook)
(asection *, struct bfd_link_info *, Elf_Internal_Rela *,
struct elf_link_hash_entry *h, Elf_Internal_Sym *);
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
- if (!get_elf_backend_data (abfd)->can_gc_sections
+ if (!bed->can_gc_sections
|| info->relocatable
|| info->emitrelocations
|| !is_elf_hash_table (info->hash))
@@ -9114,11 +9190,11 @@
/* Mark dynamically referenced symbols. */
if (elf_hash_table (info)->dynamic_sections_created)
elf_link_hash_traverse (elf_hash_table (info),
- elf_gc_mark_dynamic_ref_symbol,
+ bed->gc_mark_dynamic_ref,
info);
/* Grovel through relocs to find out who stays ... */
- gc_mark_hook = get_elf_backend_data (abfd)->gc_mark_hook;
+ gc_mark_hook = bed->gc_mark_hook;
for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
{
asection *o;
@@ -9142,7 +9218,7 @@
/* Keep .gcc_except_table.* if the associated .text.* is
marked. This isn't very nice, but the proper solution,
- splitting .eh_frame up and using comdat doesn't pan out
+ splitting .eh_frame up and using comdat doesn't pan out
easily due to needing special relocs to handle the
difference of two symbols in separate sections.
Don't keep code sections referenced by .eh_frame. */
Modified: branches/binutils/package/bfd/elfxx-ia64.c
===================================================================
--- branches/binutils/package/bfd/elfxx-ia64.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-ia64.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* IA-64 support for 64-bit ELF
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
@@ -80,9 +80,6 @@
/* The addend for which this entry is relevant. */
bfd_vma addend;
- /* Next addend in the list. */
- struct elfNN_ia64_dyn_sym_info *next;
-
bfd_vma got_offset;
bfd_vma fptr_offset;
bfd_vma pltoff_offset;
@@ -133,6 +130,13 @@
{
int id;
unsigned int r_sym;
+ /* The number of elements in elfNN_ia64_dyn_sym_info array. */
+ unsigned int count;
+ /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */
+ unsigned int sorted_count;
+ /* The size of elfNN_ia64_dyn_sym_info array. */
+ unsigned int size;
+ /* The array of elfNN_ia64_dyn_sym_info. */
struct elfNN_ia64_dyn_sym_info *info;
/* TRUE if this hash entry's addends was translated for
@@ -143,6 +147,13 @@
struct elfNN_ia64_link_hash_entry
{
struct elf_link_hash_entry root;
+ /* The number of elements in elfNN_ia64_dyn_sym_info array. */
+ unsigned int count;
+ /* The number of sorted elements in elfNN_ia64_dyn_sym_info array. */
+ unsigned int sorted_count;
+ /* The size of elfNN_ia64_dyn_sym_info array. */
+ unsigned int size;
+ /* The array of elfNN_ia64_dyn_sym_info. */
struct elfNN_ia64_dyn_sym_info *info;
};
@@ -852,6 +863,12 @@
bfd_putl64 (t0, hit_addr);
bfd_putl64 (t1, hit_addr + 8);
}
+
+/* Rename some of the generic section flags to better document how they
+ are used here. */
+#define skip_relax_pass_0 need_finalize_relax
+#define skip_relax_pass_1 has_gp_reloc
+
/* These functions do relaxation for IA-64 ELF. */
@@ -880,6 +897,8 @@
bfd_boolean changed_contents = FALSE;
bfd_boolean changed_relocs = FALSE;
bfd_boolean changed_got = FALSE;
+ bfd_boolean skip_relax_pass_0 = TRUE;
+ bfd_boolean skip_relax_pass_1 = TRUE;
bfd_vma gp = 0;
/* Assume we're not going to change any sizes, and we'll only need
@@ -891,11 +910,11 @@
return FALSE;
/* Nothing to do if there are no relocations or there is no need for
- the relax finalize pass. */
+ the current pass. */
if ((sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
- || (!link_info->need_relax_finalize
- && sec->need_finalize_relax == 0))
+ || (link_info->relax_pass == 0 && sec->skip_relax_pass_0)
+ || (link_info->relax_pass == 1 && sec->skip_relax_pass_1))
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
@@ -936,20 +955,19 @@
case R_IA64_PCREL21BI:
case R_IA64_PCREL21M:
case R_IA64_PCREL21F:
- /* In the finalize pass, all br relaxations are done. We can
- skip it. */
- if (!link_info->need_relax_finalize)
+ /* In pass 1, all br relaxations are done. We can skip it. */
+ if (link_info->relax_pass == 1)
continue;
+ skip_relax_pass_0 = FALSE;
is_branch = TRUE;
break;
case R_IA64_PCREL60B:
- /* We can't optimize brl to br before the finalize pass since
- br relaxations will increase the code size. Defer it to
- the finalize pass. */
- if (link_info->need_relax_finalize)
+ /* We can't optimize brl to br in pass 0 since br relaxations
+ will increase the code size. Defer it to pass 1. */
+ if (link_info->relax_pass == 0)
{
- sec->need_finalize_relax = 1;
+ skip_relax_pass_1 = FALSE;
continue;
}
is_branch = TRUE;
@@ -957,12 +975,11 @@
case R_IA64_LTOFF22X:
case R_IA64_LDXMOV:
- /* We can't relax ldx/mov before the finalize pass since
- br relaxations will increase the code size. Defer it to
- the finalize pass. */
- if (link_info->need_relax_finalize)
+ /* We can't relax ldx/mov in pass 0 since br relaxations will
+ increase the code size. Defer it to pass 1. */
+ if (link_info->relax_pass == 0)
{
- sec->need_finalize_relax = 1;
+ skip_relax_pass_1 = FALSE;
continue;
}
is_branch = FALSE;
@@ -1352,8 +1369,12 @@
}
}
- if (!link_info->need_relax_finalize)
- sec->need_finalize_relax = 0;
+ if (link_info->relax_pass == 0)
+ {
+ /* Pass 0 is only needed to relax br. */
+ sec->skip_relax_pass_0 = skip_relax_pass_0;
+ sec->skip_relax_pass_1 = skip_relax_pass_1;
+ }
*again = changed_contents || changed_relocs;
return TRUE;
@@ -1369,6 +1390,8 @@
free (internal_relocs);
return FALSE;
}
+#undef skip_relax_pass_0
+#undef skip_relax_pass_1
static void
elfNN_ia64_relax_ldxmov (contents, off)
@@ -1524,6 +1547,11 @@
if (sec->flags & SEC_SMALL_DATA)
hdr->sh_flags |= SHF_IA_64_SHORT;
+ /* Some HP linkers look for the SHF_IA_64_HP_TLS flag instead of SHF_TLS. */
+
+ if (elfNN_ia64_hpux_vec (abfd->xvec) && (sec->flags & SHF_TLS))
+ hdr->sh_flags |= SHF_IA_64_HP_TLS;
+
return TRUE;
}
@@ -1794,6 +1822,9 @@
table, string));
ret->info = NULL;
+ ret->count = 0;
+ ret->sorted_count = 0;
+ ret->size = 0;
return (struct bfd_hash_entry *) ret;
}
@@ -1824,16 +1855,25 @@
if (ind->info != NULL)
{
struct elfNN_ia64_dyn_sym_info *dyn_i;
- struct elfNN_ia64_dyn_sym_info **pdyn;
+ unsigned int count;
- pdyn = &dir->info;
- while ((dyn_i = *pdyn) != NULL)
- pdyn = &dyn_i->next;
- *pdyn = dyn_i = ind->info;
+ if (dir->info)
+ free (dir->info);
+
+ dir->info = ind->info;
+ dir->count = ind->count;
+ dir->sorted_count = ind->sorted_count;
+ dir->size = ind->size;
+
ind->info = NULL;
+ ind->count = 0;
+ ind->sorted_count = 0;
+ ind->size = 0;
/* Fix up the dyn_sym_info pointers to the global symbol. */
- for (; dyn_i; dyn_i = dyn_i->next)
+ for (count = dir->count, dyn_i = dir->info;
+ count != 0;
+ count--, dyn_i++)
dyn_i->h = &dir->root;
}
@@ -1859,12 +1899,15 @@
{
struct elfNN_ia64_link_hash_entry *h;
struct elfNN_ia64_dyn_sym_info *dyn_i;
+ unsigned int count;
h = (struct elfNN_ia64_link_hash_entry *)xh;
_bfd_elf_link_hash_hide_symbol (info, &h->root, force_local);
- for (dyn_i = h->info; dyn_i; dyn_i = dyn_i->next)
+ for (count = h->count, dyn_i = h->info;
+ count != 0;
+ count--, dyn_i++)
{
dyn_i->want_plt2 = 0;
dyn_i->want_plt = 0;
@@ -1913,7 +1956,8 @@
return 0;
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
- elfNN_ia64_new_elf_hash_entry))
+ elfNN_ia64_new_elf_hash_entry,
+ sizeof (struct elfNN_ia64_link_hash_entry)))
{
free (ret);
return 0;
@@ -1931,6 +1975,51 @@
return &ret->root.root;
}
+/* Free the global elfNN_ia64_dyn_sym_info array. */
+
+static bfd_boolean
+elfNN_ia64_global_dyn_info_free (void **xentry,
+ PTR unused ATTRIBUTE_UNUSED)
+{
+ struct elfNN_ia64_link_hash_entry *entry
+ = (struct elfNN_ia64_link_hash_entry *) xentry;
+
+ if (entry->root.root.type == bfd_link_hash_warning)
+ entry = (struct elfNN_ia64_link_hash_entry *) entry->root.root.u.i.link;
+
+ if (entry->info)
+ {
+ free (entry->info);
+ entry->info = NULL;
+ entry->count = 0;
+ entry->sorted_count = 0;
+ entry->size = 0;
+ }
+
+ return TRUE;
+}
+
+/* Free the local elfNN_ia64_dyn_sym_info array. */
+
+static bfd_boolean
+elfNN_ia64_local_dyn_info_free (void **slot,
+ PTR unused ATTRIBUTE_UNUSED)
+{
+ struct elfNN_ia64_local_hash_entry *entry
+ = (struct elfNN_ia64_local_hash_entry *) *slot;
+
+ if (entry->info)
+ {
+ free (entry->info);
+ entry->info = NULL;
+ entry->count = 0;
+ entry->sorted_count = 0;
+ entry->size = 0;
+ }
+
+ return TRUE;
+}
+
/* Destroy IA-64 linker hash table. */
static void
@@ -1940,9 +2029,15 @@
struct elfNN_ia64_link_hash_table *ia64_info
= (struct elfNN_ia64_link_hash_table *) hash;
if (ia64_info->loc_hash_table)
- htab_delete (ia64_info->loc_hash_table);
+ {
+ htab_traverse (ia64_info->loc_hash_table,
+ elfNN_ia64_local_dyn_info_free, NULL);
+ htab_delete (ia64_info->loc_hash_table);
+ }
if (ia64_info->loc_hash_memory)
objalloc_free ((struct objalloc *) ia64_info->loc_hash_memory);
+ elf_link_hash_traverse (&ia64_info->root,
+ elfNN_ia64_global_dyn_info_free, NULL);
_bfd_generic_link_hash_table_free (hash);
}
@@ -1964,11 +2059,14 @@
struct elfNN_ia64_dyn_sym_traverse_data *data
= (struct elfNN_ia64_dyn_sym_traverse_data *) xdata;
struct elfNN_ia64_dyn_sym_info *dyn_i;
+ unsigned int count;
if (entry->root.root.type == bfd_link_hash_warning)
entry = (struct elfNN_ia64_link_hash_entry *) entry->root.root.u.i.link;
- for (dyn_i = entry->info; dyn_i; dyn_i = dyn_i->next)
+ for (count = entry->count, dyn_i = entry->info;
+ count != 0;
+ count--, dyn_i++)
if (! (*data->func) (dyn_i, data->data))
return FALSE;
return TRUE;
@@ -1984,11 +2082,14 @@
struct elfNN_ia64_dyn_sym_traverse_data *data
= (struct elfNN_ia64_dyn_sym_traverse_data *) xdata;
struct elfNN_ia64_dyn_sym_info *dyn_i;
+ unsigned int count;
- for (dyn_i = entry->info; dyn_i; dyn_i = dyn_i->next)
+ for (count = entry->count, dyn_i = entry->info;
+ count != 0;
+ count--, dyn_i++)
if (! (*data->func) (dyn_i, data->data))
- return 0;
- return 1;
+ return FALSE;
+ return TRUE;
}
static void
@@ -2097,9 +2198,130 @@
return ret;
}
+/* Used to sort elfNN_ia64_dyn_sym_info array. */
+
+static int
+addend_compare (const void *xp, const void *yp)
+{
+ const struct elfNN_ia64_dyn_sym_info *x
+ = (const struct elfNN_ia64_dyn_sym_info *) xp;
+ const struct elfNN_ia64_dyn_sym_info *y
+ = (const struct elfNN_ia64_dyn_sym_info *) yp;
+
+ return x->addend - y->addend;
+}
+
+/* Sort elfNN_ia64_dyn_sym_info array and remove duplicates. */
+
+static unsigned int
+sort_dyn_sym_info (struct elfNN_ia64_dyn_sym_info *info,
+ unsigned int count)
+{
+ bfd_vma curr, prev;
+ unsigned int i, dup, diff, dest, src, len;
+
+ qsort (info, count, sizeof (*info), addend_compare);
+
+ /* Find the first duplicate. */
+ prev = info [0].addend;
+ for (i = 1; i < count; i++)
+ {
+ curr = info [i].addend;
+ if (curr == prev)
+ break;
+ prev = curr;
+ }
+
+ /* Remove duplicates. */
+ if (i < count)
+ {
+ /* We need to move a block of elements to here. */
+ dest = i++;
+ while (i < count)
+ {
+ curr = info [i].addend;
+
+ /* Move a block of elements whose first one is different from
+ the previous. */
+ if (curr == prev)
+ {
+ for (src = i + 1; src < count; src++)
+ if (info [src].addend != curr)
+ break;
+ }
+ else
+ src = i;
+
+ if (src >= count)
+ break;
+
+ /* Find the next duplicate. */
+ prev = info [src].addend;
+ for (dup = src + 1; dup < count; dup++)
+ {
+ curr = info [dup].addend;
+ if (curr == prev)
+ break;
+ prev = curr;
+ }
+
+ /* How much to move. */
+ len = dup - src;
+ i = dup + 1;
+
+ if (len == 1 && dup < count)
+ {
+ /* If we only move 1 element, we combine it with the next
+ one. Find the next different one. */
+ for (diff = dup + 1, src++; diff < count; diff++, src++)
+ if (info [diff].addend != curr)
+ break;
+
+ if (diff < count)
+ {
+ /* Find the next duplicate. */
+ prev = info [diff].addend;
+ for (dup = diff + 1; dup < count; dup++)
+ {
+ curr = info [dup].addend;
+ if (curr == prev)
+ break;
+ prev = curr;
+ diff++;
+ }
+
+ len = diff - src + 1;
+ i = diff + 1;
+ }
+ }
+
+ memmove (&info [dest], &info [src], len * sizeof (*info));
+
+ dest += len;
+ }
+
+ count = dest;
+ }
+
+ return count;
+}
+
/* Find and/or create a descriptor for dynamic symbol info. This will
- vary based on global or local symbol, and the addend to the reloc. */
+ vary based on global or local symbol, and the addend to the reloc.
+ We don't sort when inserting. Also, we sort and eliminate
+ duplicates if there is an unsorted section. Typically, this will
+ only happen once, because we do all insertions before lookups. We
+ then use bsearch to do a lookup. This also allows lookups to be
+ fast. So we have fast insertion (O(log N) due to duplicate check),
+ fast lookup (O(log N)) and one sort (O(N log N) expected time).
+ Previously, all lookups were O(N) because of the use of the linked
+ list and also all insertions were O(N) because of the check for
+ duplicates. There are some complications here because the array
+ size grows occasionally, which may add an O(N) factor, but this
+ should be rare. Also, we free the excess array allocation, which
+ requires a copy which is O(N), but this only happens once. */
+
static struct elfNN_ia64_dyn_sym_info *
get_dyn_sym_info (ia64_info, h, abfd, rel, create)
struct elfNN_ia64_link_hash_table *ia64_info;
@@ -2108,12 +2330,22 @@
const Elf_Internal_Rela *rel;
bfd_boolean create;
{
- struct elfNN_ia64_dyn_sym_info **pp;
- struct elfNN_ia64_dyn_sym_info *dyn_i;
+ struct elfNN_ia64_dyn_sym_info **info_p, *info, *dyn_i, key;
+ unsigned int *count_p, *sorted_count_p, *size_p;
+ unsigned int count, sorted_count, size;
bfd_vma addend = rel ? rel->r_addend : 0;
+ bfd_size_type amt;
if (h)
- pp = &((struct elfNN_ia64_link_hash_entry *)h)->info;
+ {
+ struct elfNN_ia64_link_hash_entry *global_h;
+
+ global_h = (struct elfNN_ia64_link_hash_entry *) h;
+ info_p = &global_h->info;
+ count_p = &global_h->count;
+ sorted_count_p = &global_h->sorted_count;
+ size_p = &global_h->size;
+ }
else
{
struct elfNN_ia64_local_hash_entry *loc_h;
@@ -2125,20 +2357,109 @@
return NULL;
}
- pp = &loc_h->info;
+ info_p = &loc_h->info;
+ count_p = &loc_h->count;
+ sorted_count_p = &loc_h->sorted_count;
+ size_p = &loc_h->size;
}
- for (dyn_i = *pp; dyn_i && dyn_i->addend != addend; dyn_i = *pp)
- pp = &dyn_i->next;
+ count = *count_p;
+ sorted_count = *sorted_count_p;
+ size = *size_p;
+ info = *info_p;
+ if (create)
+ {
+ /* When we create the array, we don't check for duplicates,
+ except in the previously sorted section if one exists, and
+ against the last inserted entry. This allows insertions to
+ be fast. */
+ if (info)
+ {
+ if (sorted_count)
+ {
+ /* Try bsearch first on the sorted section. */
+ key.addend = addend;
+ dyn_i = bsearch (&key, info, sorted_count,
+ sizeof (*info), addend_compare);
- if (dyn_i == NULL && create)
- {
- dyn_i = ((struct elfNN_ia64_dyn_sym_info *)
- bfd_zalloc (abfd, (bfd_size_type) sizeof *dyn_i));
- *pp = dyn_i;
+ if (dyn_i)
+ {
+ return dyn_i;
+ }
+ }
+
+ /* Do a quick check for the last inserted entry. */
+ dyn_i = info + count - 1;
+ if (dyn_i->addend == addend)
+ {
+ return dyn_i;
+ }
+ }
+
+ if (size == 0)
+ {
+ /* It is the very first element. We create the array of size
+ 1. */
+ size = 1;
+ amt = size * sizeof (*info);
+ info = bfd_malloc (amt);
+ }
+ else if (size <= count)
+ {
+ /* We double the array size every time when we reach the
+ size limit. */
+ size += size;
+ amt = size * sizeof (*info);
+ info = bfd_realloc (info, amt);
+ }
+ else
+ goto has_space;
+
+ if (info == NULL)
+ return NULL;
+ *size_p = size;
+ *info_p = info;
+
+has_space:
+ /* Append the new one to the array. */
+ dyn_i = info + count;
+ memset (dyn_i, 0, sizeof (*dyn_i));
dyn_i->addend = addend;
+
+ /* We increment count only since the new ones are unsorted and
+ may have duplicate. */
+ (*count_p)++;
}
+ else
+ {
+ /* It is a lookup without insertion. Sort array if part of the
+ array isn't sorted. */
+ if (count != sorted_count)
+ {
+ count = sort_dyn_sym_info (info, count);
+ *count_p = count;
+ *sorted_count_p = count;
+ }
+ /* Free unused memory. */
+ if (size != count)
+ {
+ amt = count * sizeof (*info);
+ info = bfd_malloc (amt);
+ if (info != NULL)
+ {
+ memcpy (info, *info_p, amt);
+ free (*info_p);
+ *size_p = count;
+ *info_p = info;
+ }
+ }
+
+ key.addend = addend;
+ dyn_i = bsearch (&key, info, count,
+ sizeof (*info), addend_compare);
+ }
+
return dyn_i;
}
@@ -2362,6 +2683,23 @@
Elf_Internal_Shdr *symtab_hdr;
const Elf_Internal_Rela *rel;
asection *got, *fptr, *srel, *pltoff;
+ enum {
+ NEED_GOT = 1,
+ NEED_GOTX = 2,
+ NEED_FPTR = 4,
+ NEED_PLTOFF = 8,
+ NEED_MIN_PLT = 16,
+ NEED_FULL_PLT = 32,
+ NEED_DYNREL = 64,
+ NEED_LTOFF_FPTR = 128,
+ NEED_TPREL = 256,
+ NEED_DTPMOD = 512,
+ NEED_DTPREL = 1024
+ };
+ int need_entry;
+ struct elf_link_hash_entry *h;
+ unsigned long r_symndx;
+ bfd_boolean maybe_dynamic;
if (info->relocatable)
return TRUE;
@@ -2372,29 +2710,181 @@
got = fptr = srel = pltoff = NULL;
relend = relocs + sec->reloc_count;
+
+ /* We scan relocations first to create dynamic relocation arrays. We
+ modified get_dyn_sym_info to allow fast insertion and support fast
+ lookup in the next loop. */
for (rel = relocs; rel < relend; ++rel)
{
- enum {
- NEED_GOT = 1,
- NEED_GOTX = 2,
- NEED_FPTR = 4,
- NEED_PLTOFF = 8,
- NEED_MIN_PLT = 16,
- NEED_FULL_PLT = 32,
- NEED_DYNREL = 64,
- NEED_LTOFF_FPTR = 128,
- NEED_TPREL = 256,
- NEED_DTPMOD = 512,
- NEED_DTPREL = 1024
- };
+ r_symndx = ELFNN_R_SYM (rel->r_info);
+ if (r_symndx >= symtab_hdr->sh_info)
+ {
+ long indx = r_symndx - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ }
+ else
+ h = NULL;
- struct elf_link_hash_entry *h = NULL;
- unsigned long r_symndx = ELFNN_R_SYM (rel->r_info);
+ /* We can only get preliminary data on whether a symbol is
+ locally or externally defined, as not all of the input files
+ have yet been processed. Do something with what we know, as
+ this may help reduce memory usage and processing time later. */
+ maybe_dynamic = (h && ((!info->executable
+ && (!info->symbolic
+ || info->unresolved_syms_in_shared_libs == RM_IGNORE))
+ || !h->def_regular
+ || h->root.type == bfd_link_hash_defweak));
+
+ need_entry = 0;
+ switch (ELFNN_R_TYPE (rel->r_info))
+ {
+ case R_IA64_TPREL64MSB:
+ case R_IA64_TPREL64LSB:
+ if (info->shared || maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+
+ case R_IA64_LTOFF_TPREL22:
+ need_entry = NEED_TPREL;
+ if (info->shared)
+ info->flags |= DF_STATIC_TLS;
+ break;
+
+ case R_IA64_DTPREL32MSB:
+ case R_IA64_DTPREL32LSB:
+ case R_IA64_DTPREL64MSB:
+ case R_IA64_DTPREL64LSB:
+ if (info->shared || maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+
+ case R_IA64_LTOFF_DTPREL22:
+ need_entry = NEED_DTPREL;
+ break;
+
+ case R_IA64_DTPMOD64MSB:
+ case R_IA64_DTPMOD64LSB:
+ if (info->shared || maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+
+ case R_IA64_LTOFF_DTPMOD22:
+ need_entry = NEED_DTPMOD;
+ break;
+
+ case R_IA64_LTOFF_FPTR22:
+ case R_IA64_LTOFF_FPTR64I:
+ case R_IA64_LTOFF_FPTR32MSB:
+ case R_IA64_LTOFF_FPTR32LSB:
+ case R_IA64_LTOFF_FPTR64MSB:
+ case R_IA64_LTOFF_FPTR64LSB:
+ need_entry = NEED_FPTR | NEED_GOT | NEED_LTOFF_FPTR;
+ break;
+
+ case R_IA64_FPTR64I:
+ case R_IA64_FPTR32MSB:
+ case R_IA64_FPTR32LSB:
+ case R_IA64_FPTR64MSB:
+ case R_IA64_FPTR64LSB:
+ if (info->shared || h)
+ need_entry = NEED_FPTR | NEED_DYNREL;
+ else
+ need_entry = NEED_FPTR;
+ break;
+
+ case R_IA64_LTOFF22:
+ case R_IA64_LTOFF64I:
+ need_entry = NEED_GOT;
+ break;
+
+ case R_IA64_LTOFF22X:
+ need_entry = NEED_GOTX;
+ break;
+
+ case R_IA64_PLTOFF22:
+ case R_IA64_PLTOFF64I:
+ case R_IA64_PLTOFF64MSB:
+ case R_IA64_PLTOFF64LSB:
+ need_entry = NEED_PLTOFF;
+ if (h)
+ {
+ if (maybe_dynamic)
+ need_entry |= NEED_MIN_PLT;
+ }
+ else
+ {
+ (*info->callbacks->warning)
+ (info, _("@pltoff reloc against local symbol"), 0,
+ abfd, 0, (bfd_vma) 0);
+ }
+ break;
+
+ case R_IA64_PCREL21B:
+ case R_IA64_PCREL60B:
+ /* Depending on where this symbol is defined, we may or may not
+ need a full plt entry. Only skip if we know we'll not need
+ the entry -- static or symbolic, and the symbol definition
+ has already been seen. */
+ if (maybe_dynamic && rel->r_addend == 0)
+ need_entry = NEED_FULL_PLT;
+ break;
+
+ case R_IA64_IMM14:
+ case R_IA64_IMM22:
+ case R_IA64_IMM64:
+ case R_IA64_DIR32MSB:
+ case R_IA64_DIR32LSB:
+ case R_IA64_DIR64MSB:
+ case R_IA64_DIR64LSB:
+ /* Shared objects will always need at least a REL relocation. */
+ if (info->shared || maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+
+ case R_IA64_IPLTMSB:
+ case R_IA64_IPLTLSB:
+ /* Shared objects will always need at least a REL relocation. */
+ if (info->shared || maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+
+ case R_IA64_PCREL22:
+ case R_IA64_PCREL64I:
+ case R_IA64_PCREL32MSB:
+ case R_IA64_PCREL32LSB:
+ case R_IA64_PCREL64MSB:
+ case R_IA64_PCREL64LSB:
+ if (maybe_dynamic)
+ need_entry = NEED_DYNREL;
+ break;
+ }
+
+ if (!need_entry)
+ continue;
+
+ if ((need_entry & NEED_FPTR) != 0
+ && rel->r_addend)
+ {
+ (*info->callbacks->warning)
+ (info, _("non-zero addend in @fptr reloc"), 0,
+ abfd, 0, (bfd_vma) 0);
+ }
+
+ if (get_dyn_sym_info (ia64_info, h, abfd, rel, TRUE) == NULL)
+ return FALSE;
+ }
+
+ /* Now, we only do lookup without insertion, which is very fast
+ with the modified get_dyn_sym_info. */
+ for (rel = relocs; rel < relend; ++rel)
+ {
struct elfNN_ia64_dyn_sym_info *dyn_i;
- int need_entry;
- bfd_boolean maybe_dynamic;
int dynrel_type = R_IA64_NONE;
+ r_symndx = ELFNN_R_SYM (rel->r_info);
if (r_symndx >= symtab_hdr->sh_info)
{
/* We're dealing with a global symbol -- find its hash entry
@@ -2407,18 +2897,18 @@
h->ref_regular = 1;
}
+ else
+ h = NULL;
/* We can only get preliminary data on whether a symbol is
locally or externally defined, as not all of the input files
have yet been processed. Do something with what we know, as
this may help reduce memory usage and processing time later. */
- maybe_dynamic = FALSE;
- if (h && ((!info->executable
- && (!info->symbolic
- || info->unresolved_syms_in_shared_libs == RM_IGNORE))
- || !h->def_regular
- || h->root.type == bfd_link_hash_defweak))
- maybe_dynamic = TRUE;
+ maybe_dynamic = (h && ((!info->executable
+ && (!info->symbolic
+ || info->unresolved_syms_in_shared_libs == RM_IGNORE))
+ || !h->def_regular
+ || h->root.type == bfd_link_hash_defweak));
need_entry = 0;
switch (ELFNN_R_TYPE (rel->r_info))
@@ -2502,12 +2992,6 @@
if (maybe_dynamic)
need_entry |= NEED_MIN_PLT;
}
- else
- {
- (*info->callbacks->warning)
- (info, _("@pltoff reloc against local symbol"), 0,
- abfd, 0, (bfd_vma) 0);
- }
break;
case R_IA64_PCREL21B:
@@ -2556,16 +3040,8 @@
if (!need_entry)
continue;
- if ((need_entry & NEED_FPTR) != 0
- && rel->r_addend)
- {
- (*info->callbacks->warning)
- (info, _("non-zero addend in @fptr reloc"), 0,
- abfd, 0, (bfd_vma) 0);
- }
+ dyn_i = get_dyn_sym_info (ia64_info, h, abfd, rel, FALSE);
- dyn_i = get_dyn_sym_info (ia64_info, h, abfd, rel, TRUE);
-
/* Record whether or not this is a local symbol. */
dyn_i->h = h;
@@ -3923,14 +4399,16 @@
gp_val = got_sec->output_section->vma;
else if (max_short_vma != 0)
gp_val = min_short_vma;
+ else if (max_vma - min_vma < 0x200000)
+ gp_val = min_vma;
else
- gp_val = min_vma;
+ gp_val = max_vma - 0x200000 + 8;
/* If it is possible to address the entire image, but we
don't with the choice above, adjust. */
if (max_vma - min_vma < 0x400000
- && max_vma - gp_val <= 0x200000
- && gp_val - min_vma > 0x200000)
+ && (max_vma - gp_val >= 0x200000
+ || gp_val - min_vma > 0x200000))
gp_val = min_vma + 0x200000;
else if (max_short_vma != 0)
{
@@ -4137,8 +4615,11 @@
if (loc_h && ! loc_h->sec_merge_done)
{
struct elfNN_ia64_dyn_sym_info *dynent;
+ unsigned int count;
- for (dynent = loc_h->info; dynent; dynent = dynent->next)
+ for (count = loc_h->count, dynent = loc_h->info;
+ count != 0;
+ count--, dynent++)
{
msec = sym_sec;
dynent->addend =
@@ -4153,6 +4634,10 @@
- sym_sec->output_section->vma
- sym_sec->output_offset;
}
+
+ qsort (loc_h->info, loc_h->count,
+ sizeof (*loc_h->info), addend_compare);
+
loc_h->sec_merge_done = 1;
}
}
@@ -4830,8 +5315,8 @@
/* Mark some specially defined symbols as absolute. */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ || h == ia64_info->root.hgot
+ || h == ia64_info->root.hplt)
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -5300,6 +5785,7 @@
#define elf_backend_want_dynbss 0
#define elf_backend_copy_indirect_symbol elfNN_ia64_hash_copy_indirect
#define elf_backend_hide_symbol elfNN_ia64_hash_hide_symbol
+#define elf_backend_fixup_symbol _bfd_elf_link_hash_fixup_symbol
#define elf_backend_reloc_type_class elfNN_ia64_reloc_type_class
#define elf_backend_rela_normal 1
#define elf_backend_special_sections elfNN_ia64_special_sections
Modified: branches/binutils/package/bfd/elfxx-mips.c
===================================================================
--- branches/binutils/package/bfd/elfxx-mips.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-mips.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* MIPS-specific support for ELF
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Most of the information added by Ian Lance Taylor, Cygnus Support,
<ian at cygnus.com>.
@@ -34,6 +34,7 @@
#include "elf-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"
+#include "elf-vxworks.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
@@ -43,8 +44,39 @@
#include "hashtab.h"
-/* This structure is used to hold .got entries while estimating got
- sizes. */
+/* This structure is used to hold information about one GOT entry.
+ There are three types of entry:
+
+ (1) absolute addresses
+ (abfd == NULL)
+ (2) SYMBOL + OFFSET addresses, where SYMBOL is local to an input bfd
+ (abfd != NULL, symndx >= 0)
+ (3) global and forced-local symbols
+ (abfd != NULL, symndx == -1)
+
+ Type (3) entries are treated differently for different types of GOT.
+ In the "master" GOT -- i.e. the one that describes every GOT
+ reference needed in the link -- the mips_got_entry is keyed on both
+ the symbol and the input bfd that references it. If it turns out
+ that we need multiple GOTs, we can then use this information to
+ create separate GOTs for each input bfd.
+
+ However, we want each of these separate GOTs to have at most one
+ entry for a given symbol, so their type (3) entries are keyed only
+ on the symbol. The input bfd given by the "abfd" field is somewhat
+ arbitrary in this case.
+
+ This means that when there are multiple GOTs, each GOT has a unique
+ mips_got_entry for every symbol within it. We can therefore use the
+ mips_got_entry fields (tls_type and gotidx) to track the symbol's
+ GOT index.
+
+ However, if it turns out that we need only a single GOT, we continue
+ to use the master GOT to describe it. There may therefore be several
+ mips_got_entries for the same symbol, each with a different input bfd.
+ We want to make sure that each symbol gets a unique GOT entry, so when
+ there's a single GOT, we use the symbol's hash entry, not the
+ mips_got_entry fields, to track a symbol's GOT index. */
struct mips_got_entry
{
/* The input bfd in which the symbol is defined. */
@@ -246,6 +278,12 @@
the initial global GOT entry to a local GOT entry. */
bfd_boolean forced_local;
+ /* Are we referenced by some kind of relocation? */
+ bfd_boolean is_relocation_target;
+
+ /* Are we referenced by branch relocations? */
+ bfd_boolean is_branch_target;
+
#define GOT_NORMAL 0
#define GOT_TLS_GD 1
#define GOT_TLS_LDM 2
@@ -283,6 +321,20 @@
bfd_vma rld_value;
/* This is set if we see any mips16 stub sections. */
bfd_boolean mips16_stubs_seen;
+ /* True if we're generating code for VxWorks. */
+ bfd_boolean is_vxworks;
+ /* Shortcuts to some dynamic sections, or NULL if they are not
+ being used. */
+ asection *srelbss;
+ asection *sdynbss;
+ asection *srelplt;
+ asection *srelplt2;
+ asection *sgotplt;
+ asection *splt;
+ /* The size of the PLT header in bytes (VxWorks only). */
+ bfd_vma plt_header_size;
+ /* The size of a PLT entry in bytes (VxWorks only). */
+ bfd_vma plt_entry_size;
};
#define TLS_RELOC_P(r_type) \
@@ -433,8 +485,8 @@
#define rpdNil ((pRPDR) 0)
static struct mips_got_entry *mips_elf_create_local_got_entry
- (bfd *, bfd *, struct mips_got_info *, asection *, bfd_vma, unsigned long,
- struct mips_elf_link_hash_entry *, int);
+ (bfd *, struct bfd_link_info *, bfd *, struct mips_got_info *, asection *,
+ asection *, bfd_vma, unsigned long, struct mips_elf_link_hash_entry *, int);
static bfd_boolean mips_elf_sort_hash_table_f
(struct mips_elf_link_hash_entry *, void *);
static bfd_vma mips_elf_high
@@ -490,6 +542,10 @@
#define MIPS_ELF_REL_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_rel)
+/* The size of an external RELA relocation. */
+#define MIPS_ELF_RELA_SIZE(abfd) \
+ (get_elf_backend_data (abfd)->s->sizeof_rela)
+
/* The size of an external dynamic table entry. */
#define MIPS_ELF_DYN_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_dyn)
@@ -540,20 +596,26 @@
== (ABI_64_P (abfd) ? sizeof (Elf64_External_Rela) \
: sizeof (Elf32_External_Rela))))
+/* The name of the dynamic relocation section. */
+#define MIPS_ELF_REL_DYN_NAME(INFO) \
+ (mips_elf_hash_table (INFO)->is_vxworks ? ".rela.dyn" : ".rel.dyn")
+
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value
from smaller values. Start with zero, widen, *then* decrement. */
#define MINUS_ONE (((bfd_vma)0) - 1)
#define MINUS_TWO (((bfd_vma)0) - 2)
/* The number of local .got entries we reserve. */
-#define MIPS_RESERVED_GOTNO (2)
+#define MIPS_RESERVED_GOTNO(INFO) \
+ (mips_elf_hash_table (INFO)->is_vxworks ? 3 : 2)
/* The offset of $gp from the beginning of the .got section. */
-#define ELF_MIPS_GP_OFFSET(abfd) (0x7ff0)
+#define ELF_MIPS_GP_OFFSET(INFO) \
+ (mips_elf_hash_table (INFO)->is_vxworks ? 0x0 : 0x7ff0)
/* The maximum size of the GOT for it to be addressable using 16-bit
offsets from $gp. */
-#define MIPS_ELF_GOT_MAX_SIZE(abfd) (ELF_MIPS_GP_OFFSET(abfd) + 0x7fff)
+#define MIPS_ELF_GOT_MAX_SIZE(INFO) (ELF_MIPS_GP_OFFSET (INFO) + 0x7fff)
/* Instructions which appear in a stub. */
#define STUB_LW(abfd) \
@@ -636,6 +698,44 @@
#define CALL_STUB ".mips16.call."
#define CALL_FP_STUB ".mips16.call.fp."
+/* The format of the first PLT entry in a VxWorks executable. */
+static const bfd_vma mips_vxworks_exec_plt0_entry[] = {
+ 0x3c190000, /* lui t9, %hi(_GLOBAL_OFFSET_TABLE_) */
+ 0x27390000, /* addiu t9, t9, %lo(_GLOBAL_OFFSET_TABLE_) */
+ 0x8f390008, /* lw t9, 8(t9) */
+ 0x00000000, /* nop */
+ 0x03200008, /* jr t9 */
+ 0x00000000 /* nop */
+};
+
+/* The format of subsequent PLT entries. */
+static const bfd_vma mips_vxworks_exec_plt_entry[] = {
+ 0x10000000, /* b .PLT_resolver */
+ 0x24180000, /* li t8, <pltindex> */
+ 0x3c190000, /* lui t9, %hi(<.got.plt slot>) */
+ 0x27390000, /* addiu t9, t9, %lo(<.got.plt slot>) */
+ 0x8f390000, /* lw t9, 0(t9) */
+ 0x00000000, /* nop */
+ 0x03200008, /* jr t9 */
+ 0x00000000 /* nop */
+};
+
+/* The format of the first PLT entry in a VxWorks shared object. */
+static const bfd_vma mips_vxworks_shared_plt0_entry[] = {
+ 0x8f990008, /* lw t9, 8(gp) */
+ 0x00000000, /* nop */
+ 0x03200008, /* jr t9 */
+ 0x00000000, /* nop */
+ 0x00000000, /* nop */
+ 0x00000000 /* nop */
+};
+
+/* The format of subsequent PLT entries. */
+static const bfd_vma mips_vxworks_shared_plt_entry[] = {
+ 0x10000000, /* b .PLT_resolver */
+ 0x24180000 /* li t8, <pltindex> */
+};
+
/* Look up an entry in a MIPS ELF linker hash table. */
#define mips_elf_link_hash_lookup(table, string, create, copy, follow) \
@@ -715,6 +815,8 @@
ret->call_stub = NULL;
ret->call_fp_stub = NULL;
ret->forced_local = FALSE;
+ ret->is_branch_target = FALSE;
+ ret->is_relocation_target = FALSE;
ret->tls_type = GOT_NORMAL;
}
@@ -1896,14 +1998,19 @@
: e1->d.h == e2->d.h);
}
-/* Returns the dynamic relocation section for DYNOBJ. */
+/* Return the dynamic relocation section. If it doesn't exist, try to
+ create a new it if CREATE_P, otherwise return NULL. Also return NULL
+ if creation fails. */
static asection *
-mips_elf_rel_dyn_section (bfd *dynobj, bfd_boolean create_p)
+mips_elf_rel_dyn_section (struct bfd_link_info *info, bfd_boolean create_p)
{
- static const char dname[] = ".rel.dyn";
+ const char *dname;
asection *sreloc;
+ bfd *dynobj;
+ dname = MIPS_ELF_REL_DYN_NAME (info);
+ dynobj = elf_hash_table (info)->dynobj;
sreloc = bfd_get_section_by_name (dynobj, dname);
if (sreloc == NULL && create_p)
{
@@ -2121,7 +2228,7 @@
|| h->root.root.type == bfd_link_hash_undefweak);
/* Emit necessary relocations. */
- sreloc = mips_elf_rel_dyn_section (dynobj, FALSE);
+ sreloc = mips_elf_rel_dyn_section (info, FALSE);
/* General Dynamic. */
if (*tls_type_p & GOT_TLS_GD)
@@ -2240,14 +2347,46 @@
return got_index;
}
-/* Returns the GOT offset at which the indicated address can be found.
- If there is not yet a GOT entry for this value, create one. If
- R_SYMNDX refers to a TLS symbol, create a TLS GOT entry instead.
- Returns -1 if no satisfactory GOT offset can be found. */
+/* Return the offset from _GLOBAL_OFFSET_TABLE_ of the .got.plt entry
+ for global symbol H. .got.plt comes before the GOT, so the offset
+ will be negative. */
static bfd_vma
+mips_elf_gotplt_index (struct bfd_link_info *info,
+ struct elf_link_hash_entry *h)
+{
+ bfd_vma plt_index, got_address, got_value;
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ BFD_ASSERT (h->plt.offset != (bfd_vma) -1);
+
+ /* Calculate the index of the symbol's PLT entry. */
+ plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
+
+ /* Calculate the address of the associated .got.plt entry. */
+ got_address = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + plt_index * 4);
+
+ /* Calculate the value of _GLOBAL_OFFSET_TABLE_. */
+ got_value = (htab->root.hgot->root.u.def.section->output_section->vma
+ + htab->root.hgot->root.u.def.section->output_offset
+ + htab->root.hgot->root.u.def.value);
+
+ return got_address - got_value;
+}
+
+/* Return the GOT offset for address VALUE, which was derived from
+ a symbol belonging to INPUT_SECTION. If there is not yet a GOT
+ entry for this value, create one. If R_SYMNDX refers to a TLS symbol,
+ create a TLS GOT entry instead. Return -1 if no satisfactory GOT
+ offset can be found. */
+
+static bfd_vma
mips_elf_local_got_index (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
- bfd_vma value, unsigned long r_symndx,
+ asection *input_section, bfd_vma value,
+ unsigned long r_symndx,
struct mips_elf_link_hash_entry *h, int r_type)
{
asection *sgot;
@@ -2256,14 +2395,23 @@
g = mips_elf_got_info (elf_hash_table (info)->dynobj, &sgot);
- entry = mips_elf_create_local_got_entry (abfd, ibfd, g, sgot, value,
+ entry = mips_elf_create_local_got_entry (abfd, info, ibfd, g, sgot,
+ input_section, value,
r_symndx, h, r_type);
if (!entry)
return MINUS_ONE;
if (TLS_RELOC_P (r_type))
- return mips_tls_got_index (abfd, entry->gotidx, &entry->tls_type, r_type,
- info, h, value);
+ {
+ if (entry->symndx == -1 && g->next == NULL)
+ /* A type (3) entry in the single-GOT case. We use the symbol's
+ hash table entry to track the index. */
+ return mips_tls_got_index (abfd, h->tls_got_offset, &h->tls_type,
+ r_type, info, h, value);
+ else
+ return mips_tls_got_index (abfd, entry->gotidx, &entry->tls_type,
+ r_type, info, h, value);
+ }
else
return entry->gotidx;
}
@@ -2350,26 +2498,27 @@
return index;
}
-/* Find a GOT entry that is within 32KB of the VALUE. These entries
- are supposed to be placed at small offsets in the GOT, i.e.,
- within 32KB of GP. Return the index into the GOT for this page,
- and store the offset from this entry to the desired address in
- OFFSETP, if it is non-NULL. */
+/* Find a GOT page entry that points to within 32KB of VALUE, which was
+ calculated from a symbol belonging to INPUT_SECTION. These entries
+ are supposed to be placed at small offsets in the GOT, i.e., within
+ 32KB of GP. Return the index of the GOT entry, or -1 if no entry
+ could be created. If OFFSETP is nonnull, use it to return the
+ offset of the GOT entry from VALUE. */
static bfd_vma
mips_elf_got_page (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
- bfd_vma value, bfd_vma *offsetp)
+ asection *input_section, bfd_vma value, bfd_vma *offsetp)
{
asection *sgot;
struct mips_got_info *g;
- bfd_vma index;
+ bfd_vma page, index;
struct mips_got_entry *entry;
g = mips_elf_got_info (elf_hash_table (info)->dynobj, &sgot);
- entry = mips_elf_create_local_got_entry (abfd, ibfd, g, sgot,
- (value + 0x8000)
- & (~(bfd_vma)0xffff), 0,
+ page = (value + 0x8000) & ~(bfd_vma) 0xffff;
+ entry = mips_elf_create_local_got_entry (abfd, info, ibfd, g, sgot,
+ input_section, page, 0,
NULL, R_MIPS_GOT_PAGE);
if (!entry)
@@ -2383,30 +2532,32 @@
return index;
}
-/* Find a GOT entry whose higher-order 16 bits are the same as those
- for value. Return the index into the GOT for this entry. */
+/* Find a local GOT entry for an R_MIPS_GOT16 relocation against VALUE,
+ which was calculated from a symbol belonging to INPUT_SECTION.
+ EXTERNAL is true if the relocation was against a global symbol
+ that has been forced local. */
static bfd_vma
mips_elf_got16_entry (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
- bfd_vma value, bfd_boolean external)
+ asection *input_section, bfd_vma value,
+ bfd_boolean external)
{
asection *sgot;
struct mips_got_info *g;
struct mips_got_entry *entry;
+ /* GOT16 relocations against local symbols are followed by a LO16
+ relocation; those against global symbols are not. Thus if the
+ symbol was originally local, the GOT16 relocation should load the
+ equivalent of %hi(VALUE), otherwise it should load VALUE itself. */
if (! external)
- {
- /* Although the ABI says that it is "the high-order 16 bits" that we
- want, it is really the %high value. The complete value is
- calculated with a `addiu' of a LO16 relocation, just as with a
- HI16/LO16 pair. */
- value = mips_elf_high (value) << 16;
- }
+ value = mips_elf_high (value) << 16;
g = mips_elf_got_info (elf_hash_table (info)->dynobj, &sgot);
- entry = mips_elf_create_local_got_entry (abfd, ibfd, g, sgot, value, 0, NULL,
- R_MIPS_GOT16);
+ entry = mips_elf_create_local_got_entry (abfd, info, ibfd, g, sgot,
+ input_section, value, 0,
+ NULL, R_MIPS_GOT16);
if (entry)
return entry->gotidx;
else
@@ -2431,21 +2582,25 @@
return sgot->output_section->vma + sgot->output_offset + index - gp;
}
-/* Create a local GOT entry for VALUE. Return the index of the entry,
- or -1 if it could not be created. If R_SYMNDX refers to a TLS symbol,
- create a TLS entry instead. */
+/* Create and return a local GOT entry for VALUE, which was calculated
+ from a symbol belonging to INPUT_SECTON. Return NULL if it could not
+ be created. If R_SYMNDX refers to a TLS symbol, create a TLS entry
+ instead. */
static struct mips_got_entry *
-mips_elf_create_local_got_entry (bfd *abfd, bfd *ibfd,
- struct mips_got_info *gg,
- asection *sgot, bfd_vma value,
- unsigned long r_symndx,
+mips_elf_create_local_got_entry (bfd *abfd, struct bfd_link_info *info,
+ bfd *ibfd, struct mips_got_info *gg,
+ asection *sgot, asection *input_section,
+ bfd_vma value, unsigned long r_symndx,
struct mips_elf_link_hash_entry *h,
int r_type)
{
struct mips_got_entry entry, **loc;
struct mips_got_info *g;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
+
entry.abfd = NULL;
entry.symndx = -1;
entry.d.address = value;
@@ -2517,6 +2672,33 @@
MIPS_ELF_PUT_WORD (abfd, value,
(sgot->contents + entry.gotidx));
+ /* These GOT entries need a dynamic relocation on VxWorks. Because
+ the offset between segments is not fixed, the relocation must be
+ against a symbol in the same segment as the original symbol.
+ The easiest way to do this is to take INPUT_SECTION's output
+ section and emit a relocation against its section symbol. */
+ if (htab->is_vxworks)
+ {
+ Elf_Internal_Rela outrel;
+ asection *s, *output_section;
+ bfd_byte *loc;
+ bfd_vma got_address;
+ int dynindx;
+
+ s = mips_elf_rel_dyn_section (info, FALSE);
+ output_section = input_section->output_section;
+ dynindx = elf_section_data (output_section)->dynindx;
+ got_address = (sgot->output_section->vma
+ + sgot->output_offset
+ + entry.gotidx);
+
+ loc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
+ outrel.r_offset = got_address;
+ outrel.r_info = ELF32_R_INFO (dynindx, R_MIPS_32);
+ outrel.r_addend = value - output_section->vma;
+ bfd_elf32_swap_reloca_out (abfd, &outrel, loc);
+ }
+
return *loc;
}
@@ -2637,6 +2819,9 @@
return FALSE;
}
+ /* Make sure we have a GOT to put this entry into. */
+ BFD_ASSERT (g != NULL);
+
entry.abfd = abfd;
entry.symndx = -1;
entry.d.h = (struct mips_elf_link_hash_entry *) h;
@@ -2889,7 +3074,7 @@
{
unsigned int primary_total = lcount + tcount + arg->global_count;
if (primary_total * MIPS_ELF_GOT_SIZE (bfd2got->bfd)
- >= MIPS_ELF_GOT_MAX_SIZE (bfd2got->bfd))
+ >= MIPS_ELF_GOT_MAX_SIZE (arg->info))
too_many_for_tls = TRUE;
}
@@ -2972,52 +3157,54 @@
return 1;
}
-/* Set the TLS GOT index for the GOT entry in ENTRYP. */
+/* Set the TLS GOT index for the GOT entry in ENTRYP. ENTRYP's NEXT field
+ is null iff there is just a single GOT. */
static int
mips_elf_initialize_tls_index (void **entryp, void *p)
{
struct mips_got_entry *entry = (struct mips_got_entry *)*entryp;
struct mips_got_info *g = p;
+ bfd_vma next_index;
/* We're only interested in TLS symbols. */
if (entry->tls_type == 0)
return 1;
- if (entry->symndx == -1)
+ next_index = MIPS_ELF_GOT_SIZE (entry->abfd) * (long) g->tls_assigned_gotno;
+
+ if (entry->symndx == -1 && g->next == NULL)
{
- /* There may be multiple mips_got_entry structs for a global variable
- if there is just one GOT. Just do this once. */
- if (g->next == NULL)
- {
- if (entry->d.h->tls_type & GOT_TLS_OFFSET_DONE)
- return 1;
- entry->d.h->tls_type |= GOT_TLS_OFFSET_DONE;
- }
+ /* A type (3) got entry in the single-GOT case. We use the symbol's
+ hash table entry to track its index. */
+ if (entry->d.h->tls_type & GOT_TLS_OFFSET_DONE)
+ return 1;
+ entry->d.h->tls_type |= GOT_TLS_OFFSET_DONE;
+ entry->d.h->tls_got_offset = next_index;
}
- else if (entry->tls_type & GOT_TLS_LDM)
+ else
{
- /* Similarly, there may be multiple structs for the LDM entry. */
- if (g->tls_ldm_offset != MINUS_TWO && g->tls_ldm_offset != MINUS_ONE)
+ if (entry->tls_type & GOT_TLS_LDM)
{
- entry->gotidx = g->tls_ldm_offset;
- return 1;
+ /* There are separate mips_got_entry objects for each input bfd
+ that requires an LDM entry. Make sure that all LDM entries in
+ a GOT resolve to the same index. */
+ if (g->tls_ldm_offset != MINUS_TWO && g->tls_ldm_offset != MINUS_ONE)
+ {
+ entry->gotidx = g->tls_ldm_offset;
+ return 1;
+ }
+ g->tls_ldm_offset = next_index;
}
+ entry->gotidx = next_index;
}
- /* Initialize the GOT offset. */
- entry->gotidx = MIPS_ELF_GOT_SIZE (entry->abfd) * (long) g->tls_assigned_gotno;
- if (g->next == NULL && entry->symndx == -1)
- entry->d.h->tls_got_offset = entry->gotidx;
-
+ /* Account for the entries we've just allocated. */
if (entry->tls_type & (GOT_TLS_GD | GOT_TLS_LDM))
g->tls_assigned_gotno += 2;
if (entry->tls_type & GOT_TLS_IE)
g->tls_assigned_gotno += 1;
- if (entry->tls_type & GOT_TLS_LDM)
- g->tls_ldm_offset = entry->gotidx;
-
return 1;
}
@@ -3201,9 +3388,9 @@
/* Taking out PAGES entries is a worst-case estimate. We could
compute the maximum number of pages that each separate input bfd
uses, but it's probably not worth it. */
- got_per_bfd_arg.max_count = ((MIPS_ELF_GOT_MAX_SIZE (abfd)
+ got_per_bfd_arg.max_count = ((MIPS_ELF_GOT_MAX_SIZE (info)
/ MIPS_ELF_GOT_SIZE (abfd))
- - MIPS_RESERVED_GOTNO - pages);
+ - MIPS_RESERVED_GOTNO (info) - pages);
/* The number of globals that will be included in the primary GOT.
See the calls to mips_elf_set_global_got_offset below for more
information. */
@@ -3338,21 +3525,24 @@
{
struct mips_got_info *gn;
- assign += MIPS_RESERVED_GOTNO;
+ assign += MIPS_RESERVED_GOTNO (info);
g->assigned_gotno = assign;
g->local_gotno += assign + pages;
assign = g->local_gotno + g->global_gotno + g->tls_gotno;
+ /* Take g out of the direct list, and push it onto the reversed
+ list that gg points to. g->next is guaranteed to be nonnull after
+ this operation, as required by mips_elf_initialize_tls_index. */
+ gn = g->next;
+ g->next = gg->next;
+ gg->next = g;
+
/* Set up any TLS entries. We always place the TLS entries after
all non-TLS entries. */
g->tls_assigned_gotno = g->local_gotno + g->global_gotno;
htab_traverse (g->got_entries, mips_elf_initialize_tls_index, g);
- /* Take g out of the direct list, and push it onto the reversed
- list that gg points to. */
- gn = g->next;
- g->next = gg->next;
- gg->next = g;
+ /* Move onto the next GOT. It will be a secondary GOT if nonull. */
g = gn;
/* Mark global symbols in every non-primary GOT as ineligible for
@@ -3534,7 +3724,10 @@
struct bfd_link_hash_entry *bh;
struct mips_got_info *g;
bfd_size_type amt;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
+
/* This function may be called more than once. */
s = mips_elf_got_section (abfd, TRUE);
if (s)
@@ -3570,6 +3763,7 @@
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_OBJECT;
+ elf_hash_table (info)->hgot = h;
if (info->shared
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
@@ -3582,8 +3776,8 @@
g->global_gotsym = NULL;
g->global_gotno = 0;
g->tls_gotno = 0;
- g->local_gotno = MIPS_RESERVED_GOTNO;
- g->assigned_gotno = MIPS_RESERVED_GOTNO;
+ g->local_gotno = MIPS_RESERVED_GOTNO (info);
+ g->assigned_gotno = MIPS_RESERVED_GOTNO (info);
g->bfd2got = NULL;
g->next = NULL;
g->tls_ldm_offset = MINUS_ONE;
@@ -3595,9 +3789,33 @@
mips_elf_section_data (s)->elf.this_hdr.sh_flags
|= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
+ /* VxWorks also needs a .got.plt section. */
+ if (htab->is_vxworks)
+ {
+ s = bfd_make_section_with_flags (abfd, ".got.plt",
+ SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY | SEC_LINKER_CREATED);
+ if (s == NULL || !bfd_set_section_alignment (abfd, s, 4))
+ return FALSE;
+
+ htab->sgotplt = s;
+ }
return TRUE;
}
+/* Return true if H refers to the special VxWorks __GOTT_BASE__ or
+ __GOTT_INDEX__ symbols. These symbols are only special for
+ shared objects; they are not used in executables. */
+
+static bfd_boolean
+is_gott_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *h)
+{
+ return (mips_elf_hash_table (info)->is_vxworks
+ && info->shared
+ && (strcmp (h->root.root.string, "__GOTT_BASE__") == 0
+ || strcmp (h->root.root.string, "__GOTT_INDEX__") == 0));
+}
+
/* Calculate the value produced by the RELOCATION (which comes from
the INPUT_BFD). The ADDEND is the addend to use for this
RELOCATION; RELOCATION->R_ADDEND is ignored.
@@ -3660,7 +3878,12 @@
bfd_boolean overflowed_p;
/* TRUE if this relocation refers to a MIPS16 function. */
bfd_boolean target_is_16_bit_code_p = FALSE;
+ struct mips_elf_link_hash_table *htab;
+ bfd *dynobj;
+ dynobj = elf_hash_table (info)->dynobj;
+ htab = mips_elf_hash_table (info);
+
/* Parse the relocation. */
r_symndx = ELF_R_SYM (input_bfd, relocation->r_info);
r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
@@ -3909,52 +4132,61 @@
/* Find the index into the GOT where this value is located. */
if (r_type == R_MIPS_TLS_LDM)
{
- g = mips_elf_local_got_index (abfd, input_bfd, info, 0, 0, NULL,
- r_type);
+ g = mips_elf_local_got_index (abfd, input_bfd, info,
+ sec, 0, 0, NULL, r_type);
if (g == MINUS_ONE)
return bfd_reloc_outofrange;
}
else if (!local_p)
{
- /* GOT_PAGE may take a non-zero addend, that is ignored in a
- GOT_PAGE relocation that decays to GOT_DISP because the
- symbol turns out to be global. The addend is then added
- as GOT_OFST. */
- BFD_ASSERT (addend == 0 || r_type == R_MIPS_GOT_PAGE);
- g = mips_elf_global_got_index (elf_hash_table (info)->dynobj,
- input_bfd,
- (struct elf_link_hash_entry *) h,
- r_type, info);
- if (h->tls_type == GOT_NORMAL
- && (! elf_hash_table(info)->dynamic_sections_created
- || (info->shared
- && (info->symbolic || h->root.forced_local)
- && h->root.def_regular)))
+ /* On VxWorks, CALL relocations should refer to the .got.plt
+ entry, which is initialized to point at the PLT stub. */
+ if (htab->is_vxworks
+ && (r_type == R_MIPS_CALL_HI16
+ || r_type == R_MIPS_CALL_LO16
+ || r_type == R_MIPS_CALL16))
{
- /* This is a static link or a -Bsymbolic link. The
- symbol is defined locally, or was forced to be local.
- We must initialize this entry in the GOT. */
- bfd *tmpbfd = elf_hash_table (info)->dynobj;
- asection *sgot = mips_elf_got_section (tmpbfd, FALSE);
- MIPS_ELF_PUT_WORD (tmpbfd, symbol, sgot->contents + g);
+ BFD_ASSERT (addend == 0);
+ BFD_ASSERT (h->root.needs_plt);
+ g = mips_elf_gotplt_index (info, &h->root);
}
+ else
+ {
+ /* GOT_PAGE may take a non-zero addend, that is ignored in a
+ GOT_PAGE relocation that decays to GOT_DISP because the
+ symbol turns out to be global. The addend is then added
+ as GOT_OFST. */
+ BFD_ASSERT (addend == 0 || r_type == R_MIPS_GOT_PAGE);
+ g = mips_elf_global_got_index (dynobj, input_bfd,
+ &h->root, r_type, info);
+ if (h->tls_type == GOT_NORMAL
+ && (! elf_hash_table(info)->dynamic_sections_created
+ || (info->shared
+ && (info->symbolic || h->root.forced_local)
+ && h->root.def_regular)))
+ {
+ /* This is a static link or a -Bsymbolic link. The
+ symbol is defined locally, or was forced to be local.
+ We must initialize this entry in the GOT. */
+ asection *sgot = mips_elf_got_section (dynobj, FALSE);
+ MIPS_ELF_PUT_WORD (dynobj, symbol, sgot->contents + g);
+ }
+ }
}
- else if (r_type == R_MIPS_GOT16 || r_type == R_MIPS_CALL16)
- /* There's no need to create a local GOT entry here; the
- calculation for a local GOT16 entry does not involve G. */
+ else if (!htab->is_vxworks
+ && (r_type == R_MIPS_CALL16 || (r_type == R_MIPS_GOT16)))
+ /* The calculation below does not involve "g". */
break;
else
{
- g = mips_elf_local_got_index (abfd, input_bfd,
- info, symbol + addend, r_symndx, h,
- r_type);
+ g = mips_elf_local_got_index (abfd, input_bfd, info, sec,
+ symbol + addend, r_symndx, h, r_type);
if (g == MINUS_ONE)
return bfd_reloc_outofrange;
}
/* Convert GOT indices to actual offsets. */
- g = mips_elf_got_offset_from_index (elf_hash_table (info)->dynobj,
- abfd, input_bfd, g);
+ g = mips_elf_got_offset_from_index (dynobj, abfd, input_bfd, g);
break;
case R_MIPS_HI16:
@@ -3967,10 +4199,8 @@
case R_MIPS16_GPREL:
gp0 = _bfd_get_gp_value (input_bfd);
gp = _bfd_get_gp_value (abfd);
- if (elf_hash_table (info)->dynobj)
- gp += mips_elf_adjust_gp (abfd,
- mips_elf_got_info
- (elf_hash_table (info)->dynobj, NULL),
+ if (dynobj)
+ gp += mips_elf_adjust_gp (abfd, mips_elf_got_info (dynobj, NULL),
input_bfd);
break;
@@ -3980,7 +4210,28 @@
if (gnu_local_gp_p)
symbol = gp;
-
+
+ /* Relocations against the VxWorks __GOTT_BASE__ and __GOTT_INDEX__
+ symbols are resolved by the loader. Add them to .rela.dyn. */
+ if (h != NULL && is_gott_symbol (info, &h->root))
+ {
+ Elf_Internal_Rela outrel;
+ bfd_byte *loc;
+ asection *s;
+
+ s = mips_elf_rel_dyn_section (info, FALSE);
+ loc = s->contents + s->reloc_count++ * sizeof (Elf32_External_Rela);
+
+ outrel.r_offset = (input_section->output_section->vma
+ + input_section->output_offset
+ + relocation->r_offset);
+ outrel.r_info = ELF32_R_INFO (h->root.dynindx, r_type);
+ outrel.r_addend = addend;
+ bfd_elf32_swap_reloca_out (abfd, &outrel, loc);
+ *valuep = 0;
+ return bfd_reloc_ok;
+ }
+
/* Figure out what kind of relocation is being performed. */
switch (r_type)
{
@@ -3996,7 +4247,8 @@
case R_MIPS_REL32:
case R_MIPS_64:
if ((info->shared
- || (elf_hash_table (info)->dynamic_sections_created
+ || (!htab->is_vxworks
+ && htab->root.dynamic_sections_created
&& h != NULL
&& h->root.def_dynamic
&& !h->root.def_regular))
@@ -4007,7 +4259,11 @@
against a symbol in a shared library, then we can't know
where the symbol will end up. So, we create a relocation
record in the output, and leave the job up to the dynamic
- linker. */
+ linker.
+
+ In VxWorks executables, references to external symbols
+ are handled using copy relocs or PLT stubs, so there's
+ no need to add a dynamic relocation here. */
value = addend;
if (!mips_elf_create_dynamic_relocation (abfd,
info,
@@ -4159,22 +4415,20 @@
case R_MIPS_GOT16:
case R_MIPS_CALL16:
- if (local_p)
+ /* VxWorks does not have separate local and global semantics for
+ R_MIPS_GOT16; every relocation evaluates to "G". */
+ if (!htab->is_vxworks && local_p)
{
bfd_boolean forced;
- /* The special case is when the symbol is forced to be local. We
- need the full address in the GOT since no R_MIPS_LO16 relocation
- follows. */
forced = ! mips_elf_local_relocation_p (input_bfd, relocation,
local_sections, FALSE);
- value = mips_elf_got16_entry (abfd, input_bfd, info,
+ value = mips_elf_got16_entry (abfd, input_bfd, info, sec,
symbol + addend, forced);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
value
- = mips_elf_got_offset_from_index (elf_hash_table (info)->dynobj,
- abfd, input_bfd, value);
+ = mips_elf_got_offset_from_index (dynobj, abfd, input_bfd, value);
overflowed_p = mips_elf_overflow_p (value, 16);
break;
}
@@ -4224,17 +4478,18 @@
0. */
if (! local_p)
goto got_disp;
- value = mips_elf_got_page (abfd, input_bfd, info, symbol + addend, NULL);
+ value = mips_elf_got_page (abfd, input_bfd, info, sec,
+ symbol + addend, NULL);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
- value = mips_elf_got_offset_from_index (elf_hash_table (info)->dynobj,
- abfd, input_bfd, value);
+ value = mips_elf_got_offset_from_index (dynobj, abfd, input_bfd, value);
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_GOT_OFST:
if (local_p)
- mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value);
+ mips_elf_got_page (abfd, input_bfd, info, sec,
+ symbol + addend, &value);
else
value = addend;
overflowed_p = mips_elf_overflow_p (value, 16);
@@ -4419,23 +4674,31 @@
|| strncmp (name, CALL_FP_STUB, sizeof CALL_FP_STUB - 1) == 0);
}
-/* Add room for N relocations to the .rel.dyn section in ABFD. */
+/* Add room for N relocations to the .rel(a).dyn section in ABFD. */
static void
-mips_elf_allocate_dynamic_relocations (bfd *abfd, unsigned int n)
+mips_elf_allocate_dynamic_relocations (bfd *abfd, struct bfd_link_info *info,
+ unsigned int n)
{
asection *s;
+ struct mips_elf_link_hash_table *htab;
- s = mips_elf_rel_dyn_section (abfd, FALSE);
+ htab = mips_elf_hash_table (info);
+ s = mips_elf_rel_dyn_section (info, FALSE);
BFD_ASSERT (s != NULL);
- if (s->size == 0)
+ if (htab->is_vxworks)
+ s->size += n * MIPS_ELF_RELA_SIZE (abfd);
+ else
{
- /* Make room for a null element. */
- s->size += MIPS_ELF_REL_SIZE (abfd);
- ++s->reloc_count;
+ if (s->size == 0)
+ {
+ /* Make room for a null element. */
+ s->size += MIPS_ELF_REL_SIZE (abfd);
+ ++s->reloc_count;
+ }
+ s->size += n * MIPS_ELF_REL_SIZE (abfd);
}
- s->size += n * MIPS_ELF_REL_SIZE (abfd);
}
/* Create a rel.dyn relocation for the dynamic linker to resolve. REL
@@ -4457,10 +4720,12 @@
int r_type;
long indx;
bfd_boolean defined_p;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
r_type = ELF_R_TYPE (output_bfd, rel->r_info);
dynobj = elf_hash_table (info)->dynobj;
- sreloc = mips_elf_rel_dyn_section (dynobj, FALSE);
+ sreloc = mips_elf_rel_dyn_section (info, FALSE);
BFD_ASSERT (sreloc != NULL);
BFD_ASSERT (sreloc->contents != NULL);
BFD_ASSERT (sreloc->reloc_count * MIPS_ELF_REL_SIZE (output_bfd)
@@ -4545,10 +4810,15 @@
if (defined_p && r_type != R_MIPS_REL32)
*addendp += symbol;
- /* The relocation is always an REL32 relocation because we don't
- know where the shared library will wind up at load-time. */
- outrel[0].r_info = ELF_R_INFO (output_bfd, (unsigned long) indx,
- R_MIPS_REL32);
+ if (htab->is_vxworks)
+ /* VxWorks uses non-relative relocations for this. */
+ outrel[0].r_info = ELF32_R_INFO (indx, R_MIPS_32);
+ else
+ /* The relocation is always an REL32 relocation because we don't
+ know where the shared library will wind up at load-time. */
+ outrel[0].r_info = ELF_R_INFO (output_bfd, (unsigned long) indx,
+ R_MIPS_REL32);
+
/* For strict adherence to the ABI specification, we should
generate a R_MIPS_64 relocation record by itself before the
_REL32/_64 record as well, such that the addend is read in as
@@ -4586,6 +4856,15 @@
(sreloc->contents
+ sreloc->reloc_count * sizeof (Elf64_Mips_External_Rel)));
}
+ else if (htab->is_vxworks)
+ {
+ /* VxWorks uses RELA rather than REL dynamic relocations. */
+ outrel[0].r_addend = *addendp;
+ bfd_elf32_swap_reloca_out
+ (output_bfd, &outrel[0],
+ (sreloc->contents
+ + sreloc->reloc_count * sizeof (Elf32_External_Rela)));
+ }
else
bfd_elf32_swap_reloc_out
(output_bfd, &outrel[0],
@@ -5602,23 +5881,29 @@
flagword flags;
register asection *s;
const char * const *namep;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED | SEC_READONLY);
- /* Mips ABI requests the .dynamic section to be read only. */
- s = bfd_get_section_by_name (abfd, ".dynamic");
- if (s != NULL)
+ /* The psABI requires a read-only .dynamic section, but the VxWorks
+ EABI doesn't. */
+ if (!htab->is_vxworks)
{
- if (! bfd_set_section_flags (abfd, s, flags))
- return FALSE;
+ s = bfd_get_section_by_name (abfd, ".dynamic");
+ if (s != NULL)
+ {
+ if (! bfd_set_section_flags (abfd, s, flags))
+ return FALSE;
+ }
}
/* We need to create .got section. */
if (! mips_elf_create_got_section (abfd, info, FALSE))
return FALSE;
- if (! mips_elf_rel_dyn_section (elf_hash_table (info)->dynobj, TRUE))
+ if (! mips_elf_rel_dyn_section (info, TRUE))
return FALSE;
/* Create .stub section. */
@@ -5739,6 +6024,45 @@
}
}
+ if (htab->is_vxworks)
+ {
+ /* Create the .plt, .rela.plt, .dynbss and .rela.bss sections.
+ Also create the _PROCEDURE_LINKAGE_TABLE symbol. */
+ if (!_bfd_elf_create_dynamic_sections (abfd, info))
+ return FALSE;
+
+ /* Cache the sections created above. */
+ htab->sdynbss = bfd_get_section_by_name (abfd, ".dynbss");
+ htab->srelbss = bfd_get_section_by_name (abfd, ".rela.bss");
+ htab->srelplt = bfd_get_section_by_name (abfd, ".rela.plt");
+ htab->splt = bfd_get_section_by_name (abfd, ".plt");
+ if (!htab->sdynbss
+ || (!htab->srelbss && !info->shared)
+ || !htab->srelplt
+ || !htab->splt)
+ abort ();
+
+ /* Do the usual VxWorks handling. */
+ if (!elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2))
+ return FALSE;
+
+ /* Work out the PLT sizes. */
+ if (info->shared)
+ {
+ htab->plt_header_size
+ = 4 * ARRAY_SIZE (mips_vxworks_shared_plt0_entry);
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (mips_vxworks_shared_plt_entry);
+ }
+ else
+ {
+ htab->plt_header_size
+ = 4 * ARRAY_SIZE (mips_vxworks_exec_plt0_entry);
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (mips_vxworks_exec_plt_entry);
+ }
+ }
+
return TRUE;
}
@@ -5760,10 +6084,12 @@
asection *sgot;
asection *sreloc;
const struct elf_backend_data *bed;
+ struct mips_elf_link_hash_table *htab;
if (info->relocatable)
return TRUE;
+ htab = mips_elf_hash_table (info);
dynobj = elf_hash_table (info)->dynobj;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
@@ -5997,6 +6323,7 @@
case R_MIPS_GOT_PAGE:
case R_MIPS_GOT_OFST:
case R_MIPS_GOT_DISP:
+ case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_LDM:
if (dynobj == NULL)
@@ -6004,13 +6331,24 @@
if (! mips_elf_create_got_section (dynobj, info, FALSE))
return FALSE;
g = mips_elf_got_info (dynobj, &sgot);
+ if (htab->is_vxworks && !info->shared)
+ {
+ (*_bfd_error_handler)
+ (_("%B: GOT reloc at 0x%lx not expected in executables"),
+ abfd, (unsigned long) rel->r_offset);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
break;
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
+ /* In VxWorks executables, references to external symbols
+ are handled using copy relocs or PLT stubs, so there's
+ no need to add a dynamic relocation here. */
if (dynobj == NULL
- && (info->shared || h != NULL)
+ && (info->shared || (h != NULL && !htab->is_vxworks))
&& (sec->flags & SEC_ALLOC) != 0)
elf_hash_table (info)->dynobj = dynobj = abfd;
break;
@@ -6020,15 +6358,35 @@
}
}
- if (!h && (r_type == R_MIPS_CALL_LO16
- || r_type == R_MIPS_GOT_LO16
- || r_type == R_MIPS_GOT_DISP))
+ if (h)
{
+ ((struct mips_elf_link_hash_entry *) h)->is_relocation_target = TRUE;
+
+ /* Relocations against the special VxWorks __GOTT_BASE__ and
+ __GOTT_INDEX__ symbols must be left to the loader. Allocate
+ room for them in .rela.dyn. */
+ if (is_gott_symbol (info, h))
+ {
+ if (sreloc == NULL)
+ {
+ sreloc = mips_elf_rel_dyn_section (info, TRUE);
+ if (sreloc == NULL)
+ return FALSE;
+ }
+ mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
+ }
+ }
+ else if (r_type == R_MIPS_CALL_LO16
+ || r_type == R_MIPS_GOT_LO16
+ || r_type == R_MIPS_GOT_DISP
+ || (r_type == R_MIPS_GOT16 && htab->is_vxworks))
+ {
/* We may need a local GOT entry for this relocation. We
don't count R_MIPS_GOT_PAGE because we can estimate the
maximum number of pages needed by looking at the size of
the segment. Similar comments apply to R_MIPS_GOT16 and
- R_MIPS_CALL16. We don't count R_MIPS_GOT_HI16, or
+ R_MIPS_CALL16, except on VxWorks, where GOT relocations
+ always evaluate to "G". We don't count R_MIPS_GOT_HI16, or
R_MIPS_CALL_HI16 because these are always followed by an
R_MIPS_GOT_LO16 or R_MIPS_CALL_LO16. */
if (! mips_elf_record_local_got_symbol (abfd, r_symndx,
@@ -6053,8 +6411,11 @@
case R_MIPS_CALL_LO16:
if (h != NULL)
{
- /* This symbol requires a global offset table entry. */
- if (! mips_elf_record_global_got_symbol (h, abfd, info, g, 0))
+ /* VxWorks call relocations point the function's .got.plt
+ entry, which will be allocated by adjust_dynamic_symbol.
+ Otherwise, this symbol requires a global GOT entry. */
+ if (!htab->is_vxworks
+ && !mips_elf_record_global_got_symbol (h, abfd, info, g, 0))
return FALSE;
/* We need a stub, not a plt entry for the undefined
@@ -6140,12 +6501,15 @@
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
- if ((info->shared || h != NULL)
+ /* In VxWorks executables, references to external symbols
+ are handled using copy relocs or PLT stubs, so there's
+ no need to add a .rela.dyn entry for this relocation. */
+ if ((info->shared || (h != NULL && !htab->is_vxworks))
&& (sec->flags & SEC_ALLOC) != 0)
{
if (sreloc == NULL)
{
- sreloc = mips_elf_rel_dyn_section (dynobj, TRUE);
+ sreloc = mips_elf_rel_dyn_section (info, TRUE);
if (sreloc == NULL)
return FALSE;
}
@@ -6154,9 +6518,8 @@
{
/* When creating a shared object, we must copy these
reloc types into the output file as R_MIPS_REL32
- relocs. We make room for this reloc in the
- .rel.dyn reloc section. */
- mips_elf_allocate_dynamic_relocations (dynobj, 1);
+ relocs. Make room for this reloc in .rel(a).dyn. */
+ mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
if ((sec->flags & MIPS_READONLY_SECTION)
== MIPS_READONLY_SECTION)
/* We tell the dynamic linker that there are
@@ -6181,8 +6544,10 @@
/* Even though we don't directly need a GOT entry for
this symbol, a symbol must have a dynamic symbol
table index greater that DT_MIPS_GOTSYM if there are
- dynamic relocations against it. */
- if (h != NULL)
+ dynamic relocations against it. This does not apply
+ to VxWorks, which does not have the usual coupling
+ between global GOT entries and .dynsym entries. */
+ if (h != NULL && !htab->is_vxworks)
{
if (dynobj == NULL)
elf_hash_table (info)->dynobj = dynobj = abfd;
@@ -6199,7 +6564,16 @@
sizeof (Elf32_External_crinfo);
break;
+ case R_MIPS_PC16:
+ if (h)
+ ((struct mips_elf_link_hash_entry *) h)->is_branch_target = TRUE;
+ break;
+
case R_MIPS_26:
+ if (h)
+ ((struct mips_elf_link_hash_entry *) h)->is_branch_target = TRUE;
+ /* Fall through. */
+
case R_MIPS_GPREL16:
case R_MIPS_LITERAL:
case R_MIPS_GPREL32:
@@ -6227,25 +6601,22 @@
}
/* We must not create a stub for a symbol that has relocations
- related to taking the function's address. */
- switch (r_type)
- {
- default:
- if (h != NULL)
- {
- struct mips_elf_link_hash_entry *mh;
+ related to taking the function's address. This doesn't apply to
+ VxWorks, where CALL relocs refer to a .got.plt entry instead of
+ a normal .got entry. */
+ if (!htab->is_vxworks && h != NULL)
+ switch (r_type)
+ {
+ default:
+ ((struct mips_elf_link_hash_entry *) h)->no_fn_stub = TRUE;
+ break;
+ case R_MIPS_CALL16:
+ case R_MIPS_CALL_HI16:
+ case R_MIPS_CALL_LO16:
+ case R_MIPS_JALR:
+ break;
+ }
- mh = (struct mips_elf_link_hash_entry *) h;
- mh->no_fn_stub = TRUE;
- }
- break;
- case R_MIPS_CALL16:
- case R_MIPS_CALL_HI16:
- case R_MIPS_CALL_LO16:
- case R_MIPS_JALR:
- break;
- }
-
/* If this reloc is not a 16 bit call, and it has a global
symbol, then we will need the fn_stub if there is one.
References from a stub section do not count. */
@@ -6471,8 +6842,8 @@
&& (h->root.type == bfd_link_hash_defweak
|| !h->def_regular))
{
- mips_elf_allocate_dynamic_relocations (dynobj,
- hmips->possibly_dynamic_relocs);
+ mips_elf_allocate_dynamic_relocations
+ (dynobj, info, hmips->possibly_dynamic_relocs);
if (hmips->readonly_reloc)
/* We tell the dynamic linker that there are relocations
against the text segment. */
@@ -6537,6 +6908,160 @@
return TRUE;
}
+
+/* Likewise, for VxWorks. */
+
+bfd_boolean
+_bfd_mips_vxworks_adjust_dynamic_symbol (struct bfd_link_info *info,
+ struct elf_link_hash_entry *h)
+{
+ bfd *dynobj;
+ struct mips_elf_link_hash_entry *hmips;
+ struct mips_elf_link_hash_table *htab;
+ unsigned int power_of_two;
+
+ htab = mips_elf_hash_table (info);
+ dynobj = elf_hash_table (info)->dynobj;
+ hmips = (struct mips_elf_link_hash_entry *) h;
+
+ /* Make sure we know what is going on here. */
+ BFD_ASSERT (dynobj != NULL
+ && (h->needs_plt
+ || h->needs_copy
+ || h->u.weakdef != NULL
+ || (h->def_dynamic
+ && h->ref_regular
+ && !h->def_regular)));
+
+ /* If the symbol is defined by a dynamic object, we need a PLT stub if
+ either (a) we want to branch to the symbol or (b) we're linking an
+ executable that needs a canonical function address. In the latter
+ case, the canonical address will be the address of the executable's
+ load stub. */
+ if ((hmips->is_branch_target
+ || (!info->shared
+ && h->type == STT_FUNC
+ && hmips->is_relocation_target))
+ && h->def_dynamic
+ && h->ref_regular
+ && !h->def_regular
+ && !h->forced_local)
+ h->needs_plt = 1;
+
+ /* Locally-binding symbols do not need a PLT stub; we can refer to
+ the functions directly. */
+ else if (h->needs_plt
+ && (SYMBOL_CALLS_LOCAL (info, h)
+ || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ && h->root.type == bfd_link_hash_undefweak)))
+ {
+ h->needs_plt = 0;
+ return TRUE;
+ }
+
+ if (h->needs_plt)
+ {
+ /* If this is the first symbol to need a PLT entry, allocate room
+ for the header, and for the header's .rela.plt.unloaded entries. */
+ if (htab->splt->size == 0)
+ {
+ htab->splt->size += htab->plt_header_size;
+ if (!info->shared)
+ htab->srelplt2->size += 2 * sizeof (Elf32_External_Rela);
+ }
+
+ /* Assign the next .plt entry to this symbol. */
+ h->plt.offset = htab->splt->size;
+ htab->splt->size += htab->plt_entry_size;
+
+ /* If the output file has no definition of the symbol, set the
+ symbol's value to the address of the stub. For executables,
+ point at the PLT load stub rather than the lazy resolution stub;
+ this stub will become the canonical function address. */
+ if (!h->def_regular)
+ {
+ h->root.u.def.section = htab->splt;
+ h->root.u.def.value = h->plt.offset;
+ if (!info->shared)
+ h->root.u.def.value += 8;
+ }
+
+ /* Make room for the .got.plt entry and the R_JUMP_SLOT relocation. */
+ htab->sgotplt->size += 4;
+ htab->srelplt->size += sizeof (Elf32_External_Rela);
+
+ /* Make room for the .rela.plt.unloaded relocations. */
+ if (!info->shared)
+ htab->srelplt2->size += 3 * sizeof (Elf32_External_Rela);
+
+ return TRUE;
+ }
+
+ /* If a function symbol is defined by a dynamic object, and we do not
+ need a PLT stub for it, the symbol's value should be zero. */
+ if (h->type == STT_FUNC
+ && h->def_dynamic
+ && h->ref_regular
+ && !h->def_regular)
+ {
+ h->root.u.def.value = 0;
+ return TRUE;
+ }
+
+ /* If this is a weak symbol, and there is a real definition, the
+ processor independent code will have arranged for us to see the
+ real definition first, and we can just use the same value. */
+ if (h->u.weakdef != NULL)
+ {
+ BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
+ || h->u.weakdef->root.type == bfd_link_hash_defweak);
+ h->root.u.def.section = h->u.weakdef->root.u.def.section;
+ h->root.u.def.value = h->u.weakdef->root.u.def.value;
+ return TRUE;
+ }
+
+ /* This is a reference to a symbol defined by a dynamic object which
+ is not a function. */
+ if (info->shared)
+ return TRUE;
+
+ /* We must allocate the symbol in our .dynbss section, which will
+ become part of the .bss section of the executable. There will be
+ an entry for this symbol in the .dynsym section. The dynamic
+ object will contain position independent code, so all references
+ from the dynamic object to this symbol will go through the global
+ offset table. The dynamic linker will use the .dynsym entry to
+ determine the address it must put in the global offset table, so
+ both the dynamic object and the regular object will refer to the
+ same memory location for the variable. */
+
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ {
+ htab->srelbss->size += sizeof (Elf32_External_Rela);
+ h->needs_copy = 1;
+ }
+
+ /* We need to figure out the alignment required for this symbol. */
+ power_of_two = bfd_log2 (h->size);
+ if (power_of_two > 4)
+ power_of_two = 4;
+
+ /* Apply the required alignment. */
+ htab->sdynbss->size = BFD_ALIGN (htab->sdynbss->size,
+ (bfd_size_type) 1 << power_of_two);
+ if (power_of_two > bfd_get_section_alignment (dynobj, htab->sdynbss)
+ && !bfd_set_section_alignment (dynobj, htab->sdynbss, power_of_two))
+ return FALSE;
+
+ /* Define the symbol as being at this point in the section. */
+ h->root.u.def.section = htab->sdynbss;
+ h->root.u.def.value = htab->sdynbss->size;
+
+ /* Increment the section size to make room for the symbol. */
+ htab->sdynbss->size += h->size;
+
+ return TRUE;
+}
/* This function is called after all the input files have been read,
and the input sections have been assigned to output sections. We
@@ -6556,7 +7081,10 @@
bfd_size_type local_gotno;
bfd *sub;
struct mips_elf_count_tls_arg count_tls_arg;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
+
/* The .reginfo section has a fixed size. */
ri = bfd_get_section_by_name (output_bfd, ".reginfo");
if (ri != NULL)
@@ -6614,9 +7142,15 @@
rld. */
loadable_size += MIPS_FUNCTION_STUB_SIZE * (i + 1);
- /* Assume there are two loadable segments consisting of
- contiguous sections. Is 5 enough? */
- local_gotno = (loadable_size >> 16) + 5;
+ if (htab->is_vxworks)
+ /* There's no need to allocate page entries for VxWorks; R_MIPS_GOT16
+ relocations against local symbols evaluate to "G", and the EABI does
+ not include R_MIPS_GOT_PAGE. */
+ local_gotno = 0;
+ else
+ /* Assume there are two loadable segments consisting of contiguous
+ sections. Is 5 enough? */
+ local_gotno = (loadable_size >> 16) + 5;
g->local_gotno += local_gotno;
s->size += g->local_gotno * MIPS_ELF_GOT_SIZE (output_bfd);
@@ -6637,7 +7171,10 @@
mips_elf_resolve_final_got_entries (g);
- if (s->size > MIPS_ELF_GOT_MAX_SIZE (output_bfd))
+ /* VxWorks does not support multiple GOTs. It initializes $gp to
+ __GOTT_BASE__[__GOTT_INDEX__], the value of which is set by the
+ dynamic loader. */
+ if (!htab->is_vxworks && s->size > MIPS_ELF_GOT_MAX_SIZE (info))
{
if (! mips_elf_multi_got (output_bfd, info, g, s, local_gotno))
return FALSE;
@@ -6659,9 +7196,11 @@
struct bfd_link_info *info)
{
bfd *dynobj;
- asection *s;
+ asection *s, *sreldyn;
bfd_boolean reltext;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
dynobj = elf_hash_table (info)->dynobj;
BFD_ASSERT (dynobj != NULL);
@@ -6683,6 +7222,7 @@
determined the sizes of the various dynamic sections. Allocate
memory for them. */
reltext = FALSE;
+ sreldyn = NULL;
for (s = dynobj->sections; s != NULL; s = s->next)
{
const char *name;
@@ -6703,7 +7243,7 @@
/* If this relocation section applies to a read only
section, then we probably need a DT_TEXTREL entry.
- If the relocation section is .rel.dyn, we always
+ If the relocation section is .rel(a).dyn, we always
assert a DT_TEXTREL entry rather than testing whether
there exists a relocation to a read only section or
not. */
@@ -6713,12 +7253,12 @@
if ((target != NULL
&& (target->flags & SEC_READONLY) != 0
&& (target->flags & SEC_ALLOC) != 0)
- || strcmp (outname, ".rel.dyn") == 0)
+ || strcmp (outname, MIPS_ELF_REL_DYN_NAME (info)) == 0)
reltext = TRUE;
/* We use the reloc_count field as a counter if we need
to copy relocs into the output file. */
- if (strcmp (name, ".rel.dyn") != 0)
+ if (strcmp (name, MIPS_ELF_REL_DYN_NAME (info)) != 0)
s->reloc_count = 0;
/* If combreloc is enabled, elf_link_sort_relocs() will
@@ -6730,8 +7270,24 @@
info->combreloc = 0;
}
}
- else if (strncmp (name, ".got", 4) == 0)
+ else if (htab->is_vxworks && strcmp (name, ".got") == 0)
{
+ /* Executables do not need a GOT. */
+ if (info->shared)
+ {
+ /* Allocate relocations for all but the reserved entries. */
+ struct mips_got_info *g;
+ unsigned int count;
+
+ g = mips_elf_got_info (dynobj, NULL);
+ count = (g->global_gotno
+ + g->local_gotno
+ - MIPS_RESERVED_GOTNO (info));
+ mips_elf_allocate_dynamic_relocations (dynobj, info, count);
+ }
+ }
+ else if (!htab->is_vxworks && strncmp (name, ".got", 4) == 0)
+ {
/* _bfd_mips_elf_always_size_sections() has already done
most of the work, but some symbols may have been mapped
to versions that we must now resolve in the got_entries
@@ -6775,7 +7331,7 @@
BFD_ASSERT (g->assigned_gotno == g->next->local_gotno
+ g->next->global_gotno
+ g->next->tls_gotno
- + MIPS_RESERVED_GOTNO);
+ + MIPS_RESERVED_GOTNO (info));
}
}
}
@@ -6795,7 +7351,8 @@
}
if (needed_relocs)
- mips_elf_allocate_dynamic_relocations (dynobj, needed_relocs);
+ mips_elf_allocate_dynamic_relocations (dynobj, info,
+ needed_relocs);
}
else if (strcmp (name, MIPS_ELF_STUB_SECTION_NAME (output_bfd)) == 0)
{
@@ -6814,7 +7371,9 @@
else if (SGI_COMPAT (output_bfd)
&& strncmp (name, ".compact_rel", 12) == 0)
s->size += mips_elf_hash_table (info)->compact_rel_size;
- else if (strncmp (name, ".init", 5) != 0)
+ else if (strncmp (name, ".init", 5) != 0
+ && s != htab->sgotplt
+ && s != htab->splt)
{
/* It's not one of our sections, so don't allocate space. */
continue;
@@ -6829,6 +7388,14 @@
if ((s->flags & SEC_HAS_CONTENTS) == 0)
continue;
+ /* Allocate memory for this section last, since we may increase its
+ size above. */
+ if (strcmp (name, MIPS_ELF_REL_DYN_NAME (info)) == 0)
+ {
+ sreldyn = s;
+ continue;
+ }
+
/* Allocate memory for the section contents. */
s->contents = bfd_zalloc (dynobj, s->size);
if (s->contents == NULL)
@@ -6838,6 +7405,17 @@
}
}
+ /* Allocate memory for the .rel(a).dyn section. */
+ if (sreldyn != NULL)
+ {
+ sreldyn->contents = bfd_zalloc (dynobj, sreldyn->size);
+ if (sreldyn->contents == NULL)
+ {
+ bfd_set_error (bfd_error_no_memory);
+ return FALSE;
+ }
+ }
+
if (elf_hash_table (info)->dynamic_sections_created)
{
/* Add some entries to the .dynamic section. We fill in the
@@ -6867,7 +7445,7 @@
}
}
- if (reltext && SGI_COMPAT (output_bfd))
+ if (reltext && (SGI_COMPAT (output_bfd) || htab->is_vxworks))
info->flags |= DF_TEXTREL;
if ((info->flags & DF_TEXTREL) != 0)
@@ -6879,53 +7457,125 @@
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTGOT, 0))
return FALSE;
- if (mips_elf_rel_dyn_section (dynobj, FALSE))
+ if (htab->is_vxworks)
{
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_REL, 0))
- return FALSE;
+ /* VxWorks uses .rela.dyn instead of .rel.dyn. It does not
+ use any of the DT_MIPS_* tags. */
+ if (mips_elf_rel_dyn_section (info, FALSE))
+ {
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELA, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELSZ, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELASZ, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELENT, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELAENT, 0))
+ return FALSE;
+ }
+ if (htab->splt->size > 0)
+ {
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTREL, 0))
+ return FALSE;
+
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_JMPREL, 0))
+ return FALSE;
+
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTRELSZ, 0))
+ return FALSE;
+ }
}
+ else
+ {
+ if (mips_elf_rel_dyn_section (info, FALSE))
+ {
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_REL, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_VERSION, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELSZ, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_FLAGS, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELENT, 0))
+ return FALSE;
+ }
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_BASE_ADDRESS, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_VERSION, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_LOCAL_GOTNO, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_FLAGS, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_SYMTABNO, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_BASE_ADDRESS, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_UNREFEXTNO, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_LOCAL_GOTNO, 0))
+ return FALSE;
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_GOTSYM, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_SYMTABNO, 0))
+ return FALSE;
- if (IRIX_COMPAT (dynobj) == ict_irix5
- && ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_HIPAGENO, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_UNREFEXTNO, 0))
+ return FALSE;
- if (IRIX_COMPAT (dynobj) == ict_irix6
- && (bfd_get_section_by_name
- (dynobj, MIPS_ELF_OPTIONS_SECTION_NAME (dynobj)))
- && !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_OPTIONS, 0))
- return FALSE;
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_GOTSYM, 0))
+ return FALSE;
+
+ if (IRIX_COMPAT (dynobj) == ict_irix5
+ && ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_HIPAGENO, 0))
+ return FALSE;
+
+ if (IRIX_COMPAT (dynobj) == ict_irix6
+ && (bfd_get_section_by_name
+ (dynobj, MIPS_ELF_OPTIONS_SECTION_NAME (dynobj)))
+ && !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_OPTIONS, 0))
+ return FALSE;
+ }
}
return TRUE;
}
+/* REL is a relocation in INPUT_BFD that is being copied to OUTPUT_BFD.
+ Adjust its R_ADDEND field so that it is correct for the output file.
+ LOCAL_SYMS and LOCAL_SECTIONS are arrays of INPUT_BFD's local symbols
+ and sections respectively; both use symbol indexes. */
+
+static void
+mips_elf_adjust_addend (bfd *output_bfd, struct bfd_link_info *info,
+ bfd *input_bfd, Elf_Internal_Sym *local_syms,
+ asection **local_sections, Elf_Internal_Rela *rel)
+{
+ unsigned int r_type, r_symndx;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+
+ if (mips_elf_local_relocation_p (input_bfd, rel, local_sections, FALSE))
+ {
+ r_type = ELF_R_TYPE (output_bfd, rel->r_info);
+ if (r_type == R_MIPS16_GPREL
+ || r_type == R_MIPS_GPREL16
+ || r_type == R_MIPS_GPREL32
+ || r_type == R_MIPS_LITERAL)
+ {
+ rel->r_addend += _bfd_get_gp_value (input_bfd);
+ rel->r_addend -= _bfd_get_gp_value (output_bfd);
+ }
+
+ r_symndx = ELF_R_SYM (output_bfd, rel->r_info);
+ sym = local_syms + r_symndx;
+
+ /* Adjust REL's addend to account for section merging. */
+ if (!info->relocatable)
+ {
+ sec = local_sections[r_symndx];
+ _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+ }
+
+ /* This would normally be done by the rela_normal code in elflink.c. */
+ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ rel->r_addend += local_sections[r_symndx]->output_offset;
+ }
+}
+
/* Relocate a MIPS ELF section. */
bfd_boolean
@@ -7076,47 +7726,19 @@
}
else
addend = rel->r_addend;
+ mips_elf_adjust_addend (output_bfd, info, input_bfd,
+ local_syms, local_sections, rel);
}
if (info->relocatable)
{
- Elf_Internal_Sym *sym;
- unsigned long r_symndx;
-
if (r_type == R_MIPS_64 && ! NEWABI_P (output_bfd)
&& bfd_big_endian (input_bfd))
rel->r_offset -= 4;
- /* Since we're just relocating, all we need to do is copy
- the relocations back out to the object file, unless
- they're against a section symbol, in which case we need
- to adjust by the section offset, or unless they're GP
- relative in which case we need to adjust by the amount
- that we're adjusting GP in this relocatable object. */
-
- if (! mips_elf_local_relocation_p (input_bfd, rel, local_sections,
- FALSE))
- /* There's nothing to do for non-local relocations. */
- continue;
-
- if (r_type == R_MIPS16_GPREL
- || r_type == R_MIPS_GPREL16
- || r_type == R_MIPS_GPREL32
- || r_type == R_MIPS_LITERAL)
- addend -= (_bfd_get_gp_value (output_bfd)
- - _bfd_get_gp_value (input_bfd));
-
- r_symndx = ELF_R_SYM (output_bfd, rel->r_info);
- sym = local_syms + r_symndx;
- if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
- /* Adjust the addend appropriately. */
- addend += local_sections[r_symndx]->output_offset;
-
- if (rela_relocation_p)
- /* If this is a RELA relocation, just update the addend. */
- rel->r_addend = addend;
- else
+ if (!rela_relocation_p && rel->r_addend)
{
+ addend += rel->r_addend;
if (r_type == R_MIPS_HI16
|| r_type == R_MIPS_GOT16)
addend = mips_elf_high (addend);
@@ -7485,7 +8107,7 @@
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
name = h->root.root.string;
if (strcmp (name, "_DYNAMIC") == 0
- || strcmp (name, "_GLOBAL_OFFSET_TABLE_") == 0)
+ || h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
else if (strcmp (name, "_DYNAMIC_LINK") == 0
|| strcmp (name, "_DYNAMIC_LINKING") == 0)
@@ -7562,6 +8184,268 @@
return TRUE;
}
+/* Likewise, for VxWorks. */
+
+bfd_boolean
+_bfd_mips_vxworks_finish_dynamic_symbol (bfd *output_bfd,
+ struct bfd_link_info *info,
+ struct elf_link_hash_entry *h,
+ Elf_Internal_Sym *sym)
+{
+ bfd *dynobj;
+ asection *sgot;
+ struct mips_got_info *g;
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ dynobj = elf_hash_table (info)->dynobj;
+
+ if (h->plt.offset != (bfd_vma) -1)
+ {
+ bfd_byte *loc;
+ bfd_vma plt_address, plt_index, got_address, got_offset, branch_offset;
+ Elf_Internal_Rela rel;
+ static const bfd_vma *plt_entry;
+
+ BFD_ASSERT (h->dynindx != -1);
+ BFD_ASSERT (htab->splt != NULL);
+ BFD_ASSERT (h->plt.offset <= htab->splt->size);
+
+ /* Calculate the address of the .plt entry. */
+ plt_address = (htab->splt->output_section->vma
+ + htab->splt->output_offset
+ + h->plt.offset);
+
+ /* Calculate the index of the entry. */
+ plt_index = ((h->plt.offset - htab->plt_header_size)
+ / htab->plt_entry_size);
+
+ /* Calculate the address of the .got.plt entry. */
+ got_address = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + plt_index * 4);
+
+ /* Calculate the offset of the .got.plt entry from
+ _GLOBAL_OFFSET_TABLE_. */
+ got_offset = mips_elf_gotplt_index (info, h);
+
+ /* Calculate the offset for the branch at the start of the PLT
+ entry. The branch jumps to the beginning of .plt. */
+ branch_offset = -(h->plt.offset / 4 + 1) & 0xffff;
+
+ /* Fill in the initial value of the .got.plt entry. */
+ bfd_put_32 (output_bfd, plt_address,
+ htab->sgotplt->contents + plt_index * 4);
+
+ /* Find out where the .plt entry should go. */
+ loc = htab->splt->contents + h->plt.offset;
+
+ if (info->shared)
+ {
+ plt_entry = mips_vxworks_shared_plt_entry;
+ bfd_put_32 (output_bfd, plt_entry[0] | branch_offset, loc);
+ bfd_put_32 (output_bfd, plt_entry[1] | plt_index, loc + 4);
+ }
+ else
+ {
+ bfd_vma got_address_high, got_address_low;
+
+ plt_entry = mips_vxworks_exec_plt_entry;
+ got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
+ got_address_low = got_address & 0xffff;
+
+ bfd_put_32 (output_bfd, plt_entry[0] | branch_offset, loc);
+ bfd_put_32 (output_bfd, plt_entry[1] | plt_index, loc + 4);
+ bfd_put_32 (output_bfd, plt_entry[2] | got_address_high, loc + 8);
+ bfd_put_32 (output_bfd, plt_entry[3] | got_address_low, loc + 12);
+ bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
+ bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
+ bfd_put_32 (output_bfd, plt_entry[6], loc + 24);
+ bfd_put_32 (output_bfd, plt_entry[7], loc + 28);
+
+ loc = (htab->srelplt2->contents
+ + (plt_index * 3 + 2) * sizeof (Elf32_External_Rela));
+
+ /* Emit a relocation for the .got.plt entry. */
+ rel.r_offset = got_address;
+ rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_MIPS_32);
+ rel.r_addend = h->plt.offset;
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+
+ /* Emit a relocation for the lui of %hi(<.got.plt slot>). */
+ loc += sizeof (Elf32_External_Rela);
+ rel.r_offset = plt_address + 8;
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
+ rel.r_addend = got_offset;
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+
+ /* Emit a relocation for the addiu of %lo(<.got.plt slot>). */
+ loc += sizeof (Elf32_External_Rela);
+ rel.r_offset += 4;
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+ }
+
+ /* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
+ loc = htab->srelplt->contents + plt_index * sizeof (Elf32_External_Rela);
+ rel.r_offset = got_address;
+ rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_JUMP_SLOT);
+ rel.r_addend = 0;
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+
+ if (!h->def_regular)
+ sym->st_shndx = SHN_UNDEF;
+ }
+
+ BFD_ASSERT (h->dynindx != -1 || h->forced_local);
+
+ sgot = mips_elf_got_section (dynobj, FALSE);
+ BFD_ASSERT (sgot != NULL);
+ BFD_ASSERT (mips_elf_section_data (sgot) != NULL);
+ g = mips_elf_section_data (sgot)->u.got_info;
+ BFD_ASSERT (g != NULL);
+
+ /* See if this symbol has an entry in the GOT. */
+ if (g->global_gotsym != NULL
+ && h->dynindx >= g->global_gotsym->dynindx)
+ {
+ bfd_vma offset;
+ Elf_Internal_Rela outrel;
+ bfd_byte *loc;
+ asection *s;
+
+ /* Install the symbol value in the GOT. */
+ offset = mips_elf_global_got_index (dynobj, output_bfd, h,
+ R_MIPS_GOT16, info);
+ MIPS_ELF_PUT_WORD (output_bfd, sym->st_value, sgot->contents + offset);
+
+ /* Add a dynamic relocation for it. */
+ s = mips_elf_rel_dyn_section (info, FALSE);
+ loc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
+ outrel.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + offset);
+ outrel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_32);
+ outrel.r_addend = 0;
+ bfd_elf32_swap_reloca_out (dynobj, &outrel, loc);
+ }
+
+ /* Emit a copy reloc, if needed. */
+ if (h->needs_copy)
+ {
+ Elf_Internal_Rela rel;
+
+ BFD_ASSERT (h->dynindx != -1);
+
+ rel.r_offset = (h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset
+ + h->root.u.def.value);
+ rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_COPY);
+ rel.r_addend = 0;
+ bfd_elf32_swap_reloca_out (output_bfd, &rel,
+ htab->srelbss->contents
+ + (htab->srelbss->reloc_count
+ * sizeof (Elf32_External_Rela)));
+ ++htab->srelbss->reloc_count;
+ }
+
+ /* If this is a mips16 symbol, force the value to be even. */
+ if (sym->st_other == STO_MIPS16)
+ sym->st_value &= ~1;
+
+ return TRUE;
+}
+
+/* Install the PLT header for a VxWorks executable and finalize the
+ contents of .rela.plt.unloaded. */
+
+static void
+mips_vxworks_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info)
+{
+ Elf_Internal_Rela rela;
+ bfd_byte *loc;
+ bfd_vma got_value, got_value_high, got_value_low, plt_address;
+ static const bfd_vma *plt_entry;
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ plt_entry = mips_vxworks_exec_plt0_entry;
+
+ /* Calculate the value of _GLOBAL_OFFSET_TABLE_. */
+ got_value = (htab->root.hgot->root.u.def.section->output_section->vma
+ + htab->root.hgot->root.u.def.section->output_offset
+ + htab->root.hgot->root.u.def.value);
+
+ got_value_high = ((got_value + 0x8000) >> 16) & 0xffff;
+ got_value_low = got_value & 0xffff;
+
+ /* Calculate the address of the PLT header. */
+ plt_address = htab->splt->output_section->vma + htab->splt->output_offset;
+
+ /* Install the PLT header. */
+ loc = htab->splt->contents;
+ bfd_put_32 (output_bfd, plt_entry[0] | got_value_high, loc);
+ bfd_put_32 (output_bfd, plt_entry[1] | got_value_low, loc + 4);
+ bfd_put_32 (output_bfd, plt_entry[2], loc + 8);
+ bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
+ bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
+ bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
+
+ /* Output the relocation for the lui of %hi(_GLOBAL_OFFSET_TABLE_). */
+ loc = htab->srelplt2->contents;
+ rela.r_offset = plt_address;
+ rela.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
+ rela.r_addend = 0;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Output the relocation for the following addiu of
+ %lo(_GLOBAL_OFFSET_TABLE_). */
+ rela.r_offset += 4;
+ rela.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Fix up the remaining relocations. They may have the wrong
+ symbol index for _G_O_T_ or _P_L_T_ depending on the order
+ in which symbols were output. */
+ while (loc < htab->srelplt2->contents + htab->srelplt2->size)
+ {
+ Elf_Internal_Rela rel;
+
+ bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_MIPS_32);
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+ }
+}
+
+/* Install the PLT header for a VxWorks shared library. */
+
+static void
+mips_vxworks_finish_shared_plt (bfd *output_bfd, struct bfd_link_info *info)
+{
+ unsigned int i;
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+
+ /* We just need to copy the entry byte-by-byte. */
+ for (i = 0; i < ARRAY_SIZE (mips_vxworks_shared_plt0_entry); i++)
+ bfd_put_32 (output_bfd, mips_vxworks_shared_plt0_entry[i],
+ htab->splt->contents + i * 4);
+}
+
/* Finish up the dynamic sections. */
bfd_boolean
@@ -7572,7 +8456,9 @@
asection *sdyn;
asection *sgot;
struct mips_got_info *gg, *g;
+ struct mips_elf_link_hash_table *htab;
+ htab = mips_elf_hash_table (info);
dynobj = elf_hash_table (info)->dynobj;
sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
@@ -7615,11 +8501,14 @@
switch (dyn.d_tag)
{
case DT_RELENT:
- s = mips_elf_rel_dyn_section (dynobj, FALSE);
- BFD_ASSERT (s != NULL);
dyn.d_un.d_val = MIPS_ELF_REL_SIZE (dynobj);
break;
+ case DT_RELAENT:
+ BFD_ASSERT (htab->is_vxworks);
+ dyn.d_un.d_val = MIPS_ELF_RELA_SIZE (dynobj);
+ break;
+
case DT_STRSZ:
/* Rewrite DT_STRSZ. */
dyn.d_un.d_val =
@@ -7628,9 +8517,20 @@
case DT_PLTGOT:
name = ".got";
- s = bfd_get_section_by_name (output_bfd, name);
- BFD_ASSERT (s != NULL);
- dyn.d_un.d_ptr = s->vma;
+ if (htab->is_vxworks)
+ {
+ /* _GLOBAL_OFFSET_TABLE_ is defined to be the beginning
+ of the ".got" section in DYNOBJ. */
+ s = bfd_get_section_by_name (dynobj, name);
+ BFD_ASSERT (s != NULL);
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
+ }
+ else
+ {
+ s = bfd_get_section_by_name (output_bfd, name);
+ BFD_ASSERT (s != NULL);
+ dyn.d_un.d_ptr = s->vma;
+ }
break;
case DT_MIPS_RLD_VERSION:
@@ -7696,7 +8596,7 @@
break;
case DT_MIPS_HIPAGENO:
- dyn.d_un.d_val = g->local_gotno - MIPS_RESERVED_GOTNO;
+ dyn.d_un.d_val = g->local_gotno - MIPS_RESERVED_GOTNO (info);
break;
case DT_MIPS_RLD_MAP:
@@ -7709,6 +8609,29 @@
dyn.d_un.d_ptr = s->vma;
break;
+ case DT_RELASZ:
+ BFD_ASSERT (htab->is_vxworks);
+ /* The count does not include the JUMP_SLOT relocations. */
+ if (htab->srelplt)
+ dyn.d_un.d_val -= htab->srelplt->size;
+ break;
+
+ case DT_PLTREL:
+ BFD_ASSERT (htab->is_vxworks);
+ dyn.d_un.d_val = DT_RELA;
+ break;
+
+ case DT_PLTRELSZ:
+ BFD_ASSERT (htab->is_vxworks);
+ dyn.d_un.d_val = htab->srelplt->size;
+ break;
+
+ case DT_JMPREL:
+ BFD_ASSERT (htab->is_vxworks);
+ dyn.d_un.d_val = (htab->srelplt->output_section->vma
+ + htab->srelplt->output_offset);
+ break;
+
default:
swap_out_p = FALSE;
break;
@@ -7720,14 +8643,33 @@
}
}
- /* The first entry of the global offset table will be filled at
- runtime. The second entry will be used by some runtime loaders.
- This isn't the case of IRIX rld. */
if (sgot != NULL && sgot->size > 0)
{
- MIPS_ELF_PUT_WORD (output_bfd, 0, sgot->contents);
- MIPS_ELF_PUT_WORD (output_bfd, 0x80000000,
- sgot->contents + MIPS_ELF_GOT_SIZE (output_bfd));
+ if (htab->is_vxworks)
+ {
+ /* The first entry of the global offset table points to the
+ ".dynamic" section. The second is initialized by the
+ loader and contains the shared library identifier.
+ The third is also initialized by the loader and points
+ to the lazy resolution stub. */
+ MIPS_ELF_PUT_WORD (output_bfd,
+ sdyn->output_offset + sdyn->output_section->vma,
+ sgot->contents);
+ MIPS_ELF_PUT_WORD (output_bfd, 0,
+ sgot->contents + MIPS_ELF_GOT_SIZE (output_bfd));
+ MIPS_ELF_PUT_WORD (output_bfd, 0,
+ sgot->contents
+ + 2 * MIPS_ELF_GOT_SIZE (output_bfd));
+ }
+ else
+ {
+ /* The first entry of the global offset table will be filled at
+ runtime. The second entry will be used by some runtime loaders.
+ This isn't the case of IRIX rld. */
+ MIPS_ELF_PUT_WORD (output_bfd, (bfd_vma) 0, sgot->contents);
+ MIPS_ELF_PUT_WORD (output_bfd, (bfd_vma) 0x80000000,
+ sgot->contents + MIPS_ELF_GOT_SIZE (output_bfd));
+ }
}
if (sgot != NULL)
@@ -7801,7 +8743,7 @@
decided not to make. This is for the n64 irix rld,
which doesn't seem to apply any relocations if there
are trailing null entries. */
- s = mips_elf_rel_dyn_section (dynobj, FALSE);
+ s = mips_elf_rel_dyn_section (info, FALSE);
dyn.d_un.d_val = (s->reloc_count
* (ABI_64_P (output_bfd)
? sizeof (Elf64_Mips_External_Rel)
@@ -7855,24 +8797,37 @@
}
}
- /* We need to sort the entries of the dynamic relocation section. */
-
- s = mips_elf_rel_dyn_section (dynobj, FALSE);
-
- if (s != NULL
- && s->size > (bfd_vma)2 * MIPS_ELF_REL_SIZE (output_bfd))
+ /* The psABI says that the dynamic relocations must be sorted in
+ increasing order of r_symndx. The VxWorks EABI doesn't require
+ this, and because the code below handles REL rather than RELA
+ relocations, using it for VxWorks would be outright harmful. */
+ if (!htab->is_vxworks)
{
- reldyn_sorting_bfd = output_bfd;
+ s = mips_elf_rel_dyn_section (info, FALSE);
+ if (s != NULL
+ && s->size > (bfd_vma)2 * MIPS_ELF_REL_SIZE (output_bfd))
+ {
+ reldyn_sorting_bfd = output_bfd;
- if (ABI_64_P (output_bfd))
- qsort ((Elf64_External_Rel *) s->contents + 1, s->reloc_count - 1,
- sizeof (Elf64_Mips_External_Rel), sort_dynamic_relocs_64);
- else
- qsort ((Elf32_External_Rel *) s->contents + 1, s->reloc_count - 1,
- sizeof (Elf32_External_Rel), sort_dynamic_relocs);
+ if (ABI_64_P (output_bfd))
+ qsort ((Elf64_External_Rel *) s->contents + 1,
+ s->reloc_count - 1, sizeof (Elf64_Mips_External_Rel),
+ sort_dynamic_relocs_64);
+ else
+ qsort ((Elf32_External_Rel *) s->contents + 1,
+ s->reloc_count - 1, sizeof (Elf32_External_Rel),
+ sort_dynamic_relocs);
+ }
}
}
+ if (htab->is_vxworks && htab->splt->size > 0)
+ {
+ if (info->shared)
+ mips_vxworks_finish_shared_plt (output_bfd, info);
+ else
+ mips_vxworks_finish_exec_plt (output_bfd, info);
+ }
return TRUE;
}
@@ -8852,7 +9807,7 @@
input_section, relocatable,
data, gp);
else
- r = bfd_perform_relocation (input_bfd, *parent, data,
+ r = bfd_perform_relocation (input_bfd, *parent, data,
input_section,
relocatable ? abfd : NULL,
&error_message);
@@ -8922,8 +9877,9 @@
if (ret == NULL)
return NULL;
- if (! _bfd_elf_link_hash_table_init (&ret->root, abfd,
- mips_elf_link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
+ mips_elf_link_hash_newfunc,
+ sizeof (struct mips_elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -8939,9 +9895,36 @@
ret->use_rld_obj_head = FALSE;
ret->rld_value = 0;
ret->mips16_stubs_seen = FALSE;
+ ret->is_vxworks = FALSE;
+ ret->srelbss = NULL;
+ ret->sdynbss = NULL;
+ ret->srelplt = NULL;
+ ret->srelplt2 = NULL;
+ ret->sgotplt = NULL;
+ ret->splt = NULL;
+ ret->plt_header_size = 0;
+ ret->plt_entry_size = 0;
return &ret->root.root;
}
+
+/* Likewise, but indicate that the target is VxWorks. */
+
+struct bfd_link_hash_table *
+_bfd_mips_vxworks_link_hash_table_create (bfd *abfd)
+{
+ struct bfd_link_hash_table *ret;
+
+ ret = _bfd_mips_elf_link_hash_table_create (abfd);
+ if (ret)
+ {
+ struct mips_elf_link_hash_table *htab;
+
+ htab = (struct mips_elf_link_hash_table *) ret;
+ htab->is_vxworks = 1;
+ }
+ return ret;
+}
/* We need to use a special link routine to handle the .reginfo and
the .mdebug sections. We need to merge all instances of these
@@ -8964,6 +9947,7 @@
EXTR esym;
unsigned int i;
bfd_size_type amt;
+ struct mips_elf_link_hash_table *htab;
static const char * const secname[] =
{
@@ -8980,6 +9964,7 @@
generic size_dynamic_sections renumbered them out from under us.
Rather than trying somehow to prevent the renumbering, just do
the sort again. */
+ htab = mips_elf_hash_table (info);
if (elf_hash_table (info)->dynamic_sections_created)
{
bfd *dynobj;
@@ -9005,7 +9990,7 @@
&& !(*bed->elf_backend_omit_section_dynsym) (abfd, info, p))
++ dynsecsymcount;
}
-
+
if (! mips_elf_sort_hash_table (info, dynsecsymcount + 1))
return FALSE;
@@ -9030,6 +10015,14 @@
elf_gp (abfd) = (h->u.def.value
+ h->u.def.section->output_section->vma
+ h->u.def.section->output_offset);
+ else if (htab->is_vxworks
+ && (h = bfd_link_hash_lookup (info->hash,
+ "_GLOBAL_OFFSET_TABLE_",
+ FALSE, FALSE, TRUE))
+ && h->type == bfd_link_hash_defined)
+ elf_gp (abfd) = (h->u.def.section->output_section->vma
+ + h->u.def.section->output_offset
+ + h->u.def.value);
else if (info->relocatable)
{
bfd_vma lo = MINUS_ONE;
@@ -9041,7 +10034,7 @@
lo = o->vma;
/* And calculate GP relative to that. */
- elf_gp (abfd) = lo + ELF_MIPS_GP_OFFSET (abfd);
+ elf_gp (abfd) = lo + ELF_MIPS_GP_OFFSET (info);
}
else
{
@@ -9773,6 +10766,12 @@
new_flags &= ~EF_MIPS_UCODE;
old_flags &= ~EF_MIPS_UCODE;
+ /* Don't care about the PIC flags from dynamic objects; they are
+ PIC by design. */
+ if ((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0
+ && (ibfd->flags & DYNAMIC) != 0)
+ new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
+
if (new_flags == old_flags)
return TRUE;
@@ -10012,3 +11011,11 @@
&& ELF_MIPS_IS_OPTIONAL (isym->st_other))
h->other |= STO_OPTIONAL;
}
+
+/* Decide whether an undefined symbol is special and can be ignored.
+ This is the case for OPTIONAL symbols on IRIX. */
+bfd_boolean
+_bfd_mips_elf_ignore_undef_symbol (struct elf_link_hash_entry *h)
+{
+ return ELF_MIPS_IS_OPTIONAL (h->other) ? TRUE : FALSE;
+}
Modified: branches/binutils/package/bfd/elfxx-mips.h
===================================================================
--- branches/binutils/package/bfd/elfxx-mips.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-mips.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -48,6 +48,8 @@
(bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
extern bfd_boolean _bfd_mips_elf_adjust_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
+extern bfd_boolean _bfd_mips_vxworks_adjust_dynamic_symbol
+ (struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_mips_elf_always_size_sections
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_size_dynamic_sections
@@ -58,6 +60,9 @@
extern bfd_boolean _bfd_mips_elf_finish_dynamic_symbol
(bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
Elf_Internal_Sym *);
+extern bfd_boolean _bfd_mips_vxworks_finish_dynamic_symbol
+ (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
+ Elf_Internal_Sym *);
extern bfd_boolean _bfd_mips_elf_finish_dynamic_sections
(bfd *, struct bfd_link_info *);
extern void _bfd_mips_elf_final_write_processing
@@ -90,6 +95,8 @@
bfd_byte *, bfd_boolean, asymbol **);
extern struct bfd_link_hash_table *_bfd_mips_elf_link_hash_table_create
(bfd *);
+extern struct bfd_link_hash_table *_bfd_mips_vxworks_link_hash_table_create
+ (bfd *);
extern bfd_boolean _bfd_mips_elf_final_link
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_merge_private_bfd_data
@@ -129,6 +136,8 @@
(bfd_vma, int);
extern void _bfd_mips_elf_merge_symbol_attribute
(struct elf_link_hash_entry *, const Elf_Internal_Sym *, bfd_boolean, bfd_boolean);
+extern bfd_boolean _bfd_mips_elf_ignore_undef_symbol
+ (struct elf_link_hash_entry *);
extern const struct bfd_elf_special_section _bfd_mips_elf_special_sections [];
@@ -137,3 +146,4 @@
#define elf_backend_special_sections _bfd_mips_elf_special_sections
#define elf_backend_eh_frame_address_size _bfd_mips_elf_eh_frame_address_size
#define elf_backend_merge_symbol_attribute _bfd_mips_elf_merge_symbol_attribute
+#define elf_backend_ignore_undef_symbol _bfd_mips_elf_ignore_undef_symbol
Modified: branches/binutils/package/bfd/elfxx-sparc.c
===================================================================
--- branches/binutils/package/bfd/elfxx-sparc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-sparc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* SPARC-specific support for ELF
- Copyright 2005 Free Software Foundation, Inc.
+ Copyright 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -23,10 +23,12 @@
#include "sysdep.h"
#include "bfdlink.h"
#include "libbfd.h"
+#include "libiberty.h"
#include "elf-bfd.h"
#include "elf/sparc.h"
#include "opcode/sparc.h"
#include "elfxx-sparc.h"
+#include "elf-vxworks.h"
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define MINUS_ONE (~ (bfd_vma) 0)
@@ -697,6 +699,50 @@
return index - 4;
}
+/* The format of the first PLT entry in a VxWorks executable. */
+static const bfd_vma sparc_vxworks_exec_plt0_entry[] =
+ {
+ 0x05000000, /* sethi %hi(_GLOBAL_OFFSET_TABLE_+8), %g2 */
+ 0x8410a000, /* or %g2, %lo(_GLOBAL_OFFSET_TABLE_+8), %g2 */
+ 0xc4008000, /* ld [ %g2 ], %g2 */
+ 0x81c08000, /* jmp %g2 */
+ 0x01000000 /* nop */
+ };
+
+/* The format of subsequent PLT entries. */
+static const bfd_vma sparc_vxworks_exec_plt_entry[] =
+ {
+ 0x03000000, /* sethi %hi(_GLOBAL_OFFSET_TABLE_+f at got), %g1 */
+ 0x82106000, /* or %g1, %lo(_GLOBAL_OFFSET_TABLE_+f at got), %g1 */
+ 0xc2004000, /* ld [ %g1 ], %g1 */
+ 0x81c04000, /* jmp %g1 */
+ 0x01000000, /* nop */
+ 0x03000000, /* sethi %hi(f at pltindex), %g1 */
+ 0x10800000, /* b _PLT_resolve */
+ 0x82106000 /* or %g1, %lo(f at pltindex), %g1 */
+ };
+
+/* The format of the first PLT entry in a VxWorks shared object. */
+static const bfd_vma sparc_vxworks_shared_plt0_entry[] =
+ {
+ 0xc405e008, /* ld [ %l7 + 8 ], %g2 */
+ 0x81c08000, /* jmp %g2 */
+ 0x01000000 /* nop */
+ };
+
+/* The format of subsequent PLT entries. */
+static const bfd_vma sparc_vxworks_shared_plt_entry[] =
+ {
+ 0x03000000, /* sethi %hi(f at got), %g1 */
+ 0x82106000, /* or %g1, %lo(f at got), %g1 */
+ 0xc205c001, /* ld [ %l7 + %g1 ], %g1 */
+ 0x81c04000, /* jmp %g1 */
+ 0x01000000, /* nop */
+ 0x03000000, /* sethi %hi(f at pltindex), %g1 */
+ 0x10800000, /* b _PLT_resolve */
+ 0x82106000 /* or %g1, %lo(f at pltindex), %g1 */
+ };
+
#define SPARC_ELF_PUT_WORD(htab, bfd, val, ptr) \
htab->put_word(bfd, val, ptr)
@@ -781,7 +827,6 @@
ret->append_rela = sparc_elf_append_rela_64;
ret->r_info = sparc_elf_r_info_64;
ret->r_symndx = sparc_elf_r_symndx_64;
- ret->build_plt_entry = sparc64_plt_entry_build;
ret->dtpoff_reloc = R_SPARC_TLS_DTPOFF64;
ret->dtpmod_reloc = R_SPARC_TLS_DTPMOD64;
ret->tpoff_reloc = R_SPARC_TLS_TPOFF64;
@@ -798,7 +843,6 @@
ret->append_rela = sparc_elf_append_rela_32;
ret->r_info = sparc_elf_r_info_32;
ret->r_symndx = sparc_elf_r_symndx_32;
- ret->build_plt_entry = sparc32_plt_entry_build;
ret->dtpoff_reloc = R_SPARC_TLS_DTPOFF32;
ret->dtpmod_reloc = R_SPARC_TLS_DTPMOD32;
ret->tpoff_reloc = R_SPARC_TLS_TPOFF32;
@@ -810,7 +854,8 @@
ret->dynamic_interpreter_size = sizeof ELF32_DYNAMIC_INTERPRETER;
}
- if (! _bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc))
+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
+ sizeof (struct _bfd_sparc_elf_link_hash_entry)))
{
free (ret);
return NULL;
@@ -845,6 +890,14 @@
|| ! bfd_set_section_alignment (dynobj, htab->srelgot,
htab->word_align_power))
return FALSE;
+
+ if (htab->is_vxworks)
+ {
+ htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
+ if (!htab->sgotplt)
+ return FALSE;
+ }
+
return TRUE;
}
@@ -871,6 +924,41 @@
if (!info->shared)
htab->srelbss = bfd_get_section_by_name (dynobj, ".rela.bss");
+ if (htab->is_vxworks)
+ {
+ if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
+ return FALSE;
+ if (info->shared)
+ {
+ htab->plt_header_size
+ = 4 * ARRAY_SIZE (sparc_vxworks_shared_plt0_entry);
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (sparc_vxworks_shared_plt_entry);
+ }
+ else
+ {
+ htab->plt_header_size
+ = 4 * ARRAY_SIZE (sparc_vxworks_exec_plt0_entry);
+ htab->plt_entry_size
+ = 4 * ARRAY_SIZE (sparc_vxworks_exec_plt_entry);
+ }
+ }
+ else
+ {
+ if (ABI_64_P (dynobj))
+ {
+ htab->build_plt_entry = sparc64_plt_entry_build;
+ htab->plt_header_size = PLT64_HEADER_SIZE;
+ htab->plt_entry_size = PLT64_ENTRY_SIZE;
+ }
+ else
+ {
+ htab->build_plt_entry = sparc32_plt_entry_build;
+ htab->plt_header_size = PLT32_HEADER_SIZE;
+ htab->plt_entry_size = PLT32_ENTRY_SIZE;
+ }
+ }
+
if (!htab->splt || !htab->srelplt || !htab->sdynbss
|| (!info->shared && !htab->srelbss))
abort ();
@@ -1806,11 +1894,16 @@
{
asection *s = htab->splt;
- /* The first four entries in .plt is reserved. */
+ /* Allocate room for the header. */
if (s->size == 0)
- s->size = (SPARC_ELF_WORD_BYTES(htab) == 8 ?
- PLT64_HEADER_SIZE : PLT32_HEADER_SIZE);
+ {
+ s->size = htab->plt_header_size;
+ /* Allocate space for the .rela.plt.unloaded relocations. */
+ if (htab->is_vxworks && !info->shared)
+ htab->srelplt2->size = sizeof (Elf32_External_Rela) * 2;
+ }
+
/* The procedure linkage table size is bounded by the magnitude
of the offset we can describe in the entry. */
if (s->size >= (SPARC_ELF_WORD_BYTES(htab) == 8 ?
@@ -1846,11 +1939,20 @@
}
/* Make room for this entry. */
- s->size += (SPARC_ELF_WORD_BYTES(htab) == 8 ?
- PLT64_ENTRY_SIZE : PLT32_ENTRY_SIZE);
+ s->size += htab->plt_entry_size;
/* We also need to make an entry in the .rela.plt section. */
htab->srelplt->size += SPARC_ELF_RELA_BYTES (htab);
+
+ if (htab->is_vxworks)
+ {
+ /* Allocate space for the .got.plt entry. */
+ htab->sgotplt->size += 4;
+
+ /* ...and for the .rela.plt.unloaded relocations. */
+ if (!info->shared)
+ htab->srelplt2->size += sizeof (Elf32_External_Rela) * 3;
+ }
}
else
{
@@ -1935,6 +2037,24 @@
pp = &p->next;
}
}
+
+ /* Also discard relocs on undefined weak syms with non-default
+ visibility. */
+ if (eh->dyn_relocs != NULL
+ && h->root.type == bfd_link_hash_undefweak)
+ {
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ eh->dyn_relocs = NULL;
+
+ /* Make sure undefined weak symbols are output as a dynamic
+ symbol in PIEs. */
+ else if (h->dynindx == -1
+ && !h->forced_local)
+ {
+ if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+ }
+ }
}
else
{
@@ -2134,6 +2254,7 @@
elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info);
if (! ABI_64_P (output_bfd)
+ && !htab->is_vxworks
&& elf_hash_table (info)->dynamic_sections_created)
{
/* Make space for the trailing nop in .plt. */
@@ -2160,7 +2281,8 @@
if (s == htab->splt
|| s == htab->sgot
- || s == htab->sdynbss)
+ || s == htab->sdynbss
+ || s == htab->sgotplt)
{
/* Strip this section if we don't need it; see the
comment below. */
@@ -3357,8 +3479,34 @@
{
const char *name;
+ /* The Solaris native linker silently disregards overflows.
+ We don't, but this breaks stabs debugging info, whose
+ relocations are only 32-bits wide. Ignore overflows in
+ this case and also for discarded entries. */
+ if ((r_type == R_SPARC_32 || r_type == R_SPARC_DISP32)
+ && (((input_section->flags & SEC_DEBUGGING) != 0
+ && strcmp (bfd_section_name (input_bfd,
+ input_section),
+ ".stab") == 0)
+ || _bfd_elf_section_offset (output_bfd, info,
+ input_section,
+ rel->r_offset)
+ == (bfd_vma)-1))
+ break;
+
if (h != NULL)
- name = NULL;
+ {
+ /* Assume this is a call protected by other code that
+ detect the symbol is undefined. If this is the case,
+ we can safely ignore the overflow. If not, the
+ program is hosed anyway, and a little warning isn't
+ going to help. */
+ if (h->root.type == bfd_link_hash_undefweak
+ && howto->pc_relative)
+ break;
+
+ name = NULL;
+ }
else
{
name = bfd_elf_string_from_elf_section (input_bfd,
@@ -3383,6 +3531,97 @@
return TRUE;
}
+/* Build a VxWorks PLT entry. PLT_INDEX is the index of the PLT entry
+ and PLT_OFFSET is the byte offset from the start of .plt. GOT_OFFSET
+ is the offset of the associated .got.plt entry from
+ _GLOBAL_OFFSET_TABLE_. */
+
+static void
+sparc_vxworks_build_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
+ bfd_vma plt_offset, bfd_vma plt_index,
+ bfd_vma got_offset)
+{
+ bfd_vma got_base;
+ const bfd_vma *plt_entry;
+ struct _bfd_sparc_elf_link_hash_table *htab;
+ bfd_byte *loc;
+ Elf_Internal_Rela rela;
+
+ htab = _bfd_sparc_elf_hash_table (info);
+ if (info->shared)
+ {
+ plt_entry = sparc_vxworks_shared_plt_entry;
+ got_base = 0;
+ }
+ else
+ {
+ plt_entry = sparc_vxworks_exec_plt_entry;
+ got_base = (htab->elf.hgot->root.u.def.value
+ + htab->elf.hgot->root.u.def.section->output_offset
+ + htab->elf.hgot->root.u.def.section->output_section->vma);
+ }
+
+ /* Fill in the entry in the procedure linkage table. */
+ bfd_put_32 (output_bfd, plt_entry[0] + ((got_base + got_offset) >> 10),
+ htab->splt->contents + plt_offset);
+ bfd_put_32 (output_bfd, plt_entry[1] + ((got_base + got_offset) & 0x3ff),
+ htab->splt->contents + plt_offset + 4);
+ bfd_put_32 (output_bfd, plt_entry[2],
+ htab->splt->contents + plt_offset + 8);
+ bfd_put_32 (output_bfd, plt_entry[3],
+ htab->splt->contents + plt_offset + 12);
+ bfd_put_32 (output_bfd, plt_entry[4],
+ htab->splt->contents + plt_offset + 16);
+ bfd_put_32 (output_bfd, plt_entry[5] + (plt_index >> 10),
+ htab->splt->contents + plt_offset + 20);
+ /* PC-relative displacement for a branch to the start of
+ the PLT section. */
+ bfd_put_32 (output_bfd, plt_entry[6] + (((-plt_offset - 24) >> 2)
+ & 0x003fffff),
+ htab->splt->contents + plt_offset + 24);
+ bfd_put_32 (output_bfd, plt_entry[7] + (plt_index & 0x3ff),
+ htab->splt->contents + plt_offset + 28);
+
+ /* Fill in the .got.plt entry, pointing initially at the
+ second half of the PLT entry. */
+ BFD_ASSERT (htab->sgotplt != NULL);
+ bfd_put_32 (output_bfd,
+ htab->splt->output_section->vma
+ + htab->splt->output_offset
+ + plt_offset + 20,
+ htab->sgotplt->contents + got_offset);
+
+ /* Add relocations to .rela.plt.unloaded. */
+ if (!info->shared)
+ {
+ loc = (htab->srelplt2->contents
+ + (2 + 3 * plt_index) * sizeof (Elf32_External_Rela));
+
+ /* Relocate the initial sethi. */
+ rela.r_offset = (htab->splt->output_section->vma
+ + htab->splt->output_offset
+ + plt_offset);
+ rela.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_HI22);
+ rela.r_addend = got_offset;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Likewise the following or. */
+ rela.r_offset += 4;
+ rela.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_LO10);
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Relocate the .got.plt entry. */
+ rela.r_offset = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + got_offset);
+ rela.r_info = ELF32_R_INFO (htab->elf.hplt->indx, R_SPARC_32);
+ rela.r_addend = plt_offset + 20;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ }
+}
+
/* Finish up dynamic symbol handling. We set the contents of various
dynamic sections here. */
@@ -3404,7 +3643,7 @@
asection *srela;
Elf_Internal_Rela rela;
bfd_byte *loc;
- bfd_vma r_offset;
+ bfd_vma r_offset, got_offset;
int rela_index;
/* This symbol has an entry in the PLT. Set it up. */
@@ -3415,23 +3654,48 @@
srela = htab->srelplt;
BFD_ASSERT (splt != NULL && srela != NULL);
- /* Fill in the entry in the procedure linkage table. */
- rela_index = SPARC_ELF_BUILD_PLT_ENTRY (htab, output_bfd, splt,
- h->plt.offset, splt->size,
- &r_offset);
-
/* Fill in the entry in the .rela.plt section. */
- rela.r_offset = r_offset
- + (splt->output_section->vma + splt->output_offset);
- if (! ABI_64_P (output_bfd)
- || h->plt.offset < (PLT64_LARGE_THRESHOLD * PLT64_ENTRY_SIZE))
+ if (htab->is_vxworks)
{
+ /* Work out the index of this PLT entry. */
+ rela_index = ((h->plt.offset - htab->plt_header_size)
+ / htab->plt_entry_size);
+
+ /* Calculate the offset of the associated .got.plt entry.
+ The first three entries are reserved. */
+ got_offset = (rela_index + 3) * 4;
+
+ sparc_vxworks_build_plt_entry (output_bfd, info, h->plt.offset,
+ rela_index, got_offset);
+
+
+ /* On VxWorks, the relocation points to the .got.plt entry,
+ not the .plt entry. */
+ rela.r_offset = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + got_offset);
rela.r_addend = 0;
}
else
{
- rela.r_addend = -(h->plt.offset + 4)
- -(splt->output_section->vma + splt->output_offset);
+ /* Fill in the entry in the procedure linkage table. */
+ rela_index = SPARC_ELF_BUILD_PLT_ENTRY (htab, output_bfd, splt,
+ h->plt.offset, splt->size,
+ &r_offset);
+
+ rela.r_offset = r_offset
+ + (splt->output_section->vma + splt->output_offset);
+ if (! ABI_64_P (output_bfd)
+ || h->plt.offset < (PLT64_LARGE_THRESHOLD * PLT64_ENTRY_SIZE))
+ {
+ rela.r_addend = 0;
+ }
+ else
+ {
+ rela.r_addend = (-(h->plt.offset + 4)
+ - splt->output_section->vma
+ - splt->output_offset);
+ }
}
rela.r_info = SPARC_ELF_R_INFO (htab, NULL, h->dynindx, R_SPARC_JMP_SLOT);
@@ -3532,10 +3796,12 @@
SPARC_ELF_APPEND_RELA (htab, output_bfd, s, &rela);
}
- /* Mark some specially defined symbols as absolute. */
+ /* Mark some specially defined symbols as absolute. On VxWorks,
+ _GLOBAL_OFFSET_TABLE_ is not absolute: it is relative to the
+ ".got" section. Likewise _PROCEDURE_LINKAGE_TABLE_ and ".plt". */
if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0
- || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0)
+ || (!htab->is_vxworks
+ && (h == htab->elf.hgot || h == htab->elf.hplt)))
sym->st_shndx = SHN_ABS;
return TRUE;
@@ -3603,13 +3869,14 @@
#endif
static bfd_boolean
-sparc32_finish_dyn (bfd *output_bfd,
- struct bfd_link_info *info ATTRIBUTE_UNUSED,
+sparc32_finish_dyn (bfd *output_bfd, struct bfd_link_info *info,
bfd *dynobj, asection *sdyn,
asection *splt ATTRIBUTE_UNUSED)
{
Elf32_External_Dyn *dyncon, *dynconend;
+ struct _bfd_sparc_elf_link_hash_table *htab;
+ htab = _bfd_sparc_elf_hash_table (info);
dyncon = (Elf32_External_Dyn *) sdyn->contents;
dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
for (; dyncon < dynconend; dyncon++)
@@ -3620,34 +3887,150 @@
bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
- switch (dyn.d_tag)
+ if (htab->is_vxworks && dyn.d_tag == DT_RELASZ)
{
- case DT_PLTGOT: name = ".plt"; size = FALSE; break;
- case DT_PLTRELSZ: name = ".rela.plt"; size = TRUE; break;
- case DT_JMPREL: name = ".rela.plt"; size = FALSE; break;
- default: name = NULL; size = FALSE; break;
+ /* On VxWorks, DT_RELASZ should not include the relocations
+ in .rela.plt. */
+ if (htab->srelplt)
+ {
+ dyn.d_un.d_val -= htab->srelplt->size;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ }
}
-
- if (name != NULL)
+ else if (htab->is_vxworks && dyn.d_tag == DT_PLTGOT)
{
- asection *s;
+ /* On VxWorks, DT_PLTGOT should point to the start of the GOT,
+ not to the start of the PLT. */
+ if (htab->sgotplt)
+ {
+ dyn.d_un.d_val = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset);
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ }
+ }
+ else
+ {
+ switch (dyn.d_tag)
+ {
+ case DT_PLTGOT: name = ".plt"; size = FALSE; break;
+ case DT_PLTRELSZ: name = ".rela.plt"; size = TRUE; break;
+ case DT_JMPREL: name = ".rela.plt"; size = FALSE; break;
+ default: name = NULL; size = FALSE; break;
+ }
- s = bfd_get_section_by_name (output_bfd, name);
- if (s == NULL)
- dyn.d_un.d_val = 0;
- else
+ if (name != NULL)
{
- if (! size)
- dyn.d_un.d_ptr = s->vma;
+ asection *s;
+
+ s = bfd_get_section_by_name (output_bfd, name);
+ if (s == NULL)
+ dyn.d_un.d_val = 0;
else
- dyn.d_un.d_val = s->size;
+ {
+ if (! size)
+ dyn.d_un.d_ptr = s->vma;
+ else
+ dyn.d_un.d_val = s->size;
+ }
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
}
- bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
}
}
return TRUE;
}
+/* Install the first PLT entry in a VxWorks executable and make sure that
+ .rela.plt.unloaded relocations have the correct symbol indexes. */
+
+static void
+sparc_vxworks_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info)
+{
+ struct _bfd_sparc_elf_link_hash_table *htab;
+ Elf_Internal_Rela rela;
+ bfd_vma got_base;
+ bfd_byte *loc;
+
+ htab = _bfd_sparc_elf_hash_table (info);
+
+ /* Calculate the absolute value of _GLOBAL_OFFSET_TABLE_. */
+ got_base = (htab->elf.hgot->root.u.def.section->output_section->vma
+ + htab->elf.hgot->root.u.def.section->output_offset
+ + htab->elf.hgot->root.u.def.value);
+
+ /* Install the initial PLT entry. */
+ bfd_put_32 (output_bfd,
+ sparc_vxworks_exec_plt0_entry[0] + ((got_base + 8) >> 10),
+ htab->splt->contents);
+ bfd_put_32 (output_bfd,
+ sparc_vxworks_exec_plt0_entry[1] + ((got_base + 8) & 0x3ff),
+ htab->splt->contents + 4);
+ bfd_put_32 (output_bfd,
+ sparc_vxworks_exec_plt0_entry[2],
+ htab->splt->contents + 8);
+ bfd_put_32 (output_bfd,
+ sparc_vxworks_exec_plt0_entry[3],
+ htab->splt->contents + 12);
+ bfd_put_32 (output_bfd,
+ sparc_vxworks_exec_plt0_entry[4],
+ htab->splt->contents + 16);
+
+ loc = htab->srelplt2->contents;
+
+ /* Add an unloaded relocation for the initial entry's "sethi". */
+ rela.r_offset = (htab->splt->output_section->vma
+ + htab->splt->output_offset);
+ rela.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_HI22);
+ rela.r_addend = 8;
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Likewise the following "or". */
+ rela.r_offset += 4;
+ rela.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_LO10);
+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* Fix up the remaining .rela.plt.unloaded relocations. They may have
+ the wrong symbol index for _G_O_T_ or _P_L_T_ depending on the order
+ in which symbols were output. */
+ while (loc < htab->srelplt2->contents + htab->srelplt2->size)
+ {
+ Elf_Internal_Rela rel;
+
+ /* The entry's initial "sethi" (against _G_O_T_). */
+ bfd_elf32_swap_reloc_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_HI22);
+ bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* The following "or" (also against _G_O_T_). */
+ bfd_elf32_swap_reloc_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->elf.hgot->indx, R_SPARC_LO10);
+ bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+
+ /* The .got.plt entry (against _P_L_T_). */
+ bfd_elf32_swap_reloc_in (output_bfd, loc, &rel);
+ rel.r_info = ELF32_R_INFO (htab->elf.hplt->indx, R_SPARC_32);
+ bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
+ loc += sizeof (Elf32_External_Rela);
+ }
+}
+
+/* Install the first PLT entry in a VxWorks shared object. */
+
+static void
+sparc_vxworks_finish_shared_plt (bfd *output_bfd, struct bfd_link_info *info)
+{
+ struct _bfd_sparc_elf_link_hash_table *htab;
+ unsigned int i;
+
+ htab = _bfd_sparc_elf_hash_table (info);
+ for (i = 0; i < ARRAY_SIZE (sparc_vxworks_shared_plt0_entry); i++)
+ bfd_put_32 (output_bfd, sparc_vxworks_shared_plt0_entry[i],
+ htab->splt->contents + i * 4);
+}
+
bfd_boolean
_bfd_sparc_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
{
@@ -3681,18 +4064,24 @@
/* Initialize the contents of the .plt section. */
if (splt->size > 0)
{
- if (ABI_64_P (output_bfd))
- memset (splt->contents, 0, 4 * PLT64_ENTRY_SIZE);
+ if (htab->is_vxworks)
+ {
+ if (info->shared)
+ sparc_vxworks_finish_shared_plt (output_bfd, info);
+ else
+ sparc_vxworks_finish_exec_plt (output_bfd, info);
+ }
else
{
- memset (splt->contents, 0, 4 * PLT32_ENTRY_SIZE);
- bfd_put_32 (output_bfd, (bfd_vma) SPARC_NOP,
- splt->contents + splt->size - 4);
+ memset (splt->contents, 0, htab->plt_header_size);
+ if (!ABI_64_P (output_bfd))
+ bfd_put_32 (output_bfd, (bfd_vma) SPARC_NOP,
+ splt->contents + splt->size - 4);
}
}
- elf_section_data (splt->output_section)->this_hdr.sh_entsize =
- (ABI_64_P (output_bfd) ? PLT64_ENTRY_SIZE : PLT32_ENTRY_SIZE);
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize
+ = htab->plt_entry_size;
}
/* Set the first entry in the global offset table to the address of
Modified: branches/binutils/package/bfd/elfxx-sparc.h
===================================================================
--- branches/binutils/package/bfd/elfxx-sparc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-sparc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -61,6 +61,15 @@
/* Small local sym to section mapping cache. */
struct sym_sec_cache sym_sec;
+ /* True if the target system is VxWorks. */
+ int is_vxworks;
+
+ /* The (unloaded but important) .rela.plt.unloaded section, for VxWorks. */
+ asection *srelplt2;
+
+ /* .got.plt is only used on VxWorks. */
+ asection *sgotplt;
+
void (*put_word) (bfd *, bfd_vma, void *);
void (*append_rela) (bfd *, asection *, Elf_Internal_Rela *);
bfd_vma (*r_info) (Elf_Internal_Rela *, bfd_vma, bfd_vma);
@@ -70,6 +79,8 @@
int dynamic_interpreter_size;
unsigned int word_align_power;
unsigned int align_power_max;
+ unsigned int plt_header_size;
+ unsigned int plt_entry_size;
int bytes_per_word;
int bytes_per_rela;
int dtpoff_reloc;
Modified: branches/binutils/package/bfd/elfxx-target.h
===================================================================
--- branches/binutils/package/bfd/elfxx-target.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/elfxx-target.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Target definitions for NN-bit ELF
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -125,6 +125,9 @@
#ifndef elf_backend_want_got_sym
#define elf_backend_want_got_sym 1
#endif
+#ifndef elf_backend_gc_mark_dynamic_ref
+#define elf_backend_gc_mark_dynamic_ref bfd_elf_gc_mark_dynamic_ref_symbol
+#endif
#ifndef elf_backend_gc_mark_hook
#define elf_backend_gc_mark_hook NULL
#endif
@@ -417,9 +420,15 @@
#ifndef elf_backend_hide_symbol
#define elf_backend_hide_symbol _bfd_elf_link_hash_hide_symbol
#endif
+#ifndef elf_backend_fixup_symbol
+#define elf_backend_fixup_symbol NULL
+#endif
#ifndef elf_backend_merge_symbol_attribute
#define elf_backend_merge_symbol_attribute NULL
#endif
+#ifndef elf_backend_ignore_undef_symbol
+#define elf_backend_ignore_undef_symbol NULL
+#endif
#ifndef elf_backend_emit_relocs
#define elf_backend_emit_relocs _bfd_elf_link_output_relocs
#endif
@@ -584,6 +593,7 @@
elf_backend_final_write_processing,
elf_backend_additional_program_headers,
elf_backend_modify_segment_map,
+ elf_backend_gc_mark_dynamic_ref,
elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook,
elf_backend_post_process_headers,
@@ -591,7 +601,9 @@
elf_backend_output_arch_syms,
elf_backend_copy_indirect_symbol,
elf_backend_hide_symbol,
+ elf_backend_fixup_symbol,
elf_backend_merge_symbol_attribute,
+ elf_backend_ignore_undef_symbol,
elf_backend_emit_relocs,
elf_backend_count_relocs,
elf_backend_grok_prstatus,
Modified: branches/binutils/package/bfd/hash.c
===================================================================
--- branches/binutils/package/bfd/hash.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/hash.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* hash.c -- hash table routines for BFD
- Copyright 1993, 1994, 1995, 1997, 1999, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1993, 1994, 1995, 1997, 1999, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Written by Steve Chamberlain <sac at cygnus.com>
This file is part of BFD, the Binary File Descriptor library.
@@ -308,6 +308,7 @@
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
const char *),
+ unsigned int entsize,
unsigned int size)
{
unsigned int alloc;
@@ -328,6 +329,7 @@
}
memset ((void *) table->table, 0, alloc);
table->size = size;
+ table->entsize = entsize;
table->newfunc = newfunc;
return TRUE;
}
@@ -338,9 +340,11 @@
bfd_hash_table_init (struct bfd_hash_table *table,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
- return bfd_hash_table_init_n (table, newfunc, bfd_default_hash_table_size);
+ return bfd_hash_table_init_n (table, newfunc, entsize,
+ bfd_default_hash_table_size);
}
/* Free a hash table. */
@@ -492,7 +496,7 @@
/* Extend this prime list if you want more granularity of hash table size. */
static const bfd_size_type hash_size_primes[] =
{
- 1021, 4051, 8599, 16699
+ 251, 509, 1021, 2039, 4051, 8599, 16699, 32749
};
size_t index;
@@ -591,7 +595,8 @@
if (table == NULL)
return NULL;
- if (! bfd_hash_table_init (& table->table, strtab_hash_newfunc))
+ if (!bfd_hash_table_init (&table->table, strtab_hash_newfunc,
+ sizeof (struct strtab_hash_entry)))
{
free (table);
return NULL;
Added: branches/binutils/package/bfd/hosts/vaxlinux.h
===================================================================
--- branches/binutils/package/bfd/hosts/vaxlinux.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/hosts/vaxlinux.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,2 @@
+#define TRAD_CORE_EXTRA_SIZE_ALLOWED 4096
+#define HOST_MACHINE_ARCH bfd_arch_vax
Modified: branches/binutils/package/bfd/hppabsd-core.c
===================================================================
--- branches/binutils/package/bfd/hppabsd-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/hppabsd-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -57,8 +57,7 @@
PARAMS ((bfd *));
static int hppabsd_core_core_file_failing_signal
PARAMS ((bfd *));
-static bfd_boolean hppabsd_core_core_file_matches_executable_p
- PARAMS ((bfd *, bfd *));
+#define hppabsd_core_core_file_matches_executable_p generic_core_file_matches_executable_p
static void swap_abort
PARAMS ((void));
@@ -217,14 +216,6 @@
{
return core_signal (abfd);
}
-
-static bfd_boolean
-hppabsd_core_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd, *exec_bfd;
-{
- /* There's no way to know this... */
- return TRUE;
-}
/* If somebody calls any byte-swapping routines, shoot them. */
static void
Modified: branches/binutils/package/bfd/hpux-core.c
===================================================================
--- branches/binutils/package/bfd/hpux-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/hpux-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -101,29 +101,19 @@
#define core_command(bfd) (core_hdr(bfd)->cmd)
#define core_kernel_thread_id(bfd) (core_hdr(bfd)->lwpid)
#define core_user_thread_id(bfd) (core_hdr(bfd)->user_tid)
+#define hpux_core_core_file_matches_executable_p generic_core_file_matches_executable_p
-static asection *make_bfd_asection
- PARAMS ((bfd *, const char *, flagword, bfd_size_type, bfd_vma,
- unsigned int));
-static const bfd_target *hpux_core_core_file_p
- PARAMS ((bfd *));
-static char *hpux_core_core_file_failing_command
- PARAMS ((bfd *));
-static int hpux_core_core_file_failing_signal
- PARAMS ((bfd *));
-static bfd_boolean hpux_core_core_file_matches_executable_p
- PARAMS ((bfd *, bfd *));
-static void swap_abort
- PARAMS ((void));
+static asection *make_bfd_asection (bfd *, const char *, flagword,
+ bfd_size_type, bfd_vma, unsigned int);
+static const bfd_target *hpux_core_core_file_p (bfd *);
+static char *hpux_core_core_file_failing_command (bfd *);
+static int hpux_core_core_file_failing_signal (bfd *);
+static void swap_abort (void);
static asection *
-make_bfd_asection (abfd, name, flags, size, vma, alignment_power)
- bfd *abfd;
- const char *name;
- flagword flags;
- bfd_size_type size;
- bfd_vma vma;
- unsigned int alignment_power;
+make_bfd_asection (bfd *abfd, const char *name, flagword flags,
+ bfd_size_type size, bfd_vma vma,
+ unsigned int alignment_power)
{
asection *asect;
char *newname;
@@ -155,7 +145,7 @@
asection *sect,
void *obj ATTRIBUTE_UNUSED)
{
- return (strncmp (bfd_section_name (abfd, sect), ".reg/", 5) == 0);
+ return (strncmp (sect->name, ".reg/", 5) == 0);
}
/* this function builds a bfd target if the file is a corefile.
@@ -168,8 +158,7 @@
(I am just guessing here!)
*/
static const bfd_target *
-hpux_core_core_file_p (abfd)
- bfd *abfd;
+hpux_core_core_file_p (bfd *abfd)
{
int good_sections = 0;
int unknown_sections = 0;
@@ -361,30 +350,21 @@
}
static char *
-hpux_core_core_file_failing_command (abfd)
- bfd *abfd;
+hpux_core_core_file_failing_command (bfd *abfd)
{
return core_command (abfd);
}
static int
-hpux_core_core_file_failing_signal (abfd)
- bfd *abfd;
+hpux_core_core_file_failing_signal (bfd *abfd)
{
return core_signal (abfd);
}
-static bfd_boolean
-hpux_core_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd ATTRIBUTE_UNUSED;
- bfd *exec_bfd ATTRIBUTE_UNUSED;
-{
- return TRUE; /* FIXME, We have no way of telling at this point */
-}
/* If somebody calls any byte-swapping routines, shoot them. */
static void
-swap_abort ()
+swap_abort (void)
{
abort(); /* This way doesn't require any declaration for ANSI to fuck up */
}
Modified: branches/binutils/package/bfd/i386linux.c
===================================================================
--- branches/binutils/package/bfd/i386linux.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/i386linux.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for linux flavored i386 a.out binaries.
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001, 2002, 2003,
- 2004 Free Software Foundation, Inc.
+ 2004, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -231,8 +231,9 @@
ret = (struct linux_link_hash_table *) bfd_alloc (abfd, amt);
if (ret == (struct linux_link_hash_table *) NULL)
return (struct bfd_link_hash_table *) NULL;
- if (! NAME(aout,link_hash_table_init) (&ret->root, abfd,
- linux_link_hash_newfunc))
+ if (!NAME(aout,link_hash_table_init) (&ret->root, abfd,
+ linux_link_hash_newfunc,
+ sizeof (struct linux_link_hash_entry)))
{
free (ret);
return (struct bfd_link_hash_table *) NULL;
Modified: branches/binutils/package/bfd/ieee.c
===================================================================
--- branches/binutils/package/bfd/ieee.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ieee.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for ieee-695 objects.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Steve Chamberlain of Cygnus Support.
@@ -3466,11 +3466,22 @@
case bfd_mach_m68040: id = "68040"; break;
case bfd_mach_m68060: id = "68060"; break;
case bfd_mach_cpu32: id = "cpu32"; break;
- case bfd_mach_mcf5200:id = "5200"; break;
- case bfd_mach_mcf5206e:id = "5206e"; break;
- case bfd_mach_mcf5307:id = "5307"; break;
- case bfd_mach_mcf5407:id = "5407"; break;
- case bfd_mach_mcf528x:id = "5282"; break;
+ case bfd_mach_mcf_isa_a_nodiv: id = "isa-a:nodiv"; break;
+ case bfd_mach_mcf_isa_a: id = "isa-a"; break;
+ case bfd_mach_mcf_isa_a_mac: id = "isa-a:mac"; break;
+ case bfd_mach_mcf_isa_a_emac: id = "isa-a:emac"; break;
+ case bfd_mach_mcf_isa_aplus: id = "isa-aplus"; break;
+ case bfd_mach_mcf_isa_aplus_mac: id = "isa-aplus:mac"; break;
+ case bfd_mach_mcf_isa_aplus_emac: id = "isa-aplus:mac"; break;
+ case bfd_mach_mcf_isa_b_nousp: id = "isa-b:nousp"; break;
+ case bfd_mach_mcf_isa_b_nousp_mac: id = "isa-b:nousp:mac"; break;
+ case bfd_mach_mcf_isa_b_nousp_emac: id = "isa-b:nousp:emac"; break;
+ case bfd_mach_mcf_isa_b: id = "isa-b"; break;
+ case bfd_mach_mcf_isa_b_mac: id = "isa-b:mac"; break;
+ case bfd_mach_mcf_isa_b_emac: id = "isa-b:emac"; break;
+ case bfd_mach_mcf_isa_b_float: id = "isa-b:float"; break;
+ case bfd_mach_mcf_isa_b_float_mac: id = "isa-b:float:mac"; break;
+ case bfd_mach_mcf_isa_b_float_emac: id = "isa-b:float:emac"; break;
}
if (! ieee_write_id (abfd, id))
Modified: branches/binutils/package/bfd/irix-core.c
===================================================================
--- branches/binutils/package/bfd/irix-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/irix-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -41,6 +41,8 @@
#define core_signal(bfd) (core_hdr(bfd)->sig)
#define core_command(bfd) (core_hdr(bfd)->cmd)
+#define irix_core_core_file_matches_executable_p generic_core_file_matches_executable_p
+
static asection *make_bfd_asection
(bfd *, const char *, flagword, bfd_size_type, bfd_vma, file_ptr);
@@ -262,13 +264,6 @@
return core_signal (abfd);
}
-static bfd_boolean
-irix_core_core_file_matches_executable_p (bfd *core_bfd ATTRIBUTE_UNUSED,
- bfd *exec_bfd ATTRIBUTE_UNUSED)
-{
- return TRUE; /* XXX - FIXME */
-}
-
/* If somebody calls any byte-swapping routines, shoot them. */
static void
swap_abort(void)
Modified: branches/binutils/package/bfd/libaout.h
===================================================================
--- branches/binutils/package/bfd/libaout.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/libaout.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end data structures for a.out (and similar) files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -575,7 +575,8 @@
(struct aout_link_hash_table *, bfd *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
extern struct bfd_link_hash_table * NAME (aout, link_hash_table_create)
(bfd *);
Modified: branches/binutils/package/bfd/libbfd-in.h
===================================================================
--- branches/binutils/package/bfd/libbfd-in.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/libbfd-in.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,7 +2,7 @@
(This include file is not for users of the library.)
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -53,6 +53,12 @@
bfd_byte *buffer;
};
+struct section_hash_entry
+{
+ struct bfd_hash_entry root;
+ asection section;
+};
+
/* tdata for an archive. For an input archive, cache
needs to be free()'d. For an output archive, symdefs do. */
@@ -468,7 +474,8 @@
(struct bfd_link_hash_table *, bfd *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
/* Generic link hash table creation routine. */
extern struct bfd_link_hash_table *_bfd_generic_link_hash_table_create
Modified: branches/binutils/package/bfd/libbfd.h
===================================================================
--- branches/binutils/package/bfd/libbfd.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/libbfd.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -7,7 +7,7 @@
(This include file is not for users of the library.)
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -58,6 +58,12 @@
bfd_byte *buffer;
};
+struct section_hash_entry
+{
+ struct bfd_hash_entry root;
+ asection section;
+};
+
/* tdata for an archive. For an input archive, cache
needs to be free()'d. For an output archive, symdefs do. */
@@ -473,7 +479,8 @@
(struct bfd_link_hash_table *, bfd *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
/* Generic link hash table creation routine. */
extern struct bfd_link_hash_table *_bfd_generic_link_hash_table_create
@@ -965,6 +972,9 @@
"BFD_RELOC_MIPS_TLS_TPREL_HI16",
"BFD_RELOC_MIPS_TLS_TPREL_LO16",
+ "BFD_RELOC_MIPS_COPY",
+ "BFD_RELOC_MIPS_JUMP_SLOT",
+
"BFD_RELOC_FRV_LABEL16",
"BFD_RELOC_FRV_LABEL24",
"BFD_RELOC_FRV_LO16",
@@ -1034,6 +1044,9 @@
"BFD_RELOC_386_TLS_DTPMOD32",
"BFD_RELOC_386_TLS_DTPOFF32",
"BFD_RELOC_386_TLS_TPOFF32",
+ "BFD_RELOC_386_TLS_GOTDESC",
+ "BFD_RELOC_386_TLS_DESC_CALL",
+ "BFD_RELOC_386_TLS_DESC",
"BFD_RELOC_X86_64_GOT32",
"BFD_RELOC_X86_64_PLT32",
"BFD_RELOC_X86_64_COPY",
@@ -1052,6 +1065,14 @@
"BFD_RELOC_X86_64_TPOFF32",
"BFD_RELOC_X86_64_GOTOFF64",
"BFD_RELOC_X86_64_GOTPC32",
+ "BFD_RELOC_X86_64_GOT64",
+ "BFD_RELOC_X86_64_GOTPCREL64",
+ "BFD_RELOC_X86_64_GOTPC64",
+ "BFD_RELOC_X86_64_GOTPLT64",
+ "BFD_RELOC_X86_64_PLTOFF64",
+ "BFD_RELOC_X86_64_GOTPC32_TLSDESC",
+ "BFD_RELOC_X86_64_TLSDESC_CALL",
+ "BFD_RELOC_X86_64_TLSDESC",
"BFD_RELOC_NS32K_IMM_8",
"BFD_RELOC_NS32K_IMM_16",
"BFD_RELOC_NS32K_IMM_32",
@@ -1327,6 +1348,20 @@
"BFD_RELOC_BFIN_12_PCREL_JUMP_S",
"BFD_RELOC_BFIN_24_PCREL_CALL_X",
"BFD_RELOC_BFIN_24_PCREL_JUMP_L",
+ "BFD_RELOC_BFIN_GOT17M4",
+ "BFD_RELOC_BFIN_GOTHI",
+ "BFD_RELOC_BFIN_GOTLO",
+ "BFD_RELOC_BFIN_FUNCDESC",
+ "BFD_RELOC_BFIN_FUNCDESC_GOT17M4",
+ "BFD_RELOC_BFIN_FUNCDESC_GOTHI",
+ "BFD_RELOC_BFIN_FUNCDESC_GOTLO",
+ "BFD_RELOC_BFIN_FUNCDESC_VALUE",
+ "BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4",
+ "BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI",
+ "BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO",
+ "BFD_RELOC_BFIN_GOTOFF17M4",
+ "BFD_RELOC_BFIN_GOTOFFHI",
+ "BFD_RELOC_BFIN_GOTOFFLO",
"BFD_RELOC_BFIN_GOT",
"BFD_RELOC_BFIN_PLTPC",
"BFD_ARELOC_BFIN_PUSH",
@@ -1368,6 +1403,9 @@
"BFD_RELOC_DLX_LO16",
"BFD_RELOC_DLX_JMP26",
"BFD_RELOC_M32C_HI8",
+ "BFD_RELOC_M32C_RL_JUMP",
+ "BFD_RELOC_M32C_RL_1ADDR",
+ "BFD_RELOC_M32C_RL_2ADDR",
"BFD_RELOC_M32R_24",
"BFD_RELOC_M32R_10_PCREL",
"BFD_RELOC_M32R_18_PCREL",
@@ -1465,9 +1503,11 @@
"BFD_RELOC_AVR_LO8_LDI",
"BFD_RELOC_AVR_HI8_LDI",
"BFD_RELOC_AVR_HH8_LDI",
+ "BFD_RELOC_AVR_MS8_LDI",
"BFD_RELOC_AVR_LO8_LDI_NEG",
"BFD_RELOC_AVR_HI8_LDI_NEG",
"BFD_RELOC_AVR_HH8_LDI_NEG",
+ "BFD_RELOC_AVR_MS8_LDI_NEG",
"BFD_RELOC_AVR_LO8_LDI_PM",
"BFD_RELOC_AVR_HI8_LDI_PM",
"BFD_RELOC_AVR_HH8_LDI_PM",
@@ -1756,15 +1796,19 @@
"BFD_RELOC_XSTORMY16_12",
"BFD_RELOC_XSTORMY16_24",
"BFD_RELOC_XSTORMY16_FPTR16",
+ "BFD_RELOC_XC16X_PAG",
+ "BFD_RELOC_XC16X_POF",
+ "BFD_RELOC_XC16X_SEG",
+ "BFD_RELOC_XC16X_SOF",
"BFD_RELOC_VAX_GLOB_DAT",
"BFD_RELOC_VAX_JMP_SLOT",
"BFD_RELOC_VAX_RELATIVE",
- "BFD_RELOC_MS1_PC16",
- "BFD_RELOC_MS1_HI16",
- "BFD_RELOC_MS1_LO16",
- "BFD_RELOC_MS1_GNU_VTINHERIT",
- "BFD_RELOC_MS1_GNU_VTENTRY",
- "BFD_RELOC_MS1_PCINSN8",
+ "BFD_RELOC_MT_PC16",
+ "BFD_RELOC_MT_HI16",
+ "BFD_RELOC_MT_LO16",
+ "BFD_RELOC_MT_GNU_VTINHERIT",
+ "BFD_RELOC_MT_GNU_VTENTRY",
+ "BFD_RELOC_MT_PCINSN8",
"BFD_RELOC_MSP430_10_PCREL",
"BFD_RELOC_MSP430_16_PCREL",
"BFD_RELOC_MSP430_16",
Modified: branches/binutils/package/bfd/libcoff-in.h
===================================================================
--- branches/binutils/package/bfd/libcoff-in.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/libcoff-in.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD COFF object file private structure.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -421,7 +421,8 @@
/* Initialize a COFF debug merge hash table. */
#define coff_debug_merge_hash_table_init(table) \
- (bfd_hash_table_init (&(table)->root, _bfd_coff_debug_merge_hash_newfunc))
+ (bfd_hash_table_init (&(table)->root, _bfd_coff_debug_merge_hash_newfunc, \
+ sizeof (struct coff_debug_merge_hash_entry)))
/* Free a COFF debug merge hash table. */
@@ -537,7 +538,8 @@
(struct coff_link_hash_table *, bfd *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
extern struct bfd_link_hash_table *_bfd_coff_link_hash_table_create
(bfd *);
extern const char *_bfd_coff_internal_syment_name
Modified: branches/binutils/package/bfd/libcoff.h
===================================================================
--- branches/binutils/package/bfd/libcoff.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/libcoff.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,7 +4,7 @@
/* BFD COFF object file private structure.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -425,7 +425,8 @@
/* Initialize a COFF debug merge hash table. */
#define coff_debug_merge_hash_table_init(table) \
- (bfd_hash_table_init (&(table)->root, _bfd_coff_debug_merge_hash_newfunc))
+ (bfd_hash_table_init (&(table)->root, _bfd_coff_debug_merge_hash_newfunc, \
+ sizeof (struct coff_debug_merge_hash_entry)))
/* Free a COFF debug merge hash table. */
@@ -541,7 +542,8 @@
(struct coff_link_hash_table *, bfd *,
struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *));
+ const char *),
+ unsigned int);
extern struct bfd_link_hash_table *_bfd_coff_link_hash_table_create
(bfd *);
extern const char *_bfd_coff_internal_syment_name
Modified: branches/binutils/package/bfd/linker.c
===================================================================
--- branches/binutils/package/bfd/linker.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/linker.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* linker.c -- BFD linker routines
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support
This file is part of BFD, the Binary File Descriptor library.
@@ -472,14 +472,15 @@
bfd *abfd,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
table->creator = abfd->xvec;
table->undefs = NULL;
table->undefs_tail = NULL;
table->type = bfd_link_generic_hash_table;
- return bfd_hash_table_init (&table->table, newfunc);
+ return bfd_hash_table_init (&table->table, newfunc, entsize);
}
/* Look up a symbol in a link hash table. If follow is TRUE, we
@@ -709,7 +710,8 @@
if (ret == NULL)
return NULL;
if (! _bfd_link_hash_table_init (&ret->root, abfd,
- _bfd_generic_link_hash_newfunc))
+ _bfd_generic_link_hash_newfunc,
+ sizeof (struct generic_link_hash_entry)))
{
free (ret);
return NULL;
@@ -901,9 +903,10 @@
(struct archive_hash_table *table,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
- return bfd_hash_table_init (&table->table, newfunc);
+ return bfd_hash_table_init (&table->table, newfunc, entsize);
}
/* Look up an entry in an archive hash table. */
@@ -981,7 +984,8 @@
/* In order to quickly determine whether an symbol is defined in
this archive, we build a hash table of the symbols. */
- if (! archive_hash_table_init (&arsym_hash, archive_hash_newfunc))
+ if (! archive_hash_table_init (&arsym_hash, archive_hash_newfunc,
+ sizeof (struct archive_hash_entry)))
return FALSE;
for (arsym = arsyms, indx = 0; arsym < arsym_end; arsym++, indx++)
{
@@ -2717,11 +2721,10 @@
BFD_ASSERT ((output_section->flags & SEC_HAS_CONTENTS) != 0);
- if (link_order->size == 0)
- return TRUE;
-
input_section = link_order->u.indirect.section;
input_bfd = input_section->owner;
+ if (input_section->size == 0)
+ return TRUE;
BFD_ASSERT (input_section->output_section == output_section);
BFD_ASSERT (input_section->output_offset == link_order->offset);
@@ -2810,9 +2813,9 @@
goto error_return;
/* Output the section contents. */
- loc = link_order->offset * bfd_octets_per_byte (output_bfd);
+ loc = input_section->output_offset * bfd_octets_per_byte (output_bfd);
if (! bfd_set_section_contents (output_bfd, output_section,
- new_contents, loc, link_order->size))
+ new_contents, loc, input_section->size))
goto error_return;
if (contents != NULL)
@@ -2953,7 +2956,9 @@
bfd_section_already_linked_table_init (void)
{
return bfd_hash_table_init_n (&_bfd_section_already_linked_table,
- already_linked_newfunc, 42);
+ already_linked_newfunc,
+ sizeof (struct bfd_section_already_linked_hash_entry),
+ 42);
}
void
Modified: branches/binutils/package/bfd/lynx-core.c
===================================================================
--- branches/binutils/package/bfd/lynx-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/lynx-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -51,6 +51,8 @@
#define core_signal(bfd) (core_hdr(bfd)->sig)
#define core_command(bfd) (core_hdr(bfd)->cmd)
+#define lynx_core_file_matches_executable_p generic_core_file_matches_executable_p
+
/* Handle Lynx core dump file. */
static asection *
@@ -225,11 +227,4 @@
return core_signal (abfd);
}
-bfd_boolean
-lynx_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd, *exec_bfd;
-{
- return TRUE; /* FIXME, We have no way of telling at this point */
-}
-
#endif /* LYNX_CORE */
Modified: branches/binutils/package/bfd/m68klinux.c
===================================================================
--- branches/binutils/package/bfd/m68klinux.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/m68klinux.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for linux flavored m68k a.out binaries.
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2001, 2002,
- 2003, 2004 Free Software Foundation, Inc.
+ 2003, 2004, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -235,8 +235,9 @@
bfd_set_error (bfd_error_no_memory);
return (struct bfd_link_hash_table *) NULL;
}
- if (! NAME(aout,link_hash_table_init) (&ret->root, abfd,
- linux_link_hash_newfunc))
+ if (!NAME(aout,link_hash_table_init) (&ret->root, abfd,
+ linux_link_hash_newfunc,
+ sizeof (struct linux_link_hash_entry)))
{
free (ret);
return (struct bfd_link_hash_table *) NULL;
Modified: branches/binutils/package/bfd/mach-o.c
===================================================================
--- branches/binutils/package/bfd/mach-o.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/mach-o.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -75,6 +75,7 @@
#define bfd_mach_o_bfd_discard_group bfd_generic_discard_group
#define bfd_mach_o_section_already_linked _bfd_generic_section_already_linked
#define bfd_mach_o_bfd_copy_private_header_data _bfd_generic_bfd_copy_private_header_data
+#define bfd_mach_o_core_file_matches_executable_p generic_core_file_matches_executable_p
/* The flags field of a section structure is separated into two parts a section
@@ -1993,13 +1994,6 @@
return 0;
}
-bfd_boolean
-bfd_mach_o_core_file_matches_executable_p (bfd *core_bfd ATTRIBUTE_UNUSED,
- bfd *exec_bfd ATTRIBUTE_UNUSED)
-{
- return TRUE;
-}
-
#define TARGET_NAME mach_o_be_vec
#define TARGET_STRING "mach-o-be"
#define TARGET_BIG_ENDIAN 1
Modified: branches/binutils/package/bfd/merge.c
===================================================================
--- branches/binutils/package/bfd/merge.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/merge.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* SEC_MERGE support.
- Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
Written by Jakub Jelinek <jakub at redhat.com>.
This file is part of BFD, the Binary File Descriptor library.
@@ -242,7 +243,7 @@
return NULL;
if (! bfd_hash_table_init_n (&table->table, sec_merge_hash_newfunc,
- 16699))
+ sizeof (struct sec_merge_hash_entry), 16699))
{
free (table);
return NULL;
Modified: branches/binutils/package/bfd/netbsd-core.c
===================================================================
--- branches/binutils/package/bfd/netbsd-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/netbsd-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -42,6 +42,8 @@
OpenBSD/sparc64. */
#define SPARC64_WCOOKIE_OFFSET 832
+#define netbsd_core_file_matches_executable_p generic_core_file_matches_executable_p
+
struct netbsd_core_struct
{
struct core core;
@@ -246,14 +248,6 @@
/*return core_signal (abfd);*/
return abfd->tdata.netbsd_core_data->core.c_signo;
}
-
-static bfd_boolean
-netbsd_core_file_matches_executable_p (bfd *core_bfd ATTRIBUTE_UNUSED,
- bfd *exec_bfd ATTRIBUTE_UNUSED)
-{
- /* FIXME, We have no way of telling at this point. */
- return TRUE;
-}
/* If somebody calls any byte-swapping routines, shoot them. */
Modified: branches/binutils/package/bfd/opncls.c
===================================================================
--- branches/binutils/package/bfd/opncls.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/opncls.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* opncls.c -- open and close a BFD.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
- 2001, 2002, 2003, 2004, 2005
+ 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -71,7 +71,7 @@
nbfd->iostream = NULL;
nbfd->where = 0;
if (!bfd_hash_table_init_n (& nbfd->section_htab, bfd_section_hash_newfunc,
- 251))
+ sizeof (struct section_hash_entry), 251))
{
free (nbfd);
return NULL;
Modified: branches/binutils/package/bfd/osf-core.c
===================================================================
--- branches/binutils/package/bfd/osf-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/osf-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -40,8 +40,7 @@
PARAMS ((bfd *));
static int osf_core_core_file_failing_signal
PARAMS ((bfd *));
-static bfd_boolean osf_core_core_file_matches_executable_p
- PARAMS ((bfd *, bfd *));
+#define osf_core_core_file_matches_executable_p generic_core_file_matches_executable_p
static void swap_abort
PARAMS ((void));
@@ -172,14 +171,6 @@
{
return core_signal (abfd);
}
-
-static bfd_boolean
-osf_core_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd ATTRIBUTE_UNUSED;
- bfd *exec_bfd ATTRIBUTE_UNUSED;
-{
- return TRUE; /* FIXME, We have no way of telling at this point */
-}
/* If somebody calls any byte-swapping routines, shoot them. */
static void
Modified: branches/binutils/package/bfd/pdp11.c
===================================================================
--- branches/binutils/package/bfd/pdp11.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/pdp11.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* BFD back-end for PDP-11 a.out binaries.
- Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -2446,9 +2447,10 @@
bfd *abfd,
struct bfd_hash_entry *(*newfunc) (struct bfd_hash_entry *,
struct bfd_hash_table *,
- const char *))
+ const char *),
+ unsigned int entsize)
{
- return _bfd_link_hash_table_init (&table->root, abfd, newfunc);
+ return _bfd_link_hash_table_init (&table->root, abfd, newfunc, entsize);
}
/* Create an a.out link hash table. */
@@ -2463,7 +2465,8 @@
if (ret == NULL)
return NULL;
if (! NAME (aout, link_hash_table_init) (ret, abfd,
- NAME (aout, link_hash_newfunc)))
+ NAME (aout, link_hash_newfunc),
+ sizeof (struct aout_link_hash_entry)))
{
free (ret);
return NULL;
@@ -3657,9 +3660,10 @@
aout_info.symbol_map = NULL;
aout_info.output_syms = NULL;
- if (! bfd_hash_table_init_n (&aout_info.includes.root,
- aout_link_includes_newfunc,
- 251))
+ if (!bfd_hash_table_init_n (&aout_info.includes.root,
+ aout_link_includes_newfunc,
+ sizeof (struct aout_link_includes_entry),
+ 251))
goto error_return;
includes_hash_initialized = TRUE;
Modified: branches/binutils/package/bfd/peXXigen.c
===================================================================
--- branches/binutils/package/bfd/peXXigen.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/peXXigen.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Support for the generic parts of PE/PEI; the common executable parts.
Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005 Free Software Foundation, Inc.
+ 2005, 2006 Free Software Foundation, Inc.
Written by Cygnus Solutions.
This file is part of BFD, the Binary File Descriptor library.
@@ -1668,7 +1668,7 @@
"RESERVED1",
"MIPS_JMPADDR16",
"DIR64",
- "HIGH3ADJ"
+ "HIGH3ADJ",
"UNKNOWN", /* MUST be last. */
};
Modified: branches/binutils/package/bfd/po/Make-in
===================================================================
--- branches/binutils/package/bfd/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright 2001, 2003 Free Software Foundation, Inc.
+# Copyright 2001, 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -123,6 +123,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -198,7 +199,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Modified: branches/binutils/package/bfd/po/SRC-POTFILES.in
===================================================================
--- branches/binutils/package/bfd/po/SRC-POTFILES.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/po/SRC-POTFILES.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -57,6 +57,7 @@
coff-u68k.c
coff-w65.c
coff-we32k.c
+coff-z80.c
coff-z8k.c
corefile.c
cpu-alpha.c
@@ -94,8 +95,8 @@
cpu-mcore.c
cpu-mips.c
cpu-mmix.c
-cpu-ms1.c
cpu-msp430.c
+cpu-mt.c
cpu-ns32k.c
cpu-openrisc.c
cpu-or32.c
@@ -116,6 +117,7 @@
cpu-we32k.c
cpu-xstormy16.c
cpu-xtensa.c
+cpu-z80.c
cpu-z8k.c
demo64.c
dwarf1.c
@@ -158,8 +160,8 @@
elf32-m88k.c
elf32-mcore.c
elf32-mips.c
-elf32-ms1.c
elf32-msp430.c
+elf32-mt.c
elf32-openrisc.c
elf32-or32.c
elf32-pj.c
Modified: branches/binutils/package/bfd/ptrace-core.c
===================================================================
--- branches/binutils/package/bfd/ptrace-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/ptrace-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -51,8 +51,7 @@
const bfd_target *ptrace_unix_core_file_p PARAMS ((bfd *abfd));
char * ptrace_unix_core_file_failing_command PARAMS ((bfd *abfd));
int ptrace_unix_core_file_failing_signal PARAMS ((bfd *abfd));
-bfd_boolean ptrace_unix_core_file_matches_executable_p
- PARAMS ((bfd *core_bfd, bfd *exec_bfd));
+#define ptrace_unix_core_file_matches_executable_p generic_core_file_matches_executable_p
static void swap_abort PARAMS ((void));
const bfd_target *
@@ -151,15 +150,6 @@
{
return abfd->tdata.trad_core_data->u.pt_sigframe.sig_num;
}
-
-bfd_boolean
-ptrace_unix_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd, *exec_bfd;
-{
- /* FIXME: Use pt_timdat field of the ptrace_user structure to match
- the date of the executable */
- return TRUE;
-}
/* If somebody calls any byte-swapping routines, shoot them. */
static void
Modified: branches/binutils/package/bfd/reloc.c
===================================================================
--- branches/binutils/package/bfd/reloc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/reloc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD support for handling relocation entries.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -2140,6 +2140,14 @@
COMMENT
ENUM
+ BFD_RELOC_MIPS_COPY
+ENUMX
+ BFD_RELOC_MIPS_JUMP_SLOT
+ENUMDOC
+ MIPS ELF relocations (VxWorks extensions).
+COMMENT
+
+ENUM
BFD_RELOC_FRV_LABEL16
ENUMX
BFD_RELOC_FRV_LABEL24
@@ -2298,6 +2306,12 @@
BFD_RELOC_386_TLS_DTPOFF32
ENUMX
BFD_RELOC_386_TLS_TPOFF32
+ENUMX
+ BFD_RELOC_386_TLS_GOTDESC
+ENUMX
+ BFD_RELOC_386_TLS_DESC_CALL
+ENUMX
+ BFD_RELOC_386_TLS_DESC
ENUMDOC
i386/elf relocations
@@ -2337,6 +2351,22 @@
BFD_RELOC_X86_64_GOTOFF64
ENUMX
BFD_RELOC_X86_64_GOTPC32
+ENUMX
+ BFD_RELOC_X86_64_GOT64
+ENUMX
+ BFD_RELOC_X86_64_GOTPCREL64
+ENUMX
+ BFD_RELOC_X86_64_GOTPC64
+ENUMX
+ BFD_RELOC_X86_64_GOTPLT64
+ENUMX
+ BFD_RELOC_X86_64_PLTOFF64
+ENUMX
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC
+ENUMX
+ BFD_RELOC_X86_64_TLSDESC_CALL
+ENUMX
+ BFD_RELOC_X86_64_TLSDESC
ENUMDOC
x86-64/elf relocations
@@ -2610,11 +2640,11 @@
Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
not stored in the instruction. The 2nd lowest bit comes from a 1 bit
field in the instruction.
-ENUM
+ENUM
BFD_RELOC_ARM_PCREL_CALL
ENUMDOC
ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
-ENUM
+ENUM
BFD_RELOC_ARM_PCREL_JUMP
ENUMDOC
ARM 26-bit pc-relative branch for B or conditional BL instruction.
@@ -3002,6 +3032,36 @@
ENUMDOC
ADI Blackfin Long Jump pcrel.
ENUM
+ BFD_RELOC_BFIN_GOT17M4
+ENUMX
+ BFD_RELOC_BFIN_GOTHI
+ENUMX
+ BFD_RELOC_BFIN_GOTLO
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOT17M4
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOTHI
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOTLO
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_VALUE
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
+ENUMX
+ BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
+ENUMX
+ BFD_RELOC_BFIN_GOTOFF17M4
+ENUMX
+ BFD_RELOC_BFIN_GOTOFFHI
+ENUMX
+ BFD_RELOC_BFIN_GOTOFFLO
+ENUMDOC
+ ADI Blackfin FD-PIC relocations.
+ENUM
BFD_RELOC_BFIN_GOT
ENUMDOC
ADI Blackfin GOT relocation.
@@ -3190,6 +3250,12 @@
ENUM
BFD_RELOC_M32C_HI8
+ENUMX
+ BFD_RELOC_M32C_RL_JUMP
+ENUMX
+ BFD_RELOC_M32C_RL_1ADDR
+ENUMX
+ BFD_RELOC_M32C_RL_2ADDR
ENUMDOC
Renesas M16C/M32C Relocations.
@@ -3568,6 +3634,11 @@
This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
of program memory address) into 8 bit immediate value of LDI insn.
ENUM
+ BFD_RELOC_AVR_MS8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+ of 32 bit value) into 8 bit immediate value of LDI insn.
+ENUM
BFD_RELOC_AVR_LO8_LDI_NEG
ENUMDOC
This is a 16 bit reloc for the AVR that stores negated 8 bit value
@@ -3585,6 +3656,11 @@
(most high 8 bit of program memory address) into 8 bit immediate value
of LDI or SUBI insn.
ENUM
+ BFD_RELOC_AVR_MS8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
+ of 32 bit value) into 8 bit immediate value of LDI insn.
+ENUM
BFD_RELOC_AVR_LO8_LDI_PM
ENUMDOC
This is a 16 bit reloc for the AVR that stores 8 bit value (usually
@@ -4209,7 +4285,7 @@
BFD_RELOC_CRX_SWITCH16
ENUMX
BFD_RELOC_CRX_SWITCH32
-ENUMDOC
+ENUMDOC
NS CRX Relocations.
ENUM
@@ -4373,6 +4449,17 @@
Sony Xstormy16 Relocations.
ENUM
+ BFD_RELOC_XC16X_PAG
+ENUMX
+ BFD_RELOC_XC16X_POF
+ENUMX
+ BFD_RELOC_XC16X_SEG
+ENUMX
+ BFD_RELOC_XC16X_SOF
+ENUMDOC
+ Infineon Relocations.
+
+ENUM
BFD_RELOC_VAX_GLOB_DAT
ENUMX
BFD_RELOC_VAX_JMP_SLOT
@@ -4380,31 +4467,31 @@
BFD_RELOC_VAX_RELATIVE
ENUMDOC
Relocations used by VAX ELF.
-
+
ENUM
- BFD_RELOC_MS1_PC16
+ BFD_RELOC_MT_PC16
ENUMDOC
- Morpho MS1 - 16 bit immediate relocation.
+ Morpho MT - 16 bit immediate relocation.
ENUM
- BFD_RELOC_MS1_HI16
+ BFD_RELOC_MT_HI16
ENUMDOC
- Morpho MS1 - Hi 16 bits of an address.
+ Morpho MT - Hi 16 bits of an address.
ENUM
- BFD_RELOC_MS1_LO16
+ BFD_RELOC_MT_LO16
ENUMDOC
- Morpho MS1 - Low 16 bits of an address.
+ Morpho MT - Low 16 bits of an address.
ENUM
- BFD_RELOC_MS1_GNU_VTINHERIT
+ BFD_RELOC_MT_GNU_VTINHERIT
ENUMDOC
- Morpho MS1 - Used to tell the linker which vtable entries are used.
+ Morpho MT - Used to tell the linker which vtable entries are used.
ENUM
- BFD_RELOC_MS1_GNU_VTENTRY
+ BFD_RELOC_MT_GNU_VTENTRY
ENUMDOC
- Morpho MS1 - Used to tell the linker which vtable entries are used.
+ Morpho MT - Used to tell the linker which vtable entries are used.
ENUM
- BFD_RELOC_MS1_PCINSN8
+ BFD_RELOC_MT_PCINSN8
ENUMDOC
- Morpho MS1 - 8 bit immediate relocation.
+ Morpho MT - 8 bit immediate relocation.
ENUM
BFD_RELOC_MSP430_10_PCREL
@@ -4544,15 +4631,15 @@
ENUM
BFD_RELOC_XTENSA_ASM_EXPAND
ENUMDOC
- Xtensa relocation to mark that the assembler expanded the
+ Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size.
ENUM
BFD_RELOC_XTENSA_ASM_SIMPLIFY
ENUMDOC
- Xtensa relocation to mark that the linker should simplify
- assembler-expanded instructions. This is commonly used
- internally by the linker after analysis of a
+ Xtensa relocation to mark that the linker should simplify
+ assembler-expanded instructions. This is commonly used
+ internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND.
ENUM
Modified: branches/binutils/package/bfd/sco5-core.c
===================================================================
--- branches/binutils/package/bfd/sco5-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/sco5-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -49,8 +49,7 @@
const bfd_target *sco5_core_file_p PARAMS ((bfd *abfd));
char *sco5_core_file_failing_command PARAMS ((bfd *abfd));
int sco5_core_file_failing_signal PARAMS ((bfd *abfd));
-bfd_boolean sco5_core_file_matches_executable_p
- PARAMS ((bfd *core_bfd, bfd *exec_bfd));
+#define sco5_core_file_matches_executable_p generic_core_file_matches_executable_p
static void swap_abort PARAMS ((void));
static asection *
@@ -345,14 +344,6 @@
: -1);
}
-bfd_boolean
-sco5_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd ATTRIBUTE_UNUSED;
- bfd *exec_bfd ATTRIBUTE_UNUSED;
-{
- return TRUE; /* FIXME, We have no way of telling at this point */
-}
-
/* If somebody calls any byte-swapping routines, shoot them. */
static void
swap_abort ()
Modified: branches/binutils/package/bfd/section.c
===================================================================
--- branches/binutils/package/bfd/section.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/section.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Object file "section" support for the BFD library.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -713,12 +713,6 @@
STD_SECTION (bfd_ind_section, 0, bfd_ind_symbol, BFD_IND_SECTION_NAME, 3);
#undef STD_SECTION
-struct section_hash_entry
-{
- struct bfd_hash_entry root;
- asection section;
-};
-
/* Initialize an entry in the section hash table. */
struct bfd_hash_entry *
Modified: branches/binutils/package/bfd/sparclinux.c
===================================================================
--- branches/binutils/package/bfd/sparclinux.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/sparclinux.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD back-end for linux flavored sparc a.out binaries.
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000, 2001, 2002,
- 2003, 2004 Free Software Foundation, Inc.
+ 2003, 2004, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -232,8 +232,9 @@
ret = (struct linux_link_hash_table *) bfd_malloc (amt);
if (ret == (struct linux_link_hash_table *) NULL)
return (struct bfd_link_hash_table *) NULL;
- if (! NAME(aout,link_hash_table_init) (&ret->root, abfd,
- linux_link_hash_newfunc))
+ if (!NAME(aout,link_hash_table_init) (&ret->root, abfd,
+ linux_link_hash_newfunc,
+ sizeof (struct linux_link_hash_entry)))
{
free (ret);
return (struct bfd_link_hash_table *) NULL;
Modified: branches/binutils/package/bfd/stabs.c
===================================================================
--- branches/binutils/package/bfd/stabs.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/stabs.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Stabs in sections linking support.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -194,9 +194,9 @@
goto error_return;
/* Make sure the first byte is zero. */
(void) _bfd_stringtab_add (sinfo->strings, "", TRUE, TRUE);
- if (! bfd_hash_table_init_n (&sinfo->includes,
- stab_link_includes_newfunc,
- 251))
+ if (! bfd_hash_table_init (&sinfo->includes,
+ stab_link_includes_newfunc,
+ sizeof (struct stab_link_includes_entry)))
goto error_return;
sinfo->stabstr = bfd_make_section_anyway (abfd, ".stabstr");
if (sinfo->stabstr == NULL)
Modified: branches/binutils/package/bfd/sunos.c
===================================================================
--- branches/binutils/package/bfd/sunos.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/sunos.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* BFD backend for SunOS binaries.
Copyright 1990, 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -679,8 +679,9 @@
ret = bfd_malloc (amt);
if (ret == NULL)
return NULL;
- if (! NAME (aout, link_hash_table_init) (&ret->root, abfd,
- sunos_link_hash_newfunc))
+ if (!NAME (aout, link_hash_table_init) (&ret->root, abfd,
+ sunos_link_hash_newfunc,
+ sizeof (struct sunos_link_hash_entry)))
{
free (ret);
return NULL;
Modified: branches/binutils/package/bfd/targets.c
===================================================================
--- branches/binutils/package/bfd/targets.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/targets.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -554,12 +554,14 @@
extern const bfd_target bfd_efi_app_ia64_vec;
extern const bfd_target bfd_elf32_avr_vec;
extern const bfd_target bfd_elf32_bfin_vec;
+extern const bfd_target bfd_elf32_bfinfdpic_vec;
extern const bfd_target bfd_elf32_big_generic_vec;
extern const bfd_target bfd_elf32_bigarc_vec;
extern const bfd_target bfd_elf32_bigarm_vec;
extern const bfd_target bfd_elf32_bigarm_symbian_vec;
extern const bfd_target bfd_elf32_bigarm_vxworks_vec;
extern const bfd_target bfd_elf32_bigmips_vec;
+extern const bfd_target bfd_elf32_bigmips_vxworks_vec;
extern const bfd_target bfd_elf32_cr16c_vec;
extern const bfd_target bfd_elf32_cris_vec;
extern const bfd_target bfd_elf32_crx_vec;
@@ -590,6 +592,7 @@
extern const bfd_target bfd_elf32_littlearm_symbian_vec;
extern const bfd_target bfd_elf32_littlearm_vxworks_vec;
extern const bfd_target bfd_elf32_littlemips_vec;
+extern const bfd_target bfd_elf32_littlemips_vxworks_vec;
extern const bfd_target bfd_elf32_m32c_vec;
extern const bfd_target bfd_elf32_m32r_vec;
extern const bfd_target bfd_elf32_m32rle_vec;
@@ -603,7 +606,7 @@
extern const bfd_target bfd_elf32_mcore_little_vec;
extern const bfd_target bfd_elf32_mn10200_vec;
extern const bfd_target bfd_elf32_mn10300_vec;
-extern const bfd_target bfd_elf32_ms1_vec;
+extern const bfd_target bfd_elf32_mt_vec;
extern const bfd_target bfd_elf32_msp430_vec;
extern const bfd_target bfd_elf32_nbigmips_vec;
extern const bfd_target bfd_elf32_nlittlemips_vec;
@@ -631,11 +634,13 @@
extern const bfd_target bfd_elf32_shlnbsd_vec;
extern const bfd_target bfd_elf32_shnbsd_vec;
extern const bfd_target bfd_elf32_sparc_vec;
+extern const bfd_target bfd_elf32_sparc_vxworks_vec;
extern const bfd_target bfd_elf32_tradbigmips_vec;
extern const bfd_target bfd_elf32_tradlittlemips_vec;
extern const bfd_target bfd_elf32_us_cris_vec;
extern const bfd_target bfd_elf32_v850_vec;
extern const bfd_target bfd_elf32_vax_vec;
+extern const bfd_target bfd_elf32_xc16x_vec;
extern const bfd_target bfd_elf32_xstormy16_vec;
extern const bfd_target bfd_elf32_xtensa_be_vec;
extern const bfd_target bfd_elf32_xtensa_le_vec;
@@ -851,6 +856,7 @@
#endif
&bfd_elf32_avr_vec,
&bfd_elf32_bfin_vec,
+ &bfd_elf32_bfinfdpic_vec,
/* This, and other vectors, may not be used in any *.mt configuration.
But that does not mean they are unnecessary. If configured with
@@ -862,6 +868,7 @@
&bfd_elf32_bigarm_symbian_vec,
&bfd_elf32_bigarm_vxworks_vec,
&bfd_elf32_bigmips_vec,
+ &bfd_elf32_bigmips_vxworks_vec,
&bfd_elf32_cr16c_vec,
&bfd_elf32_cris_vec,
&bfd_elf32_crx_vec,
@@ -896,6 +903,7 @@
&bfd_elf32_littlearm_symbian_vec,
&bfd_elf32_littlearm_vxworks_vec,
&bfd_elf32_littlemips_vec,
+ &bfd_elf32_littlemips_vxworks_vec,
&bfd_elf32_m32c_vec,
&bfd_elf32_m32r_vec,
&bfd_elf32_m32rle_vec,
@@ -909,7 +917,7 @@
&bfd_elf32_mcore_little_vec,
&bfd_elf32_mn10200_vec,
&bfd_elf32_mn10300_vec,
- &bfd_elf32_ms1_vec,
+ &bfd_elf32_mt_vec,
&bfd_elf32_msp430_vec,
#ifdef BFD64
&bfd_elf32_nbigmips_vec,
@@ -941,11 +949,13 @@
&bfd_elf32_sh64blin_vec,
#endif
&bfd_elf32_sparc_vec,
+ &bfd_elf32_sparc_vxworks_vec,
&bfd_elf32_tradbigmips_vec,
&bfd_elf32_tradlittlemips_vec,
&bfd_elf32_us_cris_vec,
&bfd_elf32_v850_vec,
&bfd_elf32_vax_vec,
+ &bfd_elf32_xc16x_vec,
&bfd_elf32_xstormy16_vec,
&bfd_elf32_xtensa_be_vec,
&bfd_elf32_xtensa_le_vec,
@@ -975,7 +985,7 @@
&bfd_elf64_tradbigmips_vec,
&bfd_elf64_tradlittlemips_vec,
&bfd_elf64_x86_64_vec,
- &bfd_mmo_vec,
+ &bfd_mmo_vec,
#endif
&bfd_powerpc_pe_vec,
&bfd_powerpc_pei_vec,
Modified: branches/binutils/package/bfd/trad-core.c
===================================================================
--- branches/binutils/package/bfd/trad-core.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/trad-core.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -65,8 +65,7 @@
const bfd_target *trad_unix_core_file_p PARAMS ((bfd *abfd));
char * trad_unix_core_file_failing_command PARAMS ((bfd *abfd));
int trad_unix_core_file_failing_signal PARAMS ((bfd *abfd));
-bfd_boolean trad_unix_core_file_matches_executable_p
- PARAMS ((bfd *core_bfd, bfd *exec_bfd));
+#define trad_unix_core_file_matches_executable_p generic_core_file_matches_executable_p
static void swap_abort PARAMS ((void));
/* Handle 4.2-style (and perhaps also sysV-style) core dump file. */
@@ -253,14 +252,6 @@
return -1; /* FIXME, where is it? */
#endif
}
-
-bfd_boolean
-trad_unix_core_file_matches_executable_p (core_bfd, exec_bfd)
- bfd *core_bfd ATTRIBUTE_UNUSED;
- bfd *exec_bfd ATTRIBUTE_UNUSED;
-{
- return TRUE; /* FIXME, We have no way of telling at this point */
-}
/* If somebody calls any byte-swapping routines, shoot them. */
static void
Modified: branches/binutils/package/bfd/version.h
===================================================================
--- branches/binutils/package/bfd/version.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/version.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,3 @@
-#define BFD_VERSION_DATE 20051214
+#define BFD_VERSION_DATE 20060413
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_string@
Modified: branches/binutils/package/bfd/vms.c
===================================================================
--- branches/binutils/package/bfd/vms.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/vms.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,7 @@
/* vms.c -- BFD back-end for VAX (openVMS/VAX) and
EVAX (openVMS/Alpha) files.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Written by Klaus K"ampf (kkaempf at rmi.de)
@@ -77,7 +77,8 @@
if (PRIV (vms_symbol_table) == NULL)
goto error_ret1;
- if (!bfd_hash_table_init (PRIV (vms_symbol_table), _bfd_vms_hash_newfunc))
+ if (!bfd_hash_table_init (PRIV (vms_symbol_table), _bfd_vms_hash_newfunc,
+ sizeof (vms_symbol_entry)))
goto error_ret1;
amt = sizeof (struct location_struct) * LOCATION_SAVE_SIZE;
Modified: branches/binutils/package/bfd/xcofflink.c
===================================================================
--- branches/binutils/package/bfd/xcofflink.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/bfd/xcofflink.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* POWER/PowerPC XCOFF linker support.
- Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+ 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian at cygnus.com>, Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -444,7 +444,8 @@
ret = bfd_malloc (amt);
if (ret == NULL)
return NULL;
- if (! _bfd_link_hash_table_init (&ret->root, abfd, xcoff_link_hash_newfunc))
+ if (!_bfd_link_hash_table_init (&ret->root, abfd, xcoff_link_hash_newfunc,
+ sizeof (struct xcoff_link_hash_entry)))
{
free (ret);
return NULL;
Modified: branches/binutils/package/binutils/BRANCHES
===================================================================
--- branches/binutils/package/binutils/BRANCHES 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/BRANCHES 2006-04-19 08:33:31 UTC (rev 12)
@@ -13,12 +13,13 @@
Organization Branches Description
--------------------- -----------
binutils-csl-arm-2005q1-branch
- CodeSourcery 2005-Q1 ARM toolchain release branch.
- Please do not commit to this branch without
+ CodeSourcery toolchain release branches.
+ Please do not commit to these branches without
permission from a CodeSourcery developer.
binutils-csl-gxxpro-3_4-branch
- CodeSourcery branded GNU Toolchain release branch.
+binutils-csl-2_17-branch
+ CodeSourcery branded GNU Toolchain release branches.
Please do not commit to this branch without
permission from a CodeSourcery developer.
Modified: branches/binutils/package/binutils/ChangeLog
===================================================================
--- branches/binutils/package/binutils/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,2102 +1,209 @@
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+2006-04-12 Nick Clifton <nickc at redhat.com>
- * Makefile.am: Replace ms1 files with mt files.
- * Makefile.in: Rebuilt.
- * readelf.c (elf/mt.h): Adjust #include.
+ * objdump.c (objdump_symbol_at_address): Fix typo in comment.
-2005-11-30 Nick Clifton <nickc at redhat.com>
+2006-04-10 Ben Elliston <bje at gnu.org>
- * configure.in (ALL_LINGUAS): Add fi.
- * configure: Regenerate.
- * po/fi.po: New file: Finnish translation.
+ * MAINTAINERS (CGEN Maintainers): Remove myself.
-2005-11-21 Arnold Metselaar <arnoldm at sourceware.org>
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
- * MAINTAINERS: add myself as Z80 maintainer
-
-2005-11-17 Andrew Haley <aph at redhat.com>
-
- * cxxfilt.c (main): Flush output at newline.
-
-2005-11-16 Mark Mitchell <mark at codesourcery.com>
-
- * doc/binutils.texi: Include config.texi and @file documentation
- for manual pages.
-
-2005-11-15 Jan Beulich <jbeulich at novell.com>
-
- * objcopy.c (keep_file_symbols): New.
- (enum command_line_switch): Add OPTION_KEEP_FILE_SYMBOLS.
- (strip_options): Add --keep-file-symbols.
- (copy_options): Likewise.
- (copy_usage): Likewise.
- (strip_usage): Likewise.
- (filter_symbols): Act upon keep_file_symbols.
- (strip_main): Handle OPTION_KEEP_FILE_SYMBOLS.
- (copy_main): Likewise.
- * doc/binutils.texi: Document --keep-file-symbols for objcopy
- and strip.
-
-2005-11-14 Daniel Jacobowitz <dan at codesourcery.com>
-
- * readelf.c (struct dump_list_entry, request_dump_byname)
- (initialise_dumps_byname): New.
- (parse_args): Call request_dump_byname.
- (process_section_contents): Call initialise_dumps_byname.
- * doc/binutils.texi (readelf): Mention -x NAME.
- * NEWS: Likewise.
-
-2005-11-11 Nick Clifton <nickc at redhat.com>
-
- PR 1150
- * readelf.c (get_mips_symbol_other): New function.
- (get_symbol_other): New function.
- (process_symbol_table): Call get_symbol_other() to get a
- description of the st_other field if it contains more information
- than just the visibility.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * dep-in.sed: Replace " ./" with " ".
-
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
-
- * po/POTFILES.in: Regenerate.
- * po/binutils.pot: Regenerate.
-
-2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
-
- * MAINTAINERS: Add self as BFIN maintainer.
-
-2005-10-18 Jie Zhang <jie.zhang at analog.com>
-
- * MAINTAINERS: Add self as BFIN maintainer.
-
-2005-10-11 Danny Smith <dannysmith at users.sourceforge.net>
-
- * rclex.l (handle quotes): Stop parsing hex notation escaped
- chars after the first two digits,
-
-2005-10-11 Nick Clifton <nickc at redhat.com>
-
- PR binutils/1437
- * cxxfilt.c (flags): Remove DMGL_TYPES;
- (long_options): Rename --no-types to --types.
- (usage): Likewise.
- (demangle_it): Add a comment describing why _ and $ prefixes are
- skipped. Use printf rather than puts to emit the demangled output
- in order to avoid emitting a new line character.
- (main): Have the -t flag enable type demangling.
- Emit a newline after every demangled command line argument.
- Copy whitespace from stdin to stdout.
- * doc/binutils.texi (c++filt): Document the change to the -t
- switch.
- Document why demangling names on the command line is slightly
- different to demangling names read from the standard input.
-
-2005-10-10 Mark Mitchell <mark at codesourcery.com>
-
- * doc/Makefile.am (config.texi): Set top_srcdir.
- * doc/Makefile.in: Regenerated.
- * doc/binutils.texi: Use at-file.texi from libiberty.
-
-2005-10-10 H.J. Lu <hongjiu.lu at intel.com>
-
- PR binutils/1436
- * readelf.c (ABSADDR): New.
- (dump_ia64_unwind): Use ABSADDR to get the unwind info address.
-
-2005-10-10 Thomas Weidenmueller <w3seek at reactos.com>
-
- * resbin.c (res_to_bin_accelerator): Place the terminating NUL at
- the correct location in the bindata structure.
-
-2005-10-10 Bryce Schober <bryce.schober at dynonavionics.com>
-
- * doc/binutils.texi (objdump): Fix typo: -reg-name-std should be
- -reg-names-std.
-
-2005-10-04 Nick Clifton <nickc at redhat.com>
-
- * cxxfilt.c: Treat mangled names specified on the command line in
- the same way as mangled names read from stdin.
- Add -i switch to disable the display of implementation details.
- Add -t switch to disable the demangling of types.
- * NEWS: Mention the new switches.
- * doc/binutils.texi (cxxfilt): Document the -i and -t switches.
-
-2005-10-03 Mark Mitchell <mark at codesourcery.com>
-
- * addr2line.c (usage): Document @file.
- * ar.c (usage): Likewise.
- * coffdump (usage): Likewise.
- * cxxfilt.c (usage): Likewise.
- * dlltool.c (usage): Likewise.
- * dllwrap.c (usage): Likewise.
- * nlmconv.c (usage): Likewise.
- * nm.c (usage): Likewise.
- * objcopy.c (usage): Likewise.
- * objdump.c (usage): Likewise.
- * readelf.c (usage): Likewise.
- * size.c (usage): Likeise.
- * srconv.c (usage): Likewise.
- * strings.c (usage): Likewise.
- * windres.c (usage): Likewise.
- * doc/binutils.texi: Add section on common options.
-
-2005-10-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * NEWS: Mention -W/--dwarf.
-
- * doc/binutils.texi: Document -W/--dwarf for objdump.
-
-2005-10-01 Paul Brook <paul at codesourcery.com>
-
- * readelf.c (arm_attr_tag_CPU_arch, arm_attr_tag_ARM_ISA_use,
- arm_attr_tag_THUMB_ISA_use, arm_attr_tag_VFP_arch,
- arm_attr_tag_WMMX_arch, arm_attr_tag_NEON_arch,
- arm_attr_tag_ABI_PCS_config, arm_attr_tag_ABI_PCS_R9_use,
- arm_attr_tag_ABI_PCS_RW_data, arm_attr_tag_ABI_PCS_RO_DATA,
- arm_attr_tag_ABI_PCS_GOT_use, arm_attr_tag_ABI_PCS_wchar_t,
- arm_attr_tag_ABI_FP_rounding, arm_attr_tag_ABI_FP_denormal,
- arm_attr_tag_ABI_FP_exceptions, arm_attr_tag_ABI_FP_user_exceptions,
- arm_attr_tag_ABI_FP_number_model, arm_attr_tag_ABI_align8_needed,
- arm_attr_tag_ABI_align8_preserved, arm_attr_tag_ABI_enum_size,
- arm_attr_tag_ABI_HardFP_use, arm_attr_tag_ABI_VFP_args,
- arm_attr_tag_ABI_WMMX_args, arm_attr_tag_ABI_optimization_goals,
- arm_attr_tag_ABI_FP_optimization_goals, arm_attr_public_tags): New.
- (display_arm_attribute, process_arm_specific): New functions.
- (process_arch_specific): Add EM_ARM.
-
-2005-09-30 Mark Mitchell <mark at codesourcery.com>
-
- * dlltool.c (main): Fix typo.
- * windres.c (main): Likewise.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.in: Regenerated.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * sysinfo.y (main): Undo last change.
-
-2005-08-30 Mark Mitchell <mark at codesourcery.com>
-
- * addr2line.c (main): Use expandargv.
- * ar.c (main): Likewise.
- * coffdump.c (main): Likewise.
- * cxxfilt.c (main): Likewise.
- * dlltool.c (main): Likewise.
- * dllwrap.c (main): Likewise.
- * nlmconv.c (main): Likewise.
- * nm.c (main): Likewise.
- * objcopy.c (main): Likewise.
- * objdump.c (main): Likewise.
- * readelf.c (main): Likewise.
- * size.c (main): Likeiwse.
- * srcconv.c (main): Likewise.
- * strings.c (main): Likewise.
- * sysdump.c (main): Likewise.
- * sysinfo.y (main): Likewise.
- * windres.c (main): Likewise.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * Makefile.am: Bfin support.
- * Makefile.in: Regenerated.
- * aclocal.m4: Regenerated.
- * readelf.c (elf/bfin.h): Include.
- (guess_is_rela): EM_BLACKFIN support.
- (dump_relocations): Likewise.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * dwarf.c (fetch_indirect_string): Adjust for section address.
- (process_debug_info): Likewise.
- (display_debug_loc): Likewise.
- (display_debug_ranges): Likewise.
-
- * objdump.c (mach_o_dwarf_sections): New.
- (generic_dwarf_sections): Likewise.
- (check_mach_o_dwarf): Likewise.
- (dump_dwarf): Call check_mach_o_dwarf.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (objdump_SOURCES): Add dwarf.c.
- * Makefile.in: Regenerated.
-
- * objdump.c: Include "dwarf.h".
- (usage): Add -W/--dwarf.
- (long_options): Likewise.
- (dump_dwarf_section_info): New.
- (load_debug_section): Likewise.
- (free_debug_section): Likewise.
- (dump_dwarf_section): Likewise.
- (dump_dwarf): Likewise.
- (dump_bfd): Load symbol table and call dump_dwarf if
- dump_dwarf_section_info isn't zero.
- (main): Handle -W/--dwarf.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c: Reordered.
- (is_relocatable): New.
- (dwarf_section): New structure for DWARF section.
- (load_debug_section): New.
- (free_debug_section): Likewise.
- (debug_str_section): Likewise.
- (debug_abbrev_section): Likewise.
- (debug_str_contents): Removed.
- (debug_str_size): Likewise.
- (debug_loc_contents): Likewise.
- (debug_loc_size): Likewise.
- (debug_range_contents): Likewise.
- (debug_range_size): Likewise.
- (load_debug_str): Likewise.
- (free_debug_str): Likewise.
- (load_debug_loc): Likewise.
- (free_debug_loc): Likewise.
- (load_debug_arange): Likewise.
- (free_debug_arange): Likewise.
- (load_debug_abbrev): Likewise.
- (free_debug_abbrev): Likewise.
- (fetch_indirect_string): Updated.
- (debug_apply_rela_addends): Likewise.
- (process_debug_info): Likewise.
- (get_debug_info): Likewise.
- (display_debug_lines): Likewise.
- (display_debug_pubnames): Likewise.
- (display_debug_macinfo): Likewise.
- (display_debug_abbrev): Likewise.
- (display_debug_loc): Likewise.
- (display_debug_str): Likewise.
- (display_debug_info): Likewise.
- (display_debug_aranges): Likewise.
- (display_debug_ranges): Likewise.
- (display_debug_frames): Likewise.
- (display_debug_not_supported): Likewise.
- (debug_displays): Likewise.
- (display_debug_section): Likewise.
- (get_file_header): Set is_relocatable.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (debug_apply_rela_addends): Relocate the whole
- section.
- (process_debug_info): Don't call debug_apply_rela_addends.
- (display_debug_frames): Likewise.
- (get_debug_info): Call debug_apply_rela_addends.
- (debug_displays): Add the "relocate" field.
- (display_debug_section): Call debug_apply_rela_addends if
- needed.
-
-2005-09-30 Matthias Kurz <mk at baerlap.north.de>
-
- * bucomm.h: Prevent the inclusion of <libintl.h> from the Solaris
- version of <locale.h> when ENABLE_NLS is not defined.
-
-2005-09-26 Mark Mitchell <mark at codesourcery.com>
-
- * BRANCHES: Mention binutils-csl-gxxpro-3_4-branch.
-
-2005-09-20 Richard Henderson <rth at redhat.com>
-
- * readelf.c (display_debug_lines): Use unsigned long for address
- increments. Use 0x prefix for all hex numbers.
-
-2005-09-09 Richard Earnshaw <richard.earnshaw at arm.com>
-
- * readelf.c (get_arm_section_type_name): Add SHT_ARM_PREEMPTMAP and
- SHT_ARM_ATTRIBUTES.
-
-2005-09-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (get_elf_section_flags): Handle 64bit sh_flags.
-
-2005-09-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (debug_abbrev_contents): New.
- (debug_abbrev_size): Likewise.
- (load_debug_abbrev): Likewise.
- (free_debug_abbrev): Likewise.
- (process_debug_info): Use them.
-
-2005-08-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR binutils/1179
- * objdump.c (disassemble_bytes): Don't adjust
- adjust_section_vma.
- (adjust_addresses): Don't adjust vma for debugging section.
- Adjust lma only for relocatable files.
- (dump_bfd): Tell adjust_addresses if it is a relocatable file.
-
-2005-08-16 H.J. Lu <hongjiu.lu at intel.com>
-
- * bucomm.h (stpcpy): Declare if HAVE_DECL_STPCPY isn't defined.
-
- * configure.in (AC_GNU_SOURCE): Added.
- (AC_CHECK_DECLS): Add stpcpy.
- * configure: Regenerated.
- * config.in: Likewise.
-
-2005-08-16 Jakub Jelinek <jakub at redhat.com>
-
- * unwind-ia64.c (UNW_DEC_SPILL_SPREL, UNW_DEC_SPILL_PSPREL,
- UNW_DEC_RESTORE, UNW_DEC_SPILL_REG): Increase {,ab,t}regname
- buffer sizes.
-
-2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * doc/binutils.texi (objdump): Document -M e300.
-
-2005-08-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * readelf.c (slurp_hppa_unwind_table): Fix entry size on hppa64-hpux.
- Don't access table entries past the end of the table.
-
-2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * readelf.c (get_parisc_segment_type): Handle PT_PARISC_WEAKORDER.
- (get_parisc_section_type_name): Handle SHT_PARISC_DLKM.
-
-2005-08-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * NEWS: Mention "-t/--section-details" and
- "-N/--full-section-name".
-
- * doc/binutils.texi: Document "-t/--section-details". Remove
- "-N/--full-section-name".
-
- * readelf.c (do_full_section_name): Renamed to ...
- (do_section_details): This.
- (option): Rename "-N/--full-section-name" to
- "-t/--section-details".
- (usage): Likewise.
- (parse_args): Likewise.
- (get_elf_section_flags): Support do_section_details.
- (process_section_headers): Updated for do_section_details.
-
-2005-08-04 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * readelf.c (get_parisc_dynamic_type): Add new dynamic types.
- (get_dynamic_type): Use old values for DT_LOOS and DT_HIOS when
- e_machine is EM_PARISC.
- (get_parisc_segment_type): Add new segment types.
- (get_parisc_section_type_name): Add new section names.
- (dynamic_section_parisc_val): Add new table entries.
-
-2005-08-01 Filip Navara <navaraf at reactos.com>
-
- * dlltool.c (alphafunc): Remove and replace usage with nfunc.
- (nfunc): Fix sorting of fastcall symbols when --kill-at is used.
-
-2005-07-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
- (get_symbol_index_type): Likewise.
- (get_elf_section_flags): Handle SHF_X86_64_LARGE.
-
-2005-07-21 Eric Christopher <echristo at apple.com>
-
- * MAINTAINERS: Change affiliation.
-
-2005-07-19 Ben Elliston <bje at au.ibm.com>
-
- * readelf.c (read_and_display_attr_value): Remove comment adjacent
- to DW_ATE_decimal_float about it being a GNU extension.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * binemul.c: Fix name of Red Hat.
- * binemul.h: Likewise.
- * emul_aix.c: Likewise.
- * emul_vanilla: Likewise.
-
-2005-07-18 Ben Elliston <bje at au.ibm.com>
-
- * readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
- value of DW_ATE_decimal_float instead of DW_ATE_GNU_decimal_float.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
+ * po/Make-in: Add install-html target.
+ * Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
-
-2005-07-15 Eric Christopher <echristo at redhat.com>
-
- * MAINTAINERS: Change affiliation.
-
-2005-07-14 Jim Blandy <jimb at redhat.com>
-
- * readelf.c: #include "elf/m32c.h"
- (guess_is_rela, dump_relocations, get_machine_name): Add cases for
- EM_M32C.
- * Makefile.am (readelf.o): Update dependencies.
- * Makefile.in: Regenerated.
-
-2005-07-08 Ben Elliston <bje at au.ibm.com>
-
- * bucomm.h: Include <stdarg.h> unconditionally, not only when
- ANSI_PROTOTYPES is defined. Remove #ifdef logic.
- * dlltool.c: Likewise.
- * dllwrap.c: Likewise.
-
-2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
-
- * bucomm.h (report): Add format attribute.
- * dlltool.c (inform): Likewise.
- * dllwrap.c (display, inform, warn): Likewise.
- * objdump.c (objdump_sprintf): Likewise.
- * readelf.c (error, warn): Likewise. Fix format bugs.
-
-2005-07-05 Dmitry V. Levin <ldv at altlinux.org>
- Nick Clifton <nickc at redhat.com>
-
- * strings.c (filename_and_size_t): New typedef.
- (strings_a_section): Skip sections with size greater or equal to
- the file size. Cache the file size to avoid repeated stat()s.
- (strings_object_file): Pass filename_and_size_t argument to
- strings_a_section() via bfd_map_over_sections().
-
-2005-07-04 Alan Modra <amodra at bigpond.net.au>
-
- PR 1004
- * objcopy.c (copy_object): Use bfd_make_section_with_flags.
- (write_debugging_info): Likewise.
- (setup_section): Use bfd_make_section_anyway_with_flags.
-
-2005-07-01 Steve Ellcey <sje at cup.hp.com>
-
- * configure.in (AM_BINUTILS_WARNINGS): Add.
- (BFD_NEED_DECLARATION): Replace with AC_CHECK_DECLS.
+ * configure.in: AC_SUBST datarootdir, docdir and htmldir.
* configure: Regenerate.
- * config.in: Regenerate.
- * objdump.c (NEED_DECLARATION_*): Replace with !HAVE_DECL_*.
- * bucomm.h: (NEED_DECLARATION_*): Ditto.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (check-DEJAGNU): Don't search for expect.
- * Makefile.in: Regenerate.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (EXPECT): Set to expect.
- (RUNTEST): Likewise, set to runtest.
- * Makefile.in: Regenerate.
-
-2005-06-17 Jakub Jelinek <jakub at redhat.com>
-
- * readelf.c (CHECK_ENTSIZE_VALUES, CHECK_ENTSIZE): Define.
- (process_section_headers): Use it.
- (process_relocs): Don't crash if symsec is not SHT_SYMTAB
- or SHT_DYNSYM.
- (process_version_sections): Use sizeof (Elf_External_Versym)
- instead of sh_entsize.
-
-2005-06-16 Nick Clifton <nickc at redhat.com>
-
- * rename.c (simple_copy): Only define if it is going to be used.
- (smart_rename): Mark the preserve_dates parameter as possibly
- being unused.
-
- * resres.c (write_res_data): Prevent a potential compile time
- warning by casting the return value from fwrite.
-
-2005-06-14 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 995
- * ar.c (BUFSIZE): Moved to ...
- * bucomm.h (BUFSIZE): Here.
-
- * bucomm.c: Include <assert.h>.
- (bfd_get_archive_filename): New.
- * bucomm.h (bfd_get_archive_filename): New.
-
- * objcopy.c (copy_unknown_object): New.
- (copy_object): Use bfd_get_archive_filename when reporting input
- error. Don't call fatal on unknown arch.
- (copy_archive): Call copy_unknown_object on unknown format or
- arch.
-
-2005-06-14 Jakub Jelinek <jakub at redhat.com>
-
- * readelf.c (cmalloc, xcmalloc, xcrealloc): New functions.
- (get_data): Add nmemb argument. Return NULL if nmemb * size
- overflows. If var == NULL, allocate one extra byte and
- clear it.
- (slurp_rela_relocs, slurp_rel_relocs, get_32bit_program_headers,
- get_64bit_program_headers, get_program_headers,
- get_32bit_section_headers, get_64bit_section_headers,
- get_32bit_elf_symbols, get_64bit_elf_symbols, process_section_headers,
- process_section_groups, process_relocs, slurp_ia64_unwind_table,
- ia64_process_unwind, slurp_hppa_unwind_table, hppa_process_unwind,
- get_32bit_dynamic_section, get_64bit_dynamic_section,
- process_dynamic_section, process_version_sections, get_dynamic_data,
- process_symbol_table, dump_section, load_debug_str, load_debug_loc,
- load_debug_range, read_and_display_attr_value, process_debug_info,
- get_debug_info, frame_need_space, display_debug_frames,
- display_debug_section, process_mips_specific, process_gnu_liblist,
- process_corefile_note_segment): Adjust get_data callers. Use
- cmalloc, xcmalloc and xcrealloc instead of {m,xm,xre}alloc where
- passed size is a product of 2 numbers.
-
- * readelf.c (print_mode): Fix comment typo.
- (slurp_rela_relocs, slurp_rel_relocs): Fix memory leaks.
- (dump_relocations): Fix a thinko in check for invalid st_name.
- (process_program_headers): Don't crash if string_table is NULL.
- (process_section_headers): Don't crash if e_shstrndx is invalid.
- Ensure string_table_length is 0 if string_table == NULL.
- Don't return just because string_table is NULL.
- (process_section_groups): Don't crash if symtab's sh_link or
- symbol's st_name is invalid. Fix a memory leak. Fix check for
- invalid section number entry.
- (process_relocs): Don't crash if relocation or symbol section's
- sh_link is invalid.
- (slurp_ia64_unwind_table, slurp_hppa_unwind_table): Don't crash if
- relocation section's sh_info is invalid.
- (ia64_process_unwind, hppa_process_unwind): Don't crash if symbol
- table's sh_link is invalid.
- (process_version_sections): Don't crash on version or symbol
- section's sh_link is invalid. Don't crash if symbol's st_shndx
- is invalid.
- (process_symbol_table): Don't crash if string table is corrupt
- or symbol's st_name, st_shndx, vna_name or vda_name is invalid.
- (debug_apply_rela_addends): Don't crash if relocation section's
- sh_info or sh_link is invalid.
- (display_debug_loc): Warn for unterminated .debug_loc section
- or start offsets not within .debug_loc section boundaries.
- (process_gnu_liblist): Don't crash if liblist section's sh_link
- or entry's l_name is invalid.
-
-2005-06-09 Jakub Jelinek <jakub at redhat.com>
-
- * objdump.c (disassemble_bytes): Don't crash if q->howto == NULL.
- If q->howto->name == NULL, print q->howto->type as number instead.
- (dump_reloc_set): Likewise.
-
-2005-06-07 Eric Christopher <echristo at redhat.com>
-
- * readelf.c (guess_is_rela): Support ms1.
- (dump_relocations): Ditto.
- (get_machine_name): Ditto.
-
-2005-06-07 Aldy Hernandez <aldyh at redhat.com>
- Michael Snyder <msnyder at redhat.com>
- Stan Cox <scox at redhat.com>
-
- * Makefile.am (readelf.o): Depend on ms1.h.
-
- * Makefile.in: Regenerate.
-
- * readelf.c: Include ms1.h.
-
-2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 990
- * nm.c (print_symbol): Call bfd_find_line before
- bfd_find_nearest_line.
-
-2005-06-06 Alan Modra <amodra at bigpond.net.au>
-
- * NEWS: Mention new powerpc ld support.
-
-2005-06-03 Steve Ellcey <sje at cup.hp.com>
-
- * configure.in: Check for getc_unlocked prototype.
- * configure: Regenerate.
- * config.in: Regenerate.
- * strings.c (get_char): Only call getc_unlocked if we have seen a
- prototype.
-
-2005-06-03 Nick Clifton <nickc at redhat.com>
-
- * configure.in (ALL_LINGUAS): Add zh_TW
- * configure: Regenerate.
- * po/zh_TW.po: New Chinese (traditional) translation.
-
-2005-05-31 Richard Henderson <rth at redhat.com>
-
- * readelf.c (dump_relocations): Special case R_ALPHA_LITUSE.
-
-2005-05-29 Richard Henderson <rth at redhat.com>
-
- * readelf.c (get_alpha_dynamic_type): New.
- (get_dynamic_type): Call it.
-
-2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (process_section_groups): Report group section
- index. Check if the section member index is valid.
-
-2005-05-23 Fred Fish <fnf at specifixinc.com>
-
- * addr2line.c (unwind_inlines): New flag for 'i' option.
- (usage): Document '-i' option.
- (long_options): Recognize '--inlines'.
- (translate_addresses): Loop, calling bfd_find_inliner_info as
- necessary and printing multiple output lines.
- (main): Handle 'i' option.
- * doc/binutils.texi (addr2line): Document '-i' option.
- * NEWS: Mention new addr2line '-i' option.
-
-2005-05-23 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (fetch_indirect_string): Display a warning message
- when a corrupt DW_FORM_strp value is encountered.
-
- (process_debug_info): Mention that the compilation unit offset is
- being displayed in hexadecimal.
-
- (display_debug_lines): Fix typo in name of .debug_line section.
-
-2005-05-19 Zack Weinberg <zack at codesourcery.com>
-
- * Makefile.am: Have 'all' depend on 'info'.
- * Makefile.in: Regenerate.
-
-2005-05-19 Ben Elliston <bje at au.ibm.com>
-
- * readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
- value of DW_ATE_GNU_decimal_float.
-
-2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * doc/Makefile.am (config.texi): Don't use $<.
- * doc/Makefile.in: Regenerated.
-
-2005-05-15 Yitzchak Scott-Thoennes <sthoenna at efn.org>
-
- * deflex.l: Ignore CRs
-
-2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * acinclude.m4: Remove obsolete code.
- * configure.in: Update AC_PREREQ.
- * doc/Makefile.am (binutils_TEXINFOS): Define.
- (config.texi): Depend on distributed files instead of built
- files.
- (binutils.dvi, binutils.info): Remove unnecessary rules.
- (DISTCLEANFILES): Remove.
- (install-data-local): Renamed from install.
- (info-local): Renamed from info.
- * Makefile.in, aclocal.m4, config.in, configure,
- doc/Makefile.in: Regenerated.
-
-2005-05-14 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (get_ppc_dynamic_type): Display DT_PPC_GOT, not
- DT_PPC_GLINK.
-
-2005-05-13 Fred Fish <fnf at specifixinc.com>
-
- * readelf.c: Fix a couple of obvious comment typos,
- 'debug_str' -> 'debug_ranges' and proecess' -> 'process'.
-
-2005-05-13 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (dump_ia64_unwind): Get stamp with proper size.
-
-2005-05-12 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (display_debug_lines): If pointer_size has not been
- found then assume that it is 4 in order to prevent a seg fault
- when process_extend_line_op attempts to read the line data.
-
-2005-05-11 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (get_ppc_dynamic_type): New function for DT_PPC_GLINK.
- (get_dynamic_type): Call the above.
-
-2005-05-07 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- aclocal.m4, addr2line.c, ar.c, arlex.l, arparse.y, arsup.c,
- arsup.h, binemul.c, binemul.h, bucomm.c, bucomm.h, budbg.h,
- budemang.c, budemang.h, coffdump.c, coffgrok.c, coffgrok.h,
- cxxfilt.c, debug.c, debug.h, deflex.l, defparse.y, dlltool.c,
- dlltool.h, dllwrap.c, emul_aix.c, emul_vanilla.c, filemode.c,
- ieee.c, nlmconv.c, nlmconv.h, nlmheader.y, nm.c, objcopy.c,
- objdump.c, prdbg.c, rclex.l, rcparse.y, rdcoff.c, rddbg.c,
- readelf.c, rename.c, resbin.c, rescoff.c, resrc.c, resres.c,
- size.c, srconv.c, stabs.c, strings.c, sysdump.c, sysinfo.y,
- syslex.l, unwind-ia64.c, unwind-ia64.h, version.c, windres.c,
- windres.h, winduni.c, winduni.h wrstabs.c, doc/fdl.texi
-
-2005-05-06 Jan Beulich <jbeulich at novell.com>
-
- * objcopy.c (copy_file): Don't delete output upon error here.
- (copy_main): Delete output upon error.
-
-2005-05-02 Ben Elliston <bje at au.ibm.com>
-
- * dlltool.c (dtab): Remove empty function.
- (process_duplicates): Remove calls to dtab().
-
-2005-05-01 Maciej W. Rozycki <macro at linux-mips.org>
-
- * doc/binutils.texi (strip, objcopy): Clarify the description of
- the "--strip-debug" option. Fix a typo.
-
-2005-04-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * bucomm.c: Undo the last change.
- * bucomm.h: Likewise.
-
-2005-04-29 Ben Elliston <bje at au.ibm.com>
-
- * syslex.l (word, number, unit): Remove unused variables.
- * nlmheader.y (keyword_tokens): Make static.
- * coffdump.c (dump_coff_symbol, coff_dump): Make static.
- * coffgrok.c (lofile, last_function_symbol, last_function_type,
- last_struct, last_enum, cur_sfile): Make variables static.
- * sysdump.c (getCHARS, fillup, getBARRAY, getINT, getBITS,
- sysroff_swap_tr_in, sysroff_print_tr_out): Make static.
- * sysinfo.y (writecode, it, code, repeat, oldrepeat, name, rdepth,
- names, pnames): Likewise.
-
-2005-04-29 Ben Elliston <bje at au.ibm.com>
-
- * ar.c (mri_mode): Make static.
- * arsup.c (obfd, real_name, outfile): Likewise.
- * binemul.c (ar_emul_create): Remove unused function.
- (ar_emul_default_create): Likewise.
- * binemul.h (ar_emul_create): Remove declaration.
- (ar_emul_default_create): Likewise.
- (struct bin_emulation_xfer_struct): Remove ar_create member.
- * bucomm.c (report): Make static.
- * bucomm.h (report): Remove declaration.
- * cxxfilt.c (mbuffer): Make static.
- (main): Use unsigned ints for some loop control variables.
- * readelf.c: Make many global variables static.
- * size.c (berkeley_format): Make static.
- (long_options): Likewise.
- * emul_aix.c (bin_aix_emulation): Remove ar_emul_default_create
- structure initialiser.
- (bin_aix5_emulation): Likewise.
- * emul_vanilla.c (bin_vanilla_emulation): Likewise.
-
-2005-04-27 Ben Elliston <bje at au.ibm.com>
-
- * syslex.l: Adjust top-of-file comment: this file is part of GNU
- binutils, not GNU ld.
-
-2005-04-25 Nick Clifton <nickc at redhat.com>
-
- PR872
- * objcopy.c (copy_archive): Initialise 'obfd' field of new
- name_list structure.
-
- * objcopy.c (copy_usage): Fix description of -K switch.
-
- * doc/binutils.texi (strip, objcopy): Fix description of -K
- switch.
-
-2005-04-20 Daniel Jacobowitz <dan at codesourcery.com>
-
- * readelf.c (display_debug_frames): Use data factor for
- DW_CFA_def_cfa_sf and DW_CFA_def_cfa_offset_sf.
-
-2005-04-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * objdump.c (dump_section_header): Skip linker created section.
-
-2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * objdump.c (dump_section_header): Support SEC_GROUP.
-
-2005-04-16 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (debug_apply_rela_addends): Remove redundant %s from
- printf string.
-
-2005-04-15 Nick Clifton <nickc at redhat.com>
-
- * objcopy.c (copy_file): Issue an error message when attmepting to
- copy an empty input file.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
- * configure.in: Include ../bfd/warning.m4 contents.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
+ * doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
-2005-04-12 Alan Modra <amodra at bigpond.net.au>
+2006-04-05 Eric Botcazou <ebotcazou at adacore.com>
- * Makefile.am: Run "make dep-am".
- (syslex.o, sysinfo.o, arparse.o, arlex.o): Add -Wno-error to command.
- (sysroff.o, defparse.o, deflex.o): Likewise.
- (nlmheader.o, rcparse.o, rclex.o): Likewise.
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * configure: Regenerate.
+ * addr2line.c (long_options): Add new option 'section'.
+ (usage): Document new -j/--section option.
+ (find_offset_in_section): New function.
+ (translate_addresses): Add 'section' parameter.
+ If it is non-null, call find_offset_in_section on it.
+ (process_file): Add 'section_name' parameter.
+ If it is non-null, look for the section in the BFD object.
+ Pass the section to translate_addresses.
+ (main): Handle new -j option.
+ Pass the section name to process_file.
+ * doc/binutils.texi (addr2line): Document new -j/--section option.
-2005-04-11 Jan Beulich <jbeulich at novell.com>
+2006-03-29 Ben Elliston <bje at au.ibm.com>
- * MAINTAINERS: Add myself as ix86 Intel mode maintainer.
+ * resbin.c: Avoid duplicating constants in calls to reswr_alloc.
-2005-04-06 Nick Clifton <nickc at redhat.com>
- H.J. Lu <hongjiu.lu at intel.com>
+2006-03-20 Nathan Sidwell <nathan at codesourcery.com>
- * po/rw.po: New translation: Kinyarwanda.
- * configure.in (ALL_LINGUAS): Add rw.
- * configure: Regenerate.
+ * BRANCHES: Remove binutils-csl-arm-2006q1-branch. Document
+ binutils-csl-2_17-branch instead.
-2005-04-04 Maciej W. Rozycki <macro at linux-mips.org>
+2006-03-20 Paul Brook <paul at codesourcery.com>
- * readelf.c (debug_apply_rela_addends): Reorder r_info as
- necessary for 64-bit MIPS.
+ * BRANCHES: Mention binutils-csl-arm-2006q1-branch.
-2005-04-04 Maciej W. Rozycki <macro at linux-mips.org>
+2006-03-16 Alan Modra <amodra at bigpond.net.au>
- * doc/binutils.texi (readelf): Remove a duplicate paragraph.
+ PR 2434
+ * ieee.c (write_ieee_debugging_info): Adjust bfd_hash_table_init calls.
+ * wrstabs.c (write_stabs_in_sections_debugging_info): Likewise.
-2005-04-04 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+2006-03-13 Ben Elliston <bje at au.ibm.com>
- PR binutils/813
- * objdump.c (dump_symbols): Add a check to see if the section for
- the symbol is chosen using process_section_p.
+ * bucomm.c (display_target_list): Make local variable `a' to be of
+ type enum bfd_architecture. Thus no need to cast enums to int.
+ (display_info_table): Likewise.
-2005-04-01 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-10 Paul Brook <paul at codesourcery.com>
- * NEWS: Mention new readelf options, "-N/--full-section-name"
- and "-g/--section-groups".
+ * readelf.c (decode_ARM_machine_flags): Handle EABIv5.
- * doc/binutils.texi: Document new readelf options,
- "-N/--full-section-name" and "-g/--section-groups".
+2006-03-10 Alan Modra <amodra at bigpond.net.au>
-2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
+ * dwarf.c (process_extended_line_op): Remove pointer_size param.
+ Use length instead to determine address size.
+ (get_pointer_size_and_offset_of_comp_unit): Delete.
+ (display_debug_lines): Adjust for above.
+ (display_debug_aranges): Don't stop on finding two zeros.
+ (display_debug_frames): For warning, print offset not pointer.
- * readelf.c (do_full_section_name): New.
- (options): Add "--full-section-name"/'N'.
- (usage): Add -N/--full-section-name.
- (parse_args): Handle 'N'.
- (process_section_headers): Print out the full section name if
- do_full_section_name isn't 0.
+2006-03-09 Danny Smith <dannysmith at users.sourceforge.net>
-2005-03-31 Nick Clifton <nickc at redhat.com>
+ * dlltool.c: Update copyright year.
+ * doc/binutils.texi: Likewise.
- * configure.in: Add a check for <unistd.h> providing a prototype
- for getopt() which is compatible with the one in
- include/getopt.h. If so then define HAVE_DECL_GETOPT.
- * configure: Regenerate.
- * config.in (HAVE_DECL_GETOPT): Add.
- * aclocal.m4: Regenerate.
- * addr2line.c: Include "config.h" before "bfd.h" so that
- HAVE_DECL_GETOPT is defined before getopt.h is included.
+2006-03-09 Danny Smith <dannysmith at users.sourceforge.net>
-2005-03-21 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+ * dlltool.c (add_stdcall_underscore): New flag.
+ (xlate): Also add underscore to stdcall symbol if
+ add_stdcall_underscore set.
+ (usage): Document --add-stdcall-underscore option.
+ (OPTION_ADD_STDCALL_UNDERSCORE): New define.
+ (long_options): Use it for --add-stdcall-underscore option.
+ (main): Handle it.
+ * doc/binutils.texi: Document --add-stdcall-underscore option
+ and differentiate from --add-underscore.
- * doc/binutils.texi: Document new VAX disassembler-specific option
- -M entry:0xfooba8.
- * NEWS: Mention the new option.
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
-2005-03-29 Anil Paranjpe <anilp1 at kpitcummins.com>
+ * readelf.c (get_machine_flags): Adjust.
- * MAINTAINERS: Add myself as H8300 maintainer.
+2006-03-03 Jakub Jelinek <jakub at redhat.com>
-2005-03-28 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+ * dwarf.c (frame_display_row, display_debug_frames): Handle
+ DW_CFA_val_offset, DW_CFA_val_offset_sf and DW_CFA_val_expression.
- * objdump.c (disassemble_bytes): Remove cast.
+2006-02-28 Nick Clifton <nickc at redhat.com>
-2005-03-25 Daniel Jacobowitz <dan at codesourcery.com>
+ * objcopy.c (use_alt_mach_code): Change type to unsigned long.
+ (copy_object): If bfd_alt_mach_code fails emit a more helpful
+ message and if the target architecture is ELF use the alternative
+ as replacement value for the e_machine number.
+ (copy_main): Use strtoul to parse the number provided with the
+ --alt-mach-code switch.
+ * doc/binutils.texi (--alt-mach-code): Document that this switch
+ can now set the absolute e_machine value.
- * BRANCHES: Add binutils-csl-arm-2005q1-branch and
- binutils-2_16-branch.
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
-2005-03-25 Mark Kettenis <kettenis at gnu.org>
+ * po/Make-in: Add html target.
- * MAINTAINERS: Add myself as M88k maintainer.
+2006-02-17 Nick Hudson <nick.hudson at dsl.pipex.com>
-2005-03-24 Danny Smith <dannysmith at users.sourceforge.net>
+ * readelf.c (get_machine_flags): Add logic for missing EF_SH flags.
- * winduni.c (unicode_from_ascii): Don't declare variables
- 's' and 'w' if _WIN32. Use MultiByteToWideChar to set the unicode
- string len.
+2006-02-14 Jakub Jelinek <jakub at redhat.com>
-2005-03-24 Dmitry Diky <diwil at spec.ru>
+ * config.in: Rebuilt.
- * MAINTAINERS: Add myself as MSP430 maintainer.
+2006-02-10 H.J. Lu <hongjiu.lu at intel.com>
-2005-03-23 Nick Clifton <nickc at redhat.com>
+ PR binutils/2258
+ * readelf.c (process_program_headers): Use
+ ELF_IS_SECTION_IN_SEGMENT_MEMORY.
- * po/fr.po: Updated translation.
+2006-02-09 Eric Botcazou <ebotcazou at libertysurf.fr>
-2005-03-22 Nick Clifton <nickc at redhat.com>
-
- * MAINTAINERS: Add Daniel Jacobwitz to the blanket write
- privileges list.
-
-2005-03-17 Paul Brook <paul at codesourcery.com>
- Dan Jacobowitz <dan at codesourcery.com>
- Mark Mitchell <mark at codesourcery.com>
-
- * binutils/readelf.c (get_arm_segment_type): New function.
- (get_segment_type): Use it.
-
-2005-03-18 Paul Brook <paul at codesourcery.com>
-
- * objdump.c (objdump_print_addr): Avoid uninitialized warning.
-
-2005-03-17 Diego Novillo <dnovillo at redhat.com>
-
- * MAINTAINERS: Remove self as maintainer of x86 intel
- mode.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
-
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
+ * configure.in (CHECK_DECLS): Add snprintf and vsnprintf.
* configure: Regenerate.
+ * objdump.c (fprintf): Remove declaration.
+ * bucomm.h (fprintf): Declare if not already declared.
+ (snprintf): Likewise.
+ (vsnprintf): Likewise.
-2005-03-15 Daniel Marques <marques at cs.cornell.edu>
- Nick Clifton <nickc at redhat.com>
+2006-02-08 H.J. Lu <hongjiu.lu at intel.com>
- * objcopy.c (globalize_specific_list): New linked list of symbols
- to convert from local binding into global binding.
- (command_line_switch): Add OPTION_GLOBALIZE_SYMBOL and
- OPTION_GLOBALIZE_SYMBOLS.
- (copy_options): Add "globalize-symbol" and "globalize-symbols".
- (copy_usage): Document the new switches.
- (filter_symbols): Convert defined local symbols mentioned on the
- globalize_specific_list into global symbols.
- (copy_object): Perform actions if the globalize_specific_list is
- not empty.
- (copy_main): Handle new switches.
- * NEWS: Mention new feature.
- * doc/binutils.texi: Document new switches.
+ * readelf.c (process_program_headers): Match PT_TLS segment
+ only with SHT_TLS sections.
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
- * po/es.po: Commit new Spanish translation.
+ * readelf.c (get_machine_flags): Add logic for EF_M68K flags.
- * po/fr.po: Commit new French translation.
+2006-02-02 H.J. Lu <hongjiu.lu at intel.com>
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
+ * readelf.c (process_program_headers): Undo the last change.
- * po/tr.po: Commit new Turkish translation.
+2006-02-02 H.J. Lu <hongjiu.lu at intel.com>
-2005-03-11 Nick Clifton <nickc at redhat.com>
+ * readelf.c (process_program_headers): Undo the change made on
+ 2004-09-22. Match PT_DYNAMIC segment only with SHT_DYNAMIC
+ sections.
- * po/fr.po: Updated French translation.
+2006-01-30 Nick Clifton <nickc at redhat.com>
-2005-03-10 Nick Clifton <nickc at redhat.com>
+ * objcopy.c (copy_object): Catch the case where an attempt is made
+ to add a section that already exists and produce a more helpful
+ warning message.
- * configure.in (ALL_LINGUAS): Add Romanian lingua "ro".
- * configure: Regenerate.
- * po/ro.po: New file.
+2006-01-26 Nick Clifton <nickc at redhat.com>
- * po/ru.po: Updated file.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/binutils.pot: Regenerate.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * ar.c (remove_output): Use unlink_if_ordinary instead of unlink.
- * objcopy.c (copy_file): Likewise.
- (strip_main): Likewise.
-
-2005-03-01 Stig Petter Olsroed <stigpo at users.sourceforge.net>
- Nick Clifton <nickc at redhat.com>
-
- * objdump.c: Fix coding for DISASSEMBLER_NEEDS_RELOC:
- (struct objdump_disasm_info): Add 'reloc' field.
- (disassemble_bytes): Fix check for when an insn has a reloc
- associated with it. Improve comment explaining why the use of
- octets is wrong. Set the 'reloc' field in objdump_disasm_info
- structure.
- (objdump_print_addr): Use new 'reloc' field to lookup the correct
- address for the symbol associated with the current instruction's
- relocation.
- (disassemble_info): Initialise 'reloc' field.
-
-2005-02-28 Jakub Jelinek <jakub at redhat.com>
-
- * readelf.c (get_file_type, get_machine_name, get_osabi_name,
- get_segment_type, get_section_type_name, get_elf_class,
- get_data_encoding, get_group_flags, dynamic_section_mips_val,
- get_symbol_binding, get_symbol_type, get_TAG_name, get_FORM_name,
- get_AT_name, process_mips_specific, process_gnu_liblist,
- get_note_type, get_netbsd_elfcore_note_type): Use snprintf instead of
- sprintf where needed.
- (get_dynamic_type): Likewise. Increase buff to 64 bytes.
- (get_elf_section_flags): Increase buff to 33 bytes. Avoid
- using strcat.
- (get_dynamic_flags): Renamed to...
- (print_dynamic_flags): ... this. Print the flags to stdout instead
- of returning them as string.
- (process_dynamic_section): Adjust caller.
-
-2005-02-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (display_debug_ranges): Print out offset for end of
- list.
-
-2005-02-23 Alan Modra <amodra at bigpond.net.au>
-
- * dlltool.c: Warning fixes.
- * objdump.c: Likewise.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (syslex.o, sysinfo.o): Pass AM_CFLAGS to compiler.
- (syslex.o, sysinfo.o, dlltool.o, rescoff.o): Remove duplicate
- dependencies. Run "make dep-am".
- * nlmconv.c: Warning fixes.
- * readelf.c: Likewise.
- * srconv.c: Likewise.
- * sysdump.c: Likewise.
- * sysinfo.y: Likewise.
- * syslex.l: Likewise. Use yyleng instead of strlen, memcpy instead
- of strcpy.
- * Makefile.in: Regenerate.
-
-2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * objcopy.c (parse_flags): Replace SEC_SHARED with
- SEC_COFF_SHARED.
-
- * objdump.c (dump_section_header): Dump SEC_TIC54X_BLOCK and
- SEC_TIC54X_CLINK for TI c54x only. Remove SEC_ARCH_BIT_0. Dump
- SEC_COFF_SHARED for COFF only.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am"
- * Makefile.in: Regenerate.
- * doc/Makefile.in: Regenerate.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (BYTE_GET8): Delete. Replace uses with BYTE_GET.
- (byte_get_little_endian): Don't handle size of -8.
- (byte_get_signed, byte_get_big_endian): Likewise.
- (print_dec_vma, print_hex_vma): New functions.
- (print_vma): Use them. Return chars output.
- (get_dynamic_data): Return a bfd_vma array. Add ent_size parm.
- (process_symbol_table): Handle alpha and s390 .hash.
-
-2005-02-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (display_debug_loc): Print out offset for end of
- list.
-
-2005-02-18 Joseph S. Myers <joseph at codesourcery.com>
-
- * Makefile.am (TOOL_PROGS): Add objdump.
- * Makefile.in: Regenerate.
-
-2005-02-17 Alan Modra <amodra at bigpond.net.au>
-
- * deflex.l (YY_NO_UNPUT): Define.
- * rclex.l (YY_NO_UNPUT): Define.
- * rcparse.y (null_unichar): New static var.
- (res_null_text): Use it rather than attempting to init from wchar_t.
- * windres.c: Include assert.h and time.h before getopt.h.
- Include config.h and unistd.h too.
-
-2005-02-15 Nick Clifton <nickc at redhat.com>
-
- * nlmconv.c: Provide a full prototype for the localtime() function
- in order to avoid a compile time warning.
-
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (group_count): Don't initialize it.
- (process_section_groups): Reurn 1 if we won't do unwind nor
- section groups. Set group_count to 0 before counting group
- sections and return 1 if there are no group sections. Reread
- SHT_SYMTAB/SHT_STRTAB sections only when needed. Don't skip
- section 0.
- (process_object): Only set do_unwind to 0 if
- process_section_groups return 0.
-
-2005-02-10 Ian Lance Taylor <ian at airs.com>
-
- * MAINTAINERS: Update my e-mail address.
-
-2005-02-10 Mark Mitchell <mark at codesourcery.com>
-
- * MAINTAINERS: Add Paul Brook and Mark Mitchell as ARM (Symbian)
- maintainers.
-
-2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
-
- * MAINTAINERS: Add self as maintainer of MAXQ.
-
-2005-01-31 Richard Sandiford <rsandifo at redhat.com>
-
- * readelf.c (eh_addr_size): New variable.
- (find_section): Move earlier in file. Return empty sections too.
- (process_program_headers): Use find_section to find .dynamic.
- (process_section_headers): Initialize eh_addr_size.
- (dump_ia64_unwind, slurp_ia64_unwind_table, ia64_process_unwind)
- (dump_hppa_unwind, slurp_hppa_unwind_table, hppa_process_unwind)
- (display_debug_frames): Use it instead of local addr_size variable.
- (size_of_encoded_value): Get pointer size from eh_addr_size rather
- than is_32bit_elf.
-
-2005-01-31 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * version.c (print_version): Bump the copyright date to 2005.
-
-2005-01-25 Alan Modra <amodra at bigpond.net.au>
-
- * nm.c (display_rel_file): Read dynamic syms before calling
- bfd_get_synthetic_symtab.
-
-2005-01-21 Ben Elliston <bje at au.ibm.com>
-
- * dlltool.c (dump_iat): Remove unused function.
- (gen_exp_file): Remove #if 0'd code.
- (make_one_lib_file): Likewise.
- * srconv.c: Remove #if 0'd code throughout.
- * size.c (lprint_number): Remove.
- (print_berkeley_format): Remove #if 0'd code.
- * ar.c (do_quick_append): Remove declaration and definiton.
- (main): Remove #if 0'd code.
- * filemode.c (filemodestring): Remove #if 0'd function.
- * sysdump.c (unit_info_list): Remove function.
- (object_body_list): Likewise.
- (program_structure): Likewise.
- (debug_list): Likewise.
- (module): Remove #if 0'd code.
-
-2005-01-20 Mark Mitchell <mark at codesourcery.com>
-
- * BRANCHES: Add binutils-2_15-branch.
-
- * MAINTAINERS: Document branch policy.
- * BRANCHES: New file.
-
-2005-01-19 Fred Fish <fnf at specifixinc.com>
-
- * NEWS: Make note of the new MIPS disassembly option "no-aliases".
- * doc/binutils.texi (objdump): Document the "no-aliases"
- disassembly option.
-
-2005-01-17 Eugene Kotlyarov <ekot at narod.ru>
-
- PR binutils/647
- * rcparse.y (RCDATA): Allow a filename to be supplied as the
- parameter. Parse it with define_rcdata_file().
- * resrc.c (define_rcdata_file): New function.
- * windres.h: Provide a prototype for the new function.
-
- * resrc.c (define_user_file): Fix typo by replacing "font file"
- with "file".
-
-2005-01-16 Jason Thorpe <thorpej at netbsd.org>
-
- * MAINTAINERS: Update my email address.
-
-2005-01-16 Danny Smith <dannysmith at users.sourceforge.net>
-
- * dlltool.c (set_dll_name_from_def): New function. Strip name
- to basename, with warning.
- (def_name): Use it.
- (def_library): Likwise.
- (main): Strip arg of --dllname to basename, with warning.
- Only use basename of exp_name when inferring dll_name.
-
-2005-01-11 Nick Clifton <nickc at redhat.com>
-
- PR binutils/637
- * doc/binutils.texi (c++filt): Use uppercase CXXFILT in the
- footnote in order to prevent the sed script in the Makefile from
- converting it into c++filt.
-
-2005-01-10 H.J. Lu <hongjiu.lu at intel.com>
-
- BZ 635
- readelf.c (saved_base_address): Removed.
- (decode_64bit_range): Likewise.
- (decode_range): Likewise.
- (display_64bit_debug_ranges): Likewise.
- (debug_info): Add range_lists, num_range_lists and
- max_range_lists.
- (read_and_display_attr_value): Handle do_debug_ranges.
- (process_debug_info): Likewise.
- (display_debug_ranges): Rewrite.
- (process_object): Free range_lists.
-
-2005-01-10 Andreas Schwab <schwab at suse.de>
-
- * configure.in: Don't define SKIP_ZEROES.
+ * po/vi.po: New Vietnamese translation.
+ * configure.in (ALL_LINGUAS): Add vi.
* configure: Regenerate.
- * objdump.c (disassemble_data): Set skip_zeroes and
- skip_zeroes_at_end in disasm_info to defaults.
- (DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define.
- (DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and
- always define.
- (disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from
- objdump_disasm_info.
-2005-01-05 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-18 Alexandre Oliva <aoliva at redhat.com>
- * readelf.c (display_debug_loc): Display base address
- specifiers. Always output <End of list>.
+ Introduce TLS descriptors for i386 and x86_64.
+ * readelf.c (get_dynamic_type): Handle DT_TLSDESC_GOT and
+ DT_TLSDESC_PLT.
-2005-01-05 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-18 Nick Clifton <nickc at redhat.com>
- * readelf.c (have_frame_base): New.
- (need_base_address): Likewise.
- (saved_base_address): Likewise.
- (decode_location_expression): Return 1 if DW_AT_frame_base is
- needed.
- (debug_info): Add base_address and a have_frame_base pointer.
- (read_and_display_attr_value): Replace saved_DW_AT_low_pc with
- saved_base_address. Record base address. Set have_frame_base.
- Record if a location list has DW_AT_frame_base. Display if a
- location expression has no DW_AT_frame_base but needs one. Set
- saved_base_address only if needed.
- (process_debug_info): Clear have_frame_base, saved_base_address
- and set need_base_address.
- (display_debug_loc): Display if a location expression has no
- DW_AT_frame_base but needs one. Display if start >= end. Don't
- adjust for section address. Properly handle base address.
- (process_object): Free the have_frame_base pointer in
- debug_info.
-
-2005-01-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (display_debug_loc): Display offsets for hole and
- overlap.
- (display_debug_str): Add a newline at the end.
-
-2005-01-04 Armin Diehl <diehl at nordrhein.de>
-
- PR binutils/630
- * nlmconv.c (main): Only store the basename of the output filename
- in the module table.
-
-2005-01-04 H.J. Lu <hongjiu.lu at intel.com>
-
- BZ 615
- * readelf.c (process_debug_info): New.
- (debug_info): Add num_loc_offsets, loc_offsets and
- last_loc_offset_p.
- (get_debug_info): Use process_debug_info.
- (display_debug_loc): Properly handle location list. Warn if bad
- location lists are encoutnered.
- (read_and_process_attr_value): New.
- (read_and_display_attr_value): Use "%lx" for DW_FORM_data4.
- (display_debug_info): Use process_debug_info.
- (process_object): Also free loc_offsets in debug_information.
-
-2004-12-31 Alan Modra <amodra at bigpond.net.au>
-
- * objdump.c (remove_useless_symbols): Discard section symbols.
-
-2004-12-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (read_leb128): Support 64bit host.
-
-2004-12-23 Nick Clifton <nickc at redhat.com>
-
- PR binutils/616
- * readelf.c (debug_info): Add 'cu_offset' field.
- (get+pointer_size_of_comp_unit): Rename to
- 'get_pointer_size_and_offset_of_comp_unit'. Add code to return
- the offset of the comp_unit if requested.
- (get_debug_info): Record comp_unit offsets as well.
- (display_debug_lines): Call get_pointer_size_of_comp_unit.
- (decode_location_expression): Add an extra parameter - the offset
- of the current comp-unit. Use this when decoding the DW_OP_call2
- and DW_OP_call4 operators.
- (display_debug_loc): Call get_pointer_size_of_comp_unit, pass the
- comp_unit offset on the decode_location_expression.
- (read_and_display_attr_value): Pass the comp_unit offset on the
- decode_location_expression.
- (display_debug_frames): Pass 0 as the comp_unit offset to
- decode_location_expression.
-
-2004-12-22 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (last_pointer_size, warned_about_missing_comp_units):
- New variables associated with obtaining the pointer size for a
- comp_unit.
- (get_pointer_size_of_comp_unit): Add an extra parameter - the name
- of the section requesting the pointer size. Use this name in
- error messages. If there are not enough comp_units available
- produce a warning message, but return the last known pointer size
- so that section dumping can continue.
- (get_debug_info): Reset the new variables.
- (display_debug_lines): Add extra parameter to invocation of
- get_pointer_size_of_comp_unit and remove error message when it
- returns 0.
- (display_debug_loc): Likewise.
-
-2004-12-15 Jan Beulich <jbeulich at novell.com>
-
- * doc/binutils.texi: Document --strip-unneeded-symbol and
- --strip-unneeded-symbols.
- * objcopy.c (strip_unneeded_list): New.
- (enum command_line_switch): Add OPTION_STRIP_UNNEEDED_SYMBOL
- and OPTION_STRIP_UNNEEDED_SYMBOLS.
- (copy_options): Add --strip-unneeded-symbol and
- --strip-unneeded-symbols.
- (copy_usage): Likewise.
- (filter_symbols): Suppress copying of symbol if in strip_unneeded_list
- and the symbol is not needed.
- (copy_main): Handle OPTION_STRIP_UNNEEDED_SYMBOL and
- OPTION_STRIP_UNNEEDED_SYMBOLS.
-
-2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
-
- * readelf.c (get_machine_flags): Handle E_MIPS_MACH_9000.
-
-2004-12-08 Ben Elliston <bje at au.ibm.com>
-
- * arlex.l: Fix formatting.
-
-2004-12-08 Ben Elliston <bje at au.ibm.com>
-
- * doc/Makefile.am (config.texi): Emit a @set UPDATED command to
- config.texi whose value is the current month and year.
- * doc/Makefile.in: Rebuild.
- * doc/binutils.texi: Set the document subtitle to be the value of
- the Texinfo UPDATED variable (obtained from config.texi).
-
-2004-12-07 Ben Elliston <bje at au.ibm.com>
-
- PR binutils/249
- * doc/binutils.texi (def file format): New node.
- (dlltool): Use the tool name as the @chapter name, like all the
- other binutils. Use @file{.def} throughout for consistency.
-
-2004-12-06 Ben Elliston <bje at au.ibm.com>
-
- * dlltool.c: Comment fix.
-
-2004-12-06 Ben Elliston <bje at au.ibm.com>
-
- * doc/binutils.texi: Update copyright years.
-
-2004-12-03 Richard Sandiford <rsandifo at redhat.com>
-
- * MAINTAINERS: Remove mention of config.if.
-
-2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
-
- * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ PR binutils/1391
+ * objcopy.c (copy_object): For PE format targets set the VMA of a
+ newly created gnu_debuglink section to a non-zero, aligned,
+ contiguous value.
+ * Makefile.am (objcopy.c): Add a dependency upon libbfd.h.
* Makefile.in: Regenerate.
-2004-11-10 Ian Lance Taylor <ian at wasabisystems.com>
+2006-01-17 Andreas Schwab <schwab at suse.de>
- PR binutils/536
- * stabs.c (stab_demangle_template): Call stab_demangle_count
- rather than stab_demangle_get_count to get the length of a pointer
- target.
-
-2004-11-10 Danny Smith <dannysmith at users.sourceforge.net>
-
- * defparse.y: Remove unnecessary commas from token list.
-
-2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * doc/binutils.texi (nm): Update description of weak symbols.
-
-2004-11-03 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (do_debug_ranges): New variable.
- (usage): Document new switch: -wR or --debug-dump=Ranges.
- (parse_args): Handle new switch. Replace switch statement for the
- long options with a more compact table structure.
- (process_section_headers): Allow the dumping of .debug_ranges
- sections if so requested.
- (debug_displays): Likewise.
- (load_debug_range): New function: Grabs the contents of a
- .debug_ranges section.
- (free_debug_range): New function: Releases the grabbed
- .debug_ranges section.
- (decode_64bit_range): New function: Displays a 64-bit range in a
- .debug_ranges section.
- (decode_range): New function: Displays a 32-bit range in a
- .debug_ranges section.
- (read_and_display_attr_value): Record the value of DW_AT_low_pc
- attributes. Use decode_ranges() to display a DW_AT_ranges
- attribute.
- (display_debug_info): Use load_debug_range() and
- free_debug_range().
- (display_64bit_debug_ranges): New function. Displays the contents
- of a 64-bit format .debug_ranges section.
- (display_debug_ranges): New function: Displays the contents of a
- 32-bit .debug_ranges section.
-
- (main): Move cmdline_dump_sects and num_cmdline_dump_sects into the
- global scope.
- (process_object): Initialise the dump_sects array from the
- cmdline_dump_sects array before processing each object file.
-
- (streq, strneq): New macros. Use them to replace occurrences of
- strcmp() and strncmp().
-
- (debug_information): New structure array to replace
- debug_line_pointer_sizes array.
- (num_debug_info_entries): New variable to replace
- num_debug_line_pointers.
- (get_pointer_size_of_comp_unit): New function: Returns the pointer
- size of a given compilation unit.
- (get_debug_info): New function to replace
- get_debug_line_pointer_sizes.
- (display_debug_lines): Use the new functions.
- (display_debug_loc): Likewise.
-
- (disassemble_section): Change return type to int.
- (display_debug_lines): Move local variables to their
- innermost scope.
- (display_debug_section): Likewise. Also record the return value
- of functions called and pass this back to the parent. Also only
- warn about undumped sections when the user explicitly requested
- their dumping.
-
- (debug_apply_rela_addends): Allow relocations against STT_OBJECT
- types as well.
-
- * NEWS: Mention the support for decoding .debug_ranges sections.
- * doc/binutils.texi: Document the new command line switch to
- readelf.
-
-2004-11-03 Randolph Chung <tausq at debian.org>
-
- * readelf.c (ia64_unw_aux_info, ia64_unw_table_entry): Rename from
- unw_aux_info and unw_table_entry.
- (find_symbol_for_address): Pass symtab and strtab info explicitly.
- (dump_ia64_unwind): Rename unw_{aux_info,table_entry} with ia64_
- prefix.
- (slurp_ia64_unwind_table): Likewise.
- (ia64_process_unwind): Rename from old process_unwind.
- (hppa_unw_aux_info): New.
- (dump_hppa_unwind): New.
- (slurp_hppa_unwind_table): New.
- (hppa_process_unwind): New.
- (process_unwind): Factor out common unwinding checks; dispatch to
- unwind handler based on machine type.
-
-2004-11-02 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (display_debug_lines): Fix typo in error message.
-
-2004-10-26 Mark Mitchell <mark at codesourcery.com>
-
- * readelf.c (get_note_type): Handle notes not in core files.
- (process_note_sections): New function.
- (process_corefile_contents): Rename to ...
- (process_notes): ... this.
- (process_object): Call process_notes, not
- process_corefile_contents.
- * doc/binutils.texi: Update readelf -n documentation.
-
-2004-10-26 Jakub Jelinek <jakub at redhat.com>
-
- * ar.c (extract_file): Set atime to mtime for ar xo.
-
-2004-10-25 Ian Lance Taylor <ian at wasabisystems.com>
-
- * stabs.c (stab_demangle_v3_arglist): New static function, broken
- out of stab_demangle_v3_argtypes.
- (stab_demangle_v3_argtypes): Call it.
- (stab_demangle_v3_arg): Handle DEMANGLE_COMPONENT_FUNCTION_TYPE.
- If we find an unrecognized component, print out its number.
-
-2004-10-25 David Mosberger <davidm at hpl.hp.com>
-
- * readelf.c (slurp_ia64_unwind_table): Support relocations against
- non-section symbols by adding in the symbol value.
-
-2004-10-25 Nick Clifton <nickc at redhat.com>
-
- PR 465
- * readelf.c (dynamic_strings_length): New global variable.
- (VALID_DYNAMIC_NAME, GET_DYNAMIC_NAME): New macros for accessing
- strings in the dynamic string table.
- (process_section_headers): Initialise dynamic_strings_length.
- (process_dynamic_section): Likewise.
- (process_object): Reset dynamic_string_length when the buffer is freed.
- (dynamic_sections_mips_val): Use the new macros.
- (process_dynamic_section): Likewise.
- (process_version_sections): Likewise.
- (process_symbol_table): Likewise.
- (process_syminfo): Likewise.
- (process_mips_specific): Likewise.
- (dump_relocations): Add a new parameter 'strtablen' and use this
- to verify that string offset in a given reloc is valid. Print a
- suitable error message otherwise.
- (process_relocs): Pass the new argument to dump_relocations.
-
-2004-10-23 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * dlltool.c: Include <assert.h>.
- (PREFIX_ALIAS_BASE): Define.
- (struct export): Add member import_name;
- (def_exports): Set import_name.
- (make_one_lib_file): Remove prefix alias code, use import_name
- in .idata$6.
- (gen_lib_file): Create and delete aliases.
-
-2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (process_section_groups): Free symtab after use.
-
-2004-10-18 Tommy Pettersson <ptp at lysator.liu.se>
- Nick Clifton <nickc at redhat.com>
-
- * strings.c (usage): Place radix values for -t option into the
- correct order.
-
- * objcopy.c (add_redefine_syms_file): Change error messages to use
- <filename>:<linenumber>: format for easier parsing by automatic
- tools.
-
- * srconv.c (show_usage): Fix spelling typo.
-
- * windres.c (format_from_filename): Suggest the use of -J instead
- of -I if the file type cannot be determined.
-
-2004-10-18 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * strings.c: Include <sys/stat.h>.
-
-2004-10-18 Alan Modra <amodra at bigpond.net.au>
-
- * budemang.c (demangle): Fix thinko.
-
- * budemang.c (demangle): Handle "@plt" suffix.
-
-2004-10-14 Nick Clifton <nickc at redhat.com>
-
- * nm.c (usage): Fix description of --special-syms switch.
-
-2004-10-13 Jakub Jelinek <jakub at redhat.com>
-
- * strings.c (statbuf): New typedef.
- (file_stat): Define.
- (strings_object_file): Avoid using get_file_size, instead do the
- checks here, using file_stat.
- * configure.in (HAVE_STAT64): New test.
- * configure: Rebuilt.
- * config.in: Rebuilt.
-
-2004-10-12 Paul Brook <paul at codesourcery.com>
-
- * readelf.c (decode_ARM_machine_flags): Support EABI version 4.
-
-2004-10-11 Alan Modra <amodra at bigpond.net.au>
-
- * objdump.c (dump_symbols): Fix thinko last change. Improve error
- messages.
-
-2004-10-08 Nick Clifton <nickc at redhat.com>
-
- * nm.c: Add a new switch --special-syms which, if enabled, will
- include the ARM Mapping symbols in nm's output.
- (usage): Mention the switch.
- (filter_symbols): Handle the switch.
- * objdump.c: Add a similar switch.
- (usage): Mention the switch.
- (dump_symbols): Handle the switch.
- * doc/binutils.texi: Document the new switches.
- * NEWS: Mention the new switches.
-
-2004-10-08 Daniel Jacobowitz <dan at debian.org>
-
- * readelf.c (get_x86_64_section_type_name): New function.
- (get_section_type_name): Use it.
-
-2004-10-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * dlltool.c (make_one_lib_file): Revert 2004-09-02 and 2004-09-04
- patches.
- * doc/binutils.texi (dlltool): Revert 2004-09-06 patch.
-
-2004-10-07 Alexandre Oliva <aoliva at redhat.com>
-
- * readelf.c (get_machine_flags): Don't fall through into m68k cpu
- types.
-
-2004-10-01 Paul Brook <paul at codesourcery.com>
-
- * readelf.c (get_arm_section_type_name): New function.
- (get_section_type_name): Use it.
-
-2004-09-28 Nick Clifton <nickc at redhat.com>
-
- * nm.c: Reorder functions to eliminate most of the static function
- prototypes.
-
-2004-09-22 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (process_program_headers): Don't include .tbss in non-TLS
- segments.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * config.in: Regenerate.
+ PR binutils/1486
+ * configure.in: Don't define DISASSEMBLER_NEEDS_RELOCS.
* configure: Regenerate.
- * doc/Makefile.in: Regenerate.
- * po/binutils.pot: Regenerate.
+ * objdump.c (struct objdump_disasm_info): Don't check for
+ DISASSEMBLER_NEEDS_RELOCS.
+ (objdump_print_addr): Likewise.
+ (disassemble_bytes): Check disassembler_needs_relocs from
+ disassemble_info at run-time instead of DISASSEMBLER_NEEDS_RELOCS
+ at compile-time.
+ (disassemble_section): Likewise.
+ (disassemble_data): Initialize it.
-2004-09-12 Alan Modra <amodra at bigpond.net.au>
+2006-01-11 Alan Modra <amodra at bigpond.net.au>
- * readelf.c (decode_location_expression): Sign extend value for
- DW_OP_const1s, DW_OP_const2s, DW_OP_const4s, DW_OP_bra, DW_OP_skip.
+ * objcopy.c (copy_object): Fix thinko.
-2004-09-09 Nick Clifton <nickc at redhat.com>
+ * objcopy.c (copy_object): Set isympp and osympp to NULL after free.
- PR 363
- * ar.c (replace_members): Do not use get_file_size as
- ar_emul_append correctly handles missing files.
+2006-01-09 Mike Frysinger <vapier at gentoo.org>:
-2004-09-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * configure: Regenerated with autconfig 2.13.
-
-2004-09-06 Danny Smith <dannysmith at users.sourceforge.net>
-
- * doc/binutils.texi (dlltool): Update --add-underscore, --kill-at
- documentation.
-
-2004-09-06 Michael Wardle <mbw at endbracket.net>
-
- * doc/binutils.texi (objdump): Document that the -x switch includes
- the effect of the -p switch.
-
-2004-09-04 Danny Smith <dannysmith at users.sourceforge.net>
-
- * dlltool.c (make_one_lib_file): Test if internal_name was
- specified by user before using it.
-
-2004-09-02 Carlo Wood <carlo at alinoe.com>
-
- PR binutils/351
- * dlltool.c (make_one_lib_file): For IDATA6 take the name from
- exp->internal_name if it is present.
-
-2004-09-02 Alexandre Oliva <aoliva at redhat.com>
-
- * MAINTAINERS: Add self as co-maintainer of FR-V.
- * readelf.c (get_machine_flags): Print FR-V cpu types.
-
-2004-08-28 Alan Modra <amodra at bigpond.net.au>
-
- * nm.c (show_synthetic): New var.
- (long_options): Add "synthetic".
- (usage): Here too.
- (display_rel_file): Handle show_synthetic.
-
-2004-08-28 Alan Modra <amodra at bigpond.net.au>
-
- * objdump.c (dump_bfd): Pass both symbol tables to
- bfd_get_synthetic_symtab.
-
-2004-08-17 Jakub Jelinek <jakub at redhat.com>
-
- * objdump.c (dump_bfd): For relocatable objects, pass syms instead
- of dynsyms to bfd_get_synthetic_symtab.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (debug_apply_rela_addends): New function, extracted from..
- (display_debug_info): ..here.
- (display_debug_frames): Call debug_apply_rela_addends. Don't do
- DW_EH_PE_pcrel adjustment for ET_REL.
-
-2004-08-06 Andreas Schwab <schwab at suse.de>
-
- * readelf.c (dump_relocations): Fix typo when calculating
- sec_index.
-
-2004-08-02 Jakub Bogusz <qboosh at pld-linux.org>
-
- * dllwrap.c (deduce_name): Fix typos introduced when program_name
- was renamed to prog_name.
-
-2004-07-29 Alexandre Oliva <aoliva at redhat.com>
-
- * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
- EF_SH2A_NOFPU.
-
-2004-07-28 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-07-08 Alexandre Oliva <aoliva at redhat.com>
- * readelf.c (get_machine_flags <EM_SH)): Handle EF_SH4_NOFPU and
- EF_SH4A_NOFPU.
- 2003-06-12 Alexandre Oliva <aoliva at redhat.com>
- * readelf.c (get_machine_flags <EM_SH>): Print SH ISA name.
-
-2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * objcopy.c (filter_symbols): Use bfd_coff_get_comdat_section
- to access comdat.
- * objdump.c (dump_section_header): Likewise.
-
-2004-07-15 Aravinda PR <aravindapr at rediffmail.com>
-
- * nlmconv.c (main): Pass map_file argument to link_inputs.
- (link_inputs): Use map_file argument if it is defined.
-
-2004-07-13 Nick Clifton <nickc at redhat.com>
-
- * dllwrap.c: Replace 'program_name' with 'prog_name' to avoid
- conflicts with exported global defined in bucomm.h.
- (deduce_name): Rename parameter 'program_name' to 'name' to avoid
- shadowing the global defined in bucomm.h.
-
-2004-07-12 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * dlltool.c (ext_prefix_alias): New global variable.
- (make_one_lib_file): Add aliases with prefixes for external
- and import definitions.
- (usage): Document -p option.
- (long_options): Add --ext-prefix-alias option.
- (main): Handle -p.
- * doc/binutils.texi: Document new switch.
- * NEWS: Mention new switch.
-
-2004-07-09 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * binutils/dlltool.c (asm_prefix): Add parameter: name.
- No underscore for symbols beginning with ?.
- (ASM_PREFIX): Add parameter: NAME.
- (gen_exp_file): Use new parameter.
- (make_label): Likewise.
- (make_imp_label): Likewise.
- (make_one_lib_file): Likewise.
-
-2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * MAINTAINERS: Added myself to the list.
- * readelf.c: Include "elf/crx.h".
- (guess_is_rela): Handle EM_CRX.
+ * readelf.c (guess_is_rela): Add case for Nios/Nios II.
(get_machine_name): Likewise.
- (dump_relocations): Likewise.
-2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * doc/binutils.texi (nm): Clarify weak symbol description.
-
-2004-06-24 Ben Elliston <bje at au.ibm.com>
-
- * readelf.c (get_segment_type): Display "GNU_STACK", not just
- "STACK", when a PT_GNU_STACK segment is encountered.
-
-2004-06-24 Alan Modra <amodra at bigpond.net.au>
-
- * objcopy.c (copy_section): Don't set _cooked_size.
-
-2004-06-22 Alan Modra <amodra at bigpond.net.au>
-
- * readelf.c (Elf32_Word): Delete.
- (get_32bit_dynamic_section): Handle SGI ELF dynamic segment.
- (get_64bit_dynamic_section): Likewise.
-
- * readelf.c (get_32bit_dynamic_section): Stop at first DT_NULL entry.
- (get_64bit_dynamic_section): Likewise.
-
- * readelf.c (dynamic_nent): New variable.
- (get_32bit_dynamic_section): Set it.
- (get_64bit_dynamic_section): Here too.
- (process_dynamic_section): Use it instead of dynamic_size.
- (process_syminfo): Likewise.
-
- * readelf.c (get_32bit_dynamic_section): Correct number of entries
- translated from external to internal form.
- (get_64bit_dynamic_section): Likewise.
-
-2004-06-18 Jie Zhang <zhangjie at magima.com.cn>
-
- * readelf.c (process_program_headers): When locating the dynamic
- section use the section table if it is present.
- (dynamic_segment): Renamed to dynamic_section.
- Replace references to dynamic segment with references to dynamic
- section, except where appropriate.
- (dynamic_segment_mips_val): Rename to dynamic_section_mips_val.
- (dynamic_segment_parisc_val): Rename to dynamic_section_parisc_val.
- (dynamic_segment_ia64_val): Rename to dynamic_section_ia64_val.
- (get_32bit_dynamic_segment): Rename to get_32bit_dynamic_section.
- Remove tag counting code as it is no longer needed.
- (get_64bit_dynamic_segment): Rename to get_64bit_dynamic_section.
- Remove tag counting code as it is no longer needed.
- (process_dynamic_segment): Rename to process_dynamic_section.
-
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
-
- * objcopy.c (copy_section): Use bfd_get_section_size instead of
- _raw_size or bfd_get_section_size_before_reloc. Don't set reloc_done.
- (compare_section_lma): Likewise.
- * addr2line.c (find_address_in_section): Likewise.
- * coffgrok.c (do_sections_p1): Likewise.
- * dlltool.c (scan_drectve_symbols): Likewise.
- * nlmconv.c (main): Likewise.
- (copy_sections): Likewise.
- (powerpc_mangle_relocs): Likewise.
- * objdump.c (disassemble_section): Likewise.
- * prdbg.c (find_address_in_section): Likewise.
- * size.c (berkeley_sum): Likewise.
- * srconv.c (wr_ob): Likewise.
- * strings.c (strings_a_section): Likewise.
-
-2004-05-28 Ian Lance Taylor <ian at wasabisystems.com>
-
- * readelf.c (decode_ARM_machine_flags): Add EF_ARM_VFP_FLOAT.
-
-2004-05-17 David Heine <dlheine at tensilica.com>
-
- * objcopy.c (setup_bfd_headers): New function.
- (copy_object): Call setup_bfd_headers.
-
-2004-05-13 Paul Brook <paul at codesourcery.com>
-
- * readelf.c (display_debug_frames): Handle dwarf3 format CIE
- entries.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-05-11 Jakub Jelinek <jakub at redhat.com>
-
- * readelf.c (get_segment_type): Handle PT_GNU_RELRO.
-
-2004-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (section_groups): New.
- (group_count): New.
- (section_headers_groups): New.
- (process_section_groups): Populate group_count, section_groups
- and section_headers_groups.
- (process_unwind): Support section group.
- (process_object): Always call process_section_groups. Free
- section_groups and section_headers_groups.
-
-2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (process_section_headers): Use %3lu on sh_info.
-
-2004-04-30 Michael Deutschmann <michael at talamasca.ocis.net>
-
- * ranlib.sh: Quote $1 argument in case it contains spaces.
-
-2004-04-27 John Paul Wallington <jpw at gnu.org>
-
- * objcopy.c (copy_usage, strip_usage): Fix spelling.
-
-2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * readelf.c (do_section_groups): New.
- (options): Add --section-groups/-g.
- (usage): Mention --section-groups/-g.
- (parse_args): Support --section-groups/-g.
- (get_group_flags): New.
- (process_section_groups): New.
- (process_object): Call process_section_groups.
-
-2004-04-24 Alan Modra <amodra at bigpond.net.au>
-
- * objdump.c (disassemble_section): Don't disassemble sections
- without SEC_HAS_CONTENTS.
-
-2004-04-22 Jakub Jelinek <jakub at redhat.com>
-
- * objdump.c (synthsyms, synthcount): New variables.
- (disassemble_data): Use dynsyms for stripped binaries or libraries.
- Add synthetized symbols.
- (dump_bfd): For disassemble, initialize dynsyms always and
- also synthsyms. Free synthsyms and clear {sym,dynsym,synth}count
- before returning.
-
-2004-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * strings.c (print_strings): Cast file_off to unsigned long in
- printf arg list.
-
-2004-04-07 Benjamin Monate <benjamin.monate at cea.fr>
-
- PR 86
- * arsup.c (ar_save): Use smart_rename.
-
-2004-04-01 Dean Luick <luick at cray.com>
-
- * readelf.c (display_debug_pubnames): Align offset and data
- columns.
- (read_and_display_attr_value): Add missing break;
- (debug_displays): Enable the display of the .debug_pubtypes
- section.
-
-2004-03-30 Stan Shebs <shebs at apple.com>
-
- * mpw-config.in, mpw-make.sed, mac-binutils.r: Remove MPW
- support files, no longer used.
-
-2004-03-23 Paul Brook <paul at codesourcery.com>
-
- * readelf.c (decode_ARM_machine_flags): Add EABI v3.
-
-2004-03-21 Richard Henderson <rth at redhat.com>
-
- * readelf.c (display_debug_frames): Don't crash for mismatched
- DW_CFA_restore_state.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * configure: Regenerate.
- * po/binutils.pot: Regenerate.
-
-2004-03-15 Nathan Sidwell <nathan at codesourcery.com>
-
- * objdump.c (struct SFILE): Replace current pointer with pos
- offset, rename size to alloc.
- (objdump_sprintf): Avoid unnecessary copies in the common case
- (disassemble_bytes): Keep sfile live throughout the
- function. Adjust usage appropriately.
-
-2004-03-10 Ben Elliston <bje at gnu.org>
-
- * MAINTAINERS: Update my mail address.
-
-2004-03-08 Danny Smith <dannysmith at users.sourceforge.net>
-
- * deflex.l: Handle "PRIVATE" string.
- * defparse.y (%token): Add PRIVATE.
- (%type): Add opt_PRIVATE.
- (expline): Pass opt_PRIVATE to def_exports.
- (opt_PRIVATE): Handle PRIVATE token.
- * dlltool.h (def_exports): Add 7th param for private flag to
- declaration.
- * dlltool.c: Add PRIVATE to comment on EXPORTS syntax.
- (struct export): Add 'private' field.
- (def_exports): Set 'private' field of struct exports.
- (scan_drectve_symbols): Adjust calls to def_exports.
- (scan_filtered_symbols): Likewise.
- (dump_def_info): Print 'private' field.
- (gen_def_file): Likewise.
- (gen_lib_file): Skip generation of lib object if private.
- Delete tmp object files in same order as they were generated.
- Don't delete non-existent private object files.
-
-2004-02-27 Andreas Schwab <schwab at suse.de>
-
- * ar.c (main): Support POSIX-compatible argument parsing.
-
-2004-02-23 Daniel Lucq <daniel at lucq.org>
-
- * readelf.c (process_mips_specific): Print conflictsno as an
- unsigned long.
-
-2004-02-21 Dmitry Timoshkov <dmitry at baikal.ru>
-
- * dlltool.c (gen_exp_file): Always output names for forwarded symbols.
-
-2004-02-19 Jakub Jelinek <jakub at redhat.com>
-
- * objcopy.c (copy_section): Avoid warnings.
-
-2004-02-14 Andrew Cagney <cagney at redhat.com>
-
- * ar.c (remove_output): Use bfd_cache_close.
- * arsup.c (ar_end): Ditto.
-
-2004-01-21 Roland McGrath <roland at redhat.com>
-
- * readelf.c (get_note_type): Match NT_AUXV.
-
-2004-01-20 Nick Clifton <nickc at redhat.com>
-
- * version.c (print_version): Update copyright year to 2004.
-
-2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
- throughout.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
-
-2004-01-12 Jakub Jelinek <jakub at redhat.com>
-
- * objcopy.c: Include elf-bfd.h.
- (is_strip_section): Don't strip debugging sections if
- STRIP_NONDEBUG.
- (setup_section): If STRIP_NONDEBUG make SEC_ALLOC sections
- ~(SEC_LOAD | SEC_HAS_CONTENTS) and on ELF targets also SHT_NOBITS.
-
- * objcopy.c (copy_section): Free relpp if relcount == 0.
-
-2004-01-12 Ian Lance Taylor <ian at wasabisystems.com>
-
- * stabs.c (parse_stab_argtypes): Handle g++ ABI version 3 names.
- (stab_demangle_argtypes): Likewise.
- (stab_demangle_v3_argtypes): New static function.
- (stab_demangle_v3_arg): New static function.
-
-2004-01-12 Nick Clifton <nickc at redhat.com>
-
- * objcopy.c (copy_object): Make the function boolean, returning
- FALSE upon failure.
- (copy_archive): Handle the return value from copy_object.
- (copy_file): Likewise.
-
-2004-01-07 Nick Clifton <nickc at redhat.com>
-
- * readelf.c (find_section): New function. Locates a named
- section.
- (get_debug_line_pointer_sizes): New function: Initialises the
- debug_line_pointer_sizes array.
- (display_debug_lines): Call get_debug_line_pointer_sizes.
- (display_debug_loc): Likewise.
- (load_debug_loc): Use find_section.
- (load_debug_str): Likewise.
- (display_debug_info): Likewise.
- (prescan_debug_info): Delete.
- (debug_displays): Remove prescan field.
- (process_section_contents): Do not perform prescans.
-
-2004-01-03 Alan Modra <amodra at bigpond.net.au>
-
- * objcopy.c (filter_bytes): Delete. Move code to..
- (copy_section): ..here. Simplify size adjustment. Divide
- section lma by interleave.
-
-2004-01-02 Nick Clifton <nickc at redhat.com>
-
- * po/ru.po: New file: Russian translation.
- * configure.in (ALL_LINGUAS): Add ru
- * configure: Regenerate.
-
-For older changes see ChangeLog-0203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/binutils/ChangeLog-2004
===================================================================
--- branches/binutils/package/binutils/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,793 @@
+2004-12-31 Alan Modra <amodra at bigpond.net.au>
+
+ * objdump.c (remove_useless_symbols): Discard section symbols.
+
+2004-12-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (read_leb128): Support 64bit host.
+
+2004-12-23 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/616
+ * readelf.c (debug_info): Add 'cu_offset' field.
+ (get+pointer_size_of_comp_unit): Rename to
+ 'get_pointer_size_and_offset_of_comp_unit'. Add code to return
+ the offset of the comp_unit if requested.
+ (get_debug_info): Record comp_unit offsets as well.
+ (display_debug_lines): Call get_pointer_size_of_comp_unit.
+ (decode_location_expression): Add an extra parameter - the offset
+ of the current comp-unit. Use this when decoding the DW_OP_call2
+ and DW_OP_call4 operators.
+ (display_debug_loc): Call get_pointer_size_of_comp_unit, pass the
+ comp_unit offset on the decode_location_expression.
+ (read_and_display_attr_value): Pass the comp_unit offset on the
+ decode_location_expression.
+ (display_debug_frames): Pass 0 as the comp_unit offset to
+ decode_location_expression.
+
+2004-12-22 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (last_pointer_size, warned_about_missing_comp_units):
+ New variables associated with obtaining the pointer size for a
+ comp_unit.
+ (get_pointer_size_of_comp_unit): Add an extra parameter - the name
+ of the section requesting the pointer size. Use this name in
+ error messages. If there are not enough comp_units available
+ produce a warning message, but return the last known pointer size
+ so that section dumping can continue.
+ (get_debug_info): Reset the new variables.
+ (display_debug_lines): Add extra parameter to invocation of
+ get_pointer_size_of_comp_unit and remove error message when it
+ returns 0.
+ (display_debug_loc): Likewise.
+
+2004-12-15 Jan Beulich <jbeulich at novell.com>
+
+ * doc/binutils.texi: Document --strip-unneeded-symbol and
+ --strip-unneeded-symbols.
+ * objcopy.c (strip_unneeded_list): New.
+ (enum command_line_switch): Add OPTION_STRIP_UNNEEDED_SYMBOL
+ and OPTION_STRIP_UNNEEDED_SYMBOLS.
+ (copy_options): Add --strip-unneeded-symbol and
+ --strip-unneeded-symbols.
+ (copy_usage): Likewise.
+ (filter_symbols): Suppress copying of symbol if in strip_unneeded_list
+ and the symbol is not needed.
+ (copy_main): Handle OPTION_STRIP_UNNEEDED_SYMBOL and
+ OPTION_STRIP_UNNEEDED_SYMBOLS.
+
+2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * readelf.c (get_machine_flags): Handle E_MIPS_MACH_9000.
+
+2004-12-08 Ben Elliston <bje at au.ibm.com>
+
+ * arlex.l: Fix formatting.
+
+2004-12-08 Ben Elliston <bje at au.ibm.com>
+
+ * doc/Makefile.am (config.texi): Emit a @set UPDATED command to
+ config.texi whose value is the current month and year.
+ * doc/Makefile.in: Rebuild.
+ * doc/binutils.texi: Set the document subtitle to be the value of
+ the Texinfo UPDATED variable (obtained from config.texi).
+
+2004-12-07 Ben Elliston <bje at au.ibm.com>
+
+ PR binutils/249
+ * doc/binutils.texi (def file format): New node.
+ (dlltool): Use the tool name as the @chapter name, like all the
+ other binutils. Use @file{.def} throughout for consistency.
+
+2004-12-06 Ben Elliston <bje at au.ibm.com>
+
+ * dlltool.c: Comment fix.
+
+2004-12-06 Ben Elliston <bje at au.ibm.com>
+
+ * doc/binutils.texi: Update copyright years.
+
+2004-12-03 Richard Sandiford <rsandifo at redhat.com>
+
+ * MAINTAINERS: Remove mention of config.if.
+
+2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
+
+ * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ * Makefile.in: Regenerate.
+
+2004-11-10 Ian Lance Taylor <ian at wasabisystems.com>
+
+ PR binutils/536
+ * stabs.c (stab_demangle_template): Call stab_demangle_count
+ rather than stab_demangle_get_count to get the length of a pointer
+ target.
+
+2004-11-10 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * defparse.y: Remove unnecessary commas from token list.
+
+2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * doc/binutils.texi (nm): Update description of weak symbols.
+
+2004-11-03 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (do_debug_ranges): New variable.
+ (usage): Document new switch: -wR or --debug-dump=Ranges.
+ (parse_args): Handle new switch. Replace switch statement for the
+ long options with a more compact table structure.
+ (process_section_headers): Allow the dumping of .debug_ranges
+ sections if so requested.
+ (debug_displays): Likewise.
+ (load_debug_range): New function: Grabs the contents of a
+ .debug_ranges section.
+ (free_debug_range): New function: Releases the grabbed
+ .debug_ranges section.
+ (decode_64bit_range): New function: Displays a 64-bit range in a
+ .debug_ranges section.
+ (decode_range): New function: Displays a 32-bit range in a
+ .debug_ranges section.
+ (read_and_display_attr_value): Record the value of DW_AT_low_pc
+ attributes. Use decode_ranges() to display a DW_AT_ranges
+ attribute.
+ (display_debug_info): Use load_debug_range() and
+ free_debug_range().
+ (display_64bit_debug_ranges): New function. Displays the contents
+ of a 64-bit format .debug_ranges section.
+ (display_debug_ranges): New function: Displays the contents of a
+ 32-bit .debug_ranges section.
+
+ (main): Move cmdline_dump_sects and num_cmdline_dump_sects into the
+ global scope.
+ (process_object): Initialise the dump_sects array from the
+ cmdline_dump_sects array before processing each object file.
+
+ (streq, strneq): New macros. Use them to replace occurrences of
+ strcmp() and strncmp().
+
+ (debug_information): New structure array to replace
+ debug_line_pointer_sizes array.
+ (num_debug_info_entries): New variable to replace
+ num_debug_line_pointers.
+ (get_pointer_size_of_comp_unit): New function: Returns the pointer
+ size of a given compilation unit.
+ (get_debug_info): New function to replace
+ get_debug_line_pointer_sizes.
+ (display_debug_lines): Use the new functions.
+ (display_debug_loc): Likewise.
+
+ (disassemble_section): Change return type to int.
+ (display_debug_lines): Move local variables to their
+ innermost scope.
+ (display_debug_section): Likewise. Also record the return value
+ of functions called and pass this back to the parent. Also only
+ warn about undumped sections when the user explicitly requested
+ their dumping.
+
+ (debug_apply_rela_addends): Allow relocations against STT_OBJECT
+ types as well.
+
+ * NEWS: Mention the support for decoding .debug_ranges sections.
+ * doc/binutils.texi: Document the new command line switch to
+ readelf.
+
+2004-11-03 Randolph Chung <tausq at debian.org>
+
+ * readelf.c (ia64_unw_aux_info, ia64_unw_table_entry): Rename from
+ unw_aux_info and unw_table_entry.
+ (find_symbol_for_address): Pass symtab and strtab info explicitly.
+ (dump_ia64_unwind): Rename unw_{aux_info,table_entry} with ia64_
+ prefix.
+ (slurp_ia64_unwind_table): Likewise.
+ (ia64_process_unwind): Rename from old process_unwind.
+ (hppa_unw_aux_info): New.
+ (dump_hppa_unwind): New.
+ (slurp_hppa_unwind_table): New.
+ (hppa_process_unwind): New.
+ (process_unwind): Factor out common unwinding checks; dispatch to
+ unwind handler based on machine type.
+
+2004-11-02 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (display_debug_lines): Fix typo in error message.
+
+2004-10-26 Mark Mitchell <mark at codesourcery.com>
+
+ * readelf.c (get_note_type): Handle notes not in core files.
+ (process_note_sections): New function.
+ (process_corefile_contents): Rename to ...
+ (process_notes): ... this.
+ (process_object): Call process_notes, not
+ process_corefile_contents.
+ * doc/binutils.texi: Update readelf -n documentation.
+
+2004-10-26 Jakub Jelinek <jakub at redhat.com>
+
+ * ar.c (extract_file): Set atime to mtime for ar xo.
+
+2004-10-25 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * stabs.c (stab_demangle_v3_arglist): New static function, broken
+ out of stab_demangle_v3_argtypes.
+ (stab_demangle_v3_argtypes): Call it.
+ (stab_demangle_v3_arg): Handle DEMANGLE_COMPONENT_FUNCTION_TYPE.
+ If we find an unrecognized component, print out its number.
+
+2004-10-25 David Mosberger <davidm at hpl.hp.com>
+
+ * readelf.c (slurp_ia64_unwind_table): Support relocations against
+ non-section symbols by adding in the symbol value.
+
+2004-10-25 Nick Clifton <nickc at redhat.com>
+
+ PR 465
+ * readelf.c (dynamic_strings_length): New global variable.
+ (VALID_DYNAMIC_NAME, GET_DYNAMIC_NAME): New macros for accessing
+ strings in the dynamic string table.
+ (process_section_headers): Initialise dynamic_strings_length.
+ (process_dynamic_section): Likewise.
+ (process_object): Reset dynamic_string_length when the buffer is freed.
+ (dynamic_sections_mips_val): Use the new macros.
+ (process_dynamic_section): Likewise.
+ (process_version_sections): Likewise.
+ (process_symbol_table): Likewise.
+ (process_syminfo): Likewise.
+ (process_mips_specific): Likewise.
+ (dump_relocations): Add a new parameter 'strtablen' and use this
+ to verify that string offset in a given reloc is valid. Print a
+ suitable error message otherwise.
+ (process_relocs): Pass the new argument to dump_relocations.
+
+2004-10-23 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * dlltool.c: Include <assert.h>.
+ (PREFIX_ALIAS_BASE): Define.
+ (struct export): Add member import_name;
+ (def_exports): Set import_name.
+ (make_one_lib_file): Remove prefix alias code, use import_name
+ in .idata$6.
+ (gen_lib_file): Create and delete aliases.
+
+2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (process_section_groups): Free symtab after use.
+
+2004-10-18 Tommy Pettersson <ptp at lysator.liu.se>
+ Nick Clifton <nickc at redhat.com>
+
+ * strings.c (usage): Place radix values for -t option into the
+ correct order.
+
+ * objcopy.c (add_redefine_syms_file): Change error messages to use
+ <filename>:<linenumber>: format for easier parsing by automatic
+ tools.
+
+ * srconv.c (show_usage): Fix spelling typo.
+
+ * windres.c (format_from_filename): Suggest the use of -J instead
+ of -I if the file type cannot be determined.
+
+2004-10-18 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * strings.c: Include <sys/stat.h>.
+
+2004-10-18 Alan Modra <amodra at bigpond.net.au>
+
+ * budemang.c (demangle): Fix thinko.
+
+ * budemang.c (demangle): Handle "@plt" suffix.
+
+2004-10-14 Nick Clifton <nickc at redhat.com>
+
+ * nm.c (usage): Fix description of --special-syms switch.
+
+2004-10-13 Jakub Jelinek <jakub at redhat.com>
+
+ * strings.c (statbuf): New typedef.
+ (file_stat): Define.
+ (strings_object_file): Avoid using get_file_size, instead do the
+ checks here, using file_stat.
+ * configure.in (HAVE_STAT64): New test.
+ * configure: Rebuilt.
+ * config.in: Rebuilt.
+
+2004-10-12 Paul Brook <paul at codesourcery.com>
+
+ * readelf.c (decode_ARM_machine_flags): Support EABI version 4.
+
+2004-10-11 Alan Modra <amodra at bigpond.net.au>
+
+ * objdump.c (dump_symbols): Fix thinko last change. Improve error
+ messages.
+
+2004-10-08 Nick Clifton <nickc at redhat.com>
+
+ * nm.c: Add a new switch --special-syms which, if enabled, will
+ include the ARM Mapping symbols in nm's output.
+ (usage): Mention the switch.
+ (filter_symbols): Handle the switch.
+ * objdump.c: Add a similar switch.
+ (usage): Mention the switch.
+ (dump_symbols): Handle the switch.
+ * doc/binutils.texi: Document the new switches.
+ * NEWS: Mention the new switches.
+
+2004-10-08 Daniel Jacobowitz <dan at debian.org>
+
+ * readelf.c (get_x86_64_section_type_name): New function.
+ (get_section_type_name): Use it.
+
+2004-10-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * dlltool.c (make_one_lib_file): Revert 2004-09-02 and 2004-09-04
+ patches.
+ * doc/binutils.texi (dlltool): Revert 2004-09-06 patch.
+
+2004-10-07 Alexandre Oliva <aoliva at redhat.com>
+
+ * readelf.c (get_machine_flags): Don't fall through into m68k cpu
+ types.
+
+2004-10-01 Paul Brook <paul at codesourcery.com>
+
+ * readelf.c (get_arm_section_type_name): New function.
+ (get_section_type_name): Use it.
+
+2004-09-28 Nick Clifton <nickc at redhat.com>
+
+ * nm.c: Reorder functions to eliminate most of the static function
+ prototypes.
+
+2004-09-22 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (process_program_headers): Don't include .tbss in non-TLS
+ segments.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/binutils.pot: Regenerate.
+
+2004-09-12 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (decode_location_expression): Sign extend value for
+ DW_OP_const1s, DW_OP_const2s, DW_OP_const4s, DW_OP_bra, DW_OP_skip.
+
+2004-09-09 Nick Clifton <nickc at redhat.com>
+
+ PR 363
+ * ar.c (replace_members): Do not use get_file_size as
+ ar_emul_append correctly handles missing files.
+
+2004-09-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * configure: Regenerated with autconfig 2.13.
+
+2004-09-06 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * doc/binutils.texi (dlltool): Update --add-underscore, --kill-at
+ documentation.
+
+2004-09-06 Michael Wardle <mbw at endbracket.net>
+
+ * doc/binutils.texi (objdump): Document that the -x switch includes
+ the effect of the -p switch.
+
+2004-09-04 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * dlltool.c (make_one_lib_file): Test if internal_name was
+ specified by user before using it.
+
+2004-09-02 Carlo Wood <carlo at alinoe.com>
+
+ PR binutils/351
+ * dlltool.c (make_one_lib_file): For IDATA6 take the name from
+ exp->internal_name if it is present.
+
+2004-09-02 Alexandre Oliva <aoliva at redhat.com>
+
+ * MAINTAINERS: Add self as co-maintainer of FR-V.
+ * readelf.c (get_machine_flags): Print FR-V cpu types.
+
+2004-08-28 Alan Modra <amodra at bigpond.net.au>
+
+ * nm.c (show_synthetic): New var.
+ (long_options): Add "synthetic".
+ (usage): Here too.
+ (display_rel_file): Handle show_synthetic.
+
+2004-08-28 Alan Modra <amodra at bigpond.net.au>
+
+ * objdump.c (dump_bfd): Pass both symbol tables to
+ bfd_get_synthetic_symtab.
+
+2004-08-17 Jakub Jelinek <jakub at redhat.com>
+
+ * objdump.c (dump_bfd): For relocatable objects, pass syms instead
+ of dynsyms to bfd_get_synthetic_symtab.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (debug_apply_rela_addends): New function, extracted from..
+ (display_debug_info): ..here.
+ (display_debug_frames): Call debug_apply_rela_addends. Don't do
+ DW_EH_PE_pcrel adjustment for ET_REL.
+
+2004-08-06 Andreas Schwab <schwab at suse.de>
+
+ * readelf.c (dump_relocations): Fix typo when calculating
+ sec_index.
+
+2004-08-02 Jakub Bogusz <qboosh at pld-linux.org>
+
+ * dllwrap.c (deduce_name): Fix typos introduced when program_name
+ was renamed to prog_name.
+
+2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+
+ * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
+ EF_SH2A_NOFPU.
+
+2004-07-28 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-07-08 Alexandre Oliva <aoliva at redhat.com>
+ * readelf.c (get_machine_flags <EM_SH)): Handle EF_SH4_NOFPU and
+ EF_SH4A_NOFPU.
+ 2003-06-12 Alexandre Oliva <aoliva at redhat.com>
+ * readelf.c (get_machine_flags <EM_SH>): Print SH ISA name.
+
+2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * objcopy.c (filter_symbols): Use bfd_coff_get_comdat_section
+ to access comdat.
+ * objdump.c (dump_section_header): Likewise.
+
+2004-07-15 Aravinda PR <aravindapr at rediffmail.com>
+
+ * nlmconv.c (main): Pass map_file argument to link_inputs.
+ (link_inputs): Use map_file argument if it is defined.
+
+2004-07-13 Nick Clifton <nickc at redhat.com>
+
+ * dllwrap.c: Replace 'program_name' with 'prog_name' to avoid
+ conflicts with exported global defined in bucomm.h.
+ (deduce_name): Rename parameter 'program_name' to 'name' to avoid
+ shadowing the global defined in bucomm.h.
+
+2004-07-12 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * dlltool.c (ext_prefix_alias): New global variable.
+ (make_one_lib_file): Add aliases with prefixes for external
+ and import definitions.
+ (usage): Document -p option.
+ (long_options): Add --ext-prefix-alias option.
+ (main): Handle -p.
+ * doc/binutils.texi: Document new switch.
+ * NEWS: Mention new switch.
+
+2004-07-09 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * binutils/dlltool.c (asm_prefix): Add parameter: name.
+ No underscore for symbols beginning with ?.
+ (ASM_PREFIX): Add parameter: NAME.
+ (gen_exp_file): Use new parameter.
+ (make_label): Likewise.
+ (make_imp_label): Likewise.
+ (make_one_lib_file): Likewise.
+
+2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * MAINTAINERS: Added myself to the list.
+ * readelf.c: Include "elf/crx.h".
+ (guess_is_rela): Handle EM_CRX.
+ (get_machine_name): Likewise.
+ (dump_relocations): Likewise.
+
+2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * doc/binutils.texi (nm): Clarify weak symbol description.
+
+2004-06-24 Ben Elliston <bje at au.ibm.com>
+
+ * readelf.c (get_segment_type): Display "GNU_STACK", not just
+ "STACK", when a PT_GNU_STACK segment is encountered.
+
+2004-06-24 Alan Modra <amodra at bigpond.net.au>
+
+ * objcopy.c (copy_section): Don't set _cooked_size.
+
+2004-06-22 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (Elf32_Word): Delete.
+ (get_32bit_dynamic_section): Handle SGI ELF dynamic segment.
+ (get_64bit_dynamic_section): Likewise.
+
+ * readelf.c (get_32bit_dynamic_section): Stop at first DT_NULL entry.
+ (get_64bit_dynamic_section): Likewise.
+
+ * readelf.c (dynamic_nent): New variable.
+ (get_32bit_dynamic_section): Set it.
+ (get_64bit_dynamic_section): Here too.
+ (process_dynamic_section): Use it instead of dynamic_size.
+ (process_syminfo): Likewise.
+
+ * readelf.c (get_32bit_dynamic_section): Correct number of entries
+ translated from external to internal form.
+ (get_64bit_dynamic_section): Likewise.
+
+2004-06-18 Jie Zhang <zhangjie at magima.com.cn>
+
+ * readelf.c (process_program_headers): When locating the dynamic
+ section use the section table if it is present.
+ (dynamic_segment): Renamed to dynamic_section.
+ Replace references to dynamic segment with references to dynamic
+ section, except where appropriate.
+ (dynamic_segment_mips_val): Rename to dynamic_section_mips_val.
+ (dynamic_segment_parisc_val): Rename to dynamic_section_parisc_val.
+ (dynamic_segment_ia64_val): Rename to dynamic_section_ia64_val.
+ (get_32bit_dynamic_segment): Rename to get_32bit_dynamic_section.
+ Remove tag counting code as it is no longer needed.
+ (get_64bit_dynamic_segment): Rename to get_64bit_dynamic_section.
+ Remove tag counting code as it is no longer needed.
+ (process_dynamic_segment): Rename to process_dynamic_section.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * objcopy.c (copy_section): Use bfd_get_section_size instead of
+ _raw_size or bfd_get_section_size_before_reloc. Don't set reloc_done.
+ (compare_section_lma): Likewise.
+ * addr2line.c (find_address_in_section): Likewise.
+ * coffgrok.c (do_sections_p1): Likewise.
+ * dlltool.c (scan_drectve_symbols): Likewise.
+ * nlmconv.c (main): Likewise.
+ (copy_sections): Likewise.
+ (powerpc_mangle_relocs): Likewise.
+ * objdump.c (disassemble_section): Likewise.
+ * prdbg.c (find_address_in_section): Likewise.
+ * size.c (berkeley_sum): Likewise.
+ * srconv.c (wr_ob): Likewise.
+ * strings.c (strings_a_section): Likewise.
+
+2004-05-28 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * readelf.c (decode_ARM_machine_flags): Add EF_ARM_VFP_FLOAT.
+
+2004-05-17 David Heine <dlheine at tensilica.com>
+
+ * objcopy.c (setup_bfd_headers): New function.
+ (copy_object): Call setup_bfd_headers.
+
+2004-05-13 Paul Brook <paul at codesourcery.com>
+
+ * readelf.c (display_debug_frames): Handle dwarf3 format CIE
+ entries.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-05-11 Jakub Jelinek <jakub at redhat.com>
+
+ * readelf.c (get_segment_type): Handle PT_GNU_RELRO.
+
+2004-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (section_groups): New.
+ (group_count): New.
+ (section_headers_groups): New.
+ (process_section_groups): Populate group_count, section_groups
+ and section_headers_groups.
+ (process_unwind): Support section group.
+ (process_object): Always call process_section_groups. Free
+ section_groups and section_headers_groups.
+
+2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (process_section_headers): Use %3lu on sh_info.
+
+2004-04-30 Michael Deutschmann <michael at talamasca.ocis.net>
+
+ * ranlib.sh: Quote $1 argument in case it contains spaces.
+
+2004-04-27 John Paul Wallington <jpw at gnu.org>
+
+ * objcopy.c (copy_usage, strip_usage): Fix spelling.
+
+2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (do_section_groups): New.
+ (options): Add --section-groups/-g.
+ (usage): Mention --section-groups/-g.
+ (parse_args): Support --section-groups/-g.
+ (get_group_flags): New.
+ (process_section_groups): New.
+ (process_object): Call process_section_groups.
+
+2004-04-24 Alan Modra <amodra at bigpond.net.au>
+
+ * objdump.c (disassemble_section): Don't disassemble sections
+ without SEC_HAS_CONTENTS.
+
+2004-04-22 Jakub Jelinek <jakub at redhat.com>
+
+ * objdump.c (synthsyms, synthcount): New variables.
+ (disassemble_data): Use dynsyms for stripped binaries or libraries.
+ Add synthetized symbols.
+ (dump_bfd): For disassemble, initialize dynsyms always and
+ also synthsyms. Free synthsyms and clear {sym,dynsym,synth}count
+ before returning.
+
+2004-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * strings.c (print_strings): Cast file_off to unsigned long in
+ printf arg list.
+
+2004-04-07 Benjamin Monate <benjamin.monate at cea.fr>
+
+ PR 86
+ * arsup.c (ar_save): Use smart_rename.
+
+2004-04-01 Dean Luick <luick at cray.com>
+
+ * readelf.c (display_debug_pubnames): Align offset and data
+ columns.
+ (read_and_display_attr_value): Add missing break;
+ (debug_displays): Enable the display of the .debug_pubtypes
+ section.
+
+2004-03-30 Stan Shebs <shebs at apple.com>
+
+ * mpw-config.in, mpw-make.sed, mac-binutils.r: Remove MPW
+ support files, no longer used.
+
+2004-03-23 Paul Brook <paul at codesourcery.com>
+
+ * readelf.c (decode_ARM_machine_flags): Add EABI v3.
+
+2004-03-21 Richard Henderson <rth at redhat.com>
+
+ * readelf.c (display_debug_frames): Don't crash for mismatched
+ DW_CFA_restore_state.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * po/binutils.pot: Regenerate.
+
+2004-03-15 Nathan Sidwell <nathan at codesourcery.com>
+
+ * objdump.c (struct SFILE): Replace current pointer with pos
+ offset, rename size to alloc.
+ (objdump_sprintf): Avoid unnecessary copies in the common case
+ (disassemble_bytes): Keep sfile live throughout the
+ function. Adjust usage appropriately.
+
+2004-03-10 Ben Elliston <bje at gnu.org>
+
+ * MAINTAINERS: Update my mail address.
+
+2004-03-08 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * deflex.l: Handle "PRIVATE" string.
+ * defparse.y (%token): Add PRIVATE.
+ (%type): Add opt_PRIVATE.
+ (expline): Pass opt_PRIVATE to def_exports.
+ (opt_PRIVATE): Handle PRIVATE token.
+ * dlltool.h (def_exports): Add 7th param for private flag to
+ declaration.
+ * dlltool.c: Add PRIVATE to comment on EXPORTS syntax.
+ (struct export): Add 'private' field.
+ (def_exports): Set 'private' field of struct exports.
+ (scan_drectve_symbols): Adjust calls to def_exports.
+ (scan_filtered_symbols): Likewise.
+ (dump_def_info): Print 'private' field.
+ (gen_def_file): Likewise.
+ (gen_lib_file): Skip generation of lib object if private.
+ Delete tmp object files in same order as they were generated.
+ Don't delete non-existent private object files.
+
+2004-02-27 Andreas Schwab <schwab at suse.de>
+
+ * ar.c (main): Support POSIX-compatible argument parsing.
+
+2004-02-23 Daniel Lucq <daniel at lucq.org>
+
+ * readelf.c (process_mips_specific): Print conflictsno as an
+ unsigned long.
+
+2004-02-21 Dmitry Timoshkov <dmitry at baikal.ru>
+
+ * dlltool.c (gen_exp_file): Always output names for forwarded symbols.
+
+2004-02-19 Jakub Jelinek <jakub at redhat.com>
+
+ * objcopy.c (copy_section): Avoid warnings.
+
+2004-02-14 Andrew Cagney <cagney at redhat.com>
+
+ * ar.c (remove_output): Use bfd_cache_close.
+ * arsup.c (ar_end): Ditto.
+
+2004-01-21 Roland McGrath <roland at redhat.com>
+
+ * readelf.c (get_note_type): Match NT_AUXV.
+
+2004-01-20 Nick Clifton <nickc at redhat.com>
+
+ * version.c (print_version): Update copyright year to 2004.
+
+2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
+ throughout.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2004-01-12 Jakub Jelinek <jakub at redhat.com>
+
+ * objcopy.c: Include elf-bfd.h.
+ (is_strip_section): Don't strip debugging sections if
+ STRIP_NONDEBUG.
+ (setup_section): If STRIP_NONDEBUG make SEC_ALLOC sections
+ ~(SEC_LOAD | SEC_HAS_CONTENTS) and on ELF targets also SHT_NOBITS.
+
+ * objcopy.c (copy_section): Free relpp if relcount == 0.
+
+2004-01-12 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * stabs.c (parse_stab_argtypes): Handle g++ ABI version 3 names.
+ (stab_demangle_argtypes): Likewise.
+ (stab_demangle_v3_argtypes): New static function.
+ (stab_demangle_v3_arg): New static function.
+
+2004-01-12 Nick Clifton <nickc at redhat.com>
+
+ * objcopy.c (copy_object): Make the function boolean, returning
+ FALSE upon failure.
+ (copy_archive): Handle the return value from copy_object.
+ (copy_file): Likewise.
+
+2004-01-07 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (find_section): New function. Locates a named
+ section.
+ (get_debug_line_pointer_sizes): New function: Initialises the
+ debug_line_pointer_sizes array.
+ (display_debug_lines): Call get_debug_line_pointer_sizes.
+ (display_debug_loc): Likewise.
+ (load_debug_loc): Use find_section.
+ (load_debug_str): Likewise.
+ (display_debug_info): Likewise.
+ (prescan_debug_info): Delete.
+ (debug_displays): Remove prescan field.
+ (process_section_contents): Do not perform prescans.
+
+2004-01-03 Alan Modra <amodra at bigpond.net.au>
+
+ * objcopy.c (filter_bytes): Delete. Move code to..
+ (copy_section): ..here. Simplify size adjustment. Divide
+ section lma by interleave.
+
+2004-01-02 Nick Clifton <nickc at redhat.com>
+
+ * po/ru.po: New file: Russian translation.
+ * configure.in (ALL_LINGUAS): Add ru
+ * configure: Regenerate.
+
+For older changes see ChangeLog-0203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/binutils/ChangeLog-2005
===================================================================
--- branches/binutils/package/binutils/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1350 @@
+2005-12-30 Jie Zhang <jie.zhang at analog.com>
+
+ * readelf.c (get_machine_name): Add case for Blackfin.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (Makefile): Remove dependency.
+ * Makefile.in: Regenerate.
+
+2005-12-26 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * MAINTAINERS: Add myself as VAX maintainer.
+
+2005-12-22 Randolph Chung <tausq at debian.org>
+
+ * rddbg.c (read_section_stabs_debugging_info): Add $GDB_SYMBOLS$
+ entry to names[] array for SOM binaries.
+
+2005-12-21 H.J. Lu <hjl at gnu.org>
+
+ * MAINTAINERS: Add myself as x86_64 maintainer.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * readelf.c (guess_is_rela): Use EM_MT.
+ (dump_relocations, get_machine_name): Adjust.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * Makefile.am: Replace ms1 files with mt files.
+ * Makefile.in: Rebuilt.
+ * readelf.c (elf/mt.h): Adjust #include.
+
+2005-11-30 Nick Clifton <nickc at redhat.com>
+
+ * configure.in (ALL_LINGUAS): Add fi.
+ * configure: Regenerate.
+ * po/fi.po: New file: Finnish translation.
+
+2005-11-21 Arnold Metselaar <arnoldm at sourceware.org>
+
+ * MAINTAINERS: add myself as Z80 maintainer
+
+2005-11-17 Andrew Haley <aph at redhat.com>
+
+ * cxxfilt.c (main): Flush output at newline.
+
+2005-11-16 Mark Mitchell <mark at codesourcery.com>
+
+ * doc/binutils.texi: Include config.texi and @file documentation
+ for manual pages.
+
+2005-11-15 Jan Beulich <jbeulich at novell.com>
+
+ * objcopy.c (keep_file_symbols): New.
+ (enum command_line_switch): Add OPTION_KEEP_FILE_SYMBOLS.
+ (strip_options): Add --keep-file-symbols.
+ (copy_options): Likewise.
+ (copy_usage): Likewise.
+ (strip_usage): Likewise.
+ (filter_symbols): Act upon keep_file_symbols.
+ (strip_main): Handle OPTION_KEEP_FILE_SYMBOLS.
+ (copy_main): Likewise.
+ * doc/binutils.texi: Document --keep-file-symbols for objcopy
+ and strip.
+
+2005-11-14 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * readelf.c (struct dump_list_entry, request_dump_byname)
+ (initialise_dumps_byname): New.
+ (parse_args): Call request_dump_byname.
+ (process_section_contents): Call initialise_dumps_byname.
+ * doc/binutils.texi (readelf): Mention -x NAME.
+ * NEWS: Likewise.
+
+2005-11-11 Nick Clifton <nickc at redhat.com>
+
+ PR 1150
+ * readelf.c (get_mips_symbol_other): New function.
+ (get_symbol_other): New function.
+ (process_symbol_table): Call get_symbol_other() to get a
+ description of the st_other field if it contains more information
+ than just the visibility.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+
+ * dep-in.sed: Replace " ./" with " ".
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * po/POTFILES.in: Regenerate.
+ * po/binutils.pot: Regenerate.
+
+2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
+
+ * MAINTAINERS: Add self as BFIN maintainer.
+
+2005-10-18 Jie Zhang <jie.zhang at analog.com>
+
+ * MAINTAINERS: Add self as BFIN maintainer.
+
+2005-10-11 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * rclex.l (handle quotes): Stop parsing hex notation escaped
+ chars after the first two digits,
+
+2005-10-11 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/1437
+ * cxxfilt.c (flags): Remove DMGL_TYPES;
+ (long_options): Rename --no-types to --types.
+ (usage): Likewise.
+ (demangle_it): Add a comment describing why _ and $ prefixes are
+ skipped. Use printf rather than puts to emit the demangled output
+ in order to avoid emitting a new line character.
+ (main): Have the -t flag enable type demangling.
+ Emit a newline after every demangled command line argument.
+ Copy whitespace from stdin to stdout.
+ * doc/binutils.texi (c++filt): Document the change to the -t
+ switch.
+ Document why demangling names on the command line is slightly
+ different to demangling names read from the standard input.
+
+2005-10-10 Mark Mitchell <mark at codesourcery.com>
+
+ * doc/Makefile.am (config.texi): Set top_srcdir.
+ * doc/Makefile.in: Regenerated.
+ * doc/binutils.texi: Use at-file.texi from libiberty.
+
+2005-10-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/1436
+ * readelf.c (ABSADDR): New.
+ (dump_ia64_unwind): Use ABSADDR to get the unwind info address.
+
+2005-10-10 Thomas Weidenmueller <w3seek at reactos.com>
+
+ * resbin.c (res_to_bin_accelerator): Place the terminating NUL at
+ the correct location in the bindata structure.
+
+2005-10-10 Bryce Schober <bryce.schober at dynonavionics.com>
+
+ * doc/binutils.texi (objdump): Fix typo: -reg-name-std should be
+ -reg-names-std.
+
+2005-10-04 Nick Clifton <nickc at redhat.com>
+
+ * cxxfilt.c: Treat mangled names specified on the command line in
+ the same way as mangled names read from stdin.
+ Add -i switch to disable the display of implementation details.
+ Add -t switch to disable the demangling of types.
+ * NEWS: Mention the new switches.
+ * doc/binutils.texi (cxxfilt): Document the -i and -t switches.
+
+2005-10-03 Mark Mitchell <mark at codesourcery.com>
+
+ * addr2line.c (usage): Document @file.
+ * ar.c (usage): Likewise.
+ * coffdump (usage): Likewise.
+ * cxxfilt.c (usage): Likewise.
+ * dlltool.c (usage): Likewise.
+ * dllwrap.c (usage): Likewise.
+ * nlmconv.c (usage): Likewise.
+ * nm.c (usage): Likewise.
+ * objcopy.c (usage): Likewise.
+ * objdump.c (usage): Likewise.
+ * readelf.c (usage): Likewise.
+ * size.c (usage): Likeise.
+ * srconv.c (usage): Likewise.
+ * strings.c (usage): Likewise.
+ * windres.c (usage): Likewise.
+ * doc/binutils.texi: Add section on common options.
+
+2005-10-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention -W/--dwarf.
+
+ * doc/binutils.texi: Document -W/--dwarf for objdump.
+
+2005-10-01 Paul Brook <paul at codesourcery.com>
+
+ * readelf.c (arm_attr_tag_CPU_arch, arm_attr_tag_ARM_ISA_use,
+ arm_attr_tag_THUMB_ISA_use, arm_attr_tag_VFP_arch,
+ arm_attr_tag_WMMX_arch, arm_attr_tag_NEON_arch,
+ arm_attr_tag_ABI_PCS_config, arm_attr_tag_ABI_PCS_R9_use,
+ arm_attr_tag_ABI_PCS_RW_data, arm_attr_tag_ABI_PCS_RO_DATA,
+ arm_attr_tag_ABI_PCS_GOT_use, arm_attr_tag_ABI_PCS_wchar_t,
+ arm_attr_tag_ABI_FP_rounding, arm_attr_tag_ABI_FP_denormal,
+ arm_attr_tag_ABI_FP_exceptions, arm_attr_tag_ABI_FP_user_exceptions,
+ arm_attr_tag_ABI_FP_number_model, arm_attr_tag_ABI_align8_needed,
+ arm_attr_tag_ABI_align8_preserved, arm_attr_tag_ABI_enum_size,
+ arm_attr_tag_ABI_HardFP_use, arm_attr_tag_ABI_VFP_args,
+ arm_attr_tag_ABI_WMMX_args, arm_attr_tag_ABI_optimization_goals,
+ arm_attr_tag_ABI_FP_optimization_goals, arm_attr_public_tags): New.
+ (display_arm_attribute, process_arm_specific): New functions.
+ (process_arch_specific): Add EM_ARM.
+
+2005-09-30 Mark Mitchell <mark at codesourcery.com>
+
+ * dlltool.c (main): Fix typo.
+ * windres.c (main): Likewise.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.in: Regenerated.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * sysinfo.y (main): Undo last change.
+
+2005-08-30 Mark Mitchell <mark at codesourcery.com>
+
+ * addr2line.c (main): Use expandargv.
+ * ar.c (main): Likewise.
+ * coffdump.c (main): Likewise.
+ * cxxfilt.c (main): Likewise.
+ * dlltool.c (main): Likewise.
+ * dllwrap.c (main): Likewise.
+ * nlmconv.c (main): Likewise.
+ * nm.c (main): Likewise.
+ * objcopy.c (main): Likewise.
+ * objdump.c (main): Likewise.
+ * readelf.c (main): Likewise.
+ * size.c (main): Likeiwse.
+ * srcconv.c (main): Likewise.
+ * strings.c (main): Likewise.
+ * sysdump.c (main): Likewise.
+ * sysinfo.y (main): Likewise.
+ * windres.c (main): Likewise.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * readelf.c (elf/bfin.h): Include.
+ (guess_is_rela): EM_BLACKFIN support.
+ (dump_relocations): Likewise.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dwarf.c (fetch_indirect_string): Adjust for section address.
+ (process_debug_info): Likewise.
+ (display_debug_loc): Likewise.
+ (display_debug_ranges): Likewise.
+
+ * objdump.c (mach_o_dwarf_sections): New.
+ (generic_dwarf_sections): Likewise.
+ (check_mach_o_dwarf): Likewise.
+ (dump_dwarf): Call check_mach_o_dwarf.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (objdump_SOURCES): Add dwarf.c.
+ * Makefile.in: Regenerated.
+
+ * objdump.c: Include "dwarf.h".
+ (usage): Add -W/--dwarf.
+ (long_options): Likewise.
+ (dump_dwarf_section_info): New.
+ (load_debug_section): Likewise.
+ (free_debug_section): Likewise.
+ (dump_dwarf_section): Likewise.
+ (dump_dwarf): Likewise.
+ (dump_bfd): Load symbol table and call dump_dwarf if
+ dump_dwarf_section_info isn't zero.
+ (main): Handle -W/--dwarf.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c: Reordered.
+ (is_relocatable): New.
+ (dwarf_section): New structure for DWARF section.
+ (load_debug_section): New.
+ (free_debug_section): Likewise.
+ (debug_str_section): Likewise.
+ (debug_abbrev_section): Likewise.
+ (debug_str_contents): Removed.
+ (debug_str_size): Likewise.
+ (debug_loc_contents): Likewise.
+ (debug_loc_size): Likewise.
+ (debug_range_contents): Likewise.
+ (debug_range_size): Likewise.
+ (load_debug_str): Likewise.
+ (free_debug_str): Likewise.
+ (load_debug_loc): Likewise.
+ (free_debug_loc): Likewise.
+ (load_debug_arange): Likewise.
+ (free_debug_arange): Likewise.
+ (load_debug_abbrev): Likewise.
+ (free_debug_abbrev): Likewise.
+ (fetch_indirect_string): Updated.
+ (debug_apply_rela_addends): Likewise.
+ (process_debug_info): Likewise.
+ (get_debug_info): Likewise.
+ (display_debug_lines): Likewise.
+ (display_debug_pubnames): Likewise.
+ (display_debug_macinfo): Likewise.
+ (display_debug_abbrev): Likewise.
+ (display_debug_loc): Likewise.
+ (display_debug_str): Likewise.
+ (display_debug_info): Likewise.
+ (display_debug_aranges): Likewise.
+ (display_debug_ranges): Likewise.
+ (display_debug_frames): Likewise.
+ (display_debug_not_supported): Likewise.
+ (debug_displays): Likewise.
+ (display_debug_section): Likewise.
+ (get_file_header): Set is_relocatable.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (debug_apply_rela_addends): Relocate the whole
+ section.
+ (process_debug_info): Don't call debug_apply_rela_addends.
+ (display_debug_frames): Likewise.
+ (get_debug_info): Call debug_apply_rela_addends.
+ (debug_displays): Add the "relocate" field.
+ (display_debug_section): Call debug_apply_rela_addends if
+ needed.
+
+2005-09-30 Matthias Kurz <mk at baerlap.north.de>
+
+ * bucomm.h: Prevent the inclusion of <libintl.h> from the Solaris
+ version of <locale.h> when ENABLE_NLS is not defined.
+
+2005-09-26 Mark Mitchell <mark at codesourcery.com>
+
+ * BRANCHES: Mention binutils-csl-gxxpro-3_4-branch.
+
+2005-09-20 Richard Henderson <rth at redhat.com>
+
+ * readelf.c (display_debug_lines): Use unsigned long for address
+ increments. Use 0x prefix for all hex numbers.
+
+2005-09-09 Richard Earnshaw <richard.earnshaw at arm.com>
+
+ * readelf.c (get_arm_section_type_name): Add SHT_ARM_PREEMPTMAP and
+ SHT_ARM_ATTRIBUTES.
+
+2005-09-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (get_elf_section_flags): Handle 64bit sh_flags.
+
+2005-09-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (debug_abbrev_contents): New.
+ (debug_abbrev_size): Likewise.
+ (load_debug_abbrev): Likewise.
+ (free_debug_abbrev): Likewise.
+ (process_debug_info): Use them.
+
+2005-08-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/1179
+ * objdump.c (disassemble_bytes): Don't adjust
+ adjust_section_vma.
+ (adjust_addresses): Don't adjust vma for debugging section.
+ Adjust lma only for relocatable files.
+ (dump_bfd): Tell adjust_addresses if it is a relocatable file.
+
+2005-08-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bucomm.h (stpcpy): Declare if HAVE_DECL_STPCPY isn't defined.
+
+ * configure.in (AC_GNU_SOURCE): Added.
+ (AC_CHECK_DECLS): Add stpcpy.
+ * configure: Regenerated.
+ * config.in: Likewise.
+
+2005-08-16 Jakub Jelinek <jakub at redhat.com>
+
+ * unwind-ia64.c (UNW_DEC_SPILL_SPREL, UNW_DEC_SPILL_PSPREL,
+ UNW_DEC_RESTORE, UNW_DEC_SPILL_REG): Increase {,ab,t}regname
+ buffer sizes.
+
+2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/binutils.texi (objdump): Document -M e300.
+
+2005-08-14 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * readelf.c (slurp_hppa_unwind_table): Fix entry size on hppa64-hpux.
+ Don't access table entries past the end of the table.
+
+2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * readelf.c (get_parisc_segment_type): Handle PT_PARISC_WEAKORDER.
+ (get_parisc_section_type_name): Handle SHT_PARISC_DLKM.
+
+2005-08-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention "-t/--section-details" and
+ "-N/--full-section-name".
+
+ * doc/binutils.texi: Document "-t/--section-details". Remove
+ "-N/--full-section-name".
+
+ * readelf.c (do_full_section_name): Renamed to ...
+ (do_section_details): This.
+ (option): Rename "-N/--full-section-name" to
+ "-t/--section-details".
+ (usage): Likewise.
+ (parse_args): Likewise.
+ (get_elf_section_flags): Support do_section_details.
+ (process_section_headers): Updated for do_section_details.
+
+2005-08-04 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * readelf.c (get_parisc_dynamic_type): Add new dynamic types.
+ (get_dynamic_type): Use old values for DT_LOOS and DT_HIOS when
+ e_machine is EM_PARISC.
+ (get_parisc_segment_type): Add new segment types.
+ (get_parisc_section_type_name): Add new section names.
+ (dynamic_section_parisc_val): Add new table entries.
+
+2005-08-01 Filip Navara <navaraf at reactos.com>
+
+ * dlltool.c (alphafunc): Remove and replace usage with nfunc.
+ (nfunc): Fix sorting of fastcall symbols when --kill-at is used.
+
+2005-07-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
+ (get_symbol_index_type): Likewise.
+ (get_elf_section_flags): Handle SHF_X86_64_LARGE.
+
+2005-07-21 Eric Christopher <echristo at apple.com>
+
+ * MAINTAINERS: Change affiliation.
+
+2005-07-19 Ben Elliston <bje at au.ibm.com>
+
+ * readelf.c (read_and_display_attr_value): Remove comment adjacent
+ to DW_ATE_decimal_float about it being a GNU extension.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * binemul.c: Fix name of Red Hat.
+ * binemul.h: Likewise.
+ * emul_aix.c: Likewise.
+ * emul_vanilla: Likewise.
+
+2005-07-18 Ben Elliston <bje at au.ibm.com>
+
+ * readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
+ value of DW_ATE_decimal_float instead of DW_ATE_GNU_decimal_float.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2005-07-15 Eric Christopher <echristo at redhat.com>
+
+ * MAINTAINERS: Change affiliation.
+
+2005-07-14 Jim Blandy <jimb at redhat.com>
+
+ * readelf.c: #include "elf/m32c.h"
+ (guess_is_rela, dump_relocations, get_machine_name): Add cases for
+ EM_M32C.
+ * Makefile.am (readelf.o): Update dependencies.
+ * Makefile.in: Regenerated.
+
+2005-07-08 Ben Elliston <bje at au.ibm.com>
+
+ * bucomm.h: Include <stdarg.h> unconditionally, not only when
+ ANSI_PROTOTYPES is defined. Remove #ifdef logic.
+ * dlltool.c: Likewise.
+ * dllwrap.c: Likewise.
+
+2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
+
+ * bucomm.h (report): Add format attribute.
+ * dlltool.c (inform): Likewise.
+ * dllwrap.c (display, inform, warn): Likewise.
+ * objdump.c (objdump_sprintf): Likewise.
+ * readelf.c (error, warn): Likewise. Fix format bugs.
+
+2005-07-05 Dmitry V. Levin <ldv at altlinux.org>
+ Nick Clifton <nickc at redhat.com>
+
+ * strings.c (filename_and_size_t): New typedef.
+ (strings_a_section): Skip sections with size greater or equal to
+ the file size. Cache the file size to avoid repeated stat()s.
+ (strings_object_file): Pass filename_and_size_t argument to
+ strings_a_section() via bfd_map_over_sections().
+
+2005-07-04 Alan Modra <amodra at bigpond.net.au>
+
+ PR 1004
+ * objcopy.c (copy_object): Use bfd_make_section_with_flags.
+ (write_debugging_info): Likewise.
+ (setup_section): Use bfd_make_section_anyway_with_flags.
+
+2005-07-01 Steve Ellcey <sje at cup.hp.com>
+
+ * configure.in (AM_BINUTILS_WARNINGS): Add.
+ (BFD_NEED_DECLARATION): Replace with AC_CHECK_DECLS.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * objdump.c (NEED_DECLARATION_*): Replace with !HAVE_DECL_*.
+ * bucomm.h: (NEED_DECLARATION_*): Ditto.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (check-DEJAGNU): Don't search for expect.
+ * Makefile.in: Regenerate.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (EXPECT): Set to expect.
+ (RUNTEST): Likewise, set to runtest.
+ * Makefile.in: Regenerate.
+
+2005-06-17 Jakub Jelinek <jakub at redhat.com>
+
+ * readelf.c (CHECK_ENTSIZE_VALUES, CHECK_ENTSIZE): Define.
+ (process_section_headers): Use it.
+ (process_relocs): Don't crash if symsec is not SHT_SYMTAB
+ or SHT_DYNSYM.
+ (process_version_sections): Use sizeof (Elf_External_Versym)
+ instead of sh_entsize.
+
+2005-06-16 Nick Clifton <nickc at redhat.com>
+
+ * rename.c (simple_copy): Only define if it is going to be used.
+ (smart_rename): Mark the preserve_dates parameter as possibly
+ being unused.
+
+ * resres.c (write_res_data): Prevent a potential compile time
+ warning by casting the return value from fwrite.
+
+2005-06-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 995
+ * ar.c (BUFSIZE): Moved to ...
+ * bucomm.h (BUFSIZE): Here.
+
+ * bucomm.c: Include <assert.h>.
+ (bfd_get_archive_filename): New.
+ * bucomm.h (bfd_get_archive_filename): New.
+
+ * objcopy.c (copy_unknown_object): New.
+ (copy_object): Use bfd_get_archive_filename when reporting input
+ error. Don't call fatal on unknown arch.
+ (copy_archive): Call copy_unknown_object on unknown format or
+ arch.
+
+2005-06-14 Jakub Jelinek <jakub at redhat.com>
+
+ * readelf.c (cmalloc, xcmalloc, xcrealloc): New functions.
+ (get_data): Add nmemb argument. Return NULL if nmemb * size
+ overflows. If var == NULL, allocate one extra byte and
+ clear it.
+ (slurp_rela_relocs, slurp_rel_relocs, get_32bit_program_headers,
+ get_64bit_program_headers, get_program_headers,
+ get_32bit_section_headers, get_64bit_section_headers,
+ get_32bit_elf_symbols, get_64bit_elf_symbols, process_section_headers,
+ process_section_groups, process_relocs, slurp_ia64_unwind_table,
+ ia64_process_unwind, slurp_hppa_unwind_table, hppa_process_unwind,
+ get_32bit_dynamic_section, get_64bit_dynamic_section,
+ process_dynamic_section, process_version_sections, get_dynamic_data,
+ process_symbol_table, dump_section, load_debug_str, load_debug_loc,
+ load_debug_range, read_and_display_attr_value, process_debug_info,
+ get_debug_info, frame_need_space, display_debug_frames,
+ display_debug_section, process_mips_specific, process_gnu_liblist,
+ process_corefile_note_segment): Adjust get_data callers. Use
+ cmalloc, xcmalloc and xcrealloc instead of {m,xm,xre}alloc where
+ passed size is a product of 2 numbers.
+
+ * readelf.c (print_mode): Fix comment typo.
+ (slurp_rela_relocs, slurp_rel_relocs): Fix memory leaks.
+ (dump_relocations): Fix a thinko in check for invalid st_name.
+ (process_program_headers): Don't crash if string_table is NULL.
+ (process_section_headers): Don't crash if e_shstrndx is invalid.
+ Ensure string_table_length is 0 if string_table == NULL.
+ Don't return just because string_table is NULL.
+ (process_section_groups): Don't crash if symtab's sh_link or
+ symbol's st_name is invalid. Fix a memory leak. Fix check for
+ invalid section number entry.
+ (process_relocs): Don't crash if relocation or symbol section's
+ sh_link is invalid.
+ (slurp_ia64_unwind_table, slurp_hppa_unwind_table): Don't crash if
+ relocation section's sh_info is invalid.
+ (ia64_process_unwind, hppa_process_unwind): Don't crash if symbol
+ table's sh_link is invalid.
+ (process_version_sections): Don't crash on version or symbol
+ section's sh_link is invalid. Don't crash if symbol's st_shndx
+ is invalid.
+ (process_symbol_table): Don't crash if string table is corrupt
+ or symbol's st_name, st_shndx, vna_name or vda_name is invalid.
+ (debug_apply_rela_addends): Don't crash if relocation section's
+ sh_info or sh_link is invalid.
+ (display_debug_loc): Warn for unterminated .debug_loc section
+ or start offsets not within .debug_loc section boundaries.
+ (process_gnu_liblist): Don't crash if liblist section's sh_link
+ or entry's l_name is invalid.
+
+2005-06-09 Jakub Jelinek <jakub at redhat.com>
+
+ * objdump.c (disassemble_bytes): Don't crash if q->howto == NULL.
+ If q->howto->name == NULL, print q->howto->type as number instead.
+ (dump_reloc_set): Likewise.
+
+2005-06-07 Eric Christopher <echristo at redhat.com>
+
+ * readelf.c (guess_is_rela): Support ms1.
+ (dump_relocations): Ditto.
+ (get_machine_name): Ditto.
+
+2005-06-07 Aldy Hernandez <aldyh at redhat.com>
+ Michael Snyder <msnyder at redhat.com>
+ Stan Cox <scox at redhat.com>
+
+ * Makefile.am (readelf.o): Depend on ms1.h.
+
+ * Makefile.in: Regenerate.
+
+ * readelf.c: Include ms1.h.
+
+2005-06-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 990
+ * nm.c (print_symbol): Call bfd_find_line before
+ bfd_find_nearest_line.
+
+2005-06-06 Alan Modra <amodra at bigpond.net.au>
+
+ * NEWS: Mention new powerpc ld support.
+
+2005-06-03 Steve Ellcey <sje at cup.hp.com>
+
+ * configure.in: Check for getc_unlocked prototype.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * strings.c (get_char): Only call getc_unlocked if we have seen a
+ prototype.
+
+2005-06-03 Nick Clifton <nickc at redhat.com>
+
+ * configure.in (ALL_LINGUAS): Add zh_TW
+ * configure: Regenerate.
+ * po/zh_TW.po: New Chinese (traditional) translation.
+
+2005-05-31 Richard Henderson <rth at redhat.com>
+
+ * readelf.c (dump_relocations): Special case R_ALPHA_LITUSE.
+
+2005-05-29 Richard Henderson <rth at redhat.com>
+
+ * readelf.c (get_alpha_dynamic_type): New.
+ (get_dynamic_type): Call it.
+
+2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (process_section_groups): Report group section
+ index. Check if the section member index is valid.
+
+2005-05-23 Fred Fish <fnf at specifixinc.com>
+
+ * addr2line.c (unwind_inlines): New flag for 'i' option.
+ (usage): Document '-i' option.
+ (long_options): Recognize '--inlines'.
+ (translate_addresses): Loop, calling bfd_find_inliner_info as
+ necessary and printing multiple output lines.
+ (main): Handle 'i' option.
+ * doc/binutils.texi (addr2line): Document '-i' option.
+ * NEWS: Mention new addr2line '-i' option.
+
+2005-05-23 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (fetch_indirect_string): Display a warning message
+ when a corrupt DW_FORM_strp value is encountered.
+
+ (process_debug_info): Mention that the compilation unit offset is
+ being displayed in hexadecimal.
+
+ (display_debug_lines): Fix typo in name of .debug_line section.
+
+2005-05-19 Zack Weinberg <zack at codesourcery.com>
+
+ * Makefile.am: Have 'all' depend on 'info'.
+ * Makefile.in: Regenerate.
+
+2005-05-19 Ben Elliston <bje at au.ibm.com>
+
+ * readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
+ value of DW_ATE_GNU_decimal_float.
+
+2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/Makefile.am (config.texi): Don't use $<.
+ * doc/Makefile.in: Regenerated.
+
+2005-05-15 Yitzchak Scott-Thoennes <sthoenna at efn.org>
+
+ * deflex.l: Ignore CRs
+
+2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * acinclude.m4: Remove obsolete code.
+ * configure.in: Update AC_PREREQ.
+ * doc/Makefile.am (binutils_TEXINFOS): Define.
+ (config.texi): Depend on distributed files instead of built
+ files.
+ (binutils.dvi, binutils.info): Remove unnecessary rules.
+ (DISTCLEANFILES): Remove.
+ (install-data-local): Renamed from install.
+ (info-local): Renamed from info.
+ * Makefile.in, aclocal.m4, config.in, configure,
+ doc/Makefile.in: Regenerated.
+
+2005-05-14 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (get_ppc_dynamic_type): Display DT_PPC_GOT, not
+ DT_PPC_GLINK.
+
+2005-05-13 Fred Fish <fnf at specifixinc.com>
+
+ * readelf.c: Fix a couple of obvious comment typos,
+ 'debug_str' -> 'debug_ranges' and proecess' -> 'process'.
+
+2005-05-13 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (dump_ia64_unwind): Get stamp with proper size.
+
+2005-05-12 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (display_debug_lines): If pointer_size has not been
+ found then assume that it is 4 in order to prevent a seg fault
+ when process_extend_line_op attempts to read the line data.
+
+2005-05-11 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (get_ppc_dynamic_type): New function for DT_PPC_GLINK.
+ (get_dynamic_type): Call the above.
+
+2005-05-07 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ aclocal.m4, addr2line.c, ar.c, arlex.l, arparse.y, arsup.c,
+ arsup.h, binemul.c, binemul.h, bucomm.c, bucomm.h, budbg.h,
+ budemang.c, budemang.h, coffdump.c, coffgrok.c, coffgrok.h,
+ cxxfilt.c, debug.c, debug.h, deflex.l, defparse.y, dlltool.c,
+ dlltool.h, dllwrap.c, emul_aix.c, emul_vanilla.c, filemode.c,
+ ieee.c, nlmconv.c, nlmconv.h, nlmheader.y, nm.c, objcopy.c,
+ objdump.c, prdbg.c, rclex.l, rcparse.y, rdcoff.c, rddbg.c,
+ readelf.c, rename.c, resbin.c, rescoff.c, resrc.c, resres.c,
+ size.c, srconv.c, stabs.c, strings.c, sysdump.c, sysinfo.y,
+ syslex.l, unwind-ia64.c, unwind-ia64.h, version.c, windres.c,
+ windres.h, winduni.c, winduni.h wrstabs.c, doc/fdl.texi
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * objcopy.c (copy_file): Don't delete output upon error here.
+ (copy_main): Delete output upon error.
+
+2005-05-02 Ben Elliston <bje at au.ibm.com>
+
+ * dlltool.c (dtab): Remove empty function.
+ (process_duplicates): Remove calls to dtab().
+
+2005-05-01 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * doc/binutils.texi (strip, objcopy): Clarify the description of
+ the "--strip-debug" option. Fix a typo.
+
+2005-04-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bucomm.c: Undo the last change.
+ * bucomm.h: Likewise.
+
+2005-04-29 Ben Elliston <bje at au.ibm.com>
+
+ * syslex.l (word, number, unit): Remove unused variables.
+ * nlmheader.y (keyword_tokens): Make static.
+ * coffdump.c (dump_coff_symbol, coff_dump): Make static.
+ * coffgrok.c (lofile, last_function_symbol, last_function_type,
+ last_struct, last_enum, cur_sfile): Make variables static.
+ * sysdump.c (getCHARS, fillup, getBARRAY, getINT, getBITS,
+ sysroff_swap_tr_in, sysroff_print_tr_out): Make static.
+ * sysinfo.y (writecode, it, code, repeat, oldrepeat, name, rdepth,
+ names, pnames): Likewise.
+
+2005-04-29 Ben Elliston <bje at au.ibm.com>
+
+ * ar.c (mri_mode): Make static.
+ * arsup.c (obfd, real_name, outfile): Likewise.
+ * binemul.c (ar_emul_create): Remove unused function.
+ (ar_emul_default_create): Likewise.
+ * binemul.h (ar_emul_create): Remove declaration.
+ (ar_emul_default_create): Likewise.
+ (struct bin_emulation_xfer_struct): Remove ar_create member.
+ * bucomm.c (report): Make static.
+ * bucomm.h (report): Remove declaration.
+ * cxxfilt.c (mbuffer): Make static.
+ (main): Use unsigned ints for some loop control variables.
+ * readelf.c: Make many global variables static.
+ * size.c (berkeley_format): Make static.
+ (long_options): Likewise.
+ * emul_aix.c (bin_aix_emulation): Remove ar_emul_default_create
+ structure initialiser.
+ (bin_aix5_emulation): Likewise.
+ * emul_vanilla.c (bin_vanilla_emulation): Likewise.
+
+2005-04-27 Ben Elliston <bje at au.ibm.com>
+
+ * syslex.l: Adjust top-of-file comment: this file is part of GNU
+ binutils, not GNU ld.
+
+2005-04-25 Nick Clifton <nickc at redhat.com>
+
+ PR872
+ * objcopy.c (copy_archive): Initialise 'obfd' field of new
+ name_list structure.
+
+ * objcopy.c (copy_usage): Fix description of -K switch.
+
+ * doc/binutils.texi (strip, objcopy): Fix description of -K
+ switch.
+
+2005-04-20 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * readelf.c (display_debug_frames): Use data factor for
+ DW_CFA_def_cfa_sf and DW_CFA_def_cfa_offset_sf.
+
+2005-04-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * objdump.c (dump_section_header): Skip linker created section.
+
+2005-04-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * objdump.c (dump_section_header): Support SEC_GROUP.
+
+2005-04-16 Nick Clifton <nickc at redhat.com>
+
+ * readelf.c (debug_apply_rela_addends): Remove redundant %s from
+ printf string.
+
+2005-04-15 Nick Clifton <nickc at redhat.com>
+
+ * objcopy.c (copy_file): Issue an error message when attmepting to
+ copy an empty input file.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
+ * configure.in: Include ../bfd/warning.m4 contents.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2005-04-12 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (syslex.o, sysinfo.o, arparse.o, arlex.o): Add -Wno-error to command.
+ (sysroff.o, defparse.o, deflex.o): Likewise.
+ (nlmheader.o, rcparse.o, rclex.o): Likewise.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+
+2005-04-11 Jan Beulich <jbeulich at novell.com>
+
+ * MAINTAINERS: Add myself as ix86 Intel mode maintainer.
+
+2005-04-06 Nick Clifton <nickc at redhat.com>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * po/rw.po: New translation: Kinyarwanda.
+ * configure.in (ALL_LINGUAS): Add rw.
+ * configure: Regenerate.
+
+2005-04-04 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * readelf.c (debug_apply_rela_addends): Reorder r_info as
+ necessary for 64-bit MIPS.
+
+2005-04-04 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * doc/binutils.texi (readelf): Remove a duplicate paragraph.
+
+2005-04-04 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ PR binutils/813
+ * objdump.c (dump_symbols): Add a check to see if the section for
+ the symbol is chosen using process_section_p.
+
+2005-04-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention new readelf options, "-N/--full-section-name"
+ and "-g/--section-groups".
+
+ * doc/binutils.texi: Document new readelf options,
+ "-N/--full-section-name" and "-g/--section-groups".
+
+2005-03-31 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (do_full_section_name): New.
+ (options): Add "--full-section-name"/'N'.
+ (usage): Add -N/--full-section-name.
+ (parse_args): Handle 'N'.
+ (process_section_headers): Print out the full section name if
+ do_full_section_name isn't 0.
+
+2005-03-31 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Add a check for <unistd.h> providing a prototype
+ for getopt() which is compatible with the one in
+ include/getopt.h. If so then define HAVE_DECL_GETOPT.
+ * configure: Regenerate.
+ * config.in (HAVE_DECL_GETOPT): Add.
+ * aclocal.m4: Regenerate.
+ * addr2line.c: Include "config.h" before "bfd.h" so that
+ HAVE_DECL_GETOPT is defined before getopt.h is included.
+
+2005-03-21 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * doc/binutils.texi: Document new VAX disassembler-specific option
+ -M entry:0xfooba8.
+ * NEWS: Mention the new option.
+
+2005-03-29 Anil Paranjpe <anilp1 at kpitcummins.com>
+
+ * MAINTAINERS: Add myself as H8300 maintainer.
+
+2005-03-28 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * objdump.c (disassemble_bytes): Remove cast.
+
+2005-03-25 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * BRANCHES: Add binutils-csl-arm-2005q1-branch and
+ binutils-2_16-branch.
+
+2005-03-25 Mark Kettenis <kettenis at gnu.org>
+
+ * MAINTAINERS: Add myself as M88k maintainer.
+
+2005-03-24 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * winduni.c (unicode_from_ascii): Don't declare variables
+ 's' and 'w' if _WIN32. Use MultiByteToWideChar to set the unicode
+ string len.
+
+2005-03-24 Dmitry Diky <diwil at spec.ru>
+
+ * MAINTAINERS: Add myself as MSP430 maintainer.
+
+2005-03-23 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated translation.
+
+2005-03-22 Nick Clifton <nickc at redhat.com>
+
+ * MAINTAINERS: Add Daniel Jacobwitz to the blanket write
+ privileges list.
+
+2005-03-17 Paul Brook <paul at codesourcery.com>
+ Dan Jacobowitz <dan at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+
+ * binutils/readelf.c (get_arm_segment_type): New function.
+ (get_segment_type): Use it.
+
+2005-03-18 Paul Brook <paul at codesourcery.com>
+
+ * objdump.c (objdump_print_addr): Avoid uninitialized warning.
+
+2005-03-17 Diego Novillo <dnovillo at redhat.com>
+
+ * MAINTAINERS: Remove self as maintainer of x86 intel
+ mode.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-15 Daniel Marques <marques at cs.cornell.edu>
+ Nick Clifton <nickc at redhat.com>
+
+ * objcopy.c (globalize_specific_list): New linked list of symbols
+ to convert from local binding into global binding.
+ (command_line_switch): Add OPTION_GLOBALIZE_SYMBOL and
+ OPTION_GLOBALIZE_SYMBOLS.
+ (copy_options): Add "globalize-symbol" and "globalize-symbols".
+ (copy_usage): Document the new switches.
+ (filter_symbols): Convert defined local symbols mentioned on the
+ globalize_specific_list into global symbols.
+ (copy_object): Perform actions if the globalize_specific_list is
+ not empty.
+ (copy_main): Handle new switches.
+ * NEWS: Mention new feature.
+ * doc/binutils.texi: Document new switches.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+ * po/fr.po: Commit new French translation.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * po/tr.po: Commit new Turkish translation.
+
+2005-03-11 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2005-03-10 Nick Clifton <nickc at redhat.com>
+
+ * configure.in (ALL_LINGUAS): Add Romanian lingua "ro".
+ * configure: Regenerate.
+ * po/ro.po: New file.
+
+ * po/ru.po: Updated file.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/binutils.pot: Regenerate.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * ar.c (remove_output): Use unlink_if_ordinary instead of unlink.
+ * objcopy.c (copy_file): Likewise.
+ (strip_main): Likewise.
+
+2005-03-01 Stig Petter Olsroed <stigpo at users.sourceforge.net>
+ Nick Clifton <nickc at redhat.com>
+
+ * objdump.c: Fix coding for DISASSEMBLER_NEEDS_RELOC:
+ (struct objdump_disasm_info): Add 'reloc' field.
+ (disassemble_bytes): Fix check for when an insn has a reloc
+ associated with it. Improve comment explaining why the use of
+ octets is wrong. Set the 'reloc' field in objdump_disasm_info
+ structure.
+ (objdump_print_addr): Use new 'reloc' field to lookup the correct
+ address for the symbol associated with the current instruction's
+ relocation.
+ (disassemble_info): Initialise 'reloc' field.
+
+2005-02-28 Jakub Jelinek <jakub at redhat.com>
+
+ * readelf.c (get_file_type, get_machine_name, get_osabi_name,
+ get_segment_type, get_section_type_name, get_elf_class,
+ get_data_encoding, get_group_flags, dynamic_section_mips_val,
+ get_symbol_binding, get_symbol_type, get_TAG_name, get_FORM_name,
+ get_AT_name, process_mips_specific, process_gnu_liblist,
+ get_note_type, get_netbsd_elfcore_note_type): Use snprintf instead of
+ sprintf where needed.
+ (get_dynamic_type): Likewise. Increase buff to 64 bytes.
+ (get_elf_section_flags): Increase buff to 33 bytes. Avoid
+ using strcat.
+ (get_dynamic_flags): Renamed to...
+ (print_dynamic_flags): ... this. Print the flags to stdout instead
+ of returning them as string.
+ (process_dynamic_section): Adjust caller.
+
+2005-02-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (display_debug_ranges): Print out offset for end of
+ list.
+
+2005-02-23 Alan Modra <amodra at bigpond.net.au>
+
+ * dlltool.c: Warning fixes.
+ * objdump.c: Likewise.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (syslex.o, sysinfo.o): Pass AM_CFLAGS to compiler.
+ (syslex.o, sysinfo.o, dlltool.o, rescoff.o): Remove duplicate
+ dependencies. Run "make dep-am".
+ * nlmconv.c: Warning fixes.
+ * readelf.c: Likewise.
+ * srconv.c: Likewise.
+ * sysdump.c: Likewise.
+ * sysinfo.y: Likewise.
+ * syslex.l: Likewise. Use yyleng instead of strlen, memcpy instead
+ of strcpy.
+ * Makefile.in: Regenerate.
+
+2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * objcopy.c (parse_flags): Replace SEC_SHARED with
+ SEC_COFF_SHARED.
+
+ * objdump.c (dump_section_header): Dump SEC_TIC54X_BLOCK and
+ SEC_TIC54X_CLINK for TI c54x only. Remove SEC_ARCH_BIT_0. Dump
+ SEC_COFF_SHARED for COFF only.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * readelf.c (BYTE_GET8): Delete. Replace uses with BYTE_GET.
+ (byte_get_little_endian): Don't handle size of -8.
+ (byte_get_signed, byte_get_big_endian): Likewise.
+ (print_dec_vma, print_hex_vma): New functions.
+ (print_vma): Use them. Return chars output.
+ (get_dynamic_data): Return a bfd_vma array. Add ent_size parm.
+ (process_symbol_table): Handle alpha and s390 .hash.
+
+2005-02-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (display_debug_loc): Print out offset for end of
+ list.
+
+2005-02-18 Joseph S. Myers <joseph at codesourcery.com>
+
+ * Makefile.am (TOOL_PROGS): Add objdump.
+ * Makefile.in: Regenerate.
+
+2005-02-17 Alan Modra <amodra at bigpond.net.au>
+
+ * deflex.l (YY_NO_UNPUT): Define.
+ * rclex.l (YY_NO_UNPUT): Define.
+ * rcparse.y (null_unichar): New static var.
+ (res_null_text): Use it rather than attempting to init from wchar_t.
+ * windres.c: Include assert.h and time.h before getopt.h.
+ Include config.h and unistd.h too.
+
+2005-02-15 Nick Clifton <nickc at redhat.com>
+
+ * nlmconv.c: Provide a full prototype for the localtime() function
+ in order to avoid a compile time warning.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (group_count): Don't initialize it.
+ (process_section_groups): Reurn 1 if we won't do unwind nor
+ section groups. Set group_count to 0 before counting group
+ sections and return 1 if there are no group sections. Reread
+ SHT_SYMTAB/SHT_STRTAB sections only when needed. Don't skip
+ section 0.
+ (process_object): Only set do_unwind to 0 if
+ process_section_groups return 0.
+
+2005-02-10 Ian Lance Taylor <ian at airs.com>
+
+ * MAINTAINERS: Update my e-mail address.
+
+2005-02-10 Mark Mitchell <mark at codesourcery.com>
+
+ * MAINTAINERS: Add Paul Brook and Mark Mitchell as ARM (Symbian)
+ maintainers.
+
+2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
+
+ * MAINTAINERS: Add self as maintainer of MAXQ.
+
+2005-01-31 Richard Sandiford <rsandifo at redhat.com>
+
+ * readelf.c (eh_addr_size): New variable.
+ (find_section): Move earlier in file. Return empty sections too.
+ (process_program_headers): Use find_section to find .dynamic.
+ (process_section_headers): Initialize eh_addr_size.
+ (dump_ia64_unwind, slurp_ia64_unwind_table, ia64_process_unwind)
+ (dump_hppa_unwind, slurp_hppa_unwind_table, hppa_process_unwind)
+ (display_debug_frames): Use it instead of local addr_size variable.
+ (size_of_encoded_value): Get pointer size from eh_addr_size rather
+ than is_32bit_elf.
+
+2005-01-31 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * version.c (print_version): Bump the copyright date to 2005.
+
+2005-01-25 Alan Modra <amodra at bigpond.net.au>
+
+ * nm.c (display_rel_file): Read dynamic syms before calling
+ bfd_get_synthetic_symtab.
+
+2005-01-21 Ben Elliston <bje at au.ibm.com>
+
+ * dlltool.c (dump_iat): Remove unused function.
+ (gen_exp_file): Remove #if 0'd code.
+ (make_one_lib_file): Likewise.
+ * srconv.c: Remove #if 0'd code throughout.
+ * size.c (lprint_number): Remove.
+ (print_berkeley_format): Remove #if 0'd code.
+ * ar.c (do_quick_append): Remove declaration and definiton.
+ (main): Remove #if 0'd code.
+ * filemode.c (filemodestring): Remove #if 0'd function.
+ * sysdump.c (unit_info_list): Remove function.
+ (object_body_list): Likewise.
+ (program_structure): Likewise.
+ (debug_list): Likewise.
+ (module): Remove #if 0'd code.
+
+2005-01-20 Mark Mitchell <mark at codesourcery.com>
+
+ * BRANCHES: Add binutils-2_15-branch.
+
+ * MAINTAINERS: Document branch policy.
+ * BRANCHES: New file.
+
+2005-01-19 Fred Fish <fnf at specifixinc.com>
+
+ * NEWS: Make note of the new MIPS disassembly option "no-aliases".
+ * doc/binutils.texi (objdump): Document the "no-aliases"
+ disassembly option.
+
+2005-01-17 Eugene Kotlyarov <ekot at narod.ru>
+
+ PR binutils/647
+ * rcparse.y (RCDATA): Allow a filename to be supplied as the
+ parameter. Parse it with define_rcdata_file().
+ * resrc.c (define_rcdata_file): New function.
+ * windres.h: Provide a prototype for the new function.
+
+ * resrc.c (define_user_file): Fix typo by replacing "font file"
+ with "file".
+
+2005-01-16 Jason Thorpe <thorpej at netbsd.org>
+
+ * MAINTAINERS: Update my email address.
+
+2005-01-16 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * dlltool.c (set_dll_name_from_def): New function. Strip name
+ to basename, with warning.
+ (def_name): Use it.
+ (def_library): Likwise.
+ (main): Strip arg of --dllname to basename, with warning.
+ Only use basename of exp_name when inferring dll_name.
+
+2005-01-11 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/637
+ * doc/binutils.texi (c++filt): Use uppercase CXXFILT in the
+ footnote in order to prevent the sed script in the Makefile from
+ converting it into c++filt.
+
+2005-01-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ BZ 635
+ readelf.c (saved_base_address): Removed.
+ (decode_64bit_range): Likewise.
+ (decode_range): Likewise.
+ (display_64bit_debug_ranges): Likewise.
+ (debug_info): Add range_lists, num_range_lists and
+ max_range_lists.
+ (read_and_display_attr_value): Handle do_debug_ranges.
+ (process_debug_info): Likewise.
+ (display_debug_ranges): Rewrite.
+ (process_object): Free range_lists.
+
+2005-01-10 Andreas Schwab <schwab at suse.de>
+
+ * configure.in: Don't define SKIP_ZEROES.
+ * configure: Regenerate.
+ * objdump.c (disassemble_data): Set skip_zeroes and
+ skip_zeroes_at_end in disasm_info to defaults.
+ (DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define.
+ (DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and
+ always define.
+ (disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from
+ objdump_disasm_info.
+
+2005-01-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (display_debug_loc): Display base address
+ specifiers. Always output <End of list>.
+
+2005-01-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (have_frame_base): New.
+ (need_base_address): Likewise.
+ (saved_base_address): Likewise.
+ (decode_location_expression): Return 1 if DW_AT_frame_base is
+ needed.
+ (debug_info): Add base_address and a have_frame_base pointer.
+ (read_and_display_attr_value): Replace saved_DW_AT_low_pc with
+ saved_base_address. Record base address. Set have_frame_base.
+ Record if a location list has DW_AT_frame_base. Display if a
+ location expression has no DW_AT_frame_base but needs one. Set
+ saved_base_address only if needed.
+ (process_debug_info): Clear have_frame_base, saved_base_address
+ and set need_base_address.
+ (display_debug_loc): Display if a location expression has no
+ DW_AT_frame_base but needs one. Display if start >= end. Don't
+ adjust for section address. Properly handle base address.
+ (process_object): Free the have_frame_base pointer in
+ debug_info.
+
+2005-01-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * readelf.c (display_debug_loc): Display offsets for hole and
+ overlap.
+ (display_debug_str): Add a newline at the end.
+
+2005-01-04 Armin Diehl <diehl at nordrhein.de>
+
+ PR binutils/630
+ * nlmconv.c (main): Only store the basename of the output filename
+ in the module table.
+
+2005-01-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ BZ 615
+ * readelf.c (process_debug_info): New.
+ (debug_info): Add num_loc_offsets, loc_offsets and
+ last_loc_offset_p.
+ (get_debug_info): Use process_debug_info.
+ (display_debug_loc): Properly handle location list. Warn if bad
+ location lists are encoutnered.
+ (read_and_process_attr_value): New.
+ (read_and_display_attr_value): Use "%lx" for DW_FORM_data4.
+ (display_debug_info): Use process_debug_info.
+ (process_object): Also free loc_offsets in debug_information.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/binutils/MAINTAINERS
===================================================================
--- branches/binutils/package/binutils/MAINTAINERS 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/MAINTAINERS 2006-04-19 08:33:31 UTC (rev 12)
@@ -68,6 +68,7 @@
BUILD SYSTEM Daniel Jacobowitz <dan at debian.org>
CRIS Hans-Peter Nilsson <hp at axis.com>
CRX Tomer Levi <Tomer.Levi at nsc.com>
+ DLX Nikolaos Kavvadias <nkavv at physics.auth.gr>
DWARF2 Jason Merrill <jason at redhat.com>
FR30 Dave Brolley <brolley at redhat.com>
FRV Dave Brolley <brolley at redhat.com>
@@ -105,8 +106,10 @@
TIC4X Svein Seldal <svein at dev.seldal.com>
TIC54X Timothy Wall <twall at alum.mit.edu>
VAX Jason R Thorpe <thorpej at netbsd.org>
+ VAX Jan-Benedict Glaw <jbglaw at lug-owl.de>
x86_64 Jan Hubicka <jh at suse.cz>
x86_64 Andreas Jaeger <aj at suse.de>
+ x86_64 H.J.Lu <hjl at gnu.org>
Xtensa Bob Wilson <bob.wilson at acm.org>
z80 Arnold Metselaar <arnold.metselaar at planet.nl>
z8k Christian Groessler <chris at groessler.org>
@@ -126,7 +129,7 @@
The current CGEN maintainers are:
- Doug Evans, Ben Elliston, Frank Eigler
+ Doug Evans, Frank Eigler
--------- Write After Approval ---------
Modified: branches/binutils/package/binutils/Makefile.am
===================================================================
--- branches/binutils/package/binutils/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -115,6 +115,35 @@
LIBIBERTY = ../libiberty/libiberty.a
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
POTFILES = $(CFILES) $(DEBUG_SRCS) $(HFILES)
po/POTFILES.in: @MAINT@ Makefile
for f in $(POTFILES); do echo $$f; done | LC_COLLATE= sort > tmp \
@@ -295,8 +324,6 @@
DISTCLEANFILES = sysinfo sysroff.c sysroff.h \
site.exp site.bak
-Makefile: $(BFDDIR)/configure.in
-
# Targets to rebuild dependencies in this Makefile.
# Have to get rid of DEP1 here so that "$?" later includes all of $(CFILES).
DEP: dep.sed $(CFILES) $(HFILES) $(GENERATED_CFILES) $(GENERATED_HFILES) config.h
@@ -379,122 +406,107 @@
# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
addr2line.o: addr2line.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/getopt.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
- bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/demangle.h bucomm.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h budemang.h
ar.o: ar.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/progress.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h arsup.h $(INCDIR)/filenames.h binemul.h
+ $(INCDIR)/libiberty.h $(INCDIR)/progress.h bucomm.h \
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
+ arsup.h $(INCDIR)/filenames.h binemul.h
arsup.o: arsup.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/filenames.h
+ $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h bucomm.h \
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/filenames.h
binemul.o: binemul.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
bucomm.o: bucomm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
$(INCDIR)/filenames.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
budemang.o: budemang.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h budemang.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ budemang.h
coffdump.o: coffdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- coffgrok.h bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h coffgrok.h \
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
coffgrok.o: coffgrok.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h coffgrok.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h coffgrok.h
cxxfilt.o: cxxfilt.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/demangle.h $(INCDIR)/safe-ctype.h
dwarf.o: dwarf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h bucomm.h \
- $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h
debug.o: debug.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h
dlltool.o: dlltool.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h \
$(INCDIR)/dyn-string.h dlltool.h $(INCDIR)/safe-ctype.h
dllwrap.o: dllwrap.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
emul_aix.o: emul_aix.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/coff/internal.h $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(BFDDIR)/libxcoff.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/internal.h \
+ $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h $(BFDDIR)/libxcoff.h
emul_vanilla.o: emul_vanilla.c binemul.h ../bfd/bfd.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
filemode.o: filemode.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
ieee.o: ieee.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/ieee.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h $(INCDIR)/filenames.h
+ $(INCDIR)/ieee.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h $(INCDIR)/filenames.h
is-ranlib.o: is-ranlib.c
is-strip.o: is-strip.c
maybe-ranlib.o: maybe-ranlib.c
maybe-strip.o: maybe-strip.c
nlmconv.o: nlmconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(BFDDIR)/libnlm.h \
- $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h $(INCDIR)/nlm/external.h \
- nlmconv.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
+ $(BFDDIR)/libnlm.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
+ $(INCDIR)/nlm/external.h nlmconv.h
nm.o: nm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- budemang.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def \
- $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/elf/common.h
+ $(INCDIR)/progress.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h budemang.h $(INCDIR)/aout/stab_gnu.h \
+ $(INCDIR)/aout/stab.def $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h \
+ $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
not-ranlib.o: not-ranlib.c
not-strip.o: not-strip.c
objcopy.o: objcopy.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h budbg.h \
- $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+ budbg.h $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h
+ $(INCDIR)/bfdlink.h $(BFDDIR)/libbfd.h
objdump.o: objdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/progress.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h dwarf.h $(INCDIR)/elf/dwarf2.h \
- budemang.h $(INCDIR)/safe-ctype.h $(INCDIR)/dis-asm.h \
- ../bfd/bfd.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h debug.h \
- budbg.h $(INCDIR)/aout/aout64.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ dwarf.h $(INCDIR)/elf/dwarf2.h budemang.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/dis-asm.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ debug.h budbg.h $(INCDIR)/aout/aout64.h
prdbg.o: prdbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h
rdcoff.o: rdcoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h bucomm.h \
- $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- debug.h budbg.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h debug.h budbg.h $(BFDDIR)/libcoff.h \
+ $(INCDIR)/bfdlink.h
rddbg.o: rddbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h
readelf.o: readelf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/alpha.h \
@@ -513,97 +525,87 @@
$(INCDIR)/elf/sparc.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/vax.h \
$(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h $(INCDIR)/elf/crx.h \
$(INCDIR)/elf/iq2000.h $(INCDIR)/elf/xtensa.h $(INCDIR)/aout/ar.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- unwind-ia64.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h unwind-ia64.h
rename.o: rename.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
resbin.o: resbin.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h
rescoff.o: rescoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/coff/internal.h \
- $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
+ $(INCDIR)/bfdlink.h
resrc.o: resrc.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ windres.h winduni.h
+resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
winduni.h
-resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h
size.o: size.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h
srconv.o: srconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h sysroff.h \
- coffgrok.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h sysroff.h coffgrok.h $(INCDIR)/libiberty.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
sysroff.c
stabs.o: stabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h $(INCDIR)/demangle.h \
- $(INCDIR)/libiberty.h debug.h budbg.h $(INCDIR)/filenames.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/demangle.h debug.h budbg.h $(INCDIR)/filenames.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def
strings.o: strings.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/safe-ctype.h
sysdump.o: sysdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h sysroff.h \
- sysroff.c $(INCDIR)/ansidecl.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h \
+ sysroff.h sysroff.c
version.o: version.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
windres.o: windres.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h windres.h \
- winduni.h
+ $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
+ windres.h winduni.h
winduni.o: winduni.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h winduni.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h winduni.h $(INCDIR)/safe-ctype.h
wrstabs.o: wrstabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h debug.h \
- budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ debug.h budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
$(INCDIR)/aout/stab.def
arparse.o: arparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h arsup.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h arsup.h
arlex.o: arlex.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h arparse.h
+ arparse.h
sysroff.o: sysroff.c
sysinfo.o: sysinfo.c
syslex.o: syslex.c config.h sysinfo.h
defparse.o: defparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h dlltool.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h dlltool.h
deflex.o: deflex.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- defparse.h dlltool.h $(INCDIR)/ansidecl.h
+ defparse.h dlltool.h
nlmheader.o: nlmheader.c $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+ ../bfd/bfd.h $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
nlmconv.h
rcparse.o: rcparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h $(INCDIR)/safe-ctype.h
rclex.o: rclex.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
- winduni.h rcparse.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ windres.h winduni.h rcparse.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
Modified: branches/binutils/package/binutils/Makefile.in
===================================================================
--- branches/binutils/package/binutils/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -335,12 +335,15 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -518,6 +521,15 @@
cd $(top_srcdir) && \
$(AUTOMAKE) --foreign Makefile
.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ echo ' $(SHELL) ./config.status'; \
+ $(SHELL) ./config.status;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
+ esac;
$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
$(SHELL) ./config.status --recheck
@@ -938,6 +950,35 @@
mostlyclean-recursive pdf pdf-am ps ps-am tags tags-recursive \
uninstall uninstall-am uninstall-binPROGRAMS uninstall-info-am
+
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
po/POTFILES.in: @MAINT@ Makefile
for f in $(POTFILES); do echo $$f; done | LC_COLLATE= sort > tmp \
&& mv tmp $(srcdir)/po/POTFILES.in
@@ -1044,8 +1085,6 @@
diststuff: $(EXTRA_DIST) info
all: info
-Makefile: $(BFDDIR)/configure.in
-
# Targets to rebuild dependencies in this Makefile.
# Have to get rid of DEP1 here so that "$?" later includes all of $(CFILES).
DEP: dep.sed $(CFILES) $(HFILES) $(GENERATED_CFILES) $(GENERATED_HFILES) config.h
@@ -1122,122 +1161,107 @@
# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
addr2line.o: addr2line.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/getopt.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
- bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/demangle.h bucomm.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h budemang.h
ar.o: ar.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/progress.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h arsup.h $(INCDIR)/filenames.h binemul.h
+ $(INCDIR)/libiberty.h $(INCDIR)/progress.h bucomm.h \
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
+ arsup.h $(INCDIR)/filenames.h binemul.h
arsup.o: arsup.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/filenames.h
+ $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h bucomm.h \
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/filenames.h
binemul.o: binemul.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
bucomm.o: bucomm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
$(INCDIR)/filenames.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
budemang.o: budemang.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h budemang.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ budemang.h
coffdump.o: coffdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- coffgrok.h bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h coffgrok.h \
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
coffgrok.o: coffgrok.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h coffgrok.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h coffgrok.h
cxxfilt.o: cxxfilt.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/demangle.h $(INCDIR)/safe-ctype.h
dwarf.o: dwarf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h bucomm.h \
- $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h
debug.o: debug.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h
dlltool.o: dlltool.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h \
$(INCDIR)/dyn-string.h dlltool.h $(INCDIR)/safe-ctype.h
dllwrap.o: dllwrap.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
emul_aix.o: emul_aix.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/coff/internal.h $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(BFDDIR)/libxcoff.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/internal.h \
+ $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h $(BFDDIR)/libxcoff.h
emul_vanilla.o: emul_vanilla.c binemul.h ../bfd/bfd.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
filemode.o: filemode.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
ieee.o: ieee.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/ieee.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h $(INCDIR)/filenames.h
+ $(INCDIR)/ieee.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h $(INCDIR)/filenames.h
is-ranlib.o: is-ranlib.c
is-strip.o: is-strip.c
maybe-ranlib.o: maybe-ranlib.c
maybe-strip.o: maybe-strip.c
nlmconv.o: nlmconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(BFDDIR)/libnlm.h \
- $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h $(INCDIR)/nlm/external.h \
- nlmconv.h
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
+ $(BFDDIR)/libnlm.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
+ $(INCDIR)/nlm/external.h nlmconv.h
nm.o: nm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- budemang.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def \
- $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/elf/common.h
+ $(INCDIR)/progress.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h budemang.h $(INCDIR)/aout/stab_gnu.h \
+ $(INCDIR)/aout/stab.def $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h \
+ $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
not-ranlib.o: not-ranlib.c
not-strip.o: not-strip.c
objcopy.o: objcopy.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h budbg.h \
- $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+ budbg.h $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h
+ $(INCDIR)/bfdlink.h $(BFDDIR)/libbfd.h
objdump.o: objdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/progress.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h dwarf.h $(INCDIR)/elf/dwarf2.h \
- budemang.h $(INCDIR)/safe-ctype.h $(INCDIR)/dis-asm.h \
- ../bfd/bfd.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h debug.h \
- budbg.h $(INCDIR)/aout/aout64.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ dwarf.h $(INCDIR)/elf/dwarf2.h budemang.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/dis-asm.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ debug.h budbg.h $(INCDIR)/aout/aout64.h
prdbg.o: prdbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h
rdcoff.o: rdcoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h bucomm.h \
- $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- debug.h budbg.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
+ config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h debug.h budbg.h $(BFDDIR)/libcoff.h \
+ $(INCDIR)/bfdlink.h
rddbg.o: rddbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h debug.h budbg.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
+ budbg.h
readelf.o: readelf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/alpha.h \
@@ -1256,99 +1280,89 @@
$(INCDIR)/elf/sparc.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/vax.h \
$(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h $(INCDIR)/elf/crx.h \
$(INCDIR)/elf/iq2000.h $(INCDIR)/elf/xtensa.h $(INCDIR)/aout/ar.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- unwind-ia64.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h unwind-ia64.h
rename.o: rename.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h
resbin.o: resbin.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h
rescoff.o: rescoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/coff/internal.h \
- $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
+ $(INCDIR)/bfdlink.h
resrc.o: resrc.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ windres.h winduni.h
+resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
winduni.h
-resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h
size.o: size.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h
srconv.o: srconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h sysroff.h \
- coffgrok.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h sysroff.h coffgrok.h $(INCDIR)/libiberty.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
sysroff.c
stabs.o: stabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h $(INCDIR)/demangle.h \
- $(INCDIR)/libiberty.h debug.h budbg.h $(INCDIR)/filenames.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/demangle.h debug.h budbg.h $(INCDIR)/filenames.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def
strings.o: strings.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/safe-ctype.h
sysdump.o: sysdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h sysroff.h \
- sysroff.c $(INCDIR)/ansidecl.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h \
+ sysroff.h sysroff.c
version.o: version.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h $(INCDIR)/ansidecl.h \
- config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+ $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h config.h \
+ $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
windres.o: windres.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h windres.h \
- winduni.h
+ $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
+ windres.h winduni.h
winduni.o: winduni.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h winduni.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h winduni.h $(INCDIR)/safe-ctype.h
wrstabs.o: wrstabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h debug.h \
- budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ debug.h budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
$(INCDIR)/aout/stab.def
arparse.o: arparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h arsup.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h arsup.h
arlex.o: arlex.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h arparse.h
+ arparse.h
sysroff.o: sysroff.c
sysinfo.o: sysinfo.c
syslex.o: syslex.c config.h sysinfo.h
defparse.o: defparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h dlltool.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h dlltool.h
deflex.o: deflex.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- defparse.h dlltool.h $(INCDIR)/ansidecl.h
+ defparse.h dlltool.h
nlmheader.o: nlmheader.c $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+ ../bfd/bfd.h $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
$(INCDIR)/fopen-same.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
nlmconv.h
rcparse.o: rcparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+ winduni.h $(INCDIR)/safe-ctype.h
rclex.o: rclex.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
- $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
- winduni.h rcparse.h
+ $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ windres.h winduni.h rcparse.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
Modified: branches/binutils/package/binutils/addr2line.c
===================================================================
--- branches/binutils/package/binutils/addr2line.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/addr2line.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* addr2line.c -- convert addresses to line number and function name
- Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2006
Free Software Foundation, Inc.
Contributed by Ulrich Lauther <Ulrich.Lauther at mchp.siemens.de>
@@ -56,6 +56,7 @@
{"exe", required_argument, NULL, 'e'},
{"functions", no_argument, NULL, 'f'},
{"inlines", no_argument, NULL, 'i'},
+ {"section", required_argument, NULL, 'j'},
{"target", required_argument, NULL, 'b'},
{"help", no_argument, NULL, 'H'},
{"version", no_argument, NULL, 'V'},
@@ -65,8 +66,9 @@
static void usage (FILE *, int);
static void slurp_symtab (bfd *);
static void find_address_in_section (bfd *, asection *, void *);
-static void translate_addresses (bfd *);
-static void process_file (const char *, const char *);
+static void find_offset_in_section (bfd *, asection *);
+static void translate_addresses (bfd *, asection *);
+static void process_file (const char *, const char *, const char *);
/* Print a usage message to STREAM and exit with STATUS. */
@@ -80,7 +82,8 @@
@<file> Read options from <file>\n\
-b --target=<bfdname> Set the binary file format\n\
-e --exe=<executable> Set the input file name (default is a.out)\n\
- -i --inlines Unwind inlined functions\n\
+ -i --inlines Unwind inlined functions\n\
+ -j --section=<name> Read section-relative offsets instead of addresses\n\
-s --basenames Strip directory names\n\
-f --functions Show function names\n\
-C --demangle[=style] Demangle function names\n\
@@ -150,11 +153,32 @@
&filename, &functionname, &line);
}
+/* Look for an offset in a section. This is directly called. */
+
+static void
+find_offset_in_section (bfd *abfd, asection *section)
+{
+ bfd_size_type size;
+
+ if (found)
+ return;
+
+ if ((bfd_get_section_flags (abfd, section) & SEC_ALLOC) == 0)
+ return;
+
+ size = bfd_get_section_size (section);
+ if (pc >= size)
+ return;
+
+ found = bfd_find_nearest_line (abfd, section, syms, pc,
+ &filename, &functionname, &line);
+}
+
/* Read hexadecimal addresses from stdin, translate into
file_name:line_number and optionally function name. */
static void
-translate_addresses (bfd *abfd)
+translate_addresses (bfd *abfd, asection *section)
{
int read_stdin = (naddr == 0);
@@ -177,7 +201,10 @@
}
found = FALSE;
- bfd_map_over_sections (abfd, find_address_in_section, NULL);
+ if (section)
+ find_offset_in_section (abfd, section);
+ else
+ bfd_map_over_sections (abfd, find_address_in_section, NULL);
if (! found)
{
@@ -237,9 +264,11 @@
/* Process a file. */
static void
-process_file (const char *file_name, const char *target)
+process_file (const char *file_name, const char *section_name,
+ const char *target)
{
bfd *abfd;
+ asection *section;
char **matching;
if (get_file_size (file_name) < 1)
@@ -250,7 +279,7 @@
bfd_fatal (file_name);
if (bfd_check_format (abfd, bfd_archive))
- fatal (_("%s: can not get addresses from archive"), file_name);
+ fatal (_("%s: cannot get addresses from archive"), file_name);
if (! bfd_check_format_matches (abfd, bfd_object, &matching))
{
@@ -263,9 +292,18 @@
xexit (1);
}
+ if (section_name != NULL)
+ {
+ section = bfd_get_section_by_name (abfd, section_name);
+ if (section == NULL)
+ fatal (_("%s: cannot find section %s"), file_name, section_name);
+ }
+ else
+ section = NULL;
+
slurp_symtab (abfd);
- translate_addresses (abfd);
+ translate_addresses (abfd, section);
if (syms != NULL)
{
@@ -276,12 +314,11 @@
bfd_close (abfd);
}
-int main (int, char **);
-
int
main (int argc, char **argv)
{
const char *file_name;
+ const char *section_name;
char *target;
int c;
@@ -303,8 +340,9 @@
set_default_bfd_target ();
file_name = NULL;
+ section_name = NULL;
target = NULL;
- while ((c = getopt_long (argc, argv, "b:Ce:sfHhiVv", long_options, (int *) 0))
+ while ((c = getopt_long (argc, argv, "b:Ce:sfHhij:Vv", long_options, (int *) 0))
!= EOF)
{
switch (c)
@@ -348,6 +386,9 @@
case 'i':
unwind_inlines = TRUE;
break;
+ case 'j':
+ section_name = optarg;
+ break;
default:
usage (stderr, 1);
break;
@@ -360,7 +401,7 @@
addr = argv + optind;
naddr = argc - optind;
- process_file (file_name, target);
+ process_file (file_name, section_name, target);
return 0;
}
Modified: branches/binutils/package/binutils/bucomm.c
===================================================================
--- branches/binutils/package/binutils/bucomm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/bucomm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -189,7 +189,7 @@
{
const bfd_target *p = bfd_target_vector[t];
bfd *abfd = bfd_openw (dummy_name, p->name);
- int a;
+ enum bfd_architecture a;
printf ("%s\n (header %s, data %s)\n", p->name,
endian_string (p->header_byteorder),
@@ -213,7 +213,7 @@
continue;
}
- for (a = (int) bfd_arch_obscure + 1; a < (int) bfd_arch_last; a++)
+ for (a = bfd_arch_obscure + 1; a < bfd_arch_last; a++)
if (bfd_set_arch_mach (abfd, (enum bfd_architecture) a, 0))
printf (" %s\n",
bfd_printable_arch_mach ((enum bfd_architecture) a, 0));
@@ -233,9 +233,9 @@
display_info_table (int first, int last)
{
int t;
- int a;
int ret = 1;
char *dummy_name;
+ enum bfd_architecture a;
/* Print heading of target names. */
printf ("\n%*s", (int) LONGEST_ARCH, " ");
@@ -244,7 +244,7 @@
putchar ('\n');
dummy_name = make_temp_file (NULL);
- for (a = (int) bfd_arch_obscure + 1; a < (int) bfd_arch_last; a++)
+ for (a = bfd_arch_obscure + 1; a < bfd_arch_last; a++)
if (strcmp (bfd_printable_arch_mach (a, 0), "UNKNOWN!") != 0)
{
printf ("%*s ", (int) LONGEST_ARCH - 1,
Modified: branches/binutils/package/binutils/bucomm.h
===================================================================
--- branches/binutils/package/binutils/bucomm.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/bucomm.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -90,6 +90,18 @@
extern char **environ;
#endif
+#if !HAVE_DECL_FPRINTF
+extern int fprintf (FILE *, const char *, ...);
+#endif
+
+#if !HAVE_DECL_SNPRINTF
+extern int snprintf(char *, size_t, const char *, ...);
+#endif
+
+#if !HAVE_DECL_VSNPRINTF
+extern int vsnprintf(char *, size_t, const char *, va_list);
+#endif
+
#ifndef O_RDONLY
#define O_RDONLY 0
#endif
Modified: branches/binutils/package/binutils/config.in
===================================================================
--- branches/binutils/package/binutils/config.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/config.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -50,6 +50,10 @@
*/
#undef HAVE_DECL_SBRK
+/* Define to 1 if you have the declaration of `snprintf', and to 0 if you
+ don't. */
+#undef HAVE_DECL_SNPRINTF
+
/* Define to 1 if you have the declaration of `stpcpy', and to 0 if you don't.
*/
#undef HAVE_DECL_STPCPY
@@ -58,6 +62,10 @@
*/
#undef HAVE_DECL_STRSTR
+/* Define to 1 if you have the declaration of `vsnprintf', and to 0 if you
+ don't. */
+#undef HAVE_DECL_VSNPRINTF
+
/* Does the platform use an executable suffix? */
#undef HAVE_EXECUTABLE_SUFFIX
Modified: branches/binutils/package/binutils/configure
===================================================================
--- branches/binutils/package/binutils/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL WARN_CFLAGS NO_WERROR YACC LEX LEXLIB LEX_OUTPUT_ROOT CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT HDEFINES AR CC_FOR_BUILD EXEEXT_FOR_BUILD DEMANGLER_NAME NLMCONV_DEFS BUILD_NLMCONV BUILD_SRCONV BUILD_DLLTOOL DLLTOOL_DEFS BUILD_WINDRES BUILD_DLLWRAP BUILD_MISC OBJDUMP_DEFS EMULATION EMULATION_VECTOR LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL WARN_CFLAGS NO_WERROR YACC LEX LEXLIB LEX_OUTPUT_ROOT CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT HDEFINES AR CC_FOR_BUILD EXEEXT_FOR_BUILD DEMANGLER_NAME NLMCONV_DEFS BUILD_NLMCONV BUILD_SRCONV BUILD_DLLTOOL DLLTOOL_DEFS BUILD_WINDRES BUILD_DLLWRAP BUILD_MISC OBJDUMP_DEFS EMULATION EMULATION_VECTOR datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
ac_subst_files=''
# Initialize some variables set by options.
@@ -3340,6 +3340,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3350,6 +3351,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3410,14 +3412,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3478,6 +3473,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3811,7 +3867,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3814 "configure"' > conftest.$ac_ext
+ echo '#line 3870 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -3866,6 +3922,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -5197,7 +5299,7 @@
LEX=${am_missing_run}flex
fi
-ALL_LINGUAS="fr tr ja es sv da zh_CN ru ro rw zh_TW fi"
+ALL_LINGUAS="fr tr ja es sv da zh_CN ru ro rw zh_TW fi vi"
if test -n "$ac_tool_prefix"; then
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
@@ -10389,10 +10491,150 @@
fi
+echo "$as_me:$LINENO: checking whether snprintf is declared" >&5
+echo $ECHO_N "checking whether snprintf is declared... $ECHO_C" >&6
+if test "${ac_cv_have_decl_snprintf+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h. */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h. */
+$ac_includes_default
+int
+main ()
+{
+#ifndef snprintf
+ char *p = (char *) snprintf;
+#endif
+ ;
+ return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>conftest.er1
+ ac_status=$?
+ grep -v '^ *+' conftest.er1 >conftest.err
+ rm -f conftest.er1
+ cat conftest.err >&5
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); } &&
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; } &&
+ { ac_try='test -s conftest.$ac_objext'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }; then
+ ac_cv_have_decl_snprintf=yes
+else
+ echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+ac_cv_have_decl_snprintf=no
+fi
+rm -f conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+echo "$as_me:$LINENO: result: $ac_cv_have_decl_snprintf" >&5
+echo "${ECHO_T}$ac_cv_have_decl_snprintf" >&6
+if test $ac_cv_have_decl_snprintf = yes; then
+cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_SNPRINTF 1
+_ACEOF
+
+else
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_SNPRINTF 0
+_ACEOF
+
+
+fi
+echo "$as_me:$LINENO: checking whether vsnprintf is declared" >&5
+echo $ECHO_N "checking whether vsnprintf is declared... $ECHO_C" >&6
+if test "${ac_cv_have_decl_vsnprintf+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h. */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h. */
+$ac_includes_default
+int
+main ()
+{
+#ifndef vsnprintf
+ char *p = (char *) vsnprintf;
+#endif
+
+ ;
+ return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>conftest.er1
+ ac_status=$?
+ grep -v '^ *+' conftest.er1 >conftest.err
+ rm -f conftest.er1
+ cat conftest.err >&5
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); } &&
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; } &&
+ { ac_try='test -s conftest.$ac_objext'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }; then
+ ac_cv_have_decl_vsnprintf=yes
+else
+ echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+ac_cv_have_decl_vsnprintf=no
+fi
+rm -f conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+echo "$as_me:$LINENO: result: $ac_cv_have_decl_vsnprintf" >&5
+echo "${ECHO_T}$ac_cv_have_decl_vsnprintf" >&6
+if test $ac_cv_have_decl_vsnprintf = yes; then
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_VSNPRINTF 1
+_ACEOF
+
+
+else
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_VSNPRINTF 0
+_ACEOF
+
+
+fi
+
+
+
+
case "${host}" in
*-*-msdos* | *-*-go32* | *-*-mingw32* | *-*-cygwin* | *-*-windows*)
@@ -10474,9 +10716,6 @@
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
;;
- arm*-* | xscale-* | strongarm-* | d10v-*)
- OBJDUMP_DEFS="-DDISASSEMBLER_NEEDS_RELOCS"
- ;;
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32** | i[3-7]86-*-netbsdpe*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
@@ -10573,6 +10812,11 @@
+# Required for html and install-html
+
+
+
+
ac_config_files="$ac_config_files Makefile doc/Makefile po/Makefile.in:po/Make-in"
ac_config_commands="$ac_config_commands default"
cat >confcache <<\_ACEOF
@@ -11324,6 +11568,9 @@
s, at OBJDUMP_DEFS@,$OBJDUMP_DEFS,;t t
s, at EMULATION@,$EMULATION,;t t
s, at EMULATION_VECTOR@,$EMULATION_VECTOR,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LIBOBJS@,$LIBOBJS,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
CEOF
Modified: branches/binutils/package/binutils/configure.in
===================================================================
--- branches/binutils/package/binutils/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -46,7 +46,7 @@
AC_PROG_YACC
AM_PROG_LEX
-ALL_LINGUAS="fr tr ja es sv da zh_CN ru ro rw zh_TW fi"
+ALL_LINGUAS="fr tr ja es sv da zh_CN ru ro rw zh_TW fi vi"
CY_GNU_GETTEXT
AM_MAINTAINER_MODE
@@ -172,7 +172,8 @@
AC_DEFINE(HAVE_GOOD_UTIME_H, 1, [Does <utime.h> define struct utimbuf?])
fi
-AC_CHECK_DECLS([fprintf, stpcpy, strstr, sbrk, getenv, environ, getc_unlocked])
+AC_CHECK_DECLS([fprintf, stpcpy, strstr, sbrk, getenv, environ, getc_unlocked,
+ snprintf, vsnprintf])
BFD_BINARY_FOPEN
@@ -250,9 +251,6 @@
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
;;
- arm*-* | xscale-* | strongarm-* | d10v-*)
- OBJDUMP_DEFS="-DDISASSEMBLER_NEEDS_RELOCS"
- ;;
changequote(,)dnl
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32** | i[3-7]86-*-netbsdpe*)
changequote([,])dnl
@@ -348,6 +346,11 @@
AC_SUBST(EMULATION)
AC_SUBST(EMULATION_VECTOR)
+# Required for html and install-html
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
AC_OUTPUT(Makefile doc/Makefile po/Makefile.in:po/Make-in,
[
case "x$CONFIG_FILES" in
Modified: branches/binutils/package/binutils/dlltool.c
===================================================================
--- branches/binutils/package/binutils/dlltool.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/dlltool.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* dlltool.c -- tool to generate stuff for PE style DLLs
Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005 Free Software Foundation, Inc.
+ 2005, 2006 Free Software Foundation, Inc.
This file is part of GNU Binutils.
@@ -354,6 +354,7 @@
static int add_indirect = 0;
static int add_underscore = 0;
+static int add_stdcall_underscore = 0;
static int dontdeltemps = 0;
/* TRUE if we should export all symbols. Otherwise, we only export
@@ -1994,7 +1995,9 @@
{
int lead_at = (*name == '@');
- if (add_underscore && !lead_at)
+ if (!lead_at && (add_underscore
+ || (add_stdcall_underscore
+ && strchr (name, '@'))))
{
char *copy = xmalloc (strlen (name) + 2);
@@ -3046,7 +3049,8 @@
fprintf (file, _(" -b --base-file <basefile> Read linker generated base file.\n"));
fprintf (file, _(" -x --no-idata4 Don't generate idata$4 section.\n"));
fprintf (file, _(" -c --no-idata5 Don't generate idata$5 section.\n"));
- fprintf (file, _(" -U --add-underscore Add underscores to symbols in interface library.\n"));
+ fprintf (file, _(" -U --add-underscore Add underscores to all symbols in interface library.\n"));
+ fprintf (file, _(" --add-stdcall-underscore Add underscores to stdcall symbols in interface library.\n"));
fprintf (file, _(" -k --kill-at Kill @<n> from exported names.\n"));
fprintf (file, _(" -A --add-stdcall-alias Add aliases without @<n>.\n"));
fprintf (file, _(" -p --ext-prefix-alias <prefix> Add aliases with <prefix>.\n"));
@@ -3071,6 +3075,7 @@
#define OPTION_NO_EXPORT_ALL_SYMS (OPTION_EXPORT_ALL_SYMS + 1)
#define OPTION_EXCLUDE_SYMS (OPTION_NO_EXPORT_ALL_SYMS + 1)
#define OPTION_NO_DEFAULT_EXCLUDES (OPTION_EXCLUDE_SYMS + 1)
+#define OPTION_ADD_STDCALL_UNDERSCORE (OPTION_NO_DEFAULT_EXCLUDES + 1)
static const struct option long_options[] =
{
@@ -3088,6 +3093,7 @@
{"def", required_argument, NULL, 'd'}, /* for compatibility with older versions */
{"input-def", required_argument, NULL, 'd'},
{"add-underscore", no_argument, NULL, 'U'},
+ {"add-stdcall-underscore", no_argument, NULL, OPTION_ADD_STDCALL_UNDERSCORE},
{"kill-at", no_argument, NULL, 'k'},
{"add-stdcall-alias", no_argument, NULL, 'A'},
{"ext-prefix-alias", required_argument, NULL, 'p'},
@@ -3150,6 +3156,9 @@
case OPTION_NO_DEFAULT_EXCLUDES:
do_default_excludes = FALSE;
break;
+ case OPTION_ADD_STDCALL_UNDERSCORE:
+ add_stdcall_underscore = 1;
+ break;
case 'x':
no_idata4 = 1;
break;
Modified: branches/binutils/package/binutils/doc/Makefile.am
===================================================================
--- branches/binutils/package/binutils/doc/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/doc/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -157,6 +157,27 @@
# cygnus option.
install-data-local: install-info
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
# Maintenance
# We need it for the taz target in ../../Makefile.in.
Modified: branches/binutils/package/binutils/doc/Makefile.in
===================================================================
--- branches/binutils/package/binutils/doc/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/doc/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -181,12 +181,15 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -241,6 +244,7 @@
binutils_TEXI = $(srcdir)/binutils.texi
MAINTAINERCLEANFILES = config.texi
MOSTLYCLEANFILES = $(DEMANGLER_NAME).1
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
all: all-am
.SUFFIXES:
@@ -685,6 +689,25 @@
# cygnus option.
install-data-local: install-info
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
# Maintenance
# We need it for the taz target in ../../Makefile.in.
Modified: branches/binutils/package/binutils/doc/binutils.texi
===================================================================
--- branches/binutils/package/binutils/doc/binutils.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/doc/binutils.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
\input texinfo @c -*- Texinfo -*-
@setfilename binutils.info
- at c Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ at c Copyright 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
@c man begin INCLUDE
@include config.texi
@@ -32,7 +32,7 @@
@ifinfo
@c man begin COPYRIGHT
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.1
@@ -57,7 +57,7 @@
@c "objdump", "nm", "size", "strings", "strip", "readelf" and "ranlib".
@c
@c Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- at c 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ at c 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
@c
@c This text may be freely distributed under the terms of the GNU
@c Free Documentation License.
@@ -83,7 +83,7 @@
@vskip 0pt plus 1filll
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.1
@@ -1399,7 +1399,9 @@
@var{index}th code instead of the default one. This is useful in case
a machine is assigned an official code and the tool-chain adopts the
new code, but other applications still depend on the original code
-being used.
+being used. For ELF based architectures if the @var{index}
+alternative does not exist then the value is treated as an absolute
+number to be stored in the e_machine field of the ELF header.
@item --writable-text
Mark the output text as writable. This option isn't meaningful for all
@@ -2599,6 +2601,7 @@
[@option{-e} @var{filename}|@option{--exe=}@var{filename}]
[@option{-f}|@option{--functions}] [@option{-s}|@option{--basename}]
[@option{-i}|@option{--inlines}]
+ [@option{-j}|@option{--section=}@var{name}]
[@option{-H}|@option{--help}] [@option{-V}|@option{--version}]
[addr addr @dots{}]
@c man end
@@ -2606,13 +2609,14 @@
@c man begin DESCRIPTION addr2line
- at command{addr2line} translates program addresses into file names and line
-numbers. Given an address and an executable, it uses the debugging
-information in the executable to figure out which file name and line
-number are associated with a given address.
+ at command{addr2line} translates addresses into file names and line numbers.
+Given an address in an executable or an offset in a section of a relocatable
+object, it uses the debugging information to figure out which file name and
+line number are associated with it.
-The executable to use is specified with the @option{-e} option. The
-default is the file @file{a.out}.
+The executable or relocatable object to use is specified with the @option{-e}
+option. The default is the file @file{a.out}. The section in the relocatable
+object to use is specified with the @option{-j} option.
@command{addr2line} has two modes of operation.
@@ -2680,6 +2684,10 @@
@code{callee1} which inlines @code{callee2}, and address is from
@code{callee2}, the source information for @code{callee1} and @code{main}
will also be printed.
+
+ at item -j
+ at itemx --section
+Read offsets relative to the specified section instead of absolute addresses.
@end table
@c man end
@@ -3011,8 +3019,9 @@
[@option{--no-default-excludes}]
[@option{-S}|@option{--as} @var{path-to-assembler}] [@option{-f}|@option{--as-flags} @var{options}]
[@option{-D}|@option{--dllname} @var{name}] [@option{-m}|@option{--machine} @var{machine}]
- [@option{-a}|@option{--add-indirect}] [@option{-U}|@option{--add-underscore}] [@option{-k}|@option{--kill-at}]
- [@option{-A}|@option{--add-stdcall-alias}]
+ [@option{-a}|@option{--add-indirect}]
+ [@option{-U}|@option{--add-underscore}] [@option{--add-stdcall-underscore}]
+ [@option{-k}|@option{--kill-at}] [@option{-A}|@option{--add-stdcall-alias}]
[@option{-p}|@option{--ext-prefix-alias} @var{prefix}]
[@option{-x}|@option{--no-idata4}] [@option{-c}|@option{--no-idata5}] [@option{-i}|@option{--interwork}]
[@option{-n}|@option{--nodelete}] [@option{-t}|@option{--temp-prefix} @var{prefix}]
@@ -3188,8 +3197,15 @@
@item -U
@itemx --add-underscore
Specifies that when @command{dlltool} is creating the exports file it
-should prepend an underscore to the names of the exported functions.
+should prepend an underscore to the names of @emph{all} exported symbols.
+ at item --add-stdcall-underscore
+Specifies that when @command{dlltool} is creating the exports file it
+should prepend an underscore to the names of exported @emph{stdcall}
+functions. Variable names and non-stdcall function names are not modified.
+This option is useful when creating GNU-compatible import libs for third
+party DLLs that were built with MS-Windows tools.
+
@item -k
@itemx --kill-at
Specifies that when @command{dlltool} is creating the exports file it
Modified: branches/binutils/package/binutils/dwarf.c
===================================================================
--- branches/binutils/package/binutils/dwarf.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/dwarf.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* dwarf.c -- display DWARF contents of a BFD binary file
- Copyright 2005
+ Copyright 2005, 2006
Free Software Foundation, Inc.
This file is part of GNU Binutils.
@@ -221,7 +221,7 @@
Returns the number of bytes read. */
static int
-process_extended_line_op (unsigned char *data, int is_stmt, int pointer_size)
+process_extended_line_op (unsigned char *data, int is_stmt)
{
unsigned char op_code;
unsigned int bytes_read;
@@ -251,7 +251,7 @@
break;
case DW_LNE_set_address:
- adr = byte_get (data, pointer_size);
+ adr = byte_get (data, len - bytes_read - 1);
printf (_("set Address to 0x%lx\n"), adr);
state_machine_regs.address = adr;
break;
@@ -1766,55 +1766,12 @@
return 0;
}
-/* Retrieve the pointer size associated with the given compilation unit.
- Optionally the offset of this unit into the .debug_info section is
- also retutned. If there is no .debug_info section then an error
- message is issued and 0 is returned. If the requested comp unit has
- not been defined in the .debug_info section then a warning message
- is issued and the last know pointer size is returned. This message
- is only issued once per section dumped per file dumped. */
-
-static unsigned int
-get_pointer_size_and_offset_of_comp_unit (unsigned int comp_unit,
- const char * section_name,
- unsigned long * offset_return)
-{
- unsigned long offset = 0;
-
- if (num_debug_info_entries == 0)
- error (_("%s section needs a populated .debug_info section\n"),
- section_name);
-
- else if (comp_unit >= num_debug_info_entries)
- {
- if (!warned_about_missing_comp_units)
- {
- warn (_("%s section has more comp units than .debug_info section\n"),
- section_name);
- warn (_("assuming that the pointer size is %d, from the last comp unit in .debug_info\n\n"),
- last_pointer_size);
- warned_about_missing_comp_units = TRUE;
- }
- }
- else
- {
- last_pointer_size = debug_information [comp_unit].pointer_size;
- offset = debug_information [comp_unit].cu_offset;
- }
-
- if (offset_return != NULL)
- * offset_return = offset;
-
- return last_pointer_size;
-}
-
static int
display_debug_lines (struct dwarf_section *section, void *file)
{
unsigned char *start = section->start;
unsigned char *data = start;
unsigned char *end = start + section->size;
- unsigned int comp_unit = 0;
printf (_("\nDump of debug contents of section %s:\n\n"),
section->name);
@@ -1827,7 +1784,6 @@
unsigned char *standard_opcodes;
unsigned char *end_of_sequence;
unsigned char *hdrptr;
- unsigned int pointer_size;
int initial_length_size;
int offset_size;
int i;
@@ -1885,12 +1841,6 @@
info.li_line_base <<= 24;
info.li_line_base >>= 24;
- /* Get the pointer size from the comp unit associated
- with this block of line number information. */
- pointer_size = get_pointer_size_and_offset_of_comp_unit
- (comp_unit, ".debug_line", NULL);
- comp_unit ++;
-
printf (_(" Length: %ld\n"), info.li_length);
printf (_(" DWARF Version: %d\n"), info.li_version);
printf (_(" Prologue Length: %d\n"), info.li_prologue_length);
@@ -1899,9 +1849,6 @@
printf (_(" Line Base: %d\n"), info.li_line_base);
printf (_(" Line Range: %d\n"), info.li_line_range);
printf (_(" Opcode Base: %d\n"), info.li_opcode_base);
- printf (_(" (Pointer size: %u)%s\n"),
- pointer_size,
- warned_about_missing_comp_units ? " [assumed]" : "" );
end_of_sequence = data + info.li_length + initial_length_size;
@@ -1993,14 +1940,7 @@
else switch (op_code)
{
case DW_LNS_extended_op:
- if (pointer_size == 0)
- {
- warn (_("Extend line ops need a valid pointer size, guessing at 4\n"));
- pointer_size = 4;
- }
-
- data += process_extended_line_op (data, info.li_default_is_stmt,
- pointer_size);
+ data += process_extended_line_op (data, info.li_default_is_stmt);
break;
case DW_LNS_copy:
@@ -2634,7 +2574,9 @@
if (excess)
ranges += (2 * arange.ar_pointer_size) - excess;
- for (;;)
+ start += arange.ar_length + initial_length_size;
+
+ while (ranges + 2 * arange.ar_pointer_size <= start)
{
address = byte_get (ranges, arange.ar_pointer_size);
@@ -2644,14 +2586,8 @@
ranges += arange.ar_pointer_size;
- /* A pair of zeros marks the end of the list. */
- if (address == 0 && length == 0)
- break;
-
printf (" %8.8lx %lu\n", address, length);
}
-
- start += arange.ar_length + initial_length_size;
}
printf ("\n");
@@ -2904,12 +2840,18 @@
case DW_CFA_offset:
sprintf (tmp, "c%+d", fc->col_offset[r]);
break;
+ case DW_CFA_val_offset:
+ sprintf (tmp, "v%+d", fc->col_offset[r]);
+ break;
case DW_CFA_register:
sprintf (tmp, "r%d", fc->col_offset[r]);
break;
case DW_CFA_expression:
strcpy (tmp, "exp");
break;
+ case DW_CFA_val_expression:
+ strcpy (tmp, "vexp");
+ break;
default:
strcpy (tmp, "n/a");
break;
@@ -3136,8 +3078,8 @@
if (!cie)
{
- warn ("Invalid CIE pointer %08lx in FDE at %p\n",
- cie_id, saved_start);
+ warn ("Invalid CIE pointer %08lx in FDE at %08lx\n",
+ cie_id, (unsigned long)(saved_start - section_start));
start = block_end;
fc->ncols = 0;
fc->col_type = xmalloc (sizeof (short int));
@@ -3252,6 +3194,7 @@
start += 4;
break;
case DW_CFA_offset_extended:
+ case DW_CFA_val_offset:
reg = LEB (); LEB ();
frame_need_space (fc, reg);
fc->col_type[reg] = DW_CFA_undefined;
@@ -3290,6 +3233,7 @@
start += tmp;
break;
case DW_CFA_expression:
+ case DW_CFA_val_expression:
reg = LEB ();
tmp = LEB ();
start += tmp;
@@ -3297,6 +3241,7 @@
fc->col_type[reg] = DW_CFA_undefined;
break;
case DW_CFA_offset_extended_sf:
+ case DW_CFA_val_offset_sf:
reg = LEB (); SLEB ();
frame_need_space (fc, reg);
fc->col_type[reg] = DW_CFA_undefined;
@@ -3426,6 +3371,16 @@
fc->col_offset[reg] = roffs * fc->data_factor;
break;
+ case DW_CFA_val_offset:
+ reg = LEB ();
+ roffs = LEB ();
+ if (! do_debug_frames_interp)
+ printf (" DW_CFA_val_offset: r%ld at cfa%+ld\n",
+ reg, roffs * fc->data_factor);
+ fc->col_type[reg] = DW_CFA_val_offset;
+ fc->col_offset[reg] = roffs * fc->data_factor;
+ break;
+
case DW_CFA_restore_extended:
reg = LEB ();
if (! do_debug_frames_interp)
@@ -3543,6 +3498,19 @@
start += ul;
break;
+ case DW_CFA_val_expression:
+ reg = LEB ();
+ ul = LEB ();
+ if (! do_debug_frames_interp)
+ {
+ printf (" DW_CFA_val_expression: r%ld (", reg);
+ decode_location_expression (start, eh_addr_size, ul, 0);
+ printf (")\n");
+ }
+ fc->col_type[reg] = DW_CFA_val_expression;
+ start += ul;
+ break;
+
case DW_CFA_offset_extended_sf:
reg = LEB ();
l = SLEB ();
@@ -3554,6 +3522,17 @@
fc->col_offset[reg] = l * fc->data_factor;
break;
+ case DW_CFA_val_offset_sf:
+ reg = LEB ();
+ l = SLEB ();
+ frame_need_space (fc, reg);
+ if (! do_debug_frames_interp)
+ printf (" DW_CFA_val_offset_sf: r%ld at cfa%+ld\n",
+ reg, l * fc->data_factor);
+ fc->col_type[reg] = DW_CFA_val_offset;
+ fc->col_offset[reg] = l * fc->data_factor;
+ break;
+
case DW_CFA_def_cfa_sf:
fc->cfa_reg = LEB ();
fc->cfa_offset = SLEB ();
Modified: branches/binutils/package/binutils/ieee.c
===================================================================
--- branches/binutils/package/binutils/ieee.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/ieee.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* ieee.c -- Read and write IEEE-695 debugging information.
- Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003
+ Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2006
Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian at cygnus.com>.
@@ -4594,8 +4594,10 @@
info.type_indx = 256;
info.name_indx = 32;
- if (! bfd_hash_table_init (&info.typedefs.root, ieee_name_type_newfunc)
- || ! bfd_hash_table_init (&info.tags.root, ieee_name_type_newfunc))
+ if (!bfd_hash_table_init (&info.typedefs.root, ieee_name_type_newfunc,
+ sizeof (struct ieee_name_type_hash_entry))
+ || !bfd_hash_table_init (&info.tags.root, ieee_name_type_newfunc,
+ sizeof (struct ieee_name_type_hash_entry)))
return FALSE;
if (! ieee_init_buffer (&info, &info.global_types)
Modified: branches/binutils/package/binutils/objcopy.c
===================================================================
--- branches/binutils/package/binutils/objcopy.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/objcopy.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* objcopy.c -- copy object file from input to output, optionally massaging it.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005
+ 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GNU Binutils.
@@ -30,6 +30,7 @@
#include "fnmatch.h"
#include "elf-bfd.h"
#include <sys/stat.h>
+#include "libbfd.h"
/* A list of symbols to explicitly strip out, or to keep. A linked
list is good enough for a small number from the command line, but
@@ -146,8 +147,8 @@
static bfd_boolean pad_to_set = FALSE;
static bfd_vma pad_to;
-/* Use alternate machine code? */
-static int use_alt_mach_code = 0;
+/* Use alternative machine code? */
+static unsigned long use_alt_mach_code = 0;
/* Output BFD flags user wants to set or clear */
static flagword bfd_flags_to_set;
@@ -472,7 +473,7 @@
--globalize-symbols <file> --globalize-symbol for all in <file>\n\
--keep-global-symbols <file> -G for all symbols listed in <file>\n\
--weaken-symbols <file> -W for all symbols listed in <file>\n\
- --alt-machine-code <index> Use alternate machine code for output\n\
+ --alt-machine-code <index> Use the target's <index>'th alternative machine\n\
--writable-text Mark the output text as writable\n\
--readonly-text Make the output text write protected\n\
--pure Mark the output file as demand paged\n\
@@ -1286,6 +1287,9 @@
if (osympp != isympp)
free (osympp);
+ isympp = NULL;
+ osympp = NULL;
+
/* BFD mandates that all output sections be created and sizes set before
any output is done. Thus, we traverse all sections multiple times. */
bfd_map_over_sections (ibfd, setup_section, obfd);
@@ -1309,13 +1313,23 @@
if (pset != NULL && pset->set_flags)
flags = pset->flags | SEC_HAS_CONTENTS;
- padd->section = bfd_make_section_with_flags (obfd, padd->name, flags);
- if (padd->section == NULL)
+ /* bfd_make_section_with_flags() does not return very helpful
+ error codes, so check for the most likely user error first. */
+ if (bfd_get_section_by_name (obfd, padd->name))
{
- non_fatal (_("can't create section `%s': %s"),
- padd->name, bfd_errmsg (bfd_get_error ()));
+ non_fatal (_("can't add section '%s' - it already exists!"), padd->name);
return FALSE;
}
+ else
+ {
+ padd->section = bfd_make_section_with_flags (obfd, padd->name, flags);
+ if (padd->section == NULL)
+ {
+ non_fatal (_("can't create section `%s': %s"),
+ padd->name, bfd_errmsg (bfd_get_error ()));
+ return FALSE;
+ }
+ }
if (! bfd_set_section_size (obfd, padd->section, padd->size))
{
@@ -1359,6 +1373,49 @@
bfd_nonfatal (gnu_debuglink_filename);
return FALSE;
}
+
+ /* Special processing for PE format files. We
+ have no way to distinguish PE from COFF here. */
+ if (bfd_get_flavour (obfd) == bfd_target_coff_flavour)
+ {
+ bfd_vma debuglink_vma;
+ asection * highest_section;
+ asection * sec;
+
+ /* The PE spec requires that all sections be adjacent and sorted
+ in ascending order of VMA. It also specifies that debug
+ sections should be last. This is despite the fact that debug
+ sections are not loaded into memory and so in theory have no
+ use for a VMA.
+
+ This means that the debuglink section must be given a non-zero
+ VMA which makes it contiguous with other debug sections. So
+ walk the current section list, find the section with the
+ highest VMA and start the debuglink section after that one. */
+ for (sec = obfd->sections, highest_section = NULL;
+ sec != NULL;
+ sec = sec->next)
+ if (sec->vma > 0
+ && (highest_section == NULL
+ || sec->vma > highest_section->vma))
+ highest_section = sec;
+
+ if (highest_section)
+ debuglink_vma = BFD_ALIGN (highest_section->vma
+ + highest_section->size,
+ /* FIXME: We ought to be using
+ COFF_PAGE_SIZE here or maybe
+ bfd_get_section_alignment() (if it
+ was set) but since this is for PE
+ and we know the required alignment
+ it is easier just to hard code it. */
+ 0x1000);
+ else
+ /* Umm, not sure what to do in this case. */
+ debuglink_vma = 0x1000;
+
+ bfd_set_section_vma (obfd, gnu_debuglink_section, debuglink_vma);
+ }
}
if (bfd_count_sections (obfd) == 0)
@@ -1610,9 +1667,21 @@
/* Switch to the alternate machine code. We have to do this at the
very end, because we only initialize the header when we create
the first section. */
- if (use_alt_mach_code != 0
- && ! bfd_alt_mach_code (obfd, use_alt_mach_code))
- non_fatal (_("unknown alternate machine code, ignored"));
+ if (use_alt_mach_code != 0)
+ {
+ if (! bfd_alt_mach_code (obfd, use_alt_mach_code))
+ {
+ non_fatal (_("this target does not support %lu alternative machine codes"),
+ use_alt_mach_code);
+ if (bfd_get_flavour (obfd) == bfd_target_elf_flavour)
+ {
+ non_fatal (_("treating that number as an absolute e_machine value instead"));
+ elf_elfheader (obfd)->e_machine = use_alt_mach_code;
+ }
+ else
+ non_fatal (_("ignoring the alternative value"));
+ }
+ }
return TRUE;
}
@@ -3012,9 +3081,9 @@
break;
case OPTION_ALT_MACH_CODE:
- use_alt_mach_code = atoi (optarg);
- if (use_alt_mach_code <= 0)
- fatal (_("alternate machine code index must be positive"));
+ use_alt_mach_code = strtoul (optarg, NULL, 0);
+ if (use_alt_mach_code == 0)
+ fatal (_("unable to parse alternative machine code"));
break;
case OPTION_PREFIX_SYMBOLS:
Modified: branches/binutils/package/binutils/objdump.c
===================================================================
--- branches/binutils/package/binutils/objdump.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/objdump.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* objdump.c -- dump information about an object file.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GNU Binutils.
@@ -66,11 +66,6 @@
#define BYTES_IN_WORD 32
#include "aout/aout64.h"
-#if !HAVE_DECL_FPRINTF
-/* This is needed by init_disassemble_info(). */
-extern int fprintf (FILE *, const char *, ...);
-#endif
-
/* Exit status. */
static int exit_status = 0;
@@ -130,9 +125,7 @@
arelent ** dynrelbuf;
long dynrelcount;
disassembler_ftype disassemble_fn;
-#ifdef DISASSEMBLER_NEEDS_RELOCS
arelent * reloc;
-#endif
};
/* Architecture to disassemble for, or default if NULL. */
@@ -866,9 +859,7 @@
{
struct objdump_disasm_info *aux;
asymbol *sym = NULL; /* Initialize to avoid compiler warning. */
-#ifdef DISASSEMBLER_NEEDS_RELOCS
bfd_boolean skip_find = FALSE;
-#endif
if (sorted_symcount < 1)
{
@@ -879,7 +870,6 @@
aux = (struct objdump_disasm_info *) info->application_data;
-#ifdef DISASSEMBLER_NEEDS_RELOCS
if (aux->reloc != NULL
&& aux->reloc->sym_ptr_ptr != NULL
&& * aux->reloc->sym_ptr_ptr != NULL)
@@ -894,7 +884,6 @@
}
if (!skip_find)
-#endif
sym = find_symbol_for_address (vma, info, NULL);
objdump_print_addr_with_sym (aux->abfd, aux->sec, sym, vma, info,
@@ -910,7 +899,7 @@
objdump_print_addr (vma, info, ! prefix_addresses);
}
-/* Determine of the given address has a symbol associated with it. */
+/* Determine if the given address has a symbol associated with it. */
static int
objdump_symbol_at_address (bfd_vma vma, struct disassemble_info * info)
@@ -1319,12 +1308,10 @@
{
bfd_vma z;
bfd_boolean need_nl = FALSE;
-#ifdef DISASSEMBLER_NEEDS_RELOCS
int previous_octets;
/* Remember the length of the previous instruction. */
previous_octets = octets;
-#endif
octets = 0;
/* If we see more than SKIP_ZEROES octets of zeroes, we just
@@ -1389,8 +1376,8 @@
info->bytes_per_chunk = 0;
info->flags = 0;
-#ifdef DISASSEMBLER_NEEDS_RELOCS
- if (*relppp < relppend)
+ if (info->disassembler_needs_relocs
+ && *relppp < relppend)
{
bfd_signed_vma distance_to_rel;
@@ -1420,7 +1407,7 @@
else
aux->reloc = NULL;
}
-#endif
+
octets = (*disassemble_fn) (section->vma + addr_offset, info);
info->fprintf_func = (fprintf_ftype) fprintf;
info->stream = stdout;
@@ -1672,10 +1659,7 @@
rel_offset = 0;
if ((section->flags & SEC_RELOC) != 0
-#ifndef DISASSEMBLER_NEEDS_RELOCS
- && dump_reloc_info
-#endif
- )
+ && (dump_reloc_info || pinfo->disassembler_needs_relocs))
{
long relsize;
@@ -1882,9 +1866,7 @@
aux.require_sec = FALSE;
aux.dynrelbuf = NULL;
aux.dynrelcount = 0;
-#ifdef DISASSEMBLER_NEEDS_RELOCS
aux.reloc = NULL;
-#endif
disasm_info.print_address_func = objdump_print_address;
disasm_info.symbol_at_address_func = objdump_symbol_at_address;
@@ -1926,6 +1908,7 @@
disasm_info.octets_per_byte = bfd_octets_per_byte (abfd);
disasm_info.skip_zeroes = DEFAULT_SKIP_ZEROES;
disasm_info.skip_zeroes_at_end = DEFAULT_SKIP_ZEROES_AT_END;
+ disasm_info.disassembler_needs_relocs = FALSE;
if (bfd_big_endian (abfd))
disasm_info.display_endian = disasm_info.endian = BFD_ENDIAN_BIG;
Modified: branches/binutils/package/binutils/po/Make-in
===================================================================
--- branches/binutils/package/binutils/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright 2003 Free Software Foundation, Inc.
+# Copyright 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -110,6 +110,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -185,7 +186,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Added: branches/binutils/package/binutils/po/vi.po
===================================================================
--- branches/binutils/package/binutils/po/vi.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/po/vi.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5704 @@
+# Vietnamese translation for BinUtils.
+# Copyright © 2006 Free Software Foundation, Inc.
+# Clytie Siddall <clytie at riverland.net.au>, 2006.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: binutils-2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-03 21:03+1030\n"
+"PO-Revision-Date: 2006-01-23 23:18+1030\n"
+"Last-Translator: Clytie Siddall <clytie at riverland.net.au>\n"
+"Language-Team: Vietnamese <gnomevi-list at lists.sourceforge.net>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"Plural-Forms: nplurals=1; plural=0\n"
+"X-Generator: LocFactoryEditor 1.6b31\n"
+
+#: addr2line.c:73
+#, c-format
+msgid "Usage: %s [option(s)] [addr(s)]\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n...] [địa_chỉ...)]\n"
+
+#: addr2line.c:74
+#, c-format
+msgid " Convert addresses into line number/file name pairs.\n"
+msgstr " Chuyển đổi địa chỉ sang cặp số thứ tá»± dòng/tên táºp tin.\n"
+
+#: addr2line.c:75
+#, c-format
+msgid " If no addresses are specified on the command line, they will be read from stdin\n"
+msgstr "Nếu chÆ°a ghi rõ địa chỉ trên dòng lệnh, sẽ Ä‘á»c chúng từ thiết bị nháºp chuẩn\n"
+
+#: addr2line.c:76
+#, c-format
+msgid ""
+" The options are:\n"
+" -b --target=<bfdname> Set the binary file format\n"
+" -e --exe=<executable> Set the input file name (default is a.out)\n"
+" -s --basenames Strip directory names\n"
+" -f --functions Show function names\n"
+" -C --demangle[=style] Demangle function names\n"
+" -h --help Display this information\n"
+" -v --version Display the program's version\n"
+"\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -b --target=<khuôn_dạng> \tLáºp khuôn dạng táºp tin nhị phân (_Ä‘Ãch_)\n"
+" -e --exe=<chÆ°Æ¡ng_trình> \tLáºp tên táºp tin nháºp (mặc định là <a.out>)\n"
+"\t\t\t\t\t\t\t\t(_chương trình chạy được_)\n"
+" -s --basenames\t\tTước các tên thư mục (_các tên cơ bản_)\n"
+" -f --functions \tHiện tên _các chức năng_\n"
+" -C --demangle[=kiểu_dáng] \t_Tháo gỡ_ tên chức năng\n"
+" -h --help \tHiện thông tin _trợ giúp_ nà y\n"
+" -v --version \tHiện _phiên bản_ của chương trình\n"
+"\n"
+
+#: addr2line.c:88 ar.c:263 coffdump.c:467 nlmconv.c:1110 objcopy.c:478
+#: objcopy.c:512 readelf.c:2631 size.c:99 srconv.c:1731 strings.c:667
+#: sysdump.c:655 windres.c:672
+#, c-format
+msgid "Report bugs to %s\n"
+msgstr "Hãy trình báo lỗi nà o cho %s\n"
+
+#: addr2line.c:241
+#, c-format
+msgid "%s: can not get addresses from archive"
+msgstr "%s: không thể lấy địa chỉ từ kho"
+
+#: addr2line.c:311 nm.c:1519 objdump.c:2848
+#, c-format
+msgid "unknown demangling style `%s'"
+msgstr "không biết kiểu dáng tháo gõ « %s »"
+
+#: ar.c:205
+#, c-format
+msgid "no entry %s in archive\n"
+msgstr "không có mục nháºp %s trong kho\n"
+
+#: ar.c:221
+#, c-format
+msgid "Usage: %s [emulation options] [-]{dmpqrstx}[abcfilNoPsSuvV] [member-name] [count] archive-file file...\n"
+msgstr "Cách sá» dụng: %s [tùy chá»n mô phá»ng] [-]{dmpqrstx}[abcfilNoPsSuvV] [tên thà nh viên] [số đếm] táºp_tin_kho táºp_tin...\n"
+
+#: ar.c:224
+#, c-format
+msgid " %s -M [<mri-script]\n"
+msgstr " %s -M [<táºp_lệnh-mri]\n"
+
+#: ar.c:225
+#, c-format
+msgid " commands:\n"
+msgstr " lệnh:\n"
+
+#: ar.c:226
+#, c-format
+msgid " d - delete file(s) from the archive\n"
+msgstr " d • _xóa bá»_ táºp tin ra kho\n"
+
+#: ar.c:227
+#, c-format
+msgid " m[ab] - move file(s) in the archive\n"
+msgstr " m[ab] • _di chuyển_ táºp tin trong kho\n"
+
+#: ar.c:228
+#, c-format
+msgid " p - print file(s) found in the archive\n"
+msgstr " p • _in_ táºp tin được tìm trong kho\n"
+
+#: ar.c:229
+#, c-format
+msgid " q[f] - quick append file(s) to the archive\n"
+msgstr " q[f] • phụ thêm _nhanh_ táºp tin và o kho\n"
+
+#: ar.c:230
+#, c-format
+msgid " r[ab][f][u] - replace existing or insert new file(s) into the archive\n"
+msgstr " r[ab][f][u] • _thay thế_ táºp tin đã có, hoặc chèn táºp tin má»›i và o kho\n"
+
+#: ar.c:231
+#, c-format
+msgid " t - display contents of archive\n"
+msgstr " t • hiển thị nội dung kho\n"
+
+#: ar.c:232
+#, c-format
+msgid " x[o] - extract file(s) from the archive\n"
+msgstr " x[o] • trÃch táºp tin ra kho\n"
+
+#: ar.c:233
+#, c-format
+msgid " command specific modifiers:\n"
+msgstr " bá»™ sá»a đổi đặc trÆ°ng cho lệnh:\n"
+
+#: ar.c:234
+#, c-format
+msgid " [a] - put file(s) after [member-name]\n"
+msgstr " [a] • để táºp tin _sau_ [tên thà nh viên]\n"
+
+#: ar.c:235
+#, c-format
+msgid " [b] - put file(s) before [member-name] (same as [i])\n"
+msgstr " [b] • để táºp tin _trÆ°á»›c_ [tên thà nh viên] (bằng [i])\n"
+
+#: ar.c:236
+#, c-format
+msgid " [N] - use instance [count] of name\n"
+msgstr " [N] • dùng lần [số đếm] gặp _tên_\n"
+
+#: ar.c:237
+#, c-format
+msgid " [f] - truncate inserted file names\n"
+msgstr " [f] • cắt bá»›t tên _táºp tin_ đã chèn\n"
+
+#: ar.c:238
+#, c-format
+msgid " [P] - use full path names when matching\n"
+msgstr " [P] • dùng tên _Ä‘Æ°á»ng dẫn_ đầy đủ khi khá»›p\n"
+
+#: ar.c:239
+#, c-format
+msgid " [o] - preserve original dates\n"
+msgstr " [o] • bảo tồn các ngà y _gốc_\n"
+
+#: ar.c:240
+#, c-format
+msgid " [u] - only replace files that are newer than current archive contents\n"
+msgstr " [u] • thay thế chỉ những táºp tin má»›i hÆ¡n ná»™i dung kho hiện thá»i\n"
+
+#: ar.c:241
+#, c-format
+msgid " generic modifiers:\n"
+msgstr " bá»™ sá»a đổi chung:\n"
+
+#: ar.c:242
+#, c-format
+msgid " [c] - do not warn if the library had to be created\n"
+msgstr " [c] • đừng cảnh báo nếu thư viên phải được _tạo_\n"
+
+#: ar.c:243
+#, c-format
+msgid " [s] - create an archive index (cf. ranlib)\n"
+msgstr " [s] • tạo chỉ mục kho (như ranlib)\n"
+
+#: ar.c:244
+#, c-format
+msgid " [S] - do not build a symbol table\n"
+msgstr " [S] • đừng xây dụng bảng _ký hiệu_\n"
+
+#: ar.c:245
+#, c-format
+msgid " [v] - be verbose\n"
+msgstr " [v] • _xuất chi tiết_\n"
+
+#: ar.c:246
+#, c-format
+msgid " [V] - display the version number\n"
+msgstr " [V] • hiển thị số thứ tự _phiên bản_\n"
+
+#: ar.c:253
+#, c-format
+msgid "Usage: %s [options] archive\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n] kho\n"
+
+#: ar.c:254
+#, c-format
+msgid " Generate an index to speed access to archives\n"
+msgstr " Tạo ra chỉ mục để tăng tốc Ä‘á»™ truy cáºp kho\n"
+
+#: ar.c:255
+#, c-format
+msgid ""
+" The options are:\n"
+" -h --help Print this help message\n"
+" -V --version Print version information\n"
+msgstr ""
+"Tùy chá»n:\n"
+" -h, --help \thiển thị _trợ giúp_ nà y\n"
+" -V, --version \txuất thông tin _phiên bản_\n"
+
+#: ar.c:483
+msgid "two different operation options specified"
+msgstr "hai tùy chá»n thao tác khác đã xác định"
+
+#: ar.c:558
+#, c-format
+msgid "illegal option -- %c"
+msgstr "không cho phép tùy chá»n « -- %c »"
+
+#: ar.c:604
+msgid "no operation specified"
+msgstr "chÆ°a ghi rõ tùy chá»n."
+
+#: ar.c:607
+msgid "`u' is only meaningful with the `r' option."
+msgstr "« u » có nghÄ©a chỉ cùng vá»›i tùy chá»n « r »."
+
+#: ar.c:615
+msgid "`N' is only meaningful with the `x' and `d' options."
+msgstr "« N » có nghÄ©a chỉ cùng vá»›i tùy chá»n « x » và « d »."
+
+#: ar.c:618
+msgid "Value for `N' must be positive."
+msgstr "Giá trị cho « N » phải là số dương."
+
+#: ar.c:668
+#, c-format
+msgid "internal error -- this option not implemented"
+msgstr "lá»—i ná»™i bá»™: chÆ°a thá»±c hiện tùy chá»n nà y"
+
+#: ar.c:737
+#, c-format
+msgid "creating %s"
+msgstr "đang tạo %s..."
+
+#: ar.c:786 ar.c:836 ar.c:1154 objcopy.c:1603
+#, c-format
+msgid "internal stat error on %s"
+msgstr "lỗi stat nôi bộ trên %s"
+
+# Variable: do not translate/ biến: đừng dịch
+#: ar.c:790
+#, c-format
+msgid ""
+"\n"
+"<%s>\n"
+"\n"
+msgstr ""
+"\n"
+"<%s>\n"
+"\n"
+
+#: ar.c:806 ar.c:873
+#, c-format
+msgid "%s is not a valid archive"
+msgstr "%s không phải là một kho hợp lệ"
+
+#: ar.c:841
+#, c-format
+msgid "stat returns negative size for %s"
+msgstr "việc stat (lấy các thông tin) trả gởi kÃch cỡ âm cho %s"
+
+#: ar.c:1059
+#, c-format
+msgid "No member named `%s'\n"
+msgstr "Không có thà nh viên tên « %s »\n"
+
+#: ar.c:1109
+#, c-format
+msgid "no entry %s in archive %s!"
+msgstr "không có mục nháºp %s trong kho %s."
+
+#: ar.c:1246
+#, c-format
+msgid "%s: no archive map to update"
+msgstr "%s: không có ánh xạ kho cần cáºp nháºt"
+
+#: arsup.c:83
+#, c-format
+msgid "No entry %s in archive.\n"
+msgstr "Không có mục nháºp %s trong kho.\n"
+
+#: arsup.c:109
+#, c-format
+msgid "Can't open file %s\n"
+msgstr "Không thể mở táºp tin %s\n"
+
+#: arsup.c:162
+#, c-format
+msgid "%s: Can't open output archive %s\n"
+msgstr "%s: Không thể mở kho xuất %s\n"
+
+#: arsup.c:179
+#, c-format
+msgid "%s: Can't open input archive %s\n"
+msgstr "%s: Không thể mở kho nháºp %s\n"
+
+#: arsup.c:188
+#, c-format
+msgid "%s: file %s is not an archive\n"
+msgstr "%s: táºp tin %s không phải là kho\n"
+
+#: arsup.c:227
+#, c-format
+msgid "%s: no output archive specified yet\n"
+msgstr "%s: chưa ghi rõ kho xuất\n"
+
+#: arsup.c:247 arsup.c:285 arsup.c:327 arsup.c:347 arsup.c:413
+#, c-format
+msgid "%s: no open output archive\n"
+msgstr "%s: không có kho xuất đã mở\n"
+
+#: arsup.c:258 arsup.c:368 arsup.c:394
+#, c-format
+msgid "%s: can't open file %s\n"
+msgstr "%s: không thể mở táºp tin %s\n"
+
+#: arsup.c:312 arsup.c:390 arsup.c:471
+#, c-format
+msgid "%s: can't find module file %s\n"
+msgstr "%s: không tìm thấy táºp tin mô-Ä‘un %s\n"
+
+#: arsup.c:422
+#, c-format
+msgid "Current open archive is %s\n"
+msgstr "Kho đã mở hiện thá»i là %s\n"
+
+#: arsup.c:446
+#, c-format
+msgid "%s: no open archive\n"
+msgstr "%s: không có kho đã mở\n"
+
+#: binemul.c:37
+#, c-format
+msgid " No emulation specific options\n"
+msgstr " Không có tùy chá»n đặc trÆ°ng cho mô phá»ng\n"
+
+#. Macros for common output.
+#: binemul.h:42
+#, c-format
+msgid " emulation options: \n"
+msgstr " tùy chá»n mô phá»ng:\n"
+
+#: bucomm.c:109
+#, c-format
+msgid "can't set BFD default target to `%s': %s"
+msgstr "không thể láºp Ä‘Ãch mặc định BFD thà nh « %s »: %s"
+
+#: bucomm.c:120
+#, c-format
+msgid "%s: Matching formats:"
+msgstr "%s: khuôn dạng khớp:"
+
+#: bucomm.c:135
+#, c-format
+msgid "Supported targets:"
+msgstr "ÄÃch há»— trợ :"
+
+#: bucomm.c:137
+#, c-format
+msgid "%s: supported targets:"
+msgstr "%s: Ä‘Ãch há»— trợ :"
+
+#: bucomm.c:153
+#, c-format
+msgid "Supported architectures:"
+msgstr "Kiến trúc hỗ trợ :"
+
+#: bucomm.c:155
+#, c-format
+msgid "%s: supported architectures:"
+msgstr "%s: kiến trúc hỗ trợ :"
+
+#: bucomm.c:348
+#, c-format
+msgid "BFD header file version %s\n"
+msgstr "Phiên bản táºp tin đầu BFD %s\n"
+
+#: bucomm.c:449
+#, c-format
+msgid "%s: bad number: %s"
+msgstr "%s: số sai: %s"
+
+#: bucomm.c:466 strings.c:386
+#, c-format
+msgid "'%s': No such file"
+msgstr "« %s »: không có táºp tin nhÆ° váºy"
+
+#: bucomm.c:468 strings.c:388
+#, c-format
+msgid "Warning: could not locate '%s'. reason: %s"
+msgstr "Cảnh báo : không thể định vị « %s ». Lý do : %s"
+
+#: bucomm.c:472
+#, c-format
+msgid "Warning: '%s' is not an ordinary file"
+msgstr "Cảnh báo : « %s » không phải là má»™t táºp tin chuẩn"
+
+#: coffdump.c:105
+#, c-format
+msgid "#lines %d "
+msgstr "#dòng %d "
+
+#: coffdump.c:459 sysdump.c:648
+#, c-format
+msgid "Usage: %s [option(s)] in-file\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n...] táºp_tin_nháºp\n"
+
+#: coffdump.c:460
+#, c-format
+msgid " Print a human readable interpretation of a SYSROFF object file\n"
+msgstr "In ra lá»i thông dịch cho phép ngÆ°á»i Ä‘á»c của táºp tin đối tượng SYSROFF\n"
+
+#: coffdump.c:461
+#, c-format
+msgid ""
+" The options are:\n"
+" -h --help Display this information\n"
+" -v --version Display the program's version\n"
+"\n"
+msgstr ""
+"Tùy chá»n:\n"
+" -h, --help hiển thị _trợ giúp_ nà y\n"
+" -v --version hiển thị _phiên bản_ của chương trình\n"
+
+#: coffdump.c:527 srconv.c:1819 sysdump.c:710
+msgid "no input file specified"
+msgstr "chÆ°a ghi rõ táºp tin nháºp"
+
+#: debug.c:648
+msgid "debug_add_to_current_namespace: no current file"
+msgstr "debug_add_to_current_namespace: (gỡ lá»—i thêm và o vùng tên hiện có) không có táºp tin hiện thá»i"
+
+#: debug.c:727
+msgid "debug_start_source: no debug_set_filename call"
+msgstr "debug_start_source: (gỡ lá»—i bắt đầu nguồn) không có cuá»™c gá»i kiểu « debug_set_filename » (gỡ lá»—i láºp tên táºp tin)"
+
+#: debug.c:783
+msgid "debug_record_function: no debug_set_filename call"
+msgstr "debug_record_function: (gỡ lá»—i ghi lÆ°u chứa năng) không có cuá»™c gá»i kiểu « debug_set_filename » (gỡ lá»—i láºp tên táºp tin)"
+
+#: debug.c:835
+msgid "debug_record_parameter: no current function"
+msgstr "debug_record_parameter: (gỡ lá»—i ghi lÆ°u tham số) không có chức năng hiện thá»i"
+
+#: debug.c:867
+msgid "debug_end_function: no current function"
+msgstr "debug_end_function: (gỡ lá»—i kết thúc chức năng) không có chức năng hiện thá»i"
+
+#: debug.c:873
+msgid "debug_end_function: some blocks were not closed"
+msgstr "debug_end_function: (gỡ lỗi kết thúc chức năng) một số khối chưa được đóng"
+
+#: debug.c:901
+msgid "debug_start_block: no current block"
+msgstr "debug_start_block: (gỡ lá»—i bắt đầu khối) không có khối hiện thá»i"
+
+#: debug.c:937
+msgid "debug_end_block: no current block"
+msgstr "debug_end_block: (gỡ lá»—i kết thúc khối) không có khối hiện thá»i"
+
+#: debug.c:944
+msgid "debug_end_block: attempt to close top level block"
+msgstr "debug_end_block: (gỡ lỗi kết thúc khối) cố đóng khối cấp đầu"
+
+#: debug.c:967
+msgid "debug_record_line: no current unit"
+msgstr "debug_record_line: (gỡ lá»—i ghi lÆ°u dòng) không có Ä‘Æ¡n vị hiện thá»i"
+
+#. FIXME
+#: debug.c:1020
+msgid "debug_start_common_block: not implemented"
+msgstr "debug_start_common_block: not implemented"
+
+#. FIXME
+#: debug.c:1031
+msgid "debug_end_common_block: not implemented"
+msgstr "debug_end_common_block: not implemented"
+
+#. FIXME.
+#: debug.c:1115
+msgid "debug_record_label: not implemented"
+msgstr "debug_record_label: not implemented"
+
+#: debug.c:1137
+msgid "debug_record_variable: no current file"
+msgstr "debug_record_variable: (gỡ lá»—i ghi lÆ°u biến) không có táºp tin hiện thá»ino current file"
+
+#: debug.c:1665
+msgid "debug_make_undefined_type: unsupported kind"
+msgstr "debug_make_undefined_type: (gỡ lỗi tạo kiểu chưa được định nghĩa) kiểu chưa được hỗ trợ"
+
+#: debug.c:1842
+msgid "debug_name_type: no current file"
+msgstr "debug_name_type: no current file"
+
+#: debug.c:1887
+msgid "debug_tag_type: no current file"
+msgstr "debug_tag_type: (gỡ lá»—i kiểu thẻ) không có táºp tin hiện thá»iLÆ°u táºp tin hiện"
+
+#: debug.c:1895
+msgid "debug_tag_type: extra tag attempted"
+msgstr "debug_tag_type: (gỡ lỗi kiểu thẻ) đã cố thẻ thêm"
+
+#: debug.c:1932
+#, c-format
+msgid "Warning: changing type size from %d to %d\n"
+msgstr "Cảnh báo : Ä‘ang thay đổi kÃch cỡ kiểu từ %d đến %d\n"
+
+#: debug.c:1954
+msgid "debug_find_named_type: no current compilation unit"
+msgstr "debug_find_named_type: (gỡ lá»—i tìm kiểu tên đã cho) không có Ä‘Æ¡n vị biên dịch hiện thá»i"
+
+#: debug.c:2057
+#, c-format
+msgid "debug_get_real_type: circular debug information for %s\n"
+msgstr "debug_get_real_type: (gỡ lá»—i lấy kiểu tháºt) thông tin gỡ lá»—i vòng cho %s\n"
+
+#: debug.c:2484
+msgid "debug_write_type: illegal type encountered"
+msgstr "debug_write_type: (gỡ lỗi ghi kiểu) gặp kiểu không được phép"
+
+#: dlltool.c:773 dlltool.c:797 dlltool.c:826
+#, c-format
+msgid "Internal error: Unknown machine type: %d"
+msgstr "Lỗi nội bộ : không biết kiểu máy: %d"
+
+#: dlltool.c:862
+#, c-format
+msgid "Can't open def file: %s"
+msgstr "Không thể mở táºp tin định nghÄ©a: %s"
+
+#: dlltool.c:867
+#, c-format
+msgid "Processing def file: %s"
+msgstr "Äang xá» lý táºp tin định nghÄ©a: %s"
+
+#: dlltool.c:871
+msgid "Processed def file"
+msgstr "Äã xá» lý táºp tin định nghÄ©a"
+
+#: dlltool.c:895
+#, c-format
+msgid "Syntax error in def file %s:%d"
+msgstr "Gặp lá»—i cú pháp trong táºp tin định nghÄ©a %s:%d"
+
+#: dlltool.c:930
+#, c-format
+msgid "%s: Path components stripped from image name, '%s'."
+msgstr "%s: các thà nh phần Ä‘Æ°á»ng dẫn bị tÆ°á»›c ra tên ảnh, « %s »."
+
+#: dlltool.c:939
+#, c-format
+msgid "NAME: %s base: %x"
+msgstr "TÊN: %s cơ bản: %x"
+
+#: dlltool.c:942 dlltool.c:958
+msgid "Can't have LIBRARY and NAME"
+msgstr "Không cho phép dùng cả THƯ VIÊN lẫn TÊN Ä‘á»u"
+
+#: dlltool.c:955
+#, c-format
+msgid "LIBRARY: %s base: %x"
+msgstr "THƯ VIÊN: %s cơ bản: %x"
+
+#: dlltool.c:1191 resrc.c:269
+#, c-format
+msgid "wait: %s"
+msgstr "đợi: %s"
+
+#: dlltool.c:1196 dllwrap.c:418 resrc.c:274
+#, c-format
+msgid "subprocess got fatal signal %d"
+msgstr "tiến trình con đã nháºn tÃn hiệu nghiệm trá»ng %d"
+
+#: dlltool.c:1202 dllwrap.c:425 resrc.c:281
+#, c-format
+msgid "%s exited with status %d"
+msgstr "%s đã thoát với trạng thái %d"
+
+#: dlltool.c:1233
+#, c-format
+msgid "Sucking in info from %s section in %s"
+msgstr "Äang kéo và o thông tin từ phần %s trong %s..."
+
+#: dlltool.c:1358
+#, c-format
+msgid "Excluding symbol: %s"
+msgstr "Äang loại trừ ký hiệu : %s"
+
+#: dlltool.c:1447 dlltool.c:1458 nm.c:998 nm.c:1009
+#, c-format
+msgid "%s: no symbols"
+msgstr "%s: không có ký hiệu"
+
+#. FIXME: we ought to read in and block out the base relocations.
+#: dlltool.c:1484
+#, c-format
+msgid "Done reading %s"
+msgstr "Äã Ä‘á»c xong %s"
+
+#: dlltool.c:1494
+#, c-format
+msgid "Unable to open object file: %s"
+msgstr "Không thể mở táºp tin đối tượng: %s"
+
+#: dlltool.c:1497
+#, c-format
+msgid "Scanning object file %s"
+msgstr "Äang quét táºp tin đối tượng %s..."
+
+#: dlltool.c:1512
+#, c-format
+msgid "Cannot produce mcore-elf dll from archive file: %s"
+msgstr "Không thể cung cấp « mcore-elf dll » từ táºp tin kho: %s"
+
+#: dlltool.c:1598
+msgid "Adding exports to output file"
+msgstr "Äang thêm các việc xuất và o nhóm kết xuất..."
+
+#: dlltool.c:1646
+msgid "Added exports to output file"
+msgstr "Äã thêm các việc xuất và o nhóm kết xuất"
+
+#: dlltool.c:1767
+#, c-format
+msgid "Generating export file: %s"
+msgstr "Äang tạo ra táºp tin xuất: %s"
+
+#: dlltool.c:1772
+#, c-format
+msgid "Unable to open temporary assembler file: %s"
+msgstr "Không thể mở táºp tin dịch mã số tạm thá»i: %s"
+
+#: dlltool.c:1775
+#, c-format
+msgid "Opened temporary file: %s"
+msgstr "Äã mở táºp tin tạm thá»i: %s"
+
+#: dlltool.c:1997
+msgid "Generated exports file"
+msgstr "Äã tạo ra táºp tin xuất"
+
+#: dlltool.c:2203
+#, c-format
+msgid "bfd_open failed open stub file: %s"
+msgstr "bfd_open không mở được táºp tin stub: %s"
+
+#: dlltool.c:2206
+#, c-format
+msgid "Creating stub file: %s"
+msgstr "Äang tạo táºp tin stub: %s"
+
+#: dlltool.c:2588
+#, c-format
+msgid "failed to open temporary head file: %s"
+msgstr "lá»—i mở táºp tin đầu tạm: %s"
+
+#: dlltool.c:2647
+#, c-format
+msgid "failed to open temporary tail file: %s"
+msgstr "lá»—i mở táºp tin Ä‘uôi tạm: %s"
+
+#: dlltool.c:2714
+#, c-format
+msgid "Can't open .lib file: %s"
+msgstr "Không thể mở táºp tin « .lib » (thÆ° viên): %s"
+
+#: dlltool.c:2717
+#, c-format
+msgid "Creating library file: %s"
+msgstr "Äang tạo táºp tin thÆ° viên: %s"
+
+#: dlltool.c:2800 dlltool.c:2806
+#, c-format
+msgid "cannot delete %s: %s"
+msgstr "không thể xóa bỠ%s: %s"
+
+#: dlltool.c:2811
+msgid "Created lib file"
+msgstr "Äã tạo táºp tin thÆ° viên"
+
+#: dlltool.c:2904
+#, c-format
+msgid "Warning, ignoring duplicate EXPORT %s %d,%d"
+msgstr "Cảnh báo, đang bỠqua XUẤT trùng %s %d,%d"
+
+#: dlltool.c:2910
+#, c-format
+msgid "Error, duplicate EXPORT with oridinals: %s"
+msgstr "Lá»—i: XUẤT trùng vá»›i Ä‘iá»u thứ tá»± : %s"
+
+#: dlltool.c:3026
+msgid "Processing definitions"
+msgstr "Äang xá» lý các lá»i định nghÄ©a..."
+
+#: dlltool.c:3058
+msgid "Processed definitions"
+msgstr "Äã xá» lý các lá»i định nghÄ©a"
+
+#. xgetext:c-format
+#: dlltool.c:3065 dllwrap.c:479
+#, c-format
+msgid "Usage %s <option(s)> <object-file(s)>\n"
+msgstr "Cách sá» dụng %s <tùy_chá»n...> <táºp_tin_đối_tượng...>\n"
+
+#. xgetext:c-format
+#: dlltool.c:3067
+#, c-format
+msgid " -m --machine <machine> Create as DLL for <machine>. [default: %s]\n"
+msgstr " -m --machine <máy> Tạo dạng DLL cho <máy>. [mặc định: %s]\n"
+
+#: dlltool.c:3068
+#, c-format
+msgid " possible <machine>: arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n"
+msgstr " <máy> có thể: arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n"
+
+#: dlltool.c:3069
+#, c-format
+msgid " -e --output-exp <outname> Generate an export file.\n"
+msgstr " -e --output-exp <tên_táºp_tin> \tTạo ra táºp tin _xuất_.\n"
+
+#: dlltool.c:3070
+#, c-format
+msgid " -l --output-lib <outname> Generate an interface library.\n"
+msgstr " -l --output-lib <tên_táºp_tin> \tTạo _ra thÆ° viên_ giao diện.\n"
+
+#: dlltool.c:3071
+#, c-format
+msgid " -a --add-indirect Add dll indirects to export file.\n"
+msgstr " -a --add-indirect _Thêm lá»i gián tiếp_dạng dll và o táºp tin xuất\n"
+
+#: dlltool.c:3072
+#, c-format
+msgid " -D --dllname <name> Name of input dll to put into interface lib.\n"
+msgstr " -D --dllname <tên> _Tên dll_ nháºp cần để và o thÆ° viên giao diện.\n"
+
+#: dlltool.c:3073
+#, c-format
+msgid " -d --input-def <deffile> Name of .def file to be read in.\n"
+msgstr " -d --input-def <tên_táºp_tin> \tTên táºp tin _định nghÄ©a_ cần Ä‘á»c _và o_.\n"
+
+#: dlltool.c:3074
+#, c-format
+msgid " -z --output-def <deffile> Name of .def file to be created.\n"
+msgstr " -z --output-def <tên_táºp_tin> Tên táºp tin _định nghÄ©a_ cần tạo (_ra_).\n"
+
+#: dlltool.c:3075
+#, c-format
+msgid " --export-all-symbols Export all symbols to .def\n"
+msgstr " --export-all-symbols Tá»± Ä‘á»™ng _xuất má»i ký hiệu_ và o táºp tin định nghÄ©a\n"
+
+#: dlltool.c:3076
+#, c-format
+msgid " --no-export-all-symbols Only export listed symbols\n"
+msgstr ""
+" --no-export-all-symbols \tXuất chỉ những ký hiệu đã liệt kê\n"
+"\t\t\t\t\t\t\t\t(_không xuất má»i ký hiệu_)\n"
+
+#: dlltool.c:3077
+#, c-format
+msgid " --exclude-symbols <list> Don't export <list>\n"
+msgstr ""
+" --exclude-symbols <danh_sách> Äừng xuất danh sách nà y\n"
+"\t\t\t\t\t\t\t\t(_loại trừ ký hiệu_)\n"
+
+#: dlltool.c:3078
+#, c-format
+msgid " --no-default-excludes Clear default exclude symbols\n"
+msgstr ""
+" --no-default-excludes Xóa các ký hiệu cần loại trừ theo mặc định\n"
+"\t\t\t\t\t\t\t\t(không loại trừ mặc định)\n"
+
+#: dlltool.c:3079
+#, c-format
+msgid " -b --base-file <basefile> Read linker generated base file.\n"
+msgstr " -b --base-file <tên_táºp_tin> Äá»c _táºp tin cÆ¡ bản_ do bá»™ liên kết tạo ra.\n"
+
+#: dlltool.c:3080
+#, c-format
+msgid " -x --no-idata4 Don't generate idata$4 section.\n"
+msgstr " -x --no-idata4 Äừng tạo ra phần « idata$4 ».\n"
+
+#: dlltool.c:3081
+#, c-format
+msgid " -c --no-idata5 Don't generate idata$5 section.\n"
+msgstr " -c --no-idata5 Äừng tạo ra phần « idata$5 ».\n"
+
+#: dlltool.c:3082
+#, c-format
+msgid " -U --add-underscore Add underscores to symbols in interface library.\n"
+msgstr ""
+" -U --add-underscore \t_Thêm dấu gạch dưới_ và o\n"
+"\t\t\t\t\t\tcác ký hiệu trong thư viên giao diện.\n"
+
+#: dlltool.c:3083
+#, c-format
+msgid " -k --kill-at Kill @<n> from exported names.\n"
+msgstr ""
+" -k --kill-at Xóa bỠ« @<n> » ra các tên đã xuất.\n"
+"\t\t\t\t\t\t(_buộc kết thúc tại_)\n"
+
+#: dlltool.c:3084
+#, c-format
+msgid " -A --add-stdcall-alias Add aliases without @<n>.\n"
+msgstr ""
+" -A --add-stdcall-alias \tThêm biệt hiệu không có « @<n> ».\n"
+"\t\t\t\t\t\t(_thêm biệt hiệu gá»i chuẩn_)\n"
+
+#: dlltool.c:3085
+#, c-format
+msgid " -p --ext-prefix-alias <prefix> Add aliases with <prefix>.\n"
+msgstr ""
+" -p --ext-prefix-alias <tiá»n_tố> \tThêm các biệt hiệu có tiá»n tố nà y.\n"
+"\t\t\t\t\t\t(_biệt hiệu tiá»n tố thêm_)\n"
+
+#: dlltool.c:3086
+#, c-format
+msgid " -S --as <name> Use <name> for assembler.\n"
+msgstr " -S --as <tên> \tDùng tên nà y cho chương trình dịch mã số.\n"
+
+#: dlltool.c:3087
+#, c-format
+msgid " -f --as-flags <flags> Pass <flags> to the assembler.\n"
+msgstr ""
+" -f --as-flags <các_cá»> Gởi các cá» nà y qua cho chÆ°Æ¡ng trình dịch mã số.\n"
+"\t\t\t\t\t\t\t(_dạng cá»_)\n"
+
+#: dlltool.c:3088
+#, c-format
+msgid " -C --compat-implib Create backward compatible import library.\n"
+msgstr " -C --compat-implib \tTạo _thÆ° viên nháºp tÆ°Æ¡ng thÃch_ ngược.\n"
+
+#: dlltool.c:3089
+#, c-format
+msgid " -n --no-delete Keep temp files (repeat for extra preservation).\n"
+msgstr ""
+" -n --no-delete \t\tGiữ lại các táºp tin tạm thá»i (lặp lại để bảo tồn thêm)\n"
+"\t\t\t\t\t\t(_không xóa bá»_)\n"
+
+#: dlltool.c:3090
+#, c-format
+msgid " -t --temp-prefix <prefix> Use <prefix> to construct temp file names.\n"
+msgstr " -t --temp-prefix <tiá»n_tố>\tDùng _tiá»n tố_ nà y để tạo tên táºp tin _tạm_.\n"
+
+#: dlltool.c:3091
+#, c-format
+msgid " -v --verbose Be verbose.\n"
+msgstr " -v --verbose Xuất _chi tiết_.\n"
+
+#: dlltool.c:3092
+#, c-format
+msgid " -V --version Display the program version.\n"
+msgstr " -V --version \tHiển thị phiên bản chương trình.\n"
+
+#: dlltool.c:3093
+#, c-format
+msgid " -h --help Display this information.\n"
+msgstr " -h --help \tHiển thị _trợ giúp_ nà y.\n"
+
+#: dlltool.c:3095
+#, c-format
+msgid " -M --mcore-elf <outname> Process mcore-elf object files into <outname>.\n"
+msgstr ""
+" -M --mcore-elf <tên_táºp_tin>\n"
+"\t\tXá» lý các táºp tin đối tượng kiểu « mcore-elf » và o táºp tin tên nà y.\n"
+
+#: dlltool.c:3096
+#, c-format
+msgid " -L --linker <name> Use <name> as the linker.\n"
+msgstr " -L --linker <tên> \t\tDùng tên nà y là _bộ liên kết_.\n"
+
+#: dlltool.c:3097
+#, c-format
+msgid " -F --linker-flags <flags> Pass <flags> to the linker.\n"
+msgstr " -F --linker-flags <các_cá»> \tGởi _các cá»_ nà y qua cho _bá»™ liên kết_.\n"
+
+#: dlltool.c:3211
+#, c-format
+msgid "Path components stripped from dllname, '%s'."
+msgstr "Các thà nh phần Ä‘Æ°á»ng dẫn bị tÆ°á»›c ra tên dll, « %s »."
+
+#: dlltool.c:3256
+#, c-format
+msgid "Unable to open base-file: %s"
+msgstr "Không thể mở táºp tin cÆ¡ sở: %s"
+
+#: dlltool.c:3288
+#, c-format
+msgid "Machine '%s' not supported"
+msgstr "Không hỗ trợ máy « %s »"
+
+#: dlltool.c:3392 dllwrap.c:209
+#, c-format
+msgid "Tried file: %s"
+msgstr "Äã thá» táºp tin: %s"
+
+#: dlltool.c:3399 dllwrap.c:216
+#, c-format
+msgid "Using file: %s"
+msgstr "Äang dùng táºp tin: %s"
+
+#: dllwrap.c:299
+#, c-format
+msgid "Keeping temporary base file %s"
+msgstr "Äang giữ táºp tin cÆ¡ bản tạm thá»i %s"
+
+#: dllwrap.c:301
+#, c-format
+msgid "Deleting temporary base file %s"
+msgstr "Äang xóa bá» táºp tin cÆ¡ bản tạm thá»i %s..."
+
+#: dllwrap.c:315
+#, c-format
+msgid "Keeping temporary exp file %s"
+msgstr "Äang giữ táºp tin xuất tạm thá»i %s"
+
+#: dllwrap.c:317
+#, c-format
+msgid "Deleting temporary exp file %s"
+msgstr "Äang xóa bá» táºp tin xuất tạm thá»i %s..."
+
+#: dllwrap.c:330
+#, c-format
+msgid "Keeping temporary def file %s"
+msgstr "Äang giữ táºp tin định nghÄ©a tạm thá»i %s"
+
+#: dllwrap.c:332
+#, c-format
+msgid "Deleting temporary def file %s"
+msgstr "Äang xóa bá» táºp tin định nghÄ©a tạm thá»i %s..."
+
+#: dllwrap.c:480
+#, c-format
+msgid " Generic options:\n"
+msgstr " Tùy chá»n chung:\n"
+
+#: dllwrap.c:481
+#, c-format
+msgid " --quiet, -q Work quietly\n"
+msgstr " --quiet, -q Không xuất chi tiết (_im_)\n"
+
+#: dllwrap.c:482
+#, c-format
+msgid " --verbose, -v Verbose\n"
+msgstr " --verbose, -v Xuất _chi tiết_\n"
+
+#: dllwrap.c:483
+#, c-format
+msgid " --version Print dllwrap version\n"
+msgstr " --version In ra phiên bản dllwrap\n"
+
+#: dllwrap.c:484
+#, c-format
+msgid " --implib <outname> Synonym for --output-lib\n"
+msgstr " --implib <tên_táºp_tin> Bằng « --output-lib »\n"
+
+#: dllwrap.c:485
+#, c-format
+msgid " Options for %s:\n"
+msgstr " Tùy chá»n cho %s:\n"
+
+#: dllwrap.c:486
+#, c-format
+msgid " --driver-name <driver> Defaults to \"gcc\"\n"
+msgstr ""
+" --driver-name <trình_Ä‘iá»u_khiển> \t Mặc định là « gcc »\n"
+"\t\t\t\t\t\t\t\t(_tên trình Ä‘iá»u khiển_)\n"
+
+#: dllwrap.c:487
+#, c-format
+msgid " --driver-flags <flags> Override default ld flags\n"
+msgstr ""
+" --driver-flags <các_cá»> \t\tCó quyá»n cao hÆ¡n các cá» ld mặc định\n"
+"\t\t\t\t\t\t\t\t(_các cá» trình Ä‘iá»u khiển_)\n"
+
+#: dllwrap.c:488
+#, c-format
+msgid " --dlltool-name <dlltool> Defaults to \"dlltool\"\n"
+msgstr ""
+" --dlltool-name <dlltool> \t\tMặc định là « dlltool »\n"
+"\t\t\t\t\t\t\t\t(_tên công cụ dlltool_)\n"
+
+#: dllwrap.c:489
+#, c-format
+msgid " --entry <entry> Specify alternate DLL entry point\n"
+msgstr " --entry <điểm_và o> \t\tGhi rõ điểm _và o_ DLL xen kẽ\n"
+
+#: dllwrap.c:490
+#, c-format
+msgid " --image-base <base> Specify image base address\n"
+msgstr " --image-base <cơ_bản> \tGhi rõ địa chỉ _cơ bản ảnh_\n"
+
+#: dllwrap.c:491
+#, c-format
+msgid " --target <machine> i386-cygwin32 or i386-mingw32\n"
+msgstr " --target <máy> i386-cygwin32 hay i386-mingw32\n"
+
+#: dllwrap.c:492
+#, c-format
+msgid " --dry-run Show what needs to be run\n"
+msgstr " --dry-run \tHiển thị các Ä‘iá»u cần chạy (_chạy thá»±c hà nh_)\n"
+
+#: dllwrap.c:493
+#, c-format
+msgid " --mno-cygwin Create Mingw DLL\n"
+msgstr " --mno-cygwin \tTạo DLL dạng Mingw\n"
+
+#: dllwrap.c:494
+#, c-format
+msgid " Options passed to DLLTOOL:\n"
+msgstr " Các tùy chá»n được gởi qua cho DLLTOOL:\n"
+
+#: dllwrap.c:495
+#, c-format
+msgid " --machine <machine>\n"
+msgstr " --machine <máy>\n"
+
+#: dllwrap.c:496
+#, c-format
+msgid " --output-exp <outname> Generate export file.\n"
+msgstr " --output-exp <tên_táºp_tin> \t\tTạo ra táºp tin _xuất_.\n"
+
+#: dllwrap.c:497
+#, c-format
+msgid " --output-lib <outname> Generate input library.\n"
+msgstr " --output-lib <tên_táºp_tin> \t\tTạo _ra thÆ° viên_ nháºp.\n"
+
+#: dllwrap.c:498
+#, c-format
+msgid " --add-indirect Add dll indirects to export file.\n"
+msgstr " --add-indirect \t\t_Thêm_ các lá»i _gián tiếp_ và o táºp tin xuất.\n"
+
+#: dllwrap.c:499
+#, c-format
+msgid " --dllname <name> Name of input dll to put into output lib.\n"
+msgstr " --dllname <tên> \t\t_Tên dll_ nháºp cần để và o thÆ° viên xuất.\n"
+
+#: dllwrap.c:500
+#, c-format
+msgid " --def <deffile> Name input .def file\n"
+msgstr " --def <tên_táºp_tin> \tTên táºp tin _định nghÄ©a_ nháºp\n"
+
+#: dllwrap.c:501
+#, c-format
+msgid " --output-def <deffile> Name output .def file\n"
+msgstr " --output-def <tên_táºp_tin>\tTên _táºp tin định nghÄ©a xuất_\n"
+
+#: dllwrap.c:502
+#, c-format
+msgid " --export-all-symbols Export all symbols to .def\n"
+msgstr " --export-all-symbols _Xuất má»i ký hiệu_ và o táºp tin định nghÄ©a\n"
+
+#: dllwrap.c:503
+#, c-format
+msgid " --no-export-all-symbols Only export .drectve symbols\n"
+msgstr ""
+" --no-export-all-symbols \tXuất chỉ ký hiệu kiểu « .drectve ».\n"
+"\t\t\t\t\t\t\t\t(_không xuất má»i ký hiệu_)\n"
+
+#: dllwrap.c:504
+#, c-format
+msgid " --exclude-symbols <list> Exclude <list> from .def\n"
+msgstr ""
+" --exclude-symbols <danh sách>\n"
+"\t\t\t\t\tLoại trừ danh sách nà y ra táºp tin định nghÄ©a.\n"
+"\t\t\t\t\t\t\t\t(_loại trừ các ký hiệu_)\n"
+
+#: dllwrap.c:505
+#, c-format
+msgid " --no-default-excludes Zap default exclude symbols\n"
+msgstr ""
+" --no-default-excludes \t\tSá»a má»i ký hiệu loại trừ mặc định.\n"
+"\t\t\t\t\t\t\t\t(_không loại trừ mặc định_)\n"
+
+#: dllwrap.c:506
+#, c-format
+msgid " --base-file <basefile> Read linker generated base file\n"
+msgstr " --base-file <tên_táºp_tin> Äá»c _táºp tin cÆ¡ bản_ do bá»™ liên kết tạo ra.\n"
+
+#: dllwrap.c:507
+#, c-format
+msgid " --no-idata4 Don't generate idata$4 section\n"
+msgstr " --no-idata4 Äừng tạo ra phần « idata$4 ».\n"
+
+#: dllwrap.c:508
+#, c-format
+msgid " --no-idata5 Don't generate idata$5 section\n"
+msgstr " --no-idata5 Äừng tạo ra phần « idata$5 ».\n"
+
+#: dllwrap.c:509
+#, c-format
+msgid " -U Add underscores to .lib\n"
+msgstr " -U Thêm dấu gạch _dưới_ và o thư viên\n"
+
+#: dllwrap.c:510
+#, c-format
+msgid " -k Kill @<n> from exported names\n"
+msgstr ""
+" -k Xóa bỠ« @<n> » ra các tên đã xuất\n"
+"\t\t\t\t\t(_buộc kết thúc_)\n"
+
+#: dllwrap.c:511
+#, c-format
+msgid " --add-stdcall-alias Add aliases without @<n>\n"
+msgstr ""
+" --add-stdcall-alias \tThêm biệt hiệu không có « @<n> ».\n"
+"\t\t\t\t\t\t\t(_thêm biệt hiệu gá»i chuẩn_)\n"
+
+#: dllwrap.c:512
+#, c-format
+msgid " --as <name> Use <name> for assembler\n"
+msgstr " --as <tên> Dùng tên nà y cho chương trình dịch mã số (_dạng_)\n"
+
+#: dllwrap.c:513
+#, c-format
+msgid " --nodelete Keep temp files.\n"
+msgstr " --nodelete Giữ các táºp tin tạm (_không xóa bá»_)\n"
+
+#: dllwrap.c:514
+#, c-format
+msgid " Rest are passed unmodified to the language driver\n"
+msgstr " Các Ä‘iá»u còn lại được gởi dạng chÆ°a được sá»a đổi qua cho trình Ä‘iá»u khiển ngôn ngữ\n"
+
+#: dllwrap.c:784
+msgid "Must provide at least one of -o or --dllname options"
+msgstr "Phải cung cấp Ãt nhất má»™t của hai tùy chá»n « -o » hay « -dllname »"
+
+#: dllwrap.c:813
+msgid ""
+"no export definition file provided.\n"
+"Creating one, but that may not be what you want"
+msgstr ""
+"chÆ°a cung cấp táºp tin định nghÄ©a xuất.\n"
+"Äang tạo má»™t Ä‘iá»u, mà có lẽ không phải là điá»u bạn muốn"
+
+#: dllwrap.c:972
+#, c-format
+msgid "DLLTOOL name : %s\n"
+msgstr "Tên công cụ DLLTOOL : %s\n"
+
+#: dllwrap.c:973
+#, c-format
+msgid "DLLTOOL options : %s\n"
+msgstr "Tùy chá»n DLLTOOL: %s\n"
+
+#: dllwrap.c:974
+#, c-format
+msgid "DRIVER name : %s\n"
+msgstr "Tên TRÃŒNH ÄIỀU KHIỀN : %s\n"
+
+#: dllwrap.c:975
+#, c-format
+msgid "DRIVER options : %s\n"
+msgstr "Tùy chá»n TRÃŒNH ÄIỀU KHIỂN : %s\n"
+
+#: emul_aix.c:51
+#, c-format
+msgid " [-g] - 32 bit small archive\n"
+msgstr " [-g] • kho nhỠ32-bit\n"
+
+#: emul_aix.c:52
+#, c-format
+msgid " [-X32] - ignores 64 bit objects\n"
+msgstr " [-X32] • bỠqua các đối tượng kiểu 64 bit\n"
+
+#: emul_aix.c:53
+#, c-format
+msgid " [-X64] - ignores 32 bit objects\n"
+msgstr " [-X64] • bỠqua các đối tượng kiểu 32 bit\n"
+
+#: emul_aix.c:54
+#, c-format
+msgid " [-X32_64] - accepts 32 and 64 bit objects\n"
+msgstr " [-X32_64] • chấp nháºn các đối tượng kiểu cả 32 bit lẫn 64 bit Ä‘á»u\n"
+
+#: ieee.c:311
+msgid "unexpected end of debugging information"
+msgstr "gặp kết thúc thông tin gỡ lá»—i bất ngá»"
+
+#: ieee.c:398
+msgid "invalid number"
+msgstr "số không hợp lệ"
+
+#: ieee.c:451
+msgid "invalid string length"
+msgstr "độ dà i chuỗi không hợp lệ"
+
+#: ieee.c:506 ieee.c:547
+msgid "expression stack overflow"
+msgstr "trán đống biểu thức"
+
+#: ieee.c:526
+msgid "unsupported IEEE expression operator"
+msgstr "toán tỠbiểu thức IEE không được hỗ trợ"
+
+#: ieee.c:541
+msgid "unknown section"
+msgstr "không biết phần"
+
+#: ieee.c:562
+msgid "expression stack underflow"
+msgstr "trán ngược đống biểu thức"
+
+#: ieee.c:576
+msgid "expression stack mismatch"
+msgstr "đống biểu thức không khớp với nhau"
+
+#: ieee.c:613
+msgid "unknown builtin type"
+msgstr "không biết kiểu builtin"
+
+#: ieee.c:758
+msgid "BCD float type not supported"
+msgstr "Kiểu nổi BDC không được hỗ trợ"
+
+#: ieee.c:895
+msgid "unexpected number"
+msgstr "số bất ngá»"
+
+#: ieee.c:902
+msgid "unexpected record type"
+msgstr "kiểu mục ghi bất ngá»"
+
+#: ieee.c:935
+msgid "blocks left on stack at end"
+msgstr "có một số khối còn lại trên đống khi kết thúc"
+
+#: ieee.c:1198
+msgid "unknown BB type"
+msgstr "không biết kiểu BB"
+
+#: ieee.c:1207
+msgid "stack overflow"
+msgstr "trán đống"
+
+#: ieee.c:1230
+msgid "stack underflow"
+msgstr "trán ngược đống"
+
+#: ieee.c:1342 ieee.c:1412 ieee.c:2109
+msgid "illegal variable index"
+msgstr "chỉ mục biến không được phép"
+
+#: ieee.c:1390
+msgid "illegal type index"
+msgstr "chỉ mục kiểu không được phép"
+
+#: ieee.c:1400 ieee.c:1437
+msgid "unknown TY code"
+msgstr "không biết mã TY"
+
+#: ieee.c:1419
+msgid "undefined variable in TY"
+msgstr "gặp biến chưa được định nghĩa trong TY"
+
+#. Pascal file name. FIXME.
+#: ieee.c:1830
+msgid "Pascal file name not supported"
+msgstr "ChÆ°a há»— trợ tên táºp tin kiểu Pascal"
+
+#: ieee.c:1878
+msgid "unsupported qualifier"
+msgstr "bộ dè dặt chưa được hỗ trợ"
+
+#: ieee.c:2147
+msgid "undefined variable in ATN"
+msgstr "gặp biến chưa định nghĩa trong ATN"
+
+#: ieee.c:2190
+msgid "unknown ATN type"
+msgstr "không biết kiểu ATN"
+
+#. Reserved for FORTRAN common.
+#: ieee.c:2312
+msgid "unsupported ATN11"
+msgstr "ATN11 không được hỗ trơ"
+
+#. We have no way to record this information. FIXME.
+#: ieee.c:2339
+msgid "unsupported ATN12"
+msgstr "ATN12 không được hỗ trơ"
+
+#: ieee.c:2399
+msgid "unexpected string in C++ misc"
+msgstr "gặp chuỗi không được hỗ trơ trong C++ lặt vặt"
+
+#: ieee.c:2412
+msgid "bad misc record"
+msgstr "mục ghi lặt vặt sai"
+
+#: ieee.c:2453
+msgid "unrecognized C++ misc record"
+msgstr "không chấp nháºn mục ghi C++ lặt vặt"
+
+#: ieee.c:2568
+msgid "undefined C++ object"
+msgstr "đối tượng C++ chưa được định nghĩa"
+
+#: ieee.c:2602
+msgid "unrecognized C++ object spec"
+msgstr "chÆ°a chấp nháºn đặc tả đối tượng C++"
+
+#: ieee.c:2638
+msgid "unsupported C++ object type"
+msgstr "kiểu đối tượng C++ chưa được hỗ trợ"
+
+#: ieee.c:2648
+msgid "C++ base class not defined"
+msgstr "chưa định nghĩa hạng cơ bản C++"
+
+#: ieee.c:2660 ieee.c:2765
+msgid "C++ object has no fields"
+msgstr "Äối tượng C++ không có trÆ°á»ng nà o"
+
+#: ieee.c:2679
+msgid "C++ base class not found in container"
+msgstr "Không tìm thấy hạng cơ bản C++ trong bộ chứa"
+
+#: ieee.c:2786
+msgid "C++ data member not found in container"
+msgstr "Không tìm thấy bộ phạn dữ liệu C++ trong bộ chứa"
+
+#: ieee.c:2827 ieee.c:2977
+msgid "unknown C++ visibility"
+msgstr "không biết độ thấy rõ C++"
+
+#: ieee.c:2861
+msgid "bad C++ field bit pos or size"
+msgstr "vị trà bit hay kÃch cỡ trÆ°á»ng C++ sai"
+
+#: ieee.c:2953
+msgid "bad type for C++ method function"
+msgstr "kiểu sai cho hà m phương pháp C++"
+
+#: ieee.c:2963
+msgid "no type information for C++ method function"
+msgstr "không có thông tin kiểu cho hà m phương pháp C++"
+
+#: ieee.c:3002
+msgid "C++ static virtual method"
+msgstr "phương pháp ảo tĩnh C++"
+
+#: ieee.c:3097
+msgid "unrecognized C++ object overhead spec"
+msgstr "chÆ°a chấp nháºn đặc tả duy tu đối tượng C++"
+
+#: ieee.c:3136
+msgid "undefined C++ vtable"
+msgstr "chưa định nghĩa vtable C++"
+
+#: ieee.c:3205
+msgid "C++ default values not in a function"
+msgstr "Giá trị C++ mặc định không phải trong hà m"
+
+#: ieee.c:3245
+msgid "unrecognized C++ default type"
+msgstr "chÆ°a chấp nháºn kiểu C++ mặc định"
+
+#: ieee.c:3276
+msgid "reference parameter is not a pointer"
+msgstr "tham số tham chiếu không phải là con trá»"
+
+#: ieee.c:3359
+msgid "unrecognized C++ reference type"
+msgstr "chÆ°a chấp nháºn kiểu tham chiếu C++"
+
+#: ieee.c:3441
+msgid "C++ reference not found"
+msgstr "Không tìm thấy tham chiếu C++"
+
+#: ieee.c:3449
+msgid "C++ reference is not pointer"
+msgstr "Tham chiếu C++ không phải là con trá»"
+
+#: ieee.c:3475 ieee.c:3483
+msgid "missing required ASN"
+msgstr "thiếu ASN cần thiết"
+
+#: ieee.c:3510 ieee.c:3518
+msgid "missing required ATN65"
+msgstr "thiếu ATN65 cần thiết"
+
+#: ieee.c:3532
+msgid "bad ATN65 record"
+msgstr "mục ghi ATN65 sai"
+
+#: ieee.c:4160
+#, c-format
+msgid "IEEE numeric overflow: 0x"
+msgstr "trán thuộc số IEEE: 0x"
+
+#: ieee.c:4204
+#, c-format
+msgid "IEEE string length overflow: %u\n"
+msgstr "Trán độ dà i chuỗi IEEE: %u\n"
+
+#: ieee.c:5203
+#, c-format
+msgid "IEEE unsupported integer type size %u\n"
+msgstr "KÃch cỡ kiểu số nguyên không được há»— trợ IEEE %u\n"
+
+#: ieee.c:5237
+#, c-format
+msgid "IEEE unsupported float type size %u\n"
+msgstr "KÃch cỡ kiểu nổi không được há»— trợ IEEE %u\n"
+
+#: ieee.c:5271
+#, c-format
+msgid "IEEE unsupported complex type size %u\n"
+msgstr "KÃch cỡ kiểu phức tạp không được há»— trợ IEEE %u\n"
+
+#: nlmconv.c:267 srconv.c:1810
+msgid "input and output files must be different"
+msgstr "táºp tin nháºp và xuất phải là khác nhau"
+
+#: nlmconv.c:314
+msgid "input file named both on command line and with INPUT"
+msgstr "tên táºp tin được láºp cả trên dòng lệnh lẫn bằng INPUT Ä‘á»u"
+
+#: nlmconv.c:323
+msgid "no input file"
+msgstr "không có táºp tin nháºp nà o"
+
+#: nlmconv.c:353
+msgid "no name for output file"
+msgstr "không có tên cho táºp tin nháºp"
+
+#: nlmconv.c:367
+msgid "warning: input and output formats are not compatible"
+msgstr "cảnh báo : khuôn dạng nháºp và xuất không tÆ°Æ¡ng thÃch vá»›i nhau"
+
+#: nlmconv.c:396
+msgid "make .bss section"
+msgstr "tạo phần « .bss »"
+
+#: nlmconv.c:405
+msgid "make .nlmsections section"
+msgstr "tạo phần « .nlmsections »"
+
+#: nlmconv.c:407
+msgid "set .nlmsections flags"
+msgstr "đặt các cỠ« .nlmsections »"
+
+#: nlmconv.c:435
+msgid "set .bss vma"
+msgstr "đặt vma .bss"
+
+#: nlmconv.c:442
+msgid "set .data size"
+msgstr "đặt kÃch cỡ dữ liệu .data"
+
+#: nlmconv.c:622
+#, c-format
+msgid "warning: symbol %s imported but not in import list"
+msgstr "cảnh báo : ký hiệu %s được nháºp mà không phải trong danh sách nháºp"
+
+#: nlmconv.c:642
+msgid "set start address"
+msgstr "đặt địa chỉ bắt đầu"
+
+#: nlmconv.c:691
+#, c-format
+msgid "warning: START procedure %s not defined"
+msgstr "cảnh báo : thủ tục START (bắt đầu) %s chưa được định nghĩa"
+
+#: nlmconv.c:693
+#, c-format
+msgid "warning: EXIT procedure %s not defined"
+msgstr "cảnh báo : thủ tục EXIT (thoát) %s chưa được định nghĩa"
+
+#: nlmconv.c:695
+#, c-format
+msgid "warning: CHECK procedure %s not defined"
+msgstr "cảnh báo : thủ tục CHECK (kiểm tra) %s chưa được định nghĩa"
+
+#: nlmconv.c:716 nlmconv.c:905
+msgid "custom section"
+msgstr "phần tá»± chá»n"
+
+#: nlmconv.c:737 nlmconv.c:934
+msgid "help section"
+msgstr "phần trợ giúp"
+
+#: nlmconv.c:759 nlmconv.c:952
+msgid "message section"
+msgstr "phần thông điệp"
+
+#: nlmconv.c:775 nlmconv.c:985
+msgid "module section"
+msgstr "phần mô-đun"
+
+#: nlmconv.c:795 nlmconv.c:1001
+msgid "rpc section"
+msgstr "phần rpc"
+
+#. There is no place to record this information.
+#: nlmconv.c:831
+#, c-format
+msgid "%s: warning: shared libraries can not have uninitialized data"
+msgstr "%s: cảnh báo : thư viên dùng chung không thể chứa dữ liệu chưa được sở khởi"
+
+#: nlmconv.c:852 nlmconv.c:1020
+msgid "shared section"
+msgstr "phần dùng chung"
+
+#: nlmconv.c:860
+msgid "warning: No version number given"
+msgstr "cảnh báo : chưa đưa ra số thứ tự phiên bản"
+
+#: nlmconv.c:900 nlmconv.c:929 nlmconv.c:947 nlmconv.c:996 nlmconv.c:1015
+#, c-format
+msgid "%s: read: %s"
+msgstr "%s: Ä‘á»c: %s"
+
+#: nlmconv.c:922
+msgid "warning: FULLMAP is not supported; try ld -M"
+msgstr "cảnh báo : chưa hỗ trợ FULLMAP; hãy thỠ« ld -M »"
+
+#: nlmconv.c:1098
+#, c-format
+msgid "Usage: %s [option(s)] [in-file [out-file]]\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n...] [táºp_tin_nháºp [táºp_tin_xuất]]\n"
+
+#: nlmconv.c:1099
+#, c-format
+msgid " Convert an object file into a NetWare Loadable Module\n"
+msgstr " Chuyển đổi táºp tin đối tượng sang Mô-Ä‘un Tải được NetWare (NetWare Loadable Module)\n"
+
+#: nlmconv.c:1100
+#, c-format
+msgid ""
+" The options are:\n"
+" -I --input-target=<bfdname> Set the input binary file format\n"
+" -O --output-target=<bfdname> Set the output binary file format\n"
+" -T --header-file=<file> Read <file> for NLM header information\n"
+" -l --linker=<linker> Use <linker> for any linking\n"
+" -d --debug Display on stderr the linker command line\n"
+" -h --help Display this information\n"
+" -v --version Display the program's version\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -I --input-target=<tên_bfd> \t\tLáºp dạng thức táºp tin nhị phân nháºp\n"
+"\t\t\t\t\t\t\t\t (_Ä‘Ãch nháºp_)\n"
+" -O --output-target=<tên_bfd> \tLáºp dạng thức táºp tin nhị phân xuất\n"
+"\t\t\t\t\t\t\t\t (_Ä‘Ãch xuất_)\n"
+" -T --header-file=<táºp_tin>\n"
+"\t\tÄá»c táºp tin nà y để tìm thông tin phần đầu NLM (_táºp tin phần đầu_)\n"
+" -l --linker=<bộ_liên_kết> \tDùng _bộ liên kết_ nà y khi liên kết\n"
+" -d --debug\n"
+"\tHiển thị trên thiết bị lỗi chuẩn dòng lệnh của bộ liên kết (_gỡ lỗi_)\n"
+" -h --help \t\t\tHiển thị _trợ giúp_ nà y\n"
+" -v --version \t\t\tHiển thị _phiên bản_ chương trình\n"
+
+#: nlmconv.c:1140
+#, c-format
+msgid "support not compiled in for %s"
+msgstr "chưa biên dịch cách hỗ trợ %s"
+
+#: nlmconv.c:1177
+msgid "make section"
+msgstr "tạo phần"
+
+#: nlmconv.c:1191
+msgid "set section size"
+msgstr "láºp kÃch cỡ phần"
+
+#: nlmconv.c:1197
+msgid "set section alignment"
+msgstr "láºp canh lá» phần"
+
+#: nlmconv.c:1201
+msgid "set section flags"
+msgstr "láºp các cá» phân"
+
+#: nlmconv.c:1212
+msgid "set .nlmsections size"
+msgstr "láºp kÃch cỡ « .nlmsections »"
+
+#: nlmconv.c:1293 nlmconv.c:1301 nlmconv.c:1310 nlmconv.c:1315
+msgid "set .nlmsection contents"
+msgstr "láºp ná»™i dung « .nlmsections »"
+
+#: nlmconv.c:1794
+msgid "stub section sizes"
+msgstr "kÃch cỡ phần stub"
+
+#: nlmconv.c:1841
+msgid "writing stub"
+msgstr "Ä‘ang ghi stub..."
+
+#: nlmconv.c:1925
+#, c-format
+msgid "unresolved PC relative reloc against %s"
+msgstr "có việc định vị lại liên quan đến PC chưa tháo gỡ đối với %s"
+
+#: nlmconv.c:1989
+#, c-format
+msgid "overflow when adjusting relocation against %s"
+msgstr "trán khi Ä‘iá»u chỉnh việc định vị lại đối vá»›i %s"
+
+#: nlmconv.c:2116
+#, c-format
+msgid "%s: execution of %s failed: "
+msgstr "%s: việc thực hiện %s bị lỗi:"
+
+#: nlmconv.c:2131
+#, c-format
+msgid "Execution of %s failed"
+msgstr "Việc thực hiện %s bị lỗi"
+
+#: nm.c:224 size.c:80 strings.c:651
+#, c-format
+msgid "Usage: %s [option(s)] [file(s)]\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n...] [táºp_tin...]\n"
+
+#: nm.c:225
+#, c-format
+msgid " List symbols in [file(s)] (a.out by default).\n"
+msgstr " Liệt kê các ký hiệu trong những táºp tin nà y (mặc định là <a.out>).\n"
+
+#: nm.c:226
+#, c-format
+msgid ""
+" The options are:\n"
+" -a, --debug-syms Display debugger-only symbols\n"
+" -A, --print-file-name Print name of the input file before every symbol\n"
+" -B Same as --format=bsd\n"
+" -C, --demangle[=STYLE] Decode low-level symbol names into user-level names\n"
+" The STYLE, if specified, can be `auto' (the default),\n"
+" `gnu', `lucid', `arm', `hp', `edg', `gnu-v3', `java'\n"
+" or `gnat'\n"
+" --no-demangle Do not demangle low-level symbol names\n"
+" -D, --dynamic Display dynamic symbols instead of normal symbols\n"
+" --defined-only Display only defined symbols\n"
+" -e (ignored)\n"
+" -f, --format=FORMAT Use the output format FORMAT. FORMAT can be `bsd',\n"
+" `sysv' or `posix'. The default is `bsd'\n"
+" -g, --extern-only Display only external symbols\n"
+" -l, --line-numbers Use debugging information to find a filename and\n"
+" line number for each symbol\n"
+" -n, --numeric-sort Sort symbols numerically by address\n"
+" -o Same as -A\n"
+" -p, --no-sort Do not sort the symbols\n"
+" -P, --portability Same as --format=posix\n"
+" -r, --reverse-sort Reverse the sense of the sort\n"
+" -S, --print-size Print size of defined symbols\n"
+" -s, --print-armap Include index for symbols from archive members\n"
+" --size-sort Sort symbols by size\n"
+" --special-syms Include special symbols in the output\n"
+" --synthetic Display synthetic symbols as well\n"
+" -t, --radix=RADIX Use RADIX for printing symbol values\n"
+" --target=BFDNAME Specify the target object format as BFDNAME\n"
+" -u, --undefined-only Display only undefined symbols\n"
+" -X 32_64 (ignored)\n"
+" -h, --help Display this information\n"
+" -V, --version Display this program's version number\n"
+"\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -a, --debug-syms \tHiển thị _ký hiệu_ chỉ kiểu bộ _gỡ lỗi_ thôi\n"
+" -A, --print-file-name \t_In ra tên táºp tin_ nháºp trÆ°á»›c má»—i ký hiệu\n"
+" -B \t\t\tBằng « --format=bsd »\n"
+" -C, --demangle[=KIỂU_DÃNG]\n"
+"\tGiải mã các tên ký hiệu cấp thấp thà nh tên cấp ngÆ°á»i dùng (_tháo gỡ_)\n"
+" Kiểu dáng nà y, nếu được ghi rõ, có thể là « auto » (tự động: mặc định)\n"
+"\t« gnu », « lucid », « arm », « hp », « edg », « gnu-v3 », « java » hay « gnat ».\n"
+" --no-demangle \t\t_Äừng tháo gỡ_ tên ký hiệu cấp thấp\n"
+" -D, --dynamic \t\tHiển thị ký hiệu _động_ thay và o ký hiệu chuẩn\n"
+" --defined-only \t\tHiển thị _chỉ_ ký hiệu _được định nghĩa_\n"
+" -e \t\t\t(bị bỠqua)\n"
+" -f, --format=DẠNG_THỨC \tDùng _dạng thức_ xuất nà y, một của\n"
+"\t\t\t\t\t\t\t« bsd » (mặc định), « sysv » hay « posix »\n"
+" -g, --extern-only \t\tHiển thị _chỉ_ ký hiệu _bên ngoà i_\n"
+" -l, --line-numbers \t\tDùng thông tin gỡ lá»—i để tìm tên táºp tin\n"
+"\t\t\t\t\t\tvà _số thứ tự dòng_ cho mỗi ký hiệu\n"
+" -n, --numeric-sort \t\t_Sắp xếp_ ký hiệu một cách _thuộc số_ theo địa chỉ\n"
+" -o \t\t\tBằng « -A »\n"
+" -p, --no-sort \t\t_Äừng sắp xếp_ ký hiệu\n"
+" -P, --portability \t\tBằng « --format=posix »\n"
+" -r, --reverse-sort \t\t_Sắp xếp ngược_\n"
+" -S, --print-size \t\tIn ra kÃch cỡ của các ký hiệu được định nghÄ©a\n"
+" -s, --print-armap \t\tGồm chỉ mục cho ký hiệu từ bộ phạn kho\n"
+" --size-sort \t\t_Sắp xếp_ ký hiệu theo _kÃch cỡ_\n"
+" --special-syms \t\tGồm _ký hiệu đặc biệt_ trong dữ liệu xuất\n"
+" --synthetic \t\tCũng hiển thị ký hiệu _tổng hợp_\n"
+" -t, --radix=CÆ _SỞ \tDùng _cÆ¡ sở_ nà y để in ra giá trị ký hiệu\n"
+" --target=TÊN_BFD \tGhi rõ dạng thức đối tượng _Ä‘Ãch_ là tên BFD nà y\n"
+" -u, --undefined-only \tHiển thị _chỉ_ ký hiệu _chưa được định nghĩa_\n"
+" -X 32_64 \t\t(bị bỠqua)\n"
+" -h, --help \t\tHiển thị _trợ giúp_ nà y\n"
+" -V, --version \t\tHiển thị số thứ tự _phiên bản_ của chương trình nà y\n"
+"\n"
+
+#: nm.c:262 objdump.c:232
+#, c-format
+msgid "Report bugs to %s.\n"
+msgstr "Hãy trình báo lỗi nà o cho %s\n"
+
+#: nm.c:294
+#, c-format
+msgid "%s: invalid radix"
+msgstr "%s: cơ sở không hợp lệ"
+
+#: nm.c:318
+#, c-format
+msgid "%s: invalid output format"
+msgstr "%s: dạng thức xuất không hợp lệ"
+
+#: nm.c:339 readelf.c:6342 readelf.c:6378
+#, c-format
+msgid "<processor specific>: %d"
+msgstr "<đặc trưng cho bộ xỠlý>: %d"
+
+#: nm.c:341 readelf.c:6345 readelf.c:6390
+#, c-format
+msgid "<OS specific>: %d"
+msgstr "<đặc trÆ°ng cho hệ Ä‘iá»u hà nh>: %d"
+
+#: nm.c:343 readelf.c:6347 readelf.c:6393
+#, c-format
+msgid "<unknown>: %d"
+msgstr "<không biết>: %d"
+
+#: nm.c:380
+#, c-format
+msgid ""
+"\n"
+"Archive index:\n"
+msgstr ""
+"\n"
+"Chỉ mục kho:\n"
+
+#: nm.c:1225
+#, c-format
+msgid ""
+"\n"
+"\n"
+"Undefined symbols from %s:\n"
+"\n"
+msgstr ""
+"\n"
+"\n"
+"Ký hiệu chưa được định nghĩa từ %s:\n"
+"\n"
+
+#: nm.c:1227
+#, c-format
+msgid ""
+"\n"
+"\n"
+"Symbols from %s:\n"
+"\n"
+msgstr ""
+"\n"
+"\n"
+"Ký hiệu từ %s:\n"
+"\n"
+
+#: nm.c:1229 nm.c:1280
+#, c-format
+msgid ""
+"Name Value Class Type Size Line Section\n"
+"\n"
+msgstr ""
+"Tên Giá trị Hạng Kiểu Cỡ Dòng Phần\n"
+"\n"
+
+#: nm.c:1232 nm.c:1283
+#, c-format
+msgid ""
+"Name Value Class Type Size Line Section\n"
+"\n"
+msgstr ""
+"Name Value Class Type Size Line Section\n"
+"\n"
+
+#: nm.c:1276
+#, c-format
+msgid ""
+"\n"
+"\n"
+"Undefined symbols from %s[%s]:\n"
+"\n"
+msgstr ""
+"\n"
+"\n"
+"Ký hiệu chưa được định nghĩa từUndefined symbols from %s[%s]:\n"
+"\n"
+
+#: nm.c:1278
+#, c-format
+msgid ""
+"\n"
+"\n"
+"Symbols from %s[%s]:\n"
+"\n"
+msgstr ""
+"\n"
+"\n"
+"Ký hiệu từ %s[%s]:\n"
+"\n"
+
+#: nm.c:1580
+msgid "Only -X 32_64 is supported"
+msgstr "Chỉ hỗ trợ « -X 32_64 »"
+
+#: nm.c:1600
+msgid "Using the --size-sort and --undefined-only options together"
+msgstr "Dùng tùy chá»n cả « --size-sort » lẫn « --undefined-only » Ä‘á»u"
+
+#: nm.c:1601
+msgid "will produce no output, since undefined symbols have no size."
+msgstr "sẽ không xuất gì, vì ký hiệu chÆ°a được định nghÄ©a không có kÃch cỡ nà o."
+
+#: nm.c:1629
+#, c-format
+msgid "data size %ld"
+msgstr "cỡ dữ liệu %ld"
+
+#: objcopy.c:396 srconv.c:1721
+#, c-format
+msgid "Usage: %s [option(s)] in-file [out-file]\n"
+msgstr "Cách sá» dụng: %s [tùy_chá»n...] táºp_tin_nháºp [táºp_tin_xuất]\n"
+
+#: objcopy.c:397
+#, c-format
+msgid " Copies a binary file, possibly transforming it in the process\n"
+msgstr " Sao chép táºp tin nhị phân, cÅ©ng có thể chuyển đổi nó\n"
+
+#: objcopy.c:398 objcopy.c:487
+#, c-format
+msgid " The options are:\n"
+msgstr " Tùy chá»n:\n"
+
+#: objcopy.c:399
+#, c-format
+msgid ""
+" -I --input-target <bfdname> Assume input file is in format <bfdname>\n"
+" -O --output-target <bfdname> Create an output file in format <bfdname>\n"
+" -B --binary-architecture <arch> Set arch of output file, when input is binary\n"
+" -F --target <bfdname> Set both input and output format to <bfdname>\n"
+" --debugging Convert debugging information, if possible\n"
+" -p --preserve-dates Copy modified/access timestamps to the output\n"
+" -j --only-section <name> Only copy section <name> into the output\n"
+" --add-gnu-debuglink=<file> Add section .gnu_debuglink linking to <file>\n"
+" -R --remove-section <name> Remove section <name> from the output\n"
+" -S --strip-all Remove all symbol and relocation information\n"
+" -g --strip-debug Remove all debugging symbols & sections\n"
+" --strip-unneeded Remove all symbols not needed by relocations\n"
+" -N --strip-symbol <name> Do not copy symbol <name>\n"
+" --strip-unneeded-symbol <name>\n"
+" Do not copy symbol <name> unless needed by\n"
+" relocations\n"
+" --only-keep-debug Strip everything but the debug information\n"
+" -K --keep-symbol <name> Only copy symbol <name>\n"
+" -L --localize-symbol <name> Force symbol <name> to be marked as a local\n"
+" -G --keep-global-symbol <name> Localize all symbols except <name>\n"
+" -W --weaken-symbol <name> Force symbol <name> to be marked as a weak\n"
+" --weaken Force all global symbols to be marked as weak\n"
+" -w --wildcard Permit wildcard in symbol comparison\n"
+" -x --discard-all Remove all non-global symbols\n"
+" -X --discard-locals Remove any compiler-generated symbols\n"
+" -i --interleave <number> Only copy one out of every <number> bytes\n"
+" -b --byte <num> Select byte <num> in every interleaved block\n"
+" --gap-fill <val> Fill gaps between sections with <val>\n"
+" --pad-to <addr> Pad the last section up to address <addr>\n"
+" --set-start <addr> Set the start address to <addr>\n"
+" {--change-start|--adjust-start} <incr>\n"
+" Add <incr> to the start address\n"
+" {--change-addresses|--adjust-vma} <incr>\n"
+" Add <incr> to LMA, VMA and start addresses\n"
+" {--change-section-address|--adjust-section-vma} <name>{=|+|-}<val>\n"
+" Change LMA and VMA of section <name> by <val>\n"
+" --change-section-lma <name>{=|+|-}<val>\n"
+" Change the LMA of section <name> by <val>\n"
+" --change-section-vma <name>{=|+|-}<val>\n"
+" Change the VMA of section <name> by <val>\n"
+" {--[no-]change-warnings|--[no-]adjust-warnings}\n"
+" Warn if a named section does not exist\n"
+" --set-section-flags <name>=<flags>\n"
+" Set section <name>'s properties to <flags>\n"
+" --add-section <name>=<file> Add section <name> found in <file> to output\n"
+" --rename-section <old>=<new>[,<flags>] Rename section <old> to <new>\n"
+" --change-leading-char Force output format's leading character style\n"
+" --remove-leading-char Remove leading character from global symbols\n"
+" --redefine-sym <old>=<new> Redefine symbol name <old> to <new>\n"
+" --redefine-syms <file> --redefine-sym for all symbol pairs \n"
+" listed in <file>\n"
+" --srec-len <number> Restrict the length of generated Srecords\n"
+" --srec-forceS3 Restrict the type of generated Srecords to S3\n"
+" --strip-symbols <file> -N for all symbols listed in <file>\n"
+" --strip-unneeded-symbols <file>\n"
+" --strip-unneeded-symbol for all symbols listed\n"
+" in <file>\n"
+" --keep-symbols <file> -K for all symbols listed in <file>\n"
+" --localize-symbols <file> -L for all symbols listed in <file>\n"
+" --keep-global-symbols <file> -G for all symbols listed in <file>\n"
+" --weaken-symbols <file> -W for all symbols listed in <file>\n"
+" --alt-machine-code <index> Use alternate machine code for output\n"
+" --writable-text Mark the output text as writable\n"
+" --readonly-text Make the output text write protected\n"
+" --pure Mark the output file as demand paged\n"
+" --impure Mark the output file as impure\n"
+" --prefix-symbols <prefix> Add <prefix> to start of every symbol name\n"
+" --prefix-sections <prefix> Add <prefix> to start of every section name\n"
+" --prefix-alloc-sections <prefix>\n"
+" Add <prefix> to start of every allocatable\n"
+" section name\n"
+" -v --verbose List all object files modified\n"
+" -V --version Display this program's version number\n"
+" -h --help Display this output\n"
+" --info List object formats & architectures supported\n"
+msgstr ""
+" -I --input-target <tên_bfd>\t\tGiả sá» táºp tin nháºp có dạng <tên_bfd>\n"
+"\t\t\t\t\t\t\t\t (_Ä‘Ãch nháºp_)\n"
+" -O --output-target <tên_bfd> \tTạo táºp tin dạng <tên_bfd>\n"
+"\t\t\t\t\t\t\t\t (_Ä‘Ãch xuất_)\n"
+" -B --binary-architecture <kiến_trúc>\n"
+"\t\t\tLáºp _kiến trúc_ của táºp tin xuất, khi táºp tin nháºp là _nhị phân_\n"
+" -F --target <tên_bfd>\n"
+"\t\t\tLáºp dạng thức cả nháºp lẫn xuất Ä‘á»u thà nh <tên_bfd> (_Ä‘Ãch_)\n"
+" --debugging \t\t\tChuyển đổi thông tin _gỡ lỗi_, nếu có thể\n"
+" -p --preserve-dates\n"
+"\tSao chép nhãn thá»i gian truy cáºp/sá»a đổi và o kết xuất (_bảo tồn các ngà y_)\n"
+" -j --only-section <tên> \t_Chỉ_ sao chép <tên> _phần_ và o kết xuất\n"
+" --add-gnu-debuglink=<táºp_tin>\n"
+"\t\t_Thêm_ khả năng liên kết phần « .gnu_debuglink » và o <táºp_tin>\n"
+" -R --remove-section <tên> \t_Gỡ bỠphần_ <tên> ra kết xuất\n"
+" -S --strip-all \t\t\tGỡ bá» má»i thông tin ký hiệu và định vị lại\n"
+"\t\t\t\t\t\t\t\t (_tước hết_)\n"
+" -g --strip-debug \t\tGỡ bá» má»i ký hiệu và phần kiểu gỡ lá»—i\n"
+"\t\t\t\t\t\t\t\t (_tước gỡ lỗi_)\n"
+" --strip-unneeded \tGỡ bá» má»i ký hiệu không cần thiết để định vị lại\n"
+"\t\t\t\t\t\t\t\t (_tước không cần thiết_)\n"
+" -N --strip-symbol <tên> \t\t Äừng sao chép ký hiệu <tên>\n"
+"\t\t\t\t\t\t\t\t (_tước ký hiệu_)\n"
+" --strip-unneeded-symbol <tên>\n"
+"\tÄừng sao chép ký hiệu trừ cần thiết để định vị lại (_tÆ°á»›c không cần thiết_)\n"
+" --only-keep-debug\t\t\t\tTước hết, trừ thông tin gỡ lỗi\n"
+"\t\t\t\t\t\t\t\t (_chỉ giữ gỡ lỗi_)\n"
+" -K --keep-symbol <tên> \tChỉ sao chép ký hiệu <tên>\n"
+"\t\t\t\t\t\t\t\t (_giữ ký hiệu_)\n"
+" -L --localize-symbol <tên>\n"
+"\t\t\t\tBuá»™c ký hiệu <tên>có nhãn Ä‘iá»u cục bá»™ (_địa phÆ°Æ¡ng hóa_)\n"
+" -G --keep-global-symbol <tên> \tÄịa phÆ°Æ¡ng hóa má»i ký hiệu trừ <name>\n"
+"\t\t\t\t\t\t\t\t (_giữ ký hiệu toà n cục_)\n"
+" -W --weaken-symbol <tên> \tBuá»™c ký hiệu <name> có nhãn Ä‘iá»u yếu\n"
+"\t\t\t\t\t\t\t\t (_là m yếu ký hiệu_)\n"
+" --weaken \t\tBuá»™c má»i ký hiệu toà n cục có nhãn Ä‘iá»u yếu\n"
+"\t\t\t\t\t\t\t\t (_là m yếu đi_)\n"
+" -w --wildcard \t\tCho phép _ký tự đại diện_ trong sự so sánh ký hiệu\n"
+" -x --discard-all \t\t\tGỡ bá» má»i ký hiệu không toà n cục\n"
+"\t\t\t\t\t\t\t\t (_hủy hết_)\n"
+" -X --discard-locals Gỡ bỠký hiệu nà o được tạo ra bởi bộ biên dịch\n"
+"\t\t\t\t\t\t\t\t (_hủy các Ä‘iá»u cục bá»™_)\n"
+" -i --interleave <số> \t\t\tChỉ sao chép một của mỗi <số> byte\n"
+"\t\t\t\t\t\t\t\t (_chen và o_)\n"
+" -b --byte <số>\n"
+"\t\t\t\tChá»n byte số thứ tá»± <số> trong má»—i khối tin đã chen và o\n"
+" --gap-fill <giá_trị> \t_Äiá»n và o khe_ giữa hai phần bằng <giá_trị>\n"
+" --pad-to <địa_chỉ>\t\t_Äệm_ phần cuối cùng _đế_n địa chỉ <địa_chỉ>\n"
+" --set-start <địa_chỉ> \t\t_Láºp_ địa chỉ _đầu_ thà nh <địa_chỉ>\n"
+" {--change-start|--adjust-start} <tăng>\n"
+"\t\tThêm <tăng> và o địa chỉ đầu (_thay đổi đầu, Ä‘iá»u chỉnh đầu_)\n"
+" {--change-addresses|--adjust-vma} <tang>\n"
+" \t\t\t\t\t\t\tThêm <tang> và o địa chỉ đầu, LMA và VMA\n"
+"\t\t\t\t\t\t\t (_thay đổi địa chỉ, Ä‘iá»u chỉnh vma_)\n"
+" {--change-section-address|--adjust-section-vma} <tên>{=|+|-}<giá_trị>\n"
+"\t\t\t\t\tThay đổi LMA và VMA của phần <tên> bằng <giá_trị>\n"
+"\t\t\t\t\t\t(_thay đổi địa chỉ phần, Ä‘iá»u chỉnh vma phần_)\n"
+" --change-section-lma <tên>{=|+|-}<giá_trị>\n"
+" \tThay đổi LMA của phần <tên> bằng <giá_trị> (_thay đổi LMA của phần_)\n"
+" --change-section-vma <tên>{=|+|-}<giá_trị>\n"
+" \tThay đổi VMA của phần <tên> bằng <giá_trị> (_thay đổi VMA của phần_)\n"
+" {--[no-]change-warnings|--[no-]adjust-warnings}\n"
+" \t\t\t\t\t\t\t\tCảnh báo nếu không có phần có tên\n"
+"\t\t(_[không] thay đổi các cảnh báo, [không] Ä‘iá»u chỉnh các cảnh báo_)\n"
+" --set-section-flags <tên>=<cỠ...>\n"
+" \t\tLáºp thuá»™c tÃnh của phần <tên> thà nh <cá» ...>\n"
+"\t\t\t\t\t\t\t\t (_láºp các cá» phần_)\n"
+" --add-section <tên>=<táºp_tin>\n"
+"\t\t\t\t_Thêm phần_ <tên> được tìm trong <táºp_tin> và o kết xuất\n"
+" --rename-section <cũ>=<mới>[,<cỠ...>]\n"
+"\t\t\t\t\t\t\t\t_Thay đổi phần_ <cũ> thà nh <mới>\n"
+" --change-leading-char\n"
+"\t\t\t\t\tBuộc kiểu dáng của ký tự đi trước của dạng thức xuất\n"
+"\t\t\t\t\t\t\t\t (_thay đổi ký tự đi trước_)\n"
+" --remove-leading-char\t\t_Gỡ bỠký tự đi trước_ ra các ký hiệu toà n cục\n"
+" --redefine-sym <cũ>=<mới>\n"
+"\t\t\t\t\t\t_Äịnh nghÄ©a lại_ tên _ký hiệu_ <cÅ©> thà nh <má»›i>\n"
+" --redefine-syms <táºp_tin>\n"
+"\t\t« --redefine-sym » cho má»i cặp ký hiệu được liệt kê trong <táºp_tin>\n"
+" --srec-len <số> \t\tGiới hạn _độ dà i_ của các Srecords đã tạo ra\n"
+" --srec-forceS3 \tGiới hạn kiểu Srecords thà nh S3 (_buộc_)\n"
+" --strip-symbols <táºp_tin>\n"
+"\t« -N » cho má»i ký hiệu được liệt kê trong <táºp_tin> (_tÆ°á»›c các ký hiệu_)\n"
+" --strip-unneeded-symbols <táºp_tin>\n"
+" \t\t\t\t\t\t\t« --strip-unneeded-symbol » cho má»i ký hiệu\n"
+"\t\t\t\t\t\t\t\tđược liệt kê trong <táºp_tin>\n"
+" --keep-symbols <táºp_tin>\n"
+"\t\t\t\t\t« -K » cho má»i ký hiệu được liệt kê trong <táºp_tin>\n"
+"\t\t\t\t\t\t\t\t (_giữ các ký hiệu_)\n"
+" --localize-symbols <táºp_tin>\n"
+"\t\t\t\t\t« -L » cho má»i ký hiệu được liệt kê trong <táºp_tin>\n"
+"\t\t\t\t\t\t\t\t (_địa phương hóa các ký hiệu_)\n"
+" --keep-global-symbols <táºp_tin>\n"
+"\t\t\t\t\t« -G » cho má»i ký hiệu được liệt kê trong <táºp_tin>\n"
+"\t\t\t\t\t\t\t\t (_giữ các ký hiệu toà n cục_)\n"
+" --weaken-symbols <táºp_tin>\n"
+"\t\t\t\t\t« -W » cho má»i ký hiệu được liệt kê trong <táºp_tin>\n"
+"\t\t\t\t\t\t\t\t (_là m yếu các ký hiệu_)\n"
+" --alt-machine-code <chỉ_mục> Dùng _mã máy xen kẽ_ cho kết xuất\n"
+" --writable-text \t\tÄánh dấu _văn bản_ xuất _có khả năng ghi_\n"
+" --readonly-text \tLà m cho vân bản xuất được bảo vẠchống ghi\n"
+"\t\t\t\t\t\t\t\t (_văn bản chỉ có khả năng Ä‘á»c_)\n"
+" --pure\n"
+"\t\t\tÄánh dấu táºp tin xuất sẽ có trang được sắp xếp theo yêu cầu\n"
+"\t\t\t\t\t\t\t\t (_tinh khiết_)\n"
+" --impure \t\tÄánh dấu táºp tin xuất _không tinh khiết_\n"
+" --prefix-symbols <tiá»n_tố>\n"
+"\t\tThêm <tiá»n_tố> và o đầu của má»i tên ký hiệu (_tiá»n tố các ký hiệu_)\n"
+" --prefix-sections <tiá»n_tố>\n"
+"\t\tThêm <tiá»n_tố> và o đầu của má»i tên phần (_tiá»n tố các phần_)\n"
+" --prefix-alloc-sections <tiá»n_tố>\n"
+"\t\tThêm <tiá»n_tố> và o đầu của má»i tên phần có thể cấp phát\n"
+"\t\t\t\t\t\t\t\t(_tiá»n tố các phần có thể cấp phát_)\n"
+" -v --verbose \t\tLiệt kê má»i táºp tin đối tượng đã được sá»a đổi\n"
+"\t\t\t\t\t\t\t\t (_chi tiết_)\n"
+" -V --version Hiển thị số thứ tự _phiên bản_ của chương trình nà y\n"
+" -h --help \t\t\tHiển thị _trợ giúp_ nà y\n"
+" --info \t\tLiệt kê các dạng thức và kiến trúc được hỗ trợ\n"
+"\t\t\t\t\t\t\t\t (_thông tin_)\n"
+
+#: objcopy.c:485
+#, c-format
+msgid "Usage: %s <option(s)> in-file(s)\n"
+msgstr "Cách sá» dụng: %s <tùy_chá»n> táºp_tin_nháºp...\n"
+
+#: objcopy.c:486
+#, c-format
+msgid " Removes symbols and sections from files\n"
+msgstr " Gỡ bá» ký hiệu và phần ra táºp tin\n"
+
+#: objcopy.c:488
+#, c-format
+msgid ""
+" -I --input-target=<bfdname> Assume input file is in format <bfdname>\n"
+" -O --output-target=<bfdname> Create an output file in format <bfdname>\n"
+" -F --target=<bfdname> Set both input and output format to <bfdname>\n"
+" -p --preserve-dates Copy modified/access timestamps to the output\n"
+" -R --remove-section=<name> Remove section <name> from the output\n"
+" -s --strip-all Remove all symbol and relocation information\n"
+" -g -S -d --strip-debug Remove all debugging symbols & sections\n"
+" --strip-unneeded Remove all symbols not needed by relocations\n"
+" --only-keep-debug Strip everything but the debug information\n"
+" -N --strip-symbol=<name> Do not copy symbol <name>\n"
+" -K --keep-symbol=<name> Only copy symbol <name>\n"
+" -w --wildcard Permit wildcard in symbol comparison\n"
+" -x --discard-all Remove all non-global symbols\n"
+" -X --discard-locals Remove any compiler-generated symbols\n"
+" -v --verbose List all object files modified\n"
+" -V --version Display this program's version number\n"
+" -h --help Display this output\n"
+" --info List object formats & architectures supported\n"
+" -o <file> Place stripped output into <file>\n"
+msgstr ""
+" -I --input-target=<tên_bfd> Giả sá» táºp tin nháºp có dạng thức <tên_bfd>\n"
+"\t\t(Ä‘Ãch nháºp)\n"
+" -O --output-target=<tên_bfd> Tạo má»™t táºp tin xuất có dạng thức <tên_bfd>\n"
+"\t\t(Ä‘Ãch xuất)\n"
+" -F --target=<tên_bfd> Äặt dạng thức cả nháºp lẫn xuất Ä‘á»u thà nh <tên_bfd>\n"
+"\t\t(Ä‘Ãch)\n"
+" -p --preserve-dates\n"
+"\t\tSao chép các nhãn thá»i gian truy cáºp/đã sá»a đổi và o kết xuất\n"
+"\t\t(bảo tồn các ngà y)\n"
+" -R --remove-section=<tên> \t_Gỡ bỠphần_ <name> ra dữ liệu xuất\n"
+" -s --strip-all \t\tGỡ bá» má»i thông tin kiểu ký hiệu và định vị lại\n"
+"\t\t(tước hết)\n"
+" -g -S -d --strip-debug \tGỡ bá» má»i ký hiệu và phần kiểu gỡ lá»—i\n"
+"\t\t(tước gỡ lỗi)\n"
+" --strip-unneeded Gỡ bá» má»i ký hiệu không cần thiết khi định vị lại\n"
+"\t\t(tước không cần thiết)\n"
+" --only-keep-debug \tTước hết, trừ thông tin gỡ lỗi\n"
+"\t\t(chỉ giữ gỡ lỗi)\n"
+" -N --strip-symbol=<tên> \tÄừng sao chép ký hiệu <tên>\n"
+"\t\t(tước ký hiệu)\n"
+" -K --keep-symbol=<tên> \tSao chép chỉ ký hiệu <tên>\n"
+"\t\t(giữ ký hiệu)\n"
+" -w --wildcard Cho phép _ký tự đại diện_ trong chuỗi so sánh ký hiệu\n"
+" -x --discard-all \t\tGỡ bá» má»i ký hiệu không toà n cục\n"
+"\t\t(hủy hết)\n"
+" -X --discard-locals \tGỡ bo ký hiệu nà o do bộ biên dịch tạo ra\n"
+"\t\t(hủy các Ä‘iá»u cục bá»™)\n"
+" -v --verbose \t\tLiệt kê má»i táºp tin đối tượng đã sá»a đổi\n"
+"\t\t(chi tiết)\n"
+" -V --version Hiển thị số thứ tự _phiên bản_ của chương trình nà y\n"
+" -h --help \t\tHiển thị _trợ giúp_ nà y\n"
+" --info Liệt kê các dạng thức đối tượng và kiến trúc được hỗ trợ\n"
+"\t\t(thông tin) -o <táºp_tin> \tÄể kết _xuất_ đã tÆ°á»›ng và o <táºp_tin>\n"
+
+#: objcopy.c:560
+#, c-format
+msgid "unrecognized section flag `%s'"
+msgstr "không nháºn ra cá» phần « %s »"
+
+#: objcopy.c:561
+#, c-format
+msgid "supported flags: %s"
+msgstr "các cỠđã hỗ trợ : %s"
+
+#: objcopy.c:638
+#, c-format
+msgid "cannot open '%s': %s"
+msgstr "không thể mở « %s »: %s"
+
+#: objcopy.c:641 objcopy.c:2629
+#, c-format
+msgid "%s: fread failed"
+msgstr "%s: việc fread (Ä‘á»c f) bị lá»—i"
+
+#: objcopy.c:714
+#, c-format
+msgid "%s:%d: Ignoring rubbish found on this line"
+msgstr "%s:%d: Äang bá» qua rác được gặp trên dòng nà y"
+
+#: objcopy.c:976
+#, c-format
+msgid "%s: Multiple redefinition of symbol \"%s\""
+msgstr "%s: Ký hiệu « %s » đã được định nghÄ©a lại nhiá»u lần"
+
+#: objcopy.c:980
+#, c-format
+msgid "%s: Symbol \"%s\" is target of more than one redefinition"
+msgstr "%s: Ký hiệu « %s » là đÃch của nhiá»u lá»i định nghÄ©a lại"
+
+#: objcopy.c:1008
+#, c-format
+msgid "couldn't open symbol redefinition file %s (error: %s)"
+msgstr "không thể mở táºp tin định nghÄ©a lại ký hiệu %s (lá»—i: %s)"
+
+#: objcopy.c:1086
+#, c-format
+msgid "%s:%d: garbage found at end of line"
+msgstr "%s:%d: gặp rác tại kết thúc dòng"
+
+#: objcopy.c:1089
+#, c-format
+msgid "%s:%d: missing new symbol name"
+msgstr "%s:%d: thiếu tên ký hiệu mới"
+
+#: objcopy.c:1099
+#, c-format
+msgid "%s:%d: premature end of file"
+msgstr "%s:%d: gặp kết thúc táºp tin quá sá»›m"
+
+#: objcopy.c:1124
+msgid "Unable to change endianness of input file(s)"
+msgstr "Không thể thay đổi tÃnh trạng cuối (endian) của (các) táºp tin nháºp"
+
+#: objcopy.c:1133
+#, c-format
+msgid "copy from %s(%s) to %s(%s)\n"
+msgstr "chép từ %s(%s) đến %s(%s)\n"
+
+#: objcopy.c:1170
+#, c-format
+msgid "Unable to recognise the format of the input file %s"
+msgstr "Không thể nháºn diện dạng thức của táºp tin nháºp %s"
+
+#: objcopy.c:1174
+#, c-format
+msgid "Warning: Output file cannot represent architecture %s"
+msgstr "Cảnh báo : Táºp tin xuất không thể tiêu biểu kiến trúc %s"
+
+#: objcopy.c:1211
+#, c-format
+msgid "can't create section `%s': %s"
+msgstr "không thể tạo phần « %s »: %s"
+
+#: objcopy.c:1277
+msgid "there are no sections to be copied!"
+msgstr "• Không có phần cần sao chép. •"
+
+#: objcopy.c:1323
+#, c-format
+msgid "Can't fill gap after %s: %s"
+msgstr "Không thể Ä‘iá»n và o khe sau : %s: %s"
+
+#: objcopy.c:1348
+#, c-format
+msgid "Can't add padding to %s: %s"
+msgstr "Không thể thêm đệm và o %s: %s"
+
+#: objcopy.c:1514
+#, c-format
+msgid "%s: error copying private BFD data: %s"
+msgstr "%s: gặp lỗi khi sao chép dữ liệu BFD riêng : %s"
+
+#: objcopy.c:1525
+msgid "unknown alternate machine code, ignored"
+msgstr "không biết mã máy xen kẽ nên bỠqua nó"
+
+#: objcopy.c:1555 objcopy.c:1585
+#, c-format
+msgid "cannot mkdir %s for archive copying (error: %s)"
+msgstr "không thể mkdir (tạo thư mục) %s để sao chép kho (lỗi: %s)"
+
+#: objcopy.c:1790
+#, c-format
+msgid "Multiple renames of section %s"
+msgstr "Äã thay đổi tên phần %s nhiá»u lần"
+
+#: objcopy.c:1841
+msgid "private header data"
+msgstr "dữ liệu dòng đầu riêng"
+
+#: objcopy.c:1849
+#, c-format
+msgid "%s: error in %s: %s"
+msgstr "%s: lá»—i trong %s: %s"
+
+#: objcopy.c:1903
+msgid "making"
+msgstr "là m"
+
+#: objcopy.c:1912
+msgid "size"
+msgstr "cỡ"
+
+#: objcopy.c:1926
+msgid "vma"
+msgstr "vma"
+
+#: objcopy.c:1951
+msgid "alignment"
+msgstr "canh lá»"
+
+#: objcopy.c:1966
+msgid "flags"
+msgstr "cá»"
+
+#: objcopy.c:1988
+msgid "private data"
+msgstr "dữ liệu riêng"
+
+#: objcopy.c:1996
+#, c-format
+msgid "%s: section `%s': error in %s: %s"
+msgstr "%s: phần « %s »: lỗi trong %s: %s"
+
+#: objcopy.c:2274
+#, c-format
+msgid "%s: can't create debugging section: %s"
+msgstr "%s: không thể tạo phần gỡ lỗi: %s"
+
+#: objcopy.c:2288
+#, c-format
+msgid "%s: can't set debugging section contents: %s"
+msgstr "%s: không thể đặt nội dung phần gỡ lỗi: %s"
+
+#: objcopy.c:2297
+#, c-format
+msgid "%s: don't know how to write debugging information for %s"
+msgstr "%s: không biết cách ghi thông tin gỡ lỗi cho %s"
+
+#: objcopy.c:2472
+msgid "byte number must be non-negative"
+msgstr "số byte phải là không âm"
+
+#: objcopy.c:2482
+msgid "interleave must be positive"
+msgstr "chen và o phải là dương"
+
+#: objcopy.c:2502 objcopy.c:2510
+#, c-format
+msgid "%s both copied and removed"
+msgstr "%s cả được sao chép lẫn bị gỡ bá» Ä‘á»u"
+
+#: objcopy.c:2603 objcopy.c:2674 objcopy.c:2774 objcopy.c:2805 objcopy.c:2829
+#: objcopy.c:2833 objcopy.c:2853
+#, c-format
+msgid "bad format for %s"
+msgstr "dạng thức sai cho %s"
+
+#: objcopy.c:2624
+#, c-format
+msgid "cannot open: %s: %s"
+msgstr "không thể mở : %s: %s"
+
+#: objcopy.c:2743
+#, c-format
+msgid "Warning: truncating gap-fill from 0x%s to 0x%x"
+msgstr "Cảnh báo : Ä‘ang cắt xén Ä‘iá»n-khe từ 0x%s thà nh 0x%x"
+
+#: objcopy.c:2903
+msgid "alternate machine code index must be positive"
+msgstr "chỉ mục mã máy xen kẽ phải là dương"
+
+#: objcopy.c:2961
+msgid "byte number must be less than interleave"
+msgstr "số byte phải là Ãt hÆ¡n chen và o"
+
+#: objcopy.c:2991
+#, c-format
+msgid "architecture %s unknown"
+msgstr "không biết kiến trúc %s"
+
+#: objcopy.c:2995
+msgid "Warning: input target 'binary' required for binary architecture parameter."
+msgstr "Cảnh báo : Ä‘Ãch nháºp « binary » (nhị phân) cần thiết cho tham số kiến trúc nhị phân."
+
+#: objcopy.c:2996
+#, c-format
+msgid " Argument %s ignored"
+msgstr " Äối số %s bị bá» qua"
+
+#: objcopy.c:3002
+#, c-format
+msgid "warning: could not locate '%s'. System error message: %s"
+msgstr "cảnh báo : không thể định vị « %s ». Thông điệp lỗi hệ thống: %s"
+
+#: objcopy.c:3042 objcopy.c:3056
+#, c-format
+msgid "%s %s%c0x%s never used"
+msgstr "%s %s%c0x%s chưa bao giỠdùng"
+
+#: objdump.c:176
+#, c-format
+msgid "Usage: %s <option(s)> <file(s)>\n"
+msgstr "Cách sá» dụng: %s <tùy_chá»n...> <táºp_tin...>\n"
+
+#: objdump.c:177
+#, c-format
+msgid " Display information from object <file(s)>.\n"
+msgstr " Hiển thị thông tin từ <táºp_tin...> đối tượng.\n"
+
+#: objdump.c:178
+#, c-format
+msgid " At least one of the following switches must be given:\n"
+msgstr " Phải Ä‘Æ°a ra Ãt nhất má»™t của những cái chuyển theo sau :\n"
+
+#: objdump.c:179
+#, c-format
+msgid ""
+" -a, --archive-headers Display archive header information\n"
+" -f, --file-headers Display the contents of the overall file header\n"
+" -p, --private-headers Display object format specific file header contents\n"
+" -h, --[section-]headers Display the contents of the section headers\n"
+" -x, --all-headers Display the contents of all headers\n"
+" -d, --disassemble Display assembler contents of executable sections\n"
+" -D, --disassemble-all Display assembler contents of all sections\n"
+" -S, --source Intermix source code with disassembly\n"
+" -s, --full-contents Display the full contents of all sections requested\n"
+" -g, --debugging Display debug information in object file\n"
+" -e, --debugging-tags Display debug information using ctags style\n"
+" -G, --stabs Display (in raw form) any STABS info in the file\n"
+" -t, --syms Display the contents of the symbol table(s)\n"
+" -T, --dynamic-syms Display the contents of the dynamic symbol table\n"
+" -r, --reloc Display the relocation entries in the file\n"
+" -R, --dynamic-reloc Display the dynamic relocation entries in the file\n"
+" -v, --version Display this program's version number\n"
+" -i, --info List object formats and architectures supported\n"
+" -H, --help Display this information\n"
+msgstr ""
+" -a, --archive-headers \t\tHiển thị thông tin vỠ_các phần đầu kho_\n"
+" -f, --file-headers Hiển thị ná»™i dung của _toà n bá»™ phần đầu táºp tin_\n"
+" -p, --private-headers\n"
+"\t\tHiển thị ná»™i dung của phần đầu táºp tin đặc trÆ°ng cho đối tượng\n"
+"\t\t(các phần đầu riêng)\n"
+" -h, --[section-]headers Hiển thị nội dung của _các phần đầu của phần_\n"
+" -x, --all-headers \t\t Hiển thị ná»™i dung của _má»i phần đầu_\n"
+" -d, --disassemble\n"
+"\t\tHiển thị nội dung của các phần có khả năng thực hiện\n"
+"\t\t(rã)\n"
+" -D, --disassemble-all \t Hiển thị ná»™i dung dịch mã số của má»i phần\n"
+"\t\t(rã hết)\n"
+" -S, --source \t\t\t\t Trộn lẫn mã _nguồn_ với việc rã\n"
+" -s, --full-contents Hiển thị _ná»™i dung đầy đủ_ của má»i phần đã yêu cầu\n"
+" -g, --debugging Hiển thị thông tin _gỡ lá»—i_ trong táºp tin đối tượng\n"
+" -e, --debugging-tags Hiển thị thông tin gỡ lỗi, dùng kiểu dáng ctags\n"
+"\t\t(các thẻ gỡ lỗi)\n"
+" -G, --stabs Hiển thị (dạng thô) thông tin STABS nà o trong thông tin\n"
+" -t, --syms \t\t\t Hiển thị nội dung của các bảng ký hiệu\n"
+"\t\t(các ký hiệu [viết tắt])\n"
+" -T, --dynamic-syms \t\tHiển thị nội dung của bảng ký hiệu động\n"
+"\t\t(các ký hiệu động [viết tắt])\n"
+" -r, --reloc \t\tHiển thị các mục nháºp định vị lại trong táºp tin\n"
+"\t\t(định vị lại [viết tắt])\n"
+" -R, --dynamic-reloc\n"
+"\t\t\t\t Hiển thị các mục nháºp định vị lại Ä‘á»™ng trong táºp tin\n"
+"\t\t(định vị lại động [viết tắt])\n"
+" -v, --version Hiển thị số thự tự _phiên bản_ của chương trình nà y\n"
+" -i, --info Liệt kê các dạng thức đối tượng và kiến trúc được hỗ trợ\n"
+"\t\t(thông tin [viết tắt])\n"
+" -H, --help \tHiển thị _trợ giúp_ nà y\n"
+
+#: objdump.c:202
+#, c-format
+msgid ""
+"\n"
+" The following switches are optional:\n"
+msgstr ""
+"\n"
+" Những cái chuyển theo đây là tùy chá»n:\n"
+
+#: objdump.c:203
+#, c-format
+msgid ""
+" -b, --target=BFDNAME Specify the target object format as BFDNAME\n"
+" -m, --architecture=MACHINE Specify the target architecture as MACHINE\n"
+" -j, --section=NAME Only display information for section NAME\n"
+" -M, --disassembler-options=OPT Pass text OPT on to the disassembler\n"
+" -EB --endian=big Assume big endian format when disassembling\n"
+" -EL --endian=little Assume little endian format when disassembling\n"
+" --file-start-context Include context from start of file (with -S)\n"
+" -I, --include=DIR Add DIR to search list for source files\n"
+" -l, --line-numbers Include line numbers and filenames in output\n"
+" -C, --demangle[=STYLE] Decode mangled/processed symbol names\n"
+" The STYLE, if specified, can be `auto', `gnu',\n"
+" `lucid', `arm', `hp', `edg', `gnu-v3', `java'\n"
+" or `gnat'\n"
+" -w, --wide Format output for more than 80 columns\n"
+" -z, --disassemble-zeroes Do not skip blocks of zeroes when disassembling\n"
+" --start-address=ADDR Only process data whose address is >= ADDR\n"
+" --stop-address=ADDR Only process data whose address is <= ADDR\n"
+" --prefix-addresses Print complete address alongside disassembly\n"
+" --[no-]show-raw-insn Display hex alongside symbolic disassembly\n"
+" --adjust-vma=OFFSET Add OFFSET to all displayed section addresses\n"
+" --special-syms Include special symbols in symbol dumps\n"
+"\n"
+msgstr ""
+" -b, --target=TÊN_BFD \tGhi rõ dạng thức đối tượng _Ä‘Ãch_ là TÊN_BFD\n"
+" -m, --architecture=MÃY \t\t Ghi rõ _kiến trúc_ Ä‘Ãch là MÃY\n"
+" -j, --section=TÊN \t\t Hiển thị thông tin chỉ cho _phần_ TÊN\n"
+" -M, --disassembler-options=TÙY_CHỌN\n"
+"\t\tGởi chuỗi TÙY_CHỌN qua cho _bộ rã_\n"
+"\t\t(các tùy chá»n bá»™ rã)\n"
+" -EB --endian=big\n"
+"\t\tGiả sá» dạng thức tÃnh trạng cuối lá»›n (big-endian) khi rã\n"
+" -EL --endian=little\n"
+"\t\tGiả sá» dạng thức tÃnh trạng cuối nhá» (little-endian) khi rã\n"
+" --file-start-context \tGồm _ngữ cảnh_ từ _đầu táºp tin_ (bằng « -S »)\n"
+" -I, --include=THƯ_MỤC\n"
+"\t\tThêm THƯ_MỤC và o danh sách tìm kiếm táºp tin nguồn\n"
+"\t\t(bao gồm)\n"
+" -l, --line-numbers\n"
+"\t\tGồm các _số thứ tá»± dòng_ và tên táºp tin trong kết xuất\n"
+" -C, --demangle[=KIỂU_DÃNG] giải mã các tên ký hiệu đã rối/xá» lý\n"
+"\t\t(tháo gỡ)\n"
+"\t\tKIỂU_DÃNG, nếu đã ghi rõ, có thể là :\n"
+"\t\t • auto\t\ttự động\n"
+"\t\t • gnu\n"
+" \t • lucid\t\trõ rà ng\n"
+"\t\t • arm\n"
+"\t\t • hp\n"
+"\t\t • edg\n"
+"\t\t • gnu-v3\n"
+" \t\t • java\n"
+" \t • gnat\n"
+" -w, --wide \t\tÄịnh dạng dữ liệu xuất chiếm hÆ¡n 80 cá»™t\n"
+"\t\t(rá»™ng)\n"
+" -z, --disassemble-zeroes \t\tÄừng nhảy qua khối ố không khi rã\n"
+"\t\t(rã các số không)\n"
+" --start-address=ÄỊA_CHỈ Xá» lý chỉ dữ liệu có địa chỉ ≥ ÄỊA_CHỈ\n"
+" --stop-address=ÄỊA_CHỈ Xá» lý chỉ dữ liệu có địa chỉ ≤ ÄỊA_CHỈ\n"
+" --prefix-addresses \t\tIn ra địa chỉ hoà n toà n ở b việc rã\n"
+"\t\t(thêm và o đầu các địa chỉ)\n"
+" --[no-]show-raw-insn\n"
+"\t\tHiển thị tháºp lục phân ở bên việc rã kiểu ký hiệu\n"
+"hông] hiển thị câu lệnh thô)\n"
+" --adjust-vma=HIỆU_Sá»\n"
+"\t\tThêm HIỆU_Sá» và o má»i địa chỉ phần đã hiển thị\n"
+"\t\t(Ä‘iá»u chỉnh vma) --special-syms Gồm _các ký hiệu đặc biệt_ trong việc đổ ký hiệu\n"
+"\n"
+
+#: objdump.c:378
+#, c-format
+msgid "Sections:\n"
+msgstr "Phần:\n"
+
+#: objdump.c:381 objdump.c:385
+#, c-format
+msgid "Idx Name Size VMA LMA File off Algn"
+msgstr "Idx Name Size VMA LMA File off Algn"
+
+#: objdump.c:387
+#, c-format
+msgid "Idx Name Size VMA LMA File off Algn"
+msgstr "Idx Name Size VMA LMA File off Algn"
+
+#: objdump.c:391
+#, c-format
+msgid " Flags"
+msgstr " Cá»"
+
+#: objdump.c:393
+#, c-format
+msgid " Pg"
+msgstr " Tr"
+
+#: objdump.c:436
+#, c-format
+msgid "%s: not a dynamic object"
+msgstr "%s không phải là môt đối tượng động"
+
+#: objdump.c:1722
+#, c-format
+msgid "Disassembly of section %s:\n"
+msgstr "Việc rã phần %s:\n"
+
+#: objdump.c:1884
+#, c-format
+msgid "Can't use supplied machine %s"
+msgstr "Không thể sỠdụng máy đã cung cấp %s"
+
+#: objdump.c:1903
+#, c-format
+msgid "Can't disassemble for architecture %s\n"
+msgstr "Không thể rã cho kiến trúc %s\n"
+
+#: objdump.c:1973
+#, c-format
+msgid ""
+"No %s section present\n"
+"\n"
+msgstr ""
+"Không có phần %s ở\n"
+"\n"
+
+#: objdump.c:1982
+#, c-format
+msgid "Reading %s section of %s failed: %s"
+msgstr "Việc Ä‘á»c phần %s của %s bị lá»—i: %s"
+
+#: objdump.c:2026
+#, c-format
+msgid ""
+"Contents of %s section:\n"
+"\n"
+msgstr ""
+"Nội dung phần %s\n"
+"\n"
+
+#: objdump.c:2153
+#, c-format
+msgid "architecture: %s, "
+msgstr "kiến trúc: %s, "
+
+#: objdump.c:2156
+#, c-format
+msgid "flags 0x%08x:\n"
+msgstr "cá» 0x%08x:\n"
+
+#: objdump.c:2170
+#, c-format
+msgid ""
+"\n"
+"start address 0x"
+msgstr ""
+"\n"
+"địa chỉ đầu 0x"
+
+#: objdump.c:2210
+#, c-format
+msgid "Contents of section %s:\n"
+msgstr "Nội dung phần %s:\n"
+
+#: objdump.c:2335
+#, c-format
+msgid "no symbols\n"
+msgstr "không có ký hiệu\n"
+
+#: objdump.c:2342
+#, c-format
+msgid "no information for symbol number %ld\n"
+msgstr "không có thông tin cho ký hiệu số %ld\n"
+
+#: objdump.c:2345
+#, c-format
+msgid "could not determine the type of symbol number %ld\n"
+msgstr "không thể quyết định kiểu ký hiệu số %ld\n"
+
+#: objdump.c:2611
+#, c-format
+msgid ""
+"\n"
+"%s: file format %s\n"
+msgstr ""
+"\n"
+"%s: dạng thức táºp tin %s\n"
+
+#: objdump.c:2662
+#, c-format
+msgid "%s: printing debugging information failed"
+msgstr "%s: việc in ra thông tin gỡ lỗi bị lỗi"
+
+#: objdump.c:2753
+#, c-format
+msgid "In archive %s:\n"
+msgstr "Trong kho %s\n"
+
+#: objdump.c:2873
+msgid "unrecognized -E option"
+msgstr "không nháºn ra tùy chá»n « -E »"
+
+#: objdump.c:2884
+#, c-format
+msgid "unrecognized --endian type `%s'"
+msgstr "không nháºn ra kiểu tÃnh trạng cuối (endian) « %s »"
+
+#: rdcoff.c:196
+#, c-format
+msgid "parse_coff_type: Bad type code 0x%x"
+msgstr "parse_coff_type: (phân tách kiểu coff) Mã kiểu sai 0x%x"
+
+#: rdcoff.c:404 rdcoff.c:509 rdcoff.c:697
+#, c-format
+msgid "bfd_coff_get_syment failed: %s"
+msgstr "« bfd_coff_get_syment » bị lỗi: %s"
+
+#: rdcoff.c:420 rdcoff.c:717
+#, c-format
+msgid "bfd_coff_get_auxent failed: %s"
+msgstr "« bfd_coff_get_auxent » bị lỗi: %s"
+
+#: rdcoff.c:784
+#, c-format
+msgid "%ld: .bf without preceding function"
+msgstr "%ld: « .bf » không có hà m đi trước"
+
+#: rdcoff.c:834
+#, c-format
+msgid "%ld: unexpected .ef\n"
+msgstr "%ld: « .ef » bất ngá»\n"
+
+#: rddbg.c:85
+#, c-format
+msgid "%s: no recognized debugging information"
+msgstr "%s: không có thông tin gỡ lá»—i đã nháºn ra"
+
+#: rddbg.c:394
+#, c-format
+msgid "Last stabs entries before error:\n"
+msgstr "Những mục nháºp stabs cuối cùng trÆ°á»›c lá»—i:\n"
+
+#: readelf.c:272
+#, c-format
+msgid "%s: Error: "
+msgstr "%s: Lá»—i: "
+
+#: readelf.c:283
+#, c-format
+msgid "%s: Warning: "
+msgstr "%s: Cảnh báo : "
+
+#: readelf.c:298
+#, c-format
+msgid "Unable to seek to 0x%x for %s\n"
+msgstr "Không thể nhảy tới 0x%x tìm %s\n"
+
+#: readelf.c:310
+#, c-format
+msgid "Out of memory allocating 0x%x bytes for %s\n"
+msgstr "Hết bộ nhớ khi cấp phát 0x%x byte cho %s\n"
+
+#: readelf.c:318
+#, c-format
+msgid "Unable to read in 0x%x bytes of %s\n"
+msgstr "Không thể Ä‘á»c trong 0x%x byte của %s\n"
+
+#: readelf.c:364 readelf.c:412 readelf.c:615 readelf.c:647
+#, c-format
+msgid "Unhandled data length: %d\n"
+msgstr "Äá»™ dà i dữ liệu không được quản lý: %d\n"
+
+#: readelf.c:752
+msgid "Don't know about relocations on this machine architecture\n"
+msgstr "Không biết vỠviệc định vị lại trên kiến trúc máy nà y\n"
+
+#: readelf.c:772 readelf.c:799 readelf.c:842 readelf.c:869
+msgid "relocs"
+msgstr "đ.v. lại"
+
+#: readelf.c:782 readelf.c:809 readelf.c:852 readelf.c:879
+msgid "out of memory parsing relocs"
+msgstr "hết bộ nhớ khi phân tách việc định vị lại"
+
+#: readelf.c:933
+#, c-format
+msgid " Offset Info Type Sym. Value Symbol's Name + Addend\n"
+msgstr " Hiệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu + gì thêm\n"
+
+#: readelf.c:935
+#, c-format
+msgid " Offset Info Type Sym.Value Sym. Name + Addend\n"
+msgstr " HIệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu + gì thêm\n"
+
+#: readelf.c:940
+#, c-format
+msgid " Offset Info Type Sym. Value Symbol's Name\n"
+msgstr " HIệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu\n"
+
+#: readelf.c:942
+#, c-format
+msgid " Offset Info Type Sym.Value Sym. Name\n"
+msgstr " Hiệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu\n"
+
+#: readelf.c:950
+#, c-format
+msgid " Offset Info Type Symbol's Value Symbol's Name + Addend\n"
+msgstr " Offset Info Type Symbol's Value Symbol's Name + Addend\n"
+
+#: readelf.c:952
+#, c-format
+msgid " Offset Info Type Sym. Value Sym. Name + Addend\n"
+msgstr " Hiệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu + gì thêm\n"
+
+#: readelf.c:957
+#, c-format
+msgid " Offset Info Type Symbol's Value Symbol's Name\n"
+msgstr " Offset Info Type Symbol's Value Symbol's Name\n"
+
+#: readelf.c:959
+#, c-format
+msgid " Offset Info Type Sym. Value Sym. Name\n"
+msgstr " HIệu Tin Kiểu Giá trị ký hiệu Tên ký hiệu\n"
+
+#: readelf.c:1239 readelf.c:1241 readelf.c:1324 readelf.c:1326 readelf.c:1335
+#: readelf.c:1337
+#, c-format
+msgid "unrecognized: %-7lx"
+msgstr "không nháºn ra: %-7lx"
+
+#: readelf.c:1295
+#, c-format
+msgid "<string table index: %3ld>"
+msgstr "<chỉ mục bảng chuỗi: %3ld>"
+
+#: readelf.c:1297
+#, c-format
+msgid "<corrupt string table index: %3ld>"
+msgstr "<chỉ mục bảng chuá»—i bị há»ng: %3ld>"
+
+#: readelf.c:1569
+#, c-format
+msgid "Processor Specific: %lx"
+msgstr "Äặc trÆ°ng cho bá»™ xá» lý: %lx"
+
+#: readelf.c:1588
+#, c-format
+msgid "Operating System specific: %lx"
+msgstr "Äặc trÆ°ng cho Hệ Ä‘iá»u hà nh: %lx"
+
+#: readelf.c:1592 readelf.c:2370
+#, c-format
+msgid "<unknown>: %lx"
+msgstr "<không rõ>: %lx"
+
+#: readelf.c:1605
+msgid "NONE (None)"
+msgstr "KHÔNG CÓ (Không có)"
+
+#: readelf.c:1606
+msgid "REL (Relocatable file)"
+msgstr "REL (Táºp tin có thể _định vị lại_)"
+
+#: readelf.c:1607
+msgid "EXEC (Executable file)"
+msgstr "EXEC (Executable file)"
+
+#: readelf.c:1608
+msgid "DYN (Shared object file)"
+msgstr "DYN (Shared object file)"
+
+#: readelf.c:1609
+msgid "CORE (Core file)"
+msgstr "CORE (Core file)"
+
+#: readelf.c:1613
+#, c-format
+msgid "Processor Specific: (%x)"
+msgstr "Äặc trÆ°ng cho bá»™ xá» lý: (%x)"
+
+#: readelf.c:1615
+#, c-format
+msgid "OS Specific: (%x)"
+msgstr "Äặc trÆ°ng cho HÄH: (%x)"
+
+#: readelf.c:1617 readelf.c:1724 readelf.c:2554
+#, c-format
+msgid "<unknown>: %x"
+msgstr "<không rõ>: %x"
+
+#: readelf.c:1629
+msgid "None"
+msgstr "Không có"
+
+#: readelf.c:2229
+msgid "Standalone App"
+msgstr "Ứng dụng Äá»™c láºp"
+
+#: readelf.c:2232 readelf.c:2952 readelf.c:2968
+#, c-format
+msgid "<unknown: %x>"
+msgstr "<không rõ : %x>"
+
+#: readelf.c:2597
+#, c-format
+msgid "Usage: readelf <option(s)> elf-file(s)\n"
+msgstr "Cách sá» dụng: readelf <tùy_chá»n...> táºp_tin_elf...\n"
+
+#: readelf.c:2598
+#, c-format
+msgid " Display information about the contents of ELF format files\n"
+msgstr " Hiển thị thông tin vá» ná»™i dung táºp tin dạng thức ELF\n"
+
+#: readelf.c:2599
+#, c-format
+msgid ""
+" Options are:\n"
+" -a --all Equivalent to: -h -l -S -s -r -d -V -A -I\n"
+" -h --file-header Display the ELF file header\n"
+" -l --program-headers Display the program headers\n"
+" --segments An alias for --program-headers\n"
+" -S --section-headers Display the sections' header\n"
+" --sections An alias for --section-headers\n"
+" -g --section-groups Display the section groups\n"
+" -e --headers Equivalent to: -h -l -S\n"
+" -s --syms Display the symbol table\n"
+" --symbols An alias for --syms\n"
+" -n --notes Display the core notes (if present)\n"
+" -r --relocs Display the relocations (if present)\n"
+" -u --unwind Display the unwind info (if present)\n"
+" -d --dynamic Display the dynamic section (if present)\n"
+" -V --version-info Display the version sections (if present)\n"
+" -A --arch-specific Display architecture specific information (if any).\n"
+" -D --use-dynamic Use the dynamic section info when displaying symbols\n"
+" -x --hex-dump=<number> Dump the contents of section <number>\n"
+" -w[liaprmfFsoR] or\n"
+" --debug-dump[=line,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=str,=loc,=Ranges]\n"
+" Display the contents of DWARF2 debug sections\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -a --all \t\t\t\t\tBằng: -h -l -S -s -r -d -V -A -I\n"
+"\t(hết)\n"
+" -h --file-header \t\t\t\tHiển thị _dòng đầu táºp tin_ ELF\n"
+" -l --program-headers \t\tHiển thị _các dòng đầu chương trình_\n"
+" --segments \t\t\tBiệt hiệu cho « --program-headers »\n"
+"\t(các phân đoạn)\n"
+" -S --section-headers \t\t\tHiển thị dòng đầu của các phần\n"
+"\t(các dòng đầu phần)\n"
+" --sections \t\t\tBiệt hiệu cho « --section-headers »\n"
+"\t(các phần)\n"
+" -g --section-groups \t\t\t Hiển thị _các nhóm phần_\n"
+" -e --headers \t\t\t\tBằng: -h -l -S\n"
+"\t(các dòng đầu)\n"
+" -s --syms \t\t\tHiển thị bảng _ký hiệu_\n"
+" --symbols \t\t\tBiệt hiệu cho « --syms »\n"
+"\t(các ký hiệu [« syms » là viết tắt])\n"
+" -n --notes \t\t\tHiển thị _các ghi chú_ lõi (nếu có)\n"
+" -r --relocs \t\tHiển thị _các việc định vị lại_ (nếu có)\n"
+" -u --unwind \t\tHiển thị thông tin _tri ra_ (nếu có)\n"
+" -d --dynamic \t\tHiển thị phần _động_ (nếu có)\n"
+" -V --version-info \t\tHiển thị các phần phiên bản (nếu có)\n"
+"\t(thông tin phiên bản)\n"
+" -A --arch-specific Hiển thị thông tin _đặc trưng cho kiến trúc_ (nếu có)\n"
+" -D --use-dynamic _Dùng_ thông tin phần _động_ khi hiển thị ký hiệu\n"
+" -x --hex-dump=<số> \t\t\tÄổ ná»™i dung phần <số>\n"
+"\t(đổ tháºp lục)\n"
+" -w[liaprmfFsoR] or\n"
+" --debug-dump[=line,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=str,=loc,=Ranges]\n"
+"\t[line\t\t\tdòng\n"
+"\tinfo\t\t\tthông tin\n"
+"\tabbrev.\t\tviết tắt\n"
+"\tpubnames\tcác tên công\n"
+"\taranges\t\tcác phạm vị a\n"
+"\tmacro\t\tbộ lệnh\n"
+"\tframes\t\tcác khung\n"
+"\tstr\t\t\tchuá»—i\n"
+"\tloc\t\t\tđịnh vị\n"
+"\tRanges\t\tCác phạm vị]\n"
+" Hiển thị nội dung các phần gỡ lỗi kiểu DWARF2\n"
+
+#: readelf.c:2622
+#, c-format
+msgid ""
+" -i --instruction-dump=<number>\n"
+" Disassemble the contents of section <number>\n"
+msgstr ""
+" -i --instruction-dump=<số>\t\tTháo ra nội dung phần <số>\n"
+"\t(đổ câu lệnh)\n"
+
+#: readelf.c:2626
+#, c-format
+msgid ""
+" -I --histogram Display histogram of bucket list lengths\n"
+" -W --wide Allow output width to exceed 80 characters\n"
+" -H --help Display this information\n"
+" -v --version Display the version number of readelf\n"
+msgstr ""
+" -I --histogram\n"
+"\tHiển thị _biểu đồ tần xuất_ của các độ dà i danh sách xô\n"
+" -W --wide Cho phép độ _rộng_ kết xuất vượt qua 80 ký tự\n"
+" -H --help \tHiển thị _trợ giúp_ nà y\n"
+" -v --version \tHiển thị số thứ tự _phiên bản_ của readelf\n"
+
+#: readelf.c:2651 readelf.c:12118
+msgid "Out of memory allocating dump request table."
+msgstr "Hết bộ nhớ khi cấp phát bảng yêu cầu đổ."
+
+#: readelf.c:2820 readelf.c:2888
+#, c-format
+msgid "Unrecognized debug option '%s'\n"
+msgstr "Không nháºn diện tùy chá»n gỡ lá»—i « %s »\n"
+
+#: readelf.c:2922
+#, c-format
+msgid "Invalid option '-%c'\n"
+msgstr "Tùy chá»n không hợp lệ « -%c »\n"
+
+#: readelf.c:2936
+msgid "Nothing to do.\n"
+msgstr "Không có gì cần là m.\n"
+
+#: readelf.c:2948 readelf.c:2964 readelf.c:5906
+msgid "none"
+msgstr "không có"
+
+#: readelf.c:2965
+msgid "2's complement, little endian"
+msgstr "phần bù của 2, tÃnh trạng cuối nhá»"
+
+#: readelf.c:2966
+msgid "2's complement, big endian"
+msgstr "phần bù của 2, tÃnh trạng cuối lá»›n"
+
+#: readelf.c:2984
+msgid "Not an ELF file - it has the wrong magic bytes at the start\n"
+msgstr "Không phải là táºp tin ELF — có những byte ma thuáºt không đúng tại đầu nó.\n"
+
+#: readelf.c:2992
+#, c-format
+msgid "ELF Header:\n"
+msgstr "Dòng đầu ELF:\n"
+
+#: readelf.c:2993
+#, c-format
+msgid " Magic: "
+msgstr " Ma thuáºt: "
+
+#: readelf.c:2997
+#, c-format
+msgid " Class: %s\n"
+msgstr " Class: %s\n"
+
+#: readelf.c:2999
+#, c-format
+msgid " Data: %s\n"
+msgstr " Data: %s\n"
+
+#: readelf.c:3001
+#, c-format
+msgid " Version: %d %s\n"
+msgstr " Version: %d %s\n"
+
+#: readelf.c:3008
+#, c-format
+msgid " OS/ABI: %s\n"
+msgstr " OS/ABI: %s\n"
+
+#: readelf.c:3010
+#, c-format
+msgid " ABI Version: %d\n"
+msgstr " Phiên bản ABI: %d\n"
+
+#: readelf.c:3012
+#, c-format
+msgid " Type: %s\n"
+msgstr " Type: %s\n"
+
+#: readelf.c:3014
+#, c-format
+msgid " Machine: %s\n"
+msgstr " Machine: %s\n"
+
+#: readelf.c:3016
+#, c-format
+msgid " Version: 0x%lx\n"
+msgstr " Version: 0x%lx\n"
+
+#: readelf.c:3019
+#, c-format
+msgid " Entry point address: "
+msgstr " Äịa chỉ Ä‘iểm và o : "
+
+#: readelf.c:3021
+#, c-format
+msgid ""
+"\n"
+" Start of program headers: "
+msgstr ""
+"\n"
+" Äiểm đầu các dòng đầu chÆ°Æ¡ng trình: "
+
+#: readelf.c:3023
+#, c-format
+msgid ""
+" (bytes into file)\n"
+" Start of section headers: "
+msgstr ""
+" (byte và o táºp tin)\n"
+" Äầu các dòng đầu phần: "
+
+#: readelf.c:3025
+#, c-format
+msgid " (bytes into file)\n"
+msgstr " (byte và o táºp tin)\n"
+
+#: readelf.c:3027
+#, c-format
+msgid " Flags: 0x%lx%s\n"
+msgstr " Flags: 0x%lx%s\n"
+
+#: readelf.c:3030
+#, c-format
+msgid " Size of this header: %ld (bytes)\n"
+msgstr " Cỡ phần nà y: %ld (byte)\n"
+
+#: readelf.c:3032
+#, c-format
+msgid " Size of program headers: %ld (bytes)\n"
+msgstr " Cỡ các dòng đầu chương trình: %ld (byte)\n"
+
+#: readelf.c:3034
+#, c-format
+msgid " Number of program headers: %ld\n"
+msgstr " Số dòng đầu chương trình: %ld\n"
+
+#: readelf.c:3036
+#, c-format
+msgid " Size of section headers: %ld (bytes)\n"
+msgstr " Cỡ các dòng đầu phần: %ld (byte)\n"
+
+#: readelf.c:3038
+#, c-format
+msgid " Number of section headers: %ld"
+msgstr " Số dòng đầu phần: %ld"
+
+#: readelf.c:3043
+#, c-format
+msgid " Section header string table index: %ld"
+msgstr " Chỉ mục bảng chuỗi dòng đầu phần: %ld"
+
+#: readelf.c:3074 readelf.c:3107
+msgid "program headers"
+msgstr "các dòng đầu chương trình"
+
+#: readelf.c:3145 readelf.c:3446 readelf.c:3487 readelf.c:3546 readelf.c:3609
+#: readelf.c:3993 readelf.c:4017 readelf.c:5247 readelf.c:5291 readelf.c:5489
+#: readelf.c:6450 readelf.c:6464 readelf.c:11493 readelf.c:11912
+#: readelf.c:11979
+msgid "Out of memory\n"
+msgstr "Hết bộ nhớ\n"
+
+#: readelf.c:3172
+#, c-format
+msgid ""
+"\n"
+"There are no program headers in this file.\n"
+msgstr ""
+"\n"
+"Không có dòng đầu chÆ°Æ¡ng trình nà o trong táºp tin nà y.\n"
+
+#: readelf.c:3178
+#, c-format
+msgid ""
+"\n"
+"Elf file type is %s\n"
+msgstr ""
+"\n"
+"Kiểu táºp tin Elf là %s\n"
+
+#: readelf.c:3179
+#, c-format
+msgid "Entry point "
+msgstr "Äiểm và o"
+
+#: readelf.c:3181
+#, c-format
+msgid ""
+"\n"
+"There are %d program headers, starting at offset "
+msgstr ""
+"\n"
+"Có %d dòng đầu chương trình, bắt đầu tại hiệu số"
+
+#: readelf.c:3193 readelf.c:3195
+#, c-format
+msgid ""
+"\n"
+"Program Headers:\n"
+msgstr ""
+"\n"
+"Dòng đầu chương trình:\n"
+
+#: readelf.c:3199
+#, c-format
+msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n"
+msgstr " Kiểu HIệu ÄChỉẢo ÄChỉVáºt CỡTáºp CỡNhá»› Cá» Cạnh lá»\n"
+
+#: readelf.c:3202
+#, c-format
+msgid " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n"
+msgstr " Kiểu HIệu Äịa Chỉ Ảo Äịa Chỉ Váºt lý CỡTáºp CỡNhá»› Cá» Cạnh lá»\n"
+
+#: readelf.c:3206
+#, c-format
+msgid " Type Offset VirtAddr PhysAddr\n"
+msgstr " Kiểu HIệu Äịa Chỉ Ảo Äịa Chỉ Váºt lý\n"
+
+#: readelf.c:3208
+#, c-format
+msgid " FileSiz MemSiz Flags Align\n"
+msgstr " FileSiz MemSiz Flags Align\n"
+
+#: readelf.c:3301
+msgid "more than one dynamic segment\n"
+msgstr "hơn một phân đoạn động\n"
+
+#: readelf.c:3312
+msgid "no .dynamic section in the dynamic segment"
+msgstr "không có phân đoạn « .dynamic » (động) trong phân đoạn động"
+
+#: readelf.c:3321
+msgid "the .dynamic section is not contained within the dynamic segment"
+msgstr "phần « .dynamic » (động) không có được chứa ở trong phân đoạn động"
+
+#: readelf.c:3323
+msgid "the .dynamic section is not the first section in the dynamic segment."
+msgstr "phần « .dynamic » (động) không phải là phần thứ nhất trong phân đoạn động."
+
+#: readelf.c:3337
+msgid "Unable to find program interpreter name\n"
+msgstr "Không tìm thấy tên bộ giải dịch chương trình\n"
+
+#: readelf.c:3344
+#, c-format
+msgid ""
+"\n"
+" [Requesting program interpreter: %s]"
+msgstr ""
+"\n"
+" [Äang yêu cầu bá»™ giải dịch chÆ°Æ¡ng trình: %s]"
+
+#: readelf.c:3356
+#, c-format
+msgid ""
+"\n"
+" Section to Segment mapping:\n"
+msgstr ""
+"\n"
+" Ãnh xạ Phần đến Phân Ä‘oạn:\n"
+
+#: readelf.c:3357
+#, c-format
+msgid " Segment Sections...\n"
+msgstr " Các phần phân đoạn...\n"
+
+#: readelf.c:3408
+msgid "Cannot interpret virtual addresses without program headers.\n"
+msgstr "Không thể giải dịch địa chỉ ảo khi không có dòng đầu chương trình.\n"
+
+#: readelf.c:3424
+#, c-format
+msgid "Virtual address 0x%lx not located in any PT_LOAD segment.\n"
+msgstr "Äịa chỉ ảo 0x%lx không được định vị trong phân Ä‘oạn kiểu « PT_LOAD » nà o.\n"
+
+#: readelf.c:3438 readelf.c:3479
+msgid "section headers"
+msgstr "dòng đầu phần"
+
+#: readelf.c:3523 readelf.c:3586
+msgid "symbols"
+msgstr "ký hiệu"
+
+#: readelf.c:3533 readelf.c:3596
+msgid "symtab shndx"
+msgstr "symtab shndx"
+
+#: readelf.c:3697 readelf.c:3977
+#, c-format
+msgid ""
+"\n"
+"There are no sections in this file.\n"
+msgstr ""
+"\n"
+"Không có phần nà o trong táºp tin nà y.\n"
+
+#: readelf.c:3703
+#, c-format
+msgid "There are %d section headers, starting at offset 0x%lx:\n"
+msgstr "Có %d dòng đầu phần, bắt đầu tại hiệu số 0x%lx:\n"
+
+#: readelf.c:3720 readelf.c:4079 readelf.c:4290 readelf.c:4591 readelf.c:5011
+#: readelf.c:6618
+msgid "string table"
+msgstr "bảng chuỗi"
+
+#: readelf.c:3765
+msgid "File contains multiple dynamic symbol tables\n"
+msgstr "Táºp tin chứa nhiá»u bảng ký hiệu Ä‘á»™ng\n"
+
+# Type: text
+# Description
+#: readelf.c:3777
+msgid "File contains multiple dynamic string tables\n"
+msgstr "Táºp tin chứa nhiá»u bảng chuá»—i Ä‘á»™ng\n"
+
+#: readelf.c:3782
+msgid "dynamic strings"
+msgstr "chuá»—i Ä‘á»™ng"
+
+#: readelf.c:3789
+msgid "File contains multiple symtab shndx tables\n"
+msgstr "Táºp tin chứa nhiá»u bảng symtab shndx\n"
+
+#: readelf.c:3828
+#, c-format
+msgid ""
+"\n"
+"Section Headers:\n"
+msgstr ""
+"\n"
+"Dòng đầu phần:\n"
+
+#: readelf.c:3830
+#, c-format
+msgid ""
+"\n"
+"Section Header:\n"
+msgstr ""
+"\n"
+"Dòng đầu phần:\n"
+
+#: readelf.c:3834
+#, c-format
+msgid " [Nr] Name Type Addr Off Size ES Flg Lk Inf Al\n"
+msgstr " [Nr] Name Type Addr Off Size ES Flg Lk Inf Al\n"
+
+#: readelf.c:3837
+#, c-format
+msgid " [Nr] Name Type Address Off Size ES Flg Lk Inf Al\n"
+msgstr " [Nr] Name Type Address Off Size ES Flg Lk Inf Al\n"
+
+#: readelf.c:3840
+#, c-format
+msgid " [Nr] Name Type Address Offset\n"
+msgstr " [Nr] Name Type Address Offset\n"
+
+#: readelf.c:3841
+#, c-format
+msgid " Size EntSize Flags Link Info Align\n"
+msgstr " Size EntSize Flags Link Info Align\n"
+
+#: readelf.c:3936
+#, c-format
+msgid ""
+"Key to Flags:\n"
+" W (write), A (alloc), X (execute), M (merge), S (strings)\n"
+" I (info), L (link order), G (group), x (unknown)\n"
+" O (extra OS processing required) o (OS specific), p (processor specific)\n"
+msgstr ""
+"Cá» ey \tW\tghi\n"
+" \tA\tcấp phát\n"
+"\tX\tthực hiện\n"
+"\tM\ttrá»™n\n"
+"\tS\tcác chuỗi\n"
+"\tI\tthông tin\n"
+"\tL\tthứ tự liên kết\n"
+"\tG\tnhóm\n"
+"\tO\tcần thiết xá» lý hệ Ä‘iá»u hà nh thêm\n"
+"\to \tđặc trÆ°ng cho hệ Ä‘iá»u hà nh\n"
+"\ts\tđặc trưng cho bộ xỠlý\n"
+
+#: readelf.c:3954
+#, c-format
+msgid "[<unknown>: 0x%x]"
+msgstr "[<không rõ>: 0x%x]"
+
+#: readelf.c:3984
+msgid "Section headers are not available!\n"
+msgstr "Dòng đầu phần không sẵn sà ng.\n"
+
+#: readelf.c:4008
+#, c-format
+msgid ""
+"\n"
+"There are no section groups in this file.\n"
+msgstr ""
+"\n"
+"Không có nhóm phần nà o trong táºp tin nà y.\n"
+
+#: readelf.c:4042
+#, c-format
+msgid "Bad sh_link in group section `%s'\n"
+msgstr "Có liên kết « sh_link » sai trong phần nhóm « %s »\n"
+
+#: readelf.c:4061
+#, c-format
+msgid "Bad sh_info in group section `%s'\n"
+msgstr "Có thông tin « sh_info » sai trong phần nhóm « %s »\n"
+
+#: readelf.c:4085 readelf.c:6947
+msgid "section data"
+msgstr "dữ liệu phần"
+
+#: readelf.c:4097
+#, c-format
+msgid " [Index] Name\n"
+msgstr " [Chỉ mục] Tên\n"
+
+#: readelf.c:4114
+#, c-format
+msgid "section [%5u] already in group section [%5u]\n"
+msgstr "phần [%5u] đã có trong phần nhóm [%5u]\n"
+
+#: readelf.c:4127
+#, c-format
+msgid "section 0 in group section [%5u]\n"
+msgstr "phần 0 trong phần nhóm [%5u]\n"
+
+#: readelf.c:4224
+#, c-format
+msgid ""
+"\n"
+"'%s' relocation section at offset 0x%lx contains %ld bytes:\n"
+msgstr ""
+"\n"
+"phần định vị lại « %s » tại hiệu số 0x%lx chứa %ld byte:\n"
+
+#: readelf.c:4236
+#, c-format
+msgid ""
+"\n"
+"There are no dynamic relocations in this file.\n"
+msgstr ""
+"\n"
+"Không có việc định vị lại Ä‘á»™ng nà o trong táºp tin nà y.\n"
+
+#: readelf.c:4260
+#, c-format
+msgid ""
+"\n"
+"Relocation section "
+msgstr ""
+"\n"
+"Phần định vị lại"
+
+#: readelf.c:4265 readelf.c:4666 readelf.c:4680 readelf.c:5025
+#, c-format
+msgid "'%s'"
+msgstr "« %s »"
+
+#: readelf.c:4267 readelf.c:4682 readelf.c:5027
+#, c-format
+msgid " at offset 0x%lx contains %lu entries:\n"
+msgstr " tại hiệu số 0x%lx chứa %lu mục nháºp:\n"
+
+#: readelf.c:4308
+#, c-format
+msgid ""
+"\n"
+"There are no relocations in this file.\n"
+msgstr ""
+"\n"
+"Không có việc định vị lại nà o trong táºp tin nà y.\n"
+
+#: readelf.c:4482 readelf.c:4862
+msgid "unwind table"
+msgstr "tri ra bảng"
+
+#: readelf.c:4540 readelf.c:4959
+#, c-format
+msgid "Skipping unexpected relocation type %s\n"
+msgstr "Äang nhảy kiểu định vị lại bất ngá» %s\n"
+
+#: readelf.c:4598 readelf.c:5018 readelf.c:5069
+#, c-format
+msgid ""
+"\n"
+"There are no unwind sections in this file.\n"
+msgstr ""
+"\n"
+"Không có phần tri ra nà o trong táºp tin nà y.\n"
+
+#: readelf.c:4661
+#, c-format
+msgid ""
+"\n"
+"Could not find unwind info section for "
+msgstr ""
+"\n"
+"Không thể tìm thấy phần thông tin tri ra cho "
+
+#: readelf.c:4673
+msgid "unwind info"
+msgstr "thông tin tri ra"
+
+#: readelf.c:4675 readelf.c:5024
+#, c-format
+msgid ""
+"\n"
+"Unwind section "
+msgstr ""
+"\n"
+"Phần tri ra "
+
+#: readelf.c:5228 readelf.c:5272
+msgid "dynamic section"
+msgstr "phần động"
+
+#: readelf.c:5349
+#, c-format
+msgid ""
+"\n"
+"There is no dynamic section in this file.\n"
+msgstr ""
+"\n"
+"Không có phần Ä‘á»™ng nà o trong táºp tin nà y.\n"
+
+#: readelf.c:5387
+msgid "Unable to seek to end of file!"
+msgstr "• Không thể tìm tá»›i kết thúc táºp tin. •"
+
+#: readelf.c:5400
+msgid "Unable to determine the number of symbols to load\n"
+msgstr "Không thể quyết định số ký hiệu cần tải\n"
+
+#: readelf.c:5435
+msgid "Unable to seek to end of file\n"
+msgstr "Không thể tìm tá»›i kết thúc táºp tin\n"
+
+#: readelf.c:5442
+msgid "Unable to determine the length of the dynamic string table\n"
+msgstr "Không thể quyết định độ dà i của bảng chuỗi động\n"
+
+#: readelf.c:5447
+msgid "dynamic string table"
+msgstr "bảng chuỗi động"
+
+#: readelf.c:5482
+msgid "symbol information"
+msgstr "thông tin ký hiệu"
+
+#: readelf.c:5507
+#, c-format
+msgid ""
+"\n"
+"Dynamic section at offset 0x%lx contains %u entries:\n"
+msgstr ""
+"\n"
+"Phần Ä‘á»™ng tại hiệu số 0x%lx chứa %u mục nháºp:\n"
+
+#: readelf.c:5510
+#, c-format
+msgid " Tag Type Name/Value\n"
+msgstr " Thẻ Kiểu Tên/Giá trị\n"
+
+#: readelf.c:5546
+#, c-format
+msgid "Auxiliary library"
+msgstr "Thư viên phụ"
+
+#: readelf.c:5550
+#, c-format
+msgid "Filter library"
+msgstr "ThÆ° viên lá»c"
+
+#: readelf.c:5554
+#, c-format
+msgid "Configuration file"
+msgstr "Táºp tin cấu hình"
+
+#: readelf.c:5558
+#, c-format
+msgid "Dependency audit library"
+msgstr "Thư viên kiểm tra cách phụ thuộc"
+
+#: readelf.c:5562
+#, c-format
+msgid "Audit library"
+msgstr "Thư viên kiểm tra"
+
+#: readelf.c:5580 readelf.c:5608 readelf.c:5636
+#, c-format
+msgid "Flags:"
+msgstr "Cá» :"
+
+#: readelf.c:5583 readelf.c:5611 readelf.c:5638
+#, c-format
+msgid " None\n"
+msgstr " Không có\n"
+
+#: readelf.c:5759
+#, c-format
+msgid "Shared library: [%s]"
+msgstr "Thư viện dùng chung: [%s]"
+
+#: readelf.c:5762
+#, c-format
+msgid " program interpreter"
+msgstr " bộ giải dịch chương trình"
+
+#: readelf.c:5766
+#, c-format
+msgid "Library soname: [%s]"
+msgstr "soname (tên so) thư viên: [%s]"
+
+#: readelf.c:5770
+#, c-format
+msgid "Library rpath: [%s]"
+msgstr "rpath (Ä‘Æ°á»ng dẫn r) thÆ° viên: [%s]"
+
+#: readelf.c:5774
+#, c-format
+msgid "Library runpath: [%s]"
+msgstr "runpath (Ä‘Æ°á»ng dẫn chạy) thÆ° viên: [%s]"
+
+#: readelf.c:5837
+#, c-format
+msgid "Not needed object: [%s]\n"
+msgstr "Äối tượng không cần thiết: [%s]\n"
+
+#: readelf.c:5951
+#, c-format
+msgid ""
+"\n"
+"Version definition section '%s' contains %ld entries:\n"
+msgstr ""
+"\n"
+"Phần định nghÄ©a phiên bản « %s » chứa %ld mục nháºp:\n"
+
+#: readelf.c:5954
+#, c-format
+msgid " Addr: 0x"
+msgstr " ÄChỉ: 0x"
+
+#: readelf.c:5956 readelf.c:6148
+#, c-format
+msgid " Offset: %#08lx Link: %lx (%s)\n"
+msgstr " HIệu: %#08lx LKết: %lx (%s)\n"
+
+#: readelf.c:5961
+msgid "version definition section"
+msgstr "phần định nghĩa phiên bản"
+
+#: readelf.c:5987
+#, c-format
+msgid " %#06x: Rev: %d Flags: %s"
+msgstr " %#06x: Bản: %d Cá»: %s"
+
+#: readelf.c:5990
+#, c-format
+msgid " Index: %d Cnt: %d "
+msgstr " Chỉ mục: %d Äếm: %d "
+
+#: readelf.c:6001
+#, c-format
+msgid "Name: %s\n"
+msgstr "Tên: %s\n"
+
+#: readelf.c:6003
+#, c-format
+msgid "Name index: %ld\n"
+msgstr "Chỉ mục tên: %ld\n"
+
+#: readelf.c:6018
+#, c-format
+msgid " %#06x: Parent %d: %s\n"
+msgstr " %#06x: Mẹ %d: %s\n"
+
+#: readelf.c:6021
+#, c-format
+msgid " %#06x: Parent %d, name index: %ld\n"
+msgstr " %#06x: Mẹ %d, chỉ mục tên: %ld\n"
+
+#: readelf.c:6040
+#, c-format
+msgid ""
+"\n"
+"Version needs section '%s' contains %ld entries:\n"
+msgstr ""
+"\n"
+"Phần cần thiết phiên bản « %s » chứa %ld mục nháºp:\n"
+
+#: readelf.c:6043
+#, c-format
+msgid " Addr: 0x"
+msgstr " ÄChỉ: 0x"
+
+#: readelf.c:6045
+#, c-format
+msgid " Offset: %#08lx Link to section: %ld (%s)\n"
+msgstr " HIệu: %#08lx Liên kết đến phần: %ld (%s)\n"
+
+#: readelf.c:6050
+msgid "version need section"
+msgstr "phần cần phiên bản"
+
+#: readelf.c:6072
+#, c-format
+msgid " %#06x: Version: %d"
+msgstr " %#06x: PhBản: %d"
+
+#: readelf.c:6075
+#, c-format
+msgid " File: %s"
+msgstr " Táºp tin: %s"
+
+#: readelf.c:6077
+#, c-format
+msgid " File: %lx"
+msgstr " Táºp tin: %lx"
+
+#: readelf.c:6079
+#, c-format
+msgid " Cnt: %d\n"
+msgstr " Äếm: %d\n"
+
+#: readelf.c:6097
+#, c-format
+msgid " %#06x: Name: %s"
+msgstr " %#06x: Tên: %s"
+
+#: readelf.c:6100
+#, c-format
+msgid " %#06x: Name index: %lx"
+msgstr " %#06x: Chỉ mục tên: %lx"
+
+#: readelf.c:6103
+#, c-format
+msgid " Flags: %s Version: %d\n"
+msgstr " Cá»: %s Phiên bản: %d\n"
+
+#: readelf.c:6139
+msgid "version string table"
+msgstr "bảng chuỗi phiên bản"
+
+#: readelf.c:6143
+#, c-format
+msgid ""
+"\n"
+"Version symbols section '%s' contains %d entries:\n"
+msgstr ""
+"\n"
+"Phần ký hiệu phiên bản « %s » chứa %d mục nháºp:\n"
+
+#: readelf.c:6146
+#, c-format
+msgid " Addr: "
+msgstr " ÄChỉ: "
+
+#: readelf.c:6156
+msgid "version symbol data"
+msgstr "dữ liệu ký hiệu phiên bản"
+
+#: readelf.c:6183
+msgid " 0 (*local*) "
+msgstr " 0 (*local*) "
+
+#: readelf.c:6187
+msgid " 1 (*global*) "
+msgstr " 1 (*toà n cụcglobal*) "
+
+#: readelf.c:6223 readelf.c:6677
+msgid "version need"
+msgstr "phiên bản cần"
+
+#: readelf.c:6233
+msgid "version need aux (2)"
+msgstr "phiên bản cần phụ (2)"
+
+#: readelf.c:6275 readelf.c:6740
+msgid "version def"
+msgstr "phbản đ.nghĩa"
+
+#: readelf.c:6294 readelf.c:6755
+msgid "version def aux"
+msgstr "phbản đ.nghĩa phụ"
+
+#: readelf.c:6325
+#, c-format
+msgid ""
+"\n"
+"No version information found in this file.\n"
+msgstr ""
+"\n"
+"Không tìm thấy thông tin phiên bản trong táºp tin nà y.\n"
+
+#: readelf.c:6456
+msgid "Unable to read in dynamic data\n"
+msgstr "Không thể Ä‘á»c và o dữ liệu Ä‘á»™ng\n"
+
+#: readelf.c:6509
+msgid "Unable to seek to start of dynamic information"
+msgstr "Không thể tìm tới đầu thông tin động"
+
+#: readelf.c:6515
+msgid "Failed to read in number of buckets\n"
+msgstr "Việc Ä‘á»c và o số xô bị lá»—i\n"
+
+#: readelf.c:6521
+msgid "Failed to read in number of chains\n"
+msgstr "Việc Ä‘á»c và o số dây bị lá»—i\n"
+
+#: readelf.c:6541
+#, c-format
+msgid ""
+"\n"
+"Symbol table for image:\n"
+msgstr ""
+"\n"
+"Bảng ký hiệu cho ảnh:\n"
+
+#: readelf.c:6543
+#, c-format
+msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n"
+msgstr " Số xô : Giá trị Cỡ Kiểu Trộn Hiện Ndx Tên\n"
+
+#: readelf.c:6545
+#, c-format
+msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n"
+msgstr " Số xô : Giá trị Cỡ Kiểu Trộn Hiện Ndx Tên\n"
+
+#: readelf.c:6597
+#, c-format
+msgid ""
+"\n"
+"Symbol table '%s' contains %lu entries:\n"
+msgstr ""
+"\n"
+"Bảng ký hiệu « %s » chứa %lu mục nháºp:\n"
+
+#: readelf.c:6601
+#, c-format
+msgid " Num: Value Size Type Bind Vis Ndx Name\n"
+msgstr " Số : Giá trị Cỡ Kiểu Trộn Hiện Ndx Tên\n"
+
+#: readelf.c:6603
+#, c-format
+msgid " Num: Value Size Type Bind Vis Ndx Name\n"
+msgstr " Số : Giá trị Cỡ Kiểu Trộn Hiện Ndx Tên\n"
+
+#: readelf.c:6649
+msgid "version data"
+msgstr "dữ liệu phiên bản"
+
+#: readelf.c:6690
+msgid "version need aux (3)"
+msgstr "phiên bản cần phụ (3)"
+
+#: readelf.c:6715
+msgid "bad dynamic symbol"
+msgstr "ký hiệu động sai"
+
+#: readelf.c:6778
+#, c-format
+msgid ""
+"\n"
+"Dynamic symbol information is not available for displaying symbols.\n"
+msgstr ""
+"\n"
+"Không có thông tin ký hiệu động để hiển thị ký hiệu.\n"
+
+#: readelf.c:6790
+#, c-format
+msgid ""
+"\n"
+"Histogram for bucket list length (total of %lu buckets):\n"
+msgstr ""
+"\n"
+"Biểu đồ tần xuất cho độ dà i danh sách xô (tổng số %lu xô):\n"
+
+#: readelf.c:6792
+#, c-format
+msgid " Length Number %% of total Coverage\n"
+msgstr " Dà i Số %% tổng phạm vị\n"
+
+#: readelf.c:6797 readelf.c:6813 readelf.c:10967 readelf.c:11159
+msgid "Out of memory"
+msgstr "Hết bộ nhớ"
+
+#: readelf.c:6862
+#, c-format
+msgid ""
+"\n"
+"Dynamic info segment at offset 0x%lx contains %d entries:\n"
+msgstr ""
+"\n"
+"Phân Ä‘oạn thông tin Ä‘á»™ng tại hiệu số 0x%lx chứa %d mục nháºp:\n"
+
+#: readelf.c:6865
+#, c-format
+msgid " Num: Name BoundTo Flags\n"
+msgstr " Số : Tên ÄóngVá»›i Cá»\n"
+
+#: readelf.c:6917
+#, c-format
+msgid ""
+"\n"
+"Assembly dump of section %s\n"
+msgstr ""
+"\n"
+"Việc đổ thanh ghi của phần %s\n"
+
+#: readelf.c:6938
+#, c-format
+msgid ""
+"\n"
+"Section '%s' has no data to dump.\n"
+msgstr ""
+"\n"
+"Phần « %s » không có dữ liệu cần đổ.\n"
+
+#: readelf.c:6943
+#, c-format
+msgid ""
+"\n"
+"Hex dump of section '%s':\n"
+msgstr ""
+"\n"
+"Việc đổ tháºp lục của phần « %s »:\n"
+
+#: readelf.c:7090
+msgid "badly formed extended line op encountered!\n"
+msgstr "gặp thao tác dòng đã mở rộng dạng sai.\n"
+
+#: readelf.c:7097
+#, c-format
+msgid " Extended opcode %d: "
+msgstr " Opcode (mã thao tác) đã mở rộng %d: "
+
+#: readelf.c:7102
+#, c-format
+msgid ""
+"End of Sequence\n"
+"\n"
+msgstr ""
+"Kết thúc dãy\n"
+"\n"
+
+#: readelf.c:7108
+#, c-format
+msgid "set Address to 0x%lx\n"
+msgstr "đặt Äịa chỉ là 0x%lx\n"
+
+#: readelf.c:7113
+#, c-format
+msgid " define new File Table entry\n"
+msgstr " định nghÄ©a mục nháºp Bảng Táºp tin má»›i\n"
+
+#: readelf.c:7114 readelf.c:9032
+#, c-format
+msgid " Entry\tDir\tTime\tSize\tName\n"
+msgstr " Mục\tTMục\tGiá»\tCỡ\tTên\n"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:7116
+#, c-format
+msgid " %d\t"
+msgstr " %d\t"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:7119 readelf.c:7121 readelf.c:7123 readelf.c:9044 readelf.c:9046
+#: readelf.c:9048
+#, c-format
+msgid "%lu\t"
+msgstr "%lu\t"
+
+# Variable: do not translate/ biến: đừng dịch
+#: readelf.c:7124
+#, c-format
+msgid ""
+"%s\n"
+"\n"
+msgstr ""
+"%s\n"
+"\n"
+
+#: readelf.c:7128
+#, c-format
+msgid "UNKNOWN: length %d\n"
+msgstr "KHÔNG RÕ: độ dà i %d\n"
+
+#: readelf.c:7155
+msgid "debug_str section data"
+msgstr "debug_str section data"
+
+#: readelf.c:7173
+msgid "<no .debug_str section>"
+msgstr "<no .debug_str section>"
+
+#: readelf.c:7176
+msgid "<offset is too big>"
+msgstr "<offset is too big>"
+
+#: readelf.c:7201
+msgid "debug_loc section data"
+msgstr "dữ liệu phần « debug_loc » (định vị gỡ lỗi)"
+
+#: readelf.c:7235
+msgid "debug_range section data"
+msgstr "dữ liệu phần « debug_range » (phạm vị gỡ lỗi)"
+
+#: readelf.c:7307
+#, c-format
+msgid "%s: skipping unexpected symbol type %s in relocation in section .rela%s\n"
+msgstr "%s: đang nhảy qua kiểu ký hiệu bất ngỠ%s trong việc định vị lại trong phần .rela%s\n"
+
+#: readelf.c:7321
+#, c-format
+msgid "skipping unexpected symbol type %s in relocation in section .rela.%s\n"
+msgstr "đang nhảy qua kiểu ký hiệu bất ngỠ%s trong việc định vị lại trong phần .rela%s\n"
+
+#: readelf.c:7565
+#, c-format
+msgid "Unknown TAG value: %lx"
+msgstr "Giá trị TAG (thẻ) không rõ : %lx"
+
+#: readelf.c:7601
+#, c-format
+msgid "Unknown FORM value: %lx"
+msgstr "Giá trị FORM (dạng) không rõ : %lx"
+
+#: readelf.c:7610
+#, c-format
+msgid " %lu byte block: "
+msgstr " Khối %lu byte: "
+
+#: readelf.c:7944
+#, c-format
+msgid "(User defined location op)"
+msgstr "(Thao tác định vị do ngÆ°á»i dùng định nghÄ©a)"
+
+#: readelf.c:7946
+#, c-format
+msgid "(Unknown location op)"
+msgstr "(Thao tác định vị không rõ)"
+
+#: readelf.c:8015
+msgid "Internal error: DWARF version is not 2 or 3.\n"
+msgstr "Lỗi nội bộ: phiên bản DWARF không phải là 2 hay 3.\n"
+
+#: readelf.c:8113
+msgid "DW_FORM_data8 is unsupported when sizeof (unsigned long) != 8\n"
+msgstr "Không há»— trợ « DW_FORM_data8 » khi « sizeof (unsigned long) != 8 » [kÃch cỡ của (dà i không ký)]\n"
+
+#: readelf.c:8162
+#, c-format
+msgid " (indirect string, offset: 0x%lx): %s"
+msgstr " (chuỗi gián tiếp, hiệu số: 0x%lx): %s"
+
+#: readelf.c:8171
+#, c-format
+msgid "Unrecognized form: %d\n"
+msgstr "Không nháºn diện dạng: %d\n"
+
+#: readelf.c:8256
+#, c-format
+msgid "(not inlined)"
+msgstr "(không đặt trực tiếp)"
+
+#: readelf.c:8259
+#, c-format
+msgid "(inlined)"
+msgstr "(đặt trực tiếp)"
+
+#: readelf.c:8262
+#, c-format
+msgid "(declared as inline but ignored)"
+msgstr "(khai báo là trực tiếp mà bị bỠqua)"
+
+#: readelf.c:8265
+#, c-format
+msgid "(declared as inline and inlined)"
+msgstr "(khai báo là trực tiếp và đặt trực tiếp)"
+
+#: readelf.c:8268
+#, c-format
+msgid " (Unknown inline attribute value: %lx)"
+msgstr " (Không biết giá trị thuá»™c tÃnh trá»±c tiếp: %lx)"
+
+#: readelf.c:8413 readelf.c:9537
+#, c-format
+msgid " [without DW_AT_frame_base]"
+msgstr " [không có DW_AT_frame_base (cơ bản khung)]"
+
+#: readelf.c:8416
+#, c-format
+msgid "(location list)"
+msgstr "(danh sách địa điểm)"
+
+#: readelf.c:8534
+#, c-format
+msgid "Unknown AT value: %lx"
+msgstr "Không biết giá trị AT: %lx"
+
+#: readelf.c:8602
+msgid "No comp units in .debug_info section ?"
+msgstr "Không có đơn vị biên dịch trong phần « .debug_info » (thông tin gỡ lỗi) ?"
+
+#: readelf.c:8611
+#, c-format
+msgid "Not enough memory for a debug info array of %u entries"
+msgstr "Không đủ bá»™ nhá»› cho mảng thông tin gỡ lá»—i có mục nháºp %u"
+
+#: readelf.c:8619 readelf.c:9630
+#, c-format
+msgid ""
+"The section %s contains:\n"
+"\n"
+msgstr ""
+"Phần %s chứa:\n"
+"\n"
+
+#: readelf.c:8693
+#, c-format
+msgid " Compilation Unit @ %lx:\n"
+msgstr " ÄÆ¡n vị biên dịch @ %lx:\n"
+
+#: readelf.c:8694
+#, c-format
+msgid " Length: %ld\n"
+msgstr " DÃ i: %ld\n"
+
+#: readelf.c:8695
+#, c-format
+msgid " Version: %d\n"
+msgstr " Phiên bản: %d\n"
+
+#: readelf.c:8696
+#, c-format
+msgid " Abbrev Offset: %ld\n"
+msgstr " Hiệu số tắt: %ld\n"
+
+#: readelf.c:8697
+#, c-format
+msgid " Pointer Size: %d\n"
+msgstr " Cỡ con trỠ: %d\n"
+
+#: readelf.c:8702
+msgid "Only version 2 and 3 DWARF debug information is currently supported.\n"
+msgstr "Hỗ trợ chỉ thông tin gỡ lỗi phiên bản DWARF 2 và 3 thôi.\n"
+
+#: readelf.c:8717
+msgid "Unable to locate .debug_abbrev section!\n"
+msgstr "Không thể định vị phần « .debug_abbrev » (gỡ lỗi viết tắt)\n"
+
+#: readelf.c:8722
+msgid "debug_abbrev section data"
+msgstr "dữ liệu phần « .debug_abbrev » (gỡ lỗi viết tắt)"
+
+#: readelf.c:8759
+#, c-format
+msgid "Unable to locate entry %lu in the abbreviation table\n"
+msgstr "Không thể định vị mục nhâp %lu trong bảng viết tắt\n"
+
+#: readelf.c:8765
+#, c-format
+msgid " <%d><%lx>: Abbrev Number: %lu (%s)\n"
+msgstr " <%d><%lx>: Số viết tắt: %lu (%s)\n"
+
+#: readelf.c:8838
+#, c-format
+msgid "%s section needs a populated .debug_info section\n"
+msgstr "Phần %s cần phần « .debug_info » (thông tin gỡ lỗi) có dữ liệu\n"
+
+#: readelf.c:8845
+#, c-format
+msgid "%s section has more comp units than .debug_info section\n"
+msgstr "Phần %s có nhiá»u Ä‘Æ¡n vị biên dịch hÆ¡n phần « .debug_info » (thông tin gỡ lá»—i)\n"
+
+#: readelf.c:8847
+#, c-format
+msgid ""
+"assuming that the pointer size is %d, from the last comp unit in .debug_info\n"
+"\n"
+msgstr ""
+"giả sá» kÃch cỡ con trá» là %d, từ Ä‘Æ¡n vị biên dịch cuối cùng trong « .debug_info » (thông tin gỡ lá»—i)\n"
+"\n"
+
+#: readelf.c:8891
+msgid "extracting information from .debug_info section"
+msgstr "Ä‘ang trÃch thông tin ra phần « .debug_info » (thông tin gỡ lá»—i)"
+
+#: readelf.c:8909
+#, c-format
+msgid ""
+"\n"
+"Dump of debug contents of section %s:\n"
+"\n"
+msgstr ""
+"\n"
+"Việc đổ nội dung gỡ lỗi của phần %s:\n"
+
+#: readelf.c:8948
+msgid "The line info appears to be corrupt - the section is too small\n"
+msgstr "Hình nhÆ° dòng bị há»ng — phần quá nhá»\n"
+
+#: readelf.c:8957
+msgid "Only DWARF version 2 and 3 line info is currently supported.\n"
+msgstr "Há»— trợ hiện thá»i chỉ thông tin dòng DWARF phiên bản 2 và 3.\n"
+
+#: readelf.c:8984
+#, c-format
+msgid " Length: %ld\n"
+msgstr " DÃ i: %ld\n"
+
+#: readelf.c:8985
+#, c-format
+msgid " DWARF Version: %d\n"
+msgstr " Phiên bản DWARF: %d\n"
+
+#: readelf.c:8986
+#, c-format
+msgid " Prologue Length: %d\n"
+msgstr " Dà i đoạn mở đầu : %d\n"
+
+#: readelf.c:8987
+#, c-format
+msgid " Minimum Instruction Length: %d\n"
+msgstr " Dà i câu lệnh tối thiểu : %d\n"
+
+#: readelf.c:8988
+#, c-format
+msgid " Initial value of 'is_stmt': %d\n"
+msgstr " Giá trị đầu của « is_stmt »: %d\n"
+
+#: readelf.c:8989
+#, c-format
+msgid " Line Base: %d\n"
+msgstr " Cơ bản dòng: %d\n"
+
+#: readelf.c:8990
+#, c-format
+msgid " Line Range: %d\n"
+msgstr " Phạm vị dòng: %d\n"
+
+#: readelf.c:8991
+#, c-format
+msgid " Opcode Base: %d\n"
+msgstr " Cơ bản mã thao tác: %d\n"
+
+#: readelf.c:8992
+#, c-format
+msgid " (Pointer size: %u)\n"
+msgstr " (cỡ con trỠ: %u)\n"
+
+#: readelf.c:9001
+#, c-format
+msgid ""
+"\n"
+" Opcodes:\n"
+msgstr ""
+"\n"
+" Mã thao tác:\n"
+
+#: readelf.c:9004
+#, c-format
+msgid " Opcode %d has %d args\n"
+msgstr " Mã thao tác %d có %d đối số\n"
+
+#: readelf.c:9010
+#, c-format
+msgid ""
+"\n"
+" The Directory Table is empty.\n"
+msgstr ""
+"\n"
+" Bảng Thư mục rỗng\n"
+
+#: readelf.c:9013
+#, c-format
+msgid ""
+"\n"
+" The Directory Table:\n"
+msgstr ""
+"\n"
+" Bảng Thư mục:\n"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:9017
+#, c-format
+msgid " %s\n"
+msgstr " %s\n"
+
+#: readelf.c:9028
+#, c-format
+msgid ""
+"\n"
+" The File Name Table is empty.\n"
+msgstr ""
+"\n"
+" Bảng Tên Táºp tin rá»—ng:\n"
+
+#: readelf.c:9031
+#, c-format
+msgid ""
+"\n"
+" The File Name Table:\n"
+msgstr ""
+"\n"
+" Bảng Tên Táºp tin:\n"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:9039
+#, c-format
+msgid " %d\t"
+msgstr " %d\t"
+
+# Variable: do not translate/ biến: đừng dịch
+#: readelf.c:9050
+#, c-format
+msgid "%s\n"
+msgstr "%s\n"
+
+#. Now display the statements.
+#: readelf.c:9058
+#, c-format
+msgid ""
+"\n"
+" Line Number Statements:\n"
+msgstr ""
+"\n"
+" Câu Số thứ tự Dòng:\n"
+
+#: readelf.c:9073
+#, c-format
+msgid " Special opcode %d: advance Address by %d to 0x%lx"
+msgstr " Mã thao tác đặc biệt %d: nâng cao Äịa chỉ bÆ°á»›c %d tá»›i 0x%lx"
+
+#: readelf.c:9077
+#, c-format
+msgid " and Line by %d to %d\n"
+msgstr " và Dòng bước %d tới %d\n"
+
+#: readelf.c:9088
+#, c-format
+msgid " Copy\n"
+msgstr " Chép\n"
+
+#: readelf.c:9095
+#, c-format
+msgid " Advance PC by %d to %lx\n"
+msgstr " Nâng cao PC bước %d tới %lx\n"
+
+#: readelf.c:9103
+#, c-format
+msgid " Advance Line by %d to %d\n"
+msgstr " Nâng cao dòng bước %d tới %d\n"
+
+#: readelf.c:9110
+#, c-format
+msgid " Set File Name to entry %d in the File Name Table\n"
+msgstr " Láºp Tên Táºp tin là mục nháºp %d trong Bảng Tên Táºp tin\n"
+
+#: readelf.c:9118
+#, c-format
+msgid " Set column to %d\n"
+msgstr " Láºp cá»™t là %d\n"
+
+#: readelf.c:9125
+#, c-format
+msgid " Set is_stmt to %d\n"
+msgstr " Láºp « is_stmt » (là câu) là %d\n"
+
+#: readelf.c:9130
+#, c-format
+msgid " Set basic block\n"
+msgstr " Láºp khối cÆ¡ bản\n"
+
+#: readelf.c:9138
+#, c-format
+msgid " Advance PC by constant %d to 0x%lx\n"
+msgstr " Nâng cao PC bước hằng số %d tới 0x%lx\n"
+
+#: readelf.c:9146
+#, c-format
+msgid " Advance PC by fixed size amount %d to 0x%lx\n"
+msgstr " Nâng cao PC bÆ°á»›c kÃch cỡ cố định %d tá»›i 0x%lx\n"
+
+#: readelf.c:9151
+#, c-format
+msgid " Set prologue_end to true\n"
+msgstr " Láºp « prologue_end » (kết thúc Ä‘oạn mở đầu) là true (đúng)\n"
+
+#: readelf.c:9155
+#, c-format
+msgid " Set epilogue_begin to true\n"
+msgstr " Láºp « epilogue_begin » (đầu phần kết) là true (đúng)\n"
+
+#: readelf.c:9161
+#, c-format
+msgid " Set ISA to %d\n"
+msgstr " Láºp ISA là %d\n"
+
+#: readelf.c:9165
+#, c-format
+msgid " Unknown opcode %d with operands: "
+msgstr " Gặp opcode (mã thao tác) không rõ %d với tác tỠ: "
+
+#: readelf.c:9193 readelf.c:9279 readelf.c:9354
+#, c-format
+msgid ""
+"Contents of the %s section:\n"
+"\n"
+msgstr ""
+"Nội dung của phần %s:\n"
+"\n"
+
+#: readelf.c:9233
+msgid "Only DWARF 2 and 3 pubnames are currently supported\n"
+msgstr "Há»— trợ hiện thá»i chỉ pubnames (tên công) DWARF phiên bản 2 và 3 thôi\n"
+
+#: readelf.c:9240
+#, c-format
+msgid " Length: %ld\n"
+msgstr " Length: %ld\n"
+
+#: readelf.c:9242
+#, c-format
+msgid " Version: %d\n"
+msgstr " Version: %d\n"
+
+#: readelf.c:9244
+#, c-format
+msgid " Offset into .debug_info section: %ld\n"
+msgstr " Hiệu số và o phầnO« ffset into .» (thông tin gỡ lỗi)nfo section: %ld\n"
+
+#: readelf.c:9246
+#, c-format
+msgid " Size of area in .debug_info section: %ld\n"
+msgstr " KÃch cỡ của vùng trong phần « .debug_info » (thông tin gỡ lá»—i): %ld\n"
+
+#: readelf.c:9249
+#, c-format
+msgid ""
+"\n"
+" Offset\tName\n"
+msgstr ""
+"\n"
+" Hiệu\tTên\n"
+
+#: readelf.c:9300
+#, c-format
+msgid " DW_MACINFO_start_file - lineno: %d filenum: %d\n"
+msgstr " DW_MACINFO_start_file (bắt đầu táºp tin) — số_dòng: %d số_táºp_tin: %d\n"
+
+#: readelf.c:9306
+#, c-format
+msgid " DW_MACINFO_end_file\n"
+msgstr " DW_MACINFO_end_file (kết thúc táºp tin)\n"
+
+#: readelf.c:9314
+#, c-format
+msgid " DW_MACINFO_define - lineno : %d macro : %s\n"
+msgstr " DW_MACINFO_define (định nghĩa) — số_dòng : %d bộ_lệnh : %s\n"
+
+#: readelf.c:9323
+#, c-format
+msgid " DW_MACINFO_undef - lineno : %d macro : %s\n"
+msgstr " DW_MACINFO_undef (chưa định nghĩa) — số_dòng : %d bộ_lệnh : %s\n"
+
+#: readelf.c:9335
+#, c-format
+msgid " DW_MACINFO_vendor_ext - constant : %d string : %s\n"
+msgstr " DW_MACINFO_vendor_ext (phần mở rộng nhà bán) — hằng số : %d chuối : %s\n"
+
+#: readelf.c:9363
+#, c-format
+msgid " Number TAG\n"
+msgstr " Số THẺ\n"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:9369
+#, c-format
+msgid " %ld %s [%s]\n"
+msgstr " %ld %s [%s]\n"
+
+#: readelf.c:9372
+msgid "has children"
+msgstr "có Ä‘iá»u con"
+
+#: readelf.c:9372
+msgid "no children"
+msgstr "không có con"
+
+# Variable: don't translate / Biến: đừng dịch
+#: readelf.c:9375
+#, c-format
+msgid " %-18s %s\n"
+msgstr " %-18s %s\n"
+
+#: readelf.c:9410
+#, c-format
+msgid ""
+"\n"
+"The .debug_loc section is empty.\n"
+msgstr ""
+"\n"
+"Phần « .debug_loc » (gỡ lỗi định vị) rỗng:\n"
+
+#. FIXME: Should we handle this case?
+#: readelf.c:9455
+msgid "Location lists in .debug_info section aren't in ascending order!\n"
+msgstr "• Các danh sách địa điểm trong phần « .debug_info » (thông tin gỡ lỗi) không phải theo thứ tự dần. •\n"
+
+#: readelf.c:9458
+msgid "No location lists in .debug_info section!\n"
+msgstr "• Không có danh sách địa điểm trong phần « .debug_info » (thông tin gỡ lỗi). •\n"
+
+#: readelf.c:9461
+#, c-format
+msgid "Location lists in .debug_loc section start at 0x%lx\n"
+msgstr "Danh sách địa điểm trong phần « .debug_info » (thông tin gỡ lỗi) bắt đầu tại 0x%lx\n"
+
+#: readelf.c:9464
+#, c-format
+msgid ""
+"Contents of the .debug_loc section:\n"
+"\n"
+msgstr ""
+"Nội dung của phần « .debug_info » (thông tin gỡ lỗi):\n"
+"\n"
+
+#: readelf.c:9465
+#, c-format
+msgid " Offset Begin End Expression\n"
+msgstr " HIệu Äầu Cuối Biểu thức\n"
+
+#: readelf.c:9495
+#, c-format
+msgid "There is a hole [0x%lx - 0x%lx] in .debug_loc section.\n"
+msgstr "Có một lỗ [0x%lx - 0x%lx] trong phần « .debug_info » (thông tin gỡ lỗi).\n"
+
+#: readelf.c:9498
+#, c-format
+msgid "There is an overlap [0x%lx - 0x%lx] in .debug_loc section.\n"
+msgstr "Có một nơi chồng lấp [0x%lx - 0x%lx] trong phần « .debug_info » (thông tin gỡ lỗi).\n"
+
+#: readelf.c:9512 readelf.c:9837
+#, c-format
+msgid " %8.8lx <End of list>\n"
+msgstr " %8.8lx <Kết thúc danh sách>\n"
+
+#: readelf.c:9540 readelf.c:9854
+msgid " (start == end)"
+msgstr " (start == end)"
+
+#: readelf.c:9542 readelf.c:9856
+msgid " (start > end)"
+msgstr " (start > end)"
+
+#: readelf.c:9566
+#, c-format
+msgid ""
+"\n"
+"The .debug_str section is empty.\n"
+msgstr ""
+"\n"
+"Phần « .debug_str » (chuỗi gỡ lỗi) rỗng.\n"
+
+#: readelf.c:9570
+#, c-format
+msgid ""
+"Contents of the .debug_str section:\n"
+"\n"
+msgstr ""
+"Nội dung của phần « .debug_str » (chuỗi gỡ lỗi):\n"
+"\n"
+
+#: readelf.c:9675
+msgid "Only DWARF 2 and 3 aranges are currently supported.\n"
+msgstr "Há»— trợ hiện thá»i chỉ arange (phạm vị a) DWARF phiên bản 2 và 3 thôi.\n"
+
+#: readelf.c:9679
+#, c-format
+msgid " Length: %ld\n"
+msgstr " DÃ i: %ld\n"
+
+#: readelf.c:9680
+#, c-format
+msgid " Version: %d\n"
+msgstr " Phiên bản: %d\n"
+
+#: readelf.c:9681
+#, c-format
+msgid " Offset into .debug_info: %lx\n"
+msgstr " Hiệu số và o « .debug_info » (thông tin gỡ lỗi): %lx\n"
+
+#: readelf.c:9682
+#, c-format
+msgid " Pointer Size: %d\n"
+msgstr " KÃch cỡ con trá» : %d\n"
+
+#: readelf.c:9683
+#, c-format
+msgid " Segment Size: %d\n"
+msgstr " KÃch cỡ phân Ä‘oạn: %d\n"
+
+#: readelf.c:9685
+#, c-format
+msgid ""
+"\n"
+" Address Length\n"
+msgstr ""
+"\n"
+" Äá»™ dà i địa chỉ\n"
+
+#: readelf.c:9741
+#, c-format
+msgid ""
+"\n"
+"The .debug_ranges section is empty.\n"
+msgstr ""
+"\n"
+"Phần « .debug_ranges » (các phạm vị gỡ lỗi) rỗng.\n"
+
+#. FIXME: Should we handle this case?
+#: readelf.c:9786
+msgid "Range lists in .debug_info section aren't in ascending order!\n"
+msgstr "• Các danh sách phạm vị trong phần « .debug_info » (thông tin gỡ lỗi) không phải theo thứ tự dần. •\n"
+
+#: readelf.c:9789
+msgid "No range lists in .debug_info section!\n"
+msgstr "• Không có danh sách phạm vị trong phần « .debug_info » (thông tin gỡ lỗi). •\n"
+
+#: readelf.c:9792
+#, c-format
+msgid "Range lists in .debug_ranges section start at 0x%lx\n"
+msgstr "Danh sách phạm vị trong phần « .debug_ranges » (các phạm vị gỡ lỗi) bắt đầu tại 0x%lx\n"
+
+#: readelf.c:9795
+#, c-format
+msgid ""
+"Contents of the .debug_ranges section:\n"
+"\n"
+msgstr ""
+"Nội dung của phần « .debug_ranges » (các phạm vị gỡ lỗi):\n"
+"\n"
+
+#: readelf.c:9796
+#, c-format
+msgid " Offset Begin End\n"
+msgstr " HIệu Äầu Cuối\n"
+
+#: readelf.c:9820
+#, c-format
+msgid "There is a hole [0x%lx - 0x%lx] in .debug_ranges section.\n"
+msgstr "Có một lỗ [0x%lx - 0x%lx] trong phần « .debug_ranges » (các phạm vị gỡ lỗi).\n"
+
+#: readelf.c:9823
+#, c-format
+msgid "There is an overlap [0x%lx - 0x%lx] in .debug_ranges section.\n"
+msgstr "Có một chồng lấp [0x%lx - 0x%lx] trong phần « .debug_ranges » (các phạm vị gỡ lỗi).\n"
+
+#: readelf.c:10017
+#, c-format
+msgid "The section %s contains:\n"
+msgstr "Phần %s chứa:\n"
+
+#: readelf.c:10663
+#, c-format
+msgid "unsupported or unknown DW_CFA_%d\n"
+msgstr "« DW_CFA_%d » không được hỗ trợ, hay không rõ\n"
+
+#: readelf.c:10688
+#, c-format
+msgid "Displaying the debug contents of section %s is not yet supported.\n"
+msgstr "Chưa hỗ trợ khả năng hiển thị nội dung phần %s.\n"
+
+#: readelf.c:10732
+#, c-format
+msgid ""
+"\n"
+"Section '%s' has no debugging data.\n"
+msgstr ""
+"\n"
+"Phần « %s » không có dữ liệu gỡ lỗi nà o.\n"
+
+#: readelf.c:10746
+msgid "debug section data"
+msgstr "dữ liệu phần gỡ lỗi"
+
+#: readelf.c:10765
+#, c-format
+msgid "Unrecognized debug section: %s\n"
+msgstr "Không nháºn diện phần gỡ lá»—i: %s\n"
+
+#: readelf.c:10800
+#, c-format
+msgid "Section %d was not dumped because it does not exist!\n"
+msgstr "• Phần %d không được đổ vì nó không tồn tại. •\n"
+
+#: readelf.c:10872 readelf.c:11236
+msgid "liblist"
+msgstr "danh sách thư viên"
+
+#: readelf.c:10961
+msgid "options"
+msgstr "tùy chá»n"
+
+#: readelf.c:10991
+#, c-format
+msgid ""
+"\n"
+"Section '%s' contains %d entries:\n"
+msgstr ""
+"\n"
+"Phần « %s » chứa %d mục nháºp:\n"
+
+#: readelf.c:11152
+msgid "conflict list found without a dynamic symbol table"
+msgstr "tìm danh sách xung đột không có bảng ký hiệu động"
+
+#: readelf.c:11168 readelf.c:11182
+msgid "conflict"
+msgstr "xung Ä‘á»™t"
+
+#: readelf.c:11192
+#, c-format
+msgid ""
+"\n"
+"Section '.conflict' contains %lu entries:\n"
+msgstr ""
+"\n"
+"Phần « .conflict » (xung Ä‘á»™t) chứa %lu mục nháºp:\n"
+
+#: readelf.c:11194
+msgid " Num: Index Value Name"
+msgstr " Số : CMục Giá trị Tên"
+
+#: readelf.c:11243
+msgid "liblist string table"
+msgstr "bảng chuỗi danh sách thư viên"
+
+#: readelf.c:11252
+#, c-format
+msgid ""
+"\n"
+"Library list section '%s' contains %lu entries:\n"
+msgstr ""
+"\n"
+"Phần danh sách thÆ° viên « %s » chứa %lu mục nháºp:\n"
+
+#: readelf.c:11303
+msgid "NT_AUXV (auxiliary vector)"
+msgstr "NT_AUXV (véc-tơ phụ)"
+
+#: readelf.c:11305
+msgid "NT_PRSTATUS (prstatus structure)"
+msgstr "NT_PRSTATUS (cấu trúc trạng thái prstatus)"
+
+#: readelf.c:11307
+msgid "NT_FPREGSET (floating point registers)"
+msgstr "NT_FPREGSET (thanh ghi điểm phù động)"
+
+#: readelf.c:11309
+msgid "NT_PRPSINFO (prpsinfo structure)"
+msgstr "NT_PRPSINFO (cấu trúc thông tin prpsinfo)"
+
+#: readelf.c:11311
+msgid "NT_TASKSTRUCT (task structure)"
+msgstr "NT_TASKSTRUCT (cấu trúc tác vụ)"
+
+#: readelf.c:11313
+msgid "NT_PRXFPREG (user_xfpregs structure)"
+msgstr "NT_PRXFPREG (cấu trúc « user_xfpregs »)"
+
+#: readelf.c:11315
+msgid "NT_PSTATUS (pstatus structure)"
+msgstr "NT_PSTATUS (cấu trúc trạng thái pstatus)"
+
+#: readelf.c:11317
+msgid "NT_FPREGS (floating point registers)"
+msgstr "NT_FPREGS (thanh ghi điểm phù động)"
+
+#: readelf.c:11319
+msgid "NT_PSINFO (psinfo structure)"
+msgstr "NT_PSINFO (cấu trúc thông tin psinfo)"
+
+#: readelf.c:11321
+msgid "NT_LWPSTATUS (lwpstatus_t structure)"
+msgstr "NT_LWPSTATUS (cấu trúc trạng thái « lwpstatus_t »)"
+
+#: readelf.c:11323
+msgid "NT_LWPSINFO (lwpsinfo_t structure)"
+msgstr "NT_LWPSINFO (cấu trúc thông tin « lwpsinfo_t »)"
+
+#: readelf.c:11325
+msgid "NT_WIN32PSTATUS (win32_pstatus structure)"
+msgstr "NT_WIN32PSTATUS (cấu trúc trạng thái « win32_pstatus »)"
+
+#: readelf.c:11333
+msgid "NT_VERSION (version)"
+msgstr "NT_VERSION (phiên bản)"
+
+#: readelf.c:11335
+msgid "NT_ARCH (architecture)"
+msgstr "NT_ARCH (architecture)"
+
+#: readelf.c:11340 readelf.c:11362
+#, c-format
+msgid "Unknown note type: (0x%08x)"
+msgstr "Không biết kiểu ghi chú : (0x%08x)"
+
+#. NetBSD core "procinfo" structure.
+#: readelf.c:11352
+msgid "NetBSD procinfo structure"
+msgstr "Cấu trúc thông tin tiến trình procinfo NetBSD"
+
+#: readelf.c:11379 readelf.c:11393
+msgid "PT_GETREGS (reg structure)"
+msgstr "PT_GETREGS (cấu trúc thanh ghi)"
+
+#: readelf.c:11381 readelf.c:11395
+msgid "PT_GETFPREGS (fpreg structure)"
+msgstr "PT_GETFPREGS (cấu trúc thanh ghi « fpreg »)"
+
+# Name: don't translate / Tên: đừng dịch
+#: readelf.c:11401
+#, c-format
+msgid "PT_FIRSTMACH+%d"
+msgstr "PT_FIRSTMACH+%d"
+
+#: readelf.c:11447
+msgid "notes"
+msgstr "ghi chú"
+
+#: readelf.c:11453
+#, c-format
+msgid ""
+"\n"
+"Notes at offset 0x%08lx with length 0x%08lx:\n"
+msgstr ""
+"\n"
+"Gặp ghi chú tại hiệu số 0x%08lx có độ dà i 0x%08lx:\n"
+
+#: readelf.c:11455
+#, c-format
+msgid " Owner\t\tData size\tDescription\n"
+msgstr " Chủ\t\tCỡ dữ liệu\tMô tả\n"
+
+#: readelf.c:11474
+#, c-format
+msgid "corrupt note found at offset %x into core notes\n"
+msgstr "tìm ghi chú bị há»ng tại hiệu số %x và o ghi chú lõi\n"
+
+#: readelf.c:11476
+#, c-format
+msgid " type: %x, namesize: %08lx, descsize: %08lx\n"
+msgstr " kiểu: %x, cỡ_tên: %08lx, cỡ_mô_tả: %08lx\n"
+
+#: readelf.c:11574
+#, c-format
+msgid "No note segments present in the core file.\n"
+msgstr "Không có phân Ä‘oạn ghi chú trong táºp tin lõi.\n"
+
+#: readelf.c:11653
+msgid ""
+"This instance of readelf has been built without support for a\n"
+"64 bit data type and so it cannot read 64 bit ELF files.\n"
+msgstr ""
+"Tức thá»i readelf nà y đã được xây dụng\n"
+"không có hỗ trợ kiểu dữ liệu 64-bit\n"
+"nên không thể Ä‘á»c táºp tin ELF kiểu 64-bit.\n"
+
+#: readelf.c:11700 readelf.c:12059
+#, c-format
+msgid "%s: Failed to read file header\n"
+msgstr "%s: việc Ä‘á»c dòng đầu táºp tin bị lá»—i\n"
+
+#: readelf.c:11713
+#, c-format
+msgid ""
+"\n"
+"File: %s\n"
+msgstr ""
+"\n"
+"Táºp tin: %s\n"
+
+#: readelf.c:11876 readelf.c:11897 readelf.c:11934 readelf.c:12014
+#, c-format
+msgid "%s: failed to read archive header\n"
+msgstr "%s: việc Ä‘á»c dòng đầu kho bị lá»—i\n"
+
+# Type: error
+# Description
+#: readelf.c:11887
+#, c-format
+msgid "%s: failed to skip archive symbol table\n"
+msgstr "%s: việc nhảy qua bảng ký hiệu kho bị lỗi\n"
+
+# Type: error
+# Description
+#: readelf.c:11919
+#, c-format
+msgid "%s: failed to read string table\n"
+msgstr "%s: việc Ä‘á»c bảng chuá»—i bị lá»—i\n"
+
+#: readelf.c:11955
+#, c-format
+msgid "%s: invalid archive string table offset %lu\n"
+msgstr "%s: hiệu số bảng chuỗi kho không hợp lệ %lu\n"
+
+#: readelf.c:11971
+#, c-format
+msgid "%s: bad archive file name\n"
+msgstr "%s: tên táºp tin kho sai\n"
+
+#: readelf.c:12003
+#, c-format
+msgid "%s: failed to seek to next archive header\n"
+msgstr "%s: việc tìm tới dòng đầu kho kế tiếp bị lỗi\n"
+
+#: readelf.c:12037
+#, c-format
+msgid "'%s': No such file\n"
+msgstr "« %s »: không có táºp tin nhÆ° váºy\n"
+
+#: readelf.c:12039
+#, c-format
+msgid "Could not locate '%s'. System error message: %s\n"
+msgstr "Không thể định vị « %s ». Thông điệp lỗi hệ thống: %s\n"
+
+#: readelf.c:12046
+#, c-format
+msgid "'%s' is not an ordinary file\n"
+msgstr "« %s » không phải là táºp tin chuẩn\n"
+
+#: readelf.c:12053
+#, c-format
+msgid "Input file '%s' is not readable.\n"
+msgstr "Táºp tin nháºp « %s » không có khả năng Ä‘á»c.\n"
+
+#: rename.c:127
+#, c-format
+msgid "%s: cannot set time: %s"
+msgstr "%s: không thể láºp thá»i gian: %s"
+
+#. We have to clean up here.
+#: rename.c:162 rename.c:200
+#, c-format
+msgid "unable to rename '%s' reason: %s"
+msgstr "không thể đổi tên %s vì lý do : %s"
+
+#: rename.c:208
+#, c-format
+msgid "unable to copy file '%s' reason: %s"
+msgstr "không thể sao chép táºp tin « %s » vì lý do : %s"
+
+#: resbin.c:132
+#, c-format
+msgid "%s: not enough binary data"
+msgstr "%s: không đủ dữ liệu nhị phân"
+
+#: resbin.c:148
+msgid "null terminated unicode string"
+msgstr "chuỗi Unicode không được chấm dứt rỗng"
+
+#: resbin.c:175 resbin.c:181
+msgid "resource ID"
+msgstr "ID tà i nguyên"
+
+#: resbin.c:221
+msgid "cursor"
+msgstr "con chạy"
+
+#: resbin.c:253 resbin.c:260
+msgid "menu header"
+msgstr "dòng đầu trình đơn"
+
+#: resbin.c:270
+msgid "menuex header"
+msgstr "dòng đầu trình đơn menuex"
+
+#: resbin.c:274
+msgid "menuex offset"
+msgstr "hiệu số trình đơn menuex"
+
+#: resbin.c:281
+#, c-format
+msgid "unsupported menu version %d"
+msgstr "phiên bản trình đơn không được hỗ trợ %d"
+
+#: resbin.c:306 resbin.c:321 resbin.c:384
+msgid "menuitem header"
+msgstr "dòng đầu mục trình đơn"
+
+#: resbin.c:414
+msgid "menuitem"
+msgstr "mục trình đơn"
+
+#: resbin.c:453 resbin.c:481
+msgid "dialog header"
+msgstr "dòng đầu đối thoại"
+
+#: resbin.c:471
+#, c-format
+msgid "unexpected DIALOGEX version %d"
+msgstr "ngỠđối thoại DIALOGEX phiên bản %d"
+
+#: resbin.c:516
+msgid "dialog font point size"
+msgstr "kÃch cỡ Ä‘iểm phông chữ đối thoại"
+
+#: resbin.c:524
+msgid "dialogex font information"
+msgstr "thông tin phông chữ đối thoại dialogex"
+
+#: resbin.c:550 resbin.c:568
+msgid "dialog control"
+msgstr "Ä‘iá»u kiện đối thoại"
+
+#: resbin.c:560
+msgid "dialogex control"
+msgstr "Ä‘iá»u kiện đối thoại dialogex"
+
+#: resbin.c:589
+msgid "dialog control end"
+msgstr "kết thúc Ä‘iá»u khiển đối thoại"
+
+#: resbin.c:601
+msgid "dialog control data"
+msgstr "dữ liệu Ä‘iá»u khiển đối thoại"
+
+#: resbin.c:642
+msgid "stringtable string length"
+msgstr "độ dà i bảng chuỗi"
+
+#: resbin.c:652
+msgid "stringtable string"
+msgstr "chuỗi bảng chuỗi"
+
+#: resbin.c:683
+msgid "fontdir header"
+msgstr "dòng đầu thư mục phông chữ"
+
+#: resbin.c:696
+msgid "fontdir"
+msgstr "thư mục phông chữ"
+
+#: resbin.c:712
+msgid "fontdir device name"
+msgstr "tên thiết bị thư mục phông chữ"
+
+#: resbin.c:718
+msgid "fontdir face name"
+msgstr "tên mặt thư mục phông chữ"
+
+#: resbin.c:759
+msgid "accelerator"
+msgstr "phÃm tắt"
+
+#: resbin.c:819
+msgid "group cursor header"
+msgstr "dòng đầu con chạy nhóm"
+
+#: resbin.c:823
+#, c-format
+msgid "unexpected group cursor type %d"
+msgstr "kiểu con chạy nhóm bất ngỠ%d"
+
+#: resbin.c:838
+msgid "group cursor"
+msgstr "con chạy nhóm"
+
+#: resbin.c:875
+msgid "group icon header"
+msgstr "dòng đầu biểu tượng nhóm"
+
+#: resbin.c:879
+#, c-format
+msgid "unexpected group icon type %d"
+msgstr "kiểu biểu tượng nhóm bất ngỠ%d"
+
+#: resbin.c:894
+msgid "group icon"
+msgstr "biểu tượng nhóm"
+
+#: resbin.c:957 resbin.c:1174
+msgid "unexpected version string"
+msgstr "chuá»—i phiên bản bất ngá»"
+
+#: resbin.c:989
+#, c-format
+msgid "version length %d does not match resource length %lu"
+msgstr "độ dà i phiên bản %d không khớp độ dà i tà i nguyên %lu."
+
+#: resbin.c:993
+#, c-format
+msgid "unexpected version type %d"
+msgstr "kiểu phiên bản bất ngỠ%d"
+
+#: resbin.c:1005
+#, c-format
+msgid "unexpected fixed version information length %d"
+msgstr "độ dà i thông tin phiên bản cố định bất ngỠ%d"
+
+#: resbin.c:1008
+msgid "fixed version info"
+msgstr "thông tin phiên bản cố định"
+
+#: resbin.c:1012
+#, c-format
+msgid "unexpected fixed version signature %lu"
+msgstr "chữ ký phiên bản cố định bất ngỠ%lu"
+
+#: resbin.c:1016
+#, c-format
+msgid "unexpected fixed version info version %lu"
+msgstr "phiên bản thông tin phiên bản cố định %lu"
+
+#: resbin.c:1045
+msgid "version var info"
+msgstr "hông tin tạm phiên bản"
+
+#: resbin.c:1062
+#, c-format
+msgid "unexpected stringfileinfo value length %d"
+msgstr "Ä‘á»™ dà i giá trị thông tin táºp tin chuá»—i bất ngá» %d"
+
+#: resbin.c:1072
+#, c-format
+msgid "unexpected version stringtable value length %d"
+msgstr "độ dà i giá trị bảng chuỗi phiên bản bất ngỠ%d"
+
+#: resbin.c:1106
+#, c-format
+msgid "unexpected version string length %d != %d + %d"
+msgstr "độ dà i chuỗi phiên bản bất ngỠ%d != %d + %d"
+
+#: resbin.c:1117
+#, c-format
+msgid "unexpected version string length %d < %d"
+msgstr "độ dà i chuỗi phiên bản bất ngỠ%d < %d"
+
+#: resbin.c:1134
+#, c-format
+msgid "unexpected varfileinfo value length %d"
+msgstr "Ä‘á»™ dà i giá trị thông tin táºp tin tạm bất ngá» %d"
+
+#: resbin.c:1153
+msgid "version varfileinfo"
+msgstr "thông tin táºp tin tạm phiên bản"
+
+#: resbin.c:1168
+#, c-format
+msgid "unexpected version value length %d"
+msgstr "nđộ dà i giá trị phiên bản bất ngỠ%d"
+
+#: rescoff.c:126
+msgid "filename required for COFF input"
+msgstr "tên táºp tin cần thiết cho dữ liệu nháºp COFF"
+
+#: rescoff.c:143
+#, c-format
+msgid "%s: no resource section"
+msgstr "%s: không có phần tà i nguyên"
+
+#: rescoff.c:150
+msgid "can't read resource section"
+msgstr "không thể Ä‘á»c phần tà i nguyên"
+
+#: rescoff.c:174
+#, c-format
+msgid "%s: %s: address out of bounds"
+msgstr "%s: %s: địa chỉ ở ngoại phạm vị"
+
+#: rescoff.c:190
+msgid "directory"
+msgstr "thư mục"
+
+#: rescoff.c:218
+msgid "named directory entry"
+msgstr "mục nháºp thÆ° mục có tên"
+
+#: rescoff.c:227
+msgid "directory entry name"
+msgstr "tên mục nháºp thÆ° mục "
+
+#: rescoff.c:247
+msgid "named subdirectory"
+msgstr "thư mục con có tên"
+
+#: rescoff.c:255
+msgid "named resource"
+msgstr "tà i nguyên có tên"
+
+#: rescoff.c:270
+msgid "ID directory entry"
+msgstr "mục nháºp thÆ° mục ID"
+
+#: rescoff.c:287
+msgid "ID subdirectory"
+msgstr "thư mục con ID"
+
+#: rescoff.c:295
+msgid "ID resource"
+msgstr "tà i nguyên ID"
+
+#: rescoff.c:318
+msgid "resource type unknown"
+msgstr "không biết kiểu tà i nguyên"
+
+#: rescoff.c:321
+msgid "data entry"
+msgstr "mục nháºp dữ liệu"
+
+#: rescoff.c:329
+msgid "resource data"
+msgstr "dữ liệu tà i nguyên"
+
+#: rescoff.c:334
+msgid "resource data size"
+msgstr "kÃch cỡ dữ liệu tà i nguyên"
+
+#: rescoff.c:427
+msgid "filename required for COFF output"
+msgstr "tên táºp tin cần thiết cho kết xuất COFF"
+
+#: rescoff.c:719
+msgid "can't get BFD_RELOC_RVA relocation type"
+msgstr "không thể lấy kiểu việc định vị lại « BFD_RELOC_RVA »"
+
+#: resrc.c:238 resrc.c:309
+#, c-format
+msgid "can't open temporary file `%s': %s"
+msgstr "không thể mở táºp tin tạm thá»i « %s »: %s"
+
+#: resrc.c:244
+#, c-format
+msgid "can't redirect stdout: `%s': %s"
+msgstr "không thể chuyển hướng thiết bị xuất chuẩn « %s »: %s"
+
+# Variable: don't translate / Biến: đừng dịch
+#: resrc.c:260
+#, c-format
+msgid "%s %s: %s"
+msgstr "%s %s: %s"
+
+#: resrc.c:305
+#, c-format
+msgid "can't execute `%s': %s"
+msgstr "không thể thực hiện « %s »: %s"
+
+#: resrc.c:314
+#, c-format
+msgid "Using temporary file `%s' to read preprocessor output\n"
+msgstr "Äang dùng táºp tin tạm thá»i « %s » để Ä‘á»c dữ liệu xuất bá»™ tiá»n xá» lý\n"
+
+#: resrc.c:321
+#, c-format
+msgid "can't popen `%s': %s"
+msgstr "Không thể popen (mở p) « %s »: %s"
+
+#: resrc.c:323
+#, c-format
+msgid "Using popen to read preprocessor output\n"
+msgstr "Äang dùng popen để Ä‘á»c dữ liệu xuất bá»™ tiá»n xá» lý\n"
+
+#: resrc.c:362
+#, c-format
+msgid "Tried `%s'\n"
+msgstr "Äã thỠ« %s »\n"
+
+#: resrc.c:373
+#, c-format
+msgid "Using `%s'\n"
+msgstr "Äang dùng « %s »\n"
+
+# Variable: don't translate / Biến: đừng dịch
+#: resrc.c:529
+#, c-format
+msgid "%s:%d: %s\n"
+msgstr "%s:%d: %s\n"
+
+#: resrc.c:537
+#, c-format
+msgid "%s: unexpected EOF"
+msgstr "%s: gặp kết thúc táºp tin bất ngá»"
+
+#: resrc.c:586
+#, c-format
+msgid "%s: read of %lu returned %lu"
+msgstr "%s: việc Ä‘á»c %lu đã trả gởi %lu"
+
+#: resrc.c:624 resrc.c:1134
+#, c-format
+msgid "stat failed on bitmap file `%s': %s"
+msgstr "việc lấy các thông tin bị lá»—i trên táºp tin bitmap « %s »: %s"
+
+#: resrc.c:675
+#, c-format
+msgid "cursor file `%s' does not contain cursor data"
+msgstr "táºp tin con chạy « %s » không chứa dữ liệu con chạy"
+
+#: resrc.c:707 resrc.c:1003
+#, c-format
+msgid "%s: fseek to %lu failed: %s"
+msgstr "%s: việc fseek (tìm f) tới %lu bị lỗi: %s"
+
+#: resrc.c:831
+msgid "help ID requires DIALOGEX"
+msgstr "ID trợ giúp cần thiết DIALOGEX (đối thoại)"
+
+#: resrc.c:833
+msgid "control data requires DIALOGEX"
+msgstr "dữ liệu Ä‘iá»u khiển cần thiết DIALOGEX (đối thoại)"
+
+#: resrc.c:861
+#, c-format
+msgid "stat failed on font file `%s': %s"
+msgstr "việc lấy các thông tin bị lá»—i trên táºp tin phông chữ « %s »: %s"
+
+#: resrc.c:972
+#, c-format
+msgid "icon file `%s' does not contain icon data"
+msgstr "táºp tin biểu tượng « %s » không chứa dữ liệu biểu tượng"
+
+#: resrc.c:1273 resrc.c:1308
+#, c-format
+msgid "stat failed on file `%s': %s"
+msgstr "việc lấy các thông tin bị lá»—i trên táºp tin « %s »: %s"
+
+#: resrc.c:1494
+#, c-format
+msgid "can't open `%s' for output: %s"
+msgstr "không thể mở « %s » để xuất: %s"
+
+#: size.c:81
+#, c-format
+msgid " Displays the sizes of sections inside binary files\n"
+msgstr " Hiển thị kÃch cỡ của các phần ở trong táºp tin nhị phân\n"
+
+#: size.c:82
+#, c-format
+msgid " If no input file(s) are specified, a.out is assumed\n"
+msgstr "Nếu chÆ°a ghi rõ táºp tin nháºp, giả sá» <a.out>\n"
+
+#: size.c:83
+#, c-format
+msgid ""
+" The options are:\n"
+" -A|-B --format={sysv|berkeley} Select output style (default is %s)\n"
+" -o|-d|-x --radix={8|10|16} Display numbers in octal, decimal or hex\n"
+" -t --totals Display the total sizes (Berkeley only)\n"
+" --target=<bfdname> Set the binary file format\n"
+" -h --help Display this information\n"
+" -v --version Display the program's version\n"
+"\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -A|-B --format={sysv|berkeley}\n"
+"\t\t\tChá»n kiểu dáng xuất (mặc định là %s)\n"
+"\t\t\t(dạng thức)\n"
+" -o|-d|-x --radix={8|10|16}\n"
+"\t\t\tHiển thị số dạng bát phân, tháºp phân hay tháºp lục\n"
+"\t\t\t(cơ sở)\n"
+" -t --totals Hiển thị các kÃch cỡ _tổng cổng_ (chỉ Berkeley)\n"
+" --target=<tên_bfd> \tLáºp dạng thức táºp tin nhị phân\n"
+"\t\t\t(Ä‘Ãch)\n"
+" -h --help Hiển thị _trợ giúp_ nà y\n"
+" -v --version Hiển thị _phiên bản_ của chương trình nà y\n"
+"\n"
+
+#: size.c:153
+#, c-format
+msgid "invalid argument to --format: %s"
+msgstr "đối sô không hợp lệ tới « --format » (dạng thức): %s"
+
+#: size.c:180
+#, c-format
+msgid "Invalid radix: %s\n"
+msgstr "Cơ sở không hợp lệ: %s\n"
+
+#: srconv.c:1722
+#, c-format
+msgid "Convert a COFF object file into a SYSROFF object file\n"
+msgstr "Chuyển đổi má»™t táºp tin đối tượng COFF thà nh má»™t táºp tin đối tượng SYSROFF\n"
+
+#: srconv.c:1723
+#, c-format
+msgid ""
+" The options are:\n"
+" -q --quick (Obsolete - ignored)\n"
+" -n --noprescan Do not perform a scan to convert commons into defs\n"
+" -d --debug Display information about what is being done\n"
+" -h --help Display this information\n"
+" -v --version Print the program's version number\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -q --quick \t(Cũ nên bị bỠqua)\n"
+" -n --noprescan\n"
+"\t\tÄừng quét để chuyển đổi các Ä‘iá»u dùng chung (common)\n"
+"\t\tthà nh lá»i định nghÄ©a (def)\n"
+"\t\t(không quét trước)\n"
+" -d --debug \t\t\tHiển thị thông tin vá» hà nh Ä‘á»™ng hiện thá»i\n"
+"\t\t(gỡ lỗi)\n"
+" -h --help \t\t\tHiển thị _trợ giúp_ nà y\n"
+" -v --version \t\tIn ra số thứ tự _phiên bản_ của chương trình\n"
+
+#: srconv.c:1866
+#, c-format
+msgid "unable to open output file %s"
+msgstr "không thể mở táºp tin kết xuất %s"
+
+#: stabs.c:330 stabs.c:1708
+msgid "numeric overflow"
+msgstr "trà n thuộc số"
+
+#: stabs.c:340
+#, c-format
+msgid "Bad stab: %s\n"
+msgstr "stab sai: %s\n"
+
+#: stabs.c:348
+#, c-format
+msgid "Warning: %s: %s\n"
+msgstr "Cảnh báo : %s: %s\n"
+
+#: stabs.c:458
+#, c-format
+msgid "N_LBRAC not within function\n"
+msgstr "« N_LBRAC » không phải ở trong hà m\n"
+
+#: stabs.c:497
+#, c-format
+msgid "Too many N_RBRACs\n"
+msgstr "Quá nhiá»u « N_RBRAC »\n"
+
+#: stabs.c:738
+msgid "unknown C++ encoded name"
+msgstr "không biết tên mã C++"
+
+#. Complain and keep going, so compilers can invent new
+#. cross-reference types.
+#: stabs.c:1253
+msgid "unrecognized cross reference type"
+msgstr "không nháºn diện kiểu tham chiếu chéo"
+
+#. Does this actually ever happen? Is that why we are worrying
+#. about dealing with it rather than just calling error_type?
+#: stabs.c:1800
+msgid "missing index type"
+msgstr "thiếu kiểu chỉ mục"
+
+#: stabs.c:2114
+msgid "unknown virtual character for baseclass"
+msgstr "không biết ký tự ảo cho hạng cơ bản"
+
+#: stabs.c:2132
+msgid "unknown visibility character for baseclass"
+msgstr "không biết ký tá»± tÃnh trạng hiển thị cho hạng cÆ¡ bản"
+
+#: stabs.c:2318
+msgid "unnamed $vb type"
+msgstr "kiểu $vb chưa có tên"
+
+#: stabs.c:2324
+msgid "unrecognized C++ abbreviation"
+msgstr "không nháºn biết viết tắt C++"
+
+#: stabs.c:2400
+msgid "unknown visibility character for field"
+msgstr "không biết ký tá»± tÃnh trạng hiển thị cho trÆ°á»ng"
+
+#: stabs.c:2652
+msgid "const/volatile indicator missing"
+msgstr "thiếu chỉ thị bất biến/hay thay đổi"
+
+#: stabs.c:2888
+#, c-format
+msgid "No mangling for \"%s\"\n"
+msgstr "Không có việc tháo gỡ cho « %s »\n"
+
+#: stabs.c:3188
+msgid "Undefined N_EXCL"
+msgstr "Chưa định nghĩa « N_EXCL »"
+
+#: stabs.c:3268
+#, c-format
+msgid "Type file number %d out of range\n"
+msgstr "Số kiểu táºp tin %d ở ngoà i phạm vi\n"
+
+#: stabs.c:3273
+#, c-format
+msgid "Type index number %d out of range\n"
+msgstr "Số kiểu chỉ mục %d ở ngoà i phạm vi\n"
+
+#: stabs.c:3352
+#, c-format
+msgid "Unrecognized XCOFF type %d\n"
+msgstr "Không nháºn diện kiểu XCOFF %d\n"
+
+#: stabs.c:3644
+#, c-format
+msgid "bad mangled name `%s'\n"
+msgstr "tên đã rối sai « %s »\n"
+
+#: stabs.c:3739
+#, c-format
+msgid "no argument types in mangled string\n"
+msgstr "không có kiểu đối số nà o trong chuỗi đã rối\n"
+
+#: stabs.c:5093
+#, c-format
+msgid "Demangled name is not a function\n"
+msgstr "Tên đã tháo gỡ không phải là hà m\n"
+
+#: stabs.c:5135
+#, c-format
+msgid "Unexpected type in v3 arglist demangling\n"
+msgstr "Gặp kiểu bất ngỠtrong việc tháo gỡ danh sách đối số v3\n"
+
+#: stabs.c:5202
+#, c-format
+msgid "Unrecognized demangle component %d\n"
+msgstr "Không nháºn diện thà nh phần tháo gỡ %d\n"
+
+#: stabs.c:5254
+#, c-format
+msgid "Failed to print demangled template\n"
+msgstr "Việc in ra biểu mẫu đã tháo gỡ bị lỗi\n"
+
+#: stabs.c:5334
+#, c-format
+msgid "Couldn't get demangled builtin type\n"
+msgstr "Không thể lấy kiểu builtin (Ä‘iá»u có sẵn) đã tháo gỡ\n"
+
+#: stabs.c:5383
+#, c-format
+msgid "Unexpected demangled varargs\n"
+msgstr "Gặp má»™t số varargs (đối số biến) đã tháo gỡ bất ngá»\n"
+
+#: stabs.c:5390
+#, c-format
+msgid "Unrecognized demangled builtin type\n"
+msgstr "Không nháºn diện kiểu builtin (Ä‘iá»u có sẵn) đã tháo gỡ\n"
+
+#: strings.c:206
+#, c-format
+msgid "invalid number %s"
+msgstr "số không hợp lệ %s"
+
+#: strings.c:643
+#, c-format
+msgid "invalid integer argument %s"
+msgstr "đối số số nguyên không hợp lệ %s"
+
+#: strings.c:652
+#, c-format
+msgid " Display printable strings in [file(s)] (stdin by default)\n"
+msgstr " Hiển thị các chuá»—i có khả năng in trong [táºp tin...] (mặc định là thiết bị nháºp chuẩn)\n"
+
+#: strings.c:653
+#, c-format
+msgid ""
+" The options are:\n"
+" -a - --all Scan the entire file, not just the data section\n"
+" -f --print-file-name Print the name of the file before each string\n"
+" -n --bytes=[number] Locate & print any NUL-terminated sequence of at\n"
+" -<number> least [number] characters (default 4).\n"
+" -t --radix={o,d,x} Print the location of the string in base 8, 10 or 16\n"
+" -o An alias for --radix=o\n"
+" -T --target=<BFDNAME> Specify the binary file format\n"
+" -e --encoding={s,S,b,l,B,L} Select character size and endianness:\n"
+" s = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n"
+" -h --help Display this information\n"
+" -v --version Print the program's version number\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -a - --all \t\tQuét toà n bá»™ táºp tin, không chỉ phần dữ liệu\n"
+"\t\t(hết)\n"
+" -f --print-file-name \t\t\t _In ra tên táºp tin_ trÆ°á»›c má»—i chuá»—i\n"
+" -n --bytes=[số]\n"
+"\t\tÄịnh vị và in ra dãy đã chấm dứt Rá»–NG nà o tại số byte nà y\n"
+" -<số> số ký tự tối thiểu (mặc định là 4).\n"
+" -t --radix={o,d,x}\n"
+"\t\tIn ra địa Ä‘iểm của chuá»—i dạng bát phân, tháºp phân hay tháºp lục\n"
+"\t\t(cơ sở)\n"
+" -o \t\tBiệt hiệu cho « --radix=o » \n"
+" -T --target=<TÊN_BFD> \t\tGhi rõ dạng thức táºp tin nhị phân\n"
+"\t\t(Ä‘Ãch)\n"
+" -e --encoding={s,S,b,l,B,L}\n"
+"\t\tChá»n kÃch cỡ ký tá»± và tÃnh trạng cuối (endian):\n"
+" \ts = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n"
+" -h --help \t\tHiển thị _trợ giúp_ nà y\n"
+" -v --version \t\tIn ra số thứ tự _phiên bản_ của chương trình\n"
+
+#: sysdump.c:649
+#, c-format
+msgid "Print a human readable interpretation of a SYSROFF object file\n"
+msgstr "In ra lá»i giải dịch táºp tin đối tượng SYSROFF cho ngÆ°á»i Ä‘á»c\n"
+
+#: sysdump.c:650
+#, c-format
+msgid ""
+" The options are:\n"
+" -h --help Display this information\n"
+" -v --version Print the program's version number\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -h --help \t\tHiển thị _trợ giúp_ nà y\n"
+" -v --version \t\tIn ra số thứ tự _phiên bản_ của chương trình\n"
+
+#: sysdump.c:715
+#, c-format
+msgid "cannot open input file %s"
+msgstr "không thể mở táºp tin nháºp %s"
+
+#: version.c:35
+#, c-format
+msgid "Copyright 2005 Free Software Foundation, Inc.\n"
+msgstr "Bản quyá»n © năm 2005 Tổ chức Phần má»m Tá»± do.\n"
+
+#: version.c:36
+#, c-format
+msgid ""
+"This program is free software; you may redistribute it under the terms of\n"
+"the GNU General Public License. This program has absolutely no warranty.\n"
+msgstr ""
+"ChÆ°Æ¡ng trình nà y là phần má»m tá»± do; bạn có thể phát hà nh lại\n"
+"nó vá»›i Ä‘iá»u kiện của Quyá»n Công Chung GNU (GPL).\n"
+"Chương trình nà y không bảo đảm gì cả.\n"
+
+#: windres.c:204
+#, c-format
+msgid "can't open %s `%s': %s"
+msgstr "Không thể mở %s « %s »: %s"
+
+#: windres.c:370
+#, c-format
+msgid ": expected to be a directory\n"
+msgstr ": ngỠlà thư mục\n"
+
+#: windres.c:382
+#, c-format
+msgid ": expected to be a leaf\n"
+msgstr ": ngỠlà lá\n"
+
+#: windres.c:391
+#, c-format
+msgid "%s: warning: "
+msgstr "%s: cảnh báo : "
+
+#: windres.c:393
+#, c-format
+msgid ": duplicate value\n"
+msgstr ": giá trị trùng\n"
+
+#: windres.c:543
+#, c-format
+msgid "unknown format type `%s'"
+msgstr "không biết kiểu dạng thức « %s »"
+
+#: windres.c:544
+#, c-format
+msgid "%s: supported formats:"
+msgstr "%s: dạng thức hỗ trợ :"
+
+#. Otherwise, we give up.
+#: windres.c:627
+#, c-format
+msgid "can not determine type of file `%s'; use the -J option"
+msgstr "không thể quyết định kiểu táºp tin « %s »: hãy sá» dụng tùy chá»n « -J »"
+
+#: windres.c:639
+#, c-format
+msgid "Usage: %s [option(s)] [input-file] [output-file]\n"
+msgstr "Usage: %s [tùy_chá»n...] [táºp_tin_nháºp] [táºp_tin_xuất]\n"
+
+#: windres.c:641
+#, c-format
+msgid ""
+" The options are:\n"
+" -i --input=<file> Name input file\n"
+" -o --output=<file> Name output file\n"
+" -J --input-format=<format> Specify input format\n"
+" -O --output-format=<format> Specify output format\n"
+" -F --target=<target> Specify COFF target\n"
+" --preprocessor=<program> Program to use to preprocess rc file\n"
+" -I --include-dir=<dir> Include directory when preprocessing rc file\n"
+" -D --define <sym>[=<val>] Define SYM when preprocessing rc file\n"
+" -U --undefine <sym> Undefine SYM when preprocessing rc file\n"
+" -v --verbose Verbose - tells you what it's doing\n"
+" -l --language=<val> Set language when reading rc file\n"
+" --use-temp-file Use a temporary file instead of popen to read\n"
+" the preprocessor output\n"
+" --no-use-temp-file Use popen (default)\n"
+msgstr ""
+" Tùy chá»n:\n"
+" -i --input=<táºp_tin> \t\t Láºp táºp tin _nháºp_\n"
+" -o --output=<táºp_tin> \t\t Láºp táºp tin _xuất_\n"
+" -J --input-format=<dạng_thức> \t Ghi rõ _dạng thức nháºp_\n"
+" -O --output-format=<dạng_thức> \t Ghi rõ _dạng thức xuất_\n"
+" -F --target=<Ä‘Ãch> \t\t\t Ghi rõ _Ä‘Ãch_ COFF\n"
+" --preprocessor=<chương_trình>\n"
+"\t\tChÆ°Æ¡ng trình cần dùng để tiá»n xá» lý táºp tin rc (tà i nguyên)\n"
+"\t\t(bá»™ tiá»n xá» lý)\n"
+" -I --include-dir=<thư_mục>\n"
+"\t\t_Gồm thÆ° mục_ khi tiá»n xá» lý táºp tin rc (tà i nguyên)\n"
+" -D --define <ký_hiệu>[=<giá_trị>]\n"
+"\t\t_Äịnh nghÄ©a_ ký hiệu khi tiá»n xá» lý táºp tin rc (tà i nguyên)\n"
+" -U --undefine <ký_hiệu>\n"
+"\t\t_Hủy định nghÄ©a_ ký hiệu khi tiá»n xá» lý táºp tin rc (tà i nguyên)\n"
+" -v --verbose _Chi tiết_: xuất thông tin vá» hà nh Ä‘á»™ng hiện thá»i\n"
+" -l --language=<giá_trị> Láºp _ngôn ngữ_ để Ä‘á»c táºp tin rc (tà i nguyên)\n"
+" --use-temp-file\n"
+"\t\t_Dùng táºp tin tạm thá»i_ thay và o popen để Ä‘á»c kết xuất tiá»n xá» lý\n"
+" --no-use-temp-file \t\t\t Dùng popen (mặc định)\n"
+"\t\t(không dùng táºp tin tạm thá»i)\n"
+
+#: windres.c:657
+#, c-format
+msgid " --yydebug Turn on parser debugging\n"
+msgstr " --yydebug Báºt khả năng gỡ lá»—i kiểu bá»™ phân tách\n"
+
+#: windres.c:660
+#, c-format
+msgid ""
+" -r Ignored for compatibility with rc\n"
+" -h --help Print this help message\n"
+" -V --version Print version information\n"
+msgstr ""
+" -r\t\t\t\t\t \t \t\t Bị bá» qua để tÆ°Æ¡ng thÃch vá»›i rc (tà i nguyên)\n"
+" -h, --help \t\t\t\t rctrợ giúp_ nà y\n"
+" -V, --version \t\t\t\t In ra thông tin _phiên bản_\n"
+
+#: windres.c:664
+#, c-format
+msgid ""
+"FORMAT is one of rc, res, or coff, and is deduced from the file name\n"
+"extension if not specified. A single file name is an input file.\n"
+"No input-file is stdin, default rc. No output-file is stdout, default rc.\n"
+msgstr ""
+"DẠNG THỨC là một của rc, res hay coff, và được quyết định\n"
+"từ phần mở rá»™ng tên táºp tin nếu chÆ°a ghi rõ.\n"
+"Má»™t tên táºp tin Ä‘Æ¡n là táºp tin nháºp. Không có táºp tin nháºp thì\n"
+"thiết bị nháºp chuẩn, mặc định là rc. Không có táºp tin xuất thì\n"
+"thiết bị xuất chuẩn, mặc định là rc.\n"
+
+#: windres.c:800
+msgid "invalid option -f\n"
+msgstr "tùy chá»n không hợp lệ « -f »\n"
+
+#: windres.c:805
+msgid "No filename following the -fo option.\n"
+msgstr "Không có tên táºp tin Ä‘i sau tùy chá»n « -fo ».\n"
+
+#: windres.c:863
+#, c-format
+msgid "Option -I is deprecated for setting the input format, please use -J instead.\n"
+msgstr "Tùy chá»n « -l » bị phản đối để láºp dạng thức nháºp, hãy dùng « -J » thay thế.\n"
+
+#: windres.c:981
+msgid "no resources"
+msgstr "không có tà i nguyên nà o"
+
+#: wrstabs.c:354 wrstabs.c:1915
+#, c-format
+msgid "string_hash_lookup failed: %s"
+msgstr "việc « string_hash_lookup » (tra tìm băm chuỗi) bị lỗi: %s"
+
+#: wrstabs.c:635
+#, c-format
+msgid "stab_int_type: bad size %u"
+msgstr "stab_int_type: (kiểu số nguyên stab) kÃch cỡ sai %u"
+
+#: wrstabs.c:1393
+#, c-format
+msgid "%s: warning: unknown size for field `%s' in struct"
+msgstr "%s: cảnh báo : không biết kÃch cỡ cho trÆ°á»ng « %s » trong cấu trúc"
Modified: branches/binutils/package/binutils/rddbg.c
===================================================================
--- branches/binutils/package/binutils/rddbg.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/rddbg.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* rddbg.c -- Read debugging information into a generic form.
- Copyright 1995, 1996, 1997, 2000, 2002, 2003
+ Copyright 1995, 1996, 1997, 2000, 2002, 2003, 2005
Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian at cygnus.com>.
@@ -100,8 +100,13 @@
{
const char *secname;
const char *strsecname;
- } names[] = { { ".stab", ".stabstr" },
- { "LC_SYMTAB.stabs", "LC_SYMTAB.stabstr" } };
+ }
+ names[] =
+ {
+ { ".stab", ".stabstr" },
+ { "LC_SYMTAB.stabs", "LC_SYMTAB.stabstr" },
+ { "$GDB_SYMBOLS$", "$GDB_STRINGS$" }
+ };
unsigned int i;
void *shandle;
Modified: branches/binutils/package/binutils/readelf.c
===================================================================
--- branches/binutils/package/binutils/readelf.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/readelf.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* readelf.c -- display contents of an ELF format file
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Originally developed by Eric Youngdale <eric at andante.jic.com>
@@ -609,8 +609,10 @@
case EM_XTENSA_OLD:
case EM_M32R:
case EM_M32C:
- case EM_MS1:
+ case EM_MT:
case EM_BLACKFIN:
+ case EM_NIOS32:
+ case EM_ALTERA_NIOS2:
return TRUE;
case EM_MMA:
@@ -1123,8 +1125,8 @@
rtype = elf_m32c_reloc_type (type);
break;
- case EM_MS1:
- rtype = elf_ms1_reloc_type (type);
+ case EM_MT:
+ rtype = elf_mt_reloc_type (type);
break;
case EM_BLACKFIN:
@@ -1478,6 +1480,8 @@
case DT_VERSYM: return "VERSYM";
+ case DT_TLSDESC_GOT: return "TLSDESC_GOT";
+ case DT_TLSDESC_PLT: return "TLSDESC_PLT";
case DT_RELACOUNT: return "RELACOUNT";
case DT_RELCOUNT: return "RELCOUNT";
case DT_FLAGS_1: return "FLAGS_1";
@@ -1687,7 +1691,11 @@
case EM_XTENSA_OLD:
case EM_XTENSA: return "Tensilica Xtensa Processor";
case EM_M32C: return "Renesas M32c";
- case EM_MS1: return "Morpho Techologies MS1 processor";
+ case EM_MT: return "Morpho Techologies MT processor";
+ case EM_BLACKFIN: return "Analog Devices Blackfin";
+ case EM_NIOS32: return "Altera Nios";
+ case EM_ALTERA_NIOS2: return "Altera Nios II";
+ case EM_XC16X: return "Infineon Technologies xc16x";
default:
snprintf (buff, sizeof (buff), _("<unknown>: %x"), e_machine);
return buff;
@@ -1785,6 +1793,11 @@
case EF_ARM_EABI_VER4:
strcat (buf, ", Version4 EABI");
+ goto eabi;
+
+ case EF_ARM_EABI_VER5:
+ strcat (buf, ", Version5 EABI");
+ eabi:
while (e_flags)
{
unsigned flag;
@@ -1933,10 +1946,60 @@
break;
case EM_68K:
- if (e_flags & EF_CPU32)
+ if (e_flags & EF_M68K_CPU32)
strcat (buf, ", cpu32");
- if (e_flags & EF_M68000)
+ if (e_flags & EF_M68K_M68000)
strcat (buf, ", m68000");
+ if (e_flags & EF_M68K_ISA_MASK)
+ {
+ char const *isa = _("unknown");
+ char const *mac = _("unknown mac");
+ char const *additional = NULL;
+
+ switch (e_flags & EF_M68K_ISA_MASK)
+ {
+ case EF_M68K_ISA_A_NODIV:
+ isa = "A";
+ additional = ", nodiv";
+ break;
+ case EF_M68K_ISA_A:
+ isa = "A";
+ break;
+ case EF_M68K_ISA_A_PLUS:
+ isa = "A+";
+ break;
+ case EF_M68K_ISA_B_NOUSP:
+ isa = "B";
+ additional = ", nousp";
+ break;
+ case EF_M68K_ISA_B:
+ isa = "B";
+ break;
+ }
+ strcat (buf, ", cf, isa ");
+ strcat (buf, isa);
+ if (additional)
+ strcat (buf, additional);
+ if (e_flags & EF_M68K_FLOAT)
+ strcat (buf, ", float");
+ switch (e_flags & EF_M68K_MAC_MASK)
+ {
+ case 0:
+ mac = NULL;
+ break;
+ case EF_M68K_MAC:
+ mac = "mac";
+ break;
+ case EF_M68K_EMAC:
+ mac = "emac";
+ break;
+ }
+ if (mac)
+ {
+ strcat (buf, ", ");
+ strcat (buf, mac);
+ }
+ }
break;
case EM_PPC:
@@ -2074,6 +2137,12 @@
case EF_SH4_NOFPU: strcat (buf, ", sh4-nofpu"); break;
case EF_SH4A_NOFPU: strcat (buf, ", sh4a-nofpu"); break;
case EF_SH2A_NOFPU: strcat (buf, ", sh2a-nofpu"); break;
+ case EF_SH3_NOMMU: strcat (buf, ", sh3-nommu"); break;
+ case EF_SH4_NOMMU_NOFPU: strcat (buf, ", sh4-nommu-nofpu"); break;
+ case EF_SH2A_SH4_NOFPU: strcat (buf, ", sh2a-nofpu-or-sh4-nommu-nofpu"); break;
+ case EF_SH2A_SH3_NOFPU: strcat (buf, ", sh2a-nofpu-or-sh3-nommu"); break;
+ case EF_SH2A_SH4: strcat (buf, ", sh2a-or-sh4"); break;
+ case EF_SH2A_SH3E: strcat (buf, ", sh2a-or-sh3e"); break;
default: strcat (buf, ", unknown ISA"); break;
}
@@ -3397,21 +3466,7 @@
for (j = 1; j < elf_header.e_shnum; j++, section++)
{
- if (section->sh_size > 0
- /* Compare allocated sections by VMA, unallocated
- sections by file offset. */
- && (section->sh_flags & SHF_ALLOC
- ? (section->sh_addr >= segment->p_vaddr
- && section->sh_addr + section->sh_size
- <= segment->p_vaddr + segment->p_memsz)
- : ((bfd_vma) section->sh_offset >= segment->p_offset
- && (section->sh_offset + section->sh_size
- <= segment->p_offset + segment->p_filesz)))
- /* .tbss is special. It doesn't contribute memory space
- to normal segments. */
- && (!((section->sh_flags & SHF_TLS) != 0
- && section->sh_type == SHT_NOBITS)
- || segment->p_type == PT_TLS))
+ if (ELF_IS_SECTION_IN_SEGMENT_MEMORY(section, segment))
printf ("%s ", SECTION_NAME (section));
}
@@ -7718,7 +7773,7 @@
#define LOOKUP(id, name) \
{id, #name, 0x80 | ARRAY_SIZE(arm_attr_tag_##name), arm_attr_tag_##name}
-static arm_attr_public_tag arm_attr_public_tags[] =
+static arm_attr_public_tag arm_attr_public_tags[] =
{
{4, "CPU_raw_name", 1, NULL},
{5, "CPU_name", 1, NULL},
@@ -7895,7 +7950,7 @@
contents = get_data (NULL, file, sect->sh_offset, 1, sect->sh_size,
_("attributes"));
-
+
if (!contents)
continue;
p = contents;
@@ -7985,7 +8040,7 @@
{
printf (_("Unknown format '%c'\n"), *p);
}
-
+
free(contents);
}
return 1;
@@ -8909,7 +8964,7 @@
assert (num_dump_sects >= num_cmdline_dump_sects);
memcpy (dump_sects, cmdline_dump_sects, num_cmdline_dump_sects);
}
-
+
if (! process_file_header ())
return 1;
@@ -9155,7 +9210,7 @@
archive_file_offset = ftell (file);
archive_file_size = strtoul (arhdr.ar_size, NULL, 10);
-
+
ret |= process_object (namealc, file);
free (namealc);
Modified: branches/binutils/package/binutils/resbin.c
===================================================================
--- branches/binutils/package/binutils/resbin.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/resbin.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1331,7 +1331,7 @@
if (! id.named)
{
d->length = 4;
- d->data = (unsigned char *) reswr_alloc (4);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian, 0xffff, d->data);
put_16 (big_endian, id.u.id, d->data + 2);
}
@@ -1408,7 +1408,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 8;
- d->data = (unsigned char *) reswr_alloc (8);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian,
a->flags | (a->next != NULL ? 0 : ACC_LAST),
@@ -1434,7 +1434,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 4;
- d->data = (unsigned char *) reswr_alloc (4);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian, c->xhotspot, d->data);
put_16 (big_endian, c->yhotspot, d->data + 2);
@@ -1459,7 +1459,7 @@
first = (struct bindata *) reswr_alloc (sizeof *first);
first->length = 6;
- first->data = (unsigned char *) reswr_alloc (6);
+ first->data = (unsigned char *) reswr_alloc (first->length);
put_16 (big_endian, 0, first->data);
put_16 (big_endian, 2, first->data + 2);
@@ -1476,7 +1476,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 14;
- d->data = (unsigned char *) reswr_alloc (14);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian, gc->width, d->data);
put_16 (big_endian, gc->height, d->data + 2);
@@ -1642,7 +1642,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 2;
- d->data = (unsigned char *) reswr_alloc (2);
+ d->data = (unsigned char *) reswr_alloc (d->length);
length += 2;
@@ -1687,7 +1687,7 @@
first = (struct bindata *) reswr_alloc (sizeof *first);
first->length = 2;
- first->data = (unsigned char *) reswr_alloc (2);
+ first->data = (unsigned char *) reswr_alloc (first->length);
first->next = NULL;
pp = &first->next;
@@ -1701,7 +1701,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 2;
- d->data = (unsigned char *) reswr_alloc (2);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian, fd->index, d->data);
@@ -1733,7 +1733,7 @@
first = (struct bindata *) reswr_alloc (sizeof *first);
first->length = 6;
- first->data = (unsigned char *) reswr_alloc (6);
+ first->data = (unsigned char *) reswr_alloc (first->length);
put_16 (big_endian, 0, first->data);
put_16 (big_endian, 1, first->data + 2);
@@ -1750,7 +1750,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 14;
- d->data = (unsigned char *) reswr_alloc (14);
+ d->data = (unsigned char *) reswr_alloc (d->length);
d->data[0] = gi->width;
d->data[1] = gi->height;
@@ -1875,7 +1875,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 12;
- d->data = (unsigned char *) reswr_alloc (12);
+ d->data = (unsigned char *) reswr_alloc (d->length);
length += 12;
@@ -1903,7 +1903,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 4;
- d->data = (unsigned char *) reswr_alloc (4);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_32 (big_endian, mi->help, d->data);
@@ -1948,13 +1948,13 @@
case RCDATA_WORD:
d->length = 2;
- d->data = (unsigned char *) reswr_alloc (2);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_16 (big_endian, ri->u.word, d->data);
break;
case RCDATA_DWORD:
d->length = 4;
- d->data = (unsigned char *) reswr_alloc (4);
+ d->data = (unsigned char *) reswr_alloc (d->length);
put_32 (big_endian, ri->u.dword, d->data);
break;
@@ -2060,7 +2060,7 @@
first = (struct bindata *) reswr_alloc (sizeof *first);
first->length = 6;
- first->data = (unsigned char *) reswr_alloc (6);
+ first->data = (unsigned char *) reswr_alloc (first->length);
length = 6;
@@ -2086,7 +2086,7 @@
d = (struct bindata *) reswr_alloc (sizeof *d);
d->length = 52;
- d->data = (unsigned char *) reswr_alloc (52);
+ d->data = (unsigned char *) reswr_alloc (d->length);
length += 52;
@@ -2120,7 +2120,7 @@
vid = (struct bindata *) reswr_alloc (sizeof *vid);
vid->length = 6;
- vid->data = (unsigned char *) reswr_alloc (6);
+ vid->data = (unsigned char *) reswr_alloc (vid->length);
length += 6;
vilen = 6;
@@ -2153,7 +2153,7 @@
vsd = (struct bindata *) reswr_alloc (sizeof *vsd);
vsd->length = 6;
- vsd->data = (unsigned char *) reswr_alloc (6);
+ vsd->data = (unsigned char *) reswr_alloc (vsd->length);
length += 6;
vilen += 6;
@@ -2183,7 +2183,7 @@
vssd = (struct bindata *) reswr_alloc (sizeof *vssd);
vssd->length = 6;
- vssd->data = (unsigned char *) reswr_alloc (6);
+ vssd->data = (unsigned char *) reswr_alloc (vssd->length);
length += 6;
vilen += 6;
@@ -2241,7 +2241,7 @@
vvd = (struct bindata *) reswr_alloc (sizeof *vvd);
vvd->length = 6;
- vvd->data = (unsigned char *) reswr_alloc (6);
+ vvd->data = (unsigned char *) reswr_alloc (vvd->length);
length += 6;
vilen += 6;
@@ -2271,7 +2271,7 @@
vvsd = (struct bindata *) reswr_alloc (sizeof *vvsd);
vvsd->length = 4;
- vvsd->data = (unsigned char *) reswr_alloc (4);
+ vvsd->data = (unsigned char *) reswr_alloc (vvsd->length);
length += 4;
vilen += 4;
Modified: branches/binutils/package/binutils/testsuite/ChangeLog
===================================================================
--- branches/binutils/package/binutils/testsuite/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/testsuite/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,11 @@
+2006-04-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * lib/utils-lib.exp (default_binutils_run): Check exit status.
+
+2005-12-24 Ben Elliston <bje at gnu.org>
+
+ * config/default.exp: Do not load the unneeded util-defs.exp.
+
2005-11-15 Jan Beulich <jbeulich at novell.com>
* config/default.exp (link_or_copy): New. Use it for setting
Modified: branches/binutils/package/binutils/testsuite/config/default.exp
===================================================================
--- branches/binutils/package/binutils/testsuite/config/default.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/testsuite/config/default.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-# Copyright 1993, 1994, 1995, 1997, 1999, 2001, 2002, 2004
+# Copyright 1993, 1994, 1995, 1997, 1999, 2001, 2002, 2004, 2005
# Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
@@ -20,7 +20,6 @@
# This file was written by Rob Savoye. (rob at cygnus.com)
-load_lib util-defs.exp
load_lib utils-lib.exp
if ![info exists NM] then {
Modified: branches/binutils/package/binutils/testsuite/lib/utils-lib.exp
===================================================================
--- branches/binutils/package/binutils/testsuite/lib/utils-lib.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/testsuite/lib/utils-lib.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -73,6 +73,12 @@
if {![string match "" $exec_output]} then {
send_log "$exec_output\n"
verbose "$exec_output"
+ } else {
+ if { [lindex $state 0] != 0 } {
+ set exec_output "$prog exited with status [lindex $state 0]"
+ send_log "$exec_output\n"
+ verbose "$exec_output"
+ }
}
return $exec_output
}
Modified: branches/binutils/package/binutils/wrstabs.c
===================================================================
--- branches/binutils/package/binutils/wrstabs.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/binutils/wrstabs.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* wrstabs.c -- Output stabs debugging information
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2006
Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian at cygnus.com>.
@@ -480,8 +480,10 @@
/* Reserve 1 byte for a null byte. */
info.strings_size = 1;
- if (! bfd_hash_table_init (&info.strhash.table, string_hash_newfunc)
- || ! bfd_hash_table_init (&info.typedef_hash.table, string_hash_newfunc))
+ if (!bfd_hash_table_init (&info.strhash.table, string_hash_newfunc,
+ sizeof (struct string_hash_entry))
+ || !bfd_hash_table_init (&info.typedef_hash.table, string_hash_newfunc,
+ sizeof (struct string_hash_entry)))
{
non_fatal ("bfd_hash_table_init_failed: %s",
bfd_errmsg (bfd_get_error ()));
Modified: branches/binutils/package/config/ChangeLog
===================================================================
--- branches/binutils/package/config/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,33 @@
+2006-02-14 Paolo Bonzini <bonzini at gnu.org>
+ Andreas Schwab <schwab at suse.de>
+
+ * acx.m4 (NCN_STRICT_CHECK_TARGET_TOOLS): Use correct program name.
+ (ACX_CHECK_INSTALLED_TARGET_TOOL): Likewise, and always set $1.
+
+2006-01-26 Paolo Bonzini <bonzini at gnu.org>
+
+ * acx.m4 (NCN_STRICT_CHECK_TARGET_TOOLS): Test $with_build_time_tools.
+ (ACX_PATH_SEP): New.
+ (ACX_TOOL_DIRS): Move here from the gcc directory.
+ (ACX_CHECK_INSTALLED_TARGET_TOOL): New.
+ (GCC_TARGET_TOOL): Do not use a host tool if we found a target tool
+ with a complete path in either $with_build_time_tools or $exec_prefix.
+
+2006-01-02 Paolo Bonzini <bonzini at gnu.org>
+
+ PR target/25259
+ * stdint.m4: New.
+
+2005-12-20 Paolo Bonzini <bonzini at gnu.org>
+
+ Revert Ada-related part of the previous change.
+
+ * mt-ppc-aix: Delete.
+
+2005-12-19 Paolo Bonzini <bonzini at gnu.org>
+
+ * mt-ppc-aix, mh-ppc-aix: New.
+
2005-12-05 Paolo Bonzini <bonzini at gnu.org>
* acx.m4 (GCC_TARGET_TOOL): New.
Modified: branches/binutils/package/config/acx.m4
===================================================================
--- branches/binutils/package/config/acx.m4 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config/acx.m4 2006-04-19 08:33:31 UTC (rev 12)
@@ -104,7 +104,7 @@
####
# NCN_STRICT_CHECK_TOOLS(variable, progs-to-check-for,[value-if-not-found],[path])
-# Like plain AC_CHECK_TOOLS, but require prefix if build!=target.
+# Like plain AC_CHECK_TOOLS, but require prefix if build!=host.
AC_DEFUN([NCN_STRICT_CHECK_TOOLS],
[AC_REQUIRE([_NCN_TOOL_PREFIXES]) []dnl
@@ -135,17 +135,32 @@
AC_DEFUN([NCN_STRICT_CHECK_TARGET_TOOLS],
[AC_REQUIRE([_NCN_TOOL_PREFIXES]) []dnl
-for ncn_progname in $2; do
- if test -n "$ncn_target_tool_prefix"; then
- AC_CHECK_PROG([$1], [${ncn_target_tool_prefix}${ncn_progname}],
- [${ncn_target_tool_prefix}${ncn_progname}], , [$4])
- fi
- if test -z "$ac_cv_prog_$1" && test $build = $target ; then
- AC_CHECK_PROG([$1], [${ncn_progname}], [${ncn_progname}], , [$4])
- fi
- test -n "$ac_cv_prog_$1" && break
-done
+if test -n "$with_build_time_tools"; then
+ for ncn_progname in $2; do
+ AC_MSG_CHECKING([for ${ncn_progname} in $with_build_time_tools])
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_$1=$with_build_time_tools/${ncn_progname}
+ AC_MSG_RESULT(yes)
+ break
+ else
+ AC_MSG_RESULT(no)
+ fi
+ done
+fi
+if test -z "$ac_cv_prog_$1"; then
+ for ncn_progname in $2; do
+ if test -n "$ncn_target_tool_prefix"; then
+ AC_CHECK_PROG([$1], [${ncn_target_tool_prefix}${ncn_progname}],
+ [${ncn_target_tool_prefix}${ncn_progname}], , [$4])
+ fi
+ if test -z "$ac_cv_prog_$1" && test $build = $target ; then
+ AC_CHECK_PROG([$1], [${ncn_progname}], [${ncn_progname}], , [$4])
+ fi
+ test -n "$ac_cv_prog_$1" && break
+ done
+fi
+
if test -z "$ac_cv_prog_$1" ; then
ifelse([$3],[], [set dummy $2
if test $build = $target ; then
@@ -155,7 +170,131 @@
fi], [$1="$3"])
fi
]) []dnl # NCN_STRICT_CHECK_TARGET_TOOLS
+
+# Backported from Autoconf 2.5x; can go away when and if
+# we switch. Put the OS path separator in $PATH_SEPARATOR.
+AC_DEFUN([ACX_PATH_SEP], [
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ echo "#! /bin/sh" >conf$$.sh
+ echo "exit 0" >>conf$$.sh
+ chmod +x conf$$.sh
+ if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+ PATH_SEPARATOR=';'
+ else
+ PATH_SEPARATOR=:
+ fi
+ rm -f conf$$.sh
+fi
+])
+
+
+AC_DEFUN([ACX_TOOL_DIRS], [
+AC_REQUIRE([ACX_PATH_SEP])
+if test "x$exec_prefix" = xNONE; then
+ if test "x$prefix" = xNONE; then
+ gcc_cv_tool_prefix=$ac_default_prefix
+ else
+ gcc_cv_tool_prefix=$prefix
+ fi
+else
+ gcc_cv_tool_prefix=$exec_prefix
+fi
+
+# If there is no compiler in the tree, use the PATH only. In any
+# case, if there is no compiler in the tree nobody should use
+# AS_FOR_TARGET and LD_FOR_TARGET.
+if test x$host = x$build && test -f $srcdir/gcc/BASE-VER; then
+ gcc_version=`cat $srcdir/gcc/BASE-VER`
+ gcc_cv_tool_dirs="$gcc_cv_tool_prefix/libexec/gcc/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/libexec/gcc/$target_noncanonical$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs/usr/lib/gcc/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs/usr/lib/gcc/$target_noncanonical$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/$target_noncanonical/bin/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/$target_noncanonical/bin$PATH_SEPARATOR"
+else
+ gcc_cv_tool_dirs=
+fi
+
+if test x$build = x$target && test -n "$md_exec_prefix"; then
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$md_exec_prefix$PATH_SEPARATOR"
+fi
+
+]) []dnl # ACX_TOOL_DIRS
+
+# ACX_HAVE_GCC_FOR_TARGET
+# Check if the variable GCC_FOR_TARGET really points to a GCC binary.
+AC_DEFUN([ACX_HAVE_GCC_FOR_TARGET], [
+cat > conftest.c << \EOF
+#ifdef __GNUC__
+ gcc_yay;
+#endif
+EOF
+if ($GCC_FOR_TARGET -E conftest.c | grep gcc_yay) > /dev/null 2>&1; then
+ have_gcc_for_target=yes
+else
+ GCC_FOR_TARGET=${ncn_target_tool_prefix}gcc
+ have_gcc_for_target=no
+fi
+rm conftest.c
+])
+
+# ACX_CHECK_INSTALLED_TARGET_TOOL(VAR, PROG)
+# Searching for installed target binutils. We need to take extra care,
+# else we may find the wrong assembler, linker, etc., and lose.
+#
+# First try --with-build-time-tools, if specified.
+#
+# For build != host, we ask the installed GCC for the name of the tool it
+# uses, and accept it if it is an absolute path. This is because the
+# only good choice for a compiler is the same GCC version that is being
+# installed (or we couldn't make target libraries), and we assume that
+# on the host system we'll have not only the same GCC version, but also
+# the same binutils version.
+#
+# For build == host, search the same directories that the installed
+# compiler will search. We used to do this for the assembler, linker,
+# and nm only; for simplicity of configuration, however, we extend this
+# criterion to tools (such as ar and ranlib) that are never invoked by
+# the compiler, to avoid mismatches.
+#
+# Also note we have to check MD_EXEC_PREFIX before checking the user's path
+# if build == target. This makes the most sense only when bootstrapping,
+# but we also do so when build != host. In this case, we hope that the
+# build and host systems will have similar contents of MD_EXEC_PREFIX.
+#
+# If we do not find a suitable binary, then try the user's path.
+
+AC_DEFUN([ACX_CHECK_INSTALLED_TARGET_TOOL], [
+AC_REQUIRE([ACX_TOOL_DIRS])
+AC_REQUIRE([ACX_HAVE_GCC_FOR_TARGET])
+if test -z "$ac_cv_path_$1" ; then
+ if test -n "$with_build_time_tools"; then
+ AC_MSG_CHECKING([for $2 in $with_build_time_tools])
+ if test -x $with_build_time_tools/$2; then
+ $1=`cd $with_build_time_tools && pwd`/$2
+ ac_cv_path_$1=[$]$1
+ AC_MSG_RESULT([$ac_cv_path_$1])
+ else
+ AC_MSG_RESULT(no)
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ $1=`$GCC_FOR_TARGET --print-prog-name=$2`
+ test [$]$1=$2 && $1=
+ ac_cv_path_$1=[$]$1
+ fi
+fi
+if test -z "$ac_cv_path_$1" ; then
+ AC_PATH_PROG([$1], [$2], [], [$gcc_cv_tool_dirs])
+fi
+if test -z "$ac_cv_path_$1" ; then
+ NCN_STRICT_CHECK_TARGET_TOOLS([$1], [$2])
+else
+ $1=$ac_cv_path_$1
+fi
+]) []dnl # ACX_CHECK_INSTALLED_TARGET_TOOL
+
###
# AC_PROG_CPP_WERROR
# Used for autoconf 2.5x to force AC_PREPROC_IFELSE to reject code which
@@ -300,8 +439,13 @@
AC_DEFUN([GCC_TARGET_TOOL],
[AC_MSG_CHECKING(where to find the target $1)
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- AC_MSG_RESULT(pre-installed)
+ if expr "x[$]$2" : "x/" > /dev/null; then
+ # We already found the complete path
+ AC_MSG_RESULT(pre-installed in `dirname [$]$2`)
+ else
+ # Canadian cross, just use what we found
+ AC_MSG_RESULT(pre-installed)
+ fi
else
ifelse([$4],,,
[ok=yes
@@ -318,7 +462,10 @@
# An in-tree tool is available and we can use it
$2='$$r/$(HOST_SUBDIR)/$4'
AC_MSG_RESULT(just compiled)
- el])if test "x$target" = "x$host"; then
+ el])if expr "x[$]$2" : "x/" > /dev/null; then
+ # We already found the complete path
+ AC_MSG_RESULT(pre-installed in `dirname [$]$2`)
+ elif test "x$target" = "x$host"; then
# We can use an host tool
$2='$($3)'
AC_MSG_RESULT(host tool)
Added: branches/binutils/package/config/mh-ppc-aix
===================================================================
--- branches/binutils/package/config/mh-ppc-aix 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config/mh-ppc-aix 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+
+# Compile Ada files with minimal-toc. The primary focus is gnatlib, so
+# that the library does not use nearly the entire TOC of applications
+# until gnatlib is built as a shared library on AIX. Compiling the
+# compiler with -mminimal-toc does not cause any harm.
+BOOT_ADAFLAGS = -mminimal-toc
+BOOT_LDFLAGS = -Wl,-bbigtoc
+LDFLAGS = `case $(CC) in *gcc*) echo -Wl,-bbigtoc ;; esac;`
Added: branches/binutils/package/config/stdint.m4
===================================================================
--- branches/binutils/package/config/stdint.m4 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config/stdint.m4 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,486 @@
+dnl @synopsis GCC_HEADER_STDINT [( HEADER-TO-GENERATE [, HEADERS-TO-CHECK])]
+dnl
+dnl the "ISO C9X: 7.18 Integer types <stdint.h>" section requires the
+dnl existence of an include file <stdint.h> that defines a set of
+dnl typedefs, especially uint8_t,int32_t,uintptr_t.
+dnl Many older installations will not provide this file, but some will
+dnl have the very same definitions in <inttypes.h>. In other enviroments
+dnl we can use the inet-types in <sys/types.h> which would define the
+dnl typedefs int8_t and u_int8_t respectivly.
+dnl
+dnl This macros will create a local "_stdint.h" or the headerfile given as
+dnl an argument. In many cases that file will pick the definition from a
+dnl "#include <stdint.h>" or "#include <inttypes.h>" statement, while
+dnl in other environments it will provide the set of basic 'stdint's defined:
+dnl int8_t,uint8_t,int16_t,uint16_t,int32_t,uint32_t,intptr_t,uintptr_t
+dnl int_least32_t.. int_fast32_t.. intmax_t
+dnl which may or may not rely on the definitions of other files.
+dnl
+dnl Sometimes the stdint.h or inttypes.h headers conflict with sys/types.h,
+dnl so we test the headers together with sys/types.h and always include it
+dnl into the generated header (to match the tests with the generated file).
+dnl Hopefully this is not a big annoyance.
+dnl
+dnl If your installed header files require the stdint-types you will want to
+dnl create an installable file mylib-int.h that all your other installable
+dnl header may include. So, for a library package named "mylib", just use
+dnl GCC_HEADER_STDINT(mylib-int.h)
+dnl in configure.in and install that header file in Makefile.am along with
+dnl the other headers (mylib.h). The mylib-specific headers can simply
+dnl use "#include <mylib-int.h>" to obtain the stdint-types.
+dnl
+dnl Remember, if the system already had a valid <stdint.h>, the generated
+dnl file will include it directly. No need for fuzzy HAVE_STDINT_H things...
+dnl
+dnl @author Guido Draheim <guidod at gmx.de>, Paolo Bonzini <bonzini at gnu.org>
+
+AC_DEFUN([GCC_HEADER_STDINT],
+[m4_define(_GCC_STDINT_H, m4_ifval($1, $1, _stdint.h))
+
+inttype_headers=`echo inttypes.h sys/inttypes.h $2 | sed -e 's/,/ /g'`
+
+acx_cv_header_stdint=stddef.h
+acx_cv_header_stdint_kind="(already complete)"
+for i in stdint.h $inttype_headers; do
+ unset ac_cv_type_uintptr_t
+ unset ac_cv_type_uintmax_t
+ unset ac_cv_type_int_least32_t
+ unset ac_cv_type_int_fast32_t
+ unset ac_cv_type_uint64_t
+ _AS_ECHO_N([looking for a compliant stdint.h in $i, ])
+ AC_CHECK_TYPE(uintmax_t,[acx_cv_header_stdint=$i],continue,[#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(uintptr_t,,[acx_cv_header_stdint_kind="(mostly complete)"], [#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(int_least32_t,,[acx_cv_header_stdint_kind="(mostly complete)"], [#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(int_fast32_t,,[acx_cv_header_stdint_kind="(mostly complete)"], [#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(uint64_t,,[acx_cv_header_stdint_kind="(lacks uint64_t)"], [#include <sys/types.h>
+#include <$i>])
+ break
+done
+if test "$acx_cv_header_stdint" = stddef.h; then
+ acx_cv_header_stdint_kind="(lacks uintptr_t)"
+ for i in stdint.h $inttype_headers; do
+ unset ac_cv_type_uint32_t
+ unset ac_cv_type_uint64_t
+ _AS_ECHO_N([looking for an incomplete stdint.h in $i, ])
+ AC_CHECK_TYPE(uint32_t,[acx_cv_header_stdint=$i],continue,[#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(uint64_t,,[acx_cv_header_stdint_kind="(lacks uintptr_t and uint64_t)"], [#include <sys/types.h>
+#include <$i>])
+ break
+ done
+fi
+if test "$acx_cv_header_stdint" = stddef.h; then
+ acx_cv_header_stdint_kind="(u_intXX_t style)"
+ for i in sys/types.h $inttype_headers; do
+ unset ac_cv_type_u_int32_t
+ unset ac_cv_type_u_int64_t
+ _AS_ECHO_N([looking for u_intXX_t types in $i, ])
+ AC_CHECK_TYPE(u_int32_t,[acx_cv_header_stdint=$i],continue,[#include <sys/types.h>
+#include <$i>])
+ AC_CHECK_TYPE(u_int64_t,,[acx_cv_header_stdint_kind="(u_intXX_t style, lacks u_int64_t)"], [#include <sys/types.h>
+#include <$i>])
+ break
+ done
+fi
+if test "$acx_cv_header_stdint" = stddef.h; then
+ acx_cv_header_stdint_kind="(using manual detection)"
+fi
+
+test -z "$ac_cv_type_uintptr_t" && ac_cv_type_uintptr_t=no
+test -z "$ac_cv_type_uint64_t" && ac_cv_type_uint64_t=no
+test -z "$ac_cv_type_u_int64_t" && ac_cv_type_u_int64_t=no
+test -z "$ac_cv_type_int_least32_t" && ac_cv_type_int_least32_t=no
+test -z "$ac_cv_type_int_fast32_t" && ac_cv_type_int_fast32_t=no
+
+# ----------------- Summarize what we found so far
+
+AC_MSG_CHECKING([what to include in _GCC_STDINT_H])
+
+case `AS_BASENAME(_GCC_STDINT_H)` in
+ stdint.h) AC_MSG_WARN([are you sure you want it there?]) ;;
+ inttypes.h) AC_MSG_WARN([are you sure you want it there?]) ;;
+ *) ;;
+esac
+
+AC_MSG_RESULT($acx_cv_header_stdint $acx_cv_header_stdint_kind)
+
+# ----------------- done included file, check C basic types --------
+
+# Lacking an uintptr_t? Test size of void *
+case "$acx_cv_header_stdint:$ac_cv_type_uintptr_t" in
+ stddef.h:* | *:no) AC_CHECK_SIZEOF(void *) ;;
+esac
+
+# Lacking an uint64_t? Test size of long
+case "$acx_cv_header_stdint:$ac_cv_type_uint64_t:$ac_cv_type_u_int64_t" in
+ stddef.h:*:* | *:no:no) AC_CHECK_SIZEOF(long) ;;
+esac
+
+if test $acx_cv_header_stdint = stddef.h; then
+ # Lacking a good header? Test size of everything and deduce all types.
+ AC_CHECK_SIZEOF(int)
+ AC_CHECK_SIZEOF(short)
+ AC_CHECK_SIZEOF(char)
+
+ AC_MSG_CHECKING(for type equivalent to int8_t)
+ case "$ac_cv_sizeof_char" in
+ 1) acx_cv_type_int8_t=char ;;
+ *) AC_MSG_ERROR(no 8-bit type, please report a bug)
+ esac
+ AC_MSG_RESULT($acx_cv_type_int8_t)
+
+ AC_MSG_CHECKING(for type equivalent to int16_t)
+ case "$ac_cv_sizeof_int:$ac_cv_sizeof_short" in
+ 2:*) acx_cv_type_int16_t=int ;;
+ *:2) acx_cv_type_int16_t=short ;;
+ *) AC_MSG_ERROR(no 16-bit type, please report a bug)
+ esac
+ AC_MSG_RESULT($acx_cv_type_int16_t)
+
+ AC_MSG_CHECKING(for type equivalent to int32_t)
+ case "$ac_cv_sizeof_int:$ac_cv_sizeof_long" in
+ 4:*) acx_cv_type_int32_t=int ;;
+ *:4) acx_cv_type_int32_t=long ;;
+ *) AC_MSG_ERROR(no 32-bit type, please report a bug)
+ esac
+ AC_MSG_RESULT($acx_cv_type_int32_t)
+fi
+
+# These tests are here to make the output prettier
+
+if test "$ac_cv_type_uint64_t" != yes && test "$ac_cv_type_u_int64_t" != yes; then
+ case "$ac_cv_sizeof_long" in
+ 8) acx_cv_type_int64_t=long ;;
+ esac
+ AC_MSG_CHECKING(for type equivalent to int64_t)
+ AC_MSG_RESULT(${acx_cv_type_int64_t-'using preprocessor symbols'})
+fi
+
+# Now we can use the above types
+
+if test "$ac_cv_type_uintptr_t" != yes; then
+ AC_MSG_CHECKING(for type equivalent to intptr_t)
+ case $ac_cv_sizeof_void_p in
+ 2) acx_cv_type_intptr_t=int16_t ;;
+ 4) acx_cv_type_intptr_t=int32_t ;;
+ 8) acx_cv_type_intptr_t=int64_t ;;
+ *) AC_MSG_ERROR(no equivalent for intptr_t, please report a bug)
+ esac
+ AC_MSG_RESULT($acx_cv_type_intptr_t)
+fi
+
+# ----------------- done all checks, emit header -------------
+AC_CONFIG_COMMANDS(_GCC_STDINT_H, [
+if test "$GCC" = yes; then
+ echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
+else
+ echo "/* generated for $CC */" > tmp-stdint.h
+fi
+
+sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ #ifndef GCC_GENERATED_STDINT_H
+ #define GCC_GENERATED_STDINT_H 1
+
+ #include <sys/types.h>
+EOF
+
+if test "$acx_cv_header_stdint" != stdint.h; then
+ echo "#include <stddef.h>" >> tmp-stdint.h
+fi
+if test "$acx_cv_header_stdint" != stddef.h; then
+ echo "#include <$acx_cv_header_stdint>" >> tmp-stdint.h
+fi
+
+sed 's/^ *//' >> tmp-stdint.h <<EOF
+ /* glibc uses these symbols as guards to prevent redefinitions. */
+ #ifdef __int8_t_defined
+ #define _INT8_T
+ #define _INT16_T
+ #define _INT32_T
+ #endif
+ #ifdef __uint32_t_defined
+ #define _UINT32_T
+ #endif
+
+EOF
+
+# ----------------- done header, emit basic int types -------------
+if test "$acx_cv_header_stdint" = stddef.h; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ #ifndef _UINT8_T
+ #define _UINT8_T
+ typedef unsigned $acx_cv_type_int8_t uint8_t;
+ #endif
+
+ #ifndef _UINT16_T
+ #define _UINT16_T
+ typedef unsigned $acx_cv_type_int16_t uint16_t;
+ #endif
+
+ #ifndef _UINT32_T
+ #define _UINT32_T
+ typedef unsigned $acx_cv_type_int32_t uint32_t;
+ #endif
+
+ #ifndef _INT8_T
+ #define _INT8_T
+ typedef $acx_cv_type_int8_t int8_t;
+ #endif
+
+ #ifndef _INT16_T
+ #define _INT16_T
+ typedef $acx_cv_type_int16_t int16_t;
+ #endif
+
+ #ifndef _INT32_T
+ #define _INT32_T
+ typedef $acx_cv_type_int32_t int32_t;
+ #endif
+EOF
+elif test "$ac_cv_type_u_int32_t" = yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* int8_t int16_t int32_t defined by inet code, we do the u_intXX types */
+ #ifndef _INT8_T
+ #define _INT8_T
+ #endif
+ #ifndef _INT16_T
+ #define _INT16_T
+ #endif
+ #ifndef _INT32_T
+ #define _INT32_T
+ #endif
+
+ #ifndef _UINT8_T
+ #define _UINT8_T
+ typedef u_int8_t uint8_t;
+ #endif
+
+ #ifndef _UINT16_T
+ #define _UINT16_T
+ typedef u_int16_t uint16_t;
+ #endif
+
+ #ifndef _UINT32_T
+ #define _UINT32_T
+ typedef u_int32_t uint32_t;
+ #endif
+EOF
+else
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* Some systems have guard macros to prevent redefinitions, define them. */
+ #ifndef _INT8_T
+ #define _INT8_T
+ #endif
+ #ifndef _INT16_T
+ #define _INT16_T
+ #endif
+ #ifndef _INT32_T
+ #define _INT32_T
+ #endif
+ #ifndef _UINT8_T
+ #define _UINT8_T
+ #endif
+ #ifndef _UINT16_T
+ #define _UINT16_T
+ #endif
+ #ifndef _UINT32_T
+ #define _UINT32_T
+ #endif
+EOF
+fi
+
+# ------------- done basic int types, emit int64_t types ------------
+if test "$ac_cv_type_uint64_t" = yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* system headers have good uint64_t and int64_t */
+ #ifndef _INT64_T
+ #define _INT64_T
+ #endif
+ #ifndef _UINT64_T
+ #define _UINT64_T
+ #endif
+EOF
+elif test "$ac_cv_type_u_int64_t" = yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* system headers have an u_int64_t (and int64_t) */
+ #ifndef _INT64_T
+ #define _INT64_T
+ #endif
+ #ifndef _UINT64_T
+ #define _UINT64_T
+ typedef u_int64_t uint64_t;
+ #endif
+EOF
+elif test -n "$acx_cv_type_int64_t"; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* architecture has a 64-bit type, $acx_cv_type_int64_t */
+ #ifndef _INT64_T
+ #define _INT64_T
+ typedef $acx_cv_type_int64_t int64_t;
+ #endif
+ #ifndef _UINT64_T
+ #define _UINT64_T
+ typedef unsigned $acx_cv_type_int64_t uint64_t;
+ #endif
+EOF
+else
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* some common heuristics for int64_t, using compiler-specific tests */
+ #if defined __STDC_VERSION__ && (__STDC_VERSION__-0) >= 199901L
+ #ifndef _INT64_T
+ #define _INT64_T
+ typedef long long int64_t;
+ #endif
+ #ifndef _UINT64_T
+ #define _UINT64_T
+ typedef unsigned long long uint64_t;
+ #endif
+
+ #elif defined __GNUC__ && defined (__STDC__) && __STDC__-0
+ /* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and
+ does not implement __extension__. But that compiler doesn't define
+ __GNUC_MINOR__. */
+ # if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__)
+ # define __extension__
+ # endif
+
+ # ifndef _INT64_T
+ # define _INT64_T
+ __extension__ typedef long long int64_t;
+ # endif
+ # ifndef _UINT64_T
+ # define _UINT64_T
+ __extension__ typedef unsigned long long uint64_t;
+ # endif
+
+ #elif !defined __STRICT_ANSI__
+ # if defined _MSC_VER || defined __WATCOMC__ || defined __BORLANDC__
+
+ # ifndef _INT64_T
+ # define _INT64_T
+ typedef __int64 int64_t;
+ # endif
+ # ifndef _UINT64_T
+ # define _UINT64_T
+ typedef unsigned __int64 uint64_t;
+ # endif
+ # endif /* compiler */
+
+ #endif /* ANSI version */
+EOF
+fi
+
+# ------------- done int64_t types, emit intptr types ------------
+if test "$ac_cv_type_uintptr_t" != yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* Define intptr_t based on sizeof(void*) = $ac_cv_sizeof_void_p */
+ typedef u$acx_cv_type_intptr_t uintptr_t;
+ typedef $acx_cv_type_intptr_t intptr_t;
+EOF
+fi
+
+# ------------- done intptr types, emit int_least types ------------
+if test "$ac_cv_type_int_least32_t" != yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* Define int_least types */
+ typedef int8_t int_least8_t;
+ typedef int16_t int_least16_t;
+ typedef int32_t int_least32_t;
+ #ifdef _INT64_T
+ typedef int64_t int_least64_t;
+ #endif
+
+ typedef uint8_t uint_least8_t;
+ typedef uint16_t uint_least16_t;
+ typedef uint32_t uint_least32_t;
+ #ifdef _UINT64_T
+ typedef uint64_t uint_least64_t;
+ #endif
+EOF
+fi
+
+# ------------- done intptr types, emit int_fast types ------------
+if test "$ac_cv_type_int_fast32_t" != yes; then
+ dnl NOTE: The following code assumes that sizeof (int) > 1.
+ dnl Fix when strange machines are reported.
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* Define int_fast types. short is often slow */
+ typedef int8_t int_fast8_t;
+ typedef int int_fast16_t;
+ typedef int32_t int_fast32_t;
+ #ifdef _INT64_T
+ typedef int64_t int_fast64_t;
+ #endif
+
+ typedef uint8_t uint_fast8_t;
+ typedef unsigned int uint_fast16_t;
+ typedef uint32_t uint_fast32_t;
+ #ifdef _UINT64_T
+ typedef uint64_t uint_fast64_t;
+ #endif
+EOF
+fi
+
+if test "$ac_cv_type_uintmax_t" != yes; then
+ sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ /* Define intmax based on what we found */
+ #ifdef _INT64_T
+ typedef int64_t intmax_t;
+ #else
+ typedef long intmax_t;
+ #endif
+ #ifdef _UINT64_T
+ typedef uint64_t uintmax_t;
+ #else
+ typedef unsigned long uintmax_t;
+ #endif
+EOF
+fi
+
+sed 's/^ *//' >> tmp-stdint.h <<EOF
+
+ #endif /* GCC_GENERATED_STDINT_H */
+EOF
+
+if test -r ]_GCC_STDINT_H[ && cmp -s tmp-stdint.h ]_GCC_STDINT_H[; then
+ rm -f tmp-stdint.h
+else
+ mv -f tmp-stdint.h ]_GCC_STDINT_H[
+fi
+
+], [
+GCC="$GCC"
+CC="$CC"
+acx_cv_header_stdint="$acx_cv_header_stdint"
+acx_cv_type_int8_t="$acx_cv_type_int8_t"
+acx_cv_type_int16_t="$acx_cv_type_int16_t"
+acx_cv_type_int32_t="$acx_cv_type_int32_t"
+acx_cv_type_int64_t="$acx_cv_type_int64_t"
+acx_cv_type_intptr_t="$acx_cv_type_intptr_t"
+ac_cv_type_uintmax_t="$ac_cv_type_uintmax_t"
+ac_cv_type_uintptr_t="$ac_cv_type_uintptr_t"
+ac_cv_type_uint64_t="$ac_cv_type_uint64_t"
+ac_cv_type_u_int64_t="$ac_cv_type_u_int64_t"
+ac_cv_type_u_int32_t="$ac_cv_type_u_int32_t"
+ac_cv_type_int_least32_t="$ac_cv_type_int_least32_t"
+ac_cv_type_int_fast32_t="$ac_cv_type_int_fast32_t"
+ac_cv_sizeof_void_p="$ac_cv_sizeof_void_p"
+])
+
+])
Modified: branches/binutils/package/config.guess
===================================================================
--- branches/binutils/package/config.guess 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config.guess 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
# 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
-timestamp='2005-11-11'
+timestamp='2006-01-02'
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@@ -206,6 +206,9 @@
*:ekkoBSD:*:*)
echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE}
exit ;;
+ *:SolidBSD:*:*)
+ echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE}
+ exit ;;
macppc:MirBSD:*:*)
echo powerppc-unknown-mirbsd${UNAME_RELEASE}
exit ;;
@@ -764,7 +767,12 @@
echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE}
exit ;;
*:FreeBSD:*:*)
- echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`
+ case ${UNAME_MACHINE} in
+ pc98)
+ echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;;
+ *)
+ echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;;
+ esac
exit ;;
i*:CYGWIN*:*)
echo ${UNAME_MACHINE}-pc-cygwin
@@ -851,7 +859,7 @@
#endif
#endif
EOF
- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=`
+ eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '/^CPU/{s: ::g;p;}'`"
test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }
;;
mips64:Linux:*:*)
@@ -870,7 +878,7 @@
#endif
#endif
EOF
- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=`
+ eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '/^CPU/{s: ::g;p;}'`"
test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }
;;
or32:Linux:*:*)
@@ -919,6 +927,9 @@
sparc:Linux:*:* | sparc64:Linux:*:*)
echo ${UNAME_MACHINE}-unknown-linux-gnu
exit ;;
+ vax:Linux:*:*)
+ echo ${UNAME_MACHINE}-dec-linux-gnu
+ exit ;;
x86_64:Linux:*:*)
echo x86_64-unknown-linux-gnu
exit ;;
@@ -964,7 +975,7 @@
LIBC=gnulibc1
# endif
#else
- #ifdef __INTEL_COMPILER
+ #if defined(__INTEL_COMPILER) || defined(__PGI)
LIBC=gnu
#else
LIBC=gnuaout
@@ -974,7 +985,7 @@
LIBC=dietlibc
#endif
EOF
- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=`
+ eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '/^LIBC/{s: ::g;p;}'`"
test x"${LIBC}" != x && {
echo "${UNAME_MACHINE}-pc-linux-${LIBC}"
exit
@@ -1263,6 +1274,9 @@
i*86:skyos:*:*)
echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//'
exit ;;
+ i*86:rdos:*:*)
+ echo ${UNAME_MACHINE}-pc-rdos
+ exit ;;
esac
#echo '(No uname command or uname output not recognized.)' 1>&2
Modified: branches/binutils/package/config.sub
===================================================================
--- branches/binutils/package/config.sub 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/config.sub 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
# 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
-timestamp='2005-12-12'
+timestamp='2006-01-02'
# This file is (in principle) common to ALL GNU software.
# The presence of a machine in this file suggests that SOME GNU software
@@ -119,8 +119,9 @@
# Here we must recognize all the valid KERNEL-OS combinations.
maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
case $maybe_os in
- nto-qnx* | linux-gnu* | linux-dietlibc | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | \
- kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | storm-chaos* | os2-emx* | rtmk-nova*)
+ nto-qnx* | linux-gnu* | linux-dietlibc | linux-newlib* | linux-uclibc* | \
+ uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | \
+ storm-chaos* | os2-emx* | rtmk-nova*)
os=-$maybe_os
basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
;;
@@ -247,7 +248,7 @@
| h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \
| i370 | i860 | i960 | ia64 \
| ip2k | iq2000 \
- | m32r | m32rle | m68000 | m68k | m88k | maxq | mcore \
+ | m32r | m32rle | m68000 | m68k | m88k | maxq | mb | microblaze | mcore \
| mips | mipsbe | mipseb | mipsel | mipsle \
| mips16 \
| mips64 | mips64el \
@@ -294,10 +295,10 @@
;;
m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k)
;;
+ ms1)
+ basic_machine=mt-unknown
+ ;;
- ms1)
- basic_machine=mt-unknown
- ;;
# We use `pc' rather than `unknown'
# because (1) that's what they normally are, and
# (2) the word "unknown" tends to confuse beginning users.
@@ -708,7 +709,7 @@
os=-msdos
;;
ms1-*)
- basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'`
+ basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'`
;;
mvs)
basic_machine=i370-ibm
@@ -817,6 +818,12 @@
pc532 | pc532-*)
basic_machine=ns32k-pc532
;;
+ pc98)
+ basic_machine=i386-pc
+ ;;
+ pc98-*)
+ basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
pentium | p5 | k5 | k6 | nexgen | viac3)
basic_machine=i586-pc
;;
@@ -873,6 +880,10 @@
basic_machine=i586-unknown
os=-pw32
;;
+ rdos)
+ basic_machine=i386-pc
+ os=-rdos
+ ;;
rom68k)
basic_machine=m68k-rom68k
os=-coff
@@ -1188,21 +1199,23 @@
| -aos* \
| -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \
| -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \
- | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* | -openbsd* \
+ | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* \
+ | -openbsd* | -solidbsd* \
| -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \
| -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
| -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
| -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
| -chorusos* | -chorusrdb* \
| -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
- | -mingw32* | -linux-gnu* | -linux-uclibc* | -uxpv* | -beos* | -mpeix* | -udk* \
+ | -mingw32* | -linux-gnu* | -linux-newlib* | -linux-uclibc* \
+ | -uxpv* | -beos* | -mpeix* | -udk* \
| -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \
| -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \
| -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \
| -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \
| -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \
| -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly* \
- | -skyos* | -haiku*)
+ | -skyos* | -haiku* | -rdos*)
# Remember, each alternative MUST END IN *, to match a version number.
;;
-qnx*)
Modified: branches/binutils/package/configure
===================================================================
--- branches/binutils/package/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -16,6 +16,8 @@
ac_help="$ac_help
--enable-libssp Builds libssp directory"
ac_help="$ac_help
+ --enable-libgcc-math Builds libgcc-math directory"
+ac_help="$ac_help
--with-mpfr-dir=PATH Specify source directory for MPFR library"
ac_help="$ac_help
--with-mpfr=PATH Specify directory for installed MPFR library"
@@ -27,17 +29,26 @@
--with-build-sysroot=sysroot
use sysroot as the system root during the build"
ac_help="$ac_help
- --enable-bootstrap[=lean] Enable bootstrapping [no]"
+ --enable-bootstrap Enable bootstrapping [yes if native build]"
ac_help="$ac_help
--enable-serial-[{host,target,build}-]configure
Force sequential configuration of
sub-packages for the host, target or build
machine, or all sub-packages"
ac_help="$ac_help
+ --with-build-time-tools=path
+ use given path to find target tools during the build"
+ac_help="$ac_help
--enable-maintainer-mode enable make rules and dependencies not useful
(and sometimes confusing) to the casual installer"
ac_help="$ac_help
--enable-werror enable -Werror in bootstrap stage2 and later"
+ac_help="$ac_help
+ --with-datarootdir Use datarootdir as the data root directory."
+ac_help="$ac_help
+ --with-docdir Install documentation in this directory."
+ac_help="$ac_help
+ --with-htmldir Install html in this directory."
# Initialize some variables set by options.
# The variables have the same names as the options, with
@@ -596,7 +607,7 @@
fi
echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:600: checking host system type" >&5
+echo "configure:611: checking host system type" >&5
host_alias=$host
case "$host_alias" in
@@ -617,7 +628,7 @@
echo "$ac_t""$host" 1>&6
echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:621: checking target system type" >&5
+echo "configure:632: checking target system type" >&5
target_alias=$target
case "$target_alias" in
@@ -635,7 +646,7 @@
echo "$ac_t""$target" 1>&6
echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:639: checking build system type" >&5
+echo "configure:650: checking build system type" >&5
build_alias=$build
case "$build_alias" in
@@ -690,7 +701,7 @@
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
# ./install, which can be erroneously created by make from ./install.sh.
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:694: checking for a BSD compatible install" >&5
+echo "configure:705: checking for a BSD compatible install" >&5
if test -z "$INSTALL"; then
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -743,7 +754,7 @@
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
echo $ac_n "checking whether ln works""... $ac_c" 1>&6
-echo "configure:747: checking whether ln works" >&5
+echo "configure:758: checking whether ln works" >&5
if eval "test \"`echo '$''{'acx_cv_prog_LN'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -767,7 +778,7 @@
fi
echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6
-echo "configure:771: checking whether ln -s works" >&5
+echo "configure:782: checking whether ln -s works" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -906,10 +917,12 @@
target-libstdc++-v3 \
target-libmudflap \
target-libssp \
+ target-libgcc-math \
target-libgfortran \
${libgcj} \
target-libobjc \
- target-libada"
+ target-libada \
+ target-libgomp"
# these tools are built using the target libraries, and are intended to
# run only in the target environment
@@ -1091,7 +1104,6 @@
fi
if test "${ENABLE_LIBADA}" != "yes" ; then
- noconfigdirs="$noconfigdirs target-libada"
noconfigdirs="$noconfigdirs gnattools"
fi
@@ -1103,10 +1115,24 @@
ENABLE_LIBSSP=yes
fi
-if test "${ENABLE_LIBSSP}" != "yes" ; then
- noconfigdirs="$noconfigdirs target-libssp"
+
+# Set the default so we build libgcc-math for ix86 and x86_64
+# Check whether --enable-libgcc-math or --disable-libgcc-math was given.
+if test "${enable_libgcc_math+set}" = set; then
+ enableval="$enable_libgcc_math"
+ :
+else
+
+case "${target}" in
+ i?86-* | x86_64-* )
+ enable_libgcc_math=yes ;;
+ *)
+ enable_libgcc_math=no ;;
+esac
+
fi
+
# Save it here so that, even in case of --enable-libgcj, if the Java
# front-end isn't enabled, we still get libgcj disabled.
libgcj_saved=$libgcj
@@ -1124,16 +1150,10 @@
esac
-# Allow --disable-libmudflap to exclude target-libmudflap
-case $enable_libmudflap in
-yes)
- ;;
-no)
- noconfigdirs="$noconfigdirs target-libmudflap"
- ;;
-"")
+# Disable libmudflap on some systems.
+if test x$enable_libmudflap = x ; then
case "${target}" in
- *-*-linux*-gnu | *-*-gnu* | *-*-k*bsd*-gnu)
+ *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu)
# Enable libmudflap by default in GNU and friends.
;;
*-*-freebsd*)
@@ -1144,9 +1164,27 @@
noconfigdirs="$noconfigdirs target-libmudflap"
;;
esac
-esac
+fi
+# Disable libgomp on non POSIX hosted systems.
+if test x$enable_libgomp = x ; then
+ # Enable libgomp by default on hosted POSIX systems.
+ case "${target}" in
+ *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu)
+ ;;
+ *-*-netbsd* | *-*-freebsd* | *-*-openbsd*)
+ ;;
+ *-*-solaris2* | *-*-sysv4* | *-*-irix* | *-*-osf* | *-*-hpux*)
+ ;;
+ *-*-darwin* | *-*-aix*)
+ ;;
+ *)
+ noconfigdirs="$noconfigdirs target-libgomp"
+ ;;
+ esac
+fi
+
case "${target}" in
*-*-chorusos)
noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}"
@@ -1448,6 +1486,9 @@
i[3456789]86-*-beos*)
noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss ${libgcj}"
;;
+ i[3456789]86-*-rdos*)
+ noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss"
+ ;;
m32r-*-*)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
@@ -1759,6 +1800,12 @@
powerpc-*-darwin*)
host_makefile_frag="config/mh-ppc-darwin"
;;
+ powerpc-*-aix*)
+ host_makefile_frag="config/mh-ppc-aix"
+ ;;
+ rs6000-*-aix*)
+ host_makefile_frag="config/mh-ppc-aix"
+ ;;
*-*-lynxos*)
# /bin/cc is less than useful for our purposes. Always use GCC
tentative_cc="/bin/gcc"
@@ -1802,8 +1849,6 @@
CXX=${CXX-${host_alias}-c++}
CXXFLAGS=${CXXFLAGS-"-g -O2"}
CC_FOR_BUILD=${CC_FOR_BUILD-gcc}
- BUILD_PREFIX=${build_alias}-
- BUILD_PREFIX_1=${build_alias}-
else
# Set reasonable default values for some tools even if not Canadian.
@@ -1815,13 +1860,10 @@
# This is all going to change when we autoconfiscate...
CC_FOR_BUILD="\$(CC)"
- BUILD_PREFIX=
- BUILD_PREFIX_1=loser-
-
# Extract the first word of "gcc", so it can be a program name with args.
set dummy gcc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1825: checking for $ac_word" >&5
+echo "configure:1867: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -1851,7 +1893,7 @@
# Extract the first word of "cc", so it can be a program name with args.
set dummy cc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1855: checking for $ac_word" >&5
+echo "configure:1897: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -1902,7 +1944,7 @@
# Extract the first word of "cl", so it can be a program name with args.
set dummy cl; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1906: checking for $ac_word" >&5
+echo "configure:1948: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -1934,7 +1976,7 @@
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1938: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:1980: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
ac_ext=c
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
@@ -1945,12 +1987,12 @@
cat > conftest.$ac_ext << EOF
-#line 1949 "configure"
+#line 1991 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-if { (eval echo configure:1954: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:1996: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
ac_cv_prog_cc_works=yes
# If we can't run a trivial program, we are probably using a cross compiler.
if (./conftest; exit) 2>/dev/null; then
@@ -1976,12 +2018,12 @@
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1980: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:2022: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
cross_compiling=$ac_cv_prog_cc_cross
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1985: checking whether we are using GNU C" >&5
+echo "configure:2027: checking whether we are using GNU C" >&5
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -1990,7 +2032,7 @@
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1994: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
@@ -2009,7 +2051,7 @@
ac_save_CFLAGS="$CFLAGS"
CFLAGS=
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:2013: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:2055: checking whether ${CC-cc} accepts -g" >&5
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2076,7 +2118,7 @@
# Extract the first word of "${ac_tool_prefix}gnatbind", so it can be a program name with args.
set dummy ${ac_tool_prefix}gnatbind; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2080: checking for $ac_word" >&5
+echo "configure:2122: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2108,7 +2150,7 @@
# Extract the first word of "gnatbind", so it can be a program name with args.
set dummy gnatbind; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2112: checking for $ac_word" >&5
+echo "configure:2154: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2141,7 +2183,7 @@
fi
echo $ac_n "checking whether compiler driver understands Ada""... $ac_c" 1>&6
-echo "configure:2145: checking whether compiler driver understands Ada" >&5
+echo "configure:2187: checking whether compiler driver understands Ada" >&5
if eval "test \"`echo '$''{'acx_cv_cc_gcc_supports_ada'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2173,7 +2215,7 @@
fi
echo $ac_n "checking how to compare bootstrapped objects""... $ac_c" 1>&6
-echo "configure:2177: checking how to compare bootstrapped objects" >&5
+echo "configure:2219: checking how to compare bootstrapped objects" >&5
if eval "test \"`echo '$''{'gcc_cv_prog_cmp_skip'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2271,9 +2313,9 @@
CFLAGS="$CFLAGS $gmpinc"
# Check GMP actually works
echo $ac_n "checking for correct version of gmp.h""... $ac_c" 1>&6
-echo "configure:2275: checking for correct version of gmp.h" >&5
+echo "configure:2317: checking for correct version of gmp.h" >&5
cat > conftest.$ac_ext <<EOF
-#line 2277 "configure"
+#line 2319 "configure"
#include "confdefs.h"
#include "gmp.h"
int main() {
@@ -2284,7 +2326,7 @@
; return 0; }
EOF
-if { (eval echo configure:2288: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2330: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
echo "$ac_t""yes" 1>&6
else
@@ -2297,12 +2339,12 @@
if test x"$have_gmp" = xyes; then
echo $ac_n "checking for MPFR""... $ac_c" 1>&6
-echo "configure:2301: checking for MPFR" >&5
+echo "configure:2343: checking for MPFR" >&5
saved_LIBS="$LIBS"
LIBS="$LIBS $gmplibs"
cat > conftest.$ac_ext <<EOF
-#line 2306 "configure"
+#line 2348 "configure"
#include "confdefs.h"
#include <gmp.h>
#include <mpfr.h>
@@ -2310,7 +2352,7 @@
mpfr_t n; mpfr_init(n);
; return 0; }
EOF
-if { (eval echo configure:2314: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2356: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
echo "$ac_t""yes" 1>&6
else
@@ -2494,6 +2536,14 @@
ac_configure_args=`echo " $ac_configure_args" | sed -e 's/ --enable-languages=[^ ]*//' -e 's/$/ --enable-languages='"$enable_languages"/ `
fi
+# Handle --disable-<component> generically.
+for dir in $configdirs $build_configdirs $target_configdirs ; do
+ dirname=`echo $dir | sed -e s/target-//g -e s/build-//g -e s/-/_/g`
+ if eval test x\${enable_${dirname}} "=" xno ; then
+ noconfigdirs="$noconfigdirs $dir"
+ fi
+done
+
# Remove the entries in $skipdirs and $noconfigdirs from $configdirs,
# $build_configdirs and $target_configdirs.
# If we have the source for $noconfigdirs entries, add them to $notsupp.
@@ -2670,6 +2720,39 @@
fi
fi
+# Set with_gnu_as and with_gnu_ld as appropriate.
+#
+# This is done by determining whether or not the appropriate directory
+# is available, and by checking whether or not specific configurations
+# have requested that this magic not happen.
+#
+# The command line options always override the explicit settings in
+# configure.in, and the settings in configure.in override this magic.
+#
+# If the default for a toolchain is to use GNU as and ld, and you don't
+# want to do that, then you should use the --without-gnu-as and
+# --without-gnu-ld options for the configure script.
+
+if test x${use_gnu_as} = x &&
+ echo " ${configdirs} " | grep " gas " > /dev/null 2>&1 ; then
+ with_gnu_as=yes
+ extra_host_args="$extra_host_args --with-gnu-as"
+fi
+
+if test x${use_gnu_ld} = x &&
+ echo " ${configdirs} " | grep " ld " > /dev/null 2>&1 ; then
+ with_gnu_ld=yes
+ extra_host_args="$extra_host_args --with-gnu-ld"
+fi
+
+# If using newlib, add --with-newlib to the extra_host_args so that gcc/configure
+# can detect this case.
+
+if test x${with_newlib} != xno && echo " ${target_configdirs} " | grep " target-newlib " > /dev/null 2>&1 ; then
+ with_newlib=yes
+ extra_host_args="$extra_host_args --with-newlib"
+fi
+
# Handle ${copy_dirs}
set fnord ${copy_dirs}
shift
@@ -2701,6 +2784,55 @@
shift; shift
done
+# Determine a target-dependent exec_prefix that the installed
+# gcc will search in. Keep this list sorted by triplet, with
+# the *-*-osname triplets last.
+md_exec_prefix=
+case "${target}" in
+ alpha*-*-*vms*)
+ md_exec_prefix=/gnu/lib/gcc-lib
+ ;;
+ i3456786-pc-msdosdjgpp*)
+ md_exec_prefix=/dev/env/DJDIR/bin
+ ;;
+ i3456786-*-sco3.2v5*)
+ if test $with_gnu_as = yes; then
+ md_exec_prefix=/usr/gnu/bin
+ else
+ md_exec_prefix=/usr/ccs/bin/elf
+ fi
+ ;;
+
+ mn10300-*-* | \
+ powerpc-*-chorusos* | \
+ powerpc*-*-eabi* | \
+ powerpc*-*-sysv* | \
+ powerpc*-*-kaos* | \
+ s390x-ibm-tpf*)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+ sparc64-*-elf*)
+ ;;
+ v850*-*-*)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+ xtensa-*-elf*)
+ ;;
+
+ *-*-beos* | \
+ *-*-elf* | \
+ *-*-hpux* | \
+ *-*-netware* | \
+ *-*-nto-qnx* | \
+ *-*-rtems* | \
+ *-*-solaris2* | \
+ *-*-sysv45* | \
+ *-*-vxworks* | \
+ *-wrs-windiss)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+esac
+
extra_arflags_for_target=
extra_nmflags_for_target=
extra_ranlibflags_for_target=
@@ -2758,39 +2890,6 @@
;;
esac
-# Set with_gnu_as and with_gnu_ld as appropriate.
-#
-# This is done by determining whether or not the appropriate directory
-# is available, and by checking whether or not specific configurations
-# have requested that this magic not happen.
-#
-# The command line options always override the explicit settings in
-# configure.in, and the settings in configure.in override this magic.
-#
-# If the default for a toolchain is to use GNU as and ld, and you don't
-# want to do that, then you should use the --without-gnu-as and
-# --without-gnu-ld options for the configure script.
-
-if test x${use_gnu_as} = x &&
- echo " ${configdirs} " | grep " gas " > /dev/null 2>&1 ; then
- with_gnu_as=yes
- extra_host_args="$extra_host_args --with-gnu-as"
-fi
-
-if test x${use_gnu_ld} = x &&
- echo " ${configdirs} " | grep " ld " > /dev/null 2>&1 ; then
- with_gnu_ld=yes
- extra_host_args="$extra_host_args --with-gnu-ld"
-fi
-
-# If using newlib, add --with-newlib to the extra_host_args so that gcc/configure
-# can detect this case.
-
-if test x${with_newlib} != xno && echo " ${target_configdirs} " | grep " target-newlib " > /dev/null 2>&1 ; then
- with_newlib=yes
- extra_host_args="$extra_host_args --with-newlib"
-fi
-
# Default to using --with-stabs for certain targets.
if test x${with_stabs} = x ; then
case "${target}" in
@@ -2952,27 +3051,26 @@
case "$have_compiler:$host:$target:$enable_bootstrap" in
*:*:*:no) ;;
- # Default behavior. (We'll) enable bootstrap if we have a compiler
+ # Default behavior. Enable bootstrap if we have a compiler
# and we are in a native configuration.
yes:$build:$build:default)
- # This will become 'yes'
- enable_bootstrap=no ;;
+ enable_bootstrap=yes ;;
*:*:*:default)
enable_bootstrap=no ;;
# We have a compiler and we are in a native configuration, bootstrap is ok
- yes:$build:$build:yes | yes:$build:$build:lean)
+ yes:$build:$build:yes)
;;
# Other configurations, but we have a compiler. Assume the user knows
# what he's doing.
- yes:*:*:yes | yes:*:*:lean)
+ yes:*:*:yes)
echo "configure: warning: trying to bootstrap a cross compiler" 1>&2
;;
# No compiler: if they passed --enable-bootstrap explicitly, fail
- no:*:*:yes | no:*:*:lean)
+ no:*:*:yes)
{ echo "configure: error: cannot bootstrap without a compiler" 1>&2; exit 1; } ;;
# Fail if wrong command line
@@ -2984,16 +3082,11 @@
# Adjust the toplevel makefile according to whether bootstrap was selected.
case "$enable_bootstrap" in
yes)
- bootstrap_lean='#'
bootstrap_suffix=bootstrap ;;
- lean)
- bootstrap_lean=''
- bootstrap_suffix=bootstrap ;;
no)
bootstrap_suffix=no-bootstrap ;;
esac
-
for module in ${build_configdirs} ; do
if test -z "${no_recursion}" \
&& test -f ${build_subdir}/${module}/Makefile; then
@@ -3007,10 +3100,13 @@
/^@endif build-$module-$bootstrap_suffix\$/d"
done
for module in ${configdirs} ; do
- if test -z "${no_recursion}" \
- && test -f ${module}/Makefile; then
- echo 1>&2 "*** removing ${module}/Makefile to force reconfigure"
- rm -f ${module}/Makefile
+ if test -z "${no_recursion}"; then
+ for file in stage*-${module}/Makefile ${module}/Makefile; do
+ if test -f ${file}; then
+ echo 1>&2 "*** removing ${file} to force reconfigure"
+ rm -f ${file}
+ fi
+ done
fi
extrasub="$extrasub
/^@if $module\$/d
@@ -3281,8 +3377,6 @@
-
-
# Build module lists & subconfigure args.
@@ -3309,7 +3403,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3313: checking for $ac_word" >&5
+echo "configure:3407: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3349,7 +3443,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3353: checking for $ac_word" >&5
+echo "configure:3447: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_BISON'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3388,7 +3482,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3392: checking for $ac_word" >&5
+echo "configure:3486: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_M4'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3427,7 +3521,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3431: checking for $ac_word" >&5
+echo "configure:3525: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3467,7 +3561,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3471: checking for $ac_word" >&5
+echo "configure:3565: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_FLEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3506,7 +3600,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3510: checking for $ac_word" >&5
+echo "configure:3604: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_MAKEINFO'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3540,10 +3634,10 @@
*" texinfo "*) MAKEINFO='$$r/$(BUILD_SUBDIR)/texinfo/makeinfo/makeinfo' ;;
*)
- # For an installed makeinfo, we require it to be from texinfo 4.2 or
+ # For an installed makeinfo, we require it to be from texinfo 4.4 or
# higher, else we use the "missing" dummy.
if ${MAKEINFO} --version \
- | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[2-9]|[5-9])' >/dev/null 2>&1; then
+ | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[4-9]|[5-9])' >/dev/null 2>&1; then
:
else
MAKEINFO="$MISSING makeinfo"
@@ -3559,7 +3653,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3563: checking for $ac_word" >&5
+echo "configure:3657: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_EXPECT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3600,7 +3694,7 @@
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3604: checking for $ac_word" >&5
+echo "configure:3698: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RUNTEST'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3648,7 +3742,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3652: checking for $ac_word" >&5
+echo "configure:3746: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3679,7 +3773,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3683: checking for $ac_word" >&5
+echo "configure:3777: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3723,7 +3817,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3727: checking for $ac_word" >&5
+echo "configure:3821: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3754,7 +3848,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3758: checking for $ac_word" >&5
+echo "configure:3852: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3798,7 +3892,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3802: checking for $ac_word" >&5
+echo "configure:3896: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3829,7 +3923,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3833: checking for $ac_word" >&5
+echo "configure:3927: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3873,7 +3967,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3877: checking for $ac_word" >&5
+echo "configure:3971: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3904,7 +3998,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3908: checking for $ac_word" >&5
+echo "configure:4002: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3948,7 +4042,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3952: checking for $ac_word" >&5
+echo "configure:4046: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3979,7 +4073,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3983: checking for $ac_word" >&5
+echo "configure:4077: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4023,7 +4117,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4027: checking for $ac_word" >&5
+echo "configure:4121: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4054,7 +4148,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4058: checking for $ac_word" >&5
+echo "configure:4152: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4098,7 +4192,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4102: checking for $ac_word" >&5
+echo "configure:4196: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4129,7 +4223,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4133: checking for $ac_word" >&5
+echo "configure:4227: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4168,7 +4262,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4172: checking for $ac_word" >&5
+echo "configure:4266: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4199,7 +4293,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4203: checking for $ac_word" >&5
+echo "configure:4297: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4238,7 +4332,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4242: checking for $ac_word" >&5
+echo "configure:4336: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4269,7 +4363,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4273: checking for $ac_word" >&5
+echo "configure:4367: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4313,7 +4407,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4317: checking for $ac_word" >&5
+echo "configure:4411: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4344,7 +4438,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4348: checking for $ac_word" >&5
+echo "configure:4442: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4388,7 +4482,7 @@
# Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4392: checking for $ac_word" >&5
+echo "configure:4486: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4419,7 +4513,7 @@
# Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4423: checking for $ac_word" >&5
+echo "configure:4517: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4465,607 +4559,1070 @@
# Target tools.
- for ncn_progname in ar; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+# Check whether --with-build-time-tools or --without-build-time-tools was given.
+if test "${with_build_time_tools+set}" = set; then
+ withval="$with_build_time_tools"
+ case x"$withval" in
+ x/*) ;;
+ *)
+ with_build_time_tools=
+ echo "configure: warning: argument to --with-build-time-tools must be an absolute path" 1>&2
+ ;;
+ esac
+else
+ with_build_time_tools=
+fi
+
+
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in cc gcc; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:4581: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_CC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_CC_FOR_TARGET"; then
+ for ncn_progname in cc gcc; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4474: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4598: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$AR_FOR_TARGET"; then
- ac_cv_prog_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test.
+ if test -n "$CC_FOR_TARGET"; then
+ ac_cv_prog_CC_FOR_TARGET="$CC_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_AR_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_CC_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-AR_FOR_TARGET="$ac_cv_prog_AR_FOR_TARGET"
-if test -n "$AR_FOR_TARGET"; then
- echo "$ac_t""$AR_FOR_TARGET" 1>&6
+CC_FOR_TARGET="$ac_cv_prog_CC_FOR_TARGET"
+if test -n "$CC_FOR_TARGET"; then
+ echo "$ac_t""$CC_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_AR_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_CC_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4505: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4629: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$AR_FOR_TARGET"; then
- ac_cv_prog_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test.
+ if test -n "$CC_FOR_TARGET"; then
+ ac_cv_prog_CC_FOR_TARGET="$CC_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_AR_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_CC_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-AR_FOR_TARGET="$ac_cv_prog_AR_FOR_TARGET"
-if test -n "$AR_FOR_TARGET"; then
- echo "$ac_t""$AR_FOR_TARGET" 1>&6
+CC_FOR_TARGET="$ac_cv_prog_CC_FOR_TARGET"
+if test -n "$CC_FOR_TARGET"; then
+ echo "$ac_t""$CC_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_AR_FOR_TARGET" && break
-done
-
-if test -z "$ac_cv_prog_AR_FOR_TARGET" ; then
- set dummy ar
+ fi
+ test -n "$ac_cv_prog_CC_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_CC_FOR_TARGET" ; then
+ set dummy cc gcc
if test $build = $target ; then
- AR_FOR_TARGET="$2"
+ CC_FOR_TARGET="$2"
else
- AR_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ CC_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
fi
- for ncn_progname in as; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in c++ g++ cxx gxx; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:4672: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_CXX_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_CXX_FOR_TARGET"; then
+ for ncn_progname in c++ g++ cxx gxx; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4549: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4689: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$AS_FOR_TARGET"; then
- ac_cv_prog_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test.
+ if test -n "$CXX_FOR_TARGET"; then
+ ac_cv_prog_CXX_FOR_TARGET="$CXX_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_AS_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_CXX_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-AS_FOR_TARGET="$ac_cv_prog_AS_FOR_TARGET"
-if test -n "$AS_FOR_TARGET"; then
- echo "$ac_t""$AS_FOR_TARGET" 1>&6
+CXX_FOR_TARGET="$ac_cv_prog_CXX_FOR_TARGET"
+if test -n "$CXX_FOR_TARGET"; then
+ echo "$ac_t""$CXX_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_AS_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_CXX_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4580: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4720: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$AS_FOR_TARGET"; then
- ac_cv_prog_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test.
+ if test -n "$CXX_FOR_TARGET"; then
+ ac_cv_prog_CXX_FOR_TARGET="$CXX_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_AS_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_CXX_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-AS_FOR_TARGET="$ac_cv_prog_AS_FOR_TARGET"
-if test -n "$AS_FOR_TARGET"; then
- echo "$ac_t""$AS_FOR_TARGET" 1>&6
+CXX_FOR_TARGET="$ac_cv_prog_CXX_FOR_TARGET"
+if test -n "$CXX_FOR_TARGET"; then
+ echo "$ac_t""$CXX_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_AS_FOR_TARGET" && break
-done
-
-if test -z "$ac_cv_prog_AS_FOR_TARGET" ; then
- set dummy as
+ fi
+ test -n "$ac_cv_prog_CXX_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_CXX_FOR_TARGET" ; then
+ set dummy c++ g++ cxx gxx
if test $build = $target ; then
- AS_FOR_TARGET="$2"
+ CXX_FOR_TARGET="$2"
else
- AS_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ CXX_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
fi
- for ncn_progname in cc gcc; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in gcc; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:4763: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_GCC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_GCC_FOR_TARGET"; then
+ for ncn_progname in gcc; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4624: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4780: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$CC_FOR_TARGET"; then
- ac_cv_prog_CC_FOR_TARGET="$CC_FOR_TARGET" # Let the user override the test.
+ if test -n "$GCC_FOR_TARGET"; then
+ ac_cv_prog_GCC_FOR_TARGET="$GCC_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_GCC_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-CC_FOR_TARGET="$ac_cv_prog_CC_FOR_TARGET"
-if test -n "$CC_FOR_TARGET"; then
- echo "$ac_t""$CC_FOR_TARGET" 1>&6
+GCC_FOR_TARGET="$ac_cv_prog_GCC_FOR_TARGET"
+if test -n "$GCC_FOR_TARGET"; then
+ echo "$ac_t""$GCC_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_CC_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_GCC_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4655: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4811: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$CC_FOR_TARGET"; then
- ac_cv_prog_CC_FOR_TARGET="$CC_FOR_TARGET" # Let the user override the test.
+ if test -n "$GCC_FOR_TARGET"; then
+ ac_cv_prog_GCC_FOR_TARGET="$GCC_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_GCC_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-CC_FOR_TARGET="$ac_cv_prog_CC_FOR_TARGET"
-if test -n "$CC_FOR_TARGET"; then
- echo "$ac_t""$CC_FOR_TARGET" 1>&6
+GCC_FOR_TARGET="$ac_cv_prog_GCC_FOR_TARGET"
+if test -n "$GCC_FOR_TARGET"; then
+ echo "$ac_t""$GCC_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_CC_FOR_TARGET" && break
-done
+ fi
+ test -n "$ac_cv_prog_GCC_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_GCC_FOR_TARGET" ; then
+ GCC_FOR_TARGET="${CC_FOR_TARGET}"
+fi
-if test -z "$ac_cv_prog_CC_FOR_TARGET" ; then
- set dummy cc gcc
- if test $build = $target ; then
- CC_FOR_TARGET="$2"
- else
- CC_FOR_TARGET="${ncn_target_tool_prefix}$2"
- fi
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in gcj; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:4849: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_GCJ_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
fi
- for ncn_progname in c++ g++ cxx gxx; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+if test -z "$ac_cv_prog_GCJ_FOR_TARGET"; then
+ for ncn_progname in gcj; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4699: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4866: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$CXX_FOR_TARGET"; then
- ac_cv_prog_CXX_FOR_TARGET="$CXX_FOR_TARGET" # Let the user override the test.
+ if test -n "$GCJ_FOR_TARGET"; then
+ ac_cv_prog_GCJ_FOR_TARGET="$GCJ_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CXX_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_GCJ_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-CXX_FOR_TARGET="$ac_cv_prog_CXX_FOR_TARGET"
-if test -n "$CXX_FOR_TARGET"; then
- echo "$ac_t""$CXX_FOR_TARGET" 1>&6
+GCJ_FOR_TARGET="$ac_cv_prog_GCJ_FOR_TARGET"
+if test -n "$GCJ_FOR_TARGET"; then
+ echo "$ac_t""$GCJ_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_CXX_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_GCJ_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4730: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4897: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$CXX_FOR_TARGET"; then
- ac_cv_prog_CXX_FOR_TARGET="$CXX_FOR_TARGET" # Let the user override the test.
+ if test -n "$GCJ_FOR_TARGET"; then
+ ac_cv_prog_GCJ_FOR_TARGET="$GCJ_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CXX_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_GCJ_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-CXX_FOR_TARGET="$ac_cv_prog_CXX_FOR_TARGET"
-if test -n "$CXX_FOR_TARGET"; then
- echo "$ac_t""$CXX_FOR_TARGET" 1>&6
+GCJ_FOR_TARGET="$ac_cv_prog_GCJ_FOR_TARGET"
+if test -n "$GCJ_FOR_TARGET"; then
+ echo "$ac_t""$GCJ_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_CXX_FOR_TARGET" && break
-done
-
-if test -z "$ac_cv_prog_CXX_FOR_TARGET" ; then
- set dummy c++ g++ cxx gxx
+ fi
+ test -n "$ac_cv_prog_GCJ_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_GCJ_FOR_TARGET" ; then
+ set dummy gcj
if test $build = $target ; then
- CXX_FOR_TARGET="$2"
+ GCJ_FOR_TARGET="$2"
else
- CXX_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ GCJ_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
fi
- for ncn_progname in dlltool; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in gfortran; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:4940: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_GFORTRAN_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_GFORTRAN_FOR_TARGET"; then
+ for ncn_progname in gfortran; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4774: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4957: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$DLLTOOL_FOR_TARGET"; then
- ac_cv_prog_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test.
+ if test -n "$GFORTRAN_FOR_TARGET"; then
+ ac_cv_prog_GFORTRAN_FOR_TARGET="$GFORTRAN_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_DLLTOOL_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_GFORTRAN_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-DLLTOOL_FOR_TARGET="$ac_cv_prog_DLLTOOL_FOR_TARGET"
-if test -n "$DLLTOOL_FOR_TARGET"; then
- echo "$ac_t""$DLLTOOL_FOR_TARGET" 1>&6
+GFORTRAN_FOR_TARGET="$ac_cv_prog_GFORTRAN_FOR_TARGET"
+if test -n "$GFORTRAN_FOR_TARGET"; then
+ echo "$ac_t""$GFORTRAN_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_DLLTOOL_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_GFORTRAN_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4805: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:4988: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$DLLTOOL_FOR_TARGET"; then
- ac_cv_prog_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test.
+ if test -n "$GFORTRAN_FOR_TARGET"; then
+ ac_cv_prog_GFORTRAN_FOR_TARGET="$GFORTRAN_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_DLLTOOL_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_GFORTRAN_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-DLLTOOL_FOR_TARGET="$ac_cv_prog_DLLTOOL_FOR_TARGET"
-if test -n "$DLLTOOL_FOR_TARGET"; then
- echo "$ac_t""$DLLTOOL_FOR_TARGET" 1>&6
+GFORTRAN_FOR_TARGET="$ac_cv_prog_GFORTRAN_FOR_TARGET"
+if test -n "$GFORTRAN_FOR_TARGET"; then
+ echo "$ac_t""$GFORTRAN_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
+ fi
+ test -n "$ac_cv_prog_GFORTRAN_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_GFORTRAN_FOR_TARGET" ; then
+ set dummy gfortran
+ if test $build = $target ; then
+ GFORTRAN_FOR_TARGET="$2"
+ else
+ GFORTRAN_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
- test -n "$ac_cv_prog_DLLTOOL_FOR_TARGET" && break
-done
+fi
-if test -z "$ac_cv_prog_DLLTOOL_FOR_TARGET" ; then
- set dummy dlltool
- if test $build = $target ; then
- DLLTOOL_FOR_TARGET="$2"
+
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ echo "#! /bin/sh" >conf$$.sh
+ echo "exit 0" >>conf$$.sh
+ chmod +x conf$$.sh
+ if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+ PATH_SEPARATOR=';'
else
- DLLTOOL_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ PATH_SEPARATOR=:
fi
+ rm -f conf$$.sh
fi
- for ncn_progname in gcc; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+
+
+if test "x$exec_prefix" = xNONE; then
+ if test "x$prefix" = xNONE; then
+ gcc_cv_tool_prefix=$ac_default_prefix
+ else
+ gcc_cv_tool_prefix=$prefix
+ fi
+else
+ gcc_cv_tool_prefix=$exec_prefix
+fi
+
+# If there is no compiler in the tree, use the PATH only. In any
+# case, if there is no compiler in the tree nobody should use
+# AS_FOR_TARGET and LD_FOR_TARGET.
+if test x$host = x$build && test -f $srcdir/gcc/BASE-VER; then
+ gcc_version=`cat $srcdir/gcc/BASE-VER`
+ gcc_cv_tool_dirs="$gcc_cv_tool_prefix/libexec/gcc/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/libexec/gcc/$target_noncanonical$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs/usr/lib/gcc/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs/usr/lib/gcc/$target_noncanonical$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/$target_noncanonical/bin/$target_noncanonical/$gcc_version$PATH_SEPARATOR"
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$gcc_cv_tool_prefix/$target_noncanonical/bin$PATH_SEPARATOR"
+else
+ gcc_cv_tool_dirs=
+fi
+
+if test x$build = x$target && test -n "$md_exec_prefix"; then
+ gcc_cv_tool_dirs="$gcc_cv_tool_dirs$md_exec_prefix$PATH_SEPARATOR"
+fi
+
+
+
+cat > conftest.c << \EOF
+#ifdef __GNUC__
+ gcc_yay;
+#endif
+EOF
+if ($GCC_FOR_TARGET -E conftest.c | grep gcc_yay) > /dev/null 2>&1; then
+ have_gcc_for_target=yes
+else
+ GCC_FOR_TARGET=${ncn_target_tool_prefix}gcc
+ have_gcc_for_target=no
+fi
+rm conftest.c
+
+
+
+
+if test -z "$ac_cv_path_AR_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for ar in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5095: checking for ar in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/ar; then
+ AR_FOR_TARGET=`cd $with_build_time_tools && pwd`/ar
+ ac_cv_path_AR_FOR_TARGET=$AR_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_AR_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ AR_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=ar`
+ test $AR_FOR_TARGET=ar && AR_FOR_TARGET=
+ ac_cv_path_AR_FOR_TARGET=$AR_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_AR_FOR_TARGET" ; then
+ # Extract the first word of "ar", so it can be a program name with args.
+set dummy ar; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5113: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_AR_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$AR_FOR_TARGET" in
+ /*)
+ ac_cv_path_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_AR_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+AR_FOR_TARGET="$ac_cv_path_AR_FOR_TARGET"
+if test -n "$AR_FOR_TARGET"; then
+ echo "$ac_t""$AR_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_AR_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in ar; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5150: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_AR_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_AR_FOR_TARGET"; then
+ for ncn_progname in ar; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4849: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5167: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GCC_FOR_TARGET"; then
- ac_cv_prog_GCC_FOR_TARGET="$GCC_FOR_TARGET" # Let the user override the test.
+ if test -n "$AR_FOR_TARGET"; then
+ ac_cv_prog_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GCC_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_AR_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GCC_FOR_TARGET="$ac_cv_prog_GCC_FOR_TARGET"
-if test -n "$GCC_FOR_TARGET"; then
- echo "$ac_t""$GCC_FOR_TARGET" 1>&6
+AR_FOR_TARGET="$ac_cv_prog_AR_FOR_TARGET"
+if test -n "$AR_FOR_TARGET"; then
+ echo "$ac_t""$AR_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_GCC_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_AR_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4880: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5198: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GCC_FOR_TARGET"; then
- ac_cv_prog_GCC_FOR_TARGET="$GCC_FOR_TARGET" # Let the user override the test.
+ if test -n "$AR_FOR_TARGET"; then
+ ac_cv_prog_AR_FOR_TARGET="$AR_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GCC_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_AR_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GCC_FOR_TARGET="$ac_cv_prog_GCC_FOR_TARGET"
-if test -n "$GCC_FOR_TARGET"; then
- echo "$ac_t""$GCC_FOR_TARGET" 1>&6
+AR_FOR_TARGET="$ac_cv_prog_AR_FOR_TARGET"
+if test -n "$AR_FOR_TARGET"; then
+ echo "$ac_t""$AR_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
+ fi
+ test -n "$ac_cv_prog_AR_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_AR_FOR_TARGET" ; then
+ set dummy ar
+ if test $build = $target ; then
+ AR_FOR_TARGET="$2"
+ else
+ AR_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
- test -n "$ac_cv_prog_GCC_FOR_TARGET" && break
-done
+fi
-if test -z "$ac_cv_prog_GCC_FOR_TARGET" ; then
- GCC_FOR_TARGET="${CC_FOR_TARGET}"
+else
+ AR_FOR_TARGET=$ac_cv_path_AR_FOR_TARGET
fi
- for ncn_progname in gcj; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+
+
+
+if test -z "$ac_cv_path_AS_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for as in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5248: checking for as in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/as; then
+ AS_FOR_TARGET=`cd $with_build_time_tools && pwd`/as
+ ac_cv_path_AS_FOR_TARGET=$AS_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_AS_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ AS_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=as`
+ test $AS_FOR_TARGET=as && AS_FOR_TARGET=
+ ac_cv_path_AS_FOR_TARGET=$AS_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_AS_FOR_TARGET" ; then
+ # Extract the first word of "as", so it can be a program name with args.
+set dummy as; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5266: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_AS_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$AS_FOR_TARGET" in
+ /*)
+ ac_cv_path_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_AS_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+AS_FOR_TARGET="$ac_cv_path_AS_FOR_TARGET"
+if test -n "$AS_FOR_TARGET"; then
+ echo "$ac_t""$AS_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_AS_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in as; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5303: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_AS_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_AS_FOR_TARGET"; then
+ for ncn_progname in as; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4919: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5320: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GCJ_FOR_TARGET"; then
- ac_cv_prog_GCJ_FOR_TARGET="$GCJ_FOR_TARGET" # Let the user override the test.
+ if test -n "$AS_FOR_TARGET"; then
+ ac_cv_prog_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GCJ_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_AS_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GCJ_FOR_TARGET="$ac_cv_prog_GCJ_FOR_TARGET"
-if test -n "$GCJ_FOR_TARGET"; then
- echo "$ac_t""$GCJ_FOR_TARGET" 1>&6
+AS_FOR_TARGET="$ac_cv_prog_AS_FOR_TARGET"
+if test -n "$AS_FOR_TARGET"; then
+ echo "$ac_t""$AS_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_GCJ_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_AS_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4950: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5351: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GCJ_FOR_TARGET"; then
- ac_cv_prog_GCJ_FOR_TARGET="$GCJ_FOR_TARGET" # Let the user override the test.
+ if test -n "$AS_FOR_TARGET"; then
+ ac_cv_prog_AS_FOR_TARGET="$AS_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GCJ_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_AS_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GCJ_FOR_TARGET="$ac_cv_prog_GCJ_FOR_TARGET"
-if test -n "$GCJ_FOR_TARGET"; then
- echo "$ac_t""$GCJ_FOR_TARGET" 1>&6
+AS_FOR_TARGET="$ac_cv_prog_AS_FOR_TARGET"
+if test -n "$AS_FOR_TARGET"; then
+ echo "$ac_t""$AS_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_GCJ_FOR_TARGET" && break
-done
-
-if test -z "$ac_cv_prog_GCJ_FOR_TARGET" ; then
- set dummy gcj
+ fi
+ test -n "$ac_cv_prog_AS_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_AS_FOR_TARGET" ; then
+ set dummy as
if test $build = $target ; then
- GCJ_FOR_TARGET="$2"
+ AS_FOR_TARGET="$2"
else
- GCJ_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ AS_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
fi
- for ncn_progname in gfortran; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ AS_FOR_TARGET=$ac_cv_path_AS_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_DLLTOOL_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for dlltool in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5401: checking for dlltool in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/dlltool; then
+ DLLTOOL_FOR_TARGET=`cd $with_build_time_tools && pwd`/dlltool
+ ac_cv_path_DLLTOOL_FOR_TARGET=$DLLTOOL_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_DLLTOOL_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ DLLTOOL_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=dlltool`
+ test $DLLTOOL_FOR_TARGET=dlltool && DLLTOOL_FOR_TARGET=
+ ac_cv_path_DLLTOOL_FOR_TARGET=$DLLTOOL_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_DLLTOOL_FOR_TARGET" ; then
+ # Extract the first word of "dlltool", so it can be a program name with args.
+set dummy dlltool; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5419: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$DLLTOOL_FOR_TARGET" in
+ /*)
+ ac_cv_path_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_DLLTOOL_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+DLLTOOL_FOR_TARGET="$ac_cv_path_DLLTOOL_FOR_TARGET"
+if test -n "$DLLTOOL_FOR_TARGET"; then
+ echo "$ac_t""$DLLTOOL_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_DLLTOOL_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in dlltool; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5456: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_DLLTOOL_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_DLLTOOL_FOR_TARGET"; then
+ for ncn_progname in dlltool; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4994: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5473: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GFORTRAN_FOR_TARGET"; then
- ac_cv_prog_GFORTRAN_FOR_TARGET="$GFORTRAN_FOR_TARGET" # Let the user override the test.
+ if test -n "$DLLTOOL_FOR_TARGET"; then
+ ac_cv_prog_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GFORTRAN_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
+ ac_cv_prog_DLLTOOL_FOR_TARGET="${ncn_target_tool_prefix}${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GFORTRAN_FOR_TARGET="$ac_cv_prog_GFORTRAN_FOR_TARGET"
-if test -n "$GFORTRAN_FOR_TARGET"; then
- echo "$ac_t""$GFORTRAN_FOR_TARGET" 1>&6
+DLLTOOL_FOR_TARGET="$ac_cv_prog_DLLTOOL_FOR_TARGET"
+if test -n "$DLLTOOL_FOR_TARGET"; then
+ echo "$ac_t""$DLLTOOL_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_GFORTRAN_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_DLLTOOL_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5025: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
+echo "configure:5504: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
- if test -n "$GFORTRAN_FOR_TARGET"; then
- ac_cv_prog_GFORTRAN_FOR_TARGET="$GFORTRAN_FOR_TARGET" # Let the user override the test.
+ if test -n "$DLLTOOL_FOR_TARGET"; then
+ ac_cv_prog_DLLTOOL_FOR_TARGET="$DLLTOOL_FOR_TARGET" # Let the user override the test.
else
IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
ac_dummy="$PATH"
for ac_dir in $ac_dummy; do
test -z "$ac_dir" && ac_dir=.
if test -f $ac_dir/$ac_word; then
- ac_cv_prog_GFORTRAN_FOR_TARGET="${ncn_progname}"
+ ac_cv_prog_DLLTOOL_FOR_TARGET="${ncn_progname}"
break
fi
done
IFS="$ac_save_ifs"
fi
fi
-GFORTRAN_FOR_TARGET="$ac_cv_prog_GFORTRAN_FOR_TARGET"
-if test -n "$GFORTRAN_FOR_TARGET"; then
- echo "$ac_t""$GFORTRAN_FOR_TARGET" 1>&6
+DLLTOOL_FOR_TARGET="$ac_cv_prog_DLLTOOL_FOR_TARGET"
+if test -n "$DLLTOOL_FOR_TARGET"; then
+ echo "$ac_t""$DLLTOOL_FOR_TARGET" 1>&6
else
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_GFORTRAN_FOR_TARGET" && break
-done
-
-if test -z "$ac_cv_prog_GFORTRAN_FOR_TARGET" ; then
- set dummy gfortran
+ fi
+ test -n "$ac_cv_prog_DLLTOOL_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_DLLTOOL_FOR_TARGET" ; then
+ set dummy dlltool
if test $build = $target ; then
- GFORTRAN_FOR_TARGET="$2"
+ DLLTOOL_FOR_TARGET="$2"
else
- GFORTRAN_FOR_TARGET="${ncn_target_tool_prefix}$2"
+ DLLTOOL_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
fi
- for ncn_progname in ld; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ DLLTOOL_FOR_TARGET=$ac_cv_path_DLLTOOL_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_LD_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for ld in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5554: checking for ld in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/ld; then
+ LD_FOR_TARGET=`cd $with_build_time_tools && pwd`/ld
+ ac_cv_path_LD_FOR_TARGET=$LD_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_LD_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ LD_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=ld`
+ test $LD_FOR_TARGET=ld && LD_FOR_TARGET=
+ ac_cv_path_LD_FOR_TARGET=$LD_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_LD_FOR_TARGET" ; then
+ # Extract the first word of "ld", so it can be a program name with args.
+set dummy ld; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5572: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_LD_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$LD_FOR_TARGET" in
+ /*)
+ ac_cv_path_LD_FOR_TARGET="$LD_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_LD_FOR_TARGET="$LD_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_LD_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+LD_FOR_TARGET="$ac_cv_path_LD_FOR_TARGET"
+if test -n "$LD_FOR_TARGET"; then
+ echo "$ac_t""$LD_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_LD_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in ld; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5609: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_LD_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_LD_FOR_TARGET"; then
+ for ncn_progname in ld; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5069: checking for $ac_word" >&5
+echo "configure:5626: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5091,12 +5648,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_LD_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_LD_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5100: checking for $ac_word" >&5
+echo "configure:5657: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5122,10 +5679,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_LD_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_LD_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_LD_FOR_TARGET" ; then
set dummy ld
if test $build = $target ; then
@@ -5135,12 +5693,89 @@
fi
fi
- for ncn_progname in lipo; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ LD_FOR_TARGET=$ac_cv_path_LD_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_LIPO_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for lipo in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5707: checking for lipo in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/lipo; then
+ LIPO_FOR_TARGET=`cd $with_build_time_tools && pwd`/lipo
+ ac_cv_path_LIPO_FOR_TARGET=$LIPO_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_LIPO_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ LIPO_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=lipo`
+ test $LIPO_FOR_TARGET=lipo && LIPO_FOR_TARGET=
+ ac_cv_path_LIPO_FOR_TARGET=$LIPO_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_LIPO_FOR_TARGET" ; then
+ # Extract the first word of "lipo", so it can be a program name with args.
+set dummy lipo; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5725: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_LIPO_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$LIPO_FOR_TARGET" in
+ /*)
+ ac_cv_path_LIPO_FOR_TARGET="$LIPO_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_LIPO_FOR_TARGET="$LIPO_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_LIPO_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+LIPO_FOR_TARGET="$ac_cv_path_LIPO_FOR_TARGET"
+if test -n "$LIPO_FOR_TARGET"; then
+ echo "$ac_t""$LIPO_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_LIPO_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in lipo; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5762: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_LIPO_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_LIPO_FOR_TARGET"; then
+ for ncn_progname in lipo; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5144: checking for $ac_word" >&5
+echo "configure:5779: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5166,12 +5801,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_LIPO_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_LIPO_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5175: checking for $ac_word" >&5
+echo "configure:5810: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5197,10 +5832,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_LIPO_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_LIPO_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_LIPO_FOR_TARGET" ; then
set dummy lipo
if test $build = $target ; then
@@ -5210,12 +5846,89 @@
fi
fi
- for ncn_progname in nm; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ LIPO_FOR_TARGET=$ac_cv_path_LIPO_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_NM_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for nm in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5860: checking for nm in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/nm; then
+ NM_FOR_TARGET=`cd $with_build_time_tools && pwd`/nm
+ ac_cv_path_NM_FOR_TARGET=$NM_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_NM_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ NM_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=nm`
+ test $NM_FOR_TARGET=nm && NM_FOR_TARGET=
+ ac_cv_path_NM_FOR_TARGET=$NM_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_NM_FOR_TARGET" ; then
+ # Extract the first word of "nm", so it can be a program name with args.
+set dummy nm; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:5878: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_NM_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$NM_FOR_TARGET" in
+ /*)
+ ac_cv_path_NM_FOR_TARGET="$NM_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_NM_FOR_TARGET="$NM_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_NM_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+NM_FOR_TARGET="$ac_cv_path_NM_FOR_TARGET"
+if test -n "$NM_FOR_TARGET"; then
+ echo "$ac_t""$NM_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_NM_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in nm; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:5915: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_NM_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_NM_FOR_TARGET"; then
+ for ncn_progname in nm; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5219: checking for $ac_word" >&5
+echo "configure:5932: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5241,12 +5954,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_NM_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_NM_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5250: checking for $ac_word" >&5
+echo "configure:5963: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5272,10 +5985,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_NM_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_NM_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_NM_FOR_TARGET" ; then
set dummy nm
if test $build = $target ; then
@@ -5285,12 +5999,89 @@
fi
fi
- for ncn_progname in objdump; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ NM_FOR_TARGET=$ac_cv_path_NM_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_OBJDUMP_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for objdump in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6013: checking for objdump in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/objdump; then
+ OBJDUMP_FOR_TARGET=`cd $with_build_time_tools && pwd`/objdump
+ ac_cv_path_OBJDUMP_FOR_TARGET=$OBJDUMP_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_OBJDUMP_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ OBJDUMP_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=objdump`
+ test $OBJDUMP_FOR_TARGET=objdump && OBJDUMP_FOR_TARGET=
+ ac_cv_path_OBJDUMP_FOR_TARGET=$OBJDUMP_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_OBJDUMP_FOR_TARGET" ; then
+ # Extract the first word of "objdump", so it can be a program name with args.
+set dummy objdump; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:6031: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$OBJDUMP_FOR_TARGET" in
+ /*)
+ ac_cv_path_OBJDUMP_FOR_TARGET="$OBJDUMP_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_OBJDUMP_FOR_TARGET="$OBJDUMP_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_OBJDUMP_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+OBJDUMP_FOR_TARGET="$ac_cv_path_OBJDUMP_FOR_TARGET"
+if test -n "$OBJDUMP_FOR_TARGET"; then
+ echo "$ac_t""$OBJDUMP_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_OBJDUMP_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in objdump; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6068: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_OBJDUMP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_OBJDUMP_FOR_TARGET"; then
+ for ncn_progname in objdump; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5294: checking for $ac_word" >&5
+echo "configure:6085: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5316,12 +6107,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_OBJDUMP_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_OBJDUMP_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5325: checking for $ac_word" >&5
+echo "configure:6116: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5347,10 +6138,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_OBJDUMP_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_OBJDUMP_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_OBJDUMP_FOR_TARGET" ; then
set dummy objdump
if test $build = $target ; then
@@ -5360,12 +6152,89 @@
fi
fi
- for ncn_progname in ranlib; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ OBJDUMP_FOR_TARGET=$ac_cv_path_OBJDUMP_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_RANLIB_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for ranlib in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6166: checking for ranlib in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/ranlib; then
+ RANLIB_FOR_TARGET=`cd $with_build_time_tools && pwd`/ranlib
+ ac_cv_path_RANLIB_FOR_TARGET=$RANLIB_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_RANLIB_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ RANLIB_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=ranlib`
+ test $RANLIB_FOR_TARGET=ranlib && RANLIB_FOR_TARGET=
+ ac_cv_path_RANLIB_FOR_TARGET=$RANLIB_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_RANLIB_FOR_TARGET" ; then
+ # Extract the first word of "ranlib", so it can be a program name with args.
+set dummy ranlib; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:6184: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_RANLIB_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$RANLIB_FOR_TARGET" in
+ /*)
+ ac_cv_path_RANLIB_FOR_TARGET="$RANLIB_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_RANLIB_FOR_TARGET="$RANLIB_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_RANLIB_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+RANLIB_FOR_TARGET="$ac_cv_path_RANLIB_FOR_TARGET"
+if test -n "$RANLIB_FOR_TARGET"; then
+ echo "$ac_t""$RANLIB_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_RANLIB_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in ranlib; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6221: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_RANLIB_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_RANLIB_FOR_TARGET"; then
+ for ncn_progname in ranlib; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5369: checking for $ac_word" >&5
+echo "configure:6238: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5391,12 +6260,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_RANLIB_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_RANLIB_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5400: checking for $ac_word" >&5
+echo "configure:6269: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5422,20 +6291,103 @@
echo "$ac_t""no" 1>&6
fi
+ fi
+ test -n "$ac_cv_prog_RANLIB_FOR_TARGET" && break
+ done
+fi
+
+if test -z "$ac_cv_prog_RANLIB_FOR_TARGET" ; then
+ set dummy ranlib
+ if test $build = $target ; then
+ RANLIB_FOR_TARGET="$2"
+ else
+ RANLIB_FOR_TARGET="${ncn_target_tool_prefix}$2"
fi
- test -n "$ac_cv_prog_RANLIB_FOR_TARGET" && break
-done
+fi
-if test -z "$ac_cv_prog_RANLIB_FOR_TARGET" ; then
- RANLIB_FOR_TARGET=":"
+else
+ RANLIB_FOR_TARGET=$ac_cv_path_RANLIB_FOR_TARGET
fi
- for ncn_progname in strip; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+
+
+
+if test -z "$ac_cv_path_STRIP_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for strip in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6319: checking for strip in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/strip; then
+ STRIP_FOR_TARGET=`cd $with_build_time_tools && pwd`/strip
+ ac_cv_path_STRIP_FOR_TARGET=$STRIP_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_STRIP_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ STRIP_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=strip`
+ test $STRIP_FOR_TARGET=strip && STRIP_FOR_TARGET=
+ ac_cv_path_STRIP_FOR_TARGET=$STRIP_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_STRIP_FOR_TARGET" ; then
+ # Extract the first word of "strip", so it can be a program name with args.
+set dummy strip; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:6337: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_STRIP_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$STRIP_FOR_TARGET" in
+ /*)
+ ac_cv_path_STRIP_FOR_TARGET="$STRIP_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_STRIP_FOR_TARGET="$STRIP_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_STRIP_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+STRIP_FOR_TARGET="$ac_cv_path_STRIP_FOR_TARGET"
+if test -n "$STRIP_FOR_TARGET"; then
+ echo "$ac_t""$STRIP_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_STRIP_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in strip; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6374: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_STRIP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_STRIP_FOR_TARGET"; then
+ for ncn_progname in strip; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5439: checking for $ac_word" >&5
+echo "configure:6391: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5461,12 +6413,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_STRIP_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_STRIP_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5470: checking for $ac_word" >&5
+echo "configure:6422: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5492,10 +6444,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_STRIP_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_STRIP_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_STRIP_FOR_TARGET" ; then
set dummy strip
if test $build = $target ; then
@@ -5505,12 +6458,89 @@
fi
fi
- for ncn_progname in windres; do
- if test -n "$ncn_target_tool_prefix"; then
- # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
+else
+ STRIP_FOR_TARGET=$ac_cv_path_STRIP_FOR_TARGET
+fi
+
+
+
+
+if test -z "$ac_cv_path_WINDRES_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ echo $ac_n "checking for windres in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6472: checking for windres in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/windres; then
+ WINDRES_FOR_TARGET=`cd $with_build_time_tools && pwd`/windres
+ ac_cv_path_WINDRES_FOR_TARGET=$WINDRES_FOR_TARGET
+ echo "$ac_t""$ac_cv_path_WINDRES_FOR_TARGET" 1>&6
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ elif test $build != $host && test $have_gcc_for_target = yes; then
+ WINDRES_FOR_TARGET=`$GCC_FOR_TARGET --print-prog-name=windres`
+ test $WINDRES_FOR_TARGET=windres && WINDRES_FOR_TARGET=
+ ac_cv_path_WINDRES_FOR_TARGET=$WINDRES_FOR_TARGET
+ fi
+fi
+if test -z "$ac_cv_path_WINDRES_FOR_TARGET" ; then
+ # Extract the first word of "windres", so it can be a program name with args.
+set dummy windres; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:6490: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_WINDRES_FOR_TARGET'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$WINDRES_FOR_TARGET" in
+ /*)
+ ac_cv_path_WINDRES_FOR_TARGET="$WINDRES_FOR_TARGET" # Let the user override the test with a path.
+ ;;
+ ?:/*)
+ ac_cv_path_WINDRES_FOR_TARGET="$WINDRES_FOR_TARGET" # Let the user override the test with a dos path.
+ ;;
+ *)
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$gcc_cv_tool_dirs"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_path_WINDRES_FOR_TARGET="$ac_dir/$ac_word"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ ;;
+esac
+fi
+WINDRES_FOR_TARGET="$ac_cv_path_WINDRES_FOR_TARGET"
+if test -n "$WINDRES_FOR_TARGET"; then
+ echo "$ac_t""$WINDRES_FOR_TARGET" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+fi
+if test -z "$ac_cv_path_WINDRES_FOR_TARGET" ; then
+ if test -n "$with_build_time_tools"; then
+ for ncn_progname in windres; do
+ echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
+echo "configure:6527: checking for ${ncn_progname} in $with_build_time_tools" >&5
+ if test -x $with_build_time_tools/${ncn_progname}; then
+ ac_cv_prog_WINDRES_FOR_TARGET=$with_build_time_tools/${ncn_progname}
+ echo "$ac_t""yes" 1>&6
+ break
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ done
+fi
+
+if test -z "$ac_cv_prog_WINDRES_FOR_TARGET"; then
+ for ncn_progname in windres; do
+ if test -n "$ncn_target_tool_prefix"; then
+ # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5514: checking for $ac_word" >&5
+echo "configure:6544: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5536,12 +6566,12 @@
echo "$ac_t""no" 1>&6
fi
- fi
- if test -z "$ac_cv_prog_WINDRES_FOR_TARGET" && test $build = $target ; then
- # Extract the first word of "${ncn_progname}", so it can be a program name with args.
+ fi
+ if test -z "$ac_cv_prog_WINDRES_FOR_TARGET" && test $build = $target ; then
+ # Extract the first word of "${ncn_progname}", so it can be a program name with args.
set dummy ${ncn_progname}; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5545: checking for $ac_word" >&5
+echo "configure:6575: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5567,10 +6597,11 @@
echo "$ac_t""no" 1>&6
fi
- fi
- test -n "$ac_cv_prog_WINDRES_FOR_TARGET" && break
-done
-
+ fi
+ test -n "$ac_cv_prog_WINDRES_FOR_TARGET" && break
+ done
+fi
+
if test -z "$ac_cv_prog_WINDRES_FOR_TARGET" ; then
set dummy windres
if test $build = $target ; then
@@ -5580,14 +6611,23 @@
fi
fi
+else
+ WINDRES_FOR_TARGET=$ac_cv_path_WINDRES_FOR_TARGET
+fi
+
RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
echo $ac_n "checking where to find the target ar""... $ac_c" 1>&6
-echo "configure:5588: checking where to find the target ar" >&5
+echo "configure:6623: checking where to find the target ar" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$AR_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $AR_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5599,6 +6639,9 @@
# An in-tree tool is available and we can use it
AR_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/ar'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$AR_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $AR_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
AR_FOR_TARGET='$(AR)'
@@ -5609,10 +6652,15 @@
fi
fi
echo $ac_n "checking where to find the target as""... $ac_c" 1>&6
-echo "configure:5613: checking where to find the target as" >&5
+echo "configure:6656: checking where to find the target as" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$AS_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $AS_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5624,6 +6672,9 @@
# An in-tree tool is available and we can use it
AS_FOR_TARGET='$$r/$(HOST_SUBDIR)/gas/as-new'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$AS_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $AS_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
AS_FOR_TARGET='$(AS)'
@@ -5634,10 +6685,15 @@
fi
fi
echo $ac_n "checking where to find the target cc""... $ac_c" 1>&6
-echo "configure:5638: checking where to find the target cc" >&5
+echo "configure:6689: checking where to find the target cc" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$CC_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $CC_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5649,6 +6705,9 @@
# An in-tree tool is available and we can use it
CC_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/xgcc -B$$r/$(HOST_SUBDIR)/gcc/'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$CC_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $CC_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
CC_FOR_TARGET='$(CC)'
@@ -5659,10 +6718,15 @@
fi
fi
echo $ac_n "checking where to find the target c++""... $ac_c" 1>&6
-echo "configure:5663: checking where to find the target c++" >&5
+echo "configure:6722: checking where to find the target c++" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$CXX_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $CXX_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5677,6 +6741,9 @@
# An in-tree tool is available and we can use it
CXX_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/g++ -B$$r/$(HOST_SUBDIR)/gcc/ -nostdinc++ `test ! -f $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags || $(SHELL) $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags --build-includes` -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src/.libs'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$CXX_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $CXX_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
CXX_FOR_TARGET='$(CXX)'
@@ -5687,10 +6754,15 @@
fi
fi
echo $ac_n "checking where to find the target c++ for libstdc++""... $ac_c" 1>&6
-echo "configure:5691: checking where to find the target c++ for libstdc++" >&5
+echo "configure:6758: checking where to find the target c++ for libstdc++" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$RAW_CXX_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $RAW_CXX_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5705,6 +6777,9 @@
# An in-tree tool is available and we can use it
RAW_CXX_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/xgcc -shared-libgcc -B$$r/$(HOST_SUBDIR)/gcc -nostdinc++ -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src/.libs'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$RAW_CXX_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $RAW_CXX_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
RAW_CXX_FOR_TARGET='$(CXX)'
@@ -5715,10 +6790,15 @@
fi
fi
echo $ac_n "checking where to find the target dlltool""... $ac_c" 1>&6
-echo "configure:5719: checking where to find the target dlltool" >&5
+echo "configure:6794: checking where to find the target dlltool" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$DLLTOOL_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $DLLTOOL_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5730,6 +6810,9 @@
# An in-tree tool is available and we can use it
DLLTOOL_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/dlltool'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$DLLTOOL_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $DLLTOOL_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
DLLTOOL_FOR_TARGET='$(DLLTOOL)'
@@ -5740,10 +6823,15 @@
fi
fi
echo $ac_n "checking where to find the target gcc""... $ac_c" 1>&6
-echo "configure:5744: checking where to find the target gcc" >&5
+echo "configure:6827: checking where to find the target gcc" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$GCC_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GCC_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5755,6 +6843,9 @@
# An in-tree tool is available and we can use it
GCC_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/xgcc -B$$r/$(HOST_SUBDIR)/gcc/'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$GCC_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GCC_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
GCC_FOR_TARGET='$()'
@@ -5765,10 +6856,15 @@
fi
fi
echo $ac_n "checking where to find the target gcj""... $ac_c" 1>&6
-echo "configure:5769: checking where to find the target gcj" >&5
+echo "configure:6860: checking where to find the target gcj" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$GCJ_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GCJ_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5783,6 +6879,9 @@
# An in-tree tool is available and we can use it
GCJ_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/gcj -B$$r/$(HOST_SUBDIR)/gcc/'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$GCJ_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GCJ_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
GCJ_FOR_TARGET='$(GCJ)'
@@ -5793,10 +6892,15 @@
fi
fi
echo $ac_n "checking where to find the target gfortran""... $ac_c" 1>&6
-echo "configure:5797: checking where to find the target gfortran" >&5
+echo "configure:6896: checking where to find the target gfortran" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$GFORTRAN_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GFORTRAN_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5811,6 +6915,9 @@
# An in-tree tool is available and we can use it
GFORTRAN_FOR_TARGET='$$r/$(HOST_SUBDIR)/gcc/gfortran -B$$r/$(HOST_SUBDIR)/gcc/'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$GFORTRAN_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $GFORTRAN_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
GFORTRAN_FOR_TARGET='$(GFORTRAN)'
@@ -5821,10 +6928,15 @@
fi
fi
echo $ac_n "checking where to find the target ld""... $ac_c" 1>&6
-echo "configure:5825: checking where to find the target ld" >&5
+echo "configure:6932: checking where to find the target ld" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$LD_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $LD_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5836,6 +6948,9 @@
# An in-tree tool is available and we can use it
LD_FOR_TARGET='$$r/$(HOST_SUBDIR)/ld/ld-new'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$LD_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $LD_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
LD_FOR_TARGET='$(LD)'
@@ -5846,12 +6961,20 @@
fi
fi
echo $ac_n "checking where to find the target lipo""... $ac_c" 1>&6
-echo "configure:5850: checking where to find the target lipo" >&5
+echo "configure:6965: checking where to find the target lipo" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$LIPO_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $LIPO_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
- if test "x$target" = "x$host"; then
+ if expr "x$LIPO_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $LIPO_FOR_TARGET`" 1>&6
+ elif test "x$target" = "x$host"; then
# We can use an host tool
LIPO_FOR_TARGET='$(LIPO)'
echo "$ac_t""host tool" 1>&6
@@ -5861,10 +6984,15 @@
fi
fi
echo $ac_n "checking where to find the target nm""... $ac_c" 1>&6
-echo "configure:5865: checking where to find the target nm" >&5
+echo "configure:6988: checking where to find the target nm" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$NM_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $NM_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5876,6 +7004,9 @@
# An in-tree tool is available and we can use it
NM_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/nm-new'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$NM_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $NM_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
NM_FOR_TARGET='$(NM)'
@@ -5886,10 +7017,15 @@
fi
fi
echo $ac_n "checking where to find the target objdump""... $ac_c" 1>&6
-echo "configure:5890: checking where to find the target objdump" >&5
+echo "configure:7021: checking where to find the target objdump" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$OBJDUMP_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $OBJDUMP_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5901,6 +7037,9 @@
# An in-tree tool is available and we can use it
OBJDUMP_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/objdump'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$OBJDUMP_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $OBJDUMP_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
OBJDUMP_FOR_TARGET='$(OBJDUMP)'
@@ -5911,10 +7050,15 @@
fi
fi
echo $ac_n "checking where to find the target ranlib""... $ac_c" 1>&6
-echo "configure:5915: checking where to find the target ranlib" >&5
+echo "configure:7054: checking where to find the target ranlib" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$RANLIB_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $RANLIB_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5926,6 +7070,9 @@
# An in-tree tool is available and we can use it
RANLIB_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/ranlib'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$RANLIB_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $RANLIB_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
RANLIB_FOR_TARGET='$(RANLIB)'
@@ -5936,10 +7083,15 @@
fi
fi
echo $ac_n "checking where to find the target strip""... $ac_c" 1>&6
-echo "configure:5940: checking where to find the target strip" >&5
+echo "configure:7087: checking where to find the target strip" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$STRIP_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $STRIP_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5951,6 +7103,9 @@
# An in-tree tool is available and we can use it
STRIP_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/strip'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$STRIP_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $STRIP_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
STRIP_FOR_TARGET='$(STRIP)'
@@ -5961,10 +7116,15 @@
fi
fi
echo $ac_n "checking where to find the target windres""... $ac_c" 1>&6
-echo "configure:5965: checking where to find the target windres" >&5
+echo "configure:7120: checking where to find the target windres" >&5
if test "x${build}" != "x${host}" ; then
- # Canadian cross, just use what we found
- echo "$ac_t""pre-installed" 1>&6
+ if expr "x$WINDRES_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $WINDRES_FOR_TARGET`" 1>&6
+ else
+ # Canadian cross, just use what we found
+ echo "$ac_t""pre-installed" 1>&6
+ fi
else
ok=yes
case " ${configdirs} " in
@@ -5976,6 +7136,9 @@
# An in-tree tool is available and we can use it
WINDRES_FOR_TARGET='$$r/$(HOST_SUBDIR)/binutils/windres'
echo "$ac_t""just compiled" 1>&6
+ elif expr "x$WINDRES_FOR_TARGET" : "x/" > /dev/null; then
+ # We already found the complete path
+ echo "$ac_t""pre-installed in `dirname $WINDRES_FOR_TARGET`" 1>&6
elif test "x$target" = "x$host"; then
# We can use an host tool
WINDRES_FOR_TARGET='$(WINDRES)'
@@ -6014,7 +7177,7 @@
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:6018: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:7181: checking whether to enable maintainer-specific portions of Makefiles" >&5
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
if test "${enable_maintainer_mode+set}" = set; then
enableval="$enable_maintainer_mode"
@@ -6057,42 +7220,6 @@
esac
-# It makes debugging easier if we create as symlinks the stage directories
-# gcc for stageN-gcc and stagePREV-gcc for stage(N-1). In case this is not
-# possible, however, we can resort to mv.
-echo $ac_n "checking if symbolic links between directories work""... $ac_c" 1>&6
-echo "configure:6065: checking if symbolic links between directories work" >&5
-if eval "test \"`echo '$''{'gcc_cv_prog_ln_s_dir'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "${LN_S}" = "ln -s" \
- && mkdir confdir.s1 \
- && ln -s confdir.s1 confdir.s2 \
- && echo timestamp1 > confdir.s1/conftest.1 \
- && cmp confdir.s1/conftest.1 confdir.s2/conftest.1 \
- && echo timestamp2 > confdir.s2/conftest.2 \
- && cmp confdir.s1/conftest.2 confdir.s1/conftest.2 \
- && rm -f confdir.s2; then
- gcc_cv_prog_ln_s_dir=yes
-else
- gcc_cv_prog_ln_s_dir=no
-fi
-rm -rf confdir.s1 confdir.s2
-fi
-
-echo "$ac_t""$gcc_cv_prog_ln_s_dir" 1>&6
-
-case ${gcc_cv_prog_ln_s_dir} in
- yes)
- CREATE_LINK_TO_DIR='ln -s $$1 $$2'
- UNDO_LINK_TO_DIR='rm -f $$1' ;;
- *)
- CREATE_LINK_TO_DIR='mv $$1 $$2'
- UNDO_LINK_TO_DIR='mv $$1 $$2' ;;
-esac
-
-
-
# Enable -Werror in bootstrap stage2 and later.
# Change the default to "no" on release branches.
# Check whether --enable-werror or --disable-werror was given.
@@ -6109,6 +7236,38 @@
esac
+# Flags needed to enable html installing and building
+# Check whether --with-datarootdir or --without-datarootdir was given.
+if test "${with_datarootdir+set}" = set; then
+ withval="$with_datarootdir"
+ datarootdir="\${prefix}/${withval}"
+else
+ datarootdir="\${prefix}/share"
+fi
+
+
+# Check whether --with-docdir or --without-docdir was given.
+if test "${with_docdir+set}" = set; then
+ withval="$with_docdir"
+ docdir="\${prefix}/${withval}"
+else
+ docdir="\${datarootdir}/doc"
+fi
+
+
+# Check whether --with-htmldir or --without-htmldir was given.
+if test "${with_htmldir+set}" = set; then
+ withval="$with_htmldir"
+ htmldir="\${prefix}/${withval}"
+else
+ htmldir="\${docdir}"
+fi
+
+
+
+
+
+
trap '' 1 2 15
cat > confcache <<\EOF
# This file is a shell script that caches the results of configure
@@ -6175,15 +7334,34 @@
# Transform confdefs.h into DEFS.
# Protect against shell expansion while executing Makefile rules.
# Protect against Makefile macro expansion.
-cat > conftest.defs <<\EOF
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-s%\[%\\&%g
-s%\]%\\&%g
-s%\$%$$%g
-EOF
-DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-rm -f conftest.defs
+#
+# If the first sed substitution is executed (which looks for macros that
+# take arguments), then we branch to the quote section. Otherwise,
+# look for a macro that doesn't take arguments.
+cat >confdef2opt.sed <<\_ACEOF
+t clear
+: clear
+s,^[ ]*#[ ]*define[ ][ ]*\([^ (][^ (]*([^)]*)\)[ ]*\(.*\),-D\1=\2,g
+t quote
+s,^[ ]*#[ ]*define[ ][ ]*\([^ ][^ ]*\)[ ]*\(.*\),-D\1=\2,g
+t quote
+d
+: quote
+s,[ `~#$^&*(){}\\|;'"<>?],\\&,g
+s,\[,\\&,g
+s,\],\\&,g
+s,\$,$$,g
+p
+_ACEOF
+# We use echo to avoid assuming a particular line-breaking character.
+# The extra dot is to prevent the shell from consuming trailing
+# line-breaks from the sub-command output. A line-break within
+# single-quotes doesn't work because, if this script is created in a
+# platform that uses two characters for line-breaks (e.g., DOS), tr
+# would break.
+ac_LF_and_DOT=`echo; echo .`
+DEFS=`sed -n -f confdef2opt.sed confdefs.h | tr "$ac_LF_and_DOT" ' .'`
+rm -f confdef2opt.sed
# Without the "./", some shells look in PATH for config.status.
@@ -6285,7 +7463,6 @@
s%@gmpinc@%$gmpinc%g
s%@stage1_languages@%$stage1_languages%g
s%@SYSROOT_CFLAGS_FOR_TARGET@%$SYSROOT_CFLAGS_FOR_TARGET%g
-s%@bootstrap_lean@%$bootstrap_lean%g
/@serialization_dependencies@/r $serialization_dependencies
s%@serialization_dependencies@%%g
/@host_makefile_frag@/r $host_makefile_frag
@@ -6297,8 +7474,6 @@
/@ospace_frag@/r $ospace_frag
s%@ospace_frag@%%g
s%@RPATH_ENVVAR@%$RPATH_ENVVAR%g
-s%@BUILD_PREFIX@%$BUILD_PREFIX%g
-s%@BUILD_PREFIX_1@%$BUILD_PREFIX_1%g
s%@tooldir@%$tooldir%g
s%@build_tooldir@%$build_tooldir%g
s%@CONFIGURE_GDB_TK@%$CONFIGURE_GDB_TK%g
@@ -6309,7 +7484,6 @@
s%@host_configargs@%$host_configargs%g
s%@configdirs@%$configdirs%g
s%@target_configargs@%$target_configargs%g
-s%@target_configdirs@%$target_configdirs%g
s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
s%@config_shell@%$config_shell%g
s%@YACC@%$YACC%g
@@ -6333,14 +7507,14 @@
s%@OBJDUMP@%$OBJDUMP%g
s%@CXX@%$CXX%g
s%@CFLAGS_FOR_BUILD@%$CFLAGS_FOR_BUILD%g
-s%@AR_FOR_TARGET@%$AR_FOR_TARGET%g
-s%@AS_FOR_TARGET@%$AS_FOR_TARGET%g
s%@CC_FOR_TARGET@%$CC_FOR_TARGET%g
s%@CXX_FOR_TARGET@%$CXX_FOR_TARGET%g
-s%@DLLTOOL_FOR_TARGET@%$DLLTOOL_FOR_TARGET%g
s%@GCC_FOR_TARGET@%$GCC_FOR_TARGET%g
s%@GCJ_FOR_TARGET@%$GCJ_FOR_TARGET%g
s%@GFORTRAN_FOR_TARGET@%$GFORTRAN_FOR_TARGET%g
+s%@AR_FOR_TARGET@%$AR_FOR_TARGET%g
+s%@AS_FOR_TARGET@%$AS_FOR_TARGET%g
+s%@DLLTOOL_FOR_TARGET@%$DLLTOOL_FOR_TARGET%g
s%@LD_FOR_TARGET@%$LD_FOR_TARGET%g
s%@LIPO_FOR_TARGET@%$LIPO_FOR_TARGET%g
s%@NM_FOR_TARGET@%$NM_FOR_TARGET%g
@@ -6357,9 +7531,10 @@
s%@MAINTAINER_MODE_FALSE@%$MAINTAINER_MODE_FALSE%g
s%@MAINT@%$MAINT%g
s%@stage1_cflags@%$stage1_cflags%g
-s%@CREATE_LINK_TO_DIR@%$CREATE_LINK_TO_DIR%g
-s%@UNDO_LINK_TO_DIR@%$UNDO_LINK_TO_DIR%g
s%@stage2_werror_flag@%$stage2_werror_flag%g
+s%@datarootdir@%$datarootdir%g
+s%@docdir@%$docdir%g
+s%@htmldir@%$htmldir%g
CEOF
EOF
Modified: branches/binutils/package/configure.in
===================================================================
--- branches/binutils/package/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
-# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-# 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+# 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@@ -148,10 +148,12 @@
target-libstdc++-v3 \
target-libmudflap \
target-libssp \
+ target-libgcc-math \
target-libgfortran \
${libgcj} \
target-libobjc \
- target-libada"
+ target-libada \
+ target-libgomp"
# these tools are built using the target libraries, and are intended to
# run only in the target environment
@@ -303,7 +305,6 @@
ENABLE_LIBADA=$enableval,
ENABLE_LIBADA=yes)
if test "${ENABLE_LIBADA}" != "yes" ; then
- noconfigdirs="$noconfigdirs target-libada"
noconfigdirs="$noconfigdirs gnattools"
fi
@@ -311,10 +312,19 @@
[ --enable-libssp Builds libssp directory],
ENABLE_LIBSSP=$enableval,
ENABLE_LIBSSP=yes)
-if test "${ENABLE_LIBSSP}" != "yes" ; then
- noconfigdirs="$noconfigdirs target-libssp"
-fi
+# Set the default so we build libgcc-math for ix86 and x86_64
+AC_ARG_ENABLE(libgcc-math,
+[ --enable-libgcc-math Builds libgcc-math directory],,
+[
+case "${target}" in
+ i?86-* | x86_64-* )
+ enable_libgcc_math=yes ;;
+ *)
+ enable_libgcc_math=no ;;
+esac
+])
+
# Save it here so that, even in case of --enable-libgcj, if the Java
# front-end isn't enabled, we still get libgcj disabled.
libgcj_saved=$libgcj
@@ -332,16 +342,10 @@
esac
-# Allow --disable-libmudflap to exclude target-libmudflap
-case $enable_libmudflap in
-yes)
- ;;
-no)
- noconfigdirs="$noconfigdirs target-libmudflap"
- ;;
-"")
+# Disable libmudflap on some systems.
+if test x$enable_libmudflap = x ; then
case "${target}" in
- *-*-linux*-gnu | *-*-gnu* | *-*-k*bsd*-gnu)
+ *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu)
# Enable libmudflap by default in GNU and friends.
;;
*-*-freebsd*)
@@ -352,9 +356,27 @@
noconfigdirs="$noconfigdirs target-libmudflap"
;;
esac
-esac
+fi
+# Disable libgomp on non POSIX hosted systems.
+if test x$enable_libgomp = x ; then
+ # Enable libgomp by default on hosted POSIX systems.
+ case "${target}" in
+ *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu)
+ ;;
+ *-*-netbsd* | *-*-freebsd* | *-*-openbsd*)
+ ;;
+ *-*-solaris2* | *-*-sysv4* | *-*-irix* | *-*-osf* | *-*-hpux*)
+ ;;
+ *-*-darwin* | *-*-aix*)
+ ;;
+ *)
+ noconfigdirs="$noconfigdirs target-libgomp"
+ ;;
+ esac
+fi
+
case "${target}" in
*-*-chorusos)
noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}"
@@ -656,6 +678,9 @@
i[[3456789]]86-*-beos*)
noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss ${libgcj}"
;;
+ i[[3456789]]86-*-rdos*)
+ noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss"
+ ;;
m32r-*-*)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
@@ -967,6 +992,12 @@
powerpc-*-darwin*)
host_makefile_frag="config/mh-ppc-darwin"
;;
+ powerpc-*-aix*)
+ host_makefile_frag="config/mh-ppc-aix"
+ ;;
+ rs6000-*-aix*)
+ host_makefile_frag="config/mh-ppc-aix"
+ ;;
*-*-lynxos*)
# /bin/cc is less than useful for our purposes. Always use GCC
tentative_cc="/bin/gcc"
@@ -1010,8 +1041,6 @@
CXX=${CXX-${host_alias}-c++}
CXXFLAGS=${CXXFLAGS-"-g -O2"}
CC_FOR_BUILD=${CC_FOR_BUILD-gcc}
- BUILD_PREFIX=${build_alias}-
- BUILD_PREFIX_1=${build_alias}-
else
# Set reasonable default values for some tools even if not Canadian.
@@ -1023,9 +1052,6 @@
# This is all going to change when we autoconfiscate...
CC_FOR_BUILD="\$(CC)"
- BUILD_PREFIX=
- BUILD_PREFIX_1=loser-
-
AC_PROG_CC
# We must set the default linker to the linker used by gcc for the correct
@@ -1292,6 +1318,14 @@
ac_configure_args=`echo " $ac_configure_args" | sed -e 's/ --enable-languages=[[^ ]]*//' -e 's/$/ --enable-languages='"$enable_languages"/ `
fi
+# Handle --disable-<component> generically.
+for dir in $configdirs $build_configdirs $target_configdirs ; do
+ dirname=`echo $dir | sed -e s/target-//g -e s/build-//g -e s/-/_/g`
+ if eval test x\${enable_${dirname}} "=" xno ; then
+ noconfigdirs="$noconfigdirs $dir"
+ fi
+done
+
# Remove the entries in $skipdirs and $noconfigdirs from $configdirs,
# $build_configdirs and $target_configdirs.
# If we have the source for $noconfigdirs entries, add them to $notsupp.
@@ -1465,6 +1499,39 @@
fi
fi
+# Set with_gnu_as and with_gnu_ld as appropriate.
+#
+# This is done by determining whether or not the appropriate directory
+# is available, and by checking whether or not specific configurations
+# have requested that this magic not happen.
+#
+# The command line options always override the explicit settings in
+# configure.in, and the settings in configure.in override this magic.
+#
+# If the default for a toolchain is to use GNU as and ld, and you don't
+# want to do that, then you should use the --without-gnu-as and
+# --without-gnu-ld options for the configure script.
+
+if test x${use_gnu_as} = x &&
+ echo " ${configdirs} " | grep " gas " > /dev/null 2>&1 ; then
+ with_gnu_as=yes
+ extra_host_args="$extra_host_args --with-gnu-as"
+fi
+
+if test x${use_gnu_ld} = x &&
+ echo " ${configdirs} " | grep " ld " > /dev/null 2>&1 ; then
+ with_gnu_ld=yes
+ extra_host_args="$extra_host_args --with-gnu-ld"
+fi
+
+# If using newlib, add --with-newlib to the extra_host_args so that gcc/configure
+# can detect this case.
+
+if test x${with_newlib} != xno && echo " ${target_configdirs} " | grep " target-newlib " > /dev/null 2>&1 ; then
+ with_newlib=yes
+ extra_host_args="$extra_host_args --with-newlib"
+fi
+
# Handle ${copy_dirs}
set fnord ${copy_dirs}
shift
@@ -1496,6 +1563,55 @@
shift; shift
done
+# Determine a target-dependent exec_prefix that the installed
+# gcc will search in. Keep this list sorted by triplet, with
+# the *-*-osname triplets last.
+md_exec_prefix=
+case "${target}" in
+ alpha*-*-*vms*)
+ md_exec_prefix=/gnu/lib/gcc-lib
+ ;;
+ i[34567]86-pc-msdosdjgpp*)
+ md_exec_prefix=/dev/env/DJDIR/bin
+ ;;
+ i[34567]86-*-sco3.2v5*)
+ if test $with_gnu_as = yes; then
+ md_exec_prefix=/usr/gnu/bin
+ else
+ md_exec_prefix=/usr/ccs/bin/elf
+ fi
+ ;;
+
+ mn10300-*-* | \
+ powerpc-*-chorusos* | \
+ powerpc*-*-eabi* | \
+ powerpc*-*-sysv* | \
+ powerpc*-*-kaos* | \
+ s390x-ibm-tpf*)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+ sparc64-*-elf*)
+ ;;
+ v850*-*-*)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+ xtensa-*-elf*)
+ ;;
+
+ *-*-beos* | \
+ *-*-elf* | \
+ *-*-hpux* | \
+ *-*-netware* | \
+ *-*-nto-qnx* | \
+ *-*-rtems* | \
+ *-*-solaris2* | \
+ *-*-sysv[45]* | \
+ *-*-vxworks* | \
+ *-wrs-windiss)
+ md_exec_prefix=/usr/ccs/bin
+ ;;
+esac
+
extra_arflags_for_target=
extra_nmflags_for_target=
extra_ranlibflags_for_target=
@@ -1553,39 +1669,6 @@
;;
esac
-# Set with_gnu_as and with_gnu_ld as appropriate.
-#
-# This is done by determining whether or not the appropriate directory
-# is available, and by checking whether or not specific configurations
-# have requested that this magic not happen.
-#
-# The command line options always override the explicit settings in
-# configure.in, and the settings in configure.in override this magic.
-#
-# If the default for a toolchain is to use GNU as and ld, and you don't
-# want to do that, then you should use the --without-gnu-as and
-# --without-gnu-ld options for the configure script.
-
-if test x${use_gnu_as} = x &&
- echo " ${configdirs} " | grep " gas " > /dev/null 2>&1 ; then
- with_gnu_as=yes
- extra_host_args="$extra_host_args --with-gnu-as"
-fi
-
-if test x${use_gnu_ld} = x &&
- echo " ${configdirs} " | grep " ld " > /dev/null 2>&1 ; then
- with_gnu_ld=yes
- extra_host_args="$extra_host_args --with-gnu-ld"
-fi
-
-# If using newlib, add --with-newlib to the extra_host_args so that gcc/configure
-# can detect this case.
-
-if test x${with_newlib} != xno && echo " ${target_configdirs} " | grep " target-newlib " > /dev/null 2>&1 ; then
- with_newlib=yes
- extra_host_args="$extra_host_args --with-newlib"
-fi
-
# Default to using --with-stabs for certain targets.
if test x${with_stabs} = x ; then
case "${target}" in
@@ -1730,7 +1813,7 @@
# not to nest @if/@endif pairs, because configure will not warn you at all.
AC_ARG_ENABLE([bootstrap],
-[ --enable-bootstrap[=lean] Enable bootstrapping [no]],,
+[ --enable-bootstrap Enable bootstrapping [yes if native build]],,
enable_bootstrap=default)
# Issue errors and warnings for invalid/strange bootstrap combinations.
@@ -1742,27 +1825,26 @@
case "$have_compiler:$host:$target:$enable_bootstrap" in
*:*:*:no) ;;
- # Default behavior. (We'll) enable bootstrap if we have a compiler
+ # Default behavior. Enable bootstrap if we have a compiler
# and we are in a native configuration.
yes:$build:$build:default)
- # This will become 'yes'
- enable_bootstrap=no ;;
+ enable_bootstrap=yes ;;
*:*:*:default)
enable_bootstrap=no ;;
# We have a compiler and we are in a native configuration, bootstrap is ok
- yes:$build:$build:yes | yes:$build:$build:lean)
+ yes:$build:$build:yes)
;;
# Other configurations, but we have a compiler. Assume the user knows
# what he's doing.
- yes:*:*:yes | yes:*:*:lean)
+ yes:*:*:yes)
AC_MSG_WARN([trying to bootstrap a cross compiler])
;;
# No compiler: if they passed --enable-bootstrap explicitly, fail
- no:*:*:yes | no:*:*:lean)
+ no:*:*:yes)
AC_MSG_ERROR([cannot bootstrap without a compiler]) ;;
# Fail if wrong command line
@@ -1774,15 +1856,10 @@
# Adjust the toplevel makefile according to whether bootstrap was selected.
case "$enable_bootstrap" in
yes)
- bootstrap_lean='#'
bootstrap_suffix=bootstrap ;;
- lean)
- bootstrap_lean=''
- bootstrap_suffix=bootstrap ;;
no)
bootstrap_suffix=no-bootstrap ;;
esac
-AC_SUBST(bootstrap_lean)
for module in ${build_configdirs} ; do
if test -z "${no_recursion}" \
@@ -1797,10 +1874,13 @@
/^@endif build-$module-$bootstrap_suffix\$/d"
done
for module in ${configdirs} ; do
- if test -z "${no_recursion}" \
- && test -f ${module}/Makefile; then
- echo 1>&2 "*** removing ${module}/Makefile to force reconfigure"
- rm -f ${module}/Makefile
+ if test -z "${no_recursion}"; then
+ for file in stage*-${module}/Makefile ${module}/Makefile; do
+ if test -f ${file}; then
+ echo 1>&2 "*** removing ${file} to force reconfigure"
+ rm -f ${file}
+ fi
+ done
fi
extrasub="$extrasub
/^@if $module\$/d
@@ -2064,8 +2144,6 @@
# Miscellanea: directories, flags, etc.
AC_SUBST(RPATH_ENVVAR)
-AC_SUBST(BUILD_PREFIX)
-AC_SUBST(BUILD_PREFIX_1)
AC_SUBST(tooldir)
AC_SUBST(build_tooldir)
AC_SUBST(CONFIGURE_GDB_TK)
@@ -2082,8 +2160,8 @@
# Target module lists & subconfigure args.
AC_SUBST(target_configargs)
-AC_SUBST(target_configdirs)
+
# Build tools.
AC_SUBST(CC_FOR_BUILD)
AC_SUBST(config_shell)
@@ -2125,10 +2203,10 @@
*" texinfo "*) MAKEINFO='$$r/$(BUILD_SUBDIR)/texinfo/makeinfo/makeinfo' ;;
*)
changequote(,)
- # For an installed makeinfo, we require it to be from texinfo 4.2 or
+ # For an installed makeinfo, we require it to be from texinfo 4.4 or
# higher, else we use the "missing" dummy.
if ${MAKEINFO} --version \
- | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[2-9]|[5-9])' >/dev/null 2>&1; then
+ | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[4-9]|[5-9])' >/dev/null 2>&1; then
:
else
MAKEINFO="$MISSING makeinfo"
@@ -2173,22 +2251,35 @@
AC_SUBST(CXXFLAGS)
# Target tools.
-NCN_STRICT_CHECK_TARGET_TOOLS(AR_FOR_TARGET, ar)
-NCN_STRICT_CHECK_TARGET_TOOLS(AS_FOR_TARGET, as)
+AC_ARG_WITH([build-time-tools],
+ [ --with-build-time-tools=path
+ use given path to find target tools during the build],
+ [case x"$withval" in
+ x/*) ;;
+ *)
+ with_build_time_tools=
+ AC_MSG_WARN([argument to --with-build-time-tools must be an absolute path])
+ ;;
+ esac],
+ [with_build_time_tools=])
+
NCN_STRICT_CHECK_TARGET_TOOLS(CC_FOR_TARGET, cc gcc)
NCN_STRICT_CHECK_TARGET_TOOLS(CXX_FOR_TARGET, c++ g++ cxx gxx)
-NCN_STRICT_CHECK_TARGET_TOOLS(DLLTOOL_FOR_TARGET, dlltool)
NCN_STRICT_CHECK_TARGET_TOOLS(GCC_FOR_TARGET, gcc, ${CC_FOR_TARGET})
NCN_STRICT_CHECK_TARGET_TOOLS(GCJ_FOR_TARGET, gcj)
NCN_STRICT_CHECK_TARGET_TOOLS(GFORTRAN_FOR_TARGET, gfortran)
-NCN_STRICT_CHECK_TARGET_TOOLS(LD_FOR_TARGET, ld)
-NCN_STRICT_CHECK_TARGET_TOOLS(LIPO_FOR_TARGET, lipo)
-NCN_STRICT_CHECK_TARGET_TOOLS(NM_FOR_TARGET, nm)
-NCN_STRICT_CHECK_TARGET_TOOLS(OBJDUMP_FOR_TARGET, objdump)
-NCN_STRICT_CHECK_TARGET_TOOLS(RANLIB_FOR_TARGET, ranlib, :)
-NCN_STRICT_CHECK_TARGET_TOOLS(STRIP_FOR_TARGET, strip)
-NCN_STRICT_CHECK_TARGET_TOOLS(WINDRES_FOR_TARGET, windres)
+ACX_CHECK_INSTALLED_TARGET_TOOL(AR_FOR_TARGET, ar)
+ACX_CHECK_INSTALLED_TARGET_TOOL(AS_FOR_TARGET, as)
+ACX_CHECK_INSTALLED_TARGET_TOOL(DLLTOOL_FOR_TARGET, dlltool)
+ACX_CHECK_INSTALLED_TARGET_TOOL(LD_FOR_TARGET, ld)
+ACX_CHECK_INSTALLED_TARGET_TOOL(LIPO_FOR_TARGET, lipo)
+ACX_CHECK_INSTALLED_TARGET_TOOL(NM_FOR_TARGET, nm)
+ACX_CHECK_INSTALLED_TARGET_TOOL(OBJDUMP_FOR_TARGET, objdump)
+ACX_CHECK_INSTALLED_TARGET_TOOL(RANLIB_FOR_TARGET, ranlib, :)
+ACX_CHECK_INSTALLED_TARGET_TOOL(STRIP_FOR_TARGET, strip)
+ACX_CHECK_INSTALLED_TARGET_TOOL(WINDRES_FOR_TARGET, windres)
+
RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
GCC_TARGET_TOOL(ar, AR_FOR_TARGET, AR, [binutils/ar])
@@ -2282,36 +2373,6 @@
esac
AC_SUBST(stage1_cflags)
-# It makes debugging easier if we create as symlinks the stage directories
-# gcc for stageN-gcc and stagePREV-gcc for stage(N-1). In case this is not
-# possible, however, we can resort to mv.
-AC_CACHE_CHECK([if symbolic links between directories work],
-[gcc_cv_prog_ln_s_dir],
-[if test "${LN_S}" = "ln -s" \
- && mkdir confdir.s1 \
- && ln -s confdir.s1 confdir.s2 \
- && echo timestamp1 > confdir.s1/conftest.1 \
- && cmp confdir.s1/conftest.1 confdir.s2/conftest.1 \
- && echo timestamp2 > confdir.s2/conftest.2 \
- && cmp confdir.s1/conftest.2 confdir.s1/conftest.2 \
- && rm -f confdir.s2; then
- gcc_cv_prog_ln_s_dir=yes
-else
- gcc_cv_prog_ln_s_dir=no
-fi
-rm -rf confdir.s1 confdir.s2])
-
-case ${gcc_cv_prog_ln_s_dir} in
- yes)
- CREATE_LINK_TO_DIR='ln -s $$1 $$2'
- UNDO_LINK_TO_DIR='rm -f $$1' ;;
- *)
- CREATE_LINK_TO_DIR='mv $$1 $$2'
- UNDO_LINK_TO_DIR='mv $$1 $$2' ;;
-esac
-AC_SUBST(CREATE_LINK_TO_DIR)
-AC_SUBST(UNDO_LINK_TO_DIR)
-
# Enable -Werror in bootstrap stage2 and later.
# Change the default to "no" on release branches.
AC_ARG_ENABLE(werror,
@@ -2323,4 +2384,24 @@
esac
AC_SUBST(stage2_werror_flag)
+# Flags needed to enable html installing and building
+AC_ARG_WITH(datarootdir,
+[ --with-datarootdir Use datarootdir as the data root directory.],
+[datarootdir="\${prefix}/${withval}"],
+[datarootdir="\${prefix}/share"])
+
+AC_ARG_WITH(docdir,
+[ --with-docdir Install documentation in this directory.],
+[docdir="\${prefix}/${withval}"],
+[docdir="\${datarootdir}/doc"])
+
+AC_ARG_WITH(htmldir,
+[ --with-htmldir Install html in this directory.],
+[htmldir="\${prefix}/${withval}"],
+[htmldir="\${docdir}"])
+
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
AC_OUTPUT(Makefile)
Modified: branches/binutils/package/cpu/ChangeLog
===================================================================
--- branches/binutils/package/cpu/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,80 @@
+2006-04-10 DJ Delorie <dj at redhat.com>
+
+ * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
+ decides if this function accepts symbolic constants or not.
+ (parse_signed_bitbase): Likewise.
+ (parse_unsigned_bitbase8): Pass the new parameter.
+ (parse_unsigned_bitbase11): Likewise.
+ (parse_unsigned_bitbase16): Likewise.
+ (parse_unsigned_bitbase19): Likewise.
+ (parse_unsigned_bitbase27): Likewise.
+ (parse_signed_bitbase8): Likewise.
+ (parse_signed_bitbase11): Likewise.
+ (parse_signed_bitbase19): Likewise.
+
+2006-03-13 DJ Delorie <dj at redhat.com>
+
+ * m32c.cpu (Bit3-S): New.
+ (btst:s): New.
+ * m32c.opc (parse_bit3_S): New.
+
+ * m32c.cpu (decimal-subtraction16-insn): Add second operand.
+ (btst): Add optional :G suffix for MACH32.
+ (or.b:S): New.
+ (pop.w:G): Add optional :G suffix for MACH16.
+ (push.b.imm): Fix syntax.
+
+2006-03-10 DJ Delorie <dj at redhat.com>
+
+ * m32c.cpu (mul.l): New.
+ (mulu.l): New.
+
+2006-03-03 Shrirang Khisti <shrirangk at kpitcummins.com)
+
+ * xc16x.opc (parse_hash): Return NULL if the input was parsed or
+ an error message otherwise.
+ (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
+ Fix up comments to correctly describe the functions.
+
+2006-02-24 DJ Delorie <dj at redhat.com>
+
+ * m32c.cpu (RL_TYPE): New attribute, with macros.
+ (Lab-8-24): Add RELAX.
+ (unary-insn-defn-g, binary-arith-imm-dst-defn,
+ binary-arith-imm4-dst-defn): Add 1ADDR attribute.
+ (binary-arith-src-dst-defn): Add 2ADDR attribute.
+ (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
+ jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
+ attribute.
+ (jsri16, jsri32): Add 1ADDR attribute.
+ (jsr32.w, jsr32.a): Add JUMP attribute.
+
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
+
+ * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
+ description.
+ * xc16x.opc: New file containing supporting XC16C routines.
+
+2006-02-10 Nick Clifton <nickc at redhat.com>
+
+ * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
+
+2006-01-06 DJ Delorie <dj at redhat.com>
+
+ * m32c.cpu (mov.w:q): Fix mode.
+ (push32.b.imm): Likewise, for the comment.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * mt.cpu (define-arch, define-isa): Set name to mt.
+ (define-mach): Adjust.
+ * mt.opc (CGEN_ASM_HASH): Update.
+ (mt_asm_hash, mt_cgen_insn_supported): Renamed.
+ (parse_loopsize, parse_imm16): Adjust.
+
2005-12-13 DJ Delorie <dj at redhat.com>
* m32c.cpu (jsri): Fix order so register names aren't treated as
Modified: branches/binutils/package/cpu/iq2000.opc
===================================================================
--- branches/binutils/package/cpu/iq2000.opc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/iq2000.opc 2006-04-19 08:33:31 UTC (rev 12)
@@ -218,6 +218,7 @@
if (value & 0x8000)
value += 0x10000;
value >>= 16;
+ value &= 0xffff;
}
*valuep = value;
@@ -243,6 +244,7 @@
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
value >>= 16;
+ value &= 0xffff;
*valuep = value;
return errmsg;
Modified: branches/binutils/package/cpu/m32c.cpu
===================================================================
--- branches/binutils/package/cpu/m32c.cpu 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/m32c.cpu 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
; Renesas M32C CPU description. -*- Scheme -*-
;
-; Copyright 2005 Free Software Foundation, Inc.
+; Copyright 2005, 2006 Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc; developed under contract from Renesas.
;
@@ -139,6 +139,13 @@
)
)
+(define-attr
+ (type enum)
+ (name RL_TYPE)
+ (values NONE JUMP 1ADDR 2ADDR)
+ (default NONE)
+ )
+
; Macros to simplify MACH attribute specification.
(define-pmacro all-isas () (ISA m16c,m32c))
@@ -150,6 +157,11 @@
(define-pmacro (machine size)
(MACH (.sym m size c)) (ISA (.sym m size c)))
+
+(define-pmacro RL_JUMP (RL_TYPE JUMP))
+(define-pmacro RL_1ADDR (RL_TYPE 1ADDR))
+(define-pmacro RL_2ADDR (RL_TYPE 2ADDR))
+
;=============================================================
; Fields
@@ -2014,6 +2026,10 @@
h-sint DFLT f-imm3-S
((parse "imm3_S")) () ()
)
+(define-full-operand Bit3-S "3 bit bit number" (m32c-isa)
+ h-sint DFLT f-imm3-S
+ ((parse "bit3_S")) () ()
+)
;-------------------------------------------------------------
; Bit numbers
@@ -2097,7 +2113,7 @@
(dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
(dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
-(dnop Lab-8-24 "24 bit label" (all-isas) h-iaddr f-lab-8-24)
+(dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24)
(dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
(dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8)
(dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8)
@@ -5859,7 +5875,7 @@
(define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg)
(dni (.sym op mach wstr - group)
(.str op wstr opg " dst" mach "-" group "-" mode)
- ((machine mach))
+ ((machine mach) RL_1ADDR)
(.str op wstr opg " ${dst" mach "-" group "-" mode "}")
encoding
(sem mode (.sym dst mach - group - mode))
@@ -6075,7 +6091,7 @@
(define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
(dni (.sym op mach wstr - imm-G - dstgroup)
(.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
- ((machine mach))
+ ((machine mach) RL_1ADDR)
(.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
encoding
(sem dmode src (.sym dst mach - dstgroup - dmode))
@@ -6185,7 +6201,7 @@
(define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
(dni (.sym op mach wstr - imm4-Q - dstgroup)
(.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
- ((machine mach))
+ ((machine mach) RL_1ADDR)
(.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
encoding
(sem mode src (.sym dst mach - dstgroup - mode))
@@ -6261,7 +6277,7 @@
(define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
(dni (.sym op mach wstr - srcgroup - dstgroup)
(.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
- ((machine mach))
+ ((machine mach) RL_2ADDR)
(.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
encoding
(sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
@@ -7231,7 +7247,7 @@
(dni (.sym op 16.b-imm8)
(.str op ".b #imm8")
((machine 16))
- (.str op ".b #${Imm-16-QI}")
+ (.str op ".b #${Imm-16-QI},r0l")
(+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
((.sym op -sem) QI Imm-16-QI R0l)
())
@@ -7239,7 +7255,7 @@
(dni (.sym op 16.w-imm16)
(.str op ".b #imm16")
((machine 16))
- (.str op ".w #${Imm-16-HI}")
+ (.str op ".w #${Imm-16-HI},r0")
(+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
((.sym op -sem) HI Imm-16-HI R0)
())
@@ -7550,8 +7566,17 @@
(set zbit (inv dst))
(set cbit dst)
)
-(bitdst-insn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) #xD #x0 #x0 btst-sem)
+(bitdst16-defn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) btst-sem)
+(bit-insn-defn 32 btst G bit32-16-Unprefixed
+ (+ (f-0-4 #xD) bit32-16-Unprefixed (f-7-1 #x0) (f-10-3 #x0))
+ btst-sem)
+
+(dni btst.s "btst:s" ((machine 32))
+ "btst:s ${Bit3-S},${Dsp-8-u16}"
+ (+ (f-0-2 #x0) (f-4-3 #x5) Bit3-S Dsp-8-u16)
+ () ())
+
;-------------------------------------------------------------
; btstc
;-------------------------------------------------------------
@@ -8058,7 +8083,7 @@
(dni jcnd16-5
"jCnd label"
- (RELAXABLE (machine 16))
+ (RL_JUMP RELAXABLE (machine 16))
"j$cond16j5 ${Lab-8-8}"
(+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
(jcnd16-sem cond16j5 Lab-8-8)
@@ -8067,7 +8092,7 @@
(dni jcnd16
"jCnd label"
- (RELAXABLE (machine 16))
+ (RL_JUMP RELAXABLE (machine 16))
"j$cond16j ${Lab-16-8}"
(+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
(jcnd16-sem cond16j Lab-16-8)
@@ -8076,7 +8101,7 @@
(dni jcnd32
"jCnd label"
- (RELAXABLE (machine 32))
+ (RL_JUMP RELAXABLE (machine 32))
"j$cond32j ${Lab-8-8}"
(+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
(jcnd32-sem cond32j Lab-8-8)
@@ -8088,25 +8113,25 @@
;-------------------------------------------------------------
; jmp.s label3 (m16 #1)
-(dni jmp16.s "jmp.s Lab-5-3" (RELAXABLE (machine 16))
+(dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16))
("jmp.s ${Lab-5-3}")
(+ (f-0-4 6) (f-4-1 0) Lab-5-3)
(sequence () (set pc Lab-5-3))
())
; jmp.b label8 (m16 #2)
-(dni jmp16.b "jmp.b Lab-8-8" (RELAXABLE (machine 16))
+(dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16))
("jmp.b ${Lab-8-8}")
(+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
(sequence () (set pc Lab-8-8))
())
; jmp.w label16 (m16 #3)
-(dni jmp16.w "jmp.w Lab-8-16" (RELAXABLE (machine 16))
+(dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
("jmp.w ${Lab-8-16}")
(+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
(sequence () (set pc Lab-8-16))
())
; jmp.a label24 (m16 #4)
-(dni jmp16.a "jmp.a Lab-8-24" ((machine 16))
+(dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
("jmp.a ${Lab-8-24}")
(+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
(sequence () (set pc Lab-8-24))
@@ -8133,32 +8158,32 @@
; jmp.s label3 (m32 #1)
(dni jmp32.s
"jmp.s label"
- (RELAXABLE (machine 32))
+ (RL_JUMP RELAXABLE (machine 32))
"jmp.s ${Lab32-jmp-s}"
(+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
(set pc Lab32-jmp-s)
()
)
; jmp.b label8 (m32 #2)
-(dni jmp32.b "jmp.b Lab-8-8" (RELAXABLE (machine 32))
+(dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32))
("jmp.b ${Lab-8-8}")
(+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
(set pc Lab-8-8)
())
; jmp.w label16 (m32 #3)
-(dni jmp32.w "jmp.w Lab-8-16" (RELAXABLE (machine 32))
+(dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32))
("jmp.w ${Lab-8-16}")
(+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
(set pc Lab-8-16)
())
; jmp.a label24 (m32 #4)
-(dni jmp32.a "jmp.a Lab-8-24" ((machine 32))
+(dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32))
("jmp.a ${Lab-8-24}")
(+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
(set pc Lab-8-24)
())
; jmp.s imm8 (m32 #1)
-(dni jmps32 "jmps Imm-8-QI" ((machine 32))
+(dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32))
("jmps #${Imm-8-QI}")
(+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
(set pc Imm-8-QI)
@@ -8190,13 +8215,13 @@
)
; jsr.w label16 (m16 #1)
-(dni jsr16.w "jsr.w Lab-8-16" (RELAXABLE (machine 16))
+(dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
("jsr.w ${Lab-8-16}")
(+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
(jsr16-sem 3 Lab-8-16)
())
; jsr.a label24 (m16 #2)
-(dni jsr16.a "jsr.a Lab-8-24" ((machine 16))
+(dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
("jsr.a ${Lab-8-24}")
(+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
(jsr16-sem 4 Lab-8-24)
@@ -8206,14 +8231,14 @@
(begin
(dni (.sym jsri16 mode - op16)
(.str "jsri." mode " " op16)
- ((machine 16))
+ (RL_1ADDR (machine 16))
(.str "jsri." mode " ${" op16 "}")
(+ op16-1 op16-2 op16-3 op16)
(op16-sem len op16)
())
(dni (.sym jsri32 mode - op32)
(.str "jsri." mode " " op32)
- ((machine 32))
+ (RL_1ADDR (machine 32))
(.str "jsri." mode " ${" op32 "}")
(+ op32-1 op32-2 op32-3 op32-4 op32)
(op32-sem len op32)
@@ -8227,7 +8252,7 @@
dst32-16-16-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
(jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
-(dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
+(dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
("jsri.w ${dst32-16-24-Unprefixed-HI}")
(+ (f-0-4 #xC) (f-7-1 1) dst32-16-24-Unprefixed-HI (f-10-2 #x1) (f-12-4 #xF))
(jsr32-sem 6 dst32-16-24-Unprefixed-HI)
@@ -8241,19 +8266,19 @@
(jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
-(dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
+(dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
("jsri.w ${dst32-16-24-Unprefixed-SI}")
(+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
(jsr32-sem 6 dst32-16-24-Unprefixed-SI)
())
; jsr.w label16 (m32 #1)
-(dni jsr32.w "jsr.w label" (RELAXABLE (machine 32))
+(dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32))
("jsr.w ${Lab-8-16}")
(+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
(jsr32-sem 3 Lab-8-16)
())
; jsr.a label16 (m32 #2)
-(dni jsr32.a "jsr.a label" ((machine 32))
+(dni jsr32.a "jsr.a label" (RL_JUMP (machine 32))
("jsr.a ${Lab-8-24}")
(+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
(jsr32-sem 4 Lab-8-24)
@@ -8542,6 +8567,7 @@
; ??? semantics
; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
+
(dni ldipl16.imm "ldipl #imm" ((machine 16))
("ldipl #${Imm-13-u3}")
(+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
@@ -8650,7 +8676,7 @@
; mov.size:Q #imm4,dst (m16 #2 m32 #3)
(binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
-(binary-arith16-imm4-dst-defn QI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
+(binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
(binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
(binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
@@ -8897,6 +8923,17 @@
; mul.BW src,dst
(binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
+(dni mul_l "mul.l src,r2r0" ((machine 32))
+ ("mul.l ${dst32-24-Prefixed-SI},r2r0")
+ (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x1) (f-20-4 #xf)
+ dst32-24-Prefixed-SI)
+ () ())
+
+(dni mulu_l "mulu.l src,r2r0" ((machine 32))
+ ("mulu.l ${dst32-24-Prefixed-SI},r2r0")
+ (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x0) (f-20-4 #xf)
+ dst32-24-Prefixed-SI)
+ () ())
;-------------------------------------------------------------
; mulex - multiple extend sign (m32)
;-------------------------------------------------------------
@@ -9009,6 +9046,8 @@
(binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
; or.BW src,dst (m16 #3 m32 #3)
(binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
+; or.b:S src,r0[lh] (m16)
+(binary-arith16-b-S-src2 or (f-0-4 1) (f-4-1 1) or-sem)
;-------------------------------------------------------------
; pop - restore register/memory
@@ -9034,7 +9073,7 @@
(define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
; pop.BW:G (m16 #1)
-(unary-insn-mach 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16)
+(unary-insn-mach-g 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16 $G)
; pop.BW:G (m32 #1)
(unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
@@ -9344,8 +9383,8 @@
(push-sem16 HI Imm-16-HI)
())
-(dni push32.b.imm "push.w #Imm-8-QI" ((machine 32))
- ("push.b #Imm-8-QI")
+(dni push32.b.imm "push.b #Imm-8-QI" ((machine 32))
+ ("push.b #${Imm-8-QI}")
(+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
(push-sem32 QI Imm-8-QI)
())
Modified: branches/binutils/package/cpu/m32c.opc
===================================================================
--- branches/binutils/package/cpu/m32c.opc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/m32c.opc 2006-04-19 08:33:31 UTC (rev 12)
@@ -534,6 +534,24 @@
}
static const char *
+parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
+ int opindex, signed long *valuep)
+{
+ const char *errmsg = 0;
+ signed long value;
+
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
+ if (errmsg)
+ return errmsg;
+
+ if (value < 0 || value > 7)
+ return _("immediate is out of range 0-7");
+
+ *valuep = value;
+ return 0;
+}
+
+static const char *
parse_lab_5_3 (CGEN_CPU_DESC cd,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
@@ -590,13 +608,14 @@
static const char *
parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep,
- unsigned bits)
+ unsigned bits, int allow_syms)
{
const char *errmsg = 0;
unsigned long bit;
unsigned long base;
const char *newp = *strp;
unsigned long long bitbase;
+ long have_zero = 0;
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
@@ -606,6 +625,11 @@
return "Missing base for bit,base:8";
++newp;
+
+ if (strncmp (newp, "0x0", 3) == 0
+ || (newp[0] == '0' && newp[1] != 'x'))
+ have_zero = 1;
+
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
if (errmsg)
return errmsg;
@@ -615,6 +639,21 @@
if (bitbase >= (1ull << bits))
return _("bit,base is out of range");
+ /* If this field may require a relocation then use larger displacement. */
+ if (! have_zero && base == 0)
+ {
+ switch (allow_syms) {
+ case 0:
+ return _("bit,base out of range for symbol");
+ case 1:
+ break;
+ case 2:
+ if (strncmp (newp, "[sb]", 4) != 0)
+ return _("bit,base out of range for symbol");
+ break;
+ }
+ }
+
*valuep = bitbase;
*strp = newp;
return 0;
@@ -623,7 +662,7 @@
static const char *
parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep,
- unsigned bits)
+ unsigned bits, int allow_syms)
{
const char *errmsg = 0;
unsigned long bit;
@@ -631,6 +670,7 @@
const char *newp = *strp;
long long bitbase;
long long limit;
+ long have_zero = 0;
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
@@ -640,6 +680,11 @@
return "Missing base for bit,base:8";
++newp;
+
+ if (strncmp (newp, "0x0", 3) == 0
+ || (newp[0] == '0' && newp[1] != 'x'))
+ have_zero = 1;
+
errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
if (errmsg)
return errmsg;
@@ -650,6 +695,10 @@
if (bitbase < -limit || bitbase >= limit)
return _("bit,base is out of range");
+ /* If this field may require a relocation then use larger displacement. */
+ if (! have_zero && base == 0 && ! allow_syms)
+ return _("bit,base out of range for symbol");
+
*valuep = bitbase;
*strp = newp;
return 0;
@@ -659,56 +708,56 @@
parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0);
}
static const char *
parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0);
}
static const char *
parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1);
}
static const char *
parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2);
}
static const char *
parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1);
}
static const char *
parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1);
}
static const char *
parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0);
}
static const char *
parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1);
}
/* Parse the suffix as :<char> or as nothing followed by a whitespace. */
Modified: branches/binutils/package/cpu/mt.cpu
===================================================================
--- branches/binutils/package/cpu/mt.cpu 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/mt.cpu 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-; Morpho Technologies mRISC CPU description. -*- Scheme -*-
+; Morpho Technologies MT Arch description. -*- Scheme -*-
; Copyright 2001 Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc; developed under contract from
@@ -28,19 +28,19 @@
; define-arch must appear first
(define-arch
- (name ms1) ; name of cpu family
+ (name mt) ; name of cpu family
(comment "Morpho Technologies mRISC family")
(default-alignment aligned)
(insn-lsb0? #t)
(machs ms1 ms1-003 ms2)
- (isas ms1)
+ (isas mt)
)
; Instruction set parameters.
(define-isa
- (name ms1)
- (comment "Morpho Technologies mrisc ISA")
+ (name mt)
+ (comment "Morpho Technologies MT ISA")
(default-insn-word-bitsize 32)
(default-insn-bitsize 32)
(base-insn-bitsize 32)
@@ -78,21 +78,21 @@
(name ms1)
(comment "Morpho Technologies mrisc")
(cpu ms1bf)
- (isas ms1)
+ (isas mt)
)
(define-mach
(name ms1-003)
(comment "Morpho Technologies mrisc")
(cpu ms1-003bf)
- (isas ms1)
+ (isas mt)
)
(define-mach
(name ms2)
(comment "Morpho Technologies ms2")
(cpu ms2bf)
- (isas ms1)
+ (isas mt)
)
Modified: branches/binutils/package/cpu/mt.opc
===================================================================
--- branches/binutils/package/cpu/mt.opc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/mt.opc 2006-04-19 08:33:31 UTC (rev 12)
@@ -46,11 +46,11 @@
#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
#define CGEN_ASM_HASH_SIZE 127
-#define CGEN_ASM_HASH(insn) ms1_asm_hash (insn)
+#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
-extern unsigned int ms1_asm_hash (const char *);
+extern unsigned int mt_asm_hash (const char *);
-extern int ms1_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
+extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
/* -- opc.c */
@@ -59,8 +59,7 @@
/* Special check to ensure that instruction exists for given machine. */
int
-ms1_cgen_insn_supported (CGEN_CPU_DESC cd,
- const CGEN_INSN *insn)
+mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
{
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
@@ -74,7 +73,7 @@
/* A better hash function for instruction mnemonics. */
unsigned int
-ms1_asm_hash (const char* insn)
+mt_asm_hash (const char* insn)
{
unsigned int hash;
const char* m = insn;
@@ -113,9 +112,9 @@
bfd_vma value;
/* Is it a control transfer instructions? */
- if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_LOOPSIZE)
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_LOOPSIZE)
{
- code = BFD_RELOC_MS1_PCINSN8;
+ code = BFD_RELOC_MT_PCINSN8;
errmsg = cgen_parse_address (cd, strp, opindex, code,
& result_type, & value);
*valuep = value;
@@ -138,7 +137,7 @@
bfd_vma value;
/* Is it a control transfer instructions? */
- if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_IMM16O)
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16O)
{
code = BFD_RELOC_16_PCREL;
errmsg = cgen_parse_address (cd, strp, opindex, code,
@@ -154,7 +153,7 @@
/* If it's not a control transfer instruction, then
we have to check for %OP relocating operators. */
- if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_IMM16L)
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16L)
;
else if (strncmp (*strp, "%hi16", 5) == 0)
{
@@ -203,7 +202,7 @@
{
/* Parse hex values like 0xffff as unsigned, and sign extend
them manually. */
- int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MS1_OPERAND_IMM16);
+ int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MT_OPERAND_IMM16);
if ((*strp)[0] == '0'
&& ((*strp)[1] == 'x' || (*strp)[1] == 'X'))
@@ -235,10 +234,10 @@
}
else
{
- /* MS1_OPERAND_IMM16Z. Parse as an unsigned integer. */
+ /* MT_OPERAND_IMM16Z. Parse as an unsigned integer. */
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep);
- if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_IMM16
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16
&& *valuep >= 0x8000
&& *valuep <= 0xffff)
*valuep -= 0x10000;
Added: branches/binutils/package/cpu/xc16x.cpu
===================================================================
--- branches/binutils/package/cpu/xc16x.cpu 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/xc16x.cpu 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,245 @@
+/* XC16X opcode support. -*- C -*-
+
+ Copyright 2006 Free Software Foundation, Inc.
+
+ Contributed by KPIT Cummins Infosystems Ltd.; developed under contract
+ from Infineon Systems, GMBH , Germany.
+
+ This file is part of the GNU Binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+
+/* This file is an addendum to xc16x.cpu. Heavy use of C code isn't
+ appropriate in .cpu files, so it resides here. This especially applies
+ to assembly/disassembly where parsing/printing can be quite involved.
+ Such things aren't really part of the specification of the cpu, per se,
+ so .cpu files provide the general framework and .opc files handle the
+ nitty-gritty details as necessary.
+
+ Each section is delimited with start and end markers.
+
+ <arch>-opc.h additions use: "-- opc.h"
+ <arch>-opc.c additions use: "-- opc.c"
+ <arch>-asm.c additions use: "-- asm.c"
+ <arch>-dis.c additions use: "-- dis.c"
+ <arch>-ibd.h additions use: "-- ibd.h" */
+
+/* -- opc.h */
+
+#define CGEN_DIS_HASH_SIZE 8
+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE)
+
+/* -- */
+
+/* -- opc.c */
+
+/* -- */
+
+/* -- asm.c */
+/* Handle '#' prefixes (i.e. skip over them). */
+
+static const char *
+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '#')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '#' prefix");
+}
+
+/* Handle '.' prefixes (i.e. skip over them). */
+
+static const char *
+parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '.')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '.' prefix");
+}
+
+/* Handle 'pof:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pof:' prefix");
+}
+
+/* Handle 'pag:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pag:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pag:' prefix");
+}
+
+/* Handle 'sof' prefixes (i.e. skip over them). */
+
+static const char *
+parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "sof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'sof:' prefix");
+}
+
+/* Handle 'seg' prefixes (i.e. skip over them). */
+
+static const char *
+parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "seg:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'seg:' prefix");
+}
+/* -- */
+
+/* -- dis.c */
+
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
+ do \
+ { \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
+ info->fprintf_func (info->stream, "."); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
+ info->fprintf_func (info->stream, "#pof:"); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
+ info->fprintf_func (info->stream, "#pag:"); \
+ } \
+ while (0)
+
+/* Print a 'pof:' prefix to an operand. */
+
+static void
+print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'pag:' prefix to an operand. */
+
+static void
+print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'sof:' prefix to an operand. */
+
+static void
+print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "sof:");
+}
+
+/* Print a 'seg:' prefix to an operand. */
+
+static void
+print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "seg:");
+}
+
+/* Print a '#' prefix to an operand. */
+
+static void
+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "#");
+}
+
+/* Print a '.' prefix to an operand. */
+
+static void
+print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* -- */
Added: branches/binutils/package/cpu/xc16x.opc
===================================================================
--- branches/binutils/package/cpu/xc16x.opc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/cpu/xc16x.opc 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,245 @@
+/* XC16X opcode support. -*- C -*-
+
+ Copyright 2006 Free Software Foundation, Inc.
+
+ Contributed by KPIT Cummins Infosystems Ltd.; developed under contract
+ from Infineon Systems, GMBH , Germany.
+
+ This file is part of the GNU Binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+
+/* This file is an addendum to xc16x.cpu. Heavy use of C code isn't
+ appropriate in .cpu files, so it resides here. This especially applies
+ to assembly/disassembly where parsing/printing can be quite involved.
+ Such things aren't really part of the specification of the cpu, per se,
+ so .cpu files provide the general framework and .opc files handle the
+ nitty-gritty details as necessary.
+
+ Each section is delimited with start and end markers.
+
+ <arch>-opc.h additions use: "-- opc.h"
+ <arch>-opc.c additions use: "-- opc.c"
+ <arch>-asm.c additions use: "-- asm.c"
+ <arch>-dis.c additions use: "-- dis.c"
+ <arch>-ibd.h additions use: "-- ibd.h" */
+
+/* -- opc.h */
+
+#define CGEN_DIS_HASH_SIZE 8
+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE)
+
+/* -- */
+
+/* -- opc.c */
+
+/* -- */
+
+/* -- asm.c */
+/* Handle '#' prefixes (i.e. skip over them). */
+
+static const char *
+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '#')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '#' prefix");
+}
+
+/* Handle '.' prefixes (i.e. skip over them). */
+
+static const char *
+parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '.')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '.' prefix");
+}
+
+/* Handle 'pof:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pof:' prefix");
+}
+
+/* Handle 'pag:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pag:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pag:' prefix");
+}
+
+/* Handle 'sof' prefixes (i.e. skip over them). */
+
+static const char *
+parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "sof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'sof:' prefix");
+}
+
+/* Handle 'seg' prefixes (i.e. skip over them). */
+
+static const char *
+parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "seg:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'seg:' prefix");
+}
+/* -- */
+
+/* -- dis.c */
+
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
+ do \
+ { \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
+ info->fprintf_func (info->stream, "."); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
+ info->fprintf_func (info->stream, "#pof:"); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
+ info->fprintf_func (info->stream, "#pag:"); \
+ } \
+ while (0)
+
+/* Print a 'pof:' prefix to an operand. */
+
+static void
+print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'pag:' prefix to an operand. */
+
+static void
+print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'sof:' prefix to an operand. */
+
+static void
+print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "sof:");
+}
+
+/* Print a 'seg:' prefix to an operand. */
+
+static void
+print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "seg:");
+}
+
+/* Print a '#' prefix to an operand. */
+
+static void
+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "#");
+}
+
+/* Print a '.' prefix to an operand. */
+
+static void
+print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* -- */
Added: branches/binutils/package/debian/README.cross
===================================================================
--- branches/binutils/package/debian/README.cross 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/README.cross 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,22 @@
+Cross-binutils debian packages can be built directly from the binutils
+source package.
+
+To build a cross-binutils package:
+
+ o Download and unpack the binutils source package:
+
+ apt-get source binutils
+
+ o Ensure you have the binutils build-dependencies installed:
+
+ apt-get build-dep binutils
+
+ o Then build the cross-binutils package:
+
+ TARGET=<your-target> fakeroot debian/rules binary-cross
+
+ (substitute your target name, e.g. "arm" or "m68k", instead of
+ "<your-target>")
+
+---
+Nikita Youshchenko <yoush at cs.msu.su>
Modified: branches/binutils/package/debian/changelog
===================================================================
--- branches/binutils/package/debian/changelog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/changelog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,42 @@
+binutils (2.16.1cvs20060413-1) unstable; urgency=low
+
+ * New upstream CVS snapshot.
+ * 120_mips_xgot_multigot_workaround.dpatch: updated to work with CVS
+ r1.163 of bfd/elfxx-mips.c, pass 'info' instead of 'output_bfd' to
+ MIPS_ELF_GOT_MAX_SIZE().
+
+ * Patch from NIIBE Yutaka <gniibe at fsij.org> in #280884:
+ * debian/rules (configure-multi-stamp): Support m32r-linux. Closes:
+ #340264
+ * debian/rules: Run 'make check' only if build == host.
+
+ * debian/rules: Also don't run 'make check' if nocheck is in
+ DEB_BUILD_OPTIONS. Based on a patch from Michael Banck
+ <mbanck at debian.org>. Closes: #315290
+
+ * Integrate most of a patch to build arbitrary binutils-$TARGET
+ cross-packages from #231707. Thanks to Nikita V. Youshchenko
+ <yoush at cs.msu.su> and Josh Triplett <josh at freedesktop.org>.
+
+ * debian/copyright: update to include GFDL. Closes: #81950
+ * debian/copyright: update FSF address.
+
+ * debian/rules: move non-architecture specific conflicts (gas,
+ elf-binutils, modutils (<< 2.4.19-1)) out of a substitued variable and
+ into the control file. Rename variable to extraConflicts.
+ * debian/control: likewise.
+
+ -- James Troup <james at nocrew.org> Sat, 15 Apr 2006 03:05:41 +0100
+
+binutils (2.16.1cvs20060117-1) unstable; urgency=low
+
+ * New upstream CVS snapshot.
+
+ * 118_arm_pass_all.dpatch, 125_fix_tc_arm_cast.dpatch: merged upstream -
+ removed.
+
+ -- James Troup <james at nocrew.org> Wed, 18 Jan 2006 02:25:25 +0000
+
binutils (2.16.1cvs20051214-1) unstable; urgency=low
* New upstream CVS snapshot.
Modified: branches/binutils/package/debian/control
===================================================================
--- branches/binutils/package/debian/control 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/control 2006-04-19 08:33:31 UTC (rev 12)
@@ -9,7 +9,7 @@
Package: binutils
Architecture: any
Depends: ${shlibs:Depends}
-Conflicts: ${mainConflicts}
+Conflicts: gas, elf-binutils, modutils (<< 2.4.19-1) ${extraConflicts}
Provides: elf-binutils
Suggests: binutils-doc (= ${Source-Version})
Description: The GNU assembler, linker and binary utilities
Added: branches/binutils/package/debian/control.cross.in
===================================================================
--- branches/binutils/package/debian/control.cross.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/control.cross.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+Package: binutils-__TARGET__
+Architecture: any
+Depends: binutils, ${shlibs:Depends}
+Suggests: binutils-doc (= ${Source-Version})
+Priority: extra
+Description: The GNU binary utilities, for __TARGET__ target
+ This package provides GNU assembler, linker and binary utilities
+ for __TARGET__ target, for use in a cross-compilation environment.
+ .
+ You don't need this package unless you plan to cross-compile programs
+ for __TARGET__.
Modified: branches/binutils/package/debian/copyright
===================================================================
--- branches/binutils/package/debian/copyright 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/copyright 2006-04-19 08:33:31 UTC (rev 12)
@@ -8,7 +8,7 @@
It was previously maintained by Christopher C. Chimelis <chris at debian.org>
-GNU Binutils is Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+GNU Binutils is Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -21,8 +21,386 @@
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
On Debian GNU/Linux systems, the complete text of the GNU General
Public License can be found in `/usr/share/common-licenses/GPL'
and `/usr/share/common-licenses/LGPL'.
+
+The binutils manuals and associated documentation are also Copyright
+(C) Free Software Foundation, Inc. They are distributed under the GNU
+Free Documentation License Version 1.1 or any later version published
+by the Free Software Foundation; with no Invariant Sections, with no
+Front-Cover Texts, and with no Back-Cover Texts. A copy of the license
+is shown below:
+
+GNU Free Documentation License
+******************************
+
+ Version 1.1, March 2000
+ Copyright (C) 2000 Free Software Foundation, Inc.
+ 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+ 0. PREAMBLE
+
+ The purpose of this License is to make a manual, textbook, or other
+ written document "free" in the sense of freedom: to assure everyone
+ the effective freedom to copy and redistribute it, with or without
+ modifying it, either commercially or noncommercially. Secondarily,
+ this License preserves for the author and publisher a way to get
+ credit for their work, while not being considered responsible for
+ modifications made by others.
+
+ This License is a kind of "copyleft", which means that derivative
+ works of the document must themselves be free in the same sense.
+ It complements the GNU General Public License, which is a copyleft
+ license designed for free software.
+
+ We have designed this License in order to use it for manuals for
+ free software, because free software needs free documentation: a
+ free program should come with manuals providing the same freedoms
+ that the software does. But this License is not limited to
+ software manuals; it can be used for any textual work, regardless
+ of subject matter or whether it is published as a printed book.
+ We recommend this License principally for works whose purpose is
+ instruction or reference.
+
+
+ 1. APPLICABILITY AND DEFINITIONS
+
+ This License applies to any manual or other work that contains a
+ notice placed by the copyright holder saying it can be distributed
+ under the terms of this License. The "Document", below, refers to
+ any such manual or work. Any member of the public is a licensee,
+ and is addressed as "you."
+
+ A "Modified Version" of the Document means any work containing the
+ Document or a portion of it, either copied verbatim, or with
+ modifications and/or translated into another language.
+
+ A "Secondary Section" is a named appendix or a front-matter
+ section of the Document that deals exclusively with the
+ relationship of the publishers or authors of the Document to the
+ Document's overall subject (or to related matters) and contains
+ nothing that could fall directly within that overall subject.
+ (For example, if the Document is in part a textbook of
+ mathematics, a Secondary Section may not explain any mathematics.)
+ The relationship could be a matter of historical connection with
+ the subject or with related matters, or of legal, commercial,
+ philosophical, ethical or political position regarding them.
+
+ The "Invariant Sections" are certain Secondary Sections whose
+ titles are designated, as being those of Invariant Sections, in
+ the notice that says that the Document is released under this
+ License.
+
+ The "Cover Texts" are certain short passages of text that are
+ listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+ that says that the Document is released under this License.
+
+ A "Transparent" copy of the Document means a machine-readable copy,
+ represented in a format whose specification is available to the
+ general public, whose contents can be viewed and edited directly
+ and straightforwardly with generic text editors or (for images
+ composed of pixels) generic paint programs or (for drawings) some
+ widely available drawing editor, and that is suitable for input to
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+ otherwise Transparent file format whose markup has been designed
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+ Transparent. A copy that is not "Transparent" is called "Opaque."
+
+ Examples of suitable formats for Transparent copies include plain
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+ standard-conforming simple HTML designed for human modification.
+ Opaque formats include PostScript, PDF, proprietary formats that
+ can be read and edited only by proprietary word processors, SGML
+ or XML for which the DTD and/or processing tools are not generally
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+ processors for output purposes only.
+
+ The "Title Page" means, for a printed book, the title page itself,
+ plus such following pages as are needed to hold, legibly, the
+ material this License requires to appear in the title page. For
+ works in formats which do not have any title page as such, "Title
+ Page" means the text near the most prominent appearance of the
+ work's title, preceding the beginning of the body of the text.
+
+ 2. VERBATIM COPYING
+
+ You may copy and distribute the Document in any medium, either
+ commercially or noncommercially, provided that this License, the
+ copyright notices, and the license notice saying this License
+ applies to the Document are reproduced in all copies, and that you
+ add no other conditions whatsoever to those of this License. You
+ may not use technical measures to obstruct or control the reading
+ or further copying of the copies you make or distribute. However,
+ you may accept compensation in exchange for copies. If you
+ distribute a large enough number of copies you must also follow
+ the conditions in section 3.
+
+ You may also lend copies, under the same conditions stated above,
+ and you may publicly display copies.
+
+ 3. COPYING IN QUANTITY
+
+ If you publish printed copies of the Document numbering more than
+ 100, and the Document's license notice requires Cover Texts, you
+ must enclose the copies in covers that carry, clearly and legibly,
+ all these Cover Texts: Front-Cover Texts on the front cover, and
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+ covers, as long as they preserve the title of the Document and
+ satisfy these conditions, can be treated as verbatim copying in
+ other respects.
+
+ If the required texts for either cover are too voluminous to fit
+ legibly, you should put the first ones listed (as many as fit
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+ adjacent pages.
+
+ If you publish or distribute Opaque copies of the Document
+ numbering more than 100, you must either include a
+ machine-readable Transparent copy along with each Opaque copy, or
+ state in or with each Opaque copy a publicly-accessible
+ computer-network location containing a complete Transparent copy
+ of the Document, free of added material, which the general
+ network-using public has access to download anonymously at no
+ charge using public-standard network protocols. If you use the
+ latter option, you must take reasonably prudent steps, when you
+ begin distribution of Opaque copies in quantity, to ensure that
+ this Transparent copy will remain thus accessible at the stated
+ location until at least one year after the last time you
+ distribute an Opaque copy (directly or through your agents or
+ retailers) of that edition to the public.
+
+ It is requested, but not required, that you contact the authors of
+ the Document well before redistributing any large number of
+ copies, to give them a chance to provide you with an updated
+ version of the Document.
+
+ 4. MODIFICATIONS
+
+ You may copy and distribute a Modified Version of the Document
+ under the conditions of sections 2 and 3 above, provided that you
+ release the Modified Version under precisely this License, with
+ the Modified Version filling the role of the Document, thus
+ licensing distribution and modification of the Modified Version to
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+ things in the Modified Version:
+
+ A. Use in the Title Page (and on the covers, if any) a title
+ distinct from that of the Document, and from those of previous
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+ B. List on the Title Page, as authors, one or more persons or
+ entities responsible for authorship of the modifications in the
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+ has less than five).
+ C. State on the Title page the name of the publisher of the
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+ D. Preserve all the copyright notices of the Document.
+ E. Add an appropriate copyright notice for your modifications
+ adjacent to the other copyright notices.
+ F. Include, immediately after the copyright notices, a license
+ notice giving the public permission to use the Modified Version
+ under the terms of this License, in the form shown in the
+ Addendum below.
+ G. Preserve in that license notice the full lists of Invariant
+ Sections and required Cover Texts given in the Document's
+ license notice.
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+ to it an item stating at least the title, year, new authors, and
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+ If there is no section entitled "History" in the Document,
+ create one stating the title, year, authors, and publisher of
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+ describing the Modified Version as stated in the previous
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+ J. Preserve the network location, if any, given in the Document for
+ public access to a Transparent copy of the Document, and
+ likewise the network locations given in the Document for
+ previous versions it was based on. These may be placed in the
+ "History" section. You may omit a network location for a work
+ that was published at least four years before the Document
+ itself, or if the original publisher of the version it refers
+ to gives permission.
+ K. In any section entitled "Acknowledgements" or "Dedications",
+ preserve the section's title, and preserve in the section all the
+ substance and tone of each of the contributor acknowledgements
+ and/or dedications given therein.
+ L. Preserve all the Invariant Sections of the Document,
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+ M. Delete any section entitled "Endorsements." Such a section
+ may not be included in the Modified Version.
+ N. Do not retitle any existing section as "Endorsements" or to
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+
+ If the Modified Version includes new front-matter sections or
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+ designate some or all of these sections as invariant. To do this,
+ add their titles to the list of Invariant Sections in the Modified
+ Version's license notice. These titles must be distinct from any
+ other section titles.
+
+ You may add a section entitled "Endorsements", provided it contains
+ nothing but endorsements of your Modified Version by various
+ parties-for example, statements of peer review or that the text has
+ been approved by an organization as the authoritative definition
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+
+ You may add a passage of up to five words as a Front-Cover Text,
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+ of the list of Cover Texts in the Modified Version. Only one
+ passage of Front-Cover Text and one of Back-Cover Text may be
+ added by (or through arrangements made by) any one entity. If the
+ Document already includes a cover text for the same cover,
+ previously added by you or by arrangement made by the same entity
+ you are acting on behalf of, you may not add another; but you may
+ replace the old one, on explicit permission from the previous
+ publisher that added the old one.
+
+ The author(s) and publisher(s) of the Document do not by this
+ License give permission to use their names for publicity for or to
+ assert or imply endorsement of any Modified Version.
+
+ 5. COMBINING DOCUMENTS
+
+ You may combine the Document with other documents released under
+ this License, under the terms defined in section 4 above for
+ modified versions, provided that you include in the combination
+ all of the Invariant Sections of all of the original documents,
+ unmodified, and list them all as Invariant Sections of your
+ combined work in its license notice.
+
+ The combined work need only contain one copy of this License, and
+ multiple identical Invariant Sections may be replaced with a single
+ copy. If there are multiple Invariant Sections with the same name
+ but different contents, make the title of each such section unique
+ by adding at the end of it, in parentheses, the name of the
+ original author or publisher of that section if known, or else a
+ unique number. Make the same adjustment to the section titles in
+ the list of Invariant Sections in the license notice of the
+ combined work.
+
+ In the combination, you must combine any sections entitled
+ "History" in the various original documents, forming one section
+ entitled "History"; likewise combine any sections entitled
+ "Acknowledgements", and any sections entitled "Dedications." You
+ must delete all sections entitled "Endorsements."
+
+ 6. COLLECTIONS OF DOCUMENTS
+
+ You may make a collection consisting of the Document and other
+ documents released under this License, and replace the individual
+ copies of this License in the various documents with a single copy
+ that is included in the collection, provided that you follow the
+ rules of this License for verbatim copying of each of the
+ documents in all other respects.
+
+ You may extract a single document from such a collection, and
+ distribute it individually under this License, provided you insert
+ a copy of this License into the extracted document, and follow
+ this License in all other respects regarding verbatim copying of
+ that document.
+
+ 7. AGGREGATION WITH INDEPENDENT WORKS
+
+ A compilation of the Document or its derivatives with other
+ separate and independent documents or works, in or on a volume of
+ a storage or distribution medium, does not as a whole count as a
+ Modified Version of the Document, provided no compilation
+ copyright is claimed for the compilation. Such a compilation is
+ called an "aggregate", and this License does not apply to the
+ other self-contained works thus compiled with the Document, on
+ account of their being thus compiled, if they are not themselves
+ derivative works of the Document.
+
+ If the Cover Text requirement of section 3 is applicable to these
+ copies of the Document, then if the Document is less than one
+ quarter of the entire aggregate, the Document's Cover Texts may be
+ placed on covers that surround only the Document within the
+ aggregate. Otherwise they must appear on covers around the whole
+ aggregate.
+
+ 8. TRANSLATION
+
+ Translation is considered a kind of modification, so you may
+ distribute translations of the Document under the terms of section
+ 4. Replacing Invariant Sections with translations requires special
+ permission from their copyright holders, but you may include
+ translations of some or all Invariant Sections in addition to the
+ original versions of these Invariant Sections. You may include a
+ translation of this License provided that you also include the
+ original English version of this License. In case of a
+ disagreement between the translation and the original English
+ version of this License, the original English version will prevail.
+
+ 9. TERMINATION
+
+ You may not copy, modify, sublicense, or distribute the Document
+ except as expressly provided for under this License. Any other
+ attempt to copy, modify, sublicense or distribute the Document is
+ void, and will automatically terminate your rights under this
+ License. However, parties who have received copies, or rights,
+ from you under this License will not have their licenses
+ terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+ The Free Software Foundation may publish new, revised versions of
+ the GNU Free Documentation License from time to time. Such new
+ versions will be similar in spirit to the present version, but may
+ differ in detail to address new problems or concerns. See
+ http://www.gnu.org/copyleft/.
+
+ Each version of the License is given a distinguishing version
+ number. If the Document specifies that a particular numbered
+ version of this License "or any later version" applies to it, you
+ have the option of following the terms and conditions either of
+ that specified version or of any later version that has been
+ published (not as a draft) by the Free Software Foundation. If
+ the Document does not specify a version number of this License,
+ you may choose any version ever published (not as a draft) by the
+ Free Software Foundation.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+ Copyright (C) YEAR YOUR NAME.
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.1
+ or any later version published by the Free Software Foundation;
+ with the Invariant Sections being LIST THEIR TITLES, with the
+ Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+ A copy of the license is included in the section entitled "GNU
+ Free Documentation License."
+
+ If you have no Invariant Sections, write "with no Invariant Sections"
+instead of saying which ones are invariant. If you have no Front-Cover
+Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being
+LIST"; likewise for Back-Cover Texts.
+
+ If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
Modified: branches/binutils/package/debian/patches/00list
===================================================================
--- branches/binutils/package/debian/patches/00list 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/patches/00list 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,7 +4,5 @@
003_gprof_see_also_monitor
006_better_file_error
012_check_ldrunpath_length
-118_arm_pass_all
120_mips_xgot_multigot_workaround
121_i386_x86_64_biarch
-125_fix_tc_arm_cast
Modified: branches/binutils/package/debian/patches/120_mips_xgot_multigot_workaround.dpatch
===================================================================
--- branches/binutils/package/debian/patches/120_mips_xgot_multigot_workaround.dpatch 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/patches/120_mips_xgot_multigot_workaround.dpatch 2006-04-19 08:33:31 UTC (rev 12)
@@ -25,16 +25,16 @@
exit 0
@DPATCH@
-diff -urNad binutils-2.16/bfd/elfxx-mips.c /tmp/dpep.y4Hdz5/binutils-2.16/bfd/elfxx-mips.c
---- binutils-2.16/bfd/elfxx-mips.c 2005-05-09 15:31:30.272554473 +0200
-+++ /tmp/dpep.y4Hdz5/binutils-2.16/bfd/elfxx-mips.c 2005-05-09 15:31:30.871374791 +0200
-@@ -6595,7 +6595,9 @@
-
- if (s->size > MIPS_ELF_GOT_MAX_SIZE (output_bfd))
+diff -urNad --exclude=CVS --exclude=.svn ./bfd/elfxx-mips.c /tmp/dpep-work.6E2Wwi/binutils-2.16.1cvs20060413/bfd/elfxx-mips.c
+--- ./bfd/elfxx-mips.c 2006-04-14 00:58:48.000000000 +0100
++++ /tmp/dpep-work.6E2Wwi/binutils-2.16.1cvs20060413/bfd/elfxx-mips.c 2006-04-14 00:59:49.000000000 +0100
+@@ -7176,7 +7176,9 @@
+ dynamic loader. */
+ if (!htab->is_vxworks && s->size > MIPS_ELF_GOT_MAX_SIZE (info))
{
- if (! mips_elf_multi_got (output_bfd, info, g, s, local_gotno))
+ if (! mips_elf_multi_got (output_bfd, info, g, s, local_gotno)
-+ && g->global_gotno <= (MIPS_ELF_GOT_MAX_SIZE (output_bfd)
++ && g->global_gotno <= (MIPS_ELF_GOT_MAX_SIZE (info)
+ / MIPS_ELF_GOT_SIZE (output_bfd)))
return FALSE;
}
Modified: branches/binutils/package/debian/rules
===================================================================
--- branches/binutils/package/debian/rules 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/debian/rules 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,7 +2,7 @@
# debian/rules file - for binutils (2.16.1cvs20050902)
# Based on sample debian/rules file - for GNU Hello (1.3).
# Copyright 1994,1995 by Ian Jackson.
-# Copyright 1998-2005 James Troup
+# Copyright 1998-2006 James Troup
# I hereby give you perpetual unlimited permission to copy,
# modify and relicense this file, provided that you do not remove
# my name from the file itself. (I assert my moral right of
@@ -50,15 +50,15 @@
CONFARGS = --enable-shared --prefix=/usr --build=$(DEB_BUILD_GNU_TYPE) \
--host=$(DEB_HOST_GNU_TYPE)
-CONFLICTS = -VmainConflicts="gas, elf-binutils, modutils (<< 2.4.19-1)"
+CONFLICTS = -VextraConflicts=""
ifeq ($(DEB_HOST_ARCH),sparc)
CONFARGS += --enable-targets=sparc64-linux-gnu
- CONFLICTS = -VmainConflicts="gas, elf-binutils, modutils (<< 2.4.19-1), libc6-dev-sparc64 (<< 2.2.5-7)"
+ CONFLICTS = -VextraConflicts=", libc6-dev-sparc64 (<< 2.2.5-7)"
endif
ifeq ($(DEB_HOST_ARCH),sparc64)
CONFARGS += --enable-targets=sparc-linux-gnu
- CONFLICTS = -VmainConflicts="gas, elf-binutils, libc6-dev-sparc64 (<< 2.2.5-7)"
+ CONFLICTS = -VextraConflicts=", libc6-dev-sparc64 (<< 2.2.5-7)"
endif
ifeq ($(DEB_HOST_ARCH),powerpc)
CONFARGS += --enable-targets=powerpc64-linux-gnu
@@ -114,11 +114,15 @@
$(MAKE) -C builddir-single/bfd headers
$(MAKE) -C builddir-single \
CFLAGS="$(CFLAGS)"
+ifeq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE))
+ifneq ($(findstring nocheck,$(DEB_BUILD_OPTIONS)),nocheck)
-$(MAKE) -C builddir-single -k \
CFLAGS="$(CFLAGS)" check
cat builddir-single/binutils/binutils.sum \
builddir-single/gas/testsuite/gas.sum \
builddir-single/ld/ld.sum >> $(pwd)/test-summary
+endif
+endif
touch build-single-stamp
################################################################################
@@ -134,7 +138,7 @@
mkdir builddir-multi
cd builddir-multi \
&& env CC="$(CC)" ../configure $(CONFARGS) \
- --enable-targets=alpha-linux-gnu,arm-linux-gnu,hppa-linux-gnu,i486-gnu,i486-linux-gnu,ia64-linux-gnu,m68k-linux-gnu,m68k-rtems,mips-linux-gnu,mipsel-linux-gnu,mips64-linux-gnu,mips64el-linux-gnu,powerpc-linux-gnu,powerpc64-linux-gnu,s390-linux-gnu,s390x-linux-gnu,sh-linux-gnu,sparc-linux-gnu,sparc64-linux-gnu,x86_64-linux-gnu
+ --enable-targets=alpha-linux-gnu,arm-linux-gnu,hppa-linux-gnu,i486-gnu,i486-linux-gnu,ia64-linux-gnu,m68k-linux-gnu,m68k-rtems,mips-linux-gnu,mipsel-linux-gnu,mips64-linux-gnu,mips64el-linux-gnu,powerpc-linux-gnu,powerpc64-linux-gnu,s390-linux-gnu,s390x-linux-gnu,sh-linux-gnu,sparc-linux-gnu,sparc64-linux-gnu,x86_64-linux,m32r-linux-gnu
$(MAKE) -C builddir-multi configure-host
touch configure-multi-stamp
@@ -380,8 +384,13 @@
ln -sf $(p_bin) $(d_hppa64)/usr/share/doc/$(p_hppa64)
endif
- $(install_file) $(pwd)/test-summary binutils/NEWS \
- debian/README.Debian $(d_bin)/usr/share/doc/$(p_bin)/
+ifeq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE))
+ifneq ($(findstring nocheck,$(DEB_BUILD_OPTIONS)),nocheck)
+ $(install_file) $(pwd)/test-summary $(d_bin)/usr/share/doc/$(p_bin)/
+endif
+endif
+ $(install_file) binutils/NEWS debian/README.Debian debian/README.cross \
+ $(d_bin)/usr/share/doc/$(p_bin)/
$(install_file) binutils/ChangeLog $(d_bin)/usr/share/doc/$(p_bin)/changelog
@@ -440,6 +449,114 @@
################################################################################
+#################
+# cross targets #
+#################
+
+# If $(TARGET) is not set, try reading debian/target
+ifeq ($(TARGET),)
+TARGET := $(cat debian/target 2>/dev/null)
+endif
+
+# Process the following only if $(TARGET) is set
+ifneq ($(TARGET),)
+
+# Support TARGET both as Debian architecture specification (e.g. arm),
+# and as the target name (e.g. arm-linux-gnu).
+try_convert := $(shell dpkg-architecture -a$(TARGET) -qDEB_HOST_GNU_TYPE 2>/dev/null)
+ifneq ($(try_convert),)
+override TARGET := $(try_convert)
+endif
+
+p_cross = $(subst _,-,binutils-$(TARGET))
+d_cross = debian/$(p_cross)
+
+ifneq ($(filter sparc-linux-gnu powerpc-linux-gnu mips-linux-gnu, $(TARGET)),)
+ADDITIONAL_TARGETS = --enable-targets=$(TARGET:%-linux-gnu=%64-linux-gnu)
+endif
+ifneq ($(filter i386-linux-gnu i486-linux-gnu i586-linux-gnu x86-linux-gnu, $(TARGET)),)
+ADDITIONAL_TARGETS = --enable-targets=x86_64-linux-gnu
+endif
+ifeq ($(TARGET), x86_64-linux-gnu)
+ADDITIONAL_TARGETS = --enable-targets=i486-linux-gnu
+endif
+ifeq ($(TARGET), mipsel-linux-gnu)
+ADDITIONAL_TARGETS = --enable-targets=mips64el-linux-gnu
+endif
+ifeq ($(TARGET), sparc64-linux-gnu)
+ADDITIONAL_TARGETS = --enable-targets=sparc-linux-gnu
+endif
+ifeq ($(TARGET), s390-linux-gnu)
+ADDITIONAL_TARGETS = --enable-targets=s390x-linux-gnu
+endif
+ifeq ($(TARGET), s390x-linux-gnu)
+ADDITIONAL_TARGETS = --enable-targets=s390-linux-gnu
+endif
+
+configure-$(TARGET)-stamp: patch-stamp
+ $(checkdir)
+ test "" != "$(TARGET)"
+ rm -rf configure-$(TARGET)-stamp builddir-$(TARGET)
+ mkdir builddir-$(TARGET)
+ cd builddir-$(TARGET) \
+ && env CC="$(CC)" ../configure --host=$(DEB_HOST_GNU_TYPE) \
+ --build=$(DEB_BUILD_GNU_TYPE) --target=$(TARGET) --prefix=/usr \
+ $(ADDITIONAL_TARGETS)
+ touch $@
+
+build-$(TARGET)-stamp: configure-$(TARGET)-stamp
+ $(checkdir)
+ test "" != "$(TARGET)"
+ $(MAKE) -C builddir-$(TARGET) CFLAGS="$(CFLAGS)"
+ touch $@
+
+install-$(TARGET)-stamp: build-$(TARGET)-stamp
+ $(checkdir)
+ test "" != "$(TARGET)"
+ rm -rf $(d_cross)
+ $(MAKE) -C builddir-$(TARGET) prefix=$(pwd)/$(d_cross)/usr \
+ mandir=$(pwd)/$(d_cross)/usr/share/man install
+ rm -rf $(d_cross)/usr/lib $(d_cross)/usr/info $(d_cross)/usr/share/locale
+ $(STRIP) $(d_cross)/usr/bin/*
+ gzip -9 $(d_cross)/usr/share/man/man1/*
+ touch $@
+
+binary-cross: checkroot install-$(TARGET)-stamp
+ $(checkdir)
+ test "" != "$(TARGET)"
+
+ sed "/^$$/ q" < debian/control > debian/control.$(TARGET)
+ sed -e "s/__TARGET__/$$(echo -n $(TARGET) | sed s/_/-/g)/" \
+ < debian/control.cross.in >> debian/control.$(TARGET)
+
+ $(install_dir) $(d_cross)/DEBIAN
+
+ $(install_dir) $(d_cross)/usr/share/doc/$(p_cross)/
+ $(install_file) debian/changelog $(d_cross)/usr/share/doc/$(p_cross)/changelog.Debian
+ $(install_file) debian/copyright debian/README.cross $(d_cross)/usr/share/doc/$(p_cross)/
+ gzip -9f $(d_cross)/usr/share/doc/$(p_cross)/changelog.Debian
+
+ for pkg in bfd gas gprof ld; do \
+ ln -sf ../binutils/$$pkg $(d_cross)/usr/share/doc/$(p_cross)/$$pkg; \
+ done
+
+ rm -f debian/substvars
+ dpkg-shlibdeps $(d_cross)/usr/bin/*
+ dpkg-gencontrol -isp -cdebian/control.$(TARGET) -P$(d_cross) -p$(p_cross)
+ dpkg --build $(d_cross) ..
+
+clean-cross: unpatch
+ $(checkdir)
+ test "" != "$(TARGET)"
+ rm -rf $(d_cross) debian/control.$(TARGET) debian/files debian/substvars \
+ builddir-$(TARGET) {configure,build,install}-$(TARGET)-stamp
+
+.PHONY: binary-cross clean-cross
+
+endif
+
+################################################################################
+
define checkdir
test -f bfd/elf32.c -a -f debian/rules
endef
Modified: branches/binutils/package/etc/ChangeLog
===================================================================
--- branches/binutils/package/etc/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,19 @@
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.in: Add install-html target. Add htmldir,
+ docdir and datarootdir.
+ * configure.texi: Document install-html target.
+ * configure.in: AC_SUBST datarootdir, docdir, htmldir.
+ * configure: Regenerate.
+
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.in: TEXI2HTML uses makeinfo. Define
+ HTMLFILES. Add html targets.
+ * configure.texi: Use ifnottex. Add alternative
+ image format specifier as jpg.
+ * standards.texi: Use ifnottex.
+
2005-10-21 Mark Mitchell <mark at codesourcery.com>
* texi2pod.pl: Substitue for @value even when part of @include.
Modified: branches/binutils/package/etc/Makefile.in
===================================================================
--- branches/binutils/package/etc/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -25,7 +25,10 @@
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
+datarootdir = @datarootdir@
+docdir = @docdir@
infodir = @infodir@
+htmldir = @htmldir@
SHELL = /bin/sh
@@ -39,7 +42,10 @@
TEXI2DVI = `if [ -f ../texinfo/util/texi2dvi ]; \
then echo ../texinfo/util/texi2dvi; \
else echo texi2dvi; fi`
-TEXI2HTML = texi2html
+TEXI2HTML = `if [ -f ../texinfo/makeinfo/makeinfo ]; \
+ then echo "../texinfo/makeinfo/makeinfo --html"; \
+ else echo "makeinfo --html"; fi`
+
DVIPS = dvips
# Where to find texinfo.tex to format documentation with TeX.
@@ -50,6 +56,7 @@
INFOFILES = standards.info configure.info
DVIFILES = standards.dvi configure.dvi
+HTMLFILES = standards.html configure.html
all: info
install: install-info
@@ -82,6 +89,32 @@
done; \
fi
+html:
+ for f in $(HTMLFILES); do \
+ if test -f $(srcdir)/`echo $$f | sed -e 's/.html$$/.texi/'`; then \
+ if $(MAKE) "TEXI2HTML=$(TEXI2HTML)" $$f; then \
+ true; \
+ else \
+ exit 1; \
+ fi; \
+ fi; \
+ done
+
+install-html: html
+ $(SHELL) $(srcdir)/../mkinstalldirs $(DESTDIR)$(htmldir)
+ if test ! -f standards.html; then cd $(srcdir); fi; \
+ if test -f standards.html; then \
+ for i in standards.html*; do \
+ $(INSTALL_DATA) $$i $(DESTDIR)$(htmldir)/$$i; \
+ done; \
+ fi
+ if test ! -f configure.html; then cd $(srcdir); fi; \
+ if test -f configure.html; then \
+ for i in configure.html*; do \
+ $(INSTALL_DATA) $$i $(DESTDIR)$(htmldir)/$$i; \
+ done; \
+ fi
+
dvi:
for f in $(DVIFILES); do \
if test -f $(srcdir)/`echo $$f | sed -e 's/.dvi$$/.texi/'`; then \
@@ -96,6 +129,9 @@
standards.info: $(srcdir)/standards.texi $(srcdir)/make-stds.texi
$(MAKEINFO) --no-split -I$(srcdir) -o standards.info $(srcdir)/standards.texi
+standards.html: $(srcdir)/standards.texi $(srcdir)/make-stds.texi
+ $(TEXI2HTML) --no-split -I$(srcdir) -o standards.html $(srcdir)/standards.texi
+
standards.dvi: $(srcdir)/standards.texi
TEXINPUTS=$(TEXIDIR):$$TEXINPUTS $(TEXI2DVI) $(srcdir)/standards.texi
@@ -131,12 +167,15 @@
rm -f configdev.eps configbuild.eps
configure.html: $(srcdir)/configure.texi
- $(TEXI2HTML) -split_chapter $(srcdir)/configure.texi
+ cp $(srcdir)/configdev.jin configdev.jpg
+ cp $(srcdir)/configbuild.jin configbuild.jpg
+ $(TEXI2HTML) --no-split -I$(srcdir) -o configure.html $(srcdir)/configure.texi
clean:
rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs
- rm -f configdev.txt configbuild.txt configdev.eps configbuild.eps
+ rm -f configdev.txt configbuild.txt
+ rm -f configdev.eps configbuild.eps
rm -f configdev.jpg configbuild.jpg
mostlyclean: clean
@@ -145,6 +184,7 @@
rm -f Makefile config.status config.cache
maintainer-clean realclean: distclean
+ rm -f *.html*
rm -f *.info*
Makefile: $(srcdir)/Makefile.in $(host_makefile_frag) $(target_makefile_frag)
Modified: branches/binutils/package/etc/configure
===================================================================
--- branches/binutils/package/etc/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,26 +1,288 @@
#! /bin/sh
-
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.12.1
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
+# Generated by GNU Autoconf 2.59.
#
+# Copyright (C) 2003 Free Software Foundation, Inc.
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
+## --------------------- ##
+## M4sh Initialization. ##
+## --------------------- ##
-# Defaults:
-ac_help=
+# Be Bourne compatible
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+ emulate sh
+ NULLCMD=:
+ # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+ # is contrary to our usage. Disable this feature.
+ alias -g '${1+"$@"}'='"$@"'
+elif test -n "${BASH_VERSION+set}" && (set -o posix) >/dev/null 2>&1; then
+ set -o posix
+fi
+DUALCASE=1; export DUALCASE # for MKS sh
+
+# Support unset when possible.
+if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then
+ as_unset=unset
+else
+ as_unset=false
+fi
+
+
+# Work around bugs in pre-3.0 UWIN ksh.
+$as_unset ENV MAIL MAILPATH
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+for as_var in \
+ LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \
+ LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \
+ LC_TELEPHONE LC_TIME
+do
+ if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then
+ eval $as_var=C; export $as_var
+ else
+ $as_unset $as_var
+ fi
+done
+
+# Required to use basename.
+if expr a : '\(a\)' >/dev/null 2>&1; then
+ as_expr=expr
+else
+ as_expr=false
+fi
+
+if (basename /) >/dev/null 2>&1 && test "X`basename / 2>&1`" = "X/"; then
+ as_basename=basename
+else
+ as_basename=false
+fi
+
+
+# Name of the executable.
+as_me=`$as_basename "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+ X"$0" : 'X\(//\)$' \| \
+ X"$0" : 'X\(/\)$' \| \
+ . : '\(.\)' 2>/dev/null ||
+echo X/"$0" |
+ sed '/^.*\/\([^/][^/]*\)\/*$/{ s//\1/; q; }
+ /^X\/\(\/\/\)$/{ s//\1/; q; }
+ /^X\/\(\/\).*/{ s//\1/; q; }
+ s/.*/./; q'`
+
+
+# PATH needs CR, and LINENO needs CR and PATH.
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ echo "#! /bin/sh" >conf$$.sh
+ echo "exit 0" >>conf$$.sh
+ chmod +x conf$$.sh
+ if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+ PATH_SEPARATOR=';'
+ else
+ PATH_SEPARATOR=:
+ fi
+ rm -f conf$$.sh
+fi
+
+
+ as_lineno_1=$LINENO
+ as_lineno_2=$LINENO
+ as_lineno_3=`(expr $as_lineno_1 + 1) 2>/dev/null`
+ test "x$as_lineno_1" != "x$as_lineno_2" &&
+ test "x$as_lineno_3" = "x$as_lineno_2" || {
+ # Find who we are. Look in the path if we contain no path at all
+ # relative or not.
+ case $0 in
+ *[\\/]* ) as_myself=$0 ;;
+ *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+done
+
+ ;;
+ esac
+ # We did not find ourselves, most probably we were run as `sh COMMAND'
+ # in which case we are not to be found in the path.
+ if test "x$as_myself" = x; then
+ as_myself=$0
+ fi
+ if test ! -f "$as_myself"; then
+ { echo "$as_me: error: cannot find myself; rerun with an absolute path" >&2
+ { (exit 1); exit 1; }; }
+ fi
+ case $CONFIG_SHELL in
+ '')
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for as_base in sh bash ksh sh5; do
+ case $as_dir in
+ /*)
+ if ("$as_dir/$as_base" -c '
+ as_lineno_1=$LINENO
+ as_lineno_2=$LINENO
+ as_lineno_3=`(expr $as_lineno_1 + 1) 2>/dev/null`
+ test "x$as_lineno_1" != "x$as_lineno_2" &&
+ test "x$as_lineno_3" = "x$as_lineno_2" ') 2>/dev/null; then
+ $as_unset BASH_ENV || test "${BASH_ENV+set}" != set || { BASH_ENV=; export BASH_ENV; }
+ $as_unset ENV || test "${ENV+set}" != set || { ENV=; export ENV; }
+ CONFIG_SHELL=$as_dir/$as_base
+ export CONFIG_SHELL
+ exec "$CONFIG_SHELL" "$0" ${1+"$@"}
+ fi;;
+ esac
+ done
+done
+;;
+ esac
+
+ # Create $as_me.lineno as a copy of $as_myself, but with $LINENO
+ # uniformly replaced by the line number. The first 'sed' inserts a
+ # line-number line before each line; the second 'sed' does the real
+ # work. The second script uses 'N' to pair each line-number line
+ # with the numbered line, and appends trailing '-' during
+ # substitution so that $LINENO is not a special case at line end.
+ # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the
+ # second 'sed' script. Blame Lee E. McMahon for sed's syntax. :-)
+ sed '=' <$as_myself |
+ sed '
+ N
+ s,$,-,
+ : loop
+ s,^\(['$as_cr_digits']*\)\(.*\)[$]LINENO\([^'$as_cr_alnum'_]\),\1\2\1\3,
+ t loop
+ s,-$,,
+ s,^['$as_cr_digits']*\n,,
+ ' >$as_me.lineno &&
+ chmod +x $as_me.lineno ||
+ { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2
+ { (exit 1); exit 1; }; }
+
+ # Don't try to exec as it changes $[0], causing all sort of problems
+ # (the dirname of $[0] is not the place where we might find the
+ # original and so on. Autoconf is especially sensible to this).
+ . ./$as_me.lineno
+ # Exit status is that of the last command.
+ exit
+}
+
+
+case `echo "testing\c"; echo 1,2,3`,`echo -n testing; echo 1,2,3` in
+ *c*,-n*) ECHO_N= ECHO_C='
+' ECHO_T=' ' ;;
+ *c*,* ) ECHO_N=-n ECHO_C= ECHO_T= ;;
+ *) ECHO_N= ECHO_C='\c' ECHO_T= ;;
+esac
+
+if expr a : '\(a\)' >/dev/null 2>&1; then
+ as_expr=expr
+else
+ as_expr=false
+fi
+
+rm -f conf$$ conf$$.exe conf$$.file
+echo >conf$$.file
+if ln -s conf$$.file conf$$ 2>/dev/null; then
+ # We could just check for DJGPP; but this test a) works b) is more generic
+ # and c) will remain valid once DJGPP supports symlinks (DJGPP 2.04).
+ if test -f conf$$.exe; then
+ # Don't use ln at all; we don't have any links
+ as_ln_s='cp -p'
+ else
+ as_ln_s='ln -s'
+ fi
+elif ln conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s=ln
+else
+ as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.file
+
+if mkdir -p . 2>/dev/null; then
+ as_mkdir_p=:
+else
+ test -d ./-p && rmdir ./-p
+ as_mkdir_p=false
+fi
+
+as_executable_p="test -f"
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+# IFS
+# We need space, tab and new line, in precisely that order.
+as_nl='
+'
+IFS=" $as_nl"
+
+# CDPATH.
+$as_unset CDPATH
+
+
+# Name of the host.
+# hostname on some systems (SVR3.2, Linux) returns a bogus exit status,
+# so uname gets run too.
+ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q`
+
+exec 6>&1
+
+#
+# Initializations.
+#
ac_default_prefix=/usr/local
-# Any additions from configure.in:
+ac_config_libobj_dir=.
+cross_compiling=no
+subdirs=
+MFLAGS=
+MAKEFLAGS=
+SHELL=${CONFIG_SHELL-/bin/sh}
+# Maximum number of lines to put in a shell here document.
+# This variable seems obsolete. It should probably be removed, and
+# only ac_max_sed_lines should be used.
+: ${ac_max_here_lines=38}
+
+# Identity of this package.
+PACKAGE_NAME=
+PACKAGE_TARNAME=
+PACKAGE_VERSION=
+PACKAGE_STRING=
+PACKAGE_BUGREPORT=
+
+ac_unique_file="Makefile.in"
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
+ac_subst_files=''
+
# Initialize some variables set by options.
+ac_init_help=
+ac_init_version=false
# The variables have the same names as the options, with
# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
+cache_file=/dev/null
exec_prefix=NONE
-host=NONE
no_create=
-nonopt=NONE
no_recursion=
prefix=NONE
program_prefix=NONE
@@ -29,10 +291,15 @@
silent=
site=
srcdir=
-target=NONE
verbose=
x_includes=NONE
x_libraries=NONE
+
+# Installation directory options.
+# These are left unexpanded so users can "make install exec_prefix=/foo"
+# and all the variables that are supposed to be based on exec_prefix
+# by default will actually change.
+# Use braces instead of parens because sh, perl, etc. also accept them.
bindir='${exec_prefix}/bin'
sbindir='${exec_prefix}/sbin'
libexecdir='${exec_prefix}/libexec'
@@ -46,17 +313,9 @@
infodir='${prefix}/info'
mandir='${prefix}/man'
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
ac_prev=
for ac_option
do
-
# If the previous option needs an argument, assign it.
if test -n "$ac_prev"; then
eval "$ac_prev=\$ac_option"
@@ -64,59 +323,59 @@
continue
fi
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
+ ac_optarg=`expr "x$ac_option" : 'x[^=]*=\(.*\)'`
# Accept the important Cygnus configure options, so we can diagnose typos.
- case "$ac_option" in
+ case $ac_option in
-bindir | --bindir | --bindi | --bind | --bin | --bi)
ac_prev=bindir ;;
-bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
+ bindir=$ac_optarg ;;
-build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
+ ac_prev=build_alias ;;
-build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
+ build_alias=$ac_optarg ;;
-cache-file | --cache-file | --cache-fil | --cache-fi \
| --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
ac_prev=cache_file ;;
-cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
| --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- cache_file="$ac_optarg" ;;
+ cache_file=$ac_optarg ;;
+ --config-cache | -C)
+ cache_file=config.cache ;;
+
-datadir | --datadir | --datadi | --datad | --data | --dat | --da)
ac_prev=datadir ;;
-datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
| --da=*)
- datadir="$ac_optarg" ;;
+ datadir=$ac_optarg ;;
-disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
+ ac_feature=`expr "x$ac_option" : 'x-*disable-\(.*\)'`
# Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
+ expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null &&
+ { echo "$as_me: error: invalid feature name: $ac_feature" >&2
+ { (exit 1); exit 1; }; }
+ ac_feature=`echo $ac_feature | sed 's/-/_/g'`
+ eval "enable_$ac_feature=no" ;;
-enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
+ ac_feature=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'`
# Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
+ expr "x$ac_feature" : ".*[^-_$as_cr_alnum]" >/dev/null &&
+ { echo "$as_me: error: invalid feature name: $ac_feature" >&2
+ { (exit 1); exit 1; }; }
+ ac_feature=`echo $ac_feature | sed 's/-/_/g'`
+ case $ac_option in
+ *=*) ac_optarg=`echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"`;;
*) ac_optarg=yes ;;
esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
+ eval "enable_$ac_feature='$ac_optarg'" ;;
-exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
| --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
@@ -125,95 +384,47 @@
-exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
| --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
| --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
+ exec_prefix=$ac_optarg ;;
-gas | --gas | --ga | --g)
# Obsolete; use --with-gas.
with_gas=yes ;;
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
- cat << EOF
-Usage: configure [options] [host]
-Options: [defaults in brackets after descriptions]
-Configuration:
- --cache-file=FILE cache test results in FILE
- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
- --version print the version of autoconf that created configure
-Directory and file names:
- --prefix=PREFIX install architecture-independent files in PREFIX
- [$ac_default_prefix]
- --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
- [same as prefix]
- --bindir=DIR user executables in DIR [EPREFIX/bin]
- --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
- --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
- --datadir=DIR read-only architecture-independent data in DIR
- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
- --program-suffix=SUFFIX append SUFFIX to installed program names
- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
+ -help | --help | --hel | --he | -h)
+ ac_init_help=long ;;
+ -help=r* | --help=r* | --hel=r* | --he=r* | -hr*)
+ ac_init_help=recursive ;;
+ -help=s* | --help=s* | --hel=s* | --he=s* | -hs*)
+ ac_init_help=short ;;
-host | --host | --hos | --ho)
- ac_prev=host ;;
+ ac_prev=host_alias ;;
-host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
+ host_alias=$ac_optarg ;;
-includedir | --includedir | --includedi | --included | --include \
| --includ | --inclu | --incl | --inc)
ac_prev=includedir ;;
-includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
| --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
+ includedir=$ac_optarg ;;
-infodir | --infodir | --infodi | --infod | --info | --inf)
ac_prev=infodir ;;
-infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
+ infodir=$ac_optarg ;;
-libdir | --libdir | --libdi | --libd)
ac_prev=libdir ;;
-libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
+ libdir=$ac_optarg ;;
-libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
| --libexe | --libex | --libe)
ac_prev=libexecdir ;;
-libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
| --libexe=* | --libex=* | --libe=*)
- libexecdir="$ac_optarg" ;;
+ libexecdir=$ac_optarg ;;
-localstatedir | --localstatedir | --localstatedi | --localstated \
| --localstate | --localstat | --localsta | --localst \
@@ -222,19 +433,19 @@
-localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
| --localstate=* | --localstat=* | --localsta=* | --localst=* \
| --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
- localstatedir="$ac_optarg" ;;
+ localstatedir=$ac_optarg ;;
-mandir | --mandir | --mandi | --mand | --man | --ma | --m)
ac_prev=mandir ;;
-mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
- mandir="$ac_optarg" ;;
+ mandir=$ac_optarg ;;
-nfp | --nfp | --nf)
# Obsolete; use --without-fp.
with_fp=no ;;
-no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c)
+ | --no-cr | --no-c | -n)
no_create=yes ;;
-no-recursion | --no-recursion | --no-recursio | --no-recursi \
@@ -248,26 +459,26 @@
-oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
| --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
| --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
- oldincludedir="$ac_optarg" ;;
+ oldincludedir=$ac_optarg ;;
-prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
ac_prev=prefix ;;
-prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
- prefix="$ac_optarg" ;;
+ prefix=$ac_optarg ;;
-program-prefix | --program-prefix | --program-prefi | --program-pref \
| --program-pre | --program-pr | --program-p)
ac_prev=program_prefix ;;
-program-prefix=* | --program-prefix=* | --program-prefi=* \
| --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
- program_prefix="$ac_optarg" ;;
+ program_prefix=$ac_optarg ;;
-program-suffix | --program-suffix | --program-suffi | --program-suff \
| --program-suf | --program-su | --program-s)
ac_prev=program_suffix ;;
-program-suffix=* | --program-suffix=* | --program-suffi=* \
| --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
- program_suffix="$ac_optarg" ;;
+ program_suffix=$ac_optarg ;;
-program-transform-name | --program-transform-name \
| --program-transform-nam | --program-transform-na \
@@ -284,7 +495,7 @@
| --program-transfo=* | --program-transf=* \
| --program-trans=* | --program-tran=* \
| --progr-tra=* | --program-tr=* | --program-t=*)
- program_transform_name="$ac_optarg" ;;
+ program_transform_name=$ac_optarg ;;
-q | -quiet | --quiet | --quie | --qui | --qu | --q \
| -silent | --silent | --silen | --sile | --sil)
@@ -294,7 +505,7 @@
ac_prev=sbindir ;;
-sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
| --sbi=* | --sb=*)
- sbindir="$ac_optarg" ;;
+ sbindir=$ac_optarg ;;
-sharedstatedir | --sharedstatedir | --sharedstatedi \
| --sharedstated | --sharedstate | --sharedstat | --sharedsta \
@@ -305,58 +516,57 @@
| --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
| --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
| --sha=* | --sh=*)
- sharedstatedir="$ac_optarg" ;;
+ sharedstatedir=$ac_optarg ;;
-site | --site | --sit)
ac_prev=site ;;
-site=* | --site=* | --sit=*)
- site="$ac_optarg" ;;
+ site=$ac_optarg ;;
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
- srcdir="$ac_optarg" ;;
+ srcdir=$ac_optarg ;;
-sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
| --syscon | --sysco | --sysc | --sys | --sy)
ac_prev=sysconfdir ;;
-sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
| --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
- sysconfdir="$ac_optarg" ;;
+ sysconfdir=$ac_optarg ;;
-target | --target | --targe | --targ | --tar | --ta | --t)
- ac_prev=target ;;
+ ac_prev=target_alias ;;
-target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
- target="$ac_optarg" ;;
+ target_alias=$ac_optarg ;;
-v | -verbose | --verbose | --verbos | --verbo | --verb)
verbose=yes ;;
- -version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.12.1"
- exit 0 ;;
+ -version | --version | --versio | --versi | --vers | -V)
+ ac_init_version=: ;;
-with-* | --with-*)
- ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
+ ac_package=`expr "x$ac_option" : 'x-*with-\([^=]*\)'`
# Reject names that are not valid shell variable names.
- if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
- fi
+ expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null &&
+ { echo "$as_me: error: invalid package name: $ac_package" >&2
+ { (exit 1); exit 1; }; }
ac_package=`echo $ac_package| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
+ case $ac_option in
+ *=*) ac_optarg=`echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"`;;
*) ac_optarg=yes ;;
esac
- eval "with_${ac_package}='$ac_optarg'" ;;
+ eval "with_$ac_package='$ac_optarg'" ;;
-without-* | --without-*)
- ac_package=`echo $ac_option|sed -e 's/-*without-//'`
+ ac_package=`expr "x$ac_option" : 'x-*without-\(.*\)'`
# Reject names that are not valid shell variable names.
- if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
- fi
- ac_package=`echo $ac_package| sed 's/-/_/g'`
- eval "with_${ac_package}=no" ;;
+ expr "x$ac_package" : ".*[^-_$as_cr_alnum]" >/dev/null &&
+ { echo "$as_me: error: invalid package name: $ac_package" >&2
+ { (exit 1); exit 1; }; }
+ ac_package=`echo $ac_package | sed 's/-/_/g'`
+ eval "with_$ac_package=no" ;;
--x)
# Obsolete; use --with-x.
@@ -367,99 +577,110 @@
ac_prev=x_includes ;;
-x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
| --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
- x_includes="$ac_optarg" ;;
+ x_includes=$ac_optarg ;;
-x-libraries | --x-libraries | --x-librarie | --x-librari \
| --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
ac_prev=x_libraries ;;
-x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
| --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
- x_libraries="$ac_optarg" ;;
+ x_libraries=$ac_optarg ;;
- -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
+ -*) { echo "$as_me: error: unrecognized option: $ac_option
+Try \`$0 --help' for more information." >&2
+ { (exit 1); exit 1; }; }
;;
+ *=*)
+ ac_envvar=`expr "x$ac_option" : 'x\([^=]*\)='`
+ # Reject names that are not valid shell variable names.
+ expr "x$ac_envvar" : ".*[^_$as_cr_alnum]" >/dev/null &&
+ { echo "$as_me: error: invalid variable name: $ac_envvar" >&2
+ { (exit 1); exit 1; }; }
+ ac_optarg=`echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"`
+ eval "$ac_envvar='$ac_optarg'"
+ export $ac_envvar ;;
+
*)
- if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
- echo "configure: warning: $ac_option: invalid host type" 1>&2
- fi
- if test "x$nonopt" != xNONE; then
- { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
- fi
- nonopt="$ac_option"
+ # FIXME: should be removed in autoconf 3.0.
+ echo "$as_me: WARNING: you should use --build, --host, --target" >&2
+ expr "x$ac_option" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+ echo "$as_me: WARNING: invalid host type: $ac_option" >&2
+ : ${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}
;;
esac
done
if test -n "$ac_prev"; then
- { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
+ ac_option=--`echo $ac_prev | sed 's/_/-/g'`
+ { echo "$as_me: error: missing argument to $ac_option" >&2
+ { (exit 1); exit 1; }; }
fi
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+# Be sure to have absolute paths.
+for ac_var in exec_prefix prefix
+do
+ eval ac_val=$`echo $ac_var`
+ case $ac_val in
+ [\\/$]* | ?:[\\/]* | NONE | '' ) ;;
+ *) { echo "$as_me: error: expected an absolute directory name for --$ac_var: $ac_val" >&2
+ { (exit 1); exit 1; }; };;
+ esac
+done
-# File descriptor usage:
-# 0 standard input
-# 1 file creation
-# 2 errors and warnings
-# 3 some systems may open it to /dev/tty
-# 4 used on the Kubota Titan
-# 6 checking for... messages and results
-# 5 compiler messages saved in config.log
-if test "$silent" = yes; then
- exec 6>/dev/null
-else
- exec 6>&1
-fi
-exec 5>./config.log
-
-echo "\
-This file contains any messages produced by compilers while
-running configure, to aid debugging if configure makes a mistake.
-" 1>&5
-
-# Strip out --no-create and --no-recursion so they do not pile up.
-# Also quote any args containing shell metacharacters.
-ac_configure_args=
-for ac_arg
+# Be sure to have absolute paths.
+for ac_var in bindir sbindir libexecdir datadir sysconfdir sharedstatedir \
+ localstatedir libdir includedir oldincludedir infodir mandir
do
- case "$ac_arg" in
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c) ;;
- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
- *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
- ac_configure_args="$ac_configure_args '$ac_arg'" ;;
- *) ac_configure_args="$ac_configure_args $ac_arg" ;;
+ eval ac_val=$`echo $ac_var`
+ case $ac_val in
+ [\\/$]* | ?:[\\/]* ) ;;
+ *) { echo "$as_me: error: expected an absolute directory name for --$ac_var: $ac_val" >&2
+ { (exit 1); exit 1; }; };;
esac
done
-# NLS nuisances.
-# Only set these to C if already set. These must not be set unconditionally
-# because not all systems understand e.g. LANG=C (notably SCO).
-# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
-# Non-C LC_CTYPE values break the ctype check.
-if test "${LANG+set}" = set; then LANG=C; export LANG; fi
-if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
-if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
-if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
+# There might be people who depend on the old broken behavior: `$host'
+# used to hold the argument of --host etc.
+# FIXME: To remove some day.
+build=$build_alias
+host=$host_alias
+target=$target_alias
-# confdefs.h avoids OS command line length limits that DEFS can exceed.
-rm -rf conftest* confdefs.h
-# AIX cpp loses on an empty file, so make sure it contains at least a newline.
-echo > confdefs.h
+# FIXME: To remove some day.
+if test "x$host_alias" != x; then
+ if test "x$build_alias" = x; then
+ cross_compiling=maybe
+ echo "$as_me: WARNING: If you wanted to set the --build type, don't use --host.
+ If a cross compiler is detected then cross compile mode will be used." >&2
+ elif test "x$build_alias" != "x$host_alias"; then
+ cross_compiling=yes
+ fi
+fi
-# A filename unique to this package, relative to the directory that
-# configure is in, which we can look for to find out if srcdir is correct.
-ac_unique_file=Makefile.in
+ac_tool_prefix=
+test -n "$host_alias" && ac_tool_prefix=$host_alias-
+test "$silent" = yes && exec 6>/dev/null
+
+
# Find the source files, if location was not specified.
if test -z "$srcdir"; then
ac_srcdir_defaulted=yes
# Try the directory containing this script, then its parent.
- ac_prog=$0
- ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
- test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
+ ac_confdir=`(dirname "$0") 2>/dev/null ||
+$as_expr X"$0" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$0" : 'X\(//\)[^/]' \| \
+ X"$0" : 'X\(//\)$' \| \
+ X"$0" : 'X\(/\)' \| \
+ . : '\(.\)' 2>/dev/null ||
+echo X"$0" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ s//\1/; q; }
+ /^X\(\/\/\)[^/].*/{ s//\1/; q; }
+ /^X\(\/\/\)$/{ s//\1/; q; }
+ /^X\(\/\).*/{ s//\1/; q; }
+ s/.*/./; q'`
srcdir=$ac_confdir
if test ! -r $srcdir/$ac_unique_file; then
srcdir=..
@@ -469,13 +690,422 @@
fi
if test ! -r $srcdir/$ac_unique_file; then
if test "$ac_srcdir_defaulted" = yes; then
- { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
+ { echo "$as_me: error: cannot find sources ($ac_unique_file) in $ac_confdir or .." >&2
+ { (exit 1); exit 1; }; }
else
- { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
+ { echo "$as_me: error: cannot find sources ($ac_unique_file) in $srcdir" >&2
+ { (exit 1); exit 1; }; }
fi
fi
-srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
+(cd $srcdir && test -r ./$ac_unique_file) 2>/dev/null ||
+ { echo "$as_me: error: sources are in $srcdir, but \`cd $srcdir' does not work" >&2
+ { (exit 1); exit 1; }; }
+srcdir=`echo "$srcdir" | sed 's%\([^\\/]\)[\\/]*$%\1%'`
+ac_env_build_alias_set=${build_alias+set}
+ac_env_build_alias_value=$build_alias
+ac_cv_env_build_alias_set=${build_alias+set}
+ac_cv_env_build_alias_value=$build_alias
+ac_env_host_alias_set=${host_alias+set}
+ac_env_host_alias_value=$host_alias
+ac_cv_env_host_alias_set=${host_alias+set}
+ac_cv_env_host_alias_value=$host_alias
+ac_env_target_alias_set=${target_alias+set}
+ac_env_target_alias_value=$target_alias
+ac_cv_env_target_alias_set=${target_alias+set}
+ac_cv_env_target_alias_value=$target_alias
+#
+# Report the --help message.
+#
+if test "$ac_init_help" = "long"; then
+ # Omit some internal or obsolete options to make the list less imposing.
+ # This message is too long to be a string in the A/UX 3.1 sh.
+ cat <<_ACEOF
+\`configure' configures this package to adapt to many kinds of systems.
+
+Usage: $0 [OPTION]... [VAR=VALUE]...
+
+To assign environment variables (e.g., CC, CFLAGS...), specify them as
+VAR=VALUE. See below for descriptions of some of the useful variables.
+
+Defaults for the options are specified in brackets.
+
+Configuration:
+ -h, --help display this help and exit
+ --help=short display options specific to this package
+ --help=recursive display the short help of all the included packages
+ -V, --version display version information and exit
+ -q, --quiet, --silent do not print \`checking...' messages
+ --cache-file=FILE cache test results in FILE [disabled]
+ -C, --config-cache alias for \`--cache-file=config.cache'
+ -n, --no-create do not create output files
+ --srcdir=DIR find the sources in DIR [configure dir or \`..']
+
+_ACEOF
+
+ cat <<_ACEOF
+Installation directories:
+ --prefix=PREFIX install architecture-independent files in PREFIX
+ [$ac_default_prefix]
+ --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
+ [PREFIX]
+
+By default, \`make install' will install all the files in
+\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc. You can specify
+an installation prefix other than \`$ac_default_prefix' using \`--prefix',
+for instance \`--prefix=\$HOME'.
+
+For better control, use the options below.
+
+Fine tuning of the installation directories:
+ --bindir=DIR user executables [EPREFIX/bin]
+ --sbindir=DIR system admin executables [EPREFIX/sbin]
+ --libexecdir=DIR program executables [EPREFIX/libexec]
+ --datadir=DIR read-only architecture-independent data [PREFIX/share]
+ --sysconfdir=DIR read-only single-machine data [PREFIX/etc]
+ --sharedstatedir=DIR modifiable architecture-independent data [PREFIX/com]
+ --localstatedir=DIR modifiable single-machine data [PREFIX/var]
+ --libdir=DIR object code libraries [EPREFIX/lib]
+ --includedir=DIR C header files [PREFIX/include]
+ --oldincludedir=DIR C header files for non-gcc [/usr/include]
+ --infodir=DIR info documentation [PREFIX/info]
+ --mandir=DIR man documentation [PREFIX/man]
+_ACEOF
+
+ cat <<\_ACEOF
+_ACEOF
+fi
+
+if test -n "$ac_init_help"; then
+
+ cat <<\_ACEOF
+
+_ACEOF
+fi
+
+if test "$ac_init_help" = "recursive"; then
+ # If there are subdirs, report their specific --help.
+ ac_popdir=`pwd`
+ for ac_dir in : $ac_subdirs_all; do test "x$ac_dir" = x: && continue
+ test -d $ac_dir || continue
+ ac_builddir=.
+
+if test "$ac_dir" != .; then
+ ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'`
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_top_builddir=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,../,g'`
+else
+ ac_dir_suffix= ac_top_builddir=
+fi
+
+case $srcdir in
+ .) # No --srcdir option. We are building in place.
+ ac_srcdir=.
+ if test -z "$ac_top_builddir"; then
+ ac_top_srcdir=.
+ else
+ ac_top_srcdir=`echo $ac_top_builddir | sed 's,/$,,'`
+ fi ;;
+ [\\/]* | ?:[\\/]* ) # Absolute path.
+ ac_srcdir=$srcdir$ac_dir_suffix;
+ ac_top_srcdir=$srcdir ;;
+ *) # Relative path.
+ ac_srcdir=$ac_top_builddir$srcdir$ac_dir_suffix
+ ac_top_srcdir=$ac_top_builddir$srcdir ;;
+esac
+
+# Do not use `cd foo && pwd` to compute absolute paths, because
+# the directories may not exist.
+case `pwd` in
+.) ac_abs_builddir="$ac_dir";;
+*)
+ case "$ac_dir" in
+ .) ac_abs_builddir=`pwd`;;
+ [\\/]* | ?:[\\/]* ) ac_abs_builddir="$ac_dir";;
+ *) ac_abs_builddir=`pwd`/"$ac_dir";;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_top_builddir=${ac_top_builddir}.;;
+*)
+ case ${ac_top_builddir}. in
+ .) ac_abs_top_builddir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_top_builddir=${ac_top_builddir}.;;
+ *) ac_abs_top_builddir=$ac_abs_builddir/${ac_top_builddir}.;;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_srcdir=$ac_srcdir;;
+*)
+ case $ac_srcdir in
+ .) ac_abs_srcdir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_srcdir=$ac_srcdir;;
+ *) ac_abs_srcdir=$ac_abs_builddir/$ac_srcdir;;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_top_srcdir=$ac_top_srcdir;;
+*)
+ case $ac_top_srcdir in
+ .) ac_abs_top_srcdir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_top_srcdir=$ac_top_srcdir;;
+ *) ac_abs_top_srcdir=$ac_abs_builddir/$ac_top_srcdir;;
+ esac;;
+esac
+
+ cd $ac_dir
+ # Check for guested configure; otherwise get Cygnus style configure.
+ if test -f $ac_srcdir/configure.gnu; then
+ echo
+ $SHELL $ac_srcdir/configure.gnu --help=recursive
+ elif test -f $ac_srcdir/configure; then
+ echo
+ $SHELL $ac_srcdir/configure --help=recursive
+ elif test -f $ac_srcdir/configure.ac ||
+ test -f $ac_srcdir/configure.in; then
+ echo
+ $ac_configure --help
+ else
+ echo "$as_me: WARNING: no configuration information is in $ac_dir" >&2
+ fi
+ cd $ac_popdir
+ done
+fi
+
+test -n "$ac_init_help" && exit 0
+if $ac_init_version; then
+ cat <<\_ACEOF
+
+Copyright (C) 2003 Free Software Foundation, Inc.
+This configure script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it.
+_ACEOF
+ exit 0
+fi
+exec 5>config.log
+cat >&5 <<_ACEOF
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+It was created by $as_me, which was
+generated by GNU Autoconf 2.59. Invocation command line was
+
+ $ $0 $@
+
+_ACEOF
+{
+cat <<_ASUNAME
+## --------- ##
+## Platform. ##
+## --------- ##
+
+hostname = `(hostname || uname -n) 2>/dev/null | sed 1q`
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null || echo unknown`
+/bin/uname -X = `(/bin/uname -X) 2>/dev/null || echo unknown`
+
+/bin/arch = `(/bin/arch) 2>/dev/null || echo unknown`
+/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null || echo unknown`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null || echo unknown`
+hostinfo = `(hostinfo) 2>/dev/null || echo unknown`
+/bin/machine = `(/bin/machine) 2>/dev/null || echo unknown`
+/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null || echo unknown`
+/bin/universe = `(/bin/universe) 2>/dev/null || echo unknown`
+
+_ASUNAME
+
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ echo "PATH: $as_dir"
+done
+
+} >&5
+
+cat >&5 <<_ACEOF
+
+
+## ----------- ##
+## Core tests. ##
+## ----------- ##
+
+_ACEOF
+
+
+# Keep a trace of the command line.
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Strip out --silent because we don't want to record it for future runs.
+# Also quote any args containing shell meta-characters.
+# Make two passes to allow for proper duplicate-argument suppression.
+ac_configure_args=
+ac_configure_args0=
+ac_configure_args1=
+ac_sep=
+ac_must_keep_next=false
+for ac_pass in 1 2
+do
+ for ac_arg
+ do
+ case $ac_arg in
+ -no-create | --no-c* | -n | -no-recursion | --no-r*) continue ;;
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ continue ;;
+ *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?\"\']*)
+ ac_arg=`echo "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;;
+ esac
+ case $ac_pass in
+ 1) ac_configure_args0="$ac_configure_args0 '$ac_arg'" ;;
+ 2)
+ ac_configure_args1="$ac_configure_args1 '$ac_arg'"
+ if test $ac_must_keep_next = true; then
+ ac_must_keep_next=false # Got value, back to normal.
+ else
+ case $ac_arg in
+ *=* | --config-cache | -C | -disable-* | --disable-* \
+ | -enable-* | --enable-* | -gas | --g* | -nfp | --nf* \
+ | -q | -quiet | --q* | -silent | --sil* | -v | -verb* \
+ | -with-* | --with-* | -without-* | --without-* | --x)
+ case "$ac_configure_args0 " in
+ "$ac_configure_args1"*" '$ac_arg' "* ) continue ;;
+ esac
+ ;;
+ -* ) ac_must_keep_next=true ;;
+ esac
+ fi
+ ac_configure_args="$ac_configure_args$ac_sep'$ac_arg'"
+ # Get rid of the leading space.
+ ac_sep=" "
+ ;;
+ esac
+ done
+done
+$as_unset ac_configure_args0 || test "${ac_configure_args0+set}" != set || { ac_configure_args0=; export ac_configure_args0; }
+$as_unset ac_configure_args1 || test "${ac_configure_args1+set}" != set || { ac_configure_args1=; export ac_configure_args1; }
+
+# When interrupted or exit'd, cleanup temporary files, and complete
+# config.log. We remove comments because anyway the quotes in there
+# would cause problems or look ugly.
+# WARNING: Be sure not to use single quotes in there, as some shells,
+# such as our DU 5.0 friend, will then `close' the trap.
+trap 'exit_status=$?
+ # Save into config.log some information that might help in debugging.
+ {
+ echo
+
+ cat <<\_ASBOX
+## ---------------- ##
+## Cache variables. ##
+## ---------------- ##
+_ASBOX
+ echo
+ # The following way of writing the cache mishandles newlines in values,
+{
+ (set) 2>&1 |
+ case `(ac_space='"'"' '"'"'; set | grep ac_space) 2>&1` in
+ *ac_space=\ *)
+ sed -n \
+ "s/'"'"'/'"'"'\\\\'"'"''"'"'/g;
+ s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='"'"'\\2'"'"'/p"
+ ;;
+ *)
+ sed -n \
+ "s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1=\\2/p"
+ ;;
+ esac;
+}
+ echo
+
+ cat <<\_ASBOX
+## ----------------- ##
+## Output variables. ##
+## ----------------- ##
+_ASBOX
+ echo
+ for ac_var in $ac_subst_vars
+ do
+ eval ac_val=$`echo $ac_var`
+ echo "$ac_var='"'"'$ac_val'"'"'"
+ done | sort
+ echo
+
+ if test -n "$ac_subst_files"; then
+ cat <<\_ASBOX
+## ------------- ##
+## Output files. ##
+## ------------- ##
+_ASBOX
+ echo
+ for ac_var in $ac_subst_files
+ do
+ eval ac_val=$`echo $ac_var`
+ echo "$ac_var='"'"'$ac_val'"'"'"
+ done | sort
+ echo
+ fi
+
+ if test -s confdefs.h; then
+ cat <<\_ASBOX
+## ----------- ##
+## confdefs.h. ##
+## ----------- ##
+_ASBOX
+ echo
+ sed "/^$/d" confdefs.h | sort
+ echo
+ fi
+ test "$ac_signal" != 0 &&
+ echo "$as_me: caught signal $ac_signal"
+ echo "$as_me: exit $exit_status"
+ } >&5
+ rm -f core *.core &&
+ rm -rf conftest* confdefs* conf$$* $ac_clean_files &&
+ exit $exit_status
+ ' 0
+for ac_signal in 1 2 13 15; do
+ trap 'ac_signal='$ac_signal'; { (exit 1); exit 1; }' $ac_signal
+done
+ac_signal=0
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -rf conftest* confdefs.h
+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
+echo >confdefs.h
+
+# Predefined preprocessor variables.
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_NAME "$PACKAGE_NAME"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_TARNAME "$PACKAGE_TARNAME"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_VERSION "$PACKAGE_VERSION"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_STRING "$PACKAGE_STRING"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_BUGREPORT "$PACKAGE_BUGREPORT"
+_ACEOF
+
+
+# Let the site file select an alternate cache file if it wants to.
# Prefer explicitly selected file to automatically selected ones.
if test -z "$CONFIG_SITE"; then
if test "x$prefix" != xNONE; then
@@ -486,40 +1116,106 @@
fi
for ac_site_file in $CONFIG_SITE; do
if test -r "$ac_site_file"; then
- echo "loading site script $ac_site_file"
+ { echo "$as_me:$LINENO: loading site script $ac_site_file" >&5
+echo "$as_me: loading site script $ac_site_file" >&6;}
+ sed 's/^/| /' "$ac_site_file" >&5
. "$ac_site_file"
fi
done
if test -r "$cache_file"; then
- echo "loading cache $cache_file"
- . $cache_file
+ # Some versions of bash will fail to source /dev/null (special
+ # files actually), so we avoid doing that.
+ if test -f "$cache_file"; then
+ { echo "$as_me:$LINENO: loading cache $cache_file" >&5
+echo "$as_me: loading cache $cache_file" >&6;}
+ case $cache_file in
+ [\\/]* | ?:[\\/]* ) . $cache_file;;
+ *) . ./$cache_file;;
+ esac
+ fi
else
- echo "creating cache $cache_file"
- > $cache_file
+ { echo "$as_me:$LINENO: creating cache $cache_file" >&5
+echo "$as_me: creating cache $cache_file" >&6;}
+ >$cache_file
fi
+# Check that the precious variables saved in the cache have kept the same
+# value.
+ac_cache_corrupted=false
+for ac_var in `(set) 2>&1 |
+ sed -n 's/^ac_env_\([a-zA-Z_0-9]*\)_set=.*/\1/p'`; do
+ eval ac_old_set=\$ac_cv_env_${ac_var}_set
+ eval ac_new_set=\$ac_env_${ac_var}_set
+ eval ac_old_val="\$ac_cv_env_${ac_var}_value"
+ eval ac_new_val="\$ac_env_${ac_var}_value"
+ case $ac_old_set,$ac_new_set in
+ set,)
+ { echo "$as_me:$LINENO: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5
+echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;}
+ ac_cache_corrupted=: ;;
+ ,set)
+ { echo "$as_me:$LINENO: error: \`$ac_var' was not set in the previous run" >&5
+echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;}
+ ac_cache_corrupted=: ;;
+ ,);;
+ *)
+ if test "x$ac_old_val" != "x$ac_new_val"; then
+ { echo "$as_me:$LINENO: error: \`$ac_var' has changed since the previous run:" >&5
+echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;}
+ { echo "$as_me:$LINENO: former value: $ac_old_val" >&5
+echo "$as_me: former value: $ac_old_val" >&2;}
+ { echo "$as_me:$LINENO: current value: $ac_new_val" >&5
+echo "$as_me: current value: $ac_new_val" >&2;}
+ ac_cache_corrupted=:
+ fi;;
+ esac
+ # Pass precious variables to config.status.
+ if test "$ac_new_set" = set; then
+ case $ac_new_val in
+ *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?\"\']*)
+ ac_arg=$ac_var=`echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;;
+ *) ac_arg=$ac_var=$ac_new_val ;;
+ esac
+ case " $ac_configure_args " in
+ *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy.
+ *) ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+ esac
+ fi
+done
+if $ac_cache_corrupted; then
+ { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5
+echo "$as_me: error: changes in the environment can compromise the build" >&2;}
+ { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5
+echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;}
+ { (exit 1); exit 1; }; }
+fi
+
ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
-if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
- # Stardent Vistra SVR4 grep lacks -e, says ghazi at caip.rutgers.edu.
- if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
- ac_n= ac_c='
-' ac_t=' '
- else
- ac_n=-n ac_c= ac_t=
- fi
-else
- ac_n= ac_c='\c' ac_t=
-fi
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
ac_aux_dir=
for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do
if test -f $ac_dir/install-sh; then
@@ -530,14 +1226,20 @@
ac_aux_dir=$ac_dir
ac_install_sh="$ac_aux_dir/install.sh -c"
break
+ elif test -f $ac_dir/shtool; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/shtool install -c"
+ break
fi
done
if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." 1>&2; exit 1; }
+ { { echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." >&5
+echo "$as_me: error: cannot find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." >&2;}
+ { (exit 1); exit 1; }; }
fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
+ac_config_guess="$SHELL $ac_aux_dir/config.guess"
+ac_config_sub="$SHELL $ac_aux_dir/config.sub"
+ac_configure="$SHELL $ac_aux_dir/configure" # This should be Cygnus configure.
# Find a good install program. We prefer a C program (faster),
# so one script is as good as another. But avoid the broken or
@@ -546,317 +1248,993 @@
# SunOS /usr/etc/install
# IRIX /sbin/install
# AIX /bin/install
+# AmigaOS /C/install, which installs bootblocks on floppy discs
# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
# AFS /usr/afsws/bin/install, which mishandles nonexistent args
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# OS/2's system install, which has a completely different semantic
# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:555: checking for a BSD compatible install" >&5
+echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5
+echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6
if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
+if test "${ac_cv_path_install+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ # Account for people who put trailing slashes in PATH elements.
+case $as_dir/ in
+ ./ | .// | /cC/* | \
+ /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \
+ ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \
+ /usr/ucb/* ) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ # Don't use installbsd from OSF since it installs stuff as root
+ # by default.
+ for ac_prog in ginstall scoinst install; do
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if $as_executable_p "$as_dir/$ac_prog$ac_exec_ext"; then
if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
# AIX install. It has an incompatible calling convention.
:
+ elif test $ac_prog = install &&
+ grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+ # program-specific install script used by HP pwplus--don't use.
+ :
else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
+ ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c"
+ break 3
fi
fi
done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
+ done
+ ;;
+esac
+done
+
fi
if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
+ INSTALL=$ac_cv_path_install
else
# As a last resort, use the slow shell script. We don't cache a
# path for INSTALL within a source directory, because that will
# break other packages using the cache if that directory is
# removed, or if the path is relative.
- INSTALL="$ac_install_sh"
+ INSTALL=$ac_install_sh
fi
fi
-echo "$ac_t""$INSTALL" 1>&6
+echo "$as_me:$LINENO: result: $INSTALL" >&5
+echo "${ECHO_T}$INSTALL" >&6
# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
# It thinks the first close brace ends the variable substitution.
test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}'
+
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-trap '' 1 2 15
-cat > confcache <<\EOF
+
+
+
+
+
+ ac_config_files="$ac_config_files Makefile"
+cat >confcache <<\_ACEOF
# This file is a shell script that caches the results of configure
# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
+# scripts and configure runs, see configure's option --config-cache.
+# It is not useful on other systems. If it contains results you don't
+# want to keep, you may remove or edit it.
#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
+# config.status only pays attention to the cache file if you give it
+# the --recheck option to rerun configure.
#
-EOF
+# `ac_cv_env_foo' variables (set or unset) will be overridden when
+# loading this file, other *unset* `ac_cv_foo' will be assigned the
+# following values.
+
+_ACEOF
+
# The following way of writing the cache mishandles newlines in values,
# but we know of no workaround that is simple, portable, and efficient.
# So, don't put newlines in cache variables' values.
# Ultrix sh set writes to stderr and can't be redirected directly,
# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set) 2>&1 | grep ac_space` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
+{
+ (set) 2>&1 |
+ case `(ac_space=' '; set | grep ac_space) 2>&1` in
+ *ac_space=\ *)
+ # `set' does not quote correctly, so add quotes (double-quote
+ # substitution turns \\\\ into \\, and sed turns \\ into \).
+ sed -n \
+ "s/'/'\\\\''/g;
+ s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p"
+ ;;
+ *)
+ # `set' quotes correctly as required by POSIX, so do not add quotes.
+ sed -n \
+ "s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1=\\2/p"
+ ;;
+ esac;
+} |
+ sed '
+ t clear
+ : clear
+ s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/
+ t end
+ /^ac_cv_env/!s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/
+ : end' >>confcache
+if diff $cache_file confcache >/dev/null 2>&1; then :; else
if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
+ test "x$cache_file" != "x/dev/null" && echo "updating cache $cache_file"
+ cat confcache >$cache_file
else
echo "not updating unwritable cache $cache_file"
fi
fi
rm -f confcache
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
test "x$prefix" = xNONE && prefix=$ac_default_prefix
# Let make expand exec_prefix.
test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
+# VPATH may cause trouble with some makes, so we remove $(srcdir),
+# ${srcdir} and @srcdir@ from VPATH if srcdir is ".", strip leading and
+# trailing colons and then remove the whole line if VPATH becomes empty
+# (actually we leave an empty line to preserve line numbers).
if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
+ ac_vpsub='/^[ ]*VPATH[ ]*=/{
+s/:*\$(srcdir):*/:/;
+s/:*\${srcdir}:*/:/;
+s/:*@srcdir@:*/:/;
+s/^\([^=]*=[ ]*\):*/\1/;
+s/:*$//;
+s/^[^=]*=[ ]*$//;
+}'
fi
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
# Transform confdefs.h into DEFS.
# Protect against shell expansion while executing Makefile rules.
# Protect against Makefile macro expansion.
-cat > conftest.defs <<\EOF
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-s%\[%\\&%g
-s%\]%\\&%g
-s%\$%$$%g
-EOF
-DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-rm -f conftest.defs
+#
+# If the first sed substitution is executed (which looks for macros that
+# take arguments), then we branch to the quote section. Otherwise,
+# look for a macro that doesn't take arguments.
+cat >confdef2opt.sed <<\_ACEOF
+t clear
+: clear
+s,^[ ]*#[ ]*define[ ][ ]*\([^ (][^ (]*([^)]*)\)[ ]*\(.*\),-D\1=\2,g
+t quote
+s,^[ ]*#[ ]*define[ ][ ]*\([^ ][^ ]*\)[ ]*\(.*\),-D\1=\2,g
+t quote
+d
+: quote
+s,[ `~#$^&*(){}\\|;'"<>?],\\&,g
+s,\[,\\&,g
+s,\],\\&,g
+s,\$,$$,g
+p
+_ACEOF
+# We use echo to avoid assuming a particular line-breaking character.
+# The extra dot is to prevent the shell from consuming trailing
+# line-breaks from the sub-command output. A line-break within
+# single-quotes doesn't work because, if this script is created in a
+# platform that uses two characters for line-breaks (e.g., DOS), tr
+# would break.
+ac_LF_and_DOT=`echo; echo .`
+DEFS=`sed -n -f confdef2opt.sed confdefs.h | tr "$ac_LF_and_DOT" ' .'`
+rm -f confdef2opt.sed
-# Without the "./", some shells look in PATH for config.status.
+ac_libobjs=
+ac_ltlibobjs=
+for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue
+ # 1. Remove the extension, and $U if already installed.
+ ac_i=`echo "$ac_i" |
+ sed 's/\$U\././;s/\.o$//;s/\.obj$//'`
+ # 2. Add them.
+ ac_libobjs="$ac_libobjs $ac_i\$U.$ac_objext"
+ ac_ltlibobjs="$ac_ltlibobjs $ac_i"'$U.lo'
+done
+LIBOBJS=$ac_libobjs
+
+LTLIBOBJS=$ac_ltlibobjs
+
+
+
: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files $CONFIG_STATUS"
+{ echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5
+echo "$as_me: creating $CONFIG_STATUS" >&6;}
+cat >$CONFIG_STATUS <<_ACEOF
+#! $SHELL
+# Generated by $as_me.
# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
+# configure, is in config.log if it exists.
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
+debug=false
+ac_cs_recheck=false
+ac_cs_silent=false
+SHELL=\${CONFIG_SHELL-$SHELL}
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+## --------------------- ##
+## M4sh Initialization. ##
+## --------------------- ##
+
+# Be Bourne compatible
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+ emulate sh
+ NULLCMD=:
+ # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+ # is contrary to our usage. Disable this feature.
+ alias -g '${1+"$@"}'='"$@"'
+elif test -n "${BASH_VERSION+set}" && (set -o posix) >/dev/null 2>&1; then
+ set -o posix
+fi
+DUALCASE=1; export DUALCASE # for MKS sh
+
+# Support unset when possible.
+if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then
+ as_unset=unset
+else
+ as_unset=false
+fi
+
+
+# Work around bugs in pre-3.0 UWIN ksh.
+$as_unset ENV MAIL MAILPATH
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+for as_var in \
+ LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \
+ LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \
+ LC_TELEPHONE LC_TIME
do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.12.1"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
+ if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then
+ eval $as_var=C; export $as_var
+ else
+ $as_unset $as_var
+ fi
done
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
+# Required to use basename.
+if expr a : '\(a\)' >/dev/null 2>&1; then
+ as_expr=expr
+else
+ as_expr=false
+fi
-trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
+if (basename /) >/dev/null 2>&1 && test "X`basename / 2>&1`" = "X/"; then
+ as_basename=basename
+else
+ as_basename=false
+fi
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-CEOF
-EOF
+# Name of the executable.
+as_me=`$as_basename "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+ X"$0" : 'X\(//\)$' \| \
+ X"$0" : 'X\(/\)$' \| \
+ . : '\(.\)' 2>/dev/null ||
+echo X/"$0" |
+ sed '/^.*\/\([^/][^/]*\)\/*$/{ s//\1/; q; }
+ /^X\/\(\/\/\)$/{ s//\1/; q; }
+ /^X\/\(\/\).*/{ s//\1/; q; }
+ s/.*/./; q'`
-cat >> $CONFIG_STATUS <<\EOF
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+# PATH needs CR, and LINENO needs CR and PATH.
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+ echo "#! /bin/sh" >conf$$.sh
+ echo "exit 0" >>conf$$.sh
+ chmod +x conf$$.sh
+ if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+ PATH_SEPARATOR=';'
else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ PATH_SEPARATOR=:
fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
+ rm -f conf$$.sh
+fi
+
+
+ as_lineno_1=$LINENO
+ as_lineno_2=$LINENO
+ as_lineno_3=`(expr $as_lineno_1 + 1) 2>/dev/null`
+ test "x$as_lineno_1" != "x$as_lineno_2" &&
+ test "x$as_lineno_3" = "x$as_lineno_2" || {
+ # Find who we are. Look in the path if we contain no path at all
+ # relative or not.
+ case $0 in
+ *[\\/]* ) as_myself=$0 ;;
+ *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+done
+
+ ;;
+ esac
+ # We did not find ourselves, most probably we were run as `sh COMMAND'
+ # in which case we are not to be found in the path.
+ if test "x$as_myself" = x; then
+ as_myself=$0
+ fi
+ if test ! -f "$as_myself"; then
+ { { echo "$as_me:$LINENO: error: cannot find myself; rerun with an absolute path" >&5
+echo "$as_me: error: cannot find myself; rerun with an absolute path" >&2;}
+ { (exit 1); exit 1; }; }
+ fi
+ case $CONFIG_SHELL in
+ '')
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for as_base in sh bash ksh sh5; do
+ case $as_dir in
+ /*)
+ if ("$as_dir/$as_base" -c '
+ as_lineno_1=$LINENO
+ as_lineno_2=$LINENO
+ as_lineno_3=`(expr $as_lineno_1 + 1) 2>/dev/null`
+ test "x$as_lineno_1" != "x$as_lineno_2" &&
+ test "x$as_lineno_3" = "x$as_lineno_2" ') 2>/dev/null; then
+ $as_unset BASH_ENV || test "${BASH_ENV+set}" != set || { BASH_ENV=; export BASH_ENV; }
+ $as_unset ENV || test "${ENV+set}" != set || { ENV=; export ENV; }
+ CONFIG_SHELL=$as_dir/$as_base
+ export CONFIG_SHELL
+ exec "$CONFIG_SHELL" "$0" ${1+"$@"}
+ fi;;
+ esac
+ done
+done
+;;
+ esac
+
+ # Create $as_me.lineno as a copy of $as_myself, but with $LINENO
+ # uniformly replaced by the line number. The first 'sed' inserts a
+ # line-number line before each line; the second 'sed' does the real
+ # work. The second script uses 'N' to pair each line-number line
+ # with the numbered line, and appends trailing '-' during
+ # substitution so that $LINENO is not a special case at line end.
+ # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the
+ # second 'sed' script. Blame Lee E. McMahon for sed's syntax. :-)
+ sed '=' <$as_myself |
+ sed '
+ N
+ s,$,-,
+ : loop
+ s,^\(['$as_cr_digits']*\)\(.*\)[$]LINENO\([^'$as_cr_alnum'_]\),\1\2\1\3,
+ t loop
+ s,-$,,
+ s,^['$as_cr_digits']*\n,,
+ ' >$as_me.lineno &&
+ chmod +x $as_me.lineno ||
+ { { echo "$as_me:$LINENO: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&5
+echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2;}
+ { (exit 1); exit 1; }; }
+
+ # Don't try to exec as it changes $[0], causing all sort of problems
+ # (the dirname of $[0] is not the place where we might find the
+ # original and so on. Autoconf is especially sensible to this).
+ . ./$as_me.lineno
+ # Exit status is that of the last command.
+ exit
+}
+
+
+case `echo "testing\c"; echo 1,2,3`,`echo -n testing; echo 1,2,3` in
+ *c*,-n*) ECHO_N= ECHO_C='
+' ECHO_T=' ' ;;
+ *c*,* ) ECHO_N=-n ECHO_C= ECHO_T= ;;
+ *) ECHO_N= ECHO_C='\c' ECHO_T= ;;
+esac
+
+if expr a : '\(a\)' >/dev/null 2>&1; then
+ as_expr=expr
+else
+ as_expr=false
+fi
+
+rm -f conf$$ conf$$.exe conf$$.file
+echo >conf$$.file
+if ln -s conf$$.file conf$$ 2>/dev/null; then
+ # We could just check for DJGPP; but this test a) works b) is more generic
+ # and c) will remain valid once DJGPP supports symlinks (DJGPP 2.04).
+ if test -f conf$$.exe; then
+ # Don't use ln at all; we don't have any links
+ as_ln_s='cp -p'
else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ as_ln_s='ln -s'
fi
+elif ln conf$$.file conf$$ 2>/dev/null; then
+ as_ln_s=ln
+else
+ as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.file
+
+if mkdir -p . 2>/dev/null; then
+ as_mkdir_p=:
+else
+ test -d ./-p && rmdir ./-p
+ as_mkdir_p=false
+fi
+
+as_executable_p="test -f"
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+# IFS
+# We need space, tab and new line, in precisely that order.
+as_nl='
+'
+IFS=" $as_nl"
+
+# CDPATH.
+$as_unset CDPATH
+
+exec 6>&1
+
+# Open the log real soon, to keep \$[0] and so on meaningful, and to
+# report actual input values of CONFIG_FILES etc. instead of their
+# values after options handling. Logging --version etc. is OK.
+exec 5>>config.log
+{
+ echo
+ sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX
+## Running $as_me. ##
+_ASBOX
+} >&5
+cat >&5 <<_CSEOF
+
+This file was extended by $as_me, which was
+generated by GNU Autoconf 2.59. Invocation command line was
+
+ CONFIG_FILES = $CONFIG_FILES
+ CONFIG_HEADERS = $CONFIG_HEADERS
+ CONFIG_LINKS = $CONFIG_LINKS
+ CONFIG_COMMANDS = $CONFIG_COMMANDS
+ $ $0 $@
+
+_CSEOF
+echo "on `(hostname || uname -n) 2>/dev/null | sed 1q`" >&5
+echo >&5
+_ACEOF
+
+# Files that config.status was made for.
+if test -n "$ac_config_files"; then
+ echo "config_files=\"$ac_config_files\"" >>$CONFIG_STATUS
+fi
+
+if test -n "$ac_config_headers"; then
+ echo "config_headers=\"$ac_config_headers\"" >>$CONFIG_STATUS
+fi
+
+if test -n "$ac_config_links"; then
+ echo "config_links=\"$ac_config_links\"" >>$CONFIG_STATUS
+fi
+
+if test -n "$ac_config_commands"; then
+ echo "config_commands=\"$ac_config_commands\"" >>$CONFIG_STATUS
+fi
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+
+ac_cs_usage="\
+\`$as_me' instantiates files from templates according to the
+current configuration.
+
+Usage: $0 [OPTIONS] [FILE]...
+
+ -h, --help print this help, then exit
+ -V, --version print version number, then exit
+ -q, --quiet do not print progress messages
+ -d, --debug don't remove temporary files
+ --recheck update $as_me by reconfiguring in the same conditions
+ --file=FILE[:TEMPLATE]
+ instantiate the configuration file FILE
+
+Configuration files:
+$config_files
+
+Report bugs to <bug-autoconf at gnu.org>."
+_ACEOF
+
+cat >>$CONFIG_STATUS <<_ACEOF
+ac_cs_version="\\
+config.status
+configured by $0, generated by GNU Autoconf 2.59,
+ with options \\"`echo "$ac_configure_args" | sed 's/[\\""\`\$]/\\\\&/g'`\\"
+
+Copyright (C) 2003 Free Software Foundation, Inc.
+This config.status script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it."
+srcdir=$srcdir
+INSTALL="$INSTALL"
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+# If no file are specified by the user, then we need to provide default
+# value. By we need to know if files were specified by the user.
+ac_need_defaults=:
+while test $# != 0
+do
+ case $1 in
+ --*=*)
+ ac_option=`expr "x$1" : 'x\([^=]*\)='`
+ ac_optarg=`expr "x$1" : 'x[^=]*=\(.*\)'`
+ ac_shift=:
+ ;;
+ -*)
+ ac_option=$1
+ ac_optarg=$2
+ ac_shift=shift
+ ;;
+ *) # This is not an option, so the user has probably given explicit
+ # arguments.
+ ac_option=$1
+ ac_need_defaults=false;;
+ esac
+
+ case $ac_option in
+ # Handling of the options.
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ ac_cs_recheck=: ;;
+ --version | --vers* | -V )
+ echo "$ac_cs_version"; exit 0 ;;
+ --he | --h)
+ # Conflict between --help and --header
+ { { echo "$as_me:$LINENO: error: ambiguous option: $1
+Try \`$0 --help' for more information." >&5
+echo "$as_me: error: ambiguous option: $1
+Try \`$0 --help' for more information." >&2;}
+ { (exit 1); exit 1; }; };;
+ --help | --hel | -h )
+ echo "$ac_cs_usage"; exit 0 ;;
+ --debug | --d* | -d )
+ debug=: ;;
+ --file | --fil | --fi | --f )
+ $ac_shift
+ CONFIG_FILES="$CONFIG_FILES $ac_optarg"
+ ac_need_defaults=false;;
+ --header | --heade | --head | --hea )
+ $ac_shift
+ CONFIG_HEADERS="$CONFIG_HEADERS $ac_optarg"
+ ac_need_defaults=false;;
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil | --si | --s)
+ ac_cs_silent=: ;;
+
+ # This is an error.
+ -*) { { echo "$as_me:$LINENO: error: unrecognized option: $1
+Try \`$0 --help' for more information." >&5
+echo "$as_me: error: unrecognized option: $1
+Try \`$0 --help' for more information." >&2;}
+ { (exit 1); exit 1; }; } ;;
+
+ *) ac_config_targets="$ac_config_targets $1" ;;
+
+ esac
+ shift
done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
+
+ac_configure_extra_args=
+
+if $ac_cs_silent; then
+ exec 6>/dev/null
+ ac_configure_extra_args="$ac_configure_extra_args --silent"
fi
-EOF
-cat >> $CONFIG_STATUS <<EOF
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+if \$ac_cs_recheck; then
+ echo "running $SHELL $0 " $ac_configure_args \$ac_configure_extra_args " --no-create --no-recursion" >&6
+ exec $SHELL $0 $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion
+fi
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
+_ACEOF
+
+
+
+
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+for ac_config_target in $ac_config_targets
+do
+ case "$ac_config_target" in
+ # Handling of arguments.
+ "Makefile" ) CONFIG_FILES="$CONFIG_FILES Makefile" ;;
+ *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5
+echo "$as_me: error: invalid argument: $ac_config_target" >&2;}
+ { (exit 1); exit 1; }; };;
esac
+done
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+# If the user did not use the arguments to specify the items to instantiate,
+# then the envvar interface is used. Set only those that are not.
+# We use the long form for the default assignment because of an extremely
+# bizarre bug on SunOS 4.1.3.
+if $ac_need_defaults; then
+ test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files
+fi
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
+# Have a temporary directory for convenience. Make it in the build tree
+# simply because there is no reason to put it here, and in addition,
+# creating and moving files from /tmp can sometimes cause problems.
+# Create a temporary directory, and hook for its removal unless debugging.
+$debug ||
+{
+ trap 'exit_status=$?; rm -rf $tmp && exit $exit_status' 0
+ trap '{ (exit 1); exit 1; }' 1 2 13 15
+}
+
+# Create a (secure) tmp directory for tmp files.
+
+{
+ tmp=`(umask 077 && mktemp -d -q "./confstatXXXXXX") 2>/dev/null` &&
+ test -n "$tmp" && test -d "$tmp"
+} ||
+{
+ tmp=./confstat$$-$RANDOM
+ (umask 077 && mkdir $tmp)
+} ||
+{
+ echo "$me: cannot create a temporary directory in ." >&2
+ { (exit 1); exit 1; }
+}
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<_ACEOF
+
+#
+# CONFIG_FILES section.
+#
+
+# No need to generate the scripts if there are no CONFIG_FILES.
+# This happens for instance when ./config.status config.h
+if test -n "\$CONFIG_FILES"; then
+ # Protect against being on the right side of a sed subst in config.status.
+ sed 's/,@/@@/; s/@,/@@/; s/,;t t\$/@;t t/; /@;t t\$/s/[\\\\&,]/\\\\&/g;
+ s/@@/,@/; s/@@/@,/; s/@;t t\$/,;t t/' >\$tmp/subs.sed <<\\CEOF
+s, at SHELL@,$SHELL,;t t
+s, at PATH_SEPARATOR@,$PATH_SEPARATOR,;t t
+s, at PACKAGE_NAME@,$PACKAGE_NAME,;t t
+s, at PACKAGE_TARNAME@,$PACKAGE_TARNAME,;t t
+s, at PACKAGE_VERSION@,$PACKAGE_VERSION,;t t
+s, at PACKAGE_STRING@,$PACKAGE_STRING,;t t
+s, at PACKAGE_BUGREPORT@,$PACKAGE_BUGREPORT,;t t
+s, at exec_prefix@,$exec_prefix,;t t
+s, at prefix@,$prefix,;t t
+s, at program_transform_name@,$program_transform_name,;t t
+s, at bindir@,$bindir,;t t
+s, at sbindir@,$sbindir,;t t
+s, at libexecdir@,$libexecdir,;t t
+s, at datadir@,$datadir,;t t
+s, at sysconfdir@,$sysconfdir,;t t
+s, at sharedstatedir@,$sharedstatedir,;t t
+s, at localstatedir@,$localstatedir,;t t
+s, at libdir@,$libdir,;t t
+s, at includedir@,$includedir,;t t
+s, at oldincludedir@,$oldincludedir,;t t
+s, at infodir@,$infodir,;t t
+s, at mandir@,$mandir,;t t
+s, at build_alias@,$build_alias,;t t
+s, at host_alias@,$host_alias,;t t
+s, at target_alias@,$target_alias,;t t
+s, at DEFS@,$DEFS,;t t
+s, at ECHO_C@,$ECHO_C,;t t
+s, at ECHO_N@,$ECHO_N,;t t
+s, at ECHO_T@,$ECHO_T,;t t
+s, at LIBS@,$LIBS,;t t
+s, at INSTALL_PROGRAM@,$INSTALL_PROGRAM,;t t
+s, at INSTALL_SCRIPT@,$INSTALL_SCRIPT,;t t
+s, at INSTALL_DATA@,$INSTALL_DATA,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
+s, at LIBOBJS@,$LIBOBJS,;t t
+s, at LTLIBOBJS@,$LTLIBOBJS,;t t
+CEOF
+
+_ACEOF
+
+ cat >>$CONFIG_STATUS <<\_ACEOF
+ # Split the substitutions into bite-sized pieces for seds with
+ # small command number limits, like on Digital OSF/1 and HP-UX.
+ ac_max_sed_lines=48
+ ac_sed_frag=1 # Number of current file.
+ ac_beg=1 # First line for current file.
+ ac_end=$ac_max_sed_lines # Line after last line for current file.
+ ac_more_lines=:
+ ac_sed_cmds=
+ while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" $tmp/subs.sed >$tmp/subs.frag
+ else
+ sed "${ac_end}q" $tmp/subs.sed >$tmp/subs.frag
+ fi
+ if test ! -s $tmp/subs.frag; then
+ ac_more_lines=false
+ else
+ # The purpose of the label and of the branching condition is to
+ # speed up the sed processing (if there are no `@' at all, there
+ # is no need to browse any of the substitutions).
+ # These are the two extra sed commands mentioned above.
+ (echo ':t
+ /@[a-zA-Z_][a-zA-Z_0-9]*@/!b' && cat $tmp/subs.frag) >$tmp/subs-$ac_sed_frag.sed
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f $tmp/subs-$ac_sed_frag.sed"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f $tmp/subs-$ac_sed_frag.sed"
+ fi
+ ac_sed_frag=`expr $ac_sed_frag + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_lines`
+ fi
+ done
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
fi
+fi # test -n "$CONFIG_FILES"
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+for ac_file in : $CONFIG_FILES; do test "x$ac_file" = x: && continue
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case $ac_file in
+ - | *:- | *:-:* ) # input from stdin
+ cat >$tmp/stdin
+ ac_file_in=`echo "$ac_file" | sed 's,[^:]*:,,'`
+ ac_file=`echo "$ac_file" | sed 's,:.*,,'` ;;
+ *:* ) ac_file_in=`echo "$ac_file" | sed 's,[^:]*:,,'`
+ ac_file=`echo "$ac_file" | sed 's,:.*,,'` ;;
+ * ) ac_file_in=$ac_file.in ;;
esac
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
+ # Compute @srcdir@, @top_srcdir@, and @INSTALL@ for subdirectories.
+ ac_dir=`(dirname "$ac_file") 2>/dev/null ||
+$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$ac_file" : 'X\(//\)[^/]' \| \
+ X"$ac_file" : 'X\(//\)$' \| \
+ X"$ac_file" : 'X\(/\)' \| \
+ . : '\(.\)' 2>/dev/null ||
+echo X"$ac_file" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ s//\1/; q; }
+ /^X\(\/\/\)[^/].*/{ s//\1/; q; }
+ /^X\(\/\/\)$/{ s//\1/; q; }
+ /^X\(\/\).*/{ s//\1/; q; }
+ s/.*/./; q'`
+ { if $as_mkdir_p; then
+ mkdir -p "$ac_dir"
+ else
+ as_dir="$ac_dir"
+ as_dirs=
+ while test ! -d "$as_dir"; do
+ as_dirs="$as_dir $as_dirs"
+ as_dir=`(dirname "$as_dir") 2>/dev/null ||
+$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+ X"$as_dir" : 'X\(//\)[^/]' \| \
+ X"$as_dir" : 'X\(//\)$' \| \
+ X"$as_dir" : 'X\(/\)' \| \
+ . : '\(.\)' 2>/dev/null ||
+echo X"$as_dir" |
+ sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ s//\1/; q; }
+ /^X\(\/\/\)[^/].*/{ s//\1/; q; }
+ /^X\(\/\/\)$/{ s//\1/; q; }
+ /^X\(\/\).*/{ s//\1/; q; }
+ s/.*/./; q'`
+ done
+ test ! -n "$as_dirs" || mkdir $as_dirs
+ fi || { { echo "$as_me:$LINENO: error: cannot create directory \"$ac_dir\"" >&5
+echo "$as_me: error: cannot create directory \"$ac_dir\"" >&2;}
+ { (exit 1); exit 1; }; }; }
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
+ ac_builddir=.
+
+if test "$ac_dir" != .; then
+ ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'`
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_top_builddir=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,../,g'`
+else
+ ac_dir_suffix= ac_top_builddir=
+fi
+
+case $srcdir in
+ .) # No --srcdir option. We are building in place.
+ ac_srcdir=.
+ if test -z "$ac_top_builddir"; then
+ ac_top_srcdir=.
+ else
+ ac_top_srcdir=`echo $ac_top_builddir | sed 's,/$,,'`
+ fi ;;
+ [\\/]* | ?:[\\/]* ) # Absolute path.
+ ac_srcdir=$srcdir$ac_dir_suffix;
+ ac_top_srcdir=$srcdir ;;
+ *) # Relative path.
+ ac_srcdir=$ac_top_builddir$srcdir$ac_dir_suffix
+ ac_top_srcdir=$ac_top_builddir$srcdir ;;
+esac
+
+# Do not use `cd foo && pwd` to compute absolute paths, because
+# the directories may not exist.
+case `pwd` in
+.) ac_abs_builddir="$ac_dir";;
+*)
+ case "$ac_dir" in
+ .) ac_abs_builddir=`pwd`;;
+ [\\/]* | ?:[\\/]* ) ac_abs_builddir="$ac_dir";;
+ *) ac_abs_builddir=`pwd`/"$ac_dir";;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_top_builddir=${ac_top_builddir}.;;
+*)
+ case ${ac_top_builddir}. in
+ .) ac_abs_top_builddir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_top_builddir=${ac_top_builddir}.;;
+ *) ac_abs_top_builddir=$ac_abs_builddir/${ac_top_builddir}.;;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_srcdir=$ac_srcdir;;
+*)
+ case $ac_srcdir in
+ .) ac_abs_srcdir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_srcdir=$ac_srcdir;;
+ *) ac_abs_srcdir=$ac_abs_builddir/$ac_srcdir;;
+ esac;;
+esac
+case $ac_abs_builddir in
+.) ac_abs_top_srcdir=$ac_top_srcdir;;
+*)
+ case $ac_top_srcdir in
+ .) ac_abs_top_srcdir=$ac_abs_builddir;;
+ [\\/]* | ?:[\\/]* ) ac_abs_top_srcdir=$ac_top_srcdir;;
+ *) ac_abs_top_srcdir=$ac_abs_builddir/$ac_top_srcdir;;
+ esac;;
+esac
+
+
+ case $INSTALL in
+ [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;;
+ *) ac_INSTALL=$ac_top_builddir$INSTALL ;;
esac
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
+ if test x"$ac_file" != x-; then
+ { echo "$as_me:$LINENO: creating $ac_file" >&5
+echo "$as_me: creating $ac_file" >&6;}
+ rm -f "$ac_file"
+ fi
+ # Let's still pretend it is `configure' which instantiates (i.e., don't
+ # use $as_me), people would be surprised to read:
+ # /* config.h. Generated by config.status. */
+ if test x"$ac_file" = x-; then
+ configure_input=
+ else
+ configure_input="$ac_file. "
+ fi
+ configure_input=$configure_input"Generated from `echo $ac_file_in |
+ sed 's,.*/,,'` by configure."
-EOF
-cat >> $CONFIG_STATUS <<EOF
+ # First look for the input files in the build tree, otherwise in the
+ # src tree.
+ ac_file_inputs=`IFS=:
+ for f in $ac_file_in; do
+ case $f in
+ -) echo $tmp/stdin ;;
+ [\\/$]*)
+ # Absolute (can't be DOS-style, as IFS=:)
+ test -f "$f" || { { echo "$as_me:$LINENO: error: cannot find input file: $f" >&5
+echo "$as_me: error: cannot find input file: $f" >&2;}
+ { (exit 1); exit 1; }; }
+ echo "$f";;
+ *) # Relative
+ if test -f "$f"; then
+ # Build tree
+ echo "$f"
+ elif test -f "$srcdir/$f"; then
+ # Source tree
+ echo "$srcdir/$f"
+ else
+ # /dev/null tree
+ { { echo "$as_me:$LINENO: error: cannot find input file: $f" >&5
+echo "$as_me: error: cannot find input file: $f" >&2;}
+ { (exit 1); exit 1; }; }
+ fi;;
+ esac
+ done` || { (exit 1); exit 1; }
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+ sed "$ac_vpsub
+$extrasub
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+:t
+/@[a-zA-Z_][a-zA-Z_0-9]*@/!b
+s, at configure_input@,$configure_input,;t t
+s, at srcdir@,$ac_srcdir,;t t
+s, at abs_srcdir@,$ac_abs_srcdir,;t t
+s, at top_srcdir@,$ac_top_srcdir,;t t
+s, at abs_top_srcdir@,$ac_abs_top_srcdir,;t t
+s, at builddir@,$ac_builddir,;t t
+s, at abs_builddir@,$ac_abs_builddir,;t t
+s, at top_builddir@,$ac_top_builddir,;t t
+s, at abs_top_builddir@,$ac_abs_top_builddir,;t t
+s, at INSTALL@,$ac_INSTALL,;t t
+" $ac_file_inputs | (eval "$ac_sed_cmds") >$tmp/out
+ rm -f $tmp/stdin
+ if test x"$ac_file" != x-; then
+ mv $tmp/out $ac_file
+ else
+ cat $tmp/out
+ rm -f $tmp/out
+ fi
-EOF
-cat >> $CONFIG_STATUS <<\EOF
+done
+_ACEOF
-exit 0
-EOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+
+{ (exit 0); exit 0; }
+_ACEOF
chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
+ac_clean_files=$ac_clean_files_save
+
+# configure is writing to config.log, and then calls config.status.
+# config.status does its own redirection, appending to config.log.
+# Unfortunately, on DOS this fails, as config.log is still kept open
+# by configure, so config.status won't be able to write to it; its
+# output is simply discarded. So we exec the FD to /dev/null,
+# effectively closing config.log, so it can be properly (re)opened and
+# appended to by config.status. When coming back to configure, we
+# need to make the FD available again.
+if test "$no_create" != yes; then
+ ac_cs_success=:
+ ac_config_status_args=
+ test "$silent" = yes &&
+ ac_config_status_args="$ac_config_status_args --quiet"
+ exec 5>/dev/null
+ $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false
+ exec 5>>config.log
+ # Use ||, not &&, to avoid exiting from the if with $? = 1, which
+ # would make configure fail if this is the last instruction.
+ $ac_cs_success || { (exit 1); exit 1; }
+fi
+
Modified: branches/binutils/package/etc/configure.in
===================================================================
--- branches/binutils/package/etc/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,4 +4,9 @@
AC_PROG_INSTALL
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
+
AC_OUTPUT(Makefile)
Modified: branches/binutils/package/etc/configure.texi
===================================================================
--- branches/binutils/package/etc/configure.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/configure.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -10,7 +10,7 @@
* configure: (configure). The GNU configure and build system
@end direntry
- at ifinfo
+ at ifnottex
This file documents the GNU configure and build system.
Copyright (C) 1998 Cygnus Solutions.
@@ -35,7 +35,7 @@
into another language, under the above conditions for modified versions,
except that this permission notice may be stated in a translation approved
by the Foundation.
- at end ifinfo
+ at end ifnottex
@titlepage
@title The GNU configure and build system
@@ -60,7 +60,7 @@
approved by the Free Software Foundation.
@end titlepage
- at ifinfo
+ at ifnottex
@node Top
@top GNU configure and build system
@@ -79,7 +79,7 @@
* Index:: Index.
@end menu
- at end ifinfo
+ at end ifnottex
@node Introduction
@chapter Introduction
@@ -276,7 +276,9 @@
In the Cygnus tree at present, the info files are built and installed as
a separate step. To build them, run @samp{make info}. To install them,
-run @samp{make install-info}.
+run @samp{make install-info}. The equivalent html files are also built
+and installed in a separate step. To build the html files, run
+ at samp{make html}. To install the html files run @samp{make install-html}.
All @samp{configure} scripts support a wide variety of options. The
most interesting ones are @samp{--with} and @samp{--enable} options
@@ -1085,7 +1087,7 @@
@end ifnotinfo
(e.g., @samp{autoheader} is the name of a tool, not the name of a file).
- at image{configdev}
+ at image{configdev,,,,jpg}
@node Written Developer Files
@subsection Written Developer Files
@@ -1235,7 +1237,7 @@
@file{config.status} is both a created file and a shell script which is
run to create other files, and the picture attempts to show that.
- at image{configbuild}
+ at image{configbuild,,,,jpg}
@node Build Files Description
@subsection Build Files Description
Modified: branches/binutils/package/etc/standards.texi
===================================================================
--- branches/binutils/package/etc/standards.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/etc/standards.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,13 +6,13 @@
@set lastupdate February 14, 2002
@c %**end of header
- at ifinfo
+ at ifnottex
@format
START-INFO-DIR-ENTRY
* Standards: (standards). GNU coding standards.
END-INFO-DIR-ENTRY
@end format
- at end ifinfo
+ at end ifnottex
@c @setchapternewpage odd
@setchapternewpage off
@@ -28,11 +28,11 @@
@iftex
@set CHAPTER chapter
@end iftex
- at ifinfo
+ at ifnottex
@set CHAPTER node
- at end ifinfo
+ at end ifnottex
- at ifinfo
+ at ifnottex
GNU Coding Standards
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
@@ -43,7 +43,7 @@
Front-Cover Texts, and with no Back-Cover Texts.
A copy of the license is included in the section entitled ``GNU
Free Documentation License''.
- at end ifinfo
+ at end ifnottex
@titlepage
@title GNU Coding Standards
@@ -63,12 +63,12 @@
Free Documentation License''.
@end titlepage
- at ifinfo
+ at ifnottex
@node Top, Preface, (dir), (dir)
@top Version
Last updated @value{lastupdate}.
- at end ifinfo
+ at end ifnottex
@menu
* Preface:: About the GNU Coding Standards
Modified: branches/binutils/package/gas/ChangeLog
===================================================================
--- branches/binutils/package/gas/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6849 +1,649 @@
-2005-12-13 DJ Delorie <dj at redhat.com>
+2006-04-10 Sterling Augustine <sterling at tensilica.com>
- * config/tc-m32c.c (m32c_md_end): Only pad code sections.
+ * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
+ symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
+ (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
+ decoding the loop instructions. Remove current_offset variable.
+ (xtensa_fix_short_loop_frags): Likewise.
+ (min_bytes_to_other_loop_end): Remove current_offset argument.
-2005-12-12 Paul Brook <paul at codesourcery.com>
+2006-04-09 Arnold Metselaar <arnold.metselaar at planet.nl>
- * config/tc-arm.c (do_branch): Generate EABI branch relocations.
- (do_bl): New function.
- (do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation.
- (do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23.
- (insns): Use do_bl.
- (md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and
- BFD_RELOC_ARM_PCREL_JUMP.
- (md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and
- BFD_RELOC_ARM_PCREL_BLX cases. Handle BFD_RELOC_ARM_PCREL_CALL and
- BFD_RELOC_ARM_PCREL_JUMP.
- (tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and
- BFD_RELOC_ARM_PCREL_JUMP.
- gas/testsuite/
- * gas/arm/pic.d: Allow R_ARM_CALL relocations.
+ * config/tc-z80.c (z80_optimize_expr): Removed; redundant since 2006-04-04.
+ * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+2006-04-07 Joerg Wunsch <j.gnu at uriah.heep.sax.de>
- * configure.in: Replace ms1 arch with mt arch.
- * configure: Rebuilt.
- * configure.tgt: Replace ms1 arch with mt arch.
- * config/tc-mt.c: Renamed from tc-ms1.c: Update include files.
- * doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
- * doc/Makefile.in: Rebuilt.
+ * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
+ attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
+ attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
+ atmega644, atmega329, atmega3290, atmega649, atmega6490,
+ atmega406, atmega640, atmega1280, atmega1281, at90can32,
+ at90can64, at90usb646, at90usb647, at90usb1286 and
+ at90usb1287.
+ Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
-2005-12-07 Hans-Peter Nilsson <hp at axis.com>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- Change 32-bit-branch expansion for --pic.
- * config/tc-cris.c (STATE_COND_BRANCH_PIC): New relaxation state.
- (md_cris_relax_table): Add entry for STATE_COND_BRANCH_PIC.
- (cris_any_v0_v10_long_jump_size_pic): New macro.
- (md_estimate_size_before_relax): Handle STATE_COND_BRANCH_PIC.
- (md_convert_frag): Similar.
- (md_create_long_jump): Change 32-bit-branch expansion for --pic.
- (md_assemble, gen_cond_branch_32): Adjust similarly.
- (md_parse_option) <case OPTION_PIC>: Adjust md_long_jump_size.
- <case OPTION_ARCH>: Similar, if --pic.
+ * config/tc-arm.c (parse_operands): Set default error message.
-2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- PR gas/1874
- * config/tc-i386.c (match_template): Handle monitor.
- (process_suffix): Likewise.
+ * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
-2005-12-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- Bug gas/1948
- * symbols.c (colon): Also check if now_seg is bss_section when a symbol
- is being redefined.
+ * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
-2005-12-02 Arnold Metselaar <arnoldm at sourceware.org>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- * config/tc-z80.c (emit_ldreg): fix bug in ld rr,<xx>
+ * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
+ (move_or_literal_pool): Handle Thumb-2 instructions.
+ (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
-2005-11-26 Arnold Metselaar <arnoldm at sourceware.org>
+2006-04-07 Alan Modra <amodra at bigpond.net.au>
- * config/tc-z80.c (z80_start_line_hook): issue an error when
- redefining a symbol with equ
- * doc/as.texinfo(equ<z80>): mention difference with .equiv
- * doc/as.texinfo(err): fix typo
- * doc/c-z80.texi(equ): redefining a symbol with equ is no longer
- allowed
+ PR 2512.
+ * config/tc-i386.c (match_template): Move 64-bit operand tests
+ inside loop.
-2005-11-24 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
- Bug gas/1896
- * config/tc-hppa.c (hppa_fix_adjustable): Don't reject for reduction
- R_HPPA relocations that are 32-bits wide.
-
-2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
- Thiemo Seufer <ths at networkno.de>
-
- * config/tc-mips.c (append_insn): Handle BFD_RELOC_16_PCREL_S2.
- (macro_build): Complain for invalid branch displacements.
- (mips_validate_fix): Delete.
- (md_apply_fix): Re-add pcrel support for branches. Use consistent
- text for misaligned branch targets.
- (tc_gen_reloc: Re-add pcrel support for branches. Handle strange
- BFD pcrel processing. Remove error for unresolved branches.
- * config/tc-mips.h (TC_VALIDATE_FIX, mips_validate_fix): Delete.
-
-2005-11-22 James E Wilson <wilson at specifix.com>
-
- * config/tc-ia64.c (emit_one_bundle): Perform last_slot < 0 check
- even when manual_bundling isn't set.
-
- * config/tc-ia64.c (slot_index): Emit an error instead of a warning
- when the frag chain is broken by section switching.
-
-2005-11-18 Jie Zhang <jie.zhang at analog.com>
-
- * config/bfin-defs.h (IS_BREG, IS_LREG): New macros.
- * config/bfin-parse.y (asm_1): Check register type for load immediate
- instruction.
-
-2005-11-17 Alexandre Oliva <aoliva at redhat.com>
-
- * config/tc-ppc.c (ppc_frob_file_before_adjust): Do not reference
- dotname.
- * write.c (write_object_file): Do not remove used weakrefd.
-
-2005-11-17 Jan Beulich <jbeulich at novell.com>
-
- * dw2gencfi.c (dot_cfi): Put argument parsing for cases
- DW_CFA_restore and DW_CFA_undefined in a loop.
-
-2005-11-17 Jan Beulich <jbeulich at novell.com>
-
-
- * symbols.h (S_CLEAR_VOLATILE): Declare.
- * symbols.c (colon): Also accept redefinable symbols for
- redefinition. Clone them before modifying.
- (S_CLEAR_VOLATILE): Define.
- * cond.c (s_ifdef): Also test for equated symbols.
- * read.c (s_comm_internal): Also exclude non-redefinable
- equated symbols. Clone redefinable ones before modifying.
- (s_weakref): Clone redefinable symbols before modifying.
- * doc/internals.texi: Document sy_volatile, sy_forward_ref,
- S_IS_VOLATILE, S_SET_VOLATILE, S_CLEAR_VOLATILE,
- S_IS_FORWARD_REF, and S_SET_FORWARD_REF.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-hppa.c (pa_comm): Set bfd_com_section segment.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * configure.tgt (i386-*-gnu*): Set em=gnu.
- * config/te-gnu.h: New file.
- * config/tc-i386.c: Don't use '/' as comment char for TE_GNU.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (ppc_pe_comm): Set bfd_com_section segment.
- * config/tc-alpha.c (s_alpha_comm): Likewise. Also, remove
- redundant check.
- * read.c (s_lsym): Remove non-BFD assembler sym handling.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (s_comm_internal): Set bfd_com_section segment.
- (s_mri_common): Likewise.
- * write.c (write_object_file): Remove non-BFD assembler common
- sym handling.
-
-2005-11-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * config/tc-arm.c (s_arm_unwind_save_core): Don't emit an extra
- opcode if r4-r15 are not saved.
-
-2005-11-15 Alan Modra <amodra at bigpond.net.au>
-
- * symbols.c (S_GET_VALUE): Remove non-BFD assembler recursion guard.
-
-2005-11-14 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (AR_FCR, AR_EFLAG, AR_CSD, AR_SSD, AR_CFLG,
- AR_FSR, AR_FIR, AR_FDR, AR_CCV, AR_EC): Define.
- (ar): Use AR_* instead of literals.
- (CR_DCR, CR_ITM, CR_IVA, CR_PTA, CR_GPTA, CR_LID, CR_ITV,
- CR_PMV, CR_CMCV): Define.
- (cr): Use CR_* instead of literals.
-
-2005-11-14 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (md): Rename regsym to indregsym and move
- it to the end of the structure.
- (ar): Field regnum is unsigned.
- (cr): Likewise:
- (indirect_reg): Likewise.
- (declare_register_set): Parameter regnum is unsigned.
- (declare_register): Parameter numregs and base_regnum are
- unsigned. So is the local loop variable.
- (md_begin): Restrict scope of local variable regnum, which
- also is unsigned. Replace loops with function calls where
- possible. Re-order things so that register groups are kept
- together. Remove all uses of regsym except for indirect
- registers. Replace use of regsym by indregsym for indirect
- registers.
- (ia64_optimize_expr): Replace use of regsym by indregsym for
- indirect registers, with appropriate bias.
-
-2005-11-14 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
- for the MIPS16e save/restore instructions.
-
-2005-11-11 Jan Beulich <jbeulich at novell.com>
-
- * doc/Makefile.am: Make asconfig.texi writeable before trying
- to write to it.
- * doc/Makefile.in: Refresh.
-
-2005-11-10 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (intel_e11): Don't special-case segment
- registers in brackets.
-
-2005-11-10 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (BAD_ADDR_MODE): Define.
- (arm_reg_parse_multi): Return NULL rather than FAIL.
- (arm_reg_parse): Fix comment, the function returns FAIL rather
- than NULL if it is unable to parse the register name.
- (do_ldrex): Use BAD_ADDR_MODE.
- Change error message for PC-relative addressing.
- (do_strex): Likewise.
- (do_t_ldrex): Use BAD_ADDR_MODE.
- (do_t_strex): Likewise.
-
-2005-11-08 Jean-Jacques Metayer <jean-jacques.metayer at thomson.net>
-
- * config/tc-sparc.c (isoctal): Fix thinko.
-
-2005-11-08 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * expr.c (operand <case '$'>): Use DOLLAR_AMBIGU rather than
- flag_mri_m68k as condition for parsing the '$' as a prefix.
- * as.h (DOLLAR_AMBIGU): Define if needed.
-
-2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
-
- Add ms2 support.
- * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
- (ms1_architectures): Add ms2.
- (md_parse_option): Add ms2.
- (md_show_usage): Add ms2.
- (md_assemble): Add JAL_HAZARD detection logic.
- (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
- * doc/c-ms1.texi: New.
- * doc/all.texi: Add MS1.
- * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
- * doc/Makefile.in: Rebuilt.
- * doc/Makefile: Rebuilt.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-11-07 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- PR gas/1804
- * config/tc-hppa.c (md_apply_fix): Use number_to_chars_bigendian to
- output constant data.
-
-2005-11-07 Mark Mitchell <mark at codesourcery.com>
-
- * doc/Makefile.am (asconfig.texi): Set top_srcdir.
- * doc/Makefile.in: Regenerated.
- * doc/as.texinfo: Document "@FILE".
-
-2005-11-07 Nick Clifton <nickc at redhat.com>
-
- PR binutils/1568
- * config/obj-coff.c (obj_coff_section): Set readonly flag with the
- 'x' attribute. Remember the actions of the 'w' and 'n' attributes
- and do not allow the 'x','s' or 'd' attributes to change them.
-
-2005-11-07 John Levon <levon at movementarian.org>
-
- * config/tc-i386.h (tc_comment_chars): Define.
- * config/tc-i386.c (line_comment_chars): Use '/' unconditionally.
- (i386_comment_chars): Add.
- (md_parse_options): Process OPTION_DIVIDE.
- (md_show_usage): Describe --divide option.
- * doc/c-i386.texi: Document --divide option.
-
-2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * expr.c (op_encoding): Map '=' to O_SINGLE_EQ, if defined.
- * config/tc-z80.h: Define O_SINGLE_EQ as O_eq.
-
-2005-11-07 Alan Modra <amodra at bigpond.net.au>
-
- * macro.c (buffer_and_nest): Skip labels regardless of
- NO_PSEUDO_DOT and flag_m68k_mri.
-
-2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * expr.c (integer_constant): Match only 'B' as binary suffix if
- NUMBERS_WITH_SUFFIX and LOCAL_LABELS_FB. Allow both 'b' and 'B'
- otherwise.
-
-2005-11-04 Alexandre Oliva <aoliva at redhat.com>
-
- * read.c (s_weakref): Do not permit redefinitions.
- * symbols.c (colon): Do not permit redefinitions of equated
- symbols.
-
-2005-11-01 Thiemo Seufer <ths at networkno.de>
-
- PR gas/1299
- * Makefile.am: Disable -Werror for the itbl-lex.o rule.
+ * po/Make-in: Add install-html target.
+ * Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
-
-2005-11-01 Thiemo Seufer <ths at networkno.de>
-
- * config/tc-mips.c (md_parse_option): Fix typo in comment.
-
-2005-10-30 Mark Mitchell <mark at codesourcery.com>
-
- * as.c (show_usage): Document "@FILE".
-
-2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (OBJ_FORMATS): Remove vms.
- Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * dep-in.sed: Replace " ./" with " ".
-
-2005-10-28 Dave Brolley <brolley at redhat.com>
-
- Contribute the following change:
- 2005-09-19 Dave Brolley <brolley at redhat.com>
-
- * config/tc-m32c.c (default_isa): New static variable.
- (m32c_isa): Now of type CGEN_BITSET.
- (md_begin): Pass &m32c_isa to m32c_cgen_cpu_open.
-
-2005-10-28 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (aeabi_set_public_attributes): Use selected_cpu
- instead of mcpu_cpu_opt.
-
-2005-10-27 Sterling Augustine <sterling at tensilica.com>
-
- * config/tc-xtensa.c (find_vinsn_conflicts): Change error messages to
- refer to "ports" instead of "queues".
- (check_t1_t2_reads_and_writes): Pass correct interface values to
- xtensa_interface_inout.
-
-2005-10-27 Jan Beulich <jbeulich at novell.com>
-
- * read.c (assign_symbol): Also consider equates already defined.
- * symbols.c (symbol_clone): Also clone the underlying BFD symbol.
- * config/obj-coff.h (obj_symbol_clone_hook): New.
- (coff_obj_symbol_clone_hook): Declare.
- * config/obj-coff.c (coff_obj_symbol_clone_hook): New.
-
-2005-10-26 DJ Delorie <dj at redhat.com>
-
- * config/tc-m32c.c (md_relax_table, subtype_mappings,
- md_convert_frag): Add jsr.w support.
-
- * config/tc-m32c.c (md_assemble): Don't use errmsg as the format
- itself.
- (md_cgen_lookup_reloc): Add m32c bitbase operands. Add 8-s24
- and imm-8-HI operands.
-
-2005-10-26 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (insns): Correct "sel" entry.
-
-2005-10-26 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (i386_operand): Don't check register prefix here.
- (parse_real_register): Rename from parse_register.
- (parse_register): New.
- (i386_parse_name): New.
- (md_operand): New.
- (intel_e11): Don't tolerate registers in offset expressions anymore.
- (intel_get_token): Don't check register prefix here. Copy the actual
- register token, not the canonical register name.
- * config/tc-i386.h (md_operand): Delete.
- (i386_parse_name): Declare.
- (md_parse_name): Define.
-
-2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * Makefile.am: Add Z80 cpu.
- * Makefile.in: Regenerated.
- * app.c (do_scrub_chars)<TC_Z80>: Correctly scrub "ex af,af'"
- and disallow newlines in quoted strings.
- * configure.tgt: Add z80-*-coff.
- * config/obj-coff.h: Add format "coff-z80".
- * doc/Makefile.am: Add c-z80.texi.
- * doc/Makefile.in: Regenerated.
- * doc/all.texi: Add Z80.
- * doc/c-z80.texi: New file
- * doc/as.texinfo: Add z80 options and some z80-related remarks.
- * config/tc-z80.c: New file
- * config/tc-z80.h: New file
- * NEWS: Mention new support.
-
-2005-10-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * write.c (adjust_reloc_syms): Undo the change made on
- 2005-04-26 to allow local symbol set to undefined symbol.
-
-2005-10-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (bfin-parse.tab.h): Removed.
- (bfin-parse.h): Added.
- * Makefile.in: Regenerated.
-
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
-
- * po/POTFILES.in: Regenerate.
- * po/gas.pot: Regenerate.
-
-2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
-
- * config/tc-bfin.c (Expr_Node_Gen_Reloc): If have symbol + constant,
- make a single reloc with an offset rather than a stack.
- * config/tc-bfin.h (MD_APPLY_SYM_VALUE): Define to 0.
-
-2005-10-24 Alexandre Oliva <aoliva at redhat.com>
-
- * read.c (potable): Add weakref.
- (s_weakref): New.
- * read.h (s_weakref): Declare.
- * struc-symbol.h (struct symbol): Add sy_weakrefr and sy_weakrefd.
- * symbols.c (colon): Clear weakrefr.
- (symbol_find_exact): Rename to, and reimplement in terms of...
- (symbol_find_exact_noref): ... new function.
- (symbol_find): Likewise...
- (symbol_find_noref): ... ditto.
- (resolve_symbol_value): Resolve weakrefr without setting their
- values.
- (S_SET_WEAK): Call hook.
- (S_GET_VALUE): Follow weakref link.
- (S_SET_VALUE): Clear weakrefr.
- (S_IS_WEAK): Follow weakref link.
- (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): New.
- (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): New.
- (symbol_set_value_expression, symbol_set_frag): Clear weakrefr.
- (symbol_mark_used): Follow weakref link.
- (print_symbol_value_1): Print weak, weakrefr and weakrefd.
- * symbols.h (symbol_find_noref, symbol_find_exact_noref): Declare.
- (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): Declare.
- (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): Declare.
- * write.c (adust_reloc_syms): Follow weakref link. Do not
- complain if target is undefined.
- (write_object_file): Likewise. Remove weakrefr symbols. Drop
- unreferenced weakrefd symbols.
- * config/obj-coff.c (obj_frob_symbol): Do not force WEAKREFD
- symbols EXTERNAL.
- (pecoff_obj_set_weak_hook, pecoff_obj_clear_weak_hook): New.
- * config/obj-coff.h (obj_set_weak_hook, obj_clear_weak_hook): Define.
- * doc/as.texinfo: Document weakref.
- * doc/internals.texi: Document new struct members, internal
- functions and hooks.
-
-2005-10-24 Jie Zhang <jie.zhang at analog.com>
-
- * Makefile.am (bfin-parse.h): Renamed from bfin-parse.tab.h.
- (EXTRA_DIST): Add bfin-parse.h and bfin-lex.c.
- * Makefile.in: Regenerate.
- * config/bfin-lex.l: Include bfin-parse.h instead of bfin-parse.tab.h.
- * config/tc-bfin.c (md_chars_to_number): Change the type of first
- argument from unsigned char * to char * to remove signedness warnings.
-
-2005-10-24 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
- (dot_rot): Change type of num_* variables. Check for positive count.
- (ia64_optimize_expr): Re-structure.
- (md_operand): Check for general register.
-
-2005-10-24 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (declare_register): Call symbol_create.
- (md_begin): Remove local variables total, ar_base, and cr_base.
- Start loops for registers at their respective first one. Don't
- update md.regsym for alias names. Generate alias name tp for r13.
-
-2005-10-21 DJ Delorie <dj at redhat.com>
-
- * config/tc-m32c.c (md_cgen_lookup_reloc): Add more relocs. Print
- names unstead of numbers.
-
-2005-10-19 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (append_insn): Convert MIPS16 jr/jalr jumps
- into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
- hence avoiding to emit a nop.
-
-2005-10-19 Jie Zhang <jie.zhang at analog.com>
-
- * config/tc-bfin.c (md_begin): Let the lex_type of '(' be
- LEX_BEGIN_NAME.
- (bfin_start_line_hook): Remove the workaround for LSETUP(.
- (bfin_name_is_register): Remove the workarounds for LSETUP(
- and SAA(.
- (bfin_start_label): Ditto.
-
-2005-10-18 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_end_directive): Restore
- default_lit_sections regardless of use_literal_section.
-
-2005-10-18 Jie Zhang <jie.zhang at analog.com>
-
- * Makefile.am (bfin-lex.c): Update ylwrap invocation.
- * Makefile.in: Regenerated.
-
-2005-10-18 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * doc/as.texinfo (.loc) Fix placement of '@end table'.
-
-2005-10-17 Bob Wilson <bob.wilson at acm.org>
-
- * config/xtensa-istack.h (TInsn): Replace dwarf2_line_info with an
- unsigned line number. Do not include "dwarf2dbg.h".
- * config/tc-xtensa.c (md_pseudo_table): Remove entry for "loc".
- (xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): Delete.
- (xg_build_to_insn, xg_build_token_insn): Update TInsn uses.
- (md_assemble): Use as_where instead of dwarf2_where.
- (xg_assemble_vliw_tokens): Use unsigned line numbers instead of
- dwarf2_line_infos. Change to call new_logical_line followed by
- dwarf2_emit_insn.
-
-2005-10-14 Mike Frysinger <vapier at gentoo.org>
-
- * doc/as.texinfo (Section): Add missing ']' to .section example.
-
-2005-10-12 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- PR binutils/941
- * config/tc-hppa.c (pa_ip): Use as_bad instead of as_fatal when an
- unknown opcode is found.
-
-2005-10-12 Mark Mitchell <mark at codesourcery.com>
-
- * NEWS: Mention @file.
-
-2005-10-12 Nick Clifton <nickc at redhat.com>
-
- * config/tc-avr.c: Convert to ISO C90 format. Fix formatting and
- generally tidy up the code.
- * config/tc-avr.h: Likewise.
-
-2005-10-12 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_reg_val): Use expression_and_evaluate.
- (dot_pred_rel): Likewise.
- (parse_operand): Likewise.
- (ia64_unrecognized_line): Likewise.
- (md_operand): Likewise.
-
-2005-10-11 Jan Beulich <jbeulich at novell.com>
-
- * expr.h (enum expr_mode): New.
- (expression): Pass third argument to expr.
- (expression_and_evaluate): New.
- (deferred_expression): New.
- (expr): Add third parameter.
- (resolve_expression): New.
- * struc-symbol.h (struct symbol): New members sy_volatile and
- sy_forward_ref.
- * symbols.c, symbols.h (symbol_clone): New.
- (symbol_clone_if_forward_ref): New.
- (snapshot_symbol): New.
- (S_IS_VOLATILE): New.
- (S_IS_FORWARD_REF): New.
- (S_SET_VOLATILE): New.
- (S_SET_FORWARD_REF): New.
- * as.c (macro_expr): Use expression_and_evaluate.
- * cond.c (s_if): Likewise.
- (s_elseif): Likewise.
- * dw2gencfi.c (cfi_parse_reg): Likewise.
- * expr.c (operand): Add second parameter. Optionally call
- deferred_expression. Pass mode argument to itself and md_parse_name.
- Check mode before trying to evaluate symbol. Call
- symbol_clone_if_forward_ref for both operands.
- (expr): Add third parameter. Pass mode to operand and itself.
- Optionally call resolve_expression.
- (resolve_expression): New.
- (get_single_number): Pass second argument to operand.
- * read.c (potable): New entry for .eqv.
- (read_a_source_file): Handle new == operator.
- (get_absolute_expr): Use expression_and_evaluate.
- (s_lsym): Likewise.
- (assign_symbol): Rename second parameter. Call symbol_clone on
- legal and illegal redefinition. Call S_SET_VOLATILE and
- S_SET_FORWARD_REF depending on mode.
- (s_set): Update description.
- (s_space): Call resolve_expression.
- (pseudo_set): Optionally call deferred_expression. Check
- S_IS_FORWARD_REF before trying to simplify/resolve an expression.
- (equals): Handle ==.
- * config/tc-ia64.h (md_parse_name): Add mode parameter.
- * config/tc-arc.c (arc_parse_cons_expression): Likewise.
- * config/tc-m32r.h (md_parse_name): Likewise.
- (m32r_parse_name): Likewise.
- * config/tc-mmix.h (md_parse_name): Likewise.
- * config/tc-mn10300.h (md_parse_name): Likewise.
- (mn10300_parse_name): Likewise.
- * config/tc-ppc.h (md_parse_name): Likewise.
- * config/tc-sh.h (md_parse_name): Likewise.
- (sh_parse_name): Likewise.
- * config/tc-sh64.h (md_parse_name): Likewise.
- (sh64_consume_datalabel): Likewise.
- * config/tc-tic54x.h (md_parse_name): Likewise.
- * config/tc-m32r.c (m32r_parse_name): Add mode parameter. Check it
- before trying to evaluate symbol.
- * config/tc-mn10300.c (mn10300_parse_name): Likewise.
- * config/tc-sh.c (sh_parse_name): Likewise.
- * config/tc-sh64.c (sh64_consume_datalabel): Add mode parameter. Pass
- second argument to operandf. Pass mode parameter to sh_parse_name.
- * doc/as.texinfo: Document .eqv and the == assignment operator.
-
-2005-10-10 Ian Lance Taylor <ian at airs.com>
-
- * Makefile.am (EXTRA_DIST): Remove bfin-lex.l and bfin-defs.h.
- * Makefile.in: Regenerate.
-
-2005-10-10 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * expr.c (operator): Allow "!=" as a synonym for "<>".
- * doc/as.texinfo (Infix Op): Mention "!=".
-
-2005-10-08 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/tc-hppa.c (strict): Don't initialize. Update comment.
- (pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
- found. Simplify handling of "ma" and "mb" completers.
-
-2005-10-08 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.
- (arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name):
- New variables.
- (arm_cpu_option_table): Add canonical_name.
- (arm_cpus): Populate canonical_name field.
- (s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu,
- aeabi_set_public_attributes, arm_md_end): New functions.
- (md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute".
- (md_assemble): Set thumb_arch_used and arm_arch_used.
- (md_begin): Set defaut cpu if CPU_DEFAULT not defined.
- * config/tc-arm.h (md_end): Define.
- * doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute.
-
-2005-10-06 Khem Raj <kraj at mvista.com>
- NIIBE Yutaka <gniibe at m17n.org>
-
- * config/tc-sh.c (allow_dollar_register_prefix): New variable.
- (parse_reg_without_prefix): New function.
- (parse_reg): Check for '$' register prefix if --allow-reg-prefix is
- set.
- (option md_longopts): Add allow-reg-prefix option.
- * doc/c-sh.texi: Document --allow-reg-prefix option.
- * NEWS: Mention the new switch.
-
-2005-10-03 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * doc/as.texinfo (Infix Ops): '<' and '>' are not shift
- operators.
-
-2005-09-30 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_frob_label): Disallow labels in bundles.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
-
-2005-09-30 Mark Mitchell <mark at codesourcery.com>
-
- * as.c (main): Use expandargv.
-
-2005-09-30 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-tic4x.c (tic4x_set): Advance input_line_pointer past
- (removed) comma.
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * Makefile.am: Bfin support.
- * Makefile.in: Regenerated.
- * aclocal.m4: Regenerated.
- * configure: Regenerated.
- * configure.in: Bfin support.
- * configure.tgt: Bfin support.
- * config/bfin-aux.h: New file.
- * config/bfin-defs.h: New file.
- * config/bfin-lex.l: New file.
- * config/bfin-parse.y: New file.
- * config/tc-bfin.c: New file.
- * config/tc-bfin.h: New file.
- * doc/Makefile.am: Recognize c-bfin.texi.
- * doc/Makefile.in: Regenerated.
- * doc/all.texi: Bfin support.
- * doc/as.texinfo: Likewise.
- * doc/c-bfin.texi: Document bfin-specific syntax and
- directives.
-
-2005-09-30 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (opcode_tag): Add OT_cinfix3_legacy.
- (opcode_lookup): Handle OT_cinfix3_legacy. Revert earlier change for
- normal infix conditions.
- (C3E): Include Thumb-2 definition.
- (CL, cCL): Define.
- (insns): Use them for legacy mnemonics.
-
-2005-09-30 Matthias Kurz <mk at baerlap.north.de>
-
- * asintl.h: Prevent the inclusion of <libintl.h> from the Solaris
- version of <locale.h> when ENABLE_NLS is not defined.
-
-2005-09-29 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_operands): Always parse first operand of
- alloc.
-
-2005-09-29 Arnold Metselaar <arnold.metselaar at planet.nl>
- Alan Modra <amodra at bigpond.net.au>
-
- * app.c (do_scrub_chars): Match open and close quote of strings.
- Remove redundant EOF test in case 7.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (reloc): Disable signedness check for 4-byte
- relocations in 16- and 32-bit modes.
- (i386_displacement): Make pc-relative branch handling dependent
- upon operand (rather than address) size.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * dw2gencfi.c (dot_cfi): Call ignore_rest_of_line when not fully
- parsing the input.
- (dot_cfi_startproc): Likewise.
- (dot_cfi_endproc): Likewise. Also check no extra input was given.
- (dot_cfi_escape): Likewise.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
- (TC_CONS_FIX_NEW): Define unconditionally.
- (x86_pe_cons_fix_new): Remove.
- * config/tc-i386.c (signed_cons): New.
- (md_pseudo_table): Add slong.
- (x86_cons_fix_new): Declare unconditionally.
- (x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
- (tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
- conversion.
-
-2005-09-28 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * app.c (do_scrub_chars <LEX_IS_SYMBOL_COMPONENT>): Check for full
- buffer after copying string.
-
-2005-09-27 Paul Brook <paul at codesourcery.com>
-
- * config/arm.c (arm_cpus): Add more cpu names.
- * doc/c-arm.texi: Document them.
-
-2005-09-21 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (pseudo_set): Don't set undefined symbols to expr_section.
-
-2005-09-20 Richard Henderson <rth at redhat.com>
-
- * dwarf2dbg.c (process_entries): Fix uninitialized variable warning.
-
-2005-09-20 Richard Henderson <rth at redhat.com>
-
- * dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs
- with label.
- (dwarf2_loc_mark_labels): New.
- (dwarf2_gen_line_info_1): Split out of ...
- (dwarf2_gen_line_info): ... here. Create the temp symbol here.
- (dwarf2_emit_label): New.
- (dwarf2_directive_loc_mark_labels): New.
- (out_set_addr): Take a symbol instead of frag+ofs.
- (relax_inc_line_addr): Likewise.
- (emit_inc_line_addr): Assert delta non-negative.
- (process_entries): Remove dead code. Update to work with temp
- symbols instead of frag+ofs.
- * dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare.
- (dwarf2_emit_label, dwarf2_loc_mark_labels): Declare.
- * config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels.
- * config/obj-elf.h (obj_frob_label): New.
- * config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label.
- * config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c,
- config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c:
- Similarly in the respective tc_frob_label implementation functions.
- * config/tc-i386.c (md_pseudo_table): Move file and loc to
- non-elf section; add loc_mark_labels.
- * config/tc-ia64.c (struct label_fix): Add dw2_mark_labels.
- (ia64_flush_insns): Check for marked labels; emit line entry if so.
- (emit_one_bundle): Similarly.
- (ia64_frob_label): Record marked labels.
- * config/tc-m68hc11.h (tc_frob_label): Remove.
- * config/tc-ms1.c (md_pseudo_table): Remove file and loc.
- * config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label.
- * config/tc-sh64.h (tc_frob_label): Likewise.
- * doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
-
-2005-09-20 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (pseudo_set): Set segment of expression syms to expr_section.
-
-2005-09-14 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
- registers, floating point control and status words, and mxcsr as
- well as (for 64-bit code) segment base registers and rflags.
-
-2005-09-09 Dmitry Diky <diwil at spec.ru>
-
- * config/tc-msp430.c (msp430_operands): Undo last changes. Instead...
- (msp430_relax_frag): add a guard check to ensure that final fr_subtype
- has been reached.
-
-2005-09-08 Chao-ying Fu <fu at mips.com>
-
- * doc/as.texinfo: Document -mdsp and -mno-dsp options.
- * doc/c-mips.texi: Likewise, and document ".set dsp" and ".set nodsp"
- directives.
-
-2005-09-08 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (do_smi, do_t_smi): Rename ...
- (do_smc, do_t_smc): ... to this.
- (insns): Remane smi to smc.
- (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
- BFD_RELOC_ARM_SMC.
-
-2005-09-07 Richard Henderson <rth at redhat.com>
-
- * dwarf2dbg.c (dwarf2_where): Set line->isa.
- (dwarf2_set_isa): New.
- (dwarf2_directive_loc): Rearrange to allow all options on one line.
- * dwarf2dbg.h (dwarf2_set_isa): Declare.
- * doc/as.texinfo: Update .loc documentation.
-
-2005-09-07 Richard Henderson <rth at redhat.com>
-
- * dwarf2dbg.c: Include safe-ctype.h.
- (DWARF2_LINE_OPCODE_BASE): Bump to 13.
- (current): Initialize.
- (dwarf2_emit_insn): Clear DWARF2_FLAG_BASIC_BLOCK,
- DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN.
- (dwarf2_directive_file): Cope with invalid filename.
- (dwarf2_directive_loc): Add handling for basic_block, prologue_end,
- epilogue_begin, is_stmt, isa.
- (emit_inc_line_addr): Move line_delta == 0, addr_delta == 0 special
- case down lower.
- (process_entries): Handle isa, DWARF2_FLAG_PROLOGUE_END,
- and DWARF2_FLAG_EPILOGUE_BEGIN.
- (out_debug_line): Emit sizes for DW_LNS_set_prologue_end,
- DW_LNS_set_epilogue_begin, DW_LNS_set_isa.
- * dwarf2dbg.h (DWARF2_FLAG_IS_STMT): Rename from DWARF2_FLAG_BEGIN_STMT.
- (DWARF2_FLAG_BASIC_BLOCK): Rename from DWARF2_FLAG_BEGIN_BLOCK.
- (DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN): New.
- (struct dwarf2_line_info): Add isa member.
- * doc/as.texinfo (LNS directives): New node.
-
-2005-09-07 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (append_insn): Undo last change. Instead add
- guard to suppress calling frag_grow if the current instruction is
- one that allows a delay slot.
-
-2005-09-06 Chao-ying Fu <fu at mips.com>
-
- * config/tc-mips.c (mips_set_options): Add ase_mt for MT instructions.
- (mips_opts): Add -1 to initialize ase_mt.
- (file_ase_mt): New variable for -mmt.
- (CPU_HAS_MT): New define.
- (validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
- formats.
- (mips_ip): Check ase_mt to enable MT instructions.
- Handle !, $, *, &, +T, +t, g operand formats.
- For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
- odd float registers.
- (OPTION_MT, OPTION_NO_MT): New define.
- (OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
- (md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
- (mips_after_parse_args): Set ase_mt based on CPU.
- (s_mipsset): Handle ".set mt" and ".set nomt".
- (mips_elf_final_processing): Remind of adding new flag for MT ASE.
- (md_show_usage): Show usage of -mmt and -mno-mt.
- * doc/as.texinfo: Document -mmt and -mno-mt options.
- * doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt"
- directives.
-
-2005-09-06 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (arm_it): Add relax field.
- (T16_32_TAB): Add addi, addis, add_pc, add_sp, dec_sp, inc_sp,
- b, bcond, ldr_pc, ldr_pc2, ldr_sp, str_sp, subi, subis.
- (do_t_add_sub, do_t_addr, do_t_branch, do_t_ldst,
- do_t_mov_cmp): Allow relaxation.
- (output_relax_insn): New function.
- (put_thumb32_insn): New function.
- (output_inst): Use new functions.
- (md_assemble): Don't throw error on relaxable instructions.
- (insns): Change "b" entry from TCE(...) to tCE(...).
- (md_estimate_size_before_relax): Return 2.
- (md_convert_frag, relax_immediate, relax_adr, relax_addsub,
- relax_branch, arm_relax_frag): New functions.
- (arm_force_relocation): Return 0 for Thumb-2 immediate operand
- relocations.
- * config/tc-arm.h (md_convert_frag): Remove definition.
- (md_relax_frag): Define.
- (arm_relax_frag): Add prototype.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (encode_arm_cp_address): Use
- BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
- (do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
- mode.
- (md_assemble): Only allow coprocessor instructions when Thumb-2 is
- available.
- (cCE, cC3): Define.
- (insns): Use them for coprocessor instructions.
- (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
- (get_thumb32_insn): New function.
- (put_thumb32_insn): New function.
- (md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
- BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (opcode_lookup): Look for infix opcode when
- incorrect suffix matches.
-
-2005-09-01 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (append_insn): Correctly handle mips16 case
- when the frags are different for the 2 instructions we want to
- swap. If the lengths of the 2 instructions are not the same, we
- won't do the swap but emit an nop.
-
-2005-09-01 Dmitry Diky <diwil at spec.ru>
-
- * config/tc-msp430.c (msp430_operands): Emit dwarf2_emit_insn()
- as appropriate. Change frag_variant() to frag_var() for relaxes.
-
-2005-08-29 Nick Clifton <nickc at redhat.com>
-
- * write.c (generic_force_reloc): Do not call S_FORCE_RELOC if
- there is no symbol.
-
-2005-08-26 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
- qualified operand of a branch.
- (intel_bracket_expr): Set JumpAbsolute here...
- (intel_e11): ... rather than here.
-
-2005-08-26 Christian Groessler <chris at groessler.org>
-
- * configure.tgt: Set bfd_gas also for z8k cpu.
- * config/tc-z8k.c (s_segm): Use bfd_set_arch_mach to set machine
- type.
- (newfix): Adapt to bfd reloc types.
- (build_bytes): Adapt to bfd reloc types. Ensure that enough space
- is available in the current frag.
- (md_convert_frag): Adapt function parameters.
- (tc_gen_reloc): New function.
- (md_section_align): Use bfd_get_section_alignment.
- (md_apply_fix): Adapt to bfd reloc types. Fix handling of
- BFD_RELOC_Z8K_IMM4L, BFD_RELOC_8, BFD_RELOC_16, and BFD_RELOC_32
- relocations.
- * config/tc-z8k.h (TARGET_ARCH): Define.
- (tc_fix_adjustable): Define.
-
-2005-08-25 Chao-ying Fu <fu at mips.com>
-
- * config/tc-mips.c (mips_set_options): Add ase_dsp for DSP instructions.
- (mips_opts): Add -1 to initialize ase_dsp.
- (file_ase_dsp): New variable for -mdsp.
- (CPU_HAS_DSP): New define.
- (validate_mips_insn): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, ', :, @
- operand formats.
- (mips_ip): Add min_range and max_range for checking singed numbers.
- Check ase_dsp to enable DSP instructions.
- Handle 3, 4, 5, 6, 7, 8, 9, 0, ', :, @ operand formats.
- (OPTION_DSP, OPTION_NO_DSP): New define.
- (OPTION_COMPAT_ARCH_BASE): Change because of inserting DSP define.
- (md_parse_option): Parse OPTION_DSP and OPTION_NO_DSP.
- (mips_after_parse_args): Set ase_dsp based on CPU.
- (s_mipsset): Handle ".set dsp" and ".set nodsp".
- (mips_elf_final_processing): Remind of adding new flag for DSP ASE.
- (md_show_usage): Show usage of -mdsp and -mno-dsp.
-
-2005-08-23 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (mips_cpu_info_table): Add 5kf to the table of
- cpu names.
-
-2005-08-23 Alan Modra <amodra at bigpond.net.au>
-
- PR 1036
- * config/tc-ppc.c (ppc_symbol_chars): Add '%' and '['.
-
-2005-08-23 Phil Edwards <phil at codesourcery.com>
-
- * configure.tgt (*-*-vxworks): Match vxworks* instead.
-
-2005-08-22 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (object_64bit): New.
- (i386_target_format): Initialize it.
- (output_disp): Use object_64bit for relocation type determination.
- (output_imm): Likewise.
- (i386_validate_fix): Likewise.
- (tc_gen_reloc): Likewise.
- (lex_got): Likewise. Remove static mode_name. Change array size
- of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
- (x86_cons): Use object_64bit for deciding whether quad fields can
- have relocations.
-
-2005-08-18 Christian Groessler <chris at groessler.org>
-
- * config/tc-h8300.h: Remove TC_RELOC_MANGLE/tc_reloc_mangle.
- * config/tc-mcore.h: Likewise.
- * config/tc-z8k.h: Likewise.
- * config/tc-z8k.c: Likewise.
- * config/tc-sh.h: Remove TC_RELOC_MANGLE and
- sh_coff_reloc_mangle declaration.
- * config/tc-sh.c: (md_apply_fix): Fix comment for case
- BFD_RELOC_SH_USES.
-
-2005-08-18 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * config/tc-sh64.c (sh64_target_format): Check preset_target_arch
- to confirm that no ISA is specified.
-
-2005-08-18 Nick Clifton <nickc at redhat.com>
-
- * write.c (relax_segment): Count the number of frags being
- processed and use this to compute a maximum limit on the number of
- iterations that will be allowed when attempting to relax the
- segment.
-
-2005-08-17 Danny Smith <dannysmith at users.sourceforge.net>
-
- * config/obj-coff.c (obj_coff_weak): Set auxiliary record
- of NT weak externals to IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY.
-
-2005-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (ppc_set_cpu): Don't select 64-bit based on
- default cpu.
-
-2005-08-15 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (do_t_mov_cmp): Fix encoding of i16-bit conditional
- instructions.
- (do_t_mvn_tst, do_t_neg, do_t_shift): Ditto.
-
-2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * config/tc-ppc.c (parse_cpu): Add -me300 support.
- (md_show_usage): Likewise.
- * doc/c-ppc.texi (PowerPC-Opts): Document it.
-
-2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * config/tc-s390.c (md_parse_option): Add cpu type z9-109.
- (md_gather_operands): Add support for optional operands.
-
-2005-08-12 Dmitry Diky <diwil at spec.ru>
- * config/tc-msp430.c (msp430_enable_relax): New flag.
- (msp430_enable_polys): Likewise.
- (OPTION_RELAX): New option.
- (OPTION_POLYMORPHS): Likewise.
- (md_longopts): New long options.
- (md_show_usage): Updated.
- (md_parse_option): Add new options handler.
- (msp430_operands): Add check if polymorph insns are enabled.
- (msp430_force_relocation_local): New function.
- (md_apply_fix): Now delete relocs according to new flags combination.
- (msp430_relax_frag): Convert long branches to short branches only if
- flag msp430_enable_relax is set.
- * config/tc-msp430.h (TC_FORCE_RELOCATION_LOCAL): Defined.
- (msp430_force_relocation_local): Likewise.
- * doc/c-msp430.texi: Describe new options.
-
-2005-08-11 Ian Lance Taylor <ian at airs.com>
-
- * Makefile.am ($(srcdir)/make-gas.com): Remove target.
- (stamp-mk.com): Likewise.
- (EXTRA_DIST): Remove make-gas.com from list.
- (MOSTLYCLEANFILES): Remove stamp-mk.com from list.
- * Makefile.in: Regenerate.
-
-2005-08-11 Hans-Peter Nilsson <hp at axis.com>
-
- * subsegs.c (subseg_change): Move declaration of seginfo to before
- first statement.
-
-2005-08-11 Alan Modra <amodra at bigpond.net.au>
-
- * README-vms: Delete.
- * config-gas.com: Delete.
- * makefile.vms: Delete.
- * vmsconf.sh: Delete.
- * config/atof-tahoe.c: Delete.
- * config/m88k-opcode.h: Delete.
- * config/obj-bout.c: Delete.
- * config/obj-bout.h: Delete.
- * config/obj-hp300.c: Delete.
- * config/obj-hp300.h: Delete.
- * config/tc-a29k.c: Delete.
- * config/tc-a29k.h: Delete.
- * config/tc-h8500.c: Delete.
- * config/tc-h8500.h: Delete.
- * config/tc-m88k.c: Delete.
- * config/tc-m88k.h: Delete.
- * config/tc-tahoe.c: Delete.
- * config/tc-tahoe.h: Delete.
- * config/tc-tic80.c: Delete.
- * config/tc-tic80.h: Delete.
- * config/tc-w65.c: Delete.
- * config/tc-w65.h: Delete.
- * config/te-aux.h: Delete.
- * config/te-delt88.h: Delete.
- * config/te-delta.h: Delete.
- * config/te-dpx2.h: Delete.
- * config/te-hp300.h: Delete.
- * config/te-ic960.h: Delete.
- * config/vms-a-conf.h: Delete.
- * doc/c-a29k.texi: Delete.
- * doc/c-h8500.texi: Delete.
- * doc/c-m88k.texi: Delete.
- * README: Remove obsolete examples, and list of supported targets.
- * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
- bout and hp300 support.
- (DEP_FLAGS): Don't define BFD_ASSEMBLER.
- * configure.in: Remove --enable-bfd-assembler, need_bfd,
- primary_bfd_gas.
- * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
- m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
- * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
- * as.h: Likewise.
- * dw2gencfi.c: Likewise.
- * dwarf2dbg.c: Likewise.
- * ehopt.c: Likewise.
- * input-file.c: Likewise.
- * listing.c: Likewise.
- * literal.c: Likewise.
- * messages.c: Likewise.
- * obj.h: Likewise.
- * output-file.c: Likewise.
- * read.c: Likewise.
- * stabs.c: Likewise.
- * struc-symbol.h: Likewise.
- * subsegs.c: Likewise.
- * subsegs.h: Likewise.
- * symbols.c: Likewise.
- * symbols.h: Likewise.
- * tc.h: Likewise.
- * write.c: Likewise.
- * write.h: Likewise.
- * config/aout_gnu.h: Likewise.
- * config/obj-aout.c: Likewise.
- * config/obj-aout.h: Likewise.
- * config/obj-coff.c: Likewise.
- * config/obj-coff.h: Likewise.
- * config/obj-evax.h: Likewise.
- * config/obj-ieee.h: Likewise.
- * config/tc-arm.c: Likewise.
- * config/tc-arm.h: Likewise.
- * config/tc-avr.c: Likewise.
- * config/tc-avr.h: Likewise.
- * config/tc-crx.h: Likewise.
- * config/tc-d10v.h: Likewise.
- * config/tc-d30v.h: Likewise.
- * config/tc-dlx.h: Likewise.
- * config/tc-fr30.h: Likewise.
- * config/tc-frv.h: Likewise.
- * config/tc-h8300.c: Likewise.
- * config/tc-h8300.h: Likewise.
- * config/tc-hppa.h: Likewise.
- * config/tc-i370.h: Likewise.
- * config/tc-i386.c: Likewise.
- * config/tc-i386.h: Likewise.
- * config/tc-i860.h: Likewise.
- * config/tc-i960.c: Likewise.
- * config/tc-i960.h: Likewise.
- * config/tc-ip2k.h: Likewise.
- * config/tc-iq2000.h: Likewise.
- * config/tc-m32c.h: Likewise.
- * config/tc-m32r.h: Likewise.
- * config/tc-m68hc11.h: Likewise.
- * config/tc-m68k.c: Likewise.
- * config/tc-m68k.h: Likewise.
- * config/tc-maxq.c: Likewise.
- * config/tc-maxq.h: Likewise.
- * config/tc-mcore.c: Likewise.
- * config/tc-mcore.h: Likewise.
- * config/tc-mn10200.h: Likewise.
- * config/tc-mn10300.c: Likewise.
- * config/tc-mn10300.h: Likewise.
- * config/tc-ms1.h: Likewise.
- * config/tc-msp430.c: Likewise.
- * config/tc-msp430.h: Likewise.
- * config/tc-ns32k.c: Likewise.
- * config/tc-ns32k.h: Likewise.
- * config/tc-openrisc.h: Likewise.
- * config/tc-or32.c: Likewise.
- * config/tc-or32.h: Likewise.
- * config/tc-ppc.c: Likewise.
- * config/tc-ppc.h: Likewise.
- * config/tc-s390.h: Likewise.
- * config/tc-sh.c: Likewise.
- * config/tc-sh.h: Likewise.
- * config/tc-sparc.c: Likewise.
- * config/tc-tic30.c: Likewise.
- * config/tc-tic30.h: Likewise.
- * config/tc-tic4x.c: Likewise.
- * config/tc-tic4x.h: Likewise.
- * config/tc-tic54x.c: Likewise.
- * config/tc-tic54x.h: Likewise.
- * config/tc-v850.h: Likewise.
- * config/tc-vax.c: Likewise.
- * config/tc-vax.h: Likewise.
- * config/tc-xstormy16.h: Likewise.
- * config/tc-xtensa.h: Likewise.
- * config/tc-z8k.c: Likewise.
- * config/tc-z8k.h: Likewise.
- * config/vms-a-conf.h
- * doc/Makefile.am: Likewise.
- * doc/all.texi: Likewise.
- * doc/as.texinfo: Likewise.
- * doc/internals.texi: Likewise.
- * doc/Makefile.in: Regenerate.
- * Makefile.in: Regenerate.
+ * configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
- * config.in: Regenerate.
- * po/POTFILES.in: Regenerate.
-
-2005-08-09 Nick Clifton <nickc at redhat.com>
-
- PR 1070
- * macro.c (getstring): Do not treat round parentheses exactly the
- same as angle brackets - the parentheses need to be preserved and
- passed on to the macro processing code.
-
-2005-08-08 Nick Clifton <nickc at redhat.com>
-
- * config/tc-msp430.c (MSP430_ISA_21): Define.
- (mcu_types): Add entries for msp430x21xx variants.
-
-2005-08-08 Nick Clifton <nickc at redhat.com>
-
- PR 1070
- * macro.c (getstring): Treat round parentheses in the same way as
- angle brackets.
- (get_any_string): Likewise.
-
-2005-08-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR gas/1118
- * as.c (parse_args): Handle -al=<FILE>.
-
-2005-08-07 Nick Clifton <nickc at redhat.com>
-
- * read.c (s_app_line): Accept a line number of 0 for compatibility
- with gcc's output for assembler-with-cpp files.
-
-2005-08-05 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (current_it_mask, current_cc): New variables.
- (do_t_add_sub): Use correct encodings inside IT block.
- (do_t_arit3c): Ditto.
- (do_t_it): Simplify logic. Set current_it_mask and current_cc.
- (md_assemble): Verify conditional suffixes agains IT blocks.
-
-2005-08-05 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
- constants.
- (encode_thumb32_shifted_operand): Prohibit register shifts.
- (encode_thumb32_addr_mode): Fix typo.
- (insns): Correct thumb2 ldm and stm opcodes.
-
-2005-08-02 Khem Raj <kraj at mvista.com>
-
- * config/tc-arm.c (do_iwmmxt_wldstd): Correct the offset range for
- WLDRD/WSTRD instruction.
-
-2005-08-02 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (md_apply_fix <ELF>): Don't warn on overflow
- if emitting a reloc.
-
-2005-07-29 Thiemo Seufer <ths at networkno.de>
-
- * config/tc-mips.c (s_mips_globl): Allow multiple symbols per .globl.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
- pop.
- (do_t_addr): Implement 32-bit variant.
- (do_t_push_pop): Make some errors warnings. Handle single register
- 32-bit case.
- (insns): Use tCE for adr.
- (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
- (md_apply_fix): Ditto.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (parse_tb): New function.
- (enum operand_parse_code): Add OP_TB.
- (parse_operands): Handle OP_TB.
- (do_t_add_sub_w, do_t_tb): New functions.
- (insns): Add entries for addw, subw, tbb and tbh.
- (md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
-
-2005-07-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (m32r_check_fixup): Fixed X_op check.
-
-2007-07-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-i386.c (handle_large_common): Declare only for ELF.
-
-2005-07-27 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.h (unw_r_record): Change type of fr_mem to unsigned
- int.
- (unw_p_record): Remove unused/redundant fields imask and rmask.
- Combine spoff and pspoff into a union. Combine gr and br into a
- union. Change type of grmask and brmask to unsigned char. Change type
- of frmask to unsigned int.
- (unw_x_record): Combine spoff, pspoff, and treg into a union.
- * config/tc-ia64.c (unwind): New field 'pending_saves'.
- (check_pending_save): New.
- (alloc_record): Clear out entire record.
- (output_psp_gr): Use renamed structure fields.
- (output_psp_sprel): Likewise.
- (output_rp_gr): Likewise.
- (output_rp_br): Likewise.
- (output_rp_psprel): Likewise.
- (output_rp_sprel): Likewise.
- (output_pfs_gr): Likewise.
- (output_pfs_psprel): Likewise.
- (output_pfs_sprel): Likewise.
- (output_preds_gr): Likewise.
- (output_preds_psprel): Likewise.
- (output_preds_sprel): Likewise.
- (output_spill_base): Likewise.
- (output_unat_gr): Likewise.
- (output_unat_psprel): Likewise.
- (output_unat_sprel): Likewise.
- (output_lc_gr): Likewise.
- (output_lc_psprel): Likewise.
- (output_lc_sprel): Likewise.
- (output_fpsr_gr): Likewise.
- (output_fpsr_psprel): Likewise.
- (output_fpsr_sprel): Likewise.
- (output_priunat_gr): Likewise.
- (output_priunat_psprel): Likewise.
- (output_priunat_sprel): Likewise.
- (output_bsp_gr): Likewise.
- (output_bsp_psprel): Likewise.
- (output_bsp_sprel): Likewise.
- (output_bspstore_gr): Likewise.
- (output_bspstore_psprel): Likewise.
- (output_bspstore_sprel): Likewise.
- (output_rnat_gr): Likewise.
- (output_rnat_psprel): Likewise.
- (output_rnat_sprel): Likewise.
- (output_spill_psprel): Likewise.
- (output_spill_sprel): Likewise.
- (output_spill_reg): Likewise.
- (output_fr_mem): Likewise. Allocate one unwind record per set mask
- bit.
- (output_frgr_mem): Likewise.
- (output_gr_mem): Likewise.
- (output_br_mem): Likewise.
- (output_gr_gr): Likewise.
- (output_br_gr): Likewise.
- (fixup_unw_records): Likewise.
- (process_one_record): Use renamed structure fields. For gr_gr and
- br_gr, collect mask from chain of records before output.
- (in_prologue): Simplify and eliminate early returns. Call
- check_pending_save.
- (in_body): Simplify and eliminate early returns.
- (dot_body): Call check_pending_save.
- (md_assemble): Update comment. Deal with pending saves.
-
-2005-07-26 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (optimize_imm): Calculate candidate immediates
- mask from guessed suffix, but mask out other immediate types only
- if at least on candidate is valid for the insn.
-
-2005-07-25 DJ Delorie <dj at redhat.com>
-
- * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
- Support %mod() modifiers from opcodes.
- * doc/c-m32c.texi (M32C-Modifiers): New section.
-
-2005-07-25 Jan Hubicka <jh at suse.cz>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
- defined.
- (elf_com_section_ptr): New.
- (elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
- (elf_common_parse): Make it global. Use elf_com_section_ptr
- instead of bfd_com_section_ptr.
- (obj_elf_change_section): Handle x86-64 large bss sections.
-
- * config/obj-elf.h (elf_com_section_ptr): New.
- (elf_common_parse): New.
-
- * config/tc-i386.c (handle_large_common): New.
- (md_pseudo_table): Add "largecomm".
- (x86_64_section_letter): New.
- (x86_64_section_word): New.
-
- * config/tc-i386.h (x86_64_section_word): New.
- (x86_64_section_letter): New.
- (md_elf_section_letter): New. Defined.
- (md_elf_section_word): Likewise.
-
-2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Remove i386-*-rtemself*.
- Remove sparc-*-rtemself*.
-
-2005-07-21 Ben Elliston <bje at gnu.org>
-
- * config/tc-m68k.h: Remove TE_LYNX conditional code.
-
-2005-07-21 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (encode_thumb32_addr_mode): Don't set
- inst.reloc.pc_rel.
-
-2005-07-20 Tavis Ormandy <taviso at gentoo.org>
-
- * messages.c: Use vsnprintf instead of vsprintf.
-
-2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (tc_gen_reloc): Check BFD_RELOC_32_PCREL and
- BFD_RELOC_16_PCREL to Support R_M32R_REL32.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * configure.tgt: Restore alpha ordering to list of arches.
-
-2005-07-18 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * tc-hppa.c (pa_ip): Reject match for '#' immediate if not pa20.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (md_begin): Use IS_ELF.
- (tc_i386_fix_adjustable): Likewise.
- (md_estimate_size_before_relax): Likewise.
- (md_apply_fix): Likewise.
- (i386_target_format): Likewise.
- (lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
- (i386_immediate): Remove #ifdef LEX_AT.
- (i386_displacement): Likewise.
- * config/tc-i386.h (x86_cons): Prototype only when ELF and when not
- LEX_AT.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (reloc): Convert to ISO C90. Change first
- parameter to unsigned. Parameter sign now is tristate - zero/
- positive mean unsigned/signed, negative means signedness doesn't
- matter. Check field size,
- signedness, and pcrel-ness are in agreement between relocated field
- and relocation type. Adjust diagnostics.
- (optimize_imm): And type mask of operand instead of overwriting it.
- (lex_got): Convert to ISO C90. Add third parameter. Add new field to
- local structure and initialize gotrel accordingly. Pass caller as
- mask of types that the operator can match.
- (x86_cons_fix_new): Let reloc know that signedness of relocation
- doesn't matter.
- (x86_pe_cons_fix_new): Likewise.
- (x86_cons): Pass additional argument to lex_got.
- (i386_immediate): New local variable 'types'. Pass its address as
- additional argument to lex_got. Mask out operand types not supported
- befoe returning.
- (i386_displacement): Likewise. Set bigdisp to all types supported in
- 64-bit mode, combining the previously split initialization.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (parse_insn): Reject prefix if unavailable in
- current mode.
-
-2005-07-16 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/tc-hppa.c (pa_ip): Search entire mnemonic before considering
- promoted match.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
-
-2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/config/tc-i386.h (CpuVMX): New.
- (CpuUnknownFlags): Add CpuVMX.
-
-2005-07-14 Jim Blandy <jimb at redhat.com>
-
- Add support for the Renesas M32C.
- * Makefile.am (CPU_TYPES): List m32c.
- (TARGET_CPU_CFILES): List config/tc-m32c.c.
- (TARGET_CPU_HFILES): List config/tc-m32c.h.
- * configure.in: Add case for m32c.
- * configure.tgt: Add cases for m32c and m32c-*-elf.
- * configure: Regenerated.
- * config/tc-m32c.c, config/tc-m32c.h: New files.
- * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
- * doc/Makefile.in: Regenerated.
- * doc/all.texi: Set M32C.
- * doc/as.texinfo: Add text for the M32C-specific options and line
- comment characters, and refer to c-m32c.texi.
- * doc/c-m32c.texi: New file.
-
-2005-07-14 Nick Clifton <nickc at redhat.com>
-
- PR 1069
- * config/tc-crx.c (reset_vars): Use strncpy to prevent overflowing
- the ins_parse buffer.
-
-2005-07-10 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Remove a29k-*-rtems*, hppa*-*-rtems*,i386-go32-rtems*,
- i386-*-rtemscoff*, sparc-*-rtemsaout*.
-
-2005-07-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-i386.c (optimize_disp): Optimize signed 32bit
- displacements.
-
-2005-07-08 Ben Elliston <bje at au.ibm.com>
-
- * frags.h: Remove ANSI_PROTOTYPES conditional code.
- * config/obj-elf.h: Likewise.
- * config/tc-h8300.h: Likewise.
- * config/tc-h8500.h: Likewise.
- * config/tc-i370.h: Likewise.
- * config/tc-i386.h: Likewise.
- * config/tc-m68hc11.h: Likewise.
- * config/tc-m68k.h: Likewise.
- * config/tc-ppc.h: Likewise.
- * config/tc-s390.h: Likewise.
- * config/tc-sh.h: Likewise.
- * config/tc-sparc.h: Likewise.
- * config/tc-tic30.c: Likewise.
- * config/tc-w65.h: Likewise.
- * config/tc-xtensa.h: Likewise.
-
-2005-07-08 Hans-Peter Nilsson <hp at axis.com>
-
- PR gas/1049
- * config/tc-cris.h (MD_APPLY_SYM_VALUE): Define.
-
-2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
-
- * config/tc-tic30.c (debug): Add format attribute. Fix format
- bugs.
-
-2005-07-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-i386.c (cpu_arch): Add sse3.
-
- * config/tc-i386.h (CpuSSE3): Renamed from ...
- (CpuPNI): This. Defined as CpuSSE3.
-
- * doc/c-i386.texi: Document .sse3.
-
-2005-07-06 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.
-
-2005-07-05 Nick Clifton <nickc at redhat.com>
-
- * config/tc-pdp11.c (md_apply_fix): Cast first argument to
- md_chars_to_numbers to an unsigned pointer in order to avoid a
- compile time warning.
-
-2005-07-05 Paul Brook <paul at codesourcery.com>
-
- * config/tc-ppc.c (ppc_target_format): Add VxWorks.
-
-2005-07-05 Aldy Hernandez <aldyh at redhat.com>
-
- * config/tc-ms1.c: New.
- * config/tc-ms1.h: New.
- * testsuite/gas/ms1/allinsn.d: New.
- * testsuite/gas/ms1/allinsn.s: New.
- * testsuite/gas/ms1/badinsn.s: New.
- * testsuite/gas/ms1/badinsn1.s: New.
- * testsuite/gas/ms1/badoffsethigh.s: New.
- * testsuite/gas/ms1/badoffsetlow.s: New.
- * testsuite/gas/ms1/badorder.s: New.
- * testsuite/gas/ms1/badreg.s: New.
- * testsuite/gas/ms1/badsignedimmhigh.s: New.
- * testsuite/gas/ms1/badsignedimmlow.s: New.
- * testsuite/gas/ms1/badsyntax.s: New.
- * testsuite/gas/ms1/badsyntax1.s: New.
- * testsuite/gas/ms1/badunsignedimmhigh.s: New.
- * testsuite/gas/ms1/badunsignedimmlow.s: New.
- * testsuite/gas/ms1/errors.exp: New.
- * testsuite/gas/ms1/ldst.s: New.
- * testsuite/gas/ms1/misc.d: New.
- * testsuite/gas/ms1/misc.s: New.
- * testsuite/gas/ms1/ms1-16-003.d: New.
- * testsuite/gas/ms1/ms1-16-003.s: New.
- * testsuite/gas/ms1/ms1.exp: New.
- * testsuite/gas/ms1/msys.d: New.
- * testsuite/gas/ms1/msys.s: New.
- * testsuite/gas/ms1/relocs.d: New.
- * testsuite/gas/ms1/relocs.exp: New.
- * testsuite/gas/ms1/relocs1.s: New.
- * testsuite/gas/ms1/relocs2.s: New.
-
-2005-07-05 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.h (CpuSVME): New.
- (CpuUnknownFlags): Include CpuSVME.
- * config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
- as alias of sledgehammer.
- (md_assemble): Include invlpga in the check for insns with two source
- operands.
- (process_operands): Include SVME insns in the check for ignored
- segment overrides. Adjust diagnostic.
- (i386_index_check): Special-case SVME insns with memory operands.
-
-2005-07-04 Khem Raj <kraj at mvista.com>
- Nick Clifton <nickc at redhat.com>
-
- * tc-arm.c (struct arm_it): Make operands.imm signed to match its
- use an immediate value.
- (parse_vfp_reg_list): Make the 2nd parameter an unsigned pointer
- since the register field of the operands structure is unsigned.
- (s_arm_unwind_save_vfp): Make "reg" unsigned.
- (parse_operands): Make the 2ns parameter an unsigned pointer to
- match its use.
- (do_ldrd): When using the imm field of the operands structure as a
- second register field, treat it as unsigned.
-
-2005-07-04 Alan Modra <amodra at bigpond.net.au>
-
- PR 1004
- * config/obj-elf.c (obj_elf_change_section): Use backend
- get_sec_type_attr.
-
-2005-07-01 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (line_separator_chars): Add '{' and '}'.
- (output_spill_psprel, output_spill_psprel_p): Combine.
- (output_spill_sprel, output_spill_sprel_p): Combine.
- (output_spill_reg, output_spill_regp_p): Combine.
- (process_one_record): Handle psp_psprel.
- (parse_predicate_and_operand): New.
- (convert_expr_to_ab_reg): Two new parameters. Return void. Always
- initialize output values. Emit diagnostic case here.
- (convert_expr_to_xy_reg): Likewise. Don't allow r0, f0, and f1.
- (add_unwind_entry): New second parameter. Allow first parameter to
- be NULL. Parse optional tag, emit warning about further support for
- it otherwise being missing. Check end-of-line when requested.
- (dot_fframe): Clear operand when wrong. Allow tag.
- (dot_vframe): Likewise.
- (dot_vframesp): Likewise. Rename parameter, issue warning when psp
- relative.
- (dot_vframepsp): Remove.
- (dot_altrp): Clear operand when wrong. Allow tag.
- (dot_save): Likewise. Let default case also go through
- add_unwind_entry.
- (dot_savemem): Likewise.
- (dot_restore): Don't return when wrong operand. Allow tag.
- (dot_spillreg, dot_spillreg_p): Combine. Simplify by using
- parse_predicate_and_operand and the new arguments to
- convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
- when wrong operand. Allow tag.
- (dot_restorereg, dot_restorereg_p): Likewise.
- (dot_spillmem, dot_spillmem_p): Likewise.
- (dot_saveg): Clear operand when wrong. Perform tighter operand
- checks. Allow tag.
- (dot_savef): Likewise.
- (dot_saveb): Likewise.
- (dot_savegf): Likewise.
- (dot_spill): Remove end-of-line check. Combine. Simplify by using
- parse_predicate_and_operand and the new arguments to
- convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
- when wrong operand. Allow tag.
- (popcount): New.
- (dot_label_state): Don't return when wrong operand.
- (dot_copy_state): Likewise.
- (dot_unwabi): Likewise. Check if in prologue.
- (dot_body): Don't call demand_empty_rest_of_line.
- (dot_prologue): Type of mask and grsave is unsigned. Perform tighter
- operand checks.
- (md_pseudo_table): Also use dot_restorereg for .restorereg.p. Also
- use dot_spillreg for .spillreg.p. Also use dot_spillmem for
- .spillpsp.p and .spillsp.p. Also use dot_vframesp for .vframepsp.
- (parse_operand): New second parameter. Don't deal with '}' here
- anymore. Don't advance past end-of-line.
- (parse_operands): Pass second argument to parse_operand.
- (ia64_start_line): Prevent out-of-bounds access through
- input_line_pointer. Deal with '}' here.
- (ia64_unrecognized_line): Don't deal with '}' here.
- (dot_alias): Use ignore_rest_of_line not its deprecated alias
- discard_rest_of_line.
-
-2005-06-30 Zack Weinberg <zack at codesourcery.com>
-
- * config/tc-arm.c (T_OPCODE_BRANCH, encode_arm_addr_mode_2)
- (encode_arm_addr_mode_3, encode_arm_cp_address, do_blx, do_t_blx)
- (do_t_branch, insns [b, bl]): Don't encode pipeline offset.
- (do_branch): Always set inst.reloc.pc_rel.
- (s_arm_elf_cons): Disallow use of (plt) suffix.
- (do_adrl): Adjust X_add_number unconditionally.
- (md_pcrel_from): Rename md_pcrel_from_section, add second segT
- argument. Handle all adjustment for pipeline offset here.
- (md_apply_fix): No need to undo work of md_pcrel_from. No
- need to extract pre-encoded pipeline adjustments from various
- branch instructions. Generally, assume instructions are already
- all-bits-zero in the field being fixed up. Remove all OBJ_ELF
- special cases. Handle BFD_RELOC_ARM_PLT32 like
- BFD_RELOC_ARM_PCREL_BRANCH.
- (tc_gen_reloc): Remove OBJ_ELF special case.
- * config/tc-arm.c: Define MD_PCREL_FROM_SECTION.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (check-DEJAGNU): Don't search for expect.
- * Makefile.in: Regenerate.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (EXPECT): Set to expect.
- (RUNTEST): Likewise, set to runtest.
- * Makefile.in: Regenerate.
-
-2005-06-23 Ben Elliston <bje at gnu.org>
-
- * config/m68k-parse.h: Use ISO C90.
- * config/m68k-parse.y: Likewise.
- * config/tc-m68k.h: Likewise.
-
-2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1013
- * config/tc-i386.c (md_assemble): Don't call optimize_disp on
- movabs.
- (optimize_disp): Optimize only if possible. Don't use 64bit
- displacement on non-constants and do same on constants if
- possible.
-
-2005-06-17 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
- (tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
- BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
- (output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
- and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
- aborting.
- (output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
- Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
- (tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
- Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
- BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
- BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
- convert 8-byte pc-relative relocations.
- (lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
- (i386_validate_fix): Likewise.
- (x86_cons): Also handle quad values in 64-bit mode.
- (i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
- (md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
- BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
- to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
-
-2005-06-13 Zack Weinberg <zack at codesourcery.com>
-
- * config/tc-arm.c (find_real_start): Check S_IS_LOCAL on
- symbolP as well as for names with a leading dot. Use ACONCAT.
- (md_apply_fix): For branch relocations, only replace value
- with fixP->fx_offset (under #ifdef OBJ_ELF) when !fixP->fx_done.
- (arm_force_relocation): Remove #ifdef OBJ_ELF case.
- * config/tc-arm.h (LOCAL_LABEL): Remove unnecessary parentheses.
- (LOCAL_LABEL_PREFIX): Don't define.
-
-2005-06-10 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-hppa.c (pa_block): Allocate just one byte for the
- fill pattern.
-
-2005-06-08 James E Wilson <wilson at specifixinc.com>
-
- PR 994
- * config/tc-ia64.c (slot_index): Revert last change. If first_frag
- is NULL, then emit a warning, and return the current index.
-
-2005-06-08 Tomas Hurka <tom at hukatronic.cz>
-
- PR 991
- * config/tc-m68k.c (m68k_ip): Test for insn compatiblity using a
- temporary copy of the operands array so that changes can be safely
- backed out if the insn does not match.
- (m68k_compare_opcode): Shortcut the test when the parameters are
- the same. Return 1 if the names match but the second opcode is
- further on in the array than the first.
-
-2005-06-08 Nick Clifton <nickc at redhat.com>
-
- PR 994
- * config/tc-ia64.c (slot_index): Check for a NULL first_frag.
-
-2005-06-08 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (use_parallel): Change default value from 1 to 0.
-
-2005-06-07 Aldy Hernandez <aldyh at redhat.com>
- Michael Snyder <msnyder at redhat.com>
- Stan Cox <scox at redhat.com>
-
- * configure.in: Add ms1 case.
-
- * configure: Regenerate.
-
- * configure.tgt: Add ms1 case.
-
-2005-06-07 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.h (resource_table): Change units to unsigned chars.
- * config/tc-xtensa.c (new_resource_table): Likewise.
- (resize_resource_table): Likewise.
- (release_resources): Fix assertion for unsigned values.
-
-2005-06-07 Zack Weinberg <zack at codesourcery.com>
-
- * cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c
- * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h
- * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c
- * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h
- * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c
- * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h
- * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h
- * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c
- * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h
- * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c
- * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h
- * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c
- * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c
- * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h
- * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c
- * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c
- * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c
- * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c
- * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c
- * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h
- * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h
- * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c
- * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c
- * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h
- * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c
- * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c
- * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h
- * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h
- * config/tc-xtensa.c, config/tc-z8k.c:
- Replace all instances of the string "_apply_fix3" with
- "_apply_fix".
- * po/POTFILES.in, po/gas.pot: Regenerate.
-
-2005-06-08 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- (POTFILES): Remove GAS_CFILES.
- * Makefile.in: Regenerate.
-
-2005-06-07 David Ung <davidu at mips.com>
-
- * config/tc-mips.c (mips_cpu_info_table): Add cpu names m4k, 24k,
- 24kc, 24kf and 24kfx under MIPS32 release 2.
-
-2005-06-04 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (CE, C3, CM, UE, UF): Redefine without reference
- to their Thumb-enabled equivalents.
-
-2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
-
- * config/tc-mips.c (load_register): Add leading "0x" to the
- output of sprintf_vma().
- (macro): Likewise.
-
-2005-06-01 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (TxCE, TxC3, TxCM, TUE, TUF): Remove redundant
- test for the presence of thumb version of the parsing functions
- since they must always exist and the test generates a compile time
- warning message.
-
-2005-05-31 Richard Henderson <rth at redhat.com>
-
- * config/tc-alpha.c (O_lituse_jsrdirect): New.
- (alpha_reloc_op): Add it.
- (debug_exp): Handle it.
- (DUMMY_RELOC_LITUSE_JSRDIRECT): New.
- (emit_insn): Handle it.
- * doc/c-alpha.texi (Alpha-Relocs): Document lituse_jsrdirect.
-
-2005-05-31 Christian Groessler <chris at groessler.org>
-
- * write.c (dump_section_relocs): Convert to ISO-C.
- (write_relocs): Avoid signed/unsigned and fprintf argument
- warnings in debug code.
-
-2005-05-26 Zack Weinberg <zack at codesourcery.com>
-
- * config/tc-arm.h (TC_FIX_TYPE): Change to int.
- (TC_INIT_FIX_DATA): Initialize to 0, not NULL.
- * config/tc-arm.c (fix_new_arm): Remove now-unnecessary cast.
- (md_apply_fix3): Delete fix_is_thumb variable; refer to
- fixP->tc_fix_data directly in the sole place it was used.
- Explicitly truncate value, *valP, fixP->fx_addnumber, and
- fixP->fx_offset to 32 bits, for consistent behavior between 32-
- and 64-bit hosts.
-
-2005-05-27 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (struct proc_pending): New.
- (unwind): Replace proc_start with proc_pending.
- (unwind_diagnostic): Check unwind.proc_pending.sym.
- (dot_proc): Replace unwind.proc_start with unwind.proc_pending.sym.
- Check if previous proc not closed. Record all entry points.
- (dot_endp): Replace unwind.proc_start with unwind.proc_pending.sym.
- Set symbol sizes for entry points recorded in dot_proc. Check
- arguments for consistency with respective .proc's.
- (md_assemble): Replace unwind.proc_start with
- unwind.proc_pending.sym.
-
-2005-05-27 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (emit_one_bundle): Restrict scope of ptr, end_ptr,
- and last_ptr. Check all in-use slots for first one with non-NULL
- unwind_record. Don't reload end_ptr before second update round.
-
-2005-05-26 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (extra_goodness): Update comment.
- (md_begin): Add debugging code to print best_template table.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (md_begin): Don't try to match slot 2 of an MLX
- template.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (ia64_gen_real_reloc_type): Also handle
- BFD_RELOC_UNUSED when determining the width of the reloc.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_endp): Clear out all three pointers in unwind
- section entry.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_radix): Rewrite.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (struct unw_rec_list): Remove next_slot_number
- and next_slot_frag.
- (alloc_record): Remove references to next_slot_number and
- next_slot_frag.
- (emit_one_bundle): Likewise.
-
-2005-05-22 Nick Clifton <nickc at redhat.com>
-
- * config/tc-v850.c (md_apply_fix3): Pass the address of the
- message buffer when invoking the insert function.
-
-2005-05-21 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/tc-hppa.c (pa_ip): Promote architecture from PA 1.0 to 1.1
- only if an instruction match is found.
-
-2005-05-20 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xg_assemble_vliw_tokens): Change subtraction
- to addition in argument to xtensa_dwarf2_emit_insn.
-
-2005-05-19 Zack Weinberg <zack at codesourcery.com>
-
- * Makefile.am: Have 'all' depend on 'info'.
- * Makefile.in: Regenerate.
-
-2005-05-19 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (ppc_force_relocation): Add BFD_RELOC_24_PLT_PCREL.
-
-2005-05-19 Anton Blanchard <anton at samba.org>
-
- * config/tc-ppc.c (parse_cpu): Handle "-mpower5".
- (md_show_usage): Document it.
- (ppc_setup_opcodes): Insert POWER5 mnemonics.
- * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5".
-
-2005-05-19 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_endp): Don't use global symbol for unwind
- relocations in unwind section.
-
-2005-05-18 Nick Clifton <nickc at redhat.com>
-
- * config/tc-v850.c (md_apply_fix3): Only use the insertion routine
- if one exists. Ignore any error messages it may produce, just
- allow it to perform the insertion.
-
-2005-05-17 Zack Weinberg <zack at codesourcery.com>
-
- * hash.c (hash_lookup): Add len parameter. All callers changed.
- (hash_find_n): New interface.
- * hash.h: Prototype hash_find_n.
- * sb.c: Include as.h.
- (scrub_from_sb, sb_to_scrub, scrub_position): New statics.
- (sb_scrub_and_add_sb): New interface.
- * sb.h: Prototype sb_scrub_and_add_sb.
- * input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
-
- * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
- reference to BFD_RELOC_ARM_GOT12 which is never generated.
- * config/tc-arm.c: Rewrite, adding Thumb-2 support.
-
-2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * doc/Makefile.am (gasver.texi): Don't use $<.
- * doc/Makefile.in: Regenerated.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- PR 876
- * symbols.c (resolve_symbol_value): Do not move symbols whose
- value expression has not been resolved or finalized into the
- absolute section as this will confuse other parts of the assembler
- into thinking that their value is zero.
-
-2005-05-17 Jan Beulich <jbeulich at novell.com>
-
- * read.c (_find_end_of_line): New.
- (find_end_of_line): New.
- (HANDLE_CONDITIONAL_ASSEMBLY): Use it.
- (read_a_source_file): Use it.
- (s_globl): Use it.
- (s_macro): Use it.
- (get_line_sb): Use it.
- (s_errwarn): Replace discard_rest_of_line by ignore_rest_of_line.
- (s_comm_internal): Likewise.
- (s_lsym): Likewise.
- (s_macro): Likewise.
- (s_ignore): Use ignore_rest_of_line.
- * read.h (find_end_of_line): Prototype.
- (discard_rest_of_line): Remove prototype. #define to
- ignore_rest_of_line.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- * config/tc-v850,h (TC_FIX_TYPE): Define.
- (TC_INIT_FIX_TYPE): Define.
- * config/tc-v850.c (md_assemble): When creating a fix record the
- operand in the tc_fix_data field.
- (md_apply_fix3): When applying a resolved fix use the operand's
- insertion procedure to store the value, if the operand has been
- recorded.
-
-2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am (m68k-parse.c, itbl-parse.c): Update ylwrap
- invocation.
- * Makefile.in: Regenerated.
-
-2005-05-13 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_insnbuf_set_operand): Clarify error
- message.
- (xtensa_mark_zcl_first_insns): Fix incorrect nesting of conditional
- for handling RELAX_CHECK_ALIGN_NEXT_OPCODE.
-
-2005-05-11 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (md_apply_fix3): Allow pcrel forms of BFD_RELOC_16,
- BFD_RELOC_LO16, BFD_RELOC_HI16 and BFD_RELOC_HI16_S.
-
-2005-05-10 Michael Matz <matz at suse.de>
-
- * frags.c (frag_grow): Don't be too greedy in allocating memory.
-
- * config/tc-hppa.c (pa_block): Check arguments to .block[z].
-
-2005-05-10 Hans-Peter Nilsson <hp at bitrange.com>
-
- PR binutils/886
- * config/tc-mmix.c (mmix_handle_mmixal): Rearrange slightly.
- Handle label-without-colon before ordinary dot-pseudo as an
- ordinary label. Don't leak memory for label-without-colon alone
- on a line. Don't mmixal-munge operands for dot-pseudos.
-
-2005-05-10 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (get_any_string): Remove the two last parameters. Replace
- references to the former expand parameter by using macro_alternate.
- Simplify loop condition for checking for end-of-string.
- (get_string): Remove redunant call to sb_skip_white.
- (do_formals): Remove two last arguments to get_any_string.
- (macro_expand): Likewise.
- (expand_irp): Likewise.
-
-2005-05-10 Jan Beulich <jbeulich at novell.com>
-
- * read.c (s_macro): Move local variable 'local' to smaller scope.
- Call sb_kill on it when done.
-
-2005-05-09 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (optimize_disp): Discard displacement entirely
- when zero and not required by encoding constraints.
-
-2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 936
- * config/tc-sh64.c (sh64_fake_label): New.
-
- * config/tc-sh64.h (TC_FAKE_LABEL): New.
-
- * doc/internals.texi (TC_FAKE_LABEL): Document.
-
- * write.c (TC_FAKE_LABEL): New.
- (adjust_reloc_syms): Use it.
- (write_object_file): Likewise.
-
-2005-05-09 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (parse_insn): Disallow use of prefix separator
- and comma in Intel mode.
-
-2005-05-09 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (tc_x86_regname_to_dw2regnum): Correct 64-bit mode
- names to match ABI. Add more registers for 32-bit and 64-bit modes.
- Make name array static and const. Adjust lookup to account for NULL
- entries (standing for unused register numbers).
-
-2005-05-09 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (parse_insn): Consider all matching instructions
- when checking for string instruction after string-only prefix.
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 940
- * config/tc-ia64.c (start_unwind_section): Properly check
- comdat group with SHF_GROUP.
-
-2005-05-06 Bob Wilson <bob.wilson at acm.org>
-
- * doc/c-xtensa.texi (Literal Directive): Spelling correction.
-
-2005-05-06 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c: Remove excess whitespace.
- * config/tc-xtensa.h: Likewise.
- * config/xtensa-istack.h: Likewise.
- * config/xtensa-relax.c: Likewise.
- * config/xtensa-relax.h: Likewise.
-
-2005-05-06 Nick Clifton <nickc at redhat.com>
-
- * sb.h: Fix formatting of comments.
- * sb.c: Fix formatting of comments.
-
-2005-05-06 Jan Beulich <jbeulich at novell.com>
-
- * sb.h (sb_add_buffer): Reintroduce.
- * sb.c (sb_add_buffer): Likewise.
-
-2005-05-06 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (new_formal, del_formal): New.
- (do_formals): Use new_formal. Check for and parse qualifier. Warn if
- required argument has default value. Stop looking for more formal
- when there was a vararg one.
- (macro_expand_body): Use new_formal and del_formal.
- (macro_expand): Likewise. Initialize local variable err. Don't
- return immediately when encountering an error. Warn when keyword
- argument already had a value assigned. Eliminate duplicate clearing
- of argument value. When current positional argument matches parameter
- of vararg type, assign to it all the remaining arguments. Issue error
- when required parameter does not have value.
- (free_macro): Use del_formal.
- (expand_irp): Initialize formal type. Free buffers associated with
- formal prior to returning.
- * macro.h (struct formal_struct): Add new field 'type' with new
- enumeration type 'formal_type'.
- * doc/as.texinfo: Document macro parameter qualifiers.
- * NEWS: Mention new functionality.
-
-2005-05-06 Jan Beulich <jbeulich at novell.com>
-
- * cond.c (s_ifb): New.
- * read.c (potable): Add s_ifb as handler for .ifb and .ifnb.
- * read.h (s_ifb): Prototype.
- * doc/as.texinfo: Document .ifb and .ifnb.
-
-2005-05-05 Steve Ellcey <sje at cup.hp.com>
-
- * config/tc-ia64.c (MIN): Undef.
-
-2005-05-05 Paul Brook <paul at codesourcery.com>
-
- * config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
-
-2005-05-05 Matt Thomas <matt at 3am-software.com>
-
- * config/tc-vax.c (md_assemble): Don't assume a valueT is 4
- bytes.
-
-2005-05-05 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- COPYING, app.c, as.c, as.h, asintl.h, atof-generic.c, bignum.h,
- bit_fix.h, cgen.c, cgen.h, cond.c, debug.c, depend.c, dw2gencfi.c,
- dw2gencfi.h, dwarf2dbg.c, dwarf2dbg.h, ecoff.c, ecoff.h, ehopt.c,
- emul-target.h, emul.h, expr.c, expr.h, flonum-copy.c,
- flonum-konst.c, flonum.h, frags.c, frags.h, hash.c, hash.h,
- input-file.c, input-file.h, input-scrub.c, itbl-lex.h, itbl-lex.l,
- itbl-ops.c, itbl-ops.h, itbl-parse.y, listing.c, listing.h,
- literal.c, macro.c, macro.h, messages.c, obj.h, output-file.c,
- output-file.h, read.c, read.h, sb.c, sb.h, stabs.c,
- struc-symbol.h, subsegs.c, subsegs.h, symbols.c, symbols.h, tc.h,
- write.c, write.h, config/aout_gnu.h, config/atof-ieee.c,
- config/atof-vax.c, config/itbl-mips.h, config/m68k-parse.h,
- config/m68k-parse.y, config/m88k-opcode.h, config/obj-aout.c,
- config/obj-aout.h, config/obj-bout.c, config/obj-bout.h,
- config/obj-coff.c, config/obj-coff.h, config/obj-ecoff.c,
- config/obj-ecoff.h, config/obj-elf.c, config/obj-elf.h,
- config/obj-evax.c, config/obj-evax.h, config/obj-hp300.c,
- config/obj-hp300.h, config/obj-ieee.c, config/obj-ieee.h,
- config/obj-multi.h, config/obj-som.c, config/obj-som.h,
- config/tc-a29k.c, config/tc-a29k.h, config/tc-alpha.c,
- config/tc-alpha.h, config/tc-arc.c, config/tc-arc.h,
- config/tc-arm.h, config/tc-avr.c, config/tc-avr.h,
- config/tc-cris.c, config/tc-cris.h, config/tc-crx.c,
- config/tc-crx.h, config/tc-d10v.c, config/tc-d10v.h,
- config/tc-d30v.c, config/tc-d30v.h, config/tc-dlx.c,
- config/tc-dlx.h, config/tc-fr30.c, config/tc-fr30.h,
- config/tc-frv.c, config/tc-frv.h, config/tc-generic.c,
- config/tc-generic.h, config/tc-h8300.c, config/tc-h8300.h,
- config/tc-h8500.c, config/tc-h8500.h, config/tc-hppa.c,
- config/tc-hppa.h, config/tc-i370.c, config/tc-i370.h,
- config/tc-i386.c, config/tc-i386.h, config/tc-i860.c,
- config/tc-i860.h, config/tc-i960.c, config/tc-i960.h,
- config/tc-ia64.c, config/tc-ia64.h, config/tc-ip2k.c,
- config/tc-ip2k.h, config/tc-iq2000.c, config/tc-iq2000.h,
- config/tc-m32r.c, config/tc-m32r.h, config/tc-m68851.h,
- config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c,
- config/tc-m68k.h, config/tc-m88k.c, config/tc-m88k.h,
- config/tc-maxq.c, config/tc-maxq.h, config/tc-mcore.c,
- config/tc-mcore.h, config/tc-mips.c, config/tc-mips.h,
- config/tc-mmix.c, config/tc-mmix.h, config/tc-mn10200.c,
- config/tc-mn10200.h, config/tc-mn10300.c, config/tc-mn10300.h,
- config/tc-msp430.c, config/tc-msp430.h, config/tc-ns32k.c,
- config/tc-ns32k.h, config/tc-openrisc.c, config/tc-openrisc.h,
- config/tc-or32.c, config/tc-or32.h, config/tc-pdp11.c,
- config/tc-pdp11.h, config/tc-pj.c, config/tc-pj.h,
- config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c,
- config/tc-s390.h, config/tc-sh.c, config/tc-sh.h,
- config/tc-sh64.c, config/tc-sh64.h, config/tc-sparc.c,
- config/tc-sparc.h, config/tc-tahoe.c, config/tc-tahoe.h,
- config/tc-tic30.c, config/tc-tic30.h, config/tc-tic4x.c,
- config/tc-tic4x.h, config/tc-tic54x.c, config/tc-tic54x.h,
- config/tc-tic80.c, config/tc-tic80.h, config/tc-v850.c,
- config/tc-v850.h, config/tc-vax.c, config/tc-vax.h,
- config/tc-w65.c, config/tc-w65.h, config/tc-xstormy16.c,
- config/tc-xstormy16.h, config/tc-xtensa.c, config/tc-xtensa.h,
- config/tc-z8k.c, config/tc-z8k.h, config/te-386bsd.h,
- config/te-freebsd.h, config/te-hp300.h, config/te-hppa.h,
- config/te-ic960.h, config/te-irix.h, config/te-nbsd.h,
- config/te-netware.h, config/te-sparcaout.h, config/te-sun3.h,
- config/te-tmips.h, config/te-vxworks.h, config/vax-inst.h,
- config/xtensa-istack.h, config/xtensa-relax.c,
- config/xtensa-relax.h, doc/fdl.texi
-
-2005-05-05 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (arm_opts): Make -mlittle-endian switch set
- the target_big_endian variable to false.
-
-2005-05-04 Alan Modra <amodra at bigpond.net.au>
-
- * config/obj-ecoff.c (ecoff_frob_file_before_fix): Correct section
- list traversal. Use bfd_section_list_prepend.
- * config/tc-mmix.c (mmix_frob_file): Don't needlessly iterate
- over the section list.
- * config/tc-xtensa.c (xtensa_remove_section): Delete.
- (xtensa_insert_section): Delete.
- (xtensa_move_seg_list_to_beginning): Use bfd_section_list_remove
- and bfd_section_list_prepend.
- (xtensa_reorder_seg_list): Use bfd_section_list_remove and
- bfd_section_list_insert_after.
-
-2005-05-03 Nick Clifton <nickc at redhat.com>
-
- * config/obj-ecoff.c (ecoff_frob_file_before_fix): Fix invocations
- of bfd_section_list... macros.
- * config/tc-mmix.c (mmix_frob_file): Likewise.
- * config/tc-xtensa.c (xtensa_remove_section): Likewise.
- (xtensa_insert_section): Likewise.
-
- * macro.c (macro_hash): Remove static.
- * macro.h (macro_hash): Provide an external declaration.
-
-2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * write.c (write_object_file): Use bfd_section_double_list_remove
- to remove sections.
-
-2005-05-02 Daniel Jacobowitz <dan at codesourcery.com>
-
- * doc/Makefile.am (gasver.texi): Correct quoting.
- * doc/Makefile.in: Regenerated.
-
-2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Add h8300*-*-rtemscoff.
- Switch h8300*-*-rtems* to elf.
-
-2005-04-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * hash.c: Undo the last change.
- * hash.h: Likewise.
-
-2005-04-29 Daniel Jacobowitz <dan at codesourcery.com>
-
- * doc/Makefile.am (gasver.texi): Depend on bfd/configure instead
- of Makefile.
- (DISTCLEANFILES): Remove.
- (MAINTAINERCLEANFILES): Add asconfig.texi.
- * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
-
-2005-04-29 Ben Elliston <bje at au.ibm.com>
-
- * Makefile.am (GAS_CFILES): Remove bignum-copy.c.
- (GENERIC_OBJS): Likewise, remove bignum-copy.o.
- (bignum-copy.o): Remove.
- * Makefile.in: Regenerate.
- * makefile.vms (OBJS): Remove bignum-copy.obj.
- * symbols.h (local_symbol_make): Remove declaration.
- (verify_symbol_chain_2): Likewise.
- * symbols.c (local_symbol_make): Make static.
- (max_indent_level): Likewise.
- (verify_symbol_chain_2): Remove.
- * macro.c (macro_hash): Make static.
- * messages.c (fprint_value): Remove.
- * read.h (get_absolute_expr): Remove.
- (emit_leb128_expr): Likewise.
- (do_s_func): Likewise.
- * read.c (do_s_func): Make static.
- (emit_leb128_expr): Likewise.
- (get_absolute_expr): Likewise.
- * as.h (as_howmuch): Remove declaration.
- (fprint_value): Likewise.
- * as.c (myname): Make static.
- * input-scrub.c (as_howmuch): Remove.
- (as_1_char): Likewise.
- * input-file.h (input_file_is_open): Remove.
- * input-file.c (input_file_is_open): Likewise.
- * expr.h (expr_build_unary): Remove declaration.
- (expr_build_binary): Likewise.
- * expr.c (expr_build_unary): Remove.
- (expr_build_binary): Likewise.
- * hash.h (hash_replace): Remove declaration.
- (hash_delete): Likewise.
- * hash.c (hash_replace): Remove.
- (hash_delete): Likewise.
- * bignum-copy.c (bignum_copy): Move from here ..
- * config/tc-vax.c (bignum_copy): .. to here.
- * bignum.h (LOG_TO_BASE_2_OF_10): Remove.
- (bignum_copy): Remove extern declaration.
- * sb.h (string_count): Remove extern declaration.
- (sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
- (sb_name): Likewise.
- * sb.c (dsize): Replace preprocessor macro with static int.
- (string_count): Make static.
- (sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
- (sb_name): Likewise.
- * config/obj-coff.c (dim_index): Make static.
- * config/tc-i386.c (GOT_symbol): Likewise.
- (output_invalid_buf): Likewise.
- * doc/internals.texi (Warning and error messages): Remove the
- prototype for fprint_value.
-
-2005-04-27 Ben Elliston <bje at au.ibm.com>
-
- * link.cmd: Remove.
-
-2005-04-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-multi.h (FAKE_LABEL_NAME): Defined.
-
- * read.c (pseudo_set): Disallow symbol set to common symbol.
-
- PR 857
- * write.c (write_object_file): Report common symbol name when
- disallowing local symbol set to common symbol.
- (adjust_reloc_syms): Disallow local symbol set to undefined
- symbol.
-
-2005-04-25 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (macro_expand_body): Replace locals indicator parameters
- with actual macro_entry. New local variables macro_line and err.
- Don't return when encountering an error, just record the fact.
- Detect local symbol name colliding with parameter. Track line number
- inside of macro expansion.
- (do_formals): Move local variable name to wider scope. Check
- parameter of the same name doesn't already exist. In MRI mode, also
- check it doesn't collide with the argument count pseudo-parameter).
- (define_macro): Add file and line number parameters. Remove local
- variable namestr. New local variable error. Initialize macro_entry
- members file, line, and name. Don't return when encountering an
- error, just record the fact. Use %s in some diagnostics for read.c
- to insert the macro name. Free macro_entry on error.
- (macro_expand): Pass macro_entry to macro_epand_body. Don't return
- when encountering an error, just record the fact.
- (expand_irp): Don't return when encountering an error, just record
- the fact.
- * macro.h (macro_struct): New members name, file, and line.
- (define_macro): Add file and line number parameters.
- * read.c (s_macro): Pass file and line to define_macro. Tag warning
- regarding pseudo-op redefinition with the file/line that macro
- definition started at.
-
-2005-04-22 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (LOOKAHEAD_ALIGNER): Delete macro.
- (future_alignment_required): Remove ifdefs that use it.
-
-2005-04-22 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xg_get_build_instr_size): Remove.
- (xg_is_narrow_insn, xg_expand_narrow): Remove. Merge into...
- (xg_is_single_relaxable_insn): ...here. Add "targ" and "narrow_only"
- parameters.
- (xg_assembly_relax, xg_find_narrowest_format, relaxation_requirements,
- convert_frag_narrow): Use new version of xg_is_single_relaxable_insn.
-
-2005-04-21 Christian Groessler <chris at groessler.org>
-
- * config/tc-z8k.c (md_assemble): Fix buffer overrun in operand[]
- array.
-
-2005-04-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-aout.h (S_IS_EXTERN): Removed.
- * config/obj-bout.h (S_IS_EXTERN): Likewise.
- * config/obj-coff.h (S_IS_EXTERN): Likewise.
- * symbols.c (S_IS_EXTERN): Likewise.
- * symbols.h (S_IS_EXTERN): Likewise.
-
- * config/tc-alpha.c (tc_gen_reloc): Replace S_IS_EXTERN with
- S_IS_EXTERNAL.
- * config/tc-d10v.c (md_apply_fix3): Likewise.
- * config/tc-ia64.c (ia64_fix_adjustable): Likewise.
- * config/tc-iq2000.c (iq2000_fix_adjustable): Likewise.
- * config/tc-m32r.c (m32r_fix_adjustable): Likewise.
- * config/tc-mmix.c (mmix_adjust_symtab): Likewise.
- * config/tc-sh64.c (shmedia_frob_file_before_adjust): Likewise.
- (shmedia_md_convert_frag): Likewise.
- * symbols.c (print_symbol_value_1): Likewise.
- * write.c (write_object_file): Likewise.
-
-2005-04-20 Nick Clifton <nickc at redhat.com>
-
- * config/tc-xtensa.c (get_aligned_diff): Change type of
- branch_align to offsetT so that its signedness matches that of
- target_size.
-
- * config/tc-mips.c (macro): Use sprintf_vma to convert a > 32 bit
- number into a readable string.
- (load_register): Likewise.
-
-2005-04-20 Andreas Schwab <schwab at suse.de>
-
- * config/tc-ia64.c (specify_resource): Initialize all of tmpl.
-
-2005-04-19 David S. Miller <davem at davemloft.net>
-
- * config/tc-sparc.c (md_assemble): If sparc_ip gives us a
- NULL insn, exit early. Remove now spurious NULL checks.
- (sparc_ip): Use as_bad for unknown opcode errors, set *pinsn
- to NULL and exit.
-
-2005-04-19 Jan Beulich <jbeulich at novell.com>
-
- * symbols.h (symbol_find_base): Remove prototype.
- * symbols.c (save_symbol_name): Remove code section conditional upon
- STRIP_UNDERSCORE.
- (symbol_find): Remove.
- (symbol_find_base): Rename to symbol_find.
- * subsegs.c (section_symbol): Replace use of symbol_find_base with
- symbol_find.
- * config/obj-coff.c (tag_insert): Remove code section conditional
- upon STRIP_UNDERSCORE.
- (obj_coff_def): Likewise.
- (obj_coff_endef): Replace use of symbol_find_base with symbol_find.
- (coff_frob_symbol): Likewise.
- (yank_symbols): Likewise.
- (c_section_symbol): Likewise.
- * config/obj-coff.h (DO_NOT_STRIP): Remove.
- * config/tc-arm.c (symbol_locate): Remove code section conditional
- upon STRIP_UNDERSCORE.
- * config/tc-h8300.h (DO_NOT_STRIP): Remove.
- * config/tc-h8500.h (DO_NOT_STRIP): Remove.
- * config/tc-sh.h (DO_NOT_STRIP): Remove.
- * config/tc-w65.h (DO_NOT_STRIP): Remove.
- * config/tc-z8k.h (DO_NOT_STRIP): Remove.
-
-2005-04-19 Andreas Schwab <schwab at suse.de>
-
- * config/tc-ia64.c (md_assemble): Fix error message for wrong
- access to application registers.
-
-2005-04-19 Jan Beulich <jbeulich at novell.com>
-
- * config/te-sysv32.h: Remove.
- * Makefile.am (TARG_ENV_HFILES): Remove reference to
- config/te-sysv32.h.
- * Makefile.in (TARG_ENV_HFILES): Likewise.
-
-2005-04-19 Jan Beulich <jbeulich at novell.com>
-
- PR/847
- * config/tc-ia64.c (ia64_canonicalize_symbol_name): Re-allow zero-
- length symbols.
-
-2005-04-18 Mark Kettenis <kettenis at gnu.org>
-
- * config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
-
-2005-04-18 Maciej W. Rozycki <macro at linux-mips.org>
-
- * config/tc-mips.c (normalize_constant_expr): Don't check for
- HAVE_32BIT_GPRS.
- (check_absolute_expr): Only call normalize_constant_expr() if
- HAVE_32BIT_GPRS.
- (mips_ip): Likewise.
-
- * config/tc-mips.c (check_absolute_expr): Fix formatting.
-
-2005-04-18 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (free_token): New, freeing all the memory associated with a
- macro.
- (do_formals): Move initializers to ...
- (define_macro): ... here.
- (delete_macro): Convert passed in name to lower case. Warn when
- purging macro that doesn't exist. Use hash_jam instead of hash_delete.
-
-2005-04-15 Maciej W. Rozycki <macro at linux-mips.org>
-
- * config/tc-mips.c (normalize_constant_expr): Fix formatting.
-
-2005-04-15 Jan Beulich <jbeulich at novell.com>
-
- * config/obj-elf.c (obj_elf_struct): New.
- (elf_pseudo_table). Use it for .offset and .struct.
-
-2005-04-14 Bob Wilson <bob.wilson at acm.org>
- Sterling Augustine <sterling at tensilica.com>
-
- * config/tc-xtensa.c (get_aligned_diff): Handle target_size larger
- than the section alignment.
-
-2005-04-14 Bob Wilson <bob.wilson at acm.org>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-xtensa.h (struct xtensa_frag_type): Add lit_frchain field.
- * config/tc-xtensa.c (xg_translate_sysreg_op,
- xtensa_translate_old_userregs_ops,
- xtensa_find_unaligned_branch_targets,
- xtensa_find_unaligned_loops, xtensa_fix_close_loop_end_frags,
- relax_frag_add_nop): Support 64-bit host.
- (xtensa_mark_literal_pool_location, xtensa_move_literals): Use
- tc_frag_data lit_frchain and lit_seg fields instead of fr_var.
-
-2005-04-14 Mark Kettenis <kettenis at gnu.org>
-
- * configure.tgt: Add support for OpenBSD/sparc ELF.
-
- * configure.tgt: Set emulation for mips-*-openbsd*.
- Remove broken mips-dec-openbsd* config.
- * configure.in: Set default ABI for mips64-*-openbsd*.
- * configure: Regenerate.
-
-2005-04-14 Maciej W. Rozycki <macro at linux-mips.org>
-
- * config/tc-mips.c (macro) [ldd_std]: Don't attempt the GP
- optimization for constant addresses.
-
-2005-04-14 Nick Clifton <nickc at redhat.com>
-
- * as.c (main): Move parse_args before symbol_begin and frag_init
- so that the hash table size can be set before it is used.
- * hash.c: Use an unsigned long type for the size of the hash
- tables.
- * hash.h (set_gas_hash_table_size): Update the prototype.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
- * acinclude.m4: Include ../bfd/warning.m4.
- * configure.in: Invoke AM_BINUTILS_WARNINGS.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
+ * doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
-2005-04-13 Maciej W. Rozycki <macro at linux-mips.org>
+2006-04-06 Alan Modra <amodra at bigpond.net.au>
- * config/tc-mips.c (IS_ZEXT_32BIT_NUM): New macro.
- (normalize_address_expr): New function to sign-extend address
- offsets that fit into 32 bits in 32-bit mode.
- (macro_build_ldst_constoffset): Use normalize_address_expr()
- instead of a handcoded sequence.
- (load_register): Likewise. Report oversized numbers in a useful
- way.
- (macro) [ld_st, ldd_std]: Reject all oversized offsets, not only
- for constant addresses. Report oversized numbers in a useful way.
- (mips_ip): Use normalize_address_expr() for addresses.
+ * frags.c (frag_offset_fixed_p): Reinitialise offset before
+ second scan.
-2005-04-12 Mark Kettenis <kettenis at gnu.org>
+2006-04-05 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
- * config/tc-i386.c (output_insn): Handle VIA PadLock instructions
- similar to other instructions now that they're marked as ImmExt.
+ * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
+ (GOTT_BASE, GOTT_INDEX): New.
+ (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
+ GOTT_INDEX when generating VxWorks PIC.
+ * configure.tgt (sparc*-*-vxworks*): Remove this special case;
+ use the generic *-*-vxworks* stanza instead.
-2005-04-12 Nick Clifton <nickc at redhat.com>
+2006-04-04 Alan Modra <amodra at bigpond.net.au>
- * hash.c (DEFAULT_SIZE): Delete. Replace with:
- (gas_hash_table_size): New static variable.
- (set_gas_hash_table_size): New function: Records a requested size
- for the hash tables.
- (get_gas_hash_table_size): New function: Return a prime number
- near the requested size of the hash table.
- (hash_new): Use get_gas_hash_table_size.
- * hash.h: Add a prototype for set_gas_hash_table_size.
- * as.c (show_usage): Add description of new switches: --hash-size
- and --reduce-memory-overheads.
- (option_values): Add OPTION_HASH_TABLE_SIZE and
- OPTION_REDUCE_MEMORY_OVERHEADS.
- (std_longpopts): Add entries for the new options.
- (parse_args): Handle the new options.
- * Makefile.am: Add a dependency of as.c on hash.h.
- * Makefile.in: Regenerate.
- * doc/as.texinfo: Document the new switches.
- * NEWS: Mention the new switches.
+ PR 997
+ * frags.c (frag_offset_fixed_p): New function.
+ * frags.h (frag_offset_fixed_p): Declare.
+ * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
+ (resolve_expression): Likewise.
-2005-04-12 Nick Clifton <nickc at redhat.com>
+2006-04-03 Sterling Augustine <sterling at tensilica.com>
- PR gas/818
- * config/tc-hppa.c (pre_defined_registers): Fix %farg[0-3]
- synonyms.
+ * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
+ of the same length but different numbers of slots.
-2005-04-12 Alan Modra <amodra at bigpond.net.au>
+2006-03-30 Andreas Schwab <schwab at suse.de>
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
-
-2005-04-11 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (check_t1_t2_reads_and_writes): Fix typo.
-
-2005-04-11 Mark Kettenis <kettenis at gnu.org>
-
- * configure.tgt (generic_target): Add support for OpenBSD/i386 ELF.
-
-2005-04-11 Jan Beulich <jbeulich at novell.com>
-
- * NEWS: Mention these changes and their effects.
- * macro.c (get_token): Use is_name_beginner/is_part_of_name/
- is_name_ender.
- (check_macro): Likewise.
- (buffer_and_nest): Likewise. Permit multiple labels. Don't discard
- labels together with the closing pseudo-op.
- (macro_expand_body): Adjust comment. Range-check input before use.
- Adjust mis-spelled diagnostic. Use is_name_beginner.
- * read.c (try_macro): New.
- (read_a_source_file): New static variable last_eol. Don't list
- macro expansion lines more than once. Call try_macro.
- (s_macro): Set section of line_label to absolute instead of undefined.
- * doc/as.texinfo: Add information on the caveats of these changes.
-
-2005-04-11 Alan Modra <amodra at bigpond.net.au>
-
- * symbols.c (symbol_X_add_number): Change return type to "offsetT *".
- * symbols.h (symbol_X_add_number): Update prototype.
-
-2005-04-10 Eric Christopher <echristo at redhat.com>
-
- * symbols.c (symbol_X_add_number): Fix warning.
-
-2005-04-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-m68k.c (md_begin): Support 64bit host.
- (get_num): Support 64bit BFD on 32bit host.
-
-2005-04-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-mips.c (md_apply_fix3): Fix typos in BFD_RELOC_64.
-
-2005-04-09 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (assign_symbol): Remove const from parm. Fix xcalloc
- call. Don't do the COFF hacks for multi-emulation gas. Move
- demand_empty_rest_of_line back to caller.
- (s_set, equals): demand_empty_rest_of_line here.
-
- PR gas/827
- * as.h (rs_dummy): Define.
- * symbols.c (symbol_X_add_number): New function.
- * symbols.h (symbol_X_add_number): Declare.
- * stabs.c (aout_process_stab): Tidy symbol frag setting.
- * read.c (assign_symbol): New function, split out from s_set.
- Use symbol_find_or_make. Leave fr_type of dummy frag as rs_dummy.
- Fix COFF hacks for multi-emulation gas.
- (s_set): Call assign_symbol. Remove "register" keyword.
- (set_zero_frag): New function.
- (pseudo_set): Always check for assignment to section syms.
- Always set segment and frag of symbol, and likewise extern for
- aout/bout. Handle assignment of sym=sym+/-const specially. Don't
- special case exp.X_add_number non-zero for O_symbol expressions.
- (equals): Use assign_symbol.
-
-2005-04-08 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_create_xproperty_segments): Skip
- SEC_MERGE sections.
-
-2005-04-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-i386.c (tc_gen_reloc): Don't turn
- BFD_RELOC_X86_64_32S into BFD_RELOC_32.
-
-2005-04-06 Nick Clifton <nickc at redhat.com>
-
- * po/rw.po: New translation: Kinyarwanda
- * configure.in (ALL_LINGUAS): Add rw
+ * configure.in: Fix help string for --enable-targets option.
* configure: Regenerate.
-2005-04-05 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
+2006-03-28 Nathan Sidwell <nathan at codesourcery.com>
- * config/tc-xtensa.c (branch_align_power): New.
- (xtensa_find_unaligned_branch_targets, get_aligned_diff,
- future_alignment_required): Use branch_align_power to check section
- alignment as well as xtensa_fetch_width when aligning branch targets.
+ * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
+ (m68k_ip): ... here. Use for all chips. Protect against buffer
+ overrun and avoid excessive copying.
-2005-04-05 Bob Wilson <bob.wilson at acm.org>
+ * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
+ m68020_control_regs, m68040_control_regs, m68060_control_regs,
+ mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
+ mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
+ mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
+ (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
+ mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
+ mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
+ mcf5282_ctrl, mcfv4e_ctrl): ... these.
+ (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
+ (struct m68k_cpu): Change chip field to control_regs.
+ (current_chip): Remove.
+ (control_regs): New.
+ (m68k_archs, m68k_extensions): Adjust.
+ (m68k_cpus): Reorder to be in cpu number order. Adjust.
+ (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
+ (find_cf_chip): Reimplement for new organization of cpu table.
+ (select_control_regs): Remove.
+ (mri_chip): Adjust.
+ (struct save_opts): Save control regs, not chip.
+ (s_save, s_restore): Adjust.
+ (m68k_lookup_cpu): Give deprecated warning when necessary.
+ (m68k_init_arch): Adjust.
+ (md_show_usage): Adjust for new cpu table organization.
- * config/tc-xtensa.c: Warning fixes throughout.
- (xtensa_fetch_width): Change to unsigned.
- (assemble_nop, xtensa_find_unaligned_branch_targets,
- xtensa_find_unaligned_loops, xg_assemble_vliw_tokens,
- is_narrow_branch_guaranteed_in_range, xtensa_fix_close_loop_end_frags,
- min_bytes_to_other_loop_end, unrelaxed_frag_min_size,
- unrelaxed_frag_max_size, xtensa_fix_short_loop_frags,
- count_insns_to_loop_end, unrelaxed_frag_min_insn_count,
- get_text_align_max_fill_size, get_text_align_nop_count,
- get_text_align_nth_nop_size, get_noop_aligned_address,
- get_aligned_diff, convert_frag_align_next_opcode,
- convert_frag_immed_finish_loop, xtensa_create_property_segments,
- xtensa_create_xproperty_segments, xt_block_aligned_size): Clean up
- types, avoiding size_t and using offsetT and addressT appropriately.
- (get_text_align_power): Clean up types. Avoid incorrect bound.
- (get_text_align_fill_size): Clean up types. Restructure for clarity.
+2006-03-25 Bernd Schmidt <bernd.schmidt at analog.com>
-2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (start_unwind_section): Undo the change
- of 2004-08-18.
- (generate_unwind_image, dot_endp): Likewise.
-
-2005-04-01 David Mosberger <davidm at hpl.hp.com>
-
- * config/tc-ia64.c (ia64_handle_align): Move le_nop and
- le_nop_stop arrays and initializers to file scope.
- (md_begin): When generating code for anything other than
- Itanium 1, use MMI instead of MFI NOP bundles as a filler.
-
-2005-04-01 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (output_imm): Also set sign flag for 64-bit push
- immediates.
-
-2005-04-01 Jan-Benedict Glaw <jbglaw at lug-owl.de>
-
- * NEWS: Mention [fdgh]_floating.
- * config/atof-vax.c: Fix some whitespace.
- * config/tc-vax.c (md_pseudo_table): Add "[fdgh]_floating".
-
-2005-04-01 Nick Clifton <nickc at redhat.com>
-
- * configure.in: Add a check for <unistd.h> providing a prototype
- for getopt() which is compatible with the one in
- include/getopt.h. If so then define HAVE_DECL_GETOPT.
- * configure: Regenerate.
- * config.in (HAVE_DECL_GETOPT): Add.
-
-2005-04-01 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (s_bss): Call obj_elf_section_change_hook.
-
-2005-04-01 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
- (tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * config/tc-arm.c (arm_adjust_symtab): Rename
- bfd_elf32_is_arm_mapping_symbol_name to bfd_is_arm_mapping_symbol_name.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * config/tc-arm.c (mapping_state): Change documentation in function
- comment to cross-reference spec instead. Change type of mapping symbols
- to BSF_NO_TYPE.
- (arm_adjust_symtab): Don't change type of mapping symbols here.
-
-2005-03-30 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * as.h [NEED_DECLARATION_FFS] (ffs): Prototype and alphabetize.
- * config.in: Regenerate.
- * configure: Regenerate.
- * configure.in: Check for ffs decl and alphabetize.
-
-2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
- Phil Blundell <philb at gnu.org>
-
- * config/tc-arm.c (arm_parse_reloc): Add TLS relocations.
- (md_apply_fix3): Mark TLS symbols.
- (tc_gen_reloc): Handle TLS relocations.
- (arm_fix_adjustable): Ignore TLS relocations.
- (s_arm_elf_cons): Support expressions after decorated symbols.
-
-2005-03-29 Julian Brown <julian at codesourcery.com>
-
- * config/tc-arm.c (marked_pr_dependency): New bitmap, bit N indicates
- whether personality routine index N has been output for this section.
- (mapping_state): tc_segment_info_data now struct not enum.
- (arm_elf_change_section): Likewise, and marked_pr_dependency is now
- handled on section change.
- (create_unwind_entry): Previous code to output dependency removed.
- (s_arm_unwind_fnend): Output dependency if it hasn't been done already
- for this section.
- * config/tc-arm.h (TC_SEGMENT_INFO_TYPE): Redefined as struct
- arm_segment_info_type.
- (arm_segment_info_type): New struct.
-
-2005-03-28 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (do_align_targets): Update comment.
- (xtensa_frob_label): Compute "freq" before possibly switching frags.
- Insert a LOOP_END frag before every loop target, and do not overload
- DESIRE_ALIGN_IF_TARGET frags with loop end information.
- (xg_assemble_vliw_tokens): Use do_align_targets.
- (xtensa_fix_target_frags): Remove code to convert a
- DESIRE_ALIGN_IF_TARGET frag to a LOOP_END frag when there is a
- negatable branch at the end of a loop.
- (frag_can_negate_branch): Delete.
-
-2005-03-28 David Mosberger <davidm at hpl.hp.com>
- H.J. Lu <hongjiu.lu at intel.com>
-
- PR 803
- NEWS: Mention "-mtune=[itanium1|itanium2]".
-
- * config/tc-ia64.c (md): Add tune.
- (md_parse_option): Accepted "-mtune=[itanium1|itanium2]".
- (md_show_usage): Add "-mtune=[itanium1|itanium2]".
- (extra_goodness): Prefer M- and I-unit NOPs for itanium2. F and
- B unit NOPs are discouraged for McKinley-derived cores.
- (md_begin): Don't hardcode the "extra_goodness()" function in
- the comment...
- (ia64_init): Set md.tune to itanium2.
-
- * doc/as.texinfo: Add -mtune=[itanium1|itanium2]".
- * doc/c-ia64.texi: Likewise.
-
-2005-03-27 Ian Lance Taylor <ian at airs.com>
-
- * config/obj-coff.c (coff_frob_symbol): When crashing because of a
- bad C_EFCN symbol, print its name.
-
-2005-03-25 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (use_longcalls): Delete.
- (xg_symbolic_immeds_fit): Check for direct calls and return TRUE if
- the use_longcalls flag is set. Do this before checking the segment.
- (xg_expand_assembly_insn): Rearrange to use new do_expand flag. Never
- expand direct calls at this point.
- (xtensa_set_frag_assembly_state): Set use_longcalls flag.
- (xtensa_find_unmarked_state_frags): Likewise.
- (md_assemble): Do not disable longcalls by setting is_specific_opcode.
- (xg_assemble_vliw_tokens): Switch frags when use_longcalls changes.
- (convert_frag_immed): Remove unnecessary check of is_specific_opcode.
- * config/tc-xtensa.h (xtensa_frag_type): Add use_longcalls flag.
-
-2005-03-25 Hans-Peter Nilsson <hp at bitrange.com>
-
- * config/tc-mmix.c, config/tc-mmix.h: Convert to ISO C90.
-
-2005-03-25 Hans-Peter Nilsson <hp at axis.com>
-
- * config/tc-cris.h: Convert to ISO C90.
- * config/tc-cris.c: Ditto.
- (md_estimate_size_before_relax): Remove obsolete comment for
- parameter "segment_type".
- (md_begin): Document reason for cast of hash_insert argument.
- (md_atof): Correct type of parameter "type".
-
-2005-03-24 Nick Clifton <nickc at redhat.com>
-
- * write.h (bit_fix_new): Remove redundant prototype.
- * config/atof-ieee.c: Convert to ISO-C90 and fix formatting.
- * config/obj-aout.c: Convert to ISO-C90 and fix formatting.
- * config/obj-aout.h: Convert to ISO-C90 and fix formatting.
- * config/obj-bout.c: Convert to ISO-C90 and fix formatting.
- * config/obj-bout.h: Convert to ISO-C90 and fix formatting.
- * config/obj-ecoff.c: Convert to ISO-C90 and fix formatting.
- * config/obj-ecoff.h: Convert to ISO-C90 and fix formatting.
- * config/obj-som.c: Convert to ISO-C90 and fix formatting.
- * config/obj-som.h: Convert to ISO-C90 and fix formatting.
- * config/tc-a29k.c: Convert to ISO-C90 and fix formatting.
- * config/tc-a29k.h: Convert to ISO-C90 and fix formatting.
- * config/tc-alpha.c: Convert to ISO-C90 and fix formatting.
- * config/tc-alpha.h: Convert to ISO-C90 and fix formatting.
- * config/tc-arc.c: Convert to ISO-C90 and fix formatting.
- * config/tc-arc.h: Convert to ISO-C90 and fix formatting.
- * config/tc-d10v.c: Convert to ISO-C90 and fix formatting.
- * config/tc-d10v.h: Convert to ISO-C90 and fix formatting.
- * config/tc-d30v.c: Convert to ISO-C90 and fix formatting.
- * config/tc-d30v.h: Convert to ISO-C90 and fix formatting.
- * config/tc-dlx.c: Convert to ISO-C90 and fix formatting.
- * config/tc-dlx.h: Convert to ISO-C90 and fix formatting.
- * config/tc-fr30.c: Convert to ISO-C90 and fix formatting.
- * config/tc-fr30.h: Convert to ISO-C90 and fix formatting.
- * config/tc-h8500.c: Convert to ISO-C90 and fix formatting.
- * config/tc-h8500.h: Convert to ISO-C90 and fix formatting.
- * config/tc-i370.c: Convert to ISO-C90 and fix formatting.
- * config/tc-i370.h: Convert to ISO-C90 and fix formatting.
- * config/tc-i960.c: Convert to ISO-C90 and fix formatting.
- * config/tc-ip2k.c: Convert to ISO-C90 and fix formatting.
- * config/tc-ip2k.h: Convert to ISO-C90 and fix formatting.
- * config/tc-m32r.c: Convert to ISO-C90 and fix formatting.
- * config/tc-m32r.h: Convert to ISO-C90 and fix formatting.
- * config/tc-m88k.c: Convert to ISO-C90 and fix formatting.
- * config/tc-m88k.h: Convert to ISO-C90 and fix formatting.
- * config/tc-mcore.c: Convert to ISO-C90 and fix formatting.
- * config/tc-mcore.h: Convert to ISO-C90 and fix formatting.
- * config/tc-mn10200.c: Convert to ISO-C90 and fix formatting.
- * config/tc-ns32k.c: Convert to ISO-C90 and fix formatting.
- * config/tc-ns32k.h: Convert to ISO-C90 and fix formatting.
- * config/tc-openrisc.c: Convert to ISO-C90 and fix formatting.
- * config/tc-openrisc.h: Convert to ISO-C90 and fix formatting.
- * config/tc-or32.c: Convert to ISO-C90 and fix formatting.
- * config/tc-or32.h: Convert to ISO-C90 and fix formatting.
- * config/tc-pdp11.h: Convert to ISO-C90 and fix formatting.
- * config/tc-pj.c: Convert to ISO-C90 and fix formatting.
- * config/tc-pj.h: Convert to ISO-C90 and fix formatting.
- * config/tc-tahoe.c: Convert to ISO-C90 and fix formatting.
- * config/tc-tic80.c: Convert to ISO-C90 and fix formatting.
- * config/tc-tic80.h: Convert to ISO-C90 and fix formatting.
- * config/tc-v850.c: Convert to ISO-C90 and fix formatting.
- * config/tc-v850.h: Convert to ISO-C90 and fix formatting.
- * config/tc-w65.c: Convert to ISO-C90 and fix formatting.
- * config/tc-w65.h: Convert to ISO-C90 and fix formatting.
- * config/tc-xstormy16.c: Convert to ISO-C90 and fix formatting.
- * config/tc-xstormy16.h: Convert to ISO-C90 and fix formatting.
-
-2005-03-23 Jim Blandy <jimb at redhat.com>
-
- * config/tc-arm.c (arm_adjust_symtab): Fetch elf_sym's binding
- attributes properly.
-
-2005-03-23 Mike Frysinger <vapier at gentoo.org>
- Nick Clifton <nickc at redhat.com>
-
- * configure.tgt: Accept any C library to accompany a GNU Linux
- implementation, not just the GNU C library.
- * configure.in: Likewise.
- * configure: Regenerate.
-
-2005-03-23 Nick Clifton <nickc at redhat.com>
-
- * config/tc-tic30.c: Convert to ISO C90 formatting.
- * config/tc-tic30.h: Convert to ISO C90 formatting.
- * config/tc-pdp11.c: Convert to ISO C90 formatting.
- * config/atof-vax.c: Convert to ISO C90 formatting.
-
-2005-03-21 Maciej W. Rozycki <macro at mips.com>
-
- * config/tc-mips.c (mips_frob_file): Sort BFD_RELOC_MIPS16_LO16
- relocations correctly as well.
- (mips_fix_adjustable): Don't make BFD_RELOC_MIPS16_LO16
- relocations in mergeable sections section-relative either.
-
-2005-03-21 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (md_apply_fix3): Recognize XTENSA_PLT relocations.
-
-2005-03-21 Nick Clifton <nickc at redhat.com>
-
- * config/tc-sh.c (sh_elf_final_processing): Fix compile time
- warning by providing a prototype for sh_symbian_find_elf_flags.
-
- * cgen.c (gas_cgen_parse_operand): Fix typo introduced by
- previous delta.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * configure.tgt: Handle setting of bfd_gas for fmt=multi targets
- along with other formats that set bfd_gas. Remove unnecessary
- setting of bfd_gas. Delete strongarm cases in generic_target
- switch.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- PR gas/780
- * config/tc-m68k.c (TRUNC, SEXT): Define.
- (issbyte, isubyte, issword, isuword, isbyte, isword): Use the above.
- (m68k_ip): Truncate or sign extend expressions as appropriate.
- (get_num): Likewise.
- (md_apply_fix3): Use SEXT.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (OBJ_FORMAT_CFILES): Prune config/obj-vms.c.
- (OBJ_FORMAT_HFILES): Prune config/obj-vms.h.
- (obj-vms.o): Delete rule.
- Run "make dep-am".
+ * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
+ * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
+ * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
+ "elf/bfin.h".
+ (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
+ (any_gotrel): New rule.
+ (got): Use it, and create Expr_Node_GOT_Reloc nodes.
+ * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
+ "elf/bfin.h".
+ (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
+ (bfin_pic_ptr): New function.
+ (md_pseudo_table): Add it for ".picptr".
+ (OPTION_FDPIC): New macro.
+ (md_longopts): Add -mfdpic.
+ (md_parse_option): Handle it.
+ (md_begin): Set BFD flags.
+ (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
+ (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
+ us for GOT relocs.
+ * Makefile.am (bfin-parse.o): Update dependencies.
+ (DEPTC_bfin_elf): Likewise.
* Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * doc/Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
-2005-03-18 C Jaiprakash <cjaiprakash at noida.hcltech.com>
+2006-03-25 Richard Sandiford <richard at codesourcery.com>
- * config/tc-m68k.c (m68k_elf_final_processing): Set file specific
- flag for coldfire v4e.
+ * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
+ mcfemac instead of mcfmac.
-2005-03-17 Bob Wilson <bob.wilson at acm.org>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
- * config/tc-xtensa.c (xg_apply_tentative_value): Rename to
- xg_apply_fix_value and return a value to indicate success.
- (md_pcrel_from): Skip check of fx_done. Return 0 if not PC-relative.
- (xtensa_force_relocation): Remove checks for VTABLE relocs.
- (xtensa_validate_fix_sub): New.
- (xtensa_fix_adjustable): Remove check for external or weak symbols.
- (tc_gen_reloc): Move code to handle difference of symbols and code to
- apply tentative fix values to ...
- (md_apply_fix3): ...here. Enable standard overflow checks for simple
- 8, 16, and 32 bit relocations. Apply fixes for slot-specific
- relocations when linkrelax flag is not set.
- * config/tc-xtensa.h (xtensa_validate_fix_sub): Add prototype.
- (TC_FORCE_RELOCATION_SUB_SAME, TC_VALIDATE_FIX_SUB): Define.
+ * config/tc-mips.c (mips_target_format): Handle vxworks targets.
+ (md_begin): Complain about -G being used for PIC. Don't change
+ the text, data and bss alignments on VxWorks.
+ (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
+ generating VxWorks PIC.
+ (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
+ (macro): Likewise, but do not treat la $25 specially for
+ VxWorks PIC, and do not handle jal.
+ (OPTION_MVXWORKS_PIC): New macro.
+ (md_longopts): Add -mvxworks-pic.
+ (md_parse_option): Don't complain about using PIC and -G together here.
+ Handle OPTION_MVXWORKS_PIC.
+ (md_estimate_size_before_relax): Always use the first relaxation
+ sequence on VxWorks.
+ * config/tc-mips.h (VXWORKS_PIC): New.
-2005-03-17 Jan Beulich <jbeulich at novell.com>
+2006-03-21 Paul Brook <paul at codesourcery.com>
- * config/tc-i386.c (i386_scale): Beautify error message.
- (Intel syntax comments): Update.
- (struct intel_parser_s): Add fields in_offset, in_bracket, and
- next_operand.
- (intel_e04_1, intel_e05_1, intel_e05_1, intel_e09_1, intel_e10_1):
- Remove declarations.
- (intel_bracket_expr): Declare.
- (i386_intel_operand): Initialize new intel_parser fields. Wrap most
- of the function body in a loop allowing to split an operand into two.
- Replace calls to malloc and checks of it returning non-NULL with
- calls to xmalloc/xstrdup.
- (intel_expr): SHORT no longer handled here. Add comment indicating
- comparison ops need implementation.
- (intel_e04, intel_e04_1): Combine, replace recursion with loop.
- Check right operand of - does not specify a register when parsing
- the address of a memory reference.
- (intel_e05, intel_e05_1): Combine, replace recursion with loop.
- Check operands do not specify a register when parsing the address of
- a memory reference.
- (intel_e06, intel_e06_1): Likewise.
- (intel_e09, intel_e09_1): Combine, replace recursion with loop. Also
- handle SHORT as well as unary + and -. Don't accept : except for
- segment overrides or in direct far jump/call insns.
- (intel_brack_expr): New.
- (intel_e10, intel_e10_1): Combine, replace recursion with loop. Use
- intel_brack_expr.
- (intel_e11): Replace chain of if/else-if by switch, alloing fall-
- through in certain cases. Use intel_brack_expr. Add new diagnostics.
- Allow symbolic constants as register scale value.
- (intel_get_token): Replace call to malloc and check of return value
- with call to xmalloc. Change handling for FLAT to match MASM's.
- (intel_putback_token): Don't try to back up/free current token if
- that is T_NIL.
+ * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
-2005-03-16 Daniel Jacobowitz <dan at codesourcery.com>
+2006-03-21 Sterling Augustine <sterling at tensilica.com>
- * configure.tgt: Set emulation for arm-*-eabi*.
- * config/tc-arm.c (meabi_flags): Check EABI_DEFAULT.
- * config/te-armeabi.h: New file.
- * config/te-armlinuxeabi.h (EABI_DEFAULT): Define.
- * config/te-symbian.h: Include "te-armeabi.h".
+ * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
+ (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
+ (get_loop_align_size): New.
+ (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
+ (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
+ (get_text_align_power): Rewrite to handle inputs in the range 2-8.
+ (get_noop_aligned_address): Use get_loop_align_size.
+ (get_aligned_diff): Likewise.
-2005-03-16 Nick Clifton <nickc at redhat.com>
+2006-03-21 Paul Brook <paul at codesourcery.com>
- * cgen.c (gas_cgen_parse_operand): Copy opinfo parameter into a
- local variable in case it is clobbered by the setjmp.
+ * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
+2006-03-20 Paul Brook <paul at codesourcery.com>
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
- * configure: Regenerate.
+ * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
+ (do_t_branch): Encode branches inside IT blocks as unconditional.
+ (do_t_cps): New function.
+ (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
+ do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
+ (opcode_lookup): Allow conditional suffixes on all instructions in
+ Thumb mode.
+ (md_assemble): Advance condexec state before checking for errors.
+ (insns): Use do_t_cps.
-2005-03-16 Nick Clifton <nickc at redhat.com>
+2006-03-20 Paul Brook <paul at codesourcery.com>
- * config/obj-coff.h: Convert to ISO C90 formatting.
- * config/obj-coff.c: Convert to ISO C90 formatting.
+ * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
+ outputting the insn.
-2005-03-15 Zack Weinberg <zack at codesourcery.com>
+2006-03-18 Jan-Benedict Glaw <jbglaw at lug-owl.de>
- * config/tc-arm.c (do_mla): Rename to do_mlas, take second
- is_mls parameter; do not diagnose Rm==Rd when is_mls.
- (do_mla, do_mls, five_bit_unsigned_immediate, bfci_lsb_and_width)
- (do_bfc, do_bfi, do_bfx, do_rbit, do_mov16, do_ldsttv4): New functions.
- (insns): Add ARMv6T2 instructions:
- bfc bfi mls movw movt rbit sbfx ubfx ldrht ldrsht ldrsbt strht.
- (arm_archs): Add V6T2 variants.
+ * config/tc-vax.c: Update copyright year.
+ * config/tc-vax.h: Likewise.
-2005-03-15 Nick Clifton <nickc at redhat.com>
+2006-03-18 Jan-Benedict Glaw <jbglaw at lug-owl.de>
- * NEWS: Add cutoff for changes in 2.16 release.
+ * config/tc-vax.c (md_chars_to_number): Used only locally, so
+ make it static.
+ * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
-2005-03-15 Jan Beulich <jbeulich at novell.com>
+2006-03-17 Paul Brook <paul at codesourcery.com>
- * expr.c (operand): Merge handling of unary + into that for unary
- -, !, and ~.
+ * config/tc-arm.c (insns): Add ldm and stm.
-2005-03-14 Eric Christopher <echristo at redhat.com>
+2006-03-17 Ben Elliston <bje at au.ibm.com>
- * config/tc-mips.c: Include dw2gencfi.h.
- (mips_cfi_frame_initial_instructions): New.
- * config/tc-mips.h (TARGET_USE_CFIPOP): Define.
- (tc_cfi_frame_initial_instructions): Ditto.
- (DWARF2_DEFAULT_RETURN_COLUMN): Ditto.
- (DWARF2_CIE_DATA_ALIGNMENT): Ditto.
- * Makefile.am: Update dependencies.
- * Makefile.in: Regenerate.
+ PR gas/2446
+ * doc/as.texinfo (Ident): Document this directive more thoroughly.
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
+2006-03-16 Paul Brook <paul at codesourcery.com>
- * po/es.po: Commit new Spanish translation.
+ * config/tc-arm.c (insns): Add "svc".
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
+2006-03-13 Bob Wilson <bob.wilson at acm.org>
- * po/tr.po: Commit new Turkish translation.
+ * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
+ flag and avoid double underscore prefixes.
-2005-03-12 Zack Weinberg <zack at codesourcery.com>
+2006-03-10 Paul Brook <paul at codesourcery.com>
- * config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
- wfi, yield.
+ * config/tc-arm.c (md_begin): Handle EABIv5.
+ (arm_eabis): Add EF_ARM_EABI_VER5.
+ * doc/c-arm.texi: Document -meabi=5.
-2005-03-11 Daniel Jacobowitz <dan at codesourcery.com>
+2006-03-10 Ben Elliston <bje at au.ibm.com>
- * config-gas.com: Mark vax-vms as obsolete.
- * configure.in: Remove fmt=vms support.
- * config.in: Regenerate.
- * configure: Regenerate.
- * config/obj-vms.h, config/obj-vms.c, config/vms-conf.h: Remove.
+ * app.c (do_scrub_chars): Simplify string handling.
-2005-03-10 Sterling Augustine <sterling at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
+2006-03-07 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
+ Paul Brook <paul at codesourcery.com>
+ Ricardo Anguiano <anguiano at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
- * config/tc-xtensa.c (finish_vinsn): Include the last instruction slot
- when checking if xg_resolve_literals needs to be called.
- * config/tc-xtensa.h: Fix spelling typo in a comment.
+ * config/tc-arm.c (md_apply_fix): Install a value of zero into a
+ BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
+ R_ARM_ABS12 reloc.
+ (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
+ relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
+ relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
-2005-03-10 Jan Beulich <jbeulich at novell.com>
+2006-03-06 Bob Wilson <bob.wilson at acm.org>
- * config/tc-tic54x.h (tic54x_macro_info): Change parameter type.
- * config/tc-tic54x.c (tic54x_macro_info): Likewise. Replace hand-
- crafted structure declarations with the types from macro.h.
+ * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
+ even when using the text-section-literals option.
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
- * config/tc-mips.c (s_cpsetup): Use '__gnu_local_gp' instead of '_gp'
- for -mno-shared optimization.
+ * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
+ and cf.
+ (m68k_ip): <case 'J'> Check we have some control regs.
+ (md_parse_option): Allow raw arch switch.
+ (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
+ whether 68881 or cfloat was meant by -mfloat.
+ (md_show_usage): Adjust extension display.
+ (m68k_elf_final_processing): Adjust.
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+2006-03-03 Bjoern Haase <bjoern.m.haase at web.de>
- * config/tc-mips.c (MAX_VR4130_NOPS, MAX_DELAY_NOPS): New macros.
- (MAX_NOPS): Bump to 4.
- (mips_fix_vr4130): New variable.
- (nops_for_vr4130): New function.
- (nops_for_insn): Use MAX_DELAY_NOPS rather than MAX_NOPS. Use
- nops_for_vr4130 if working around VR4130 errata.
- (OPTION_FIX_VR4130, OPTION_NO_FIX_VR4130): New macros.
- (md_longopts): Add -mfix-vr4130 and -mno-fix-vr4130.
- (md_parse_option): Handle them.
- (md_show_usage): Print them.
- * doc/c-mips.texi: Document -mfix-vr4130 and -mno-fix-vr4130.
+ * config/tc-avr.c (avr_mod_hash_value): New function.
+ (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
+ BFD_RELOC_MS8_LDI for hlo8() and hhi8()
+ (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
+ instead of int avr_ldi_expression: use avr_mod_hash_value instead
+ of (int).
+ (tc_gen_reloc): Handle substractions of symbols, if possible do
+ fixups, abort otherwise.
+ * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
+ tc_fix_adjustable): Define.
+
+2006-03-02 James E Wilson <wilson at specifix.com>
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+ * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
+ change the template, then clear md.slot[curr].end_of_insn_group.
- * config/tc-mips.c (append_insn): Remove cop_interlocks test from
- branch delay code.
+2006-02-28 Jan Beulich <jbeulich at novell.com>
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+ * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
- * config/tc-mips.h (mips_flush_pending_output): Delete.
- (mips_emit_delays): Declare.
- (md_flush_pending_output): Use mips_emit_delays.
- * config/tc-mips.c (mips_no_prev_insn): Remove parameter; always forget
- the previous instructions.
- (md_begin, append_insn, md_parse_option): Update callers.
- (mips_emit_delay): Remove parameter. Move INSNS != 0 code to
- start_noreorder.
- (mips_align, s_change_sec, s_cons, s_float_cons, s_gpword)
- (s_gpdword): Update callers.
- (start_noreorder, end_noreorder): New functions.
- (macro, macro2, mips16_macro, s_mipsset): Use them instead of
- manipulating mips_opts or prev_nop_frag directly.
- (mips_flush_pending_output): Delete.
+2006-02-28 Jan Beulich <jbeulich at novell.com>
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+ PR/1070
+ * macro.c (getstring): Don't treat parentheses special anymore.
+ (get_any_string): Don't consider '(' and ')' as quoting anymore.
+ Special-case '(', ')', '[', and ']' when dealing with non-quoting
+ characters.
- * config/tc-mips.c (mips_move_labels): New function, taken from...
- (append_insn, mips_emit_delays): ...here.
+2006-02-28 Mat <mat at csail.mit.edu>
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+ * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
- * config/tc-mips.c (MAX_NOPS): New macro.
- (history): Resize to 1 + MAX_NOPS.
- (fix_vr4120_class): New enumeration.
- (vr4120_conflicts): New variable.
- (init_vr4120_conflicts): New function.
- (md_begin): Call it.
- (insn_uses_reg): Constify first argument.
- (classify_vr4120_insn, insns_between, nops_for_insn, nops_for_sequence)
- (nops_for_insn_or_target): New functions.
- (append_insn): Use the new nops_for_* functions instead of inline
- delay checks. Generalize prev_nop_frag handling to handle an
- arbitrary history length. Insert nops into the history buffer
- once the number of nops in prev_nop_frag is fixed.
- (emit_delays): Use nops_for_insn instead of inline delay checks.
+2006-02-27 Jakub Jelinek <jakub at redhat.com>
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (append_insn): Remove now-redundant nops != 0
- check from branch delay code. Remove unnecessary check for branches.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (dummy_opcode): Delete.
- (nop_insn, mips16_nop_insn): New variables.
- (NOP_INSN): New macro.
- (insn_length, create_insn, install_insn, move_insn, add_fixed_insn)
- (add_relaxed_insn, insert_into_history, emit_nop): New functions.
- (md_begin): Initialize nop_insn and mips16_nop_insn.
- (append_insn): Use the new emit_nop function to add nops, recording
- them in the history buffer. Use add_fixed_insn or add_relaxed_insn
- to reserve room for the instruction and install_insn to install the
- final form. Use insert_into_history to record the instruction in
- the history buffer. Use move_insn to do delay slot filling.
- (mips_emit_delays): Use add_fixed_insn instead of the emit_nop macro.
- (macro_build, mips16_macro_build, macro_build_lui, mips_ip)
- (mips16_ip): Use create_insn to initialize mips_cl_insns.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (INSERT_BITS, EXTRACT_BITS, INSERT_OPERAND)
- (EXTRACT_OPERAND, MIPS16_INSERT_OPERAND, MIPS16_EXTRACT_OPERAND): New.
- (insn_uses_reg, reg_needs_delay, append_insn, macro_build)
- (mips16_macro_build, macro_build_lui, mips16_macro, mips_ip)
- (mips16_ip): Use the new macros instead of explicit masks and shifts.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (mips_cl_insn): Replace the valid_p, delay_slot_p
- and extended_p fields with a single fixed_p field.
- (append_insn, mips_no_prev_insn): Adjust accordingly.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (mips_cl_insn): Replace reloc_type array with
- a single mips16_absolute_jump_p bit.
- (append_insn): Adjust accordingly.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.h (mips_cl_insn): Move definition to...
- * config/tc-mips.c (mips_cl_insn): ...here. Add new fields:
- frag, where, fixp, reloc_type, valid_p, noreorder_p, delay_slot_p
- and extended_p.
- (history): New variable.
- (prev_insn, prev_prev_insn, prev_insn_valid, prev_insn_frag)
- (prev_insn_where, prev_insn_reloc_type, prev_insn_fixp)
- (prev_insn_is_delay_slot, prev_insn_unreordered, prev_insn_extended)
- (prev_prev_insn_unreordered): Delete.
- (reg_needs_delay, append_insn, mips_no_prev_insn, mips_emit_delays)
- (macro_start): Replace uses of prev_insn* with the equivalent history[]
+ * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
field.
+ (CFI_signal_frame): Define.
+ (cfi_pseudo_table): Add .cfi_signal_frame.
+ (dot_cfi): Handle CFI_signal_frame.
+ (output_cie): Handle cie->signal_frame.
+ (select_cie_for_fde): Don't share CIE if signal_frame flag is
+ different. Copy signal_frame from FDE to newly created CIE.
+ * doc/as.texinfo: Document .cfi_signal_frame.
-2005-03-08 Daniel Jacobowitz <dan at codesourcery.com>
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
- * doc/Makefile.am: Update as.info dependencies.
- * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * doc/as.texinfo: Add sentence to indicate redefining a macro is an
- error, and point to .purgem documentation if someone really needs
- re-definitions.
- * NEWS: Mention macro redefinition is now an error.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (emit_one_bundle): Track last slot user insn was
- emitted to. Add more precise diagnostics for non-fitting insns based
- on that. Eliminate now superfluous special casing of MLX. Clear out
- slot information when dropping an insn.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_section_name): Rename to...
- (cross_section): In addition to separating the name from the rest of
- the arguments, also carry out the operation.
- (dot_xdata): Use cross_section.
- (dot_float_cons): Likewise.
- (dot_xstringer): Likewise.
- (dot_xdata_ua): Likewise.
- (dot_float_cons_ua): Likewise. Pass float_cons, not stmt_float_cons.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/gas.pot: Regenerate.
-
-2005-03-04 David Daney <ddaney at avtrex.com>
-
- * config/tc-mips.c (macro_build_lui): Use '__gnu_local_gp'
- instead of '_gp' for -mno-shared optimization.
- (s_cpload): Ditto.
- (s_abicalls): Document it in the comment.
- (md_show_usage): Document the -mno-shared option.
-
-2005-03-04 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (mips_set_options): Add sym32 field.
- (mips_opts): Initialize it.
- (HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide.
- (HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES.
- (HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros.
- (load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES
- when deciding whether to use a symbolic %highest/%higher expansion.
- (macro): Likewise. Remove o64/n32 linux hack. Always use
- ADDRESS_ADD*_INSN for address addition in the expansion of "dla"
- and "la". Handle constants separately from symbolic expressions in
- the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES
- and using load_register to load the high part of the address.
- (OPTION_MSYM32, OPTION_NO_MSYM32): New macros.
- (OPTION_ELF_BASE): Bump by 2.
- (md_longopts): Add entries for -msym32 and -mno-sym32.
- (md_parse_option): Handle them.
- (usage): Document them.
- (s_mipsset): Handle ".set sym32" and ".set nosym32".
- (s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of
- HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp".
- * doc/c-mips.texi: Document ".set sym32", ".set nosym32",
- -msym32 and -mno-sym32.
-
-2005-03-03 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (load_address): Implement GP optimization
- for 64bit address space non-PIC. Fix formatting.
- (macro): Likewise. Simplify code.
- (md_parse_option): Don't bail out if -G 0 is set for PIC code.
- (mips_after_parse_args): Simplify code.
-
-2005-03-03 Nick Clifton <nickc at redhat.com>
-
- * expr.c (operand): Remove redundant code enclosed by #ifdef
- RELAX_PAREN_GROUPING....#endif.
-
- * config/tc-mn10200.c (tc_gen_reloc): Handle the case where the
- reloc is the difference of two symbols defined in the same
- section.
-
- * config/tc-iq2000.c (line_comment_chars): Include the # character
- as otherwise this breaks #APP/#NO_APP processing.
-
-2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * config/tc-arc.c(md_assemble): Remove dead code for handling
- immediate indexing of ld and st .
-
-2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
- Joseph Myers <joseph at codesourcery.com>
-
- * config/tc-mips.c (percent_op): Add %tlsgd, %tlsldm, %dtprel_hi,
- %dtprel_lo, %tprel_hi, %tprel_lo, and %gottprel.
- (parse_relocation): Check for a word break after a relocation
- operator.
- (md_apply_fix3): Handle TLS relocations, and mark thread-local
- symbols.
-
-2005-03-02 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (ppc_fix_adjustable <ELF>): Remove bogus checks.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * as.c (main): Use unlink_if_ordinary instead of unlink.
- * messages.c (as_fatal): Likewise.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
- accesses.
- (parse_register): Allow cr8...15 in all modes.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (intel_e11): If not followed by T_PTR, treat T_BYTE
- etc. like normal symbol references (T_ID).
-
-2005-03-02 Alan Modra <amodra at bigpond.net.au>
-
- * symbols.c (fb_label_name): Fix silly thinko in last change.
-
-2005-03-02 Alan Modra <amodra at bigpond.net.au>
-
- * expr.c (integer_constant): Remove TARGET_WORD_SIZE hack.
- * config/tc-m68k.h (TARGET_WORD_SIZE): Delete.
-
- * symbols.c (fb_label_name): Allow an augend of 2 for mmix.
-
-2005-03-01 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- PR gas/708
- * config/tc-arc.c (md_assemble): Initialize suffix for extension
- suffixes also.
-
-2005-03-01 Alan Modra <amodra at bigpond.net.au>
-
- * config/obj-coff.c (fixup_segment): Delete sy_mri_common assertion.
-
- * as.h (assert): Warning fix.
- * expr.c (expr): Correct assertion.
- * read.c (s_comm_internal): Remove assertion.
- * write.c (relax_segment): Enable vma assertion only for BFD_ASSEMBLER.
- (fixup_segment): Remove assertion.
- * config/tc-dlx.c (machine_ip): Remove untrue assertions.
- (md_apply_fix3): Likewise.
- * config/tc-i370.c (md_begin): Correct assertion.
- (i370_macro): Warning fix for assertion.
-
-2005-03-01 Alan Modra <amodra at bigpond.net.au>
-
- * configure.in (AC_C_BIGENDIAN): Invoke.
- * configure: Regenerate.
- * write.c (write_object_file <!BFD_ASSEMBLER>): Don't use sizeof
- host variable to set string header size.
- * config/obj-aout.c (obj_header_append): Don't use host structs.
- (obj_symbol_to_chars): Likewise.
- (obj_emit_strings): Likewise. Use the passed in output pointer.
- * config/obj-aout.h (H_GET_FILE_SIZE): Include H_GET_LINENO_SIZE.
- * config/obj-bout.c (obj_emit_relocations): Use md_reloc_size,
- not sizeof host struct.
- (obj_header_append, obj_symbol_to_chars): Don't use host structs.
- (obj_emit_strings): Likewise.
- * config/obj-bout.h (EXEC_BYTES_SIZE): Define.
- (N_TXTOFF, H_GET_FILE_SIZE, H_GET_HEADER_SIZE): Use instead of
- sizeof host struct.
- (H_SET_SYMBOL_TABLE_SIZE): Hard code sym size rather than using
- sizeof host struct.
- (host_number_to_chars): Define.
- * config/obj-hp300.c (hp300_header_append): Don't use sizeof
- host internal struct to set header sizes.
- * config/tc-i960.c (md_number_to_field): Warning fix.
- (md_ri_to_chars): Use host byte order.
- (get_cdisp, md_apply_fix3): Warning fix.
- * config/tc-m68k.c (md_assemble): Don't use sizeof host short.
-
-2005-02-28 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * doc/c-arc.texi: Update documentation about ARC's extension
- instructions.
-
-2005-02-27 Svein E. Seldal <svein at dev.seldal.com>
-
- * config/tc-tic4x.c (tic4x_gen_to_words): Changed mail
- address for myself.
-
-2005-02-23 Alan Modra <amodra at bigpond.net.au>
-
- * cgen.c: Warning fixes.
- * config/tc-arc.c: Likewise.
- * config/tc-arm.c: Likewise.
- * config/tc-avr.c: Likewise.
- * config/tc-d10v.c: Likewise.
- * config/tc-d30v.c: Likewise.
- * config/tc-frv.c: Likewise.
- * config/tc-frv.h: Likewise.
- * config/tc-h8300.c: Likewise.
- * config/tc-h8500.c: Likewise.
- * config/tc-i370.c: Likewise.
- * config/tc-i960.c: Likewise.
- * config/tc-ia64.c: Likewise.
- * config/tc-ip2k.c: Likewise.
- * config/tc-m68hc11.c: Likewise.
- * config/tc-maxq.c: Likewise.
- * config/tc-mcore.c: Likewise.
- * config/tc-mips.c: Likewise.
- * config/tc-msp430.c: Likewise.
- * config/tc-pj.c: Likewise.
- * config/tc-ppc.c: Likewise.
- * config/tc-ppc.h: Likewise.
- * config/tc-s390.c: Likewise.
- * config/tc-sh.c: Likewise.
- * config/tc-sh64.c: Likewise.
- * config/tc-tic4x.c: Likewise.
- * config/tc-tic80.c: Likewise.
- * config/tc-v850.c: Likewise.
- * config/tc-vax.c: Likewise.
- * config/tc-w65.c: Likewise.
- * config/tc-xstormy16.c: Likewise.
- * config/tc-z8k.c: Likewise.
-
-2005-02-22 Catherine Moore <clm at cm00re.com>
-
- * read.c (read_a_source_file): Reinstate TC_EQUAL_IN_INSN test.
- * doc/internals.texi (TC_EQUAL_IN_INSN): Reinstate.
-
-2005-02-22 Eric Christopher <echristo at redhat.com>
-
- * config/tc-mips.c (struct proc): Change isym to
- func_sym. New member func_end_sym.
- (s_mips_ent): Update.
- (s_mips_end): Ditto. Add code to compute function size.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * read.c: Warning fixes.
- * config/obj-elf.c: Likewise.
-
-2005-02-22 Maciej W. Rozycki <macro at mips.com>
-
- * config/tc-mips.c (append_insn): Call dwarf2_emit_insn() before
- emitting insn.
-
-2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-coff.c (obj_coff_section): Replace SEC_SHARED with
- SEC_COFF_SHARED.
-
- * config/tc-tic54x.c (tic54x_bss): Replace SEC_BLOCK with
- SEC_TIC54X_BLOCK.
- (demand_empty_rest_of_line): Likewise.
- (tic54x_sblock): Likewise.
- (tic54x_clink): Replace with SEC_CLINK with SEC_TIC54X_CLINK.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (address_bytes): New function.
- (TC_ADDRESS_BYTES): Default for BSD_ASSEMBLER to address_bytes.
- (potable): Add "dc.a".
- (cons_worker): Handle "dc.a".
- * doc/internals.texi (TC_ADDRESS_BYTES): Document.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * input-file.c (input_file_open): Rearrange to avoid warning.
-
-2005-02-19 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-hppa.h (TC_EQUAL_IN_INSN): Delete.
- * read.c (read_a_source_file): Remove TC_EQUAL_IN_INSN test.
- * doc/internals.texi (TC_EQUAL_IN_INSN): Delete.
-
-2005-02-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (macro_build_ldst_constoffset): Fail on $at
- uses after .set noat.
- (load_address): Likewise.
- (macro): Likewise. Don't try to avoid $at use by sacrificing
- the target register before it is stored, it won't work.
-
-2005-02-17 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (emit_one_bundle): Stop filling a bundle if we
- see an instruction that specifies a template.
-
-2005-02-18 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-openrisc.c (openrisc_relax_frag): Delete unused function.
- * config/tc-sparc.c (sparc_ip): Make op_exp static to silence warnings.
- * config/tc-tic80.c (build_insn): Init insn[1] to silence warning.
-
-2005-02-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * NEWS: Mention "-mhint.b=[ok|warning|error]".
-
- * config/tc-ia64.c (md): Add hint_b.
- (emit_one_bundle): Handle md.hint_b for "hint".
- (md_parse_option): Accepted "-mhint.b=[ok|warning|error]".
- (md_show_usage): Add "-mhint.b=[ok|warning|error]".
- (ia64_init): Set md.hint_b to error.
- (md_assemble): Handle md.hint_b for "hint.b".
-
- * doc/as.texinfo: Add "-mhint.b=[ok|warning|error]".
- * doc/c-ia64.texi: Likewise.
-
-2005-02-17 Alan Modra <amodra at bigpond.net.au>
-
- * tc.h (struct relax_type, relax_typeS): Move from here..
- * as.h: ..to here. Make rlx_forward and rlx_backward an offsetT.
- * ecoff.c (ecoff_new_file): Add appfile param.
- * ecoff.h (ecoff_new_file): Likewise.
- * itbl-lex.h: New file.
- * itbl-lex.l: Include itbl-lex.h.
- * itbl-parse.y: Likewise.
- (insntbl_line, yyparse, yylex): Move to itbl-lex.h.
- * read.c (s_app_file_string): Mark appfile possibly unused.
- * subsegs.c (seg_not_empty_p): Make sec possibly unused.
- * subsegs.h (struct seg_info_trash): Delete.
- (seg_info): Use segment_info_type instead.
- * config/obj-coff.c (struct filename_list): Make filename const char *.
- * config/obj-ecoff.h (obj_app_file): Pass app to ecoff_new_file.
- * config/obj-elf.c (elf_file_symbol): Similarly.
- * config/tc-a29k.c (md_apply_fix3): Make val a valueT. Don't use
- signed right shift.
- * config/tc-arc.c (md_operand): Warning fix.
- * config/tc-arm.c (arm_parse_reloc): Only define when OBJ_ELF.
- (md_begin): Rearrange #if defined OBJ_COFF || defined OBJ_ELF.
- * config/tc-cris.h (TC_IMPLICIT_LCOMM_ALIGNMENT): Use do while.
- * config/tc-frv.c (frv_force_relocation): Warning fix.
- * config/tc-m68k.c (md_parse_option): Delete unused var.
- * config/tc-mcore.c (mylog2): Rename from log2 throughout.
- * config/tc-sparc.c: Likewise.
- (s_common): Warning fix.
- * config/tc-mips.c (append_insn): Use unsigned long long expressions.
- * config/tc-mmix.c (PUSHJSTUB_MAX, PUSHJSTUB_MIN): Define from
- addressT.
- * config/tc-s390.c (s390_insn): Delete test of unsigned >= 0.
- * config/tc-sh.c (sh_cfi_frame_initial_instructions,
- sh_regname_to_dw2regnum): Only define for OBJ_ELF.
- * config/tc-tic4x.c (tic4x_insert_reg): Use ISLOWER.
- (tic4x_do_align): Use TIC_NOP_OPCODE.
- * config/tc-tic4x.h (TIC_NOP_OPCODE): Rename from NOP_OPCODE.
- * config/tc-vax.c: Include netinet/in.h.
- (tc_headers_hook): Formatting.
- * config/tc-xstormy16.c (md_pcrel_from_section): Correct parens.
-
-2005-02-17 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (ia64_parse_name): Don't advance 'name' when
- parsing inN, locN, outN. Set 'idx' to offset register number starts
- at. Don't handle numbers with leading zeroes or beyond 95. Remove
- pointless cast.
-
-2005-02-16 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (load_address): Fix formatting.
- (macro): Don't use AT if .set noat is in effect. Fix formatting.
- Catch macros which are unexpandable without AT. Remove duplicate
- zeroing of used_at.
- (macro2): Remove duplicate zeroing of used_at.
-
-2005-02-16 Alan Modra <amodra at bigpond.net.au>
-
- * dw2gencfi.c (output_cie, output_fde): Use DW_CFA_nop rather
- than zero.
-
-2005-02-15 Nigel Stephens <nigel at mips.com>
- Maciej W. Rozycki <macro at mips.com>
-
- * config/tc-mips.c (reloc_needs_lo_p): Handle
- BFD_RELOC_MIPS16_HI16_S.
- (fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16.
- (append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S
- and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow
- complaints on.
- (mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S,
- BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants.
- Call my_getSmallExpression() to parse percent operators.
- (percent_op_match, mips_percent_op): Separate definitions.
- (mips16_percent_op): Define percent operators for the MIPS16 mode.
- (parse_relocation): Handle the MIPS16 mode using
- mips16_percent_op.
- (md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16,
- BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (md_apply_fix3): Call ia64_gen_real_reloc_type
- instead of explicitly dealing with the translation; exclude
- relocations that are already pcrel, however.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c: Include limits.h (if available).
- (gr_values[0]): Set path to INT_MAX.
- (dot_reg_val): Don't allow changing value of r0. Limit range of
- general registers at r127.
- (specify_resource): Default resource index is -1. Don't set resource
- index (in case IA64_RS_RSE) without setting the specific flag.
- (note_register_values): Check operand is O_constant before tracking
- input value of moves. Add tracking for dep.z with constant inputs.
- (print_dependency): Resource index of specific resource may be zero.
- (check_dependencies): Likewise.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_operands): New local variables reg1, reg2,
- reg_class. Check operands and emit diagnostics for illegal use of
- registers.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (ia64_gen_real_reloc_type): Define and initialize
- new variables type, suffix, and width. Handle
- BFD_RELOC_IA64_DIR(32|64)[LM]SB in FUNC_LT_FPTR_RELATIVE case.
- Handle BFD_RELOC_IA64_DIR64[LM]SB in FUNC_TP_RELATIVE case. Add
- FUNC_DTP_MODULE case. Handle BFD_RELOC_IA64_DIR32[LM]SB in
- FUNC_DTP_RELATIVE case. Return incoming relocation type if
- BFD_RELOC_IA64_IPLT[LM]SB in FUNC_IPLT_RELOC case. Generate warning
- if unable to translate relocation type, using the new variables.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.h (ia64_symbol_chars): Declare.
- (ty_symbol_chars): Define.
- * config/tc-ia64.c (ia64_symbol_chars): Define.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (ia64_parse_name): Only update next character if
- input_line_pointer was advanced.
-
-2005-02-14 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * config/tc-sh.c (md_apply_fix3): Add parentheses around &
- within |.
-
-2005-02-13 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (md_parse_option): Handle -xnone and -xdebugn.
- (md_show_usage): Add -xnone, -xdebugn, and -xdebugx. Relocate default
- indicator.
- (ia64_init): Set md.detect_dv.
- (ia64_start_line): New static variable warned. Warn only once when
- encountering explicit stops in automatic mode.
- * doc/c-ia64.texi: Describe -xnone, -xdebugn, and -xdebugx.
- * NEWS: Mention new default mode.
-
-2005-02-13 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_rot): Add comment that name strings should
- be freed when wiping out previous state. Canonicalize names before
- use. Free name string when detecting redefinition.
- (dot_pred_rel): Call generic expression parser to process arguments.
- Handle O_register case for individual predicates and O_subtract for
- ranges.
- (ia64_parse_name): Canonicalize name before looking it up in dynamic
- register hash.
- (ia64_canonicalize_symbol_name): Strip off all trailing # characters.
- Warn if multiple found, issue error if resulting symbol name has zero
- length.
- (dot_alias): Canonicalize name before use.
-
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (unwind_diagnostic): Return -1 for warning
- and 0 for error.
- (in_procedure): Return -1 for warning.
- (in_prologue): Likewise.
- (in_body): Likewise.
-
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (dot_xdata): Undo the last change.
- (dot_float_cons): Likewise.
- (dot_xstringer): Likewise.
- (dot_xdata_ua): Likewise.
- (dot_float_cons_ua): Likewise.
-
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * NEWS: Mention "-munwind-check=[warning|error]".
-
- * config/tc-ia64.c (md): Add unwind_check.
- (unwind_diagnostic): New.
- (in_procedure): Call unwind_diagnostic when a directive isn't
- in procedure.
- (in_prologue): Call unwind_diagnostic when a directive isn't in
- prologue.
- (in_body): Call unwind_diagnostic when a directive isn't in
- body region.
- (dot_endp): Set md.unwind_check to error before calling
- in_procedure and restore it after. When the name is missing or
- couldn't be found, use the one from the last .proc if
- md.unwind_check isn't error. Warn if md.unwind_check is
- warning.
- (md_parse_option): Handle "-munwind-check=[warning|error]".
- (md_show_usage): Add "-munwind-check=[warning|error]".
- (ia64_init): Set md.unwind_check to warning.
-
- * doc/as.texinfo: Add "-munwind-check=[none|warning|error]".
- * doc/c-ia64.texi: Likewise.
-
-2005-02-11 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.h (LEX_AT): Include LEX_BEGIN_NAME.
- (LEX_QM): Likewise.
- (ia64_parse_name): New third parameter.
- (md_parse_name): Pass third argument.
- * config/tc-ia64.c (pseudo_func): Placeholders use NULL as name.
- (md_operand): Handling of '@'-prefixed symbols moved from here...
- (ia64_parse_name): ...to here.
-
-2005-02-11 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (md): Remove last_groups and group_idx.
- (errata_nop_necessary_p): Remove declaraction and definition.
- (emit_one_bundle): Don't call errata_nop_necessary_p. Don't
- update md.group_idx. Don't reset md.last_groups.
-
-2005-02-11 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_section_name): Handle non-quoted first
- argument.
- (dot_xdata): Free section name after use.
- (dot_float_cons): Likewise.
- (dot_xstringer): Likewise.
- (dot_xdata_ua): Likewise.
- (dot_float_cons_ua): Likewise.
- (md_pseudo_table): Add xdata16 and xdata16.ua.
-
-2005-02-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * doc/all.texi: Add IA64.
- * doc/as.texinfo: Likewise.
-
- * doc/c-ia64.texi: Fix typos.
-
-2005-02-10 Julian Brown <julian at codesourcery.com>
-
- * config/tc-arm.c (do_t_ldmstm): Change BFD_RELOC_NONE to
- BFD_RELOC_UNUSED.
- (do_t_push_pop): Likewise.
- (md_assemble): Likewise.
- (md_apply_fix3): Handle BFD_RELOC_NONE correctly, make
- BFD_RELOC_UNUSED same as previous meaning of BFD_RELOC_NONE.
- (create_unwind_entry): Output dependency on the required personality
- routines.
-
-2005-02-07 Nathan Sidwell <nathan at codesourcery.com>
-
- * as.h (seg_not_empty_p): Return int, not bfd_boolean.
- * subsegs.c (seg_not_empty_p): Likewise.
-
-2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
-
- * config/tc-maxq.c (md_estimate_size_before_relax): Correct the
- relative jump calculation.
- <md_convert_frag) : Likewise.
- <output_disp): Likewise.
-
-2005-02-07 Hans-Peter Nilsson <hp at axis.com>
-
- * write.c (write_object_file): Recognize warning-symbol construct
- and skip object- and target- handling for the second symbol.
-
-2005-02-02 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (dot_pred_rel): Update comment. Handle @-prefixed
- designators along with quoted ones. Free copy of quoted designator
- when done.
-
-2005-02-01 Ben Elliston <bje at au.ibm.com>
-
- * config/atof-ieee.c, config/obj-coff.c, config/obj-elf.c,
- config/obj-ieee.c, config/obj-som.c, config/obj-vms.c,
- config/tc-a29k.c, config/tc-alpha.c, config/tc-arc.c,
- config/tc-arm.c, config/tc-d30v.c, config/tc-dlx.c,
- config/tc-fr30.c, config/tc-h8300.c, config/tc-h8500.c,
- config/tc-i370.c, config/tc-i386.c, config/tc-i960.c,
- config/tc-ia64.c, config/tc-m32r.c, config/tc-m32r.h,
- config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-mips.c,
- config/tc-mn10200.c, config/tc-msp430.c, config/tc-ns32k.c,
- config/tc-openrisc.c, config/tc-or32.c, config/tc-pdp11.c,
- config/tc-pj.c, config/tc-sparc.h, config/tc-tic54x.c,
- config/tc-tic80.c, config/tc-v850.c, config/tc-w65.c,
- config/tc-xtensa.c, config/tc-z8k.c, config/xtensa-relax.c: Remove
- #if 0'd code throughout.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * as.c (parse_args): Bump copyright date reported by --version to
- 2005.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * configure.tgt: Remove obsolete targets m68k-lynxos, sparc-lynxos
- and vax-vms.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (buffer_and_nest): Allow 'from' being NULL; handle anything
- that can end with .endr in that case. Make requiring/permitting
- pseudo-ops without leading dot closer to the logic in read.c serving
- the same purpose.
- (expand_irp): Don't pass a mnemonic to buffer_and_nest as it will be
- ignored.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (do_formals): Adjust to no longer accept empty parameter
- names.
- (define_macro): Adjust to no longer accept empty macro name, garbage
- following the parameters, or macros that were previously defined.
- * read.c (s_bad_end): Declare.
- (potable): Add endm. Handler for endr and endm is s_bad_end.
- (s_bad_end): Rename from s_bad_endr. Adjust to handle both .endm
- and .endr.
- * read.h (s_bad_endr): Remove.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_operands): Parse all specified operands,
- immediately discarding (but counting) those exceeding the maximum
- possible amount. Track whether output and input operand counts ever
- matched, and use this to better indicate which of the operands/
- operand types was wrong; specifically don't default to pointing to
- the first operand.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (unwind): Remove proc_end (now an automatic
- variable in dot_endp). Add body and insn. Make prologue,
- prologue_mask, body, and insn bitfields.
- (fixup_unw_records): Remove spurious new-lines from end of diagnostic
- messages.
- (in_procedure, in_prologue, in_body): New.
- (dot_fframe, dot_vframe, dot_vframesp, dot_vframepsp, dot_save,
- dot_restore, dot_restorereg, dot_restorereg_p, dot_handlerdata,
- dot_unwentry, dot_altrp, dot_savemem, dot_saveg, dot_savef, dot_saveb,
- dot_savegf, dot_spill, dot_spillreg, dot_spillmem, dot_spillreg_p,
- dot_spillmem_p, dot_label_state, dot_copy_state, dot_unwabi,
- dot_personality): Use the appropriate one of the above.
- (dot_proc): Clear unwind.proc_start; set to current location only if
- none of the entry points were valid. Check for non-zero-length entry
- point names. Check that entry points aren't defined, yet. Clear
- unwind.prologue, unwind.body, and unwind.insn.
- (dot_body): Call in_procedure. Check that first directive in procedure
- had no insns emitted before. Set unwind.body.
- (dot_prologue): Call in_procedure. Check that not already in prologue.
- Check that first directive in procedure had no insns emitted before.
- Clear unwind.body.
- (dot_endp): Call in_procedure. Declare proc_end. Check for non-zero-
- length entry point names. Check that entry points became defined.
- (md_assemble): Set unwind.insn once unwind.proc_start is defined.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (emit_one_bundle): Snapshot manual bundling state
- before actually using it. Don't generate an error in manual bundling
- mode when looking at an insn requiring slot 2 but not yet at slot 2.
- Don't generate an error in manual bundling mode when looking at an
- insn required to be last in its group but the required slot hasn't
- been reached, yet. Allow conversion from MII to MI;I for bundle
- consisting of only 2 insns with the stop between them. Suppress
- various meaningless errors resulting from detecting earlier ones.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (parse_operands): Also handle alloc without first
- input being ar.pfs.
-
-2005-01-28 Christian Groessler <chris at groessler.org>
-
- * config/tc-z8k.c (md_assemble): Improve error detection.
-
-2005-01-28 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (ia64_estimate_size_before_relax): Allocate space
- for personality routine pointer only if there is one.
- (ia64_convert_frag): Likewise.
- (generate_unwind_image): Likewise.
-
-2005-01-27 Christian Groessler <chris at groessler.org>
-
- * config/tc-z8k.c (INSERT): Remove, not used anywhere.
- (md_apply_fix3): Make relative branches out of range an error
- instead of a warning. Display correct line number for out of
- range branches/calls/memory accesses.
-
-2005-01-27 Nathan Sidwell <nathan at codesourcery.com>
-
- * dwarf2dbg.c (dwarf2_finish): Correct logic for determining when
- to emit .debug_line and other debug sections.
- * as.h (seg_not_empty_p): Declare.
- * subsegs.c (seg_not_empty_p): New predicate.
-
-2005-01-27 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4 change.
-
-2005-01-27 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (emit_one_bundle): Change "?imbf??" to "?ibmfxx".
-
-2005-01-27 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-ia64.c (emit_one_bundle): Add late resolution of move
- to/from application registers dynamic insns.
- (md_assemble): Defer resolution of move to/from application registers
- dynamic insns when they can be issued on either the I- or M-units.
-
-2005-01-25 Alexandre Oliva <aoliva at redhat.com>
-
- * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
- 2004-12-10 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
- 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
- * cgen.c (gas_cgen_parse_operand): Handle
- CGEN_PARSE_OPERAND_SYMBOLIC.
- * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
- (frv_force_relocation): Likewise. Fix handling of PIC
- relocations.
- (md_apply_fix3): Likewise.
-
-2005-01-21 Ben Elliston <bje at au.ibm.com>
-
- * as.h: Remove #if 0'd code.
- * atof-generic.c (atof_generic): Likewise.
- * ecoff.c (ecoff_directive_frame): Likewise.
- * frags.h (FRAG_APPEND_1_CHAR): Likewise.
- * itbl-ops.c (itbl_add_reg): Likewise.
- * listing.c (calc_hex): Likewise.
- * read.c (MASK_CHAR): Likewise.
- * subsegs.c (subsegs_print_statistics): Likewise.
- * symbols.c (indent): Likewise.
- * write.c (write_relocs): Likewise.
- (write_object_file): Likewise.
- (relax_frag): Likewise.
-
-2005-01-20 Nick Clifton <nickc at redhat.com>
-
- * as.c (std_longopts): Add an entry for "--a" in order to prevent
- getopt_long_only() from considering -a as an abbreviation for
- --alternate.
- (parse_args): Fix the parsing of -a=<file>.
-
-2005-01-20 Alan Modra <amodra at bigpond.net.au>
-
- PR gas/684
- * read.c (s_incbin): Adjust default count for skip. Check validity
- of count and skip rigorously.
-
-2005-01-19 Fred Fish <fnf at specifixinc.com>
-
- * config/tc-mips.c (dummy_opcode): Add init for new struct member.
-
-2005-01-19 Richard Sandiford <rsandifo at redhat.com>
-
- * read.c (convert_to_bignum): New function, split out from...
- (emit_expr): ...here. Handle the case where X_add_number is
- positive and the input value is negative.
- (output_big_sleb128): Fix setting of continuation bit. Check whether
- the final byte needs to be sign-extended. Fix size-shrinking loop.
- (emit_leb128_expr): When generating a signed leb128, see whether the
- sign of an O_constant's X_add_number matches the sign of the input
- value. Use a bignum if not.
-
-2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
-
- * tc-sh.c (md_begin,md_parse_option): Change arch_sh1_up to
- arch_sh_up in order to match the external name and make the
- testsuite's job easier.
-
-2005-01-14 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 659
- * config/tc-i386.c (i386_scale): Disallow 0 scale.
-
-2005-01-12 Nick Clifton <nickc at redhat.com>
-
- * config/tc-iq2000.c (s_iq2000_set): Fix thinko parsing
- ignored_arguments array.
-
-2005-01-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * write.c (write_object_file): Disallow a symbol equated to
- common symbol.
-
-2005-01-10 Inderpreet Singh <inderpreetb at noida.hcltech.com>
-
- * tc-maxq.c: Replace constants 10 and 20 with bfd_mach_maxq10 and
- bfd_mach_maxq20.
- (md_pseudo_table): Add new pseudo ops for maxq10 and maxq20.
- (maxq_target): New function: Set the machine type.
-
-2005-01-06 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (FPU_DEFAULT): Define for TE_VXWORKS.
- (md_begin): Handle TE_VXWORKS for FP defaults.
- (md_apply_fix3): Correct rela offsets.
- (elf32_arm_target_format): Add VxWorks targets.
-
-2005-01-06 Paul Brook <paul at codesourcery.com>
-
- * configure.tgt: Set em=vxworks for *-*-vxworks.
- * config/te-vxworks.h: New File.
-
-2005-01-06 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (arm_cpus): Correct arch field for arm1026ej-s.
-
-2005-01-04 Dmitry Diky <diwil at spec.ru>
-
- * config/tc-msp430.c (md_apply_fix3): Fix offset calculation for
- global label.
-
-2005-01-03 David Mosberger <davidm at hpl.hp.com>
-
- * config/tc-ia64.c (md): Add member "loc_directive_seen".
- (dot_loc): New function.
- (md_pseudo_table): Add entry to map .loc to dot_loc().
- (emit_one_bundle): Only call dwarf2_gen_line_info() if we have
- seen a .loc directive or we're generating DWARF2 debug info for
- assembly source.
-
-2004-12-29 Alan Modra <amodra at bigpond.net.au>
-
- PR gas/619
- * read.c (s_comm_internal): Don't zero end of name until size
- expression has been parsed.
-
-2004-12-25 Marek Michalkiewicz <marekm at amelek.gda.pl>
-
- * config/tc-avr.c (mcu_types): Move attiny{13,2313} from avr4 to avr2.
-
-2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c: Support 'bcop' relaxation (dealt as in 'cmp&branch'
- case).
-
-2004-12-22 Ian Lance Taylor <ian at airs.com>
-
- * configure.tgt: New.
- * configure.in: Move setting of cpu_type, fmt, etc., to
- configure.tgt.
- * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
- $(srcdir)/configure.tgt.
- * configure, Makefile.in: Rebuild.
-
-2004-12-22 Klaus Rudolph <lts-rudolph at gmx.de>
-
- * config/tc-avr.c: Add support for the new R_AVR_LDI, R_AVR_6 and
- R_AVR_6_ADIW relocs for the LDI, ADIW/SBIW and LDD/STD
- instructions.
- (avr_offset_expression): New function to parse offsets for LDI
- instructions.
- (avr_operand): Use it.
- (md_apply_fix3): Generate the relocs.
-
-2004-12-16 Andrew Stubbs <andrew.stubbs at st.com>
-
- * config/tc-sh64.c (shmedia_md_apply_fix3): Add missing
- BFD_RELOC_SH_IMMS10BY8 relocation.
-
- * config/tc-sh64.c (shmedia_build_Mytes): Emit an error message rather
- than just ignoring bad code.
-
-2004-12-16 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-v850.c (handle_lo16): New function.
- (v850_reloc_prefix): Use it to check lo().
- (md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET.
-
-2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
-
- * configure.in: Add s390x-ibm-tpf support.
- * configure: Regenerate.
-
-2004-12-15 Jan Beulich <jbeulich at novell.com>
-
- * config/obj-elf.c (obj_elf_change_section): Only set type and
- attributes on new sections. Emit warning when type of re-declared
- section doesn't match.
-
-2004-12-15 Jan Beulich <jbeulich at novell.com>
-
- * dw2gencfi.c (dot.cfi.startproc): Clear cur_cfa_offset so
- '.cfi_startproc simple' doesn't inherit the old value.
-
-2004-12-15 Jan Beulich <jbeulich at novell.com>
-
- * dw2gencfi.c (output_cfi_insn): Adjust DW_CFA_def_cfa_sf generation
- to emit a signed and factored offset. Adjust DW_CFA_def_cfa_offset_sf
- generation to emit a factored offset.
-
-2004-12-10 Ian Lance Taylor <ian at wasabisystems.com>
-
- * config/tc-mips.c (macro) [M_LA_AB]: Give an error for a offset
- which is too large in the case of NO_PIC without 64-bit
- addresses.
-
- * config/tc-mips.c (mips_in_shared): New static variable.
- (macro_build_lui): Permit "_gp" if !mips_in_shared.
- (md_longopts): Add -mshared and -mno-shared.
- (md_parse_option): Handle OPTION_MSHARED and OPTION_MNO_SHARED.
- (s_cpload): Implement !mips_in_shared case.
- (s_cpsetup): Likewise.
- * doc/c-mips.texi (MIPS Opts): Document -mno-shared.
- * NEWS: Mention -mno-shared.
-
-2004-12-09 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (s_arm_unwind_fnend): Use R_ARM_PREL31 relocation
- for function start.
-
-2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
-
- * config/tc-mips.c (append_insn): If we emit a nop during a relax
- sequence, increase the size of the sequence.
-
- * config/tc-mips.c (mips_cpu_info_table): Change "9000" entry to
- use CPU_RM9000.
-
-2004-12-07 Ben Elliston <bje at gnu.org>
-
- * read.c (s_align): Use an align_limit temporary to allay a GCC
- signed/unsigned comparison warning.
-
-2004-12-01 Mark Mitchell <mark at codesourcery.com>
-
- * Makefile.am (TARG_ENV_HFILES): Add te-armlinuxeabi.h.
- * configure.in: Use it for arm*-*-linux-gnueabi*.
- * config/tc-arm.c: Allow emulation file to set FPU_DEFAULT.
- * config/te-armlinuxeabi.h: New file.
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
- * configure: Likewise.
- * doc/Makefile.in: Regenerated.
-
-2004-12-02 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_switch_section_emit_state): Use subseg_set.
- (xtensa_restore_emit_state): Likewise.
-
-2004-12-02 Alan Modra <amodra at bigpond.net.au>
-
- * read.c (ALIGN_LIMIT): Define, increasing limit for BFD_ASSEMBLER.
- (s_align): Use it.
-
-2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
-
- * Makefile.am: Change LOCALEDIR to $(datadir)/share.
- * Makefile.in: Regenerate.
-
-2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c: Major code cleanup. Remove unused variables and
- functions, give functions a meaningful name, add comments.
- (check_range): New function - Replace operand size calculation
- with range checking.
- (assemble_insn): Update Algorithm, improve error issuing.
- (enum op_err): New.
- (process_label_constant): Bug fix regarding COP_BRANCH_INS relocation
- handling.
-
-2004-11-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (md_pcrel_from_section): Fixed a pcrel relocte
- miss between different section in the same module.
- (tc_gen_reloc): Likewise.
-
-2004-11-25 Theodore A. Roth <troth at openavr.org>
-
- * gas/config/tc-avr.c (mcu_types): Add support for atmega165,
- atmega325, atmega3250, atmega645 and atmega6450.
-
-2004-11-25 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (optimize_imm): Adjust immediates to only those
- permissible for the selected instruction suffix.
- (process_suffix): For DefaultSize instructions, suppressing the
- guessing of a 'q' suffix if the instruction doesn't support it is
- pointless, because only an 'l' suffix can be guessed in this place.
-
-2004-11-24 Nick Clifton <nickc at redhat.com>
-
- * config/tc-iq2000.c: Remove support for IQ10 processor.
- Convert to ISO C90 formatting.
- * config/tc-iq2000.h: Likewise.
-
-2004-11-23 Nick Clifton <nickc at redhat.com>
-
- * config/tc-mn10300.c (md_relax_table): More fixes to the offsets
- in this table. They should be correct now.
-
-2004-11-23 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
- indicate the MMX extensions added by both SSE and 3DNow!A.
- (Cpu3dnowA): Declare.
- (CpuUnknownFlags): Update.
- * config/tc-i386.c (cpu_sub_arch_name): Declare.
- (cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
- neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
- 3DNow!. Athlon additionally implies 3DNow!A. Several new
- entries (those starting with a dot are for sub-arch specification).
- (set_cpu_arch): Handle sub-arch specifications.
- (parse_insn): Distinguish between instructions not supported because
- of insufficient CPU features and because of 64-bit mode.
- * doc/c-i386.texi: Describe enhanced .arch directive.
-
-2004-11-22 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xg_add_opcode_fix): Set fx_no_overflow.
-
-2004-11-22 Bob Wilson <bob.wilson at acm.org>
-
- * dwarf2dbg.c (dwarf2_finish): Don't write a .debug_line section
- without a corresponding .debug_info section.
-
-2004-11-22 Hans-Peter Nilsson <hp at axis.com>
-
- * read.c (potable): Add "error" and "warning".
- (s_errwarn): New function.
- * read.h (s_errwarn): Declare.
- * doc/as.texinfo (Error, Warning): Document .error and .warning.
-
-2004-11-22 Nick Clifton <nickc at redhat.com>
-
- * config/tc-tic54x.c (tic54x_adjust_symtab): Adjust call to
- c_dot_file_symbol.
-
-2004-11-19 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes,
- struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
-
-2004-11-19 Alan Modra <amodra at bigpond.net.au>
-
- * config/obj-coff.c (c_dot_file_symbol): Add "app" param.
- (coff_adjust_symtab): Adjust call.
- (crawl_symbols): Likewise.
- * config/obj-coff.h (c_dot_file_symbol): Add "app" param.
- (obj_app_file): Adjust.
-
-2004-11-18 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
-
- * configure.in: Enable bfd_assember for the MAXQ port.
- * configure: Regenerate.
-
-2004-11-12 Bob Wilson <bob.wilson at acm.org>
- Sterling Augustine <sterling at tensilica.com>
-
- * config/tc-xtensa.c (finish_vinsn): Clear pending instruction if
- there is a conflict.
- (check_t1_t2_reads_and_writes): Check for both reads and writes to
- interfaces that are related as determined by xtensa_interface_class_id.
-
-2004-11-12 Nick Clifton <nickc at redhat.com>
-
- * config/tc-mn10300.c (md_relax_table): Fix off by one negative
- offsets for conditional branches.
-
-2004-11-11 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (MAX_IMMED6): Change value to 65.
-
-2004-11-10 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (update_next_frag_state): Always add a NOP if
- relaxing at the end of a loop. Don't mark frags as UNREACHABLE or
- MAYBE_UNREACHABLE.
- (relax_frag_immed): Update call to update_next_frag_state.
-
-2004-11-10 Alan Modra <amodra at bigpond.net.au>
-
- * obj.h (struct format_ops <app_file>): Add int param.
- * read.h (s_app_file_string): Likewise.
- * read.c (s_app_file_string): Likewise.
- (s_app_file): Adjust s_app_file_string call.
- * config/tc-mips.c (s_mips_file): Likewise.
- * config/obj-coff.h (obj_app_file): Add app param.
- * config/obj-ecoff.h (obj_app_file): Likewise.
- * config/obj-multi.h (obj_app_file): Likewise.
- * config/obj-elf.h (elf_file_symbol): Likewise.
- * config/obj-elf.c (elf_file_symbol): Only emit one file symbol
- if called for # preprocessor lines.
-
-2004-11-08 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 528
- * symbols.c (resolve_symbol_value): Convert weak symbols only
- for Windows PECOFF.
- (symbol_equated_reloc_p): Don't equate weaks when relocating
- only for Windows PECOFF.
-
-2004-11-08 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c (print_insn): Check and set insn_addr.
- * config/tc-crx.h (md_frag_check): Define.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * configure.in: Add support for new target maxq-coff.
- * configure: Regenerate.
- * NEWS: Mention new support.
- * config/tc-maxq.c: New file.
- * config/tc-maxq.h: New file.
- * config/obj-coff.h: Add support for maxq-coff.
-
-2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * symbols.c (any_external_name): Define.
- (resolve_symbol_value): Convert weak symbols.
- (S_SET_EXTERNAL): Support any_external_name.
- (S_SET_NAME): Qualify parameter const.
- (symbol_equated_reloc_p): Equate to weaks when relocating.
- * symbols.h (S_SET_NAME): Qualfiy parameter const.
- * tc.h (any_external_name): Declare.
- * config/obj-coff.c ("coff/pe.h"): Include for BFD
- assemblers also.
- (weak_is_altname): Declare and define.
- (weak_name2altname): Same.
- (weak_altname2name): Same.
- (weak_uniquify): Same.
- (weak_altprefix): Define.
- (obj_coff_weak): Change .weak syntax and handling.
- (coff_frob_symbol): Fix PE weak symbol alternates.
- * config/obj-coff.h (USE_UNIQUE): Define.
- * config/tc-i386.c (md_apply_fix3): Assume weak symbols
- are in another segment.
- (tc_gen_reloc): Remove broken addend hack.
- doc/as.texinfo: Update.
-
-2004-11-05 Sterling Augustine <sterling at tensilica.com>
-
- * config/tc-xtensa.c (total_frag_text_expansion): New.
- (md_estimate_size_before_relax): Use it.
- (find_address_of_next_align_frag): Likewise.
-
-2004-11-05 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c: Rename argument types.
- (processing_arg_number): Rename to 'cur_arg_num'.
- (get_number_of_bits): Rename to 'set_operand_size'.
- (get_operandtype): Rename to 'parse_operand', totally rewrite.
- (set_cons_rparams): Rename to 'set_operand', totally rewrite.
- (set_indexmode_parameters): Remove function, integrate its code into
- 'set_operand'.
- (set_operand_size): Get rid of 'Operand Number' function parameter -
- use global variable 'cur_arg_num' instead.
- Use a local 'argument' pointer to reference the current argument.
- (parse_operand): Likewise.
- (set_operand): Likewise.
- (process_label_constant): Likewise.
-
-2004-11-04 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c: Remove XTENSA_SECTION_RENAME ifdefs.
- (add_section_rename): Delete. Inlined into...
- (build_section_rename): ...here. Use xstrdup instead of strdup.
- (xtensa_section_rename): Drop "const" from argument and return types.
- (md_show_usage): Indent to match show_usage().
- * config/tc-xtensa.h: Remove XTENSA_SECTION_RENAME ifdefs.
- (tc_canonicalize_section_name): Define.
- (md_elf_section_rename): Remove unused macro.
- * doc/as.texinfo (Overview): Document Xtensa --rename-section option.
- * doc/c-xtensa.texi (Xtensa Options): Likewise.
- (Frame Directive): Delete.
-
-2004-11-04 Daniel Jacobowitz <dan at debian.org>
-
- * configure.in: Remove arm-*-oabi and thumb-*-oabi.
- * config/tc-arm.c (target_oabi): Delete.
- (md_apply_fix3, elf32_arm_target_format): Remove target_oabi checks.
- (arm_opts): Remove moabi.
- * doc/as.texinfo (Overview): Remove documentation of -moabi.
- * doc/c-arm.texi (ARM Options): Likewise.
- * configure: Regenerated.
-
-2004-11-04 Hans-Peter Nilsson <hp at axis.com>
-
- * configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED
- DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like
- cris-*-linux-gnu* and crisv32-*-* like cris-*-*.
- * configure: Regenerate.
- * config/tc-cris.c (enum cris_archs): New.
- (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg)
- (cris_insn_ver_valid_for_arch): New functions.
- (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10.
- (cris_arch): New variable.
- (md_pseudo_table): New pseudo .arch.
- (err_for_dangerous_mul_placement): Initialize according to
- DEFAULT_CRIS_ARCH.
- (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH.
- All users changed.
- (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON)
- (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32)
- (BRANCH_WF_V32, BRANCH_WB_V32): New.
- (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after
- use in md_cris_relax_table.
- (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32,
- STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC.
- Update and improve head comment.
- (OPTION_PIC): Define in terms of previous option, OPTION_US.
- (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar.
- (OPTION_ARCH): New.
- (md_longopts): New option --march=...
- (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New
- macros.
- (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH.
- (HANDLE_RELAXABLE): New macro.
- (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common
- cases. Check for weak symbols and assume not relaxable. Handle
- STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON,
- STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not
- fragP->fr_symbol.
- (md_convert_frag): Handle STATE_COND_BRANCH_V32,
- STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC.
- (cris_create_short_jump): Adjust for CRISv32.
- (cris_relax_frag): Handle new states.
- (md_create_long_jump): Ditto. Emit error for common_v10_v32.
- (md_begin): Define symbols "..asm.arch.cris.v32",
- "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and
- "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch
- when entering opcode table entry points.
- (md_assemble): Adjust branch handling for CRISv32. Handle LAPC
- relaxation. In fix_new_exp call for main insn, pass 1 for pcrel
- parameter for 8, 16 and 32-bit pc-relative insns and LAPC.
- (cris_process_instruction): Initialize out_insnp->insn_type to
- CRIS_INSN_NONE, not CRIS_INSN_NORMAL.
- <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New
- cases.
- <case 'm'>: Check that modified_char == '.'.
- <invalid operands>: Consume the rest of the line.
- When operands don't match, skip over subsequent insns with
- non-matching version specifier but same mnemonic.
- <immediate constant, case SIZE_SPEC_REG>: Immediate operands for
- special registers in CRISv32 are always 32 bit long.
- <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>:
- New cases.
- (get_gen_reg): Only recognize "PC" when followed by "+]" for v32
- and compatible. Recognize "ACR" for v32, unless followed by "+".
- (get_spec_reg): Consider cris_arch when looking up register.
- (get_autoinc_prefix_or_indir_op): Don't recognize assignment for
- v32 or compatible.
- (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'.
- (cris_get_expression): Restore input_line_pointer if failing "early".
- (get_flags): Consider cris_arch and recognize flags accordingly.
- (branch_disp): Adjust for CRISv32.
- (gen_cond_branch_32): Similar. Emit error for common_v10_v32.
- (cris_number_to_imm): Use as_bad_where, not as_bad. Remove
- related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be
- resolved. Don't enter zeros in object file for
- BFD_RELOC_32_PCREL.
- <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16>
- <case BFD_RELOC_CRIS_SIGNED_8>: New case.
- (md_parse_option): Break out "return 1".
- <OPTION_ARCH> New case.
- (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET>
- <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8>
- <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16>
- <case BFD_RELOC_32_PCREL>: New cases.
- Addends for non-zero fx_pcrel are too in fx_offset.
- (md_show_usage): Show --march=<arch>.
- (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET.
- (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too.
- (s_syntax) <struct syntaxes>: Properly constify member operand.
- * config/tc-cris.h (TARGET_MACH): Define.
- (cris_mach): Declare.
- * doc/as.texinfo (Overview) <CRIS>: Add --march=...
- * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols.
- (CRIS-Opts): Document --march=...
- (CRIS-Pseudos): Document .arch.
-
-2004-11-04 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
- intel syntax and no register prefix, allow $ in symbol names when
- intel syntax.
- (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
- (intel_float_operand): Add fourth return value indicating math control
- operations. Make classification more precise.
- (md_assemble): Complain if memory operand of mov[sz]x has no size
- specified.
- (parse_insn): Translate word operands to floating point instructions
- operating on integers as well as control instructions to short ones
- as expected by AT&T syntax. Translate 'd' suffix to short one only for
- floating point instructions operating on non-integer operands.
- (match_template): Remove fldcw special case. Adjust q-suffix handling
- to permit it on fild/fistp/fisttp in AT&T mode.
- (process_suffix): Don't guess DefaultSize insns' suffix from
- stackop_size for certain floating point control instructions. Guess
- suffix for branch and [ls][gi]dt based on flag_code. Split error
- messages for Intel and AT&T syntax, and make the condition more strict
- for the former. Adjust suppressing of generation of operand size
- overrides.
- (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
- OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
- more error checking.
- * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
- SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.
-
-2004-11-03 Hans-Peter Nilsson <hp at axis.com>
-
- * symbols.c (colon) [!WORKING_DOT_WORD]: Don't declare
- md_short_jump_size, md_long_jump_size.
- * write.c [!WORKING_DOT_WORD]: Ditto.
- * tc.h [!WORKING_DOT_WORD]: Declare them here. Drop const
- qualifier.
- * config/tc-cris.h (md_short_jump_size, md_long_jump_size): Don't
- declare.
- * config/tc-cris.c (md_short_jump_size, md_long_jump_size): Drop
- const qualifier in these definitions.
- * config/tc-i370.c, config/tc-m68k.c, config/tc-pdp11.c,
- config/tc-s390.c, config/tc-tahoe.c, config/tc-vax.c: Ditto.
-
-2004-11-02 Nick Clifton <nickc at redhat.com>
-
- * dwarf2dbg.c (dwarf2_finish): Check for the existence of a file
- table before deciding to produce a .debug_line section to match up
- with a user provided .debug_info section.
-
-2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c (getreg_image): Bug fix, a return value was
- mistakenly omitted from CRX_C_REGTYPE and CRX_CS_REGTYPE cases.
-
-2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c: Remove global variable 'post_inc_mode'.
- (get_flags): New function.
- (get_number_of_bits): Edit comments, update numeric values to
- supported sizes.
- (process_label_constant): Don't support the colon
- format (SYMBOL:[s|m|l]).
- (set_cons_rparams): Support argument type 'arg_rbase'.
- (get_operandtype): Bug fix in 'rbase' operand type parsing.
- (handle_LoadStor): Bug fix, first handle post-increment mode.
- (getreg_image): Remove redundant code, update according to latest
- CRX spec.
- (print_constant): Bug fix relate to 3-word instructions.
- (assemble_insn): Bug fix, when matching instructions, verify also
- instruction type (not only mnemonic).
- Add various error checking.
- (preprocess_reglist): Support HI/LO and user registers.
-
-2004-10-25 David Mosberger-Tang <davidm at hpl.hp.com>
-
- * config/tc-ia64.c (fixup_unw_records): Don't let the "t" value
- in an epilogue directive go negative.
-
-2004-10-25 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 474
- * config/tc-ia64.c (emit_one_bundle): Decrement md.num_slots_in_use
- after reporting template error during manual bundling. Reported
- by Michael Dupont, michaelx.dupont at intel.com.
-
-2004-10-25 Daniel Jacobowitz <dan at debian.org>
-
- * Makefile.am: Run dep-am.
- * aclocal.m4: Regenerate with automake 1.9.2.
- * Makefile.in: Regenerate with automake 1.9.2.
- * doc/Makefile.in: Likewise.
-
- * config/tc-arm.c: Include "dw2gencfi.h".
- (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions):
- New functions.
- * config/tc-arm.h (TARGET_USE_CFIPOP, DWARF2_DEFAULT_RETURN_COLUMN)
- (DWARF2_CIE_DATA_ALIGNMENT, tc_regname_to_dw2regnum)
- (tc_cfi_frame_initial_instructions): Define.
- (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions):
- Add prototypes.
-
-2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c (assemble_insn): Check unsigned immediate
- operands validity.
- Update coprocessor id to be unsigned immediate.
-
-2004-10-18 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * config/tc-i386.c (O_secrel): Delete.
- (tc_pe_dwarf2_emit_offset): New function.
- * config/tc-i386.h (O_secrel): Define as O_md1.
- (TC_DWARF2_EMIT_OFFSET): Define.
-
-2004-10-18 Nick Clifton <nickc at redhat.com>
-
- * config/tc-xstormy16.c (xstormy16_cons_fix_new): Accept and
- ignore @fptr() directives for 4-byte fixups.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am"
- * Makefile.in: Regenerate.
-
-2004-10-14 Bob Wilson <bob.wilson at acm.org>
-
- * doc/c-xtensa.texi (Xtensa Options, Absolute Literals Directive):
- Remove comments about placement of literal pools.
- (Literal Directive): Update description of literal placement.
- (Literal Prefix Directive): Remove statement that this does not apply
- to absolute-mode literals. Describe new section naming scheme.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_frequency_pseudo): Use set_subseg_freq.
- (is_entry_opcode, is_movi_opcode, is_the_loop_opcode, is_jx_opcode,
- is_windowed_return_opcode): Delete.
- (xtensa_frob_label): Use get_subseg_target_freq.
- (md_assemble): Inline call to is_entry_opcode.
- (xtensa_handle_align): Inline call to get_frag_is_literal.
- (relaxation_requirements): Inline call to is_jx_opcode.
- (emit_single_op): Inline call to is_movi_opcode.
- (xg_assemble_vliw_tokens): Inline calls to get_frag_is_insn,
- get_frag_is_no_transform, is_entry_opcode, and
- set_frag_is_specific_opcode. Use get_subseg_total_freq.
- (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags,
- xtensa_fix_close_loop_end_frags, relax_frag_immed, convert_frag_immed):
- Inline calls to get_frag_is_no_transform.
- (next_instrs_are_b_retw): Inline call to is_windowed_return_opcode.
- (xtensa_fix_short_loop_frags): Inline calls to is_the_loop_opcode and
- get_frag_is_no_transform.
- (convert_frag_immed_finish_loop): Inline calls to get_expression_value
- and set_frag_is_no_transform.
- (get_expression_value): Delete.
- (subseg_map struct): Rename cur_total_freq to total_freq. Rename
- cur_target_freq to target_freq.
- (get_subseg_info): Split out code to create a new map entry into ...
- (add_subseg_info): ... this new function.
- (get_last_insn_flags): Check if get_subseg_info succeeded.
- (set_last_insn_flags): Call add_subseg_info if needed.
- (get_subseg_total_freq, get_subseg_target_freq, set_subseg_freq): New.
- (xtensa_reorder_segments): Compute last_sec while counting sections.
- Remove call to get_last_sec.
- (get_last_sec): Delete.
- (cache_literal_section): Inline call to retrieve_literal_seg and its
- callees, seg_present and add_seg_list.
- (retrieve_literal_seg, seg_present, add_seg_list): Delete.
- (get_frag_is_insn, get_frag_is_no_transform,
- set_frag_is_specific_opcode, set_frag_is_no_transform): Delete.
- * config/tc-xtensa.h (MAX_SLOTS): Reduce from 31 to 15.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c: Use ISO C90 formatting.
- * config/tc-xtensa.h: Likewise.
- * config/xtensa-istack.h: Likewise.
- * config/xtensa-relax.c: Likewise.
- * config/xtensa-relax.h: Likewise.
-
-2004-10-12 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (md_begin): Change EF_ARM_EABI_VER3 to
- EF_ARM_EABI_VER4.
- (arm_eabis): Ditto.
- * doc/c-arm.texi: Document that we actually support -meabi=4, not
- -meabi=3.
-
-2004-10-08 Bob Wilson <bob.wilson at acm.org>
-
- * doc/as.texinfo (VTableEntry, VTableInherit): Add "directive" to index
- entries.
- (Acknowledgements): Use "GAS" instead of AS variable.
-
-2004-10-08 Daniel Jacobowitz <dan at debian.org>
-
- * config/tc-i386.c: Include "elf/x86-64.h".
- (i386_elf_section_type): New function.
- * config/tc-i386.h (md_elf_section_type): Define.
- (i386_elf_section_type): New prototype.
-
-2004-10-08 Linus Nielsen Feltzing <linus at haxx.se>
-
- * config/m68k-parse.h (enum m68k_register): New control register,
- MBAR2 (for MCF5249)
- * config/tc-m68k.c: Correct control register set for MCF5249.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
- Sterling Augustine <sterling at tensilica.com>
-
- * config/tc-xtensa.c (absolute_literals_supported): New global flag.
- (UNREACHABLE_MAX_WIDTH): Define.
- (XTENSA_FETCH_WIDTH): Delete.
- (cur_vinsn, xtensa_fetch_width, xt_saved_debug_type, past_xtensa_end,
- prefer_const16, prefer_l32r): New global variables.
- (LIT4_SECTION_NAME): Define.
- (lit4_state struct): Add lit4_seg_name and lit4_seg fields.
- (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
- (frag_flags struct): New.
- (xtensa_block_info struct): Move from tc-xtensa.h. Add flags field.
- (subseg_map struct): Add cur_total_freq and cur_target_freq fields.
- (bitfield, bit_is_set, set_bit, clear_bit): Define.
- (MAX_FORMATS): Define.
- (op_placement_info struct, op_placement_table): New.
- (O_pltrel, O_hi16, O_lo16): Define.
- (directiveE enum): Rename directive_generics to directive_transform.
- Delete directive_relax. Add directive_schedule,
- directive_absolute_literals, and directive_last_directive.
- (directive_info): Rename "generics" to "transform". Delete "relax".
- Add "schedule" and "absolute-literals".
- (directive_state): Adjust entries to match changes in directive_info.
- (xtensa_relax_statesE, RELAX_IMMED_MAXSTEPS): Move to tc-xtensa.h.
- (xtensa_const16_opcode, xtensa_movi_opcode, xtensa_movi_n_opcode,
- xtensa_l32r_opcode, xtensa_nop_opcode, xtensa_rsr_lcount_opcode): New.
- (xtensa_j_opcode, xtensa_rsr_opcode): Delete.
- (align_only_targets, software_a0_b_retw_interlock,
- software_avoid_b_j_loop_end, maybe_has_b_j_loop_end,
- software_avoid_short_loop, software_avoid_close_loop_end,
- software_avoid_all_short_loops, specific_opcode): Delete.
- (warn_unaligned_branch_targets): New.
- (workaround_a0_b_retw, workaround_b_j_loop_end, workaround_short_loop,
- workaround_close_loop_end, workaround_all_short_loops): Default FALSE.
- (option_[no_]link_relax, option_[no_]transform,
- option_[no_]absolute_literals, option_warn_unaligned_targets,
- option_prefer_l32r, option_prefer_const16, option_target_hardware):
- New enum values.
- (option_[no_]align_only_targets, option_literal_section_name,
- option_text_section_name, option_data_section_name,
- option_bss_section_name, option_eb, option_el): Delete.
- (md_longopts): Add entries for: [no-]transform, [no-]absolute-literals,
- warn-unaligned-targets, prefer-l32r, prefer-const16, [no-]link-relax,
- and target-hardware. Delete entries for [no-]target-align-only,
- literal-section-name, text-section-name, data-section-name, and
- bss-section-name.
- (md_parse_option): Handle new options and remove old ones. Accept but
- ignore [no-]density options. Warn for [no-]generics and [no-]relax
- and treat them as [no-]transform.
- (md_show_usage): Add new options and remove old ones.
- (xtensa_setup_hw_workarounds): New.
- (md_pseudo_table): Change "word" entry to use xtensa_elf_cons. Add
- "long", "short", "loc" and "frequency" entries.
- (use_generics): Rename to ...
- (use_transform): ... this function. Add past_xtensa_end check.
- (use_longcalls): Add past_xtensa_end check.
- (code_density_available, can_relax): Delete.
- (do_align_targets): New.
- (get_directive): Accept dashes in directive names. Warn about
- [no-]generics and [no-]relax directives and treat them as
- [no-]transform.
- (xtensa_begin_directive): Call md_flush_pending_output only for some
- directives. Check for directives inside instruction bundles. Warn
- about deprecated ".begin literal" usage. Warn and ignore [no-]density
- directives. Handle new directives. Check generating_literals flag
- for literal_prefix.
- (xtensa_end_directive): Check for directives inside instruction
- bundles. Warn and ignore [no-]density directives. Handle new
- directives. Call xtensa_set_frag_assembly_state.
- (xtensa_loc_directive_seen, xtensa_dwarf2_directive_loc,
- xtensa_dwarf2_emit_insn): New.
- (xtensa_literal_position): Call md_flush_pending_output. Do not check
- use_literal_section flag.
- (xtensa_literal_pseudo): Call md_flush_pending_output. Handle absolute
- literals. Use xtensa_elf_cons to parse the expression.
- (xtensa_literal_prefix): Do not check use_literal_section. Support
- ".lit4" sections for absolute literals. Change prefix convention to
- replace ".text" (or ".t" in a linkonce section). No need to call
- subseg_set.
- (xtensa_frequency_pseudo, xtensa_elf_cons, xtensa_elf_suffix): New.
- (expression_end): Handle closing braces and colons.
- (PLT_SUFFIX, plt_suffix): Delete.
- (expression_maybe_register): Use new xtensa-isa.h functions. Use
- xtensa_elf_suffix instead of checking for plt suffix, and handle O_lo16
- and O_hi16 expressions as well.
- (tokenize_arguments): Handle closing braces and colons.
- (parse_arguments): Use new xtensa-isa.h functions. Handle "invisible"
- operands and paired register syntax.
- (get_invisible_operands): New.
- (xg_translate_sysreg_op): Handle new Xtensa LX RSR/WSR/XSR syntax. Use
- new xtensa-isa.h functions.
- (xtensa_translate_old_userreg_ops, xtensa_translate_zero_immed): New.
- (xg_translate_idioms): Check if inside bundle. Use use_transform.
- Handle new Xtensa LX RSR/WSR/XSR syntax. Remove code to widen density
- instructions. Use xtensa_translate_zero_immed.
- (operand_is_immed, operand_is_pcrel_label): Delete.
- (get_relaxable_immed): Use new xtensa-isa.h functions.
- (get_opcode_from_buf): Add slot parameter. Use new xtensa-isa.h
- functions.
- (xtensa_print_insn_table, print_vliw_insn): New.
- (is_direct_call_opcode): Use new xtensa-isa.h functions.
- (is_call_opcode, is_loop_opcode, is_conditional_branch_opcode,
- is_branch_or_jump_opcode): Delete.
- (is_movi_opcode, decode_reloc, encode_reloc, encode_alt_reloc): New.
- (opnum_to_reloc, reloc_to_opnum): Delete.
- (xtensa_insnbuf_set_operand, xtensa_insnbuf_get_operand): Use new
- xtensa-isa.h functions. Operate on one slot of an instruction.
- (xtensa_insnbuf_set_immediate_field, is_negatable_branch,
- xg_get_insn_size): Delete.
- (xg_get_build_instr_size): Use xg_get_single_size.
- (xg_is_narrow_insn, xg_is_single_relaxable_insn): Update calls to
- xg_build_widen_table. Use xg_get_single_size.
- (xg_get_max_narrow_insn_size): Delete.
- (xg_get_max_insn_widen_size, xg_get_max_insn_widen_literal_size,
- xg_is_relaxable_insn): Update calls to xg_build_widen_table. Use
- xg_get_single_size.
- (xg_build_to_insn): Record the loc field. Handle OP_OPERAND_HI16U and
- OP_OPERAND_LOW16U. Check xg_valid_literal_expression.
- (xg_expand_to_stack, xg_expand_narrow): Update calls to
- xg_build_widen_table. Use xg_get_single_size.
- (xg_immeds_fit): Use new xtensa-isa.h functions. Update call to
- xg_check_operand.
- (xg_symbolic_immeds_fit): Likewise. Also handle O_lo16 and O_hi16, and
- treat weak symbols conservatively.
- (xg_check_operand): Use new xtensa-isa.h functions.
- (is_dnrange): Delete.
- (xg_assembly_relax): Inline previous calls to tinsn_copy.
- (xg_finish_frag): Specify separate relax states for the frag and slot0.
- (is_branch_jmp_to_next, xg_add_branch_and_loop_targets): Use new
- xtensa-isa.h functions.
- (xg_instruction_matches_option_term, xg_instruction_matches_or_options,
- xg_instruction_matches_options): New.
- (xg_instruction_matches_rule): Handle O_register expressions. Call
- xg_instruction_matches_options.
- (transition_rule_cmp): New.
- (xg_instruction_match): Update call to xg_build_simplify_table.
- (xg_build_token_insn): Record loc fields.
- (xg_simplify_insn): Check is_specific_opcode field and
- density_supported flag.
- (xg_expand_assembly_insn): Skip checking code_density_available. Use
- new xtensa-isa.h functions. Call use_transform instead of can_relax.
- (xg_assemble_literal): Add error handling for O_big. Call
- record_alignment. Handle O_pltrel.
- (xg_valid_literal_expression): New.
- (xg_assemble_literal_space): Add slot parameter. Remove call to
- set_expr_symbol_offset. Add call to record_alignment. Update call to
- xg_finish_frag.
- (xg_emit_insn): Delete.
- (xg_emit_insn_to_buf): Add format parameter. Update calls to
- xg_add_opcode_fix and xtensa_insnbuf_to_chars.
- (xg_add_opcode_fix): Change opcode parameter to tinsn and add format
- and slot parameters. Handle new "alternate" relocations for absolute
- literals and CONST16 instructions. Check for bad uses of O_lo16 and
- O_hi16. Use new xtensa-isa.h functions.
- (xg_assemble_tokens): Delete.
- (is_register_writer): Use new xtensa-isa.h functions.
- (is_bad_loopend_opcode): Check for xtensa_rsr_lcount_opcode instead of
- old-style RSR from LCOUNT.
- (next_frag_opcode): Delete.
- (next_frag_opcode_is_loop, next_frag_format_size, frag_format_size,
- update_next_frag_state): New.
- (update_next_frag_nop_state): Delete.
- (next_frag_pre_opcode_bytes): Use next_frag_opcode_is_loop.
- (xtensa_mark_literal_pool_location): Check use_literal_section flag and
- the state of the absolute-literals directive. Add calls to
- record_alignment and xtensa_set_frag_assembly_state. Call
- xtensa_switch_to_non_abs_literal_fragment instead of
- xtensa_switch_to_literal_fragment.
- (build_nop): New.
- (assemble_nop): Use build_nop. Update call to xtensa_insnbuf_to_chars.
- (get_expanded_loop_offset): Change check for undefined opcode to an
- assertion.
- (xtensa_set_frag_assembly_state, relaxable_section,
- xtensa_find_unmarked_state_frags, xtensa_find_unaligned_branch_targets,
- xtensa_find_unaligned_loops, xg_apply_tentative_value): New.
- (md_begin): Update call to xtensa_isa_init. Initialize linkrelax to 1.
- Set lit4_seg_name. Call xg_init_vinsn. Initialize new global opcodes.
- Call init_op_placement_info_table and xtensa_set_frag_assembly_state.
- (xtensa_init_fix_data): New.
- (xtensa_frob_label): Reset label symbol to the current frag. Check
- do_align_targets and generating_literals flag. Propagate frequency
- info to new alignment frag. Call xtensa_set_frag_assembly_state.
- (xtensa_unrecognized_line): New.
- (xtensa_flush_pending_output): Check if inside a bundle. Add a call
- to xtensa_set_frag_assembly_state.
- (error_reset_cur_vinsn): New.
- (md_assemble): Remove check for literal frag. Remove call to
- istack_init. Call use_transform instead of use_generics. Parse
- explicit instruction format specifiers. Move code for
- a0_b_retw_interlock workaround to xg_assemble_vliw_tokens. Call
- error_reset_cur_vinsn on errors. Add call to get_invisible_operands.
- Add dwarf2_where call. Remote automatic alignment for ENTRY
- instructions. Move call to xtensa_clear_insn_labels to the end.
- Rearrange to handle bundles.
- (xtensa_cons_fix_new): Delete.
- (xtensa_handle_align): New.
- (xtensa_frag_init): Call xtensa_set_frag_assembly_state. Remove
- assignment to is_no_density field.
- (md_pcrel_from): Use new xtensa-isa.h functions. Use decode_reloc
- instead of reloc_to_opnum. Handle "alternate" relocations.
- (xtensa_force_relocation, xtensa_check_inside_bundle,
- xtensa_elf_section_change_hook): New.
- (xtensa_symbol_new_hook): Delete.
- (xtensa_fix_adjustable): Check for difference of symbols with an
- offset. Check for external and weak symbols.
- (md_apply_fix3): Remove cases for XTENSA_OP{0,1,2} relocs.
- (md_estimate_size_before_relax): Return expansion for the first slot.
- (tc_gen_reloc): Handle difference of symbols by producing
- XTENSA_DIFF{8,16,32} relocs and by writing the value of the difference
- into the output. Handle new XTENSA_SLOT*_OP relocs by storing the
- tentative values into the output when linkrelax is set.
- (XTENSA_PROP_SEC_NAME): Define.
- (xtensa_post_relax_hook): Call xtensa_find_unmarked_state_frags.
- Create literal tables only if using literal sections. Create new
- property tables instead of old instruction tables. Check for unaligned
- branch targets and loops.
- (finish_vinsn, find_vinsn_conflicts, check_t1_t2_reads_and_writes,
- new_resource_table, clear_resource_table, resize_resource_table,
- resources_available, reserve_resources, release_resources,
- opcode_funcUnit_use_unit, opcode_funcUnit_use_stage,
- resources_conflict, xg_find_narrowest_format, relaxation_requirements,
- bundle_single_op, emit_single_op, xg_assemble_vliw_tokens): New.
- (xtensa_end): Call xtensa_flush_pending_output. Set past_xtensa_end
- flag. Update checks for workaround options. Call
- xtensa_mark_narrow_branches and xtensa_mark_zcl_first_insns.
- (xtensa_cleanup_align_frags): Add special case for branch targets.
- Check for and mark unreachable frags.
- (xtensa_fix_target_frags): Remove use of align_only_targets flag.
- Use RELAX_LOOP_END_BYTES in special case for negatable branch at the
- end of a zero-overhead loop body.
- (frag_can_negate_branch): Handle instructions with multiple slots.
- Use new xtensa-isa.h functions
- (xtensa_mark_narrow_branches, is_narrow_branch_guaranteed_in_range,
- xtensa_mark_zcl_first_insns): New.
- (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags): Error if
- transformations are disabled.
- (next_instrs_are_b_retw): Use new xtensa-isa.h functions. Handle
- multislot instructions.
- (xtensa_fix_close_loop_end_frags, xtensa_fix_short_loop_frags):
- Likewise. Also error if transformations are disabled.
- (unrelaxed_frag_max_size): New.
- (unrelaxed_frag_min_insn_count, unrelax_frag_has_b_j): Use new
- xtensa-isa.h functions.
- (xtensa_sanity_check, is_empty_loop, is_local_forward_loop): Use
- xtensa_opcode_is_loop instead of is_loop_opcode.
- (get_text_align_power): Replace as_fatal with assertion.
- (get_text_align_fill_size): Iterate instead of using modulus when
- use_nops is false.
- (get_noop_aligned_address): Assert that this is for a machine-dependent
- RELAX_ALIGN_NEXT_OPCODE frag. Use next_frag_opcode_is_loop,
- xg_get_single_size, and frag_format_size.
- (get_widen_aligned_address): Rename to ...
- (get_aligned_diff): ... this function. Add max_diff parameter.
- Remove handling of rs_align/rs_align_code frags. Use
- next_frag_format_size, get_text_align_power, get_text_align_fill_size,
- next_frag_opcode_is_loop, and xg_get_single_size. Compute max_diff
- and pass it back to caller.
- (xtensa_relax_frag): Use relax_frag_loop_align. Add code for new
- RELAX_SLOTS, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN,
- RELAX_FILL_NOP, and RELAX_UNREACHABLE frag types. Check relax_seen.
- (relax_frag_text_align): Rename to ...
- (relax_frag_loop_align): ... this function. Assume loops can only be
- in the first slot of an instruction.
- (relax_frag_add_nop): Use assemble_nop instead of constructing an OR
- instruction. Remove call to frag_wane.
- (relax_frag_narrow): Rename to ...
- (relax_frag_for_align): ... this function. Extend to handle
- RELAX_FILL_NOP and RELAX_UNREACHABLE, as well as RELAX_SLOTS with
- RELAX_NARROW for the first slot.
- (find_address_of_next_align_frag, bytes_to_stretch): New.
- (future_alignment_required): Use find_address_of_next_align_frag and
- bytes_to_stretch. Look ahead to subsequent frags to make smarter
- alignment decisions.
- (relax_frag_immed): Add format, slot, and estimate_only parameters.
- Check if transformations are enabled for b_j_loop_end workaround.
- Use new xtensa-isa.h functions and handle multislot instructions.
- Update call to xg_assembly_relax.
- (md_convert_frag): Handle new RELAX_SLOTS, RELAX_UNREACHABLE,
- RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, and RELAX_FILL_NOP
- frag types.
- (convert_frag_narrow): Add segP, format and slot parameters. Call
- convert_frag_immed for branch instructions. Adjust calls to
- tinsn_from_chars, tinsn_immed_from_frag, and xg_emit_insn_to_buf. Use
- xg_get_single_size and xg_get_single_format.
- (convert_frag_fill_nop): New.
- (convert_frag_immed): Add format and slot parameters. Handle multislot
- instructions and use new xtensa-isa.h functions. Update calls to
- tinsn_immed_from_frag and xg_assembly_relax. Check if transformations
- enabled for b_j_loop_end workaround. Use build_nop instead of
- assemble_nop. Check is_specific_opcode flag. Check for unreachable
- frags. Use xg_get_single_size. Handle O_pltrel.
- (fix_new_exp_in_seg): Remove check for old plt flag.
- (convert_frag_immed_finish_loop): Update calls to tinsn_from_chars and
- xtensa_insnbuf_to_chars. Call tinsn_immed_from_frag. Change check
- for loop opcode to an assertion. Mark all frags up to the end of the
- loop as not transformable.
- (get_last_insn_flags, set_last_insn_flags): Use get_subseg_info.
- (get_subseg_info): New.
- (xtensa_move_literals): Call xtensa_set_frag_assembly_state. Add null
- check for dest_seg.
- (xtensa_switch_to_literal_fragment): Rewrite to handle absolute
- literals and use xtensa_switch_to_non_abs_literal_fragment otherwise.
- (xtensa_switch_to_non_abs_literal_fragment): New.
- (cache_literal_section): Add is_code parameter and pass it through to
- retrieve_literal_seg.
- (retrieve_literal_seg): Add is_code parameter and use it to set the
- flags on the literal section. Handle case where head parameter is 0.
- (get_frag_is_no_transform, set_frag_is_specific_opcode,
- set_frag_is_no_transform): New.
- (xtensa_create_property_segments): Add end_property_function parameter
- and pass it through to add_xt_block_frags. Call bfd_get_section_flags
- and skip SEC_DEBUGGING and !SEC_ALLOC sections.
- (xtensa_create_xproperty_segments, section_has_xproperty): New.
- (add_xt_block_frags): Add end_property_function parameter and call it
- if it is non-zero. Call xtensa_frag_flags_init.
- (xtensa_frag_flags_is_empty, xtensa_frag_flags_init,
- get_frag_property_flags, frag_flags_to_number,
- xtensa_frag_flags_combinable, xt_block_aligned_size,
- xtensa_xt_block_combine, add_xt_prop_frags,
- init_op_placement_info_table, opcode_fits_format_slot,
- xg_get_single_size, xg_get_single_format): New.
- (istack_push): Inline call to tinsn_copy.
- (tinsn_copy): Delete.
- (tinsn_has_invalid_symbolic_operands): Handle O_hi16 and O_lo16 and
- CONST16 opcodes. Handle O_big, O_illegal, and O_absent.
- (tinsn_has_complex_operands): Handle O_hi16 and O_lo16.
- (tinsn_to_insnbuf): Use xg_get_single_format and new xtensa-isa.h
- functions. Handle invisible operands.
- (tinsn_to_slotbuf): New.
- (tinsn_check_arguments): Use new xtensa-isa.h functions.
- (tinsn_from_chars): Add slot parameter. Rewrite using xg_init_vinsn,
- vinsn_from_chars, and xg_free_vinsn.
- (tinsn_from_insnbuf): New.
- (tinsn_immed_from_frag): Add slot parameter and handle multislot
- instructions. Handle symbol differences.
- (get_num_stack_text_bytes): Use xg_get_single_size.
- (xg_init_vinsn, xg_clear_vinsn, vinsn_has_specific_opcodes,
- xg_free_vinsn, vinsn_to_insnbuf, vinsn_from_chars, expr_is_register,
- get_expr_register, set_expr_symbol_offset_diff): New.
- * config/tc-xtensa.h (MAX_SLOTS): Define.
- (xtensa_relax_statesE): Move from tc-xtensa.c. Add
- RELAX_CHECK_ALIGN_NEXT_OPCODE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_SLOTS,
- RELAX_FILL_NOP, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, and
- RELAX_NONE types.
- (RELAX_IMMED_MAXSTEPS): Move from tc-xtensa.c.
- (xtensa_frag_type struct): Add is_assembly_state_set,
- use_absolute_literals, relax_seen, is_unreachable, is_specific_opcode,
- is_align, is_text_align, alignment, and is_first_loop_insn fields.
- Replace is_generics and is_relax fields by is_no_transform field.
- Delete is_text and is_longcalls fields. Change text_expansion and
- literal_expansion to arrays of MAX_SLOTS entries. Add arrays of
- per-slot information: literal_frags, slot_subtypes, slot_symbols,
- slot_sub_symbols, and slot_offsets. Add fr_prev field.
- (xtensa_fix_data struct): New.
- (xtensa_symfield_type struct): Delete plt field.
- (xtensa_block_info struct): Move definition to tc-xtensa.h. Add
- forward declaration here.
- (xt_section_type enum): Delete xt_insn_sec. Add xt_prop_sec.
- (XTENSA_SECTION_RENAME): Undefine.
- (TC_FIX_TYPE, TC_INIT_FIX_DATA, TC_FORCE_RELOCATION, NO_PSEUDO_DOT,
- tc_unrecognized_line, md_do_align, md_elf_section_change_hook,
- HANDLE_ALIGN, TC_LINKRELAX_FIXUP, SUB_SEGMENT_ALIGN): Define.
- (TC_CONS_FIX_NEW, tc_symbol_new_hook): Delete.
- (unit_num_copies_func, opcode_num_units_func,
- opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func): New.
- (resource_table struct): New.
- * config/xtensa-istack.h (MAX_INSN_ARGS): Increase from 6 to 10.
- (TInsn struct): Add keep_wide, loc, fixup, record_fix, subtype,
- literal_space, symbol, sub_symbol, offset, and literal_frag fields.
- (tinsn_copy): Delete prototype.
- (vliw_insn struct): New.
- * config/xtensa-relax.c (insn_pattern_struct): Add options field.
- (widen_spec_list): Add option conditions for density and boolean
- instructions. Add expansions using CONST16 and conditions for using
- CONST16 vs. L32R. Use new Xtensa LX RSR/WSR syntax. Add entries for
- predicted branches.
- (simplify_spec_list): Add option conditions for density instructions.
- Add entry for NOP instruction.
- (append_transition): Add cmp function pointer parameter and use it to
- insert the new entry in order.
- (operand_function_LOW16U, operand_function_HI16U): New.
- (xg_has_userdef_op_fn, xg_apply_userdef_op_fn): Handle
- OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
- (enter_opname, split_string): Use xstrdup instead of strdup.
- (init_insn_pattern): Initialize new options field.
- (clear_req_or_option_list, clear_req_option_list,
- clone_req_or_option_list, clone_req_option_list, parse_option_cond):
- New.
- (parse_insn_pattern): Parse option conditions.
- (transition_applies): New.
- (build_transition): Use new xtensa-isa.h functions. Fix incorrectly
- swapped last arguments in calls to append_constant_value_condition.
- Call clone_req_option_list. Add warning about invalid opcode.
- Handle LOW16U and HI16U function names.
- (build_transition_table): Add cmp parameter and use it in calls to
- append_transition. Use new xtensa-isa.h functions. Check
- transition_applies before adding entries.
- (xg_build_widen_table, xg_build_simplify_table): Add cmp parameter and
- pass it through to build_transition_table.
- * config/xtensa-relax.h (ReqOrOptionList, ReqOrOption, ReqOptionList,
- ReqOption, transition_cmp_fn): New types.
- (OpType enum): Add OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
- (transition_rule struct): Add options field.
- * doc/as.texinfo (Overview): Update Xtensa options.
- * doc/c-xtensa.texi (Xtensa Options): Delete --[no-]density,
- --[no-]relax, and --[no-]generics options. Update descriptions of
- --text-section-literals and --[no-]longcalls. Add
- --[no-]absolute-literals and --[no-]transform.
- (Xtensa Syntax): Add description of syntax for FLIX instructions.
- Remove use of "generic" and "specific" terminology for opcodes.
- (Xtensa Registers): Generalize the syntax description to include
- user-defined register files.
- (Xtensa Automatic Alignment): Update.
- (Xtensa Branch Relaxation): Mention limitation of unconditional jumps.
- (Xtensa Call Relaxation): Linker can now remove most of the overhead.
- (Xtensa Directives): Remove confusing rules about precedence.
- (Density Directive, Relax Directive): Delete.
- (Schedule Directive): New.
- (Generics Directive): Rename to ...
- (Transform Directive): ... this node.
- (Literal Directive): Update for absolute literals. Missing
- literal_position directive is now an error.
- (Literal Position Directive): Update for absolute literals.
- (Freeregs Directive): Delete.
- (Absolute Literals Directive): New.
- (Frame Directive): Minor editing.
- * Makefile.am (DEPTC_xtensa_elf, DEPOBJ_xtensa_elf, DEP_xtensa_elf):
- Update dependencies.
- * Makefile.in: Regenerate.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (append_insn): Use fix_new rather than fix_new_exp
- to build the second and third fixups for a composite relocation.
- (macro_read_relocs): New function.
- (macro_build): Use it.
- (s_cpsetup): Pass all three composite relocation codes to macro_build.
- Simplify fragging code accordingly.
- (s_gpdword): Use fix_new rather than fix_new_exp for the second part
- of the composite relocation. Set fx_tcbit in both fixups.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (append_insn): Set fx_tcbit for composite relocs.
- (md_apply_fix3): Don't treat composite relocs as done.
-
-2004-10-07 Jan Beulich <jbeulich at novell.com>
-
- * macro.c (macro_expand_body): When ELF, use .LL rather than LL as
- prefix for symbol names generated from the LOCAL macro directive.
-
- * dw2gencfi.c (select_cie_for_fde): When separating CIE out from
- FDE, treat a DW_CFA_remember_state as we do a DW_CFA_advance_loc.
-
-2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c (preprocess_reglist): Handle Co-processor
- Special registers.
- (md_assemble): Add error checking for Co-Processor instructions.
- (get_cinv_parameters): Add 'b' option to invalidate the
- branch-target cache.
-
-2004-10-05 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (unwind): New variable.
- (vfp_sp_encode_reg): New function.
- (vfp_sp_reg_required_here): Use it.
- (vfp_sp_reg_list, vfp_dp_reg_list): Remove.
- (vfp_parse_reg_list): New function.
- (s_arm_unwind_fnstart, s_arm_unwind_fnend, s_arm_unwind_cantunwind,
- s_arm_unwind_personality, s_arm_unwind_personalityindex,
- s_arm_unwind_handlerdata, s_arm_unwind_save, s_arm_unwind_movsp,
- s_arm_unwind_pad, s_arm_unwind_setfp, s_arm_unwind_raw): New
- functions.
- (md_pseudo_table): Add them.
- (do_vfp_reg2_from_sp2): Use vfp_parse_reg_list and vfp_sp_encode_reg.
- (do_vfp_sp2_from_reg2, vfp_sp_ldstm, vfp_dp_ldstm): Ditto.
- (set_section, add_unwind_adjustsp, flush_pending_unwind,
- finish_unwind_opcodes, start_unwind_section, create_unwind_entry,
- require_hashconst, add_unwind_opcode): New functions.
- * doc/c-arm.texi: Document unwinding opcodes.
- * NEWS: Mention the new feature.
-
-2004-10-04 Eric Christopher <echristo at redhat.com>
-
- * config/tc-mips.c (md_apply_fix3): Remove erroneous assert.
-
-2004-10-01 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ppc.c (md_apply_fix3): Call S_SET_THREAD_LOCAL for
- TLS relocations.
- * config/tc-s390.c (md_apply_fix3): Likewise.
- * config/tc-sparc.c (md_apply_fix3): Likewise.
-
-2004-10-01 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (arm_elf_section_type): New function.
- (arm_elf_change_section): Set section link for exidx sections.
- * config/tc-arm.h (arm_elf_section_type): Add prototype.
- (md_elf_section_type): Define.
-
-2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
-
- * config/tc-pdp11.c (md_apply_fix3): Change to sign of the SOB
- instruction's offset.
-
-2004-10-01 Adam Nemet <anemet at lnxw.com>
-
- * (TARGET_FORMAT): Remove LynxOS COFF definition.
-
-2004-10-01 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
-
- * config/tc-arc.c (tc_gen_reloc): Don't assume fixP->fx_addsy is an
- asymbol *, instead use symbol_get_bfdsym.
-
-2004-09-30 Linus Nielsen Feltzing <linus at haxx.se>
-
- * config/tc-m68k.c (select_control_regs): Add mcf5249.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (do_smi, do_nop): New functions.
- (insns): Add ARMv6ZK instructions.
- (md_apply_fix3): Handle BFD_RELOC_ARM_SMI.
- (tc_gen_reloc): Ditto.
- (arm_cpus): Add mpcore and arm1176.
- (arm_archs): Add armv6{k,z,zk}.
- * doc/c-arm.texi: Document new cores and architectures.
-
-2004-09-30 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c: Use ISO C90 formatting.
-
-2004-09-30 Vladimir Ivanov <vladitx at nucleusys.com>
-
- * config/tc-arm.c (mav_reg_required_here): Allow REG_TYPE_CN
- as alternative when REG_TYPE_MVF, REG_TYPE_MVD, REG_TYPE_MVFX or
- REG_TYPE_MVDX is expected.
-
-2004-09-29 Marc Bevand <m.bevand at gmail.com>
-
- * doc/c-i386.texi (i386-Mnemonics): Fix typo.
-
-2004-09-21 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (ENCODED_PSP_OFFSET): New.
- (output_rp_psprel, output_pfs_psprel, output_preds_psprel,
- output_spill_base, output_unat_psprel, output_lc_psprel,
- output_fpsr_psprel, output_priunat_psprel, output_bsp_psprel,
- output_bsprestore_psprel, output_rnat_psprel, output_spill_psprel,
- output_spill_psprel_p): Use it.
-
-2004-09-20 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c (handle_LoadStor): New function.
- Handle load/stor unique instructions before parsing.
-
-2004-09-17 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (s_arm_rel31): New funciton.
- (md_pseudo_table): Add .rel31.
- (md_apply_fix3): Handle BFD_RELOC_ARM_TARGET2,
- BFD_RELOC_32_PCREL and BFD_RELOC_ARM_PREL31.
- (tc_gen_reloc): Handle BFD_RELOC_ARM_PREL31 and BFD_RELOC_ARM_TARGET2.
- (arm_fix_adjustable): Return 0 for BFD_RELOC_ARM_TARGET2.
- (arm_parse_reloc): Add (target2).
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
+ * doc/Makefile.am: Add html target.
* doc/Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
- * po/gas.pot: Regenerate.
+ * po/Make-in: Add html target.
-2004-09-14 Hideki IWAMOTO <h-iwamoto at kit.hi-ho.ne.jp>
+2006-02-27 H.J. Lu <hongjiu.lu at intel.com>
- * config/tc-mmix.c [!LLONG_MIN]: Correct #elsif to #elif.
- [!LLONG_MAX]: Ditto.
+ * config/tc-i386.c (output_insn): Support Intel Merom New
+ Instructions.
-2004-09-13 Paul Brook <paul at codesourcery.com>
+ * config/tc-i386.h (CpuMNI): New.
+ (CpuUnknownFlags): Add CpuMNI.
- * config/tc-arm.c: Rename RELABS to TARGET1.
+2006-02-24 David S. Miller <davem at sunset.davemloft.net>
-2004-09-13 Alan Modra <amodra at bigpond.net.au>
+ * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
+ (hpriv_reg_table): New table for hyperprivileged registers.
+ (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
+ register encoding.
- * messages.c (as_internal_value_out_of_range): Cast values passed
- to as_bad_where or as_warn_where to proper type.
+2006-02-24 DJ Delorie <dj at redhat.com>
-2004-09-11 Theodore A. Roth <troth at openavr.org>
+ * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
+ (tc_gen_reloc): Don't define.
+ * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
+ (OPTION_LINKRELAX): New.
+ (md_longopts): Add it.
+ (m32c_relax): New.
+ (md_parse_options): Set it.
+ (md_assemble): Emit relaxation relocs as needed.
+ (md_convert_frag): Emit relaxation relocs as needed.
+ (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
+ (m32c_apply_fix): New.
+ (tc_gen_reloc): New.
+ (m32c_force_relocation): Force out jump relocs when relaxing.
+ (m32c_fix_adjustable): Return false if relaxing.
- * config/tc-avr.c: Add support for
- atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
+2006-02-24 Paul Brook <paul at codesourcery.com>
-2004-09-09 Alan Modra <amodra at bigpond.net.au>
+ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
+ arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
+ (struct asm_barrier_opt): Define.
+ (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
+ (parse_psr): Accept V7M psr names.
+ (parse_barrier): New function.
+ (enum operand_parse_code): Add OP_oBARRIER.
+ (parse_operands): Implement OP_oBARRIER.
+ (do_barrier): New function.
+ (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
+ (do_t_cpsi): Add V7M restrictions.
+ (do_t_mrs, do_t_msr): Validate V7M variants.
+ (md_assemble): Check for NULL variants.
+ (v7m_psrs, barrier_opt_names): New tables.
+ (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
+ (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
+ (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
+ (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
+ (struct cpu_arch_ver_table): Define.
+ (cpu_arch_ver): New.
+ (aeabi_set_public_attributes): Use cpu_arch_ver. Set
+ Tag_CPU_arch_profile.
+ * doc/c-arm.texi: Document new cpu and arch options.
- * dw2gencfi.c (select_cie_for_fde): When separating CIE out
- from FDE, treat a CFI_escape as we do a DW_CFA_advance_loc.
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
-2004-09-08 Paul Brook <paul at codesourcery.com>
+ * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
- * config/obj-elf.c (obj_elf_section_type): Handle init_array,
- fini_array and preinit_array section types.
- * config/tc-ia64.c (ia64_elf_section_type): Remove init_array
- and fini_array.
- * doc/as.texinfo: Document extra section types.
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
-2004-09-02 Mark Mitchell <mark at codesourcery.com>
+ * config/tc-ia64.c: Update copyright years.
- * Makefile.am (TARG_ENV_HFILES): Add te-symbian.h.
- * Makefile.in: Regenerated.
- * configure.in: Set em for arm*-*-symbianelf*.
- * configure: Regenerated.
- * config/tc-arm.c (elf32_arm_target_format): Use Symbian target
- vectors when appropriate.
- * config/te-symbian.h: New file.
+2006-02-22 H.J. Lu <hongjiu.lu at intel.com>
-2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+ * config/tc-ia64.c (specify_resource): Add the rule 17 from
+ SDM 2.2.
- * config/tc-crx.c (gettrap): Exception vector can be case
- insensitive.
- (process_label_constant): Fix a 32-bit displacement bug in branch
- instructions.
- (get_operandtype) : Bug fix, wrong operand was used.
- (process_label_constant): Initialize relocation type to
- BFD_RELOC_NONE
+2005-02-22 Paul Brook <paul at codesourcery.com>
-2004-09-01 Richard Earnshaw < reanrsha at arm.com>
+ * config/tc-arm.c (do_pld): Remove incorrect write to
+ inst.instruction.
+ (encode_thumb32_addr_mode): Use correct operand.
- * tc-arm.c (arm_cpus, arm_fpus): Allow <cpu>-s as well as <cpu>s
- for synthesizable cores.
+2006-02-21 Paul Brook <paul at codesourcery.com>
- * doc/c-arm.texi (ARM Options): Document canonical names of CPUs.
+ * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
-2004-08-25 Dmitry Diky <diwil at spec.ru>
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
- * config/tc-msp430.c: Clean-up the code.
- (md_relax_table): New relax table.
- (mcu_types): Sort MCU types.
- (md_pseudo_table): Add .profiler pseudo handler.
- (pow2value): New function.
- (msp430_profiler): New function.
- (msp430_operands): Add new insns handlers.
- (msp430_srcoperand): Add register operand handler, allow complex
- expressions.
- (md_estimate_size_before_relax): Rewritten.
- (md_convert_frag): Rewritten.
- (msp430_relax_frag): New function.
- * config/tc-msp430.h (md_relax_frag): define macro
- * doc/c-msp430.texi: Update information.
-
-2004-08-24 Nick Clifton <nickc at redhat.com>
-
- * as.c (std_shortopts): Allow -g to take an optional argument.
- (parse_args): Pass any switch starting with -g on to the backend
- for parsing.
-
-2004-08-18 Mark Mitchell <mark at codesourcery.com>
-
- * configure.in (arm*-*-symbianelf*): New target.
- (arm*-*-eabi*): Likewise.
- * configure: Regenerated.
-
-2004-08-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
- * config/tc-mips.c (append_insn): Handle delay slots in branch likely
- correctly.
-
-2004-08-18 Jakub Jelinek <jakub at redhat.com>
-
- * config/tc-ia64.c (start_unwind_section): Add linkonce_empty
- argument, don't do anything if current section is not
- .gnu.linkonce.t.* and linkonce_empty is set.
- (generate_unwind_image, dot_endp): Adjust callers, call
- start_unwind_section (*, 1) if nothing will be put into the
- section.
-
-2004-08-17 Nick Clifton <nickc at redhat.com>
-
- * as.c (MD_DEBUG_FORMAT_SELECTOR): Provide default definition.
- (show_usage): Add -g.
- (std_longopts): Add --gen-debug. Alpha sort the table.
- (parse_args): Print an error message if a switch is not handled.
- Handle the -g switch, calling md_debug_format_selector() if
- necessary.
- * NEWS: Mention new feature.
- * doc/as.texinfo: Document new switch.
- * doc/internals.texi: Document behaviour of md_parse_option.
-
- * config/tc-arm.c (md_parse_option): Do not issue an error message
- if the switch is not recognised.
- * config/tc-m68k.c (md_parse_option): Likewise.
- * config/tc-pdp11.c (md_parse_option): Likewise.
- * config/tc-v850.c (md_parse_option): Likewise.
-
- * as.h: Fix up formatting.
- * tc.h: Likewise.
-
-2004-08-16 Nick Clifton <nickc at redhat.com>
-
- * macro.c (macro_set_alternate): Use ISO C90 formatting.
-
- * configure.in: Sort architecture based tables alphabetically.
- * configure: Regenerate.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (tc_ppc_regname_to_dw2regnum <regnames>): Replace
- { "cc", 68 }, with { "cr", 70 }.
-
-2004-08-13 Jan Beulich <jbeulich at novell.com>
- Nick Clifton <nickc at redhat.com>
-
- * as.c: Add and handle new --alternate command line option.
- * macro.c (macro_set_alternate): New.
- * macro.h (macro_set_alternate): Declare.
- * read.c: Add and handle new .altmacro and .noaltmacro directives.
- * doc/as.texinfo: Document new command line option and pseudo-ops
- as well as insert documentation originating from gasp about
- alternate macro syntax.
- * NEWS: Mention new command line option and pseudo-ops.
-
-2004-08-10 Mark Mitchell <mark at codesourcery.com>
-
- * expr.c (operand): Handle the "~", "-", and "!" operators applied
- to bignums.
-
-2004-08-06 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (md_apply_fix3, tc_gen_reloc, arm_parse_reloc):
- Handle new relocations.
- * include/elf/arm.h (elf_arm_reloc_type): Add new EABI relocations.
-
-2004-08-05 Bob Wilson <bob.wilson at acm.org>
-
- * write.c (relax_segment): Use was_address instead of address when
- setting fr_fix field for align frag due to backwards .org.
-
-2004-07-29 Alexandre Oliva <aoliva at redhat.com>
-
- Introduce SH2a support.
- 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
- * config/tc-sh.c (get_specific): Change arch_sh2a_up to
- arch_sh2a_nofpu_up.
- 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
- * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
- 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
- * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
- to end of conditional expression.
- 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
- * config/tc-sh.c: Add sh2a-nofpu support.
- 2003-12-29 DJ Delorie <dj at redhat.com>
- * tc-sh.c: Add sh2a support.
- (parse_reg): Add tbr.
- (parse_at): Support @@(disp,tbr).
- (get_specific): Support sh2a opcodes.
- (insert4): New, for 4 byte relocs.
- (build_Mytes): Support sh2a opcodes.
- (md_apply_fix3_Mytes): Support sh2a opcodes.
- 2003-12-02 Michael Snyder <msnyder at redhat.com>
- * config/tc-sh.c (md_parse_option): Handle sh2a.
- (sh_elf_final_processing): Ditto.
-
-2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
-
- * config/tc-hppa.h (TARGET_FORMAT): Set to "elf32-hppa-netbsd"
- for TE_NetBSD.
-
-2004-07-27 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-ppc.c (ppc_frob_file_before_adjust): Warn if .toc too big.
- (ppc_arch): Expand comment.
-
-2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * config/tc-crx.c: Support evaluating the difference between two
- symbols.
- * config/tc-crx.h: Likewise.
-
-2004-07-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (start_unwind_section): Set the linked-to
- section.
- (ia64_elf_section_change_hook): Set the linked-to section for
- SHT_IA_64_UNWIND.
-
-2004-07-26 Dmitry Diky <diwil at spec.ru>
-
- * config/tc-msp430.c: Add new subtargets: msp430x1610,
- msp430x1611, msp430x1612, msp430x415, msp430x417, msp430xG437,
- msp430xG438, msp430xG439.
-
-2004-07-25 Daniel Jacobowitz <dan at debian.org>
-
- * doc/as.texinfo (Section, PushSection): Correct documentation
- for ELF.
-
-2004-07-21 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c (optimize_imm): Adjust immediates to only those
- permissible for the selected instruction suffix.
- (match_template): Don't permit 64-bit general purpose operands in
- 32-bit mode.
- (finalize_imm): Permit 64-bit immediates.
- (build_modrm_byte): Don't treat 32-bit addressing in 64-bit mode
- specially except for the width of the used base and/or index
- registers. For 32-bit displacements, use sign-extended
- relocations only when using 64-bit addressing.
- Force zero displacement on rip-relative addressing when there is
- no other displacement.
- (i386_index_check): Don't treat 32-bit addressing in 64-bit mode
- specially except for the width of the used base and/or index
- registers.
- (parse_register): Disallow Reg64 registers in 32-bit mode.
-
- * config/tc-i386.c: For DefaultSize instructions, don't guess a 'q'
- suffix if the instruction doesn't support it.
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * config/tc-mips.c (append_insn): Handle constant expressions with
- no associated relocation.
- (mips_ip): Cancel the expression after use for the Q format
- specifier.
- (parse_relocation): Return no relocation for unsupported
- operators.
- (my_getSmallExpression): Return no relocation if no relocation
- operators are used.
-
-2004-07-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/obj-som.c (adjust_stab_sections): Add prototype.
- (obj_som_compiler, obj_som_version, obj_som_copyright,
- adjust_stab_sections): Add ATTRIBUTE_UNUSED to unused arguments.
- * config/tc-hppa.c (update_subspace): Likewise.
- (is_defined_subspace): Amplify comment.
- * config/obj-som.h (som_frob_file): Add prototype.
-
-2004-07-19 Christopher Faylor <cgf at timesys.com>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * subsegs.c (section_symbol): Don't create a new segment when
- existing segment is undefined.
-
-2004-07-16 Richard Earnshaw <rearnsha at arm.com>
-
- * config/tc-arm.c: Include include/opcode/arm.h.
- (ARM_EXT_*, ARM_ARCH_*, ARM_ANY, ARM_ALL, COPROC_ANY): Delete.
- (FPU_FPA_EXT_* FPU_VFP_EXT_*, FPU_ANY, FPU_NONE, FPU_MAVERICK): Delete.
- (FPU_ARCH_*): Delete.
- * Makefile.am: Update dependencies.
+ * Makefile.am: Add xc16x related entry.
* Makefile.in: Regenerate.
-
-2004-07-15 Nick Clifton <nickc at redhat.com>
-
- * configure.in: Accept armbe as a big-endian arm configuration.
+ * configure.in: Added xc16x related entry.
* configure: Regenerate.
+ * config/tc-xc16x.h: New file
+ * config/tc-xc16x.c: New file
+ * doc/c-xc16x.texi: New file for xc16x
+ * doc/all.texi: Entry for xc16x
+ * doc/Makefile.texi: Added c-xc16x.texi
+ * NEWS: Announce the support for the new target.
-2004-07-13 Thomas Nystrom <thn at saeab.se>
+2006-02-16 Nick Hudson <nick.hudson at dsl.pipex.com>
- * config/tc-i386.c (T_SHIFTOP): New constant.
- (intel_e05_1): Handle '&', '|' and T_SHIFTOP.
- (intel_el1): Handle '~'.
- (intel_get_token): Handle '<>', '&', '|' and '~'.
+ * configure.tgt: set emulation for mips-*-netbsd*
-2004-07-13 Nick Clifton <nickc at redhat.com>
+2006-02-14 Jakub Jelinek <jakub at redhat.com>
- (md_assemble): Remove spurious newline from end of as_bad error
- message.
- (intel_e05_1): Likewise.
- (intel_e11): Likewise.
- (intel_match_token): Likewise.
+ * config.in: Rebuilt.
-2004-07-11 Andreas Schwab <schwab at suse.de>
+2006-02-13 Bob Wilson <bob.wilson at acm.org>
- * config/tc-m68k.c: Convert to C90. Remove redundant
- declarations. Indentation fixup.
- [M68KCOFF]: Include "obj-coff.h" instead of declaring
- obj_coff_section ourselves.
+ * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
+ from 1, not 0, in error messages.
+ (md_assemble): Simplify special-case check for ENTRY instructions.
+ (tinsn_has_invalid_symbolic_operands): Do not include opcode and
+ operand in error message.
-2004-07-09 James E Wilson <wilson at specifixinc.com>
+2006-02-13 Joseph S. Myers <joseph at codesourcery.com>
- * config/tc-ia64.c (default_big_endian): New.
- (dot_byteorder, md_begin): Use it.
- (md_parse_option): Set it.
+ * configure.tgt (arm-*-linux-gnueabi*): Change to
+ arm-*-linux-*eabi*.
-2004-07-09 Nick Clifton <nickc at redhat.com>
+2006-02-10 Nick Clifton <nickc at redhat.com>
- * configure.in: Change sh-sybmian-elf to sh-*-symbianelf.
- * configure: Regenerate.
- * NEWS: Change sh-sybmian-elf to sh-*-symbianelf.
- * config/tc-sh.c (sh_elf_final_processing): Use renamed version of
- sh_find_elf_flags if necessary.
+ * config/tc-crx.c (check_range): Ensure that the sign bit of a
+ 32-bit value is propagated into the upper bits of a 64-bit long.
-2004-07-08 Richard Sandiford <rsandifo at redhat.com>
+ * config/tc-arc.c (init_opcode_tables): Fix cast.
+ (arc_extoper, md_operand): Likewise.
- * config/tc-mips.c (mips_fix_adjustable): If the full addend is
- going to be split into more than one in-place addend, return 0
- for relocations against mergeable sections. Associate comments
- with code.
+2006-02-09 David Heine <dlheine at tensilica.com>
-2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
+ * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
+ each relaxation step.
- * Makefile.am (CPU_TYPES): Add crx.
- (TARGET_CPU_CFILES): Add config/tc-crx.c.
- (TARGET_CPU_HFILES): Add config/tc-crx.h.
- (DEPTC_crx_elf): New target.
- (DEPOBJ_crx_elf): Likewise.
- (DEP_crx_elf): Likewise.
- * Makefile.in: Regenerate.
- * configure.in: Add crx* target.
+2006-02-09 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * configure.in (CHECK_DECLS): Add vsnprintf.
* configure: Regenerate.
- * config/tc-crx.c: New file.
- * config/tc-crx.h: New file.
- * NEWS: Mention new target.
+ * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
+ include/declare here, but...
+ * as.h: Move code detecting VARARGS idiom to the top.
+ (errno.h, stdarg.h, varargs.h, va_list): ...here.
+ (vsnprintf): Declare if not already declared.
-2004-07-06 Nick Clifton <nickc at redhat.com>
+2006-02-08 H.J. Lu <hongjiu.lu at intel.com>
- * config.in: Undefine TARGET_SYMBIAN by default.
- * configure.in:
- * configure: Regenerate. Add sh-symbian-elf target. If
- selected define TARGET_SYMBIAN.
- * config/tc-sh.h (TARGET_FORMAT): Select a Symbian target
- format if TARGET_SYMBIAN has been defined.
+ * as.c (close_output_file): New.
+ (main): Register close_output_file with xatexit before
+ dump_statistics. Don't call output_file_close.
- * output-file.c (output_file_create): Report the target format
- chosen when bfd_openw reports that it is invalid.
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
- * config/obj-coff.c (coff_pseudo_table): Only define the weak
- pseudo for BFD based assemblers.
+ * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
+ mcf5329_control_regs): New.
+ (not_current_architecture, selected_arch, selected_cpu): New.
+ (m68k_archs, m68k_extensions): New.
+ (archs): Renamed to ...
+ (m68k_cpus): ... here. Adjust.
+ (n_arches): Remove.
+ (md_pseudo_table): Add arch and cpu directives.
+ (find_cf_chip, m68k_ip): Adjust table scanning.
+ (no_68851, no_68881): Remove.
+ (md_assemble): Lazily initialize.
+ (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
+ (md_init_after_args): Move functionality to m68k_init_arch.
+ (mri_chip): Adjust table scanning.
+ (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
+ options with saner parsing.
+ (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
+ m68k_init_arch): New.
+ (s_m68k_cpu, s_m68k_arch): New.
+ (md_show_usage): Adjust.
+ (m68k_elf_final_processing): Set CF EF flags.
+ * config/tc-m68k.h (m68k_init_after_args): Remove.
+ (tc_init_after_args): Remove.
+ * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
+ (M68k-Directives): Document .arch and .cpu directives.
-2004-07-05 Andrew Stubbs <andrew.stubbs at superh.com>
+2006-02-05 Arnold Metselaar <arnold.metselaar at planet.nl>
- gas:
- * config/tc-sh.c (md_assemble): Change isspace to ISSPACE.
- (md_parse_option): Remove redundant -isa testing.
- Make bfd_arch variable const.
- (md_show_usage): Make bfd_arch variable const.
+ * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
+ synonyms for equ and defl.
+ (z80_cons_fix_new): New function.
+ (emit_byte): Disallow relative jumps to absolute locations.
+ (emit_data): Only handle defb, prototype changed, because defb is
+ now handled as pseudo-op rather than an instruction.
+ (instab): Entries for defb,defw,db,dw moved from here...
+ (md_pseudo_table): ... to here, use generic cons() for defw,dw.
+ Add entries for def24,def32,d24,d32.
+ (md_assemble): Improved error handling.
+ (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
+ * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
+ (z80_cons_fix_new): Declare.
+ * doc/c-z80.texi (defb, db): Mention warning on overflow.
+ (def24,d24,def32,d32): New pseudo-ops.
+
+2006-02-02 Paul Brook <paul at codesourcery.com>
-2004-07-03 James E Wilson <wilson at specifixinc.com>
+ * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
- * config/tc-ia64.c (emit_one_bundle): Check and set insn_addr.
- * config/tc-ia64.h (md_frag_check): Define.
+2005-02-02 Paul Brook <paul at codesourcery.com>
-2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+ * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
+ T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
+ T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
+ T2_OPCODE_RSB): Define.
+ (thumb32_negate_data_op): New function.
+ (md_apply_fix): Use it.
- * config/obj-coff.c (obj_coff_weak): New .weak syntax for PE weak
- externals.
- * doc/as.texinfo (Weak): Document PE weak symbols.
+2006-01-31 Bob Wilson <bob.wilson at acm.org>
-2004-07-03 Richard Sandiford <rsandifo at redhat.com>
+ * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
+ fields.
+ * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
+ * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
+ subtracted symbols.
+ (relaxation_requirements): Add pfinish_frag argument and use it to
+ replace setting tinsn->record_fix fields.
+ (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
+ and vinsn_to_insnbuf. Remove references to record_fix and
+ slot_sub_symbols fields.
+ (xtensa_mark_narrow_branches): Delete unused code.
+ (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
+ a symbol.
+ (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
+ record_fix fields.
+ (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
+ (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
+ of the record_fix field. Simplify error messages for unexpected
+ symbolic operands.
+ (set_expr_symbol_offset_diff): Delete.
- * config/tc-mips.c (HAVE_IN_PLACE_ADDENDS): New macro.
- (reloc_needs_lo_p): Only return true if HAVE_IN_PLACE_ADDENDS.
- (mips_frob_file): Rework so that only a single pass through the
- relocs is needed. Allow %lo()s to have higher offsets than their
- corresponding %hi()s or %got()s.
+2006-01-31 Paul Brook <paul at codesourcery.com>
-2004-07-02 Nick Clifton <nickc at redhat.com>
+ * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
- * config/tc-arm.c (md_apply_fix3:BFD_RELOC_ARM_IMMEDIATE): Do not
- allow values which have come from undefined symbols.
- Always consider this fixup to have been processed as a reloc
- cannot be generated for it.
+2006-01-31 Paul Brook <paul at codesourcery.com>
+ Richard Earnshaw <rearnsha at arm.com>
-2004-07-02 Alan Modra <amodra at bigpond.net.au>
-
- * frags.h (struct frag): Add has_code and insn_addr fields.
- * write.c (cvt_frag_to_fill): Invoke md_frag_check.
- * config/tc-ppc.c (md_assemble): Check and set insn_addr.
- * config/tc-ppc.h (md_frag_check): Define.
-
-2004-06-28 Maciej W. Rozycki <macro at linux-mips.org>
-
- * doc/Makefile.am (info): Rename goal to...
- (info-local): ... this, to preserve implicit dependencies.
- * doc/Makefile.in: Regenerate with automake 1.8.5.
-
-2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (md_convert_frag): Changed for @PLT.
- (m32r_cgen_record_fixup_exp): Changed for @GOTOFF, @GOT.
- (m32r_fix_adjustable): Changed for @GOTOFF, @GOT, @PLT.
- (tc_gen_reloc): Likewise.
- (m32r_end_of_match): Add for @GOTOFF, @GOT, @PLT.
- (m32r_parse_name): Likewise.
- (m32r_cgen_parse_fix_exp): Likewise.
- * config/tc-m32r.h (md_parse_name): Define for @GOTOFF, @GOT, @PLT.
- (O_PIC_reloc): Likewise.
- (TC_CGEN_PARSE_FIX_EXP): Likewise..
- * cgen.c (gas_cgen_parse_operand): Add TC_CGEN_PARSE_FIX_EXP
- for @GOTOFF, @GOT, @PLT.
-
-2004-06-21 Jan Beulich <jbeulich at novell.com>
-
- * gas/symbols.c: While discarding ordinary local absolute symbols
- when --strip-local-absolute is in effect, retain file symbols.
-
-2004-06-20 Andreas Schwab <schwab at suse.de>
-
- * config/tc-m68k.c (mri_chip): Replace current_chip, not augment.
- (md_parse_option): Likewise.
-
-2004-06-17 Jan Beulich <jbeulich at novell.com>
-
- * config/tc-i386.c: Deal with LEX_QM the same way as with LEX_AT.
- * config/te-netware.h: New file.
- * config/te-ppcnw.h: Delete: Obsolete.
- * configure.in: Eliminate ill NetWare targets. Make generic
- NetWare target use proper emulation.
- * Makefile.am: Eliminate reference to obsolete te-ppcnw.h, add
- reference to new te-netware.h.
- * configure: Regenerate.
- * Makefile.in: Regenerate.
-
-2004-06-15 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * config/tc-s390.c (s390_insn): Avoid incorrect signed/unsigned
- comparison in .insn pseudo operation.
-
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
-
- * config/obj-coff.c (coff_adjust_section_syms): Use
- bfd_get_section_size instead of bfd_get_section_size_before_reloc.
- (coff_frob_section): Likewise.
- * config/tc-mips.c (md_apply_fix3): Likewise.
- * config/obj-elf.c (elf_frob_file): Use bfd_set_section_size.
- (elf_frob_file_after_relocs): Likewise.
-
-2004-06-10 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/tc-hppa.c (log2): Rename to exact_log2.
- (pa_next_subseg): Delete unused function.
- (create_new_space): Mark unused arguments with ATTRIBUTE_UNUSED.
- (create_new_subspace): Likewise.
-
- Bug gas/213
- * config/tc-hppa.c (hppa_fix_adjustable): Allow reduction of fake
- labels. Fix warning.
-
-2004-05-28 DJ Delorie <dj at redhat.com>
-
- * config/tc-mn10300.h (tc_fix_adjustable): Define.
- * config/tc-mn10300.c (mn10300_fix_adjustable): Don't adjust debug
- or non-merged symbols.
-
-2004-05-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (remove_marked_resource): Save, clear and
- restore the old slot when inserting srlz.i/srlz.d.
-
-2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * Makefile.am: Regenerate dependecies.
- * Makefile.in: Regenerate.
- * config/tc-sh.c (valid_arch): Make unsigned.
- (preset_target_arch): Likewise.
- (md_begin): Use new architecture flags system.
- (get_specific): Likewise.
- (assemble_ppi): Likewise.
- (md_assemble): Likewise. Also fix error check for bad opcodes.
- (md_parse_option): Likewise. Also generate -isa values according
- to the table in bfd/cpu-sh.c instead of just constants. Also
- allow <arch>-up ISA variants.
- (sh_elf_final_processing): Replace if-else chain with a call to
- sh_find_elf_flags().
-
-2004-05-28 Peter Barada <peter at the-baradas.com>
-
- * config/gc-m68k.c(m68k_ip): Convert mode 5 addressing
- with zero offset into mode 2 addressing to save a word.
-
-2004-05-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (ar_is_in_integer_unit): Removed.
- (ar_is_only_in_integer_unit): New.
- (ar_is_only_in_memory_unit): New.
- (generate_unwind_image): Silence gcc on 32bit host.
- (md_assemble): Use ar_is_only_in_integer_unit instead of
- ar_is_in_integer_unit. Check AR access.
-
-2004-05-27 Peter Barada <peter at the-baradas.com>
-
- * config/tc-m68k.c (md_begin): Sort the opcode table into
- alphabetical order.
- (m68k_compare_opcode): New function to do the sorting.
-
-2004-05-24 Peter Barada <peter at the-baradas.com>
-
- * config/m68k-parse.y(operand): Allow for MAC/EMAC mask
- addressing on MIT style operands.
- * config/m68k-parse.y(yylex): Allow '-&' for predecrement
- w/mask addressing.
- * config/tc-m68k.c(install_operand): Comment 'G' and 'H' type
- operands.
-
-2004-05-23 Alan Modra <amodra at bigpond.net.au>
-
- * expr.c (operand, operator): Don't reject '++' and '--'.
-
-2004-05-20 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (append_insn): Use ISA-encoded addresses in MIPS16
- dwarf tables.
-
-2004-05-17 Adam Nemet <anemet at lnxw.com>
-
- * configure.in: Add ppc-*-lynxos*. Update i386-*-lynxos* to ELF.
- * configure: Regenerate.
-
-2004-05-13 Paul Brook <paul at codesourcery.com>
-
- * dw2gencfi.c (output_cie): Handle dwarf3 format CIE entries.
-
-2004-05-13 Joel Sherrill <joel at oarcorp.com>
-
- * configure.in (or32-*-rtems*): Switch to elf.
- * configure: Regenerate.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-05-11 Nick Clifton <nickc at redhat.com>
-
- * doc/as.texinfo (Section): Document G and T flags to .section
- directive. Document the extra arguments that the G flag
- requires. Document the #tls flag.
-
-2004-05-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * subsegs.c (section_symbol): Create a new section symbol if
- the existing one doesn't match.
- * symbols.c (symbol_set_bfdsym): Don't reset BFD section symbol.
-
-2004-05-07 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (append_insn, mips_emit_delays): Extend -mfix-vr4120
- to cope with VR4181A errata MD(1) and MD(4).
-
-2004-05-07 Brian Ford <ford at vss.fsi.com>
-
- * NEWS: Mention .secrel32 for pe[i]-i386.
-
-2004-05-07 Alexandre Oliva <aoliva at redhat.com>
-
- * config/tc-frv.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
- (HANDLE_ALIGN): New.
-
-2004-05-06 Daniel Jacobowitz <dan at debian.org>
-
- * Makefile.am (DIST_SUBDIRS): Define.
- * aclocal.m4: Regenerate with automake 1.8.4.
- * Makefile.in: Likewise.
- * doc/Makefile.in: Likewise.
-
-2004-05-06 David Mosberger-Tang <davidm at hpl.hp.com>
-
- * config/tc-ia64.c (dot_serialize): Declare.
- (dot_serialize): New function.
- (md_pseudo_table): Add ".serialize.data" and
- ".serialize.instruction" directives.
-
-2004-05-06 Nick Clifton <nickc at redhat.com>
-
- * messages (as_internal_value_out_of_range): Print a message about
- a value being out of range. Be consistent about whether the
- values are printed in decimal or hexadecimal.
- (as_warn_value_out_of_range): Generate a warning message about an
- out of range value.
- (as_bad_value_out_of_range): Generate an error message about an
- out of range value.
- * as.h: Prototype the new functions.
- * config/tc-alpha.c (insert_operand): Use new function.
- * config/tc-arc.c (arc_insert_operand): Likewise.
- * config/tc-mn10200.c (mn10200_insert_operand): Likewise.
- * config/tc-mn10300.c (mn10300_insert_operand): Likewise.
- * config/tc-ppc.c (ppc_insert_operand): Likewise.
- * config/tc-s390.c (s390_insert_operand): Likewise.
- * config/tc-v850.c (v850_insert_operand): Likewise.
-
-2004-05-05 Alexandre Oliva <aoliva at redhat.com>
-
- * configure.in: Set em=linux for frv-*-*linux*.
- * configure: Rebuilt.
- * config/tc-frv.h (TARGET_FORMAT): Use elf32-frvfdpic if...
- (frv_md_fdpic_enabled): New.
- * config/tc-frv.c (frv_md_fdpic_enabled): New.
- (DEFAULT_FDPIC): New.
- (frv_flags): Use DEFAULT_FDPIC.
- (frv_pic_flag): Likewise.
- (OPTION_NOPIC): New.
- (md_longopts): Add -mnopic.
- (md_parse_option): Handle it.
- (md_show_usage): Add -mfdpic and -mnopic.
-
-2004-05-05 Peter Barada <peter at the-baradas.com>
-
- * config/tc-m68k.c: Add find_cf_chip to print list of valid
- chips for invalid coldfire instructions, rename selectors
- for ColdFire sub-variants, add 521x,5249,547x,548x and aliases,
- add current_chip to track which chip is referred to(including save/restore),
- use current_chip to select control registers, not current_arch.
- (md_show_usage): Add new chips.
- * doc/c-m68k.texi: Document new command line switches.
-
-2004-05-05 Jakub Jelinek <jakub at redhat.com>
-
- * tc-s390.h (md_do_align, HANDLE_ALIGN): Remove.
- (NOP_OPCODE): Define.
- (s390_align_code): Remove prototype.
- * tc-s390.c (s390_align_code): Remove.
-
-2004-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (make_unw_section_name): Removed.
- (start_unwind_section): New function.
- (generate_unwind_image): Take const segT instead of const
- char *.
- (dot_handlerdata): Adjusted.
- (dot_endp): Likewise.
-
-2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-elf.c (obj_elf_change_section): Allow the
- ".note.GNU-stack" section has SHF_EXECINSTR.
-
-2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-elf.c (get_section): Return bfd_boolean.
- (obj_elf_change_section): Call bfd_get_section_by_name_if
- instead of bfd_map_over_sections.
-
-2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-elf.c (get_section): New function.
- (obj_elf_change_section): Support multiple sections with same
- name.
-
-2004-04-30 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (create_register_alias): Fix typo checking for
- case sensitive register aliases.
- (co_proc_number): Use error message string in all_reg_maps[]
- array.
- (cp_reg_required_here): Likewise.
- (fp_reg_required_here): Likewise.
-
-2004-04-29 Brian Ford <ford at vss.fsi.com>
-
- * dwarf2dbg.c (dwarf2_finish): Add SEC_DEBUGGING to section flags.
-
-2004-04-28 Chris Demetriou <cgd at broadcom.com>
-
- * config/tc-mips.c (HAVE_32BIT_ADDRESSES, append_insn, macro_build)
- (load_address, macro, mips_ip, md_parse_option)
- (mips_force_relocation, mips_validate_fix, md_apply_fix3)
- (s_change_sec, pic_need_relax, tc_gen_reloc): Remove all
- embedded-PIC handling, and update comments.
- (SWITCH_TABLE): Remove.
- * config/tc-mips.h (DIFF_EXPR_OK): Delete.
- (enum mips_pic_level): Remove EMBEDDED_PIC.
- (EXTERN_FORCE_RELOC): Remove embedded-PIC handling.
- (TC_FORCE_RELOCATION): Update comment.
- * ecoff.c (ecoff_build_lineno): Add comment about some code that
- might be safe to remove now that MIPS embedded-PIC is gone.
-
-2004-04-28 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * config/obj-som.c (obj_som_init_stab_section): Add new arguments in
- call to obj_set_subsection_attributes.
- (obj_som_init_stab_section): Likewise.
- * config/tc-hppa.c (default_subspace_dict): Add comdat field.
- (pa_def_subspaces): Provide comdat default.
- (pa_subspace): Handle new "comdat" parameter. Set SEC_LINK_ONCE and
- not SEC_IS_COMMON if section is comdat, common or dup_common. Update
- calls to create_new_subspace and update_subspace to pass comdat flag.
- (create_new_subspace, update_subspace): Add new comdat argument. Use
- it in calls to obj_set_subsection_attributes.
- * doc/c-hppa.texi (.subspa, .nsubspa): Document new comdat parameter
- and use of comdat, common and dup_comm parameters.
-
-2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/obj-elf.c (obj_elf_change_section): Check if the old
- group name is NULL before comparison.
-
-2004-04-23 Chris Demetriou <cgd at broadcom.com>
-
- * config/tc-mips.h (mips_dwarf2_addr_size): Prototype.
-
-2004-04-23 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (s_mipsset): Set default CPU type for .set mipsN.
-
-2004-04-23 Chris Demetriou <cgd at broadcom.com>
-
- * config/tc-mips.c (md_longopts): Remove -membedded-pic option.
- (OPTION_MEMBEDDED_PIC): Remove.
- (OPTION_TRAP, OPTION_BREAK, OPTION_EB, OPTION_EL)
- (OPTION_FP32, OPTION_GP32, OPTION_CONSTRUCT_FLOATS)
- (OPTION_NO_CONSTRUCT_FLOATS, OPTIONS_FP64, OPTION_GP64)
- (OPTION_RELAX_BRANCH, OPTION_NO_RELAX_BRANCH)
- (OPTION_ELF_BASE): Renumber.
- (md_parse_option): Remove OPTION_MEMBEDDED_PIC handling.
- (md_show_usage): Remove mention of -membedded-pic.
- * doc/as.texinfo: Remove mention of -membedded-pic.
-
-2004-04-23 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Remove.
- * config/tc-mips.c (RDATA_SECTION_NAME, mips_target_format): Remove
- a.out support.
- (md_begin, mips_ip, md_parse_option, s_change_sec, s_option,
- s_abicalls, nopic_need_relax, tc_gen_reloc): Remove uses of
- USE_GLOBAL_POINTER_OPT.
-
-2004-04-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (macro): One more use of load_delay_nop.
-
-2004-04-22 Atsushi Nemoto <anemo at mba.ocn.ne.jp>
-
- * config/tc-mips.c (load_delay_nop): New function.
- (load_address, macro): Use load_delay_nop() to build a nop
- which can be omitted with gpr_interlocks.
-
-2004-04-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (hilo_interlocks, gpr_interlocks,
- cop_interlocks): Remove superfluous CPU entries.
-
-2004-04-22 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (mav_parse_offset): Value must be multiple of 4.
-
-2004-04-22 Peter Barada <peter at the-baradas.com>
-
- * NEWS: Added support for EMAC instructions and MAC/EMAC
- Motorola syntax.
- * config/m68k-parse.h: Add ACC[123], ACCEXT{01,23}, MAC/EMAC
- scale factor tokens, trailing_ampersand to mark mask addressing
- for MAC/EMAC instructions.
- * config/m68k-parse.y: Add options_ampersand clause, '<<',
- '>>'.
- (yylex): Handle '>', '<', and '&' following '+'.
- * config/tc-m68k.c: Set mcfmac/mcfemac on appropriate ColdFire
- architectures in archs[].
- (m68k-ip): Add '4', 'e', 'g', 'i', cases to handle mask addressing
- for MAC/EMAC instructions, ACC[0123], ACCEXT{01,23}, and '<<'/'>>'
- respectively.
- (m68k_ip): Handle trailing '&' on MAC/EMAC insns.
- (install_operand): Fix 'n' case, Add 'F', 'f', 'G', 'H', 'I', ']'
- cases.
- Add EMAC operands to init_table[].
-
-2004-04-22 Bruno De Bus <bdebus at elis.ugent.be>
-
- * config/tc-arm.h (enum mstate): Move here, add MAP_UNDEFINED
- state.
- (TC_SEGMENT_INFO_TYPE): Define to enum mstate.
- * config/tc-arm.c (enum mstate): Delete from here.
- (mapping_state): Remove the static mapstate variable and instead
- store the state in the segment. This allows a per-section mapping
- state. Handle and ignore MAP_UNDEFINED states.
- (arm_elf_change_section): Get the current mapping state from the
- new section.
- (s_ltorg): Set the mapping state to MAP_DATA.
- (arm_cleanup): Use arm_elf_change_section to get the mapping state
- for each pool as it is emitted.
-
-2004-04-22 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.h: Formatting tidy ups.
-
-2004-04-20 Chris Demetriou <cgd at broadcom.com>
-
- * NEWS: Note that MIPS -membedded-pic option is deprecated.
-
-2004-04-20 DJ Delorie <dj at redhat.com>
-
- * config/tc-i386.h [TE_PE] (TC_CONS_FIX_NEW): Define.
- * config/tc-i386.c (md_pseudo_table) [TE_PE]: Add "secrel32".
- [TE_PE] (O_secrel): Define.
- [TE_PE] (x86_pe_cons_fix_new): New.
- [TE_PE] (pe_directive_secrel): Likewise.
- (tc_gen_reloc) [TE_PE]: Support BFD_RELOC_32_SECREL.
-
-2004-04-19 Eric Christopher <echristo at redhat.com>
-
- * config/tc-mips.c (mips_dwarf2_addr_size): Revert part
- of previous patch for fix in gcc.
-
-2004-04-19 Jakub Jelinek <jakub at redhat.com>
-
- * config/tc-xtensa.c (xg_assembler_literal): Fix a typo.
-
-2004-04-19 Nathan Sidwell <nathan at codesourcery.com>
-
- * read.c (do_align): Call md_flush_pending_output, if defined.
-
-2004-04-16 Alan Modra <amodra at bigpond.net.au>
-
- * expr.c (operand): Correct checks for ++ and --.
-
-2004-04-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-generic.c: Add some comments.
-
-2004-04-14 Richard Sandiford <rsandifo at redhat.com>
-
- * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from
- -{no-}mfix-vr4122-bugs.
- * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs.
- (append_insn, mips_emit_delays): Update accordingly.
- (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122.
- (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120.
- (md_parse_option): Update after above changes.
- (md_show_usage): Add -mfix-vr4120.
-
-2004-04-13 Bob Wilson <bob.wilson at acm.org>
-
- * doc/as.texinfo (Sub-Sections): Conditionalize COFF-specific use
- of .section directive; add a reference to the ELF .subsection
- directive.
-
-2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (md_assemble): Fixed infinite loop bug
- in parallel.
-
-2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * Makefile.am: Remove mips from aout targets.
- * Makefile.in: Regenerate.
- * configure.in: Remove mips-dec-bsd* target.
- * configure: Regenerate.
-
-2004-04-07 Alan Modra <amodra at bigpond.net.au>
-
- PR 96
- * config/tc-ppc.c (ppc_elf_suffix): Add valid32 and valid64 fields
- to struct map_bfd. Adjust MAP macro, and define MAP32, MAP64.
- Update "mapping". Restrict some @ modifiers to 32 bit.
-
-2004-04-01 Asgari Jinia <asgarij at kpitcummins.com>
- Dhananjay Deshpande <dhananjayd at kpitcummins.com>
-
- * config/tc-sh.c (dont_adjust_reloc_32): New variable.
- (sh_fix_adjustable): Avoid adjusting BFD_RELOC_32 when
- dont_adjust_reloc_32 is set.
- (md_longopts): Add option -renesas.
- (md_parse_option, md_show_usage): Likewise.
- * doc/c-sh.texi: Likewise.
-
-2004-04-01 Dave Korn <dk at artimi.com>
-
- * config/tc-dlx.c (md_assemble): set fx_no_overflow flag for
- hi16 and lo16 fixS structs.
- (md_assemble): generate bit_fixS for RELOC_DLX_LO16 in
- exactly the same way as for RELOC_DLX_REL16.
- (machine_ip): properly respect LO flag in the_insn and
- output RELOC_DLX_LO16 rather than RELOC_DLX_16.
- (md_apply_fix3): apply RELOC_DLX_LO16.
-
-2004-03-30 Stan Shebs <shebs at apple.com>
-
- Remove long-obsolete MPW support.
- * mpw-config.in, mpw-make.sed, mac-as.r: Remove files.
- * configure.in: Remove mention of ppc-*-mpw* config.
- * configure.in: Likewise.
-
-2004-03-30 Nick Clifton <nickc at redhat.com>
-
- * config/tc-arm.c (meabi_flags): Make its use conditional upon
- OBJ_ELF being defined.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * config/obj-aout.c (obj_aout_type): Remove #ifdef BFD_ASSEMBLER code.
-
-2004-03-23 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (meabi_flags): New variable.
- (arm_parse_eabi): New function.
- (md_begin): Set flags for EABI v3.
- (arm_eabis): Add.
- (arm_long_opts): Add meabi.
- * doc/as.texinfo <ARM>: Document -meabi.
- * doc/c-arm.texi: Ditto.
-
-2004-03-22 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (xtensa_post_relax_hook): Create literal
- tables even when use_literal_section flag is not set.
-
-2004-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * config/tc-sh.c: Remove trailing whitespace.
-
-2004-03-22 Hans-Peter Nilsson <hp at axis.com>
-
- * doc/c-cris.texi (CRIS-Opts): Document --no-mul-bug-abort,
- --mul-bug-abort and the default behavior.
- * config/tc-cris.c (cris_insn_kind): New member CRIS_INSN_MUL.
- (err_for_dangerous_mul_placement): New variable.
- (STATE_MUL, OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): New
- macros.
- (md_cris_relax_table): Have placeholder for STATE_MUL.
- (md_longopts): New options --mul-bug-abort and --no-mul-bug-abort.
- (cris_relax_frag) <case ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: New
- case doing nothing.
- (md_estimate_size_before_relax) <case ENCODE_RELAX (STATE_MUL,
- STATE_BYTE)>: Ditto.
- (md_convert_frag) <ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: Check
- alignment and position of this frag, emit error message if
- suspicious.
- (md_assemble): For a multiply insn and when checking it,
- transform the current frag into a special frag for that purpose.
- (md_parse_option) <case OPTION_MULBUG_ABORT_OFF, case
- OPTION_MULBUG_ABORT_ON>: Handle new options.
-
-2004-03-19 Bob Wilson <bob.wilson at acm.org>
-
- * config/tc-xtensa.c (mark_literal_frags): New function.
- (xtensa_move_literals): Call mark_literal_frags for all literal
- segments, including init and fini literal segments.
- (xtensa_post_relax_hook): Swap use of xt_insn_sec and xt_literal_sec.
-
-2004-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * tc-hppa.c (cons_fix_new_hppa): Check for PC relative base type.
- (pa_comm): Set BSF_OBJECT in symbol flags.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * doc/Makefile.in: Regenerate.
- * config.in: Regenerate.
- * po/gas.pot: Regenerate.
-
-2004-03-18 Nathan Sidwell <nathan at codesourcery.com>
-
- * read.c (read_a_source_file): Use demand_empty_rest_of_line.
- (demand_empty_rest_of_line): Issue an error here.
- (ignore_rest_of_line): Silently skip to end.
- (demand_copy_string): Issue an error, not warning.
- (equals): Likewise.
- * config/obj-elf.c (obj_elf_section_name): Likewise.
- (obj_elf_section): Likewise.
- * config/tc-arc.c (arc_extoper): Remove bogus NULL checks.
- (arc_extinst): Likewise.
- * config/tc-ia64.c (dot_saveb): Use demand_empty_rest_of_line.
- (dot_spill): Likewise.
- (dot_unwabi): Likewise.
- (dot_prologue): Likewise.
-
- * expr.c (operand): Reject ++ and --.
- (operator): Likewise.
-
-2004-03-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * config/tc-sh.c: Include dw2gencfi.h.
- (sh_cfi_frame_initial_instructions): New function.
- (sh_regname_to_dw2regnum): Likewise.
- * config/tc-sh.h (DWARF2_LINE_MIN_INSN_LENGTH): Move to the end of
- file.
- (TARGET_USE_CFIPOP): Define.
- (tc_cfi_frame_initial_instructions): Likewise.
- (tc_regname_to_dw2regnum): Likewise.
- (DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT): Likewise.
- * Makefile.am: Update dependencies.
- * Makefile.in: Regenerate.
-
-2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
-
- * configure.in: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
- * configure: Regenerate.
-
-2004-03-12 Bob Wilson <bob.wilson at acm.org>
-
- * read.c (s_leb128): Call md_flush_pending_output.
-
-2004-03-12 Michal Ludvig <mludvig at suse.cz>
-
- * config/tc-i386.c (output_insn): Handle PadLock instructions.
- * config/tc-i386.h (CpuPadLock): New define.
- (CpuUnknownFlags): Added CpuPadLock.
-
-2004-03-07 Andreas Schwab <schwab at suse.de>
-
- * doc/c-hppa.texi (HPPA Directives): Fix typo.
-
-2004-03-07 Richard Henderson <rth at redhat.com>
-
- * dw2gencfi.c (output_cie): Align length to 4 byte boundary.
- (cfi_finish): Likewise for fde.
-
-2004-03-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (md_assemble): Properly handle NULL
- align_frag.
- (ia64_handle_align): Don't abort if failed to add a stop bit.
-
-2004-03-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
- * configure: Likewise.
- * doc/Makefile.in: Likewise.
-
-2004-03-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (dot_align): New.
- (ia64_do_align): Make it static.
- (md_pseudo_table): Use "dot_align" for "align".
- (ia64_md_do_align): Don't set align_frag here.
- (ia64_handle_align): Add a stop bit to the previous bundle if
- needed.
-
- * config/tc-ia64.h (ia64_do_align): Removed.
-
-2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
- -isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
- (sh_elf_final_processing): Output BFD type sh4_nofpu if that is
- the most general type or the user specifically requested it.
- (md_assemble): Add a new error message for when an instruction
- is understood, but is not allowed due to an -isa option.
-
-2004-03-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (align_frag): New.
- (md_assemble): Set the tc_frag_data field in align_frag for
- IA64_OPCODE_FIRST instructions.
- (ia64_md_do_align): Set align_frag.
- (ia64_handle_align): Add a stop bit if needed.
-
- * config/tc-ia64.h (TC_FRAG_TYPE): New.
- (TC_FRAG_INIT): New.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-frv.c (fr400_audio): New variable.
- (md_parse_option, md_show_usage): Add -mcpu=fr405 and -mcpu=fr450.
- (md_parse_option): Set fr400_audio for -mcpu=fr400 and -mcpu=fr405.
- (target_implements_insn_p): New function.
- (md_assemble): Report an error if the processor doesn't implement
- the instruction.
-
-2004-02-27 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * config/tc-m32r.c (md_longopts): Added -no-bitinst option.
- (md_parse_option): Ditto.
- (OPTION_NO_SPECIAL_M32R): Added.
- (md_show_usage): Document it.
- (enable_speial_m32r): Changed a default value from 0 to 1.
- * doc/c-m32r.texi: Document the -no-bitinst option.
-
-2004-02-27 Nick Clifton <nickc at redhat.com>
-
- * config/tc-sh.c (get_operand): Revert previous delta.
- (tc_gen_reloc): Check for an unknown reloc type before processing
- the addend.
-
-2004-02-27 Hannes Reinecke <hare at suse.de>
-
- * config/tc-s390.c (s390_insn): Correct range check for opcode in
- .insn pseudo operation.
-
-2004-02-27 Anil Paranjpe <anilp1 at kpitcummins.com>
-
- * config/tc-sh.c (get_operand): In case of #Imm, check has been
- added for wrong syntax.
-
-2004-02-26 Eric Christopher <echristo at redhat.com>
-
- * config/tc-mips.c (mips_dwarf2_addr_size): New.
- * config/tc-mips.h (DWARF2_ADDR_SIZE): Use.
-
-2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * config/tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
- nibble types to assembler.
-
-2004-02-25 Fred Fish <fnf at redhat.com>
-
- * config/tc-iq2000.c: Add missing \n\ in multiline string literal.
-
-2004-02-20 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (slot_index): New arg before_relax. Use instead of
- finalize_syms.
- (fixup_unw_records): New arg before_relax. Pass to slot_index.
- (ia64_estimate_size_before_relax): New.
- (ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment.
- (generate_unwind_image): Pass 1 to fixup_unw_records.
- * config/tc-ia64.h (ia64_estimate_size_before_relax): Declare.
- (md_estimate_size_before_relax): Call ia64_estimate_size_before_relax.
-
-2004-02-19 Jakub Jelinek <jakub at redhat.com>
-
- * stabs.c (generate_asm_file): Avoid warning about use of
- uninitialized variable.
-
-2004-02-18 David Mosberger <davidm at hpl.hp.com>
-
- * config/tc-ia64.c (ia64_flush_insns): In addition to prologue,
- body, and endp, allow unwind records which do not have a "t"
- (time/instruction) field.
-
-2004-02-17 Petko Manolov <petkan at nucleusys.com>
-
- * config/tc-arm.c (do_mav_dspsc_1): Correct offset of CRn.
- (do_mav_dspsc_2): Likewise.
- Fix accumulator registers move opcodes.
-
-2004-02-13 Hannes Reinecke <hare at suse.de>
- Jakub Jelinek <jakub at redhat.com>
-
- * dwarf2dbg.c (get_filenum): Do not read beyond allocated memory.
-
-2004-02-10 Steve Ellcey <sje at cup.hp.com>
-
- * config/tc-ia64.h (ia64_frob_symbol): New declaration.
- (tc_frob_symbol): New macro definition.
- * config/tc-ia64.c (ia64_frob_symbol): New routine.
-
-2004-02-09 Daniel Jacobowitz <drow at mvista.com>
-
- * config/tc-arm.c (md_begin): Mark .note.gnu.arm.ident as
- read-only.
-
-2004-02-09 Nathan Sidwell <nathan at codesourcery.com>
-
- * read.h (IGNORE_OPCODE_CASE): Do not define. Replace with ...
- (TC_CASE_SENSITIVE): ... this.
- * read.c: Replace IGNORE_OPCODE_CASE with TC_CASE_SENSITIVE.
- * doc/internals.texi (TC_CASE_SENSITIVE): Document.
-
-2004-02-06 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (dot_endp): Delete call to output_endp.
- (generate_unwind_image): Re-add it here.
-
-2004-02-06 Nathan Sidwell <nathan at codesourcery.com>
-
- * dwarf2dbg.c (DWARF2_ADDR_SIZE): Remove trailing ';'
- * read.h (SKIP_WHITESPACE): Turn into an expression.
- * read.c (read_a_source_file): A pseudo is removed by having a
- NULL handler.
-
-2004-02-05 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (output_endp): New.
- (count_bits): Delete.
- (ia64_flush_insns, process_one_record, optimize_unw_records): Handle
- endp unwind records.
- (fixup_unw_records): Handle endp unwind records. Delete code for
- shortening prologue regions not followed by a body record.
- (dot_endp): Call add_unwind_entry to emit endp unwind record.
- * config/tc-ia64.h (unw_record_type): Add endp.
-
-2004-02-03 James E Wilson <wilson at specifixinc.com>
-
- * config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to
- fill padding bytes with zeroes.
- (emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that
- sets unwind_record slot_number and slot_frag fields.
-
-2004-02-02 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * config/tc-mips.c (add_got_offset_hilo): New function.
- (macro): Use load_register() and add_got_offset_hilo() to load
- constants instead of hardcoding code sequences throughout.
-
-2004-01-28 H.J. Lu <hongjiu.lu at intel.com>
-
- * config/tc-ia64.c (emit_one_bundle): Add proper indentation.
-
-2004-01-26 Bernardo Innocenti <bernie at develer.com>
-
- * config/tc-m68k.h (EXTERN_FORCE_RELOC): Handle m68k-uclinux specially,
- like m68k-elf.
- * config/tc-m68k.c (RELAXABLE_SYMBOL): Use EXTERN_FORCE_RELOC instead
- of hard-coded test for TARGET_OS=elf.
-
-2004-01-24 Chris Demetriou <cgd at broadcom.com>
-
- * config/tc-mips.c (hilo_interlocks): Change definition
- so that MIPS32, MIPS64 and later ISAs are included, along with
- the already-included machines. Update comments.
-
-2004-01-23 Daniel Jacobowitz <drow at mvista.com>
-
- * config/tc-arm.c (tc_gen_reloc): Improve error message for
- undefined local labels.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (load_address, macro): Update comments about
- NewABI GP relaxation.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (macro_build): Remove place and counter arguments.
- (mips_build_lui, macro_build_ldst_constoffset): Likewise.
- (mips16_macro_build, macro_build_jalr): Remove counter argument.
- (set_at, load_register, load_address, move_register): Likewise.
- (load_got_offset, add_got_offset): Likewise.
- Update all calls and tidy accordingly.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (RELAX_ENCODE): Remove WARN argument.
- (RELAX_FIRST, RELAX_SECOND): Turn into 8-bit quantities.
- (RELAX_USE_SECOND): Bump to 0x10000.
- (RELAX_SECOND_LONGER, RELAX_NOMACRO, RELAX_DELAY_SLOT): New flags.
- (mips_macro_warning): New variable.
- (md_assemble): Wrap macro expansion in macro_start() and macro_end().
- (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise.
- (relax_close_frag): Set mips_macro_warning.first_frag. Adjust use
- of RELAX_ENCODE.
- (append_insn): Update mips_macro_warning.sizes.
- (macro_start, macro_warning, macro_end): New functions.
- (macro_build): Don't emit warnings here.
- (macro_build_lui, md_estimate_size_before_relax): ...or here.
- (md_convert_frag): Check for cases where one macro alternative
- needs a warning and the other doesn't. Emit a warning if the
- longer sequence was chosen.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): Remove.
- * config/tc-mips.c (RELAX_ENCODE): Take three arguments: the size of
- the first sequence, the size of the second sequence, and a flag
- that says whether we should warn.
- (RELAX_OLD, RELAX_NEW, RELAX_RELOC[123]): Delete.
- (RELAX_FIRST, RELAX_SECOND): New.
- (mips_relax): New variable.
- (relax_close_frag, relax_start, relax_switch, relax_end): New fns.
- (append_insn): Remove "place" argument. Use mips_relax.sequence
- rather than "place" to check whether we're expanding the second
- alternative of a relaxable macro. Remove redundant check for
- branch relaxation. If generating a normal insn, and there
- is not enough room in the current frag, call relax_close_frag()
- to close it. Update mips_relax.sizes[]. Emit fixups for the
- second version of a relaxable macro. Record the first relaxable
- fixup in mips_relax. Remove tc_gen_reloc workaround.
- (macro_build): Remove all uses of "place". Use mips_relax.sequence
- in the same way as in append_insn.
- (mips16_macro_build): Remove "place" argument.
- (macro_build_lui): As for macro_build. Don't drop the add_symbol
- when generating the second version of a relaxable macro.
- (load_got_offset, add_got_offset): New functions.
- (load_address, macro): Use new relaxation machinery. Remove
- tc_gen_reloc workarounds.
- (md_estimate_size_before_relax): Set RELAX_USE_SECOND if the second
- version of a relaxable macro is needed. Return -RELAX_SECOND if the
- first version is needed.
- (tc_gen_reloc): Remove relaxation handling.
- (md_convert_frag): Go through the fixups for a relaxable macro and
- mark those that belong to the unneeded alternative as done. If the
- second alternative is needed, adjust the fixup addresses to account
- for the deleted first alternative.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * frags.h (frag_room): Declare.
- * frags.c (frag_room): New function.
- * doc/internals.texi: Document it.
-
-2004-01-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * config/tc-mips.c (append_insn): Don't do r3900 interlock
- optimization for -mtune=r3900, as this will break on other CPUs.
-
-2004-01-11 Tom Rix <tcrix at worldnet.att.net>
-
- * config/tc-m68hc11.c (build_indexed_byte): movb and movw cannot
- be relaxed, use fixup.
- (md_apply_fix3): Use 5 bit reloc from movb and movw fixup.
-
-2004-01-19 Jakub Jelinek <jakub at redhat.com>
-
- * config/tc-sparc.c (sparc_ip): Disallow %f32-%f63 for single
- precision operands.
-
-2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * config/tc-mips.c (append_insn): Properly detect variant frags
- that preclude swapping of relaxed branches. Correctly swap
- instructions between frags when dealing with relaxed branches.
-
-2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
- throughout.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
-
-2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
-
- * config/tc-h8300.c (build_bytes): Apply relaxation to bit
- manipulation insns.
-
-2004-01-12 Richard Sandiford <rsandifo at redhat.com>
-
- * config/tc-mips.c (macro_build_jalr): When adding an R_MIPS_JALR
- reloc, reserve space for the delay slot as well as the jalr itself.
-
-2004-01-09 Paul Brook <paul at codesourcery.com>
-
- * config/tc-arm.c (do_vfp_reg2_from_sp2): Rename from do_vfp_sp_reg2.
- (do_vfp_sp2_from_reg2): New function.
+ * config/tc-arm.c: Use arm_feature_set.
+ (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
+ arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
+ fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
+ New variables.
(insns): Use them.
- (do_vfp_dp_from_reg2): Check return values properly.
+ (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
+ md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
+ arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
+ s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
+ feature flags.
+ (arm_legacy_option_table, arm_option_cpu_value_table): New types.
+ (arm_opts): Move old cpu/arch options from here...
+ (arm_legacy_opts): ... to here.
+ (md_parse_option): Search arm_legacy_opts.
+ (arm_cpus, arm_archs, arm_extensions, arm_fpus)
+ (arm_float_abis, arm_eabis): Make const.
-2004-01-08 Ian Lance Taylor <ian at wasabisystems.com>
+2006-01-25 Bob Wilson <bob.wilson at acm.org>
- * config/tc-mips.c (warn_nops): Remove static variable.
- (macro): Remove test of warn_nops.
- (md_shortops): Remove 'n'.
- (md_parse_option): Remove 'n' case.
- (md_show_usage): Remove -n.
- * doc/as.texinfo (Overview): Remove MIPS -n option.
- * doc/c-mips.texi (MIPS Opts): Remove mention -n.
- * NEWS: Mention removal of MIPS -n option.
+ * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
- * config/tc-mips.c (ISA_HAS_COPROC_DELAYS): Remove.
- (cop_interlocks): Check ISA level.
- (cop_mem_interlocks): Define.
- (reg_needs_delay): Check cop_interlocks rather than
- ISA_HAS_COPROC_DELAYS.
- (append_insn): Likewise. Use cop_mem_interlocks rather than
- directly checking mips_opts.isa.
- (mips_emit_delays): Likewise.
+2006-01-21 Jie Zhang <jie.zhang at analog.com>
-2004-01-07 H.J. Lu <hongjiu.lu at intel.com>
+ * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
+ in load immediate intruction.
- * config/tc-ia64.c (unwind): Move next_slot_number and
- next_slot_frag to ...
- (unw_rec_list): Here.
- (free_list_records): Removed.
- (output_unw_records): Likewise.
- (generate_unwind_image): Make it void.
- (alloc_record): Initialize next_slot_number and next_slot_frag.
- (slot_index): Take .org, .space and .align into account.
- (fixup_unw_records): Don't set slot_number to 0. Use
- list->next_slot_number and list->next_slot_frag instead of
- unwind.next_slot_number and unwind.next_slot_frag.
- (ia64_convert_frag): New.
- (generate_unwind_image): Generate a rs_machine_dependent frag
- for unwind record.
- (emit_one_bundle): Use list->next_slot_number and
- list->next_slot_frag instead of unwind.next_slot_number and
- unwind.next_slot_frag.
+2006-01-21 Jie Zhang <jie.zhang at analog.com>
- * config/tc-ia64.h (md_convert_frag): Defined as
- ia64_convert_frag.
- (md_estimate_size_before_relax): Defined as (f)->fr_var.
+ * config/bfin-parse.y (value_match): Use correct conversion
+ specifications in template string for __FILE__ and __LINE__.
+ (binary): Ditto.
+ (unary): Ditto.
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+2006-01-18 Alexandre Oliva <aoliva at redhat.com>
- 2003-12-19 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.h (md_apply_fix3): Don't define.
- * config/tc-frv.c (md_apply_fix3): New. Shift/truncate %hi/%lo
- operands.
- * config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
- 2003-10-07 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.c (line_separator_chars): Add `!'.
- 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.c (md_assemble): Clear insn upfront.
- 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.c (OPTION_FDPIC): New macro.
- (md_longopts): Add mfdpic.
- (md_parse_option): Handle it.
- 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
- * config/tc-frv.c (md_cgen_lookup_reloc) <FRV_OPERAND_D12,
- FRV_OPERAND_S12>: Use reloc type encoded in fix-up.
- (frv_pic_ptr): Parse funcdesc.
+ Introduce TLS descriptors for i386 and x86_64.
+ * config/tc-i386.c (tc_i386_fix_adjustable): Handle
+ BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
+ (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
+ BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
+ displacement bits.
+ (build_modrm_byte): Set up zero modrm for TLS desc calls.
+ (lex_got): Handle @tlsdesc and @tlscall.
+ (md_apply_fix, tc_gen_reloc): Handle the new relocations.
-2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+2006-01-11 Nick Clifton <nickc at redhat.com>
- * doc/as.texinfo: Let texi2pod parse asconfig.texi and
- gasver.texi. Remove duplicate symbol definitions for texi2pod.
+ Fixes for building on 64-bit hosts:
+ * config/tc-avr.c (mod_index): New union to allow conversion
+ between pointers and integers.
+ (md_begin, avr_ldi_expression): Use it.
+ * config/tc-i370.c (md_assemble): Add cast for argument to print
+ statement.
+ * config/tc-tic54x.c (subsym_substitute): Likewise.
+ * config/tc-mn10200.c (md_assemble): Use a union to convert the
+ opindex field of fr_cgen structure into a pointer so that it can
+ be stored in a frag.
+ * config/tc-mn10300.c (md_assemble): Likewise.
+ * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
+ types.
+ * config/tc-v850.c: Replace uses of (int) casts with correct
+ types.
-2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+2006-01-09 H.J. Lu <hongjiu.lu at intel.com>
- * Makefile.am (Makefile): Move the dependency on
- $(BFDDIR)/configure.in to...
- (CONFIG_STATUS_DEPENDENCIES): ... here.
- (AUTOMAKE_OPTIONS): Require automake 1.8.
- * Makefile.in: Regenerate.
- * doc/Makefile.am (BASEDIR, BFDDIR): Define.
- (CONFIG_STATUS_DEPENDENCIES): Add a dependency on
- $(BFDDIR)/configure.in here as well.
- * doc/Makefile.in: Regenerate.
+ PR gas/2117
+ * symbols.c (snapshot_symbol): Don't change a defined symbol.
-2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+2006-01-03 Hans-Peter Nilsson <hp at bitrange.com>
- * Makefile.am (install, install-info, RECURSIVE_TARGETS): Remove.
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * doc/Makefile.am (install, install-info): Remove.
- (install-data-local): A new hook for install-info.
- (AUTOMAKE_OPTIONS): Require automake 1.8.
- * doc/Makefile.in: Regenerate.
+ PR gas/2101
+ * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
+ a local-label reference.
-2004-01-02 Nutan Singh <nutan at kpitcummins.com>
-
- * doc/c-sh.texi: Update description about floating point behavior
- of SH family.
-
-2004-01-02 Bernardo Innocenti <bernie at develer.com>
-
- * configure.in: Add m68k-uClinux target.
- * configure: Regenerate.
-
-For older changes see ChangeLog-0203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/gas/ChangeLog-2004
===================================================================
--- branches/binutils/package/gas/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,2687 @@
+2004-12-29 Alan Modra <amodra at bigpond.net.au>
+
+ PR gas/619
+ * read.c (s_comm_internal): Don't zero end of name until size
+ expression has been parsed.
+
+2004-12-25 Marek Michalkiewicz <marekm at amelek.gda.pl>
+
+ * config/tc-avr.c (mcu_types): Move attiny{13,2313} from avr4 to avr2.
+
+2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c: Support 'bcop' relaxation (dealt as in 'cmp&branch'
+ case).
+
+2004-12-22 Ian Lance Taylor <ian at airs.com>
+
+ * configure.tgt: New.
+ * configure.in: Move setting of cpu_type, fmt, etc., to
+ configure.tgt.
+ * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
+ $(srcdir)/configure.tgt.
+ * configure, Makefile.in: Rebuild.
+
+2004-12-22 Klaus Rudolph <lts-rudolph at gmx.de>
+
+ * config/tc-avr.c: Add support for the new R_AVR_LDI, R_AVR_6 and
+ R_AVR_6_ADIW relocs for the LDI, ADIW/SBIW and LDD/STD
+ instructions.
+ (avr_offset_expression): New function to parse offsets for LDI
+ instructions.
+ (avr_operand): Use it.
+ (md_apply_fix3): Generate the relocs.
+
+2004-12-16 Andrew Stubbs <andrew.stubbs at st.com>
+
+ * config/tc-sh64.c (shmedia_md_apply_fix3): Add missing
+ BFD_RELOC_SH_IMMS10BY8 relocation.
+
+ * config/tc-sh64.c (shmedia_build_Mytes): Emit an error message rather
+ than just ignoring bad code.
+
+2004-12-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-v850.c (handle_lo16): New function.
+ (v850_reloc_prefix): Use it to check lo().
+ (md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET.
+
+2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
+
+ * configure.in: Add s390x-ibm-tpf support.
+ * configure: Regenerate.
+
+2004-12-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Only set type and
+ attributes on new sections. Emit warning when type of re-declared
+ section doesn't match.
+
+2004-12-15 Jan Beulich <jbeulich at novell.com>
+
+ * dw2gencfi.c (dot.cfi.startproc): Clear cur_cfa_offset so
+ '.cfi_startproc simple' doesn't inherit the old value.
+
+2004-12-15 Jan Beulich <jbeulich at novell.com>
+
+ * dw2gencfi.c (output_cfi_insn): Adjust DW_CFA_def_cfa_sf generation
+ to emit a signed and factored offset. Adjust DW_CFA_def_cfa_offset_sf
+ generation to emit a factored offset.
+
+2004-12-10 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * config/tc-mips.c (macro) [M_LA_AB]: Give an error for a offset
+ which is too large in the case of NO_PIC without 64-bit
+ addresses.
+
+ * config/tc-mips.c (mips_in_shared): New static variable.
+ (macro_build_lui): Permit "_gp" if !mips_in_shared.
+ (md_longopts): Add -mshared and -mno-shared.
+ (md_parse_option): Handle OPTION_MSHARED and OPTION_MNO_SHARED.
+ (s_cpload): Implement !mips_in_shared case.
+ (s_cpsetup): Likewise.
+ * doc/c-mips.texi (MIPS Opts): Document -mno-shared.
+ * NEWS: Mention -mno-shared.
+
+2004-12-09 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (s_arm_unwind_fnend): Use R_ARM_PREL31 relocation
+ for function start.
+
+2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * config/tc-mips.c (append_insn): If we emit a nop during a relax
+ sequence, increase the size of the sequence.
+
+ * config/tc-mips.c (mips_cpu_info_table): Change "9000" entry to
+ use CPU_RM9000.
+
+2004-12-07 Ben Elliston <bje at gnu.org>
+
+ * read.c (s_align): Use an align_limit temporary to allay a GCC
+ signed/unsigned comparison warning.
+
+2004-12-01 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (TARG_ENV_HFILES): Add te-armlinuxeabi.h.
+ * configure.in: Use it for arm*-*-linux-gnueabi*.
+ * config/tc-arm.c: Allow emulation file to set FPU_DEFAULT.
+ * config/te-armlinuxeabi.h: New file.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+ * doc/Makefile.in: Regenerated.
+
+2004-12-02 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_switch_section_emit_state): Use subseg_set.
+ (xtensa_restore_emit_state): Likewise.
+
+2004-12-02 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (ALIGN_LIMIT): Define, increasing limit for BFD_ASSEMBLER.
+ (s_align): Use it.
+
+2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
+
+ * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ * Makefile.in: Regenerate.
+
+2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c: Major code cleanup. Remove unused variables and
+ functions, give functions a meaningful name, add comments.
+ (check_range): New function - Replace operand size calculation
+ with range checking.
+ (assemble_insn): Update Algorithm, improve error issuing.
+ (enum op_err): New.
+ (process_label_constant): Bug fix regarding COP_BRANCH_INS relocation
+ handling.
+
+2004-11-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (md_pcrel_from_section): Fixed a pcrel relocte
+ miss between different section in the same module.
+ (tc_gen_reloc): Likewise.
+
+2004-11-25 Theodore A. Roth <troth at openavr.org>
+
+ * gas/config/tc-avr.c (mcu_types): Add support for atmega165,
+ atmega325, atmega3250, atmega645 and atmega6450.
+
+2004-11-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (optimize_imm): Adjust immediates to only those
+ permissible for the selected instruction suffix.
+ (process_suffix): For DefaultSize instructions, suppressing the
+ guessing of a 'q' suffix if the instruction doesn't support it is
+ pointless, because only an 'l' suffix can be guessed in this place.
+
+2004-11-24 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-iq2000.c: Remove support for IQ10 processor.
+ Convert to ISO C90 formatting.
+ * config/tc-iq2000.h: Likewise.
+
+2004-11-23 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-mn10300.c (md_relax_table): More fixes to the offsets
+ in this table. They should be correct now.
+
+2004-11-23 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
+ indicate the MMX extensions added by both SSE and 3DNow!A.
+ (Cpu3dnowA): Declare.
+ (CpuUnknownFlags): Update.
+ * config/tc-i386.c (cpu_sub_arch_name): Declare.
+ (cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
+ neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
+ 3DNow!. Athlon additionally implies 3DNow!A. Several new
+ entries (those starting with a dot are for sub-arch specification).
+ (set_cpu_arch): Handle sub-arch specifications.
+ (parse_insn): Distinguish between instructions not supported because
+ of insufficient CPU features and because of 64-bit mode.
+ * doc/c-i386.texi: Describe enhanced .arch directive.
+
+2004-11-22 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xg_add_opcode_fix): Set fx_no_overflow.
+
+2004-11-22 Bob Wilson <bob.wilson at acm.org>
+
+ * dwarf2dbg.c (dwarf2_finish): Don't write a .debug_line section
+ without a corresponding .debug_info section.
+
+2004-11-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * read.c (potable): Add "error" and "warning".
+ (s_errwarn): New function.
+ * read.h (s_errwarn): Declare.
+ * doc/as.texinfo (Error, Warning): Document .error and .warning.
+
+2004-11-22 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-tic54x.c (tic54x_adjust_symtab): Adjust call to
+ c_dot_file_symbol.
+
+2004-11-19 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes,
+ struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
+
+2004-11-19 Alan Modra <amodra at bigpond.net.au>
+
+ * config/obj-coff.c (c_dot_file_symbol): Add "app" param.
+ (coff_adjust_symtab): Adjust call.
+ (crawl_symbols): Likewise.
+ * config/obj-coff.h (c_dot_file_symbol): Add "app" param.
+ (obj_app_file): Adjust.
+
+2004-11-18 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+
+ * configure.in: Enable bfd_assember for the MAXQ port.
+ * configure: Regenerate.
+
+2004-11-12 Bob Wilson <bob.wilson at acm.org>
+ Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (finish_vinsn): Clear pending instruction if
+ there is a conflict.
+ (check_t1_t2_reads_and_writes): Check for both reads and writes to
+ interfaces that are related as determined by xtensa_interface_class_id.
+
+2004-11-12 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-mn10300.c (md_relax_table): Fix off by one negative
+ offsets for conditional branches.
+
+2004-11-11 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (MAX_IMMED6): Change value to 65.
+
+2004-11-10 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (update_next_frag_state): Always add a NOP if
+ relaxing at the end of a loop. Don't mark frags as UNREACHABLE or
+ MAYBE_UNREACHABLE.
+ (relax_frag_immed): Update call to update_next_frag_state.
+
+2004-11-10 Alan Modra <amodra at bigpond.net.au>
+
+ * obj.h (struct format_ops <app_file>): Add int param.
+ * read.h (s_app_file_string): Likewise.
+ * read.c (s_app_file_string): Likewise.
+ (s_app_file): Adjust s_app_file_string call.
+ * config/tc-mips.c (s_mips_file): Likewise.
+ * config/obj-coff.h (obj_app_file): Add app param.
+ * config/obj-ecoff.h (obj_app_file): Likewise.
+ * config/obj-multi.h (obj_app_file): Likewise.
+ * config/obj-elf.h (elf_file_symbol): Likewise.
+ * config/obj-elf.c (elf_file_symbol): Only emit one file symbol
+ if called for # preprocessor lines.
+
+2004-11-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 528
+ * symbols.c (resolve_symbol_value): Convert weak symbols only
+ for Windows PECOFF.
+ (symbol_equated_reloc_p): Don't equate weaks when relocating
+ only for Windows PECOFF.
+
+2004-11-08 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (print_insn): Check and set insn_addr.
+ * config/tc-crx.h (md_frag_check): Define.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * configure.in: Add support for new target maxq-coff.
+ * configure: Regenerate.
+ * NEWS: Mention new support.
+ * config/tc-maxq.c: New file.
+ * config/tc-maxq.h: New file.
+ * config/obj-coff.h: Add support for maxq-coff.
+
+2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * symbols.c (any_external_name): Define.
+ (resolve_symbol_value): Convert weak symbols.
+ (S_SET_EXTERNAL): Support any_external_name.
+ (S_SET_NAME): Qualify parameter const.
+ (symbol_equated_reloc_p): Equate to weaks when relocating.
+ * symbols.h (S_SET_NAME): Qualfiy parameter const.
+ * tc.h (any_external_name): Declare.
+ * config/obj-coff.c ("coff/pe.h"): Include for BFD
+ assemblers also.
+ (weak_is_altname): Declare and define.
+ (weak_name2altname): Same.
+ (weak_altname2name): Same.
+ (weak_uniquify): Same.
+ (weak_altprefix): Define.
+ (obj_coff_weak): Change .weak syntax and handling.
+ (coff_frob_symbol): Fix PE weak symbol alternates.
+ * config/obj-coff.h (USE_UNIQUE): Define.
+ * config/tc-i386.c (md_apply_fix3): Assume weak symbols
+ are in another segment.
+ (tc_gen_reloc): Remove broken addend hack.
+ doc/as.texinfo: Update.
+
+2004-11-05 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (total_frag_text_expansion): New.
+ (md_estimate_size_before_relax): Use it.
+ (find_address_of_next_align_frag): Likewise.
+
+2004-11-05 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c: Rename argument types.
+ (processing_arg_number): Rename to 'cur_arg_num'.
+ (get_number_of_bits): Rename to 'set_operand_size'.
+ (get_operandtype): Rename to 'parse_operand', totally rewrite.
+ (set_cons_rparams): Rename to 'set_operand', totally rewrite.
+ (set_indexmode_parameters): Remove function, integrate its code into
+ 'set_operand'.
+ (set_operand_size): Get rid of 'Operand Number' function parameter -
+ use global variable 'cur_arg_num' instead.
+ Use a local 'argument' pointer to reference the current argument.
+ (parse_operand): Likewise.
+ (set_operand): Likewise.
+ (process_label_constant): Likewise.
+
+2004-11-04 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c: Remove XTENSA_SECTION_RENAME ifdefs.
+ (add_section_rename): Delete. Inlined into...
+ (build_section_rename): ...here. Use xstrdup instead of strdup.
+ (xtensa_section_rename): Drop "const" from argument and return types.
+ (md_show_usage): Indent to match show_usage().
+ * config/tc-xtensa.h: Remove XTENSA_SECTION_RENAME ifdefs.
+ (tc_canonicalize_section_name): Define.
+ (md_elf_section_rename): Remove unused macro.
+ * doc/as.texinfo (Overview): Document Xtensa --rename-section option.
+ * doc/c-xtensa.texi (Xtensa Options): Likewise.
+ (Frame Directive): Delete.
+
+2004-11-04 Daniel Jacobowitz <dan at debian.org>
+
+ * configure.in: Remove arm-*-oabi and thumb-*-oabi.
+ * config/tc-arm.c (target_oabi): Delete.
+ (md_apply_fix3, elf32_arm_target_format): Remove target_oabi checks.
+ (arm_opts): Remove moabi.
+ * doc/as.texinfo (Overview): Remove documentation of -moabi.
+ * doc/c-arm.texi (ARM Options): Likewise.
+ * configure: Regenerated.
+
+2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+
+ * configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED
+ DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like
+ cris-*-linux-gnu* and crisv32-*-* like cris-*-*.
+ * configure: Regenerate.
+ * config/tc-cris.c (enum cris_archs): New.
+ (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg)
+ (cris_insn_ver_valid_for_arch): New functions.
+ (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10.
+ (cris_arch): New variable.
+ (md_pseudo_table): New pseudo .arch.
+ (err_for_dangerous_mul_placement): Initialize according to
+ DEFAULT_CRIS_ARCH.
+ (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH.
+ All users changed.
+ (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON)
+ (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32)
+ (BRANCH_WF_V32, BRANCH_WB_V32): New.
+ (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after
+ use in md_cris_relax_table.
+ (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32,
+ STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC.
+ Update and improve head comment.
+ (OPTION_PIC): Define in terms of previous option, OPTION_US.
+ (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar.
+ (OPTION_ARCH): New.
+ (md_longopts): New option --march=...
+ (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New
+ macros.
+ (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH.
+ (HANDLE_RELAXABLE): New macro.
+ (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common
+ cases. Check for weak symbols and assume not relaxable. Handle
+ STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON,
+ STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not
+ fragP->fr_symbol.
+ (md_convert_frag): Handle STATE_COND_BRANCH_V32,
+ STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC.
+ (cris_create_short_jump): Adjust for CRISv32.
+ (cris_relax_frag): Handle new states.
+ (md_create_long_jump): Ditto. Emit error for common_v10_v32.
+ (md_begin): Define symbols "..asm.arch.cris.v32",
+ "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and
+ "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch
+ when entering opcode table entry points.
+ (md_assemble): Adjust branch handling for CRISv32. Handle LAPC
+ relaxation. In fix_new_exp call for main insn, pass 1 for pcrel
+ parameter for 8, 16 and 32-bit pc-relative insns and LAPC.
+ (cris_process_instruction): Initialize out_insnp->insn_type to
+ CRIS_INSN_NONE, not CRIS_INSN_NORMAL.
+ <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New
+ cases.
+ <case 'm'>: Check that modified_char == '.'.
+ <invalid operands>: Consume the rest of the line.
+ When operands don't match, skip over subsequent insns with
+ non-matching version specifier but same mnemonic.
+ <immediate constant, case SIZE_SPEC_REG>: Immediate operands for
+ special registers in CRISv32 are always 32 bit long.
+ <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>:
+ New cases.
+ (get_gen_reg): Only recognize "PC" when followed by "+]" for v32
+ and compatible. Recognize "ACR" for v32, unless followed by "+".
+ (get_spec_reg): Consider cris_arch when looking up register.
+ (get_autoinc_prefix_or_indir_op): Don't recognize assignment for
+ v32 or compatible.
+ (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'.
+ (cris_get_expression): Restore input_line_pointer if failing "early".
+ (get_flags): Consider cris_arch and recognize flags accordingly.
+ (branch_disp): Adjust for CRISv32.
+ (gen_cond_branch_32): Similar. Emit error for common_v10_v32.
+ (cris_number_to_imm): Use as_bad_where, not as_bad. Remove
+ related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be
+ resolved. Don't enter zeros in object file for
+ BFD_RELOC_32_PCREL.
+ <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16>
+ <case BFD_RELOC_CRIS_SIGNED_8>: New case.
+ (md_parse_option): Break out "return 1".
+ <OPTION_ARCH> New case.
+ (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET>
+ <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8>
+ <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16>
+ <case BFD_RELOC_32_PCREL>: New cases.
+ Addends for non-zero fx_pcrel are too in fx_offset.
+ (md_show_usage): Show --march=<arch>.
+ (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET.
+ (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too.
+ (s_syntax) <struct syntaxes>: Properly constify member operand.
+ * config/tc-cris.h (TARGET_MACH): Define.
+ (cris_mach): Declare.
+ * doc/as.texinfo (Overview) <CRIS>: Add --march=...
+ * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols.
+ (CRIS-Opts): Document --march=...
+ (CRIS-Pseudos): Document .arch.
+
+2004-11-04 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
+ intel syntax and no register prefix, allow $ in symbol names when
+ intel syntax.
+ (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
+ (intel_float_operand): Add fourth return value indicating math control
+ operations. Make classification more precise.
+ (md_assemble): Complain if memory operand of mov[sz]x has no size
+ specified.
+ (parse_insn): Translate word operands to floating point instructions
+ operating on integers as well as control instructions to short ones
+ as expected by AT&T syntax. Translate 'd' suffix to short one only for
+ floating point instructions operating on non-integer operands.
+ (match_template): Remove fldcw special case. Adjust q-suffix handling
+ to permit it on fild/fistp/fisttp in AT&T mode.
+ (process_suffix): Don't guess DefaultSize insns' suffix from
+ stackop_size for certain floating point control instructions. Guess
+ suffix for branch and [ls][gi]dt based on flag_code. Split error
+ messages for Intel and AT&T syntax, and make the condition more strict
+ for the former. Adjust suppressing of generation of operand size
+ overrides.
+ (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
+ OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
+ more error checking.
+ * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
+ SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.
+
+2004-11-03 Hans-Peter Nilsson <hp at axis.com>
+
+ * symbols.c (colon) [!WORKING_DOT_WORD]: Don't declare
+ md_short_jump_size, md_long_jump_size.
+ * write.c [!WORKING_DOT_WORD]: Ditto.
+ * tc.h [!WORKING_DOT_WORD]: Declare them here. Drop const
+ qualifier.
+ * config/tc-cris.h (md_short_jump_size, md_long_jump_size): Don't
+ declare.
+ * config/tc-cris.c (md_short_jump_size, md_long_jump_size): Drop
+ const qualifier in these definitions.
+ * config/tc-i370.c, config/tc-m68k.c, config/tc-pdp11.c,
+ config/tc-s390.c, config/tc-tahoe.c, config/tc-vax.c: Ditto.
+
+2004-11-02 Nick Clifton <nickc at redhat.com>
+
+ * dwarf2dbg.c (dwarf2_finish): Check for the existence of a file
+ table before deciding to produce a .debug_line section to match up
+ with a user provided .debug_info section.
+
+2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (getreg_image): Bug fix, a return value was
+ mistakenly omitted from CRX_C_REGTYPE and CRX_CS_REGTYPE cases.
+
+2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c: Remove global variable 'post_inc_mode'.
+ (get_flags): New function.
+ (get_number_of_bits): Edit comments, update numeric values to
+ supported sizes.
+ (process_label_constant): Don't support the colon
+ format (SYMBOL:[s|m|l]).
+ (set_cons_rparams): Support argument type 'arg_rbase'.
+ (get_operandtype): Bug fix in 'rbase' operand type parsing.
+ (handle_LoadStor): Bug fix, first handle post-increment mode.
+ (getreg_image): Remove redundant code, update according to latest
+ CRX spec.
+ (print_constant): Bug fix relate to 3-word instructions.
+ (assemble_insn): Bug fix, when matching instructions, verify also
+ instruction type (not only mnemonic).
+ Add various error checking.
+ (preprocess_reglist): Support HI/LO and user registers.
+
+2004-10-25 David Mosberger-Tang <davidm at hpl.hp.com>
+
+ * config/tc-ia64.c (fixup_unw_records): Don't let the "t" value
+ in an epilogue directive go negative.
+
+2004-10-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 474
+ * config/tc-ia64.c (emit_one_bundle): Decrement md.num_slots_in_use
+ after reporting template error during manual bundling. Reported
+ by Michael Dupont, michaelx.dupont at intel.com.
+
+2004-10-25 Daniel Jacobowitz <dan at debian.org>
+
+ * Makefile.am: Run dep-am.
+ * aclocal.m4: Regenerate with automake 1.9.2.
+ * Makefile.in: Regenerate with automake 1.9.2.
+ * doc/Makefile.in: Likewise.
+
+ * config/tc-arm.c: Include "dw2gencfi.h".
+ (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions):
+ New functions.
+ * config/tc-arm.h (TARGET_USE_CFIPOP, DWARF2_DEFAULT_RETURN_COLUMN)
+ (DWARF2_CIE_DATA_ALIGNMENT, tc_regname_to_dw2regnum)
+ (tc_cfi_frame_initial_instructions): Define.
+ (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions):
+ Add prototypes.
+
+2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (assemble_insn): Check unsigned immediate
+ operands validity.
+ Update coprocessor id to be unsigned immediate.
+
+2004-10-18 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * config/tc-i386.c (O_secrel): Delete.
+ (tc_pe_dwarf2_emit_offset): New function.
+ * config/tc-i386.h (O_secrel): Define as O_md1.
+ (TC_DWARF2_EMIT_OFFSET): Define.
+
+2004-10-18 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-xstormy16.c (xstormy16_cons_fix_new): Accept and
+ ignore @fptr() directives for 4-byte fixups.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2004-10-14 Bob Wilson <bob.wilson at acm.org>
+
+ * doc/c-xtensa.texi (Xtensa Options, Absolute Literals Directive):
+ Remove comments about placement of literal pools.
+ (Literal Directive): Update description of literal placement.
+ (Literal Prefix Directive): Remove statement that this does not apply
+ to absolute-mode literals. Describe new section naming scheme.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_frequency_pseudo): Use set_subseg_freq.
+ (is_entry_opcode, is_movi_opcode, is_the_loop_opcode, is_jx_opcode,
+ is_windowed_return_opcode): Delete.
+ (xtensa_frob_label): Use get_subseg_target_freq.
+ (md_assemble): Inline call to is_entry_opcode.
+ (xtensa_handle_align): Inline call to get_frag_is_literal.
+ (relaxation_requirements): Inline call to is_jx_opcode.
+ (emit_single_op): Inline call to is_movi_opcode.
+ (xg_assemble_vliw_tokens): Inline calls to get_frag_is_insn,
+ get_frag_is_no_transform, is_entry_opcode, and
+ set_frag_is_specific_opcode. Use get_subseg_total_freq.
+ (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags,
+ xtensa_fix_close_loop_end_frags, relax_frag_immed, convert_frag_immed):
+ Inline calls to get_frag_is_no_transform.
+ (next_instrs_are_b_retw): Inline call to is_windowed_return_opcode.
+ (xtensa_fix_short_loop_frags): Inline calls to is_the_loop_opcode and
+ get_frag_is_no_transform.
+ (convert_frag_immed_finish_loop): Inline calls to get_expression_value
+ and set_frag_is_no_transform.
+ (get_expression_value): Delete.
+ (subseg_map struct): Rename cur_total_freq to total_freq. Rename
+ cur_target_freq to target_freq.
+ (get_subseg_info): Split out code to create a new map entry into ...
+ (add_subseg_info): ... this new function.
+ (get_last_insn_flags): Check if get_subseg_info succeeded.
+ (set_last_insn_flags): Call add_subseg_info if needed.
+ (get_subseg_total_freq, get_subseg_target_freq, set_subseg_freq): New.
+ (xtensa_reorder_segments): Compute last_sec while counting sections.
+ Remove call to get_last_sec.
+ (get_last_sec): Delete.
+ (cache_literal_section): Inline call to retrieve_literal_seg and its
+ callees, seg_present and add_seg_list.
+ (retrieve_literal_seg, seg_present, add_seg_list): Delete.
+ (get_frag_is_insn, get_frag_is_no_transform,
+ set_frag_is_specific_opcode, set_frag_is_no_transform): Delete.
+ * config/tc-xtensa.h (MAX_SLOTS): Reduce from 31 to 15.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c: Use ISO C90 formatting.
+ * config/tc-xtensa.h: Likewise.
+ * config/xtensa-istack.h: Likewise.
+ * config/xtensa-relax.c: Likewise.
+ * config/xtensa-relax.h: Likewise.
+
+2004-10-12 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (md_begin): Change EF_ARM_EABI_VER3 to
+ EF_ARM_EABI_VER4.
+ (arm_eabis): Ditto.
+ * doc/c-arm.texi: Document that we actually support -meabi=4, not
+ -meabi=3.
+
+2004-10-08 Bob Wilson <bob.wilson at acm.org>
+
+ * doc/as.texinfo (VTableEntry, VTableInherit): Add "directive" to index
+ entries.
+ (Acknowledgements): Use "GAS" instead of AS variable.
+
+2004-10-08 Daniel Jacobowitz <dan at debian.org>
+
+ * config/tc-i386.c: Include "elf/x86-64.h".
+ (i386_elf_section_type): New function.
+ * config/tc-i386.h (md_elf_section_type): Define.
+ (i386_elf_section_type): New prototype.
+
+2004-10-08 Linus Nielsen Feltzing <linus at haxx.se>
+
+ * config/m68k-parse.h (enum m68k_register): New control register,
+ MBAR2 (for MCF5249)
+ * config/tc-m68k.c: Correct control register set for MCF5249.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+ Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (absolute_literals_supported): New global flag.
+ (UNREACHABLE_MAX_WIDTH): Define.
+ (XTENSA_FETCH_WIDTH): Delete.
+ (cur_vinsn, xtensa_fetch_width, xt_saved_debug_type, past_xtensa_end,
+ prefer_const16, prefer_l32r): New global variables.
+ (LIT4_SECTION_NAME): Define.
+ (lit4_state struct): Add lit4_seg_name and lit4_seg fields.
+ (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
+ (frag_flags struct): New.
+ (xtensa_block_info struct): Move from tc-xtensa.h. Add flags field.
+ (subseg_map struct): Add cur_total_freq and cur_target_freq fields.
+ (bitfield, bit_is_set, set_bit, clear_bit): Define.
+ (MAX_FORMATS): Define.
+ (op_placement_info struct, op_placement_table): New.
+ (O_pltrel, O_hi16, O_lo16): Define.
+ (directiveE enum): Rename directive_generics to directive_transform.
+ Delete directive_relax. Add directive_schedule,
+ directive_absolute_literals, and directive_last_directive.
+ (directive_info): Rename "generics" to "transform". Delete "relax".
+ Add "schedule" and "absolute-literals".
+ (directive_state): Adjust entries to match changes in directive_info.
+ (xtensa_relax_statesE, RELAX_IMMED_MAXSTEPS): Move to tc-xtensa.h.
+ (xtensa_const16_opcode, xtensa_movi_opcode, xtensa_movi_n_opcode,
+ xtensa_l32r_opcode, xtensa_nop_opcode, xtensa_rsr_lcount_opcode): New.
+ (xtensa_j_opcode, xtensa_rsr_opcode): Delete.
+ (align_only_targets, software_a0_b_retw_interlock,
+ software_avoid_b_j_loop_end, maybe_has_b_j_loop_end,
+ software_avoid_short_loop, software_avoid_close_loop_end,
+ software_avoid_all_short_loops, specific_opcode): Delete.
+ (warn_unaligned_branch_targets): New.
+ (workaround_a0_b_retw, workaround_b_j_loop_end, workaround_short_loop,
+ workaround_close_loop_end, workaround_all_short_loops): Default FALSE.
+ (option_[no_]link_relax, option_[no_]transform,
+ option_[no_]absolute_literals, option_warn_unaligned_targets,
+ option_prefer_l32r, option_prefer_const16, option_target_hardware):
+ New enum values.
+ (option_[no_]align_only_targets, option_literal_section_name,
+ option_text_section_name, option_data_section_name,
+ option_bss_section_name, option_eb, option_el): Delete.
+ (md_longopts): Add entries for: [no-]transform, [no-]absolute-literals,
+ warn-unaligned-targets, prefer-l32r, prefer-const16, [no-]link-relax,
+ and target-hardware. Delete entries for [no-]target-align-only,
+ literal-section-name, text-section-name, data-section-name, and
+ bss-section-name.
+ (md_parse_option): Handle new options and remove old ones. Accept but
+ ignore [no-]density options. Warn for [no-]generics and [no-]relax
+ and treat them as [no-]transform.
+ (md_show_usage): Add new options and remove old ones.
+ (xtensa_setup_hw_workarounds): New.
+ (md_pseudo_table): Change "word" entry to use xtensa_elf_cons. Add
+ "long", "short", "loc" and "frequency" entries.
+ (use_generics): Rename to ...
+ (use_transform): ... this function. Add past_xtensa_end check.
+ (use_longcalls): Add past_xtensa_end check.
+ (code_density_available, can_relax): Delete.
+ (do_align_targets): New.
+ (get_directive): Accept dashes in directive names. Warn about
+ [no-]generics and [no-]relax directives and treat them as
+ [no-]transform.
+ (xtensa_begin_directive): Call md_flush_pending_output only for some
+ directives. Check for directives inside instruction bundles. Warn
+ about deprecated ".begin literal" usage. Warn and ignore [no-]density
+ directives. Handle new directives. Check generating_literals flag
+ for literal_prefix.
+ (xtensa_end_directive): Check for directives inside instruction
+ bundles. Warn and ignore [no-]density directives. Handle new
+ directives. Call xtensa_set_frag_assembly_state.
+ (xtensa_loc_directive_seen, xtensa_dwarf2_directive_loc,
+ xtensa_dwarf2_emit_insn): New.
+ (xtensa_literal_position): Call md_flush_pending_output. Do not check
+ use_literal_section flag.
+ (xtensa_literal_pseudo): Call md_flush_pending_output. Handle absolute
+ literals. Use xtensa_elf_cons to parse the expression.
+ (xtensa_literal_prefix): Do not check use_literal_section. Support
+ ".lit4" sections for absolute literals. Change prefix convention to
+ replace ".text" (or ".t" in a linkonce section). No need to call
+ subseg_set.
+ (xtensa_frequency_pseudo, xtensa_elf_cons, xtensa_elf_suffix): New.
+ (expression_end): Handle closing braces and colons.
+ (PLT_SUFFIX, plt_suffix): Delete.
+ (expression_maybe_register): Use new xtensa-isa.h functions. Use
+ xtensa_elf_suffix instead of checking for plt suffix, and handle O_lo16
+ and O_hi16 expressions as well.
+ (tokenize_arguments): Handle closing braces and colons.
+ (parse_arguments): Use new xtensa-isa.h functions. Handle "invisible"
+ operands and paired register syntax.
+ (get_invisible_operands): New.
+ (xg_translate_sysreg_op): Handle new Xtensa LX RSR/WSR/XSR syntax. Use
+ new xtensa-isa.h functions.
+ (xtensa_translate_old_userreg_ops, xtensa_translate_zero_immed): New.
+ (xg_translate_idioms): Check if inside bundle. Use use_transform.
+ Handle new Xtensa LX RSR/WSR/XSR syntax. Remove code to widen density
+ instructions. Use xtensa_translate_zero_immed.
+ (operand_is_immed, operand_is_pcrel_label): Delete.
+ (get_relaxable_immed): Use new xtensa-isa.h functions.
+ (get_opcode_from_buf): Add slot parameter. Use new xtensa-isa.h
+ functions.
+ (xtensa_print_insn_table, print_vliw_insn): New.
+ (is_direct_call_opcode): Use new xtensa-isa.h functions.
+ (is_call_opcode, is_loop_opcode, is_conditional_branch_opcode,
+ is_branch_or_jump_opcode): Delete.
+ (is_movi_opcode, decode_reloc, encode_reloc, encode_alt_reloc): New.
+ (opnum_to_reloc, reloc_to_opnum): Delete.
+ (xtensa_insnbuf_set_operand, xtensa_insnbuf_get_operand): Use new
+ xtensa-isa.h functions. Operate on one slot of an instruction.
+ (xtensa_insnbuf_set_immediate_field, is_negatable_branch,
+ xg_get_insn_size): Delete.
+ (xg_get_build_instr_size): Use xg_get_single_size.
+ (xg_is_narrow_insn, xg_is_single_relaxable_insn): Update calls to
+ xg_build_widen_table. Use xg_get_single_size.
+ (xg_get_max_narrow_insn_size): Delete.
+ (xg_get_max_insn_widen_size, xg_get_max_insn_widen_literal_size,
+ xg_is_relaxable_insn): Update calls to xg_build_widen_table. Use
+ xg_get_single_size.
+ (xg_build_to_insn): Record the loc field. Handle OP_OPERAND_HI16U and
+ OP_OPERAND_LOW16U. Check xg_valid_literal_expression.
+ (xg_expand_to_stack, xg_expand_narrow): Update calls to
+ xg_build_widen_table. Use xg_get_single_size.
+ (xg_immeds_fit): Use new xtensa-isa.h functions. Update call to
+ xg_check_operand.
+ (xg_symbolic_immeds_fit): Likewise. Also handle O_lo16 and O_hi16, and
+ treat weak symbols conservatively.
+ (xg_check_operand): Use new xtensa-isa.h functions.
+ (is_dnrange): Delete.
+ (xg_assembly_relax): Inline previous calls to tinsn_copy.
+ (xg_finish_frag): Specify separate relax states for the frag and slot0.
+ (is_branch_jmp_to_next, xg_add_branch_and_loop_targets): Use new
+ xtensa-isa.h functions.
+ (xg_instruction_matches_option_term, xg_instruction_matches_or_options,
+ xg_instruction_matches_options): New.
+ (xg_instruction_matches_rule): Handle O_register expressions. Call
+ xg_instruction_matches_options.
+ (transition_rule_cmp): New.
+ (xg_instruction_match): Update call to xg_build_simplify_table.
+ (xg_build_token_insn): Record loc fields.
+ (xg_simplify_insn): Check is_specific_opcode field and
+ density_supported flag.
+ (xg_expand_assembly_insn): Skip checking code_density_available. Use
+ new xtensa-isa.h functions. Call use_transform instead of can_relax.
+ (xg_assemble_literal): Add error handling for O_big. Call
+ record_alignment. Handle O_pltrel.
+ (xg_valid_literal_expression): New.
+ (xg_assemble_literal_space): Add slot parameter. Remove call to
+ set_expr_symbol_offset. Add call to record_alignment. Update call to
+ xg_finish_frag.
+ (xg_emit_insn): Delete.
+ (xg_emit_insn_to_buf): Add format parameter. Update calls to
+ xg_add_opcode_fix and xtensa_insnbuf_to_chars.
+ (xg_add_opcode_fix): Change opcode parameter to tinsn and add format
+ and slot parameters. Handle new "alternate" relocations for absolute
+ literals and CONST16 instructions. Check for bad uses of O_lo16 and
+ O_hi16. Use new xtensa-isa.h functions.
+ (xg_assemble_tokens): Delete.
+ (is_register_writer): Use new xtensa-isa.h functions.
+ (is_bad_loopend_opcode): Check for xtensa_rsr_lcount_opcode instead of
+ old-style RSR from LCOUNT.
+ (next_frag_opcode): Delete.
+ (next_frag_opcode_is_loop, next_frag_format_size, frag_format_size,
+ update_next_frag_state): New.
+ (update_next_frag_nop_state): Delete.
+ (next_frag_pre_opcode_bytes): Use next_frag_opcode_is_loop.
+ (xtensa_mark_literal_pool_location): Check use_literal_section flag and
+ the state of the absolute-literals directive. Add calls to
+ record_alignment and xtensa_set_frag_assembly_state. Call
+ xtensa_switch_to_non_abs_literal_fragment instead of
+ xtensa_switch_to_literal_fragment.
+ (build_nop): New.
+ (assemble_nop): Use build_nop. Update call to xtensa_insnbuf_to_chars.
+ (get_expanded_loop_offset): Change check for undefined opcode to an
+ assertion.
+ (xtensa_set_frag_assembly_state, relaxable_section,
+ xtensa_find_unmarked_state_frags, xtensa_find_unaligned_branch_targets,
+ xtensa_find_unaligned_loops, xg_apply_tentative_value): New.
+ (md_begin): Update call to xtensa_isa_init. Initialize linkrelax to 1.
+ Set lit4_seg_name. Call xg_init_vinsn. Initialize new global opcodes.
+ Call init_op_placement_info_table and xtensa_set_frag_assembly_state.
+ (xtensa_init_fix_data): New.
+ (xtensa_frob_label): Reset label symbol to the current frag. Check
+ do_align_targets and generating_literals flag. Propagate frequency
+ info to new alignment frag. Call xtensa_set_frag_assembly_state.
+ (xtensa_unrecognized_line): New.
+ (xtensa_flush_pending_output): Check if inside a bundle. Add a call
+ to xtensa_set_frag_assembly_state.
+ (error_reset_cur_vinsn): New.
+ (md_assemble): Remove check for literal frag. Remove call to
+ istack_init. Call use_transform instead of use_generics. Parse
+ explicit instruction format specifiers. Move code for
+ a0_b_retw_interlock workaround to xg_assemble_vliw_tokens. Call
+ error_reset_cur_vinsn on errors. Add call to get_invisible_operands.
+ Add dwarf2_where call. Remote automatic alignment for ENTRY
+ instructions. Move call to xtensa_clear_insn_labels to the end.
+ Rearrange to handle bundles.
+ (xtensa_cons_fix_new): Delete.
+ (xtensa_handle_align): New.
+ (xtensa_frag_init): Call xtensa_set_frag_assembly_state. Remove
+ assignment to is_no_density field.
+ (md_pcrel_from): Use new xtensa-isa.h functions. Use decode_reloc
+ instead of reloc_to_opnum. Handle "alternate" relocations.
+ (xtensa_force_relocation, xtensa_check_inside_bundle,
+ xtensa_elf_section_change_hook): New.
+ (xtensa_symbol_new_hook): Delete.
+ (xtensa_fix_adjustable): Check for difference of symbols with an
+ offset. Check for external and weak symbols.
+ (md_apply_fix3): Remove cases for XTENSA_OP{0,1,2} relocs.
+ (md_estimate_size_before_relax): Return expansion for the first slot.
+ (tc_gen_reloc): Handle difference of symbols by producing
+ XTENSA_DIFF{8,16,32} relocs and by writing the value of the difference
+ into the output. Handle new XTENSA_SLOT*_OP relocs by storing the
+ tentative values into the output when linkrelax is set.
+ (XTENSA_PROP_SEC_NAME): Define.
+ (xtensa_post_relax_hook): Call xtensa_find_unmarked_state_frags.
+ Create literal tables only if using literal sections. Create new
+ property tables instead of old instruction tables. Check for unaligned
+ branch targets and loops.
+ (finish_vinsn, find_vinsn_conflicts, check_t1_t2_reads_and_writes,
+ new_resource_table, clear_resource_table, resize_resource_table,
+ resources_available, reserve_resources, release_resources,
+ opcode_funcUnit_use_unit, opcode_funcUnit_use_stage,
+ resources_conflict, xg_find_narrowest_format, relaxation_requirements,
+ bundle_single_op, emit_single_op, xg_assemble_vliw_tokens): New.
+ (xtensa_end): Call xtensa_flush_pending_output. Set past_xtensa_end
+ flag. Update checks for workaround options. Call
+ xtensa_mark_narrow_branches and xtensa_mark_zcl_first_insns.
+ (xtensa_cleanup_align_frags): Add special case for branch targets.
+ Check for and mark unreachable frags.
+ (xtensa_fix_target_frags): Remove use of align_only_targets flag.
+ Use RELAX_LOOP_END_BYTES in special case for negatable branch at the
+ end of a zero-overhead loop body.
+ (frag_can_negate_branch): Handle instructions with multiple slots.
+ Use new xtensa-isa.h functions
+ (xtensa_mark_narrow_branches, is_narrow_branch_guaranteed_in_range,
+ xtensa_mark_zcl_first_insns): New.
+ (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags): Error if
+ transformations are disabled.
+ (next_instrs_are_b_retw): Use new xtensa-isa.h functions. Handle
+ multislot instructions.
+ (xtensa_fix_close_loop_end_frags, xtensa_fix_short_loop_frags):
+ Likewise. Also error if transformations are disabled.
+ (unrelaxed_frag_max_size): New.
+ (unrelaxed_frag_min_insn_count, unrelax_frag_has_b_j): Use new
+ xtensa-isa.h functions.
+ (xtensa_sanity_check, is_empty_loop, is_local_forward_loop): Use
+ xtensa_opcode_is_loop instead of is_loop_opcode.
+ (get_text_align_power): Replace as_fatal with assertion.
+ (get_text_align_fill_size): Iterate instead of using modulus when
+ use_nops is false.
+ (get_noop_aligned_address): Assert that this is for a machine-dependent
+ RELAX_ALIGN_NEXT_OPCODE frag. Use next_frag_opcode_is_loop,
+ xg_get_single_size, and frag_format_size.
+ (get_widen_aligned_address): Rename to ...
+ (get_aligned_diff): ... this function. Add max_diff parameter.
+ Remove handling of rs_align/rs_align_code frags. Use
+ next_frag_format_size, get_text_align_power, get_text_align_fill_size,
+ next_frag_opcode_is_loop, and xg_get_single_size. Compute max_diff
+ and pass it back to caller.
+ (xtensa_relax_frag): Use relax_frag_loop_align. Add code for new
+ RELAX_SLOTS, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN,
+ RELAX_FILL_NOP, and RELAX_UNREACHABLE frag types. Check relax_seen.
+ (relax_frag_text_align): Rename to ...
+ (relax_frag_loop_align): ... this function. Assume loops can only be
+ in the first slot of an instruction.
+ (relax_frag_add_nop): Use assemble_nop instead of constructing an OR
+ instruction. Remove call to frag_wane.
+ (relax_frag_narrow): Rename to ...
+ (relax_frag_for_align): ... this function. Extend to handle
+ RELAX_FILL_NOP and RELAX_UNREACHABLE, as well as RELAX_SLOTS with
+ RELAX_NARROW for the first slot.
+ (find_address_of_next_align_frag, bytes_to_stretch): New.
+ (future_alignment_required): Use find_address_of_next_align_frag and
+ bytes_to_stretch. Look ahead to subsequent frags to make smarter
+ alignment decisions.
+ (relax_frag_immed): Add format, slot, and estimate_only parameters.
+ Check if transformations are enabled for b_j_loop_end workaround.
+ Use new xtensa-isa.h functions and handle multislot instructions.
+ Update call to xg_assembly_relax.
+ (md_convert_frag): Handle new RELAX_SLOTS, RELAX_UNREACHABLE,
+ RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, and RELAX_FILL_NOP
+ frag types.
+ (convert_frag_narrow): Add segP, format and slot parameters. Call
+ convert_frag_immed for branch instructions. Adjust calls to
+ tinsn_from_chars, tinsn_immed_from_frag, and xg_emit_insn_to_buf. Use
+ xg_get_single_size and xg_get_single_format.
+ (convert_frag_fill_nop): New.
+ (convert_frag_immed): Add format and slot parameters. Handle multislot
+ instructions and use new xtensa-isa.h functions. Update calls to
+ tinsn_immed_from_frag and xg_assembly_relax. Check if transformations
+ enabled for b_j_loop_end workaround. Use build_nop instead of
+ assemble_nop. Check is_specific_opcode flag. Check for unreachable
+ frags. Use xg_get_single_size. Handle O_pltrel.
+ (fix_new_exp_in_seg): Remove check for old plt flag.
+ (convert_frag_immed_finish_loop): Update calls to tinsn_from_chars and
+ xtensa_insnbuf_to_chars. Call tinsn_immed_from_frag. Change check
+ for loop opcode to an assertion. Mark all frags up to the end of the
+ loop as not transformable.
+ (get_last_insn_flags, set_last_insn_flags): Use get_subseg_info.
+ (get_subseg_info): New.
+ (xtensa_move_literals): Call xtensa_set_frag_assembly_state. Add null
+ check for dest_seg.
+ (xtensa_switch_to_literal_fragment): Rewrite to handle absolute
+ literals and use xtensa_switch_to_non_abs_literal_fragment otherwise.
+ (xtensa_switch_to_non_abs_literal_fragment): New.
+ (cache_literal_section): Add is_code parameter and pass it through to
+ retrieve_literal_seg.
+ (retrieve_literal_seg): Add is_code parameter and use it to set the
+ flags on the literal section. Handle case where head parameter is 0.
+ (get_frag_is_no_transform, set_frag_is_specific_opcode,
+ set_frag_is_no_transform): New.
+ (xtensa_create_property_segments): Add end_property_function parameter
+ and pass it through to add_xt_block_frags. Call bfd_get_section_flags
+ and skip SEC_DEBUGGING and !SEC_ALLOC sections.
+ (xtensa_create_xproperty_segments, section_has_xproperty): New.
+ (add_xt_block_frags): Add end_property_function parameter and call it
+ if it is non-zero. Call xtensa_frag_flags_init.
+ (xtensa_frag_flags_is_empty, xtensa_frag_flags_init,
+ get_frag_property_flags, frag_flags_to_number,
+ xtensa_frag_flags_combinable, xt_block_aligned_size,
+ xtensa_xt_block_combine, add_xt_prop_frags,
+ init_op_placement_info_table, opcode_fits_format_slot,
+ xg_get_single_size, xg_get_single_format): New.
+ (istack_push): Inline call to tinsn_copy.
+ (tinsn_copy): Delete.
+ (tinsn_has_invalid_symbolic_operands): Handle O_hi16 and O_lo16 and
+ CONST16 opcodes. Handle O_big, O_illegal, and O_absent.
+ (tinsn_has_complex_operands): Handle O_hi16 and O_lo16.
+ (tinsn_to_insnbuf): Use xg_get_single_format and new xtensa-isa.h
+ functions. Handle invisible operands.
+ (tinsn_to_slotbuf): New.
+ (tinsn_check_arguments): Use new xtensa-isa.h functions.
+ (tinsn_from_chars): Add slot parameter. Rewrite using xg_init_vinsn,
+ vinsn_from_chars, and xg_free_vinsn.
+ (tinsn_from_insnbuf): New.
+ (tinsn_immed_from_frag): Add slot parameter and handle multislot
+ instructions. Handle symbol differences.
+ (get_num_stack_text_bytes): Use xg_get_single_size.
+ (xg_init_vinsn, xg_clear_vinsn, vinsn_has_specific_opcodes,
+ xg_free_vinsn, vinsn_to_insnbuf, vinsn_from_chars, expr_is_register,
+ get_expr_register, set_expr_symbol_offset_diff): New.
+ * config/tc-xtensa.h (MAX_SLOTS): Define.
+ (xtensa_relax_statesE): Move from tc-xtensa.c. Add
+ RELAX_CHECK_ALIGN_NEXT_OPCODE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_SLOTS,
+ RELAX_FILL_NOP, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, and
+ RELAX_NONE types.
+ (RELAX_IMMED_MAXSTEPS): Move from tc-xtensa.c.
+ (xtensa_frag_type struct): Add is_assembly_state_set,
+ use_absolute_literals, relax_seen, is_unreachable, is_specific_opcode,
+ is_align, is_text_align, alignment, and is_first_loop_insn fields.
+ Replace is_generics and is_relax fields by is_no_transform field.
+ Delete is_text and is_longcalls fields. Change text_expansion and
+ literal_expansion to arrays of MAX_SLOTS entries. Add arrays of
+ per-slot information: literal_frags, slot_subtypes, slot_symbols,
+ slot_sub_symbols, and slot_offsets. Add fr_prev field.
+ (xtensa_fix_data struct): New.
+ (xtensa_symfield_type struct): Delete plt field.
+ (xtensa_block_info struct): Move definition to tc-xtensa.h. Add
+ forward declaration here.
+ (xt_section_type enum): Delete xt_insn_sec. Add xt_prop_sec.
+ (XTENSA_SECTION_RENAME): Undefine.
+ (TC_FIX_TYPE, TC_INIT_FIX_DATA, TC_FORCE_RELOCATION, NO_PSEUDO_DOT,
+ tc_unrecognized_line, md_do_align, md_elf_section_change_hook,
+ HANDLE_ALIGN, TC_LINKRELAX_FIXUP, SUB_SEGMENT_ALIGN): Define.
+ (TC_CONS_FIX_NEW, tc_symbol_new_hook): Delete.
+ (unit_num_copies_func, opcode_num_units_func,
+ opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func): New.
+ (resource_table struct): New.
+ * config/xtensa-istack.h (MAX_INSN_ARGS): Increase from 6 to 10.
+ (TInsn struct): Add keep_wide, loc, fixup, record_fix, subtype,
+ literal_space, symbol, sub_symbol, offset, and literal_frag fields.
+ (tinsn_copy): Delete prototype.
+ (vliw_insn struct): New.
+ * config/xtensa-relax.c (insn_pattern_struct): Add options field.
+ (widen_spec_list): Add option conditions for density and boolean
+ instructions. Add expansions using CONST16 and conditions for using
+ CONST16 vs. L32R. Use new Xtensa LX RSR/WSR syntax. Add entries for
+ predicted branches.
+ (simplify_spec_list): Add option conditions for density instructions.
+ Add entry for NOP instruction.
+ (append_transition): Add cmp function pointer parameter and use it to
+ insert the new entry in order.
+ (operand_function_LOW16U, operand_function_HI16U): New.
+ (xg_has_userdef_op_fn, xg_apply_userdef_op_fn): Handle
+ OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
+ (enter_opname, split_string): Use xstrdup instead of strdup.
+ (init_insn_pattern): Initialize new options field.
+ (clear_req_or_option_list, clear_req_option_list,
+ clone_req_or_option_list, clone_req_option_list, parse_option_cond):
+ New.
+ (parse_insn_pattern): Parse option conditions.
+ (transition_applies): New.
+ (build_transition): Use new xtensa-isa.h functions. Fix incorrectly
+ swapped last arguments in calls to append_constant_value_condition.
+ Call clone_req_option_list. Add warning about invalid opcode.
+ Handle LOW16U and HI16U function names.
+ (build_transition_table): Add cmp parameter and use it in calls to
+ append_transition. Use new xtensa-isa.h functions. Check
+ transition_applies before adding entries.
+ (xg_build_widen_table, xg_build_simplify_table): Add cmp parameter and
+ pass it through to build_transition_table.
+ * config/xtensa-relax.h (ReqOrOptionList, ReqOrOption, ReqOptionList,
+ ReqOption, transition_cmp_fn): New types.
+ (OpType enum): Add OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
+ (transition_rule struct): Add options field.
+ * doc/as.texinfo (Overview): Update Xtensa options.
+ * doc/c-xtensa.texi (Xtensa Options): Delete --[no-]density,
+ --[no-]relax, and --[no-]generics options. Update descriptions of
+ --text-section-literals and --[no-]longcalls. Add
+ --[no-]absolute-literals and --[no-]transform.
+ (Xtensa Syntax): Add description of syntax for FLIX instructions.
+ Remove use of "generic" and "specific" terminology for opcodes.
+ (Xtensa Registers): Generalize the syntax description to include
+ user-defined register files.
+ (Xtensa Automatic Alignment): Update.
+ (Xtensa Branch Relaxation): Mention limitation of unconditional jumps.
+ (Xtensa Call Relaxation): Linker can now remove most of the overhead.
+ (Xtensa Directives): Remove confusing rules about precedence.
+ (Density Directive, Relax Directive): Delete.
+ (Schedule Directive): New.
+ (Generics Directive): Rename to ...
+ (Transform Directive): ... this node.
+ (Literal Directive): Update for absolute literals. Missing
+ literal_position directive is now an error.
+ (Literal Position Directive): Update for absolute literals.
+ (Freeregs Directive): Delete.
+ (Absolute Literals Directive): New.
+ (Frame Directive): Minor editing.
+ * Makefile.am (DEPTC_xtensa_elf, DEPOBJ_xtensa_elf, DEP_xtensa_elf):
+ Update dependencies.
+ * Makefile.in: Regenerate.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn): Use fix_new rather than fix_new_exp
+ to build the second and third fixups for a composite relocation.
+ (macro_read_relocs): New function.
+ (macro_build): Use it.
+ (s_cpsetup): Pass all three composite relocation codes to macro_build.
+ Simplify fragging code accordingly.
+ (s_gpdword): Use fix_new rather than fix_new_exp for the second part
+ of the composite relocation. Set fx_tcbit in both fixups.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn): Set fx_tcbit for composite relocs.
+ (md_apply_fix3): Don't treat composite relocs as done.
+
+2004-10-07 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (macro_expand_body): When ELF, use .LL rather than LL as
+ prefix for symbol names generated from the LOCAL macro directive.
+
+ * dw2gencfi.c (select_cie_for_fde): When separating CIE out from
+ FDE, treat a DW_CFA_remember_state as we do a DW_CFA_advance_loc.
+
+2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (preprocess_reglist): Handle Co-processor
+ Special registers.
+ (md_assemble): Add error checking for Co-Processor instructions.
+ (get_cinv_parameters): Add 'b' option to invalidate the
+ branch-target cache.
+
+2004-10-05 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (unwind): New variable.
+ (vfp_sp_encode_reg): New function.
+ (vfp_sp_reg_required_here): Use it.
+ (vfp_sp_reg_list, vfp_dp_reg_list): Remove.
+ (vfp_parse_reg_list): New function.
+ (s_arm_unwind_fnstart, s_arm_unwind_fnend, s_arm_unwind_cantunwind,
+ s_arm_unwind_personality, s_arm_unwind_personalityindex,
+ s_arm_unwind_handlerdata, s_arm_unwind_save, s_arm_unwind_movsp,
+ s_arm_unwind_pad, s_arm_unwind_setfp, s_arm_unwind_raw): New
+ functions.
+ (md_pseudo_table): Add them.
+ (do_vfp_reg2_from_sp2): Use vfp_parse_reg_list and vfp_sp_encode_reg.
+ (do_vfp_sp2_from_reg2, vfp_sp_ldstm, vfp_dp_ldstm): Ditto.
+ (set_section, add_unwind_adjustsp, flush_pending_unwind,
+ finish_unwind_opcodes, start_unwind_section, create_unwind_entry,
+ require_hashconst, add_unwind_opcode): New functions.
+ * doc/c-arm.texi: Document unwinding opcodes.
+ * NEWS: Mention the new feature.
+
+2004-10-04 Eric Christopher <echristo at redhat.com>
+
+ * config/tc-mips.c (md_apply_fix3): Remove erroneous assert.
+
+2004-10-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ppc.c (md_apply_fix3): Call S_SET_THREAD_LOCAL for
+ TLS relocations.
+ * config/tc-s390.c (md_apply_fix3): Likewise.
+ * config/tc-sparc.c (md_apply_fix3): Likewise.
+
+2004-10-01 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (arm_elf_section_type): New function.
+ (arm_elf_change_section): Set section link for exidx sections.
+ * config/tc-arm.h (arm_elf_section_type): Add prototype.
+ (md_elf_section_type): Define.
+
+2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
+
+ * config/tc-pdp11.c (md_apply_fix3): Change to sign of the SOB
+ instruction's offset.
+
+2004-10-01 Adam Nemet <anemet at lnxw.com>
+
+ * (TARGET_FORMAT): Remove LynxOS COFF definition.
+
+2004-10-01 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
+
+ * config/tc-arc.c (tc_gen_reloc): Don't assume fixP->fx_addsy is an
+ asymbol *, instead use symbol_get_bfdsym.
+
+2004-09-30 Linus Nielsen Feltzing <linus at haxx.se>
+
+ * config/tc-m68k.c (select_control_regs): Add mcf5249.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_smi, do_nop): New functions.
+ (insns): Add ARMv6ZK instructions.
+ (md_apply_fix3): Handle BFD_RELOC_ARM_SMI.
+ (tc_gen_reloc): Ditto.
+ (arm_cpus): Add mpcore and arm1176.
+ (arm_archs): Add armv6{k,z,zk}.
+ * doc/c-arm.texi: Document new cores and architectures.
+
+2004-09-30 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c: Use ISO C90 formatting.
+
+2004-09-30 Vladimir Ivanov <vladitx at nucleusys.com>
+
+ * config/tc-arm.c (mav_reg_required_here): Allow REG_TYPE_CN
+ as alternative when REG_TYPE_MVF, REG_TYPE_MVD, REG_TYPE_MVFX or
+ REG_TYPE_MVDX is expected.
+
+2004-09-29 Marc Bevand <m.bevand at gmail.com>
+
+ * doc/c-i386.texi (i386-Mnemonics): Fix typo.
+
+2004-09-21 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (ENCODED_PSP_OFFSET): New.
+ (output_rp_psprel, output_pfs_psprel, output_preds_psprel,
+ output_spill_base, output_unat_psprel, output_lc_psprel,
+ output_fpsr_psprel, output_priunat_psprel, output_bsp_psprel,
+ output_bsprestore_psprel, output_rnat_psprel, output_spill_psprel,
+ output_spill_psprel_p): Use it.
+
+2004-09-20 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (handle_LoadStor): New function.
+ Handle load/stor unique instructions before parsing.
+
+2004-09-17 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (s_arm_rel31): New funciton.
+ (md_pseudo_table): Add .rel31.
+ (md_apply_fix3): Handle BFD_RELOC_ARM_TARGET2,
+ BFD_RELOC_32_PCREL and BFD_RELOC_ARM_PREL31.
+ (tc_gen_reloc): Handle BFD_RELOC_ARM_PREL31 and BFD_RELOC_ARM_TARGET2.
+ (arm_fix_adjustable): Return 0 for BFD_RELOC_ARM_TARGET2.
+ (arm_parse_reloc): Add (target2).
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2004-09-14 Hideki IWAMOTO <h-iwamoto at kit.hi-ho.ne.jp>
+
+ * config/tc-mmix.c [!LLONG_MIN]: Correct #elsif to #elif.
+ [!LLONG_MAX]: Ditto.
+
+2004-09-13 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c: Rename RELABS to TARGET1.
+
+2004-09-13 Alan Modra <amodra at bigpond.net.au>
+
+ * messages.c (as_internal_value_out_of_range): Cast values passed
+ to as_bad_where or as_warn_where to proper type.
+
+2004-09-11 Theodore A. Roth <troth at openavr.org>
+
+ * config/tc-avr.c: Add support for
+ atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
+
+2004-09-09 Alan Modra <amodra at bigpond.net.au>
+
+ * dw2gencfi.c (select_cie_for_fde): When separating CIE out
+ from FDE, treat a CFI_escape as we do a DW_CFA_advance_loc.
+
+2004-09-08 Paul Brook <paul at codesourcery.com>
+
+ * config/obj-elf.c (obj_elf_section_type): Handle init_array,
+ fini_array and preinit_array section types.
+ * config/tc-ia64.c (ia64_elf_section_type): Remove init_array
+ and fini_array.
+ * doc/as.texinfo: Document extra section types.
+
+2004-09-02 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (TARG_ENV_HFILES): Add te-symbian.h.
+ * Makefile.in: Regenerated.
+ * configure.in: Set em for arm*-*-symbianelf*.
+ * configure: Regenerated.
+ * config/tc-arm.c (elf32_arm_target_format): Use Symbian target
+ vectors when appropriate.
+ * config/te-symbian.h: New file.
+
+2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c (gettrap): Exception vector can be case
+ insensitive.
+ (process_label_constant): Fix a 32-bit displacement bug in branch
+ instructions.
+ (get_operandtype) : Bug fix, wrong operand was used.
+ (process_label_constant): Initialize relocation type to
+ BFD_RELOC_NONE
+
+2004-09-01 Richard Earnshaw < reanrsha at arm.com>
+
+ * tc-arm.c (arm_cpus, arm_fpus): Allow <cpu>-s as well as <cpu>s
+ for synthesizable cores.
+
+ * doc/c-arm.texi (ARM Options): Document canonical names of CPUs.
+
+2004-08-25 Dmitry Diky <diwil at spec.ru>
+
+ * config/tc-msp430.c: Clean-up the code.
+ (md_relax_table): New relax table.
+ (mcu_types): Sort MCU types.
+ (md_pseudo_table): Add .profiler pseudo handler.
+ (pow2value): New function.
+ (msp430_profiler): New function.
+ (msp430_operands): Add new insns handlers.
+ (msp430_srcoperand): Add register operand handler, allow complex
+ expressions.
+ (md_estimate_size_before_relax): Rewritten.
+ (md_convert_frag): Rewritten.
+ (msp430_relax_frag): New function.
+ * config/tc-msp430.h (md_relax_frag): define macro
+ * doc/c-msp430.texi: Update information.
+
+2004-08-24 Nick Clifton <nickc at redhat.com>
+
+ * as.c (std_shortopts): Allow -g to take an optional argument.
+ (parse_args): Pass any switch starting with -g on to the backend
+ for parsing.
+
+2004-08-18 Mark Mitchell <mark at codesourcery.com>
+
+ * configure.in (arm*-*-symbianelf*): New target.
+ (arm*-*-eabi*): Likewise.
+ * configure: Regenerated.
+
+2004-08-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+ * config/tc-mips.c (append_insn): Handle delay slots in branch likely
+ correctly.
+
+2004-08-18 Jakub Jelinek <jakub at redhat.com>
+
+ * config/tc-ia64.c (start_unwind_section): Add linkonce_empty
+ argument, don't do anything if current section is not
+ .gnu.linkonce.t.* and linkonce_empty is set.
+ (generate_unwind_image, dot_endp): Adjust callers, call
+ start_unwind_section (*, 1) if nothing will be put into the
+ section.
+
+2004-08-17 Nick Clifton <nickc at redhat.com>
+
+ * as.c (MD_DEBUG_FORMAT_SELECTOR): Provide default definition.
+ (show_usage): Add -g.
+ (std_longopts): Add --gen-debug. Alpha sort the table.
+ (parse_args): Print an error message if a switch is not handled.
+ Handle the -g switch, calling md_debug_format_selector() if
+ necessary.
+ * NEWS: Mention new feature.
+ * doc/as.texinfo: Document new switch.
+ * doc/internals.texi: Document behaviour of md_parse_option.
+
+ * config/tc-arm.c (md_parse_option): Do not issue an error message
+ if the switch is not recognised.
+ * config/tc-m68k.c (md_parse_option): Likewise.
+ * config/tc-pdp11.c (md_parse_option): Likewise.
+ * config/tc-v850.c (md_parse_option): Likewise.
+
+ * as.h: Fix up formatting.
+ * tc.h: Likewise.
+
+2004-08-16 Nick Clifton <nickc at redhat.com>
+
+ * macro.c (macro_set_alternate): Use ISO C90 formatting.
+
+ * configure.in: Sort architecture based tables alphabetically.
+ * configure: Regenerate.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (tc_ppc_regname_to_dw2regnum <regnames>): Replace
+ { "cc", 68 }, with { "cr", 70 }.
+
+2004-08-13 Jan Beulich <jbeulich at novell.com>
+ Nick Clifton <nickc at redhat.com>
+
+ * as.c: Add and handle new --alternate command line option.
+ * macro.c (macro_set_alternate): New.
+ * macro.h (macro_set_alternate): Declare.
+ * read.c: Add and handle new .altmacro and .noaltmacro directives.
+ * doc/as.texinfo: Document new command line option and pseudo-ops
+ as well as insert documentation originating from gasp about
+ alternate macro syntax.
+ * NEWS: Mention new command line option and pseudo-ops.
+
+2004-08-10 Mark Mitchell <mark at codesourcery.com>
+
+ * expr.c (operand): Handle the "~", "-", and "!" operators applied
+ to bignums.
+
+2004-08-06 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix3, tc_gen_reloc, arm_parse_reloc):
+ Handle new relocations.
+ * include/elf/arm.h (elf_arm_reloc_type): Add new EABI relocations.
+
+2004-08-05 Bob Wilson <bob.wilson at acm.org>
+
+ * write.c (relax_segment): Use was_address instead of address when
+ setting fr_fix field for align frag due to backwards .org.
+
+2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+
+ Introduce SH2a support.
+ 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
+ * config/tc-sh.c (get_specific): Change arch_sh2a_up to
+ arch_sh2a_nofpu_up.
+ 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
+ * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
+ 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
+ * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
+ to end of conditional expression.
+ 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
+ * config/tc-sh.c: Add sh2a-nofpu support.
+ 2003-12-29 DJ Delorie <dj at redhat.com>
+ * tc-sh.c: Add sh2a support.
+ (parse_reg): Add tbr.
+ (parse_at): Support @@(disp,tbr).
+ (get_specific): Support sh2a opcodes.
+ (insert4): New, for 4 byte relocs.
+ (build_Mytes): Support sh2a opcodes.
+ (md_apply_fix3_Mytes): Support sh2a opcodes.
+ 2003-12-02 Michael Snyder <msnyder at redhat.com>
+ * config/tc-sh.c (md_parse_option): Handle sh2a.
+ (sh_elf_final_processing): Ditto.
+
+2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
+
+ * config/tc-hppa.h (TARGET_FORMAT): Set to "elf32-hppa-netbsd"
+ for TE_NetBSD.
+
+2004-07-27 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_frob_file_before_adjust): Warn if .toc too big.
+ (ppc_arch): Expand comment.
+
+2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * config/tc-crx.c: Support evaluating the difference between two
+ symbols.
+ * config/tc-crx.h: Likewise.
+
+2004-07-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (start_unwind_section): Set the linked-to
+ section.
+ (ia64_elf_section_change_hook): Set the linked-to section for
+ SHT_IA_64_UNWIND.
+
+2004-07-26 Dmitry Diky <diwil at spec.ru>
+
+ * config/tc-msp430.c: Add new subtargets: msp430x1610,
+ msp430x1611, msp430x1612, msp430x415, msp430x417, msp430xG437,
+ msp430xG438, msp430xG439.
+
+2004-07-25 Daniel Jacobowitz <dan at debian.org>
+
+ * doc/as.texinfo (Section, PushSection): Correct documentation
+ for ELF.
+
+2004-07-21 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (optimize_imm): Adjust immediates to only those
+ permissible for the selected instruction suffix.
+ (match_template): Don't permit 64-bit general purpose operands in
+ 32-bit mode.
+ (finalize_imm): Permit 64-bit immediates.
+ (build_modrm_byte): Don't treat 32-bit addressing in 64-bit mode
+ specially except for the width of the used base and/or index
+ registers. For 32-bit displacements, use sign-extended
+ relocations only when using 64-bit addressing.
+ Force zero displacement on rip-relative addressing when there is
+ no other displacement.
+ (i386_index_check): Don't treat 32-bit addressing in 64-bit mode
+ specially except for the width of the used base and/or index
+ registers.
+ (parse_register): Disallow Reg64 registers in 32-bit mode.
+
+ * config/tc-i386.c: For DefaultSize instructions, don't guess a 'q'
+ suffix if the instruction doesn't support it.
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (append_insn): Handle constant expressions with
+ no associated relocation.
+ (mips_ip): Cancel the expression after use for the Q format
+ specifier.
+ (parse_relocation): Return no relocation for unsupported
+ operators.
+ (my_getSmallExpression): Return no relocation if no relocation
+ operators are used.
+
+2004-07-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/obj-som.c (adjust_stab_sections): Add prototype.
+ (obj_som_compiler, obj_som_version, obj_som_copyright,
+ adjust_stab_sections): Add ATTRIBUTE_UNUSED to unused arguments.
+ * config/tc-hppa.c (update_subspace): Likewise.
+ (is_defined_subspace): Amplify comment.
+ * config/obj-som.h (som_frob_file): Add prototype.
+
+2004-07-19 Christopher Faylor <cgf at timesys.com>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * subsegs.c (section_symbol): Don't create a new segment when
+ existing segment is undefined.
+
+2004-07-16 Richard Earnshaw <rearnsha at arm.com>
+
+ * config/tc-arm.c: Include include/opcode/arm.h.
+ (ARM_EXT_*, ARM_ARCH_*, ARM_ANY, ARM_ALL, COPROC_ANY): Delete.
+ (FPU_FPA_EXT_* FPU_VFP_EXT_*, FPU_ANY, FPU_NONE, FPU_MAVERICK): Delete.
+ (FPU_ARCH_*): Delete.
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2004-07-15 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Accept armbe as a big-endian arm configuration.
+ * configure: Regenerate.
+
+2004-07-13 Thomas Nystrom <thn at saeab.se>
+
+ * config/tc-i386.c (T_SHIFTOP): New constant.
+ (intel_e05_1): Handle '&', '|' and T_SHIFTOP.
+ (intel_el1): Handle '~'.
+ (intel_get_token): Handle '<>', '&', '|' and '~'.
+
+2004-07-13 Nick Clifton <nickc at redhat.com>
+
+ (md_assemble): Remove spurious newline from end of as_bad error
+ message.
+ (intel_e05_1): Likewise.
+ (intel_e11): Likewise.
+ (intel_match_token): Likewise.
+
+2004-07-11 Andreas Schwab <schwab at suse.de>
+
+ * config/tc-m68k.c: Convert to C90. Remove redundant
+ declarations. Indentation fixup.
+ [M68KCOFF]: Include "obj-coff.h" instead of declaring
+ obj_coff_section ourselves.
+
+2004-07-09 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (default_big_endian): New.
+ (dot_byteorder, md_begin): Use it.
+ (md_parse_option): Set it.
+
+2004-07-09 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Change sh-sybmian-elf to sh-*-symbianelf.
+ * configure: Regenerate.
+ * NEWS: Change sh-sybmian-elf to sh-*-symbianelf.
+ * config/tc-sh.c (sh_elf_final_processing): Use renamed version of
+ sh_find_elf_flags if necessary.
+
+2004-07-08 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): If the full addend is
+ going to be split into more than one in-place addend, return 0
+ for relocations against mergeable sections. Associate comments
+ with code.
+
+2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * Makefile.am (CPU_TYPES): Add crx.
+ (TARGET_CPU_CFILES): Add config/tc-crx.c.
+ (TARGET_CPU_HFILES): Add config/tc-crx.h.
+ (DEPTC_crx_elf): New target.
+ (DEPOBJ_crx_elf): Likewise.
+ (DEP_crx_elf): Likewise.
+ * Makefile.in: Regenerate.
+ * configure.in: Add crx* target.
+ * configure: Regenerate.
+ * config/tc-crx.c: New file.
+ * config/tc-crx.h: New file.
+ * NEWS: Mention new target.
+
+2004-07-06 Nick Clifton <nickc at redhat.com>
+
+ * config.in: Undefine TARGET_SYMBIAN by default.
+ * configure.in:
+ * configure: Regenerate. Add sh-symbian-elf target. If
+ selected define TARGET_SYMBIAN.
+ * config/tc-sh.h (TARGET_FORMAT): Select a Symbian target
+ format if TARGET_SYMBIAN has been defined.
+
+ * output-file.c (output_file_create): Report the target format
+ chosen when bfd_openw reports that it is invalid.
+
+ * config/obj-coff.c (coff_pseudo_table): Only define the weak
+ pseudo for BFD based assemblers.
+
+2004-07-05 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ gas:
+ * config/tc-sh.c (md_assemble): Change isspace to ISSPACE.
+ (md_parse_option): Remove redundant -isa testing.
+ Make bfd_arch variable const.
+ (md_show_usage): Make bfd_arch variable const.
+
+2004-07-03 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Check and set insn_addr.
+ * config/tc-ia64.h (md_frag_check): Define.
+
+2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * config/obj-coff.c (obj_coff_weak): New .weak syntax for PE weak
+ externals.
+ * doc/as.texinfo (Weak): Document PE weak symbols.
+
+2004-07-03 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (HAVE_IN_PLACE_ADDENDS): New macro.
+ (reloc_needs_lo_p): Only return true if HAVE_IN_PLACE_ADDENDS.
+ (mips_frob_file): Rework so that only a single pass through the
+ relocs is needed. Allow %lo()s to have higher offsets than their
+ corresponding %hi()s or %got()s.
+
+2004-07-02 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (md_apply_fix3:BFD_RELOC_ARM_IMMEDIATE): Do not
+ allow values which have come from undefined symbols.
+ Always consider this fixup to have been processed as a reloc
+ cannot be generated for it.
+
+2004-07-02 Alan Modra <amodra at bigpond.net.au>
+
+ * frags.h (struct frag): Add has_code and insn_addr fields.
+ * write.c (cvt_frag_to_fill): Invoke md_frag_check.
+ * config/tc-ppc.c (md_assemble): Check and set insn_addr.
+ * config/tc-ppc.h (md_frag_check): Define.
+
+2004-06-28 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * doc/Makefile.am (info): Rename goal to...
+ (info-local): ... this, to preserve implicit dependencies.
+ * doc/Makefile.in: Regenerate with automake 1.8.5.
+
+2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (md_convert_frag): Changed for @PLT.
+ (m32r_cgen_record_fixup_exp): Changed for @GOTOFF, @GOT.
+ (m32r_fix_adjustable): Changed for @GOTOFF, @GOT, @PLT.
+ (tc_gen_reloc): Likewise.
+ (m32r_end_of_match): Add for @GOTOFF, @GOT, @PLT.
+ (m32r_parse_name): Likewise.
+ (m32r_cgen_parse_fix_exp): Likewise.
+ * config/tc-m32r.h (md_parse_name): Define for @GOTOFF, @GOT, @PLT.
+ (O_PIC_reloc): Likewise.
+ (TC_CGEN_PARSE_FIX_EXP): Likewise..
+ * cgen.c (gas_cgen_parse_operand): Add TC_CGEN_PARSE_FIX_EXP
+ for @GOTOFF, @GOT, @PLT.
+
+2004-06-21 Jan Beulich <jbeulich at novell.com>
+
+ * gas/symbols.c: While discarding ordinary local absolute symbols
+ when --strip-local-absolute is in effect, retain file symbols.
+
+2004-06-20 Andreas Schwab <schwab at suse.de>
+
+ * config/tc-m68k.c (mri_chip): Replace current_chip, not augment.
+ (md_parse_option): Likewise.
+
+2004-06-17 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c: Deal with LEX_QM the same way as with LEX_AT.
+ * config/te-netware.h: New file.
+ * config/te-ppcnw.h: Delete: Obsolete.
+ * configure.in: Eliminate ill NetWare targets. Make generic
+ NetWare target use proper emulation.
+ * Makefile.am: Eliminate reference to obsolete te-ppcnw.h, add
+ reference to new te-netware.h.
+ * configure: Regenerate.
+ * Makefile.in: Regenerate.
+
+2004-06-15 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * config/tc-s390.c (s390_insn): Avoid incorrect signed/unsigned
+ comparison in .insn pseudo operation.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * config/obj-coff.c (coff_adjust_section_syms): Use
+ bfd_get_section_size instead of bfd_get_section_size_before_reloc.
+ (coff_frob_section): Likewise.
+ * config/tc-mips.c (md_apply_fix3): Likewise.
+ * config/obj-elf.c (elf_frob_file): Use bfd_set_section_size.
+ (elf_frob_file_after_relocs): Likewise.
+
+2004-06-10 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (log2): Rename to exact_log2.
+ (pa_next_subseg): Delete unused function.
+ (create_new_space): Mark unused arguments with ATTRIBUTE_UNUSED.
+ (create_new_subspace): Likewise.
+
+ Bug gas/213
+ * config/tc-hppa.c (hppa_fix_adjustable): Allow reduction of fake
+ labels. Fix warning.
+
+2004-05-28 DJ Delorie <dj at redhat.com>
+
+ * config/tc-mn10300.h (tc_fix_adjustable): Define.
+ * config/tc-mn10300.c (mn10300_fix_adjustable): Don't adjust debug
+ or non-merged symbols.
+
+2004-05-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (remove_marked_resource): Save, clear and
+ restore the old slot when inserting srlz.i/srlz.d.
+
+2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * Makefile.am: Regenerate dependecies.
+ * Makefile.in: Regenerate.
+ * config/tc-sh.c (valid_arch): Make unsigned.
+ (preset_target_arch): Likewise.
+ (md_begin): Use new architecture flags system.
+ (get_specific): Likewise.
+ (assemble_ppi): Likewise.
+ (md_assemble): Likewise. Also fix error check for bad opcodes.
+ (md_parse_option): Likewise. Also generate -isa values according
+ to the table in bfd/cpu-sh.c instead of just constants. Also
+ allow <arch>-up ISA variants.
+ (sh_elf_final_processing): Replace if-else chain with a call to
+ sh_find_elf_flags().
+
+2004-05-28 Peter Barada <peter at the-baradas.com>
+
+ * config/gc-m68k.c(m68k_ip): Convert mode 5 addressing
+ with zero offset into mode 2 addressing to save a word.
+
+2004-05-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (ar_is_in_integer_unit): Removed.
+ (ar_is_only_in_integer_unit): New.
+ (ar_is_only_in_memory_unit): New.
+ (generate_unwind_image): Silence gcc on 32bit host.
+ (md_assemble): Use ar_is_only_in_integer_unit instead of
+ ar_is_in_integer_unit. Check AR access.
+
+2004-05-27 Peter Barada <peter at the-baradas.com>
+
+ * config/tc-m68k.c (md_begin): Sort the opcode table into
+ alphabetical order.
+ (m68k_compare_opcode): New function to do the sorting.
+
+2004-05-24 Peter Barada <peter at the-baradas.com>
+
+ * config/m68k-parse.y(operand): Allow for MAC/EMAC mask
+ addressing on MIT style operands.
+ * config/m68k-parse.y(yylex): Allow '-&' for predecrement
+ w/mask addressing.
+ * config/tc-m68k.c(install_operand): Comment 'G' and 'H' type
+ operands.
+
+2004-05-23 Alan Modra <amodra at bigpond.net.au>
+
+ * expr.c (operand, operator): Don't reject '++' and '--'.
+
+2004-05-20 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn): Use ISA-encoded addresses in MIPS16
+ dwarf tables.
+
+2004-05-17 Adam Nemet <anemet at lnxw.com>
+
+ * configure.in: Add ppc-*-lynxos*. Update i386-*-lynxos* to ELF.
+ * configure: Regenerate.
+
+2004-05-13 Paul Brook <paul at codesourcery.com>
+
+ * dw2gencfi.c (output_cie): Handle dwarf3 format CIE entries.
+
+2004-05-13 Joel Sherrill <joel at oarcorp.com>
+
+ * configure.in (or32-*-rtems*): Switch to elf.
+ * configure: Regenerate.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-05-11 Nick Clifton <nickc at redhat.com>
+
+ * doc/as.texinfo (Section): Document G and T flags to .section
+ directive. Document the extra arguments that the G flag
+ requires. Document the #tls flag.
+
+2004-05-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * subsegs.c (section_symbol): Create a new section symbol if
+ the existing one doesn't match.
+ * symbols.c (symbol_set_bfdsym): Don't reset BFD section symbol.
+
+2004-05-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn, mips_emit_delays): Extend -mfix-vr4120
+ to cope with VR4181A errata MD(1) and MD(4).
+
+2004-05-07 Brian Ford <ford at vss.fsi.com>
+
+ * NEWS: Mention .secrel32 for pe[i]-i386.
+
+2004-05-07 Alexandre Oliva <aoliva at redhat.com>
+
+ * config/tc-frv.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
+ (HANDLE_ALIGN): New.
+
+2004-05-06 Daniel Jacobowitz <dan at debian.org>
+
+ * Makefile.am (DIST_SUBDIRS): Define.
+ * aclocal.m4: Regenerate with automake 1.8.4.
+ * Makefile.in: Likewise.
+ * doc/Makefile.in: Likewise.
+
+2004-05-06 David Mosberger-Tang <davidm at hpl.hp.com>
+
+ * config/tc-ia64.c (dot_serialize): Declare.
+ (dot_serialize): New function.
+ (md_pseudo_table): Add ".serialize.data" and
+ ".serialize.instruction" directives.
+
+2004-05-06 Nick Clifton <nickc at redhat.com>
+
+ * messages (as_internal_value_out_of_range): Print a message about
+ a value being out of range. Be consistent about whether the
+ values are printed in decimal or hexadecimal.
+ (as_warn_value_out_of_range): Generate a warning message about an
+ out of range value.
+ (as_bad_value_out_of_range): Generate an error message about an
+ out of range value.
+ * as.h: Prototype the new functions.
+ * config/tc-alpha.c (insert_operand): Use new function.
+ * config/tc-arc.c (arc_insert_operand): Likewise.
+ * config/tc-mn10200.c (mn10200_insert_operand): Likewise.
+ * config/tc-mn10300.c (mn10300_insert_operand): Likewise.
+ * config/tc-ppc.c (ppc_insert_operand): Likewise.
+ * config/tc-s390.c (s390_insert_operand): Likewise.
+ * config/tc-v850.c (v850_insert_operand): Likewise.
+
+2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * configure.in: Set em=linux for frv-*-*linux*.
+ * configure: Rebuilt.
+ * config/tc-frv.h (TARGET_FORMAT): Use elf32-frvfdpic if...
+ (frv_md_fdpic_enabled): New.
+ * config/tc-frv.c (frv_md_fdpic_enabled): New.
+ (DEFAULT_FDPIC): New.
+ (frv_flags): Use DEFAULT_FDPIC.
+ (frv_pic_flag): Likewise.
+ (OPTION_NOPIC): New.
+ (md_longopts): Add -mnopic.
+ (md_parse_option): Handle it.
+ (md_show_usage): Add -mfdpic and -mnopic.
+
+2004-05-05 Peter Barada <peter at the-baradas.com>
+
+ * config/tc-m68k.c: Add find_cf_chip to print list of valid
+ chips for invalid coldfire instructions, rename selectors
+ for ColdFire sub-variants, add 521x,5249,547x,548x and aliases,
+ add current_chip to track which chip is referred to(including save/restore),
+ use current_chip to select control registers, not current_arch.
+ (md_show_usage): Add new chips.
+ * doc/c-m68k.texi: Document new command line switches.
+
+2004-05-05 Jakub Jelinek <jakub at redhat.com>
+
+ * tc-s390.h (md_do_align, HANDLE_ALIGN): Remove.
+ (NOP_OPCODE): Define.
+ (s390_align_code): Remove prototype.
+ * tc-s390.c (s390_align_code): Remove.
+
+2004-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (make_unw_section_name): Removed.
+ (start_unwind_section): New function.
+ (generate_unwind_image): Take const segT instead of const
+ char *.
+ (dot_handlerdata): Adjusted.
+ (dot_endp): Likewise.
+
+2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Allow the
+ ".note.GNU-stack" section has SHF_EXECINSTR.
+
+2004-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-elf.c (get_section): Return bfd_boolean.
+ (obj_elf_change_section): Call bfd_get_section_by_name_if
+ instead of bfd_map_over_sections.
+
+2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-elf.c (get_section): New function.
+ (obj_elf_change_section): Support multiple sections with same
+ name.
+
+2004-04-30 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (create_register_alias): Fix typo checking for
+ case sensitive register aliases.
+ (co_proc_number): Use error message string in all_reg_maps[]
+ array.
+ (cp_reg_required_here): Likewise.
+ (fp_reg_required_here): Likewise.
+
+2004-04-29 Brian Ford <ford at vss.fsi.com>
+
+ * dwarf2dbg.c (dwarf2_finish): Add SEC_DEBUGGING to section flags.
+
+2004-04-28 Chris Demetriou <cgd at broadcom.com>
+
+ * config/tc-mips.c (HAVE_32BIT_ADDRESSES, append_insn, macro_build)
+ (load_address, macro, mips_ip, md_parse_option)
+ (mips_force_relocation, mips_validate_fix, md_apply_fix3)
+ (s_change_sec, pic_need_relax, tc_gen_reloc): Remove all
+ embedded-PIC handling, and update comments.
+ (SWITCH_TABLE): Remove.
+ * config/tc-mips.h (DIFF_EXPR_OK): Delete.
+ (enum mips_pic_level): Remove EMBEDDED_PIC.
+ (EXTERN_FORCE_RELOC): Remove embedded-PIC handling.
+ (TC_FORCE_RELOCATION): Update comment.
+ * ecoff.c (ecoff_build_lineno): Add comment about some code that
+ might be safe to remove now that MIPS embedded-PIC is gone.
+
+2004-04-28 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/obj-som.c (obj_som_init_stab_section): Add new arguments in
+ call to obj_set_subsection_attributes.
+ (obj_som_init_stab_section): Likewise.
+ * config/tc-hppa.c (default_subspace_dict): Add comdat field.
+ (pa_def_subspaces): Provide comdat default.
+ (pa_subspace): Handle new "comdat" parameter. Set SEC_LINK_ONCE and
+ not SEC_IS_COMMON if section is comdat, common or dup_common. Update
+ calls to create_new_subspace and update_subspace to pass comdat flag.
+ (create_new_subspace, update_subspace): Add new comdat argument. Use
+ it in calls to obj_set_subsection_attributes.
+ * doc/c-hppa.texi (.subspa, .nsubspa): Document new comdat parameter
+ and use of comdat, common and dup_comm parameters.
+
+2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Check if the old
+ group name is NULL before comparison.
+
+2004-04-23 Chris Demetriou <cgd at broadcom.com>
+
+ * config/tc-mips.h (mips_dwarf2_addr_size): Prototype.
+
+2004-04-23 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (s_mipsset): Set default CPU type for .set mipsN.
+
+2004-04-23 Chris Demetriou <cgd at broadcom.com>
+
+ * config/tc-mips.c (md_longopts): Remove -membedded-pic option.
+ (OPTION_MEMBEDDED_PIC): Remove.
+ (OPTION_TRAP, OPTION_BREAK, OPTION_EB, OPTION_EL)
+ (OPTION_FP32, OPTION_GP32, OPTION_CONSTRUCT_FLOATS)
+ (OPTION_NO_CONSTRUCT_FLOATS, OPTIONS_FP64, OPTION_GP64)
+ (OPTION_RELAX_BRANCH, OPTION_NO_RELAX_BRANCH)
+ (OPTION_ELF_BASE): Renumber.
+ (md_parse_option): Remove OPTION_MEMBEDDED_PIC handling.
+ (md_show_usage): Remove mention of -membedded-pic.
+ * doc/as.texinfo: Remove mention of -membedded-pic.
+
+2004-04-23 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Remove.
+ * config/tc-mips.c (RDATA_SECTION_NAME, mips_target_format): Remove
+ a.out support.
+ (md_begin, mips_ip, md_parse_option, s_change_sec, s_option,
+ s_abicalls, nopic_need_relax, tc_gen_reloc): Remove uses of
+ USE_GLOBAL_POINTER_OPT.
+
+2004-04-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (macro): One more use of load_delay_nop.
+
+2004-04-22 Atsushi Nemoto <anemo at mba.ocn.ne.jp>
+
+ * config/tc-mips.c (load_delay_nop): New function.
+ (load_address, macro): Use load_delay_nop() to build a nop
+ which can be omitted with gpr_interlocks.
+
+2004-04-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (hilo_interlocks, gpr_interlocks,
+ cop_interlocks): Remove superfluous CPU entries.
+
+2004-04-22 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (mav_parse_offset): Value must be multiple of 4.
+
+2004-04-22 Peter Barada <peter at the-baradas.com>
+
+ * NEWS: Added support for EMAC instructions and MAC/EMAC
+ Motorola syntax.
+ * config/m68k-parse.h: Add ACC[123], ACCEXT{01,23}, MAC/EMAC
+ scale factor tokens, trailing_ampersand to mark mask addressing
+ for MAC/EMAC instructions.
+ * config/m68k-parse.y: Add options_ampersand clause, '<<',
+ '>>'.
+ (yylex): Handle '>', '<', and '&' following '+'.
+ * config/tc-m68k.c: Set mcfmac/mcfemac on appropriate ColdFire
+ architectures in archs[].
+ (m68k-ip): Add '4', 'e', 'g', 'i', cases to handle mask addressing
+ for MAC/EMAC instructions, ACC[0123], ACCEXT{01,23}, and '<<'/'>>'
+ respectively.
+ (m68k_ip): Handle trailing '&' on MAC/EMAC insns.
+ (install_operand): Fix 'n' case, Add 'F', 'f', 'G', 'H', 'I', ']'
+ cases.
+ Add EMAC operands to init_table[].
+
+2004-04-22 Bruno De Bus <bdebus at elis.ugent.be>
+
+ * config/tc-arm.h (enum mstate): Move here, add MAP_UNDEFINED
+ state.
+ (TC_SEGMENT_INFO_TYPE): Define to enum mstate.
+ * config/tc-arm.c (enum mstate): Delete from here.
+ (mapping_state): Remove the static mapstate variable and instead
+ store the state in the segment. This allows a per-section mapping
+ state. Handle and ignore MAP_UNDEFINED states.
+ (arm_elf_change_section): Get the current mapping state from the
+ new section.
+ (s_ltorg): Set the mapping state to MAP_DATA.
+ (arm_cleanup): Use arm_elf_change_section to get the mapping state
+ for each pool as it is emitted.
+
+2004-04-22 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.h: Formatting tidy ups.
+
+2004-04-20 Chris Demetriou <cgd at broadcom.com>
+
+ * NEWS: Note that MIPS -membedded-pic option is deprecated.
+
+2004-04-20 DJ Delorie <dj at redhat.com>
+
+ * config/tc-i386.h [TE_PE] (TC_CONS_FIX_NEW): Define.
+ * config/tc-i386.c (md_pseudo_table) [TE_PE]: Add "secrel32".
+ [TE_PE] (O_secrel): Define.
+ [TE_PE] (x86_pe_cons_fix_new): New.
+ [TE_PE] (pe_directive_secrel): Likewise.
+ (tc_gen_reloc) [TE_PE]: Support BFD_RELOC_32_SECREL.
+
+2004-04-19 Eric Christopher <echristo at redhat.com>
+
+ * config/tc-mips.c (mips_dwarf2_addr_size): Revert part
+ of previous patch for fix in gcc.
+
+2004-04-19 Jakub Jelinek <jakub at redhat.com>
+
+ * config/tc-xtensa.c (xg_assembler_literal): Fix a typo.
+
+2004-04-19 Nathan Sidwell <nathan at codesourcery.com>
+
+ * read.c (do_align): Call md_flush_pending_output, if defined.
+
+2004-04-16 Alan Modra <amodra at bigpond.net.au>
+
+ * expr.c (operand): Correct checks for ++ and --.
+
+2004-04-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-generic.c: Add some comments.
+
+2004-04-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from
+ -{no-}mfix-vr4122-bugs.
+ * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs.
+ (append_insn, mips_emit_delays): Update accordingly.
+ (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122.
+ (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120.
+ (md_parse_option): Update after above changes.
+ (md_show_usage): Add -mfix-vr4120.
+
+2004-04-13 Bob Wilson <bob.wilson at acm.org>
+
+ * doc/as.texinfo (Sub-Sections): Conditionalize COFF-specific use
+ of .section directive; add a reference to the ELF .subsection
+ directive.
+
+2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (md_assemble): Fixed infinite loop bug
+ in parallel.
+
+2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * Makefile.am: Remove mips from aout targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Remove mips-dec-bsd* target.
+ * configure: Regenerate.
+
+2004-04-07 Alan Modra <amodra at bigpond.net.au>
+
+ PR 96
+ * config/tc-ppc.c (ppc_elf_suffix): Add valid32 and valid64 fields
+ to struct map_bfd. Adjust MAP macro, and define MAP32, MAP64.
+ Update "mapping". Restrict some @ modifiers to 32 bit.
+
+2004-04-01 Asgari Jinia <asgarij at kpitcummins.com>
+ Dhananjay Deshpande <dhananjayd at kpitcummins.com>
+
+ * config/tc-sh.c (dont_adjust_reloc_32): New variable.
+ (sh_fix_adjustable): Avoid adjusting BFD_RELOC_32 when
+ dont_adjust_reloc_32 is set.
+ (md_longopts): Add option -renesas.
+ (md_parse_option, md_show_usage): Likewise.
+ * doc/c-sh.texi: Likewise.
+
+2004-04-01 Dave Korn <dk at artimi.com>
+
+ * config/tc-dlx.c (md_assemble): set fx_no_overflow flag for
+ hi16 and lo16 fixS structs.
+ (md_assemble): generate bit_fixS for RELOC_DLX_LO16 in
+ exactly the same way as for RELOC_DLX_REL16.
+ (machine_ip): properly respect LO flag in the_insn and
+ output RELOC_DLX_LO16 rather than RELOC_DLX_16.
+ (md_apply_fix3): apply RELOC_DLX_LO16.
+
+2004-03-30 Stan Shebs <shebs at apple.com>
+
+ Remove long-obsolete MPW support.
+ * mpw-config.in, mpw-make.sed, mac-as.r: Remove files.
+ * configure.in: Remove mention of ppc-*-mpw* config.
+ * configure.in: Likewise.
+
+2004-03-30 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (meabi_flags): Make its use conditional upon
+ OBJ_ELF being defined.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * config/obj-aout.c (obj_aout_type): Remove #ifdef BFD_ASSEMBLER code.
+
+2004-03-23 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (meabi_flags): New variable.
+ (arm_parse_eabi): New function.
+ (md_begin): Set flags for EABI v3.
+ (arm_eabis): Add.
+ (arm_long_opts): Add meabi.
+ * doc/as.texinfo <ARM>: Document -meabi.
+ * doc/c-arm.texi: Ditto.
+
+2004-03-22 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_post_relax_hook): Create literal
+ tables even when use_literal_section flag is not set.
+
+2004-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-sh.c: Remove trailing whitespace.
+
+2004-03-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * doc/c-cris.texi (CRIS-Opts): Document --no-mul-bug-abort,
+ --mul-bug-abort and the default behavior.
+ * config/tc-cris.c (cris_insn_kind): New member CRIS_INSN_MUL.
+ (err_for_dangerous_mul_placement): New variable.
+ (STATE_MUL, OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): New
+ macros.
+ (md_cris_relax_table): Have placeholder for STATE_MUL.
+ (md_longopts): New options --mul-bug-abort and --no-mul-bug-abort.
+ (cris_relax_frag) <case ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: New
+ case doing nothing.
+ (md_estimate_size_before_relax) <case ENCODE_RELAX (STATE_MUL,
+ STATE_BYTE)>: Ditto.
+ (md_convert_frag) <ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: Check
+ alignment and position of this frag, emit error message if
+ suspicious.
+ (md_assemble): For a multiply insn and when checking it,
+ transform the current frag into a special frag for that purpose.
+ (md_parse_option) <case OPTION_MULBUG_ABORT_OFF, case
+ OPTION_MULBUG_ABORT_ON>: Handle new options.
+
+2004-03-19 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (mark_literal_frags): New function.
+ (xtensa_move_literals): Call mark_literal_frags for all literal
+ segments, including init and fini literal segments.
+ (xtensa_post_relax_hook): Swap use of xt_insn_sec and xt_literal_sec.
+
+2004-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * tc-hppa.c (cons_fix_new_hppa): Check for PC relative base type.
+ (pa_comm): Set BSF_OBJECT in symbol flags.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * config.in: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2004-03-18 Nathan Sidwell <nathan at codesourcery.com>
+
+ * read.c (read_a_source_file): Use demand_empty_rest_of_line.
+ (demand_empty_rest_of_line): Issue an error here.
+ (ignore_rest_of_line): Silently skip to end.
+ (demand_copy_string): Issue an error, not warning.
+ (equals): Likewise.
+ * config/obj-elf.c (obj_elf_section_name): Likewise.
+ (obj_elf_section): Likewise.
+ * config/tc-arc.c (arc_extoper): Remove bogus NULL checks.
+ (arc_extinst): Likewise.
+ * config/tc-ia64.c (dot_saveb): Use demand_empty_rest_of_line.
+ (dot_spill): Likewise.
+ (dot_unwabi): Likewise.
+ (dot_prologue): Likewise.
+
+ * expr.c (operand): Reject ++ and --.
+ (operator): Likewise.
+
+2004-03-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * config/tc-sh.c: Include dw2gencfi.h.
+ (sh_cfi_frame_initial_instructions): New function.
+ (sh_regname_to_dw2regnum): Likewise.
+ * config/tc-sh.h (DWARF2_LINE_MIN_INSN_LENGTH): Move to the end of
+ file.
+ (TARGET_USE_CFIPOP): Define.
+ (tc_cfi_frame_initial_instructions): Likewise.
+ (tc_regname_to_dw2regnum): Likewise.
+ (DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT): Likewise.
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
+
+ * configure.in: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
+ * configure: Regenerate.
+
+2004-03-12 Bob Wilson <bob.wilson at acm.org>
+
+ * read.c (s_leb128): Call md_flush_pending_output.
+
+2004-03-12 Michal Ludvig <mludvig at suse.cz>
+
+ * config/tc-i386.c (output_insn): Handle PadLock instructions.
+ * config/tc-i386.h (CpuPadLock): New define.
+ (CpuUnknownFlags): Added CpuPadLock.
+
+2004-03-07 Andreas Schwab <schwab at suse.de>
+
+ * doc/c-hppa.texi (HPPA Directives): Fix typo.
+
+2004-03-07 Richard Henderson <rth at redhat.com>
+
+ * dw2gencfi.c (output_cie): Align length to 4 byte boundary.
+ (cfi_finish): Likewise for fde.
+
+2004-03-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (md_assemble): Properly handle NULL
+ align_frag.
+ (ia64_handle_align): Don't abort if failed to add a stop bit.
+
+2004-03-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+ * doc/Makefile.in: Likewise.
+
+2004-03-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (dot_align): New.
+ (ia64_do_align): Make it static.
+ (md_pseudo_table): Use "dot_align" for "align".
+ (ia64_md_do_align): Don't set align_frag here.
+ (ia64_handle_align): Add a stop bit to the previous bundle if
+ needed.
+
+ * config/tc-ia64.h (ia64_do_align): Removed.
+
+2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
+ -isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
+ (sh_elf_final_processing): Output BFD type sh4_nofpu if that is
+ the most general type or the user specifically requested it.
+ (md_assemble): Add a new error message for when an instruction
+ is understood, but is not allowed due to an -isa option.
+
+2004-03-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (align_frag): New.
+ (md_assemble): Set the tc_frag_data field in align_frag for
+ IA64_OPCODE_FIRST instructions.
+ (ia64_md_do_align): Set align_frag.
+ (ia64_handle_align): Add a stop bit if needed.
+
+ * config/tc-ia64.h (TC_FRAG_TYPE): New.
+ (TC_FRAG_INIT): New.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-frv.c (fr400_audio): New variable.
+ (md_parse_option, md_show_usage): Add -mcpu=fr405 and -mcpu=fr450.
+ (md_parse_option): Set fr400_audio for -mcpu=fr400 and -mcpu=fr405.
+ (target_implements_insn_p): New function.
+ (md_assemble): Report an error if the processor doesn't implement
+ the instruction.
+
+2004-02-27 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (md_longopts): Added -no-bitinst option.
+ (md_parse_option): Ditto.
+ (OPTION_NO_SPECIAL_M32R): Added.
+ (md_show_usage): Document it.
+ (enable_speial_m32r): Changed a default value from 0 to 1.
+ * doc/c-m32r.texi: Document the -no-bitinst option.
+
+2004-02-27 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-sh.c (get_operand): Revert previous delta.
+ (tc_gen_reloc): Check for an unknown reloc type before processing
+ the addend.
+
+2004-02-27 Hannes Reinecke <hare at suse.de>
+
+ * config/tc-s390.c (s390_insn): Correct range check for opcode in
+ .insn pseudo operation.
+
+2004-02-27 Anil Paranjpe <anilp1 at kpitcummins.com>
+
+ * config/tc-sh.c (get_operand): In case of #Imm, check has been
+ added for wrong syntax.
+
+2004-02-26 Eric Christopher <echristo at redhat.com>
+
+ * config/tc-mips.c (mips_dwarf2_addr_size): New.
+ * config/tc-mips.h (DWARF2_ADDR_SIZE): Use.
+
+2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * config/tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
+ nibble types to assembler.
+
+2004-02-25 Fred Fish <fnf at redhat.com>
+
+ * config/tc-iq2000.c: Add missing \n\ in multiline string literal.
+
+2004-02-20 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (slot_index): New arg before_relax. Use instead of
+ finalize_syms.
+ (fixup_unw_records): New arg before_relax. Pass to slot_index.
+ (ia64_estimate_size_before_relax): New.
+ (ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment.
+ (generate_unwind_image): Pass 1 to fixup_unw_records.
+ * config/tc-ia64.h (ia64_estimate_size_before_relax): Declare.
+ (md_estimate_size_before_relax): Call ia64_estimate_size_before_relax.
+
+2004-02-19 Jakub Jelinek <jakub at redhat.com>
+
+ * stabs.c (generate_asm_file): Avoid warning about use of
+ uninitialized variable.
+
+2004-02-18 David Mosberger <davidm at hpl.hp.com>
+
+ * config/tc-ia64.c (ia64_flush_insns): In addition to prologue,
+ body, and endp, allow unwind records which do not have a "t"
+ (time/instruction) field.
+
+2004-02-17 Petko Manolov <petkan at nucleusys.com>
+
+ * config/tc-arm.c (do_mav_dspsc_1): Correct offset of CRn.
+ (do_mav_dspsc_2): Likewise.
+ Fix accumulator registers move opcodes.
+
+2004-02-13 Hannes Reinecke <hare at suse.de>
+ Jakub Jelinek <jakub at redhat.com>
+
+ * dwarf2dbg.c (get_filenum): Do not read beyond allocated memory.
+
+2004-02-10 Steve Ellcey <sje at cup.hp.com>
+
+ * config/tc-ia64.h (ia64_frob_symbol): New declaration.
+ (tc_frob_symbol): New macro definition.
+ * config/tc-ia64.c (ia64_frob_symbol): New routine.
+
+2004-02-09 Daniel Jacobowitz <drow at mvista.com>
+
+ * config/tc-arm.c (md_begin): Mark .note.gnu.arm.ident as
+ read-only.
+
+2004-02-09 Nathan Sidwell <nathan at codesourcery.com>
+
+ * read.h (IGNORE_OPCODE_CASE): Do not define. Replace with ...
+ (TC_CASE_SENSITIVE): ... this.
+ * read.c: Replace IGNORE_OPCODE_CASE with TC_CASE_SENSITIVE.
+ * doc/internals.texi (TC_CASE_SENSITIVE): Document.
+
+2004-02-06 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (dot_endp): Delete call to output_endp.
+ (generate_unwind_image): Re-add it here.
+
+2004-02-06 Nathan Sidwell <nathan at codesourcery.com>
+
+ * dwarf2dbg.c (DWARF2_ADDR_SIZE): Remove trailing ';'
+ * read.h (SKIP_WHITESPACE): Turn into an expression.
+ * read.c (read_a_source_file): A pseudo is removed by having a
+ NULL handler.
+
+2004-02-05 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (output_endp): New.
+ (count_bits): Delete.
+ (ia64_flush_insns, process_one_record, optimize_unw_records): Handle
+ endp unwind records.
+ (fixup_unw_records): Handle endp unwind records. Delete code for
+ shortening prologue regions not followed by a body record.
+ (dot_endp): Call add_unwind_entry to emit endp unwind record.
+ * config/tc-ia64.h (unw_record_type): Add endp.
+
+2004-02-03 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to
+ fill padding bytes with zeroes.
+ (emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that
+ sets unwind_record slot_number and slot_frag fields.
+
+2004-02-02 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * config/tc-mips.c (add_got_offset_hilo): New function.
+ (macro): Use load_register() and add_got_offset_hilo() to load
+ constants instead of hardcoding code sequences throughout.
+
+2004-01-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Add proper indentation.
+
+2004-01-26 Bernardo Innocenti <bernie at develer.com>
+
+ * config/tc-m68k.h (EXTERN_FORCE_RELOC): Handle m68k-uclinux specially,
+ like m68k-elf.
+ * config/tc-m68k.c (RELAXABLE_SYMBOL): Use EXTERN_FORCE_RELOC instead
+ of hard-coded test for TARGET_OS=elf.
+
+2004-01-24 Chris Demetriou <cgd at broadcom.com>
+
+ * config/tc-mips.c (hilo_interlocks): Change definition
+ so that MIPS32, MIPS64 and later ISAs are included, along with
+ the already-included machines. Update comments.
+
+2004-01-23 Daniel Jacobowitz <drow at mvista.com>
+
+ * config/tc-arm.c (tc_gen_reloc): Improve error message for
+ undefined local labels.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (load_address, macro): Update comments about
+ NewABI GP relaxation.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (macro_build): Remove place and counter arguments.
+ (mips_build_lui, macro_build_ldst_constoffset): Likewise.
+ (mips16_macro_build, macro_build_jalr): Remove counter argument.
+ (set_at, load_register, load_address, move_register): Likewise.
+ (load_got_offset, add_got_offset): Likewise.
+ Update all calls and tidy accordingly.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (RELAX_ENCODE): Remove WARN argument.
+ (RELAX_FIRST, RELAX_SECOND): Turn into 8-bit quantities.
+ (RELAX_USE_SECOND): Bump to 0x10000.
+ (RELAX_SECOND_LONGER, RELAX_NOMACRO, RELAX_DELAY_SLOT): New flags.
+ (mips_macro_warning): New variable.
+ (md_assemble): Wrap macro expansion in macro_start() and macro_end().
+ (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise.
+ (relax_close_frag): Set mips_macro_warning.first_frag. Adjust use
+ of RELAX_ENCODE.
+ (append_insn): Update mips_macro_warning.sizes.
+ (macro_start, macro_warning, macro_end): New functions.
+ (macro_build): Don't emit warnings here.
+ (macro_build_lui, md_estimate_size_before_relax): ...or here.
+ (md_convert_frag): Check for cases where one macro alternative
+ needs a warning and the other doesn't. Emit a warning if the
+ longer sequence was chosen.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): Remove.
+ * config/tc-mips.c (RELAX_ENCODE): Take three arguments: the size of
+ the first sequence, the size of the second sequence, and a flag
+ that says whether we should warn.
+ (RELAX_OLD, RELAX_NEW, RELAX_RELOC[123]): Delete.
+ (RELAX_FIRST, RELAX_SECOND): New.
+ (mips_relax): New variable.
+ (relax_close_frag, relax_start, relax_switch, relax_end): New fns.
+ (append_insn): Remove "place" argument. Use mips_relax.sequence
+ rather than "place" to check whether we're expanding the second
+ alternative of a relaxable macro. Remove redundant check for
+ branch relaxation. If generating a normal insn, and there
+ is not enough room in the current frag, call relax_close_frag()
+ to close it. Update mips_relax.sizes[]. Emit fixups for the
+ second version of a relaxable macro. Record the first relaxable
+ fixup in mips_relax. Remove tc_gen_reloc workaround.
+ (macro_build): Remove all uses of "place". Use mips_relax.sequence
+ in the same way as in append_insn.
+ (mips16_macro_build): Remove "place" argument.
+ (macro_build_lui): As for macro_build. Don't drop the add_symbol
+ when generating the second version of a relaxable macro.
+ (load_got_offset, add_got_offset): New functions.
+ (load_address, macro): Use new relaxation machinery. Remove
+ tc_gen_reloc workarounds.
+ (md_estimate_size_before_relax): Set RELAX_USE_SECOND if the second
+ version of a relaxable macro is needed. Return -RELAX_SECOND if the
+ first version is needed.
+ (tc_gen_reloc): Remove relaxation handling.
+ (md_convert_frag): Go through the fixups for a relaxable macro and
+ mark those that belong to the unneeded alternative as done. If the
+ second alternative is needed, adjust the fixup addresses to account
+ for the deleted first alternative.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * frags.h (frag_room): Declare.
+ * frags.c (frag_room): New function.
+ * doc/internals.texi: Document it.
+
+2004-01-22 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (append_insn): Don't do r3900 interlock
+ optimization for -mtune=r3900, as this will break on other CPUs.
+
+2004-01-11 Tom Rix <tcrix at worldnet.att.net>
+
+ * config/tc-m68hc11.c (build_indexed_byte): movb and movw cannot
+ be relaxed, use fixup.
+ (md_apply_fix3): Use 5 bit reloc from movb and movw fixup.
+
+2004-01-19 Jakub Jelinek <jakub at redhat.com>
+
+ * config/tc-sparc.c (sparc_ip): Disallow %f32-%f63 for single
+ precision operands.
+
+2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * config/tc-mips.c (append_insn): Properly detect variant frags
+ that preclude swapping of relaxed branches. Correctly swap
+ instructions between frags when dealing with relaxed branches.
+
+2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * acinclude.m4: Quote names of macros to be defined by AC_DEFUN
+ throughout.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
+
+ * config/tc-h8300.c (build_bytes): Apply relaxation to bit
+ manipulation insns.
+
+2004-01-12 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (macro_build_jalr): When adding an R_MIPS_JALR
+ reloc, reserve space for the delay slot as well as the jalr itself.
+
+2004-01-09 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_vfp_reg2_from_sp2): Rename from do_vfp_sp_reg2.
+ (do_vfp_sp2_from_reg2): New function.
+ (insns): Use them.
+ (do_vfp_dp_from_reg2): Check return values properly.
+
+2004-01-08 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * config/tc-mips.c (warn_nops): Remove static variable.
+ (macro): Remove test of warn_nops.
+ (md_shortops): Remove 'n'.
+ (md_parse_option): Remove 'n' case.
+ (md_show_usage): Remove -n.
+ * doc/as.texinfo (Overview): Remove MIPS -n option.
+ * doc/c-mips.texi (MIPS Opts): Remove mention -n.
+ * NEWS: Mention removal of MIPS -n option.
+
+ * config/tc-mips.c (ISA_HAS_COPROC_DELAYS): Remove.
+ (cop_interlocks): Check ISA level.
+ (cop_mem_interlocks): Define.
+ (reg_needs_delay): Check cop_interlocks rather than
+ ISA_HAS_COPROC_DELAYS.
+ (append_insn): Likewise. Use cop_mem_interlocks rather than
+ directly checking mips_opts.isa.
+ (mips_emit_delays): Likewise.
+
+2004-01-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (unwind): Move next_slot_number and
+ next_slot_frag to ...
+ (unw_rec_list): Here.
+ (free_list_records): Removed.
+ (output_unw_records): Likewise.
+ (generate_unwind_image): Make it void.
+ (alloc_record): Initialize next_slot_number and next_slot_frag.
+ (slot_index): Take .org, .space and .align into account.
+ (fixup_unw_records): Don't set slot_number to 0. Use
+ list->next_slot_number and list->next_slot_frag instead of
+ unwind.next_slot_number and unwind.next_slot_frag.
+ (ia64_convert_frag): New.
+ (generate_unwind_image): Generate a rs_machine_dependent frag
+ for unwind record.
+ (emit_one_bundle): Use list->next_slot_number and
+ list->next_slot_frag instead of unwind.next_slot_number and
+ unwind.next_slot_frag.
+
+ * config/tc-ia64.h (md_convert_frag): Defined as
+ ia64_convert_frag.
+ (md_estimate_size_before_relax): Defined as (f)->fr_var.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-12-19 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.h (md_apply_fix3): Don't define.
+ * config/tc-frv.c (md_apply_fix3): New. Shift/truncate %hi/%lo
+ operands.
+ * config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
+ 2003-10-07 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.c (line_separator_chars): Add `!'.
+ 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.c (md_assemble): Clear insn upfront.
+ 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.c (OPTION_FDPIC): New macro.
+ (md_longopts): Add mfdpic.
+ (md_parse_option): Handle it.
+ 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.c (md_cgen_lookup_reloc) <FRV_OPERAND_D12,
+ FRV_OPERAND_S12>: Use reloc type encoded in fix-up.
+ (frv_pic_ptr): Parse funcdesc.
+
+2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * doc/as.texinfo: Let texi2pod parse asconfig.texi and
+ gasver.texi. Remove duplicate symbol definitions for texi2pod.
+
+2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * Makefile.am (Makefile): Move the dependency on
+ $(BFDDIR)/configure.in to...
+ (CONFIG_STATUS_DEPENDENCIES): ... here.
+ (AUTOMAKE_OPTIONS): Require automake 1.8.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.am (BASEDIR, BFDDIR): Define.
+ (CONFIG_STATUS_DEPENDENCIES): Add a dependency on
+ $(BFDDIR)/configure.in here as well.
+ * doc/Makefile.in: Regenerate.
+
+2004-01-05 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * Makefile.am (install, install-info, RECURSIVE_TARGETS): Remove.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * doc/Makefile.am (install, install-info): Remove.
+ (install-data-local): A new hook for install-info.
+ (AUTOMAKE_OPTIONS): Require automake 1.8.
+ * doc/Makefile.in: Regenerate.
+
+2004-01-02 Nutan Singh <nutan at kpitcummins.com>
+
+ * doc/c-sh.texi: Update description about floating point behavior
+ of SH family.
+
+2004-01-02 Bernardo Innocenti <bernie at develer.com>
+
+ * configure.in: Add m68k-uClinux target.
+ * configure: Regenerate.
+
+For older changes see ChangeLog-0203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/gas/ChangeLog-2005
===================================================================
--- branches/binutils/package/gas/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4292 @@
+2005-12-30 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (op_placement_info_struct): Delete single,
+ single_size, widest, and widest_size fields. Add narrowest_slot.
+ (xg_emit_insn_to_buf): Remove fmt parameter and compute it here.
+ Use xg_get_single_slot to find the slot.
+ (finish_vinsn): Use emit_single_op instead of bundle_single_op.
+ (bundle_single_op): Rename this to....
+ (bundle_tinsn): ...this function, which builds a vliw_insn but does
+ not call finish_vinsn.
+ (emit_single_op): Use bundle_tinsn instead of bundle_single_op.
+ (relax_frag_immed): Get num_slots from cur_vinsn.
+ (convert_frag_narrow): Update call to xg_emit_insn_to_buf.
+ (convert_frag_immed): Likewise. Also, get num_slots from cur_vinsn.
+ (init_op_placement_info_table): Set narrowest_slot field. Remove
+ code for deleted fields.
+ (xg_get_single_size): Return narrowest_size field, not single_size.
+ (xg_get_single_format): Return narrowest field, not single.
+ (xg_get_single_slot): New.
+ (tinsn_to_insnbuf): Rewrite to use tinsn_to_slotbuf.
+ * config/xtensa-relax.c (widen_spec_list): Add wide branch relaxations.
+ (transition_applies): Check wide branch option availability.
+
+2005-12-29 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
+
+2005-12-29 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (tinsn_to_slotbuf): Do not zero slotbuf.
+
+2005-12-27 Nathan Sidwell <nathan at codesourcery.com>
+
+ * config/tc-mt.c (mt_arch): Default to ms1_16_002.
+ (md_parse_options): Only allow lowercase.
+ (md_show_usage): Update.
+
+2005-12-27 Leif Ekblad <leif at rdos.net>
+
+ * configure.tgt: Add support for RDOS targets.
+
+2005-12-27 James Troup <james at nocrew.org>
+
+ PR 1300
+ * config/tc-arm.c (md_apply_fix): Fix casts to match type in
+ printf format.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-12-22 Jan Beulich <jbeulich at novell.com>
+
+ * symbols.h (snapshot_symbol): First parameter is now pointer
+ to pointer to symbolS.
+ * symbols.c (snapshot_symbol): Likewise. Store resulting symbol
+ there. Use symbol_equated_p.
+ * expr.c (resolve_expression): Change first argument to
+ snapshot_symbol. Track possibly changed add_symbol consistently
+ across function. Resolve more special cases with known result.
+ Also update final_val when replacing add_symbol.
+
+2005-12-13 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * config/tc-vax.c: Convert to ISO C90 format. Fix formatting and
+ white space usage as well.
+
+2005-12-20 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (xtensa_mark_narrow_branches): Set
+ is_aligning_branch flag.
+ (find_address_of_next_align_frag): Limit by xtensa_fetch_width.
+ (future_alignment_required): Except for frags with is_aligning_branch
+ flag set, call frag_wane for frags that do not need to be reexamined
+ for aligning.
+ (relax_frag_immed): Replace orig_vinsn with cur_vinsn to fix a leak.
+ (convert_frag_immed): Likewise.
+ (convert_frag_narrow): Check is_aligning_branch flag.
+ * config/tc-xtensa.h (xtensa_frag_type): Add is_aligning_branch flag.
+
+2005-12-20 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (xg_find_narrowest_format): Optimize 1 slot case.
+ (xg_init_vinsn): Remove redundant initialization.
+ (xg_clear_vinsn): Zero all the slots with a single memset.
+ * config/xtensa-istack.h (vliw_insn): Move insnbuf field after slots.
+
+2005-12-20 Nathan Sidwell <nathan at codesourcery.com>
+
+ * doc/t-mt.texi: Update MS1 to MT.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * configure: Rebuilt.
+ * configure.in (mt): Remove special case.
+ * config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
+ #includes.
+ (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
+ Rename, adjust.
+ (md_parse_option, md_show_usage, md_begin, md_assemble,
+ md_cgen_lookup_reloc, md_atof): Adjust.
+ (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
+ * config/tc-mt.h (TC_MT): Rename.
+ (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
+ (md_apply_fix): Adjust.
+ (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
+ (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
+
+2005-12-14 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (add_prefix): More fine-grained handling of
+ REX prefixes. Or new prefix value into i.prefix instead of
+ assigning.
+
+2005-12-13 DJ Delorie <dj at redhat.com>
+
+ * config/tc-m32c.c (m32c_md_end): Only pad code sections.
+
+2005-12-12 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_branch): Generate EABI branch relocations.
+ (do_bl): New function.
+ (do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation.
+ (do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23.
+ (insns): Use do_bl.
+ (md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and
+ BFD_RELOC_ARM_PCREL_JUMP.
+ (md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and
+ BFD_RELOC_ARM_PCREL_BLX cases. Handle BFD_RELOC_ARM_PCREL_CALL and
+ BFD_RELOC_ARM_PCREL_JUMP.
+ (tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and
+ BFD_RELOC_ARM_PCREL_JUMP.
+ gas/testsuite/
+ * gas/arm/pic.d: Allow R_ARM_CALL relocations.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * configure.in: Replace ms1 arch with mt arch.
+ * configure: Rebuilt.
+ * configure.tgt: Replace ms1 arch with mt arch.
+ * config/tc-mt.c: Renamed from tc-ms1.c: Update include files.
+ * doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
+ * doc/Makefile.in: Rebuilt.
+
+2005-12-07 Hans-Peter Nilsson <hp at axis.com>
+
+ Change 32-bit-branch expansion for --pic.
+ * config/tc-cris.c (STATE_COND_BRANCH_PIC): New relaxation state.
+ (md_cris_relax_table): Add entry for STATE_COND_BRANCH_PIC.
+ (cris_any_v0_v10_long_jump_size_pic): New macro.
+ (md_estimate_size_before_relax): Handle STATE_COND_BRANCH_PIC.
+ (md_convert_frag): Similar.
+ (md_create_long_jump): Change 32-bit-branch expansion for --pic.
+ (md_assemble, gen_cond_branch_32): Adjust similarly.
+ (md_parse_option) <case OPTION_PIC>: Adjust md_long_jump_size.
+ <case OPTION_ARCH>: Similar, if --pic.
+
+2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR gas/1874
+ * config/tc-i386.c (match_template): Handle monitor.
+ (process_suffix): Likewise.
+
+2005-12-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ Bug gas/1948
+ * symbols.c (colon): Also check if now_seg is bss_section when a symbol
+ is being redefined.
+
+2005-12-02 Arnold Metselaar <arnoldm at sourceware.org>
+
+ * config/tc-z80.c (emit_ldreg): fix bug in ld rr,<xx>
+
+2005-11-26 Arnold Metselaar <arnoldm at sourceware.org>
+
+ * config/tc-z80.c (z80_start_line_hook): issue an error when
+ redefining a symbol with equ
+ * doc/as.texinfo(equ<z80>): mention difference with .equiv
+ * doc/as.texinfo(err): fix typo
+ * doc/c-z80.texi(equ): redefining a symbol with equ is no longer
+ allowed
+
+2005-11-24 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ Bug gas/1896
+ * config/tc-hppa.c (hppa_fix_adjustable): Don't reject for reduction
+ R_HPPA relocations that are 32-bits wide.
+
+2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
+ Thiemo Seufer <ths at networkno.de>
+
+ * config/tc-mips.c (append_insn): Handle BFD_RELOC_16_PCREL_S2.
+ (macro_build): Complain for invalid branch displacements.
+ (mips_validate_fix): Delete.
+ (md_apply_fix): Re-add pcrel support for branches. Use consistent
+ text for misaligned branch targets.
+ (tc_gen_reloc: Re-add pcrel support for branches. Handle strange
+ BFD pcrel processing. Remove error for unresolved branches.
+ * config/tc-mips.h (TC_VALIDATE_FIX, mips_validate_fix): Delete.
+
+2005-11-22 James E Wilson <wilson at specifix.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Perform last_slot < 0 check
+ even when manual_bundling isn't set.
+
+ * config/tc-ia64.c (slot_index): Emit an error instead of a warning
+ when the frag chain is broken by section switching.
+
+2005-11-18 Jie Zhang <jie.zhang at analog.com>
+
+ * config/bfin-defs.h (IS_BREG, IS_LREG): New macros.
+ * config/bfin-parse.y (asm_1): Check register type for load immediate
+ instruction.
+
+2005-11-17 Alexandre Oliva <aoliva at redhat.com>
+
+ * config/tc-ppc.c (ppc_frob_file_before_adjust): Do not reference
+ dotname.
+ * write.c (write_object_file): Do not remove used weakrefd.
+
+2005-11-17 Jan Beulich <jbeulich at novell.com>
+
+ * dw2gencfi.c (dot_cfi): Put argument parsing for cases
+ DW_CFA_restore and DW_CFA_undefined in a loop.
+
+2005-11-17 Jan Beulich <jbeulich at novell.com>
+
+
+ * symbols.h (S_CLEAR_VOLATILE): Declare.
+ * symbols.c (colon): Also accept redefinable symbols for
+ redefinition. Clone them before modifying.
+ (S_CLEAR_VOLATILE): Define.
+ * cond.c (s_ifdef): Also test for equated symbols.
+ * read.c (s_comm_internal): Also exclude non-redefinable
+ equated symbols. Clone redefinable ones before modifying.
+ (s_weakref): Clone redefinable symbols before modifying.
+ * doc/internals.texi: Document sy_volatile, sy_forward_ref,
+ S_IS_VOLATILE, S_SET_VOLATILE, S_CLEAR_VOLATILE,
+ S_IS_FORWARD_REF, and S_SET_FORWARD_REF.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-hppa.c (pa_comm): Set bfd_com_section segment.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * configure.tgt (i386-*-gnu*): Set em=gnu.
+ * config/te-gnu.h: New file.
+ * config/tc-i386.c: Don't use '/' as comment char for TE_GNU.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_pe_comm): Set bfd_com_section segment.
+ * config/tc-alpha.c (s_alpha_comm): Likewise. Also, remove
+ redundant check.
+ * read.c (s_lsym): Remove non-BFD assembler sym handling.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (s_comm_internal): Set bfd_com_section segment.
+ (s_mri_common): Likewise.
+ * write.c (write_object_file): Remove non-BFD assembler common
+ sym handling.
+
+2005-11-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * config/tc-arm.c (s_arm_unwind_save_core): Don't emit an extra
+ opcode if r4-r15 are not saved.
+
+2005-11-15 Alan Modra <amodra at bigpond.net.au>
+
+ * symbols.c (S_GET_VALUE): Remove non-BFD assembler recursion guard.
+
+2005-11-14 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (AR_FCR, AR_EFLAG, AR_CSD, AR_SSD, AR_CFLG,
+ AR_FSR, AR_FIR, AR_FDR, AR_CCV, AR_EC): Define.
+ (ar): Use AR_* instead of literals.
+ (CR_DCR, CR_ITM, CR_IVA, CR_PTA, CR_GPTA, CR_LID, CR_ITV,
+ CR_PMV, CR_CMCV): Define.
+ (cr): Use CR_* instead of literals.
+
+2005-11-14 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (md): Rename regsym to indregsym and move
+ it to the end of the structure.
+ (ar): Field regnum is unsigned.
+ (cr): Likewise:
+ (indirect_reg): Likewise.
+ (declare_register_set): Parameter regnum is unsigned.
+ (declare_register): Parameter numregs and base_regnum are
+ unsigned. So is the local loop variable.
+ (md_begin): Restrict scope of local variable regnum, which
+ also is unsigned. Replace loops with function calls where
+ possible. Re-order things so that register groups are kept
+ together. Remove all uses of regsym except for indirect
+ registers. Replace use of regsym by indregsym for indirect
+ registers.
+ (ia64_optimize_expr): Replace use of regsym by indregsym for
+ indirect registers, with appropriate bias.
+
+2005-11-14 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
+ for the MIPS16e save/restore instructions.
+
+2005-11-11 Jan Beulich <jbeulich at novell.com>
+
+ * doc/Makefile.am: Make asconfig.texi writeable before trying
+ to write to it.
+ * doc/Makefile.in: Refresh.
+
+2005-11-10 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (intel_e11): Don't special-case segment
+ registers in brackets.
+
+2005-11-10 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (BAD_ADDR_MODE): Define.
+ (arm_reg_parse_multi): Return NULL rather than FAIL.
+ (arm_reg_parse): Fix comment, the function returns FAIL rather
+ than NULL if it is unable to parse the register name.
+ (do_ldrex): Use BAD_ADDR_MODE.
+ Change error message for PC-relative addressing.
+ (do_strex): Likewise.
+ (do_t_ldrex): Use BAD_ADDR_MODE.
+ (do_t_strex): Likewise.
+
+2005-11-08 Jean-Jacques Metayer <jean-jacques.metayer at thomson.net>
+
+ * config/tc-sparc.c (isoctal): Fix thinko.
+
+2005-11-08 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * expr.c (operand <case '$'>): Use DOLLAR_AMBIGU rather than
+ flag_mri_m68k as condition for parsing the '$' as a prefix.
+ * as.h (DOLLAR_AMBIGU): Define if needed.
+
+2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
+
+ Add ms2 support.
+ * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
+ (ms1_architectures): Add ms2.
+ (md_parse_option): Add ms2.
+ (md_show_usage): Add ms2.
+ (md_assemble): Add JAL_HAZARD detection logic.
+ (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
+ * doc/c-ms1.texi: New.
+ * doc/all.texi: Add MS1.
+ * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
+ * doc/Makefile.in: Rebuilt.
+ * doc/Makefile: Rebuilt.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-11-07 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ PR gas/1804
+ * config/tc-hppa.c (md_apply_fix): Use number_to_chars_bigendian to
+ output constant data.
+
+2005-11-07 Mark Mitchell <mark at codesourcery.com>
+
+ * doc/Makefile.am (asconfig.texi): Set top_srcdir.
+ * doc/Makefile.in: Regenerated.
+ * doc/as.texinfo: Document "@FILE".
+
+2005-11-07 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/1568
+ * config/obj-coff.c (obj_coff_section): Set readonly flag with the
+ 'x' attribute. Remember the actions of the 'w' and 'n' attributes
+ and do not allow the 'x','s' or 'd' attributes to change them.
+
+2005-11-07 John Levon <levon at movementarian.org>
+
+ * config/tc-i386.h (tc_comment_chars): Define.
+ * config/tc-i386.c (line_comment_chars): Use '/' unconditionally.
+ (i386_comment_chars): Add.
+ (md_parse_options): Process OPTION_DIVIDE.
+ (md_show_usage): Describe --divide option.
+ * doc/c-i386.texi: Document --divide option.
+
+2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * expr.c (op_encoding): Map '=' to O_SINGLE_EQ, if defined.
+ * config/tc-z80.h: Define O_SINGLE_EQ as O_eq.
+
+2005-11-07 Alan Modra <amodra at bigpond.net.au>
+
+ * macro.c (buffer_and_nest): Skip labels regardless of
+ NO_PSEUDO_DOT and flag_m68k_mri.
+
+2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * expr.c (integer_constant): Match only 'B' as binary suffix if
+ NUMBERS_WITH_SUFFIX and LOCAL_LABELS_FB. Allow both 'b' and 'B'
+ otherwise.
+
+2005-11-04 Alexandre Oliva <aoliva at redhat.com>
+
+ * read.c (s_weakref): Do not permit redefinitions.
+ * symbols.c (colon): Do not permit redefinitions of equated
+ symbols.
+
+2005-11-01 Thiemo Seufer <ths at networkno.de>
+
+ PR gas/1299
+ * Makefile.am: Disable -Werror for the itbl-lex.o rule.
+ * Makefile.in: Regenerate.
+
+2005-11-01 Thiemo Seufer <ths at networkno.de>
+
+ * config/tc-mips.c (md_parse_option): Fix typo in comment.
+
+2005-10-30 Mark Mitchell <mark at codesourcery.com>
+
+ * as.c (show_usage): Document "@FILE".
+
+2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (OBJ_FORMATS): Remove vms.
+ Run "make dep-am".
+ * Makefile.in: Regenerated.
+
+ * dep-in.sed: Replace " ./" with " ".
+
+2005-10-28 Dave Brolley <brolley at redhat.com>
+
+ Contribute the following change:
+ 2005-09-19 Dave Brolley <brolley at redhat.com>
+
+ * config/tc-m32c.c (default_isa): New static variable.
+ (m32c_isa): Now of type CGEN_BITSET.
+ (md_begin): Pass &m32c_isa to m32c_cgen_cpu_open.
+
+2005-10-28 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (aeabi_set_public_attributes): Use selected_cpu
+ instead of mcpu_cpu_opt.
+
+2005-10-27 Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (find_vinsn_conflicts): Change error messages to
+ refer to "ports" instead of "queues".
+ (check_t1_t2_reads_and_writes): Pass correct interface values to
+ xtensa_interface_inout.
+
+2005-10-27 Jan Beulich <jbeulich at novell.com>
+
+ * read.c (assign_symbol): Also consider equates already defined.
+ * symbols.c (symbol_clone): Also clone the underlying BFD symbol.
+ * config/obj-coff.h (obj_symbol_clone_hook): New.
+ (coff_obj_symbol_clone_hook): Declare.
+ * config/obj-coff.c (coff_obj_symbol_clone_hook): New.
+
+2005-10-26 DJ Delorie <dj at redhat.com>
+
+ * config/tc-m32c.c (md_relax_table, subtype_mappings,
+ md_convert_frag): Add jsr.w support.
+
+ * config/tc-m32c.c (md_assemble): Don't use errmsg as the format
+ itself.
+ (md_cgen_lookup_reloc): Add m32c bitbase operands. Add 8-s24
+ and imm-8-HI operands.
+
+2005-10-26 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (insns): Correct "sel" entry.
+
+2005-10-26 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (i386_operand): Don't check register prefix here.
+ (parse_real_register): Rename from parse_register.
+ (parse_register): New.
+ (i386_parse_name): New.
+ (md_operand): New.
+ (intel_e11): Don't tolerate registers in offset expressions anymore.
+ (intel_get_token): Don't check register prefix here. Copy the actual
+ register token, not the canonical register name.
+ * config/tc-i386.h (md_operand): Delete.
+ (i386_parse_name): Declare.
+ (md_parse_name): Define.
+
+2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * Makefile.am: Add Z80 cpu.
+ * Makefile.in: Regenerated.
+ * app.c (do_scrub_chars)<TC_Z80>: Correctly scrub "ex af,af'"
+ and disallow newlines in quoted strings.
+ * configure.tgt: Add z80-*-coff.
+ * config/obj-coff.h: Add format "coff-z80".
+ * doc/Makefile.am: Add c-z80.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Add Z80.
+ * doc/c-z80.texi: New file
+ * doc/as.texinfo: Add z80 options and some z80-related remarks.
+ * config/tc-z80.c: New file
+ * config/tc-z80.h: New file
+ * NEWS: Mention new support.
+
+2005-10-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * write.c (adjust_reloc_syms): Undo the change made on
+ 2005-04-26 to allow local symbol set to undefined symbol.
+
+2005-10-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (bfin-parse.tab.h): Removed.
+ (bfin-parse.h): Added.
+ * Makefile.in: Regenerated.
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * po/POTFILES.in: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
+
+ * config/tc-bfin.c (Expr_Node_Gen_Reloc): If have symbol + constant,
+ make a single reloc with an offset rather than a stack.
+ * config/tc-bfin.h (MD_APPLY_SYM_VALUE): Define to 0.
+
+2005-10-24 Alexandre Oliva <aoliva at redhat.com>
+
+ * read.c (potable): Add weakref.
+ (s_weakref): New.
+ * read.h (s_weakref): Declare.
+ * struc-symbol.h (struct symbol): Add sy_weakrefr and sy_weakrefd.
+ * symbols.c (colon): Clear weakrefr.
+ (symbol_find_exact): Rename to, and reimplement in terms of...
+ (symbol_find_exact_noref): ... new function.
+ (symbol_find): Likewise...
+ (symbol_find_noref): ... ditto.
+ (resolve_symbol_value): Resolve weakrefr without setting their
+ values.
+ (S_SET_WEAK): Call hook.
+ (S_GET_VALUE): Follow weakref link.
+ (S_SET_VALUE): Clear weakrefr.
+ (S_IS_WEAK): Follow weakref link.
+ (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): New.
+ (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): New.
+ (symbol_set_value_expression, symbol_set_frag): Clear weakrefr.
+ (symbol_mark_used): Follow weakref link.
+ (print_symbol_value_1): Print weak, weakrefr and weakrefd.
+ * symbols.h (symbol_find_noref, symbol_find_exact_noref): Declare.
+ (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): Declare.
+ (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): Declare.
+ * write.c (adust_reloc_syms): Follow weakref link. Do not
+ complain if target is undefined.
+ (write_object_file): Likewise. Remove weakrefr symbols. Drop
+ unreferenced weakrefd symbols.
+ * config/obj-coff.c (obj_frob_symbol): Do not force WEAKREFD
+ symbols EXTERNAL.
+ (pecoff_obj_set_weak_hook, pecoff_obj_clear_weak_hook): New.
+ * config/obj-coff.h (obj_set_weak_hook, obj_clear_weak_hook): Define.
+ * doc/as.texinfo: Document weakref.
+ * doc/internals.texi: Document new struct members, internal
+ functions and hooks.
+
+2005-10-24 Jie Zhang <jie.zhang at analog.com>
+
+ * Makefile.am (bfin-parse.h): Renamed from bfin-parse.tab.h.
+ (EXTRA_DIST): Add bfin-parse.h and bfin-lex.c.
+ * Makefile.in: Regenerate.
+ * config/bfin-lex.l: Include bfin-parse.h instead of bfin-parse.tab.h.
+ * config/tc-bfin.c (md_chars_to_number): Change the type of first
+ argument from unsigned char * to char * to remove signedness warnings.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
+ (dot_rot): Change type of num_* variables. Check for positive count.
+ (ia64_optimize_expr): Re-structure.
+ (md_operand): Check for general register.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (declare_register): Call symbol_create.
+ (md_begin): Remove local variables total, ar_base, and cr_base.
+ Start loops for registers at their respective first one. Don't
+ update md.regsym for alias names. Generate alias name tp for r13.
+
+2005-10-21 DJ Delorie <dj at redhat.com>
+
+ * config/tc-m32c.c (md_cgen_lookup_reloc): Add more relocs. Print
+ names unstead of numbers.
+
+2005-10-19 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (append_insn): Convert MIPS16 jr/jalr jumps
+ into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
+ hence avoiding to emit a nop.
+
+2005-10-19 Jie Zhang <jie.zhang at analog.com>
+
+ * config/tc-bfin.c (md_begin): Let the lex_type of '(' be
+ LEX_BEGIN_NAME.
+ (bfin_start_line_hook): Remove the workaround for LSETUP(.
+ (bfin_name_is_register): Remove the workarounds for LSETUP(
+ and SAA(.
+ (bfin_start_label): Ditto.
+
+2005-10-18 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_end_directive): Restore
+ default_lit_sections regardless of use_literal_section.
+
+2005-10-18 Jie Zhang <jie.zhang at analog.com>
+
+ * Makefile.am (bfin-lex.c): Update ylwrap invocation.
+ * Makefile.in: Regenerated.
+
+2005-10-18 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * doc/as.texinfo (.loc) Fix placement of '@end table'.
+
+2005-10-17 Bob Wilson <bob.wilson at acm.org>
+
+ * config/xtensa-istack.h (TInsn): Replace dwarf2_line_info with an
+ unsigned line number. Do not include "dwarf2dbg.h".
+ * config/tc-xtensa.c (md_pseudo_table): Remove entry for "loc".
+ (xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): Delete.
+ (xg_build_to_insn, xg_build_token_insn): Update TInsn uses.
+ (md_assemble): Use as_where instead of dwarf2_where.
+ (xg_assemble_vliw_tokens): Use unsigned line numbers instead of
+ dwarf2_line_infos. Change to call new_logical_line followed by
+ dwarf2_emit_insn.
+
+2005-10-14 Mike Frysinger <vapier at gentoo.org>
+
+ * doc/as.texinfo (Section): Add missing ']' to .section example.
+
+2005-10-12 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ PR binutils/941
+ * config/tc-hppa.c (pa_ip): Use as_bad instead of as_fatal when an
+ unknown opcode is found.
+
+2005-10-12 Mark Mitchell <mark at codesourcery.com>
+
+ * NEWS: Mention @file.
+
+2005-10-12 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-avr.c: Convert to ISO C90 format. Fix formatting and
+ generally tidy up the code.
+ * config/tc-avr.h: Likewise.
+
+2005-10-12 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_reg_val): Use expression_and_evaluate.
+ (dot_pred_rel): Likewise.
+ (parse_operand): Likewise.
+ (ia64_unrecognized_line): Likewise.
+ (md_operand): Likewise.
+
+2005-10-11 Jan Beulich <jbeulich at novell.com>
+
+ * expr.h (enum expr_mode): New.
+ (expression): Pass third argument to expr.
+ (expression_and_evaluate): New.
+ (deferred_expression): New.
+ (expr): Add third parameter.
+ (resolve_expression): New.
+ * struc-symbol.h (struct symbol): New members sy_volatile and
+ sy_forward_ref.
+ * symbols.c, symbols.h (symbol_clone): New.
+ (symbol_clone_if_forward_ref): New.
+ (snapshot_symbol): New.
+ (S_IS_VOLATILE): New.
+ (S_IS_FORWARD_REF): New.
+ (S_SET_VOLATILE): New.
+ (S_SET_FORWARD_REF): New.
+ * as.c (macro_expr): Use expression_and_evaluate.
+ * cond.c (s_if): Likewise.
+ (s_elseif): Likewise.
+ * dw2gencfi.c (cfi_parse_reg): Likewise.
+ * expr.c (operand): Add second parameter. Optionally call
+ deferred_expression. Pass mode argument to itself and md_parse_name.
+ Check mode before trying to evaluate symbol. Call
+ symbol_clone_if_forward_ref for both operands.
+ (expr): Add third parameter. Pass mode to operand and itself.
+ Optionally call resolve_expression.
+ (resolve_expression): New.
+ (get_single_number): Pass second argument to operand.
+ * read.c (potable): New entry for .eqv.
+ (read_a_source_file): Handle new == operator.
+ (get_absolute_expr): Use expression_and_evaluate.
+ (s_lsym): Likewise.
+ (assign_symbol): Rename second parameter. Call symbol_clone on
+ legal and illegal redefinition. Call S_SET_VOLATILE and
+ S_SET_FORWARD_REF depending on mode.
+ (s_set): Update description.
+ (s_space): Call resolve_expression.
+ (pseudo_set): Optionally call deferred_expression. Check
+ S_IS_FORWARD_REF before trying to simplify/resolve an expression.
+ (equals): Handle ==.
+ * config/tc-ia64.h (md_parse_name): Add mode parameter.
+ * config/tc-arc.c (arc_parse_cons_expression): Likewise.
+ * config/tc-m32r.h (md_parse_name): Likewise.
+ (m32r_parse_name): Likewise.
+ * config/tc-mmix.h (md_parse_name): Likewise.
+ * config/tc-mn10300.h (md_parse_name): Likewise.
+ (mn10300_parse_name): Likewise.
+ * config/tc-ppc.h (md_parse_name): Likewise.
+ * config/tc-sh.h (md_parse_name): Likewise.
+ (sh_parse_name): Likewise.
+ * config/tc-sh64.h (md_parse_name): Likewise.
+ (sh64_consume_datalabel): Likewise.
+ * config/tc-tic54x.h (md_parse_name): Likewise.
+ * config/tc-m32r.c (m32r_parse_name): Add mode parameter. Check it
+ before trying to evaluate symbol.
+ * config/tc-mn10300.c (mn10300_parse_name): Likewise.
+ * config/tc-sh.c (sh_parse_name): Likewise.
+ * config/tc-sh64.c (sh64_consume_datalabel): Add mode parameter. Pass
+ second argument to operandf. Pass mode parameter to sh_parse_name.
+ * doc/as.texinfo: Document .eqv and the == assignment operator.
+
+2005-10-10 Ian Lance Taylor <ian at airs.com>
+
+ * Makefile.am (EXTRA_DIST): Remove bfin-lex.l and bfin-defs.h.
+ * Makefile.in: Regenerate.
+
+2005-10-10 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * expr.c (operator): Allow "!=" as a synonym for "<>".
+ * doc/as.texinfo (Infix Op): Mention "!=".
+
+2005-10-08 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (strict): Don't initialize. Update comment.
+ (pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
+ found. Simplify handling of "ma" and "mb" completers.
+
+2005-10-08 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.
+ (arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name):
+ New variables.
+ (arm_cpu_option_table): Add canonical_name.
+ (arm_cpus): Populate canonical_name field.
+ (s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu,
+ aeabi_set_public_attributes, arm_md_end): New functions.
+ (md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute".
+ (md_assemble): Set thumb_arch_used and arm_arch_used.
+ (md_begin): Set defaut cpu if CPU_DEFAULT not defined.
+ * config/tc-arm.h (md_end): Define.
+ * doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute.
+
+2005-10-06 Khem Raj <kraj at mvista.com>
+ NIIBE Yutaka <gniibe at m17n.org>
+
+ * config/tc-sh.c (allow_dollar_register_prefix): New variable.
+ (parse_reg_without_prefix): New function.
+ (parse_reg): Check for '$' register prefix if --allow-reg-prefix is
+ set.
+ (option md_longopts): Add allow-reg-prefix option.
+ * doc/c-sh.texi: Document --allow-reg-prefix option.
+ * NEWS: Mention the new switch.
+
+2005-10-03 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * doc/as.texinfo (Infix Ops): '<' and '>' are not shift
+ operators.
+
+2005-09-30 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_frob_label): Disallow labels in bundles.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+
+2005-09-30 Mark Mitchell <mark at codesourcery.com>
+
+ * as.c (main): Use expandargv.
+
+2005-09-30 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-tic4x.c (tic4x_set): Advance input_line_pointer past
+ (removed) comma.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * configure: Regenerated.
+ * configure.in: Bfin support.
+ * configure.tgt: Bfin support.
+ * config/bfin-aux.h: New file.
+ * config/bfin-defs.h: New file.
+ * config/bfin-lex.l: New file.
+ * config/bfin-parse.y: New file.
+ * config/tc-bfin.c: New file.
+ * config/tc-bfin.h: New file.
+ * doc/Makefile.am: Recognize c-bfin.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Bfin support.
+ * doc/as.texinfo: Likewise.
+ * doc/c-bfin.texi: Document bfin-specific syntax and
+ directives.
+
+2005-09-30 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (opcode_tag): Add OT_cinfix3_legacy.
+ (opcode_lookup): Handle OT_cinfix3_legacy. Revert earlier change for
+ normal infix conditions.
+ (C3E): Include Thumb-2 definition.
+ (CL, cCL): Define.
+ (insns): Use them for legacy mnemonics.
+
+2005-09-30 Matthias Kurz <mk at baerlap.north.de>
+
+ * asintl.h: Prevent the inclusion of <libintl.h> from the Solaris
+ version of <locale.h> when ENABLE_NLS is not defined.
+
+2005-09-29 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_operands): Always parse first operand of
+ alloc.
+
+2005-09-29 Arnold Metselaar <arnold.metselaar at planet.nl>
+ Alan Modra <amodra at bigpond.net.au>
+
+ * app.c (do_scrub_chars): Match open and close quote of strings.
+ Remove redundant EOF test in case 7.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (reloc): Disable signedness check for 4-byte
+ relocations in 16- and 32-bit modes.
+ (i386_displacement): Make pc-relative branch handling dependent
+ upon operand (rather than address) size.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * dw2gencfi.c (dot_cfi): Call ignore_rest_of_line when not fully
+ parsing the input.
+ (dot_cfi_startproc): Likewise.
+ (dot_cfi_endproc): Likewise. Also check no extra input was given.
+ (dot_cfi_escape): Likewise.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
+ (TC_CONS_FIX_NEW): Define unconditionally.
+ (x86_pe_cons_fix_new): Remove.
+ * config/tc-i386.c (signed_cons): New.
+ (md_pseudo_table): Add slong.
+ (x86_cons_fix_new): Declare unconditionally.
+ (x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
+ (tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
+ conversion.
+
+2005-09-28 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * app.c (do_scrub_chars <LEX_IS_SYMBOL_COMPONENT>): Check for full
+ buffer after copying string.
+
+2005-09-27 Paul Brook <paul at codesourcery.com>
+
+ * config/arm.c (arm_cpus): Add more cpu names.
+ * doc/c-arm.texi: Document them.
+
+2005-09-21 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (pseudo_set): Don't set undefined symbols to expr_section.
+
+2005-09-20 Richard Henderson <rth at redhat.com>
+
+ * dwarf2dbg.c (process_entries): Fix uninitialized variable warning.
+
+2005-09-20 Richard Henderson <rth at redhat.com>
+
+ * dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs
+ with label.
+ (dwarf2_loc_mark_labels): New.
+ (dwarf2_gen_line_info_1): Split out of ...
+ (dwarf2_gen_line_info): ... here. Create the temp symbol here.
+ (dwarf2_emit_label): New.
+ (dwarf2_directive_loc_mark_labels): New.
+ (out_set_addr): Take a symbol instead of frag+ofs.
+ (relax_inc_line_addr): Likewise.
+ (emit_inc_line_addr): Assert delta non-negative.
+ (process_entries): Remove dead code. Update to work with temp
+ symbols instead of frag+ofs.
+ * dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare.
+ (dwarf2_emit_label, dwarf2_loc_mark_labels): Declare.
+ * config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels.
+ * config/obj-elf.h (obj_frob_label): New.
+ * config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label.
+ * config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c,
+ config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c:
+ Similarly in the respective tc_frob_label implementation functions.
+ * config/tc-i386.c (md_pseudo_table): Move file and loc to
+ non-elf section; add loc_mark_labels.
+ * config/tc-ia64.c (struct label_fix): Add dw2_mark_labels.
+ (ia64_flush_insns): Check for marked labels; emit line entry if so.
+ (emit_one_bundle): Similarly.
+ (ia64_frob_label): Record marked labels.
+ * config/tc-m68hc11.h (tc_frob_label): Remove.
+ * config/tc-ms1.c (md_pseudo_table): Remove file and loc.
+ * config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label.
+ * config/tc-sh64.h (tc_frob_label): Likewise.
+ * doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
+
+2005-09-20 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (pseudo_set): Set segment of expression syms to expr_section.
+
+2005-09-14 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
+ registers, floating point control and status words, and mxcsr as
+ well as (for 64-bit code) segment base registers and rflags.
+
+2005-09-09 Dmitry Diky <diwil at spec.ru>
+
+ * config/tc-msp430.c (msp430_operands): Undo last changes. Instead...
+ (msp430_relax_frag): add a guard check to ensure that final fr_subtype
+ has been reached.
+
+2005-09-08 Chao-ying Fu <fu at mips.com>
+
+ * doc/as.texinfo: Document -mdsp and -mno-dsp options.
+ * doc/c-mips.texi: Likewise, and document ".set dsp" and ".set nodsp"
+ directives.
+
+2005-09-08 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_smi, do_t_smi): Rename ...
+ (do_smc, do_t_smc): ... to this.
+ (insns): Remane smi to smc.
+ (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
+ BFD_RELOC_ARM_SMC.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * dwarf2dbg.c (dwarf2_where): Set line->isa.
+ (dwarf2_set_isa): New.
+ (dwarf2_directive_loc): Rearrange to allow all options on one line.
+ * dwarf2dbg.h (dwarf2_set_isa): Declare.
+ * doc/as.texinfo: Update .loc documentation.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * dwarf2dbg.c: Include safe-ctype.h.
+ (DWARF2_LINE_OPCODE_BASE): Bump to 13.
+ (current): Initialize.
+ (dwarf2_emit_insn): Clear DWARF2_FLAG_BASIC_BLOCK,
+ DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN.
+ (dwarf2_directive_file): Cope with invalid filename.
+ (dwarf2_directive_loc): Add handling for basic_block, prologue_end,
+ epilogue_begin, is_stmt, isa.
+ (emit_inc_line_addr): Move line_delta == 0, addr_delta == 0 special
+ case down lower.
+ (process_entries): Handle isa, DWARF2_FLAG_PROLOGUE_END,
+ and DWARF2_FLAG_EPILOGUE_BEGIN.
+ (out_debug_line): Emit sizes for DW_LNS_set_prologue_end,
+ DW_LNS_set_epilogue_begin, DW_LNS_set_isa.
+ * dwarf2dbg.h (DWARF2_FLAG_IS_STMT): Rename from DWARF2_FLAG_BEGIN_STMT.
+ (DWARF2_FLAG_BASIC_BLOCK): Rename from DWARF2_FLAG_BEGIN_BLOCK.
+ (DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN): New.
+ (struct dwarf2_line_info): Add isa member.
+ * doc/as.texinfo (LNS directives): New node.
+
+2005-09-07 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (append_insn): Undo last change. Instead add
+ guard to suppress calling frag_grow if the current instruction is
+ one that allows a delay slot.
+
+2005-09-06 Chao-ying Fu <fu at mips.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_mt for MT instructions.
+ (mips_opts): Add -1 to initialize ase_mt.
+ (file_ase_mt): New variable for -mmt.
+ (CPU_HAS_MT): New define.
+ (validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
+ formats.
+ (mips_ip): Check ase_mt to enable MT instructions.
+ Handle !, $, *, &, +T, +t, g operand formats.
+ For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
+ odd float registers.
+ (OPTION_MT, OPTION_NO_MT): New define.
+ (OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
+ (md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
+ (mips_after_parse_args): Set ase_mt based on CPU.
+ (s_mipsset): Handle ".set mt" and ".set nomt".
+ (mips_elf_final_processing): Remind of adding new flag for MT ASE.
+ (md_show_usage): Show usage of -mmt and -mno-mt.
+ * doc/as.texinfo: Document -mmt and -mno-mt options.
+ * doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt"
+ directives.
+
+2005-09-06 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (arm_it): Add relax field.
+ (T16_32_TAB): Add addi, addis, add_pc, add_sp, dec_sp, inc_sp,
+ b, bcond, ldr_pc, ldr_pc2, ldr_sp, str_sp, subi, subis.
+ (do_t_add_sub, do_t_addr, do_t_branch, do_t_ldst,
+ do_t_mov_cmp): Allow relaxation.
+ (output_relax_insn): New function.
+ (put_thumb32_insn): New function.
+ (output_inst): Use new functions.
+ (md_assemble): Don't throw error on relaxable instructions.
+ (insns): Change "b" entry from TCE(...) to tCE(...).
+ (md_estimate_size_before_relax): Return 2.
+ (md_convert_frag, relax_immediate, relax_adr, relax_addsub,
+ relax_branch, arm_relax_frag): New functions.
+ (arm_force_relocation): Return 0 for Thumb-2 immediate operand
+ relocations.
+ * config/tc-arm.h (md_convert_frag): Remove definition.
+ (md_relax_frag): Define.
+ (arm_relax_frag): Add prototype.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (encode_arm_cp_address): Use
+ BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
+ (do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
+ mode.
+ (md_assemble): Only allow coprocessor instructions when Thumb-2 is
+ available.
+ (cCE, cC3): Define.
+ (insns): Use them for coprocessor instructions.
+ (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
+ (get_thumb32_insn): New function.
+ (put_thumb32_insn): New function.
+ (md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (opcode_lookup): Look for infix opcode when
+ incorrect suffix matches.
+
+2005-09-01 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (append_insn): Correctly handle mips16 case
+ when the frags are different for the 2 instructions we want to
+ swap. If the lengths of the 2 instructions are not the same, we
+ won't do the swap but emit an nop.
+
+2005-09-01 Dmitry Diky <diwil at spec.ru>
+
+ * config/tc-msp430.c (msp430_operands): Emit dwarf2_emit_insn()
+ as appropriate. Change frag_variant() to frag_var() for relaxes.
+
+2005-08-29 Nick Clifton <nickc at redhat.com>
+
+ * write.c (generic_force_reloc): Do not call S_FORCE_RELOC if
+ there is no symbol.
+
+2005-08-26 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
+ qualified operand of a branch.
+ (intel_bracket_expr): Set JumpAbsolute here...
+ (intel_e11): ... rather than here.
+
+2005-08-26 Christian Groessler <chris at groessler.org>
+
+ * configure.tgt: Set bfd_gas also for z8k cpu.
+ * config/tc-z8k.c (s_segm): Use bfd_set_arch_mach to set machine
+ type.
+ (newfix): Adapt to bfd reloc types.
+ (build_bytes): Adapt to bfd reloc types. Ensure that enough space
+ is available in the current frag.
+ (md_convert_frag): Adapt function parameters.
+ (tc_gen_reloc): New function.
+ (md_section_align): Use bfd_get_section_alignment.
+ (md_apply_fix): Adapt to bfd reloc types. Fix handling of
+ BFD_RELOC_Z8K_IMM4L, BFD_RELOC_8, BFD_RELOC_16, and BFD_RELOC_32
+ relocations.
+ * config/tc-z8k.h (TARGET_ARCH): Define.
+ (tc_fix_adjustable): Define.
+
+2005-08-25 Chao-ying Fu <fu at mips.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_dsp for DSP instructions.
+ (mips_opts): Add -1 to initialize ase_dsp.
+ (file_ase_dsp): New variable for -mdsp.
+ (CPU_HAS_DSP): New define.
+ (validate_mips_insn): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, ', :, @
+ operand formats.
+ (mips_ip): Add min_range and max_range for checking singed numbers.
+ Check ase_dsp to enable DSP instructions.
+ Handle 3, 4, 5, 6, 7, 8, 9, 0, ', :, @ operand formats.
+ (OPTION_DSP, OPTION_NO_DSP): New define.
+ (OPTION_COMPAT_ARCH_BASE): Change because of inserting DSP define.
+ (md_parse_option): Parse OPTION_DSP and OPTION_NO_DSP.
+ (mips_after_parse_args): Set ase_dsp based on CPU.
+ (s_mipsset): Handle ".set dsp" and ".set nodsp".
+ (mips_elf_final_processing): Remind of adding new flag for DSP ASE.
+ (md_show_usage): Show usage of -mdsp and -mno-dsp.
+
+2005-08-23 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add 5kf to the table of
+ cpu names.
+
+2005-08-23 Alan Modra <amodra at bigpond.net.au>
+
+ PR 1036
+ * config/tc-ppc.c (ppc_symbol_chars): Add '%' and '['.
+
+2005-08-23 Phil Edwards <phil at codesourcery.com>
+
+ * configure.tgt (*-*-vxworks): Match vxworks* instead.
+
+2005-08-22 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (object_64bit): New.
+ (i386_target_format): Initialize it.
+ (output_disp): Use object_64bit for relocation type determination.
+ (output_imm): Likewise.
+ (i386_validate_fix): Likewise.
+ (tc_gen_reloc): Likewise.
+ (lex_got): Likewise. Remove static mode_name. Change array size
+ of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
+ (x86_cons): Use object_64bit for deciding whether quad fields can
+ have relocations.
+
+2005-08-18 Christian Groessler <chris at groessler.org>
+
+ * config/tc-h8300.h: Remove TC_RELOC_MANGLE/tc_reloc_mangle.
+ * config/tc-mcore.h: Likewise.
+ * config/tc-z8k.h: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/tc-sh.h: Remove TC_RELOC_MANGLE and
+ sh_coff_reloc_mangle declaration.
+ * config/tc-sh.c: (md_apply_fix): Fix comment for case
+ BFD_RELOC_SH_USES.
+
+2005-08-18 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * config/tc-sh64.c (sh64_target_format): Check preset_target_arch
+ to confirm that no ISA is specified.
+
+2005-08-18 Nick Clifton <nickc at redhat.com>
+
+ * write.c (relax_segment): Count the number of frags being
+ processed and use this to compute a maximum limit on the number of
+ iterations that will be allowed when attempting to relax the
+ segment.
+
+2005-08-17 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * config/obj-coff.c (obj_coff_weak): Set auxiliary record
+ of NT weak externals to IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY.
+
+2005-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_set_cpu): Don't select 64-bit based on
+ default cpu.
+
+2005-08-15 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Fix encoding of i16-bit conditional
+ instructions.
+ (do_t_mvn_tst, do_t_neg, do_t_shift): Ditto.
+
+2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * config/tc-ppc.c (parse_cpu): Add -me300 support.
+ (md_show_usage): Likewise.
+ * doc/c-ppc.texi (PowerPC-Opts): Document it.
+
+2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * config/tc-s390.c (md_parse_option): Add cpu type z9-109.
+ (md_gather_operands): Add support for optional operands.
+
+2005-08-12 Dmitry Diky <diwil at spec.ru>
+ * config/tc-msp430.c (msp430_enable_relax): New flag.
+ (msp430_enable_polys): Likewise.
+ (OPTION_RELAX): New option.
+ (OPTION_POLYMORPHS): Likewise.
+ (md_longopts): New long options.
+ (md_show_usage): Updated.
+ (md_parse_option): Add new options handler.
+ (msp430_operands): Add check if polymorph insns are enabled.
+ (msp430_force_relocation_local): New function.
+ (md_apply_fix): Now delete relocs according to new flags combination.
+ (msp430_relax_frag): Convert long branches to short branches only if
+ flag msp430_enable_relax is set.
+ * config/tc-msp430.h (TC_FORCE_RELOCATION_LOCAL): Defined.
+ (msp430_force_relocation_local): Likewise.
+ * doc/c-msp430.texi: Describe new options.
+
+2005-08-11 Ian Lance Taylor <ian at airs.com>
+
+ * Makefile.am ($(srcdir)/make-gas.com): Remove target.
+ (stamp-mk.com): Likewise.
+ (EXTRA_DIST): Remove make-gas.com from list.
+ (MOSTLYCLEANFILES): Remove stamp-mk.com from list.
+ * Makefile.in: Regenerate.
+
+2005-08-11 Hans-Peter Nilsson <hp at axis.com>
+
+ * subsegs.c (subseg_change): Move declaration of seginfo to before
+ first statement.
+
+2005-08-11 Alan Modra <amodra at bigpond.net.au>
+
+ * README-vms: Delete.
+ * config-gas.com: Delete.
+ * makefile.vms: Delete.
+ * vmsconf.sh: Delete.
+ * config/atof-tahoe.c: Delete.
+ * config/m88k-opcode.h: Delete.
+ * config/obj-bout.c: Delete.
+ * config/obj-bout.h: Delete.
+ * config/obj-hp300.c: Delete.
+ * config/obj-hp300.h: Delete.
+ * config/tc-a29k.c: Delete.
+ * config/tc-a29k.h: Delete.
+ * config/tc-h8500.c: Delete.
+ * config/tc-h8500.h: Delete.
+ * config/tc-m88k.c: Delete.
+ * config/tc-m88k.h: Delete.
+ * config/tc-tahoe.c: Delete.
+ * config/tc-tahoe.h: Delete.
+ * config/tc-tic80.c: Delete.
+ * config/tc-tic80.h: Delete.
+ * config/tc-w65.c: Delete.
+ * config/tc-w65.h: Delete.
+ * config/te-aux.h: Delete.
+ * config/te-delt88.h: Delete.
+ * config/te-delta.h: Delete.
+ * config/te-dpx2.h: Delete.
+ * config/te-hp300.h: Delete.
+ * config/te-ic960.h: Delete.
+ * config/vms-a-conf.h: Delete.
+ * doc/c-a29k.texi: Delete.
+ * doc/c-h8500.texi: Delete.
+ * doc/c-m88k.texi: Delete.
+ * README: Remove obsolete examples, and list of supported targets.
+ * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
+ bout and hp300 support.
+ (DEP_FLAGS): Don't define BFD_ASSEMBLER.
+ * configure.in: Remove --enable-bfd-assembler, need_bfd,
+ primary_bfd_gas.
+ * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
+ m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
+ * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
+ * as.h: Likewise.
+ * dw2gencfi.c: Likewise.
+ * dwarf2dbg.c: Likewise.
+ * ehopt.c: Likewise.
+ * input-file.c: Likewise.
+ * listing.c: Likewise.
+ * literal.c: Likewise.
+ * messages.c: Likewise.
+ * obj.h: Likewise.
+ * output-file.c: Likewise.
+ * read.c: Likewise.
+ * stabs.c: Likewise.
+ * struc-symbol.h: Likewise.
+ * subsegs.c: Likewise.
+ * subsegs.h: Likewise.
+ * symbols.c: Likewise.
+ * symbols.h: Likewise.
+ * tc.h: Likewise.
+ * write.c: Likewise.
+ * write.h: Likewise.
+ * config/aout_gnu.h: Likewise.
+ * config/obj-aout.c: Likewise.
+ * config/obj-aout.h: Likewise.
+ * config/obj-coff.c: Likewise.
+ * config/obj-coff.h: Likewise.
+ * config/obj-evax.h: Likewise.
+ * config/obj-ieee.h: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-arm.h: Likewise.
+ * config/tc-avr.c: Likewise.
+ * config/tc-avr.h: Likewise.
+ * config/tc-crx.h: Likewise.
+ * config/tc-d10v.h: Likewise.
+ * config/tc-d30v.h: Likewise.
+ * config/tc-dlx.h: Likewise.
+ * config/tc-fr30.h: Likewise.
+ * config/tc-frv.h: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-h8300.h: Likewise.
+ * config/tc-hppa.h: Likewise.
+ * config/tc-i370.h: Likewise.
+ * config/tc-i386.c: Likewise.
+ * config/tc-i386.h: Likewise.
+ * config/tc-i860.h: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-i960.h: Likewise.
+ * config/tc-ip2k.h: Likewise.
+ * config/tc-iq2000.h: Likewise.
+ * config/tc-m32c.h: Likewise.
+ * config/tc-m32r.h: Likewise.
+ * config/tc-m68hc11.h: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-m68k.h: Likewise.
+ * config/tc-maxq.c: Likewise.
+ * config/tc-maxq.h: Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-mcore.h: Likewise.
+ * config/tc-mn10200.h: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-mn10300.h: Likewise.
+ * config/tc-ms1.h: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-msp430.h: Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-ns32k.h: Likewise.
+ * config/tc-openrisc.h: Likewise.
+ * config/tc-or32.c: Likewise.
+ * config/tc-or32.h: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-s390.h: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh.h: Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic30.h: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic4x.h: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-tic54x.h: Likewise.
+ * config/tc-v850.h: Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-vax.h: Likewise.
+ * config/tc-xstormy16.h: Likewise.
+ * config/tc-xtensa.h: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * config/tc-z8k.h: Likewise.
+ * config/vms-a-conf.h
+ * doc/Makefile.am: Likewise.
+ * doc/all.texi: Likewise.
+ * doc/as.texinfo: Likewise.
+ * doc/internals.texi: Likewise.
+ * doc/Makefile.in: Regenerate.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-08-09 Nick Clifton <nickc at redhat.com>
+
+ PR 1070
+ * macro.c (getstring): Do not treat round parentheses exactly the
+ same as angle brackets - the parentheses need to be preserved and
+ passed on to the macro processing code.
+
+2005-08-08 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-msp430.c (MSP430_ISA_21): Define.
+ (mcu_types): Add entries for msp430x21xx variants.
+
+2005-08-08 Nick Clifton <nickc at redhat.com>
+
+ PR 1070
+ * macro.c (getstring): Treat round parentheses in the same way as
+ angle brackets.
+ (get_any_string): Likewise.
+
+2005-08-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR gas/1118
+ * as.c (parse_args): Handle -al=<FILE>.
+
+2005-08-07 Nick Clifton <nickc at redhat.com>
+
+ * read.c (s_app_line): Accept a line number of 0 for compatibility
+ with gcc's output for assembler-with-cpp files.
+
+2005-08-05 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (current_it_mask, current_cc): New variables.
+ (do_t_add_sub): Use correct encodings inside IT block.
+ (do_t_arit3c): Ditto.
+ (do_t_it): Simplify logic. Set current_it_mask and current_cc.
+ (md_assemble): Verify conditional suffixes agains IT blocks.
+
+2005-08-05 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
+ constants.
+ (encode_thumb32_shifted_operand): Prohibit register shifts.
+ (encode_thumb32_addr_mode): Fix typo.
+ (insns): Correct thumb2 ldm and stm opcodes.
+
+2005-08-02 Khem Raj <kraj at mvista.com>
+
+ * config/tc-arm.c (do_iwmmxt_wldstd): Correct the offset range for
+ WLDRD/WSTRD instruction.
+
+2005-08-02 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (md_apply_fix <ELF>): Don't warn on overflow
+ if emitting a reloc.
+
+2005-07-29 Thiemo Seufer <ths at networkno.de>
+
+ * config/tc-mips.c (s_mips_globl): Allow multiple symbols per .globl.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
+ pop.
+ (do_t_addr): Implement 32-bit variant.
+ (do_t_push_pop): Make some errors warnings. Handle single register
+ 32-bit case.
+ (insns): Use tCE for adr.
+ (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
+ (md_apply_fix): Ditto.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (parse_tb): New function.
+ (enum operand_parse_code): Add OP_TB.
+ (parse_operands): Handle OP_TB.
+ (do_t_add_sub_w, do_t_tb): New functions.
+ (insns): Add entries for addw, subw, tbb and tbh.
+ (md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
+
+2005-07-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (m32r_check_fixup): Fixed X_op check.
+
+2007-07-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-i386.c (handle_large_common): Declare only for ELF.
+
+2005-07-27 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.h (unw_r_record): Change type of fr_mem to unsigned
+ int.
+ (unw_p_record): Remove unused/redundant fields imask and rmask.
+ Combine spoff and pspoff into a union. Combine gr and br into a
+ union. Change type of grmask and brmask to unsigned char. Change type
+ of frmask to unsigned int.
+ (unw_x_record): Combine spoff, pspoff, and treg into a union.
+ * config/tc-ia64.c (unwind): New field 'pending_saves'.
+ (check_pending_save): New.
+ (alloc_record): Clear out entire record.
+ (output_psp_gr): Use renamed structure fields.
+ (output_psp_sprel): Likewise.
+ (output_rp_gr): Likewise.
+ (output_rp_br): Likewise.
+ (output_rp_psprel): Likewise.
+ (output_rp_sprel): Likewise.
+ (output_pfs_gr): Likewise.
+ (output_pfs_psprel): Likewise.
+ (output_pfs_sprel): Likewise.
+ (output_preds_gr): Likewise.
+ (output_preds_psprel): Likewise.
+ (output_preds_sprel): Likewise.
+ (output_spill_base): Likewise.
+ (output_unat_gr): Likewise.
+ (output_unat_psprel): Likewise.
+ (output_unat_sprel): Likewise.
+ (output_lc_gr): Likewise.
+ (output_lc_psprel): Likewise.
+ (output_lc_sprel): Likewise.
+ (output_fpsr_gr): Likewise.
+ (output_fpsr_psprel): Likewise.
+ (output_fpsr_sprel): Likewise.
+ (output_priunat_gr): Likewise.
+ (output_priunat_psprel): Likewise.
+ (output_priunat_sprel): Likewise.
+ (output_bsp_gr): Likewise.
+ (output_bsp_psprel): Likewise.
+ (output_bsp_sprel): Likewise.
+ (output_bspstore_gr): Likewise.
+ (output_bspstore_psprel): Likewise.
+ (output_bspstore_sprel): Likewise.
+ (output_rnat_gr): Likewise.
+ (output_rnat_psprel): Likewise.
+ (output_rnat_sprel): Likewise.
+ (output_spill_psprel): Likewise.
+ (output_spill_sprel): Likewise.
+ (output_spill_reg): Likewise.
+ (output_fr_mem): Likewise. Allocate one unwind record per set mask
+ bit.
+ (output_frgr_mem): Likewise.
+ (output_gr_mem): Likewise.
+ (output_br_mem): Likewise.
+ (output_gr_gr): Likewise.
+ (output_br_gr): Likewise.
+ (fixup_unw_records): Likewise.
+ (process_one_record): Use renamed structure fields. For gr_gr and
+ br_gr, collect mask from chain of records before output.
+ (in_prologue): Simplify and eliminate early returns. Call
+ check_pending_save.
+ (in_body): Simplify and eliminate early returns.
+ (dot_body): Call check_pending_save.
+ (md_assemble): Update comment. Deal with pending saves.
+
+2005-07-26 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (optimize_imm): Calculate candidate immediates
+ mask from guessed suffix, but mask out other immediate types only
+ if at least on candidate is valid for the insn.
+
+2005-07-25 DJ Delorie <dj at redhat.com>
+
+ * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
+ Support %mod() modifiers from opcodes.
+ * doc/c-m32c.texi (M32C-Modifiers): New section.
+
+2005-07-25 Jan Hubicka <jh at suse.cz>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
+ defined.
+ (elf_com_section_ptr): New.
+ (elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
+ (elf_common_parse): Make it global. Use elf_com_section_ptr
+ instead of bfd_com_section_ptr.
+ (obj_elf_change_section): Handle x86-64 large bss sections.
+
+ * config/obj-elf.h (elf_com_section_ptr): New.
+ (elf_common_parse): New.
+
+ * config/tc-i386.c (handle_large_common): New.
+ (md_pseudo_table): Add "largecomm".
+ (x86_64_section_letter): New.
+ (x86_64_section_word): New.
+
+ * config/tc-i386.h (x86_64_section_word): New.
+ (x86_64_section_letter): New.
+ (md_elf_section_letter): New. Defined.
+ (md_elf_section_word): Likewise.
+
+2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Remove i386-*-rtemself*.
+ Remove sparc-*-rtemself*.
+
+2005-07-21 Ben Elliston <bje at gnu.org>
+
+ * config/tc-m68k.h: Remove TE_LYNX conditional code.
+
+2005-07-21 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (encode_thumb32_addr_mode): Don't set
+ inst.reloc.pc_rel.
+
+2005-07-20 Tavis Ormandy <taviso at gentoo.org>
+
+ * messages.c: Use vsnprintf instead of vsprintf.
+
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (tc_gen_reloc): Check BFD_RELOC_32_PCREL and
+ BFD_RELOC_16_PCREL to Support R_M32R_REL32.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Restore alpha ordering to list of arches.
+
+2005-07-18 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * tc-hppa.c (pa_ip): Reject match for '#' immediate if not pa20.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (md_begin): Use IS_ELF.
+ (tc_i386_fix_adjustable): Likewise.
+ (md_estimate_size_before_relax): Likewise.
+ (md_apply_fix): Likewise.
+ (i386_target_format): Likewise.
+ (lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
+ (i386_immediate): Remove #ifdef LEX_AT.
+ (i386_displacement): Likewise.
+ * config/tc-i386.h (x86_cons): Prototype only when ELF and when not
+ LEX_AT.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (reloc): Convert to ISO C90. Change first
+ parameter to unsigned. Parameter sign now is tristate - zero/
+ positive mean unsigned/signed, negative means signedness doesn't
+ matter. Check field size,
+ signedness, and pcrel-ness are in agreement between relocated field
+ and relocation type. Adjust diagnostics.
+ (optimize_imm): And type mask of operand instead of overwriting it.
+ (lex_got): Convert to ISO C90. Add third parameter. Add new field to
+ local structure and initialize gotrel accordingly. Pass caller as
+ mask of types that the operator can match.
+ (x86_cons_fix_new): Let reloc know that signedness of relocation
+ doesn't matter.
+ (x86_pe_cons_fix_new): Likewise.
+ (x86_cons): Pass additional argument to lex_got.
+ (i386_immediate): New local variable 'types'. Pass its address as
+ additional argument to lex_got. Mask out operand types not supported
+ befoe returning.
+ (i386_displacement): Likewise. Set bigdisp to all types supported in
+ 64-bit mode, combining the previously split initialization.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (parse_insn): Reject prefix if unavailable in
+ current mode.
+
+2005-07-16 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (pa_ip): Search entire mnemonic before considering
+ promoted match.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/config/tc-i386.h (CpuVMX): New.
+ (CpuUnknownFlags): Add CpuVMX.
+
+2005-07-14 Jim Blandy <jimb at redhat.com>
+
+ Add support for the Renesas M32C.
+ * Makefile.am (CPU_TYPES): List m32c.
+ (TARGET_CPU_CFILES): List config/tc-m32c.c.
+ (TARGET_CPU_HFILES): List config/tc-m32c.h.
+ * configure.in: Add case for m32c.
+ * configure.tgt: Add cases for m32c and m32c-*-elf.
+ * configure: Regenerated.
+ * config/tc-m32c.c, config/tc-m32c.h: New files.
+ * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Set M32C.
+ * doc/as.texinfo: Add text for the M32C-specific options and line
+ comment characters, and refer to c-m32c.texi.
+ * doc/c-m32c.texi: New file.
+
+2005-07-14 Nick Clifton <nickc at redhat.com>
+
+ PR 1069
+ * config/tc-crx.c (reset_vars): Use strncpy to prevent overflowing
+ the ins_parse buffer.
+
+2005-07-10 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Remove a29k-*-rtems*, hppa*-*-rtems*,i386-go32-rtems*,
+ i386-*-rtemscoff*, sparc-*-rtemsaout*.
+
+2005-07-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-i386.c (optimize_disp): Optimize signed 32bit
+ displacements.
+
+2005-07-08 Ben Elliston <bje at au.ibm.com>
+
+ * frags.h: Remove ANSI_PROTOTYPES conditional code.
+ * config/obj-elf.h: Likewise.
+ * config/tc-h8300.h: Likewise.
+ * config/tc-h8500.h: Likewise.
+ * config/tc-i370.h: Likewise.
+ * config/tc-i386.h: Likewise.
+ * config/tc-m68hc11.h: Likewise.
+ * config/tc-m68k.h: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-s390.h: Likewise.
+ * config/tc-sh.h: Likewise.
+ * config/tc-sparc.h: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-w65.h: Likewise.
+ * config/tc-xtensa.h: Likewise.
+
+2005-07-08 Hans-Peter Nilsson <hp at axis.com>
+
+ PR gas/1049
+ * config/tc-cris.h (MD_APPLY_SYM_VALUE): Define.
+
+2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
+
+ * config/tc-tic30.c (debug): Add format attribute. Fix format
+ bugs.
+
+2005-07-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add sse3.
+
+ * config/tc-i386.h (CpuSSE3): Renamed from ...
+ (CpuPNI): This. Defined as CpuSSE3.
+
+ * doc/c-i386.texi: Document .sse3.
+
+2005-07-06 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.
+
+2005-07-05 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-pdp11.c (md_apply_fix): Cast first argument to
+ md_chars_to_numbers to an unsigned pointer in order to avoid a
+ compile time warning.
+
+2005-07-05 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-ppc.c (ppc_target_format): Add VxWorks.
+
+2005-07-05 Aldy Hernandez <aldyh at redhat.com>
+
+ * config/tc-ms1.c: New.
+ * config/tc-ms1.h: New.
+ * testsuite/gas/ms1/allinsn.d: New.
+ * testsuite/gas/ms1/allinsn.s: New.
+ * testsuite/gas/ms1/badinsn.s: New.
+ * testsuite/gas/ms1/badinsn1.s: New.
+ * testsuite/gas/ms1/badoffsethigh.s: New.
+ * testsuite/gas/ms1/badoffsetlow.s: New.
+ * testsuite/gas/ms1/badorder.s: New.
+ * testsuite/gas/ms1/badreg.s: New.
+ * testsuite/gas/ms1/badsignedimmhigh.s: New.
+ * testsuite/gas/ms1/badsignedimmlow.s: New.
+ * testsuite/gas/ms1/badsyntax.s: New.
+ * testsuite/gas/ms1/badsyntax1.s: New.
+ * testsuite/gas/ms1/badunsignedimmhigh.s: New.
+ * testsuite/gas/ms1/badunsignedimmlow.s: New.
+ * testsuite/gas/ms1/errors.exp: New.
+ * testsuite/gas/ms1/ldst.s: New.
+ * testsuite/gas/ms1/misc.d: New.
+ * testsuite/gas/ms1/misc.s: New.
+ * testsuite/gas/ms1/ms1-16-003.d: New.
+ * testsuite/gas/ms1/ms1-16-003.s: New.
+ * testsuite/gas/ms1/ms1.exp: New.
+ * testsuite/gas/ms1/msys.d: New.
+ * testsuite/gas/ms1/msys.s: New.
+ * testsuite/gas/ms1/relocs.d: New.
+ * testsuite/gas/ms1/relocs.exp: New.
+ * testsuite/gas/ms1/relocs1.s: New.
+ * testsuite/gas/ms1/relocs2.s: New.
+
+2005-07-05 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.h (CpuSVME): New.
+ (CpuUnknownFlags): Include CpuSVME.
+ * config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
+ as alias of sledgehammer.
+ (md_assemble): Include invlpga in the check for insns with two source
+ operands.
+ (process_operands): Include SVME insns in the check for ignored
+ segment overrides. Adjust diagnostic.
+ (i386_index_check): Special-case SVME insns with memory operands.
+
+2005-07-04 Khem Raj <kraj at mvista.com>
+ Nick Clifton <nickc at redhat.com>
+
+ * tc-arm.c (struct arm_it): Make operands.imm signed to match its
+ use an immediate value.
+ (parse_vfp_reg_list): Make the 2nd parameter an unsigned pointer
+ since the register field of the operands structure is unsigned.
+ (s_arm_unwind_save_vfp): Make "reg" unsigned.
+ (parse_operands): Make the 2ns parameter an unsigned pointer to
+ match its use.
+ (do_ldrd): When using the imm field of the operands structure as a
+ second register field, treat it as unsigned.
+
+2005-07-04 Alan Modra <amodra at bigpond.net.au>
+
+ PR 1004
+ * config/obj-elf.c (obj_elf_change_section): Use backend
+ get_sec_type_attr.
+
+2005-07-01 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (line_separator_chars): Add '{' and '}'.
+ (output_spill_psprel, output_spill_psprel_p): Combine.
+ (output_spill_sprel, output_spill_sprel_p): Combine.
+ (output_spill_reg, output_spill_regp_p): Combine.
+ (process_one_record): Handle psp_psprel.
+ (parse_predicate_and_operand): New.
+ (convert_expr_to_ab_reg): Two new parameters. Return void. Always
+ initialize output values. Emit diagnostic case here.
+ (convert_expr_to_xy_reg): Likewise. Don't allow r0, f0, and f1.
+ (add_unwind_entry): New second parameter. Allow first parameter to
+ be NULL. Parse optional tag, emit warning about further support for
+ it otherwise being missing. Check end-of-line when requested.
+ (dot_fframe): Clear operand when wrong. Allow tag.
+ (dot_vframe): Likewise.
+ (dot_vframesp): Likewise. Rename parameter, issue warning when psp
+ relative.
+ (dot_vframepsp): Remove.
+ (dot_altrp): Clear operand when wrong. Allow tag.
+ (dot_save): Likewise. Let default case also go through
+ add_unwind_entry.
+ (dot_savemem): Likewise.
+ (dot_restore): Don't return when wrong operand. Allow tag.
+ (dot_spillreg, dot_spillreg_p): Combine. Simplify by using
+ parse_predicate_and_operand and the new arguments to
+ convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
+ when wrong operand. Allow tag.
+ (dot_restorereg, dot_restorereg_p): Likewise.
+ (dot_spillmem, dot_spillmem_p): Likewise.
+ (dot_saveg): Clear operand when wrong. Perform tighter operand
+ checks. Allow tag.
+ (dot_savef): Likewise.
+ (dot_saveb): Likewise.
+ (dot_savegf): Likewise.
+ (dot_spill): Remove end-of-line check. Combine. Simplify by using
+ parse_predicate_and_operand and the new arguments to
+ convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
+ when wrong operand. Allow tag.
+ (popcount): New.
+ (dot_label_state): Don't return when wrong operand.
+ (dot_copy_state): Likewise.
+ (dot_unwabi): Likewise. Check if in prologue.
+ (dot_body): Don't call demand_empty_rest_of_line.
+ (dot_prologue): Type of mask and grsave is unsigned. Perform tighter
+ operand checks.
+ (md_pseudo_table): Also use dot_restorereg for .restorereg.p. Also
+ use dot_spillreg for .spillreg.p. Also use dot_spillmem for
+ .spillpsp.p and .spillsp.p. Also use dot_vframesp for .vframepsp.
+ (parse_operand): New second parameter. Don't deal with '}' here
+ anymore. Don't advance past end-of-line.
+ (parse_operands): Pass second argument to parse_operand.
+ (ia64_start_line): Prevent out-of-bounds access through
+ input_line_pointer. Deal with '}' here.
+ (ia64_unrecognized_line): Don't deal with '}' here.
+ (dot_alias): Use ignore_rest_of_line not its deprecated alias
+ discard_rest_of_line.
+
+2005-06-30 Zack Weinberg <zack at codesourcery.com>
+
+ * config/tc-arm.c (T_OPCODE_BRANCH, encode_arm_addr_mode_2)
+ (encode_arm_addr_mode_3, encode_arm_cp_address, do_blx, do_t_blx)
+ (do_t_branch, insns [b, bl]): Don't encode pipeline offset.
+ (do_branch): Always set inst.reloc.pc_rel.
+ (s_arm_elf_cons): Disallow use of (plt) suffix.
+ (do_adrl): Adjust X_add_number unconditionally.
+ (md_pcrel_from): Rename md_pcrel_from_section, add second segT
+ argument. Handle all adjustment for pipeline offset here.
+ (md_apply_fix): No need to undo work of md_pcrel_from. No
+ need to extract pre-encoded pipeline adjustments from various
+ branch instructions. Generally, assume instructions are already
+ all-bits-zero in the field being fixed up. Remove all OBJ_ELF
+ special cases. Handle BFD_RELOC_ARM_PLT32 like
+ BFD_RELOC_ARM_PCREL_BRANCH.
+ (tc_gen_reloc): Remove OBJ_ELF special case.
+ * config/tc-arm.c: Define MD_PCREL_FROM_SECTION.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (check-DEJAGNU): Don't search for expect.
+ * Makefile.in: Regenerate.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (EXPECT): Set to expect.
+ (RUNTEST): Likewise, set to runtest.
+ * Makefile.in: Regenerate.
+
+2005-06-23 Ben Elliston <bje at gnu.org>
+
+ * config/m68k-parse.h: Use ISO C90.
+ * config/m68k-parse.y: Likewise.
+ * config/tc-m68k.h: Likewise.
+
+2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1013
+ * config/tc-i386.c (md_assemble): Don't call optimize_disp on
+ movabs.
+ (optimize_disp): Optimize only if possible. Don't use 64bit
+ displacement on non-constants and do same on constants if
+ possible.
+
+2005-06-17 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
+ (tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
+ BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
+ (output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
+ and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
+ aborting.
+ (output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
+ Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
+ (tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
+ Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
+ BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
+ BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
+ convert 8-byte pc-relative relocations.
+ (lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
+ (i386_validate_fix): Likewise.
+ (x86_cons): Also handle quad values in 64-bit mode.
+ (i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
+ (md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
+ BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
+ to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
+
+2005-06-13 Zack Weinberg <zack at codesourcery.com>
+
+ * config/tc-arm.c (find_real_start): Check S_IS_LOCAL on
+ symbolP as well as for names with a leading dot. Use ACONCAT.
+ (md_apply_fix): For branch relocations, only replace value
+ with fixP->fx_offset (under #ifdef OBJ_ELF) when !fixP->fx_done.
+ (arm_force_relocation): Remove #ifdef OBJ_ELF case.
+ * config/tc-arm.h (LOCAL_LABEL): Remove unnecessary parentheses.
+ (LOCAL_LABEL_PREFIX): Don't define.
+
+2005-06-10 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-hppa.c (pa_block): Allocate just one byte for the
+ fill pattern.
+
+2005-06-08 James E Wilson <wilson at specifixinc.com>
+
+ PR 994
+ * config/tc-ia64.c (slot_index): Revert last change. If first_frag
+ is NULL, then emit a warning, and return the current index.
+
+2005-06-08 Tomas Hurka <tom at hukatronic.cz>
+
+ PR 991
+ * config/tc-m68k.c (m68k_ip): Test for insn compatiblity using a
+ temporary copy of the operands array so that changes can be safely
+ backed out if the insn does not match.
+ (m68k_compare_opcode): Shortcut the test when the parameters are
+ the same. Return 1 if the names match but the second opcode is
+ further on in the array than the first.
+
+2005-06-08 Nick Clifton <nickc at redhat.com>
+
+ PR 994
+ * config/tc-ia64.c (slot_index): Check for a NULL first_frag.
+
+2005-06-08 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * config/tc-m32r.c (use_parallel): Change default value from 1 to 0.
+
+2005-06-07 Aldy Hernandez <aldyh at redhat.com>
+ Michael Snyder <msnyder at redhat.com>
+ Stan Cox <scox at redhat.com>
+
+ * configure.in: Add ms1 case.
+
+ * configure: Regenerate.
+
+ * configure.tgt: Add ms1 case.
+
+2005-06-07 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.h (resource_table): Change units to unsigned chars.
+ * config/tc-xtensa.c (new_resource_table): Likewise.
+ (resize_resource_table): Likewise.
+ (release_resources): Fix assertion for unsigned values.
+
+2005-06-07 Zack Weinberg <zack at codesourcery.com>
+
+ * cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c
+ * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h
+ * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c
+ * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h
+ * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c
+ * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h
+ * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h
+ * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c
+ * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h
+ * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c
+ * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h
+ * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c
+ * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c
+ * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h
+ * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c
+ * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c
+ * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c
+ * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c
+ * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c
+ * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h
+ * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h
+ * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c
+ * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c
+ * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h
+ * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c
+ * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c
+ * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h
+ * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h
+ * config/tc-xtensa.c, config/tc-z8k.c:
+ Replace all instances of the string "_apply_fix3" with
+ "_apply_fix".
+ * po/POTFILES.in, po/gas.pot: Regenerate.
+
+2005-06-08 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (POTFILES): Remove GAS_CFILES.
+ * Makefile.in: Regenerate.
+
+2005-06-07 David Ung <davidu at mips.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add cpu names m4k, 24k,
+ 24kc, 24kf and 24kfx under MIPS32 release 2.
+
+2005-06-04 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (CE, C3, CM, UE, UF): Redefine without reference
+ to their Thumb-enabled equivalents.
+
+2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (load_register): Add leading "0x" to the
+ output of sprintf_vma().
+ (macro): Likewise.
+
+2005-06-01 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (TxCE, TxC3, TxCM, TUE, TUF): Remove redundant
+ test for the presence of thumb version of the parsing functions
+ since they must always exist and the test generates a compile time
+ warning message.
+
+2005-05-31 Richard Henderson <rth at redhat.com>
+
+ * config/tc-alpha.c (O_lituse_jsrdirect): New.
+ (alpha_reloc_op): Add it.
+ (debug_exp): Handle it.
+ (DUMMY_RELOC_LITUSE_JSRDIRECT): New.
+ (emit_insn): Handle it.
+ * doc/c-alpha.texi (Alpha-Relocs): Document lituse_jsrdirect.
+
+2005-05-31 Christian Groessler <chris at groessler.org>
+
+ * write.c (dump_section_relocs): Convert to ISO-C.
+ (write_relocs): Avoid signed/unsigned and fprintf argument
+ warnings in debug code.
+
+2005-05-26 Zack Weinberg <zack at codesourcery.com>
+
+ * config/tc-arm.h (TC_FIX_TYPE): Change to int.
+ (TC_INIT_FIX_DATA): Initialize to 0, not NULL.
+ * config/tc-arm.c (fix_new_arm): Remove now-unnecessary cast.
+ (md_apply_fix3): Delete fix_is_thumb variable; refer to
+ fixP->tc_fix_data directly in the sole place it was used.
+ Explicitly truncate value, *valP, fixP->fx_addnumber, and
+ fixP->fx_offset to 32 bits, for consistent behavior between 32-
+ and 64-bit hosts.
+
+2005-05-27 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (struct proc_pending): New.
+ (unwind): Replace proc_start with proc_pending.
+ (unwind_diagnostic): Check unwind.proc_pending.sym.
+ (dot_proc): Replace unwind.proc_start with unwind.proc_pending.sym.
+ Check if previous proc not closed. Record all entry points.
+ (dot_endp): Replace unwind.proc_start with unwind.proc_pending.sym.
+ Set symbol sizes for entry points recorded in dot_proc. Check
+ arguments for consistency with respective .proc's.
+ (md_assemble): Replace unwind.proc_start with
+ unwind.proc_pending.sym.
+
+2005-05-27 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Restrict scope of ptr, end_ptr,
+ and last_ptr. Check all in-use slots for first one with non-NULL
+ unwind_record. Don't reload end_ptr before second update round.
+
+2005-05-26 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (extra_goodness): Update comment.
+ (md_begin): Add debugging code to print best_template table.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (md_begin): Don't try to match slot 2 of an MLX
+ template.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (ia64_gen_real_reloc_type): Also handle
+ BFD_RELOC_UNUSED when determining the width of the reloc.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_endp): Clear out all three pointers in unwind
+ section entry.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_radix): Rewrite.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (struct unw_rec_list): Remove next_slot_number
+ and next_slot_frag.
+ (alloc_record): Remove references to next_slot_number and
+ next_slot_frag.
+ (emit_one_bundle): Likewise.
+
+2005-05-22 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-v850.c (md_apply_fix3): Pass the address of the
+ message buffer when invoking the insert function.
+
+2005-05-21 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (pa_ip): Promote architecture from PA 1.0 to 1.1
+ only if an instruction match is found.
+
+2005-05-20 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xg_assemble_vliw_tokens): Change subtraction
+ to addition in argument to xtensa_dwarf2_emit_insn.
+
+2005-05-19 Zack Weinberg <zack at codesourcery.com>
+
+ * Makefile.am: Have 'all' depend on 'info'.
+ * Makefile.in: Regenerate.
+
+2005-05-19 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_force_relocation): Add BFD_RELOC_24_PLT_PCREL.
+
+2005-05-19 Anton Blanchard <anton at samba.org>
+
+ * config/tc-ppc.c (parse_cpu): Handle "-mpower5".
+ (md_show_usage): Document it.
+ (ppc_setup_opcodes): Insert POWER5 mnemonics.
+ * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5".
+
+2005-05-19 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_endp): Don't use global symbol for unwind
+ relocations in unwind section.
+
+2005-05-18 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-v850.c (md_apply_fix3): Only use the insertion routine
+ if one exists. Ignore any error messages it may produce, just
+ allow it to perform the insertion.
+
+2005-05-17 Zack Weinberg <zack at codesourcery.com>
+
+ * hash.c (hash_lookup): Add len parameter. All callers changed.
+ (hash_find_n): New interface.
+ * hash.h: Prototype hash_find_n.
+ * sb.c: Include as.h.
+ (scrub_from_sb, sb_to_scrub, scrub_position): New statics.
+ (sb_scrub_and_add_sb): New interface.
+ * sb.h: Prototype sb_scrub_and_add_sb.
+ * input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
+
+ * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
+ reference to BFD_RELOC_ARM_GOT12 which is never generated.
+ * config/tc-arm.c: Rewrite, adding Thumb-2 support.
+
+2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/Makefile.am (gasver.texi): Don't use $<.
+ * doc/Makefile.in: Regenerated.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ PR 876
+ * symbols.c (resolve_symbol_value): Do not move symbols whose
+ value expression has not been resolved or finalized into the
+ absolute section as this will confuse other parts of the assembler
+ into thinking that their value is zero.
+
+2005-05-17 Jan Beulich <jbeulich at novell.com>
+
+ * read.c (_find_end_of_line): New.
+ (find_end_of_line): New.
+ (HANDLE_CONDITIONAL_ASSEMBLY): Use it.
+ (read_a_source_file): Use it.
+ (s_globl): Use it.
+ (s_macro): Use it.
+ (get_line_sb): Use it.
+ (s_errwarn): Replace discard_rest_of_line by ignore_rest_of_line.
+ (s_comm_internal): Likewise.
+ (s_lsym): Likewise.
+ (s_macro): Likewise.
+ (s_ignore): Use ignore_rest_of_line.
+ * read.h (find_end_of_line): Prototype.
+ (discard_rest_of_line): Remove prototype. #define to
+ ignore_rest_of_line.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-v850,h (TC_FIX_TYPE): Define.
+ (TC_INIT_FIX_TYPE): Define.
+ * config/tc-v850.c (md_assemble): When creating a fix record the
+ operand in the tc_fix_data field.
+ (md_apply_fix3): When applying a resolved fix use the operand's
+ insertion procedure to store the value, if the operand has been
+ recorded.
+
+2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am (m68k-parse.c, itbl-parse.c): Update ylwrap
+ invocation.
+ * Makefile.in: Regenerated.
+
+2005-05-13 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_insnbuf_set_operand): Clarify error
+ message.
+ (xtensa_mark_zcl_first_insns): Fix incorrect nesting of conditional
+ for handling RELAX_CHECK_ALIGN_NEXT_OPCODE.
+
+2005-05-11 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (md_apply_fix3): Allow pcrel forms of BFD_RELOC_16,
+ BFD_RELOC_LO16, BFD_RELOC_HI16 and BFD_RELOC_HI16_S.
+
+2005-05-10 Michael Matz <matz at suse.de>
+
+ * frags.c (frag_grow): Don't be too greedy in allocating memory.
+
+ * config/tc-hppa.c (pa_block): Check arguments to .block[z].
+
+2005-05-10 Hans-Peter Nilsson <hp at bitrange.com>
+
+ PR binutils/886
+ * config/tc-mmix.c (mmix_handle_mmixal): Rearrange slightly.
+ Handle label-without-colon before ordinary dot-pseudo as an
+ ordinary label. Don't leak memory for label-without-colon alone
+ on a line. Don't mmixal-munge operands for dot-pseudos.
+
+2005-05-10 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (get_any_string): Remove the two last parameters. Replace
+ references to the former expand parameter by using macro_alternate.
+ Simplify loop condition for checking for end-of-string.
+ (get_string): Remove redunant call to sb_skip_white.
+ (do_formals): Remove two last arguments to get_any_string.
+ (macro_expand): Likewise.
+ (expand_irp): Likewise.
+
+2005-05-10 Jan Beulich <jbeulich at novell.com>
+
+ * read.c (s_macro): Move local variable 'local' to smaller scope.
+ Call sb_kill on it when done.
+
+2005-05-09 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (optimize_disp): Discard displacement entirely
+ when zero and not required by encoding constraints.
+
+2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 936
+ * config/tc-sh64.c (sh64_fake_label): New.
+
+ * config/tc-sh64.h (TC_FAKE_LABEL): New.
+
+ * doc/internals.texi (TC_FAKE_LABEL): Document.
+
+ * write.c (TC_FAKE_LABEL): New.
+ (adjust_reloc_syms): Use it.
+ (write_object_file): Likewise.
+
+2005-05-09 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (parse_insn): Disallow use of prefix separator
+ and comma in Intel mode.
+
+2005-05-09 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (tc_x86_regname_to_dw2regnum): Correct 64-bit mode
+ names to match ABI. Add more registers for 32-bit and 64-bit modes.
+ Make name array static and const. Adjust lookup to account for NULL
+ entries (standing for unused register numbers).
+
+2005-05-09 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (parse_insn): Consider all matching instructions
+ when checking for string instruction after string-only prefix.
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 940
+ * config/tc-ia64.c (start_unwind_section): Properly check
+ comdat group with SHF_GROUP.
+
+2005-05-06 Bob Wilson <bob.wilson at acm.org>
+
+ * doc/c-xtensa.texi (Literal Directive): Spelling correction.
+
+2005-05-06 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c: Remove excess whitespace.
+ * config/tc-xtensa.h: Likewise.
+ * config/xtensa-istack.h: Likewise.
+ * config/xtensa-relax.c: Likewise.
+ * config/xtensa-relax.h: Likewise.
+
+2005-05-06 Nick Clifton <nickc at redhat.com>
+
+ * sb.h: Fix formatting of comments.
+ * sb.c: Fix formatting of comments.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * sb.h (sb_add_buffer): Reintroduce.
+ * sb.c (sb_add_buffer): Likewise.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (new_formal, del_formal): New.
+ (do_formals): Use new_formal. Check for and parse qualifier. Warn if
+ required argument has default value. Stop looking for more formal
+ when there was a vararg one.
+ (macro_expand_body): Use new_formal and del_formal.
+ (macro_expand): Likewise. Initialize local variable err. Don't
+ return immediately when encountering an error. Warn when keyword
+ argument already had a value assigned. Eliminate duplicate clearing
+ of argument value. When current positional argument matches parameter
+ of vararg type, assign to it all the remaining arguments. Issue error
+ when required parameter does not have value.
+ (free_macro): Use del_formal.
+ (expand_irp): Initialize formal type. Free buffers associated with
+ formal prior to returning.
+ * macro.h (struct formal_struct): Add new field 'type' with new
+ enumeration type 'formal_type'.
+ * doc/as.texinfo: Document macro parameter qualifiers.
+ * NEWS: Mention new functionality.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * cond.c (s_ifb): New.
+ * read.c (potable): Add s_ifb as handler for .ifb and .ifnb.
+ * read.h (s_ifb): Prototype.
+ * doc/as.texinfo: Document .ifb and .ifnb.
+
+2005-05-05 Steve Ellcey <sje at cup.hp.com>
+
+ * config/tc-ia64.c (MIN): Undef.
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
+
+2005-05-05 Matt Thomas <matt at 3am-software.com>
+
+ * config/tc-vax.c (md_assemble): Don't assume a valueT is 4
+ bytes.
+
+2005-05-05 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ COPYING, app.c, as.c, as.h, asintl.h, atof-generic.c, bignum.h,
+ bit_fix.h, cgen.c, cgen.h, cond.c, debug.c, depend.c, dw2gencfi.c,
+ dw2gencfi.h, dwarf2dbg.c, dwarf2dbg.h, ecoff.c, ecoff.h, ehopt.c,
+ emul-target.h, emul.h, expr.c, expr.h, flonum-copy.c,
+ flonum-konst.c, flonum.h, frags.c, frags.h, hash.c, hash.h,
+ input-file.c, input-file.h, input-scrub.c, itbl-lex.h, itbl-lex.l,
+ itbl-ops.c, itbl-ops.h, itbl-parse.y, listing.c, listing.h,
+ literal.c, macro.c, macro.h, messages.c, obj.h, output-file.c,
+ output-file.h, read.c, read.h, sb.c, sb.h, stabs.c,
+ struc-symbol.h, subsegs.c, subsegs.h, symbols.c, symbols.h, tc.h,
+ write.c, write.h, config/aout_gnu.h, config/atof-ieee.c,
+ config/atof-vax.c, config/itbl-mips.h, config/m68k-parse.h,
+ config/m68k-parse.y, config/m88k-opcode.h, config/obj-aout.c,
+ config/obj-aout.h, config/obj-bout.c, config/obj-bout.h,
+ config/obj-coff.c, config/obj-coff.h, config/obj-ecoff.c,
+ config/obj-ecoff.h, config/obj-elf.c, config/obj-elf.h,
+ config/obj-evax.c, config/obj-evax.h, config/obj-hp300.c,
+ config/obj-hp300.h, config/obj-ieee.c, config/obj-ieee.h,
+ config/obj-multi.h, config/obj-som.c, config/obj-som.h,
+ config/tc-a29k.c, config/tc-a29k.h, config/tc-alpha.c,
+ config/tc-alpha.h, config/tc-arc.c, config/tc-arc.h,
+ config/tc-arm.h, config/tc-avr.c, config/tc-avr.h,
+ config/tc-cris.c, config/tc-cris.h, config/tc-crx.c,
+ config/tc-crx.h, config/tc-d10v.c, config/tc-d10v.h,
+ config/tc-d30v.c, config/tc-d30v.h, config/tc-dlx.c,
+ config/tc-dlx.h, config/tc-fr30.c, config/tc-fr30.h,
+ config/tc-frv.c, config/tc-frv.h, config/tc-generic.c,
+ config/tc-generic.h, config/tc-h8300.c, config/tc-h8300.h,
+ config/tc-h8500.c, config/tc-h8500.h, config/tc-hppa.c,
+ config/tc-hppa.h, config/tc-i370.c, config/tc-i370.h,
+ config/tc-i386.c, config/tc-i386.h, config/tc-i860.c,
+ config/tc-i860.h, config/tc-i960.c, config/tc-i960.h,
+ config/tc-ia64.c, config/tc-ia64.h, config/tc-ip2k.c,
+ config/tc-ip2k.h, config/tc-iq2000.c, config/tc-iq2000.h,
+ config/tc-m32r.c, config/tc-m32r.h, config/tc-m68851.h,
+ config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c,
+ config/tc-m68k.h, config/tc-m88k.c, config/tc-m88k.h,
+ config/tc-maxq.c, config/tc-maxq.h, config/tc-mcore.c,
+ config/tc-mcore.h, config/tc-mips.c, config/tc-mips.h,
+ config/tc-mmix.c, config/tc-mmix.h, config/tc-mn10200.c,
+ config/tc-mn10200.h, config/tc-mn10300.c, config/tc-mn10300.h,
+ config/tc-msp430.c, config/tc-msp430.h, config/tc-ns32k.c,
+ config/tc-ns32k.h, config/tc-openrisc.c, config/tc-openrisc.h,
+ config/tc-or32.c, config/tc-or32.h, config/tc-pdp11.c,
+ config/tc-pdp11.h, config/tc-pj.c, config/tc-pj.h,
+ config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c,
+ config/tc-s390.h, config/tc-sh.c, config/tc-sh.h,
+ config/tc-sh64.c, config/tc-sh64.h, config/tc-sparc.c,
+ config/tc-sparc.h, config/tc-tahoe.c, config/tc-tahoe.h,
+ config/tc-tic30.c, config/tc-tic30.h, config/tc-tic4x.c,
+ config/tc-tic4x.h, config/tc-tic54x.c, config/tc-tic54x.h,
+ config/tc-tic80.c, config/tc-tic80.h, config/tc-v850.c,
+ config/tc-v850.h, config/tc-vax.c, config/tc-vax.h,
+ config/tc-w65.c, config/tc-w65.h, config/tc-xstormy16.c,
+ config/tc-xstormy16.h, config/tc-xtensa.c, config/tc-xtensa.h,
+ config/tc-z8k.c, config/tc-z8k.h, config/te-386bsd.h,
+ config/te-freebsd.h, config/te-hp300.h, config/te-hppa.h,
+ config/te-ic960.h, config/te-irix.h, config/te-nbsd.h,
+ config/te-netware.h, config/te-sparcaout.h, config/te-sun3.h,
+ config/te-tmips.h, config/te-vxworks.h, config/vax-inst.h,
+ config/xtensa-istack.h, config/xtensa-relax.c,
+ config/xtensa-relax.h, doc/fdl.texi
+
+2005-05-05 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-arm.c (arm_opts): Make -mlittle-endian switch set
+ the target_big_endian variable to false.
+
+2005-05-04 Alan Modra <amodra at bigpond.net.au>
+
+ * config/obj-ecoff.c (ecoff_frob_file_before_fix): Correct section
+ list traversal. Use bfd_section_list_prepend.
+ * config/tc-mmix.c (mmix_frob_file): Don't needlessly iterate
+ over the section list.
+ * config/tc-xtensa.c (xtensa_remove_section): Delete.
+ (xtensa_insert_section): Delete.
+ (xtensa_move_seg_list_to_beginning): Use bfd_section_list_remove
+ and bfd_section_list_prepend.
+ (xtensa_reorder_seg_list): Use bfd_section_list_remove and
+ bfd_section_list_insert_after.
+
+2005-05-03 Nick Clifton <nickc at redhat.com>
+
+ * config/obj-ecoff.c (ecoff_frob_file_before_fix): Fix invocations
+ of bfd_section_list... macros.
+ * config/tc-mmix.c (mmix_frob_file): Likewise.
+ * config/tc-xtensa.c (xtensa_remove_section): Likewise.
+ (xtensa_insert_section): Likewise.
+
+ * macro.c (macro_hash): Remove static.
+ * macro.h (macro_hash): Provide an external declaration.
+
+2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * write.c (write_object_file): Use bfd_section_double_list_remove
+ to remove sections.
+
+2005-05-02 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/Makefile.am (gasver.texi): Correct quoting.
+ * doc/Makefile.in: Regenerated.
+
+2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Add h8300*-*-rtemscoff.
+ Switch h8300*-*-rtems* to elf.
+
+2005-04-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * hash.c: Undo the last change.
+ * hash.h: Likewise.
+
+2005-04-29 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/Makefile.am (gasver.texi): Depend on bfd/configure instead
+ of Makefile.
+ (DISTCLEANFILES): Remove.
+ (MAINTAINERCLEANFILES): Add asconfig.texi.
+ * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
+
+2005-04-29 Ben Elliston <bje at au.ibm.com>
+
+ * Makefile.am (GAS_CFILES): Remove bignum-copy.c.
+ (GENERIC_OBJS): Likewise, remove bignum-copy.o.
+ (bignum-copy.o): Remove.
+ * Makefile.in: Regenerate.
+ * makefile.vms (OBJS): Remove bignum-copy.obj.
+ * symbols.h (local_symbol_make): Remove declaration.
+ (verify_symbol_chain_2): Likewise.
+ * symbols.c (local_symbol_make): Make static.
+ (max_indent_level): Likewise.
+ (verify_symbol_chain_2): Remove.
+ * macro.c (macro_hash): Make static.
+ * messages.c (fprint_value): Remove.
+ * read.h (get_absolute_expr): Remove.
+ (emit_leb128_expr): Likewise.
+ (do_s_func): Likewise.
+ * read.c (do_s_func): Make static.
+ (emit_leb128_expr): Likewise.
+ (get_absolute_expr): Likewise.
+ * as.h (as_howmuch): Remove declaration.
+ (fprint_value): Likewise.
+ * as.c (myname): Make static.
+ * input-scrub.c (as_howmuch): Remove.
+ (as_1_char): Likewise.
+ * input-file.h (input_file_is_open): Remove.
+ * input-file.c (input_file_is_open): Likewise.
+ * expr.h (expr_build_unary): Remove declaration.
+ (expr_build_binary): Likewise.
+ * expr.c (expr_build_unary): Remove.
+ (expr_build_binary): Likewise.
+ * hash.h (hash_replace): Remove declaration.
+ (hash_delete): Likewise.
+ * hash.c (hash_replace): Remove.
+ (hash_delete): Likewise.
+ * bignum-copy.c (bignum_copy): Move from here ..
+ * config/tc-vax.c (bignum_copy): .. to here.
+ * bignum.h (LOG_TO_BASE_2_OF_10): Remove.
+ (bignum_copy): Remove extern declaration.
+ * sb.h (string_count): Remove extern declaration.
+ (sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
+ (sb_name): Likewise.
+ * sb.c (dsize): Replace preprocessor macro with static int.
+ (string_count): Make static.
+ (sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
+ (sb_name): Likewise.
+ * config/obj-coff.c (dim_index): Make static.
+ * config/tc-i386.c (GOT_symbol): Likewise.
+ (output_invalid_buf): Likewise.
+ * doc/internals.texi (Warning and error messages): Remove the
+ prototype for fprint_value.
+
+2005-04-27 Ben Elliston <bje at au.ibm.com>
+
+ * link.cmd: Remove.
+
+2005-04-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-multi.h (FAKE_LABEL_NAME): Defined.
+
+ * read.c (pseudo_set): Disallow symbol set to common symbol.
+
+ PR 857
+ * write.c (write_object_file): Report common symbol name when
+ disallowing local symbol set to common symbol.
+ (adjust_reloc_syms): Disallow local symbol set to undefined
+ symbol.
+
+2005-04-25 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (macro_expand_body): Replace locals indicator parameters
+ with actual macro_entry. New local variables macro_line and err.
+ Don't return when encountering an error, just record the fact.
+ Detect local symbol name colliding with parameter. Track line number
+ inside of macro expansion.
+ (do_formals): Move local variable name to wider scope. Check
+ parameter of the same name doesn't already exist. In MRI mode, also
+ check it doesn't collide with the argument count pseudo-parameter).
+ (define_macro): Add file and line number parameters. Remove local
+ variable namestr. New local variable error. Initialize macro_entry
+ members file, line, and name. Don't return when encountering an
+ error, just record the fact. Use %s in some diagnostics for read.c
+ to insert the macro name. Free macro_entry on error.
+ (macro_expand): Pass macro_entry to macro_epand_body. Don't return
+ when encountering an error, just record the fact.
+ (expand_irp): Don't return when encountering an error, just record
+ the fact.
+ * macro.h (macro_struct): New members name, file, and line.
+ (define_macro): Add file and line number parameters.
+ * read.c (s_macro): Pass file and line to define_macro. Tag warning
+ regarding pseudo-op redefinition with the file/line that macro
+ definition started at.
+
+2005-04-22 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (LOOKAHEAD_ALIGNER): Delete macro.
+ (future_alignment_required): Remove ifdefs that use it.
+
+2005-04-22 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xg_get_build_instr_size): Remove.
+ (xg_is_narrow_insn, xg_expand_narrow): Remove. Merge into...
+ (xg_is_single_relaxable_insn): ...here. Add "targ" and "narrow_only"
+ parameters.
+ (xg_assembly_relax, xg_find_narrowest_format, relaxation_requirements,
+ convert_frag_narrow): Use new version of xg_is_single_relaxable_insn.
+
+2005-04-21 Christian Groessler <chris at groessler.org>
+
+ * config/tc-z8k.c (md_assemble): Fix buffer overrun in operand[]
+ array.
+
+2005-04-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-aout.h (S_IS_EXTERN): Removed.
+ * config/obj-bout.h (S_IS_EXTERN): Likewise.
+ * config/obj-coff.h (S_IS_EXTERN): Likewise.
+ * symbols.c (S_IS_EXTERN): Likewise.
+ * symbols.h (S_IS_EXTERN): Likewise.
+
+ * config/tc-alpha.c (tc_gen_reloc): Replace S_IS_EXTERN with
+ S_IS_EXTERNAL.
+ * config/tc-d10v.c (md_apply_fix3): Likewise.
+ * config/tc-ia64.c (ia64_fix_adjustable): Likewise.
+ * config/tc-iq2000.c (iq2000_fix_adjustable): Likewise.
+ * config/tc-m32r.c (m32r_fix_adjustable): Likewise.
+ * config/tc-mmix.c (mmix_adjust_symtab): Likewise.
+ * config/tc-sh64.c (shmedia_frob_file_before_adjust): Likewise.
+ (shmedia_md_convert_frag): Likewise.
+ * symbols.c (print_symbol_value_1): Likewise.
+ * write.c (write_object_file): Likewise.
+
+2005-04-20 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-xtensa.c (get_aligned_diff): Change type of
+ branch_align to offsetT so that its signedness matches that of
+ target_size.
+
+ * config/tc-mips.c (macro): Use sprintf_vma to convert a > 32 bit
+ number into a readable string.
+ (load_register): Likewise.
+
+2005-04-20 Andreas Schwab <schwab at suse.de>
+
+ * config/tc-ia64.c (specify_resource): Initialize all of tmpl.
+
+2005-04-19 David S. Miller <davem at davemloft.net>
+
+ * config/tc-sparc.c (md_assemble): If sparc_ip gives us a
+ NULL insn, exit early. Remove now spurious NULL checks.
+ (sparc_ip): Use as_bad for unknown opcode errors, set *pinsn
+ to NULL and exit.
+
+2005-04-19 Jan Beulich <jbeulich at novell.com>
+
+ * symbols.h (symbol_find_base): Remove prototype.
+ * symbols.c (save_symbol_name): Remove code section conditional upon
+ STRIP_UNDERSCORE.
+ (symbol_find): Remove.
+ (symbol_find_base): Rename to symbol_find.
+ * subsegs.c (section_symbol): Replace use of symbol_find_base with
+ symbol_find.
+ * config/obj-coff.c (tag_insert): Remove code section conditional
+ upon STRIP_UNDERSCORE.
+ (obj_coff_def): Likewise.
+ (obj_coff_endef): Replace use of symbol_find_base with symbol_find.
+ (coff_frob_symbol): Likewise.
+ (yank_symbols): Likewise.
+ (c_section_symbol): Likewise.
+ * config/obj-coff.h (DO_NOT_STRIP): Remove.
+ * config/tc-arm.c (symbol_locate): Remove code section conditional
+ upon STRIP_UNDERSCORE.
+ * config/tc-h8300.h (DO_NOT_STRIP): Remove.
+ * config/tc-h8500.h (DO_NOT_STRIP): Remove.
+ * config/tc-sh.h (DO_NOT_STRIP): Remove.
+ * config/tc-w65.h (DO_NOT_STRIP): Remove.
+ * config/tc-z8k.h (DO_NOT_STRIP): Remove.
+
+2005-04-19 Andreas Schwab <schwab at suse.de>
+
+ * config/tc-ia64.c (md_assemble): Fix error message for wrong
+ access to application registers.
+
+2005-04-19 Jan Beulich <jbeulich at novell.com>
+
+ * config/te-sysv32.h: Remove.
+ * Makefile.am (TARG_ENV_HFILES): Remove reference to
+ config/te-sysv32.h.
+ * Makefile.in (TARG_ENV_HFILES): Likewise.
+
+2005-04-19 Jan Beulich <jbeulich at novell.com>
+
+ PR/847
+ * config/tc-ia64.c (ia64_canonicalize_symbol_name): Re-allow zero-
+ length symbols.
+
+2005-04-18 Mark Kettenis <kettenis at gnu.org>
+
+ * config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
+
+2005-04-18 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (normalize_constant_expr): Don't check for
+ HAVE_32BIT_GPRS.
+ (check_absolute_expr): Only call normalize_constant_expr() if
+ HAVE_32BIT_GPRS.
+ (mips_ip): Likewise.
+
+ * config/tc-mips.c (check_absolute_expr): Fix formatting.
+
+2005-04-18 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (free_token): New, freeing all the memory associated with a
+ macro.
+ (do_formals): Move initializers to ...
+ (define_macro): ... here.
+ (delete_macro): Convert passed in name to lower case. Warn when
+ purging macro that doesn't exist. Use hash_jam instead of hash_delete.
+
+2005-04-15 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (normalize_constant_expr): Fix formatting.
+
+2005-04-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/obj-elf.c (obj_elf_struct): New.
+ (elf_pseudo_table). Use it for .offset and .struct.
+
+2005-04-14 Bob Wilson <bob.wilson at acm.org>
+ Sterling Augustine <sterling at tensilica.com>
+
+ * config/tc-xtensa.c (get_aligned_diff): Handle target_size larger
+ than the section alignment.
+
+2005-04-14 Bob Wilson <bob.wilson at acm.org>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-xtensa.h (struct xtensa_frag_type): Add lit_frchain field.
+ * config/tc-xtensa.c (xg_translate_sysreg_op,
+ xtensa_translate_old_userregs_ops,
+ xtensa_find_unaligned_branch_targets,
+ xtensa_find_unaligned_loops, xtensa_fix_close_loop_end_frags,
+ relax_frag_add_nop): Support 64-bit host.
+ (xtensa_mark_literal_pool_location, xtensa_move_literals): Use
+ tc_frag_data lit_frchain and lit_seg fields instead of fr_var.
+
+2005-04-14 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.tgt: Add support for OpenBSD/sparc ELF.
+
+ * configure.tgt: Set emulation for mips-*-openbsd*.
+ Remove broken mips-dec-openbsd* config.
+ * configure.in: Set default ABI for mips64-*-openbsd*.
+ * configure: Regenerate.
+
+2005-04-14 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (macro) [ldd_std]: Don't attempt the GP
+ optimization for constant addresses.
+
+2005-04-14 Nick Clifton <nickc at redhat.com>
+
+ * as.c (main): Move parse_args before symbol_begin and frag_init
+ so that the hash table size can be set before it is used.
+ * hash.c: Use an unsigned long type for the size of the hash
+ tables.
+ * hash.h (set_gas_hash_table_size): Update the prototype.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
+ * acinclude.m4: Include ../bfd/warning.m4.
+ * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+
+2005-04-13 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * config/tc-mips.c (IS_ZEXT_32BIT_NUM): New macro.
+ (normalize_address_expr): New function to sign-extend address
+ offsets that fit into 32 bits in 32-bit mode.
+ (macro_build_ldst_constoffset): Use normalize_address_expr()
+ instead of a handcoded sequence.
+ (load_register): Likewise. Report oversized numbers in a useful
+ way.
+ (macro) [ld_st, ldd_std]: Reject all oversized offsets, not only
+ for constant addresses. Report oversized numbers in a useful way.
+ (mips_ip): Use normalize_address_expr() for addresses.
+
+2005-04-12 Mark Kettenis <kettenis at gnu.org>
+
+ * config/tc-i386.c (output_insn): Handle VIA PadLock instructions
+ similar to other instructions now that they're marked as ImmExt.
+
+2005-04-12 Nick Clifton <nickc at redhat.com>
+
+ * hash.c (DEFAULT_SIZE): Delete. Replace with:
+ (gas_hash_table_size): New static variable.
+ (set_gas_hash_table_size): New function: Records a requested size
+ for the hash tables.
+ (get_gas_hash_table_size): New function: Return a prime number
+ near the requested size of the hash table.
+ (hash_new): Use get_gas_hash_table_size.
+ * hash.h: Add a prototype for set_gas_hash_table_size.
+ * as.c (show_usage): Add description of new switches: --hash-size
+ and --reduce-memory-overheads.
+ (option_values): Add OPTION_HASH_TABLE_SIZE and
+ OPTION_REDUCE_MEMORY_OVERHEADS.
+ (std_longpopts): Add entries for the new options.
+ (parse_args): Handle the new options.
+ * Makefile.am: Add a dependency of as.c on hash.h.
+ * Makefile.in: Regenerate.
+ * doc/as.texinfo: Document the new switches.
+ * NEWS: Mention the new switches.
+
+2005-04-12 Nick Clifton <nickc at redhat.com>
+
+ PR gas/818
+ * config/tc-hppa.c (pre_defined_registers): Fix %farg[0-3]
+ synonyms.
+
+2005-04-12 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2005-04-11 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (check_t1_t2_reads_and_writes): Fix typo.
+
+2005-04-11 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.tgt (generic_target): Add support for OpenBSD/i386 ELF.
+
+2005-04-11 Jan Beulich <jbeulich at novell.com>
+
+ * NEWS: Mention these changes and their effects.
+ * macro.c (get_token): Use is_name_beginner/is_part_of_name/
+ is_name_ender.
+ (check_macro): Likewise.
+ (buffer_and_nest): Likewise. Permit multiple labels. Don't discard
+ labels together with the closing pseudo-op.
+ (macro_expand_body): Adjust comment. Range-check input before use.
+ Adjust mis-spelled diagnostic. Use is_name_beginner.
+ * read.c (try_macro): New.
+ (read_a_source_file): New static variable last_eol. Don't list
+ macro expansion lines more than once. Call try_macro.
+ (s_macro): Set section of line_label to absolute instead of undefined.
+ * doc/as.texinfo: Add information on the caveats of these changes.
+
+2005-04-11 Alan Modra <amodra at bigpond.net.au>
+
+ * symbols.c (symbol_X_add_number): Change return type to "offsetT *".
+ * symbols.h (symbol_X_add_number): Update prototype.
+
+2005-04-10 Eric Christopher <echristo at redhat.com>
+
+ * symbols.c (symbol_X_add_number): Fix warning.
+
+2005-04-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-m68k.c (md_begin): Support 64bit host.
+ (get_num): Support 64bit BFD on 32bit host.
+
+2005-04-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-mips.c (md_apply_fix3): Fix typos in BFD_RELOC_64.
+
+2005-04-09 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (assign_symbol): Remove const from parm. Fix xcalloc
+ call. Don't do the COFF hacks for multi-emulation gas. Move
+ demand_empty_rest_of_line back to caller.
+ (s_set, equals): demand_empty_rest_of_line here.
+
+ PR gas/827
+ * as.h (rs_dummy): Define.
+ * symbols.c (symbol_X_add_number): New function.
+ * symbols.h (symbol_X_add_number): Declare.
+ * stabs.c (aout_process_stab): Tidy symbol frag setting.
+ * read.c (assign_symbol): New function, split out from s_set.
+ Use symbol_find_or_make. Leave fr_type of dummy frag as rs_dummy.
+ Fix COFF hacks for multi-emulation gas.
+ (s_set): Call assign_symbol. Remove "register" keyword.
+ (set_zero_frag): New function.
+ (pseudo_set): Always check for assignment to section syms.
+ Always set segment and frag of symbol, and likewise extern for
+ aout/bout. Handle assignment of sym=sym+/-const specially. Don't
+ special case exp.X_add_number non-zero for O_symbol expressions.
+ (equals): Use assign_symbol.
+
+2005-04-08 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xtensa_create_xproperty_segments): Skip
+ SEC_MERGE sections.
+
+2005-04-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Don't turn
+ BFD_RELOC_X86_64_32S into BFD_RELOC_32.
+
+2005-04-06 Nick Clifton <nickc at redhat.com>
+
+ * po/rw.po: New translation: Kinyarwanda
+ * configure.in (ALL_LINGUAS): Add rw
+ * configure: Regenerate.
+
+2005-04-05 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (branch_align_power): New.
+ (xtensa_find_unaligned_branch_targets, get_aligned_diff,
+ future_alignment_required): Use branch_align_power to check section
+ alignment as well as xtensa_fetch_width when aligning branch targets.
+
+2005-04-05 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c: Warning fixes throughout.
+ (xtensa_fetch_width): Change to unsigned.
+ (assemble_nop, xtensa_find_unaligned_branch_targets,
+ xtensa_find_unaligned_loops, xg_assemble_vliw_tokens,
+ is_narrow_branch_guaranteed_in_range, xtensa_fix_close_loop_end_frags,
+ min_bytes_to_other_loop_end, unrelaxed_frag_min_size,
+ unrelaxed_frag_max_size, xtensa_fix_short_loop_frags,
+ count_insns_to_loop_end, unrelaxed_frag_min_insn_count,
+ get_text_align_max_fill_size, get_text_align_nop_count,
+ get_text_align_nth_nop_size, get_noop_aligned_address,
+ get_aligned_diff, convert_frag_align_next_opcode,
+ convert_frag_immed_finish_loop, xtensa_create_property_segments,
+ xtensa_create_xproperty_segments, xt_block_aligned_size): Clean up
+ types, avoiding size_t and using offsetT and addressT appropriately.
+ (get_text_align_power): Clean up types. Avoid incorrect bound.
+ (get_text_align_fill_size): Clean up types. Restructure for clarity.
+
+2005-04-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (start_unwind_section): Undo the change
+ of 2004-08-18.
+ (generate_unwind_image, dot_endp): Likewise.
+
+2005-04-01 David Mosberger <davidm at hpl.hp.com>
+
+ * config/tc-ia64.c (ia64_handle_align): Move le_nop and
+ le_nop_stop arrays and initializers to file scope.
+ (md_begin): When generating code for anything other than
+ Itanium 1, use MMI instead of MFI NOP bundles as a filler.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (output_imm): Also set sign flag for 64-bit push
+ immediates.
+
+2005-04-01 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * NEWS: Mention [fdgh]_floating.
+ * config/atof-vax.c: Fix some whitespace.
+ * config/tc-vax.c (md_pseudo_table): Add "[fdgh]_floating".
+
+2005-04-01 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Add a check for <unistd.h> providing a prototype
+ for getopt() which is compatible with the one in
+ include/getopt.h. If so then define HAVE_DECL_GETOPT.
+ * configure: Regenerate.
+ * config.in (HAVE_DECL_GETOPT): Add.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (s_bss): Call obj_elf_section_change_hook.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
+ (tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * config/tc-arm.c (arm_adjust_symtab): Rename
+ bfd_elf32_is_arm_mapping_symbol_name to bfd_is_arm_mapping_symbol_name.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * config/tc-arm.c (mapping_state): Change documentation in function
+ comment to cross-reference spec instead. Change type of mapping symbols
+ to BSF_NO_TYPE.
+ (arm_adjust_symtab): Don't change type of mapping symbols here.
+
+2005-03-30 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * as.h [NEED_DECLARATION_FFS] (ffs): Prototype and alphabetize.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * configure.in: Check for ffs decl and alphabetize.
+
+2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Blundell <philb at gnu.org>
+
+ * config/tc-arm.c (arm_parse_reloc): Add TLS relocations.
+ (md_apply_fix3): Mark TLS symbols.
+ (tc_gen_reloc): Handle TLS relocations.
+ (arm_fix_adjustable): Ignore TLS relocations.
+ (s_arm_elf_cons): Support expressions after decorated symbols.
+
+2005-03-29 Julian Brown <julian at codesourcery.com>
+
+ * config/tc-arm.c (marked_pr_dependency): New bitmap, bit N indicates
+ whether personality routine index N has been output for this section.
+ (mapping_state): tc_segment_info_data now struct not enum.
+ (arm_elf_change_section): Likewise, and marked_pr_dependency is now
+ handled on section change.
+ (create_unwind_entry): Previous code to output dependency removed.
+ (s_arm_unwind_fnend): Output dependency if it hasn't been done already
+ for this section.
+ * config/tc-arm.h (TC_SEGMENT_INFO_TYPE): Redefined as struct
+ arm_segment_info_type.
+ (arm_segment_info_type): New struct.
+
+2005-03-28 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (do_align_targets): Update comment.
+ (xtensa_frob_label): Compute "freq" before possibly switching frags.
+ Insert a LOOP_END frag before every loop target, and do not overload
+ DESIRE_ALIGN_IF_TARGET frags with loop end information.
+ (xg_assemble_vliw_tokens): Use do_align_targets.
+ (xtensa_fix_target_frags): Remove code to convert a
+ DESIRE_ALIGN_IF_TARGET frag to a LOOP_END frag when there is a
+ negatable branch at the end of a loop.
+ (frag_can_negate_branch): Delete.
+
+2005-03-28 David Mosberger <davidm at hpl.hp.com>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 803
+ NEWS: Mention "-mtune=[itanium1|itanium2]".
+
+ * config/tc-ia64.c (md): Add tune.
+ (md_parse_option): Accepted "-mtune=[itanium1|itanium2]".
+ (md_show_usage): Add "-mtune=[itanium1|itanium2]".
+ (extra_goodness): Prefer M- and I-unit NOPs for itanium2. F and
+ B unit NOPs are discouraged for McKinley-derived cores.
+ (md_begin): Don't hardcode the "extra_goodness()" function in
+ the comment...
+ (ia64_init): Set md.tune to itanium2.
+
+ * doc/as.texinfo: Add -mtune=[itanium1|itanium2]".
+ * doc/c-ia64.texi: Likewise.
+
+2005-03-27 Ian Lance Taylor <ian at airs.com>
+
+ * config/obj-coff.c (coff_frob_symbol): When crashing because of a
+ bad C_EFCN symbol, print its name.
+
+2005-03-25 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (use_longcalls): Delete.
+ (xg_symbolic_immeds_fit): Check for direct calls and return TRUE if
+ the use_longcalls flag is set. Do this before checking the segment.
+ (xg_expand_assembly_insn): Rearrange to use new do_expand flag. Never
+ expand direct calls at this point.
+ (xtensa_set_frag_assembly_state): Set use_longcalls flag.
+ (xtensa_find_unmarked_state_frags): Likewise.
+ (md_assemble): Do not disable longcalls by setting is_specific_opcode.
+ (xg_assemble_vliw_tokens): Switch frags when use_longcalls changes.
+ (convert_frag_immed): Remove unnecessary check of is_specific_opcode.
+ * config/tc-xtensa.h (xtensa_frag_type): Add use_longcalls flag.
+
+2005-03-25 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * config/tc-mmix.c, config/tc-mmix.h: Convert to ISO C90.
+
+2005-03-25 Hans-Peter Nilsson <hp at axis.com>
+
+ * config/tc-cris.h: Convert to ISO C90.
+ * config/tc-cris.c: Ditto.
+ (md_estimate_size_before_relax): Remove obsolete comment for
+ parameter "segment_type".
+ (md_begin): Document reason for cast of hash_insert argument.
+ (md_atof): Correct type of parameter "type".
+
+2005-03-24 Nick Clifton <nickc at redhat.com>
+
+ * write.h (bit_fix_new): Remove redundant prototype.
+ * config/atof-ieee.c: Convert to ISO-C90 and fix formatting.
+ * config/obj-aout.c: Convert to ISO-C90 and fix formatting.
+ * config/obj-aout.h: Convert to ISO-C90 and fix formatting.
+ * config/obj-bout.c: Convert to ISO-C90 and fix formatting.
+ * config/obj-bout.h: Convert to ISO-C90 and fix formatting.
+ * config/obj-ecoff.c: Convert to ISO-C90 and fix formatting.
+ * config/obj-ecoff.h: Convert to ISO-C90 and fix formatting.
+ * config/obj-som.c: Convert to ISO-C90 and fix formatting.
+ * config/obj-som.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-a29k.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-a29k.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-alpha.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-alpha.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-arc.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-arc.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-d10v.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-d10v.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-d30v.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-d30v.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-dlx.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-dlx.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-fr30.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-fr30.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-h8500.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-h8500.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-i370.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-i370.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-i960.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-ip2k.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-ip2k.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-m32r.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-m32r.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-m88k.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-m88k.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-mcore.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-mcore.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-mn10200.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-ns32k.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-ns32k.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-openrisc.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-openrisc.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-or32.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-or32.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-pdp11.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-pj.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-pj.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-tahoe.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-tic80.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-tic80.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-v850.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-v850.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-w65.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-w65.h: Convert to ISO-C90 and fix formatting.
+ * config/tc-xstormy16.c: Convert to ISO-C90 and fix formatting.
+ * config/tc-xstormy16.h: Convert to ISO-C90 and fix formatting.
+
+2005-03-23 Jim Blandy <jimb at redhat.com>
+
+ * config/tc-arm.c (arm_adjust_symtab): Fetch elf_sym's binding
+ attributes properly.
+
+2005-03-23 Mike Frysinger <vapier at gentoo.org>
+ Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Accept any C library to accompany a GNU Linux
+ implementation, not just the GNU C library.
+ * configure.in: Likewise.
+ * configure: Regenerate.
+
+2005-03-23 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-tic30.c: Convert to ISO C90 formatting.
+ * config/tc-tic30.h: Convert to ISO C90 formatting.
+ * config/tc-pdp11.c: Convert to ISO C90 formatting.
+ * config/atof-vax.c: Convert to ISO C90 formatting.
+
+2005-03-21 Maciej W. Rozycki <macro at mips.com>
+
+ * config/tc-mips.c (mips_frob_file): Sort BFD_RELOC_MIPS16_LO16
+ relocations correctly as well.
+ (mips_fix_adjustable): Don't make BFD_RELOC_MIPS16_LO16
+ relocations in mergeable sections section-relative either.
+
+2005-03-21 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (md_apply_fix3): Recognize XTENSA_PLT relocations.
+
+2005-03-21 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-sh.c (sh_elf_final_processing): Fix compile time
+ warning by providing a prototype for sh_symbian_find_elf_flags.
+
+ * cgen.c (gas_cgen_parse_operand): Fix typo introduced by
+ previous delta.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * configure.tgt: Handle setting of bfd_gas for fmt=multi targets
+ along with other formats that set bfd_gas. Remove unnecessary
+ setting of bfd_gas. Delete strongarm cases in generic_target
+ switch.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ PR gas/780
+ * config/tc-m68k.c (TRUNC, SEXT): Define.
+ (issbyte, isubyte, issword, isuword, isbyte, isword): Use the above.
+ (m68k_ip): Truncate or sign extend expressions as appropriate.
+ (get_num): Likewise.
+ (md_apply_fix3): Use SEXT.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (OBJ_FORMAT_CFILES): Prune config/obj-vms.c.
+ (OBJ_FORMAT_HFILES): Prune config/obj-vms.h.
+ (obj-vms.o): Delete rule.
+ Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-03-18 C Jaiprakash <cjaiprakash at noida.hcltech.com>
+
+ * config/tc-m68k.c (m68k_elf_final_processing): Set file specific
+ flag for coldfire v4e.
+
+2005-03-17 Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (xg_apply_tentative_value): Rename to
+ xg_apply_fix_value and return a value to indicate success.
+ (md_pcrel_from): Skip check of fx_done. Return 0 if not PC-relative.
+ (xtensa_force_relocation): Remove checks for VTABLE relocs.
+ (xtensa_validate_fix_sub): New.
+ (xtensa_fix_adjustable): Remove check for external or weak symbols.
+ (tc_gen_reloc): Move code to handle difference of symbols and code to
+ apply tentative fix values to ...
+ (md_apply_fix3): ...here. Enable standard overflow checks for simple
+ 8, 16, and 32 bit relocations. Apply fixes for slot-specific
+ relocations when linkrelax flag is not set.
+ * config/tc-xtensa.h (xtensa_validate_fix_sub): Add prototype.
+ (TC_FORCE_RELOCATION_SUB_SAME, TC_VALIDATE_FIX_SUB): Define.
+
+2005-03-17 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (i386_scale): Beautify error message.
+ (Intel syntax comments): Update.
+ (struct intel_parser_s): Add fields in_offset, in_bracket, and
+ next_operand.
+ (intel_e04_1, intel_e05_1, intel_e05_1, intel_e09_1, intel_e10_1):
+ Remove declarations.
+ (intel_bracket_expr): Declare.
+ (i386_intel_operand): Initialize new intel_parser fields. Wrap most
+ of the function body in a loop allowing to split an operand into two.
+ Replace calls to malloc and checks of it returning non-NULL with
+ calls to xmalloc/xstrdup.
+ (intel_expr): SHORT no longer handled here. Add comment indicating
+ comparison ops need implementation.
+ (intel_e04, intel_e04_1): Combine, replace recursion with loop.
+ Check right operand of - does not specify a register when parsing
+ the address of a memory reference.
+ (intel_e05, intel_e05_1): Combine, replace recursion with loop.
+ Check operands do not specify a register when parsing the address of
+ a memory reference.
+ (intel_e06, intel_e06_1): Likewise.
+ (intel_e09, intel_e09_1): Combine, replace recursion with loop. Also
+ handle SHORT as well as unary + and -. Don't accept : except for
+ segment overrides or in direct far jump/call insns.
+ (intel_brack_expr): New.
+ (intel_e10, intel_e10_1): Combine, replace recursion with loop. Use
+ intel_brack_expr.
+ (intel_e11): Replace chain of if/else-if by switch, alloing fall-
+ through in certain cases. Use intel_brack_expr. Add new diagnostics.
+ Allow symbolic constants as register scale value.
+ (intel_get_token): Replace call to malloc and check of return value
+ with call to xmalloc. Change handling for FLAT to match MASM's.
+ (intel_putback_token): Don't try to back up/free current token if
+ that is T_NIL.
+
+2005-03-16 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * configure.tgt: Set emulation for arm-*-eabi*.
+ * config/tc-arm.c (meabi_flags): Check EABI_DEFAULT.
+ * config/te-armeabi.h: New file.
+ * config/te-armlinuxeabi.h (EABI_DEFAULT): Define.
+ * config/te-symbian.h: Include "te-armeabi.h".
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+
+ * cgen.c (gas_cgen_parse_operand): Copy opinfo parameter into a
+ local variable in case it is clobbered by the setjmp.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+
+ * config/obj-coff.h: Convert to ISO C90 formatting.
+ * config/obj-coff.c: Convert to ISO C90 formatting.
+
+2005-03-15 Zack Weinberg <zack at codesourcery.com>
+
+ * config/tc-arm.c (do_mla): Rename to do_mlas, take second
+ is_mls parameter; do not diagnose Rm==Rd when is_mls.
+ (do_mla, do_mls, five_bit_unsigned_immediate, bfci_lsb_and_width)
+ (do_bfc, do_bfi, do_bfx, do_rbit, do_mov16, do_ldsttv4): New functions.
+ (insns): Add ARMv6T2 instructions:
+ bfc bfi mls movw movt rbit sbfx ubfx ldrht ldrsht ldrsbt strht.
+ (arm_archs): Add V6T2 variants.
+
+2005-03-15 Nick Clifton <nickc at redhat.com>
+
+ * NEWS: Add cutoff for changes in 2.16 release.
+
+2005-03-15 Jan Beulich <jbeulich at novell.com>
+
+ * expr.c (operand): Merge handling of unary + into that for unary
+ -, !, and ~.
+
+2005-03-14 Eric Christopher <echristo at redhat.com>
+
+ * config/tc-mips.c: Include dw2gencfi.h.
+ (mips_cfi_frame_initial_instructions): New.
+ * config/tc-mips.h (TARGET_USE_CFIPOP): Define.
+ (tc_cfi_frame_initial_instructions): Ditto.
+ (DWARF2_DEFAULT_RETURN_COLUMN): Ditto.
+ (DWARF2_CIE_DATA_ALIGNMENT): Ditto.
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * po/tr.po: Commit new Turkish translation.
+
+2005-03-12 Zack Weinberg <zack at codesourcery.com>
+
+ * config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
+ wfi, yield.
+
+2005-03-11 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * config-gas.com: Mark vax-vms as obsolete.
+ * configure.in: Remove fmt=vms support.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * config/obj-vms.h, config/obj-vms.c, config/vms-conf.h: Remove.
+
+2005-03-10 Sterling Augustine <sterling at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * config/tc-xtensa.c (finish_vinsn): Include the last instruction slot
+ when checking if xg_resolve_literals needs to be called.
+ * config/tc-xtensa.h: Fix spelling typo in a comment.
+
+2005-03-10 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-tic54x.h (tic54x_macro_info): Change parameter type.
+ * config/tc-tic54x.c (tic54x_macro_info): Likewise. Replace hand-
+ crafted structure declarations with the types from macro.h.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (s_cpsetup): Use '__gnu_local_gp' instead of '_gp'
+ for -mno-shared optimization.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (MAX_VR4130_NOPS, MAX_DELAY_NOPS): New macros.
+ (MAX_NOPS): Bump to 4.
+ (mips_fix_vr4130): New variable.
+ (nops_for_vr4130): New function.
+ (nops_for_insn): Use MAX_DELAY_NOPS rather than MAX_NOPS. Use
+ nops_for_vr4130 if working around VR4130 errata.
+ (OPTION_FIX_VR4130, OPTION_NO_FIX_VR4130): New macros.
+ (md_longopts): Add -mfix-vr4130 and -mno-fix-vr4130.
+ (md_parse_option): Handle them.
+ (md_show_usage): Print them.
+ * doc/c-mips.texi: Document -mfix-vr4130 and -mno-fix-vr4130.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn): Remove cop_interlocks test from
+ branch delay code.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.h (mips_flush_pending_output): Delete.
+ (mips_emit_delays): Declare.
+ (md_flush_pending_output): Use mips_emit_delays.
+ * config/tc-mips.c (mips_no_prev_insn): Remove parameter; always forget
+ the previous instructions.
+ (md_begin, append_insn, md_parse_option): Update callers.
+ (mips_emit_delay): Remove parameter. Move INSNS != 0 code to
+ start_noreorder.
+ (mips_align, s_change_sec, s_cons, s_float_cons, s_gpword)
+ (s_gpdword): Update callers.
+ (start_noreorder, end_noreorder): New functions.
+ (macro, macro2, mips16_macro, s_mipsset): Use them instead of
+ manipulating mips_opts or prev_nop_frag directly.
+ (mips_flush_pending_output): Delete.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (mips_move_labels): New function, taken from...
+ (append_insn, mips_emit_delays): ...here.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (MAX_NOPS): New macro.
+ (history): Resize to 1 + MAX_NOPS.
+ (fix_vr4120_class): New enumeration.
+ (vr4120_conflicts): New variable.
+ (init_vr4120_conflicts): New function.
+ (md_begin): Call it.
+ (insn_uses_reg): Constify first argument.
+ (classify_vr4120_insn, insns_between, nops_for_insn, nops_for_sequence)
+ (nops_for_insn_or_target): New functions.
+ (append_insn): Use the new nops_for_* functions instead of inline
+ delay checks. Generalize prev_nop_frag handling to handle an
+ arbitrary history length. Insert nops into the history buffer
+ once the number of nops in prev_nop_frag is fixed.
+ (emit_delays): Use nops_for_insn instead of inline delay checks.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (append_insn): Remove now-redundant nops != 0
+ check from branch delay code. Remove unnecessary check for branches.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (dummy_opcode): Delete.
+ (nop_insn, mips16_nop_insn): New variables.
+ (NOP_INSN): New macro.
+ (insn_length, create_insn, install_insn, move_insn, add_fixed_insn)
+ (add_relaxed_insn, insert_into_history, emit_nop): New functions.
+ (md_begin): Initialize nop_insn and mips16_nop_insn.
+ (append_insn): Use the new emit_nop function to add nops, recording
+ them in the history buffer. Use add_fixed_insn or add_relaxed_insn
+ to reserve room for the instruction and install_insn to install the
+ final form. Use insert_into_history to record the instruction in
+ the history buffer. Use move_insn to do delay slot filling.
+ (mips_emit_delays): Use add_fixed_insn instead of the emit_nop macro.
+ (macro_build, mips16_macro_build, macro_build_lui, mips_ip)
+ (mips16_ip): Use create_insn to initialize mips_cl_insns.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (INSERT_BITS, EXTRACT_BITS, INSERT_OPERAND)
+ (EXTRACT_OPERAND, MIPS16_INSERT_OPERAND, MIPS16_EXTRACT_OPERAND): New.
+ (insn_uses_reg, reg_needs_delay, append_insn, macro_build)
+ (mips16_macro_build, macro_build_lui, mips16_macro, mips_ip)
+ (mips16_ip): Use the new macros instead of explicit masks and shifts.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (mips_cl_insn): Replace the valid_p, delay_slot_p
+ and extended_p fields with a single fixed_p field.
+ (append_insn, mips_no_prev_insn): Adjust accordingly.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (mips_cl_insn): Replace reloc_type array with
+ a single mips16_absolute_jump_p bit.
+ (append_insn): Adjust accordingly.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.h (mips_cl_insn): Move definition to...
+ * config/tc-mips.c (mips_cl_insn): ...here. Add new fields:
+ frag, where, fixp, reloc_type, valid_p, noreorder_p, delay_slot_p
+ and extended_p.
+ (history): New variable.
+ (prev_insn, prev_prev_insn, prev_insn_valid, prev_insn_frag)
+ (prev_insn_where, prev_insn_reloc_type, prev_insn_fixp)
+ (prev_insn_is_delay_slot, prev_insn_unreordered, prev_insn_extended)
+ (prev_prev_insn_unreordered): Delete.
+ (reg_needs_delay, append_insn, mips_no_prev_insn, mips_emit_delays)
+ (macro_start): Replace uses of prev_insn* with the equivalent history[]
+ field.
+
+2005-03-08 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * doc/Makefile.am: Update as.info dependencies.
+ * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * doc/as.texinfo: Add sentence to indicate redefining a macro is an
+ error, and point to .purgem documentation if someone really needs
+ re-definitions.
+ * NEWS: Mention macro redefinition is now an error.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Track last slot user insn was
+ emitted to. Add more precise diagnostics for non-fitting insns based
+ on that. Eliminate now superfluous special casing of MLX. Clear out
+ slot information when dropping an insn.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_section_name): Rename to...
+ (cross_section): In addition to separating the name from the rest of
+ the arguments, also carry out the operation.
+ (dot_xdata): Use cross_section.
+ (dot_float_cons): Likewise.
+ (dot_xstringer): Likewise.
+ (dot_xdata_ua): Likewise.
+ (dot_float_cons_ua): Likewise. Pass float_cons, not stmt_float_cons.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/gas.pot: Regenerate.
+
+2005-03-04 David Daney <ddaney at avtrex.com>
+
+ * config/tc-mips.c (macro_build_lui): Use '__gnu_local_gp'
+ instead of '_gp' for -mno-shared optimization.
+ (s_cpload): Ditto.
+ (s_abicalls): Document it in the comment.
+ (md_show_usage): Document the -mno-shared option.
+
+2005-03-04 Richard Sandiford <rsandifo at redhat.com>
+
+ * config/tc-mips.c (mips_set_options): Add sym32 field.
+ (mips_opts): Initialize it.
+ (HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide.
+ (HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES.
+ (HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros.
+ (load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES
+ when deciding whether to use a symbolic %highest/%higher expansion.
+ (macro): Likewise. Remove o64/n32 linux hack. Always use
+ ADDRESS_ADD*_INSN for address addition in the expansion of "dla"
+ and "la". Handle constants separately from symbolic expressions in
+ the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES
+ and using load_register to load the high part of the address.
+ (OPTION_MSYM32, OPTION_NO_MSYM32): New macros.
+ (OPTION_ELF_BASE): Bump by 2.
+ (md_longopts): Add entries for -msym32 and -mno-sym32.
+ (md_parse_option): Handle them.
+ (usage): Document them.
+ (s_mipsset): Handle ".set sym32" and ".set nosym32".
+ (s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of
+ HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp".
+ * doc/c-mips.texi: Document ".set sym32", ".set nosym32",
+ -msym32 and -mno-sym32.
+
+2005-03-03 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (load_address): Implement GP optimization
+ for 64bit address space non-PIC. Fix formatting.
+ (macro): Likewise. Simplify code.
+ (md_parse_option): Don't bail out if -G 0 is set for PIC code.
+ (mips_after_parse_args): Simplify code.
+
+2005-03-03 Nick Clifton <nickc at redhat.com>
+
+ * expr.c (operand): Remove redundant code enclosed by #ifdef
+ RELAX_PAREN_GROUPING....#endif.
+
+ * config/tc-mn10200.c (tc_gen_reloc): Handle the case where the
+ reloc is the difference of two symbols defined in the same
+ section.
+
+ * config/tc-iq2000.c (line_comment_chars): Include the # character
+ as otherwise this breaks #APP/#NO_APP processing.
+
+2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * config/tc-arc.c(md_assemble): Remove dead code for handling
+ immediate indexing of ld and st .
+
+2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
+ Joseph Myers <joseph at codesourcery.com>
+
+ * config/tc-mips.c (percent_op): Add %tlsgd, %tlsldm, %dtprel_hi,
+ %dtprel_lo, %tprel_hi, %tprel_lo, and %gottprel.
+ (parse_relocation): Check for a word break after a relocation
+ operator.
+ (md_apply_fix3): Handle TLS relocations, and mark thread-local
+ symbols.
+
+2005-03-02 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_fix_adjustable <ELF>): Remove bogus checks.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * as.c (main): Use unlink_if_ordinary instead of unlink.
+ * messages.c (as_fatal): Likewise.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
+ accesses.
+ (parse_register): Allow cr8...15 in all modes.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-i386.c (intel_e11): If not followed by T_PTR, treat T_BYTE
+ etc. like normal symbol references (T_ID).
+
+2005-03-02 Alan Modra <amodra at bigpond.net.au>
+
+ * symbols.c (fb_label_name): Fix silly thinko in last change.
+
+2005-03-02 Alan Modra <amodra at bigpond.net.au>
+
+ * expr.c (integer_constant): Remove TARGET_WORD_SIZE hack.
+ * config/tc-m68k.h (TARGET_WORD_SIZE): Delete.
+
+ * symbols.c (fb_label_name): Allow an augend of 2 for mmix.
+
+2005-03-01 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ PR gas/708
+ * config/tc-arc.c (md_assemble): Initialize suffix for extension
+ suffixes also.
+
+2005-03-01 Alan Modra <amodra at bigpond.net.au>
+
+ * config/obj-coff.c (fixup_segment): Delete sy_mri_common assertion.
+
+ * as.h (assert): Warning fix.
+ * expr.c (expr): Correct assertion.
+ * read.c (s_comm_internal): Remove assertion.
+ * write.c (relax_segment): Enable vma assertion only for BFD_ASSEMBLER.
+ (fixup_segment): Remove assertion.
+ * config/tc-dlx.c (machine_ip): Remove untrue assertions.
+ (md_apply_fix3): Likewise.
+ * config/tc-i370.c (md_begin): Correct assertion.
+ (i370_macro): Warning fix for assertion.
+
+2005-03-01 Alan Modra <amodra at bigpond.net.au>
+
+ * configure.in (AC_C_BIGENDIAN): Invoke.
+ * configure: Regenerate.
+ * write.c (write_object_file <!BFD_ASSEMBLER>): Don't use sizeof
+ host variable to set string header size.
+ * config/obj-aout.c (obj_header_append): Don't use host structs.
+ (obj_symbol_to_chars): Likewise.
+ (obj_emit_strings): Likewise. Use the passed in output pointer.
+ * config/obj-aout.h (H_GET_FILE_SIZE): Include H_GET_LINENO_SIZE.
+ * config/obj-bout.c (obj_emit_relocations): Use md_reloc_size,
+ not sizeof host struct.
+ (obj_header_append, obj_symbol_to_chars): Don't use host structs.
+ (obj_emit_strings): Likewise.
+ * config/obj-bout.h (EXEC_BYTES_SIZE): Define.
+ (N_TXTOFF, H_GET_FILE_SIZE, H_GET_HEADER_SIZE): Use instead of
+ sizeof host struct.
+ (H_SET_SYMBOL_TABLE_SIZE): Hard code sym size rather than using
+ sizeof host struct.
+ (host_number_to_chars): Define.
+ * config/obj-hp300.c (hp300_header_append): Don't use sizeof
+ host internal struct to set header sizes.
+ * config/tc-i960.c (md_number_to_field): Warning fix.
+ (md_ri_to_chars): Use host byte order.
+ (get_cdisp, md_apply_fix3): Warning fix.
+ * config/tc-m68k.c (md_assemble): Don't use sizeof host short.
+
+2005-02-28 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * doc/c-arc.texi: Update documentation about ARC's extension
+ instructions.
+
+2005-02-27 Svein E. Seldal <svein at dev.seldal.com>
+
+ * config/tc-tic4x.c (tic4x_gen_to_words): Changed mail
+ address for myself.
+
+2005-02-23 Alan Modra <amodra at bigpond.net.au>
+
+ * cgen.c: Warning fixes.
+ * config/tc-arc.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-avr.c: Likewise.
+ * config/tc-d10v.c: Likewise.
+ * config/tc-d30v.c: Likewise.
+ * config/tc-frv.c: Likewise.
+ * config/tc-frv.h: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-h8500.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-ip2k.c: Likewise.
+ * config/tc-m68hc11.c: Likewise.
+ * config/tc-maxq.c: Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-pj.c: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-s390.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh64.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic80.c: Likewise.
+ * config/tc-v850.c: Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-w65.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+
+2005-02-22 Catherine Moore <clm at cm00re.com>
+
+ * read.c (read_a_source_file): Reinstate TC_EQUAL_IN_INSN test.
+ * doc/internals.texi (TC_EQUAL_IN_INSN): Reinstate.
+
+2005-02-22 Eric Christopher <echristo at redhat.com>
+
+ * config/tc-mips.c (struct proc): Change isym to
+ func_sym. New member func_end_sym.
+ (s_mips_ent): Update.
+ (s_mips_end): Ditto. Add code to compute function size.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c: Warning fixes.
+ * config/obj-elf.c: Likewise.
+
+2005-02-22 Maciej W. Rozycki <macro at mips.com>
+
+ * config/tc-mips.c (append_insn): Call dwarf2_emit_insn() before
+ emitting insn.
+
+2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/obj-coff.c (obj_coff_section): Replace SEC_SHARED with
+ SEC_COFF_SHARED.
+
+ * config/tc-tic54x.c (tic54x_bss): Replace SEC_BLOCK with
+ SEC_TIC54X_BLOCK.
+ (demand_empty_rest_of_line): Likewise.
+ (tic54x_sblock): Likewise.
+ (tic54x_clink): Replace with SEC_CLINK with SEC_TIC54X_CLINK.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * read.c (address_bytes): New function.
+ (TC_ADDRESS_BYTES): Default for BSD_ASSEMBLER to address_bytes.
+ (potable): Add "dc.a".
+ (cons_worker): Handle "dc.a".
+ * doc/internals.texi (TC_ADDRESS_BYTES): Document.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * input-file.c (input_file_open): Rearrange to avoid warning.
+
+2005-02-19 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-hppa.h (TC_EQUAL_IN_INSN): Delete.
+ * read.c (read_a_source_file): Remove TC_EQUAL_IN_INSN test.
+ * doc/internals.texi (TC_EQUAL_IN_INSN): Delete.
+
+2005-02-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (macro_build_ldst_constoffset): Fail on $at
+ uses after .set noat.
+ (load_address): Likewise.
+ (macro): Likewise. Don't try to avoid $at use by sacrificing
+ the target register before it is stored, it won't work.
+
+2005-02-17 James E Wilson <wilson at specifixinc.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Stop filling a bundle if we
+ see an instruction that specifies a template.
+
+2005-02-18 Alan Modra <amodra at bigpond.net.au>
+
+ * config/tc-openrisc.c (openrisc_relax_frag): Delete unused function.
+ * config/tc-sparc.c (sparc_ip): Make op_exp static to silence warnings.
+ * config/tc-tic80.c (build_insn): Init insn[1] to silence warning.
+
+2005-02-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention "-mhint.b=[ok|warning|error]".
+
+ * config/tc-ia64.c (md): Add hint_b.
+ (emit_one_bundle): Handle md.hint_b for "hint".
+ (md_parse_option): Accepted "-mhint.b=[ok|warning|error]".
+ (md_show_usage): Add "-mhint.b=[ok|warning|error]".
+ (ia64_init): Set md.hint_b to error.
+ (md_assemble): Handle md.hint_b for "hint.b".
+
+ * doc/as.texinfo: Add "-mhint.b=[ok|warning|error]".
+ * doc/c-ia64.texi: Likewise.
+
+2005-02-17 Alan Modra <amodra at bigpond.net.au>
+
+ * tc.h (struct relax_type, relax_typeS): Move from here..
+ * as.h: ..to here. Make rlx_forward and rlx_backward an offsetT.
+ * ecoff.c (ecoff_new_file): Add appfile param.
+ * ecoff.h (ecoff_new_file): Likewise.
+ * itbl-lex.h: New file.
+ * itbl-lex.l: Include itbl-lex.h.
+ * itbl-parse.y: Likewise.
+ (insntbl_line, yyparse, yylex): Move to itbl-lex.h.
+ * read.c (s_app_file_string): Mark appfile possibly unused.
+ * subsegs.c (seg_not_empty_p): Make sec possibly unused.
+ * subsegs.h (struct seg_info_trash): Delete.
+ (seg_info): Use segment_info_type instead.
+ * config/obj-coff.c (struct filename_list): Make filename const char *.
+ * config/obj-ecoff.h (obj_app_file): Pass app to ecoff_new_file.
+ * config/obj-elf.c (elf_file_symbol): Similarly.
+ * config/tc-a29k.c (md_apply_fix3): Make val a valueT. Don't use
+ signed right shift.
+ * config/tc-arc.c (md_operand): Warning fix.
+ * config/tc-arm.c (arm_parse_reloc): Only define when OBJ_ELF.
+ (md_begin): Rearrange #if defined OBJ_COFF || defined OBJ_ELF.
+ * config/tc-cris.h (TC_IMPLICIT_LCOMM_ALIGNMENT): Use do while.
+ * config/tc-frv.c (frv_force_relocation): Warning fix.
+ * config/tc-m68k.c (md_parse_option): Delete unused var.
+ * config/tc-mcore.c (mylog2): Rename from log2 throughout.
+ * config/tc-sparc.c: Likewise.
+ (s_common): Warning fix.
+ * config/tc-mips.c (append_insn): Use unsigned long long expressions.
+ * config/tc-mmix.c (PUSHJSTUB_MAX, PUSHJSTUB_MIN): Define from
+ addressT.
+ * config/tc-s390.c (s390_insn): Delete test of unsigned >= 0.
+ * config/tc-sh.c (sh_cfi_frame_initial_instructions,
+ sh_regname_to_dw2regnum): Only define for OBJ_ELF.
+ * config/tc-tic4x.c (tic4x_insert_reg): Use ISLOWER.
+ (tic4x_do_align): Use TIC_NOP_OPCODE.
+ * config/tc-tic4x.h (TIC_NOP_OPCODE): Rename from NOP_OPCODE.
+ * config/tc-vax.c: Include netinet/in.h.
+ (tc_headers_hook): Formatting.
+ * config/tc-xstormy16.c (md_pcrel_from_section): Correct parens.
+
+2005-02-17 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (ia64_parse_name): Don't advance 'name' when
+ parsing inN, locN, outN. Set 'idx' to offset register number starts
+ at. Don't handle numbers with leading zeroes or beyond 95. Remove
+ pointless cast.
+
+2005-02-16 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (load_address): Fix formatting.
+ (macro): Don't use AT if .set noat is in effect. Fix formatting.
+ Catch macros which are unexpandable without AT. Remove duplicate
+ zeroing of used_at.
+ (macro2): Remove duplicate zeroing of used_at.
+
+2005-02-16 Alan Modra <amodra at bigpond.net.au>
+
+ * dw2gencfi.c (output_cie, output_fde): Use DW_CFA_nop rather
+ than zero.
+
+2005-02-15 Nigel Stephens <nigel at mips.com>
+ Maciej W. Rozycki <macro at mips.com>
+
+ * config/tc-mips.c (reloc_needs_lo_p): Handle
+ BFD_RELOC_MIPS16_HI16_S.
+ (fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16.
+ (append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S
+ and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow
+ complaints on.
+ (mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S,
+ BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants.
+ Call my_getSmallExpression() to parse percent operators.
+ (percent_op_match, mips_percent_op): Separate definitions.
+ (mips16_percent_op): Define percent operators for the MIPS16 mode.
+ (parse_relocation): Handle the MIPS16 mode using
+ mips16_percent_op.
+ (md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16,
+ BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (md_apply_fix3): Call ia64_gen_real_reloc_type
+ instead of explicitly dealing with the translation; exclude
+ relocations that are already pcrel, however.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c: Include limits.h (if available).
+ (gr_values[0]): Set path to INT_MAX.
+ (dot_reg_val): Don't allow changing value of r0. Limit range of
+ general registers at r127.
+ (specify_resource): Default resource index is -1. Don't set resource
+ index (in case IA64_RS_RSE) without setting the specific flag.
+ (note_register_values): Check operand is O_constant before tracking
+ input value of moves. Add tracking for dep.z with constant inputs.
+ (print_dependency): Resource index of specific resource may be zero.
+ (check_dependencies): Likewise.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_operands): New local variables reg1, reg2,
+ reg_class. Check operands and emit diagnostics for illegal use of
+ registers.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (ia64_gen_real_reloc_type): Define and initialize
+ new variables type, suffix, and width. Handle
+ BFD_RELOC_IA64_DIR(32|64)[LM]SB in FUNC_LT_FPTR_RELATIVE case.
+ Handle BFD_RELOC_IA64_DIR64[LM]SB in FUNC_TP_RELATIVE case. Add
+ FUNC_DTP_MODULE case. Handle BFD_RELOC_IA64_DIR32[LM]SB in
+ FUNC_DTP_RELATIVE case. Return incoming relocation type if
+ BFD_RELOC_IA64_IPLT[LM]SB in FUNC_IPLT_RELOC case. Generate warning
+ if unable to translate relocation type, using the new variables.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.h (ia64_symbol_chars): Declare.
+ (ty_symbol_chars): Define.
+ * config/tc-ia64.c (ia64_symbol_chars): Define.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (ia64_parse_name): Only update next character if
+ input_line_pointer was advanced.
+
+2005-02-14 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * config/tc-sh.c (md_apply_fix3): Add parentheses around &
+ within |.
+
+2005-02-13 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (md_parse_option): Handle -xnone and -xdebugn.
+ (md_show_usage): Add -xnone, -xdebugn, and -xdebugx. Relocate default
+ indicator.
+ (ia64_init): Set md.detect_dv.
+ (ia64_start_line): New static variable warned. Warn only once when
+ encountering explicit stops in automatic mode.
+ * doc/c-ia64.texi: Describe -xnone, -xdebugn, and -xdebugx.
+ * NEWS: Mention new default mode.
+
+2005-02-13 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_rot): Add comment that name strings should
+ be freed when wiping out previous state. Canonicalize names before
+ use. Free name string when detecting redefinition.
+ (dot_pred_rel): Call generic expression parser to process arguments.
+ Handle O_register case for individual predicates and O_subtract for
+ ranges.
+ (ia64_parse_name): Canonicalize name before looking it up in dynamic
+ register hash.
+ (ia64_canonicalize_symbol_name): Strip off all trailing # characters.
+ Warn if multiple found, issue error if resulting symbol name has zero
+ length.
+ (dot_alias): Canonicalize name before use.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (unwind_diagnostic): Return -1 for warning
+ and 0 for error.
+ (in_procedure): Return -1 for warning.
+ (in_prologue): Likewise.
+ (in_body): Likewise.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * config/tc-ia64.c (dot_xdata): Undo the last change.
+ (dot_float_cons): Likewise.
+ (dot_xstringer): Likewise.
+ (dot_xdata_ua): Likewise.
+ (dot_float_cons_ua): Likewise.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention "-munwind-check=[warning|error]".
+
+ * config/tc-ia64.c (md): Add unwind_check.
+ (unwind_diagnostic): New.
+ (in_procedure): Call unwind_diagnostic when a directive isn't
+ in procedure.
+ (in_prologue): Call unwind_diagnostic when a directive isn't in
+ prologue.
+ (in_body): Call unwind_diagnostic when a directive isn't in
+ body region.
+ (dot_endp): Set md.unwind_check to error before calling
+ in_procedure and restore it after. When the name is missing or
+ couldn't be found, use the one from the last .proc if
+ md.unwind_check isn't error. Warn if md.unwind_check is
+ warning.
+ (md_parse_option): Handle "-munwind-check=[warning|error]".
+ (md_show_usage): Add "-munwind-check=[warning|error]".
+ (ia64_init): Set md.unwind_check to warning.
+
+ * doc/as.texinfo: Add "-munwind-check=[none|warning|error]".
+ * doc/c-ia64.texi: Likewise.
+
+2005-02-11 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.h (LEX_AT): Include LEX_BEGIN_NAME.
+ (LEX_QM): Likewise.
+ (ia64_parse_name): New third parameter.
+ (md_parse_name): Pass third argument.
+ * config/tc-ia64.c (pseudo_func): Placeholders use NULL as name.
+ (md_operand): Handling of '@'-prefixed symbols moved from here...
+ (ia64_parse_name): ...to here.
+
+2005-02-11 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (md): Remove last_groups and group_idx.
+ (errata_nop_necessary_p): Remove declaraction and definition.
+ (emit_one_bundle): Don't call errata_nop_necessary_p. Don't
+ update md.group_idx. Don't reset md.last_groups.
+
+2005-02-11 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_section_name): Handle non-quoted first
+ argument.
+ (dot_xdata): Free section name after use.
+ (dot_float_cons): Likewise.
+ (dot_xstringer): Likewise.
+ (dot_xdata_ua): Likewise.
+ (dot_float_cons_ua): Likewise.
+ (md_pseudo_table): Add xdata16 and xdata16.ua.
+
+2005-02-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * doc/all.texi: Add IA64.
+ * doc/as.texinfo: Likewise.
+
+ * doc/c-ia64.texi: Fix typos.
+
+2005-02-10 Julian Brown <julian at codesourcery.com>
+
+ * config/tc-arm.c (do_t_ldmstm): Change BFD_RELOC_NONE to
+ BFD_RELOC_UNUSED.
+ (do_t_push_pop): Likewise.
+ (md_assemble): Likewise.
+ (md_apply_fix3): Handle BFD_RELOC_NONE correctly, make
+ BFD_RELOC_UNUSED same as previous meaning of BFD_RELOC_NONE.
+ (create_unwind_entry): Output dependency on the required personality
+ routines.
+
+2005-02-07 Nathan Sidwell <nathan at codesourcery.com>
+
+ * as.h (seg_not_empty_p): Return int, not bfd_boolean.
+ * subsegs.c (seg_not_empty_p): Likewise.
+
+2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
+
+ * config/tc-maxq.c (md_estimate_size_before_relax): Correct the
+ relative jump calculation.
+ <md_convert_frag) : Likewise.
+ <output_disp): Likewise.
+
+2005-02-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * write.c (write_object_file): Recognize warning-symbol construct
+ and skip object- and target- handling for the second symbol.
+
+2005-02-02 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (dot_pred_rel): Update comment. Handle @-prefixed
+ designators along with quoted ones. Free copy of quoted designator
+ when done.
+
+2005-02-01 Ben Elliston <bje at au.ibm.com>
+
+ * config/atof-ieee.c, config/obj-coff.c, config/obj-elf.c,
+ config/obj-ieee.c, config/obj-som.c, config/obj-vms.c,
+ config/tc-a29k.c, config/tc-alpha.c, config/tc-arc.c,
+ config/tc-arm.c, config/tc-d30v.c, config/tc-dlx.c,
+ config/tc-fr30.c, config/tc-h8300.c, config/tc-h8500.c,
+ config/tc-i370.c, config/tc-i386.c, config/tc-i960.c,
+ config/tc-ia64.c, config/tc-m32r.c, config/tc-m32r.h,
+ config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-mips.c,
+ config/tc-mn10200.c, config/tc-msp430.c, config/tc-ns32k.c,
+ config/tc-openrisc.c, config/tc-or32.c, config/tc-pdp11.c,
+ config/tc-pj.c, config/tc-sparc.h, config/tc-tic54x.c,
+ config/tc-tic80.c, config/tc-v850.c, config/tc-w65.c,
+ config/tc-xtensa.c, config/tc-z8k.c, config/xtensa-relax.c: Remove
+ #if 0'd code throughout.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * as.c (parse_args): Bump copyright date reported by --version to
+ 2005.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Remove obsolete targets m68k-lynxos, sparc-lynxos
+ and vax-vms.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (buffer_and_nest): Allow 'from' being NULL; handle anything
+ that can end with .endr in that case. Make requiring/permitting
+ pseudo-ops without leading dot closer to the logic in read.c serving
+ the same purpose.
+ (expand_irp): Don't pass a mnemonic to buffer_and_nest as it will be
+ ignored.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * macro.c (do_formals): Adjust to no longer accept empty parameter
+ names.
+ (define_macro): Adjust to no longer accept empty macro name, garbage
+ following the parameters, or macros that were previously defined.
+ * read.c (s_bad_end): Declare.
+ (potable): Add endm. Handler for endr and endm is s_bad_end.
+ (s_bad_end): Rename from s_bad_endr. Adjust to handle both .endm
+ and .endr.
+ * read.h (s_bad_endr): Remove.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_operands): Parse all specified operands,
+ immediately discarding (but counting) those exceeding the maximum
+ possible amount. Track whether output and input operand counts ever
+ matched, and use this to better indicate which of the operands/
+ operand types was wrong; specifically don't default to pointing to
+ the first operand.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (unwind): Remove proc_end (now an automatic
+ variable in dot_endp). Add body and insn. Make prologue,
+ prologue_mask, body, and insn bitfields.
+ (fixup_unw_records): Remove spurious new-lines from end of diagnostic
+ messages.
+ (in_procedure, in_prologue, in_body): New.
+ (dot_fframe, dot_vframe, dot_vframesp, dot_vframepsp, dot_save,
+ dot_restore, dot_restorereg, dot_restorereg_p, dot_handlerdata,
+ dot_unwentry, dot_altrp, dot_savemem, dot_saveg, dot_savef, dot_saveb,
+ dot_savegf, dot_spill, dot_spillreg, dot_spillmem, dot_spillreg_p,
+ dot_spillmem_p, dot_label_state, dot_copy_state, dot_unwabi,
+ dot_personality): Use the appropriate one of the above.
+ (dot_proc): Clear unwind.proc_start; set to current location only if
+ none of the entry points were valid. Check for non-zero-length entry
+ point names. Check that entry points aren't defined, yet. Clear
+ unwind.prologue, unwind.body, and unwind.insn.
+ (dot_body): Call in_procedure. Check that first directive in procedure
+ had no insns emitted before. Set unwind.body.
+ (dot_prologue): Call in_procedure. Check that not already in prologue.
+ Check that first directive in procedure had no insns emitted before.
+ Clear unwind.body.
+ (dot_endp): Call in_procedure. Declare proc_end. Check for non-zero-
+ length entry point names. Check that entry points became defined.
+ (md_assemble): Set unwind.insn once unwind.proc_start is defined.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Snapshot manual bundling state
+ before actually using it. Don't generate an error in manual bundling
+ mode when looking at an insn requiring slot 2 but not yet at slot 2.
+ Don't generate an error in manual bundling mode when looking at an
+ insn required to be last in its group but the required slot hasn't
+ been reached, yet. Allow conversion from MII to MI;I for bundle
+ consisting of only 2 insns with the stop between them. Suppress
+ various meaningless errors resulting from detecting earlier ones.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (parse_operands): Also handle alloc without first
+ input being ar.pfs.
+
+2005-01-28 Christian Groessler <chris at groessler.org>
+
+ * config/tc-z8k.c (md_assemble): Improve error detection.
+
+2005-01-28 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (ia64_estimate_size_before_relax): Allocate space
+ for personality routine pointer only if there is one.
+ (ia64_convert_frag): Likewise.
+ (generate_unwind_image): Likewise.
+
+2005-01-27 Christian Groessler <chris at groessler.org>
+
+ * config/tc-z8k.c (INSERT): Remove, not used anywhere.
+ (md_apply_fix3): Make relative branches out of range an error
+ instead of a warning. Display correct line number for out of
+ range branches/calls/memory accesses.
+
+2005-01-27 Nathan Sidwell <nathan at codesourcery.com>
+
+ * dwarf2dbg.c (dwarf2_finish): Correct logic for determining when
+ to emit .debug_line and other debug sections.
+ * as.h (seg_not_empty_p): Declare.
+ * subsegs.c (seg_not_empty_p): New predicate.
+
+2005-01-27 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-27 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Change "?imbf??" to "?ibmfxx".
+
+2005-01-27 Jan Beulich <jbeulich at novell.com>
+
+ * config/tc-ia64.c (emit_one_bundle): Add late resolution of move
+ to/from application registers dynamic insns.
+ (md_assemble): Defer resolution of move to/from application registers
+ dynamic insns when they can be issued on either the I- or M-units.
+
+2005-01-25 Alexandre Oliva <aoliva at redhat.com>
+
+ * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
+ 2004-12-10 Alexandre Oliva <aoliva at redhat.com>
+ * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
+ 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
+ * cgen.c (gas_cgen_parse_operand): Handle
+ CGEN_PARSE_OPERAND_SYMBOLIC.
+ * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
+ (frv_force_relocation): Likewise. Fix handling of PIC
+ relocations.
+ (md_apply_fix3): Likewise.
+
+2005-01-21 Ben Elliston <bje at au.ibm.com>
+
+ * as.h: Remove #if 0'd code.
+ * atof-generic.c (atof_generic): Likewise.
+ * ecoff.c (ecoff_directive_frame): Likewise.
+ * frags.h (FRAG_APPEND_1_CHAR): Likewise.
+ * itbl-ops.c (itbl_add_reg): Likewise.
+ * listing.c (calc_hex): Likewise.
+ * read.c (MASK_CHAR): Likewise.
+ * subsegs.c (subsegs_print_statistics): Likewise.
+ * symbols.c (indent): Likewise.
+ * write.c (write_relocs): Likewise.
+ (write_object_file): Likewise.
+ (relax_frag): Likewise.
+
+2005-01-20 Nick Clifton <nickc at redhat.com>
+
+ * as.c (std_longopts): Add an entry for "--a" in order to prevent
+ getopt_long_only() from considering -a as an abbreviation for
+ --alternate.
+ (parse_args): Fix the parsing of -a=<file>.
+
+2005-01-20 Alan Modra <amodra at bigpond.net.au>
+
+ PR gas/684
+ * read.c (s_incbin): Adjust default count for skip. Check validity
+ of count and skip rigorously.
+
+2005-01-19 Fred Fish <fnf at specifixinc.com>
+
+ * config/tc-mips.c (dummy_opcode): Add init for new struct member.
+
+2005-01-19 Richard Sandiford <rsandifo at redhat.com>
+
+ * read.c (convert_to_bignum): New function, split out from...
+ (emit_expr): ...here. Handle the case where X_add_number is
+ positive and the input value is negative.
+ (output_big_sleb128): Fix setting of continuation bit. Check whether
+ the final byte needs to be sign-extended. Fix size-shrinking loop.
+ (emit_leb128_expr): When generating a signed leb128, see whether the
+ sign of an O_constant's X_add_number matches the sign of the input
+ value. Use a bignum if not.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
+
+ * tc-sh.c (md_begin,md_parse_option): Change arch_sh1_up to
+ arch_sh_up in order to match the external name and make the
+ testsuite's job easier.
+
+2005-01-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 659
+ * config/tc-i386.c (i386_scale): Disallow 0 scale.
+
+2005-01-12 Nick Clifton <nickc at redhat.com>
+
+ * config/tc-iq2000.c (s_iq2000_set): Fix thinko parsing
+ ignored_arguments array.
+
+2005-01-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * write.c (write_object_file): Disallow a symbol equated to
+ common symbol.
+
+2005-01-10 Inderpreet Singh <inderpreetb at noida.hcltech.com>
+
+ * tc-maxq.c: Replace constants 10 and 20 with bfd_mach_maxq10 and
+ bfd_mach_maxq20.
+ (md_pseudo_table): Add new pseudo ops for maxq10 and maxq20.
+ (maxq_target): New function: Set the machine type.
+
+2005-01-06 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (FPU_DEFAULT): Define for TE_VXWORKS.
+ (md_begin): Handle TE_VXWORKS for FP defaults.
+ (md_apply_fix3): Correct rela offsets.
+ (elf32_arm_target_format): Add VxWorks targets.
+
+2005-01-06 Paul Brook <paul at codesourcery.com>
+
+ * configure.tgt: Set em=vxworks for *-*-vxworks.
+ * config/te-vxworks.h: New File.
+
+2005-01-06 Paul Brook <paul at codesourcery.com>
+
+ * config/tc-arm.c (arm_cpus): Correct arch field for arm1026ej-s.
+
+2005-01-04 Dmitry Diky <diwil at spec.ru>
+
+ * config/tc-msp430.c (md_apply_fix3): Fix offset calculation for
+ global label.
+
+2005-01-03 David Mosberger <davidm at hpl.hp.com>
+
+ * config/tc-ia64.c (md): Add member "loc_directive_seen".
+ (dot_loc): New function.
+ (md_pseudo_table): Add entry to map .loc to dot_loc().
+ (emit_one_bundle): Only call dwarf2_gen_line_info() if we have
+ seen a .loc directive or we're generating DWARF2 debug info for
+ assembly source.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/gas/Makefile.am
===================================================================
--- branches/binutils/package/gas/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -87,6 +87,7 @@
vax \
v850 \
xstormy16 \
+ xc16x \
xtensa \
z80 \
z8k
@@ -269,6 +270,7 @@
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
+ config/tc-xc16x.c \
config/tc-xtensa.c \
config/tc-z80.c \
config/tc-z8k.c
@@ -319,6 +321,7 @@
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
+ config/tc-xc16x.h \
config/tc-xtensa.h \
config/tc-z80.h \
config/tc-z8k.h
@@ -610,7 +613,8 @@
bfin-parse.c: $(srcdir)/config/bfin-parse.y
$(SHELL) $(YLWRAP) $(srcdir)/config/bfin-parse.y y.tab.c bfin-parse.c y.tab.h bfin-parse.h -- $(YACCCOMPILE) -d ;
bfin-parse.h: bfin-parse.c
-bfin-parse.o: bfin-parse.c bfin-parse.h $(srcdir)/config/bfin-defs.h
+bfin-parse.o: bfin-parse.c bfin-parse.h $(srcdir)/config/bfin-defs.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
bfin-defs.h: ; @true
$(srcdir)/config/bfin-defs.h: ; @true
@@ -668,6 +672,35 @@
CLEANFILES = dep.sed DEPTC DEPTCA DEPOBJ DEPOBJA DEP2 DEP2A DEP1 DEPA DEP DEPDIR
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
.PHONY: install-exec-local install-data-local
.PHONY: install-exec-bindir install-exec-tooldir
@@ -963,7 +996,7 @@
DEPTC_alpha_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-alpha.h ecoff.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/ecoff.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h ecoff.h $(INCDIR)/opcode/alpha.h dw2gencfi.h \
+ struc-symbol.h $(INCDIR)/opcode/alpha.h dw2gencfi.h \
$(INCDIR)/elf/dwarf2.h $(INCDIR)/safe-ctype.h $(srcdir)/config/atof-vax.c
DEPTC_alpha_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
@@ -988,23 +1021,22 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
dwarf2dbg.h struc-symbol.h $(INCDIR)/safe-ctype.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/opcode/arc.h $(srcdir)/../opcodes/arc-ext.h \
- $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
+ $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_arm_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-arm.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+ $(INCDIR)/opcode/arm.h
DEPTC_arm_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arm.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+ $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
DEPTC_arm_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h
+ $(INCDIR)/opcode/arm.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h \
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h
DEPTC_avr_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-avr.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1019,16 +1051,17 @@
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h struc-symbol.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h dwarf2dbg.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h $(INCDIR)/obstack.h $(srcdir)/config/bfin-aux.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/opcode/bfin.h
+ $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
+ $(srcdir)/config/bfin-aux.h $(INCDIR)/opcode/bfin.h \
+ $(srcdir)/config/bfin-defs.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
DEPTC_bfin_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
- dwarf2dbg.h struc-symbol.h $(srcdir)/config/obj-elf.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h $(INCDIR)/obstack.h $(srcdir)/config/bfin-aux.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/opcode/bfin.h
+ dwarf2dbg.h struc-symbol.h $(srcdir)/config/bfin-defs.h \
+ $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h $(srcdir)/config/bfin-aux.h \
+ $(INCDIR)/opcode/bfin.h $(srcdir)/config/bfin-defs.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
DEPTC_cris_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-cris.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
@@ -1037,7 +1070,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/cris.h dwarf2dbg.h
+ $(INCDIR)/opcode/cris.h
DEPTC_crx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-crx.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1046,7 +1079,7 @@
DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
- dwarf2dbg.h $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/opcode/crx.h \
+ dwarf2dbg.h $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/crx.h \
$(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
@@ -1070,43 +1103,38 @@
DEPTC_dlx_coff = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-coff.h $(srcdir)/config/tc-dlx.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(srcdir)/config/tc-dlx.h $(INCDIR)/opcode/dlx.h
+ $(INCDIR)/opcode/dlx.h
DEPTC_dlx_elf = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
- $(srcdir)/config/tc-dlx.h dwarf2dbg.h $(srcdir)/config/tc-dlx.h \
- $(INCDIR)/opcode/dlx.h
+ $(srcdir)/config/tc-dlx.h dwarf2dbg.h $(INCDIR)/opcode/dlx.h
DEPTC_fr30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-fr30.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/fr30-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/fr30-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/fr30-opc.h \
- cgen.h
+ $(srcdir)/../opcodes/fr30-opc.h cgen.h
DEPTC_fr30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/fr30-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/fr30-opc.h \
+ $(srcdir)/../opcodes/fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/fr30-opc.h \
cgen.h
DEPTC_frv_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-frv.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/frv-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/frv-opc.h \
+ $(srcdir)/../opcodes/frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/frv-opc.h \
cgen.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
DEPTC_frv_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/frv-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/frv-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/frv-opc.h \
- cgen.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+ $(srcdir)/../opcodes/frv-opc.h cgen.h $(BFDDIR)/libbfd.h \
+ $(INCDIR)/hashtab.h $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
DEPTC_h8300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-h8300.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/h8300.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1115,9 +1143,8 @@
DEPTC_h8300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h \
- $(INCDIR)/opcode/h8300.h $(INCDIR)/safe-ctype.h $(INCDIR)/elf/h8.h \
- $(INCDIR)/elf/reloc-macros.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/h8300.h \
+ $(INCDIR)/safe-ctype.h $(INCDIR)/elf/h8.h $(INCDIR)/elf/reloc-macros.h
DEPTC_hppa_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-hppa.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1125,22 +1152,20 @@
DEPTC_hppa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h \
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/hppa.h \
dwarf2dbg.h
DEPTC_ia64_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/ia64.h \
- $(INCDIR)/elf/ia64.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h
DEPTC_ia64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h
+ $(INCDIR)/safe-ctype.h dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h
DEPTC_i370_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i370.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1166,7 +1191,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
+ dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
$(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h
DEPTC_i860_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
@@ -1185,26 +1210,22 @@
DEPTC_ip2k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ip2k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/ip2k-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/ip2k-opc.h \
+ $(srcdir)/../opcodes/ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/ip2k-opc.h \
cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/ip2k.h \
$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
DEPTC_ip2k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
- $(srcdir)/../opcodes/ip2k-opc.h cgen.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/ip2k.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/ip2k-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ $(srcdir)/../opcodes/ip2k-opc.h cgen.h $(INCDIR)/elf/ip2k.h \
+ $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
DEPTC_m32c_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32c.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32c-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32c-opc.h \
+ $(srcdir)/../opcodes/m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32c-opc.h \
$(srcdir)/../opcodes/cgen-types.h $(srcdir)/../opcodes/cgen-ops.h \
cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/m32c.h \
$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
@@ -1212,27 +1233,25 @@
DEPTC_m32c_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32c-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/m32c-opc.h $(srcdir)/../opcodes/cgen-types.h \
- $(srcdir)/../opcodes/cgen-ops.h cgen.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/m32c.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h $(INCDIR)/safe-ctype.h
+ $(srcdir)/../opcodes/cgen-ops.h cgen.h $(INCDIR)/elf/m32c.h \
+ $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
+ $(INCDIR)/safe-ctype.h
DEPTC_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32r.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32r-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32r-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32r-opc.h \
- cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h
+ $(srcdir)/../opcodes/m32r-opc.h cgen.h $(INCDIR)/elf/m32r.h \
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32r-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32r-opc.h \
+ $(srcdir)/../opcodes/m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \
cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h
DEPTC_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68hc11.h $(INCDIR)/coff/internal.h \
@@ -1244,26 +1263,26 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/m68hc11.h dwarf2dbg.h $(INCDIR)/elf/m68hc11.h \
+ $(INCDIR)/opcode/m68hc11.h $(INCDIR)/elf/m68hc11.h \
$(INCDIR)/elf/reloc-macros.h
DEPTC_m68k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-m68k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+ $(srcdir)/config/m68k-parse.h
DEPTC_m68k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+ subsegs.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
+ $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
DEPTC_m68k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h \
- $(INCDIR)/elf/m68k.h $(INCDIR)/elf/reloc-macros.h
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+ $(srcdir)/config/m68k-parse.h $(INCDIR)/elf/m68k.h \
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_mcore_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mcore.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/mcore.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1290,21 +1309,20 @@
dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h ecoff.h
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_mips_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h \
subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/opcode/mips.h itbl-ops.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h $(srcdir)/config/obj-elf.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h ecoff.h $(INCDIR)/coff/sym.h \
- $(INCDIR)/coff/ecoff.h
+ $(INCDIR)/elf/dwarf2.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+ ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h
DEPTC_mmix_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/mmix.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/mmix.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/obstack.h
+ $(INCDIR)/safe-ctype.h
DEPTC_mn10200_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10200.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1323,7 +1341,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/mn10300.h dwarf2dbg.h
+ $(INCDIR)/opcode/mn10300.h
DEPTC_msp430_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-msp430.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
@@ -1332,7 +1350,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h
+ $(INCDIR)/safe-ctype.h
DEPTC_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/opcode/ns32k.h $(INCDIR)/obstack.h
@@ -1347,16 +1365,14 @@
DEPTC_openrisc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-openrisc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/openrisc-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/openrisc-opc.h \
+ $(srcdir)/../opcodes/openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/openrisc-opc.h \
cgen.h
DEPTC_openrisc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/openrisc-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/openrisc-opc.h cgen.h
DEPTC_or32_coff = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-coff.h $(srcdir)/config/tc-or32.h \
@@ -1397,7 +1413,7 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/ppc.h \
- $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
+ $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_s390_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-s390.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1408,8 +1424,8 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/s390.h $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
+ struc-symbol.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/s390.h \
+ $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
DEPTC_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1429,8 +1445,8 @@
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
$(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h $(srcdir)/../opcodes/sh64-opc.h \
$(srcdir)/config/tc-sh.c subsegs.h $(INCDIR)/obstack.h \
- $(srcdir)/../opcodes/sh-opc.h $(INCDIR)/safe-ctype.h \
- struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h
+ $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h \
+ dw2gencfi.h $(INCDIR)/elf/dwarf2.h
DEPTC_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
@@ -1446,8 +1462,7 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/sparc.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h \
- dwarf2dbg.h
+ $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_tic30_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-tic30.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/opcode/tic30.h
@@ -1463,40 +1478,39 @@
$(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic4x.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/tic4x.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h
+ subsegs.h $(INCDIR)/obstack.h
DEPTC_tic4x_elf = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
$(srcdir)/config/tc-tic4x.h dwarf2dbg.h $(INCDIR)/opcode/tic4x.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h
+ subsegs.h $(INCDIR)/obstack.h
DEPTC_tic54x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic54x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h sb.h macro.h \
- sb.h subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h \
- $(srcdir)/config/obj-coff.h
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h
DEPTC_tic54x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic54x.h \
- $(INCDIR)/safe-ctype.h sb.h macro.h sb.h subsegs.h \
- $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h \
- $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
- $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h
+ $(INCDIR)/safe-ctype.h sb.h macro.h subsegs.h $(INCDIR)/obstack.h \
+ struc-symbol.h $(INCDIR)/opcode/tic54x.h $(srcdir)/config/obj-coff.h \
+ $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
+ $(BFDDIR)/libcoff.h
DEPTC_vax_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-vax.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(srcdir)/config/vax-inst.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/vax.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/vax.h
DEPTC_vax_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-vax.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(srcdir)/config/vax-inst.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/vax.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/obstack.h subsegs.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/opcode/vax.h
DEPTC_vax_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
dwarf2dbg.h $(srcdir)/config/vax-inst.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/vax.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/opcode/vax.h $(INCDIR)/safe-ctype.h
+ subsegs.h $(INCDIR)/safe-ctype.h $(INCDIR)/elf/vax.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/vax.h
DEPTC_v850_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
@@ -1507,29 +1521,32 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/v850.h dwarf2dbg.h
+ $(INCDIR)/opcode/v850.h
DEPTC_xstormy16_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-xstormy16.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/xstormy16-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/xstormy16-opc.h \
+ $(srcdir)/../opcodes/xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/xstormy16-opc.h \
cgen.h
DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/xstormy16-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xstormy16-opc.h cgen.h
+DEPTC_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(srcdir)/../opcodes/xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ $(srcdir)/../opcodes/xc16x-opc.h cgen.h
DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
$(INCDIR)/xtensa-isa.h $(INCDIR)/xtensa-config.h sb.h \
- $(INCDIR)/safe-ctype.h $(srcdir)/config/tc-xtensa.h \
- subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/xtensa-relax.h \
- $(srcdir)/config/xtensa-istack.h dwarf2dbg.h struc-symbol.h \
- $(INCDIR)/xtensa-config.h
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(srcdir)/config/xtensa-relax.h $(srcdir)/config/xtensa-istack.h \
+ dwarf2dbg.h struc-symbol.h
DEPTC_z80_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z80.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z80.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1558,7 +1575,7 @@
DEPOBJ_alpha_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-alpha.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_alpha_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-alpha.h ecoff.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -1567,50 +1584,50 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-alpha.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h ecoff.h \
- $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/alpha.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h \
+ $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/alpha.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_alpha_evax = $(INCDIR)/symcat.h $(srcdir)/config/obj-evax.h \
$(srcdir)/config/tc-alpha.h
DEPOBJ_arc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_arc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_arm_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-arm.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_arm_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arm.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_arm_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_avr_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-avr.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_avr_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_bfin_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-bfin.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_bfin_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_cris_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-cris.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
@@ -1618,190 +1635,190 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_crx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-crx.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_d10v_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d10v.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_d30v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d30v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_d30v_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d30v.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_dlx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-dlx.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_dlx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_fr30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-fr30.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_fr30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_frv_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-frv.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_frv_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_h8300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-h8300.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/h8300.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_h8300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_hppa_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-hppa.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_hppa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_ia64_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ia64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_i370_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i370.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_i370_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/i370.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/i370.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_i386_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-i386.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_i386_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i386.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_i386_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/x86-64.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_i860_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_i960_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i960.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/i960.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_i960_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i960.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ip2k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ip2k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ip2k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m32c_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32c.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_m32c_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32r.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68hc11.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_m68hc11_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m68k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-m68k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_m68k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_m68k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_mcore_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mcore.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/mcore.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_mcore_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mcore.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mips_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mips.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/mipspe.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_mips_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-mips.h ecoff.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -1810,224 +1827,228 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h ecoff.h \
- $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h \
+ $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_mmix_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mn10200_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10200.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_mn10200_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mn10300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10300.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_msp430_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-msp430.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_msp430_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_ns32k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ns32k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ns32k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_openrisc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-openrisc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_openrisc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_or32_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-or32.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/or32.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_or32_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-or32.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_pdp11_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-pdp11.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_pdp11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-pdp11.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_pdp11_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pdp11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_pj_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-pj.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_pj_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pj.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ppc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ppc.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/rs6000.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_ppc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/ppc.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_s390_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-s390.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_s390_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_sh_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
$(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_sparc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sparc.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/sparc.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_sparc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic30_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-tic30.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_tic30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic30.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic4x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic4x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic4x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic4x.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic54x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic54x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic54x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic54x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_vax_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-vax.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
DEPOBJ_vax_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-vax.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_vax_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_v850_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_v850_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_xstormy16_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-xstormy16.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
+DEPOBJ_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
$(INCDIR)/xtensa-isa.h $(INCDIR)/xtensa-config.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_z80_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z80.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z80.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_z80_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z80.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_z8k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z8k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_hppa_som = $(srcdir)/config/obj-som.h subsegs.h \
$(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(BFDDIR)/som.h \
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def
@@ -2051,7 +2072,7 @@
DEP_arc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_arm_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-arm.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_arm_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-arm.h \
@@ -2066,27 +2087,27 @@
DEP_avr_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_bfin_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-bfin.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_bfin_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_cris_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-cris.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_cris_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_crx_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-crx.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_crx_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_d10v_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-d10v.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
@@ -2105,14 +2126,14 @@
DEP_dlx_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_fr30_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-fr30.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_fr30_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_frv_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-frv.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
@@ -2125,15 +2146,15 @@
DEP_h8300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_hppa_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-hppa.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_hppa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h
DEP_ia64_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/symcat.h $(INCDIR)/elf/ia64.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/internal.h \
@@ -2148,7 +2169,7 @@
DEP_i370_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i386_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-i386.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_i386_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i386.h \
@@ -2157,46 +2178,46 @@
DEP_i386_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i860_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i960_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i960.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/i960.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_i960_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i960.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ip2k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ip2k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_ip2k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m32c_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m32c.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_m32c_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m32r_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m32r.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_m32r_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m68hc11_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68hc11.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_m68hc11_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_m68k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68k.h \
@@ -2211,7 +2232,7 @@
DEP_mcore_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mcore.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mips_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mips.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/mipspe.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
@@ -2223,28 +2244,28 @@
DEP_mmix_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mn10200_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mn10200.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_mn10200_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mn10300_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mn10300.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_mn10300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_msp430_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_ns32k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ns32k.h \
@@ -2253,21 +2274,21 @@
DEP_ns32k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_openrisc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-openrisc.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_openrisc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_or32_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-or32.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/or32.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_or32_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-or32.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_pdp11_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-pdp11.h \
@@ -2276,28 +2297,28 @@
DEP_pdp11_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pdp11.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_pj_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-pj.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_pj_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pj.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ppc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ppc.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/rs6000.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_ppc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_s390_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-s390.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_s390_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
@@ -2317,7 +2338,7 @@
DEP_sparc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic30_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-tic30.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_tic30_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic30.h \
@@ -2326,14 +2347,14 @@
DEP_tic30_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic30.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic4x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic4x.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic4x.h \
$(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_tic4x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic4x.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic54x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic54x.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h \
$(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
@@ -2348,22 +2369,24 @@
DEP_vax_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_v850_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/symcat.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_v850_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
- $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
- $(srcdir)/config/obj-elf.h
+ $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
DEP_xstormy16_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-xstormy16.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h
DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
+DEP_xc16x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h
DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@@ -2374,14 +2397,14 @@
DEP_z80_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z80.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_z8k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z8k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/z8k.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
DEP_z8k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z8k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_hppa_som = $(BFDDIR)/som.h
DEP_i386_multi = $(DEP_i386_aout) $(DEP_i386_coff) \
$(DEP_i386_elf)
Modified: branches/binutils/package/gas/Makefile.in
===================================================================
--- branches/binutils/package/gas/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -213,6 +213,8 @@
build_vendor = @build_vendor@
cgen_cpu_prefix = @cgen_cpu_prefix@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
extra_objects = @extra_objects@
host = @host@
@@ -220,6 +222,7 @@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -317,6 +320,7 @@
vax \
v850 \
xstormy16 \
+ xc16x \
xtensa \
z80 \
z8k
@@ -497,6 +501,7 @@
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
+ config/tc-xc16x.c \
config/tc-xtensa.c \
config/tc-z80.c \
config/tc-z8k.c
@@ -547,6 +552,7 @@
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
+ config/tc-xc16x.h \
config/tc-xtensa.h \
config/tc-z80.h \
config/tc-z8k.h
@@ -734,7 +740,7 @@
DEPTC_alpha_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-alpha.h ecoff.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/ecoff.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h ecoff.h $(INCDIR)/opcode/alpha.h dw2gencfi.h \
+ struc-symbol.h $(INCDIR)/opcode/alpha.h dw2gencfi.h \
$(INCDIR)/elf/dwarf2.h $(INCDIR)/safe-ctype.h $(srcdir)/config/atof-vax.c
DEPTC_alpha_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
@@ -763,26 +769,25 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
dwarf2dbg.h struc-symbol.h $(INCDIR)/safe-ctype.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/opcode/arc.h $(srcdir)/../opcodes/arc-ext.h \
- $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
+ $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_arm_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-arm.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+ $(INCDIR)/opcode/arm.h
DEPTC_arm_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arm.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+ $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
DEPTC_arm_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h
+ $(INCDIR)/opcode/arm.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h \
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h
DEPTC_avr_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-avr.h $(INCDIR)/coff/internal.h \
@@ -800,17 +805,18 @@
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h struc-symbol.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h dwarf2dbg.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h $(INCDIR)/obstack.h $(srcdir)/config/bfin-aux.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/opcode/bfin.h
+ $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
+ $(srcdir)/config/bfin-aux.h $(INCDIR)/opcode/bfin.h \
+ $(srcdir)/config/bfin-defs.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
DEPTC_bfin_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
- dwarf2dbg.h struc-symbol.h $(srcdir)/config/obj-elf.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h $(INCDIR)/obstack.h $(srcdir)/config/bfin-aux.h \
- $(srcdir)/config/bfin-defs.h $(INCDIR)/opcode/bfin.h
+ dwarf2dbg.h struc-symbol.h $(srcdir)/config/bfin-defs.h \
+ $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h $(srcdir)/config/bfin-aux.h \
+ $(INCDIR)/opcode/bfin.h $(srcdir)/config/bfin-defs.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
DEPTC_cris_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-cris.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -821,7 +827,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/cris.h dwarf2dbg.h
+ $(INCDIR)/opcode/cris.h
DEPTC_crx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-crx.h $(INCDIR)/coff/internal.h \
@@ -832,7 +838,7 @@
DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
- dwarf2dbg.h $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/opcode/crx.h \
+ dwarf2dbg.h $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/crx.h \
$(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
@@ -861,48 +867,43 @@
DEPTC_dlx_coff = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-coff.h $(srcdir)/config/tc-dlx.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(srcdir)/config/tc-dlx.h $(INCDIR)/opcode/dlx.h
+ $(INCDIR)/opcode/dlx.h
DEPTC_dlx_elf = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
- $(srcdir)/config/tc-dlx.h dwarf2dbg.h $(srcdir)/config/tc-dlx.h \
- $(INCDIR)/opcode/dlx.h
+ $(srcdir)/config/tc-dlx.h dwarf2dbg.h $(INCDIR)/opcode/dlx.h
DEPTC_fr30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-fr30.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/fr30-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/fr30-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/fr30-opc.h \
- cgen.h
+ $(srcdir)/../opcodes/fr30-opc.h cgen.h
DEPTC_fr30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/fr30-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/fr30-opc.h \
+ $(srcdir)/../opcodes/fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/fr30-opc.h \
cgen.h
DEPTC_frv_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-frv.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/frv-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/frv-opc.h \
+ $(srcdir)/../opcodes/frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/frv-opc.h \
cgen.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
DEPTC_frv_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/frv-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/frv-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/frv-opc.h \
- cgen.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+ $(srcdir)/../opcodes/frv-opc.h cgen.h $(BFDDIR)/libbfd.h \
+ $(INCDIR)/hashtab.h $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
DEPTC_h8300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-h8300.h $(INCDIR)/coff/internal.h \
@@ -913,9 +914,8 @@
DEPTC_h8300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h \
- $(INCDIR)/opcode/h8300.h $(INCDIR)/safe-ctype.h $(INCDIR)/elf/h8.h \
- $(INCDIR)/elf/reloc-macros.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/h8300.h \
+ $(INCDIR)/safe-ctype.h $(INCDIR)/elf/h8.h $(INCDIR)/elf/reloc-macros.h
DEPTC_hppa_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-hppa.h $(INCDIR)/coff/internal.h \
@@ -925,24 +925,22 @@
DEPTC_hppa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h \
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/hppa.h \
dwarf2dbg.h
DEPTC_ia64_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/ia64.h \
- $(INCDIR)/elf/ia64.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h
DEPTC_ia64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h
+ $(INCDIR)/safe-ctype.h dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h
DEPTC_i370_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i370.h $(INCDIR)/coff/internal.h \
@@ -973,7 +971,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
+ dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
$(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h
DEPTC_i860_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
@@ -996,28 +994,24 @@
DEPTC_ip2k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ip2k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/ip2k-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/ip2k-opc.h \
+ $(srcdir)/../opcodes/ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/ip2k-opc.h \
cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/ip2k.h \
$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
DEPTC_ip2k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
- $(srcdir)/../opcodes/ip2k-opc.h cgen.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/ip2k.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/ip2k-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ $(srcdir)/../opcodes/ip2k-opc.h cgen.h $(INCDIR)/elf/ip2k.h \
+ $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
DEPTC_m32c_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32c.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32c-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32c-opc.h \
+ $(srcdir)/../opcodes/m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32c-opc.h \
$(srcdir)/../opcodes/cgen-types.h $(srcdir)/../opcodes/cgen-ops.h \
cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/m32c.h \
$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
@@ -1026,29 +1020,27 @@
DEPTC_m32c_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32c-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/m32c-opc.h $(srcdir)/../opcodes/cgen-types.h \
- $(srcdir)/../opcodes/cgen-ops.h cgen.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/m32c.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h \
- $(INCDIR)/hashtab.h $(INCDIR)/safe-ctype.h
+ $(srcdir)/../opcodes/cgen-ops.h cgen.h $(INCDIR)/elf/m32c.h \
+ $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
+ $(INCDIR)/safe-ctype.h
DEPTC_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32r.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32r-desc.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32r-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32r-opc.h \
- cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h
+ $(srcdir)/../opcodes/m32r-opc.h cgen.h $(INCDIR)/elf/m32r.h \
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/m32r-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32r-opc.h \
+ $(srcdir)/../opcodes/m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \
cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h
DEPTC_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
@@ -1062,29 +1054,29 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/m68hc11.h dwarf2dbg.h $(INCDIR)/elf/m68hc11.h \
+ $(INCDIR)/opcode/m68hc11.h $(INCDIR)/elf/m68hc11.h \
$(INCDIR)/elf/reloc-macros.h
DEPTC_m68k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-m68k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+ $(srcdir)/config/m68k-parse.h
DEPTC_m68k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+ subsegs.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
+ $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
DEPTC_m68k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h \
- $(INCDIR)/elf/m68k.h $(INCDIR)/elf/reloc-macros.h
+ dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+ $(srcdir)/config/m68k-parse.h $(INCDIR)/elf/m68k.h \
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_mcore_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mcore.h $(INCDIR)/coff/internal.h \
@@ -1115,23 +1107,22 @@
dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h ecoff.h
+ $(INCDIR)/elf/reloc-macros.h
DEPTC_mips_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h \
subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/opcode/mips.h itbl-ops.h dwarf2dbg.h dw2gencfi.h \
- $(INCDIR)/elf/dwarf2.h $(srcdir)/config/obj-elf.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h ecoff.h $(INCDIR)/coff/sym.h \
- $(INCDIR)/coff/ecoff.h
+ $(INCDIR)/elf/dwarf2.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+ ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h
DEPTC_mmix_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/mmix.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/mmix.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/obstack.h
+ $(INCDIR)/safe-ctype.h
DEPTC_mn10200_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10200.h $(INCDIR)/coff/internal.h \
@@ -1154,7 +1145,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/mn10300.h dwarf2dbg.h
+ $(INCDIR)/opcode/mn10300.h
DEPTC_msp430_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-msp430.h $(INCDIR)/coff/internal.h \
@@ -1165,7 +1156,7 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h \
- $(INCDIR)/safe-ctype.h dwarf2dbg.h
+ $(INCDIR)/safe-ctype.h
DEPTC_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1184,17 +1175,15 @@
DEPTC_openrisc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-openrisc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/openrisc-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/openrisc-opc.h \
+ $(srcdir)/../opcodes/openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/openrisc-opc.h \
cgen.h
DEPTC_openrisc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/openrisc-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/openrisc-opc.h cgen.h
DEPTC_or32_coff = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
@@ -1244,7 +1233,7 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/ppc.h \
- $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
+ $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_s390_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-s390.h $(INCDIR)/coff/internal.h \
@@ -1257,8 +1246,8 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/opcode/s390.h $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
+ struc-symbol.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/s390.h \
+ $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
DEPTC_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \
@@ -1281,8 +1270,8 @@
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
$(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h $(srcdir)/../opcodes/sh64-opc.h \
$(srcdir)/config/tc-sh.c subsegs.h $(INCDIR)/obstack.h \
- $(srcdir)/../opcodes/sh-opc.h $(INCDIR)/safe-ctype.h \
- struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h
+ $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h \
+ dw2gencfi.h $(INCDIR)/elf/dwarf2.h
DEPTC_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1301,8 +1290,7 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/sparc.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
- $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h \
- dwarf2dbg.h
+ $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h
DEPTC_tic30_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-tic30.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1322,46 +1310,45 @@
$(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic4x.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/tic4x.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h
+ subsegs.h $(INCDIR)/obstack.h
DEPTC_tic4x_elf = $(INCDIR)/safe-ctype.h $(INCDIR)/symcat.h \
$(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
$(srcdir)/config/tc-tic4x.h dwarf2dbg.h $(INCDIR)/opcode/tic4x.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h
+ subsegs.h $(INCDIR)/obstack.h
DEPTC_tic54x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic54x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h sb.h macro.h \
- sb.h subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h \
- $(srcdir)/config/obj-coff.h
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h
DEPTC_tic54x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic54x.h \
- $(INCDIR)/safe-ctype.h sb.h macro.h sb.h subsegs.h \
- $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/tic54x.h \
- $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
- $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h
+ $(INCDIR)/safe-ctype.h sb.h macro.h subsegs.h $(INCDIR)/obstack.h \
+ struc-symbol.h $(INCDIR)/opcode/tic54x.h $(srcdir)/config/obj-coff.h \
+ $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
+ $(BFDDIR)/libcoff.h
DEPTC_vax_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-vax.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(srcdir)/config/vax-inst.h $(INCDIR)/obstack.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/opcode/vax.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/vax.h
DEPTC_vax_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-vax.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(srcdir)/config/vax-inst.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/vax.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/obstack.h subsegs.h $(INCDIR)/safe-ctype.h \
+ $(INCDIR)/opcode/vax.h
DEPTC_vax_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
dwarf2dbg.h $(srcdir)/config/vax-inst.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/vax.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/opcode/vax.h $(INCDIR)/safe-ctype.h
+ subsegs.h $(INCDIR)/safe-ctype.h $(INCDIR)/elf/vax.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/vax.h
DEPTC_v850_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
@@ -1374,32 +1361,36 @@
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/opcode/v850.h dwarf2dbg.h
+ $(INCDIR)/opcode/v850.h
DEPTC_xstormy16_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-xstormy16.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/symcat.h $(srcdir)/../opcodes/xstormy16-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/xstormy16-opc.h \
+ $(srcdir)/../opcodes/xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/xstormy16-opc.h \
cgen.h
DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
- dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/symcat.h \
- $(srcdir)/../opcodes/xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/xstormy16-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
$(srcdir)/../opcodes/xstormy16-opc.h cgen.h
+DEPTC_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(srcdir)/../opcodes/xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ $(srcdir)/../opcodes/xc16x-opc.h cgen.h
+
DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
$(INCDIR)/xtensa-isa.h $(INCDIR)/xtensa-config.h sb.h \
- $(INCDIR)/safe-ctype.h $(srcdir)/config/tc-xtensa.h \
- subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/xtensa-relax.h \
- $(srcdir)/config/xtensa-istack.h dwarf2dbg.h struc-symbol.h \
- $(INCDIR)/xtensa-config.h
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(srcdir)/config/xtensa-relax.h $(srcdir)/config/xtensa-istack.h \
+ dwarf2dbg.h struc-symbol.h
DEPTC_z80_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z80.h $(INCDIR)/coff/internal.h \
@@ -1436,7 +1427,7 @@
DEPOBJ_alpha_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-alpha.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_alpha_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-alpha.h ecoff.h $(INCDIR)/coff/sym.h \
@@ -1447,9 +1438,9 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-alpha.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h ecoff.h \
- $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/alpha.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h \
+ $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/alpha.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_alpha_evax = $(INCDIR)/symcat.h $(srcdir)/config/obj-evax.h \
$(srcdir)/config/tc-alpha.h
@@ -1457,13 +1448,13 @@
DEPOBJ_arc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_arc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_arm_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-arm.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1472,35 +1463,35 @@
DEPOBJ_arm_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-arm.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_arm_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_avr_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-avr.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_avr_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_bfin_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-bfin.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_bfin_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_cris_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-cris.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1510,122 +1501,122 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_crx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-crx.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_d10v_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d10v.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_d30v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d30v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_d30v_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d30v.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_dlx_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-dlx.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_dlx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_fr30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-fr30.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_fr30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_frv_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-frv.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_frv_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_h8300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-h8300.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/h8300.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_h8300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_hppa_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-hppa.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_hppa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_ia64_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
$(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ia64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_i370_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i370.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_i370_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/i370.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/i370.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_i386_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-i386.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1634,75 +1625,75 @@
DEPOBJ_i386_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i386.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_i386_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/x86-64.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_i860_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_i960_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-i960.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/i960.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_i960_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i960.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ip2k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ip2k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ip2k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m32c_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32c.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_m32c_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m32r.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68hc11.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_m68hc11_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_m68k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-m68k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1711,29 +1702,29 @@
DEPOBJ_m68k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-m68k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_m68k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_mcore_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mcore.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/mcore.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_mcore_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mcore.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mips_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mips.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/mipspe.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_mips_ecoff = $(INCDIR)/symcat.h $(srcdir)/config/obj-ecoff.h \
$(srcdir)/config/tc-mips.h ecoff.h $(INCDIR)/coff/sym.h \
@@ -1744,48 +1735,48 @@
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h ecoff.h \
- $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/mips.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h \
+ $(INCDIR)/coff/ecoff.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_mmix_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mn10200_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10200.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_mn10200_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_mn10300_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-mn10300.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_mn10300_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_msp430_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-msp430.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_msp430_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1794,35 +1785,35 @@
DEPOBJ_ns32k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ns32k.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_ns32k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_openrisc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-openrisc.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_openrisc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_or32_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-or32.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/or32.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_or32_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-or32.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_pdp11_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-pdp11.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1831,66 +1822,65 @@
DEPOBJ_pdp11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-pdp11.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_pdp11_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pdp11.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_pj_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-pj.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_pj_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pj.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_ppc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-ppc.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/rs6000.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_ppc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/ppc.h \
- $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_s390_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-s390.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_s390_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_sh_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
$(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h subsegs.h \
- $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1899,13 +1889,13 @@
DEPOBJ_sparc_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-sparc.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/sparc.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_sparc_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic30_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-tic30.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1914,35 +1904,35 @@
DEPOBJ_tic30_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic30.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic30_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic30.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic4x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic4x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic4x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic4x.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_tic54x_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-tic54x.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_tic54x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic54x.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
DEPOBJ_vax_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-vax.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1951,65 +1941,71 @@
DEPOBJ_vax_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-vax.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_vax_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_v850_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/obstack.h subsegs.h
DEPOBJ_v850_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_xstormy16_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-xstormy16.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
- subsegs.h $(INCDIR)/obstack.h
+ subsegs.h
DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
+DEPOBJ_xc16x_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+
DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
$(INCDIR)/xtensa-isa.h $(INCDIR)/xtensa-config.h $(INCDIR)/safe-ctype.h \
- subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
- dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
+ $(INCDIR)/aout/aout64.h
DEPOBJ_z80_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z80.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z80.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_z80_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z80.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
DEPOBJ_z8k_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z8k.h \
dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+ struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_hppa_som = $(srcdir)/config/obj-som.h subsegs.h \
$(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(BFDDIR)/som.h \
@@ -2041,7 +2037,7 @@
DEP_arc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_arm_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-arm.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2061,7 +2057,7 @@
DEP_avr_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_bfin_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-bfin.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2070,7 +2066,7 @@
DEP_bfin_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_cris_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-cris.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2078,7 +2074,7 @@
DEP_cris_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_crx_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-crx.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2087,7 +2083,7 @@
DEP_crx_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_d10v_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-d10v.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2112,7 +2108,7 @@
DEP_dlx_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_fr30_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-fr30.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2121,7 +2117,7 @@
DEP_fr30_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_frv_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-frv.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2138,7 +2134,7 @@
DEP_h8300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_hppa_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-hppa.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2147,8 +2143,8 @@
DEP_hppa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h \
- $(BFDDIR)/elf32-hppa.h $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h \
- $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h
+ $(BFDDIR)/elf32-hppa.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+ $(INCDIR)/elf/reloc-macros.h
DEP_ia64_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ia64.h \
$(INCDIR)/opcode/ia64.h $(INCDIR)/symcat.h $(INCDIR)/elf/ia64.h \
@@ -2167,7 +2163,7 @@
DEP_i370_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i386_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-i386.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2179,12 +2175,12 @@
DEP_i386_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i860_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_i960_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i960.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/i960.h \
@@ -2193,7 +2189,7 @@
DEP_i960_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i960.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ip2k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ip2k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2202,7 +2198,7 @@
DEP_ip2k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m32c_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m32c.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2211,7 +2207,7 @@
DEP_m32c_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m32r_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m32r.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2220,7 +2216,7 @@
DEP_m32r_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m68hc11_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68hc11.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h \
@@ -2229,7 +2225,7 @@
DEP_m68hc11_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2249,7 +2245,7 @@
DEP_mcore_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mcore.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mips_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mips.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/mipspe.h \
@@ -2265,7 +2261,7 @@
DEP_mmix_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mn10200_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mn10200.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2274,7 +2270,7 @@
DEP_mn10200_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_mn10300_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mn10300.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2283,7 +2279,7 @@
DEP_mn10300_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_msp430_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-msp430.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2292,7 +2288,7 @@
DEP_msp430_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2304,7 +2300,7 @@
DEP_ns32k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_openrisc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-openrisc.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2313,7 +2309,7 @@
DEP_openrisc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_or32_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-or32.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/or32.h \
@@ -2322,7 +2318,7 @@
DEP_or32_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-or32.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2334,7 +2330,7 @@
DEP_pdp11_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pdp11.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_pj_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-pj.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2343,7 +2339,7 @@
DEP_pj_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pj.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_ppc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ppc.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/rs6000.h \
@@ -2352,7 +2348,7 @@
DEP_ppc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_s390_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-s390.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2361,7 +2357,7 @@
DEP_s390_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h \
@@ -2387,7 +2383,7 @@
DEP_sparc_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic30_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-tic30.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
@@ -2399,7 +2395,7 @@
DEP_tic30_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic30.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic4x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic4x.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic4x.h \
@@ -2408,7 +2404,7 @@
DEP_tic4x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-tic4x.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_tic54x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic54x.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h \
@@ -2428,7 +2424,7 @@
DEP_vax_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_v850_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-v850.h \
$(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/symcat.h \
@@ -2437,8 +2433,7 @@
DEP_v850_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h \
- $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
- $(srcdir)/config/obj-elf.h
+ $(INCDIR)/elf/v850.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
DEP_xstormy16_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-xstormy16.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
@@ -2447,8 +2442,12 @@
DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
+DEP_xc16x_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h
+
DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
@@ -2461,7 +2460,7 @@
DEP_z80_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z80.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_z8k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z8k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/z8k.h \
@@ -2470,7 +2469,7 @@
DEP_z8k_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-z8k.h \
- dwarf2dbg.h $(srcdir)/config/obj-elf.h
+ dwarf2dbg.h
DEP_hppa_som = $(BFDDIR)/som.h
DEP_i386_multi = $(DEP_i386_aout) $(DEP_i386_coff) \
@@ -2973,7 +2972,8 @@
bfin-parse.c: $(srcdir)/config/bfin-parse.y
$(SHELL) $(YLWRAP) $(srcdir)/config/bfin-parse.y y.tab.c bfin-parse.c y.tab.h bfin-parse.h -- $(YACCCOMPILE) -d ;
bfin-parse.h: bfin-parse.c
-bfin-parse.o: bfin-parse.c bfin-parse.h $(srcdir)/config/bfin-defs.h
+bfin-parse.o: bfin-parse.c bfin-parse.h $(srcdir)/config/bfin-defs.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/bfin.h $(BFDDIR)/libbfd.h
bfin-defs.h: ; @true
$(srcdir)/config/bfin-defs.h: ; @true
@@ -3013,6 +3013,35 @@
$(srcdir)/../opcodes/$(CGEN_CPU_PREFIX)-desc.h \
$(srcdir)/../opcodes/$(CGEN_CPU_PREFIX)-opc.h
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
.PHONY: install-exec-local install-data-local
.PHONY: install-exec-bindir install-exec-tooldir
Modified: branches/binutils/package/gas/NEWS
===================================================================
--- branches/binutils/package/gas/NEWS 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/NEWS 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,7 @@
-*- text -*-
+* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
+
* Support for ms2 architecture has been added.
* Support for the Z80 processor family has been added.
Modified: branches/binutils/package/gas/app.c
===================================================================
--- branches/binutils/package/gas/app.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/app.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1335,26 +1335,9 @@
if (len > 0)
{
PUT (ch);
- if (len > 8)
- {
- memcpy (to, from, len);
- to += len;
- from += len;
- }
- else
- {
- switch (len)
- {
- case 8: *to++ = *from++;
- case 7: *to++ = *from++;
- case 6: *to++ = *from++;
- case 5: *to++ = *from++;
- case 4: *to++ = *from++;
- case 3: *to++ = *from++;
- case 2: *to++ = *from++;
- case 1: *to++ = *from++;
- }
- }
+ memcpy (to, from, len);
+ to += len;
+ from += len;
if (to >= toend)
goto tofull;
ch = GET ();
Modified: branches/binutils/package/gas/as.c
===================================================================
--- branches/binutils/package/gas/as.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/as.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -930,6 +930,14 @@
#endif
}
+#ifndef OBJ_VMS
+static void
+close_output_file (void)
+{
+ output_file_close (out_file_name);
+}
+#endif
+
/* The interface between the macro code and gas expression handling. */
static int
@@ -1081,6 +1089,11 @@
input_scrub_begin ();
expr_begin ();
+#ifndef OBJ_VMS /* Does its own file handling. */
+ /* It has to be called after dump_statistics (). */
+ xatexit (close_output_file);
+#endif
+
if (flag_print_statistics)
xatexit (dump_statistics);
@@ -1169,10 +1182,6 @@
listing_print (listing_filename);
#endif
-#ifndef OBJ_VMS /* Does its own file handling. */
- output_file_close (out_file_name);
-#endif
-
if (flag_fatal_warnings && had_warnings () > 0 && had_errors () == 0)
as_bad (_("%d warnings, treating warnings as errors"), had_warnings ());
Modified: branches/binutils/package/gas/as.h
===================================================================
--- branches/binutils/package/gas/as.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/as.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -68,6 +68,19 @@
# endif /* HAVE_ALLOCA_H */
#endif /* __GNUC__ */
+/* Prefer varargs for non-ANSI compiler, since some will barf if the
+ ellipsis definition is used with a no-arguments declaration. */
+#if defined (HAVE_VARARGS_H) && !defined (__STDC__)
+#undef HAVE_STDARG_H
+#endif
+
+#if defined (HAVE_STDARG_H)
+#define USE_STDARG
+#endif
+#if !defined (USE_STDARG) && defined (HAVE_VARARGS_H)
+#define USE_VARARGS
+#endif
+
/* Now, tend to the rest of the configuration. */
/* System include files first... */
@@ -90,6 +103,27 @@
#include <sys/types.h>
#endif
+#ifdef HAVE_ERRNO_H
+#include <errno.h>
+#endif
+
+#ifdef USE_STDARG
+#include <stdarg.h>
+#endif
+
+#ifdef USE_VARARGS
+#include <varargs.h>
+#endif
+
+#if !defined (USE_STDARG) && !defined (USE_VARARGS)
+/* Roll our own. */
+#define va_alist REST
+#define va_dcl
+typedef int * va_list;
+#define va_start(ARGS) ARGS = &REST
+#define va_end(ARGS)
+#endif
+
#include "getopt.h"
/* The first getopt value for machine-independent long options.
150 isn't special; it's just an arbitrary non-ASCII char value. */
@@ -145,6 +179,10 @@
extern char *strstr ();
#endif
+#if !HAVE_DECL_VSNPRINTF
+extern int vsnprintf(char *, size_t, const char *, va_list);
+#endif
+
/* This is needed for VMS. */
#if ! defined (HAVE_UNLINK) && defined (HAVE_REMOVE)
#define unlink remove
@@ -442,19 +480,6 @@
typedef struct _pseudo_type pseudo_typeS;
-/* Prefer varargs for non-ANSI compiler, since some will barf if the
- ellipsis definition is used with a no-arguments declaration. */
-#if defined (HAVE_VARARGS_H) && !defined (__STDC__)
-#undef HAVE_STDARG_H
-#endif
-
-#if defined (HAVE_STDARG_H)
-#define USE_STDARG
-#endif
-#if !defined (USE_STDARG) && defined (HAVE_VARARGS_H)
-#define USE_VARARGS
-#endif
-
#ifdef USE_STDARG
#if (__GNUC__ >= 2) && !defined(VMS)
/* for use with -Wformat */
Modified: branches/binutils/package/gas/config/bfin-defs.h
===================================================================
--- branches/binutils/package/gas/config/bfin-defs.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/bfin-defs.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -263,6 +263,7 @@
Expr_Node_Binop, /* Binary operator. */
Expr_Node_Unop, /* Unary operator. */
Expr_Node_Reloc, /* Symbol to be relocated. */
+ Expr_Node_GOT_Reloc, /* Symbol to be relocated using the GOT. */
Expr_Node_Constant /* Constant. */
} Expr_Node_Type;
Modified: branches/binutils/package/gas/config/bfin-lex.l
===================================================================
--- branches/binutils/package/gas/config/bfin-lex.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/bfin-lex.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -241,6 +241,8 @@
[aA]0"."[wW] _REG.regno = REG_A0w; return REG;
[aA]0 _REG.regno = REG_A0; return REG_A_DOUBLE_ZERO;
[Gg][Oo][Tt] return GOT;
+[Gg][Oo][Tt]"17"[Mm]"4" return GOT17M4;
+[Ff][Uu][Nn][Cc][Dd][Ee][Ss][Cc]"_"[Gg][Oo][Tt]"17"[Mm]"4" return FUNCDESC_GOT17M4;
[Pp][Ll][Tt][Pp][Cc] return PLTPC;
Modified: branches/binutils/package/gas/config/bfin-parse.y
===================================================================
--- branches/binutils/package/gas/config/bfin-parse.y 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/bfin-parse.y 2006-04-19 08:33:31 UTC (rev 12)
@@ -21,10 +21,14 @@
%{
#include <stdio.h>
-#include "bfin-aux.h"
#include <stdarg.h>
#include <obstack.h>
+#include "bfin-aux.h" // opcode generating auxiliaries
+#include "libbfd.h"
+#include "elf/common.h"
+#include "elf/bfin.h"
+
#define DSP32ALU(aopcde, HL, dst1, dst0, src0, src1, s, x, aop) \
bfin_gen_dsp32alu (HL, aopcde, aop, s, x, dst0, dst1, src0, src1)
@@ -485,7 +489,8 @@
%token STATUS_REG
%token MNOP
%token SYMBOL NUMBER
-%token GOT AT PLTPC
+%token GOT GOT17M4 FUNCDESC_GOT17M4
+%token AT PLTPC
/* Types. */
%type <instr> asm
@@ -544,8 +549,8 @@
%type <expr> got
%type <expr> got_or_expr
%type <expr> pltpc
+%type <value> any_gotrel GOT GOT17M4 FUNCDESC_GOT17M4
-
/* Precedence rules. */
%left BAR
%left CARET
@@ -1221,24 +1226,21 @@
/* 7 bit immediate value if possible.
We will check for that constant value for efficiency
If it goes to reloc, it will be 16 bit. */
- if (IS_CONST ($3) && IS_IMM ($3, 7) && (IS_DREG ($1) || IS_PREG ($1)))
+ if (IS_CONST ($3) && IS_IMM ($3, 7) && IS_DREG ($1))
{
- /* if the expr is a relocation, generate it. */
- if (IS_DREG ($1) && IS_IMM ($3, 7))
- {
- notethat ("COMPI2opD: dregs = imm7 (x) \n");
- $$ = COMPI2OPD (&$1, imm7 ($3), 0);
- }
- else if (IS_PREG ($1) && IS_IMM ($3, 7))
- {
- notethat ("COMPI2opP: pregs = imm7 (x)\n");
- $$ = COMPI2OPP (&$1, imm7 ($3), 0);
- }
- else
- return yyerror ("Bad register or value for assigment");
+ notethat ("COMPI2opD: dregs = imm7 (x) \n");
+ $$ = COMPI2OPD (&$1, imm7 ($3), 0);
}
+ else if (IS_CONST ($3) && IS_IMM ($3, 7) && IS_PREG ($1))
+ {
+ notethat ("COMPI2opP: pregs = imm7 (x)\n");
+ $$ = COMPI2OPP (&$1, imm7 ($3), 0);
+ }
else
{
+ if (IS_CONST ($3) && !IS_IMM ($3, 16))
+ return yyerror ("Immediate value out of range");
+
notethat ("LDIMMhalf: regs = luimm16 (x)\n");
/* reg, H, S, Z. */
$$ = LDIMMHALF_R5 (&$1, 0, 1, 0, $3);
@@ -1248,6 +1250,10 @@
{
/* (z) There is no 7 bit zero extended instruction.
If the expr is a relocation, generate it. */
+
+ if (IS_CONST ($3) && !IS_UIMM ($3, 16))
+ return yyerror ("Immediate value out of range");
+
notethat ("LDIMMhalf: regs = luimm16 (x)\n");
/* reg, H, S, Z. */
$$ = LDIMMHALF_R5 (&$1, 0, 0, 1, $3);
@@ -4110,9 +4116,20 @@
}
;
-got: symbol AT GOT
+any_gotrel:
+ GOT
+ { $$ = BFD_RELOC_BFIN_GOT; }
+ | GOT17M4
+ { $$ = BFD_RELOC_BFIN_GOT17M4; }
+ | FUNCDESC_GOT17M4
+ { $$ = BFD_RELOC_BFIN_FUNCDESC_GOT17M4; }
+ ;
+
+got: symbol AT any_gotrel
{
- $$ = $1;
+ Expr_Node_Value val;
+ val.i_value = $3;
+ $$ = Expr_Node_Create (Expr_Node_GOT_Reloc, val, $1, NULL);
}
;
@@ -4232,7 +4249,7 @@
if ((v % mul) != 0)
{
- error ("%s:%d: Value Error -- Must align to %d\n", __LINE__, __FILE__, mul);
+ error ("%s:%d: Value Error -- Must align to %d\n", __FILE__, __LINE__, mul);
return 0;
}
@@ -4308,7 +4325,7 @@
break;
default:
- error ("%s:%d: Internal compiler error\n", __LINE__, __FILE__);
+ error ("%s:%d: Internal compiler error\n", __FILE__, __LINE__);
}
return x;
}
@@ -4335,7 +4352,7 @@
x->value.i_value = ~x->value.i_value;
break;
default:
- error ("%s:%d: Internal compiler error\n", __LINE__, __FILE__);
+ error ("%s:%d: Internal compiler error\n", __FILE__, __LINE__);
}
return x;
}
Modified: branches/binutils/package/gas/config/tc-arc.c
===================================================================
--- branches/binutils/package/gas/config/tc-arc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-arc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-arc.c -- Assembler for the ARC
- Copyright 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
Contributed by Doug Evans (dje at cygnus.com).
This file is part of GAS, the GNU Assembler.
@@ -246,7 +246,7 @@
output registers into the object file's symbol table. */
symbol_table_insert (symbol_create (arc_reg_names[i].name,
reg_section,
- (int) &arc_reg_names[i],
+ (valueT) &arc_reg_names[i],
&zero_address_frag));
}
@@ -550,7 +550,7 @@
if ((symbolP = symbol_find (name)))
{
if (S_GET_SEGMENT (symbolP) == reg_section)
- S_SET_VALUE (symbolP, (int) &ext_oper->operand);
+ S_SET_VALUE (symbolP, (valueT) &ext_oper->operand);
else
{
as_bad ("attempt to override symbol: %s", name);
@@ -564,7 +564,8 @@
{
/* If its not there, add it. */
symbol_table_insert (symbol_create (name, reg_section,
- (int) &ext_oper->operand, &zero_address_frag));
+ (valueT) &ext_oper->operand,
+ &zero_address_frag));
}
}
@@ -1165,7 +1166,7 @@
{
input_line_pointer += l + 1;
expressionP->X_op = O_register;
- expressionP->X_add_number = (int) &ext_oper->operand;
+ expressionP->X_add_number = (offsetT) &ext_oper->operand;
return;
}
ext_oper = ext_oper->next;
@@ -1177,7 +1178,7 @@
{
input_line_pointer += l + 1;
expressionP->X_op = O_register;
- expressionP->X_add_number = (int) &arc_reg_names[i];
+ expressionP->X_add_number = (offsetT) &arc_reg_names[i];
break;
}
}
Modified: branches/binutils/package/gas/config/tc-arm.c
===================================================================
--- branches/binutils/package/gas/config/tc-arm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-arm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -98,23 +98,12 @@
};
/* Types of processor to assemble for. */
-#define ARM_1 ARM_ARCH_V1
-#define ARM_2 ARM_ARCH_V2
-#define ARM_3 ARM_ARCH_V2S
-#define ARM_250 ARM_ARCH_V2S
-#define ARM_6 ARM_ARCH_V3
-#define ARM_7 ARM_ARCH_V3
-#define ARM_8 ARM_ARCH_V4
-#define ARM_9 ARM_ARCH_V4T
-#define ARM_STRONG ARM_ARCH_V4
-#define ARM_CPU_MASK 0x0000000f /* XXX? */
-
#ifndef CPU_DEFAULT
#if defined __XSCALE__
-#define CPU_DEFAULT (ARM_ARCH_XSCALE)
+#define CPU_DEFAULT ARM_ARCH_XSCALE
#else
#if defined __thumb__
-#define CPU_DEFAULT (ARM_ARCH_V5T)
+#define CPU_DEFAULT ARM_ARCH_V5T
#endif
#endif
#endif
@@ -139,9 +128,9 @@
#define streq(a, b) (strcmp (a, b) == 0)
-static unsigned long cpu_variant;
-static unsigned long arm_arch_used;
-static unsigned long thumb_arch_used;
+static arm_feature_set cpu_variant;
+static arm_feature_set arm_arch_used;
+static arm_feature_set thumb_arch_used;
/* Flags stored in private area of BFD structure. */
static int uses_apcs_26 = FALSE;
@@ -153,18 +142,74 @@
/* Variables that we set while parsing command-line options. Once all
options have been read we re-process these values to set the real
assembly flags. */
-static int legacy_cpu = -1;
-static int legacy_fpu = -1;
+static const arm_feature_set *legacy_cpu = NULL;
+static const arm_feature_set *legacy_fpu = NULL;
-static int mcpu_cpu_opt = -1;
-static int mcpu_fpu_opt = -1;
-static int march_cpu_opt = -1;
-static int march_fpu_opt = -1;
-static int mfpu_opt = -1;
+static const arm_feature_set *mcpu_cpu_opt = NULL;
+static const arm_feature_set *mcpu_fpu_opt = NULL;
+static const arm_feature_set *march_cpu_opt = NULL;
+static const arm_feature_set *march_fpu_opt = NULL;
+static const arm_feature_set *mfpu_opt = NULL;
+
+/* Constants for known architecture features. */
+static const arm_feature_set fpu_default = FPU_DEFAULT;
+static const arm_feature_set fpu_arch_vfp_v1 = FPU_ARCH_VFP_V1;
+static const arm_feature_set fpu_arch_vfp_v2 = FPU_ARCH_VFP_V2;
+static const arm_feature_set fpu_arch_fpa = FPU_ARCH_FPA;
+static const arm_feature_set fpu_any_hard = FPU_ANY_HARD;
+static const arm_feature_set fpu_arch_maverick = FPU_ARCH_MAVERICK;
+static const arm_feature_set fpu_endian_pure = FPU_ARCH_ENDIAN_PURE;
+
+#ifdef CPU_DEFAULT
+static const arm_feature_set cpu_default = CPU_DEFAULT;
+#endif
+
+static const arm_feature_set arm_ext_v1 = ARM_FEATURE (ARM_EXT_V1, 0);
+static const arm_feature_set arm_ext_v2 = ARM_FEATURE (ARM_EXT_V1, 0);
+static const arm_feature_set arm_ext_v2s = ARM_FEATURE (ARM_EXT_V2S, 0);
+static const arm_feature_set arm_ext_v3 = ARM_FEATURE (ARM_EXT_V3, 0);
+static const arm_feature_set arm_ext_v3m = ARM_FEATURE (ARM_EXT_V3M, 0);
+static const arm_feature_set arm_ext_v4 = ARM_FEATURE (ARM_EXT_V4, 0);
+static const arm_feature_set arm_ext_v4t = ARM_FEATURE (ARM_EXT_V4T, 0);
+static const arm_feature_set arm_ext_v5 = ARM_FEATURE (ARM_EXT_V5, 0);
+static const arm_feature_set arm_ext_v4t_5 =
+ ARM_FEATURE (ARM_EXT_V4T | ARM_EXT_V5, 0);
+static const arm_feature_set arm_ext_v5t = ARM_FEATURE (ARM_EXT_V5T, 0);
+static const arm_feature_set arm_ext_v5e = ARM_FEATURE (ARM_EXT_V5E, 0);
+static const arm_feature_set arm_ext_v5exp = ARM_FEATURE (ARM_EXT_V5ExP, 0);
+static const arm_feature_set arm_ext_v5j = ARM_FEATURE (ARM_EXT_V5J, 0);
+static const arm_feature_set arm_ext_v6 = ARM_FEATURE (ARM_EXT_V6, 0);
+static const arm_feature_set arm_ext_v6k = ARM_FEATURE (ARM_EXT_V6K, 0);
+static const arm_feature_set arm_ext_v6z = ARM_FEATURE (ARM_EXT_V6Z, 0);
+static const arm_feature_set arm_ext_v6t2 = ARM_FEATURE (ARM_EXT_V6T2, 0);
+static const arm_feature_set arm_ext_v6_notm = ARM_FEATURE (ARM_EXT_V6_NOTM, 0);
+static const arm_feature_set arm_ext_div = ARM_FEATURE (ARM_EXT_DIV, 0);
+static const arm_feature_set arm_ext_v7 = ARM_FEATURE (ARM_EXT_V7, 0);
+static const arm_feature_set arm_ext_v7a = ARM_FEATURE (ARM_EXT_V7A, 0);
+static const arm_feature_set arm_ext_v7r = ARM_FEATURE (ARM_EXT_V7R, 0);
+static const arm_feature_set arm_ext_v7m = ARM_FEATURE (ARM_EXT_V7M, 0);
+
+static const arm_feature_set arm_arch_any = ARM_ANY;
+static const arm_feature_set arm_arch_full = ARM_FEATURE (-1, -1);
+static const arm_feature_set arm_arch_t2 = ARM_ARCH_THUMB2;
+static const arm_feature_set arm_arch_none = ARM_ARCH_NONE;
+
+static const arm_feature_set arm_cext_iwmmxt =
+ ARM_FEATURE (0, ARM_CEXT_IWMMXT);
+static const arm_feature_set arm_cext_xscale =
+ ARM_FEATURE (0, ARM_CEXT_XSCALE);
+static const arm_feature_set arm_cext_maverick =
+ ARM_FEATURE (0, ARM_CEXT_MAVERICK);
+static const arm_feature_set fpu_fpa_ext_v1 = ARM_FEATURE (0, FPU_FPA_EXT_V1);
+static const arm_feature_set fpu_fpa_ext_v2 = ARM_FEATURE (0, FPU_FPA_EXT_V2);
+static const arm_feature_set fpu_vfp_ext_v1xd =
+ ARM_FEATURE (0, FPU_VFP_EXT_V1xD);
+static const arm_feature_set fpu_vfp_ext_v1 = ARM_FEATURE (0, FPU_VFP_EXT_V1);
+static const arm_feature_set fpu_vfp_ext_v2 = ARM_FEATURE (0, FPU_VFP_EXT_V2);
+
static int mfloat_abi_opt = -1;
-/* Record user cpu selection for object attributes.
- Zero if no default or user specified CPU. */
-static int selected_cpu = -1;
+/* Record user cpu selection for object attributes. */
+static arm_feature_set selected_cpu = ARM_ARCH_NONE;
/* Must be long enough to hold any of the names in arm_cpus. */
static char selected_cpu_name[16];
#ifdef OBJ_ELF
@@ -289,6 +334,12 @@
unsigned long field;
};
+struct asm_barrier_opt
+{
+ const char *template;
+ unsigned long value;
+};
+
/* The bit that distinguishes CPSR and SPSR. */
#define SPSR_BIT (1 << 22)
@@ -395,8 +446,8 @@
unsigned int tvalue;
/* Which architecture variant provides this instruction. */
- unsigned long avariant;
- unsigned long tvariant;
+ const arm_feature_set *avariant;
+ const arm_feature_set *tvariant;
/* Function to call to encode instruction in ARM format. */
void (* aencode) (void);
@@ -421,6 +472,9 @@
#define DATA_OP_SHIFT 21
+#define T2_OPCODE_MASK 0xfe1fffff
+#define T2_DATA_OP_SHIFT 21
+
/* Codes to distinguish the arithmetic instructions. */
#define OPCODE_AND 0
#define OPCODE_EOR 1
@@ -439,6 +493,17 @@
#define OPCODE_BIC 14
#define OPCODE_MVN 15
+#define T2_OPCODE_AND 0
+#define T2_OPCODE_BIC 1
+#define T2_OPCODE_ORR 2
+#define T2_OPCODE_ORN 3
+#define T2_OPCODE_EOR 4
+#define T2_OPCODE_ADD 8
+#define T2_OPCODE_ADC 10
+#define T2_OPCODE_SBC 11
+#define T2_OPCODE_SUB 13
+#define T2_OPCODE_RSB 14
+
#define T_OPCODE_MUL 0x4340
#define T_OPCODE_TST 0x4200
#define T_OPCODE_CMN 0x42c0
@@ -495,6 +560,7 @@
#define THUMB_SIZE 2 /* Size of thumb instruction. */
#define THUMB_PP_PC_LR 0x0100
#define THUMB_LOAD_BIT 0x0800
+#define THUMB2_LOAD_BIT 0x00100000
#define BAD_ARGS _("bad arguments to instruction")
#define BAD_PC _("r15 not allowed here")
@@ -503,13 +569,17 @@
#define BAD_HIREG _("lo register required")
#define BAD_THUMB32 _("instruction not supported in Thumb16 mode")
#define BAD_ADDR_MODE _("instruction does not accept this addressing mode");
+#define BAD_BRANCH _("branch must be last instruction in IT block")
+#define BAD_NOT_IT _("instruction not allowed in IT block")
static struct hash_control *arm_ops_hsh;
static struct hash_control *arm_cond_hsh;
static struct hash_control *arm_shift_hsh;
static struct hash_control *arm_psr_hsh;
+static struct hash_control *arm_v7m_psr_hsh;
static struct hash_control *arm_reg_hsh;
static struct hash_control *arm_reloc_hsh;
+static struct hash_control *arm_barrier_opt_hsh;
/* Stuff needed to resolve the label ambiguity
As:
@@ -770,7 +840,7 @@
}
else
{
- if (cpu_variant & FPU_ARCH_VFP)
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, fpu_endian_pure))
for (i = prec - 1; i >= 0; i--)
{
md_number_to_chars (litP, (valueT) words[i], 2);
@@ -889,7 +959,7 @@
case REG_TYPE_MVFX:
case REG_TYPE_MVDX:
/* Generic coprocessor register names are allowed for these. */
- if (reg->type == REG_TYPE_CN)
+ if (reg && reg->type == REG_TYPE_CN)
return reg->number;
break;
@@ -904,7 +974,7 @@
case REG_TYPE_MMXWC:
/* WC includes WCG. ??? I'm not sure this is true for all
instructions that take WC registers. */
- if (reg->type == REG_TYPE_MMXWCG)
+ if (reg && reg->type == REG_TYPE_MMXWCG)
return reg->number;
break;
@@ -1453,7 +1523,7 @@
case 16:
if (! thumb_mode)
{
- if (! (cpu_variant & ARM_EXT_V4T))
+ if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v4t))
as_bad (_("selected processor does not support THUMB opcodes"));
thumb_mode = 1;
@@ -1467,7 +1537,7 @@
case 32:
if (thumb_mode)
{
- if ((cpu_variant & ARM_ALL) == ARM_EXT_V4T)
+ if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1))
as_bad (_("selected processor does not support ARM opcodes"));
thumb_mode = 0;
@@ -3428,28 +3498,35 @@
{
char *p;
unsigned long psr_field;
+ const struct asm_psr *psr;
+ char *start;
/* CPSR's and SPSR's can now be lowercase. This is just a convenience
feature for ease of use and backwards compatibility. */
p = *str;
- if (*p == 's' || *p == 'S')
+ if (strncasecmp (p, "SPSR", 4) == 0)
psr_field = SPSR_BIT;
- else if (*p == 'c' || *p == 'C')
+ else if (strncasecmp (p, "CPSR", 4) == 0)
psr_field = 0;
else
- goto error;
+ {
+ start = p;
+ do
+ p++;
+ while (ISALNUM (*p) || *p == '_');
- p++;
- if (strncasecmp (p, "PSR", 3) != 0)
- goto error;
- p += 3;
+ psr = hash_find_n (arm_v7m_psr_hsh, start, p - start);
+ if (!psr)
+ return FAIL;
+ *str = p;
+ return psr->field;
+ }
+
+ p += 4;
if (*p == '_')
{
/* A suffix follows. */
- const struct asm_psr *psr;
- char *start;
-
p++;
start = p;
@@ -3600,6 +3677,26 @@
return c->value;
}
+/* Parse an option for a barrier instruction. Returns the encoding for the
+ option, or FAIL. */
+static int
+parse_barrier (char **str)
+{
+ char *p, *q;
+ const struct asm_barrier_opt *o;
+
+ p = q = *str;
+ while (ISALPHA (*q))
+ q++;
+
+ o = hash_find_n (arm_barrier_opt_hsh, p, q - p);
+ if (!o)
+ return FAIL;
+
+ *str = q;
+ return o->value;
+}
+
/* Parse the operands of a table branch instruction. Similar to a memory
operand. */
static int
@@ -3609,7 +3706,10 @@
int reg;
if (skip_past_char (&p, '[') == FAIL)
- return FAIL;
+ {
+ inst.error = _("'[' expected");
+ return FAIL;
+ }
if ((reg = arm_reg_parse (&p, REG_TYPE_RN)) == FAIL)
{
@@ -3619,7 +3719,10 @@
inst.operands[0].reg = reg;
if (skip_past_comma (&p) == FAIL)
- return FAIL;
+ {
+ inst.error = _("',' expected");
+ return FAIL;
+ }
if ((reg = arm_reg_parse (&p, REG_TYPE_RN)) == FAIL)
{
@@ -3724,6 +3827,7 @@
OP_oSHar, /* ASR immediate */
OP_oSHllar, /* LSL or ASR immediate */
OP_oROR, /* ROR 0/8/16/24 */
+ OP_oBARRIER, /* Option argument for a barrier instruction. */
OP_FIRST_OPTIONAL = OP_oI7b
};
@@ -3945,6 +4049,7 @@
case OP_oROR: val = parse_ror (&str); break;
case OP_PSR: val = parse_psr (&str); break;
case OP_COND: val = parse_cond (&str); break;
+ case OP_oBARRIER:val = parse_barrier (&str); break;
case OP_TB:
po_misc_or_fail (parse_tb (&str));
@@ -4012,6 +4117,7 @@
case OP_oROR:
case OP_PSR:
case OP_COND:
+ case OP_oBARRIER:
case OP_REGLST:
case OP_VRSLST:
case OP_VRDLST:
@@ -4033,7 +4139,13 @@
failure:
if (!backtrack_pos)
- return FAIL;
+ {
+ /* The parse routine should already have set inst.error, but set a
+ defaut here just in case. */
+ if (!inst.error)
+ inst.error = _("syntax error");
+ return FAIL;
+ }
/* Do not backtrack over a trailing optional argument that
absorbed some text. We will only fail again, with the
@@ -4041,7 +4153,11 @@
probably less helpful than the current one. */
if (backtrack_index == i && backtrack_pos != str
&& upat[i+1] == OP_stop)
- return FAIL;
+ {
+ if (!inst.error)
+ inst.error = _("syntax error");
+ return FAIL;
+ }
/* Try again, skipping the optional argument at backtrack_pos. */
str = backtrack_pos;
@@ -4344,7 +4460,14 @@
static int
move_or_literal_pool (int i, bfd_boolean thumb_p, bfd_boolean mode_3)
{
- if ((inst.instruction & (thumb_p ? THUMB_LOAD_BIT : LOAD_BIT)) == 0)
+ unsigned long tbit;
+
+ if (thumb_p)
+ tbit = (inst.instruction > 0xffff) ? THUMB2_LOAD_BIT : THUMB_LOAD_BIT;
+ else
+ tbit = LOAD_BIT;
+
+ if ((inst.instruction & tbit) == 0)
{
inst.error = _("invalid pseudo operation");
return 1;
@@ -4358,7 +4481,7 @@
{
if (thumb_p)
{
- if ((inst.reloc.exp.X_add_number & ~0xFF) == 0)
+ if (!unified_syntax && (inst.reloc.exp.X_add_number & ~0xFF) == 0)
{
/* This can be done with a mov(1) instruction. */
inst.instruction = T_OPCODE_MOV_I8 | (inst.operands[i].reg << 8);
@@ -4533,6 +4656,20 @@
}
static void
+do_barrier (void)
+{
+ if (inst.operands[0].present)
+ {
+ constraint ((inst.instruction & 0xf0) != 0x40
+ && inst.operands[0].imm != 0xf,
+ "bad barrier type");
+ inst.instruction |= inst.operands[0].imm;
+ }
+ else
+ inst.instruction |= 0xf;
+}
+
+static void
do_bfc (void)
{
unsigned int msb = inst.operands[1].imm + inst.operands[2].imm;
@@ -4761,6 +4898,12 @@
}
static void
+do_dbg (void)
+{
+ inst.instruction |= inst.operands[0].imm;
+}
+
+static void
do_it (void)
{
/* There is no IT instruction in ARM mode. We
@@ -5128,11 +5271,26 @@
_("writeback used in preload instruction"));
constraint (!inst.operands[0].preind,
_("unindexed addressing used in preload instruction"));
- inst.instruction |= inst.operands[0].reg;
encode_arm_addr_mode_2 (0, /*is_t=*/FALSE);
}
+/* ARMv7: PLI <addr_mode> */
static void
+do_pli (void)
+{
+ constraint (!inst.operands[0].isreg,
+ _("'[' expected after PLI mnemonic"));
+ constraint (inst.operands[0].postind,
+ _("post-indexed expression used in preload instruction"));
+ constraint (inst.operands[0].writeback,
+ _("writeback used in preload instruction"));
+ constraint (!inst.operands[0].preind,
+ _("unindexed addressing used in preload instruction"));
+ encode_arm_addr_mode_2 (0, /*is_t=*/FALSE);
+ inst.instruction &= ~PRE_INDEX;
+}
+
+static void
do_push_pop (void)
{
inst.operands[1] = inst.operands[0];
@@ -5225,8 +5383,6 @@
inst.instruction |= Rm;
if (inst.operands[2].isreg) /* Rd, {Rm,} Rs */
{
- constraint (inst.operands[0].reg != Rm,
- _("source1 and dest must be same register"));
inst.instruction |= inst.operands[2].reg << 8;
inst.instruction |= SHIFT_BY_REG;
}
@@ -5833,7 +5989,7 @@
bfd_boolean is_pc = (inst.operands[i].reg == REG_PC);
constraint (!inst.operands[i].isreg,
- _("Thumb does not support the ldr =N pseudo-operation"));
+ _("Instruction does not support =N addresses"));
inst.instruction |= inst.operands[i].reg << 16;
if (inst.operands[i].immisreg)
@@ -5849,7 +6005,7 @@
constraint (inst.operands[i].shifted && inst.operands[i].shift_kind != SHIFT_LSL,
_("Thumb supports only LSL in shifted register indexing"));
- inst.instruction |= inst.operands[1].imm;
+ inst.instruction |= inst.operands[i].imm;
if (inst.operands[i].shifted)
{
constraint (inst.reloc.exp.X_op != O_constant,
@@ -5865,7 +6021,7 @@
{
constraint (is_pc && inst.operands[i].writeback,
_("cannot use writeback with PC-relative addressing"));
- constraint (is_t && inst.operands[1].writeback,
+ constraint (is_t && inst.operands[i].writeback,
_("cannot use writeback with this instruction"));
if (is_d)
@@ -6395,6 +6551,20 @@
}
static void
+do_t_barrier (void)
+{
+ if (inst.operands[0].present)
+ {
+ constraint ((inst.instruction & 0xf0) != 0x40
+ && inst.operands[0].imm != 0xf,
+ "bad barrier type");
+ inst.instruction |= inst.operands[0].imm;
+ }
+ else
+ inst.instruction |= 0xf;
+}
+
+static void
do_t_bfc (void)
{
unsigned int msb = inst.operands[1].imm + inst.operands[2].imm;
@@ -6453,6 +6623,7 @@
static void
do_t_blx (void)
{
+ constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH);
if (inst.operands[0].isreg)
/* We have a register, so this is BLX(2). */
inst.instruction |= inst.operands[0].reg << 3;
@@ -6474,7 +6645,20 @@
do_t_branch (void)
{
int opcode;
- if (inst.cond != COND_ALWAYS)
+ int cond;
+
+ if (current_it_mask)
+ {
+ /* Conditional branches inside IT blocks are encoded as unconditional
+ branches. */
+ cond = COND_ALWAYS;
+ /* A branch must be the last instruction in an IT block. */
+ constraint (current_it_mask != 0x10, BAD_BRANCH);
+ }
+ else
+ cond = inst.cond;
+
+ if (cond != COND_ALWAYS)
opcode = T_MNEM_bcond;
else
opcode = inst.instruction;
@@ -6482,23 +6666,23 @@
if (unified_syntax && inst.size_req == 4)
{
inst.instruction = THUMB_OP32(opcode);
- if (inst.cond == COND_ALWAYS)
+ if (cond == COND_ALWAYS)
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH25;
else
{
- assert (inst.cond != 0xF);
- inst.instruction |= inst.cond << 22;
+ assert (cond != 0xF);
+ inst.instruction |= cond << 22;
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH20;
}
}
else
{
inst.instruction = THUMB_OP16(opcode);
- if (inst.cond == COND_ALWAYS)
+ if (cond == COND_ALWAYS)
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH12;
else
{
- inst.instruction |= inst.cond << 8;
+ inst.instruction |= cond << 8;
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH9;
}
/* Allow section relaxation. */
@@ -6512,6 +6696,8 @@
static void
do_t_bkpt (void)
{
+ constraint (inst.cond != COND_ALWAYS,
+ _("instruction is always unconditional"));
if (inst.operands[0].present)
{
constraint (inst.operands[0].imm > 255,
@@ -6523,6 +6709,7 @@
static void
do_t_branch23 (void)
{
+ constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH);
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH23;
inst.reloc.pc_rel = 1;
@@ -6541,6 +6728,7 @@
static void
do_t_bx (void)
{
+ constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH);
inst.instruction |= inst.operands[0].reg << 3;
/* ??? FIXME: Should add a hacky reloc here if reg is REG_PC. The reloc
should cause the alignment to be checked once it is known. This is
@@ -6550,6 +6738,7 @@
static void
do_t_bxj (void)
{
+ constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH);
if (inst.operands[0].reg == REG_PC)
as_tsktsk (_("use of r15 in bxj is not really useful"));
@@ -6565,10 +6754,19 @@
}
static void
+do_t_cps (void)
+{
+ constraint (current_it_mask, BAD_NOT_IT);
+ inst.instruction |= inst.operands[0].imm;
+}
+
+static void
do_t_cpsi (void)
{
+ constraint (current_it_mask, BAD_NOT_IT);
if (unified_syntax
- && (inst.operands[1].present || inst.size_req == 4))
+ && (inst.operands[1].present || inst.size_req == 4)
+ && ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6_notm))
{
unsigned int imod = (inst.instruction & 0x0030) >> 4;
inst.instruction = 0xf3af8000;
@@ -6579,7 +6777,11 @@
}
else
{
- constraint (inst.operands[1].present,
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1)
+ && (inst.operands[0].imm & 4),
+ _("selected processor does not support 'A' form "
+ "of this instruction"));
+ constraint (inst.operands[1].present || inst.size_req == 4,
_("Thumb does not support the 2-argument "
"form of this instruction"));
inst.instruction |= inst.operands[0].imm;
@@ -6608,6 +6810,7 @@
static void
do_t_czb (void)
{
+ constraint (current_it_mask, BAD_NOT_IT);
constraint (inst.operands[0].reg > 7, BAD_HIREG);
inst.instruction |= inst.operands[0].reg;
inst.reloc.pc_rel = 1;
@@ -6615,6 +6818,22 @@
}
static void
+do_t_dbg (void)
+{
+ inst.instruction |= inst.operands[0].imm;
+}
+
+static void
+do_t_div (void)
+{
+ if (!inst.operands[1].present)
+ inst.operands[1].reg = inst.operands[0].reg;
+ inst.instruction |= inst.operands[0].reg << 8;
+ inst.instruction |= inst.operands[1].reg << 16;
+ inst.instruction |= inst.operands[2].reg;
+}
+
+static void
do_t_hint (void)
{
if (unified_syntax && inst.size_req == 4)
@@ -6628,6 +6847,7 @@
{
unsigned int cond = inst.operands[0].imm;
+ constraint (current_it_mask, BAD_NOT_IT);
current_it_mask = (inst.instruction & 0xf) | 0x10;
current_cc = cond;
@@ -6783,6 +7003,13 @@
opcode = inst.instruction;
if (unified_syntax)
{
+ if (!inst.operands[1].isreg)
+ {
+ if (opcode <= 0xffff)
+ inst.instruction = THUMB_OP32 (opcode);
+ if (move_or_literal_pool (0, /*thumb_p=*/TRUE, /*mode_3=*/FALSE))
+ return;
+ }
if (inst.operands[1].isreg
&& !inst.operands[1].writeback
&& !inst.operands[1].shifted && !inst.operands[1].postind
@@ -7161,21 +7388,53 @@
static void
do_t_mrs (void)
{
- /* mrs only accepts CPSR/SPSR/CPSR_all/SPSR_all. */
- constraint ((inst.operands[1].imm & (PSR_c|PSR_x|PSR_s|PSR_f))
- != (PSR_c|PSR_f),
- _("'CPSR' or 'SPSR' expected"));
+ int flags;
+ flags = inst.operands[1].imm & (PSR_c|PSR_x|PSR_s|PSR_f|SPSR_BIT);
+ if (flags == 0)
+ {
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7m),
+ _("selected processor does not support "
+ "requested special purpose register"));
+ }
+ else
+ {
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1),
+ _("selected processor does not support "
+ "requested special purpose register %x"));
+ /* mrs only accepts CPSR/SPSR/CPSR_all/SPSR_all. */
+ constraint ((flags & ~SPSR_BIT) != (PSR_c|PSR_f),
+ _("'CPSR' or 'SPSR' expected"));
+ }
+
inst.instruction |= inst.operands[0].reg << 8;
- inst.instruction |= (inst.operands[1].imm & SPSR_BIT) >> 2;
+ inst.instruction |= (flags & SPSR_BIT) >> 2;
+ inst.instruction |= inst.operands[1].imm & 0xff;
}
static void
do_t_msr (void)
{
+ int flags;
+
constraint (!inst.operands[1].isreg,
_("Thumb encoding does not support an immediate here"));
- inst.instruction |= (inst.operands[0].imm & SPSR_BIT) >> 2;
- inst.instruction |= (inst.operands[0].imm & ~SPSR_BIT) >> 8;
+ flags = inst.operands[0].imm;
+ if (flags & ~0xff)
+ {
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1),
+ _("selected processor does not support "
+ "requested special purpose register"));
+ }
+ else
+ {
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7m),
+ _("selected processor does not support "
+ "requested special purpose register"));
+ flags |= PSR_f;
+ }
+ inst.instruction |= (flags & SPSR_BIT) >> 2;
+ inst.instruction |= (flags & ~SPSR_BIT) >> 8;
+ inst.instruction |= (flags & 0xff);
inst.instruction |= inst.operands[1].reg << 16;
}
@@ -7430,6 +7689,7 @@
static void
do_t_setend (void)
{
+ constraint (current_it_mask, BAD_NOT_IT);
if (inst.operands[0].imm)
inst.instruction |= 0x8;
}
@@ -7698,12 +7958,13 @@
int half;
half = (inst.instruction & 0x10) != 0;
+ constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH);
+ constraint (inst.operands[0].immisreg,
+ _("instruction requires register index"));
constraint (inst.operands[0].imm == 15,
_("PC is not a valid index register"));
constraint (!half && inst.operands[0].shifted,
_("instruction does not allow shifted index"));
- constraint (half && !inst.operands[0].shifted,
- _("instruction requires shifted index"));
inst.instruction |= (inst.operands[0].reg << 16) | inst.operands[0].imm;
}
@@ -7785,6 +8046,12 @@
symbolS *sym;
int offset;
+#ifdef OBJ_ELF
+ /* The size of the instruction is unknown, so tie the debug info to the
+ start of the instruction. */
+ dwarf2_emit_insn (0);
+#endif
+
switch (inst.reloc.exp.X_op)
{
case O_symbol:
@@ -7803,10 +8070,6 @@
to = frag_var (rs_machine_dependent, INSN_SIZE, THUMB_SIZE,
inst.relax, sym, offset, NULL/*offset, opcode*/);
md_number_to_chars (to, inst.instruction, THUMB_SIZE);
-
-#ifdef OBJ_ELF
- dwarf2_emit_insn (INSN_SIZE);
-#endif
}
/* Write a 32-bit thumb instruction to buf. */
@@ -8026,9 +8289,16 @@
case OT_unconditional:
case OT_unconditionalF:
- /* delayed diagnostic */
- inst.error = BAD_COND;
- inst.cond = COND_ALWAYS;
+ if (thumb_mode)
+ {
+ inst.cond = cond->value;
+ }
+ else
+ {
+ /* delayed diagnostic */
+ inst.error = BAD_COND;
+ inst.cond = COND_ALWAYS;
+ }
return opcode;
default:
@@ -8097,14 +8367,16 @@
if (thumb_mode)
{
- unsigned long variant;
+ arm_feature_set variant;
variant = cpu_variant;
/* Only allow coprocessor instructions on Thumb-2 capable devices. */
- if ((variant & ARM_EXT_V6T2) == 0)
- variant &= ARM_ANY;
+ if (!ARM_CPU_HAS_FEATURE (variant, arm_arch_t2))
+ ARM_CLEAR_FEATURE (variant, variant, fpu_any_hard);
/* Check that this instruction is supported for this CPU. */
- if (thumb_mode == 1 && (opcode->tvariant & variant) == 0)
+ if (!opcode->tvariant
+ || (thumb_mode == 1
+ && !ARM_CPU_HAS_FEATURE (variant, *opcode->tvariant)))
{
as_bad (_("selected processor does not support `%s'"), str);
return;
@@ -8121,13 +8393,15 @@
{
int cond;
cond = current_cc ^ ((current_it_mask >> 4) & 1) ^ 1;
- if (cond != inst.cond)
+ current_it_mask <<= 1;
+ current_it_mask &= 0x1f;
+ /* The BKPT instruction is unconditional even in an IT block. */
+ if (!inst.error
+ && cond != inst.cond && opcode->tencode != do_t_bkpt)
{
as_bad (_("incorrect condition in IT block"));
return;
}
- current_it_mask <<= 1;
- current_it_mask &= 0x1f;
}
else if (inst.cond != COND_ALWAYS && opcode->tencode != do_t_branch)
{
@@ -8155,19 +8429,22 @@
return;
}
}
- thumb_arch_used |= opcode->tvariant;
+ ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
+ *opcode->tvariant);
/* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly
- set those bits when Thumb-2 32-bit instuctions are seen. ie.
+ set those bits when Thumb-2 32-bit instuctions are seen. ie.
anything other than bl/blx.
This is overly pessimistic for relaxable instructions. */
if ((inst.size == 4 && (inst.instruction & 0xf800e800) != 0xf000e800)
|| inst.relax)
- thumb_arch_used |= ARM_EXT_V6T2;
+ ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
+ arm_ext_v6t2);
}
else
{
/* Check that this instruction is supported for this CPU. */
- if ((opcode->avariant & cpu_variant) == 0)
+ if (!opcode->avariant ||
+ !ARM_CPU_HAS_FEATURE (cpu_variant, *opcode->avariant))
{
as_bad (_("selected processor does not support `%s'"), str);
return;
@@ -8189,10 +8466,12 @@
opcode->aencode ();
/* Arm mode bx is marked as both v4T and v5 because it's still required
on a hypothetical non-thumb v5 core. */
- if (opcode->avariant == (ARM_EXT_V4T | ARM_EXT_V5))
- arm_arch_used |= ARM_EXT_V4T;
+ if (ARM_CPU_HAS_FEATURE (*opcode->avariant, arm_ext_v4t)
+ || ARM_CPU_HAS_FEATURE (*opcode->avariant, arm_ext_v5))
+ ARM_MERGE_FEATURE_SETS (arm_arch_used, arm_arch_used, arm_ext_v4t);
else
- arm_arch_used |= opcode->avariant;
+ ARM_MERGE_FEATURE_SETS (arm_arch_used, arm_arch_used,
+ *opcode->avariant);
}
output_inst (str);
}
@@ -8471,6 +8750,25 @@
{"cxsf", PSR_c | PSR_x | PSR_s | PSR_f},
};
+/* Table of V7M psr names. */
+static const struct asm_psr v7m_psrs[] =
+{
+ {"apsr", 0 },
+ {"iapsr", 1 },
+ {"eapsr", 2 },
+ {"psr", 3 },
+ {"ipsr", 5 },
+ {"epsr", 6 },
+ {"iepsr", 7 },
+ {"msp", 8 },
+ {"psp", 9 },
+ {"primask", 16},
+ {"basepri", 17},
+ {"basepri_max", 18},
+ {"faultmask", 19},
+ {"control", 20}
+};
+
/* Table of all shift-in-operand names. */
static const struct asm_shift_name shift_names [] =
{
@@ -8520,6 +8818,14 @@
{"al", 0xe}
};
+static struct asm_barrier_opt barrier_opt_names[] =
+{
+ { "sy", 0xf },
+ { "un", 0x7 },
+ { "st", 0xe },
+ { "unst", 0x6 }
+};
+
/* Table of ARM-format instructions. */
/* Macros for gluing together operand strings. N.B. In all cases
@@ -8591,7 +8897,8 @@
TxCM(m1,m2, aop, T_MNEM_##top, nops, ops, ae, te)
/* Mnemonic that cannot be conditionalized. The ARM condition-code
- field is still 0xE. */
+ field is still 0xE. Many of the Thumb variants can be executed
+ conditionally, so this is checked separately. */
#define TUE(mnem, op, top, nops, ops, ae, te) \
{ #mnem, OPS##nops ops, OT_unconditional, 0x##op, 0x##top, ARM_VARIANT, \
THUMB_VARIANT, do_##ae, do_##te }
@@ -8671,8 +8978,8 @@
static const struct asm_opcode insns[] =
{
-#define ARM_VARIANT ARM_EXT_V1 /* Core ARM Instructions. */
-#define THUMB_VARIANT ARM_EXT_V4T
+#define ARM_VARIANT &arm_ext_v1 /* Core ARM Instructions. */
+#define THUMB_VARIANT &arm_ext_v4t
tCE(and, 0000000, and, 3, (RR, oRR, SH), arit, t_arit3c),
tC3(ands, 0100000, ands, 3, (RR, oRR, SH), arit, t_arit3c),
tCE(eor, 0200000, eor, 3, (RR, oRR, SH), arit, t_arit3c),
@@ -8713,12 +9020,15 @@
tCE(str, 4000000, str, 2, (RR, ADDR), ldst, t_ldst),
tC3(strb, 4400000, strb, 2, (RR, ADDR), ldst, t_ldst),
+ tCE(stm, 8800000, stmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
tC3(stmia, 8800000, stmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
tC3(stmea, 8800000, stmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
+ tCE(ldm, 8900000, ldmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
tC3(ldmia, 8900000, ldmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
tC3(ldmfd, 8900000, ldmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TCE(swi, f000000, df00, 1, (EXPi), swi, t_swi),
+ TCE(svc, f000000, df00, 1, (EXPi), swi, t_swi),
tCE(b, a000000, b, 1, (EXPr), branch, t_branch),
TCE(bl, b000000, f000f800, 1, (EXPr), bl, t_branch23),
@@ -8742,12 +9052,12 @@
tCE(pop, 8bd0000, pop, 1, (REGLST), push_pop, t_push_pop),
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6
+#define THUMB_VARIANT &arm_ext_v6
TCE(cpy, 1a00000, 4600, 2, (RR, RR), rd_rm, t_cpy),
/* V1 instructions with no Thumb analogue prior to V6T2. */
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6T2
+#define THUMB_VARIANT &arm_ext_v6t2
TCE(rsb, 0600000, ebc00000, 3, (RR, oRR, SH), arit, t_rsb),
TC3(rsbs, 0700000, ebd00000, 3, (RR, oRR, SH), arit, t_rsb),
TCE(teq, 1300000, ea900f00, 2, (RR, SH), cmp, t_mvn_tst),
@@ -8755,9 +9065,9 @@
CL(teqp, 130f000, 2, (RR, SH), cmp),
TC3(ldrt, 4300000, f8500e00, 2, (RR, ADDR), ldstt, t_ldstt),
- TC3(ldrbt, 4700000, f8300e00, 2, (RR, ADDR), ldstt, t_ldstt),
+ TC3(ldrbt, 4700000, f8100e00, 2, (RR, ADDR), ldstt, t_ldstt),
TC3(strt, 4200000, f8400e00, 2, (RR, ADDR), ldstt, t_ldstt),
- TC3(strbt, 4600000, f8200e00, 2, (RR, ADDR), ldstt, t_ldstt),
+ TC3(strbt, 4600000, f8000e00, 2, (RR, ADDR), ldstt, t_ldstt),
TC3(stmdb, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(stmfd, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
@@ -8779,14 +9089,14 @@
C3(ldmfa, 8100000, 2, (RRw, REGLST), ldmstm),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V2 /* ARM 2 - multiplies. */
+#define ARM_VARIANT &arm_ext_v2 /* ARM 2 - multiplies. */
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V4T
+#define THUMB_VARIANT &arm_ext_v4t
tCE(mul, 0000090, mul, 3, (RRnpc, RRnpc, oRR), mul, t_mul),
tC3(muls, 0100090, muls, 3, (RRnpc, RRnpc, oRR), mul, t_mul),
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6T2
+#define THUMB_VARIANT &arm_ext_v6t2
TCE(mla, 0200090, fb000000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas, t_mla),
C3(mlas, 0300090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas),
@@ -8800,17 +9110,17 @@
TCE(mrc, e100010, ee100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V2S /* ARM 3 - swp instructions. */
+#define ARM_VARIANT &arm_ext_v2s /* ARM 3 - swp instructions. */
CE(swp, 1000090, 3, (RRnpc, RRnpc, RRnpcb), rd_rm_rn),
C3(swpb, 1400090, 3, (RRnpc, RRnpc, RRnpcb), rd_rm_rn),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V3 /* ARM 6 Status register instructions. */
+#define ARM_VARIANT &arm_ext_v3 /* ARM 6 Status register instructions. */
TCE(mrs, 10f0000, f3ef8000, 2, (RR, PSR), mrs, t_mrs),
TCE(msr, 120f000, f3808000, 2, (PSR, RR_EXi), msr, t_msr),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V3M /* ARM 7M long multiplies. */
+#define ARM_VARIANT &arm_ext_v3m /* ARM 7M long multiplies. */
TCE(smull, 0c00090, fb800000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
CM(smull,s, 0d00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
TCE(umull, 0800090, fba00000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
@@ -8821,9 +9131,9 @@
CM(umlal,s, 0b00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V4 /* ARM Architecture 4. */
+#define ARM_VARIANT &arm_ext_v4 /* ARM Architecture 4. */
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V4T
+#define THUMB_VARIANT &arm_ext_v4t
tC3(ldrh, 01000b0, ldrh, 2, (RR, ADDR), ldstv4, t_ldst),
tC3(strh, 00000b0, strh, 2, (RR, ADDR), ldstv4, t_ldst),
tC3(ldrsh, 01000f0, ldrsh, 2, (RR, ADDR), ldstv4, t_ldst),
@@ -8832,23 +9142,23 @@
tCM(ld,sb, 01000d0, ldrsb, 2, (RR, ADDR), ldstv4, t_ldst),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V4T|ARM_EXT_V5
+#define ARM_VARIANT &arm_ext_v4t_5
/* ARM Architecture 4T. */
/* Note: bx (and blx) are required on V5, even if the processor does
not support Thumb. */
TCE(bx, 12fff10, 4700, 1, (RR), bx, t_bx),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V5 /* ARM Architecture 5T. */
+#define ARM_VARIANT &arm_ext_v5 /* ARM Architecture 5T. */
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V5T
+#define THUMB_VARIANT &arm_ext_v5t
/* Note: blx has 2 variants; the .value coded here is for
BLX(2). Only this variant has conditional execution. */
TCE(blx, 12fff30, 4780, 1, (RR_EXr), blx, t_blx),
TUE(bkpt, 1200070, be00, 1, (oIffffb), bkpt, t_bkpt),
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6T2
+#define THUMB_VARIANT &arm_ext_v6t2
TCE(clz, 16f0f10, fab0f080, 2, (RRnpc, RRnpc), rd_rm, t_clz),
TUF(ldc2, c100000, fc100000, 3, (RCP, RCN, ADDR), lstc, lstc),
TUF(ldc2l, c500000, fc500000, 3, (RCP, RCN, ADDR), lstc, lstc),
@@ -8859,7 +9169,7 @@
TUF(mrc2, e100010, fe100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V5ExP /* ARM Architecture 5TExP. */
+#define ARM_VARIANT &arm_ext_v5exp /* ARM Architecture 5TExP. */
TCE(smlabb, 1000080, fb100000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
TCE(smlatb, 10000a0, fb100020, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
TCE(smlabt, 10000c0, fb100010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
@@ -8887,7 +9197,7 @@
TCE(qdsub, 1600050, fa80f0b0, 3, (RRnpc, RRnpc, RRnpc), rd_rm_rn, rd_rm_rn),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V5E /* ARM Architecture 5TE. */
+#define ARM_VARIANT &arm_ext_v5e /* ARM Architecture 5TE. */
TUF(pld, 450f000, f810f000, 1, (ADDR), pld, t_pld),
TC3(ldrd, 00000d0, e9500000, 3, (RRnpc, oRRnpc, ADDR), ldrd, t_ldstd),
TC3(strd, 00000f0, e9400000, 3, (RRnpc, oRRnpc, ADDR), ldrd, t_ldstd),
@@ -8896,13 +9206,13 @@
TCE(mrrc, c500000, ec500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V5J /* ARM Architecture 5TEJ. */
+#define ARM_VARIANT &arm_ext_v5j /* ARM Architecture 5TEJ. */
TCE(bxj, 12fff20, f3c08f00, 1, (RR), bxj, t_bxj),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V6 /* ARM V6. */
+#define ARM_VARIANT &arm_ext_v6 /* ARM V6. */
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6
+#define THUMB_VARIANT &arm_ext_v6
TUF(cpsie, 1080000, b660, 2, (CPSF, oI31b), cpsi, t_cpsi),
TUF(cpsid, 10c0000, b670, 2, (CPSF, oI31b), cpsi, t_cpsi),
tCE(rev, 6bf0f30, rev, 2, (RRnpc, RRnpc), rd_rm, t_rev),
@@ -8915,11 +9225,18 @@
TUF(setend, 1010000, b650, 1, (ENDI), setend, t_setend),
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6T2
- TUF(cps, 1020000, f3af8100, 1, (I31b), imm0, imm0),
+#define THUMB_VARIANT &arm_ext_v6t2
TCE(ldrex, 1900f9f, e8500f00, 2, (RRnpc, ADDR), ldrex, t_ldrex),
TUF(mcrr2, c400000, fc400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
TUF(mrrc2, c500000, fc500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
+
+ TCE(ssat, 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
+ TCE(usat, 6e00010, f3800000, 4, (RRnpc, I31, RRnpc, oSHllar),usat, t_usat),
+
+/* ARM V6 not included in V7M (eg. integer SIMD). */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_v6_notm
+ TUF(cps, 1020000, f3af8100, 1, (I31b), imm0, t_cps),
TCE(pkhbt, 6800010, eac00000, 4, (RRnpc, RRnpc, RRnpc, oSHll), pkhbt, t_pkhbt),
TCE(pkhtb, 6800050, eac00020, 4, (RRnpc, RRnpc, RRnpc, oSHar), pkhtb, t_pkhtb),
TCE(qadd16, 6200f10, fa90f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
@@ -8997,40 +9314,41 @@
UF(srsib, 9cd0500, 1, (I31w), srs),
UF(srsda, 84d0500, 1, (I31w), srs),
TUF(srsdb, 94d0500, e800c000, 1, (I31w), srs, srs),
- TCE(ssat, 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
TCE(ssat16, 6a00f30, f3200000, 3, (RRnpc, I16, RRnpc), ssat16, t_ssat16),
TCE(strex, 1800f90, e8400000, 3, (RRnpc, RRnpc, ADDR), strex, t_strex),
TCE(umaal, 0400090, fbe00060, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal, t_mlal),
TCE(usad8, 780f010, fb70f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
TCE(usada8, 7800010, fb700000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
- TCE(usat, 6e00010, f3800000, 4, (RRnpc, I31, RRnpc, oSHllar),usat, t_usat),
TCE(usat16, 6e00f30, f3a00000, 3, (RRnpc, I15, RRnpc), usat16, t_usat16),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V6K
+#define ARM_VARIANT &arm_ext_v6k
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6K
+#define THUMB_VARIANT &arm_ext_v6k
tCE(yield, 320f001, yield, 0, (), noargs, t_hint),
tCE(wfe, 320f002, wfe, 0, (), noargs, t_hint),
tCE(wfi, 320f003, wfi, 0, (), noargs, t_hint),
tCE(sev, 320f004, sev, 0, (), noargs, t_hint),
#undef THUMB_VARIANT
-#define THUMB_VARIANT ARM_EXT_V6T2
+#define THUMB_VARIANT &arm_ext_v6_notm
+ TCE(ldrexd, 1b00f9f, e8d0007f, 3, (RRnpc, oRRnpc, RRnpcb), ldrexd, t_ldrexd),
+ TCE(strexd, 1a00f90, e8c00070, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb), strexd, t_strexd),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_v6t2
TCE(ldrexb, 1d00f9f, e8d00f4f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
TCE(ldrexh, 1f00f9f, e8d00f5f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE(ldrexd, 1b00f9f, e8d0007f, 3, (RRnpc, oRRnpc, RRnpcb), ldrexd, t_ldrexd),
TCE(strexb, 1c00f90, e8c00f40, 3, (RRnpc, RRnpc, ADDR), strex, rm_rd_rn),
TCE(strexh, 1e00f90, e8c00f50, 3, (RRnpc, RRnpc, ADDR), strex, rm_rd_rn),
- TCE(strexd, 1a00f90, e8c00070, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb), strexd, t_strexd),
TUF(clrex, 57ff01f, f3bf8f2f, 0, (), noargs, noargs),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V6Z
+#define ARM_VARIANT &arm_ext_v6z
TCE(smc, 1600070, f7f08000, 1, (EXPi), smc, t_smc),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_EXT_V6T2
+#define ARM_VARIANT &arm_ext_v6t2
TCE(bfc, 7c0001f, f36f0000, 3, (RRnpc, I31, I32), bfc, t_bfc),
TCE(bfi, 7c00010, f3600000, 4, (RRnpc, RRnpc_I0, I31, I32), bfi, t_bfi),
TCE(sbfx, 7a00050, f3400000, 4, (RR, RR, I31, I32), bfx, t_bfx),
@@ -9067,15 +9385,32 @@
/* Thumb2 only instructions. */
#undef ARM_VARIANT
-#define ARM_VARIANT 0
+#define ARM_VARIANT NULL
TCE(addw, 0, f2000000, 3, (RR, RR, EXPi), 0, t_add_sub_w),
TCE(subw, 0, f2a00000, 3, (RR, RR, EXPi), 0, t_add_sub_w),
TCE(tbb, 0, e8d0f000, 1, (TB), 0, t_tb),
TCE(tbh, 0, e8d0f010, 1, (TB), 0, t_tb),
+ /* Thumb-2 hardware division instructions (R and M profiles only). */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_div
+ TCE(sdiv, 0, fb90f0f0, 3, (RR, oRR, RR), 0, t_div),
+ TCE(udiv, 0, fbb0f0f0, 3, (RR, oRR, RR), 0, t_div),
+
+ /* ARM V7 instructions. */
#undef ARM_VARIANT
-#define ARM_VARIANT FPU_FPA_EXT_V1 /* Core FPA instruction set (V1). */
+#define ARM_VARIANT &arm_ext_v7
+#undef THUMB_VARIANT
+#define THUMB_VARIANT &arm_ext_v7
+ TUF(pli, 450f000, f910f000, 1, (ADDR), pli, t_pld),
+ TCE(dbg, 320f0f0, f3af80f0, 1, (I15), dbg, t_dbg),
+ TUF(dmb, 57ff050, f3bf8f50, 1, (oBARRIER), barrier, t_barrier),
+ TUF(dsb, 57ff040, f3bf8f40, 1, (oBARRIER), barrier, t_barrier),
+ TUF(isb, 57ff060, f3bf8f60, 1, (oBARRIER), barrier, t_barrier),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT &fpu_fpa_ext_v1 /* Core FPA instruction set (V1). */
cCE(wfs, e200110, 1, (RR), rd),
cCE(rfs, e300110, 1, (RR), rd),
cCE(wfc, e400110, 1, (RR), rd),
@@ -9507,7 +9842,7 @@
/* Instructions that were new with the real FPA, call them V2. */
#undef ARM_VARIANT
-#define ARM_VARIANT FPU_FPA_EXT_V2
+#define ARM_VARIANT &fpu_fpa_ext_v2
cCE(lfm, c100200, 3, (RF, I4b, ADDR), fpa_ldmstm),
cCL(lfmfd, c900200, 3, (RF, I4b, ADDR), fpa_ldmstm),
cCL(lfmea, d100200, 3, (RF, I4b, ADDR), fpa_ldmstm),
@@ -9516,7 +9851,7 @@
cCL(sfmea, c800200, 3, (RF, I4b, ADDR), fpa_ldmstm),
#undef ARM_VARIANT
-#define ARM_VARIANT FPU_VFP_EXT_V1xD /* VFP V1xD (single precision). */
+#define ARM_VARIANT &fpu_vfp_ext_v1xd /* VFP V1xD (single precision). */
/* Moves and type conversions. */
cCE(fcpys, eb00a40, 2, (RVS, RVS), vfp_sp_monadic),
cCE(fmrs, e100a10, 2, (RR, RVS), vfp_reg_from_sp),
@@ -9574,7 +9909,7 @@
cCE(fcmpezs, eb50ac0, 1, (RVS), vfp_sp_compare_z),
#undef ARM_VARIANT
-#define ARM_VARIANT FPU_VFP_EXT_V1 /* VFP V1 (Double precision). */
+#define ARM_VARIANT &fpu_vfp_ext_v1 /* VFP V1 (Double precision). */
/* Moves and type conversions. */
cCE(fcpyd, eb00b40, 2, (RVD, RVD), rd_rm),
cCE(fcvtds, eb70ac0, 2, (RVD, RVS), vfp_dp_sp_cvt),
@@ -9625,14 +9960,14 @@
cCE(fcmpezd, eb50bc0, 1, (RVD), rd),
#undef ARM_VARIANT
-#define ARM_VARIANT FPU_VFP_EXT_V2
+#define ARM_VARIANT &fpu_vfp_ext_v2
cCE(fmsrr, c400a10, 3, (VRSLST, RR, RR), vfp_sp2_from_reg2),
cCE(fmrrs, c500a10, 3, (RR, RR, VRSLST), vfp_reg2_from_sp2),
cCE(fmdrr, c400b10, 3, (RVD, RR, RR), rm_rd_rn),
cCE(fmrrd, c500b10, 3, (RR, RR, RVD), rd_rn_rm),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_CEXT_XSCALE /* Intel XScale extensions. */
+#define ARM_VARIANT &arm_cext_xscale /* Intel XScale extensions. */
cCE(mia, e200010, 3, (RXA, RRnpc, RRnpc), xsc_mia),
cCE(miaph, e280010, 3, (RXA, RRnpc, RRnpc), xsc_mia),
cCE(miabb, e2c0010, 3, (RXA, RRnpc, RRnpc), xsc_mia),
@@ -9643,7 +9978,7 @@
cCE(mra, c500000, 3, (RRnpc, RRnpc, RXA), xsc_mra),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_CEXT_IWMMXT /* Intel Wireless MMX technology. */
+#define ARM_VARIANT &arm_cext_iwmmxt /* Intel Wireless MMX technology. */
cCE(tandcb, e13f130, 1, (RR), iwmmxt_tandorc),
cCE(tandch, e53f130, 1, (RR), iwmmxt_tandorc),
cCE(tandcw, e93f130, 1, (RR), iwmmxt_tandorc),
@@ -9808,7 +10143,7 @@
cCE(wzero, e300000, 1, (RIWR), iwmmxt_wzero),
#undef ARM_VARIANT
-#define ARM_VARIANT ARM_CEXT_MAVERICK /* Cirrus Maverick instructions. */
+#define ARM_VARIANT &arm_cext_maverick /* Cirrus Maverick instructions. */
cCE(cfldrs, c100400, 2, (RMF, ADDR), rd_cpaddr),
cCE(cfldrd, c500400, 2, (RMD, ADDR), rd_cpaddr),
cCE(cfldr32, c100500, 2, (RMFX, ADDR), rd_cpaddr),
@@ -11069,6 +11404,82 @@
return value;
}
+/* Like negate_data_op, but for Thumb-2. */
+
+static unsigned int
+thumb32_negate_data_op (offsetT *instruction, offsetT value)
+{
+ int op, new_inst;
+ int rd;
+ offsetT negated, inverted;
+
+ negated = encode_thumb32_immediate (-value);
+ inverted = encode_thumb32_immediate (~value);
+
+ rd = (*instruction >> 8) & 0xf;
+ op = (*instruction >> T2_DATA_OP_SHIFT) & 0xf;
+ switch (op)
+ {
+ /* ADD <-> SUB. Includes CMP <-> CMN. */
+ case T2_OPCODE_SUB:
+ new_inst = T2_OPCODE_ADD;
+ value = negated;
+ break;
+
+ case T2_OPCODE_ADD:
+ new_inst = T2_OPCODE_SUB;
+ value = negated;
+ break;
+
+ /* ORR <-> ORN. Includes MOV <-> MVN. */
+ case T2_OPCODE_ORR:
+ new_inst = T2_OPCODE_ORN;
+ value = inverted;
+ break;
+
+ case T2_OPCODE_ORN:
+ new_inst = T2_OPCODE_ORR;
+ value = inverted;
+ break;
+
+ /* AND <-> BIC. TST has no inverted equivalent. */
+ case T2_OPCODE_AND:
+ new_inst = T2_OPCODE_BIC;
+ if (rd == 15)
+ value = FAIL;
+ else
+ value = inverted;
+ break;
+
+ case T2_OPCODE_BIC:
+ new_inst = T2_OPCODE_AND;
+ value = inverted;
+ break;
+
+ /* ADC <-> SBC */
+ case T2_OPCODE_ADC:
+ new_inst = T2_OPCODE_SBC;
+ value = inverted;
+ break;
+
+ case T2_OPCODE_SBC:
+ new_inst = T2_OPCODE_ADC;
+ value = inverted;
+ break;
+
+ /* We cannot do anything. */
+ default:
+ return FAIL;
+ }
+
+ if (value == FAIL)
+ return FAIL;
+
+ *instruction &= T2_OPCODE_MASK;
+ *instruction |= new_inst << T2_DATA_OP_SHIFT;
+ return value;
+}
+
/* Read a 32-bit thumb instruction from buf. */
static unsigned long
get_thumb32_insn (char * buf)
@@ -11203,6 +11614,9 @@
break;
case BFD_RELOC_ARM_OFFSET_IMM:
+ if (!fixP->fx_done && seg->use_rela_p)
+ value = 0;
+
case BFD_RELOC_ARM_LITERAL:
sign = value >= 0;
@@ -11299,7 +11713,7 @@
break;
}
value /= 4;
- if (value >= 0xff)
+ if (value > 0xff)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("offset out of range"));
@@ -11314,7 +11728,7 @@
newval |= (1 << 23);
else
value = -value;
- if (value >= 0xfff)
+ if (value > 0xfff)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("offset out of range"));
@@ -11329,7 +11743,7 @@
newval |= (1 << 9);
else
value = -value;
- if (value >= 0xff)
+ if (value > 0xff)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("offset out of range"));
@@ -11340,7 +11754,7 @@
else if ((newval & 0x00000f00) == 0x00000e00)
{
/* T-instruction: positive 8-bit offset. */
- if (value < 0 || value >= 0xff)
+ if (value < 0 || value > 0xff)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("offset out of range"));
@@ -11421,7 +11835,11 @@
/* FUTURE: Implement analogue of negate_data_op for T32. */
if (fixP->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE)
- newimm = encode_thumb32_immediate (value);
+ {
+ newimm = encode_thumb32_immediate (value);
+ if (newimm == (unsigned int) FAIL)
+ newimm = thumb32_negate_data_op (&newval, value);
+ }
else
{
/* 12 bit immediate for addw/subw. */
@@ -11525,6 +11943,14 @@
{
newval = md_chars_to_number (buf, INSN_SIZE);
newval |= (value >> 2) & 0x00ffffff;
+ /* Set the H bit on BLX instructions. */
+ if (temp == 1)
+ {
+ if (value & 2)
+ newval |= 0x01000000;
+ else
+ newval &= ~0x01000000;
+ }
md_number_to_chars (buf, newval, INSN_SIZE);
}
break;
@@ -11538,7 +11964,7 @@
if (fixP->fx_done || !seg->use_rela_p)
{
newval = md_chars_to_number (buf, THUMB_SIZE);
- newval |= ((value & 0x2e) << 2) | ((value & 0x40) << 3);
+ newval |= ((value & 0x3e) << 2) | ((value & 0x40) << 3);
md_number_to_chars (buf, newval, THUMB_SIZE);
}
break;
@@ -11747,8 +12173,9 @@
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("invalid offset, target not word aligned (0x%08lX)"),
- (((unsigned int) fixP->fx_frag->fr_address
- + (unsigned int) fixP->fx_where) & ~3) + value);
+ (((unsigned long) fixP->fx_frag->fr_address
+ + (unsigned long) fixP->fx_where) & ~3)
+ + (unsigned long) value);
if (value & ~0x3fc)
as_bad_where (fixP->fx_file, fixP->fx_line,
@@ -11919,8 +12346,7 @@
format. */
arelent *
-tc_gen_reloc (asection * section ATTRIBUTE_UNUSED,
- fixS * fixp)
+tc_gen_reloc (asection *section, fixS *fixp)
{
arelent * reloc;
bfd_reloc_code_real_type code;
@@ -11932,7 +12358,12 @@
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
if (fixp->fx_pcrel)
- fixp->fx_offset = reloc->address;
+ {
+ if (section->use_rela_p)
+ fixp->fx_offset -= md_pcrel_from_section (fixp, section);
+ else
+ fixp->fx_offset = reloc->address;
+ }
reloc->addend = fixp->fx_offset;
switch (fixp->fx_r_type)
@@ -12020,6 +12451,12 @@
return NULL;
case BFD_RELOC_ARM_OFFSET_IMM:
+ if (section->use_rela_p)
+ {
+ code = fixp->fx_r_type;
+ break;
+ }
+
if (fixp->fx_addsy != NULL
&& !S_IS_DEFINED (fixp->fx_addsy)
&& S_IS_LOCAL (fixp->fx_addsy))
@@ -12367,8 +12804,10 @@
|| (arm_cond_hsh = hash_new ()) == NULL
|| (arm_shift_hsh = hash_new ()) == NULL
|| (arm_psr_hsh = hash_new ()) == NULL
+ || (arm_v7m_psr_hsh = hash_new ()) == NULL
|| (arm_reg_hsh = hash_new ()) == NULL
- || (arm_reloc_hsh = hash_new ()) == NULL)
+ || (arm_reloc_hsh = hash_new ()) == NULL
+ || (arm_barrier_opt_hsh = hash_new ()) == NULL)
as_fatal (_("virtual memory exhausted"));
for (i = 0; i < sizeof (insns) / sizeof (struct asm_opcode); i++)
@@ -12379,8 +12818,15 @@
hash_insert (arm_shift_hsh, shift_names[i].name, (PTR) (shift_names + i));
for (i = 0; i < sizeof (psrs) / sizeof (struct asm_psr); i++)
hash_insert (arm_psr_hsh, psrs[i].template, (PTR) (psrs + i));
+ for (i = 0; i < sizeof (v7m_psrs) / sizeof (struct asm_psr); i++)
+ hash_insert (arm_v7m_psr_hsh, v7m_psrs[i].template, (PTR) (v7m_psrs + i));
for (i = 0; i < sizeof (reg_names) / sizeof (struct reg_entry); i++)
hash_insert (arm_reg_hsh, reg_names[i].name, (PTR) (reg_names + i));
+ for (i = 0;
+ i < sizeof (barrier_opt_names) / sizeof (struct asm_barrier_opt);
+ i++)
+ hash_insert (arm_barrier_opt_hsh, barrier_opt_names[i].template,
+ (PTR) (barrier_opt_names + i));
#ifdef OBJ_ELF
for (i = 0; i < sizeof (reloc_names) / sizeof (struct reloc_entry); i++)
hash_insert (arm_reloc_hsh, reloc_names[i].name, (PTR) (reloc_names + i));
@@ -12392,63 +12838,63 @@
-mcpu= over -march= if both are set (as for GCC); and we prefer
-mfpu= over any other way of setting the floating point unit.
Use of legacy options with new options are faulted. */
- if (legacy_cpu != -1)
+ if (legacy_cpu)
{
- if (mcpu_cpu_opt != -1 || march_cpu_opt != -1)
+ if (mcpu_cpu_opt || march_cpu_opt)
as_bad (_("use of old and new-style options to set CPU type"));
mcpu_cpu_opt = legacy_cpu;
}
- else if (mcpu_cpu_opt == -1)
+ else if (!mcpu_cpu_opt)
mcpu_cpu_opt = march_cpu_opt;
- if (legacy_fpu != -1)
+ if (legacy_fpu)
{
- if (mfpu_opt != -1)
+ if (mfpu_opt)
as_bad (_("use of old and new-style options to set FPU type"));
mfpu_opt = legacy_fpu;
}
- else if (mfpu_opt == -1)
+ else if (!mfpu_opt)
{
#if !(defined (TE_LINUX) || defined (TE_NetBSD) || defined (TE_VXWORKS))
/* Some environments specify a default FPU. If they don't, infer it
from the processor. */
- if (mcpu_fpu_opt != -1)
+ if (mcpu_fpu_opt)
mfpu_opt = mcpu_fpu_opt;
else
mfpu_opt = march_fpu_opt;
#else
- mfpu_opt = FPU_DEFAULT;
+ mfpu_opt = &fpu_default;
#endif
}
- if (mfpu_opt == -1)
+ if (!mfpu_opt)
{
- if (mcpu_cpu_opt == -1)
- mfpu_opt = FPU_DEFAULT;
- else if (mcpu_cpu_opt & ARM_EXT_V5)
- mfpu_opt = FPU_ARCH_VFP_V2;
+ if (!mcpu_cpu_opt)
+ mfpu_opt = &fpu_default;
+ else if (ARM_CPU_HAS_FEATURE (*mcpu_fpu_opt, arm_ext_v5))
+ mfpu_opt = &fpu_arch_vfp_v2;
else
- mfpu_opt = FPU_ARCH_FPA;
+ mfpu_opt = &fpu_arch_fpa;
}
#ifdef CPU_DEFAULT
- if (mcpu_cpu_opt == -1)
- selected_cpu = mcpu_cpu_opt = CPU_DEFAULT;
-#else
- if (mcpu_cpu_opt == -1)
+ if (!mcpu_cpu_opt)
{
- mcpu_cpu_opt = ARM_ANY;
- selected_cpu = 0;
+ mcpu_cpu_opt = &cpu_default;
+ selected_cpu = cpu_default;
}
+#else
+ if (mcpu_cpu_opt)
+ selected_cpu = *mcpu_cpu_opt;
else
- selected_cpu = mcpu_cpu_opt;
+ mcpu_cpu_opt = &arm_arch_any;
#endif
- cpu_variant = mcpu_cpu_opt | mfpu_opt;
+ ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
- arm_arch_used = thumb_arch_used = 0;
+ arm_arch_used = thumb_arch_used = arm_arch_none;
#if defined OBJ_COFF || defined OBJ_ELF
{
@@ -12466,8 +12912,7 @@
if (support_interwork) flags |= F_INTERWORK;
if (uses_apcs_float) flags |= F_APCS_FLOAT;
if (pic_code) flags |= F_PIC;
- if ((cpu_variant & FPU_ANY) == FPU_NONE
- || (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */
+ if (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_any_hard))
flags |= F_SOFT_FLOAT;
switch (mfloat_abi_opt)
@@ -12483,16 +12928,17 @@
break;
}
- /* Using VFP conventions (even if soft-float). */
- if (cpu_variant & FPU_VFP_EXT_NONE)
+ /* Using pure-endian doubles (even if soft-float). */
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, fpu_endian_pure))
flags |= F_VFP_FLOAT;
#if defined OBJ_ELF
- if (cpu_variant & FPU_ARCH_MAVERICK)
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, fpu_arch_maverick))
flags |= EF_ARM_MAVERICK_FLOAT;
break;
case EF_ARM_EABI_VER4:
+ case EF_ARM_EABI_VER5:
/* No additional flags to set. */
break;
@@ -12523,50 +12969,38 @@
#endif
/* Record the CPU type as well. */
- switch (cpu_variant & ARM_CPU_MASK)
- {
- case ARM_2:
- mach = bfd_mach_arm_2;
- break;
-
- case ARM_3: /* Also ARM_250. */
- mach = bfd_mach_arm_2a;
- break;
-
- case ARM_6: /* Also ARM_7. */
- mach = bfd_mach_arm_3;
- break;
-
- default:
- mach = bfd_mach_arm_unknown;
- break;
- }
-
- /* Catch special cases. */
- if (cpu_variant & ARM_CEXT_IWMMXT)
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_cext_iwmmxt))
mach = bfd_mach_arm_iWMMXt;
- else if (cpu_variant & ARM_CEXT_XSCALE)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_cext_xscale))
mach = bfd_mach_arm_XScale;
- else if (cpu_variant & ARM_CEXT_MAVERICK)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_cext_maverick))
mach = bfd_mach_arm_ep9312;
- else if (cpu_variant & ARM_EXT_V5E)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v5e))
mach = bfd_mach_arm_5TE;
- else if (cpu_variant & ARM_EXT_V5)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v5))
{
- if (cpu_variant & ARM_EXT_V4T)
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v4t))
mach = bfd_mach_arm_5T;
else
mach = bfd_mach_arm_5;
}
- else if (cpu_variant & ARM_EXT_V4)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v4))
{
- if (cpu_variant & ARM_EXT_V4T)
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v4t))
mach = bfd_mach_arm_4T;
else
mach = bfd_mach_arm_4;
}
- else if (cpu_variant & ARM_EXT_V3M)
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v3m))
mach = bfd_mach_arm_3M;
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v3))
+ mach = bfd_mach_arm_3;
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v2s))
+ mach = bfd_mach_arm_2a;
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v2))
+ mach = bfd_mach_arm_2;
+ else
+ mach = bfd_mach_arm_unknown;
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach);
}
@@ -12688,125 +13122,137 @@
/* These are recognized by the assembler, but have no affect on code. */
{"mapcs-frame", N_("use frame pointer"), NULL, 0, NULL},
{"mapcs-stack-check", N_("use stack size checking"), NULL, 0, NULL},
+ {NULL, NULL, NULL, 0, NULL}
+};
+struct arm_legacy_option_table
+{
+ char *option; /* Option name to match. */
+ const arm_feature_set **var; /* Variable to change. */
+ const arm_feature_set value; /* What to change it to. */
+ char *deprecated; /* If non-null, print this message. */
+};
+
+const struct arm_legacy_option_table arm_legacy_opts[] =
+{
/* DON'T add any new processors to this list -- we want the whole list
to go away... Add them to the processors table instead. */
- {"marm1", NULL, &legacy_cpu, ARM_ARCH_V1, N_("use -mcpu=arm1")},
- {"m1", NULL, &legacy_cpu, ARM_ARCH_V1, N_("use -mcpu=arm1")},
- {"marm2", NULL, &legacy_cpu, ARM_ARCH_V2, N_("use -mcpu=arm2")},
- {"m2", NULL, &legacy_cpu, ARM_ARCH_V2, N_("use -mcpu=arm2")},
- {"marm250", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm250")},
- {"m250", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm250")},
- {"marm3", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm3")},
- {"m3", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm3")},
- {"marm6", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm6")},
- {"m6", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm6")},
- {"marm600", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm600")},
- {"m600", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm600")},
- {"marm610", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm610")},
- {"m610", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm610")},
- {"marm620", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm620")},
- {"m620", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm620")},
- {"marm7", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7")},
- {"m7", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7")},
- {"marm70", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm70")},
- {"m70", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm70")},
- {"marm700", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700")},
- {"m700", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700")},
- {"marm700i", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700i")},
- {"m700i", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700i")},
- {"marm710", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710")},
- {"m710", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710")},
- {"marm710c", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710c")},
- {"m710c", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710c")},
- {"marm720", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm720")},
- {"m720", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm720")},
- {"marm7d", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7d")},
- {"m7d", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7d")},
- {"marm7di", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7di")},
- {"m7di", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7di")},
- {"marm7m", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7m")},
- {"m7m", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7m")},
- {"marm7dm", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dm")},
- {"m7dm", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dm")},
- {"marm7dmi", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dmi")},
- {"m7dmi", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dmi")},
- {"marm7100", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7100")},
- {"m7100", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7100")},
- {"marm7500", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500")},
- {"m7500", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500")},
- {"marm7500fe", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500fe")},
- {"m7500fe", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500fe")},
- {"marm7t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
- {"m7t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
- {"marm7tdmi", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
- {"m7tdmi", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
- {"marm710t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm710t")},
- {"m710t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm710t")},
- {"marm720t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm720t")},
- {"m720t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm720t")},
- {"marm740t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm740t")},
- {"m740t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm740t")},
- {"marm8", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm8")},
- {"m8", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm8")},
- {"marm810", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm810")},
- {"m810", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm810")},
- {"marm9", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9")},
- {"m9", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9")},
- {"marm9tdmi", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9tdmi")},
- {"m9tdmi", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9tdmi")},
- {"marm920", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm920")},
- {"m920", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm920")},
- {"marm940", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm940")},
- {"m940", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm940")},
- {"mstrongarm", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=strongarm")},
- {"mstrongarm110", NULL, &legacy_cpu, ARM_ARCH_V4,
+ {"marm1", &legacy_cpu, ARM_ARCH_V1, N_("use -mcpu=arm1")},
+ {"m1", &legacy_cpu, ARM_ARCH_V1, N_("use -mcpu=arm1")},
+ {"marm2", &legacy_cpu, ARM_ARCH_V2, N_("use -mcpu=arm2")},
+ {"m2", &legacy_cpu, ARM_ARCH_V2, N_("use -mcpu=arm2")},
+ {"marm250", &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm250")},
+ {"m250", &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm250")},
+ {"marm3", &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm3")},
+ {"m3", &legacy_cpu, ARM_ARCH_V2S, N_("use -mcpu=arm3")},
+ {"marm6", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm6")},
+ {"m6", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm6")},
+ {"marm600", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm600")},
+ {"m600", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm600")},
+ {"marm610", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm610")},
+ {"m610", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm610")},
+ {"marm620", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm620")},
+ {"m620", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm620")},
+ {"marm7", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7")},
+ {"m7", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7")},
+ {"marm70", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm70")},
+ {"m70", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm70")},
+ {"marm700", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700")},
+ {"m700", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700")},
+ {"marm700i", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700i")},
+ {"m700i", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm700i")},
+ {"marm710", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710")},
+ {"m710", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710")},
+ {"marm710c", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710c")},
+ {"m710c", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm710c")},
+ {"marm720", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm720")},
+ {"m720", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm720")},
+ {"marm7d", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7d")},
+ {"m7d", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7d")},
+ {"marm7di", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7di")},
+ {"m7di", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7di")},
+ {"marm7m", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7m")},
+ {"m7m", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7m")},
+ {"marm7dm", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dm")},
+ {"m7dm", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dm")},
+ {"marm7dmi", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dmi")},
+ {"m7dmi", &legacy_cpu, ARM_ARCH_V3M, N_("use -mcpu=arm7dmi")},
+ {"marm7100", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7100")},
+ {"m7100", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7100")},
+ {"marm7500", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500")},
+ {"m7500", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500")},
+ {"marm7500fe", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500fe")},
+ {"m7500fe", &legacy_cpu, ARM_ARCH_V3, N_("use -mcpu=arm7500fe")},
+ {"marm7t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
+ {"m7t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
+ {"marm7tdmi", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
+ {"m7tdmi", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm7tdmi")},
+ {"marm710t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm710t")},
+ {"m710t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm710t")},
+ {"marm720t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm720t")},
+ {"m720t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm720t")},
+ {"marm740t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm740t")},
+ {"m740t", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm740t")},
+ {"marm8", &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm8")},
+ {"m8", &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm8")},
+ {"marm810", &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm810")},
+ {"m810", &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=arm810")},
+ {"marm9", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9")},
+ {"m9", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9")},
+ {"marm9tdmi", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9tdmi")},
+ {"m9tdmi", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm9tdmi")},
+ {"marm920", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm920")},
+ {"m920", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm920")},
+ {"marm940", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm940")},
+ {"m940", &legacy_cpu, ARM_ARCH_V4T, N_("use -mcpu=arm940")},
+ {"mstrongarm", &legacy_cpu, ARM_ARCH_V4, N_("use -mcpu=strongarm")},
+ {"mstrongarm110", &legacy_cpu, ARM_ARCH_V4,
N_("use -mcpu=strongarm110")},
- {"mstrongarm1100", NULL, &legacy_cpu, ARM_ARCH_V4,
+ {"mstrongarm1100", &legacy_cpu, ARM_ARCH_V4,
N_("use -mcpu=strongarm1100")},
- {"mstrongarm1110", NULL, &legacy_cpu, ARM_ARCH_V4,
+ {"mstrongarm1110", &legacy_cpu, ARM_ARCH_V4,
N_("use -mcpu=strongarm1110")},
- {"mxscale", NULL, &legacy_cpu, ARM_ARCH_XSCALE, N_("use -mcpu=xscale")},
- {"miwmmxt", NULL, &legacy_cpu, ARM_ARCH_IWMMXT, N_("use -mcpu=iwmmxt")},
- {"mall", NULL, &legacy_cpu, ARM_ANY, N_("use -mcpu=all")},
+ {"mxscale", &legacy_cpu, ARM_ARCH_XSCALE, N_("use -mcpu=xscale")},
+ {"miwmmxt", &legacy_cpu, ARM_ARCH_IWMMXT, N_("use -mcpu=iwmmxt")},
+ {"mall", &legacy_cpu, ARM_ANY, N_("use -mcpu=all")},
/* Architecture variants -- don't add any more to this list either. */
- {"mv2", NULL, &legacy_cpu, ARM_ARCH_V2, N_("use -march=armv2")},
- {"marmv2", NULL, &legacy_cpu, ARM_ARCH_V2, N_("use -march=armv2")},
- {"mv2a", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -march=armv2a")},
- {"marmv2a", NULL, &legacy_cpu, ARM_ARCH_V2S, N_("use -march=armv2a")},
- {"mv3", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -march=armv3")},
- {"marmv3", NULL, &legacy_cpu, ARM_ARCH_V3, N_("use -march=armv3")},
- {"mv3m", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -march=armv3m")},
- {"marmv3m", NULL, &legacy_cpu, ARM_ARCH_V3M, N_("use -march=armv3m")},
- {"mv4", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -march=armv4")},
- {"marmv4", NULL, &legacy_cpu, ARM_ARCH_V4, N_("use -march=armv4")},
- {"mv4t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -march=armv4t")},
- {"marmv4t", NULL, &legacy_cpu, ARM_ARCH_V4T, N_("use -march=armv4t")},
- {"mv5", NULL, &legacy_cpu, ARM_ARCH_V5, N_("use -march=armv5")},
- {"marmv5", NULL, &legacy_cpu, ARM_ARCH_V5, N_("use -march=armv5")},
- {"mv5t", NULL, &legacy_cpu, ARM_ARCH_V5T, N_("use -march=armv5t")},
- {"marmv5t", NULL, &legacy_cpu, ARM_ARCH_V5T, N_("use -march=armv5t")},
- {"mv5e", NULL, &legacy_cpu, ARM_ARCH_V5TE, N_("use -march=armv5te")},
- {"marmv5e", NULL, &legacy_cpu, ARM_ARCH_V5TE, N_("use -march=armv5te")},
+ {"mv2", &legacy_cpu, ARM_ARCH_V2, N_("use -march=armv2")},
+ {"marmv2", &legacy_cpu, ARM_ARCH_V2, N_("use -march=armv2")},
+ {"mv2a", &legacy_cpu, ARM_ARCH_V2S, N_("use -march=armv2a")},
+ {"marmv2a", &legacy_cpu, ARM_ARCH_V2S, N_("use -march=armv2a")},
+ {"mv3", &legacy_cpu, ARM_ARCH_V3, N_("use -march=armv3")},
+ {"marmv3", &legacy_cpu, ARM_ARCH_V3, N_("use -march=armv3")},
+ {"mv3m", &legacy_cpu, ARM_ARCH_V3M, N_("use -march=armv3m")},
+ {"marmv3m", &legacy_cpu, ARM_ARCH_V3M, N_("use -march=armv3m")},
+ {"mv4", &legacy_cpu, ARM_ARCH_V4, N_("use -march=armv4")},
+ {"marmv4", &legacy_cpu, ARM_ARCH_V4, N_("use -march=armv4")},
+ {"mv4t", &legacy_cpu, ARM_ARCH_V4T, N_("use -march=armv4t")},
+ {"marmv4t", &legacy_cpu, ARM_ARCH_V4T, N_("use -march=armv4t")},
+ {"mv5", &legacy_cpu, ARM_ARCH_V5, N_("use -march=armv5")},
+ {"marmv5", &legacy_cpu, ARM_ARCH_V5, N_("use -march=armv5")},
+ {"mv5t", &legacy_cpu, ARM_ARCH_V5T, N_("use -march=armv5t")},
+ {"marmv5t", &legacy_cpu, ARM_ARCH_V5T, N_("use -march=armv5t")},
+ {"mv5e", &legacy_cpu, ARM_ARCH_V5TE, N_("use -march=armv5te")},
+ {"marmv5e", &legacy_cpu, ARM_ARCH_V5TE, N_("use -march=armv5te")},
/* Floating point variants -- don't add any more to this list either. */
- {"mfpe-old", NULL, &legacy_fpu, FPU_ARCH_FPE, N_("use -mfpu=fpe")},
- {"mfpa10", NULL, &legacy_fpu, FPU_ARCH_FPA, N_("use -mfpu=fpa10")},
- {"mfpa11", NULL, &legacy_fpu, FPU_ARCH_FPA, N_("use -mfpu=fpa11")},
- {"mno-fpu", NULL, &legacy_fpu, 0,
+ {"mfpe-old", &legacy_fpu, FPU_ARCH_FPE, N_("use -mfpu=fpe")},
+ {"mfpa10", &legacy_fpu, FPU_ARCH_FPA, N_("use -mfpu=fpa10")},
+ {"mfpa11", &legacy_fpu, FPU_ARCH_FPA, N_("use -mfpu=fpa11")},
+ {"mno-fpu", &legacy_fpu, ARM_ARCH_NONE,
N_("use either -mfpu=softfpa or -mfpu=softvfp")},
- {NULL, NULL, NULL, 0, NULL}
+ {NULL, NULL, ARM_ARCH_NONE, NULL}
};
struct arm_cpu_option_table
{
char *name;
- int value;
+ const arm_feature_set value;
/* For some CPUs we assume an FPU unless the user explicitly sets
-mfpu=... */
- int default_fpu;
+ const arm_feature_set default_fpu;
/* The canonical name of the CPU, or NULL to use NAME converted to upper
case. */
const char *canonical_name;
@@ -12814,7 +13260,7 @@
/* This list should, at a minimum, contain all the cpu names
recognized by GCC. */
-static struct arm_cpu_option_table arm_cpus[] =
+static const struct arm_cpu_option_table arm_cpus[] =
{
{"all", ARM_ANY, FPU_ARCH_FPA, NULL},
{"arm1", ARM_ARCH_V1, FPU_ARCH_FPA, NULL},
@@ -12893,26 +13339,29 @@
{"arm1156t2f-s", ARM_ARCH_V6T2, FPU_ARCH_VFP_V2, NULL},
{"arm1176jz-s", ARM_ARCH_V6ZK, FPU_NONE, NULL},
{"arm1176jzf-s", ARM_ARCH_V6ZK, FPU_ARCH_VFP_V2, NULL},
+ {"cortex-a8", ARM_ARCH_V7A, FPU_ARCH_VFP_V2, NULL},
+ {"cortex-r4", ARM_ARCH_V7R, FPU_NONE, NULL},
+ {"cortex-m3", ARM_ARCH_V7M, FPU_NONE, NULL},
/* ??? XSCALE is really an architecture. */
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL},
/* ??? iwmmxt is not a processor. */
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP_V2, NULL},
{"i80200", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL},
/* Maverick */
- {"ep9312", ARM_ARCH_V4T | ARM_CEXT_MAVERICK, FPU_ARCH_MAVERICK, "ARM920T"},
- {NULL, 0, 0, NULL}
+ {"ep9312", ARM_FEATURE(ARM_AEXT_V4T, ARM_CEXT_MAVERICK), FPU_ARCH_MAVERICK, "ARM920T"},
+ {NULL, ARM_ARCH_NONE, ARM_ARCH_NONE, NULL}
};
struct arm_arch_option_table
{
char *name;
- int value;
- int default_fpu;
+ const arm_feature_set value;
+ const arm_feature_set default_fpu;
};
/* This list should, at a minimum, contain all the architecture names
recognized by GCC. */
-static struct arm_arch_option_table arm_archs[] =
+static const struct arm_arch_option_table arm_archs[] =
{
{"all", ARM_ANY, FPU_ARCH_FPA},
{"armv1", ARM_ARCH_V1, FPU_ARCH_FPA},
@@ -12940,29 +13389,33 @@
{"armv6kt2", ARM_ARCH_V6KT2, FPU_ARCH_VFP},
{"armv6zt2", ARM_ARCH_V6ZT2, FPU_ARCH_VFP},
{"armv6zkt2", ARM_ARCH_V6ZKT2, FPU_ARCH_VFP},
+ {"armv7", ARM_ARCH_V7, FPU_ARCH_VFP},
+ {"armv7a", ARM_ARCH_V7A, FPU_ARCH_VFP},
+ {"armv7r", ARM_ARCH_V7R, FPU_ARCH_VFP},
+ {"armv7m", ARM_ARCH_V7M, FPU_ARCH_VFP},
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP},
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP},
- {NULL, 0, 0}
+ {NULL, ARM_ARCH_NONE, ARM_ARCH_NONE}
};
/* ISA extensions in the co-processor space. */
-struct arm_option_value_table
+struct arm_option_cpu_value_table
{
char *name;
- int value;
+ const arm_feature_set value;
};
-static struct arm_option_value_table arm_extensions[] =
+static const struct arm_option_cpu_value_table arm_extensions[] =
{
- {"maverick", ARM_CEXT_MAVERICK},
- {"xscale", ARM_CEXT_XSCALE},
- {"iwmmxt", ARM_CEXT_IWMMXT},
- {NULL, 0}
+ {"maverick", ARM_FEATURE (0, ARM_CEXT_MAVERICK)},
+ {"xscale", ARM_FEATURE (0, ARM_CEXT_XSCALE)},
+ {"iwmmxt", ARM_FEATURE (0, ARM_CEXT_IWMMXT)},
+ {NULL, ARM_ARCH_NONE}
};
/* This list should, at a minimum, contain all the fpu names
recognized by GCC. */
-static struct arm_option_value_table arm_fpus[] =
+static const struct arm_option_cpu_value_table arm_fpus[] =
{
{"softfpa", FPU_NONE},
{"fpe", FPU_ARCH_FPE},
@@ -12984,24 +13437,31 @@
{"arm1136jfs", FPU_ARCH_VFP_V2},
{"arm1136jf-s", FPU_ARCH_VFP_V2},
{"maverick", FPU_ARCH_MAVERICK},
- {NULL, 0}
+ {NULL, ARM_ARCH_NONE}
};
-static struct arm_option_value_table arm_float_abis[] =
+struct arm_option_value_table
{
+ char *name;
+ long value;
+};
+
+static const struct arm_option_value_table arm_float_abis[] =
+{
{"hard", ARM_FLOAT_ABI_HARD},
{"softfp", ARM_FLOAT_ABI_SOFTFP},
{"soft", ARM_FLOAT_ABI_SOFT},
- {NULL, 0}
+ {NULL, 0}
};
#ifdef OBJ_ELF
-/* We only know how to output GNU and ver 4 (AAELF) formats. */
-static struct arm_option_value_table arm_eabis[] =
+/* We only know how to output GNU and ver 4/5 (AAELF) formats. */
+static const struct arm_option_value_table arm_eabis[] =
{
{"gnu", EF_ARM_EABI_UNKNOWN},
{"4", EF_ARM_EABI_VER4},
- {NULL, 0}
+ {"5", EF_ARM_EABI_VER5},
+ {NULL, 0}
};
#endif
@@ -13014,11 +13474,17 @@
};
static int
-arm_parse_extension (char * str, int * opt_p)
+arm_parse_extension (char * str, const arm_feature_set **opt_p)
{
+ arm_feature_set *ext_set = xmalloc (sizeof (arm_feature_set));
+
+ /* Copy the feature set, so that we can modify it. */
+ *ext_set = **opt_p;
+ *opt_p = ext_set;
+
while (str != NULL && *str != 0)
{
- struct arm_option_value_table * opt;
+ const struct arm_option_cpu_value_table * opt;
char * ext;
int optlen;
@@ -13045,7 +13511,7 @@
for (opt = arm_extensions; opt->name != NULL; opt++)
if (strncmp (opt->name, str, optlen) == 0)
{
- *opt_p |= opt->value;
+ ARM_MERGE_FEATURE_SETS (*ext_set, *ext_set, opt->value);
break;
}
@@ -13064,7 +13530,7 @@
static int
arm_parse_cpu (char * str)
{
- struct arm_cpu_option_table * opt;
+ const struct arm_cpu_option_table * opt;
char * ext = strchr (str, '+');
int optlen;
@@ -13082,8 +13548,8 @@
for (opt = arm_cpus; opt->name != NULL; opt++)
if (strncmp (opt->name, str, optlen) == 0)
{
- mcpu_cpu_opt = opt->value;
- mcpu_fpu_opt = opt->default_fpu;
+ mcpu_cpu_opt = &opt->value;
+ mcpu_fpu_opt = &opt->default_fpu;
if (opt->canonical_name)
strcpy(selected_cpu_name, opt->canonical_name);
else
@@ -13107,7 +13573,7 @@
static int
arm_parse_arch (char * str)
{
- struct arm_arch_option_table *opt;
+ const struct arm_arch_option_table *opt;
char *ext = strchr (str, '+');
int optlen;
@@ -13125,8 +13591,8 @@
for (opt = arm_archs; opt->name != NULL; opt++)
if (streq (opt->name, str))
{
- march_cpu_opt = opt->value;
- march_fpu_opt = opt->default_fpu;
+ march_cpu_opt = &opt->value;
+ march_fpu_opt = &opt->default_fpu;
strcpy(selected_cpu_name, opt->name);
if (ext != NULL)
@@ -13142,12 +13608,12 @@
static int
arm_parse_fpu (char * str)
{
- struct arm_option_value_table * opt;
+ const struct arm_option_cpu_value_table * opt;
for (opt = arm_fpus; opt->name != NULL; opt++)
if (streq (opt->name, str))
{
- mfpu_opt = opt->value;
+ mfpu_opt = &opt->value;
return 1;
}
@@ -13158,7 +13624,7 @@
static int
arm_parse_float_abi (char * str)
{
- struct arm_option_value_table * opt;
+ const struct arm_option_value_table * opt;
for (opt = arm_float_abis; opt->name != NULL; opt++)
if (streq (opt->name, str))
@@ -13175,7 +13641,7 @@
static int
arm_parse_eabi (char * str)
{
- struct arm_option_value_table *opt;
+ const struct arm_option_value_table *opt;
for (opt = arm_eabis; opt->name != NULL; opt++)
if (streq (opt->name, str))
@@ -13209,6 +13675,7 @@
md_parse_option (int c, char * arg)
{
struct arm_option_table *opt;
+ const struct arm_legacy_option_table *fopt;
struct arm_long_option_table *lopt;
switch (c)
@@ -13251,6 +13718,26 @@
}
}
+ for (fopt = arm_legacy_opts; fopt->option != NULL; fopt++)
+ {
+ if (c == fopt->option[0]
+ && ((arg == NULL && fopt->option[1] == 0)
+ || streq (arg, fopt->option + 1)))
+ {
+#if WARN_DEPRECATED
+ /* If the option is deprecated, tell the user. */
+ if (fopt->deprecated != NULL)
+ as_tsktsk (_("option `-%c%s' is deprecated: %s"), c,
+ arg ? arg : "", _(fopt->deprecated));
+#endif
+
+ if (fopt->var != NULL)
+ *fopt->var = &fopt->value;
+
+ return 1;
+ }
+ }
+
for (lopt = arm_long_opts; lopt->option != NULL; lopt++)
{
/* These options are expected to have an argument. */
@@ -13306,34 +13793,56 @@
#ifdef OBJ_ELF
+typedef struct
+{
+ int val;
+ arm_feature_set flags;
+} cpu_arch_ver_table;
+
+/* Mapping from CPU features to EABI CPU arch values. Table must be sorted
+ least features first. */
+static const cpu_arch_ver_table cpu_arch_ver[] =
+{
+ {1, ARM_ARCH_V4},
+ {2, ARM_ARCH_V4T},
+ {3, ARM_ARCH_V5},
+ {4, ARM_ARCH_V5TE},
+ {5, ARM_ARCH_V5TEJ},
+ {6, ARM_ARCH_V6},
+ {7, ARM_ARCH_V6Z},
+ {8, ARM_ARCH_V6K},
+ {9, ARM_ARCH_V6T2},
+ {10, ARM_ARCH_V7A},
+ {10, ARM_ARCH_V7R},
+ {10, ARM_ARCH_V7M},
+ {0, ARM_ARCH_NONE}
+};
+
/* Set the public EABI object attributes. */
static void
aeabi_set_public_attributes (void)
{
int arch;
- int flags;
+ arm_feature_set flags;
+ arm_feature_set tmp;
+ const cpu_arch_ver_table *p;
/* Choose the architecture based on the capabilities of the requested cpu
(if any) and/or the instructions actually used. */
- flags = selected_cpu | mfpu_opt | arm_arch_used | thumb_arch_used;
- if (flags & ARM_EXT_V6T2)
- arch = 8;
- else if (flags & ARM_EXT_V6Z)
- arch = 7;
- else if (flags & ARM_EXT_V6K)
- arch = 9;
- else if (flags & ARM_EXT_V6)
- arch = 6;
- else if (flags & ARM_EXT_V5E)
- arch = 4;
- else if (flags & (ARM_EXT_V5 | ARM_EXT_V5T))
- arch = 3;
- else if (flags & ARM_EXT_V4T)
- arch = 2;
- else if (flags & ARM_EXT_V4)
- arch = 1;
- else
- arch = 0;
+ ARM_MERGE_FEATURE_SETS (flags, arm_arch_used, thumb_arch_used);
+ ARM_MERGE_FEATURE_SETS (flags, flags, *mfpu_opt);
+ ARM_MERGE_FEATURE_SETS (flags, flags, selected_cpu);
+
+ tmp = flags;
+ arch = 0;
+ for (p = cpu_arch_ver; p->val; p++)
+ {
+ if (ARM_CPU_HAS_FEATURE (tmp, p->flags))
+ {
+ arch = p->val;
+ ARM_CLEAR_FEATURE (tmp, tmp, p->flags);
+ }
+ }
/* Tag_CPU_name. */
if (selected_cpu_name[0])
@@ -13353,20 +13862,30 @@
}
/* Tag_CPU_arch. */
elf32_arm_add_eabi_attr_int (stdoutput, 6, arch);
+ /* Tag_CPU_arch_profile. */
+ if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v7a))
+ elf32_arm_add_eabi_attr_int (stdoutput, 7, 'A');
+ else if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v7r))
+ elf32_arm_add_eabi_attr_int (stdoutput, 7, 'R');
+ else if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v7m))
+ elf32_arm_add_eabi_attr_int (stdoutput, 7, 'M');
/* Tag_ARM_ISA_use. */
- if (arm_arch_used)
+ if (ARM_CPU_HAS_FEATURE (arm_arch_used, arm_arch_full))
elf32_arm_add_eabi_attr_int (stdoutput, 8, 1);
/* Tag_THUMB_ISA_use. */
- if (thumb_arch_used)
+ if (ARM_CPU_HAS_FEATURE (thumb_arch_used, arm_arch_full))
elf32_arm_add_eabi_attr_int (stdoutput, 9,
- (thumb_arch_used & ARM_EXT_V6T2) ? 2 : 1);
+ ARM_CPU_HAS_FEATURE (thumb_arch_used, arm_arch_t2) ? 2 : 1);
/* Tag_VFP_arch. */
- if ((arm_arch_used | thumb_arch_used) & FPU_ARCH_VFP_V2)
+ if (ARM_CPU_HAS_FEATURE (thumb_arch_used, fpu_arch_vfp_v2)
+ || ARM_CPU_HAS_FEATURE (arm_arch_used, fpu_arch_vfp_v2))
elf32_arm_add_eabi_attr_int (stdoutput, 10, 2);
- else if ((arm_arch_used | thumb_arch_used) & FPU_ARCH_VFP_V1)
+ else if (ARM_CPU_HAS_FEATURE (thumb_arch_used, fpu_arch_vfp_v1)
+ || ARM_CPU_HAS_FEATURE (arm_arch_used, fpu_arch_vfp_v1))
elf32_arm_add_eabi_attr_int (stdoutput, 10, 1);
/* Tag_WMMX_arch. */
- if ((arm_arch_used | thumb_arch_used) & ARM_CEXT_IWMMXT)
+ if (ARM_CPU_HAS_FEATURE (thumb_arch_used, arm_cext_iwmmxt)
+ || ARM_CPU_HAS_FEATURE (arm_arch_used, arm_cext_iwmmxt))
elf32_arm_add_eabi_attr_int (stdoutput, 11, 1);
}
@@ -13397,7 +13916,7 @@
static void
s_arm_cpu (int ignored ATTRIBUTE_UNUSED)
{
- struct arm_cpu_option_table *opt;
+ const struct arm_cpu_option_table *opt;
char *name;
char saved_char;
@@ -13411,8 +13930,8 @@
for (opt = arm_cpus + 1; opt->name != NULL; opt++)
if (streq (opt->name, name))
{
- mcpu_cpu_opt = opt->value;
- selected_cpu = mcpu_cpu_opt;
+ mcpu_cpu_opt = &opt->value;
+ selected_cpu = opt->value;
if (opt->canonical_name)
strcpy(selected_cpu_name, opt->canonical_name);
else
@@ -13422,7 +13941,7 @@
selected_cpu_name[i] = TOUPPER (opt->name[i]);
selected_cpu_name[i] = 0;
}
- cpu_variant = mcpu_cpu_opt | mfpu_opt;
+ ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
*input_line_pointer = saved_char;
demand_empty_rest_of_line ();
return;
@@ -13438,7 +13957,7 @@
static void
s_arm_arch (int ignored ATTRIBUTE_UNUSED)
{
- struct arm_arch_option_table *opt;
+ const struct arm_arch_option_table *opt;
char saved_char;
char *name;
@@ -13452,10 +13971,10 @@
for (opt = arm_archs + 1; opt->name != NULL; opt++)
if (streq (opt->name, name))
{
- mcpu_cpu_opt = opt->value;
- selected_cpu = mcpu_cpu_opt;
+ mcpu_cpu_opt = &opt->value;
+ selected_cpu = opt->value;
strcpy(selected_cpu_name, opt->name);
- cpu_variant = mcpu_cpu_opt | mfpu_opt;
+ ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
*input_line_pointer = saved_char;
demand_empty_rest_of_line ();
return;
@@ -13472,7 +13991,7 @@
static void
s_arm_fpu (int ignored ATTRIBUTE_UNUSED)
{
- struct arm_option_value_table *opt;
+ const struct arm_option_cpu_value_table *opt;
char saved_char;
char *name;
@@ -13485,8 +14004,8 @@
for (opt = arm_fpus; opt->name != NULL; opt++)
if (streq (opt->name, name))
{
- mfpu_opt = opt->value;
- cpu_variant = mcpu_cpu_opt | mfpu_opt;
+ mfpu_opt = &opt->value;
+ ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
*input_line_pointer = saved_char;
demand_empty_rest_of_line ();
return;
Modified: branches/binutils/package/gas/config/tc-avr.c
===================================================================
--- branches/binutils/package/gas/config/tc-avr.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-avr.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-avr.c -- Assembler code for the ATMEL AVR
- Copyright 1999, 2000, 2001, 2002, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc at overta.ru>
@@ -89,34 +89,62 @@
{"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
{"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
{"attiny2313",AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
+ {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
{"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
{"atmega103", AVR_ISA_M103, bfd_mach_avr3},
{"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
{"at43usb355",AVR_ISA_M603, bfd_mach_avr3},
{"at76c711", AVR_ISA_M603, bfd_mach_avr3},
- {"atmega48", AVR_ISA_M8, bfd_mach_avr4},
+ {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
{"atmega8", AVR_ISA_M8, bfd_mach_avr4},
{"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
{"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
- {"atmega88", AVR_ISA_M8, bfd_mach_avr4},
+ {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
{"atmega8515",AVR_ISA_M8, bfd_mach_avr4},
{"atmega8535",AVR_ISA_M8, bfd_mach_avr4},
+ {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
+ {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
{"atmega16", AVR_ISA_M323, bfd_mach_avr5},
{"atmega161", AVR_ISA_M161, bfd_mach_avr5},
{"atmega162", AVR_ISA_M323, bfd_mach_avr5},
{"atmega163", AVR_ISA_M161, bfd_mach_avr5},
+ {"atmega164", AVR_ISA_M323, bfd_mach_avr5},
{"atmega165", AVR_ISA_M323, bfd_mach_avr5},
{"atmega168", AVR_ISA_M323, bfd_mach_avr5},
{"atmega169", AVR_ISA_M323, bfd_mach_avr5},
{"atmega32", AVR_ISA_M323, bfd_mach_avr5},
{"atmega323", AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega324", AVR_ISA_M323, bfd_mach_avr5},
{"atmega325", AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
{"atmega3250",AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega3290",AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
{"atmega64", AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
{"atmega128", AVR_ISA_M128, bfd_mach_avr5},
+ {"atmega1280",AVR_ISA_M128, bfd_mach_avr5},
+ {"atmega1281",AVR_ISA_M128, bfd_mach_avr5},
{"atmega645", AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
{"atmega6450",AVR_ISA_M323, bfd_mach_avr5},
+ {"atmega6490",AVR_ISA_M323, bfd_mach_avr5},
+ {"at90can32" ,AVR_ISA_M323, bfd_mach_avr5},
+ {"at90can64" ,AVR_ISA_M323, bfd_mach_avr5},
{"at90can128",AVR_ISA_M128, bfd_mach_avr5},
+ {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
+ {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
+ {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
+ {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
{"at94k", AVR_ISA_94K, bfd_mach_avr5},
{NULL, 0, 0}
};
@@ -170,10 +198,18 @@
{"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
{"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
{"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
- {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
- {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
+ {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
+ {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
};
+/* A union used to store indicies into the exp_mod[] array
+ in a hash table which expects void * data types. */
+typedef union
+{
+ void * ptr;
+ int index;
+} mod_index;
+
/* Opcode hash table. */
static struct hash_control *avr_hash;
@@ -426,8 +462,13 @@
avr_mod_hash = hash_new ();
for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
- hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
+ {
+ mod_index m;
+ m.index = i + 10;
+ hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
+ }
+
bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
}
@@ -509,7 +550,10 @@
if (op[0])
{
- mod = (int) hash_find (avr_mod_hash, op);
+ mod_index m;
+
+ m.ptr = hash_find (avr_mod_hash, op);
+ mod = m.index;
if (mod)
{
@@ -1065,15 +1109,11 @@
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
break;
- case -BFD_RELOC_AVR_LO8_LDI:
- bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
- break;
-
case BFD_RELOC_AVR_HI8_LDI:
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
break;
- case -BFD_RELOC_AVR_HI8_LDI:
+ case BFD_RELOC_AVR_MS8_LDI:
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
break;
@@ -1085,15 +1125,11 @@
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
break;
- case -BFD_RELOC_AVR_LO8_LDI_NEG:
- bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
- break;
-
case BFD_RELOC_AVR_HI8_LDI_NEG:
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
break;
- case -BFD_RELOC_AVR_HI8_LDI_NEG:
+ case BFD_RELOC_AVR_MS8_LDI_NEG:
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
break;
@@ -1179,6 +1215,32 @@
{
arelent *reloc;
+ if (fixp->fx_addsy && fixp->fx_subsy)
+ {
+ long value = 0;
+
+ if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
+ || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Difference of symbols in different sections is not supported");
+ return NULL;
+ }
+
+ /* We are dealing with two symbols defined in the same section.
+ Let us fix-up them here. */
+ value += S_GET_VALUE (fixp->fx_addsy);
+ value -= S_GET_VALUE (fixp->fx_subsy);
+
+ /* When fx_addsy and fx_subsy both are zero, md_apply_fix
+ only takes it's second operands for the fixup value. */
+ fixp->fx_addsy = NULL;
+ fixp->fx_subsy = NULL;
+ md_apply_fix (fixp, (valueT *) &value, NULL);
+
+ return NULL;
+ }
+
reloc = xmalloc (sizeof (arelent));
reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
Modified: branches/binutils/package/gas/config/tc-bfin.c
===================================================================
--- branches/binutils/package/gas/config/tc-bfin.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-bfin.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -28,6 +28,9 @@
#ifdef OBJ_ELF
#include "dwarf2dbg.h"
#endif
+#include "libbfd.h"
+#include "elf/common.h"
+#include "elf/bfin.h"
extern int yyparse (void);
struct yy_buffer_state;
@@ -45,6 +48,12 @@
extern struct obstack mempool;
FILE *errorf;
+/* Flags to set in the elf header */
+#define DEFAULT_FLAGS 0
+
+static flagword bfin_flags = DEFAULT_FLAGS;
+static const char *bfin_pic_flag = (const char *)0;
+
/* Registers list. */
struct bfin_reg_entry
{
@@ -202,11 +211,73 @@
{0, 0}
};
+/* Blackfin specific function to handle FD-PIC pointer initializations. */
+static void
+bfin_pic_ptr (int nbytes)
+{
+ expressionS exp;
+ char *p;
+
+ if (nbytes != 4)
+ abort ();
+
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
+
+ if (is_it_end_of_statement ())
+ {
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+#ifdef md_cons_align
+ md_cons_align (nbytes);
+#endif
+
+ do
+ {
+ bfd_reloc_code_real_type reloc_type = BFD_RELOC_BFIN_FUNCDESC;
+
+ if (strncasecmp (input_line_pointer, "funcdesc(", 9) == 0)
+ {
+ input_line_pointer += 9;
+ expression (&exp);
+ if (*input_line_pointer == ')')
+ input_line_pointer++;
+ else
+ as_bad ("missing ')'");
+ }
+ else
+ error ("missing funcdesc in picptr");
+
+ p = frag_more (4);
+ memset (p, 0, 4);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &exp, 0,
+ reloc_type);
+ }
+ while (*input_line_pointer++ == ',');
+
+ input_line_pointer--; /* Put terminator back into stream. */
+ demand_empty_rest_of_line ();
+}
+
+static void
+bfin_s_bss (int ignore ATTRIBUTE_UNUSED)
+{
+ register int temp;
+
+ temp = get_absolute_expression ();
+ subseg_set (bss_section, (subsegT) temp);
+ demand_empty_rest_of_line ();
+}
+
const pseudo_typeS md_pseudo_table[] = {
{"align", s_align_bytes, 0},
{"byte2", cons, 2},
{"byte4", cons, 4},
+ {"picptr", bfin_pic_ptr, 4},
{"code", obj_elf_section, 0},
{"db", cons, 1},
{"dd", cons, 4},
@@ -218,17 +289,6 @@
{0, 0, 0}
};
-static void
-bfin_s_bss (int ignore ATTRIBUTE_UNUSED)
-{
- register int temp;
-
- temp = get_absolute_expression ();
- subseg_set (bss_section, (subsegT) temp);
- demand_empty_rest_of_line ();
-}
-
-
/* Characters that are used to denote comments and line separators. */
const char comment_chars[] = "";
const char line_comment_chars[] = "#";
@@ -245,16 +305,32 @@
/* Define bfin-specific command-line options (there are none). */
const char *md_shortopts = "";
-struct option md_longopts[] = {
- {NULL, no_argument, NULL, 0}
+#define OPTION_FDPIC (OPTION_MD_BASE)
+
+struct option md_longopts[] =
+{
+ { "mfdpic", no_argument, NULL, OPTION_FDPIC },
+ { NULL, no_argument, NULL, 0 },
};
+
size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
{
- return 0;
+ switch (c)
+ {
+ default:
+ return 0;
+
+ case OPTION_FDPIC:
+ bfin_flags |= EF_BFIN_FDPIC;
+ bfin_pic_flag = "-mfdpic";
+ break;
+ }
+
+ return 1;
}
void
@@ -267,6 +343,10 @@
void
md_begin ()
{
+ /* Set the ELF flags if desired. */
+ if (bfin_flags)
+ bfd_set_private_flags (stdoutput, bfin_flags);
+
/* Set the default machine type. */
if (!bfd_set_arch_mach (stdoutput, bfd_arch_bfin, 0))
as_warn ("Could not set architecture and machine.");
@@ -476,6 +556,8 @@
switch (fixP->fx_r_type)
{
case BFD_RELOC_BFIN_GOT:
+ case BFD_RELOC_BFIN_GOT17M4:
+ case BFD_RELOC_BFIN_FUNCDESC_GOT17M4:
fixP->fx_no_overflow = 1;
newval = md_chars_to_number (where, 2);
newval |= 0x0 & 0x7f;
@@ -579,6 +661,7 @@
md_number_to_chars (where, value, 2);
break;
+ case BFD_RELOC_BFIN_FUNCDESC:
case BFD_RELOC_VTABLE_INHERIT:
case BFD_RELOC_VTABLE_ENTRY:
fixP->fx_done = FALSE;
@@ -725,8 +808,10 @@
switch (fixP->fx_r_type)
{
/* Adjust_reloc_syms doesn't know about the GOT. */
- case BFD_RELOC_BFIN_GOT :
- case BFD_RELOC_BFIN_PLTPC :
+ case BFD_RELOC_BFIN_GOT:
+ case BFD_RELOC_BFIN_GOT17M4:
+ case BFD_RELOC_BFIN_FUNCDESC_GOT17M4:
+ case BFD_RELOC_BFIN_PLTPC:
/* We need the symbol name for the VTABLE entries. */
case BFD_RELOC_VTABLE_INHERIT:
case BFD_RELOC_VTABLE_ENTRY:
@@ -982,6 +1067,8 @@
break;
case BFD_RELOC_16:
case BFD_RELOC_BFIN_GOT:
+ case BFD_RELOC_BFIN_GOT17M4:
+ case BFD_RELOC_BFIN_FUNCDESC_GOT17M4:
note1 = conscode (gencode (value), NULL_CODE);
pcrel = 0;
break;
@@ -1356,8 +1443,6 @@
INSTR_T
bfin_gen_ldstidxi (REG_T ptr, REG_T reg, int W, int sz, int Z, Expr_Node * poffset)
{
- int offset;
- int value = 0;
INIT (LDSTidxI);
if (!IS_PREG (*ptr) || (!IS_DREG (*reg) && !Z))
@@ -1370,44 +1455,51 @@
ASSIGN_R (reg);
ASSIGN (W);
ASSIGN (sz);
- switch (sz)
- {
- case 0:
- value = EXPR_VALUE (poffset) >> 2;
- break;
- case 1:
- value = EXPR_VALUE (poffset) >> 1;
- break;
- case 2:
- value = EXPR_VALUE (poffset);
- break;
- }
-
ASSIGN (Z);
- offset = (value & 0xffff);
- ASSIGN (offset);
- /* TODO : test if you need to check this here.
- The reloc case should automatically generate instruction
- if constant. */
- if(poffset->type != Expr_Node_Constant){
- /* A GOT relocation such as R0 = [P5 + symbol at GOT].
- Distinguish between R0 = [P5 + symbol at GOT] and
- P5 = [P5 + _current_shared_library_p5_offset_]. */
- if(!strcmp(poffset->value.s_value, "_current_shared_library_p5_offset_")){
- return conscode (gencode (HI (c_code.opcode)),
- Expr_Node_Gen_Reloc(poffset, BFD_RELOC_16));
+ if (poffset->type != Expr_Node_Constant)
+ {
+ /* a GOT relocation such as R0 = [P5 + symbol at GOT] */
+ /* distinguish between R0 = [P5 + symbol at GOT] and
+ P5 = [P5 + _current_shared_library_p5_offset_]
+ */
+ if (poffset->type == Expr_Node_Reloc
+ && !strcmp (poffset->value.s_value,
+ "_current_shared_library_p5_offset_"))
+ {
+ return conscode (gencode (HI (c_code.opcode)),
+ Expr_Node_Gen_Reloc(poffset, BFD_RELOC_16));
+ }
+ else if (poffset->type != Expr_Node_GOT_Reloc)
+ abort ();
+
+ return conscode (gencode (HI (c_code.opcode)),
+ Expr_Node_Gen_Reloc(poffset->Left_Child,
+ poffset->value.i_value));
}
- else
+ else
{
- return conscode (gencode (HI (c_code.opcode)),
- Expr_Node_Gen_Reloc(poffset, BFD_RELOC_BFIN_GOT));
+ int value, offset;
+ switch (sz)
+ { // load/store access size
+ case 0: // 32 bit
+ value = EXPR_VALUE (poffset) >> 2;
+ break;
+ case 1: // 16 bit
+ value = EXPR_VALUE (poffset) >> 1;
+ break;
+ case 2: // 8 bit
+ value = EXPR_VALUE (poffset);
+ break;
+ default:
+ abort ();
+ }
+
+ offset = (value & 0xffff);
+ ASSIGN (offset);
+ return GEN_OPCODE32 ();
}
- }
- else{
- return GEN_OPCODE32 ();
- }
}
Modified: branches/binutils/package/gas/config/tc-crx.c
===================================================================
--- branches/binutils/package/gas/config/tc-crx.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-crx.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1378,6 +1378,12 @@
long upper_64kb = 0xFFFF0000;
long value = *num;
+ /* For hosts witah longs bigger than 32-bits make sure that the top
+ bits of a 32-bit negative value read in by the parser are set,
+ so that the correct comparisons are made. */
+ if (value & 0x80000000)
+ value |= (-1L << 31);
+
/* Verify operand value is even. */
if (flags & OP_EVEN)
{
Modified: branches/binutils/package/gas/config/tc-frv.c
===================================================================
--- branches/binutils/package/gas/config/tc-frv.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-frv.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* tc-frv.c -- Assembler for the Fujitsu FRV.
- Copyright 2002, 2003, 2004, 2005 Free Software Foundation.
+ Copyright 2002, 2003, 2004, 2005, 2006 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
@@ -648,11 +648,11 @@
for (this_insn = this_chain->insn_list; this_insn; this_insn = this_insn->next)
{
if (this_insn->type == VLIW_LABEL_TYPE)
- fprintf (stderr, "Label Value: %d\n", (int) this_insn->sym);
+ fprintf (stderr, "Label Value: %p\n", this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_TYPE)
- fprintf (stderr, "%s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "%s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_HAS_NOPS)
- fprintf (stderr, "nop'd %s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "nop'd %s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_NOP_TYPE)
fprintf (stderr, "Nop\n");
else
Modified: branches/binutils/package/gas/config/tc-i370.c
===================================================================
--- branches/binutils/package/gas/config/tc-i370.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-i370.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,7 @@
/* tc-i370.c -- Assembler for the IBM 360/370/390 instruction set.
Loosely based on the ppc files by Linas Vepstas <linas at linas.org> 1998, 99
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
@@ -2102,7 +2102,7 @@
if (! register_name (&ex))
as_bad ("expecting a register for operand %d",
- opindex_ptr - opcode->operands + 1);
+ (int) (opindex_ptr - opcode->operands + 1));
}
/* Check for an address constant expression. */
Modified: branches/binutils/package/gas/config/tc-i386.c
===================================================================
--- branches/binutils/package/gas/config/tc-i386.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-i386.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* i386.c -- Assemble code for the Intel 80386
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -730,55 +730,66 @@
unsigned int prefix;
{
int ret = 1;
- int q;
+ unsigned int q;
if (prefix >= REX_OPCODE && prefix < REX_OPCODE + 16
&& flag_code == CODE_64BIT)
- q = REX_PREFIX;
+ {
+ if ((i.prefix[REX_PREFIX] & prefix & REX_MODE64)
+ || ((i.prefix[REX_PREFIX] & (REX_EXTX | REX_EXTY | REX_EXTZ))
+ && (prefix & (REX_EXTX | REX_EXTY | REX_EXTZ))))
+ ret = 0;
+ q = REX_PREFIX;
+ }
else
- switch (prefix)
- {
- default:
- abort ();
+ {
+ switch (prefix)
+ {
+ default:
+ abort ();
- case CS_PREFIX_OPCODE:
- case DS_PREFIX_OPCODE:
- case ES_PREFIX_OPCODE:
- case FS_PREFIX_OPCODE:
- case GS_PREFIX_OPCODE:
- case SS_PREFIX_OPCODE:
- q = SEG_PREFIX;
- break;
+ case CS_PREFIX_OPCODE:
+ case DS_PREFIX_OPCODE:
+ case ES_PREFIX_OPCODE:
+ case FS_PREFIX_OPCODE:
+ case GS_PREFIX_OPCODE:
+ case SS_PREFIX_OPCODE:
+ q = SEG_PREFIX;
+ break;
- case REPNE_PREFIX_OPCODE:
- case REPE_PREFIX_OPCODE:
- ret = 2;
- /* fall thru */
- case LOCK_PREFIX_OPCODE:
- q = LOCKREP_PREFIX;
- break;
+ case REPNE_PREFIX_OPCODE:
+ case REPE_PREFIX_OPCODE:
+ ret = 2;
+ /* fall thru */
+ case LOCK_PREFIX_OPCODE:
+ q = LOCKREP_PREFIX;
+ break;
- case FWAIT_OPCODE:
- q = WAIT_PREFIX;
- break;
+ case FWAIT_OPCODE:
+ q = WAIT_PREFIX;
+ break;
- case ADDR_PREFIX_OPCODE:
- q = ADDR_PREFIX;
- break;
+ case ADDR_PREFIX_OPCODE:
+ q = ADDR_PREFIX;
+ break;
- case DATA_PREFIX_OPCODE:
- q = DATA_PREFIX;
- break;
- }
+ case DATA_PREFIX_OPCODE:
+ q = DATA_PREFIX;
+ break;
+ }
+ if (i.prefix[q] != 0)
+ ret = 0;
+ }
- if (i.prefix[q] != 0)
+ if (ret)
{
- as_bad (_("same type of prefix used twice"));
- return 0;
+ if (!i.prefix[q])
+ ++i.prefixes;
+ i.prefix[q] |= prefix;
}
+ else
+ as_bad (_("same type of prefix used twice"));
- i.prefixes += 1;
- i.prefix[q] = prefix;
return ret;
}
@@ -1158,13 +1169,12 @@
segment_name (S_GET_SEGMENT (s)));
}
-struct type_name
+static struct type_name
{
unsigned int mask;
char *tname;
}
-
-static const type_names[] =
+const type_names[] =
{
{ Reg8, "r8" },
{ Reg16, "r16" },
@@ -1227,6 +1237,18 @@
if (size == 8)
switch (other)
{
+ case BFD_RELOC_X86_64_GOT32:
+ return BFD_RELOC_X86_64_GOT64;
+ break;
+ case BFD_RELOC_X86_64_PLTOFF64:
+ return BFD_RELOC_X86_64_PLTOFF64;
+ break;
+ case BFD_RELOC_X86_64_GOTPC32:
+ other = BFD_RELOC_X86_64_GOTPC64;
+ break;
+ case BFD_RELOC_X86_64_GOTPCREL:
+ other = BFD_RELOC_X86_64_GOTPCREL64;
+ break;
case BFD_RELOC_X86_64_TPOFF32:
other = BFD_RELOC_X86_64_TPOFF64;
break;
@@ -1334,6 +1356,8 @@
|| fixP->fx_r_type == BFD_RELOC_386_TLS_GOTIE
|| fixP->fx_r_type == BFD_RELOC_386_TLS_LE_32
|| fixP->fx_r_type == BFD_RELOC_386_TLS_LE
+ || fixP->fx_r_type == BFD_RELOC_386_TLS_GOTDESC
+ || fixP->fx_r_type == BFD_RELOC_386_TLS_DESC_CALL
|| fixP->fx_r_type == BFD_RELOC_X86_64_PLT32
|| fixP->fx_r_type == BFD_RELOC_X86_64_GOT32
|| fixP->fx_r_type == BFD_RELOC_X86_64_GOTPCREL
@@ -1345,6 +1369,8 @@
|| fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF32
|| fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF64
|| fixP->fx_r_type == BFD_RELOC_X86_64_GOTOFF64
+ || fixP->fx_r_type == BFD_RELOC_X86_64_GOTPC32_TLSDESC
+ || fixP->fx_r_type == BFD_RELOC_X86_64_TLSDESC_CALL
|| fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
@@ -2185,7 +2211,14 @@
&& fits_in_signed_byte (disp))
i.types[op] |= Disp8;
}
- else
+ else if (i.reloc[op] == BFD_RELOC_386_TLS_DESC_CALL
+ || i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL)
+ {
+ fix_new_exp (frag_now, frag_more (0) - frag_now->fr_literal, 0,
+ i.op[op].disps, 0, i.reloc[op]);
+ i.types[op] &= ~Disp;
+ }
+ else
/* We only support 64bit displacement on constants. */
i.types[op] &= ~Disp64;
}
@@ -2230,19 +2263,7 @@
: (i.suffix == LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf : 0))))));
- t = current_templates->start;
- if (i.suffix == QWORD_MNEM_SUFFIX
- && flag_code != CODE_64BIT
- && (intel_syntax
- ? !(t->opcode_modifier & IgnoreSize)
- && !intel_float_operand (t->name)
- : intel_float_operand (t->name) != 2)
- && (!(t->operand_types[0] & (RegMMX | RegXMM))
- || !(t->operand_types[t->operands > 1] & (RegMMX | RegXMM)))
- && (t->base_opcode != 0x0fc7
- || t->extension_opcode != 1 /* cmpxchg8b */))
- t = current_templates->end;
- for (; t < current_templates->end; t++)
+ for (t = current_templates->start; t < current_templates->end; t++)
{
/* Must have right number of operands. */
if (i.operands != t->operands)
@@ -2254,6 +2275,19 @@
&& (t->opcode_modifier & IgnoreSize)))
continue;
+ /* In general, don't allow 64-bit operands in 32-bit mode. */
+ if (i.suffix == QWORD_MNEM_SUFFIX
+ && flag_code != CODE_64BIT
+ && (intel_syntax
+ ? (!(t->opcode_modifier & IgnoreSize)
+ && !intel_float_operand (t->name))
+ : intel_float_operand (t->name) != 2)
+ && (!(t->operand_types[0] & (RegMMX | RegXMM))
+ || !(t->operand_types[t->operands > 1] & (RegMMX | RegXMM)))
+ && (t->base_opcode != 0x0fc7
+ || t->extension_opcode != 1 /* cmpxchg8b */))
+ continue;
+
/* Do not verify operands when there are none. */
else if (!t->operands)
{
@@ -3146,7 +3180,13 @@
if ((i.index_reg->reg_flags & RegRex) != 0)
i.rex |= REX_EXTY;
}
- i.rm.mode = mode_from_disp_size (i.types[op]);
+
+ if (i.disp_operands
+ && (i.reloc[op] == BFD_RELOC_386_TLS_DESC_CALL
+ || i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL))
+ i.rm.mode = 0;
+ else
+ i.rm.mode = mode_from_disp_size (i.types[op]);
}
if (fake_zero_displacement)
@@ -3446,23 +3486,31 @@
/* Output normal instructions here. */
char *p;
unsigned char *q;
+ unsigned int prefix;
- /* All opcodes on i386 have either 1 or 2 bytes. We may use one
- more higher byte to specify a prefix the instruction
- requires. */
- if ((i.tm.base_opcode & 0xff0000) != 0)
+ /* All opcodes on i386 have either 1 or 2 bytes. Merom New
+ Instructions have 3 bytes. We may use one more higher byte
+ to specify a prefix the instruction requires. */
+ if ((i.tm.cpu_flags & CpuMNI) != 0)
{
+ if (i.tm.base_opcode & 0xff000000)
+ {
+ prefix = (i.tm.base_opcode >> 24) & 0xff;
+ goto check_prefix;
+ }
+ }
+ else if ((i.tm.base_opcode & 0xff0000) != 0)
+ {
+ prefix = (i.tm.base_opcode >> 16) & 0xff;
if ((i.tm.cpu_flags & CpuPadLock) != 0)
{
- unsigned int prefix;
- prefix = (i.tm.base_opcode >> 16) & 0xff;
-
+check_prefix:
if (prefix != REPE_PREFIX_OPCODE
|| i.prefix[LOCKREP_PREFIX] != REPE_PREFIX_OPCODE)
add_prefix (prefix);
}
else
- add_prefix ((i.tm.base_opcode >> 16) & 0xff);
+ add_prefix (prefix);
}
/* The prefix bytes. */
@@ -3484,7 +3532,13 @@
}
else
{
- p = frag_more (2);
+ if ((i.tm.cpu_flags & CpuMNI) != 0)
+ {
+ p = frag_more (3);
+ *p++ = (i.tm.base_opcode >> 16) & 0xff;
+ }
+ else
+ p = frag_more (2);
/* Put out high byte first: can't use md_number_to_chars! */
*p++ = (i.tm.base_opcode >> 8) & 0xff;
@@ -3527,7 +3581,7 @@
#ifdef DEBUG386
if (flag_debug)
{
- pi (line, &i);
+ pi ("" /*line*/, &i);
}
#endif /* DEBUG386 */
}
@@ -3612,7 +3666,9 @@
if (GOT_symbol
&& GOT_symbol == i.op[n].disps->X_add_symbol
&& (((reloc_type == BFD_RELOC_32
- || reloc_type == BFD_RELOC_X86_64_32S)
+ || reloc_type == BFD_RELOC_X86_64_32S
+ || (reloc_type == BFD_RELOC_64
+ && object_64bit))
&& (i.op[n].disps->X_op == O_symbol
|| (i.op[n].disps->X_op == O_add
&& ((symbol_get_value_expression
@@ -3636,10 +3692,17 @@
}
if (!object_64bit)
- reloc_type = BFD_RELOC_386_GOTPC;
+ {
+ reloc_type = BFD_RELOC_386_GOTPC;
+ i.op[n].imms->X_add_number += add;
+ }
+ else if (reloc_type == BFD_RELOC_64)
+ reloc_type = BFD_RELOC_X86_64_GOTPC64;
else
+ /* Don't do the adjustment for x86-64, as there
+ the pcrel addressing is relative to the _next_
+ insn, and that is taken care of in other code. */
reloc_type = BFD_RELOC_X86_64_GOTPC32;
- i.op[n].disps->X_add_number += add;
}
fix_new_exp (frag_now, p - frag_now->fr_literal, size,
i.op[n].disps, pcrel, reloc_type);
@@ -3748,7 +3811,8 @@
* confusing to do it this way. */
if ((reloc_type == BFD_RELOC_32
- || reloc_type == BFD_RELOC_X86_64_32S)
+ || reloc_type == BFD_RELOC_X86_64_32S
+ || reloc_type == BFD_RELOC_64)
&& GOT_symbol
&& GOT_symbol == i.op[n].imms->X_add_symbol
&& (i.op[n].imms->X_op == O_symbol
@@ -3774,8 +3838,10 @@
if (!object_64bit)
reloc_type = BFD_RELOC_386_GOTPC;
- else
+ else if (size == 4)
reloc_type = BFD_RELOC_X86_64_GOTPC32;
+ else if (size == 8)
+ reloc_type = BFD_RELOC_X86_64_GOTPC64;
i.op[n].imms->X_add_number += add;
}
fix_new_exp (frag_now, p - frag_now->fr_literal, size,
@@ -3828,12 +3894,19 @@
int *adjust,
unsigned int *types)
{
+ /* Some of the relocations depend on the size of what field is to
+ be relocated. But in our callers i386_immediate and i386_displacement
+ we don't yet know the operand size (this will be set by insn
+ matching). Hence we record the word32 relocation here,
+ and adjust the reloc according to the real size in reloc(). */
static const struct {
const char *str;
const enum bfd_reloc_code_real rel[2];
const unsigned int types64;
} gotrel[] = {
+ { "PLTOFF", { 0, BFD_RELOC_X86_64_PLTOFF64 }, Imm64 },
{ "PLT", { BFD_RELOC_386_PLT32, BFD_RELOC_X86_64_PLT32 }, Imm32|Imm32S|Disp32 },
+ { "GOTPLT", { 0, BFD_RELOC_X86_64_GOTPLT64 }, Imm64|Disp64 },
{ "GOTOFF", { BFD_RELOC_386_GOTOFF, BFD_RELOC_X86_64_GOTOFF64 }, Imm64|Disp64 },
{ "GOTPCREL", { 0, BFD_RELOC_X86_64_GOTPCREL }, Imm32|Imm32S|Disp32 },
{ "TLSGD", { BFD_RELOC_386_TLS_GD, BFD_RELOC_X86_64_TLSGD }, Imm32|Imm32S|Disp32 },
@@ -3845,7 +3918,9 @@
{ "DTPOFF", { BFD_RELOC_386_TLS_LDO_32, BFD_RELOC_X86_64_DTPOFF32 }, Imm32|Imm32S|Imm64|Disp32|Disp64 },
{ "GOTNTPOFF",{ BFD_RELOC_386_TLS_GOTIE, 0 }, 0 },
{ "INDNTPOFF",{ BFD_RELOC_386_TLS_IE, 0 }, 0 },
- { "GOT", { BFD_RELOC_386_GOT32, BFD_RELOC_X86_64_GOT32 }, Imm32|Imm32S|Disp32 }
+ { "GOT", { BFD_RELOC_386_GOT32, BFD_RELOC_X86_64_GOT32 }, Imm32|Imm32S|Disp32|Imm64 },
+ { "TLSDESC", { BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_X86_64_GOTPC32_TLSDESC }, Imm32|Imm32S|Disp32 },
+ { "TLSCALL", { BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_TLSDESC_CALL }, Imm32|Imm32S|Disp32 }
};
char *cp;
unsigned int j;
@@ -4903,6 +4978,20 @@
}
}
+ /* If size if less then four we are sure that the operand fits,
+ but if it's 4, then it could be that the displacement is larger
+ then -/+ 2GB. */
+ if (DISP_SIZE_FROM_RELAX_STATE (fragP->fr_subtype) == 4
+ && object_64bit
+ && ((addressT) (displacement_from_opcode_start - extension
+ + ((addressT) 1 << 31))
+ > (((addressT) 2 << 31) - 1)))
+ {
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("jump target out of range"));
+ /* Make us emit 0. */
+ displacement_from_opcode_start = extension;
+ }
/* Now put displacement after opcode. */
md_number_to_chars ((char *) where_to_put_displacement,
(valueT) (displacement_from_opcode_start - extension),
@@ -5052,9 +5141,11 @@
case BFD_RELOC_386_TLS_IE_32:
case BFD_RELOC_386_TLS_IE:
case BFD_RELOC_386_TLS_GOTIE:
+ case BFD_RELOC_386_TLS_GOTDESC:
case BFD_RELOC_X86_64_TLSGD:
case BFD_RELOC_X86_64_TLSLD:
case BFD_RELOC_X86_64_GOTTPOFF:
+ case BFD_RELOC_X86_64_GOTPC32_TLSDESC:
value = 0; /* Fully resolved at runtime. No addend. */
/* Fallthrough */
case BFD_RELOC_386_TLS_LE:
@@ -5067,6 +5158,13 @@
S_SET_THREAD_LOCAL (fixP->fx_addsy);
break;
+ case BFD_RELOC_386_TLS_DESC_CALL:
+ case BFD_RELOC_X86_64_TLSDESC_CALL:
+ value = 0; /* Fully resolved at runtime. No addend. */
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ fixP->fx_done = 0;
+ return;
+
case BFD_RELOC_386_GOT32:
case BFD_RELOC_X86_64_GOT32:
value = 0; /* Fully resolved at runtime. No addend. */
@@ -5644,6 +5742,8 @@
case BFD_RELOC_386_TLS_GOTIE:
case BFD_RELOC_386_TLS_LE_32:
case BFD_RELOC_386_TLS_LE:
+ case BFD_RELOC_386_TLS_GOTDESC:
+ case BFD_RELOC_386_TLS_DESC_CALL:
case BFD_RELOC_X86_64_TLSGD:
case BFD_RELOC_X86_64_TLSLD:
case BFD_RELOC_X86_64_DTPOFF32:
@@ -5653,6 +5753,13 @@
case BFD_RELOC_X86_64_TPOFF64:
case BFD_RELOC_X86_64_GOTOFF64:
case BFD_RELOC_X86_64_GOTPC32:
+ case BFD_RELOC_X86_64_GOT64:
+ case BFD_RELOC_X86_64_GOTPCREL64:
+ case BFD_RELOC_X86_64_GOTPC64:
+ case BFD_RELOC_X86_64_GOTPLT64:
+ case BFD_RELOC_X86_64_PLTOFF64:
+ case BFD_RELOC_X86_64_GOTPC32_TLSDESC:
+ case BFD_RELOC_X86_64_TLSDESC_CALL:
case BFD_RELOC_RVA:
case BFD_RELOC_VTABLE_ENTRY:
case BFD_RELOC_VTABLE_INHERIT:
@@ -5719,6 +5826,12 @@
else
code = BFD_RELOC_X86_64_GOTPC32;
}
+ if ((code == BFD_RELOC_64 || code == BFD_RELOC_64_PCREL)
+ && GOT_symbol
+ && fixp->fx_addsy == GOT_symbol)
+ {
+ code = BFD_RELOC_X86_64_GOTPC64;
+ }
rel = (arelent *) xmalloc (sizeof (arelent));
rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
@@ -5749,6 +5862,8 @@
case BFD_RELOC_X86_64_TLSGD:
case BFD_RELOC_X86_64_TLSLD:
case BFD_RELOC_X86_64_GOTTPOFF:
+ case BFD_RELOC_X86_64_GOTPC32_TLSDESC:
+ case BFD_RELOC_X86_64_TLSDESC_CALL:
rel->addend = fixp->fx_offset - fixp->fx_size;
break;
default:
Modified: branches/binutils/package/gas/config/tc-i386.h
===================================================================
--- branches/binutils/package/gas/config/tc-i386.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-i386.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -184,6 +184,7 @@
#define CpuPadLock 0x40000 /* VIA PadLock required */
#define CpuSVME 0x80000 /* AMD Secure Virtual Machine Ext-s required */
#define CpuVMX 0x100000 /* VMX Instructions required */
+#define CpuMNI 0x200000 /* Merom New Instructions required */
/* These flags are set by gas depending on the flag_code. */
#define Cpu64 0x4000000 /* 64bit support required */
@@ -192,7 +193,7 @@
/* The default value for unknown CPUs - enable all features to avoid problems. */
#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \
|CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|CpuVMX \
- |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME)
+ |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME|CpuMNI)
/* the bits in opcode_modifier are used to generate the final opcode from
the base_opcode. These bits also are used to detect alternate forms of
Modified: branches/binutils/package/gas/config/tc-ia64.c
===================================================================
--- branches/binutils/package/gas/config/tc-ia64.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-ia64.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
@@ -5914,6 +5914,17 @@
return OPERAND_MATCH;
break;
+ case IA64_OPND_IMMU5b:
+ if (e->X_op == O_constant)
+ {
+ val = e->X_add_number;
+ if (val >= 32 && val <= 63)
+ return OPERAND_MATCH;
+ else
+ return OPERAND_OUT_OF_RANGE;
+ }
+ break;
+
case IA64_OPND_CCNT5:
case IA64_OPND_CNT5:
case IA64_OPND_CNT6:
@@ -6844,6 +6855,10 @@
changing NOPs in front of this slot. */
for (j = i; j < 3; ++j)
insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
+
+ /* We just picked a template that includes the stop bit in the
+ middle, so we don't need another one emitted later. */
+ md.slot[curr].end_of_insn_group = 0;
}
template = required_template;
}
@@ -8327,6 +8342,8 @@
IC:rse-writers.
15+16) Represents reserved instructions, which the assembler does not
generate.
+ 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
+ mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
Memory resources (i.e. locations in memory) are *not* marked or tracked by
this code; there are no dependency violations based on memory access.
@@ -9415,8 +9432,9 @@
break;
case IA64_RS_CRX:
- /* Handle all CR[REG] resources */
- if (note == 0 || note == 1)
+ /* Handle all CR[REG] resources.
+ ??? FIXME: The rule 17 isn't really handled correctly. */
+ if (note == 0 || note == 1 || note == 17)
{
if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
{
Modified: branches/binutils/package/gas/config/tc-m32c.c
===================================================================
--- branches/binutils/package/gas/config/tc-m32c.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-m32c.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -55,6 +55,9 @@
}
m32c_insn;
+#define rl_for(insn) (CGEN_ATTR_CGEN_INSN_RL_TYPE_VALUE (&(insn.insn->base->attrs)))
+#define relaxable(insn) (CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE (&(insn.insn->base->attrs)))
+
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "|";
@@ -67,11 +70,13 @@
/* assembler options */
#define OPTION_CPU_M16C (OPTION_MD_BASE)
#define OPTION_CPU_M32C (OPTION_MD_BASE + 1)
+#define OPTION_LINKRELAX (OPTION_MD_BASE + 2)
struct option md_longopts[] =
{
{ "m16c", no_argument, NULL, OPTION_CPU_M16C },
{ "m32c", no_argument, NULL, OPTION_CPU_M32C },
+ { "relax", no_argument, NULL, OPTION_LINKRELAX },
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
@@ -84,6 +89,7 @@
static unsigned long m32c_mach = bfd_mach_m16c;
static int cpu_mach = (1 << MACH_M16C);
static int insn_size;
+static int m32c_relax = 0;
/* Flags to set in the elf header */
static flagword m32c_flags = DEFAULT_FLAGS;
@@ -118,6 +124,10 @@
set_isa (ISA_M32C);
break;
+ case OPTION_LINKRELAX:
+ m32c_relax = 1;
+ break;
+
default:
return 0;
}
@@ -153,7 +163,7 @@
md_begin (void)
{
/* Initialize the `cgen' interface. */
-
+
/* Set the machine number and endian. */
gas_cgen_cpu_desc = m32c_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, cpu_mach,
CGEN_CPU_OPEN_ENDIAN,
@@ -320,6 +330,8 @@
static int last_insn_had_delay_slot = 0;
m32c_insn insn;
char * errmsg;
+ finished_insnS results;
+ int rl_type;
if (m32c_mach == bfd_mach_m32c && m32c_indirect_operand (str))
return;
@@ -336,13 +348,46 @@
return;
}
+ results.num_fixups = 0;
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
- CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
+ CGEN_FIELDS_BITSIZE (& insn.fields), 1, &results);
last_insn_had_delay_slot
= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
insn_size = CGEN_INSN_BITSIZE(insn.insn);
+
+ rl_type = rl_for (insn);
+
+ /* We have to mark all the jumps, because we need to adjust them
+ when we delete bytes, but we only need to mark the displacements
+ if they're symbolic - if they're not, we've already picked the
+ shortest opcode by now. The linker, however, will still have to
+ check any operands to see if they're the displacement type, since
+ we don't know (nor record) *which* operands are relaxable. */
+ if (m32c_relax
+ && rl_type != RL_TYPE_NONE
+ && (rl_type == RL_TYPE_JUMP || results.num_fixups)
+ && !relaxable (insn))
+ {
+ int reloc = 0;
+ int addend = results.num_fixups + 16 * insn_size/8;
+
+ switch (rl_for (insn))
+ {
+ case RL_TYPE_JUMP: reloc = BFD_RELOC_M32C_RL_JUMP; break;
+ case RL_TYPE_1ADDR: reloc = BFD_RELOC_M32C_RL_1ADDR; break;
+ case RL_TYPE_2ADDR: reloc = BFD_RELOC_M32C_RL_2ADDR; break;
+ }
+ if (insn.insn->base->num == M32C_INSN_JMP16_S
+ || insn.insn->base->num == M32C_INSN_JMP32_S)
+ addend = 0x10;
+
+ fix_new (results.frag,
+ results.addr - results.frag->fr_literal,
+ 0, abs_section_sym, addend, 0,
+ reloc);
+ }
}
/* The syntax in the manual says constants begin with '#'.
@@ -551,18 +596,26 @@
int operand;
int new_insn;
int where = fragP->fr_opcode - fragP->fr_literal;
+ int rl_where = fragP->fr_opcode - fragP->fr_literal;
unsigned char *op = (unsigned char *)fragP->fr_opcode;
+ int op_base = 0;
+ int op_op = 0;
+ int rl_addend = 0;
addend = target_address_for (fragP) - (fragP->fr_address + where);
new_insn = subtype_mappings[fragP->fr_subtype].insn;
fragP->fr_fix = where + subtype_mappings[fragP->fr_subtype].bytes;
+ op_base = 0;
+
switch (subtype_mappings[fragP->fr_subtype].insn)
{
case M32C_INSN_JCND16_5:
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
+ op_op = 1;
+ rl_addend = 0x21;
break;
case -M32C_MACRO_JCND16_5_W:
@@ -574,6 +627,9 @@
operand = M32C_OPERAND_LAB_8_16;
where += 2;
new_insn = M32C_INSN_JMP16_W;
+ op_base = 2;
+ op_op = 3;
+ rl_addend = 0x51;
break;
case -M32C_MACRO_JCND16_5_A:
@@ -583,12 +639,18 @@
operand = M32C_OPERAND_LAB_8_24;
where += 2;
new_insn = M32C_INSN_JMP16_A;
+ op_base = 2;
+ op_op = 3;
+ rl_addend = 0x61;
break;
case M32C_INSN_JCND16:
op[2] = addend - 2;
operand = M32C_OPERAND_LAB_16_8;
+ op_base = 0;
+ op_op = 2;
+ rl_addend = 0x31;
break;
case -M32C_MACRO_JCND16_W:
@@ -600,6 +662,9 @@
operand = M32C_OPERAND_LAB_8_16;
where += 3;
new_insn = M32C_INSN_JMP16_W;
+ op_base = 3;
+ op_op = 4;
+ rl_addend = 0x61;
break;
case -M32C_MACRO_JCND16_A:
@@ -609,17 +674,26 @@
operand = M32C_OPERAND_LAB_8_24;
where += 3;
new_insn = M32C_INSN_JMP16_A;
+ op_base = 3;
+ op_op = 4;
+ rl_addend = 0x71;
break;
case M32C_INSN_JMP16_S:
op[0] = 0x60 | ((addend-2) & 0x07);
operand = M32C_OPERAND_LAB_5_3;
+ op_base = 0;
+ op_op = 0;
+ rl_addend = 0x10;
break;
case M32C_INSN_JMP16_B:
op[0] = 0xfe;
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x21;
break;
case M32C_INSN_JMP16_W:
@@ -627,6 +701,9 @@
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x31;
break;
case M32C_INSN_JMP16_A:
@@ -635,11 +712,17 @@
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x41;
break;
case M32C_INSN_JCND32:
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x21;
break;
case -M32C_MACRO_JCND32_W:
@@ -651,6 +734,9 @@
operand = M32C_OPERAND_LAB_8_16;
where += 2;
new_insn = M32C_INSN_JMP32_W;
+ op_base = 2;
+ op_op = 3;
+ rl_addend = 0x51;
break;
case -M32C_MACRO_JCND32_A:
@@ -660,6 +746,9 @@
operand = M32C_OPERAND_LAB_8_24;
where += 2;
new_insn = M32C_INSN_JMP32_A;
+ op_base = 2;
+ op_op = 3;
+ rl_addend = 0x61;
break;
@@ -668,12 +757,18 @@
addend = ((addend-2) & 0x07);
op[0] = 0x4a | (addend & 0x01) | ((addend << 3) & 0x30);
operand = M32C_OPERAND_LAB32_JMP_S;
+ op_base = 0;
+ op_op = 0;
+ rl_addend = 0x10;
break;
case M32C_INSN_JMP32_B:
op[0] = 0xbb;
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x21;
break;
case M32C_INSN_JMP32_W:
@@ -681,6 +776,9 @@
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x31;
break;
case M32C_INSN_JMP32_A:
@@ -689,6 +787,9 @@
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x41;
break;
@@ -697,6 +798,9 @@
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x31;
break;
case M32C_INSN_JSR16_A:
@@ -705,6 +809,9 @@
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x41;
break;
case M32C_INSN_JSR32_W:
@@ -712,6 +819,9 @@
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x31;
break;
case M32C_INSN_JSR32_A:
@@ -720,6 +830,9 @@
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
+ op_base = 0;
+ op_op = 1;
+ rl_addend = 0x41;
break;
@@ -731,8 +844,21 @@
abort();
}
+ if (m32c_relax)
+ {
+ if (operand != M32C_OPERAND_LAB_8_24)
+ fragP->fr_offset = (fragP->fr_address + where);
+
+ fix_new (fragP,
+ rl_where,
+ 0, abs_section_sym, rl_addend, 0,
+ BFD_RELOC_M32C_RL_JUMP);
+ }
+
if (S_GET_SEGMENT (fragP->fr_symbol) != sec
- || operand == M32C_OPERAND_LAB_8_24)
+ || operand == M32C_OPERAND_LAB_8_24
+ || (m32c_relax && (operand != M32C_OPERAND_LAB_5_3
+ && operand != M32C_OPERAND_LAB32_JMP_S)))
{
assert (fragP->fr_cgen.insn != 0);
gas_cgen_record_fixup (fragP,
@@ -786,11 +912,15 @@
} op_reloc_table[] = {
/* PC-REL relocs for 8-bit fields. */
+ { M32C_OPERAND_LAB_8_8, BFD_RELOC_8_PCREL, 1 },
{ M32C_OPERAND_LAB_16_8, BFD_RELOC_8_PCREL, 2 },
{ M32C_OPERAND_LAB_24_8, BFD_RELOC_8_PCREL, 3 },
{ M32C_OPERAND_LAB_32_8, BFD_RELOC_8_PCREL, 4 },
{ M32C_OPERAND_LAB_40_8, BFD_RELOC_8_PCREL, 5 },
+ /* PC-REL relocs for 16-bit fields. */
+ { M32C_OPERAND_LAB_8_16, BFD_RELOC_16_PCREL, 1 },
+
/* Absolute relocs for 8-bit fields. */
{ M32C_OPERAND_IMM_8_QI, BFD_RELOC_8, 1 },
{ M32C_OPERAND_IMM_16_QI, BFD_RELOC_8, 2 },
@@ -890,6 +1020,38 @@
return BFD_RELOC_NONE;
}
+void
+m32c_apply_fix (struct fix *f, valueT *t, segT s)
+{
+ if (f->fx_r_type == BFD_RELOC_M32C_RL_JUMP
+ || f->fx_r_type == BFD_RELOC_M32C_RL_1ADDR
+ || f->fx_r_type == BFD_RELOC_M32C_RL_2ADDR)
+ return;
+ gas_cgen_md_apply_fix (f, t, s);
+}
+
+arelent *
+tc_gen_reloc (asection *sec, fixS *fx)
+{
+ if (fx->fx_r_type == BFD_RELOC_M32C_RL_JUMP
+ || fx->fx_r_type == BFD_RELOC_M32C_RL_1ADDR
+ || fx->fx_r_type == BFD_RELOC_M32C_RL_2ADDR)
+ {
+ arelent * reloc;
+
+ reloc = xmalloc (sizeof (* reloc));
+
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fx->fx_addsy);
+ reloc->address = fx->fx_frag->fr_address + fx->fx_where;
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fx->fx_r_type);
+ reloc->addend = fx->fx_offset;
+ return reloc;
+
+ }
+ return gas_cgen_tc_gen_reloc (sec, fx);
+}
+
/* See whether we need to force a relocation into the output file.
This is used to force out switch and PC relative relocations when
relaxing. */
@@ -914,12 +1076,40 @@
case M32C_OPERAND_DSP_24_U16:
case M32C_OPERAND_IMM_24_HI:
return 1;
+
+ /* If we're doing linker relaxing, we need to keep all the
+ pc-relative jumps in case we need to fix them due to
+ deleted bytes between the jump and its destination. */
+ case M32C_OPERAND_LAB_8_8:
+ case M32C_OPERAND_LAB_8_16:
+ case M32C_OPERAND_LAB_8_24:
+ case M32C_OPERAND_LAB_16_8:
+ case M32C_OPERAND_LAB_24_8:
+ case M32C_OPERAND_LAB_32_8:
+ case M32C_OPERAND_LAB_40_8:
+ if (m32c_relax)
+ return 1;
+ default:
+ break;
}
}
else
{
- if (fixp->fx_r_type == BFD_RELOC_16)
- return 1;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_16:
+ return 1;
+
+ case BFD_RELOC_M32C_RL_JUMP:
+ case BFD_RELOC_M32C_RL_1ADDR:
+ case BFD_RELOC_M32C_RL_2ADDR:
+ case BFD_RELOC_8_PCREL:
+ case BFD_RELOC_16_PCREL:
+ if (m32c_relax)
+ return 1;
+ default:
+ break;
+ }
}
return generic_force_reloc (fixp);
@@ -1065,6 +1255,9 @@
if (S_GET_SEGMENT (fixP->fx_addsy)->flags & SEC_MERGE)
return 0;
+ if (m32c_relax)
+ return 0;
+
return 1;
}
Modified: branches/binutils/package/gas/config/tc-m32c.h
===================================================================
--- branches/binutils/package/gas/config/tc-m32c.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-m32c.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -47,7 +47,8 @@
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
-#define md_apply_fix gas_cgen_md_apply_fix
+#define md_apply_fix m32c_apply_fix
+extern void m32c_apply_fix PARAMS ((struct fix *, valueT *, segT));
#define tc_fix_adjustable(fixP) m32c_fix_adjustable (fixP)
extern bfd_boolean m32c_fix_adjustable PARAMS ((struct fix *));
@@ -66,8 +67,6 @@
/* Values passed to md_apply_fix don't include the symbol value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
-#define tc_gen_reloc gas_cgen_tc_gen_reloc
-
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
Modified: branches/binutils/package/gas/config/tc-m68k.c
===================================================================
--- branches/binutils/package/gas/config/tc-m68k.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-m68k.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-m68k.c -- Assemble for the m68k family
Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -152,46 +152,86 @@
#define getone(x) ((((x)->m_opcode)>>16)&0xffff)
#define gettwo(x) (((x)->m_opcode)&0xffff)
-static const enum m68k_register m68000_control_regs[] = { 0 };
-static const enum m68k_register m68010_control_regs[] = {
+static const enum m68k_register m68000_ctrl[] = { 0 };
+static const enum m68k_register m68010_ctrl[] = {
SFC, DFC, USP, VBR,
0
};
-static const enum m68k_register m68020_control_regs[] = {
+static const enum m68k_register m68020_ctrl[] = {
SFC, DFC, USP, VBR, CACR, CAAR, MSP, ISP,
0
};
-static const enum m68k_register m68040_control_regs[] = {
+static const enum m68k_register m68040_ctrl[] = {
SFC, DFC, CACR, TC, ITT0, ITT1, DTT0, DTT1,
USP, VBR, MSP, ISP, MMUSR, URP, SRP,
0
};
-static const enum m68k_register m68060_control_regs[] = {
+static const enum m68k_register m68060_ctrl[] = {
SFC, DFC, CACR, TC, ITT0, ITT1, DTT0, DTT1, BUSCR,
USP, VBR, URP, SRP, PCR,
0
};
-static const enum m68k_register mcf_control_regs[] = {
+static const enum m68k_register mcf_ctrl[] = {
CACR, TC, ACR0, ACR1, ACR2, ACR3, VBR, ROMBAR,
RAMBAR0, RAMBAR1, MBAR,
0
};
-static const enum m68k_register mcf5249_control_regs[] = {
- CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR1, MBAR, MBAR2,
+static const enum m68k_register mcf5208_ctrl[] = {
+ CACR, ACR0, ACR1, VBR, RAMBAR1,
0
};
-static const enum m68k_register mcf528x_control_regs[] = {
- CACR, ACR0, ACR1, VBR, FLASHBAR, RAMBAR,
+static const enum m68k_register mcf5213_ctrl[] = {
+ VBR, RAMBAR, FLASHBAR,
0
};
-static const enum m68k_register mcfv4e_control_regs[] = {
+static const enum m68k_register mcf5216_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5235_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5249_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR1, MBAR, MBAR2,
+ 0
+};
+static const enum m68k_register mcf5250_ctrl[] = {
+ VBR,
+ 0
+};
+static const enum m68k_register mcf5271_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5272_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, ROMBAR, RAMBAR, MBAR,
+ 0
+};
+static const enum m68k_register mcf5275_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5282_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5329_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR,
+ 0
+};
+static const enum m68k_register mcf5373_ctrl[] = {
+ VBR, CACR, ACR0, ACR1, RAMBAR,
+ 0
+};
+static const enum m68k_register mcfv4e_ctrl[] = {
CACR, TC, ITT0, ITT1, DTT0, DTT1, BUSCR, VBR, PC, ROMBAR,
ROMBAR1, RAMBAR0, RAMBAR1, MPCR, EDRAMBAR, SECMBAR, MBAR, MBAR0, MBAR1,
PCR1U0, PCR1L0, PCR1U1, PCR1L1, PCR2U0, PCR2L0, PCR2U1, PCR2L1,
PCR3U0, PCR3L0, PCR3U1, PCR3L1,
0
};
-#define cpu32_control_regs m68010_control_regs
+#define cpu32_ctrl m68010_ctrl
static const enum m68k_register *control_regs;
@@ -348,90 +388,179 @@
static void s_mri_until (int);
static void s_mri_while (int);
static void s_mri_endw (int);
+static void s_m68k_cpu (int);
+static void s_m68k_arch (int);
+struct m68k_cpu
+{
+ unsigned long arch; /* Architecture features. */
+ const enum m68k_register *control_regs; /* Control regs on chip */
+ const char *name; /* Name */
+ int alias; /* Alias for a cannonical name. If 1, then
+ succeeds canonical name, if -1 then
+ succeeds canonical name, if <-1 ||>1 this is a
+ deprecated name, and the next/previous name
+ should be used. */
+};
+
+/* We hold flags for features explicitly enabled and explicitly
+ disabled. */
static int current_architecture;
-static int current_chip;
+static int not_current_architecture;
+static const struct m68k_cpu *selected_arch;
+static const struct m68k_cpu *selected_cpu;
+static int initialized;
-struct m68k_cpu
- {
- unsigned long arch;
- unsigned long chip;
- const char *name;
- int alias;
- };
+/* Architecture models. */
+static const struct m68k_cpu m68k_archs[] =
+{
+ {m68000, m68000_ctrl, "68000", 0},
+ {m68010, m68010_ctrl, "68010", 0},
+ {m68020|m68881|m68851, m68020_ctrl, "68020", 0},
+ {m68030|m68881|m68851, m68020_ctrl, "68030", 0},
+ {m68040, m68040_ctrl, "68040", 0},
+ {m68060, m68060_ctrl, "68060", 0},
+ {cpu32|m68881, cpu32_ctrl, "cpu32", 0},
+ {mcfisa_a|mcfhwdiv, NULL, "isaa", 0},
+ {mcfisa_a|mcfhwdiv|mcfisa_aa|mcfusp, NULL, "isaaplus", 0},
+ {mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp, NULL, "isab", 0},
+ {mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac|mcfusp, mcf_ctrl, "cfv4", 0},
+ {mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "cfv4e", 0},
+ {0,0,NULL, 0}
+};
-static const struct m68k_cpu archs[] =
- {
- { m68000, m68000, "68000", 0 },
- { m68010, m68010, "68010", 0 },
- { m68020, m68020, "68020", 0 },
- { m68030, m68030, "68030", 0 },
- { m68040, m68040, "68040", 0 },
- { m68060, m68060, "68060", 0 },
- { cpu32, cpu32, "cpu32", 0 },
- { m68881, m68881, "68881", 0 },
- { m68851, m68851, "68851", 0 },
- { mcfisa_a, mcf5200, "5200", 0 },
- { mcfisa_a|mcfhwdiv|mcfmac, mcf5206e, "5206e", 0 },
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf521x, "521x", 0 },
- { mcfisa_a|mcfhwdiv|mcfemac, mcf5249, "5249", 0 },
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf528x, "528x", 0 },
- { mcfisa_a|mcfhwdiv|mcfmac, mcf5307, "5307", 0 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac, mcf5407, "5407", 0 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "547x", 0 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5480, "548x", 0 },
- /* Aliases (effectively, so far as gas is concerned) for the above
- cpus. */
- { m68020, m68020, "68k", 1 },
- { m68000, m68000, "68008", 1 },
- { m68000, m68000, "68302", 1 },
- { m68000, m68000, "68306", 1 },
- { m68000, m68000, "68307", 1 },
- { m68000, m68000, "68322", 1 },
- { m68000, m68000, "68356", 1 },
- { m68000, m68000, "68ec000", 1 },
- { m68000, m68000, "68hc000", 1 },
- { m68000, m68000, "68hc001", 1 },
- { m68020, m68020, "68ec020", 1 },
- { m68030, m68030, "68ec030", 1 },
- { m68040, m68040, "68ec040", 1 },
- { m68060, m68060, "68ec060", 1 },
- { cpu32, cpu32, "68330", 1 },
- { cpu32, cpu32, "68331", 1 },
- { cpu32, cpu32, "68332", 1 },
- { cpu32, cpu32, "68333", 1 },
- { cpu32, cpu32, "68334", 1 },
- { cpu32, cpu32, "68336", 1 },
- { cpu32, cpu32, "68340", 1 },
- { cpu32, cpu32, "68341", 1 },
- { cpu32, cpu32, "68349", 1 },
- { cpu32, cpu32, "68360", 1 },
- { m68881, m68881, "68882", 1 },
- { mcfisa_a, mcf5200, "5202", 1 },
- { mcfisa_a, mcf5200, "5204", 1 },
- { mcfisa_a, mcf5200, "5206", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_aa|mcfemac, mcf521x, "5214", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_aa|mcfemac, mcf521x, "5216", 1 },
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac, mcf528x, "5280", 1 },
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac, mcf528x, "5281", 1 },
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac, mcf528x, "5282", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac, mcf5407, "cfv4", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5470", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5471", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5472", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5473", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5474", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5475", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5480", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5481", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5482", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5483", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5484", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "5485", 1 },
- { mcfisa_a|mcfhwdiv|mcfisa_b|mcfemac|mcfusp|cfloat, mcf5470, "cfv4e", 1 },
+/* Architecture extensions, here 'alias' -1 for m68k, +1 for cf and 0
+ for either. */
+static const struct m68k_cpu m68k_extensions[] =
+{
+ {m68851, NULL, "68851", -1},
+ {m68881, NULL, "68881", -1},
+ {m68881, NULL, "68882", -1},
+
+ {cfloat|m68881, NULL, "float", 0},
+
+ {mcfhwdiv, NULL, "div", 1},
+ {mcfusp, NULL, "usp", 1},
+ {mcfmac, NULL, "mac", 1},
+ {mcfemac, NULL, "emac", 1},
+
+ {0,NULL,NULL, 0}
+};
+
+/* Processor list */
+static const struct m68k_cpu m68k_cpus[] =
+{
+ {m68000, m68000_ctrl, "68000", 0},
+ {m68000, m68000_ctrl, "68ec000", 1},
+ {m68000, m68000_ctrl, "68hc000", 1},
+ {m68000, m68000_ctrl, "68hc001", 1},
+ {m68000, m68000_ctrl, "68008", 1},
+ {m68000, m68000_ctrl, "68302", 1},
+ {m68000, m68000_ctrl, "68306", 1},
+ {m68000, m68000_ctrl, "68307", 1},
+ {m68000, m68000_ctrl, "68322", 1},
+ {m68000, m68000_ctrl, "68356", 1},
+ {m68010, m68010_ctrl, "68010", 0},
+ {m68020|m68881|m68851, m68020_ctrl, "68020", 0},
+ {m68020|m68881|m68851, m68020_ctrl, "68k", 1},
+ {m68020|m68881|m68851, m68020_ctrl, "68ec020", 1},
+ {m68030|m68881|m68851, m68020_ctrl, "68030", 0},
+ {m68030|m68881|m68851, m68020_ctrl, "68ec030", 1},
+ {m68040, m68040_ctrl, "68040", 0},
+ {m68040, m68040_ctrl, "68ec040", 1},
+ {m68060, m68060_ctrl, "68060", 0},
+ {m68060, m68060_ctrl, "68ec060", 1},
+
+ {cpu32|m68881, cpu32_ctrl, "cpu32", 0},
+ {cpu32|m68881, cpu32_ctrl, "68330", 1},
+ {cpu32|m68881, cpu32_ctrl, "68331", 1},
+ {cpu32|m68881, cpu32_ctrl, "68332", 1},
+ {cpu32|m68881, cpu32_ctrl, "68333", 1},
+ {cpu32|m68881, cpu32_ctrl, "68334", 1},
+ {cpu32|m68881, cpu32_ctrl, "68336", 1},
+ {cpu32|m68881, cpu32_ctrl, "68340", 1},
+ {cpu32|m68881, cpu32_ctrl, "68341", 1},
+ {cpu32|m68881, cpu32_ctrl, "68349", 1},
+ {cpu32|m68881, cpu32_ctrl, "68360", 1},
+
+ {mcfisa_a, mcf_ctrl, "5200", 0},
+ {mcfisa_a, mcf_ctrl, "5202", 1},
+ {mcfisa_a, mcf_ctrl, "5204", 1},
+ {mcfisa_a, mcf_ctrl, "5206", 1},
+
+ {mcfisa_a|mcfhwdiv|mcfmac, mcf_ctrl, "5206e", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5208_ctrl, "5207", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5208_ctrl, "5208", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, mcf5213_ctrl, "5211", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, mcf5213_ctrl, "5212", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, mcf5213_ctrl, "5213", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5216_ctrl, "5214", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5216_ctrl, "5216", 0},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5216_ctrl, "521x", 2},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5235_ctrl, "5232", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5235_ctrl, "5233", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5235_ctrl, "5234", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5235_ctrl, "5235", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5235_ctrl, "523x", 0},
+
+ {mcfisa_a|mcfhwdiv|mcfemac, mcf5249_ctrl, "5249", 0},
+ {mcfisa_a|mcfhwdiv|mcfemac, mcf5250_ctrl, "5250", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5271_ctrl, "5270", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5271_ctrl, "5271", 0},
+
+ {mcfisa_a|mcfhwdiv|mcfmac, mcf5272_ctrl, "5272", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5275_ctrl, "5274", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5275_ctrl, "5275", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "5280", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "5281", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "5282", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "528x", 0},
+
+ {mcfisa_a|mcfhwdiv|mcfmac, mcf_ctrl, "5307", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "5327", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "5328", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "5329", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "532x", 0},
+
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5373_ctrl, "5372", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5373_ctrl, "5373", -1},
+ {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5373_ctrl, "537x", 0},
+
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfmac, mcf_ctrl, "5407",0},
+
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5470", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5471", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5472", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5473", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5474", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5475", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "547x", 0},
+
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5480", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5481", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5482", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5483", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5484", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "5485", -1},
+ {mcfisa_a|mcfisa_b|mcfhwdiv|mcfemac|mcfusp|cfloat, mcfv4e_ctrl, "548x", 0},
+
+ {0,NULL,NULL, 0}
};
-static const int n_archs = sizeof (archs) / sizeof (archs[0]);
+static const struct m68k_cpu *m68k_lookup_cpu
+(const char *, const struct m68k_cpu *, int, int *);
+static int m68k_set_arch (const char *, int, int);
+static int m68k_set_cpu (const char *, int, int);
+static int m68k_set_extension (const char *, int, int);
+static void m68k_init_arch (void);
/* This is the assembler relaxation table for m68k. m68k is a rich CISC
architecture and we have a lot of relaxation modes. */
@@ -577,6 +706,9 @@
{"extend", float_cons, 'x'},
{"ldouble", float_cons, 'x'},
+ {"arch", s_m68k_arch, 0},
+ {"cpu", s_m68k_cpu, 0},
+
/* The following pseudo-ops are supported for MRI compatibility. */
{"chip", s_chip, 0},
{"comline", s_space, 1},
@@ -670,74 +802,6 @@
|| (*s == ':' \
&& alt_notend_table[(unsigned char) s[1]])))
-/* Return a human readable string holding the list of chips that are
- valid for a particular architecture, suppressing aliases (unless
- there is only one of them). */
-
-static char *
-find_cf_chip (int architecture)
-{
- static char buf[1024];
- int i, j, n_chips, n_alias;
- char *cp;
-
- strcpy (buf, " (");
- cp = buf + strlen (buf);
-
- for (i = 0, n_chips = 0, n_alias = 0; i < n_archs; ++i)
- if (archs[i].arch & architecture)
- {
- n_chips++;
- if (archs[i].alias)
- n_alias++;
- }
-
- if (n_chips == 0)
- as_fatal (_("no matching ColdFire architectures found"));
-
- if (n_alias > 1)
- n_chips -= n_alias;
-
- for (i = 0, j = 0; i < n_archs && j < n_chips; ++i)
- if (archs[i].arch & architecture)
- {
- if (j)
- {
- if ((j == n_chips - 1 && !(n_alias > 1)) || ! n_alias)
- {
- if (n_chips == 2)
- {
- strncpy (cp, _(" or "), (sizeof (buf) - (cp - buf)));
- cp += strlen (cp);
- }
- else
- {
- strncpy (cp, _(", or "), (sizeof (buf) - (cp - buf)));
- cp += strlen (cp);
- }
- }
- else
- {
- strncpy (cp, ", ", (sizeof (buf) - (cp - buf)));
- cp += strlen (cp);
- }
- }
- strncpy (cp, archs[i].name, (sizeof (buf) - (cp - buf)));
- cp += strlen (cp);
- j++;
- }
-
- if (n_alias > 1)
- {
- strncpy (cp, _(", or aliases"), (sizeof (buf) - (cp - buf)));
- cp += strlen (cp);
- }
-
- strncpy (cp, ")", (sizeof (buf) - (cp - buf)));
-
- return buf;
-}
-
#ifdef OBJ_ELF
/* Return zero if the reference to SYMBOL from within the same segment may
@@ -1613,11 +1677,13 @@
case 'J':
if (opP->mode != CONTROL
|| opP->reg < USP
- || opP->reg > last_movec_reg)
+ || opP->reg > last_movec_reg
+ || !control_regs)
losing++;
else
{
const enum m68k_register *rp;
+
for (rp = control_regs; *rp; rp++)
if (*rp == opP->reg)
break;
@@ -1938,92 +2004,100 @@
if (ok_arch
&& !(ok_arch & current_architecture))
{
- char buf[200], *cp;
+ const struct m68k_cpu *cpu;
+ int any = 0;
+ size_t space = 400;
+ char *buf = xmalloc (space + 1);
+ size_t len;
+ int paren = 1;
- strncpy (buf,
- _("invalid instruction for this architecture; needs "),
- sizeof (buf));
- cp = buf + strlen (buf);
+ the_ins.error = buf;
+ /* Make sure there's a NUL at the end of the buffer -- strncpy
+ won't write one when it runs out of buffer */
+ buf[space] = 0;
+#define APPEND(STRING) \
+ (strncpy (buf, STRING, space), len = strlen (buf), buf += len, space -= len)
+
+ APPEND (_("invalid instruction for this architecture; needs "));
switch (ok_arch)
{
case mcfisa_a:
- strncpy (cp, _("ColdFire ISA_A"),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
- strncpy (cp, find_cf_chip (ok_arch),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
+ APPEND (_("ColdFire ISA_A"));
break;
case mcfhwdiv:
- strncpy (cp, _("ColdFire hardware divide"),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
- strncpy (cp, find_cf_chip (ok_arch),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
+ APPEND (_("ColdFire hardware divide"));
break;
case mcfisa_aa:
- strncpy (cp, _("ColdFire ISA_A+"),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
- strncpy (cp, find_cf_chip (ok_arch),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
+ APPEND (_("ColdFire ISA_A+"));
break;
case mcfisa_b:
- strncpy (cp, _("ColdFire ISA_B"),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
- strncpy (cp, find_cf_chip (ok_arch),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
+ APPEND (_("ColdFire ISA_B"));
break;
case cfloat:
- strncpy (cp, _("ColdFire fpu"), sizeof (buf) - (cp - buf));
- cp += strlen (cp);
- strncpy (cp, find_cf_chip (ok_arch),
- sizeof (buf) - (cp - buf));
- cp += strlen (cp);
+ APPEND (_("ColdFire fpu"));
break;
case mfloat:
- strcpy (cp, _("fpu (68040, 68060 or 68881/68882)"));
+ APPEND (_("M68K fpu"));
break;
case mmmu:
- strcpy (cp, _("mmu (68030 or 68851)"));
+ APPEND (_("M68K mmu"));
break;
case m68020up:
- strcpy (cp, _("68020 or higher"));
+ APPEND (_("68020 or higher"));
break;
case m68000up:
- strcpy (cp, _("68000 or higher"));
+ APPEND (_("68000 or higher"));
break;
case m68010up:
- strcpy (cp, _("68010 or higher"));
+ APPEND (_("68010 or higher"));
break;
default:
+ paren = 0;
+ }
+ if (paren)
+ APPEND (" (");
+
+ for (cpu = m68k_cpus; cpu->name; cpu++)
+ if (!cpu->alias && (cpu->arch & ok_arch))
{
- int got_one = 0, idx;
+ const struct m68k_cpu *alias;
- for (idx = 0; idx < n_archs; idx++)
+ if (any)
+ APPEND (", ");
+ any = 0;
+ APPEND (cpu->name);
+ APPEND (" [");
+ if (cpu != m68k_cpus)
+ for (alias = cpu - 1; alias->alias; alias--)
+ {
+ if (any)
+ APPEND (", ");
+ APPEND (alias->name);
+ any = 1;
+ }
+ for (alias = cpu + 1; alias->alias; alias++)
{
- if ((archs[idx].arch & ok_arch)
- && ! archs[idx].alias)
- {
- if (got_one)
- {
- strcpy (cp, " or ");
- cp += strlen (cp);
- }
- got_one = 1;
- strcpy (cp, archs[idx].name);
- cp += strlen (cp);
- }
+ if (any)
+ APPEND (", ");
+ APPEND (alias->name);
+ any = 1;
}
+
+ APPEND ("]");
+ any = 1;
}
+ if (paren)
+ APPEND (")");
+#undef APPEND
+ if (!space)
+ {
+ /* we ran out of space, so replace the end of the list
+ with ellipsis. */
+ buf -= 4;
+ while (*buf != ' ')
+ buf--;
+ strcpy (buf, " ...");
}
- cp = xmalloc (strlen (buf) + 1);
- strcpy (cp, buf);
- the_ins.error = cp;
}
else
the_ins.error = _("operands mismatch");
@@ -3825,8 +3899,6 @@
insert_reg (init_table[i].name, init_table[i].number);
}
-static int no_68851, no_68881;
-
void
md_assemble (char *str)
{
@@ -3838,6 +3910,17 @@
int shorts_this_frag;
fixS *fixP;
+ if (!selected_cpu && !selected_arch)
+ {
+ /* We've not selected an architecture yet. Set the default
+ now. We do this lazily so that an initial .cpu or .arch directive
+ can specify. */
+ if (!m68k_set_cpu (TARGET_CPU, 1, 1))
+ as_bad (_("unrecognized default cpu `%s'"), TARGET_CPU);
+ }
+ if (!initialized)
+ m68k_init_arch ();
+
/* In MRI mode, the instruction and operands are separated by a
space. Anything following the operands is a comment. The label
has already been removed. */
@@ -4271,114 +4354,6 @@
#endif
}
-static void
-select_control_regs (void)
-{
- /* Note which set of "movec" control registers is available. */
- switch (current_chip)
- {
- case 0:
- if (verbose)
- as_warn (_("architecture not yet selected: defaulting to 68020"));
- control_regs = m68020_control_regs;
- break;
-
- case m68000:
- control_regs = m68000_control_regs;
- break;
- case m68010:
- control_regs = m68010_control_regs;
- break;
- case m68020:
- case m68030:
- control_regs = m68020_control_regs;
- break;
- case m68040:
- control_regs = m68040_control_regs;
- break;
- case m68060:
- control_regs = m68060_control_regs;
- break;
- case cpu32:
- control_regs = cpu32_control_regs;
- break;
- case mcf5200:
- case mcf5206e:
- case mcf5307:
- case mcf5407:
- control_regs = mcf_control_regs;
- break;
- case mcf5249:
- control_regs = mcf5249_control_regs;
- break;
- case mcf528x:
- case mcf521x:
- control_regs = mcf528x_control_regs;
- break;
- case mcf5470:
- case mcf5480:
- control_regs = mcfv4e_control_regs;
- break;
- default:
- abort ();
- }
-}
-
-void
-m68k_init_after_args (void)
-{
- if (cpu_of_arch (current_architecture) == 0)
- {
- int i;
- const char *default_cpu = TARGET_CPU;
-
- if (*default_cpu == 'm')
- default_cpu++;
- for (i = 0; i < n_archs; i++)
- if (strcasecmp (default_cpu, archs[i].name) == 0)
- break;
- if (i == n_archs)
- {
- as_bad (_("unrecognized default cpu `%s' ???"), TARGET_CPU);
- current_architecture |= m68020;
- }
- else
- current_architecture |= archs[i].arch;
- }
- /* Permit m68881 specification with all cpus; those that can't work
- with a coprocessor could be doing emulation. */
- if (current_architecture & m68851)
- {
- if (current_architecture & m68040)
- as_warn (_("68040 and 68851 specified; mmu instructions may assemble incorrectly"));
- }
- /* What other incompatibilities could we check for? */
-
- /* Toss in some default assumptions about coprocessors. */
- if (!no_68881
- && (cpu_of_arch (current_architecture)
- /* Can CPU32 have a 68881 coprocessor?? */
- & (m68020 | m68030 | cpu32)))
- current_architecture |= m68881;
-
- if (!no_68851
- && (cpu_of_arch (current_architecture) & m68020up) != 0
- && (cpu_of_arch (current_architecture) & m68040up) == 0)
- current_architecture |= m68851;
-
- if (no_68881 && (current_architecture & m68881))
- as_bad (_("options for 68881 and no-68881 both given"));
-
- if (no_68851 && (current_architecture & m68851))
- as_bad (_("options for 68851 and no-68851 both given"));
-
- /* Note which set of "movec" control registers is available. */
- select_control_regs ();
-
- if (cpu_of_arch (current_architecture) < m68020
- || arch_coldfire_p (current_architecture))
- md_relax_table[TAB (PCINDEX, BYTE)].rlx_more = 0;
-}
/* This is called when a label is defined. */
@@ -5291,10 +5266,10 @@
while (is_part_of_name (c = *input_line_pointer++))
;
*--input_line_pointer = 0;
- for (i = 0; i < n_archs; i++)
- if (strcasecmp (s, archs[i].name) == 0)
+ for (i = 0; m68k_cpus[i].name; i++)
+ if (strcasecmp (s, m68k_cpus[i].name) == 0)
break;
- if (i >= n_archs)
+ if (!m68k_cpus[i].name)
{
as_bad (_("%s: unrecognized processor name"), s);
*input_line_pointer = c;
@@ -5307,8 +5282,8 @@
current_architecture = 0;
else
current_architecture &= m68881 | m68851;
- current_architecture |= archs[i].arch;
- current_chip = archs[i].chip;
+ current_architecture |= m68k_cpus[i].arch & ~(m68881 | m68851);
+ control_regs = m68k_cpus[i].control_regs;
while (*input_line_pointer == '/')
{
@@ -5325,9 +5300,6 @@
current_architecture |= m68851;
*input_line_pointer = c;
}
-
- /* Update info about available control registers. */
- select_control_regs ();
}
/* The MRI CHIP pseudo-op. */
@@ -5673,7 +5645,7 @@
int keep_locals;
int short_refs;
int architecture;
- int chip;
+ const enum m68k_register *control_regs;
int quick;
int rel32;
int listing;
@@ -5698,7 +5670,7 @@
s->keep_locals = flag_keep_locals;
s->short_refs = flag_short_refs;
s->architecture = current_architecture;
- s->chip = current_chip;
+ s->control_regs = control_regs;
s->quick = m68k_quick;
s->rel32 = m68k_rel32;
s->listing = listing;
@@ -5732,7 +5704,7 @@
flag_keep_locals = s->keep_locals;
flag_short_refs = s->short_refs;
current_architecture = s->architecture;
- current_chip = s->chip;
+ control_regs = s->control_regs;
m68k_quick = s->quick;
m68k_rel32 = s->rel32;
listing = s->listing;
@@ -6908,29 +6880,210 @@
demand_empty_rest_of_line ();
}
+/* Parse a .cpu directive. */
+
+static void
+s_m68k_cpu (int ignored ATTRIBUTE_UNUSED)
+{
+ char saved_char;
+ char *name;
+
+ if (initialized)
+ {
+ as_bad (_("already assembled instructions"));
+ ignore_rest_of_line ();
+ return;
+ }
+
+ name = input_line_pointer;
+ while (*input_line_pointer && !ISSPACE(*input_line_pointer))
+ input_line_pointer++;
+ saved_char = *input_line_pointer;
+ *input_line_pointer = 0;
+
+ m68k_set_cpu (name, 1, 0);
+
+ *input_line_pointer = saved_char;
+ demand_empty_rest_of_line ();
+ return;
+}
+
+/* Parse a .arch directive. */
+
+static void
+s_m68k_arch (int ignored ATTRIBUTE_UNUSED)
+{
+ char saved_char;
+ char *name;
+
+ if (initialized)
+ {
+ as_bad (_("already assembled instructions"));
+ ignore_rest_of_line ();
+ return;
+ }
+
+ name = input_line_pointer;
+ while (*input_line_pointer && *input_line_pointer != ','
+ && !ISSPACE (*input_line_pointer))
+ input_line_pointer++;
+ saved_char = *input_line_pointer;
+ *input_line_pointer = 0;
+
+ if (m68k_set_arch (name, 1, 0))
+ {
+ /* Scan extensions. */
+ do
+ {
+ *input_line_pointer++ = saved_char;
+ if (!*input_line_pointer || ISSPACE (*input_line_pointer))
+ break;
+ name = input_line_pointer;
+ while (*input_line_pointer && *input_line_pointer != ','
+ && !ISSPACE (*input_line_pointer))
+ input_line_pointer++;
+ saved_char = *input_line_pointer;
+ *input_line_pointer = 0;
+ }
+ while (m68k_set_extension (name, 1, 0));
+ }
+
+ *input_line_pointer = saved_char;
+ demand_empty_rest_of_line ();
+ return;
+}
+
+/* Lookup a cpu name in TABLE and return the slot found. Return NULL
+ if none is found, the caller is responsible for emitting an error
+ message. If ALLOW_M is non-zero, we allow an initial 'm' on the
+ cpu name, if it begins with a '6' (possibly skipping an intervening
+ 'c'. We also allow a 'c' in the same place. if NEGATED is
+ non-zero, we accept a leading 'no-' and *NEGATED is set to true, if
+ the option is indeed negated. */
+
+static const struct m68k_cpu *
+m68k_lookup_cpu (const char *arg, const struct m68k_cpu *table,
+ int allow_m, int *negated)
+{
+ /* allow negated value? */
+ if (negated)
+ {
+ *negated = 0;
+
+ if (arg[0] == 'n' && arg[1] == 'o' && arg[2] == '-')
+ {
+ arg += 3;
+ *negated = 1;
+ }
+ }
+
+ /* Remove 'm' or 'mc' prefix from 68k variants. */
+ if (allow_m)
+ {
+ if (arg[0] == 'm')
+ {
+ if (arg[1] == '6')
+ arg += 1;
+ else if (arg[1] == 'c' && arg[2] == '6')
+ arg += 2;
+ }
+ }
+ else if (arg[0] == 'c' && arg[1] == '6')
+ arg += 1;
+
+ for (; table->name; table++)
+ if (!strcmp (arg, table->name))
+ {
+ if (table->alias < -1 || table->alias > 1)
+ as_bad (_("`%s' is deprecated, use `%s'"),
+ table->name, table[table->alias < 0 ? 1 : -1].name);
+ return table;
+ }
+ return 0;
+}
+
+/* Set the cpu, issuing errors if it is unrecognized, or invalid */
+
+static int
+m68k_set_cpu (char const *name, int allow_m, int silent)
+{
+ const struct m68k_cpu *cpu;
+
+ cpu = m68k_lookup_cpu (name, m68k_cpus, allow_m, NULL);
+
+ if (!cpu)
+ {
+ if (!silent)
+ as_bad (_("cpu `%s' unrecognized"), name);
+ return 0;
+ }
+
+ if (selected_cpu && selected_cpu != cpu)
+ {
+ as_bad (_("already selected `%s' processor"),
+ selected_cpu->name);
+ return 0;
+ }
+ selected_cpu = cpu;
+ return 1;
+}
+
+/* Set the architecture, issuing errors if it is unrecognized, or invalid */
+
+static int
+m68k_set_arch (char const *name, int allow_m, int silent)
+{
+ const struct m68k_cpu *arch;
+
+ arch = m68k_lookup_cpu (name, m68k_archs, allow_m, NULL);
+
+ if (!arch)
+ {
+ if (!silent)
+ as_bad (_("architecture `%s' unrecognized"), name);
+ return 0;
+ }
+
+ if (selected_arch && selected_arch != arch)
+ {
+ as_bad (_("already selected `%s' architecture"),
+ selected_arch->name);
+ return 0;
+ }
+
+ selected_arch = arch;
+ return 1;
+}
+
+/* Set the architecture extension, issuing errors if it is
+ unrecognized, or invalid */
+
+static int
+m68k_set_extension (char const *name, int allow_m, int silent)
+{
+ int negated;
+ const struct m68k_cpu *ext;
+
+ ext = m68k_lookup_cpu (name, m68k_extensions, allow_m, &negated);
+
+ if (!ext)
+ {
+ if (!silent)
+ as_bad (_("extension `%s' unrecognized"), name);
+ return 0;
+ }
+
+ if (negated)
+ not_current_architecture |= ext->arch;
+ else
+ current_architecture |= ext->arch;
+ return 1;
+}
+
/* md_parse_option
Invocation line includes a switch not recognized by the base assembler.
- See if it's a processor-specific option. These are:
+ */
- -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
- -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
- Select the architecture. Instructions or features not
- supported by the selected architecture cause fatal
- errors. More than one may be specified. The default is
- -m68020 -m68851 -m68881. Note that -m68008 is a synonym
- for -m68000, and -m68882 is a synonym for -m68881.
- -[A]m[c]no-68851, -[A]m[c]no-68881
- Don't accept 688?1 instructions. (The "c" is kind of silly,
- so don't use or document it, but that's the way the parsing
- works).
-
- -pic Indicates PIC.
- -k Indicates PIC. (Sun 3 only.)
- --pcrel
- Never turn PC-relative branches into absolute jumps.
- --bitwise-or
- Permit `|' to be used in expressions. */
-
#ifdef OBJ_ELF
const char *md_shortopts = "lSA:m:kQ:V";
#else
@@ -6979,80 +7132,6 @@
flag_keep_pcrel = 1;
break;
- case 'A':
- if (*arg == 'm')
- arg++;
- /* Intentional fall-through. */
- case 'm':
-
- if (arg[0] == 'n' && arg[1] == 'o' && arg[2] == '-')
- {
- int i;
- unsigned long arch;
-
- arg += 3;
- if (*arg == 'm')
- {
- arg++;
- if (arg[0] == 'c' && arg[1] == '6')
- arg++;
- }
- for (i = 0; i < n_archs; i++)
- if (!strcmp (arg, archs[i].name))
- break;
- if (i == n_archs)
- return 0;
-
- arch = archs[i].arch;
- if (arch == m68881)
- no_68881 = 1;
- else if (arch == m68851)
- no_68851 = 1;
- else
- return 0;
- }
- else
- {
- int i;
-
- if (arg[0] == 'c' && arg[1] == '6')
- arg++;
-
- for (i = 0; i < n_archs; i++)
- if (!strcmp (arg, archs[i].name))
- {
- unsigned long arch = archs[i].arch;
-
- if (cpu_of_arch (arch))
- /* It's a cpu spec. */
- {
- current_architecture &= ~m68000up;
- current_architecture |= arch;
- current_chip = archs[i].chip;
- }
- else if (arch == m68881)
- {
- current_architecture |= m68881;
- no_68881 = 0;
- }
- else if (arch == m68851)
- {
- current_architecture |= m68851;
- no_68851 = 0;
- }
- else
- /* ??? */
- abort ();
- break;
- }
- if (i == n_archs)
- {
- as_bad (_("unrecognized architecture specification `%s'"), arg);
- return 0;
- }
- }
- break;
-
case OPTION_PIC:
case 'k':
flag_want_pic = 1;
@@ -7106,6 +7185,27 @@
m68k_rel32_from_cmdline = 1;
break;
+ case 'A':
+#if WARN_DEPRECATED
+ as_tsktsk (_ ("option `-A%s' is deprecated: use `-%s'",
+ arg, arg));
+#endif
+ /* Intentional fall-through. */
+ case 'm':
+ if (!strncmp (arg, "arch=", 5))
+ m68k_set_arch (arg + 5, 1, 0);
+ else if (!strncmp (arg, "cpu=", 4))
+ m68k_set_cpu (arg + 4, 1, 0);
+ else if (m68k_set_extension (arg, 0, 1))
+ ;
+ else if (m68k_set_arch (arg, 0, 1))
+ ;
+ else if (m68k_set_cpu (arg, 0, 1))
+ ;
+ else
+ return 0;
+ break;
+
default:
return 0;
}
@@ -7113,6 +7213,72 @@
return 1;
}
+/* Setup tables from the selected arch and/or cpu */
+
+static void
+m68k_init_arch (void)
+{
+ if (not_current_architecture & current_architecture)
+ {
+ as_bad (_("architecture features both enabled and disabled"));
+ not_current_architecture &= ~current_architecture;
+ }
+ if (selected_arch)
+ {
+ current_architecture |= selected_arch->arch;
+ control_regs = selected_arch->control_regs;
+ }
+ else
+ current_architecture |= selected_cpu->arch;
+
+ current_architecture &= ~not_current_architecture;
+
+ if (selected_cpu)
+ {
+ control_regs = selected_cpu->control_regs;
+ if (current_architecture & ~selected_cpu->arch)
+ {
+ as_bad (_("selected processor does not have all features of selected architecture"));
+ current_architecture
+ = selected_cpu->arch & ~not_current_architecture;
+ }
+ }
+
+ if ((current_architecture & (cfloat | m68881)) == (cfloat | m68881))
+ {
+ /* Determine which float is really meant. */
+ if (current_architecture & (m68k_mask & ~m68881))
+ current_architecture ^= cfloat;
+ else
+ current_architecture ^= m68881;
+ }
+
+ if ((current_architecture & m68k_mask)
+ && (current_architecture & ~m68k_mask))
+ {
+ as_bad (_ ("m68k and cf features both selected"));
+ if (current_architecture & m68k_mask)
+ current_architecture &= m68k_mask;
+ else
+ current_architecture &= ~m68k_mask;
+ }
+
+ /* Permit m68881 specification with all cpus; those that can't work
+ with a coprocessor could be doing emulation. */
+ if (current_architecture & m68851)
+ {
+ if (current_architecture & m68040)
+ as_warn (_("68040 and 68851 specified; mmu instructions may assemble incorrectly"));
+ }
+ /* What other incompatibilities could we check for? */
+
+ if (cpu_of_arch (current_architecture) < m68020
+ || arch_coldfire_p (current_architecture))
+ md_relax_table[TAB (PCINDEX, BYTE)].rlx_more = 0;
+
+ initialized = 1;
+}
+
void
md_show_usage (FILE *stream)
{
@@ -7123,50 +7289,61 @@
/* Get the canonical name for the default target CPU. */
if (*default_cpu == 'm')
default_cpu++;
- for (i = 0; i < n_archs; i++)
+ for (i = 0; m68k_cpus[i].name; i++)
{
- if (strcasecmp (default_cpu, archs[i].name) == 0)
+ if (strcasecmp (default_cpu, m68k_cpus[i].name) == 0)
{
- default_arch = archs[i].arch;
- for (i = 0; i < n_archs; i++)
- {
- if (archs[i].arch == default_arch
- && !archs[i].alias)
- {
- default_cpu = archs[i].name;
- break;
- }
- }
+ default_arch = m68k_cpus[i].arch;
+ while (m68k_cpus[i].alias > 0)
+ i--;
+ while (m68k_cpus[i].alias < 0)
+ i++;
+ default_cpu = m68k_cpus[i].name;
}
}
fprintf (stream, _("\
-680X0 options:\n\
+-march=<arch> set architecture\n\
+-mcpu=<cpu> set cpu [default %s]\n\
+"), default_cpu);
+ for (i = 0; m68k_extensions[i].name; i++)
+ fprintf (stream, _("\
+-m[no-]%-16s enable/disable%s architecture extension\n\
+"), m68k_extensions[i].name,
+ m68k_extensions[i].alias > 0 ? " ColdFire"
+ : m68k_extensions[i].alias < 0 ? " m68k" : "");
+
+ fprintf (stream, _("\
-l use 1 word for refs to undefined symbols [default 2]\n\
--m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 |\n\
--m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360 | -mcpu32 |\n\
--m5200 | -m5202 | -m5204 | -m5206 | -m5206e | -m521x | -m5249 |\n\
--m528x | -m5307 | -m5407 | -m547x | -m548x | -mcfv4 | -mcfv4e\n\
- specify variant of 680X0 architecture [default %s]\n\
--m68881 | -m68882 | -mno-68881 | -mno-68882\n\
- target has/lacks floating-point coprocessor\n\
- [default yes for 68020, 68030, and cpu32]\n"),
- default_cpu);
- fprintf (stream, _("\
--m68851 | -mno-68851\n\
- target has/lacks memory-management unit coprocessor\n\
- [default yes for 68020 and up]\n\
-pic, -k generate position independent code\n\
-S turn jbsr into jsr\n\
--pcrel never turn PC-relative branches into absolute jumps\n\
--register-prefix-optional\n\
recognize register names without prefix character\n\
---bitwise-or do not treat `|' as a comment character\n"));
- fprintf (stream, _("\
+--bitwise-or do not treat `|' as a comment character\n\
--base-size-default-16 base reg without size is 16 bits\n\
--base-size-default-32 base reg without size is 32 bits (default)\n\
--disp-size-default-16 displacement with unknown size is 16 bits\n\
---disp-size-default-32 displacement with unknown size is 32 bits (default)\n"));
+--disp-size-default-32 displacement with unknown size is 32 bits (default)\n\
+"));
+
+ fprintf (stream, _("Architecture variants are: "));
+ for (i = 0; m68k_archs[i].name; i++)
+ {
+ if (i)
+ fprintf (stream, " | ");
+ fprintf (stream, m68k_archs[i].name);
+ }
+ fprintf (stream, "\n");
+
+ fprintf (stream, _("Processor variants are: "));
+ for (i = 0; m68k_cpus[i].name; i++)
+ {
+ if (i)
+ fprintf (stream, " | ");
+ fprintf (stream, m68k_cpus[i].name);
+ }
+ fprintf (stream, _("\n"));
}
#ifdef TEST2
@@ -7313,14 +7490,74 @@
void
m68k_elf_final_processing (void)
{
+ unsigned flags = 0;
+
+ if (arch_coldfire_fpu (current_architecture))
+ flags |= EF_M68K_CFV4E;
/* Set file-specific flags if this is a cpu32 processor. */
- if (arch_coldfire_fpu (current_architecture))
- elf_elfheader (stdoutput)->e_flags |= EF_CFV4E;
if (cpu_of_arch (current_architecture) & cpu32)
- elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
+ flags |= EF_M68K_CPU32;
else if ((cpu_of_arch (current_architecture) & m68000up)
&& !(cpu_of_arch (current_architecture) & m68020up))
- elf_elfheader (stdoutput)->e_flags |= EF_M68000;
+ flags |= EF_M68K_M68000;
+
+ if (current_architecture & mcfisa_a)
+ {
+ static const unsigned isa_features[][2] =
+ {
+ {EF_M68K_ISA_A_NODIV, mcfisa_a},
+ {EF_M68K_ISA_A, mcfisa_a|mcfhwdiv},
+ {EF_M68K_ISA_A_PLUS,mcfisa_a|mcfisa_aa|mcfhwdiv|mcfusp},
+ {EF_M68K_ISA_B_NOUSP,mcfisa_a|mcfisa_b|mcfhwdiv},
+ {EF_M68K_ISA_B, mcfisa_a|mcfisa_b|mcfhwdiv|mcfusp},
+ {0,0},
+ };
+ static const unsigned mac_features[][2] =
+ {
+ {EF_M68K_MAC, mcfmac},
+ {EF_M68K_EMAC, mcfemac},
+ {0,0},
+ };
+ unsigned ix;
+ unsigned pattern;
+
+ pattern = (current_architecture
+ & (mcfisa_a|mcfisa_aa|mcfisa_b|mcfhwdiv|mcfusp));
+ for (ix = 0; isa_features[ix][1]; ix++)
+ {
+ if (pattern == isa_features[ix][1])
+ {
+ flags |= isa_features[ix][0];
+ break;
+ }
+ }
+ if (!isa_features[ix][1])
+ {
+ cf_bad:
+ as_warn (_("Not a defined coldfire architecture"));
+ }
+ else
+ {
+ if (current_architecture & cfloat)
+ flags |= EF_M68K_FLOAT | EF_M68K_CFV4E;
+
+ pattern = current_architecture & (mcfmac|mcfemac);
+ if (pattern)
+ {
+ for (ix = 0; mac_features[ix][1]; ix++)
+ {
+ if (pattern == mac_features[ix][1])
+ {
+ flags |= mac_features[ix][0];
+ break;
+ }
+ }
+ if (!mac_features[ix][1])
+ goto cf_bad;
+ }
+ }
+ }
+ elf_elfheader (stdoutput)->e_flags |= flags;
}
#endif
Modified: branches/binutils/package/gas/config/tc-m68k.h
===================================================================
--- branches/binutils/package/gas/config/tc-m68k.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-m68k.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -145,9 +145,6 @@
#define DIFF_EXPR_OK
-extern void m68k_init_after_args (void);
-#define tc_init_after_args m68k_init_after_args
-
extern int m68k_parse_long_option (char *);
#define md_parse_long_option m68k_parse_long_option
Modified: branches/binutils/package/gas/config/tc-mips.c
===================================================================
--- branches/binutils/package/gas/config/tc-mips.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mips.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1191,6 +1191,12 @@
case bfd_target_coff_flavour:
return "pe-mips";
case bfd_target_elf_flavour:
+#ifdef TE_VXWORKS
+ if (!HAVE_64BIT_OBJECTS && !HAVE_NEWABI)
+ return (target_big_endian
+ ? "elf32-bigmips-vxworks"
+ : "elf32-littlemips-vxworks");
+#endif
#ifdef TE_TMIPS
/* This is traditional mips. */
return (target_big_endian
@@ -1397,6 +1403,13 @@
int i = 0;
int broken = 0;
+ if (mips_pic != NO_PIC)
+ {
+ if (g_switch_seen && g_switch_value != 0)
+ as_bad (_("-G may not be used in position-independent code"));
+ g_switch_value = 0;
+ }
+
if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, file_mips_arch))
as_warn (_("Could not set architecture and machine"));
@@ -1524,10 +1537,11 @@
if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
{
- /* On a native system, sections must be aligned to 16 byte
- boundaries. When configured for an embedded ELF target, we
- don't bother. */
- if (strcmp (TARGET_OS, "elf") != 0)
+ /* On a native system other than VxWorks, sections must be aligned
+ to 16 byte boundaries. When configured for an embedded ELF
+ target, we don't bother. */
+ if (strcmp (TARGET_OS, "elf") != 0
+ && strcmp (TARGET_OS, "vxworks") != 0)
{
(void) bfd_set_section_alignment (stdoutput, text_section, 4);
(void) bfd_set_section_alignment (stdoutput, data_section, 4);
@@ -1680,16 +1694,18 @@
}
/* Return true if the given relocation might need a matching %lo().
- Note that R_MIPS_GOT16 relocations only need a matching %lo() when
- applied to local symbols. */
+ This is only "might" because SVR4 R_MIPS_GOT16 relocations only
+ need a matching %lo() when applied to local symbols. */
static inline bfd_boolean
reloc_needs_lo_p (bfd_reloc_code_real_type reloc)
{
return (HAVE_IN_PLACE_ADDENDS
&& (reloc == BFD_RELOC_HI16_S
- || reloc == BFD_RELOC_MIPS_GOT16
- || reloc == BFD_RELOC_MIPS16_HI16_S));
+ || reloc == BFD_RELOC_MIPS16_HI16_S
+ /* VxWorks R_MIPS_GOT16 relocs never need a matching %lo();
+ all GOT16 relocations evaluate to "G". */
+ || (reloc == BFD_RELOC_MIPS_GOT16 && mips_pic != VXWORKS_PIC)));
}
/* Return true if the given fixup is followed by a matching R_MIPS_LO16
@@ -3898,7 +3914,7 @@
relax_end ();
}
}
- else if (mips_pic == SVR4_PIC && ! mips_big_got)
+ else if (!mips_big_got)
{
expressionS ex;
@@ -3959,7 +3975,7 @@
}
}
}
- else if (mips_pic == SVR4_PIC)
+ else if (mips_big_got)
{
expressionS ex;
@@ -5011,7 +5027,7 @@
relax_end ();
}
}
- else if (mips_pic == SVR4_PIC && ! mips_big_got && ! HAVE_NEWABI)
+ else if (!mips_big_got && !HAVE_NEWABI)
{
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16;
@@ -5047,7 +5063,9 @@
if (offset_expr.X_add_number == 0)
{
- if (breg == 0 && (call || tempreg == PIC_CALL_REG))
+ if (mips_pic == SVR4_PIC
+ && breg == 0
+ && (call || tempreg == PIC_CALL_REG))
lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16;
relax_start (offset_expr.X_add_symbol);
@@ -5104,7 +5122,7 @@
used_at = 1;
}
}
- else if (mips_pic == SVR4_PIC && ! mips_big_got && HAVE_NEWABI)
+ else if (!mips_big_got && HAVE_NEWABI)
{
int add_breg_early = 0;
@@ -5207,7 +5225,7 @@
BFD_RELOC_MIPS_GOT_DISP, mips_gp_register);
}
}
- else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI)
+ else if (mips_big_got && !HAVE_NEWABI)
{
int gpdelay;
int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16;
@@ -5364,7 +5382,7 @@
}
relax_end ();
}
- else if (mips_pic == SVR4_PIC && HAVE_NEWABI)
+ else if (mips_big_got && HAVE_NEWABI)
{
int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16;
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_LO16;
@@ -5497,13 +5515,13 @@
case M_JAL_2:
if (mips_pic == NO_PIC)
macro_build (NULL, "jalr", "d,s", dreg, sreg);
- else if (mips_pic == SVR4_PIC)
+ else
{
if (sreg != PIC_CALL_REG)
as_warn (_("MIPS PIC call to register other than $25"));
macro_build (NULL, "jalr", "d,s", dreg, sreg);
- if (! HAVE_NEWABI)
+ if (mips_pic == SVR4_PIC && !HAVE_NEWABI)
{
if (mips_cprestore_offset < 0)
as_warn (_("No .cprestore pseudo-op used in PIC code"));
@@ -5529,8 +5547,6 @@
}
}
}
- else
- abort ();
break;
@@ -5666,6 +5682,8 @@
}
}
}
+ else if (mips_pic == VXWORKS_PIC)
+ as_bad (_("Non-PIC jump used in PIC library"));
else
abort ();
@@ -6026,7 +6044,7 @@
relax_end ();
}
}
- else if (mips_pic == SVR4_PIC && ! mips_big_got)
+ else if (!mips_big_got)
{
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16;
@@ -6080,7 +6098,7 @@
tempreg, tempreg, breg);
macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg);
}
- else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI)
+ else if (mips_big_got && !HAVE_NEWABI)
{
int gpdelay;
@@ -6129,7 +6147,7 @@
tempreg, tempreg, breg);
macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg);
}
- else if (mips_pic == SVR4_PIC && HAVE_NEWABI)
+ else if (mips_big_got && HAVE_NEWABI)
{
/* If this is a reference to an external symbol, we want
lui $tempreg,<sym> (BFD_RELOC_MIPS_GOT_HI16)
@@ -6249,14 +6267,12 @@
macro_build_lui (&offset_expr, AT);
used_at = 1;
}
- else if (mips_pic == SVR4_PIC)
+ else
{
macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT,
BFD_RELOC_MIPS_GOT16, mips_gp_register);
used_at = 1;
}
- else
- abort ();
/* Now we load the register(s). */
if (HAVE_64BIT_GPRS)
@@ -6328,7 +6344,7 @@
{
assert (strcmp (s, RDATA_SECTION_NAME) == 0);
used_at = 1;
- if (mips_pic == SVR4_PIC)
+ if (mips_pic != NO_PIC)
macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT,
BFD_RELOC_MIPS_GOT16, mips_gp_register);
else
@@ -6547,7 +6563,7 @@
if (mips_relax.sequence)
relax_end ();
}
- else if (mips_pic == SVR4_PIC && ! mips_big_got)
+ else if (!mips_big_got)
{
/* If this is a reference to an external symbol, we want
lw $at,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
@@ -6594,7 +6610,7 @@
mips_optimize = hold_mips_optimize;
}
- else if (mips_pic == SVR4_PIC)
+ else if (mips_big_got)
{
int gpdelay;
@@ -10646,6 +10662,8 @@
{"mpdr", no_argument, NULL, OPTION_PDR},
#define OPTION_NO_PDR (OPTION_ELF_BASE + 10)
{"mno-pdr", no_argument, NULL, OPTION_NO_PDR},
+#define OPTION_MVXWORKS_PIC (OPTION_ELF_BASE + 11)
+ {"mvxworks-pic", no_argument, NULL, OPTION_MVXWORKS_PIC},
#endif /* OBJ_ELF */
{NULL, no_argument, NULL, 0}
@@ -10887,12 +10905,6 @@
}
mips_pic = SVR4_PIC;
mips_abicalls = TRUE;
- if (g_switch_seen && g_switch_value != 0)
- {
- as_bad (_("-G may not be used with SVR4 PIC code"));
- return 0;
- }
- g_switch_value = 0;
break;
case OPTION_NON_SHARED:
@@ -10916,11 +10928,6 @@
case 'G':
g_switch_value = atoi (arg);
g_switch_seen = 1;
- if (mips_pic == SVR4_PIC && g_switch_value != 0)
- {
- as_bad (_("-G may not be used with SVR4 PIC code"));
- return 0;
- }
break;
#ifdef OBJ_ELF
@@ -11026,6 +11033,10 @@
case OPTION_NO_PDR:
mips_flag_pdr = FALSE;
break;
+
+ case OPTION_MVXWORKS_PIC:
+ mips_pic = VXWORKS_PIC;
+ break;
#endif /* OBJ_ELF */
default:
@@ -13166,6 +13177,9 @@
change = nopic_need_relax (fragp->fr_symbol, 0);
else if (mips_pic == SVR4_PIC)
change = pic_need_relax (fragp->fr_symbol, segtype);
+ else if (mips_pic == VXWORKS_PIC)
+ /* For vxworks, GOT16 relocations never have a corresponding LO16. */
+ change = 0;
else
abort ();
Modified: branches/binutils/package/gas/config/tc-mips.h
===================================================================
--- branches/binutils/package/gas/config/tc-mips.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mips.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -75,6 +75,9 @@
/* Generate PIC code as in the SVR4 MIPS ABI. */
SVR4_PIC,
+
+ /* VxWorks's PIC model. */
+ VXWORKS_PIC
};
extern enum mips_pic_level mips_pic;
Modified: branches/binutils/package/gas/config/tc-mmix.c
===================================================================
--- branches/binutils/package/gas/config/tc-mmix.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mmix.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3077,7 +3077,9 @@
{
if ((s[1] != 'B' && s[1] != 'F')
|| is_part_of_name (s[-1])
- || is_part_of_name (s[2]))
+ || is_part_of_name (s[2])
+ /* Don't treat e.g. #1F as a local-label reference. */
+ || (s != input_line_pointer && s[-1] == '#'))
s++;
else
{
Modified: branches/binutils/package/gas/config/tc-mn10200.c
===================================================================
--- branches/binutils/package/gas/config/tc-mn10200.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mn10200.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-mn10200.c -- Assembler code for the Matsushita 10200
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005 Free Software Foundation, Inc.
+ 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -1191,6 +1191,18 @@
/* Write out the instruction. */
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
int type;
/* bCC */
@@ -1218,10 +1230,11 @@
else
type = 3;
+ opindex_converter.opindex = fixups[0].opindex;
f = frag_var (rs_machine_dependent, 8, 8 - size, type,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ opindex_converter.ptr);
number_to_chars_bigendian (f, insn, size);
if (8 - size > 4)
{
Modified: branches/binutils/package/gas/config/tc-mn10300.c
===================================================================
--- branches/binutils/package/gas/config/tc-mn10300.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mn10300.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-mn10300.c -- Assembler code for the Matsushita 10300
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -2005,6 +2005,18 @@
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
int type;
/* We want to anchor the line info to the previous frag (if
@@ -2044,10 +2056,11 @@
else
type = 3;
+ opindex_converter.opindex = fixups[0].opindex;
f = frag_var (rs_machine_dependent, 8, 8 - size, type,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ opindex_converter.ptr);
/* This is pretty hokey. We basically just care about the
opcode, so we have to write out the first word big endian.
Modified: branches/binutils/package/gas/config/tc-mt.c
===================================================================
--- branches/binutils/package/gas/config/tc-mt.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mt.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-/* tc-ms1.c -- Assembler for the Morpho Technologies ms-I.
+/* tc-mt.c -- Assembler for the Morpho Technologies mt .
Copyright (C) 2005 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
@@ -23,8 +23,8 @@
#include "dwarf2dbg.h"
#include "subsegs.h"
#include "symcat.h"
-#include "opcodes/ms1-desc.h"
-#include "opcodes/ms1-opc.h"
+#include "opcodes/mt-desc.h"
+#include "opcodes/mt-opc.h"
#include "cgen.h"
#include "elf/common.h"
#include "elf/mt.h"
@@ -50,7 +50,7 @@
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
int indices [MAX_OPERAND_INSTANCES];
}
-ms1_insn;
+mt_insn;
const char comment_chars[] = ";";
@@ -83,14 +83,14 @@
const char * md_shortopts = "";
/* Mach selected from command line. */
-static int ms1_mach = bfd_mach_ms1;
-static unsigned ms1_mach_bitmask = 1 << MACH_MS1;
+static int mt_mach = bfd_mach_ms1;
+static unsigned mt_mach_bitmask = 1 << MACH_MS1;
/* Flags to set in the elf header */
-static flagword ms1_flags = EF_MS1_CPU_MRISC;
+static flagword mt_flags = EF_MT_CPU_MRISC;
/* The architecture to use. */
-enum ms1_architectures
+enum mt_architectures
{
ms1_64_001,
ms1_16_002,
@@ -98,8 +98,8 @@
ms2
};
-/* MS1 architecture we are using for this output file. */
-static enum ms1_architectures ms1_arch = ms1_64_001;
+/* MT architecture we are using for this output file. */
+static enum mt_architectures mt_arch = ms1_16_002;
int
md_parse_option (int c ATTRIBUTE_UNUSED, char * arg)
@@ -107,33 +107,33 @@
switch (c)
{
case OPTION_MARCH:
- if (strcasecmp (arg, "MS1-64-001") == 0)
+ if (strcmp (arg, "ms1-64-001") == 0)
{
- ms1_flags = (ms1_flags & ~EF_MS1_CPU_MASK) | EF_MS1_CPU_MRISC;
- ms1_mach = bfd_mach_ms1;
- ms1_mach_bitmask = 1 << MACH_MS1;
- ms1_arch = ms1_64_001;
+ mt_flags = (mt_flags & ~EF_MT_CPU_MASK) | EF_MT_CPU_MRISC;
+ mt_mach = bfd_mach_ms1;
+ mt_mach_bitmask = 1 << MACH_MS1;
+ mt_arch = ms1_64_001;
}
- else if (strcasecmp (arg, "MS1-16-002") == 0)
+ else if (strcmp (arg, "ms1-16-002") == 0)
{
- ms1_flags = (ms1_flags & ~EF_MS1_CPU_MASK) | EF_MS1_CPU_MRISC;
- ms1_mach = bfd_mach_ms1;
- ms1_mach_bitmask = 1 << MACH_MS1;
- ms1_arch = ms1_16_002;
+ mt_flags = (mt_flags & ~EF_MT_CPU_MASK) | EF_MT_CPU_MRISC;
+ mt_mach = bfd_mach_ms1;
+ mt_mach_bitmask = 1 << MACH_MS1;
+ mt_arch = ms1_16_002;
}
- else if (strcasecmp (arg, "MS1-16-003") == 0)
+ else if (strcmp (arg, "ms1-16-003") == 0)
{
- ms1_flags = (ms1_flags & ~EF_MS1_CPU_MASK) | EF_MS1_CPU_MRISC2;
- ms1_mach = bfd_mach_mrisc2;
- ms1_mach_bitmask = 1 << MACH_MS1_003;
- ms1_arch = ms1_16_003;
+ mt_flags = (mt_flags & ~EF_MT_CPU_MASK) | EF_MT_CPU_MRISC2;
+ mt_mach = bfd_mach_mrisc2;
+ mt_mach_bitmask = 1 << MACH_MS1_003;
+ mt_arch = ms1_16_003;
}
- else if (strcasecmp (arg, "MS2") == 0)
+ else if (strcmp (arg, "ms2") == 0)
{
- ms1_flags = (ms1_flags & ~EF_MS1_CPU_MASK) | EF_MS1_CPU_MS2;
- ms1_mach = bfd_mach_mrisc2;
- ms1_mach_bitmask = 1 << MACH_MS2;
- ms1_arch = ms2;
+ mt_flags = (mt_flags & ~EF_MT_CPU_MASK) | EF_MT_CPU_MS2;
+ mt_mach = bfd_mach_mrisc2;
+ mt_mach_bitmask = 1 << MACH_MS2;
+ mt_arch = ms2;
}
case OPTION_NO_SCHED_REST:
no_scheduling_restrictions = 1;
@@ -149,12 +149,12 @@
void
md_show_usage (FILE * stream)
{
- fprintf (stream, _("MS1 specific command line options:\n"));
- fprintf (stream, _(" -march=ms1-64-001 allow ms1-64-001 instructions (default) \n"));
- fprintf (stream, _(" -march=ms1-16-002 allow ms1-16-002 instructions \n"));
- fprintf (stream, _(" -march=ms1-16-003 allow ms1-16-003 instructions \n"));
+ fprintf (stream, _("MT specific command line options:\n"));
+ fprintf (stream, _(" -march=ms1-64-001 allow ms1-64-001 instructions\n"));
+ fprintf (stream, _(" -march=ms1-16-002 allow ms1-16-002 instructions (default)\n"));
+ fprintf (stream, _(" -march=ms1-16-003 allow ms1-16-003 instructions\n"));
fprintf (stream, _(" -march=ms2 allow ms2 instructions \n"));
- fprintf (stream, _(" -nosched disable scheduling restrictions \n"));
+ fprintf (stream, _(" -nosched disable scheduling restrictions\n"));
}
@@ -164,21 +164,21 @@
/* Initialize the `cgen' interface. */
/* Set the machine number and endian. */
- gas_cgen_cpu_desc = ms1_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, ms1_mach_bitmask,
- CGEN_CPU_OPEN_ENDIAN,
- CGEN_ENDIAN_BIG,
- CGEN_CPU_OPEN_END);
- ms1_cgen_init_asm (gas_cgen_cpu_desc);
+ gas_cgen_cpu_desc = mt_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, mt_mach_bitmask,
+ CGEN_CPU_OPEN_ENDIAN,
+ CGEN_ENDIAN_BIG,
+ CGEN_CPU_OPEN_END);
+ mt_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
/* Set the ELF flags if desired. */
- if (ms1_flags)
- bfd_set_private_flags (stdoutput, ms1_flags);
+ if (mt_flags)
+ bfd_set_private_flags (stdoutput, mt_flags);
/* Set the machine type. */
- bfd_default_set_arch_mach (stdoutput, bfd_arch_ms1, ms1_mach);
+ bfd_default_set_arch_mach (stdoutput, bfd_arch_mt, mt_mach);
}
void
@@ -195,13 +195,13 @@
static int last_insn_was_branch_insn = 0;
static int last_insn_was_conditional_branch_insn = 0;
- ms1_insn insn;
+ mt_insn insn;
char * errmsg;
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
- insn.insn = ms1_cgen_assemble_insn
+ insn.insn = mt_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
if (!insn.insn)
@@ -221,7 +221,7 @@
/* Detect consecutive Memory Accesses. */
if (last_insn_was_memory_access
&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_MEMORY_ACCESS)
- && ms1_mach == ms1_64_001)
+ && mt_mach == ms1_64_001)
as_warn (_("instruction %s may not follow another memory access instruction."),
CGEN_INSN_NAME (insn.insn));
@@ -252,7 +252,7 @@
}
/* Detect JAL/RETI hazard */
- if (ms1_mach == ms2
+ if (mt_mach == ms2
&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_JAL_HAZARD))
{
if ((CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
@@ -275,7 +275,7 @@
&& !last_insn_in_noncond_delay_slot
&& (delayed_load_register != 0)
&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN)
- && ms1_arch == ms1_64_001)
+ && mt_arch == ms1_64_001)
{
if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
&& insn.fields.f_sr1 == delayed_load_register)
@@ -399,20 +399,20 @@
switch (operand->type)
{
- case MS1_OPERAND_IMM16O:
+ case MT_OPERAND_IMM16O:
result = BFD_RELOC_16_PCREL;
fixP->fx_pcrel = 1;
/* fixP->fx_no_overflow = 1; */
break;
- case MS1_OPERAND_IMM16:
- case MS1_OPERAND_IMM16Z:
+ case MT_OPERAND_IMM16:
+ case MT_OPERAND_IMM16Z:
/* These may have been processed at parse time. */
if (fixP->fx_cgen.opinfo != 0)
result = fixP->fx_cgen.opinfo;
fixP->fx_no_overflow = 1;
break;
- case MS1_OPERAND_LOOPSIZE:
- result = BFD_RELOC_MS1_PCINSN8;
+ case MT_OPERAND_LOOPSIZE:
+ result = BFD_RELOC_MT_PCINSN8;
fixP->fx_pcrel = 1;
/* Adjust for the delay slot, which is not part of the loop */
fixP->fx_offset -= 8;
@@ -480,7 +480,7 @@
* sizeP = prec * sizeof (LITTLENUM_TYPE);
/* This loops outputs the LITTLENUMs in REVERSE order;
- in accord with the ms1 endianness. */
+ in accord with the mt endianness. */
for (wordP = words; prec--;)
{
md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
@@ -493,13 +493,13 @@
/* See whether we need to force a relocation into the output file. */
int
-ms1_force_relocation (fixS * fixp ATTRIBUTE_UNUSED)
+mt_force_relocation (fixS * fixp ATTRIBUTE_UNUSED)
{
return 0;
}
void
-ms1_apply_fix (fixS *fixP, valueT *valueP, segT seg)
+mt_apply_fix (fixS *fixP, valueT *valueP, segT seg)
{
if ((fixP->fx_pcrel != 0) && (fixP->fx_r_type == BFD_RELOC_32))
fixP->fx_r_type = BFD_RELOC_32_PCREL;
@@ -508,7 +508,7 @@
}
bfd_boolean
-ms1_fix_adjustable (fixS * fixP)
+mt_fix_adjustable (fixS * fixP)
{
bfd_reloc_code_real_type reloc_type;
Modified: branches/binutils/package/gas/config/tc-mt.h
===================================================================
--- branches/binutils/package/gas/config/tc-mt.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-mt.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,4 @@
-/* tc-ms1.h -- Header file for tc-ms1.c.
+/* tc-mt.h -- Header file for tc-mt.c.
Copyright (C) 2005 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -18,14 +18,14 @@
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-#define TC_MS1
+#define TC_MT
-#define LISTING_HEADER "MS1 GAS "
+#define LISTING_HEADER "MT GAS "
/* The target BFD architecture. */
-#define TARGET_ARCH bfd_arch_ms1
+#define TARGET_ARCH bfd_arch_mt
-#define TARGET_FORMAT "elf32-ms1"
+#define TARGET_FORMAT "elf32-mt"
#define TARGET_BYTES_BIG_ENDIAN 1
@@ -38,21 +38,21 @@
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
-/* All ms1 instructions are multiples of 32 bits. */
+/* All mt instructions are multiples of 32 bits. */
#define DWARF2_LINE_MIN_INSN_LENGTH 4
#define LITERAL_PREFIXDOLLAR_HEX
#define LITERAL_PREFIXPERCENT_BIN
-#define md_apply_fix ms1_apply_fix
-extern void ms1_apply_fix (struct fix *, valueT *, segT);
+#define md_apply_fix mt_apply_fix
+extern void mt_apply_fix (struct fix *, valueT *, segT);
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
extern long md_pcrel_from_section (struct fix *, segT);
#define obj_fix_adjustable(fixP) iq2000_fix_adjustable (fixP)
-extern bfd_boolean ms1_fix_adjustable (struct fix *);
+extern bfd_boolean mt_fix_adjustable (struct fix *);
/* Values passed to md_apply_fix don't include the symbol value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
@@ -62,9 +62,9 @@
#define md_operand(x) gas_cgen_md_operand (x)
extern void gas_cgen_md_operand (expressionS *);
-#define TC_FORCE_RELOCATION(fixp) ms1_force_relocation (fixp)
-extern int ms1_force_relocation (struct fix *);
+#define TC_FORCE_RELOCATION(fixp) mt_force_relocation (fixp)
+extern int mt_force_relocation (struct fix *);
-#define tc_fix_adjustable(fixP) ms1_fix_adjustable (fixP)
-extern bfd_boolean ms1_fix_adjustable (struct fix *);
+#define tc_fix_adjustable(fixP) mt_fix_adjustable (fixP)
+extern bfd_boolean mt_fix_adjustable (struct fix *);
Modified: branches/binutils/package/gas/config/tc-sparc.c
===================================================================
--- branches/binutils/package/gas/config/tc-sparc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-sparc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -334,6 +334,10 @@
#endif
#endif
+#ifdef TE_VXWORKS
+ return "elf32-sparc-vxworks";
+#endif
+
#ifdef OBJ_ELF
return sparc_arch_size == 64 ? "elf64-sparc" : "elf32-sparc";
#endif
@@ -724,7 +728,7 @@
{NULL, NULL, NULL},
};
-/* sparc64 privileged registers. */
+/* sparc64 privileged and hyperprivileged registers. */
struct priv_reg_entry
{
@@ -750,10 +754,22 @@
{"otherwin", 13},
{"wstate", 14},
{"fq", 15},
+ {"gl", 16},
{"ver", 31},
{"", -1}, /* End marker. */
};
+struct priv_reg_entry hpriv_reg_table[] =
+{
+ {"hpstate", 0},
+ {"htstate", 1},
+ {"hintp", 3},
+ {"htba", 5},
+ {"hver", 6},
+ {"hstick_cmpr", 31},
+ {"", -1}, /* End marker. */
+};
+
/* v9a specific asrs. */
struct priv_reg_entry v9a_asr_table[] =
@@ -1572,6 +1588,42 @@
goto error;
}
+ case '$':
+ case '%':
+ /* Parse a sparc64 hyperprivileged register. */
+ if (*s == '%')
+ {
+ struct priv_reg_entry *p = hpriv_reg_table;
+ unsigned int len = 9999999; /* Init to make gcc happy. */
+
+ s += 1;
+ while (p->name[0] > s[0])
+ p++;
+ while (p->name[0] == s[0])
+ {
+ len = strlen (p->name);
+ if (strncmp (p->name, s, len) == 0)
+ break;
+ p++;
+ }
+ if (p->name[0] != s[0])
+ {
+ error_message = _(": unrecognizable hyperprivileged register");
+ goto error;
+ }
+ if (*args == '$')
+ opcode |= (p->regnum << 14);
+ else
+ opcode |= (p->regnum << 25);
+ s += len;
+ continue;
+ }
+ else
+ {
+ error_message = _(": unrecognizable hyperprivileged register");
+ goto error;
+ }
+
case '_':
case '/':
/* Parse a v9a/v9b ancillary state register. */
@@ -3480,6 +3532,10 @@
#else
#define GOT_NAME "__GLOBAL_OFFSET_TABLE_"
#endif
+#ifdef TE_VXWORKS
+#define GOTT_BASE "__GOTT_BASE__"
+#define GOTT_INDEX "__GOTT_INDEX__"
+#endif
/* This code must be parallel to the OBJ_ELF tc_fix_adjustable. */
@@ -3492,18 +3548,30 @@
code = BFD_RELOC_SPARC_WPLT30;
break;
case BFD_RELOC_HI22:
- if (fixp->fx_addsy != NULL
- && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
- code = BFD_RELOC_SPARC_PC22;
- else
- code = BFD_RELOC_SPARC_GOT22;
+ code = BFD_RELOC_SPARC_GOT22;
+ if (fixp->fx_addsy != NULL)
+ {
+ if (strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
+ code = BFD_RELOC_SPARC_PC22;
+#ifdef TE_VXWORKS
+ if (strcmp (S_GET_NAME (fixp->fx_addsy), GOTT_BASE) == 0
+ || strcmp (S_GET_NAME (fixp->fx_addsy), GOTT_INDEX) == 0)
+ code = BFD_RELOC_HI22; /* Unchanged. */
+#endif
+ }
break;
case BFD_RELOC_LO10:
- if (fixp->fx_addsy != NULL
- && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
- code = BFD_RELOC_SPARC_PC10;
- else
- code = BFD_RELOC_SPARC_GOT10;
+ code = BFD_RELOC_SPARC_GOT10;
+ if (fixp->fx_addsy != NULL)
+ {
+ if (strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
+ code = BFD_RELOC_SPARC_PC10;
+#ifdef TE_VXWORKS
+ if (strcmp (S_GET_NAME (fixp->fx_addsy), GOTT_BASE) == 0
+ || strcmp (S_GET_NAME (fixp->fx_addsy), GOTT_INDEX) == 0)
+ code = BFD_RELOC_LO10; /* Unchanged. */
+#endif
+ }
break;
case BFD_RELOC_SPARC13:
code = BFD_RELOC_SPARC_GOT13;
Modified: branches/binutils/package/gas/config/tc-tic54x.c
===================================================================
--- branches/binutils/package/gas/config/tc-tic54x.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-tic54x.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* tc-tic54x.c -- Assembly code for the Texas Instruments TMS320C54X
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Timothy Wall (twall at cygnus.com)
@@ -4985,7 +4985,7 @@
if (beg < 1)
{
as_bad (_("Invalid subscript (use 1 to %d)"),
- strlen (value));
+ (int) strlen (value));
break;
}
if (*input_line_pointer == ',')
@@ -4995,7 +4995,7 @@
if (beg + len > strlen (value))
{
as_bad (_("Invalid length (use 0 to %d"),
- strlen (value) - beg);
+ (int) strlen (value) - beg);
break;
}
}
Modified: branches/binutils/package/gas/config/tc-v850.c
===================================================================
--- branches/binutils/package/gas/config/tc-v850.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-v850.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-v850.c -- Assembler code for the NEC V850
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -1221,13 +1221,29 @@
asection *sec,
fragS *fragP)
{
+ /* This code performs some nasty type punning between the
+ fr_opcode field of the frag structure (a char *) and the
+ fx_r_type field of the fix structure (a bfd_reloc_code_real_type)
+ On a 64bit host this causes problems because these two fields
+ are not the same size, but since we know that we are only
+ ever storing small integers in the fields, it is safe to use
+ a union to convert between them. */
+ union u
+ {
+ bfd_reloc_code_real_type fx_r_type;
+ char * fr_opcode;
+ }
+ opcode_converter;
subseg_change (sec, 0);
+ opcode_converter.fr_opcode = fragP->fr_opcode;
+
/* In range conditional or unconditional branch. */
if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
{
fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type);
fragP->fr_fix += 2;
}
/* Out of range conditional branch. Emit a branch around a jump. */
@@ -1249,8 +1265,8 @@
target. */
md_number_to_chars ((char *) buffer + 2, 0x00000780, 4);
fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED +
- (int) fragP->fr_opcode + 1);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
fragP->fr_fix += 6;
}
/* Out of range unconditional branch. Emit a jump. */
@@ -1258,8 +1274,8 @@
{
md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED +
- (int) fragP->fr_opcode + 1);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
fragP->fr_fix += 4;
}
else
@@ -2036,6 +2052,20 @@
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
+
+ opindex_converter.opindex = fixups[0].opindex;
insn_size = 2;
fc = 0;
@@ -2044,7 +2074,7 @@
f = frag_var (rs_machine_dependent, 4, 2, 2,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *) fixups[0].opindex);
+ opindex_converter.ptr);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 2);
}
@@ -2053,7 +2083,7 @@
f = frag_var (rs_machine_dependent, 6, 4, 0,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *) fixups[0].opindex);
+ opindex_converter.ptr);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 4);
}
Modified: branches/binutils/package/gas/config/tc-vax.c
===================================================================
--- branches/binutils/package/gas/config/tc-vax.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-vax.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* tc-vax.c - vax-specific -
Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1998, 2000, 2001, 2002,
- 2003, 2004, 2005
+ 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -25,6 +25,7 @@
#include "vax-inst.h"
#include "obstack.h" /* For FRAG_APPEND_1_CHAR macro in "frags.h" */
#include "subsegs.h"
+#include "safe-ctype.h"
#ifdef OBJ_ELF
#include "elf/vax.h"
@@ -40,19 +41,19 @@
const char line_separator_chars[] = ";";
-/* Chars that can be used to separate mant from exp in floating point nums */
+/* Chars that can be used to separate mant from exp in floating point nums. */
const char EXP_CHARS[] = "eE";
-/* Chars that mean this number is a floating point constant */
-/* as in 0f123.456 */
-/* or 0H1.234E-12 (see exp chars above) */
+/* Chars that mean this number is a floating point constant
+ as in 0f123.456
+ or 0H1.234E-12 (see exp chars above). */
const char FLT_CHARS[] = "dDfFgGhH";
/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
changed in read.c . Ideally it shouldn't have to know about it at all,
but nothing is ideal around here. */
-/* Hold details of an operand expression */
+/* Hold details of an operand expression. */
static expressionS exp_of_operand[VIT_MAX_OPERANDS];
static segT seg_of_operand[VIT_MAX_OPERANDS];
@@ -67,8 +68,8 @@
#ifdef OBJ_ELF
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#define PROCEDURE_LINKAGE_TABLE_NAME "_PROCEDURE_LINKAGE_TABLE_"
-symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
-symbolS *PLT_symbol; /* Pre-defined "_PROCEDURE_LINKAGE_TABLE_" */
+symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_". */
+symbolS *PLT_symbol; /* Pre-defined "_PROCEDURE_LINKAGE_TABLE_". */
#endif
int flag_hash_long_names; /* -+ */
@@ -79,24 +80,22 @@
int flag_want_pic; /* -k */
#endif
-/*
- * For VAX, relative addresses of "just the right length" are easy.
- * The branch displacement is always the last operand, even in
- * synthetic instructions.
- * For VAX, we encode the relax_substateTs (in e.g. fr_substate) as:
- *
- * 4 3 2 1 0 bit number
- * ---/ /--+-------+-------+-------+-------+-------+
- * | what state ? | how long ? |
- * ---/ /--+-------+-------+-------+-------+-------+
- *
- * The "how long" bits are 00=byte, 01=word, 10=long.
- * This is a Un*x convention.
- * Not all lengths are legit for a given value of (what state).
- * The "how long" refers merely to the displacement length.
- * The address usually has some constant bytes in it as well.
- *
+/* For VAX, relative addresses of "just the right length" are easy.
+ The branch displacement is always the last operand, even in
+ synthetic instructions.
+ For VAX, we encode the relax_substateTs (in e.g. fr_substate) as:
+ 4 3 2 1 0 bit number
+ ---/ /--+-------+-------+-------+-------+-------+
+ | what state ? | how long ? |
+ ---/ /--+-------+-------+-------+-------+-------+
+
+ The "how long" bits are 00=byte, 01=word, 10=long.
+ This is a Un*x convention.
+ Not all lengths are legit for a given value of (what state).
+ The "how long" refers merely to the displacement length.
+ The address usually has some constant bytes in it as well.
+
groups for VAX address relaxing.
1. "foo" pc-relative.
@@ -182,8 +181,7 @@
We can change an opcode's lowest order bit without breaking anything else.
We sometimes store context in the operand literal. This way we can figure out
- after relax() what the original addressing mode was.
- */
+ after relax() what the original addressing mode was. */
/* These displacements are relative to the start address of the
displacement. The first letter is Byte, Word. 2nd letter is
@@ -192,7 +190,7 @@
#define BB (1+-128)
#define WF (2+ 32767)
#define WB (2+-32768)
-/* Dont need LF, LB because they always reach. [They are coded as 0.] */
+/* Dont need LF, LB because they always reach. [They are coded as 0.] */
#define C(a,b) ENCODE_RELAX(a,b)
/* This macro has no side-effects. */
@@ -239,7 +237,8 @@
#undef WF
#undef WB
-void float_cons PARAMS ((int));
+void float_cons (int);
+int flonum_gen2vax (char, FLONUM_TYPE *, LITTLENUM_TYPE *);
const pseudo_typeS md_pseudo_table[] =
{
@@ -263,47 +262,12 @@
#define STATE_BYTE (0)
#define STATE_WORD (1)
#define STATE_LONG (2)
-#define STATE_UNDF (3) /* Symbol undefined in pass1 */
+#define STATE_UNDF (3) /* Symbol undefined in pass1. */
#define min(a, b) ((a) < (b) ? (a) : (b))
-
-int flonum_gen2vax PARAMS ((char format_letter, FLONUM_TYPE * f,
- LITTLENUM_TYPE * words));
-static const char *vip_begin PARAMS ((int, const char *, const char *,
- const char *));
-static void vip_op_1 PARAMS ((int, const char *));
-static void vip_op_defaults PARAMS ((const char *, const char *, const char *));
-static void vip_op PARAMS ((char *, struct vop *));
-static void vip PARAMS ((struct vit *, char *));
-
-static int vax_reg_parse PARAMS ((char, char, char, char));
-
-void
-md_begin ()
-{
- const char *errtxt;
- FLONUM_TYPE *fP;
- int i;
-
- if ((errtxt = vip_begin (1, "$", "*", "`")) != 0)
- {
- as_fatal (_("VIP_BEGIN error:%s"), errtxt);
- }
-
- for (i = 0, fP = float_operand;
- fP < float_operand + VIT_MAX_OPERANDS;
- i++, fP++)
- {
- fP->low = &big_operand_bits[i][0];
- fP->high = &big_operand_bits[i][SIZE_OF_LARGE_NUMBER - 1];
- }
-}
void
-md_number_to_chars (con, value, nbytes)
- char con[];
- valueT value;
- int nbytes;
+md_number_to_chars (char con[], valueT value, int nbytes)
{
number_to_chars_littleendian (con, value, nbytes);
}
@@ -312,10 +276,7 @@
that they reference. */
void /* Knows about order of bytes in address. */
-md_apply_fix (fixP, valueP, seg)
- fixS *fixP;
- valueT *valueP;
- segT seg ATTRIBUTE_UNUSED;
+md_apply_fix (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED)
{
valueT value = * valueP;
@@ -330,12 +291,15 @@
fixP->fx_done = 1;
}
-long
-md_chars_to_number (con, nbytes)
- unsigned char con[]; /* Low order byte 1st. */
- int nbytes; /* Number of bytes in the input. */
+/* Convert a number from VAX byte order (little endian)
+ into host byte order.
+ con is the buffer to convert,
+ nbytes is the length of the given buffer. */
+static long
+md_chars_to_number (unsigned char con[], int nbytes)
{
long retval;
+
for (retval = 0, con += nbytes - 1; nbytes--; con--)
{
retval <<= BITS_PER_CHAR;
@@ -344,20 +308,18 @@
return retval;
}
-/*
- * Copy a bignum from in to out.
- * If the output is shorter than the input, copy lower-order
- * littlenums. Return 0 or the number of significant littlenums
- * dropped. Assumes littlenum arrays are densely packed: no unused
- * chars between the littlenums. Uses memcpy() to move littlenums, and
- * wants to know length (in chars) of the input bignum.
- */
+/* Copy a bignum from in to out.
+ If the output is shorter than the input, copy lower-order
+ littlenums. Return 0 or the number of significant littlenums
+ dropped. Assumes littlenum arrays are densely packed: no unused
+ chars between the littlenums. Uses memcpy() to move littlenums, and
+ wants to know length (in chars) of the input bignum. */
static int
-bignum_copy (register LITTLENUM_TYPE *in,
- register int in_length, /* in sizeof(littlenum)s */
- register LITTLENUM_TYPE *out,
- register int out_length /* in sizeof(littlenum)s */)
+bignum_copy (LITTLENUM_TYPE *in,
+ int in_length, /* in sizeof(littlenum)s */
+ LITTLENUM_TYPE *out,
+ int out_length /* in sizeof(littlenum)s */)
{
int significant_littlenums_dropped;
@@ -376,9 +338,7 @@
significant_littlenums_dropped = p - in - in_length + 1;
if (significant_littlenums_dropped < 0)
- {
- significant_littlenums_dropped = 0;
- }
+ significant_littlenums_dropped = 0;
}
else
{
@@ -386,891 +346,21 @@
(unsigned int) in_length << LITTLENUM_SHIFT);
if (out_length > in_length)
- {
- memset ((char *) (out + in_length),
- '\0',
- (unsigned int) (out_length - in_length) << LITTLENUM_SHIFT);
- }
+ memset ((char *) (out + in_length), '\0',
+ (unsigned int) (out_length - in_length) << LITTLENUM_SHIFT);
significant_littlenums_dropped = 0;
}
- return (significant_littlenums_dropped);
+ return significant_littlenums_dropped;
}
-/* vax:md_assemble() emit frags for 1 instruction */
-
-void
-md_assemble (instruction_string)
- char *instruction_string; /* A string: assemble 1 instruction. */
-{
- /* Non-zero if operand expression's segment is not known yet. */
- int is_undefined;
- /* Non-zero if operand expression's segment is absolute. */
- int is_absolute;
-
- int length_code;
- char *p;
- /* An operand. Scans all operands. */
- struct vop *operandP;
- char *save_input_line_pointer;
- /* What used to live after an expression. */
- char c_save;
- /* 1: instruction_string bad for all passes. */
- int goofed;
- /* Points to slot just after last operand. */
- struct vop *end_operandP;
- /* Points to expression values for this operand. */
- expressionS *expP;
- segT *segP;
-
- /* These refer to an instruction operand expression. */
- /* Target segment of the address. */
- segT to_seg;
- valueT this_add_number;
- /* Positive (minuend) symbol. */
- symbolS *this_add_symbol;
- /* As a number. */
- long opcode_as_number;
- /* Least significant byte 1st. */
- char *opcode_as_chars;
- /* As an array of characters. */
- /* Least significant byte 1st */
- char *opcode_low_byteP;
- /* length (bytes) meant by vop_short. */
- int length;
- /* 0, or 1 if '@' is in addressing mode. */
- int at;
- /* From vop_nbytes: vax_operand_width (in bytes) */
- int nbytes;
- FLONUM_TYPE *floatP;
- LITTLENUM_TYPE literal_float[8];
- /* Big enough for any floating point literal. */
-
- vip (&v, instruction_string);
-
- /*
- * Now we try to find as many as_warn()s as we can. If we do any as_warn()s
- * then goofed=1. Notice that we don't make any frags yet.
- * Should goofed be 1, then this instruction will wedge in any pass,
- * and we can safely flush it, without causing interpass symbol phase
- * errors. That is, without changing label values in different passes.
- */
- if ((goofed = (*v.vit_error)) != 0)
- {
- as_fatal (_("Ignoring statement due to \"%s\""), v.vit_error);
- }
- /*
- * We need to use expression() and friends, which require us to diddle
- * input_line_pointer. So we save it and restore it later.
- */
- save_input_line_pointer = input_line_pointer;
- for (operandP = v.vit_operand,
- expP = exp_of_operand,
- segP = seg_of_operand,
- floatP = float_operand,
- end_operandP = v.vit_operand + v.vit_operands;
-
- operandP < end_operandP;
-
- operandP++, expP++, segP++, floatP++)
- { /* for each operand */
- if (operandP->vop_error)
- {
- as_fatal (_("Aborting because statement has \"%s\""), operandP->vop_error);
- goofed = 1;
- }
- else
- {
- /* Statement has no syntax goofs: let's sniff the expression. */
- int can_be_short = 0; /* 1 if a bignum can be reduced to a short literal. */
-
- input_line_pointer = operandP->vop_expr_begin;
- c_save = operandP->vop_expr_end[1];
- operandP->vop_expr_end[1] = '\0';
- /* If to_seg == SEG_PASS1, expression() will have set need_pass_2 = 1. */
- *segP = expression (expP);
- switch (expP->X_op)
- {
- case O_absent:
- /* for BSD4.2 compatibility, missing expression is absolute 0 */
- expP->X_op = O_constant;
- expP->X_add_number = 0;
- /* For SEG_ABSOLUTE, we shouldn't need to set X_op_symbol,
- X_add_symbol to any particular value. But, we will program
- defensively. Since this situation occurs rarely so it costs
- us little to do, and stops Dean worrying about the origin of
- random bits in expressionS's. */
- expP->X_add_symbol = NULL;
- expP->X_op_symbol = NULL;
- break;
-
- case O_symbol:
- case O_constant:
- break;
-
- default:
- /*
- * Major bug. We can't handle the case of a
- * SEG_OP expression in a VIT_OPCODE_SYNTHETIC
- * variable-length instruction.
- * We don't have a frag type that is smart enough to
- * relax a SEG_OP, and so we just force all
- * SEG_OPs to behave like SEG_PASS1s.
- * Clearly, if there is a demand we can invent a new or
- * modified frag type and then coding up a frag for this
- * case will be easy. SEG_OP was invented for the
- * .words after a CASE opcode, and was never intended for
- * instruction operands.
- */
- need_pass_2 = 1;
- as_fatal (_("Can't relocate expression"));
- break;
-
- case O_big:
- /* Preserve the bits. */
- if (expP->X_add_number > 0)
- {
- bignum_copy (generic_bignum, expP->X_add_number,
- floatP->low, SIZE_OF_LARGE_NUMBER);
- }
- else
- {
- know (expP->X_add_number < 0);
- flonum_copy (&generic_floating_point_number,
- floatP);
- if (strchr ("s i", operandP->vop_short))
- {
- /* Could possibly become S^# */
- flonum_gen2vax (-expP->X_add_number, floatP, literal_float);
- switch (-expP->X_add_number)
- {
- case 'f':
- can_be_short =
- (literal_float[0] & 0xFC0F) == 0x4000
- && literal_float[1] == 0;
- break;
-
- case 'd':
- can_be_short =
- (literal_float[0] & 0xFC0F) == 0x4000
- && literal_float[1] == 0
- && literal_float[2] == 0
- && literal_float[3] == 0;
- break;
-
- case 'g':
- can_be_short =
- (literal_float[0] & 0xFF81) == 0x4000
- && literal_float[1] == 0
- && literal_float[2] == 0
- && literal_float[3] == 0;
- break;
-
- case 'h':
- can_be_short = ((literal_float[0] & 0xFFF8) == 0x4000
- && (literal_float[1] & 0xE000) == 0
- && literal_float[2] == 0
- && literal_float[3] == 0
- && literal_float[4] == 0
- && literal_float[5] == 0
- && literal_float[6] == 0
- && literal_float[7] == 0);
- break;
-
- default:
- BAD_CASE (-expP->X_add_number);
- break;
- } /* switch (float type) */
- } /* if (could want to become S^#...) */
- } /* bignum or flonum ? */
-
- if (operandP->vop_short == 's'
- || operandP->vop_short == 'i'
- || (operandP->vop_short == ' '
- && operandP->vop_reg == 0xF
- && (operandP->vop_mode & 0xE) == 0x8))
- {
- /* Saw a '#'. */
- if (operandP->vop_short == ' ')
- {
- /* We must chose S^ or I^. */
- if (expP->X_add_number > 0)
- {
- /* Bignum: Short literal impossible. */
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF; /* VAX PC. */
- }
- else
- {
- /* Flonum: Try to do it. */
- if (can_be_short)
- {
- operandP->vop_short = 's';
- operandP->vop_mode = 0;
- operandP->vop_ndx = -1;
- operandP->vop_reg = -1;
- expP->X_op = O_constant;
- }
- else
- {
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF; /* VAX PC */
- }
- } /* bignum or flonum ? */
- } /* if #, but no S^ or I^ seen. */
- /* No more ' ' case: either 's' or 'i'. */
- if (operandP->vop_short == 's')
- {
- /* Wants to be a short literal. */
- if (expP->X_add_number > 0)
- {
- as_warn (_("Bignum not permitted in short literal. Immediate mode assumed."));
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF; /* VAX PC. */
- }
- else
- {
- if (!can_be_short)
- {
- as_warn (_("Can't do flonum short literal: immediate mode used."));
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF; /* VAX PC. */
- }
- else
- { /* Encode short literal now. */
- int temp = 0;
-
- switch (-expP->X_add_number)
- {
- case 'f':
- case 'd':
- temp = literal_float[0] >> 4;
- break;
-
- case 'g':
- temp = literal_float[0] >> 1;
- break;
-
- case 'h':
- temp = ((literal_float[0] << 3) & 070)
- | ((literal_float[1] >> 13) & 07);
- break;
-
- default:
- BAD_CASE (-expP->X_add_number);
- break;
- }
-
- floatP->low[0] = temp & 077;
- floatP->low[1] = 0;
- } /* if can be short literal float */
- } /* flonum or bignum ? */
- }
- else
- { /* I^# seen: set it up if float. */
- if (expP->X_add_number < 0)
- {
- memcpy (floatP->low, literal_float, sizeof (literal_float));
- }
- } /* if S^# seen. */
- }
- else
- {
- as_warn (_("A bignum/flonum may not be a displacement: 0x%lx used"),
- (expP->X_add_number = 0x80000000L));
- /* Chosen so luser gets the most offset bits to patch later. */
- }
- expP->X_add_number = floatP->low[0]
- | ((LITTLENUM_MASK & (floatP->low[1])) << LITTLENUM_NUMBER_OF_BITS);
- /*
- * For the O_big case we have:
- * If vop_short == 's' then a short floating literal is in the
- * lowest 6 bits of floatP -> low [0], which is
- * big_operand_bits [---] [0].
- * If vop_short == 'i' then the appropriate number of elements
- * of big_operand_bits [---] [...] are set up with the correct
- * bits.
- * Also, just in case width is byte word or long, we copy the lowest
- * 32 bits of the number to X_add_number.
- */
- break;
- }
- if (input_line_pointer != operandP->vop_expr_end + 1)
- {
- as_fatal ("Junk at end of expression \"%s\"", input_line_pointer);
- goofed = 1;
- }
- operandP->vop_expr_end[1] = c_save;
- }
- } /* for(each operand) */
-
- input_line_pointer = save_input_line_pointer;
-
- if (need_pass_2 || goofed)
- {
- return;
- }
-
- /* Emit op-code. */
- /* Remember where it is, in case we want to modify the op-code later. */
- opcode_low_byteP = frag_more (v.vit_opcode_nbytes);
- memcpy (opcode_low_byteP, v.vit_opcode, v.vit_opcode_nbytes);
- opcode_as_chars = v.vit_opcode;
- opcode_as_number = md_chars_to_number ((unsigned char *) opcode_as_chars, 4);
- for (operandP = v.vit_operand,
- expP = exp_of_operand,
- segP = seg_of_operand,
- floatP = float_operand,
- end_operandP = v.vit_operand + v.vit_operands;
-
- operandP < end_operandP;
-
- operandP++,
- floatP++,
- segP++,
- expP++)
- {
- if (operandP->vop_ndx >= 0)
- {
- /* indexed addressing byte */
- /* Legality of indexed mode already checked: it is OK */
- FRAG_APPEND_1_CHAR (0x40 + operandP->vop_ndx);
- } /* if(vop_ndx>=0) */
-
- /* Here to make main operand frag(s). */
- this_add_number = expP->X_add_number;
- this_add_symbol = expP->X_add_symbol;
- to_seg = *segP;
- is_undefined = (to_seg == undefined_section);
- is_absolute = (to_seg == absolute_section);
- at = operandP->vop_mode & 1;
- length = (operandP->vop_short == 'b'
- ? 1 : (operandP->vop_short == 'w'
- ? 2 : (operandP->vop_short == 'l'
- ? 4 : 0)));
- nbytes = operandP->vop_nbytes;
- if (operandP->vop_access == 'b')
- {
- if (to_seg == now_seg || is_undefined)
- {
- /* If is_undefined, then it might BECOME now_seg. */
- if (nbytes)
- {
- p = frag_more (nbytes);
- fix_new (frag_now, p - frag_now->fr_literal, nbytes,
- this_add_symbol, this_add_number, 1, NO_RELOC);
- }
- else
- { /* to_seg==now_seg || to_seg == SEG_UNKNOWN */
- /* nbytes==0 */
- length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
- if (opcode_as_number & VIT_OPCODE_SPECIAL)
- {
- if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
- {
- /* br or jsb */
- frag_var (rs_machine_dependent, 5, 1,
- ENCODE_RELAX (STATE_ALWAYS_BRANCH, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- }
- else
- {
- if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
- {
- length_code = STATE_WORD;
- /* JF: There is no state_byte for this one! */
- frag_var (rs_machine_dependent, 10, 2,
- ENCODE_RELAX (STATE_COMPLEX_BRANCH, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- }
- else
- {
- know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
- frag_var (rs_machine_dependent, 9, 1,
- ENCODE_RELAX (STATE_COMPLEX_HOP, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- }
- }
- }
- else
- {
- know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
- frag_var (rs_machine_dependent, 7, 1,
- ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- }
- }
- }
- else
- {
- /* to_seg != now_seg && to_seg != SEG_UNKNOWN */
- /*
- * --- SEG FLOAT MAY APPEAR HERE ----
- */
- if (is_absolute)
- {
- if (nbytes)
- {
- know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
- p = frag_more (nbytes);
- /* Conventional relocation. */
- fix_new (frag_now, p - frag_now->fr_literal, nbytes,
- section_symbol (absolute_section),
- this_add_number, 1, NO_RELOC);
- }
- else
- {
- know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
- if (opcode_as_number & VIT_OPCODE_SPECIAL)
- {
- if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
- {
- /* br or jsb */
- *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
- know (opcode_as_chars[1] == 0);
- p = frag_more (5);
- p[0] = VAX_ABSOLUTE_MODE; /* @#... */
- md_number_to_chars (p + 1, this_add_number, 4);
- /* Now (eg) JMP @#foo or JSB @#foo. */
- }
- else
- {
- if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
- {
- p = frag_more (10);
- p[0] = 2;
- p[1] = 0;
- p[2] = VAX_BRB;
- p[3] = 6;
- p[4] = VAX_JMP;
- p[5] = VAX_ABSOLUTE_MODE; /* @#... */
- md_number_to_chars (p + 6, this_add_number, 4);
- /*
- * Now (eg) ACBx 1f
- * BRB 2f
- * 1: JMP @#foo
- * 2:
- */
- }
- else
- {
- know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
- p = frag_more (9);
- p[0] = 2;
- p[1] = VAX_BRB;
- p[2] = 6;
- p[3] = VAX_JMP;
- p[4] = VAX_ABSOLUTE_MODE; /* @#... */
- md_number_to_chars (p + 5, this_add_number, 4);
- /*
- * Now (eg) xOBxxx 1f
- * BRB 2f
- * 1: JMP @#foo
- * 2:
- */
- }
- }
- }
- else
- {
- /* b<cond> */
- *opcode_low_byteP ^= 1;
- /* To reverse the condition in a VAX branch,
- complement the lowest order bit. */
- p = frag_more (7);
- p[0] = 6;
- p[1] = VAX_JMP;
- p[2] = VAX_ABSOLUTE_MODE; /* @#... */
- md_number_to_chars (p + 3, this_add_number, 4);
- /*
- * Now (eg) BLEQ 1f
- * JMP @#foo
- * 1:
- */
- }
- }
- }
- else
- {
- /* to_seg != now_seg && !is_undefinfed && !is_absolute */
- if (nbytes > 0)
- {
- /* Pc-relative. Conventional relocation. */
- know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
- p = frag_more (nbytes);
- fix_new (frag_now, p - frag_now->fr_literal, nbytes,
- section_symbol (absolute_section),
- this_add_number, 1, NO_RELOC);
- }
- else
- {
- know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
- if (opcode_as_number & VIT_OPCODE_SPECIAL)
- {
- if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
- {
- /* br or jsb */
- know (opcode_as_chars[1] == 0);
- *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
- p = frag_more (5);
- p[0] = VAX_PC_RELATIVE_MODE;
- fix_new (frag_now,
- p + 1 - frag_now->fr_literal, 4,
- this_add_symbol,
- this_add_number, 1, NO_RELOC);
- /* Now eg JMP foo or JSB foo. */
- }
- else
- {
- if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
- {
- p = frag_more (10);
- p[0] = 0;
- p[1] = 2;
- p[2] = VAX_BRB;
- p[3] = 6;
- p[4] = VAX_JMP;
- p[5] = VAX_PC_RELATIVE_MODE;
- fix_new (frag_now,
- p + 6 - frag_now->fr_literal, 4,
- this_add_symbol,
- this_add_number, 1, NO_RELOC);
- /*
- * Now (eg) ACBx 1f
- * BRB 2f
- * 1: JMP foo
- * 2:
- */
- }
- else
- {
- know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
- p = frag_more (10);
- p[0] = 2;
- p[1] = VAX_BRB;
- p[2] = 6;
- p[3] = VAX_JMP;
- p[4] = VAX_PC_RELATIVE_MODE;
- fix_new (frag_now,
- p + 5 - frag_now->fr_literal,
- 4, this_add_symbol,
- this_add_number, 1, NO_RELOC);
- /*
- * Now (eg) xOBxxx 1f
- * BRB 2f
- * 1: JMP foo
- * 2:
- */
- }
- }
- }
- else
- {
- know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
- *opcode_low_byteP ^= 1; /* Reverse branch condition. */
- p = frag_more (7);
- p[0] = 6;
- p[1] = VAX_JMP;
- p[2] = VAX_PC_RELATIVE_MODE;
- fix_new (frag_now, p + 3 - frag_now->fr_literal,
- 4, this_add_symbol,
- this_add_number, 1, NO_RELOC);
- }
- }
- }
- }
- }
- else
- {
- know (operandP->vop_access != 'b'); /* So it is ordinary operand. */
- know (operandP->vop_access != ' '); /* ' ' target-independent: elsewhere. */
- know (operandP->vop_access == 'a'
- || operandP->vop_access == 'm'
- || operandP->vop_access == 'r'
- || operandP->vop_access == 'v'
- || operandP->vop_access == 'w');
- if (operandP->vop_short == 's')
- {
- if (is_absolute)
- {
- if (this_add_number >= 64)
- {
- as_warn (_("Short literal overflow(%ld.), immediate mode assumed."),
- (long) this_add_number);
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF;
- }
- }
- else
- {
- as_warn (_("Forced short literal to immediate mode. now_seg=%s to_seg=%s"),
- segment_name (now_seg), segment_name (to_seg));
- operandP->vop_short = 'i';
- operandP->vop_mode = 8;
- operandP->vop_reg = 0xF;
- }
- }
- if (operandP->vop_reg >= 0 && (operandP->vop_mode < 8
- || (operandP->vop_reg != 0xF && operandP->vop_mode < 10)))
- {
- /* One byte operand. */
- know (operandP->vop_mode > 3);
- FRAG_APPEND_1_CHAR (operandP->vop_mode << 4 | operandP->vop_reg);
- /* All 1-bytes except S^# happen here. */
- }
- else
- {
- /* {@}{q^}foo{(Rn)} or S^#foo */
- if (operandP->vop_reg == -1 && operandP->vop_short != 's')
- {
- /* "{@}{q^}foo" */
- if (to_seg == now_seg)
- {
- if (length == 0)
- {
- know (operandP->vop_short == ' ');
- length_code = STATE_BYTE;
-#ifdef OBJ_ELF
- if (S_IS_EXTERNAL (this_add_symbol)
- || S_IS_WEAK (this_add_symbol))
- length_code = STATE_UNDF;
-#endif
- p = frag_var (rs_machine_dependent, 10, 2,
- ENCODE_RELAX (STATE_PC_RELATIVE, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- know (operandP->vop_mode == 10 + at);
- *p = at << 4;
- /* At is the only context we need to carry
- to other side of relax() process. Must
- be in the correct bit position of VAX
- operand spec. byte. */
- }
- else
- {
- know (length);
- know (operandP->vop_short != ' ');
- p = frag_more (length + 1);
- p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
- fix_new (frag_now, p + 1 - frag_now->fr_literal,
- length, this_add_symbol,
- this_add_number, 1, NO_RELOC);
- }
- }
- else
- { /* to_seg != now_seg */
- if (this_add_symbol == NULL)
- {
- know (is_absolute);
- /* Do @#foo: simpler relocation than foo-.(pc) anyway. */
- p = frag_more (5);
- p[0] = VAX_ABSOLUTE_MODE; /* @#... */
- md_number_to_chars (p + 1, this_add_number, 4);
- if (length && length != 4)
- {
- as_warn (_("Length specification ignored. Address mode 9F used"));
- }
- }
- else
- {
- /* {@}{q^}other_seg */
- know ((length == 0 && operandP->vop_short == ' ')
- || (length > 0 && operandP->vop_short != ' '));
- if (is_undefined
-#ifdef OBJ_ELF
- || S_IS_WEAK(this_add_symbol)
- || S_IS_EXTERNAL(this_add_symbol)
-#endif
- )
- {
- switch (length)
- {
- default: length_code = STATE_UNDF; break;
- case 1: length_code = STATE_BYTE; break;
- case 2: length_code = STATE_WORD; break;
- case 4: length_code = STATE_LONG; break;
- }
- /*
- * We have a SEG_UNKNOWN symbol. It might
- * turn out to be in the same segment as
- * the instruction, permitting relaxation.
- */
- p = frag_var (rs_machine_dependent, 5, 2,
- ENCODE_RELAX (STATE_PC_RELATIVE, length_code),
- this_add_symbol, this_add_number,
- opcode_low_byteP);
- p[0] = at << 4;
- }
- else
- {
- if (length == 0)
- {
- know (operandP->vop_short == ' ');
- length = 4; /* Longest possible. */
- }
- p = frag_more (length + 1);
- p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
- md_number_to_chars (p + 1, this_add_number, length);
- fix_new (frag_now,
- p + 1 - frag_now->fr_literal,
- length, this_add_symbol,
- this_add_number, 1, NO_RELOC);
- }
- }
- }
- }
- else
- {
- /* {@}{q^}foo(Rn) or S^# or I^# or # */
- if (operandP->vop_mode < 0xA)
- {
- /* # or S^# or I^# */
- if (operandP->vop_access == 'v'
- || operandP->vop_access == 'a')
- {
- if (operandP->vop_access == 'v')
- as_warn (_("Invalid operand: immediate value used as base address."));
- else
- as_warn (_("Invalid operand: immediate value used as address."));
- /* gcc 2.6.3 is known to generate these in at least
- one case. */
- }
- if (length == 0
- && is_absolute && (expP->X_op != O_big)
- && operandP->vop_mode == 8 /* No '@'. */
- && this_add_number < 64)
- {
- operandP->vop_short = 's';
- }
- if (operandP->vop_short == 's')
- {
- FRAG_APPEND_1_CHAR (this_add_number);
- }
- else
- {
- /* I^#... */
- know (nbytes);
- p = frag_more (nbytes + 1);
- know (operandP->vop_reg == 0xF);
-#ifdef OBJ_ELF
- if (flag_want_pic && operandP->vop_mode == 8
- && this_add_symbol != NULL)
- {
- as_warn (_("Symbol used as immediate operand in PIC mode."));
- }
-#endif
- p[0] = (operandP->vop_mode << 4) | 0xF;
- if ((is_absolute) && (expP->X_op != O_big))
- {
- /* If nbytes > 4, then we are scrod. We
- don't know if the high order bytes
- are to be 0xFF or 0x00. BSD4.2 & RMS
- say use 0x00. OK --- but this
- assembler needs ANOTHER rewrite to
- cope properly with this bug. */
- md_number_to_chars (p + 1, this_add_number,
- min (sizeof (valueT),
- (size_t) nbytes));
- if ((size_t) nbytes > sizeof (valueT))
- memset (p + 5, '\0', nbytes - sizeof (valueT));
- }
- else
- {
- if (expP->X_op == O_big)
- {
- /*
- * Problem here is to get the bytes
- * in the right order. We stored
- * our constant as LITTLENUMs, not
- * bytes. */
- LITTLENUM_TYPE *lP;
-
- lP = floatP->low;
- if (nbytes & 1)
- {
- know (nbytes == 1);
- p[1] = *lP;
- }
- else
- {
- for (p++; nbytes; nbytes -= 2, p += 2, lP++)
- {
- md_number_to_chars (p, *lP, 2);
- }
- }
- }
- else
- {
- fix_new (frag_now, p + 1 - frag_now->fr_literal,
- nbytes, this_add_symbol,
- this_add_number, 0, NO_RELOC);
- }
- }
- }
- }
- else
- { /* {@}{q^}foo(Rn) */
- know ((length == 0 && operandP->vop_short == ' ')
- || (length > 0 && operandP->vop_short != ' '));
- if (length == 0)
- {
- if (is_absolute)
- {
- long test;
-
- test = this_add_number;
-
- if (test < 0)
- test = ~test;
-
- length = test & 0xffff8000 ? 4
- : test & 0xffffff80 ? 2
- : 1;
- }
- else
- {
- length = 4;
- }
- }
- p = frag_more (1 + length);
- know (operandP->vop_reg >= 0);
- p[0] = operandP->vop_reg
- | ((at | "?\12\14?\16"[length]) << 4);
- if (is_absolute)
- {
- md_number_to_chars (p + 1, this_add_number, length);
- }
- else
- {
- fix_new (frag_now, p + 1 - frag_now->fr_literal,
- length, this_add_symbol,
- this_add_number, 0, NO_RELOC);
- }
- }
- }
- } /* if(single-byte-operand) */
- }
- } /* for(operandP) */
-} /* vax_assemble() */
-
/* md_estimate_size_before_relax(), called just before relax().
Any symbol that is now undefined will not become defined.
Return the correct fr_subtype in the frag and the growth beyond
fr_fix. */
int
-md_estimate_size_before_relax (fragP, segment)
- fragS *fragP;
- segT segment;
+md_estimate_size_before_relax (fragS *fragP, segT segment)
{
if (RELAX_LENGTH (fragP->fr_subtype) == STATE_UNDF)
{
@@ -1413,22 +503,17 @@
return md_relax_table[fragP->fr_subtype].rlx_length;
}
-/*
- * md_convert_frag();
- *
- * Called after relax() is finished.
- * In: Address of frag.
- * fr_type == rs_machine_dependent.
- * fr_subtype is what the address relaxed to.
- *
- * Out: Any fixSs and constants are set up.
- * Caller will turn frag into a ".space 0".
- */
+/* Called after relax() is finished.
+ In: Address of frag.
+ fr_type == rs_machine_dependent.
+ fr_subtype is what the address relaxed to.
+
+ Out: Any fixSs and constants are set up.
+ Caller will turn frag into a ".space 0". */
void
-md_convert_frag (headers, seg, fragP)
- bfd *headers ATTRIBUTE_UNUSED;
- segT seg ATTRIBUTE_UNUSED;
- fragS *fragP;
+md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
+ segT seg ATTRIBUTE_UNUSED,
+ fragS *fragP)
{
char *addressP; /* -> _var to change. */
char *opcodeP; /* -> opcode char(s) to change. */
@@ -1446,7 +531,6 @@
switch (fragP->fr_subtype)
{
-
case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE):
know (*addressP == 0 || *addressP == 0x10); /* '@' bit. */
addressP[0] |= 0xAF; /* Byte displacement. */
@@ -1567,7 +651,7 @@
break;
}
fragP->fr_fix += extension;
-} /* md_convert_frag() */
+}
/* Translate internal format of relocation info into target format.
@@ -1577,98 +661,88 @@
bit 0 as pcrel. */
#ifdef comment
void
-md_ri_to_chars (the_bytes, ri)
- char *the_bytes;
- struct reloc_info_generic ri;
+md_ri_to_chars (char *the_bytes, struct reloc_info_generic ri)
{
- /* this is easy */
+ /* This is easy. */
md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
- /* now the fun stuff */
+ /* Now the fun stuff. */
the_bytes[6] = (ri.r_symbolnum >> 16) & 0x0ff;
the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff;
the_bytes[4] = ri.r_symbolnum & 0x0ff;
- the_bytes[7] = (((ri.r_extern << 3) & 0x08) | ((ri.r_length << 1) & 0x06) |
- ((ri.r_pcrel << 0) & 0x01)) & 0x0F;
+ the_bytes[7] = (((ri.r_extern << 3) & 0x08) | ((ri.r_length << 1) & 0x06)
+ | ((ri.r_pcrel << 0) & 0x01)) & 0x0F;
}
#endif /* comment */
-/*
- * BUGS, GRIPES, APOLOGIA, etc.
- *
- * The opcode table 'votstrs' needs to be sorted on opcode frequency.
- * That is, AFTER we hash it with hash_...(), we want most-used opcodes
- * to come out of the hash table faster.
- *
- * I am sorry to inflict yet another VAX assembler on the world, but
- * RMS says we must do everything from scratch, to prevent pin-heads
- * restricting this software.
- */
+/* BUGS, GRIPES, APOLOGIA, etc.
-/*
- * This is a vaguely modular set of routines in C to parse VAX
- * assembly code using DEC mnemonics. It is NOT un*x specific.
- *
- * The idea here is that the assembler has taken care of all:
- * labels
- * macros
- * listing
- * pseudo-ops
- * line continuation
- * comments
- * condensing any whitespace down to exactly one space
- * and all we have to do is parse 1 line into a vax instruction
- * partially formed. We will accept a line, and deliver:
- * an error message (hopefully empty)
- * a skeleton VAX instruction (tree structure)
- * textual pointers to all the operand expressions
- * a warning message that notes a silly operand (hopefully empty)
- */
-
-/*
- * E D I T H I S T O R Y
- *
- * 17may86 Dean Elsner. Bug if line ends immediately after opcode.
- * 30apr86 Dean Elsner. New vip_op() uses arg block so change call.
- * 6jan86 Dean Elsner. Crock vip_begin() to call vip_op_defaults().
- * 2jan86 Dean Elsner. Invent synthetic opcodes.
- * Widen vax_opcodeT to 32 bits. Use a bit for VIT_OPCODE_SYNTHETIC,
- * which means this is not a real opcode, it is like a macro; it will
- * be relax()ed into 1 or more instructions.
- * Use another bit for VIT_OPCODE_SPECIAL if the op-code is not optimised
- * like a regular branch instruction. Option added to vip_begin():
- * exclude synthetic opcodes. Invent synthetic_votstrs[].
- * 31dec85 Dean Elsner. Invent vit_opcode_nbytes.
- * Also make vit_opcode into a char[]. We now have n-byte vax opcodes,
- * so caller's don't have to know the difference between a 1-byte & a
- * 2-byte op-code. Still need vax_opcodeT concept, so we know how
- * big an object must be to hold an op.code.
- * 30dec85 Dean Elsner. Widen typedef vax_opcodeT in "vax-inst.h"
- * because vax opcodes may be 16 bits. Our crufty C compiler was
- * happily initialising 8-bit vot_codes with 16-bit numbers!
- * (Wouldn't the 'phone company like to compress data so easily!)
- * 29dec85 Dean Elsner. New static table vax_operand_width_size[].
- * Invented so we know hw many bytes a "I^#42" needs in its immediate
- * operand. Revised struct vop in "vax-inst.h": explicitly include
- * byte length of each operand, and it's letter-code datum type.
- * 17nov85 Dean Elsner. Name Change.
- * Due to ar(1) truncating names, we learned the hard way that
- * "vax-inst-parse.c" -> "vax-inst-parse." dropping the "o" off
- * the archived object name. SO... we shortened the name of this
- * source file, and changed the makefile.
- */
+ The opcode table 'votstrs' needs to be sorted on opcode frequency.
+ That is, AFTER we hash it with hash_...(), we want most-used opcodes
+ to come out of the hash table faster.
-/* handle of the OPCODE hash table */
+ I am sorry to inflict yet another VAX assembler on the world, but
+ RMS says we must do everything from scratch, to prevent pin-heads
+ restricting this software.
+
+ This is a vaguely modular set of routines in C to parse VAX
+ assembly code using DEC mnemonics. It is NOT un*x specific.
+
+ The idea here is that the assembler has taken care of all:
+ labels
+ macros
+ listing
+ pseudo-ops
+ line continuation
+ comments
+ condensing any whitespace down to exactly one space
+ and all we have to do is parse 1 line into a vax instruction
+ partially formed. We will accept a line, and deliver:
+ an error message (hopefully empty)
+ a skeleton VAX instruction (tree structure)
+ textual pointers to all the operand expressions
+ a warning message that notes a silly operand (hopefully empty)
+
+ E D I T H I S T O R Y
+
+ 17may86 Dean Elsner. Bug if line ends immediately after opcode.
+ 30apr86 Dean Elsner. New vip_op() uses arg block so change call.
+ 6jan86 Dean Elsner. Crock vip_begin() to call vip_op_defaults().
+ 2jan86 Dean Elsner. Invent synthetic opcodes.
+ Widen vax_opcodeT to 32 bits. Use a bit for VIT_OPCODE_SYNTHETIC,
+ which means this is not a real opcode, it is like a macro; it will
+ be relax()ed into 1 or more instructions.
+ Use another bit for VIT_OPCODE_SPECIAL if the op-code is not optimised
+ like a regular branch instruction. Option added to vip_begin():
+ exclude synthetic opcodes. Invent synthetic_votstrs[].
+ 31dec85 Dean Elsner. Invent vit_opcode_nbytes.
+ Also make vit_opcode into a char[]. We now have n-byte vax opcodes,
+ so caller's don't have to know the difference between a 1-byte & a
+ 2-byte op-code. Still need vax_opcodeT concept, so we know how
+ big an object must be to hold an op.code.
+ 30dec85 Dean Elsner. Widen typedef vax_opcodeT in "vax-inst.h"
+ because vax opcodes may be 16 bits. Our crufty C compiler was
+ happily initialising 8-bit vot_codes with 16-bit numbers!
+ (Wouldn't the 'phone company like to compress data so easily!)
+ 29dec85 Dean Elsner. New static table vax_operand_width_size[].
+ Invented so we know hw many bytes a "I^#42" needs in its immediate
+ operand. Revised struct vop in "vax-inst.h": explicitly include
+ byte length of each operand, and it's letter-code datum type.
+ 17nov85 Dean Elsner. Name Change.
+ Due to ar(1) truncating names, we learned the hard way that
+ "vax-inst-parse.c" -> "vax-inst-parse." dropping the "o" off
+ the archived object name. SO... we shortened the name of this
+ source file, and changed the makefile. */
+
+/* Handle of the OPCODE hash table. */
static struct hash_control *op_hash;
-/*
- * In: 1 character, from "bdfghloqpw" being the data-type of an operand
- * of a vax instruction.
- *
- * Out: the length of an operand of that type, in bytes.
- * Special branch operands types "-?!" have length 0.
- */
+/* In: 1 character, from "bdfghloqpw" being the data-type of an operand
+ of a vax instruction.
+ Out: the length of an operand of that type, in bytes.
+ Special branch operands types "-?!" have length 0. */
+
static const short int vax_operand_width_size[256] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -1689,61 +763,54 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
};
-/*
- * This perversion encodes all the vax opcodes as a bunch of strings.
- * RMS says we should build our hash-table at run-time. Hmm.
- * Please would someone arrange these in decreasing frequency of opcode?
- * Because of the way hash_...() works, the most frequently used opcode
- * should be textually first and so on.
- *
- * Input for this table was 'vax.opcodes', awk(1)ed by 'vax.opcodes.c.awk' .
- * So change 'vax.opcodes', then re-generate this table.
- */
+/* This perversion encodes all the vax opcodes as a bunch of strings.
+ RMS says we should build our hash-table at run-time. Hmm.
+ Please would someone arrange these in decreasing frequency of opcode?
+ Because of the way hash_...() works, the most frequently used opcode
+ should be textually first and so on.
+ Input for this table was 'vax.opcodes', awk(1)ed by 'vax.opcodes.c.awk' .
+ So change 'vax.opcodes', then re-generate this table. */
+
#include "opcode/vax.h"
-/*
- * This is a table of optional op-codes. All of them represent
- * 'synthetic' instructions that seem popular.
- *
- * Here we make some pseudo op-codes. Every code has a bit set to say
- * it is synthetic. This lets you catch them if you want to
- * ban these opcodes. They are mnemonics for "elastic" instructions
- * that are supposed to assemble into the fewest bytes needed to do a
- * branch, or to do a conditional branch, or whatever.
- *
- * The opcode is in the usual place [low-order n*8 bits]. This means
- * that if you mask off the bucky bits, the usual rules apply about
- * how long the opcode is.
- *
- * All VAX branch displacements come at the end of the instruction.
- * For simple branches (1-byte opcode + 1-byte displacement) the last
- * operand is coded 'b?' where the "data type" '?' is a clue that we
- * may reverse the sense of the branch (complement lowest order bit)
- * and branch around a jump. This is by far the most common case.
- * That is why the VIT_OPCODE_SYNTHETIC bit is set: it says this is
- * a 0-byte op-code followed by 2 or more bytes of operand address.
- *
- * If the op-code has VIT_OPCODE_SPECIAL set, then we have a more unusual
- * case.
- *
- * For JBSB & JBR the treatment is the similar, except (1) we have a 'bw'
- * option before (2) we can directly JSB/JMP because there is no condition.
- * These operands have 'b-' as their access/data type.
- *
- * That leaves a bunch of random opcodes: JACBx, JxOBxxx. In these
- * cases, we do the same idea. JACBxxx are all marked with a 'b!'
- * JAOBxxx & JSOBxxx are marked with a 'b:'.
- *
- */
+/* This is a table of optional op-codes. All of them represent
+ 'synthetic' instructions that seem popular.
+
+ Here we make some pseudo op-codes. Every code has a bit set to say
+ it is synthetic. This lets you catch them if you want to
+ ban these opcodes. They are mnemonics for "elastic" instructions
+ that are supposed to assemble into the fewest bytes needed to do a
+ branch, or to do a conditional branch, or whatever.
+
+ The opcode is in the usual place [low-order n*8 bits]. This means
+ that if you mask off the bucky bits, the usual rules apply about
+ how long the opcode is.
+
+ All VAX branch displacements come at the end of the instruction.
+ For simple branches (1-byte opcode + 1-byte displacement) the last
+ operand is coded 'b?' where the "data type" '?' is a clue that we
+ may reverse the sense of the branch (complement lowest order bit)
+ and branch around a jump. This is by far the most common case.
+ That is why the VIT_OPCODE_SYNTHETIC bit is set: it says this is
+ a 0-byte op-code followed by 2 or more bytes of operand address.
+
+ If the op-code has VIT_OPCODE_SPECIAL set, then we have a more unusual
+ case.
+
+ For JBSB & JBR the treatment is the similar, except (1) we have a 'bw'
+ option before (2) we can directly JSB/JMP because there is no condition.
+ These operands have 'b-' as their access/data type.
+
+ That leaves a bunch of random opcodes: JACBx, JxOBxxx. In these
+ cases, we do the same idea. JACBxxx are all marked with a 'b!'
+ JAOBxxx & JSOBxxx are marked with a 'b:'. */
#if (VIT_OPCODE_SYNTHETIC != 0x80000000)
-You have just broken the encoding below, which assumes the sign bit
- means 'I am an imaginary instruction'.
+#error "You have just broken the encoding below, which assumes the sign bit means 'I am an imaginary instruction'."
#endif
#if (VIT_OPCODE_SPECIAL != 0x40000000)
- You have just broken the encoding below, which assumes the 0x40 M bit means
- 'I am not to be "optimised" the way normal branches are'.
+#error "You have just broken the encoding below, which assumes the 0x40 M bit means 'I am not to be "optimised" the way normal branches are'."
#endif
static const struct vot
@@ -1796,25 +863,95 @@
/* CASEx has no branch addresses in our conception of it. */
/* You should use ".word ..." statements after the "case ...". */
- {"", {"", 0}} /* empty is end sentinel */
-
-}; /* synthetic_votstrs */
+ {"", {"", 0}} /* Empty is end sentinel. */
+};
-/*
- * v i p _ b e g i n ( )
- *
- * Call me once before you decode any lines.
- * I decode votstrs into a hash table at op_hash (which I create).
- * I return an error text or null.
- * If you want, I will include the 'synthetic' jXXX instructions in the
- * instruction table.
- * You must nominate metacharacters for eg DEC's "#", "@", "^".
- */
+/* Because this module is useful for both VMS and UN*X style assemblers
+ and because of the variety of UN*X assemblers we must recognise
+ the different conventions for assembler operand notation. For example
+ VMS says "#42" for immediate mode, while most UN*X say "$42".
+ We permit arbitrary sets of (single) characters to represent the
+ 3 concepts that DEC writes '#', '@', '^'. */
+/* Character tests. */
+#define VIP_IMMEDIATE 01 /* Character is like DEC # */
+#define VIP_INDIRECT 02 /* Char is like DEC @ */
+#define VIP_DISPLEN 04 /* Char is like DEC ^ */
+
+#define IMMEDIATEP(c) (vip_metacharacters [(c) & 0xff] & VIP_IMMEDIATE)
+#define INDIRECTP(c) (vip_metacharacters [(c) & 0xff] & VIP_INDIRECT)
+#define DISPLENP(c) (vip_metacharacters [(c) & 0xff] & VIP_DISPLEN)
+
+/* We assume 8 bits per byte. Use vip_op_defaults() to set these up BEFORE we
+ are ever called. */
+
+#if defined(CONST_TABLE)
+#define _ 0,
+#define I VIP_IMMEDIATE,
+#define S VIP_INDIRECT,
+#define D VIP_DISPLEN,
+static const char
+vip_metacharacters[256] =
+{
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /* ^@ ^A ^B ^C ^D ^E ^F ^G ^H ^I ^J ^K ^L ^M ^N ^O*/
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /* ^P ^Q ^R ^S ^T ^U ^V ^W ^X ^Y ^Z ^[ ^\ ^] ^^ ^_ */
+ _ _ _ _ I _ _ _ _ _ S _ _ _ _ _ /* sp ! " # $ % & ' ( ) * + , - . / */
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*0 1 2 3 4 5 6 7 8 9 : ; < = > ?*/
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*@ A B C D E F G H I J K L M N O*/
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*P Q R S T U V W X Y Z [ \ ] ^ _*/
+ D _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*` a b c d e f g h i j k l m n o*/
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*p q r s t u v w x y z { | } ~ ^?*/
+
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+};
+#undef _
+#undef I
+#undef S
+#undef D
+
+#else
+
+static char vip_metacharacters[256];
+
+static void
+vip_op_1 (int bit, const char *syms)
+{
+ unsigned char t;
+
+ while ((t = *syms++) != 0)
+ vip_metacharacters[t] |= bit;
+}
+
+/* Can be called any time. More arguments may appear in future. */
+static void
+vip_op_defaults (const char *immediate, const char *indirect, const char *displen)
+{
+ vip_op_1 (VIP_IMMEDIATE, immediate);
+ vip_op_1 (VIP_INDIRECT, indirect);
+ vip_op_1 (VIP_DISPLEN, displen);
+}
+
+#endif
+
+/* Call me once before you decode any lines.
+ I decode votstrs into a hash table at op_hash (which I create).
+ I return an error text or null.
+ If you want, I will include the 'synthetic' jXXX instructions in the
+ instruction table.
+ You must nominate metacharacters for eg DEC's "#", "@", "^". */
+
static const char *
-vip_begin (synthetic_too, immediate, indirect, displen)
- int synthetic_too; /* 1 means include jXXX op-codes. */
- const char *immediate, *indirect, *displen;
+vip_begin (int synthetic_too, /* 1 means include jXXX op-codes. */
+ const char *immediate,
+ const char *indirect,
+ const char *displen)
{
const struct vot *vP; /* scan votstrs */
const char *retval = 0; /* error text */
@@ -1835,303 +972,65 @@
return retval;
}
-/*
- * v i p ( )
- *
- * This converts a string into a vax instruction.
- * The string must be a bare single instruction in dec-vax (with BSD4 frobs)
- * format.
- * It provides some error messages: at most one fatal error message (which
- * stops the scan) and at most one warning message for each operand.
- * The vax instruction is returned in exploded form, since we have no
- * knowledge of how you parse (or evaluate) your expressions.
- * We do however strip off and decode addressing modes and operation
- * mnemonic.
- *
- * The exploded instruction is returned to a struct vit of your choice.
- * #include "vax-inst.h" to know what a struct vit is.
- *
- * This function's value is a string. If it is not "" then an internal
- * logic error was found: read this code to assign meaning to the string.
- * No argument string should generate such an error string:
- * it means a bug in our code, not in the user's text.
- *
- * You MUST have called vip_begin() once before using this function.
- */
+/* Take 3 char.s, the last of which may be `\0` (non-existent)
+ and return the VAX register number that they represent.
+
+ Return -1 if they don't form a register name. Good names return
+ a number from 0:15 inclusive.
+
+ Case is not important in a name.
+
+ Register names understood are:
+
+ R0
+ R1
+ R2
+ R3
+ R4
+ R5
+ R6
+ R7
+ R8
+ R9
+ R10
+ R11
+ R12 AP
+ R13 FP
+ R14 SP
+ R15 PC */
-static void
-vip (vitP, instring)
- struct vit *vitP; /* We build an exploded instruction here. */
- char *instring; /* Text of a vax instruction: we modify. */
-{
- /* How to bit-encode this opcode. */
- struct vot_wot *vwP;
- /* 1/skip whitespace.2/scan vot_how */
- char *p;
- char *q;
- /* counts number of operands seen */
- unsigned char count;
- /* scan operands in struct vit */
- struct vop *operandp;
- /* error over all operands */
- const char *alloperr;
- /* Remember char, (we clobber it with '\0' temporarily). */
- char c;
- /* Op-code of this instruction. */
- vax_opcodeT oc;
+#define AP 12
+#define FP 13
+#define SP 14
+#define PC 15
- if (*instring == ' ')
- ++instring; /* Skip leading whitespace. */
- for (p = instring; *p && *p != ' '; p++);; /* MUST end in end-of-string or exactly 1 space. */
- /* Scanned up to end of operation-code. */
- /* Operation-code is ended with whitespace. */
- if (p - instring == 0)
- {
- vitP->vit_error = _("No operator");
- count = 0;
- memset (vitP->vit_opcode, '\0', sizeof (vitP->vit_opcode));
- }
- else
- {
- c = *p;
- *p = '\0';
- /*
- * Here with instring pointing to what better be an op-name, and p
- * pointing to character just past that.
- * We trust instring points to an op-name, with no whitespace.
- */
- vwP = (struct vot_wot *) hash_find (op_hash, instring);
- *p = c; /* Restore char after op-code. */
- if (vwP == 0)
- {
- vitP->vit_error = _("Unknown operator");
- count = 0;
- memset (vitP->vit_opcode, '\0', sizeof (vitP->vit_opcode));
- }
- else
- {
- /*
- * We found a match! So let's pick up as many operands as the
- * instruction wants, and even gripe if there are too many.
- * We expect comma to separate each operand.
- * We let instring track the text, while p tracks a part of the
- * struct vot.
- */
- const char *howp;
- /*
- * The lines below know about 2-byte opcodes starting FD,FE or FF.
- * They also understand synthetic opcodes. Note:
- * we return 32 bits of opcode, including bucky bits, BUT
- * an opcode length is either 8 or 16 bits for vit_opcode_nbytes.
- */
- oc = vwP->vot_code; /* The op-code. */
- vitP->vit_opcode_nbytes = (oc & 0xFF) >= 0xFD ? 2 : 1;
- md_number_to_chars (vitP->vit_opcode, oc, 4);
- count = 0; /* no operands seen yet */
- instring = p; /* point just past operation code */
- alloperr = "";
- for (howp = vwP->vot_how, operandp = vitP->vit_operand;
- !(alloperr && *alloperr) && *howp;
- operandp++, howp += 2)
- {
- /*
- * Here to parse one operand. Leave instring pointing just
- * past any one ',' that marks the end of this operand.
- */
- if (!howp[1])
- as_fatal (_("odd number of bytes in operand description"));
- else if (*instring)
- {
- for (q = instring; (c = *q) && c != ','; q++)
- ;
- /*
- * Q points to ',' or '\0' that ends argument. C is that
- * character.
- */
- *q = 0;
- operandp->vop_width = howp[1];
- operandp->vop_nbytes = vax_operand_width_size[(unsigned) howp[1]];
- operandp->vop_access = howp[0];
- vip_op (instring, operandp);
- *q = c; /* Restore input text. */
- if (operandp->vop_error)
- alloperr = _("Bad operand");
- instring = q + (c ? 1 : 0); /* next operand (if any) */
- count++; /* won another argument, may have an operr */
- }
- else
- alloperr = _("Not enough operands");
- }
- if (!*alloperr)
- {
- if (*instring == ' ')
- instring++; /* Skip whitespace. */
- if (*instring)
- alloperr = _("Too many operands");
- }
- vitP->vit_error = alloperr;
- }
- }
- vitP->vit_operands = count;
-}
-
-#ifdef test
-
-/*
- * Test program for above.
- */
-
-struct vit myvit; /* build an exploded vax instruction here */
-char answer[100]; /* human types a line of vax assembler here */
-char *mybug; /* "" or an internal logic diagnostic */
-int mycount; /* number of operands */
-struct vop *myvop; /* scan operands from myvit */
-int mysynth; /* 1 means want synthetic opcodes. */
-char my_immediate[200];
-char my_indirect[200];
-char my_displen[200];
-
-main ()
+/* Returns the register number of something like '%r15' or 'ap', supplied
+ in four single chars. Returns -1 if the register isn't recognized,
+ 0..15 otherwise. */
+static int
+vax_reg_parse (char c1, char c2, char c3, char c4)
{
- char *p;
+ int retval = -1;
- printf ("0 means no synthetic instructions. ");
- printf ("Value for vip_begin? ");
- gets (answer);
- sscanf (answer, "%d", &mysynth);
- printf ("Synthetic opcodes %s be included.\n", mysynth ? "will" : "will not");
- printf ("enter immediate symbols eg enter # ");
- gets (my_immediate);
- printf ("enter indirect symbols eg enter @ ");
- gets (my_indirect);
- printf ("enter displen symbols eg enter ^ ");
- gets (my_displen);
- if (p = vip_begin (mysynth, my_immediate, my_indirect, my_displen))
- {
- error ("vip_begin=%s", p);
- }
- printf ("An empty input line will quit you from the vax instruction parser\n");
- for (;;)
- {
- printf ("vax instruction: ");
- fflush (stdout);
- gets (answer);
- if (!*answer)
- {
- break; /* out of for each input text loop */
- }
- vip (&myvit, answer);
- if (*myvit.vit_error)
- {
- printf ("ERR:\"%s\"\n", myvit.vit_error);
- }
- printf ("opcode=");
- for (mycount = myvit.vit_opcode_nbytes, p = myvit.vit_opcode;
- mycount;
- mycount--, p++
- )
- {
- printf ("%02x ", *p & 0xFF);
- }
- printf (" operand count=%d.\n", mycount = myvit.vit_operands);
- for (myvop = myvit.vit_operand; mycount; mycount--, myvop++)
- {
- printf ("mode=%xx reg=%xx ndx=%xx len='%c'=%c%c%d. expr=\"",
- myvop->vop_mode, myvop->vop_reg, myvop->vop_ndx,
- myvop->vop_short, myvop->vop_access, myvop->vop_width,
- myvop->vop_nbytes);
- for (p = myvop->vop_expr_begin; p <= myvop->vop_expr_end; p++)
- {
- putchar (*p);
- }
- printf ("\"\n");
- if (myvop->vop_error)
- {
- printf (" err:\"%s\"\n", myvop->vop_error);
- }
- if (myvop->vop_warn)
- {
- printf (" wrn:\"%s\"\n", myvop->vop_warn);
- }
- }
- }
- vip_end ();
- exit (EXIT_SUCCESS);
-}
-
-#endif /* #ifdef test */
-
-/* end of vax_ins_parse.c */
-
-/* vax_reg_parse.c - convert a VAX register name to a number */
-
-/* Copyright (C) 1987 Free Software Foundation, Inc. A part of GNU. */
-
-/*
- * v a x _ r e g _ p a r s e ( )
- *
- * Take 3 char.s, the last of which may be `\0` (non-existent)
- * and return the VAX register number that they represent.
- *
- * Return -1 if they don't form a register name. Good names return
- * a number from 0:15 inclusive.
- *
- * Case is not important in a name.
- *
- * Register names understood are:
- *
- * R0
- * R1
- * R2
- * R3
- * R4
- * R5
- * R6
- * R7
- * R8
- * R9
- * R10
- * R11
- * R12 AP
- * R13 FP
- * R14 SP
- * R15 PC
- *
- */
-
-#include "safe-ctype.h"
-#define AP (12)
-#define FP (13)
-#define SP (14)
-#define PC (15)
-
-int /* return -1 or 0:15 */
-vax_reg_parse (c1, c2, c3, c4) /* 3 chars of register name */
- char c1, c2, c3, c4; /* c3 == 0 if 2-character reg name */
-{
- int retval; /* return -1:15 */
-
- retval = -1;
-
#ifdef OBJ_ELF
- if (c1 != '%') /* register prefixes are mandatory for ELF */
+ if (c1 != '%') /* Register prefixes are mandatory for ELF. */
return retval;
c1 = c2;
c2 = c3;
c3 = c4;
#endif
#ifdef OBJ_VMS
- if (c4 != 0) /* register prefixes are not allowed under VMS */
+ if (c4 != 0) /* Register prefixes are not allowed under VMS. */
return retval;
#endif
#ifdef OBJ_AOUT
- if (c1 == '%') /* register prefixes are optional under a.out */
+ if (c1 == '%') /* Register prefixes are optional under a.out. */
{
c1 = c2;
c2 = c3;
c3 = c4;
}
- else if (c3 && c4) /* can't be 4 characters long. */
+ else if (c3 && c4) /* Can't be 4 characters long. */
return retval;
#endif
@@ -2147,9 +1046,9 @@
/* clamp the register value to 1 hex digit */
}
else if (c3)
- retval = -1; /* c3 must be '\0' or a digit */
+ retval = -1; /* c3 must be '\0' or a digit. */
}
- else if (c3) /* There are no three letter regs */
+ else if (c3) /* There are no three letter regs. */
retval = -1;
else if (c2 == 'p')
{
@@ -2172,290 +1071,206 @@
retval = PC;
else
retval = -1;
- return (retval);
+ return retval;
}
-/*
- * v i p _ o p ( )
- *
- * Parse a vax operand in DEC assembler notation.
- * For speed, expect a string of whitespace to be reduced to a single ' '.
- * This is the case for GNU AS, and is easy for other DEC-compatible
- * assemblers.
- *
- * Knowledge about DEC VAX assembler operand notation lives here.
- * This doesn't even know what a register name is, except it believes
- * all register names are 2 or 3 characters, and lets vax_reg_parse() say
- * what number each name represents.
- * It does, however, know that PC, SP etc are special registers so it can
- * detect addressing modes that are silly for those registers.
- *
- * Where possible, it delivers 1 fatal or 1 warning message if the operand
- * is suspect. Exactly what we test for is still evolving.
- */
+/* Parse a vax operand in DEC assembler notation.
+ For speed, expect a string of whitespace to be reduced to a single ' '.
+ This is the case for GNU AS, and is easy for other DEC-compatible
+ assemblers.
+
+ Knowledge about DEC VAX assembler operand notation lives here.
+ This doesn't even know what a register name is, except it believes
+ all register names are 2 or 3 characters, and lets vax_reg_parse() say
+ what number each name represents.
+ It does, however, know that PC, SP etc are special registers so it can
+ detect addressing modes that are silly for those registers.
+
+ Where possible, it delivers 1 fatal or 1 warning message if the operand
+ is suspect. Exactly what we test for is still evolving.
-/*
- * B u g s
- *
- * Arg block.
- *
- * There were a number of 'mismatched argument type' bugs to vip_op.
- * The most general solution is to typedef each (of many) arguments.
- * We used instead a typedef'd argument block. This is less modular
- * than using separate return pointers for each result, but runs faster
- * on most engines, and seems to keep programmers happy. It will have
- * to be done properly if we ever want to use vip_op as a general-purpose
- * module (it was designed to be).
- *
- * G^
- *
- * Doesn't support DEC "G^" format operands. These always take 5 bytes
- * to express, and code as modes 8F or 9F. Reason: "G^" deprives you of
- * optimising to (say) a "B^" if you are lucky in the way you link.
- * When someone builds a linker smart enough to convert "G^" to "B^", "W^"
- * whenever possible, then we should implement it.
- * If there is some other use for "G^", feel free to code it in!
- *
- *
- * speed
- *
- * If I nested if()s more, I could avoid testing (*err) which would save
- * time, space and page faults. I didn't nest all those if()s for clarity
- * and because I think the mode testing can be re-arranged 1st to test the
- * commoner constructs 1st. Does anybody have statistics on this?
- *
- *
- *
- * error messages
- *
- * In future, we should be able to 'compose' error messages in a scratch area
- * and give the user MUCH more informative error messages. Although this takes
- * a little more code at run-time, it will make this module much more self-
- * documenting. As an example of what sucks now: most error messages have
- * hardwired into them the DEC VAX metacharacters "#^@" which are nothing like
- * the Un*x characters "$`*", that most users will expect from this AS.
- */
-
-/*
- * The input is a string, ending with '\0'.
- *
- * We also require a 'hint' of what kind of operand is expected: so
- * we can remind caller not to write into literals for instance.
- *
- * The output is a skeletal instruction.
- *
- * The algorithm has two parts.
- * 1. extract the syntactic features (parse off all the @^#-()+[] mode crud);
- * 2. express the @^#-()+[] as some parameters suited to further analysis.
- *
- * 2nd step is where we detect the googles of possible invalid combinations
- * a human (or compiler) might write. Note that if we do a half-way
- * decent assembler, we don't know how long to make (eg) displacement
- * fields when we first meet them (because they may not have defined values).
- * So we must wait until we know how many bits are needed for each address,
- * then we can know both length and opcodes of instructions.
- * For reason(s) above, we will pass to our caller a 'broken' instruction
- * of these major components, from which our caller can generate instructions:
- * - displacement length I^ S^ L^ B^ W^ unspecified
- * - mode (many)
- * - register R0-R15 or absent
- * - index register R0-R15 or absent
- * - expression text what we don't parse
- * - error text(s) why we couldn't understand the operand
- */
+ ---
+ Arg block.
+
+ There were a number of 'mismatched argument type' bugs to vip_op.
+ The most general solution is to typedef each (of many) arguments.
+ We used instead a typedef'd argument block. This is less modular
+ than using separate return pointers for each result, but runs faster
+ on most engines, and seems to keep programmers happy. It will have
+ to be done properly if we ever want to use vip_op as a general-purpose
+ module (it was designed to be).
+
+ G^
-/*
- * To decode output of this, test errtxt. If errtxt[0] == '\0', then
- * we had no errors that prevented parsing. Also, if we ever report
- * an internal bug, errtxt[0] is set non-zero. So one test tells you
- * if the other outputs are to be taken seriously.
- */
+ Doesn't support DEC "G^" format operands. These always take 5 bytes
+ to express, and code as modes 8F or 9F. Reason: "G^" deprives you of
+ optimising to (say) a "B^" if you are lucky in the way you link.
+ When someone builds a linker smart enough to convert "G^" to "B^", "W^"
+ whenever possible, then we should implement it.
+ If there is some other use for "G^", feel free to code it in!
-/*
- * Because this module is useful for both VMS and UN*X style assemblers
- * and because of the variety of UN*X assemblers we must recognise
- * the different conventions for assembler operand notation. For example
- * VMS says "#42" for immediate mode, while most UN*X say "$42".
- * We permit arbitrary sets of (single) characters to represent the
- * 3 concepts that DEC writes '#', '@', '^'.
- */
+ speed
+
+ If I nested if()s more, I could avoid testing (*err) which would save
+ time, space and page faults. I didn't nest all those if()s for clarity
+ and because I think the mode testing can be re-arranged 1st to test the
+ commoner constructs 1st. Does anybody have statistics on this?
+
+ error messages
+
+ In future, we should be able to 'compose' error messages in a scratch area
+ and give the user MUCH more informative error messages. Although this takes
+ a little more code at run-time, it will make this module much more self-
+ documenting. As an example of what sucks now: most error messages have
+ hardwired into them the DEC VAX metacharacters "#^@" which are nothing like
+ the Un*x characters "$`*", that most users will expect from this AS.
-/* character tests */
-#define VIP_IMMEDIATE 01 /* Character is like DEC # */
-#define VIP_INDIRECT 02 /* Char is like DEC @ */
-#define VIP_DISPLEN 04 /* Char is like DEC ^ */
+ ----
+
+ The input is a string, ending with '\0'.
+
+ We also require a 'hint' of what kind of operand is expected: so
+ we can remind caller not to write into literals for instance.
+
+ The output is a skeletal instruction.
+
+ The algorithm has two parts.
+ 1. extract the syntactic features (parse off all the @^#-()+[] mode crud);
+ 2. express the @^#-()+[] as some parameters suited to further analysis.
+
+ 2nd step is where we detect the googles of possible invalid combinations
+ a human (or compiler) might write. Note that if we do a half-way
+ decent assembler, we don't know how long to make (eg) displacement
+ fields when we first meet them (because they may not have defined values).
+ So we must wait until we know how many bits are needed for each address,
+ then we can know both length and opcodes of instructions.
+ For reason(s) above, we will pass to our caller a 'broken' instruction
+ of these major components, from which our caller can generate instructions:
+ - displacement length I^ S^ L^ B^ W^ unspecified
+ - mode (many)
+ - register R0-R15 or absent
+ - index register R0-R15 or absent
+ - expression text what we don't parse
+ - error text(s) why we couldn't understand the operand
-#define IMMEDIATEP(c) (vip_metacharacters [(c)&0xff]&VIP_IMMEDIATE)
-#define INDIRECTP(c) (vip_metacharacters [(c)&0xff]&VIP_INDIRECT)
-#define DISPLENP(c) (vip_metacharacters [(c)&0xff]&VIP_DISPLEN)
+ ----
+
+ To decode output of this, test errtxt. If errtxt[0] == '\0', then
+ we had no errors that prevented parsing. Also, if we ever report
+ an internal bug, errtxt[0] is set non-zero. So one test tells you
+ if the other outputs are to be taken seriously.
-/* We assume 8 bits per byte. Use vip_op_defaults() to set these up BEFORE we
- * are ever called.
- */
+ ----
+
+ Dec defines the semantics of address modes (and values)
+ by a two-letter code, explained here.
+
+ letter 1: access type
+
+ a address calculation - no data access, registers forbidden
+ b branch displacement
+ m read - let go of bus - write back "modify"
+ r read
+ v bit field address: like 'a' but registers are OK
+ w write
+ space no operator (eg ".long foo") [our convention]
+
+ letter 2: data type (i.e. width, alignment)
+
+ b byte
+ d double precision floating point (D format)
+ f single precision floating point (F format)
+ g G format floating
+ h H format floating
+ l longword
+ o octaword
+ q quadword
+ w word
+ ? simple synthetic branch operand
+ - unconditional synthetic JSB/JSR operand
+ ! complex synthetic branch operand
+
+ The '-?!' letter 2's are not for external consumption. They are used
+ for various assemblers. Generally, all unknown widths are assumed 0.
+ We don't limit your choice of width character.
+
+ DEC operands are hard work to parse. For example, '@' as the first
+ character means indirect (deferred) mode but elsewhere it is a shift
+ operator.
+ The long-winded explanation of how this is supposed to work is
+ cancelled. Read a DEC vax manual.
+ We try hard not to parse anything that MIGHT be part of the expression
+ buried in that syntax. For example if we see @...(Rn) we don't check
+ for '-' before the '(' because mode @-(Rn) does not exist.
+
+ After parsing we have:
+
+ at 1 if leading '@' (or Un*x '*')
+ len takes one value from " bilsw". eg B^ -> 'b'.
+ hash 1 if leading '#' (or Un*x '$')
+ expr_begin, expr_end the expression we did not parse
+ even though we don't interpret it, we make use
+ of its presence or absence.
+ sign -1: -(Rn) 0: absent +1: (Rn)+
+ paren 1 if () are around register
+ reg major register number 0:15 -1 means absent
+ ndx index register number 0:15 -1 means absent
+
+ Again, I dare not explain it: just trace ALL the code!
-#if defined(CONST_TABLE)
-#define _ 0,
-#define I VIP_IMMEDIATE,
-#define S VIP_INDIRECT,
-#define D VIP_DISPLEN,
-static const char
-vip_metacharacters[256] =
-{
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /* ^@ ^A ^B ^C ^D ^E ^F ^G ^H ^I ^J ^K ^L ^M ^N ^O*/
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /* ^P ^Q ^R ^S ^T ^U ^V ^W ^X ^Y ^Z ^[ ^\ ^] ^^ ^_ */
- _ _ _ _ I _ _ _ _ _ S _ _ _ _ _ /* sp ! " # $ % & ' ( ) * + , - . / */
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*0 1 2 3 4 5 6 7 8 9 : ; < = > ?*/
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*@ A B C D E F G H I J K L M N O*/
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*P Q R S T U V W X Y Z [ \ ] ^ _*/
- D _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*` a b c d e f g h i j k l m n o*/
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ /*p q r s t u v w x y z { | } ~ ^?*/
+ Summary of vip_op outputs.
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
-};
-#undef _
-#undef I
-#undef S
-#undef D
-#else
-static char vip_metacharacters[256];
+ mode reg len ndx
+ (Rn) => @Rn
+ {@}Rn 5+@ n ' ' optional
+ branch operand 0 -1 ' ' -1
+ S^#foo 0 -1 's' -1
+ -(Rn) 7 n ' ' optional
+ {@}(Rn)+ 8+@ n ' ' optional
+ {@}#foo, no S^ 8+@ PC " i" optional
+ {@}{q^}{(Rn)} 10+ at +q option " bwl" optional */
-static void
-vip_op_1 (bit, syms)
- int bit;
- const char *syms;
-{
- unsigned char t;
+/* Dissect user-input 'optext' (which is something like "@B^foo at bar(AP)[FP]:")
+ using the vop in vopP. vopP's vop_access and vop_width. We fill _ndx, _reg,
+ _mode, _short, _warn, _error, _expr_begin, _expr_end and _nbytes. */
- while ((t = *syms++) != 0)
- vip_metacharacters[t] |= bit;
-}
-
-/* Can be called any time. More arguments may appear in future. */
static void
-vip_op_defaults (immediate, indirect, displen)
- const char *immediate;
- const char *indirect;
- const char *displen;
+vip_op (char *optext, struct vop *vopP)
{
- vip_op_1 (VIP_IMMEDIATE, immediate);
- vip_op_1 (VIP_INDIRECT, indirect);
- vip_op_1 (VIP_DISPLEN, displen);
-}
-
-#endif
-
-
-/*
- * Dec defines the semantics of address modes (and values)
- * by a two-letter code, explained here.
- *
- * letter 1: access type
- *
- * a address calculation - no data access, registers forbidden
- * b branch displacement
- * m read - let go of bus - write back "modify"
- * r read
- * v bit field address: like 'a' but registers are OK
- * w write
- * space no operator (eg ".long foo") [our convention]
- *
- * letter 2: data type (i.e. width, alignment)
- *
- * b byte
- * d double precision floating point (D format)
- * f single precision floating point (F format)
- * g G format floating
- * h H format floating
- * l longword
- * o octaword
- * q quadword
- * w word
- * ? simple synthetic branch operand
- * - unconditional synthetic JSB/JSR operand
- * ! complex synthetic branch operand
- *
- * The '-?!' letter 2's are not for external consumption. They are used
- * for various assemblers. Generally, all unknown widths are assumed 0.
- * We don't limit your choice of width character.
- *
- * DEC operands are hard work to parse. For example, '@' as the first
- * character means indirect (deferred) mode but elsewhere it is a shift
- * operator.
- * The long-winded explanation of how this is supposed to work is
- * cancelled. Read a DEC vax manual.
- * We try hard not to parse anything that MIGHT be part of the expression
- * buried in that syntax. For example if we see @...(Rn) we don't check
- * for '-' before the '(' because mode @-(Rn) does not exist.
- *
- * After parsing we have:
- *
- * at 1 if leading '@' (or Un*x '*')
- * len takes one value from " bilsw". eg B^ -> 'b'.
- * hash 1 if leading '#' (or Un*x '$')
- * expr_begin, expr_end the expression we did not parse
- * even though we don't interpret it, we make use
- * of its presence or absence.
- * sign -1: -(Rn) 0: absent +1: (Rn)+
- * paren 1 if () are around register
- * reg major register number 0:15 -1 means absent
- * ndx index register number 0:15 -1 means absent
- *
- * Again, I dare not explain it: just trace ALL the code!
- */
-
-static void
-vip_op (optext, vopP)
- /* user's input string e.g.: "@B^foo at bar(AP)[FP]:" */
- char *optext;
- /* Input fields: vop_access, vop_width.
- Output fields: _ndx, _reg, _mode, _short, _warn,
- _error _expr_begin, _expr_end, _nbytes.
- vop_nbytes : number of bytes in a datum. */
- struct vop *vopP;
-{
- /* track operand text forward */
+ /* Track operand text forward. */
char *p;
- /* track operand text backward */
+ /* Track operand text backward. */
char *q;
- /* 1 if leading '@' ('*') seen */
+ /* 1 if leading '@' ('*') seen. */
int at;
/* one of " bilsw" */
char len;
- /* 1 if leading '#' ('$') seen */
+ /* 1 if leading '#' ('$') seen. */
int hash;
- /* -1, 0 or +1 */
+ /* -1, 0 or +1. */
int sign = 0;
- /* 1 if () surround register */
+ /* 1 if () surround register. */
int paren = 0;
- /* register number, -1:absent */
+ /* Register number, -1:absent. */
int reg = 0;
- /* index register number -1:absent */
+ /* Index register number -1:absent. */
int ndx = 0;
- /* report illegal operand, ""==OK */
- /* " " is a FAKE error: means we won */
+ /* Report illegal operand, ""==OK. */
+ /* " " is a FAKE error: means we won. */
/* ANY err that begins with ' ' is a fake. */
- /* " " is converted to "" before return */
+ /* " " is converted to "" before return. */
const char *err;
- /* warn about weird modes pf address */
+ /* Warn about weird modes pf address. */
const char *wrn;
- /* preserve q in case we backup */
+ /* Preserve q in case we backup. */
char *oldq = NULL;
- /* build up 4-bit operand mode here */
- /* note: index mode is in ndx, this is */
- /* the major mode of operand address */
+ /* Build up 4-bit operand mode here. */
+ /* Note: index mode is in ndx, this is. */
+ /* The major mode of operand address. */
int mode = 0;
- /*
- * Notice how we move wrong-arg-type bugs INSIDE this module: if we
- * get the types wrong below, we lose at compile time rather than at
- * lint or run time.
- */
+ /* Notice how we move wrong-arg-type bugs INSIDE this module: if we
+ get the types wrong below, we lose at compile time rather than at
+ lint or run time. */
char access_mode; /* vop_access. */
char width; /* vop_width. */
@@ -2477,66 +1292,59 @@
p++; /* skip over whitespace */
}
- /*
- * This code is subtle. It tries to detect all legal (letter)'^'
- * but it doesn't waste time explicitly testing for premature '\0' because
- * this case is rejected as a mismatch against either (letter) or '^'.
- */
+ /* This code is subtle. It tries to detect all legal (letter)'^'
+ but it doesn't waste time explicitly testing for premature '\0' because
+ this case is rejected as a mismatch against either (letter) or '^'. */
{
char c;
c = *p;
c = TOLOWER (c);
if (DISPLENP (p[1]) && strchr ("bilws", len = c))
- p += 2; /* skip (letter) '^' */
- else /* no (letter) '^' seen */
- len = ' '; /* len is determined */
+ p += 2; /* Skip (letter) '^'. */
+ else /* No (letter) '^' seen. */
+ len = ' '; /* Len is determined. */
}
if (*p == ' ') /* Expect all whitespace reduced to ' '. */
- p++; /* skip over whitespace */
+ p++;
if ((hash = IMMEDIATEP (*p)) != 0) /* 1 if *p=='#' ('$' for Un*x) */
- p++; /* hash is determined */
+ p++; /* Hash is determined. */
- /*
- * p points to what may be the beginning of an expression.
- * We have peeled off the front all that is peelable.
- * We know at, len, hash.
- *
- * Lets point q at the end of the text and parse that (backwards).
- */
+ /* p points to what may be the beginning of an expression.
+ We have peeled off the front all that is peelable.
+ We know at, len, hash.
+
+ Lets point q at the end of the text and parse that (backwards). */
for (q = p; *q; q++)
;
- q--; /* now q points at last char of text */
-
+ q--; /* Now q points at last char of text. */
+
if (*q == ' ' && q >= p) /* Expect all whitespace reduced to ' '. */
q--;
- /* reverse over whitespace, but don't */
- /* run back over *p */
- /*
- * As a matter of policy here, we look for [Rn], although both Rn and S^#
- * forbid [Rn]. This is because it is easy, and because only a sick
- * cyborg would have [...] trailing an expression in a VAX-like assembler.
- * A meticulous parser would first check for Rn followed by '(' or '['
- * and not parse a trailing ']' if it found another. We just ban expressions
- * ending in ']'.
- */
+ /* Reverse over whitespace, but don't. */
+ /* Run back over *p. */
+
+ /* As a matter of policy here, we look for [Rn], although both Rn and S^#
+ forbid [Rn]. This is because it is easy, and because only a sick
+ cyborg would have [...] trailing an expression in a VAX-like assembler.
+ A meticulous parser would first check for Rn followed by '(' or '['
+ and not parse a trailing ']' if it found another. We just ban expressions
+ ending in ']'. */
if (*q == ']')
{
while (q >= p && *q != '[')
q--;
- /* either q<p or we got matching '[' */
+ /* Either q<p or we got matching '['. */
if (q < p)
err = _("no '[' to match ']'");
else
{
- /*
- * Confusers like "[]" will eventually lose with a bad register
- * name error. So again we don't need to check for early '\0'.
- */
+ /* Confusers like "[]" will eventually lose with a bad register
+ * name error. So again we don't need to check for early '\0'. */
if (q[3] == ']')
ndx = vax_reg_parse (q[1], q[2], 0, 0);
else if (q[4] == ']')
@@ -2545,34 +1353,33 @@
ndx = vax_reg_parse (q[1], q[2], q[3], q[4]);
else
ndx = -1;
- /*
- * Since we saw a ']' we will demand a register name in the [].
- * If luser hasn't given us one: be rude.
- */
+ /* Since we saw a ']' we will demand a register name in the [].
+ * If luser hasn't given us one: be rude. */
if (ndx < 0)
err = _("bad register in []");
else if (ndx == PC)
err = _("[PC] index banned");
else
- q--; /* point q just before "[...]" */
+ /* Point q just before "[...]". */
+ q--;
}
}
else
- ndx = -1; /* no ']', so no iNDeX register */
+ /* No ']', so no iNDeX register. */
+ ndx = -1;
- /*
- * If err = "..." then we lost: run away.
- * Otherwise ndx == -1 if there was no "[...]".
- * Otherwise, ndx is index register number, and q points before "[...]".
- */
-
+ /* If err = "..." then we lost: run away.
+ Otherwise ndx == -1 if there was no "[...]".
+ Otherwise, ndx is index register number, and q points before "[...]". */
+
if (*q == ' ' && q >= p) /* Expect all whitespace reduced to ' '. */
q--;
- /* reverse over whitespace, but don't */
- /* run back over *p */
+ /* Reverse over whitespace, but don't. */
+ /* Run back over *p. */
if (!err || !*err)
{
- sign = 0; /* no ()+ or -() seen yet */
+ /* no ()+ or -() seen yet */
+ sign = 0;
if (q > p + 3 && *q == '+' && q[-1] == ')')
{
@@ -2590,10 +1397,8 @@
err = _("no '(' to match ')'");
else
{
- /*
- * Confusers like "()" will eventually lose with a bad register
- * name error. So again we don't need to check for early '\0'.
- */
+ /* Confusers like "()" will eventually lose with a bad register
+ name error. So again we don't need to check for early '\0'. */
if (q[3] == ')')
reg = vax_reg_parse (q[1], q[2], 0, 0);
else if (q[4] == ')')
@@ -2602,15 +1407,13 @@
reg = vax_reg_parse (q[1], q[2], q[3], q[4]);
else
reg = -1;
- /*
- * Since we saw a ')' we will demand a register name in the ')'.
- * This is nasty: why can't our hypothetical assembler permit
- * parenthesised expressions? BECAUSE I AM LAZY! That is why.
- * Abuse luser if we didn't spy a register name.
- */
+ /* Since we saw a ')' we will demand a register name in the ')'.
+ This is nasty: why can't our hypothetical assembler permit
+ parenthesised expressions? BECAUSE I AM LAZY! That is why.
+ Abuse luser if we didn't spy a register name. */
if (reg < 0)
{
- /* JF allow parenthesized expressions. I hope this works */
+ /* JF allow parenthesized expressions. I hope this works. */
paren = 0;
while (*q != ')')
q++;
@@ -2618,32 +1421,24 @@
}
else
q--; /* point just before '(' of "(...)" */
- /*
- * If err == "..." then we lost. Run away.
- * Otherwise if reg >= 0 then we saw (Rn).
- */
+ /* If err == "..." then we lost. Run away.
+ Otherwise if reg >= 0 then we saw (Rn). */
}
- /*
- * If err == "..." then we lost.
- * Otherwise paren==1 and reg = register in "()".
- */
+ /* If err == "..." then we lost.
+ Otherwise paren==1 and reg = register in "()". */
}
else
paren = 0;
- /*
- * If err == "..." then we lost.
- * Otherwise, q points just before "(Rn)", if any.
- * If there was a "(...)" then paren==1, and reg is the register.
- */
-
- /*
- * We should only seek '-' of "-(...)" if:
- * we saw "(...)" paren == 1
- * we have no errors so far ! *err
- * we did not see '+' of "(...)+" sign < 1
- * We don't check len. We want a specific error message later if
- * user tries "x^...-(Rn)". This is a feature not a bug.
- */
+ /* If err == "..." then we lost.
+ Otherwise, q points just before "(Rn)", if any.
+ If there was a "(...)" then paren==1, and reg is the register. */
+
+ /* We should only seek '-' of "-(...)" if:
+ we saw "(...)" paren == 1
+ we have no errors so far ! *err
+ we did not see '+' of "(...)+" sign < 1
+ We don't check len. We want a specific error message later if
+ user tries "x^...-(Rn)". This is a feature not a bug. */
if (!err || !*err)
{
if (paren && sign < 1)/* !sign is adequate test */
@@ -2654,31 +1449,27 @@
q--;
}
}
- /*
- * We have back-tracked over most
- * of the crud at the end of an operand.
- * Unless err, we know: sign, paren. If paren, we know reg.
- * The last case is of an expression "Rn".
- * This is worth hunting for if !err, !paren.
- * We wouldn't be here if err.
- * We remember to save q, in case we didn't want "Rn" anyway.
- */
+ /* We have back-tracked over most
+ of the crud at the end of an operand.
+ Unless err, we know: sign, paren. If paren, we know reg.
+ The last case is of an expression "Rn".
+ This is worth hunting for if !err, !paren.
+ We wouldn't be here if err.
+ We remember to save q, in case we didn't want "Rn" anyway. */
if (!paren)
{
if (*q == ' ' && q >= p) /* Expect all whitespace reduced to ' '. */
q--;
- /* reverse over whitespace, but don't */
- /* run back over *p */
- /* room for Rn or Rnn (include prefix) exactly? */
+ /* Reverse over whitespace, but don't. */
+ /* Run back over *p. */
+ /* Room for Rn or Rnn (include prefix) exactly? */
if (q > p && q < p + 4)
reg = vax_reg_parse (p[0], p[1],
q < p + 2 ? 0 : p[2],
q < p + 3 ? 0 : p[3]);
else
- reg = -1; /* always comes here if no register at all */
- /*
- * Here with a definitive reg value.
- */
+ reg = -1; /* Always comes here if no register at all. */
+ /* Here with a definitive reg value. */
if (reg >= 0)
{
oldq = q;
@@ -2687,43 +1478,35 @@
}
}
}
- /*
- * have reg. -1:absent; else 0:15
- */
+ /* have reg. -1:absent; else 0:15. */
- /*
- * We have: err, at, len, hash, ndx, sign, paren, reg.
- * Also, any remaining expression is from *p through *q inclusive.
- * Should there be no expression, q==p-1. So expression length = q-p+1.
- * This completes the first part: parsing the operand text.
- */
+ /* We have: err, at, len, hash, ndx, sign, paren, reg.
+ Also, any remaining expression is from *p through *q inclusive.
+ Should there be no expression, q==p-1. So expression length = q-p+1.
+ This completes the first part: parsing the operand text. */
- /*
- * We now want to boil the data down, checking consistency on the way.
- * We want: len, mode, reg, ndx, err, p, q, wrn, bug.
- * We will deliver a 4-bit reg, and a 4-bit mode.
- */
+ /* We now want to boil the data down, checking consistency on the way.
+ We want: len, mode, reg, ndx, err, p, q, wrn, bug.
+ We will deliver a 4-bit reg, and a 4-bit mode. */
- /*
- * Case of branch operand. Different. No L^B^W^I^S^ allowed for instance.
- *
- * in: at ?
- * len ?
- * hash ?
- * p:q ?
- * sign ?
- * paren ?
- * reg ?
- * ndx ?
- *
- * out: mode 0
- * reg -1
- * len ' '
- * p:q whatever was input
- * ndx -1
- * err " " or error message, and other outputs trashed
- */
- /* branch operands have restricted forms */
+ /* Case of branch operand. Different. No L^B^W^I^S^ allowed for instance.
+
+ in: at ?
+ len ?
+ hash ?
+ p:q ?
+ sign ?
+ paren ?
+ reg ?
+ ndx ?
+
+ out: mode 0
+ reg -1
+ len ' '
+ p:q whatever was input
+ ndx -1
+ err " " or error message, and other outputs trashed. */
+ /* Branch operands have restricted forms. */
if ((!err || !*err) && access_mode == 'b')
{
if (at || hash || sign || paren || ndx >= 0 || reg >= 0 || len != ' ')
@@ -2731,28 +1514,26 @@
else
err = " ";
}
-
+
/* Since nobody seems to use it: comment this 'feature'(?) out for now. */
#ifdef NEVER
- /*
- * Case of stand-alone operand. e.g. ".long foo"
- *
- * in: at ?
- * len ?
- * hash ?
- * p:q ?
- * sign ?
- * paren ?
- * reg ?
- * ndx ?
- *
- * out: mode 0
- * reg -1
- * len ' '
- * p:q whatever was input
- * ndx -1
- * err " " or error message, and other outputs trashed
- */
+ /* Case of stand-alone operand. e.g. ".long foo"
+
+ in: at ?
+ len ?
+ hash ?
+ p:q ?
+ sign ?
+ paren ?
+ reg ?
+ ndx ?
+
+ out: mode 0
+ reg -1
+ len ' '
+ p:q whatever was input
+ ndx -1
+ err " " or error message, and other outputs trashed. */
if ((!err || !*err) && access_mode == ' ')
{
if (at)
@@ -2780,26 +1561,24 @@
mode = 0;
}
}
-#endif /*#Ifdef NEVER*/
-
- /*
- * Case of S^#.
- *
- * in: at 0
- * len 's' definition
- * hash 1 demand
- * p:q demand not empty
- * sign 0 by paren==0
- * paren 0 by "()" scan logic because "S^" seen
- * reg -1 or nn by mistake
- * ndx -1
- *
- * out: mode 0
- * reg -1
- * len 's'
- * exp
- * ndx -1
- */
+#endif
+
+ /* Case of S^#.
+
+ in: at 0
+ len 's' definition
+ hash 1 demand
+ p:q demand not empty
+ sign 0 by paren==0
+ paren 0 by "()" scan logic because "S^" seen
+ reg -1 or nn by mistake
+ ndx -1
+
+ out: mode 0
+ reg -1
+ len 's'
+ exp
+ ndx -1 */
if ((!err || !*err) && len == 's')
{
if (!hash || paren || at || ndx >= 0)
@@ -2808,17 +1587,13 @@
{
if (reg >= 0)
{
- /*
- * SHIT! we saw S^#Rnn ! put the Rnn back in
- * expression. KLUDGE! Use oldq so we don't
- * need to know exact length of reg name.
- */
+ /* Darn! we saw S^#Rnn ! put the Rnn back in
+ expression. KLUDGE! Use oldq so we don't
+ need to know exact length of reg name. */
q = oldq;
reg = 0;
}
- /*
- * We have all the expression we will ever get.
- */
+ /* We have all the expression we will ever get. */
if (p > q)
err = _("S^# needs expression");
else if (access_mode == 'r')
@@ -2830,25 +1605,23 @@
err = _("S^# may only read-access");
}
}
-
- /*
- * Case of -(Rn), which is weird case.
- *
- * in: at 0
- * len '
- * hash 0
- * p:q q<p
- * sign -1 by definition
- * paren 1 by definition
- * reg present by definition
- * ndx optional
- *
- * out: mode 7
- * reg present
- * len ' '
- * exp "" enforce empty expression
- * ndx optional warn if same as reg
- */
+
+ /* Case of -(Rn), which is weird case.
+
+ in: at 0
+ len '
+ hash 0
+ p:q q<p
+ sign -1 by definition
+ paren 1 by definition
+ reg present by definition
+ ndx optional
+
+ out: mode 7
+ reg present
+ len ' '
+ exp "" enforce empty expression
+ ndx optional warn if same as reg. */
if ((!err || !*err) && sign < 0)
{
if (len != ' ' || hash || at || p <= q)
@@ -2863,36 +1636,32 @@
wrn = _("[]index same as -()register: unpredictable");
}
}
-
- /*
- * We convert "(Rn)" to "@Rn" for our convenience.
- * (I hope this is convenient: has someone got a better way to parse this?)
- * A side-effect of this is that "@Rn" is a valid operand.
- */
+
+ /* We convert "(Rn)" to "@Rn" for our convenience.
+ (I hope this is convenient: has someone got a better way to parse this?)
+ A side-effect of this is that "@Rn" is a valid operand. */
if (paren && !sign && !hash && !at && len == ' ' && p > q)
{
at = 1;
paren = 0;
}
- /*
- * Case of (Rn)+, which is slightly different.
- *
- * in: at
- * len ' '
- * hash 0
- * p:q q<p
- * sign +1 by definition
- * paren 1 by definition
- * reg present by definition
- * ndx optional
- *
- * out: mode 8+@
- * reg present
- * len ' '
- * exp "" enforce empty expression
- * ndx optional warn if same as reg
- */
+ /* Case of (Rn)+, which is slightly different.
+
+ in: at
+ len ' '
+ hash 0
+ p:q q<p
+ sign +1 by definition
+ paren 1 by definition
+ reg present by definition
+ ndx optional
+
+ out: mode 8+@
+ reg present
+ len ' '
+ exp "" enforce empty expression
+ ndx optional warn if same as reg. */
if ((!err || !*err) && sign > 0)
{
if (len != ' ' || hash || p <= q)
@@ -2907,25 +1676,23 @@
wrn = _("[]index same as ()+register: unpredictable");
}
}
-
- /*
- * Case of #, without S^.
- *
- * in: at
- * len ' ' or 'i'
- * hash 1 by definition
- * p:q
- * sign 0
- * paren 0
- * reg absent
- * ndx optional
- *
- * out: mode 8+@
- * reg PC
- * len ' ' or 'i'
- * exp
- * ndx optional
- */
+
+ /* Case of #, without S^.
+
+ in: at
+ len ' ' or 'i'
+ hash 1 by definition
+ p:q
+ sign 0
+ paren 0
+ reg absent
+ ndx optional
+
+ out: mode 8+@
+ reg PC
+ len ' ' or 'i'
+ exp
+ ndx optional. */
if ((!err || !*err) && hash)
{
if (len != 'i' && len != ' ')
@@ -2936,17 +1703,15 @@
{
if (reg >= 0)
{
- /*
- * SHIT! we saw #Rnn! Put the Rnn back into the expression.
- * By using oldq, we don't need to know how long Rnn was.
- * KLUDGE!
- */
+ /* Darn! we saw #Rnn! Put the Rnn back into the expression.
+ By using oldq, we don't need to know how long Rnn was.
+ KLUDGE! */
q = oldq;
- reg = -1; /* no register any more */
+ reg = -1; /* No register any more. */
}
- err = " "; /* win */
+ err = " "; /* Win. */
- /* JF a bugfix, I think! */
+ /* JF a bugfix, I think! */
if (at && access_mode == 'a')
vopP->vop_nbytes = 4;
@@ -2956,30 +1721,26 @@
wrn = _("writing or modifying # is unpredictable");
}
}
- /*
- * If !*err, then sign == 0
- * hash == 0
- */
-
- /*
- * Case of Rn. We separate this one because it has a few special
- * errors the remaining modes lack.
- *
- * in: at optional
- * len ' '
- * hash 0 by program logic
- * p:q empty
- * sign 0 by program logic
- * paren 0 by definition
- * reg present by definition
- * ndx optional
- *
- * out: mode 5+@
- * reg present
- * len ' ' enforce no length
- * exp "" enforce empty expression
- * ndx optional warn if same as reg
- */
+ /* If !*err, then sign == 0
+ hash == 0 */
+
+ /* Case of Rn. We separate this one because it has a few special
+ errors the remaining modes lack.
+
+ in: at optional
+ len ' '
+ hash 0 by program logic
+ p:q empty
+ sign 0 by program logic
+ paren 0 by definition
+ reg present by definition
+ ndx optional
+
+ out: mode 5+@
+ reg present
+ len ' ' enforce no length
+ exp "" enforce empty expression
+ ndx optional warn if same as reg. */
if ((!err || !*err) && !paren && reg >= 0)
{
if (len != ' ')
@@ -2995,43 +1756,37 @@
err = _("a register has no address");
else
{
- /*
- * Idea here is to detect from length of datum
- * and from register number if we will touch PC.
- * Warn if we do.
- * vop_nbytes is number of bytes in operand.
- * Compute highest byte affected, compare to PC0.
- */
+ /* Idea here is to detect from length of datum
+ and from register number if we will touch PC.
+ Warn if we do.
+ vop_nbytes is number of bytes in operand.
+ Compute highest byte affected, compare to PC0. */
if ((vopP->vop_nbytes + reg * 4) > 60)
wrn = _("PC part of operand unpredictable");
err = " "; /* win */
mode = 5; /* Rn */
}
}
- /*
- * If !*err, sign == 0
- * hash == 0
- * paren == 1 OR reg==-1
- */
-
- /*
- * Rest of cases fit into one bunch.
- *
- * in: at optional
- * len ' ' or 'b' or 'w' or 'l'
- * hash 0 by program logic
- * p:q expected (empty is not an error)
- * sign 0 by program logic
- * paren optional
- * reg optional
- * ndx optional
- *
- * out: mode 10 + @ + len
- * reg optional
- * len ' ' or 'b' or 'w' or 'l'
- * exp maybe empty
- * ndx optional warn if same as reg
- */
+ /* If !*err, sign == 0
+ hash == 0
+ paren == 1 OR reg==-1 */
+
+ /* Rest of cases fit into one bunch.
+
+ in: at optional
+ len ' ' or 'b' or 'w' or 'l'
+ hash 0 by program logic
+ p:q expected (empty is not an error)
+ sign 0 by program logic
+ paren optional
+ reg optional
+ ndx optional
+
+ out: mode 10 + @ + len
+ reg optional
+ len ' ' or 'b' or 'w' or 'l'
+ exp maybe empty
+ ndx optional warn if same as reg. */
if (!err || !*err)
{
err = " "; /* win (always) */
@@ -3042,22 +1797,20 @@
mode += 2;
case 'w':
mode += 2;
- case ' ': /* assumed B^ until our caller changes it */
+ case ' ': /* Assumed B^ until our caller changes it. */
case 'b':
break;
}
}
- /*
- * here with completely specified mode
- * len
- * reg
- * expression p,q
- * ndx
- */
+ /* here with completely specified mode
+ len
+ reg
+ expression p,q
+ ndx. */
if (*err == ' ')
- err = 0; /* " " is no longer an error */
+ err = 0; /* " " is no longer an error. */
vopP->vop_mode = mode;
vopP->vop_reg = reg;
@@ -3068,34 +1821,223 @@
vopP->vop_error = err;
vopP->vop_warn = wrn;
}
+
+/* This converts a string into a vax instruction.
+ The string must be a bare single instruction in dec-vax (with BSD4 frobs)
+ format.
+ It provides some error messages: at most one fatal error message (which
+ stops the scan) and at most one warning message for each operand.
+ The vax instruction is returned in exploded form, since we have no
+ knowledge of how you parse (or evaluate) your expressions.
+ We do however strip off and decode addressing modes and operation
+ mnemonic.
+
+ The exploded instruction is returned to a struct vit of your choice.
+ #include "vax-inst.h" to know what a struct vit is.
+
+ This function's value is a string. If it is not "" then an internal
+ logic error was found: read this code to assign meaning to the string.
+ No argument string should generate such an error string:
+ it means a bug in our code, not in the user's text.
+
+ You MUST have called vip_begin() once before using this function. */
+
+static void
+vip (struct vit *vitP, /* We build an exploded instruction here. */
+ char *instring) /* Text of a vax instruction: we modify. */
+{
+ /* How to bit-encode this opcode. */
+ struct vot_wot *vwP;
+ /* 1/skip whitespace.2/scan vot_how */
+ char *p;
+ char *q;
+ /* counts number of operands seen */
+ unsigned char count;
+ /* scan operands in struct vit */
+ struct vop *operandp;
+ /* error over all operands */
+ const char *alloperr;
+ /* Remember char, (we clobber it with '\0' temporarily). */
+ char c;
+ /* Op-code of this instruction. */
+ vax_opcodeT oc;
+
+ if (*instring == ' ')
+ ++instring;
+
+ /* MUST end in end-of-string or exactly 1 space. */
+ for (p = instring; *p && *p != ' '; p++)
+ ;
+
+ /* Scanned up to end of operation-code. */
+ /* Operation-code is ended with whitespace. */
+ if (p - instring == 0)
+ {
+ vitP->vit_error = _("No operator");
+ count = 0;
+ memset (vitP->vit_opcode, '\0', sizeof (vitP->vit_opcode));
+ }
+ else
+ {
+ c = *p;
+ *p = '\0';
+ /* Here with instring pointing to what better be an op-name, and p
+ pointing to character just past that.
+ We trust instring points to an op-name, with no whitespace. */
+ vwP = (struct vot_wot *) hash_find (op_hash, instring);
+ /* Restore char after op-code. */
+ *p = c;
+ if (vwP == 0)
+ {
+ vitP->vit_error = _("Unknown operator");
+ count = 0;
+ memset (vitP->vit_opcode, '\0', sizeof (vitP->vit_opcode));
+ }
+ else
+ {
+ /* We found a match! So let's pick up as many operands as the
+ instruction wants, and even gripe if there are too many.
+ We expect comma to separate each operand.
+ We let instring track the text, while p tracks a part of the
+ struct vot. */
+ const char *howp;
+ /* The lines below know about 2-byte opcodes starting FD,FE or FF.
+ They also understand synthetic opcodes. Note:
+ we return 32 bits of opcode, including bucky bits, BUT
+ an opcode length is either 8 or 16 bits for vit_opcode_nbytes. */
+ oc = vwP->vot_code; /* The op-code. */
+ vitP->vit_opcode_nbytes = (oc & 0xFF) >= 0xFD ? 2 : 1;
+ md_number_to_chars (vitP->vit_opcode, oc, 4);
+ count = 0; /* No operands seen yet. */
+ instring = p; /* Point just past operation code. */
+ alloperr = "";
+ for (howp = vwP->vot_how, operandp = vitP->vit_operand;
+ !(alloperr && *alloperr) && *howp;
+ operandp++, howp += 2)
+ {
+ /* Here to parse one operand. Leave instring pointing just
+ past any one ',' that marks the end of this operand. */
+ if (!howp[1])
+ as_fatal (_("odd number of bytes in operand description"));
+ else if (*instring)
+ {
+ for (q = instring; (c = *q) && c != ','; q++)
+ ;
+ /* Q points to ',' or '\0' that ends argument. C is that
+ character. */
+ *q = 0;
+ operandp->vop_width = howp[1];
+ operandp->vop_nbytes = vax_operand_width_size[(unsigned) howp[1]];
+ operandp->vop_access = howp[0];
+ vip_op (instring, operandp);
+ *q = c; /* Restore input text. */
+ if (operandp->vop_error)
+ alloperr = _("Bad operand");
+ instring = q + (c ? 1 : 0); /* Next operand (if any). */
+ count++; /* Won another argument, may have an operr. */
+ }
+ else
+ alloperr = _("Not enough operands");
+ }
+ if (!*alloperr)
+ {
+ if (*instring == ' ')
+ instring++;
+ if (*instring)
+ alloperr = _("Too many operands");
+ }
+ vitP->vit_error = alloperr;
+ }
+ }
+ vitP->vit_operands = count;
+}
-/*
+#ifdef test
- Summary of vip_op outputs.
+/* Test program for above. */
- mode reg len ndx
- (Rn) => @Rn
- {@}Rn 5+@ n ' ' optional
- branch operand 0 -1 ' ' -1
- S^#foo 0 -1 's' -1
- -(Rn) 7 n ' ' optional
- {@}(Rn)+ 8+@ n ' ' optional
- {@}#foo, no S^ 8+@ PC " i" optional
- {@}{q^}{(Rn)} 10+ at +q option " bwl" optional
+struct vit myvit; /* Build an exploded vax instruction here. */
+char answer[100]; /* Human types a line of vax assembler here. */
+char *mybug; /* "" or an internal logic diagnostic. */
+int mycount; /* Number of operands. */
+struct vop *myvop; /* Scan operands from myvit. */
+int mysynth; /* 1 means want synthetic opcodes. */
+char my_immediate[200];
+char my_indirect[200];
+char my_displen[200];
- */
+int
+main (void)
+{
+ char *p;
+
+ printf ("0 means no synthetic instructions. ");
+ printf ("Value for vip_begin? ");
+ gets (answer);
+ sscanf (answer, "%d", &mysynth);
+ printf ("Synthetic opcodes %s be included.\n", mysynth ? "will" : "will not");
+ printf ("enter immediate symbols eg enter # ");
+ gets (my_immediate);
+ printf ("enter indirect symbols eg enter @ ");
+ gets (my_indirect);
+ printf ("enter displen symbols eg enter ^ ");
+ gets (my_displen);
+
+ if (p = vip_begin (mysynth, my_immediate, my_indirect, my_displen))
+ error ("vip_begin=%s", p);
+
+ printf ("An empty input line will quit you from the vax instruction parser\n");
+ for (;;)
+ {
+ printf ("vax instruction: ");
+ fflush (stdout);
+ gets (answer);
+ if (!*answer)
+ break; /* Out of for each input text loop. */
+
+ vip (& myvit, answer);
+ if (*myvit.vit_error)
+ printf ("ERR:\"%s\"\n", myvit.vit_error);
+
+ printf ("opcode=");
+ for (mycount = myvit.vit_opcode_nbytes, p = myvit.vit_opcode;
+ mycount;
+ mycount--, p++)
+ printf ("%02x ", *p & 0xFF);
+
+ printf (" operand count=%d.\n", mycount = myvit.vit_operands);
+ for (myvop = myvit.vit_operand; mycount; mycount--, myvop++)
+ {
+ printf ("mode=%xx reg=%xx ndx=%xx len='%c'=%c%c%d. expr=\"",
+ myvop->vop_mode, myvop->vop_reg, myvop->vop_ndx,
+ myvop->vop_short, myvop->vop_access, myvop->vop_width,
+ myvop->vop_nbytes);
+ for (p = myvop->vop_expr_begin; p <= myvop->vop_expr_end; p++)
+ putchar (*p);
+
+ printf ("\"\n");
+ if (myvop->vop_error)
+ printf (" err:\"%s\"\n", myvop->vop_error);
+
+ if (myvop->vop_warn)
+ printf (" wrn:\"%s\"\n", myvop->vop_warn);
+ }
+ }
+ vip_end ();
+ exit (EXIT_SUCCESS);
+}
+
+#endif
#ifdef TEST /* #Define to use this testbed. */
-/*
- * Follows a test program for this function.
- * We declare arrays non-local in case some of our tiny-minded machines
- * default to small stacks. Also, helps with some debuggers.
- */
+/* Follows a test program for this function.
+ We declare arrays non-local in case some of our tiny-minded machines
+ default to small stacks. Also, helps with some debuggers. */
#include <stdio.h>
-char answer[100]; /* human types into here */
+char answer[100]; /* Human types into here. */
char *p; /* */
char *myerr;
char *mywrn;
@@ -3113,7 +2055,8 @@
char my_indirect[200];
char my_displen[200];
-main ()
+int
+main (void)
{
printf ("enter immediate symbols eg enter # ");
gets (my_immediate);
@@ -3122,6 +2065,7 @@
printf ("enter displen symbols eg enter ^ ");
gets (my_displen);
vip_op_defaults (my_immediate, my_indirect, my_displen);
+
for (;;)
{
printf ("access,width (eg 'ab' or 'wh') [empty line to quit] : ");
@@ -3199,9 +2143,8 @@
}
}
-mumble (text, value)
- char *text;
- int value;
+void
+mumble (char *text, int value)
{
printf ("%s:", text);
if (value >= 0)
@@ -3211,20 +2154,17 @@
printf (" ");
}
-#endif /* ifdef TEST */
+#endif
-/* end: vip_op.c */
-
int md_short_jump_size = 3;
int md_long_jump_size = 6;
void
-md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
- char *ptr;
- addressT from_addr;
- addressT to_addr ATTRIBUTE_UNUSED;
- fragS *frag ATTRIBUTE_UNUSED;
- symbolS *to_symbol ATTRIBUTE_UNUSED;
+md_create_short_jump (char *ptr,
+ addressT from_addr,
+ addressT to_addr ATTRIBUTE_UNUSED,
+ fragS *frag ATTRIBUTE_UNUSED,
+ symbolS *to_symbol ATTRIBUTE_UNUSED)
{
valueT offset;
@@ -3233,22 +2173,21 @@
We need to account for the one byte instruction and also its
two byte operand. */
offset = to_addr - (from_addr + 1 + 2);
- *ptr++ = VAX_BRW; /* branch with word (16 bit) offset */
+ *ptr++ = VAX_BRW; /* Branch with word (16 bit) offset. */
md_number_to_chars (ptr, offset, 2);
}
void
-md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
- char *ptr;
- addressT from_addr ATTRIBUTE_UNUSED;
- addressT to_addr;
- fragS *frag;
- symbolS *to_symbol;
+md_create_long_jump (char *ptr,
+ addressT from_addr ATTRIBUTE_UNUSED,
+ addressT to_addr,
+ fragS *frag,
+ symbolS *to_symbol)
{
valueT offset;
offset = to_addr - S_GET_VALUE (to_symbol);
- *ptr++ = VAX_JMP; /* arbitrary jump */
+ *ptr++ = VAX_JMP; /* Arbitrary jump. */
*ptr++ = VAX_ABSOLUTE_MODE;
md_number_to_chars (ptr, offset, 4);
fix_new (frag, ptr - frag->fr_literal, 4, to_symbol, (long) 0, 0, NO_RELOC);
@@ -3261,19 +2200,18 @@
#else
const char *md_shortopts = "d:STt:V";
#endif
-struct option md_longopts[] = {
+struct option md_longopts[] =
+{
#ifdef OBJ_ELF
#define OPTION_PIC (OPTION_MD_BASE)
- {"pic", no_argument, NULL, OPTION_PIC},
+ { "pic", no_argument, NULL, OPTION_PIC },
#endif
- {NULL, no_argument, NULL, 0}
+ { NULL, no_argument, NULL, 0 }
};
size_t md_longopts_size = sizeof (md_longopts);
int
-md_parse_option (c, arg)
- int c;
- char *arg;
+md_parse_option (int c, char *arg)
{
switch (c)
{
@@ -3302,15 +2240,15 @@
flag_hash_long_names = 1;
break;
- case '1': /* For backward compatibility */
+ case '1': /* For backward compatibility. */
flag_one = 1;
break;
- case 'H': /* Show new symbol after hash truncation */
+ case 'H': /* Show new symbol after hash truncation. */
flag_show_after_trunc = 1;
break;
- case 'h': /* No hashing of mixed-case names */
+ case 'h': /* No hashing of mixed-case names. */
{
extern char vms_name_mapping;
vms_name_mapping = atoi (arg);
@@ -3321,8 +2259,9 @@
case 'v':
{
extern char *compiler_version_string;
+
if (!arg || !*arg || access (arg, 0) == 0)
- return 0; /* have caller show the assembler version */
+ return 0; /* Have caller show the assembler version. */
compiler_version_string = arg;
}
break;
@@ -3332,7 +2271,7 @@
case OPTION_PIC:
case 'k':
flag_want_pic = 1;
- break; /* -pic, Position Independent Code */
+ break; /* -pic, Position Independent Code. */
/* -Qy, -Qn: SVR4 arguments controlling whether a .comment
section should be emitted or not. FIXME: Not implemented. */
@@ -3348,8 +2287,7 @@
}
void
-md_show_usage (stream)
- FILE *stream;
+md_show_usage (FILE *stream)
{
fprintf (stream, _("\
VAX options:\n\
@@ -3374,41 +2312,36 @@
/* We have no need to default values of symbols. */
symbolS *
-md_undefined_symbol (name)
- char *name ATTRIBUTE_UNUSED;
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
- return 0;
+ return NULL;
}
/* Round up a section size to the appropriate boundary. */
valueT
-md_section_align (segment, size)
- segT segment ATTRIBUTE_UNUSED;
- valueT size;
+md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
{
- return size; /* Byte alignment is fine */
+ /* Byte alignment is fine */
+ return size;
}
/* Exactly what point is a PC-relative offset relative TO?
On the vax, they're relative to the address of the offset, plus
its size. */
long
-md_pcrel_from (fixP)
- fixS *fixP;
+md_pcrel_from (fixS *fixP)
{
return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
}
arelent *
-tc_gen_reloc (section, fixp)
- asection *section ATTRIBUTE_UNUSED;
- fixS *fixp;
+tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
bfd_reloc_code_real_type code;
if (fixp->fx_tcbit)
- abort();
+ abort ();
if (fixp->fx_r_type != BFD_RELOC_NONE)
{
@@ -3456,8 +2389,8 @@
#undef F
#undef MAP
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ reloc = xmalloc (sizeof (arelent));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
#ifndef OBJ_ELF
@@ -3475,4 +2408,862 @@
return reloc;
}
-/* end of tc-vax.c */
+/* vax:md_assemble() emit frags for 1 instruction given in textual form. */
+void
+md_assemble (char *instruction_string)
+{
+ /* Non-zero if operand expression's segment is not known yet. */
+ int is_undefined;
+ /* Non-zero if operand expression's segment is absolute. */
+ int is_absolute;
+ int length_code;
+ char *p;
+ /* An operand. Scans all operands. */
+ struct vop *operandP;
+ char *save_input_line_pointer;
+ /* What used to live after an expression. */
+ char c_save;
+ /* 1: instruction_string bad for all passes. */
+ int goofed;
+ /* Points to slot just after last operand. */
+ struct vop *end_operandP;
+ /* Points to expression values for this operand. */
+ expressionS *expP;
+ segT *segP;
+
+ /* These refer to an instruction operand expression. */
+ /* Target segment of the address. */
+ segT to_seg;
+ valueT this_add_number;
+ /* Positive (minuend) symbol. */
+ symbolS *this_add_symbol;
+ /* As a number. */
+ long opcode_as_number;
+ /* Least significant byte 1st. */
+ char *opcode_as_chars;
+ /* As an array of characters. */
+ /* Least significant byte 1st */
+ char *opcode_low_byteP;
+ /* length (bytes) meant by vop_short. */
+ int length;
+ /* 0, or 1 if '@' is in addressing mode. */
+ int at;
+ /* From vop_nbytes: vax_operand_width (in bytes) */
+ int nbytes;
+ FLONUM_TYPE *floatP;
+ LITTLENUM_TYPE literal_float[8];
+ /* Big enough for any floating point literal. */
+
+ vip (&v, instruction_string);
+
+ /* Now we try to find as many as_warn()s as we can. If we do any as_warn()s
+ then goofed=1. Notice that we don't make any frags yet.
+ Should goofed be 1, then this instruction will wedge in any pass,
+ and we can safely flush it, without causing interpass symbol phase
+ errors. That is, without changing label values in different passes. */
+ if ((goofed = (*v.vit_error)) != 0)
+ {
+ as_fatal (_("Ignoring statement due to \"%s\""), v.vit_error);
+ }
+ /* We need to use expression() and friends, which require us to diddle
+ input_line_pointer. So we save it and restore it later. */
+ save_input_line_pointer = input_line_pointer;
+ for (operandP = v.vit_operand,
+ expP = exp_of_operand,
+ segP = seg_of_operand,
+ floatP = float_operand,
+ end_operandP = v.vit_operand + v.vit_operands;
+
+ operandP < end_operandP;
+
+ operandP++, expP++, segP++, floatP++)
+ {
+ if (operandP->vop_error)
+ {
+ as_fatal (_("Aborting because statement has \"%s\""), operandP->vop_error);
+ goofed = 1;
+ }
+ else
+ {
+ /* Statement has no syntax goofs: let's sniff the expression. */
+ int can_be_short = 0; /* 1 if a bignum can be reduced to a short literal. */
+
+ input_line_pointer = operandP->vop_expr_begin;
+ c_save = operandP->vop_expr_end[1];
+ operandP->vop_expr_end[1] = '\0';
+ /* If to_seg == SEG_PASS1, expression() will have set need_pass_2 = 1. */
+ *segP = expression (expP);
+ switch (expP->X_op)
+ {
+ case O_absent:
+ /* for BSD4.2 compatibility, missing expression is absolute 0 */
+ expP->X_op = O_constant;
+ expP->X_add_number = 0;
+ /* For SEG_ABSOLUTE, we shouldn't need to set X_op_symbol,
+ X_add_symbol to any particular value. But, we will program
+ defensively. Since this situation occurs rarely so it costs
+ us little to do, and stops Dean worrying about the origin of
+ random bits in expressionS's. */
+ expP->X_add_symbol = NULL;
+ expP->X_op_symbol = NULL;
+ break;
+
+ case O_symbol:
+ case O_constant:
+ break;
+
+ default:
+ /* Major bug. We can't handle the case of a
+ SEG_OP expression in a VIT_OPCODE_SYNTHETIC
+ variable-length instruction.
+ We don't have a frag type that is smart enough to
+ relax a SEG_OP, and so we just force all
+ SEG_OPs to behave like SEG_PASS1s.
+ Clearly, if there is a demand we can invent a new or
+ modified frag type and then coding up a frag for this
+ case will be easy. SEG_OP was invented for the
+ .words after a CASE opcode, and was never intended for
+ instruction operands. */
+ need_pass_2 = 1;
+ as_fatal (_("Can't relocate expression"));
+ break;
+
+ case O_big:
+ /* Preserve the bits. */
+ if (expP->X_add_number > 0)
+ {
+ bignum_copy (generic_bignum, expP->X_add_number,
+ floatP->low, SIZE_OF_LARGE_NUMBER);
+ }
+ else
+ {
+ know (expP->X_add_number < 0);
+ flonum_copy (&generic_floating_point_number,
+ floatP);
+ if (strchr ("s i", operandP->vop_short))
+ {
+ /* Could possibly become S^# */
+ flonum_gen2vax (-expP->X_add_number, floatP, literal_float);
+ switch (-expP->X_add_number)
+ {
+ case 'f':
+ can_be_short =
+ (literal_float[0] & 0xFC0F) == 0x4000
+ && literal_float[1] == 0;
+ break;
+
+ case 'd':
+ can_be_short =
+ (literal_float[0] & 0xFC0F) == 0x4000
+ && literal_float[1] == 0
+ && literal_float[2] == 0
+ && literal_float[3] == 0;
+ break;
+
+ case 'g':
+ can_be_short =
+ (literal_float[0] & 0xFF81) == 0x4000
+ && literal_float[1] == 0
+ && literal_float[2] == 0
+ && literal_float[3] == 0;
+ break;
+
+ case 'h':
+ can_be_short = ((literal_float[0] & 0xFFF8) == 0x4000
+ && (literal_float[1] & 0xE000) == 0
+ && literal_float[2] == 0
+ && literal_float[3] == 0
+ && literal_float[4] == 0
+ && literal_float[5] == 0
+ && literal_float[6] == 0
+ && literal_float[7] == 0);
+ break;
+
+ default:
+ BAD_CASE (-expP->X_add_number);
+ break;
+ }
+ }
+ }
+
+ if (operandP->vop_short == 's'
+ || operandP->vop_short == 'i'
+ || (operandP->vop_short == ' '
+ && operandP->vop_reg == 0xF
+ && (operandP->vop_mode & 0xE) == 0x8))
+ {
+ /* Saw a '#'. */
+ if (operandP->vop_short == ' ')
+ {
+ /* We must chose S^ or I^. */
+ if (expP->X_add_number > 0)
+ {
+ /* Bignum: Short literal impossible. */
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF; /* VAX PC. */
+ }
+ else
+ {
+ /* Flonum: Try to do it. */
+ if (can_be_short)
+ {
+ operandP->vop_short = 's';
+ operandP->vop_mode = 0;
+ operandP->vop_ndx = -1;
+ operandP->vop_reg = -1;
+ expP->X_op = O_constant;
+ }
+ else
+ {
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF; /* VAX PC */
+ }
+ } /* bignum or flonum ? */
+ } /* if #, but no S^ or I^ seen. */
+ /* No more ' ' case: either 's' or 'i'. */
+ if (operandP->vop_short == 's')
+ {
+ /* Wants to be a short literal. */
+ if (expP->X_add_number > 0)
+ {
+ as_warn (_("Bignum not permitted in short literal. Immediate mode assumed."));
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF; /* VAX PC. */
+ }
+ else
+ {
+ if (!can_be_short)
+ {
+ as_warn (_("Can't do flonum short literal: immediate mode used."));
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF; /* VAX PC. */
+ }
+ else
+ {
+ /* Encode short literal now. */
+ int temp = 0;
+
+ switch (-expP->X_add_number)
+ {
+ case 'f':
+ case 'd':
+ temp = literal_float[0] >> 4;
+ break;
+
+ case 'g':
+ temp = literal_float[0] >> 1;
+ break;
+
+ case 'h':
+ temp = ((literal_float[0] << 3) & 070)
+ | ((literal_float[1] >> 13) & 07);
+ break;
+
+ default:
+ BAD_CASE (-expP->X_add_number);
+ break;
+ }
+
+ floatP->low[0] = temp & 077;
+ floatP->low[1] = 0;
+ }
+ }
+ }
+ else
+ {
+ /* I^# seen: set it up if float. */
+ if (expP->X_add_number < 0)
+ {
+ memcpy (floatP->low, literal_float, sizeof (literal_float));
+ }
+ } /* if S^# seen. */
+ }
+ else
+ {
+ as_warn (_("A bignum/flonum may not be a displacement: 0x%lx used"),
+ (expP->X_add_number = 0x80000000L));
+ /* Chosen so luser gets the most offset bits to patch later. */
+ }
+ expP->X_add_number = floatP->low[0]
+ | ((LITTLENUM_MASK & (floatP->low[1])) << LITTLENUM_NUMBER_OF_BITS);
+
+ /* For the O_big case we have:
+ If vop_short == 's' then a short floating literal is in the
+ lowest 6 bits of floatP -> low [0], which is
+ big_operand_bits [---] [0].
+ If vop_short == 'i' then the appropriate number of elements
+ of big_operand_bits [---] [...] are set up with the correct
+ bits.
+ Also, just in case width is byte word or long, we copy the lowest
+ 32 bits of the number to X_add_number. */
+ break;
+ }
+ if (input_line_pointer != operandP->vop_expr_end + 1)
+ {
+ as_fatal ("Junk at end of expression \"%s\"", input_line_pointer);
+ goofed = 1;
+ }
+ operandP->vop_expr_end[1] = c_save;
+ }
+ }
+
+ input_line_pointer = save_input_line_pointer;
+
+ if (need_pass_2 || goofed)
+ return;
+
+ /* Emit op-code. */
+ /* Remember where it is, in case we want to modify the op-code later. */
+ opcode_low_byteP = frag_more (v.vit_opcode_nbytes);
+ memcpy (opcode_low_byteP, v.vit_opcode, v.vit_opcode_nbytes);
+ opcode_as_chars = v.vit_opcode;
+ opcode_as_number = md_chars_to_number ((unsigned char *) opcode_as_chars, 4);
+ for (operandP = v.vit_operand,
+ expP = exp_of_operand,
+ segP = seg_of_operand,
+ floatP = float_operand,
+ end_operandP = v.vit_operand + v.vit_operands;
+
+ operandP < end_operandP;
+
+ operandP++,
+ floatP++,
+ segP++,
+ expP++)
+ {
+ if (operandP->vop_ndx >= 0)
+ {
+ /* Indexed addressing byte. */
+ /* Legality of indexed mode already checked: it is OK. */
+ FRAG_APPEND_1_CHAR (0x40 + operandP->vop_ndx);
+ } /* if(vop_ndx>=0) */
+
+ /* Here to make main operand frag(s). */
+ this_add_number = expP->X_add_number;
+ this_add_symbol = expP->X_add_symbol;
+ to_seg = *segP;
+ is_undefined = (to_seg == undefined_section);
+ is_absolute = (to_seg == absolute_section);
+ at = operandP->vop_mode & 1;
+ length = (operandP->vop_short == 'b'
+ ? 1 : (operandP->vop_short == 'w'
+ ? 2 : (operandP->vop_short == 'l'
+ ? 4 : 0)));
+ nbytes = operandP->vop_nbytes;
+ if (operandP->vop_access == 'b')
+ {
+ if (to_seg == now_seg || is_undefined)
+ {
+ /* If is_undefined, then it might BECOME now_seg. */
+ if (nbytes)
+ {
+ p = frag_more (nbytes);
+ fix_new (frag_now, p - frag_now->fr_literal, nbytes,
+ this_add_symbol, this_add_number, 1, NO_RELOC);
+ }
+ else
+ {
+ /* to_seg==now_seg || to_seg == SEG_UNKNOWN */
+ /* nbytes==0 */
+ length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
+ if (opcode_as_number & VIT_OPCODE_SPECIAL)
+ {
+ if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+ {
+ /* br or jsb */
+ frag_var (rs_machine_dependent, 5, 1,
+ ENCODE_RELAX (STATE_ALWAYS_BRANCH, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ }
+ else
+ {
+ if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+ {
+ length_code = STATE_WORD;
+ /* JF: There is no state_byte for this one! */
+ frag_var (rs_machine_dependent, 10, 2,
+ ENCODE_RELAX (STATE_COMPLEX_BRANCH, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ }
+ else
+ {
+ know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+ frag_var (rs_machine_dependent, 9, 1,
+ ENCODE_RELAX (STATE_COMPLEX_HOP, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ }
+ }
+ }
+ else
+ {
+ know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
+ frag_var (rs_machine_dependent, 7, 1,
+ ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ }
+ }
+ }
+ else
+ {
+ /* to_seg != now_seg && to_seg != SEG_UNKNOWN */
+ /* --- SEG FLOAT MAY APPEAR HERE --- */
+ if (is_absolute)
+ {
+ if (nbytes)
+ {
+ know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
+ p = frag_more (nbytes);
+ /* Conventional relocation. */
+ fix_new (frag_now, p - frag_now->fr_literal, nbytes,
+ section_symbol (absolute_section),
+ this_add_number, 1, NO_RELOC);
+ }
+ else
+ {
+ know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
+ if (opcode_as_number & VIT_OPCODE_SPECIAL)
+ {
+ if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+ {
+ /* br or jsb */
+ *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
+ know (opcode_as_chars[1] == 0);
+ p = frag_more (5);
+ p[0] = VAX_ABSOLUTE_MODE; /* @#... */
+ md_number_to_chars (p + 1, this_add_number, 4);
+ /* Now (eg) JMP @#foo or JSB @#foo. */
+ }
+ else
+ {
+ if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+ {
+ p = frag_more (10);
+ p[0] = 2;
+ p[1] = 0;
+ p[2] = VAX_BRB;
+ p[3] = 6;
+ p[4] = VAX_JMP;
+ p[5] = VAX_ABSOLUTE_MODE; /* @#... */
+ md_number_to_chars (p + 6, this_add_number, 4);
+ /* Now (eg) ACBx 1f
+ BRB 2f
+ 1: JMP @#foo
+ 2: */
+ }
+ else
+ {
+ know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+ p = frag_more (9);
+ p[0] = 2;
+ p[1] = VAX_BRB;
+ p[2] = 6;
+ p[3] = VAX_JMP;
+ p[4] = VAX_ABSOLUTE_MODE; /* @#... */
+ md_number_to_chars (p + 5, this_add_number, 4);
+ /* Now (eg) xOBxxx 1f
+ BRB 2f
+ 1: JMP @#foo
+ 2: */
+ }
+ }
+ }
+ else
+ {
+ /* b<cond> */
+ *opcode_low_byteP ^= 1;
+ /* To reverse the condition in a VAX branch,
+ complement the lowest order bit. */
+ p = frag_more (7);
+ p[0] = 6;
+ p[1] = VAX_JMP;
+ p[2] = VAX_ABSOLUTE_MODE; /* @#... */
+ md_number_to_chars (p + 3, this_add_number, 4);
+ /* Now (eg) BLEQ 1f
+ JMP @#foo
+ 1: */
+ }
+ }
+ }
+ else
+ {
+ /* to_seg != now_seg && !is_undefinfed && !is_absolute */
+ if (nbytes > 0)
+ {
+ /* Pc-relative. Conventional relocation. */
+ know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
+ p = frag_more (nbytes);
+ fix_new (frag_now, p - frag_now->fr_literal, nbytes,
+ section_symbol (absolute_section),
+ this_add_number, 1, NO_RELOC);
+ }
+ else
+ {
+ know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
+ if (opcode_as_number & VIT_OPCODE_SPECIAL)
+ {
+ if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+ {
+ /* br or jsb */
+ know (opcode_as_chars[1] == 0);
+ *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
+ p = frag_more (5);
+ p[0] = VAX_PC_RELATIVE_MODE;
+ fix_new (frag_now,
+ p + 1 - frag_now->fr_literal, 4,
+ this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ /* Now eg JMP foo or JSB foo. */
+ }
+ else
+ {
+ if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+ {
+ p = frag_more (10);
+ p[0] = 0;
+ p[1] = 2;
+ p[2] = VAX_BRB;
+ p[3] = 6;
+ p[4] = VAX_JMP;
+ p[5] = VAX_PC_RELATIVE_MODE;
+ fix_new (frag_now,
+ p + 6 - frag_now->fr_literal, 4,
+ this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ /* Now (eg) ACBx 1f
+ BRB 2f
+ 1: JMP foo
+ 2: */
+ }
+ else
+ {
+ know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+ p = frag_more (10);
+ p[0] = 2;
+ p[1] = VAX_BRB;
+ p[2] = 6;
+ p[3] = VAX_JMP;
+ p[4] = VAX_PC_RELATIVE_MODE;
+ fix_new (frag_now,
+ p + 5 - frag_now->fr_literal,
+ 4, this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ /* Now (eg) xOBxxx 1f
+ BRB 2f
+ 1: JMP foo
+ 2: */
+ }
+ }
+ }
+ else
+ {
+ know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
+ *opcode_low_byteP ^= 1; /* Reverse branch condition. */
+ p = frag_more (7);
+ p[0] = 6;
+ p[1] = VAX_JMP;
+ p[2] = VAX_PC_RELATIVE_MODE;
+ fix_new (frag_now, p + 3 - frag_now->fr_literal,
+ 4, this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ /* So it is ordinary operand. */
+ know (operandP->vop_access != 'b');
+ /* ' ' target-independent: elsewhere. */
+ know (operandP->vop_access != ' ');
+ know (operandP->vop_access == 'a'
+ || operandP->vop_access == 'm'
+ || operandP->vop_access == 'r'
+ || operandP->vop_access == 'v'
+ || operandP->vop_access == 'w');
+ if (operandP->vop_short == 's')
+ {
+ if (is_absolute)
+ {
+ if (this_add_number >= 64)
+ {
+ as_warn (_("Short literal overflow(%ld.), immediate mode assumed."),
+ (long) this_add_number);
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF;
+ }
+ }
+ else
+ {
+ as_warn (_("Forced short literal to immediate mode. now_seg=%s to_seg=%s"),
+ segment_name (now_seg), segment_name (to_seg));
+ operandP->vop_short = 'i';
+ operandP->vop_mode = 8;
+ operandP->vop_reg = 0xF;
+ }
+ }
+ if (operandP->vop_reg >= 0 && (operandP->vop_mode < 8
+ || (operandP->vop_reg != 0xF && operandP->vop_mode < 10)))
+ {
+ /* One byte operand. */
+ know (operandP->vop_mode > 3);
+ FRAG_APPEND_1_CHAR (operandP->vop_mode << 4 | operandP->vop_reg);
+ /* All 1-bytes except S^# happen here. */
+ }
+ else
+ {
+ /* {@}{q^}foo{(Rn)} or S^#foo */
+ if (operandP->vop_reg == -1 && operandP->vop_short != 's')
+ {
+ /* "{@}{q^}foo" */
+ if (to_seg == now_seg)
+ {
+ if (length == 0)
+ {
+ know (operandP->vop_short == ' ');
+ length_code = STATE_BYTE;
+#ifdef OBJ_ELF
+ if (S_IS_EXTERNAL (this_add_symbol)
+ || S_IS_WEAK (this_add_symbol))
+ length_code = STATE_UNDF;
+#endif
+ p = frag_var (rs_machine_dependent, 10, 2,
+ ENCODE_RELAX (STATE_PC_RELATIVE, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ know (operandP->vop_mode == 10 + at);
+ *p = at << 4;
+ /* At is the only context we need to carry
+ to other side of relax() process. Must
+ be in the correct bit position of VAX
+ operand spec. byte. */
+ }
+ else
+ {
+ know (length);
+ know (operandP->vop_short != ' ');
+ p = frag_more (length + 1);
+ p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
+ fix_new (frag_now, p + 1 - frag_now->fr_literal,
+ length, this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ }
+ }
+ else
+ {
+ /* to_seg != now_seg */
+ if (this_add_symbol == NULL)
+ {
+ know (is_absolute);
+ /* Do @#foo: simpler relocation than foo-.(pc) anyway. */
+ p = frag_more (5);
+ p[0] = VAX_ABSOLUTE_MODE; /* @#... */
+ md_number_to_chars (p + 1, this_add_number, 4);
+ if (length && length != 4)
+ as_warn (_("Length specification ignored. Address mode 9F used"));
+ }
+ else
+ {
+ /* {@}{q^}other_seg */
+ know ((length == 0 && operandP->vop_short == ' ')
+ || (length > 0 && operandP->vop_short != ' '));
+ if (is_undefined
+#ifdef OBJ_ELF
+ || S_IS_WEAK(this_add_symbol)
+ || S_IS_EXTERNAL(this_add_symbol)
+#endif
+ )
+ {
+ switch (length)
+ {
+ default: length_code = STATE_UNDF; break;
+ case 1: length_code = STATE_BYTE; break;
+ case 2: length_code = STATE_WORD; break;
+ case 4: length_code = STATE_LONG; break;
+ }
+ /* We have a SEG_UNKNOWN symbol. It might
+ turn out to be in the same segment as
+ the instruction, permitting relaxation. */
+ p = frag_var (rs_machine_dependent, 5, 2,
+ ENCODE_RELAX (STATE_PC_RELATIVE, length_code),
+ this_add_symbol, this_add_number,
+ opcode_low_byteP);
+ p[0] = at << 4;
+ }
+ else
+ {
+ if (length == 0)
+ {
+ know (operandP->vop_short == ' ');
+ length = 4; /* Longest possible. */
+ }
+ p = frag_more (length + 1);
+ p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
+ md_number_to_chars (p + 1, this_add_number, length);
+ fix_new (frag_now,
+ p + 1 - frag_now->fr_literal,
+ length, this_add_symbol,
+ this_add_number, 1, NO_RELOC);
+ }
+ }
+ }
+ }
+ else
+ {
+ /* {@}{q^}foo(Rn) or S^# or I^# or # */
+ if (operandP->vop_mode < 0xA)
+ {
+ /* # or S^# or I^# */
+ if (operandP->vop_access == 'v'
+ || operandP->vop_access == 'a')
+ {
+ if (operandP->vop_access == 'v')
+ as_warn (_("Invalid operand: immediate value used as base address."));
+ else
+ as_warn (_("Invalid operand: immediate value used as address."));
+ /* gcc 2.6.3 is known to generate these in at least
+ one case. */
+ }
+ if (length == 0
+ && is_absolute && (expP->X_op != O_big)
+ && operandP->vop_mode == 8 /* No '@'. */
+ && this_add_number < 64)
+ {
+ operandP->vop_short = 's';
+ }
+ if (operandP->vop_short == 's')
+ {
+ FRAG_APPEND_1_CHAR (this_add_number);
+ }
+ else
+ {
+ /* I^#... */
+ know (nbytes);
+ p = frag_more (nbytes + 1);
+ know (operandP->vop_reg == 0xF);
+#ifdef OBJ_ELF
+ if (flag_want_pic && operandP->vop_mode == 8
+ && this_add_symbol != NULL)
+ {
+ as_warn (_("Symbol used as immediate operand in PIC mode."));
+ }
+#endif
+ p[0] = (operandP->vop_mode << 4) | 0xF;
+ if ((is_absolute) && (expP->X_op != O_big))
+ {
+ /* If nbytes > 4, then we are scrod. We
+ don't know if the high order bytes
+ are to be 0xFF or 0x00. BSD4.2 & RMS
+ say use 0x00. OK --- but this
+ assembler needs ANOTHER rewrite to
+ cope properly with this bug. */
+ md_number_to_chars (p + 1, this_add_number,
+ min (sizeof (valueT),
+ (size_t) nbytes));
+ if ((size_t) nbytes > sizeof (valueT))
+ memset (p + 5, '\0', nbytes - sizeof (valueT));
+ }
+ else
+ {
+ if (expP->X_op == O_big)
+ {
+ /* Problem here is to get the bytes
+ in the right order. We stored
+ our constant as LITTLENUMs, not
+ bytes. */
+ LITTLENUM_TYPE *lP;
+
+ lP = floatP->low;
+ if (nbytes & 1)
+ {
+ know (nbytes == 1);
+ p[1] = *lP;
+ }
+ else
+ {
+ for (p++; nbytes; nbytes -= 2, p += 2, lP++)
+ md_number_to_chars (p, *lP, 2);
+ }
+ }
+ else
+ {
+ fix_new (frag_now, p + 1 - frag_now->fr_literal,
+ nbytes, this_add_symbol,
+ this_add_number, 0, NO_RELOC);
+ }
+ }
+ }
+ }
+ else
+ {
+ /* {@}{q^}foo(Rn) */
+ know ((length == 0 && operandP->vop_short == ' ')
+ || (length > 0 && operandP->vop_short != ' '));
+ if (length == 0)
+ {
+ if (is_absolute)
+ {
+ long test;
+
+ test = this_add_number;
+
+ if (test < 0)
+ test = ~test;
+
+ length = test & 0xffff8000 ? 4
+ : test & 0xffffff80 ? 2
+ : 1;
+ }
+ else
+ {
+ length = 4;
+ }
+ }
+ p = frag_more (1 + length);
+ know (operandP->vop_reg >= 0);
+ p[0] = operandP->vop_reg
+ | ((at | "?\12\14?\16"[length]) << 4);
+ if (is_absolute)
+ {
+ md_number_to_chars (p + 1, this_add_number, length);
+ }
+ else
+ {
+ fix_new (frag_now, p + 1 - frag_now->fr_literal,
+ length, this_add_symbol,
+ this_add_number, 0, NO_RELOC);
+ }
+ }
+ }
+ }
+ }
+ }
+}
+
+void
+md_begin (void)
+{
+ const char *errtxt;
+ FLONUM_TYPE *fP;
+ int i;
+
+ if ((errtxt = vip_begin (1, "$", "*", "`")) != 0)
+ as_fatal (_("VIP_BEGIN error:%s"), errtxt);
+
+ for (i = 0, fP = float_operand;
+ fP < float_operand + VIT_MAX_OPERANDS;
+ i++, fP++)
+ {
+ fP->low = &big_operand_bits[i][0];
+ fP->high = &big_operand_bits[i][SIZE_OF_LARGE_NUMBER - 1];
+ }
+}
Modified: branches/binutils/package/gas/config/tc-vax.h
===================================================================
--- branches/binutils/package/gas/config/tc-vax.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-vax.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* tc-vax.h -- Header file for tc-vax.c.
- Copyright 1987, 1991, 1992, 1993, 1995, 1996, 1997, 2000, 2002, 2005
+ Copyright 1987, 1991, 1992, 1993, 1995, 1996, 1997, 2000, 2002, 2005, 2006
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -47,8 +47,6 @@
#define md_operand(x)
-long md_chars_to_number PARAMS ((unsigned char *, int));
-
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
Added: branches/binutils/package/gas/config/tc-xc16x.c
===================================================================
--- branches/binutils/package/gas/config/tc-xc16x.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-xc16x.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,395 @@
+/* tc-xc16x.c -- Assembler for the Infineon XC16X.
+ Copyright 2006 Free Software Foundation, Inc.
+ Contributed by KPIT Cummins Infosystems
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+
+#include <stdio.h>
+#include "as.h"
+#include "safe-ctype.h"
+#include "subsegs.h"
+#include "symcat.h"
+#include "opcodes/xc16x-desc.h"
+#include "opcodes/xc16x-opc.h"
+#include "cgen.h"
+#include "bfd.h"
+#include "dwarf2dbg.h"
+
+
+#ifdef OBJ_ELF
+#include "elf/xc16x.h"
+#endif
+
+/* Structure to hold all of the different components describing
+ an individual instruction. */
+typedef struct
+{
+ const CGEN_INSN * insn;
+ const CGEN_INSN * orig_insn;
+ CGEN_FIELDS fields;
+#if CGEN_INT_INSN_P
+ CGEN_INSN_INT buffer [1];
+#define INSN_VALUE(buf) (*(buf))
+#else
+ unsigned char buffer [CGEN_MAX_INSN_SIZE];
+#define INSN_VALUE(buf) (buf)
+#endif
+ char * addr;
+ fragS * frag;
+ int num_fixups;
+ fixS * fixups [GAS_CGEN_MAX_FIXUPS];
+ int indices [MAX_OPERAND_INSTANCES];
+}
+xc16x_insn;
+
+const char comment_chars[] = ";";
+const char line_comment_chars[] = "#";
+const char line_separator_chars[] = "";
+const char EXP_CHARS[] = "eE";
+const char FLT_CHARS[] = "dD";
+
+#define XC16X_SHORTOPTS ""
+const char * md_shortopts = XC16X_SHORTOPTS;
+
+struct option md_longopts[] =
+{
+ {NULL, no_argument, NULL, 0}
+};
+size_t md_longopts_size = sizeof (md_longopts);
+
+static void
+xc16xlmode (int arg ATTRIBUTE_UNUSED)
+{
+ if (stdoutput != NULL)
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xl))
+ as_warn (_("could not set architecture and machine"));
+}
+
+static void
+xc16xsmode (int arg ATTRIBUTE_UNUSED)
+{
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xs))
+ as_warn (_("could not set architecture and machine"));
+}
+
+static void
+xc16xmode (int arg ATTRIBUTE_UNUSED)
+{
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16x))
+ as_warn (_("could not set architecture and machine"));
+}
+
+/* The target specific pseudo-ops which we support. */
+const pseudo_typeS md_pseudo_table[] =
+{
+ { "word", cons, 2 },
+ {"xc16xl", xc16xlmode, 0},
+ {"xc16xs", xc16xsmode, 0},
+ {"xc16x", xc16xmode, 0},
+ { NULL, NULL, 0 }
+};
+
+void
+md_begin (void)
+{
+ /* Initialize the `cgen' interface. */
+
+ /* Set the machine number and endian. */
+ gas_cgen_cpu_desc = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
+ CGEN_CPU_OPEN_ENDIAN,
+ CGEN_ENDIAN_LITTLE,
+ CGEN_CPU_OPEN_END);
+ xc16x_cgen_init_asm (gas_cgen_cpu_desc);
+
+ /* This is a callback from cgen to gas to parse operands. */
+ cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
+}
+
+void
+md_assemble (char *str)
+{
+ xc16x_insn insn;
+ char *errmsg;
+
+ /* Initialize GAS's cgen interface for a new instruction. */
+ gas_cgen_init_parse ();
+
+ insn.insn = xc16x_cgen_assemble_insn
+ (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
+
+ if (!insn.insn)
+ {
+ as_bad (errmsg);
+ return;
+ }
+
+ /* Doesn't really matter what we pass for RELAX_P here. */
+ gas_cgen_finish_insn (insn.insn, insn.buffer,
+ CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
+}
+
+/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
+ Returns BFD_RELOC_NONE if no reloc type can be found.
+ *FIXP may be modified if desired. */
+
+bfd_reloc_code_real_type
+md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
+ const CGEN_OPERAND *operand,
+ fixS *fixP)
+{
+ switch (operand->type)
+ {
+ case XC16X_OPERAND_REL:
+ fixP->fx_where += 1;
+ fixP->fx_pcrel = 1;
+ return BFD_RELOC_8_PCREL;
+
+ case XC16X_OPERAND_CADDR:
+ fixP->fx_where += 2;
+ return BFD_RELOC_16;
+
+ case XC16X_OPERAND_UIMM7:
+ fixP->fx_where += 1;
+ fixP->fx_pcrel = 1;
+ return BFD_RELOC_8_PCREL;
+
+ case XC16X_OPERAND_UIMM16:
+ case XC16X_OPERAND_MEMORY:
+ fixP->fx_where += 2;
+ return BFD_RELOC_16;
+
+ case XC16X_OPERAND_UPOF16:
+ fixP->fx_where += 2;
+ return BFD_RELOC_XC16X_POF;
+
+ case XC16X_OPERAND_UPAG16:
+ fixP->fx_where += 2;
+ return BFD_RELOC_XC16X_PAG;
+
+ case XC16X_OPERAND_USEG8:
+ fixP->fx_where += 1;
+ return BFD_RELOC_XC16X_SEG;
+
+ case XC16X_OPERAND_USEG16:
+ case XC16X_OPERAND_USOF16:
+ fixP->fx_where += 2;
+ return BFD_RELOC_XC16X_SOF;
+
+ default : /* avoid -Wall warning */
+ break;
+ }
+
+ fixP->fx_where += 2;
+ return BFD_RELOC_XC16X_SOF;
+}
+
+/* Write a value out to the object file, using the appropriate endianness. */
+
+void
+md_number_to_chars (char * buf, valueT val, int n)
+{
+ number_to_chars_littleendian (buf, val, n);
+}
+
+void
+md_show_usage (FILE * stream)
+{
+ fprintf (stream, _(" XC16X specific command line options:\n"));
+}
+
+int
+md_parse_option (int c ATTRIBUTE_UNUSED,
+ char *arg ATTRIBUTE_UNUSED)
+{
+ return 0;
+}
+
+/* Turn a string in input_line_pointer into a floating point constant
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
+ returned, or NULL on OK. */
+
+/* Equal to MAX_PRECISION in atof-ieee.c. */
+#define MAX_LITTLENUMS 6
+
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+ int i;
+ int prec;
+ LITTLENUM_TYPE words[MAX_LITTLENUMS];
+ char *t;
+
+ switch (type)
+ {
+ case 'f':
+ case 'F':
+ case 's':
+ case 'S':
+ prec = 2;
+ break;
+
+ case 'd':
+ case 'D':
+ case 'r':
+ case 'R':
+ prec = 4;
+ break;
+
+ /* FIXME: Some targets allow other format chars for bigger sizes
+ here. */
+
+ default:
+ *sizeP = 0;
+ return _("Bad call to md_atof()");
+ }
+
+ t = atof_ieee (input_line_pointer, type, words);
+ if (t)
+ input_line_pointer = t;
+ *sizeP = prec * sizeof (LITTLENUM_TYPE);
+
+ for (i = prec - 1; i >= 0; i--)
+ {
+ md_number_to_chars (litP, (valueT) words[i],
+ sizeof (LITTLENUM_TYPE));
+ litP += sizeof (LITTLENUM_TYPE);
+ }
+
+ return NULL;
+}
+
+valueT
+md_section_align (segT segment, valueT size)
+{
+ int align = bfd_get_section_alignment (stdoutput, segment);
+ return ((size + (1 << align) - 1) & (-1 << align));
+}
+
+symbolS *
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
+{
+ return NULL;
+}
+
+int
+md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
+ segT segment_type ATTRIBUTE_UNUSED)
+{
+ printf (_("call tomd_estimate_size_before_relax \n"));
+ abort ();
+}
+
+
+long
+md_pcrel_from (fixS *fixP)
+{
+ long temp_val;
+ temp_val=fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+
+ return temp_val;
+}
+
+long
+md_pcrel_from_section (fixS *fixP, segT sec)
+{
+ if (fixP->fx_addsy != (symbolS *) NULL
+ && (! S_IS_DEFINED (fixP->fx_addsy)
+ || S_GET_SEGMENT (fixP->fx_addsy) != sec
+ || S_IS_EXTERNAL (fixP->fx_addsy)
+ || S_IS_WEAK (fixP->fx_addsy)))
+ {
+ return 0;
+ }
+
+ return md_pcrel_from (fixP);
+}
+
+arelent *
+tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
+{
+ arelent *rel;
+ bfd_reloc_code_real_type r_type;
+
+ if (fixp->fx_addsy && fixp->fx_subsy)
+ {
+ if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
+ || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Difference of symbols in different sections is not supported");
+ return NULL;
+ }
+ }
+
+ rel = xmalloc (sizeof (arelent));
+ rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ rel->addend = fixp->fx_offset;
+
+ r_type = fixp->fx_r_type;
+
+#define DEBUG 0
+#if DEBUG
+ fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
+ fflush(stderr);
+#endif
+
+ rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
+ if (rel->howto == NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("Cannot represent relocation type %s"),
+ bfd_get_reloc_code_name (r_type));
+ return NULL;
+ }
+
+ return rel;
+}
+
+void
+md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
+{
+ if(!strstr (seg->name,".debug"))
+ {
+ if (*valP < 128)
+ *valP /= 2;
+ if (*valP>268435455)
+ {
+ *valP = *valP * (-1);
+ *valP /= 2;
+ *valP = 256 - (*valP);
+ }
+ }
+
+ gas_cgen_md_apply_fix (fixP, valP, seg);
+ return;
+}
+
+void
+md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
+ segT seg ATTRIBUTE_UNUSED,
+ fragS *fragP ATTRIBUTE_UNUSED)
+{
+ printf (_("call to md_convert_frag \n"));
+ abort ();
+}
+
+
Added: branches/binutils/package/gas/config/tc-xc16x.h
===================================================================
--- branches/binutils/package/gas/config/tc-xc16x.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-xc16x.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,67 @@
+/* This file is tc-xc16x.h
+ Copyright 2006 Free Software Foundation, Inc.
+ Contributed by KPIT Cummins Infosystems
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+#define TC_XC16X
+
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+#define TARGET_ARCH bfd_arch_xc16x
+
+#ifdef BFD_ASSEMBLER
+/* Fixup debug sections since we will never relax them. */
+#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
+#endif
+
+#ifdef OBJ_ELF
+#define TARGET_FORMAT "elf32-xc16x"
+#define LOCAL_LABEL_PREFIX '.'
+#define LOCAL_LABEL(NAME) (NAME[0] == '.' && NAME[1] == 'L')
+#define FAKE_LABEL_NAME ".L0\001"
+#endif
+
+#if ANSI_PROTOTYPES
+struct fix;
+struct internal_reloc;
+#endif
+
+#define WORKING_DOT_WORD
+
+#define BFD_ARCH bfd_arch_xc16x
+#define TC_COUNT_RELOC(x) 1
+#define IGNORE_NONSTANDARD_ESCAPES
+
+#define TC_RELOC_MANGLE(s,a,b,c) tc_reloc_mangle(a,b,c)
+extern void tc_reloc_mangle (struct fix *, struct internal_reloc *, bfd_vma);
+
+/* No shared lib support, so we don't need to ensure externally
+ visible symbols can be overridden. */
+#define EXTERN_FORCE_RELOC 0
+
+/* Minimum instruction is of 16 bits. */
+#define DWARF2_LINE_MIN_INSN_LENGTH 2
+
+#define DO_NOT_STRIP 0
+#define LISTING_HEADER "Infineon XC16X GAS "
+#define NEED_FX_R_TYPE 1
+#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
+extern long md_pcrel_from_section (struct fix *, segT);
+
+#define md_operand(x)
Modified: branches/binutils/package/gas/config/tc-xtensa.c
===================================================================
--- branches/binutils/package/gas/config/tc-xtensa.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-xtensa.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* tc-xtensa.c -- Assemble Xtensa instructions.
- Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -327,15 +327,9 @@
restrictive is the opcode that fits only one slot in one
format. */
int issuef;
- /* The single format (i.e., if the op can live in a bundle by itself),
- narrowest format, and widest format the op can be bundled in
- and their sizes: */
- xtensa_format single;
xtensa_format narrowest;
- xtensa_format widest;
char narrowest_size;
- char widest_size;
- char single_size;
+ char narrowest_slot;
/* formats is a bitfield with the Nth bit set
if the opcode fits in the Nth xtensa_format. */
@@ -484,6 +478,7 @@
extern bfd_boolean opcode_fits_format_slot (xtensa_opcode, xtensa_format, int);
static int xg_get_single_size (xtensa_opcode);
static xtensa_format xg_get_single_format (xtensa_opcode);
+static int xg_get_single_slot (xtensa_opcode);
/* TInsn and IStack functions. */
@@ -515,8 +510,6 @@
bfd_boolean expr_is_register (const expressionS *);
offsetT get_expr_register (const expressionS *);
void set_expr_symbol_offset (expressionS *, symbolS *, offsetT);
-static void set_expr_symbol_offset_diff
- (expressionS *, symbolS *, symbolS *, offsetT);
bfd_boolean expr_is_equal (expressionS *, expressionS *);
static void copy_expr (expressionS *, const expressionS *);
@@ -573,6 +566,7 @@
static bfd_boolean maybe_has_short_loop = FALSE;
static bfd_boolean workaround_close_loop_end = FALSE;
static bfd_boolean maybe_has_close_loop_end = FALSE;
+static bfd_boolean enforce_three_byte_loop_align = FALSE;
/* When workaround_short_loops is TRUE, all loops with early exits must
have at least 3 instructions. workaround_all_short_loops is a modifier
@@ -597,6 +591,7 @@
workaround_short_loop |= TRUE;
workaround_close_loop_end |= TRUE;
workaround_all_short_loops |= TRUE;
+ enforce_three_byte_loop_align = TRUE;
}
}
@@ -2187,14 +2182,10 @@
char *opname, *new_opname;
const char *sr_name;
int is_user, is_write;
- bfd_boolean has_underbar = FALSE;
opname = *popname;
if (*opname == '_')
- {
- has_underbar = TRUE;
- opname += 1;
- }
+ opname += 1;
is_user = (opname[1] == 'u');
is_write = (opname[0] == 'w');
@@ -2240,8 +2231,7 @@
if (is_write && !is_user && !strcasecmp ("interrupt", sr_name))
sr_name = "intset";
new_opname = (char *) xmalloc (strlen (sr_name) + 6);
- sprintf (new_opname, "%s%s.%s", (has_underbar ? "_" : ""),
- *popname, sr_name);
+ sprintf (new_opname, "%s.%s", *popname, sr_name);
free (*popname);
*popname = new_opname;
@@ -3570,10 +3560,10 @@
/* Walk through all of the single instruction expansions. */
while (xg_is_single_relaxable_insn (¤t_insn, &single_target, FALSE))
{
+ steps_taken++;
if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
stretch))
{
- steps_taken++;
if (steps_taken >= min_steps)
{
istack_push (istack, &single_target);
@@ -4138,7 +4128,7 @@
if (opnum != get_relaxable_immed (opcode))
{
as_bad (_("invalid relocation for operand %i of '%s'"),
- opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
+ opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
return FALSE;
}
@@ -4148,7 +4138,7 @@
if (expr->X_op == O_lo16 || expr->X_op == O_hi16)
{
as_bad (_("invalid expression for operand %i of '%s'"),
- opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
+ opnum + 1, xtensa_opcode_name (xtensa_default_isa, opcode));
return FALSE;
}
@@ -4189,7 +4179,6 @@
static bfd_boolean
xg_emit_insn_to_buf (TInsn *tinsn,
- xtensa_format fmt,
char *buf,
fragS *fragP,
offsetT offset,
@@ -4198,6 +4187,7 @@
static xtensa_insnbuf insnbuf = NULL;
bfd_boolean has_symbolic_immed = FALSE;
bfd_boolean ok = TRUE;
+
if (!insnbuf)
insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
@@ -4205,10 +4195,12 @@
if (has_symbolic_immed && build_fix)
{
/* Add a fixup. */
+ xtensa_format fmt = xg_get_single_format (tinsn->opcode);
+ int slot = xg_get_single_slot (tinsn->opcode);
int opnum = get_relaxable_immed (tinsn->opcode);
expressionS *exp = &tinsn->tok[opnum];
- if (!xg_add_opcode_fix (tinsn, opnum, fmt, 0, exp, fragP, offset))
+ if (!xg_add_opcode_fix (tinsn, opnum, fmt, slot, exp, fragP, offset))
ok = FALSE;
}
fragP->tc_frag_data.is_insn = TRUE;
@@ -4440,6 +4432,26 @@
}
+/* In early Xtensa Processors, for reasons that are unclear, the ISA
+ required two-byte instructions to be treated as three-byte instructions
+ for loop instruction alignment. This restriction was removed beginning
+ with Xtensa LX. Now the only requirement on loop instruction alignment
+ is that the first instruction of the loop must appear at an address that
+ does not cross a fetch boundary. */
+
+static int
+get_loop_align_size (int insn_size)
+{
+ if (insn_size == XTENSA_UNDEFINED)
+ return xtensa_fetch_width;
+
+ if (enforce_three_byte_loop_align && insn_size == 2)
+ return 3;
+
+ return insn_size;
+}
+
+
/* If the next legit fragment is an end-of-loop marker,
switch its state so it will instantiate a NOP. */
@@ -5257,24 +5269,12 @@
xg_add_branch_and_loop_targets (&orig_insn);
- /* Special-case for "entry" instruction. */
- if (orig_insn.opcode == xtensa_entry_opcode)
+ /* Check that immediate value for ENTRY is >= 16. */
+ if (orig_insn.opcode == xtensa_entry_opcode && orig_insn.ntok >= 3)
{
- /* Check that the third opcode (#2) is >= 16. */
- if (orig_insn.ntok >= 3)
- {
- expressionS *exp = &orig_insn.tok[2];
- switch (exp->X_op)
- {
- case O_constant:
- if (exp->X_add_number < 16)
- as_warn (_("entry instruction with stack decrement < 16"));
- break;
-
- default:
- as_warn (_("entry instruction with non-constant decrement"));
- }
- }
+ expressionS *exp = &orig_insn.tok[2];
+ if (exp->X_op == O_constant && exp->X_add_number < 16)
+ as_warn (_("entry instruction with stack decrement < 16"));
}
/* Finish it off:
@@ -5538,14 +5538,21 @@
md_apply_fix (fixS *fixP, valueT *valP, segT seg)
{
char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
- valueT val;
+ valueT val = 0;
+ /* Subtracted symbols are only allowed for a few relocation types, and
+ unless linkrelax is enabled, they should not make it to this point. */
+ if (fixP->fx_subsy && !(linkrelax && (fixP->fx_r_type == BFD_RELOC_32
+ || fixP->fx_r_type == BFD_RELOC_16
+ || fixP->fx_r_type == BFD_RELOC_8)))
+ as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+
switch (fixP->fx_r_type)
{
case BFD_RELOC_32:
case BFD_RELOC_16:
case BFD_RELOC_8:
- if (linkrelax && fixP->fx_subsy)
+ if (fixP->fx_subsy)
{
switch (fixP->fx_r_type)
{
@@ -5586,8 +5593,9 @@
val = *valP;
fixP->fx_done = 1;
}
- else
- break;
+ /* fall through */
+
+ case BFD_RELOC_XTENSA_PLT:
md_number_to_chars (fixpos, val, fixP->fx_size);
fixP->fx_no_overflow = 0; /* Use the standard overflow check. */
break;
@@ -5631,7 +5639,6 @@
}
break;
- case BFD_RELOC_XTENSA_PLT:
case BFD_RELOC_XTENSA_ASM_EXPAND:
case BFD_RELOC_XTENSA_SLOT0_ALT:
case BFD_RELOC_XTENSA_SLOT1_ALT:
@@ -5937,7 +5944,6 @@
static bfd_boolean find_vinsn_conflicts (vliw_insn *);
static xtensa_format xg_find_narrowest_format (vliw_insn *);
-static void bundle_single_op (TInsn *);
static void xg_assemble_vliw_tokens (vliw_insn *);
@@ -6065,7 +6071,7 @@
}
else
{
- bundle_single_op (&slotstack.insn[slotstack.ninsn - 1]);
+ emit_single_op (&slotstack.insn[slotstack.ninsn - 1]);
if (vinsn->format == XTENSA_UNDEFINED)
vinsn->slots[i].opcode = xtensa_nop_opcode;
else
@@ -6403,6 +6409,9 @@
vliw_insn v_copy = *vinsn;
xtensa_opcode nop_opcode = xtensa_nop_opcode;
+ if (vinsn->num_slots == 1)
+ return xg_get_single_format (vinsn->slots[0].opcode);
+
for (format = 0; format < xtensa_isa_num_formats (isa); format++)
{
v_copy = *vinsn;
@@ -6461,8 +6470,9 @@
each tinsn in the vinsn. */
static int
-relaxation_requirements (vliw_insn *vinsn)
+relaxation_requirements (vliw_insn *vinsn, bfd_boolean *pfinish_frag)
{
+ bfd_boolean finish_frag = FALSE;
int extra_space = 0;
int slot;
@@ -6480,14 +6490,7 @@
/* Difference in bytes between narrow and wide insns... */
extra_space += 1;
tinsn->subtype = RELAX_NARROW;
- tinsn->record_fix = TRUE;
- break;
}
- else
- {
- tinsn->record_fix = FALSE;
- /* No extra_space needed. */
- }
}
else
{
@@ -6511,55 +6514,44 @@
tinsn->literal_space = max_literal_size;
tinsn->subtype = RELAX_IMMED;
- tinsn->record_fix = FALSE;
extra_space += max_size;
}
else
{
- tinsn->record_fix = TRUE;
- /* No extra space needed. */
+ /* A fix record will be added for this instruction prior
+ to relaxation, so make it end the frag. */
+ finish_frag = TRUE;
}
}
}
+ *pfinish_frag = finish_frag;
return extra_space;
}
static void
-bundle_single_op (TInsn *orig_insn)
+bundle_tinsn (TInsn *tinsn, vliw_insn *vinsn)
{
xtensa_isa isa = xtensa_default_isa;
- vliw_insn v;
- int slot;
+ int slot, chosen_slot;
- xg_init_vinsn (&v);
- v.format = op_placement_table[orig_insn->opcode].narrowest;
- assert (v.format != XTENSA_UNDEFINED);
- v.num_slots = xtensa_format_num_slots (isa, v.format);
+ vinsn->format = xg_get_single_format (tinsn->opcode);
+ assert (vinsn->format != XTENSA_UNDEFINED);
+ vinsn->num_slots = xtensa_format_num_slots (isa, vinsn->format);
- for (slot = 0;
- !opcode_fits_format_slot (orig_insn->opcode, v.format, slot);
- slot++)
+ chosen_slot = xg_get_single_slot (tinsn->opcode);
+ for (slot = 0; slot < vinsn->num_slots; slot++)
{
- v.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, v.format, slot);
- v.slots[slot].ntok = 0;
- v.slots[slot].insn_type = ITYPE_INSN;
+ if (slot == chosen_slot)
+ vinsn->slots[slot] = *tinsn;
+ else
+ {
+ vinsn->slots[slot].opcode =
+ xtensa_format_slot_nop_opcode (isa, vinsn->format, slot);
+ vinsn->slots[slot].ntok = 0;
+ vinsn->slots[slot].insn_type = ITYPE_INSN;
+ }
}
-
- v.slots[slot] = *orig_insn;
- slot++;
-
- for ( ; slot < v.num_slots; slot++)
- {
- v.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, v.format, slot);
- v.slots[slot].ntok = 0;
- v.slots[slot].insn_type = ITYPE_INSN;
- }
-
- finish_vinsn (&v);
- xg_free_vinsn (&v);
}
@@ -6609,11 +6601,17 @@
}
break;
case ITYPE_INSN:
- if (lit_sym)
- xg_resolve_literals (insn, lit_sym);
- if (label_sym)
- xg_resolve_labels (insn, label_sym);
- bundle_single_op (insn);
+ {
+ vliw_insn v;
+ if (lit_sym)
+ xg_resolve_literals (insn, lit_sym);
+ if (label_sym)
+ xg_resolve_labels (insn, label_sym);
+ xg_init_vinsn (&v);
+ bundle_tinsn (insn, &v);
+ finish_vinsn (&v);
+ xg_free_vinsn (&v);
+ }
break;
default:
assert (0);
@@ -6642,7 +6640,7 @@
static void
xg_assemble_vliw_tokens (vliw_insn *vinsn)
{
- bfd_boolean finish_frag = FALSE;
+ bfd_boolean finish_frag;
bfd_boolean is_jump = FALSE;
bfd_boolean is_branch = FALSE;
xtensa_isa isa = xtensa_default_isa;
@@ -6726,6 +6724,14 @@
{
int max_fill;
+ /* Remember the symbol that marks the end of the loop in the frag
+ that marks the start of the loop. This way we can easily find
+ the end of the loop at the beginning, without adding special code
+ to mark the loop instructions themselves. */
+ symbolS *target_sym = NULL;
+ if (vinsn->slots[0].tok[1].X_op == O_symbol)
+ target_sym = vinsn->slots[0].tok[1].X_add_symbol;
+
xtensa_set_frag_assembly_state (frag_now);
frag_now->tc_frag_data.is_insn = TRUE;
@@ -6735,13 +6741,10 @@
if (use_transform ())
frag_var (rs_machine_dependent, max_fill, max_fill,
- RELAX_ALIGN_NEXT_OPCODE,
- frag_now->fr_symbol,
- frag_now->fr_offset,
- NULL);
+ RELAX_ALIGN_NEXT_OPCODE, target_sym, 0, NULL);
else
frag_var (rs_machine_dependent, 0, 0,
- RELAX_CHECK_ALIGN_NEXT_OPCODE, 0, 0, NULL);
+ RELAX_CHECK_ALIGN_NEXT_OPCODE, target_sym, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
xtensa_move_labels (frag_now, 0, FALSE);
@@ -6769,7 +6772,7 @@
insn_size = xtensa_format_length (isa, vinsn->format);
- extra_space = relaxation_requirements (vinsn);
+ extra_space = relaxation_requirements (vinsn, &finish_frag);
/* vinsn_to_insnbuf will produce the error. */
if (vinsn->format != XTENSA_UNDEFINED)
@@ -6779,7 +6782,7 @@
frag_now->tc_frag_data.is_insn = TRUE;
}
- vinsn_to_insnbuf (vinsn, f, frag_now, TRUE);
+ vinsn_to_insnbuf (vinsn, f, frag_now, FALSE);
if (vinsn->format == XTENSA_UNDEFINED)
return;
@@ -6797,7 +6800,6 @@
TInsn *tinsn = &vinsn->slots[slot];
frag_now->tc_frag_data.slot_subtypes[slot] = tinsn->subtype;
frag_now->tc_frag_data.slot_symbols[slot] = tinsn->symbol;
- frag_now->tc_frag_data.slot_sub_symbols[slot] = tinsn->sub_symbol;
frag_now->tc_frag_data.slot_offsets[slot] = tinsn->offset;
frag_now->tc_frag_data.literal_frags[slot] = tinsn->literal_frag;
if (tinsn->literal_space != 0)
@@ -6810,8 +6812,8 @@
if (xtensa_opcode_is_branch (isa, tinsn->opcode) == 1)
is_branch = TRUE;
- if (tinsn->subtype || tinsn->symbol || tinsn->record_fix
- || tinsn->offset || tinsn->literal_frag || is_jump || is_branch)
+ if (tinsn->subtype || tinsn->symbol || tinsn->offset
+ || tinsn->literal_frag || is_jump || is_branch)
finish_frag = TRUE;
}
@@ -6943,7 +6945,8 @@
if (workaround_short_loop && maybe_has_short_loop)
xtensa_fix_short_loop_frags ();
- xtensa_mark_narrow_branches ();
+ if (align_targets)
+ xtensa_mark_narrow_branches ();
xtensa_mark_zcl_first_insns ();
xtensa_sanity_check ();
@@ -7045,15 +7048,10 @@
&& fragP->tc_frag_data.slot_subtypes[0] == RELAX_IMMED)
{
vliw_insn vinsn;
- const expressionS *expr;
- symbolS *symbolP;
vinsn_from_chars (&vinsn, fragP->fr_opcode);
tinsn_immed_from_frag (&vinsn.slots[0], fragP, 0);
- expr = &vinsn.slots[0].tok[1];
- symbolP = expr->X_add_symbol;
-
if (vinsn.num_slots == 1
&& xtensa_opcode_is_branch (xtensa_default_isa,
vinsn.slots[0].opcode)
@@ -7063,6 +7061,7 @@
{
fragP->fr_subtype = RELAX_SLOTS;
fragP->tc_frag_data.slot_subtypes[0] = RELAX_NARROW;
+ fragP->tc_frag_data.is_aligning_branch = 1;
}
}
}
@@ -7093,8 +7092,14 @@
{
const expressionS *expr = &tinsn->tok[1];
symbolS *symbolP = expr->X_add_symbol;
- fragS *target_frag = symbol_get_frag (symbolP);
offsetT max_distance = expr->X_add_number;
+ fragS *target_frag;
+
+ if (expr->X_op != O_symbol)
+ return FALSE;
+
+ target_frag = symbol_get_frag (symbolP);
+
max_distance += (S_GET_VALUE (symbolP) - target_frag->fr_address);
if (is_branch_jmp_to_next (tinsn, fragP))
return FALSE;
@@ -7136,7 +7141,24 @@
/* Of course, sometimes (mostly for toy test cases) a
zero-cost loop instruction is the last in a section. */
if (targ_frag)
- targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
+ {
+ targ_frag->tc_frag_data.is_first_loop_insn = TRUE;
+ /* Do not widen a frag that is the first instruction of a
+ zero-cost loop. It makes that loop harder to align. */
+ if (targ_frag->fr_type == rs_machine_dependent
+ && targ_frag->fr_subtype == RELAX_SLOTS
+ && (targ_frag->tc_frag_data.slot_subtypes[0]
+ == RELAX_NARROW))
+ {
+ if (targ_frag->tc_frag_data.is_aligning_branch)
+ targ_frag->tc_frag_data.slot_subtypes[0] = RELAX_IMMED;
+ else
+ {
+ frag_wane (targ_frag);
+ targ_frag->tc_frag_data.slot_subtypes[0] = 0;
+ }
+ }
+ }
if (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)
frag_wane (fragP);
}
@@ -7324,7 +7346,7 @@
.fill 0. */
static offsetT min_bytes_to_other_loop_end
- (fragS *, fragS *, offsetT, offsetT);
+ (fragS *, fragS *, offsetT);
static void
xtensa_fix_close_loop_end_frags (void)
@@ -7338,32 +7360,14 @@
fragS *fragP;
fragS *current_target = NULL;
- offsetT current_offset = 0;
/* Walk over all of the fragments in a subsection. */
for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
{
if (fragP->fr_type == rs_machine_dependent
- && ((fragP->fr_subtype == RELAX_IMMED)
- || ((fragP->fr_subtype == RELAX_SLOTS)
- && (fragP->tc_frag_data.slot_subtypes[0]
- == RELAX_IMMED))))
- {
- /* Read it. If the instruction is a loop, get the target. */
- TInsn t_insn;
- tinsn_from_chars (&t_insn, fragP->fr_opcode, 0);
- if (xtensa_opcode_is_loop (xtensa_default_isa,
- t_insn.opcode) == 1)
- {
- /* Get the current fragment target. */
- if (fragP->tc_frag_data.slot_symbols[0])
- {
- symbolS *sym = fragP->tc_frag_data.slot_symbols[0];
- current_target = symbol_get_frag (sym);
- current_offset = fragP->fr_offset;
- }
- }
- }
+ && ((fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
+ || (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)))
+ current_target = symbol_get_frag (fragP->fr_symbol);
if (current_target
&& fragP->fr_type == rs_machine_dependent
@@ -7375,8 +7379,7 @@
#define REQUIRED_LOOP_DIVIDING_BYTES 12
/* Max out at 12. */
min_bytes = min_bytes_to_other_loop_end
- (fragP->fr_next, current_target, current_offset,
- REQUIRED_LOOP_DIVIDING_BYTES);
+ (fragP->fr_next, current_target, REQUIRED_LOOP_DIVIDING_BYTES);
if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
{
@@ -7417,7 +7420,6 @@
static offsetT
min_bytes_to_other_loop_end (fragS *fragP,
fragS *current_target,
- offsetT current_offset,
offsetT max_size)
{
offsetT offset = 0;
@@ -7429,11 +7431,11 @@
{
if (current_fragP->tc_frag_data.is_loop_target
&& current_fragP != current_target)
- return offset + current_offset;
+ return offset;
offset += unrelaxed_frag_min_size (current_fragP);
- if (offset + current_offset >= max_size)
+ if (offset >= max_size)
return max_size;
}
return max_size;
@@ -7520,35 +7522,22 @@
{
fragS *fragP;
fragS *current_target = NULL;
- offsetT current_offset = 0;
xtensa_opcode current_opcode = XTENSA_UNDEFINED;
/* Walk over all of the fragments in a subsection. */
for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
{
- /* Check on the current loop. */
if (fragP->fr_type == rs_machine_dependent
- && ((fragP->fr_subtype == RELAX_IMMED)
- || ((fragP->fr_subtype == RELAX_SLOTS)
- && (fragP->tc_frag_data.slot_subtypes[0]
- == RELAX_IMMED))))
+ && ((fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
+ || (fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE)))
{
TInsn t_insn;
-
- /* Read it. If the instruction is a loop, get the target. */
- tinsn_from_chars (&t_insn, fragP->fr_opcode, 0);
- if (xtensa_opcode_is_loop (xtensa_default_isa,
- t_insn.opcode) == 1)
- {
- /* Get the current fragment target. */
- if (fragP->tc_frag_data.slot_symbols[0])
- {
- symbolS *sym = fragP->tc_frag_data.slot_symbols[0];
- current_target = symbol_get_frag (sym);
- current_offset = fragP->fr_offset;
- current_opcode = t_insn.opcode;
- }
- }
+ fragS *loop_frag = next_non_empty_frag (fragP);
+ tinsn_from_chars (&t_insn, loop_frag->fr_opcode, 0);
+ current_target = symbol_get_frag (fragP->fr_symbol);
+ current_opcode = t_insn.opcode;
+ assert (xtensa_opcode_is_loop (xtensa_default_isa,
+ current_opcode));
}
if (fragP->fr_type == rs_machine_dependent
@@ -7858,16 +7847,10 @@
static int
get_text_align_power (unsigned target_size)
{
- int i = 0;
- unsigned power = 1;
-
- assert (target_size <= INT_MAX);
- while (target_size > power)
- {
- power <<= 1;
- i += 1;
- }
- return i;
+ if (target_size <= 4)
+ return 2;
+ assert (target_size == 8);
+ return 3;
}
@@ -8061,15 +8044,10 @@
instruction following the loop, not the LOOP instruction. */
if (first_insn == NULL)
- return address;
+ first_insn_size = xtensa_fetch_width;
+ else
+ first_insn_size = get_loop_align_size (frag_format_size (first_insn));
- assert (first_insn->tc_frag_data.is_first_loop_insn);
-
- first_insn_size = frag_format_size (first_insn);
-
- if (first_insn_size == 2 || first_insn_size == XTENSA_UNDEFINED)
- first_insn_size = 3; /* ISA specifies this */
-
/* If it was 8, then we'll need a larger alignment for the section. */
align_power = get_text_align_power (first_insn_size);
record_alignment (now_seg, align_power);
@@ -8131,7 +8109,7 @@
return opt_diff;
case RELAX_ALIGN_NEXT_OPCODE:
- target_size = next_frag_format_size (fragP);
+ target_size = get_loop_align_size (next_frag_format_size (fragP));
loop_insn_offset = 0;
is_loop = next_frag_opcode_is_loop (fragP, &loop_opcode);
assert (is_loop);
@@ -8142,9 +8120,6 @@
!= RELAX_IMMED)
loop_insn_offset = get_expanded_loop_offset (loop_opcode);
- if (target_size == 2)
- target_size = 3; /* ISA specifies this */
-
/* In an ideal world, which is what we are shooting for here,
we wouldn't need to use any NOPs immediately prior to the
LOOP instruction. If this approach fails, relax_frag_loop_align
@@ -8423,7 +8398,7 @@
while (fragP)
{
/* Limit this to a small search. */
- if (*widens > 8)
+ if (*widens >= (int) xtensa_fetch_width)
{
*fragPP = fragP;
return 0;
@@ -8510,8 +8485,15 @@
address = find_address_of_next_align_frag
(&fragP, &wide_nops, &narrow_nops, &num_widens, &paddable);
- if (address)
+ if (!address)
{
+ if (this_frag->tc_frag_data.is_aligning_branch)
+ this_frag->tc_frag_data.slot_subtypes[0] = RELAX_IMMED;
+ else
+ frag_wane (this_frag);
+ }
+ else
+ {
local_opt_diff = get_aligned_diff (fragP, address, &max_diff);
opt_diff = local_opt_diff;
assert (opt_diff >= 0);
@@ -8535,7 +8517,7 @@
(&fragP, &glob_widens, &dnn, &dw, &glob_pad);
/* If there is a padable portion, then skip. */
if (glob_pad || glob_widens >= (1 << branch_align_power (now_seg)))
- break;
+ address = 0;
if (address)
{
@@ -8741,7 +8723,7 @@
/* We will need a NOP no matter what, but should we widen
this instruction to help?
- This is a RELAX_FRAG_NARROW frag. */
+ This is a RELAX_NARROW frag. */
switch (desired_diff)
{
case 1:
@@ -8791,7 +8773,6 @@
bfd_boolean estimate_only)
{
TInsn tinsn;
- vliw_insn orig_vinsn;
int old_size;
bfd_boolean negatable_branch = FALSE;
bfd_boolean branch_jmp_to_next = FALSE;
@@ -8806,12 +8787,12 @@
assert (fragP->fr_opcode != NULL);
- xg_init_vinsn (&orig_vinsn);
- vinsn_from_chars (&orig_vinsn, fragP->fr_opcode);
- if (xtensa_format_num_slots (isa, fmt) > 1)
+ xg_clear_vinsn (&cur_vinsn);
+ vinsn_from_chars (&cur_vinsn, fragP->fr_opcode);
+ if (cur_vinsn.num_slots > 1)
wide_insn = TRUE;
- tinsn = orig_vinsn.slots[slot];
+ tinsn = cur_vinsn.slots[slot];
tinsn_immed_from_frag (&tinsn, fragP, slot);
if (estimate_only && xtensa_opcode_is_loop (isa, tinsn.opcode))
@@ -9066,14 +9047,13 @@
convert_frag_narrow (segT segP, fragS *fragP, xtensa_format fmt, int slot)
{
TInsn tinsn, single_target;
- xtensa_format single_fmt;
int size, old_size, diff;
offsetT frag_offset;
assert (slot == 0);
tinsn_from_chars (&tinsn, fragP->fr_opcode, 0);
- if (xtensa_opcode_is_branch (xtensa_default_isa, tinsn.opcode) == 1)
+ if (fragP->tc_frag_data.is_aligning_branch == 1)
{
assert (fragP->tc_frag_data.text_expansion[0] == 1
|| fragP->tc_frag_data.text_expansion[0] == 0);
@@ -9109,11 +9089,9 @@
}
size = xg_get_single_size (single_target.opcode);
- single_fmt = xg_get_single_format (single_target.opcode);
+ xg_emit_insn_to_buf (&single_target, fragP->fr_opcode, fragP,
+ frag_offset, TRUE);
- xg_emit_insn_to_buf (&single_target, single_fmt, fragP->fr_opcode,
- fragP, frag_offset, TRUE);
-
diff = size - old_size;
assert (diff >= 0);
assert (diff <= fragP->fr_var);
@@ -9163,7 +9141,6 @@
bfd_boolean expanded = FALSE;
bfd_boolean branch_jmp_to_next = FALSE;
char *fr_opcode = fragP->fr_opcode;
- vliw_insn orig_vinsn;
xtensa_isa isa = xtensa_default_isa;
bfd_boolean wide_insn = FALSE;
int bytes;
@@ -9171,13 +9148,13 @@
assert (fr_opcode != NULL);
- xg_init_vinsn (&orig_vinsn);
+ xg_clear_vinsn (&cur_vinsn);
- vinsn_from_chars (&orig_vinsn, fr_opcode);
- if (xtensa_format_num_slots (isa, fmt) > 1)
+ vinsn_from_chars (&cur_vinsn, fr_opcode);
+ if (cur_vinsn.num_slots > 1)
wide_insn = TRUE;
- orig_tinsn = orig_vinsn.slots[slot];
+ orig_tinsn = cur_vinsn.slots[slot];
tinsn_immed_from_frag (&orig_tinsn, fragP, slot);
is_loop = xtensa_opcode_is_loop (xtensa_default_isa, orig_tinsn.opcode) == 1;
@@ -9191,20 +9168,20 @@
bytes = xtensa_format_length (isa, fmt);
if (bytes >= 4)
{
- orig_vinsn.slots[slot].opcode =
- xtensa_format_slot_nop_opcode (isa, orig_vinsn.format, slot);
- orig_vinsn.slots[slot].ntok = 0;
+ cur_vinsn.slots[slot].opcode =
+ xtensa_format_slot_nop_opcode (isa, cur_vinsn.format, slot);
+ cur_vinsn.slots[slot].ntok = 0;
}
else
{
bytes += fragP->tc_frag_data.text_expansion[0];
assert (bytes == 2 || bytes == 3);
- build_nop (&orig_vinsn.slots[0], bytes);
+ build_nop (&cur_vinsn.slots[0], bytes);
fragP->fr_fix += fragP->tc_frag_data.text_expansion[0];
}
- vinsn_to_insnbuf (&orig_vinsn, fr_opcode, frag_now, FALSE);
+ vinsn_to_insnbuf (&cur_vinsn, fr_opcode, frag_now, TRUE);
xtensa_insnbuf_to_chars
- (isa, orig_vinsn.insnbuf, (unsigned char *) fr_opcode, 0);
+ (isa, cur_vinsn.insnbuf, (unsigned char *) fr_opcode, 0);
fragP->fr_var = 0;
}
else
@@ -9337,39 +9314,31 @@
first = FALSE;
if (opcode_fits_format_slot (tinsn->opcode, fmt, slot))
{
- tinsn->record_fix = TRUE;
- orig_vinsn.slots[slot] = *tinsn;
+ cur_vinsn.slots[slot] = *tinsn;
}
else
{
- orig_vinsn.slots[slot].opcode =
+ cur_vinsn.slots[slot].opcode =
xtensa_format_slot_nop_opcode (isa, fmt, slot);
- orig_vinsn.slots[slot].ntok = 0;
- orig_vinsn.slots[slot].record_fix = FALSE;
+ cur_vinsn.slots[slot].ntok = 0;
}
- vinsn_to_insnbuf (&orig_vinsn, immed_instr, fragP, TRUE);
- xtensa_insnbuf_to_chars (isa, orig_vinsn.insnbuf,
+ vinsn_to_insnbuf (&cur_vinsn, immed_instr, fragP, TRUE);
+ xtensa_insnbuf_to_chars (isa, cur_vinsn.insnbuf,
(unsigned char *) immed_instr, 0);
fragP->tc_frag_data.is_insn = TRUE;
size = xtensa_format_length (isa, fmt);
if (!opcode_fits_format_slot (tinsn->opcode, fmt, slot))
{
- xtensa_format single_fmt =
- xg_get_single_format (tinsn->opcode);
-
xg_emit_insn_to_buf
- (tinsn, single_fmt, immed_instr + size, fragP,
+ (tinsn, immed_instr + size, fragP,
immed_instr - fragP->fr_literal + size, TRUE);
size += xg_get_single_size (tinsn->opcode);
}
}
else
{
- xtensa_format single_format;
size = xg_get_single_size (tinsn->opcode);
- single_format = xg_get_single_format (tinsn->opcode);
- xg_emit_insn_to_buf (tinsn, single_format, immed_instr,
- fragP,
+ xg_emit_insn_to_buf (tinsn, immed_instr, fragP,
immed_instr - fragP->fr_literal, TRUE);
}
immed_instr += size;
@@ -9387,9 +9356,6 @@
fragP->fr_fix += diff;
}
- /* Clean it up. */
- xg_free_vinsn (&orig_vinsn);
-
/* Check for undefined immediates in LOOP instructions. */
if (is_loop)
{
@@ -10105,11 +10071,10 @@
xtensa_find_unmarked_state_frags ();
- if (use_literal_section)
- xtensa_create_property_segments (get_frag_is_literal,
- NULL,
- XTENSA_LIT_SEC_NAME,
- xt_literal_sec);
+ xtensa_create_property_segments (get_frag_is_literal,
+ NULL,
+ XTENSA_LIT_SEC_NAME,
+ xt_literal_sec);
xtensa_create_xproperty_segments (get_frag_property_flags,
XTENSA_PROP_SEC_NAME,
xt_prop_sec);
@@ -10842,12 +10807,9 @@
/* FIXME: Make tinsn allocation dynamic. */
if (xtensa_opcode_num_operands (isa, opcode) >= MAX_INSN_ARGS)
as_fatal (_("too many operands in instruction"));
- opi->single = XTENSA_UNDEFINED;
- opi->single_size = 0;
- opi->widest = XTENSA_UNDEFINED;
- opi->widest_size = 0;
opi->narrowest = XTENSA_UNDEFINED;
opi->narrowest_size = 0x7F;
+ opi->narrowest_slot = 0;
opi->formats = 0;
opi->num_formats = 0;
opi->issuef = 0;
@@ -10862,26 +10824,16 @@
opi->issuef++;
set_bit (fmt, opi->formats);
set_bit (slot, opi->slots[fmt]);
- /* opi->slot_count[fmt]++; */
- if (fmt_length < opi->narrowest_size)
+ if (fmt_length < opi->narrowest_size
+ || (fmt_length == opi->narrowest_size
+ && (xtensa_format_num_slots (isa, fmt)
+ < xtensa_format_num_slots (isa,
+ opi->narrowest))))
{
opi->narrowest = fmt;
opi->narrowest_size = fmt_length;
+ opi->narrowest_slot = slot;
}
- if (fmt_length > opi->widest_size)
- {
- opi->widest = fmt;
- opi->widest_size = fmt_length;
- }
- if (xtensa_format_num_slots (isa, fmt) == 1)
- {
- if (opi->single_size == 0
- || fmt_length < opi->single_size)
- {
- opi->single = fmt;
- opi->single_size = fmt_length;
- }
- }
}
}
if (opi->formats)
@@ -10904,17 +10856,23 @@
static int
xg_get_single_size (xtensa_opcode opcode)
{
- assert (op_placement_table[opcode].single != XTENSA_UNDEFINED);
- return op_placement_table[opcode].single_size;
+ return op_placement_table[opcode].narrowest_size;
}
static xtensa_format
xg_get_single_format (xtensa_opcode opcode)
{
- return op_placement_table[opcode].single;
+ return op_placement_table[opcode].narrowest;
}
+
+static int
+xg_get_single_slot (xtensa_opcode opcode)
+{
+ return op_placement_table[opcode].narrowest_slot;
+}
+
/* Instruction Stack Functions (from "xtensa-istack.h"). */
@@ -11065,18 +11023,12 @@
default:
/* Symbolic immediates are only allowed on the last immediate
operand. At this time, CONST16 is the only opcode where we
- support non-PC-relative relocations. (It isn't necessary
- to complain about non-PC-relative relocations here, but
- otherwise, no error is reported until the relocations are
- generated, and the assembler won't get that far if there
- are any other errors. It's nice to see all the problems
- at once.) */
+ support non-PC-relative relocations. */
if (i != get_relaxable_immed (insn->opcode)
|| (xtensa_operand_is_PCrelative (isa, insn->opcode, i) != 1
&& insn->opcode != xtensa_const16_opcode))
{
- as_bad (_("invalid symbolic operand %d on '%s'"),
- i, xtensa_opcode_name (isa, insn->opcode));
+ as_bad (_("invalid symbolic operand"));
return TRUE;
}
}
@@ -11115,94 +11067,15 @@
}
-/* Convert the constant operands in the tinsn to insnbuf.
- Return TRUE if there is a symbol in the immediate field.
+/* Encode a TInsn opcode and its constant operands into slotbuf.
+ Return TRUE if there is a symbol in the immediate field. This
+ function assumes that:
+ 1) The number of operands are correct.
+ 2) The insn_type is ITYPE_INSN.
+ 3) The opcode can be encoded in the specified format and slot.
+ 4) Operands are either O_constant or O_symbol, and all constants fit. */
- Before this is called,
- 1) the number of operands are correct
- 2) the tinsn is a ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are O_constant, O_symbol. All constants fit
- The return value tells whether there are any remaining O_symbols. */
-
static bfd_boolean
-tinsn_to_insnbuf (TInsn *tinsn, xtensa_insnbuf insnbuf)
-{
- static xtensa_insnbuf slotbuf = 0;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_opcode opcode = tinsn->opcode;
- xtensa_format fmt = xg_get_single_format (opcode);
- bfd_boolean has_fixup = FALSE;
- int noperands = xtensa_opcode_num_operands (isa, opcode);
- int i;
- uint32 opnd_value;
- char *file_name;
- unsigned line;
-
- if (!slotbuf)
- slotbuf = xtensa_insnbuf_alloc (isa);
-
- assert (tinsn->insn_type == ITYPE_INSN);
- if (noperands != tinsn->ntok)
- as_fatal (_("operand number mismatch"));
-
- if (xtensa_opcode_encode (isa, fmt, 0, slotbuf, opcode))
- as_fatal (_("cannot encode opcode"));
-
- for (i = 0; i < noperands; ++i)
- {
- expressionS *expr = &tinsn->tok[i];
- switch (expr->X_op)
- {
- case O_register:
- if (xtensa_operand_is_visible (isa, opcode, i) == 0)
- break;
- /* The register number has already been checked in
- expression_maybe_register, so we don't need to check here. */
- opnd_value = expr->X_add_number;
- (void) xtensa_operand_encode (isa, opcode, i, &opnd_value);
- xtensa_operand_set_field (isa, opcode, i, fmt, 0,
- slotbuf, opnd_value);
- break;
-
- case O_constant:
- if (xtensa_operand_is_visible (isa, opcode, i) == 0)
- break;
- as_where (&file_name, &line);
- /* It is a constant and we called this function,
- then we have to try to fit it. */
- xtensa_insnbuf_set_operand (slotbuf, fmt, 0, opcode, i,
- expr->X_add_number, file_name, line);
- break;
-
- default:
- has_fixup = TRUE;
- break;
- }
- }
-
- xtensa_format_encode (isa, fmt, insnbuf);
- xtensa_format_set_slot (isa, fmt, 0, insnbuf, slotbuf);
-
- return has_fixup;
-}
-
-
-/* Convert the constant operands in the tinsn to slotbuf.
- Return TRUE if there is a symbol in the immediate field.
- (Eventually this should replace tinsn_to_insnbuf.) */
-
-/* Before this is called,
- 1) the number of operands are correct
- 2) the tinsn is a ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are
- O_constant, O_symbol
- All constants fit
-
- The return value tells whether there are any remaining O_symbols. */
-
-static bfd_boolean
tinsn_to_slotbuf (xtensa_format fmt,
int slot,
TInsn *tinsn,
@@ -11214,8 +11087,6 @@
int noperands = xtensa_opcode_num_operands (isa, opcode);
int i;
- *((int *) &slotbuf[0]) = 0;
- *((int *) &slotbuf[1]) = 0;
assert (tinsn->insn_type == ITYPE_INSN);
if (noperands != tinsn->ntok)
as_fatal (_("operand number mismatch"));
@@ -11270,6 +11141,44 @@
}
+/* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
+ into a multi-slot instruction, fill the other slots with NOPs.
+ Return TRUE if there is a symbol in the immediate field. See also the
+ assumptions listed for tinsn_to_slotbuf. */
+
+static bfd_boolean
+tinsn_to_insnbuf (TInsn *tinsn, xtensa_insnbuf insnbuf)
+{
+ static xtensa_insnbuf slotbuf = 0;
+ static vliw_insn vinsn;
+ xtensa_isa isa = xtensa_default_isa;
+ bfd_boolean has_fixup = FALSE;
+ int i;
+
+ if (!slotbuf)
+ {
+ slotbuf = xtensa_insnbuf_alloc (isa);
+ xg_init_vinsn (&vinsn);
+ }
+
+ xg_clear_vinsn (&vinsn);
+
+ bundle_tinsn (tinsn, &vinsn);
+
+ xtensa_format_encode (isa, vinsn.format, insnbuf);
+
+ for (i = 0; i < vinsn.num_slots; i++)
+ {
+ /* Only one slot may have a fix-up because the rest contains NOPs. */
+ has_fixup |=
+ tinsn_to_slotbuf (vinsn.format, i, &vinsn.slots[i], vinsn.slotbuf[i]);
+ xtensa_format_set_slot (isa, vinsn.format, i, insnbuf, vinsn.slotbuf[i]);
+ }
+
+ return has_fixup;
+}
+
+
/* Check the instruction arguments. Return TRUE on failure. */
static bfd_boolean
@@ -11350,21 +11259,9 @@
{
opnum = get_relaxable_immed (opcode);
assert (opnum >= 0);
- if (fragP->tc_frag_data.slot_sub_symbols[slot])
- {
- set_expr_symbol_offset_diff
- (&tinsn->tok[opnum],
- fragP->tc_frag_data.slot_symbols[slot],
- fragP->tc_frag_data.slot_sub_symbols[slot],
- fragP->tc_frag_data.slot_offsets[slot]);
- }
- else
- {
- set_expr_symbol_offset
- (&tinsn->tok[opnum],
- fragP->tc_frag_data.slot_symbols[slot],
- fragP->tc_frag_data.slot_offsets[slot]);
- }
+ set_expr_symbol_offset (&tinsn->tok[opnum],
+ fragP->tc_frag_data.slot_symbols[slot],
+ fragP->tc_frag_data.slot_offsets[slot]);
}
}
@@ -11417,8 +11314,6 @@
for (i = 0; i < MAX_SLOTS; i++)
{
- tinsn_init (&v->slots[i]);
- v->slots[i].opcode = XTENSA_UNDEFINED;
v->slotbuf[i] = xtensa_insnbuf_alloc (isa);
if (v->slotbuf[i] == NULL)
as_fatal (_("out of memory"));
@@ -11430,6 +11325,9 @@
xg_clear_vinsn (vliw_insn *v)
{
int i;
+
+ memset (v, 0, offsetof (vliw_insn, insnbuf));
+
v->format = XTENSA_UNDEFINED;
v->num_slots = 0;
v->inside_bundle = FALSE;
@@ -11438,10 +11336,7 @@
debug_type = xt_saved_debug_type;
for (i = 0; i < MAX_SLOTS; i++)
- {
- memset (&v->slots[i], 0, sizeof (TInsn));
- v->slots[i].opcode = XTENSA_UNDEFINED;
- }
+ v->slots[i].opcode = XTENSA_UNDEFINED;
}
@@ -11469,18 +11364,9 @@
}
-/* Before this is called, we should have
- filled out the following fields:
+/* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
+ operands. See also the assumptions listed for tinsn_to_slotbuf. */
- 1) the number of operands for each opcode are correct
- 2) the tinsn in the slots are ITYPE_INSN
- 3) ONLY the relaxable_ is built
- 4) All operands are
- O_constant, O_symbol
- All constants fit
-
- The return value tells whether there are any remaining O_symbols. */
-
static bfd_boolean
vinsn_to_insnbuf (vliw_insn *vinsn,
char *frag_offset,
@@ -11504,14 +11390,7 @@
xtensa_format_set_slot (isa, fmt, slot,
insnbuf, vinsn->slotbuf[slot]);
- /* tinsn_has_fixup tracks if there is a fixup at all.
- record_fixup controls globally. I.E., we use this
- function from several places, some of which are after
- fixups have already been recorded. Finally,
- tinsn->record_fixup controls based on the individual ops,
- which may or may not need it based on the relaxation
- requirements. */
- if (tinsn_has_fixup && record_fixup)
+ if (tinsn_has_fixup)
{
int i;
xtensa_opcode opcode = tinsn->opcode;
@@ -11528,48 +11407,35 @@
case O_hi16:
if (get_relaxable_immed (opcode) == i)
{
- if (tinsn->record_fix || expr->X_op != O_symbol)
+ /* Add a fix record for the instruction, except if this
+ function is being called prior to relaxation, i.e.,
+ if record_fixup is false, and the instruction might
+ be relaxed later. */
+ if (record_fixup
+ || tinsn->is_specific_opcode
+ || !xg_is_relaxable_insn (tinsn, 0))
{
- if (!xg_add_opcode_fix
- (tinsn, i, fmt, slot, expr, fragP,
- frag_offset - fragP->fr_literal))
- as_bad (_("instruction with constant operands does not fit"));
+ xg_add_opcode_fix (tinsn, i, fmt, slot, expr, fragP,
+ frag_offset - fragP->fr_literal);
}
else
{
+ if (expr->X_op != O_symbol)
+ as_bad (_("invalid operand"));
tinsn->symbol = expr->X_add_symbol;
tinsn->offset = expr->X_add_number;
}
}
else
- as_bad (_("invalid operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
+ as_bad (_("symbolic operand not allowed"));
break;
case O_constant:
case O_register:
break;
- case O_subtract:
- if (get_relaxable_immed (opcode) == i)
- {
- if (tinsn->record_fix)
- as_bad (_("invalid subtract operand"));
- else
- {
- tinsn->symbol = expr->X_add_symbol;
- tinsn->sub_symbol = expr->X_op_symbol;
- tinsn->offset = expr->X_add_number;
- }
- }
- else
- as_bad (_("invalid operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
- break;
-
default:
- as_bad (_("invalid expression for operand %d on '%s'"),
- i, xtensa_opcode_name (isa, opcode));
+ as_bad (_("expression too complex"));
break;
}
}
@@ -11675,21 +11541,6 @@
}
-/* Set the expression to symbol - minus_sym + offset. */
-
-static void
-set_expr_symbol_offset_diff (expressionS *s,
- symbolS *sym,
- symbolS *minus_sym,
- offsetT offset)
-{
- s->X_op = O_subtract;
- s->X_add_symbol = sym;
- s->X_op_symbol = minus_sym; /* unused */
- s->X_add_number = offset;
-}
-
-
/* Return TRUE if the two expressions are equal. */
bfd_boolean
Modified: branches/binutils/package/gas/config/tc-xtensa.h
===================================================================
--- branches/binutils/package/gas/config/tc-xtensa.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-xtensa.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -213,6 +213,10 @@
contains an instruction. */
unsigned int is_first_loop_insn : 1;
+ /* A frag with this bit set is a branch that we are using to
+ align branch targets as if it were a normal narrow instruction. */
+ unsigned int is_aligning_branch : 1;
+
/* For text fragments that can generate literals at relax time, this
variable points to the frag where the literal will be stored. For
literal frags, this variable points to the nearest literal pool
@@ -238,7 +242,6 @@
fragS *literal_frags[MAX_SLOTS];
enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
symbolS *slot_symbols[MAX_SLOTS];
- symbolS *slot_sub_symbols[MAX_SLOTS];
offsetT slot_offsets[MAX_SLOTS];
/* The global aligner needs to walk backward through the list of
@@ -333,6 +336,7 @@
#define DATA_SECTION_NAME xtensa_section_rename (".data")
#define BSS_SECTION_NAME xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
+#define MAX_MEM_FOR_RS_ALIGN_CODE 1
/* The renumber_section function must be mapped over all the sections
Modified: branches/binutils/package/gas/config/tc-z80.c
===================================================================
--- branches/binutils/package/gas/config/tc-z80.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-z80.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -210,16 +210,6 @@
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach_type);
}
-/* Port specific features. */
-const pseudo_typeS md_pseudo_table[] =
-{
- { "defs", s_space, 1}, /* Synonym for ds on some assemblers. */
- { "ds", s_space, 1}, /* Fill with bytes rather than words. */
- { "psect", obj_coff_section, 0}, /* TODO: Translate attributes. */
- { "set", 0, 0}, /* Real instruction on z80. */
- { NULL, 0, 0 }
-} ;
-
static const char *
skip_space (const char *s)
{
@@ -262,7 +252,7 @@
break;
}
}
- /* Check for <label>[:] (EQU|DEFL) <value>. */
+ /* Check for <label>[:] [.](EQU|DEFL) <value>. */
if (is_name_beginner (*input_line_pointer))
{
char c, *rest, *line_start;
@@ -281,6 +271,8 @@
++rest;
if (*rest == ' ' || *rest == '\t')
++rest;
+ if (*rest == '.')
+ ++rest;
if (strncasecmp (rest, "EQU", 3) == 0)
len = 3;
else if (strncasecmp (rest, "DEFL", 4) == 0)
@@ -300,7 +292,6 @@
if (S_IS_DEFINED (symbolP) || symbol_equated_p (symbolP))
as_bad (_("symbol `%s' is already defined"), line_start);
}
- /* All symbols may be redefined. */
equals (line_start, 1);
return 1;
}
@@ -452,7 +443,7 @@
p = "instruction only works R800";
break;
default:
- p = 0; /* Not reachables. */
+ p = 0; /* Not reachable. */
}
if (ins_type & ins_err)
@@ -469,70 +460,6 @@
ins_used |= ins_type;
}
-/* This function tries to subtract two symbols, the generic code does
- that too, but this function tries harder.
- The behaviour of this function is not altered by extra
- fragmentations caused by the code to produce listings. */
-int
-z80_optimize_expr (expressionS *resultP, operatorT left_op,
- expressionS *right)
-{
- int res, swap, som;
- fragS *lfrag, *rfrag, *cur;
-
- res = 0;
- if (left_op == O_subtract
- && right->X_op == O_symbol
- && resultP->X_op == O_symbol)
- {
- lfrag = symbol_get_frag (resultP->X_add_symbol);
- rfrag = symbol_get_frag (right->X_add_symbol);
-
- if (S_GET_SEGMENT (right->X_add_symbol) != undefined_section
- && (S_GET_SEGMENT (right->X_add_symbol)
- == S_GET_SEGMENT (resultP->X_add_symbol)))
- {
- for (swap = 0; (res == 0) && (swap < 2); ++swap)
- {
- if (swap)
- {
- cur = lfrag;
- lfrag = rfrag;
- rfrag = cur;
- }
- else
- cur = rfrag;
-
- /* Now som == cur->fr_address - rfrag->address, except
- the latter may not have been computed yet. */
- for (som = 0; cur && cur != lfrag; cur = cur->fr_next)
- {
- if (cur->fr_type == rs_fill) /* Is the size fized? */
- som += cur->fr_fix+cur->fr_offset*cur->fr_var;
- else
- break;
- }
-
- if (cur == lfrag)
- {
- resultP->X_add_number -= right->X_add_number;
- resultP->X_add_number
- += (S_GET_VALUE (resultP->X_add_symbol)
- - S_GET_VALUE (right->X_add_symbol));
- som -= lfrag->fr_address - rfrag->fr_address;
- /* Correct the result if the fr_address
- fields are not computed yet. */
- resultP->X_add_number += (swap ? -som : som);
- resultP->X_op = O_constant;
- resultP->X_add_symbol = 0;
- res = 1;
- }
- }
- }
- }
- return res;
-}
-
/* Check whether an expression is indirect. */
static int
is_indir (const char *s)
@@ -733,6 +660,26 @@
return args;
}
+void z80_cons_fix_new (fragS *frag_p, int offset, int nbytes, expressionS *exp)
+{
+ bfd_reloc_code_real_type r[4] =
+ {
+ BFD_RELOC_8,
+ BFD_RELOC_16,
+ BFD_RELOC_24,
+ BFD_RELOC_32
+ };
+
+ if (nbytes < 1 || nbytes > 4)
+ {
+ as_bad (_("unsupported BFD relocation size %u"), nbytes);
+ }
+ else
+ {
+ fix_new_exp (frag_p, offset, nbytes, exp, 0, r[nbytes-1]);
+ }
+}
+
static void
emit_byte (expressionS * val, bfd_reloc_code_real_type r_type)
{
@@ -742,8 +689,12 @@
p = frag_more (1);
*p = val->X_add_number;
- if ((r_type != BFD_RELOC_8_PCREL) && (val->X_op == O_constant))
+ if ((r_type == BFD_RELOC_8_PCREL) && (val->X_op == O_constant))
{
+ as_bad(_("cannot make a relative jump to an absolute location"));
+ }
+ else if (val->X_op == O_constant)
+ {
lo = -128;
hi = (BFD_RELOC_8 == r_type) ? 255 : 127;
@@ -1717,38 +1668,33 @@
return p;
}
-static const char *
-emit_data (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+static void
+emit_data (int size ATTRIBUTE_UNUSED)
{
const char *p, *q;
char *u, quote;
int cnt;
expressionS exp;
- p = skip_space (args);
- if (!*p)
- error (_("missing operand"));
+ if (is_it_end_of_statement ())
+ {
+ demand_empty_rest_of_line ();
+ return;
+ }
+ p = skip_space (input_line_pointer);
- while (*p)
+ do
{
if (*p == '\"' || *p == '\'')
{
- if (opcode == 1)
- {
- for (quote = *p, q = ++p, cnt = 0; *p && quote != *p; ++p, ++cnt)
- ;
- u = frag_more (cnt);
- memcpy (u, q, cnt);
- if (!*p)
- as_warn (_("unterminated string"));
- else
- p = skip_space (p+1);
- }
- else
- {
- ill_op ();
- break;
- }
+ for (quote = *p, q = ++p, cnt = 0; *p && quote != *p; ++p, ++cnt)
+ ;
+ u = frag_more (cnt);
+ memcpy (u, q, cnt);
+ if (!*p)
+ as_warn (_("unterminated string"));
+ else
+ p = skip_space (p+1);
}
else
{
@@ -1760,21 +1706,12 @@
}
if (exp.X_md)
as_warn (_("parentheses ignored"));
- if (opcode == 1)
- emit_byte (&exp, BFD_RELOC_8);
- else
- emit_word (&exp);
+ emit_byte (&exp, BFD_RELOC_8);
p = skip_space (p);
}
- if (*p)
- {
- if (*p != ',')
- as_warn (_("missing ','"));
- else
- ++p;
- }
}
- return p;
+ while (*p++ == ',') ;
+ input_line_pointer = (char *)(p-1);
}
static const char *
@@ -1843,6 +1780,24 @@
return p;
}
+/* Port specific pseudo ops. */
+const pseudo_typeS md_pseudo_table[] =
+{
+ { "db" , emit_data, 1},
+ { "d24", cons, 3},
+ { "d32", cons, 4},
+ { "def24", cons, 3},
+ { "def32", cons, 4},
+ { "defb", emit_data, 1},
+ { "defs", s_space, 1}, /* Synonym for ds on some assemblers. */
+ { "defw", cons, 2},
+ { "ds", s_space, 1}, /* Fill with bytes rather than words. */
+ { "dw", cons, 2},
+ { "psect", obj_coff_section, 0}, /* TODO: Translate attributes. */
+ { "set", 0, 0}, /* Real instruction on z80. */
+ { NULL, 0, 0 }
+} ;
+
static table_t instab[] =
{
{ "adc", 0x88, 0x4A, emit_adc },
@@ -1858,13 +1813,9 @@
{ "cpir", 0xED, 0xB1, emit_insn },
{ "cpl", 0x00, 0x2F, emit_insn },
{ "daa", 0x00, 0x27, emit_insn },
- { "db", 0x00, 0x01, emit_data },
{ "dec", 0x0B, 0x05, emit_incdec },
- { "defb", 0x00, 0x01, emit_data },
- { "defw", 0x00, 0x02, emit_data },
{ "di", 0x00, 0xF3, emit_insn },
{ "djnz", 0x00, 0x10, emit_jr },
- { "dw", 0x00, 0x02, emit_data },
{ "ei", 0x00, 0xFB, emit_insn },
{ "ex", 0x00, 0x00, emit_ex},
{ "exx", 0x00, 0xD9, emit_insn },
@@ -1936,25 +1887,32 @@
for (i = 0; (i < BUFLEN) && (ISALPHA (*p));)
buf[i++] = TOLOWER (*p++);
- if ((i == BUFLEN)
- || ((*p) && (!ISSPACE (*p))))
- as_bad (_("illegal instruction '%s'"), buf);
-
- buf[i] = 0;
- p = skip_space (p);
- key = buf;
-
- insp = bsearch (&key, instab, ARRAY_SIZE (instab),
- sizeof (instab[0]), key_cmp);
- if (!insp)
- as_bad (_("illegal instruction '%s'"), buf);
- else
+ if (i == BUFLEN)
{
- p = insp->fp (insp->prefix, insp->opcode, p);
+ buf[BUFLEN-3] = buf[BUFLEN-2] = '.'; /* Mark opcode as abbreviated. */
+ buf[BUFLEN-1] = 0;
+ as_bad (_("Unknown instruction '%s'"), buf);
+ }
+ else if ((*p) && (!ISSPACE (*p)))
+ as_bad (_("syntax error"));
+ else
+ {
+ buf[i] = 0;
p = skip_space (p);
- if ((!err_flag) && *p)
- as_bad (_("junk at end of line, first unrecognized character is `%c'"),
- *p);
+ key = buf;
+
+ insp = bsearch (&key, instab, ARRAY_SIZE (instab),
+ sizeof (instab[0]), key_cmp);
+ if (!insp)
+ as_bad (_("Unknown instruction '%s'"), buf);
+ else
+ {
+ p = insp->fp (insp->prefix, insp->opcode, p);
+ p = skip_space (p);
+ if ((!err_flag) && *p)
+ as_bad (_("junk at end of line, first unrecognized character is `%c'"),
+ *p);
+ }
}
input_line_pointer = old_ptr;
}
@@ -2005,6 +1963,7 @@
if (val > 255 || val < -128)
as_warn_where (fixP->fx_file, fixP->fx_line, _("overflow"));
*buf++ = val;
+ fixP->fx_no_overflow = 1;
if (fixP->fx_addsy == NULL)
fixP->fx_done = 1;
break;
@@ -2012,14 +1971,24 @@
case BFD_RELOC_16:
*buf++ = val;
*buf++ = (val >> 8);
+ fixP->fx_no_overflow = 1;
if (fixP->fx_addsy == NULL)
fixP->fx_done = 1;
break;
- case BFD_RELOC_32: /* .Long may produce this. */
+ case BFD_RELOC_24: /* Def24 may produce this. */
*buf++ = val;
*buf++ = (val >> 8);
*buf++ = (val >> 16);
+ fixP->fx_no_overflow = 1;
+ if (fixP->fx_addsy == NULL)
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_32: /* Def32 and .long may produce this. */
+ *buf++ = val;
+ *buf++ = (val >> 8);
+ *buf++ = (val >> 16);
*buf++ = (val >> 24);
if (fixP->fx_addsy == NULL)
fixP->fx_done = 1;
Modified: branches/binutils/package/gas/config/tc-z80.h
===================================================================
--- branches/binutils/package/gas/config/tc-z80.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/tc-z80.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -55,11 +55,11 @@
/* Define some functions to be called by generic code. */
#define md_end z80_md_end
#define md_start_line_hook() { if (z80_start_line_hook ()) continue; }
-#define md_optimize_expr z80_optimize_expr
+#define TC_CONS_FIX_NEW z80_cons_fix_new
extern void z80_md_end (void);
extern int z80_start_line_hook (void);
-extern int z80_optimize_expr (expressionS *, operatorT, expressionS *);
+extern void z80_cons_fix_new (fragS *, int, int, expressionS *);
#define WORKING_DOT_WORD
Modified: branches/binutils/package/gas/config/xtensa-istack.h
===================================================================
--- branches/binutils/package/gas/config/xtensa-istack.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/xtensa-istack.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -51,12 +51,10 @@
struct fixP *fixup;
/* Filled out by relaxation_requirements: */
- bfd_boolean record_fix;
enum xtensa_relax_statesE subtype;
int literal_space;
/* Filled out by vinsn_to_insnbuf: */
symbolS *symbol;
- symbolS *sub_symbol;
offsetT offset;
fragS *literal_frag;
} TInsn;
@@ -89,10 +87,10 @@
typedef struct vliw_insn
{
xtensa_format format;
- xtensa_insnbuf insnbuf;
int num_slots;
unsigned int inside_bundle;
TInsn slots[MAX_SLOTS];
+ xtensa_insnbuf insnbuf;
xtensa_insnbuf slotbuf[MAX_SLOTS];
} vliw_insn;
Modified: branches/binutils/package/gas/config/xtensa-relax.c
===================================================================
--- branches/binutils/package/gas/config/xtensa-relax.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config/xtensa-relax.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -339,13 +339,55 @@
"addi %as, %as, 1;" /* density -> addi.n %as, %as, 1 */
"LABEL0"},
+ /* Relaxing to wide branches. Order is important here. With wide
+ branches, there is more than one correct relaxation for an
+ out-of-range branch. Put the wide branch relaxations first in the
+ table since they are more efficient than the branch-around
+ relaxations. */
+
+ {"beqz %as,%label ? IsaUseWideBranches", "beqz.w18 %as,%label"},
+ {"bnez %as,%label ? IsaUseWideBranches", "bnez.w18 %as,%label"},
+ {"bgez %as,%label ? IsaUseWideBranches", "bgez.w18 %as,%label"},
+ {"bltz %as,%label ? IsaUseWideBranches", "bltz.w18 %as,%label"},
+ {"beqi %as,%imm,%label ? IsaUseWideBranches", "beqi.w18 %as,%imm,%label"},
+ {"bnei %as,%imm,%label ? IsaUseWideBranches", "bnei.w18 %as,%imm,%label"},
+ {"bgei %as,%imm,%label ? IsaUseWideBranches", "bgei.w18 %as,%imm,%label"},
+ {"blti %as,%imm,%label ? IsaUseWideBranches", "blti.w18 %as,%imm,%label"},
+ {"bgeui %as,%imm,%label ? IsaUseWideBranches", "bgeui.w18 %as,%imm,%label"},
+ {"bltui %as,%imm,%label ? IsaUseWideBranches", "bltui.w18 %as,%imm,%label"},
+ {"bbci %as,%imm,%label ? IsaUseWideBranches", "bbci.w18 %as,%imm,%label"},
+ {"bbsi %as,%imm,%label ? IsaUseWideBranches", "bbsi.w18 %as,%imm,%label"},
+ {"beq %as,%at,%label ? IsaUseWideBranches", "beq.w18 %as,%at,%label"},
+ {"bne %as,%at,%label ? IsaUseWideBranches", "bne.w18 %as,%at,%label"},
+ {"bge %as,%at,%label ? IsaUseWideBranches", "bge.w18 %as,%at,%label"},
+ {"blt %as,%at,%label ? IsaUseWideBranches", "blt.w18 %as,%at,%label"},
+ {"bgeu %as,%at,%label ? IsaUseWideBranches", "bgeu.w18 %as,%at,%label"},
+ {"bltu %as,%at,%label ? IsaUseWideBranches", "bltu.w18 %as,%at,%label"},
+ {"bany %as,%at,%label ? IsaUseWideBranches", "bany.w18 %as,%at,%label"},
+ {"bnone %as,%at,%label ? IsaUseWideBranches", "bnone.w18 %as,%at,%label"},
+ {"ball %as,%at,%label ? IsaUseWideBranches", "ball.w18 %as,%at,%label"},
+ {"bnall %as,%at,%label ? IsaUseWideBranches", "bnall.w18 %as,%at,%label"},
+ {"bbc %as,%at,%label ? IsaUseWideBranches", "bbc.w18 %as,%at,%label"},
+ {"bbs %as,%at,%label ? IsaUseWideBranches", "bbs.w18 %as,%at,%label"},
+
+ /* Widening branch comparisons eq/ne to zero. Prefer relaxing to narrow
+ branches if the density option is available. */
{"beqz %as,%label ? IsaUseDensityInstruction", "bnez.n %as,%LABEL0;j %label;LABEL0"},
{"bnez %as,%label ? IsaUseDensityInstruction", "beqz.n %as,%LABEL0;j %label;LABEL0"},
{"beqz %as,%label", "bnez %as,%LABEL0;j %label;LABEL0"},
{"bnez %as,%label", "beqz %as,%LABEL0;j %label;LABEL0"},
+
+ /* Widening expect-taken branches. */
{"beqzt %as,%label ? IsaUsePredictedBranches", "bnez %as,%LABEL0;j %label;LABEL0"},
{"bnezt %as,%label ? IsaUsePredictedBranches", "beqz %as,%LABEL0;j %label;LABEL0"},
+ {"beqt %as,%at,%label ? IsaUsePredictedBranches", "bne %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bnet %as,%at,%label ? IsaUsePredictedBranches", "beq %as,%at,%LABEL0;j %label;LABEL0"},
+ /* Widening branches from the Xtensa boolean option. */
+ {"bt %bs,%label ? IsaUseBooleans", "bf %bs,%LABEL0;j %label;LABEL0"},
+ {"bf %bs,%label ? IsaUseBooleans", "bt %bs,%LABEL0;j %label;LABEL0"},
+
+ /* Other branch-around-jump widenings. */
{"bgez %as,%label", "bltz %as,%LABEL0;j %label;LABEL0"},
{"bltz %as,%label", "bgez %as,%LABEL0;j %label;LABEL0"},
{"beqi %as,%imm,%label", "bnei %as,%imm,%LABEL0;j %label;LABEL0"},
@@ -358,17 +400,11 @@
{"bbsi %as,%imm,%label", "bbci %as,%imm,%LABEL0;j %label;LABEL0"},
{"beq %as,%at,%label", "bne %as,%at,%LABEL0;j %label;LABEL0"},
{"bne %as,%at,%label", "beq %as,%at,%LABEL0;j %label;LABEL0"},
- {"beqt %as,%at,%label ? IsaUsePredictedBranches", "bne %as,%at,%LABEL0;j %label;LABEL0"},
- {"bnet %as,%at,%label ? IsaUsePredictedBranches", "beq %as,%at,%LABEL0;j %label;LABEL0"},
{"bge %as,%at,%label", "blt %as,%at,%LABEL0;j %label;LABEL0"},
{"blt %as,%at,%label", "bge %as,%at,%LABEL0;j %label;LABEL0"},
{"bgeu %as,%at,%label", "bltu %as,%at,%LABEL0;j %label;LABEL0"},
{"bltu %as,%at,%label", "bgeu %as,%at,%LABEL0;j %label;LABEL0"},
{"bany %as,%at,%label", "bnone %as,%at,%LABEL0;j %label;LABEL0"},
-
- {"bt %bs,%label ? IsaUseBooleans", "bf %bs,%LABEL0;j %label;LABEL0"},
- {"bf %bs,%label ? IsaUseBooleans", "bt %bs,%LABEL0;j %label;LABEL0"},
-
{"bnone %as,%at,%label", "bany %as,%at,%LABEL0;j %label;LABEL0"},
{"ball %as,%at,%label", "bnall %as,%at,%LABEL0;j %label;LABEL0"},
{"bnall %as,%at,%label", "ball %as,%at,%LABEL0;j %label;LABEL0"},
@@ -1489,6 +1525,8 @@
option_available = (XCHAL_HAVE_CONST16 == 1);
else if (!strcmp (option_name, "Loops"))
option_available = (XCHAL_HAVE_LOOPS == 1);
+ else if (!strcmp (option_name, "WideBranches"))
+ option_available = (XCHAL_HAVE_WIDE_BRANCHES == 1);
else if (!strcmp (option_name, "PredictedBranches"))
option_available = (XCHAL_HAVE_PREDICTED_BRANCHES == 1);
else if (!strcmp (option_name, "Booleans"))
Modified: branches/binutils/package/gas/config.in
===================================================================
--- branches/binutils/package/gas/config.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/config.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -48,6 +48,10 @@
/* Is the prototype for getopt in <unistd.h> in the expected format? */
#undef HAVE_DECL_GETOPT
+/* Define to 1 if you have the declaration of `vsnprintf', and to 0 if you
+ don't. */
+#undef HAVE_DECL_VSNPRINTF
+
/* Define to 1 if you have the <errno.h> header file. */
#undef HAVE_ERRNO_H
Modified: branches/binutils/package/gas/configure
===================================================================
--- branches/binutils/package/gas/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL WARN_CFLAGS NO_WERROR GDBINIT cgen_cpu_prefix extra_objects target_cpu_type obj_format te_file install_tooldir atof BFDLIB OPCODES_LIB BFDVER_H ALL_OBJ_DEPS YACC LEX LEXLIB LEX_OUTPUT_ROOT CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT LIBM LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL WARN_CFLAGS NO_WERROR GDBINIT cgen_cpu_prefix extra_objects target_cpu_type obj_format te_file install_tooldir atof BFDLIB OPCODES_LIB BFDVER_H ALL_OBJ_DEPS YACC LEX LEXLIB LEX_OUTPUT_ROOT CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT LIBM datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
ac_subst_files=''
# Initialize some variables set by options.
@@ -856,7 +856,7 @@
--enable-static=PKGS build static libraries default=yes
--enable-fast-install=PKGS optimize for fast installation default=yes
--disable-libtool-lock avoid locking (might break parallel builds)
- targets alternative target configurations besides the primary
+ --enable-targets alternative target configurations besides the primary
--enable-commonbfdlib build shared BFD/opcodes/libiberty library
--enable-werror treat compile warnings as errors
--enable-build-warnings Enable build-time compiler warnings
@@ -3340,6 +3340,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3350,6 +3351,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3410,14 +3412,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3478,6 +3473,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3811,7 +3867,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3814 "configure"' > conftest.$ac_ext
+ echo '#line 3870 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -3866,6 +3922,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -4712,6 +4814,10 @@
using_cgen=yes
;;
+ xc16x)
+ using_cgen=yes
+ ;;
+
xtensa)
echo ${extra_objects} | grep -s "xtensa-relax.o"
if test $? -ne 0 ; then
@@ -4812,7 +4918,6 @@
cgen_cpu_prefix=""
if test $using_cgen = yes ; then
case ${target_cpu} in
- mt) cgen_cpu_prefix=ms1 ;;
*) cgen_cpu_prefix=${target_cpu} ;;
esac
@@ -10105,8 +10210,9 @@
yes)
LIBM=
case $host in
-*-*-beos* | *-*-cygwin* | *-*-pw32*)
+*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
# These system don't have libm
+ # on darwin the libm is a symbolic link to libSystem.dylib
;;
*-ncr-sysv4.3*)
echo "$as_me:$LINENO: checking for _mwvalidcheckl in -lmw" >&5
@@ -10944,8 +11050,85 @@
fi
+echo "$as_me:$LINENO: checking whether vsnprintf is declared" >&5
+echo $ECHO_N "checking whether vsnprintf is declared... $ECHO_C" >&6
+if test "${ac_cv_have_decl_vsnprintf+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h. */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h. */
+$ac_includes_default
+int
+main ()
+{
+#ifndef vsnprintf
+ char *p = (char *) vsnprintf;
+#endif
+ ;
+ return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>conftest.er1
+ ac_status=$?
+ grep -v '^ *+' conftest.er1 >conftest.err
+ rm -f conftest.er1
+ cat conftest.err >&5
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); } &&
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; } &&
+ { ac_try='test -s conftest.$ac_objext'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }; then
+ ac_cv_have_decl_vsnprintf=yes
+else
+ echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+ac_cv_have_decl_vsnprintf=no
+fi
+rm -f conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+echo "$as_me:$LINENO: result: $ac_cv_have_decl_vsnprintf" >&5
+echo "${ECHO_T}$ac_cv_have_decl_vsnprintf" >&6
+if test $ac_cv_have_decl_vsnprintf = yes; then
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_VSNPRINTF 1
+_ACEOF
+
+
+else
+ cat >>confdefs.h <<_ACEOF
+#define HAVE_DECL_VSNPRINTF 0
+_ACEOF
+
+
+fi
+
+
+
+
+
+
+
+
+
ac_config_files="$ac_config_files Makefile doc/Makefile po/Makefile.in:po/Make-in"
ac_config_commands="$ac_config_commands default"
@@ -11703,6 +11886,9 @@
s, at MAINTAINER_MODE_FALSE@,$MAINTAINER_MODE_FALSE,;t t
s, at MAINT@,$MAINT,;t t
s, at LIBM@,$LIBM,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LIBOBJS@,$LIBOBJS,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
CEOF
Modified: branches/binutils/package/gas/configure.in
===================================================================
--- branches/binutils/package/gas/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -23,7 +23,7 @@
AM_PROG_LIBTOOL
AC_ARG_ENABLE(targets,
-[ targets alternative target configurations besides the primary],
+[ --enable-targets alternative target configurations besides the primary],
[case "${enableval}" in
yes | "") AC_ERROR(enable-targets option must specify target names or 'all')
;;
@@ -335,6 +335,10 @@
using_cgen=yes
;;
+ xc16x)
+ using_cgen=yes
+ ;;
+
xtensa)
echo ${extra_objects} | grep -s "xtensa-relax.o"
if test $? -ne 0 ; then
@@ -433,7 +437,6 @@
cgen_cpu_prefix=""
if test $using_cgen = yes ; then
case ${target_cpu} in
- mt) cgen_cpu_prefix=ms1 ;;
*) cgen_cpu_prefix=${target_cpu} ;;
esac
AC_SUBST(cgen_cpu_prefix)
@@ -664,6 +667,13 @@
GAS_CHECK_DECL_NEEDED(sbrk, f, char *(*f)(), $gas_test_headers)
GAS_CHECK_DECL_NEEDED(strstr, f, char *(*f)(), $gas_test_headers)
+AC_CHECK_DECLS([vsnprintf])
+
+dnl Required for html and install-html targets.
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
dnl This must come last.
dnl We used to make symlinks to files in the source directory, but now
Modified: branches/binutils/package/gas/configure.tgt
===================================================================
--- branches/binutils/package/gas/configure.tgt 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/configure.tgt 2006-04-19 08:33:31 UTC (rev 12)
@@ -107,7 +107,7 @@
arm-*-kaos*) fmt=elf ;;
arm-*-conix*) fmt=elf ;;
arm-*-linux*aout*) fmt=aout em=linux ;;
- arm-*-linux-gnueabi*) fmt=elf em=armlinuxeabi ;;
+ arm-*-linux-*eabi*) fmt=elf em=armlinuxeabi ;;
arm-*-linux-*) fmt=elf em=linux ;;
arm-*-uclinux*) fmt=elf em=linux ;;
arm-*-netbsdelf*) fmt=elf em=nbsd ;;
@@ -213,6 +213,7 @@
i386-*-nto-qnx*) fmt=elf ;;
i386-*-*nt*) fmt=coff em=pe ;;
i386-*-chaos) fmt=elf ;;
+ i386-*-rdos*) fmt=elf ;;
i860-*-*) fmt=elf endian=little ;;
@@ -267,7 +268,7 @@
mips-*-sysv4*MP* | mips-*-gnu*) fmt=elf em=tmips ;;
mips-*-sysv*) fmt=ecoff ;;
mips-*-elf* | mips-*-rtems*) fmt=elf ;;
- mips-*-netbsd*) fmt=elf ;;
+ mips-*-netbsd*) fmt=elf em=tmips ;;
mips-*-openbsd*) fmt=elf em=tmips ;;
mmix-*-*) fmt=elf ;;
@@ -334,7 +335,7 @@
sparc-*-rtems*) fmt=elf ;;
sparc-*-sunos4*) fmt=aout em=sun3 ;;
- sparc-*-aout | sparc*-*-vxworks*) fmt=aout em=sparcaout ;;
+ sparc-*-aout) fmt=aout em=sparcaout ;;
sparc-*-coff) fmt=coff ;;
sparc-*-linux*aout*) fmt=aout em=linux ;;
sparc-*-linux-*) fmt=elf em=linux ;;
Modified: branches/binutils/package/gas/doc/Makefile.am
===================================================================
--- branches/binutils/package/gas/doc/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -64,13 +64,33 @@
eval `grep '^ *VERSION=' $(srcdir)/../../bfd/configure`; \
echo "@set VERSION $$VERSION" > $@
-$(srcdir)/as.info: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
-as.dvi: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
+$(srcdir)/as.info as.dvi as.html: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install-data-local: install-info
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
# This one isn't ready for prime time yet. Not even a little bit.
noinst_TEXINFOS = internals.texi
Modified: branches/binutils/package/gas/doc/Makefile.in
===================================================================
--- branches/binutils/package/gas/doc/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -170,6 +170,8 @@
build_vendor = @build_vendor@
cgen_cpu_prefix = @cgen_cpu_prefix@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
extra_objects = @extra_objects@
host = @host@
@@ -177,6 +179,7 @@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -250,6 +253,7 @@
c-z80.texi \
c-z8k.texi
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
# This one isn't ready for prime time yet. Not even a little bit.
noinst_TEXINFOS = internals.texi
@@ -343,6 +347,8 @@
rm -rf $(@:.html=); else rm -Rf $(@:.html=.htp) $@; fi; \
exit 1; \
fi
+$(srcdir)/as.info: as.texinfo
+as.dvi: as.texinfo
as.pdf: as.texinfo
as.html: as.texinfo
.dvi.ps:
@@ -586,13 +592,31 @@
eval `grep '^ *VERSION=' $(srcdir)/../../bfd/configure`; \
echo "@set VERSION $$VERSION" > $@
-$(srcdir)/as.info: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
-as.dvi: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
+$(srcdir)/as.info as.dvi as.html: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS)
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install-data-local: install-info
+install-html: install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
# Maintenance
# We need it for the taz target in ../../Makefile.in.
Modified: branches/binutils/package/gas/doc/all.texi
===================================================================
--- branches/binutils/package/gas/doc/all.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/all.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -43,6 +43,7 @@
@set IP2K
@set M32C
@set M32R
+ at set xc16x
@set M68HC11
@set M680X0
@set MCORE
Modified: branches/binutils/package/gas/doc/as.texinfo
===================================================================
--- branches/binutils/package/gas/doc/as.texinfo 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/as.texinfo 2006-04-19 08:33:31 UTC (rev 12)
@@ -4102,6 +4102,9 @@
This is often easier to use, because the number will match the
code it's annotating.
+ at section @code{.cfi_signal_frame}
+Mark current function as signal trampoline.
+
@section @code{.cfi_window_save}
SPARC register window has been saved.
@@ -4527,11 +4530,15 @@
@section @code{.ident}
@cindex @code{ident} directive
-This directive is used by some assemblers to place tags in object files.
- at command{@value{AS}} simply accepts the directive for source-file
-compatibility with such assemblers, but does not actually emit anything
-for it.
+This directive is used by some assemblers to place tags in object files. The
+behavior of this directive varies depending on the target. When using the
+a.out object file format, @command{@value{AS}} simply accepts the directive for
+source-file compatibility with existing assemblers, but does not emit anything
+for it. When using COFF, comments are emitted to the @code{.comment} or
+ at code{.rdata} section, depending on the target. When using ELF, comments are
+emitted to the @code{.comment} section.
+
@node If
@section @code{.if @var{absolute expression}}
Modified: branches/binutils/package/gas/doc/c-arm.texi
===================================================================
--- branches/binutils/package/gas/doc/c-arm.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/c-arm.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -107,6 +107,9 @@
@code{arm1176jzf-s},
@code{mpcore},
@code{mpcorenovfp},
+ at code{cortex-a8},
+ at code{cortex-r4},
+ at code{cortex-m3},
@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
@code{i80200} (Intel XScale processor)
@code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
@@ -151,6 +154,10 @@
@code{armv6k},
@code{armv6z},
@code{armv6zk},
+ at code{armv7},
+ at code{armv7a},
+ at code{armv7r},
+ at code{armv7m},
@code{iwmmxt}
and
@code{xscale}.
@@ -248,9 +255,10 @@
This option specifies which EABI version the produced object files should
conform to.
The following values are recognised:
- at code{gnu}
+ at code{gnu},
+ at code{4}
and
- at code{4}.
+ at code{5}.
@cindex @code{-EB} command line option, ARM
@item -EB
Modified: branches/binutils/package/gas/doc/c-m68k.texi
===================================================================
--- branches/binutils/package/gas/doc/c-m68k.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/c-m68k.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -32,6 +32,50 @@
@table @samp
+ at cindex @samp{-march=} command line option, M680x0
+ at item -march=@var{architecture}
+This option specifies a target architecture. The following
+architectures are recognized:
+ at code{68000},
+ at code{68010},
+ at code{68020},
+ at code{68030},
+ at code{68040},
+ at code{68060},
+ at code{cpu32},
+ at code{isaa},
+ at code{isaaplus},
+ at code{isab} and
+ at code{cfv4e}.
+
+
+ at cindex @samp{-mcpu=} command line option, M680x0
+ at item -mcpu=@var{cpu}
+This option specifies a target cpu. When used in conjunction with the
+ at option{-march} option, the cpu must be within the specified
+architecture. Also, the generic features of the architecture are used
+for instruction generation, rather than those of the specific chip.
+
+ at cindex @samp{-m[no-]68851} command line option, M680x0
+ at cindex @samp{-m[no-]68881} command line option, M680x0
+ at cindex @samp{-m[no-]div} command line option, M680x0
+ at cindex @samp{-m[no-]usp} command line option, M680x0
+ at cindex @samp{-m[no-]float} command line option, M680x0
+ at cindex @samp{-m[no-]mac} command line option, M680x0
+ at cindex @samp{-m[no-]emac} command line option, M680x0
+ at item -m[no-]68851
+ at item -m[no-]68881
+ at item -m[no-]div
+ at item -m[no-]usp
+ at item -m[no-]float
+ at item -m[no-]mac
+ at item -m[no-]emac
+
+Enable or disable various architecture specific features. If a chip
+or architecture by default supports an option (for instance
+ at option{-march=isaaplus} includes the @option{-mdiv} option),
+explicitly disabling the option will override the default.
+
@cindex @samp{-l} option, M680x0
@item -l
You can use the @samp{-l} option to shorten the size of references to undefined
@@ -398,6 +442,25 @@
@cindex @code{skip} directive, M680x0
@item .skip
This directive is identical to a @code{.space} directive.
+
+ at cindex @code{arch} directive, M680x0
+ at item .arch @var{name}
+Select the target architecture and extension features. Valid valuse
+for @var{name} are the same as for the @option{-march} command line
+option. This directive cannot be specified after
+any instructions have been assembled. If it is given multiple times,
+or in conjuction with the @option{-march} option, all uses must be for
+the same architecture and extension set.
+
+ at cindex @code{cpu} directive, M680x0
+ at item .cpu @var{name}
+Select the target cpu. Valid valuse
+for @var{name} are the same as for the @option{-mcpu} command line
+option. This directive cannot be specified after
+any instructions have been assembled. If it is given multiple times,
+or in conjuction with the @option{-mopt} option, all uses must be for
+the same cpu.
+
@end table
@need 2000
Modified: branches/binutils/package/gas/doc/c-mt.texi
===================================================================
--- branches/binutils/package/gas/doc/c-mt.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/c-mt.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,8 +5,8 @@
@ifset GENERIC
@page
- at node MS1-Dependent
- at chapter MS1 Dependent Features
+ at node MT-Dependent
+ at chapter MT Dependent Features
@end ifset
@ifclear GENERIC
@@ -14,19 +14,19 @@
@chapter MS1 Dependent Features
@end ifclear
- at cindex MS1 support
+ at cindex MT support
@menu
-* MS1 Options:: Options
+* MT Options:: Options
@end menu
- at node MS1 Options
+ at node MT Options
@section Options
- at cindex MS1 options (none)
- at cindex options for MS1 (none)
+ at cindex MT options (none)
+ at cindex options for MT (none)
@table @code
- at cindex @code{-march=} command line option, MS1
+ at cindex @code{-march=} command line option, MT
@item -march=@var{processor}
This option specifies the target processor. The assembler will issue an
error message if an attempt is made to assemble an instruction which
@@ -37,7 +37,7 @@
@code{ms1-16-003},
and @code{ms2}.
- at cindex @code{-nosched} command line option, MS1
+ at cindex @code{-nosched} command line option, MT
@item -nosched
This option disables scheduling restriction checking.
Added: branches/binutils/package/gas/doc/c-xc16x.texi
===================================================================
--- branches/binutils/package/gas/doc/c-xc16x.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/c-xc16x.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,55 @@
+ at c Copyright 2006 Free Software Foundation, Inc.
+ at c This is part of the GAS manual.
+ at c For copying conditions, see the file as.texinfo.
+
+ at page
+ at node xc16x-Dependent
+ at chapter Infineon xc16x Dependent Features
+
+ at cindex xc16x support
+ at menu
+* xc16x Directives:: xc16x Machine Directives
+ at end menu
+
+ at node xc16x Directives
+ at section xc16x Machine Directives
+
+The xc16x version of the assembler supports the following machine
+directives:
+
+ at table @code
+ at cindex @code{align} directive, xc16x
+ at item .align
+This directive aligns the section program counter on the next 2-byte
+boundary.
+
+
+ at cindex @code{byte} directive, xc16x
+ at item .byte @var{expr}
+This directive assembles a half-word (8-bit) constant.
+
+ at cindex @code{word} directive, xc16x
+ at item .word @var{expr}
+This assembles a word (16-bit) constant.
+
+ at cindex @code{ascii} directive, xc16x
+ at item .ascii "@var{ascii}"
+This directive used for copying @var{str} into the object file.
+The string is terminated with a null byte.
+
+ at cindex @code{set} directive, xc16x
+ at item .set @var{symbol}, @var{value}
+This directive creates a symbol named @var{symbol} which is an alias for
+another symbol (possibly not yet defined). This should not be confused
+with the mnemonic @code{set}, which is a legitimate xc16x instruction.
+
+
+
+ at cindex @code{bss} directive, xc16x
+ at item .bss @var{symbol}, @var{length}
+Reserve @var{length} bytes in the bss section for a local @var{symbol},
+aligned to the power of two specified by @var{align}. @var{length} and
+ at var{align} must be positive absolute expressions. This directive
+differs from @samp{.lcomm} only in that it permits you to specify
+an alignment.
+ at end table
Modified: branches/binutils/package/gas/doc/c-z80.texi
===================================================================
--- branches/binutils/package/gas/doc/c-z80.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/doc/c-z80.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -150,14 +150,24 @@
@item db @var{expression}|@var{string}[, at var{expression}|@var{string}...]
@itemx defb @var{expression}|@var{string}[, at var{expression}|@var{string}...]
For each @var{string} the characters are copied to the object file, for
-each other @var{expression} the value is stored in one byte, ignoring
-overflow.
+each other @var{expression} the value is stored in one byte.
+A warning is issued in case of an overflow.
@item dw @var{expression}[, at var{expression}...]
@itemx defw @var{expression}[, at var{expression}...]
For each @var{expression} the value is stored in two bytes, ignoring
overflow.
+ at item d24 @var{expression}[, at var{expression}...]
+ at itemx def24 @var{expression}[, at var{expression}...]
+For each @var{expression} the value is stored in three bytes, ignoring
+overflow.
+
+ at item d32 @var{expression}[, at var{expression}...]
+ at itemx def32 @var{expression}[, at var{expression}...]
+For each @var{expression} the value is stored in four bytes, ignoring
+overflow.
+
@item ds @var{count}[, @var{value}]
@itemx defs @var{count}[, @var{value}]
@c Synonyms for @code{ds.b},
Modified: branches/binutils/package/gas/dw2gencfi.c
===================================================================
--- branches/binutils/package/gas/dw2gencfi.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/dw2gencfi.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* dw2gencfi.c - Support for generating Dwarf2 CFI information.
- Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
+ Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Contributed by Michal Ludvig <mludvig at suse.cz>
This file is part of GAS, the GNU Assembler.
@@ -88,6 +88,7 @@
struct cfi_insn_data *data;
struct cfi_insn_data **last;
unsigned int return_column;
+ unsigned int signal_frame;
};
struct cie_entry
@@ -95,6 +96,7 @@
struct cie_entry *next;
symbolS *start_address;
unsigned int return_column;
+ unsigned int signal_frame;
struct cfi_insn_data *first, *last;
};
@@ -354,6 +356,7 @@
#define CFI_return_column 0x101
#define CFI_rel_offset 0x102
#define CFI_escape 0x103
+#define CFI_signal_frame 0x104
const pseudo_typeS cfi_pseudo_table[] =
{
@@ -374,6 +377,7 @@
{ "cfi_restore_state", dot_cfi, DW_CFA_restore_state },
{ "cfi_window_save", dot_cfi, DW_CFA_GNU_window_save },
{ "cfi_escape", dot_cfi_escape, 0 },
+ { "cfi_signal_frame", dot_cfi, CFI_signal_frame },
{ NULL, NULL, 0 }
};
@@ -547,6 +551,10 @@
cfi_add_CFA_insn (DW_CFA_GNU_window_save);
break;
+ case CFI_signal_frame:
+ cur_fde_data->signal_frame = 1;
+ break;
+
default:
abort ();
}
@@ -864,6 +872,8 @@
out_one (DW_CIE_VERSION); /* Version. */
out_one ('z'); /* Augmentation. */
out_one ('R');
+ if (cie->signal_frame)
+ out_one ('S');
out_one (0);
out_uleb128 (DWARF2_LINE_MIN_INSN_LENGTH); /* Code alignment. */
out_sleb128 (DWARF2_CIE_DATA_ALIGNMENT); /* Data alignment. */
@@ -944,7 +954,8 @@
for (cie = cie_root; cie; cie = cie->next)
{
- if (cie->return_column != fde->return_column)
+ if (cie->return_column != fde->return_column
+ || cie->signal_frame != fde->signal_frame)
continue;
for (i = cie->first, j = fde->data;
i != cie->last && j != NULL;
@@ -1017,6 +1028,7 @@
cie->next = cie_root;
cie_root = cie;
cie->return_column = fde->return_column;
+ cie->signal_frame = fde->signal_frame;
cie->first = fde->data;
for (i = cie->first; i ; i = i->next)
Modified: branches/binutils/package/gas/dwarf2dbg.c
===================================================================
--- branches/binutils/package/gas/dwarf2dbg.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/dwarf2dbg.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* dwarf2dbg.c - DWARF2 debug support
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
@@ -484,7 +484,8 @@
files[i].filename = num ? file : xstrdup (file);
files[i].dir = dir;
- files_in_use = i + 1;
+ if (files_in_use < i + 1)
+ files_in_use = i + 1;
last_used = i;
last_used_dir_len = dir_len;
Modified: branches/binutils/package/gas/expr.c
===================================================================
--- branches/binutils/package/gas/expr.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/expr.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* expr.c -operands, expressions-
Copyright 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -1662,6 +1662,7 @@
while (op_left != O_illegal && op_rank[(int) op_left] > rank)
{
segT rightseg;
+ bfd_vma frag_off;
input_line_pointer += op_chars; /* -> after operator. */
@@ -1741,12 +1742,15 @@
else if (op_left == O_subtract
&& right.X_op == O_symbol
&& resultP->X_op == O_symbol
- && (symbol_get_frag (right.X_add_symbol)
- == symbol_get_frag (resultP->X_add_symbol))
+ && retval == rightseg
&& (SEG_NORMAL (rightseg)
- || right.X_add_symbol == resultP->X_add_symbol))
+ || right.X_add_symbol == resultP->X_add_symbol)
+ && frag_offset_fixed_p (symbol_get_frag (resultP->X_add_symbol),
+ symbol_get_frag (right.X_add_symbol),
+ &frag_off))
{
resultP->X_add_number -= right.X_add_number;
+ resultP->X_add_number -= frag_off / OCTETS_PER_BYTE;
resultP->X_add_number += (S_GET_VALUE (resultP->X_add_symbol)
- S_GET_VALUE (right.X_add_symbol));
resultP->X_op = O_constant;
@@ -1900,6 +1904,7 @@
valueT left, right;
segT seg_left, seg_right;
fragS *frag_left, *frag_right;
+ bfd_vma frag_off;
switch (op)
{
@@ -1913,7 +1918,7 @@
case O_symbol:
case O_symbol_rva:
- if (!snapshot_symbol (add_symbol, &left, &seg_left, &frag_left))
+ if (!snapshot_symbol (&add_symbol, &left, &seg_left, &frag_left))
return 0;
break;
@@ -1921,7 +1926,7 @@
case O_uminus:
case O_bit_not:
case O_logical_not:
- if (!snapshot_symbol (add_symbol, &left, &seg_left, &frag_left))
+ if (!snapshot_symbol (&add_symbol, &left, &seg_left, &frag_left))
return 0;
if (seg_left != absolute_section)
@@ -1955,8 +1960,8 @@
case O_gt:
case O_logical_and:
case O_logical_or:
- if (!snapshot_symbol (add_symbol, &left, &seg_left, &frag_left)
- || !snapshot_symbol (op_symbol, &right, &seg_right, &frag_right))
+ if (!snapshot_symbol (&add_symbol, &left, &seg_left, &frag_left)
+ || !snapshot_symbol (&op_symbol, &right, &seg_right, &frag_right))
return 0;
/* Simplify addition or subtraction of a constant by folding the
@@ -1974,7 +1979,7 @@
final_val += left;
left = right;
seg_left = seg_right;
- expressionP->X_add_symbol = expressionP->X_op_symbol;
+ add_symbol = op_symbol;
op = O_symbol;
break;
}
@@ -1991,21 +1996,86 @@
/* Equality and non-equality tests are permitted on anything.
Subtraction, and other comparison operators are permitted if
- both operands are in the same section. Otherwise, both
- operands must be absolute. We already handled the case of
- addition or subtraction of a constant above. */
+ both operands are in the same section.
+ Shifts by constant zero are permitted on anything.
+ Multiplies, bit-ors, and bit-ands with constant zero are
+ permitted on anything.
+ Multiplies and divides by constant one are permitted on
+ anything.
+ Binary operations with both operands being the same register
+ or undefined symbol are permitted if the result doesn't depend
+ on the input value.
+ Otherwise, both operands must be absolute. We already handled
+ the case of addition or subtraction of a constant above. */
+ frag_off = 0;
if (!(seg_left == absolute_section
&& seg_right == absolute_section)
&& !(op == O_eq || op == O_ne)
&& !((op == O_subtract
|| op == O_lt || op == O_le || op == O_ge || op == O_gt)
&& seg_left == seg_right
- && (finalize_syms || frag_left == frag_right)
- && ((seg_left != undefined_section
- && seg_left != reg_section)
- || add_symbol == op_symbol)))
- return 0;
+ && (finalize_syms
+ || frag_offset_fixed_p (frag_left, frag_right, &frag_off))
+ && (seg_left != reg_section || left == right)
+ && (seg_left != undefined_section || add_symbol == op_symbol)))
+ {
+ if ((seg_left == absolute_section && left == 0)
+ || (seg_right == absolute_section && right == 0))
+ {
+ if (op == O_bit_exclusive_or || op == O_bit_inclusive_or)
+ {
+ if (seg_right != absolute_section || right != 0)
+ {
+ seg_left = seg_right;
+ left = right;
+ add_symbol = op_symbol;
+ }
+ op = O_symbol;
+ break;
+ }
+ else if (op == O_left_shift || op == O_right_shift)
+ {
+ if (seg_left != absolute_section || left != 0)
+ {
+ op = O_symbol;
+ break;
+ }
+ }
+ else if (op != O_multiply
+ && op != O_bit_or_not && op != O_bit_and)
+ return 0;
+ }
+ else if (op == O_multiply
+ && seg_left == absolute_section && left == 1)
+ {
+ seg_left = seg_right;
+ left = right;
+ add_symbol = op_symbol;
+ op = O_symbol;
+ break;
+ }
+ else if ((op == O_multiply || op == O_divide)
+ && seg_right == absolute_section && right == 1)
+ {
+ op = O_symbol;
+ break;
+ }
+ else if (left != right
+ || ((seg_left != reg_section || seg_right != reg_section)
+ && (seg_left != undefined_section
+ || seg_right != undefined_section
+ || add_symbol != op_symbol)))
+ return 0;
+ else if (op == O_bit_and || op == O_bit_inclusive_or)
+ {
+ op = O_symbol;
+ break;
+ }
+ else if (op != O_bit_exclusive_or && op != O_bit_or_not)
+ return 0;
+ }
+ right += frag_off / OCTETS_PER_BYTE;
switch (op)
{
case O_add: left += right; break;
@@ -2032,8 +2102,7 @@
left = (left == right
&& seg_left == seg_right
&& (finalize_syms || frag_left == frag_right)
- && ((seg_left != undefined_section
- && seg_left != reg_section)
+ && (seg_left != undefined_section
|| add_symbol == op_symbol)
? ~ (valueT) 0 : 0);
if (op == O_ne)
@@ -2066,6 +2135,9 @@
op = O_constant;
else if (seg_left == reg_section && final_val == 0)
op = O_register;
+ else if (add_symbol != expressionP->X_add_symbol)
+ final_val += left;
+ expressionP->X_add_symbol = add_symbol;
}
expressionP->X_op = op;
Modified: branches/binutils/package/gas/frags.c
===================================================================
--- branches/binutils/package/gas/frags.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/frags.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* frags.c - manage frags -
Copyright 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2003, 2004
+ 1999, 2000, 2001, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -383,3 +383,56 @@
}
obstack_1grow (&frchain_now->frch_obstack, datum);
}
+
+/* Return TRUE if FRAG1 and FRAG2 have a fixed relationship between
+ their start addresses. Set OFFSET to the difference in address
+ not already accounted for in the frag FR_ADDRESS. */
+
+bfd_boolean
+frag_offset_fixed_p (fragS *frag1, fragS *frag2, bfd_vma *offset)
+{
+ fragS *frag;
+ bfd_vma off;
+
+ /* Start with offset initialised to difference between the two frags.
+ Prior to assigning frag addresses this will be zero. */
+ off = frag1->fr_address - frag2->fr_address;
+ if (frag1 == frag2)
+ {
+ *offset = off;
+ return TRUE;
+ }
+
+ /* Maybe frag2 is after frag1. */
+ frag = frag1;
+ while (frag->fr_type == rs_fill)
+ {
+ off += frag->fr_fix + frag->fr_offset * frag->fr_var;
+ frag = frag->fr_next;
+ if (frag == NULL)
+ break;
+ if (frag == frag2)
+ {
+ *offset = off;
+ return TRUE;
+ }
+ }
+
+ /* Maybe frag1 is after frag2. */
+ off = frag1->fr_address - frag2->fr_address;
+ frag = frag2;
+ while (frag->fr_type == rs_fill)
+ {
+ off -= frag->fr_fix + frag->fr_offset * frag->fr_var;
+ frag = frag->fr_next;
+ if (frag == NULL)
+ break;
+ if (frag == frag1)
+ {
+ *offset = off;
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
Modified: branches/binutils/package/gas/frags.h
===================================================================
--- branches/binutils/package/gas/frags.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/frags.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* frags.h - Header file for the frag concept.
Copyright 1987, 1992, 1993, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -148,4 +148,6 @@
offsetT offset,
char *opcode);
+bfd_boolean frag_offset_fixed_p (fragS *, fragS *, bfd_vma *);
+
#endif /* FRAGS_H */
Modified: branches/binutils/package/gas/macro.c
===================================================================
--- branches/binutils/package/gas/macro.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/macro.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -303,18 +303,14 @@
{
while (idx < in->len
&& (in->ptr[idx] == '"'
- || in->ptr[idx] == '('
|| (in->ptr[idx] == '<' && (macro_alternate || macro_mri))
|| (in->ptr[idx] == '\'' && macro_alternate)))
{
if (in->ptr[idx] == '<')
{
int nest = 0;
- char start_char = '>';
- char end_char = '>';
-
idx++;
- while ((in->ptr[idx] != end_char || nest)
+ while ((in->ptr[idx] != '>' || nest)
&& idx < in->len)
{
if (in->ptr[idx] == '!')
@@ -324,37 +320,15 @@
}
else
{
- if (in->ptr[idx] == end_char)
+ if (in->ptr[idx] == '>')
nest--;
- if (in->ptr[idx] == start_char)
+ if (in->ptr[idx] == '<')
nest++;
sb_add_char (acc, in->ptr[idx++]);
}
}
idx++;
}
- else if (in->ptr[idx] == '(')
- {
- int nest = 0;
- char c;
-
- do
- {
- c = in->ptr[idx];
-
- if (c == '!')
- c = in->ptr[++idx];
- else if (c == ')')
- nest--;
- else if (c == '(')
- nest++;
-
- sb_add_char (acc, c);
- idx++;
- }
- while ((c != ')' || nest)
- && idx < in->len);
- }
else if (in->ptr[idx] == '"' || in->ptr[idx] == '\'')
{
char tchar = in->ptr[idx];
@@ -438,17 +412,15 @@
sb_add_string (out, buf);
}
else if (in->ptr[idx] == '"'
- || in->ptr[idx] == '('
|| (in->ptr[idx] == '<' && (macro_alternate || macro_mri))
|| (macro_alternate && in->ptr[idx] == '\''))
{
- if (macro_alternate && ! macro_strip_at)
+ if (macro_alternate && ! macro_strip_at && in->ptr[idx] != '<')
{
/* Keep the quotes. */
- sb_add_char (out, '\"');
-
+ sb_add_char (out, '"');
idx = getstring (idx, in, out);
- sb_add_char (out, '\"');
+ sb_add_char (out, '"');
}
else
{
@@ -457,27 +429,57 @@
}
else
{
+ char *br_buf = xmalloc(1);
+ char *in_br = br_buf;
+
+ *in_br = '\0';
while (idx < in->len
- && in->ptr[idx] != ' '
- && in->ptr[idx] != '\t'
+ && (*in_br
+ || (in->ptr[idx] != ' '
+ && in->ptr[idx] != '\t'))
&& in->ptr[idx] != ','
&& (in->ptr[idx] != '<'
|| (! macro_alternate && ! macro_mri)))
{
- if (in->ptr[idx] == '"'
- || in->ptr[idx] == '\'')
+ char tchar = in->ptr[idx];
+
+ switch (tchar)
{
- char tchar = in->ptr[idx];
-
+ case '"':
+ case '\'':
sb_add_char (out, in->ptr[idx++]);
while (idx < in->len
&& in->ptr[idx] != tchar)
sb_add_char (out, in->ptr[idx++]);
if (idx == in->len)
return idx;
+ break;
+ case '(':
+ case '[':
+ if (in_br > br_buf)
+ --in_br;
+ else
+ {
+ br_buf = xmalloc(strlen(in_br) + 2);
+ strcpy(br_buf + 1, in_br);
+ free(in_br);
+ in_br = br_buf;
+ }
+ *in_br = tchar;
+ break;
+ case ')':
+ if (*in_br == '(')
+ ++in_br;
+ break;
+ case ']':
+ if (*in_br == '[')
+ ++in_br;
+ break;
}
- sb_add_char (out, in->ptr[idx++]);
+ sb_add_char (out, tchar);
+ ++idx;
}
+ free(br_buf);
}
}
Modified: branches/binutils/package/gas/messages.c
===================================================================
--- branches/binutils/package/gas/messages.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/messages.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -21,28 +21,6 @@
#include "as.h"
-#include <stdio.h>
-#ifdef HAVE_ERRNO_H
-#include <errno.h>
-#endif
-
-#ifdef USE_STDARG
-#include <stdarg.h>
-#endif
-
-#ifdef USE_VARARGS
-#include <varargs.h>
-#endif
-
-#if !defined (USE_STDARG) && !defined (USE_VARARGS)
-/* Roll our own. */
-#define va_alist REST
-#define va_dcl
-typedef int * va_list;
-#define va_start(ARGS) ARGS = &REST
-#define va_end(ARGS)
-#endif
-
static void identify (char *);
static void as_show_where (void);
static void as_warn_internal (char *, unsigned int, char *);
Modified: branches/binutils/package/gas/po/Make-in
===================================================================
--- branches/binutils/package/gas/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright 2003 Free Software Foundation, Inc.
+# Copyright 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -110,6 +110,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -185,7 +186,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Modified: branches/binutils/package/gas/po/POTFILES.in
===================================================================
--- branches/binutils/package/gas/po/POTFILES.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/po/POTFILES.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -120,6 +120,8 @@
config/tc-xstormy16.h
config/tc-xtensa.c
config/tc-xtensa.h
+config/tc-z80.c
+config/tc-z80.h
config/tc-z8k.c
config/tc-z8k.h
depend.c
Modified: branches/binutils/package/gas/symbols.c
===================================================================
--- branches/binutils/package/gas/symbols.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/symbols.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1355,8 +1355,10 @@
sub-expressions used. */
int
-snapshot_symbol (symbolS *symbolP, valueT *valueP, segT *segP, fragS **fragPP)
+snapshot_symbol (symbolS **symbolPP, valueT *valueP, segT *segP, fragS **fragPP)
{
+ symbolS *symbolP = *symbolPP;
+
if (LOCAL_SYMBOL_CHECK (symbolP))
{
struct local_symbol *locsym = (struct local_symbol *) symbolP;
@@ -1385,10 +1387,7 @@
{
case O_constant:
case O_register:
- /* This check wouldn't be needed if pseudo_set() didn't set
- symbols equated to bare symbols to undefined_section. */
- if (symbolP->bsym->section != undefined_section
- || symbolP->sy_value.X_op != O_symbol)
+ if (!symbol_equated_p (symbolP))
break;
/* Fall thru. */
case O_symbol:
@@ -1400,6 +1399,10 @@
}
}
+ /* Never change a defined symbol. */
+ if (symbolP->bsym->section == undefined_section
+ || symbolP->bsym->section == expr_section)
+ *symbolPP = symbolP;
*valueP = expr.X_add_number;
*segP = symbolP->bsym->section;
*fragPP = symbolP->sy_frag;
Modified: branches/binutils/package/gas/symbols.h
===================================================================
--- branches/binutils/package/gas/symbols.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/symbols.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -61,7 +61,7 @@
void symbol_table_insert (symbolS * symbolP);
valueT resolve_symbol_value (symbolS *);
void resolve_local_symbol_values (void);
-int snapshot_symbol (symbolS *, valueT *, segT *, fragS **);
+int snapshot_symbol (symbolS **, valueT *, segT *, fragS **);
void print_symbol_value (symbolS *);
void print_expr (expressionS *);
Modified: branches/binutils/package/gas/testsuite/ChangeLog
===================================================================
--- branches/binutils/package/gas/testsuite/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,2807 +1,300 @@
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- * gas/mt: Renamed from ms1 dir. Update file names as needed.
- * gas/mt/errors.exp: Replace ms1 arch with mt arch.
- * gas/mt/mt.exp: Replace ms1 arch with mt arch.
- * gas/mt/relocs.exp: Replace ms1 arch with mt arch.
+ * gas/arm/blx-local.d: New test.
+ * gas/arm/blx-local.d: New test.
-2005-12-07 Hans-Peter Nilsson <hp at axis.com>
+2006-04-07 Paul Brook <paul at codesourcery.com>
- * gas/cris/rd-bcnst-pic.d, gas/cris/rd-branch-pic.d,
- gas/cris/rd-brokw-pic-1.d, gas/cris/rd-brokw-pic-2.d,
- gas/cris/rd-brokw-pic-3.d, gas/cris/rd-fragtest-pic.d: New tests.
+ * gas/arm/thumb2_pool.d: New test.
+ * gas/arm/thumb2_pool.s: New test.
-2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
+2006-04-05 Richard Sandiford <richard at codesourcery.com>
- PR gas/1874
- * gas/i386/i386.exp: Add x86-64-prescott for 64bit.
+ * gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
+ * gas/sparc/sparc.exp: Run it. Remove sparc*-*-vxworks* XFAILs.
- * gas/i386/prescott.s: Test address size override for monitor.
- * gas/i386/prescott.d: Updated.
+2006-03-23 H.J. Lu <hongjiu.lu at intel.com>
- * gas/i386/x86-64-prescott.d: New file.
- * gas/i386/x86-64-prescott.s: Likewise.
+ * gas/i386/rep.s: Pad with .p2align.
+ * gas/i386/rep.d: Adjust.
-2005-12-06 Hans-Peter Nilsson <hp at axis.com>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
- * gas/cris/rd-pcplus.s, gas/cris/rd-pcplus.d: New test.
-
-2005-11-24 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * gas/macros/purge.l: Increment line numbers.
- * gas/macros/purge.s: Add ".data" line.
-
- Bug gas/1896
- * gas/all/redef2.d: Allow "$DATA$" as well as ".data" in matches.
- * gas/all/weakref1.d: Allow "$CODE$" as well as ".text" in matches.
- * gas/hppa/reloc/reloc.exp: Adjust regexp for new output.
-
-2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
- Thiemo Seufer <ths at networkno.de>
-
- * gas/mips/bge.d, gas/mips/bge.s, gas/mips/bgeu.d, gas/mips/bgeu.s,
- gas/mips/blt.d, gas/mips/blt.s, gas/mips/bltu.d,
- gas/mips/bltu.s: Reactivate external branch tests.
- * gas/mips/branch-misc-2.d, gas/mips/branch-misc-2pic.d,
- gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic-64.d: New
- tests.
- * gas/mips/branch-misc-2.l, gas/mips/branch-misc-2pic.l,
- gas/testsuite/gas/mips/branch-misc-2pic.s: Remove.
- * gas/mips/mips.exp: Adjust branch-misc-2 tests. Add 64-bit
- variants.
-
-2005-11-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * gas/all/quad.d: Add -j "\$DATA\$". Modify regexp to check for
- "$DATA$" as well as ".data".
- * gas/all/sleb128.d: Likewise.
-
-2005-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- Bug gas/1894 Bug gas/1895
- * gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
- * gas/all/redef.d: Add -j "\$DATA\$". Modify regexp to check for
- "$DATA$" as well as ".data".
- * gas/all/redef2.d: Likewise.
-
- Bug gas/1879
- * gas/all/weakref1.d: Check for "$CODE$" as well as ".text".
- * gas/all/weakref1.s: Indent "-ld1 = l".
- * gas/all/weakref1g.d: Remove --no-sort option.
- * gas/all/weakref1l.d: Likewise.
- * gas/all/weakref1u.d: Likewise. Sort expected results.
- * gas/all/weakref1w.d: Likewise.
- * gas/all/weakref2.s: Indent directives.
- * gas/all/weakref3.s: Likewise.
-
-2005-11-17 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/cond.s: Also check ifdef works on equates and
- commons.
- * gas/all/cond.l: Adjust.
- * gas/all/redef2.s: Also test redefining equate to label.
- * gas/all/redef2.d: Adjust.
- * gas/all/redef3.[sd]: New.
- * gas/all/redef4.s: New.
- * gas/all/redef5.s: New.
- * gas/elf/redef.s: New, copied from original gas/all/redef2.s.
- * gas/elf/redef.d: Remove #source.
- * gas/all/gas.exp: Remove exclusion of iq2000-*-* from and
- adjust xfails for redefinition tests. Run new tests. Exclude
- alpha*-*-*, mips*-*-*, *c54x*-*-* from weakref tests.
-
-2005-11-16 Richard Henderson <rth at redhat.com>
-
- * gas/all/weakref1.s: Use "=" instead of ".set" for equivalence.
-
-2005-11-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * gas/arm/unwind.s, gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Add
- a test for saving only the low registers.
-
-2005-11-14 Thiemo Seufer <ths at networkno.de>
-
- * gas/testsuite/gas/mips/mips16e-jrc.d: Tighten file format
- check, relax whitespace checking.
-
-2005-11-14 David Ung <davidu at mips.com>
-
- * gas/mips/mips.exp: Run new save/restore tests.
- * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
- different styles of save/restore instructions.
- * gas/testsuite/gas/mips/mips16e-save.d: New.
-
-2005-11-10 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intelbad.d: Add tests for ill registers in brackets.
- * gas/i386/intelbad.l: Adjust.
-
-2005-11-10 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/archv6t2-bad.s: Add tests of badly composed ldrex and
- strex instructions.
- * gas/arm/archv6t2-bad.l: Add expected error messages.
- * gas/arm/r15-bad.l: Adjust error messages for r15 usage in ldrex
- and strex instructions.
-
-2005-11-08 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * gas/all/cofftag.s: Convert numbers in .type
- directives to decimal.
- * gas/all/gas.exp: enable cofftag-test for z80-*-coff.
-
-2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
-
- Add ms2.
- * gas/ms1/allinsn.d: Adjust pcrel disassembly.
- * gas/ms1/errors.exp: Fix target triplet.
- * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
- * gas/ms1/ms1-16-003.s: Tweak label.
- * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
- * gas/ms1/ms2.d, gas/ms1/ms2.s: New.
- * gas/ms1/relocs.d: Adjust expected machine name and pcrel
- disassembly.
- * gas/ms1/relocs.exp: Adjust target triplet.
-
-2005-11-07 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/redef2.[sd]: New.
- * gas/all/gas.exp: Run new test.
- * gas/elf/redef.d: New.
- * gas/elf/elf.exp: Run new test.
-
-2005-11-07 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/divide.s: Test line comment starting with '/'.
- * gas/i386/divide.d: Pass --divide to gas.
- * gas/i386/intelok.d: Likewise.
- * gas/i386/i386.exp (divide): Run for all targets.
-
-2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * gas/z80/z80.exp: Added "suffix" test.
- * gas/z80/suffix.s: New file.
- * gas/z80/suffix.d: New file.
-
-2005-11-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/padlock.d: Support 64bit BFD.
-
-2005-11-04 Alexandre Oliva <aoliva at redhat.com>
-
- * gas/all/gas.exp: Remove weakref xfail. Run weakref4.s.
- * gas/all/weakref1.s: Move redefinition bits to...
- * gas/all/weakref4.s: ... new file.
- * gas/all/weakref1.d: Remove command moved to weakref1u. Adjust
- remaining command for leading tabs. Regenerate.
- * gas/all/weakref1l.d: Regenerate.
- * gas/all/weakref1u.d: Likewise.
- * gas/all/wealref1w.d: Likewise.
-
-2005-11-04 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/gas.exp: xfail weakref dump tests for all targets.
-
-2005-10-29 Hans-Peter Nilsson <hp at axis.com>
-
- PR gas/1630
- * gas/all/gas.exp <weakref1, weakref1g, weakref1l, weakref1u,
- weakref1w>: Xfail for cris-*-* and mmix-*-*.
-
-2005-10-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/equ.d: Fix typo.
- * gas/i386/equ.s: Don't globalize r.
-
-2005-10-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/gas.exp: Don't xfail equiv1 test anymore.
-
-2005-10-26 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/archv6.d: Adjust expected output.
-
-2005-10-26 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intel.s: Replace register used in offset expression.
- * gas/i386/intel.e: Adjust.
- * gas/i386/intelbad.l: Adjust.
- * gas/i386/equ.[sed]: New.
- * gas/i386/i386.exp: Run new test.
-
-2005-10-26 Hans-Peter Nilsson <hp at bitrange.com>
-
- * gas/z80/z80.exp: Fix misplaced-open-brace typo.
-
-2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * gas/all/gas.exp: Exclude Z80-*-* from floating point, string,
- and cofftag test.
- * gas/macros/macros.exp: Expect z80-*-* to fail the strings test
- because it has no string escapes.
- * gas/z80/quotes.d: New file
- * gas/z80/quotes.d: New file
- * gas/z80/quotes.s: New file
- * gas/z80/redef.d: New file
- * gas/z80/redef.s: New file
- * gas/z80/z80.exp: New file
+ * gas/mips/vxworks1.s, gas/mips/vxworks1.d,
+ * gas/mips/vxworks1-xgot.d: New tests.
+ * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
-2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
+2006-03-21 Paul Brook <paul at codesourcery.com>
- * gas/bfin/flow2.d: Match changed assembler behaviour.
- * gas/bfin/reloc.d: Likewise.
+ * gas/arm/thumb32.d: Correct expected output.
-2005-10-24 Alexandre Oliva <aoliva at redhat.com>
+2006-03-20 Paul Brook <paul at codesourcery.com>
- * gas/all/weakref1.s, gas/all/weakref1.d: New test.
- * gas/all/weakref1g.d, gas/all/weakref1l.d: New tests.
- * gas/all/weakref1u.d, gas/all/weakref1w.d: New tests.
- * gas/all/weakref2.s, gas/all/weakref3.s: New tests.
- * gas/all/gas.exp: Run new tests.
+ * gas/arm/thumb2_bcond.d: New test.
+ * gas/arm/thumb2_bcond.s: New test.
+ * gas/arm/thumb2_it_bad.d: New test.
+ * gas/arm/thumb2_it_bad.l: New test.
+ * gas/arm/thumb2_it_bad.s: New test.
-2005-10-24 Jan Beulich <jbeulich at novell.com>
+2006-03-17 Paul Brook <paul at codesourcery.com>
- * gas/ia64/index.[sl]: New.
- * gas/ia64/rotX.[sl]: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-10-24 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/regs.pl: Also check tp alias of r13.
- * gas/ia64/regs.s: Regenerate.
- * gas/ia64/regs.d: Adjust.
-
-2005-10-19 David Ung <davidu at mips.com>
-
- * gas/mips/mips.exp: Run new test.
- * gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
- jalr/jr to the compact jalrc/jrc instructions.
- * gas/testsuite/gas/mips/mips16e-jrc.d: New.
-
-2005-10-19 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * gas/s390/zarch-z9-109.s: Add tests for unnormalized hfp multiply
- and multiply-and-add instructions.
- * gas/s390/zarch-z9-109.d: Update expected result.
-
-2005-10-17 Richard Earnshaw <richard.earnshaw at arm.com>
-
- * gas/arm/copro.d: 'mcrlt' instruction should not be disassembled as
- 'cfsh64lt'.
-
-2005-10-12 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * gas/hppa/basic/basic.exp (do_system): Adjust for removal of lha
- instructions from system.s.
- * gas/hppa/basic/system.s (lha): Remove.
-
-2005-10-12 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/forward.[sd]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-10-11 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/cond.s: Add test for resolution of fully resolvable
- forward references in .if/.endif.
- * gas/all/cond.d: Rename to:
- * gas/all/cond.l: New.
- * gas/all/assign-bad.s: New.
- * gas/all/assign-ok.s: New.
- * gas/all/equ-bad.s: New.
- * gas/all/equ-ok.s: New.
- * gas/all/equiv1.s: New.
- * gas/all/equiv2.s: New.
- * gas/all/eqv-bad.s: New.
- * gas/all/eqv-ok.s: New.
- * gas/all/eval.[sd]: New.
- * gas/all/forward.[sd]: New.
- * gas/all/redef.[sd]: New.
- * gas/all/gas.exp: Run new tests, but xfail equiv1 (PR/1387).
-
-2005-10-10 Nick Clifton <nickc at redhat.com>
-
- * gas/sh/reg-prefix.s: Use mov.l instruction in preference to
- movli.l.
- * gas/sh/reg-prefix.d: Force little endian assembly.
-
-2005-10-08 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/eabi_attr_1.s: New test.
- * gas/arm/eabi_attr_1.d: New test.
- * gas/arm/arm7t.d: Only disassemble code sections.
- * gas/arm/bignum1.d: Ignore Arm object attribute sections.
- * gas/arm/mapping.d: Ditto.
- * gas/arm/unwind.d: Ditto.
- * gas/elf/section0.d: Ditto.
- * gas/elf/section1.d: Ditto.
- * gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
- * gas/elf/section2.e-armeabi: New file.
-
-2005-10-06 Khem Raj <kraj at mvista.com>
- NIIBE Yutaka <gniibe at m17n.org>
-
- * gas/sh/basic.exp: Run reg-prefix test.
- * gas/sh/reg-prefix.s: New
- * gas/sh/reg-prefix.d: New
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * gas/bfin: New testsuite for bfin.
- * gas/all/gas.exp (bfin-*-*): Expected failure for alternate
- macro syntax.
-
-2005-09-30 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/fpa-mem.s: Remove incorrect comments.
- * gas/arm/fpa-mem.d: Update expected results.
-
-2005-09-29 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/alloc.[sl]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
- gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
- * gas/i386/i386.exp: Run new tests.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/mixed-mode-reloc.s: Enable all insns.
- * gas/i386/mixed-mode-reloc32.d: Adjust.
- * gas/i386/mixed-mode-reloc64.d: Adjust.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/reloc64.s: Also test .slong.
- * gas/i386/reloc64.l: Adjust.
- * gas/i386/reloc64.d: Adjust.
-
-2005-09-21 Alan Modra <amodra at bigpond.net.au>
-
- * gas/lns/lns.exp (lns-common-1): Don't run on targets without
- a bare nop insn.
-
-2005-09-20 Richard Henderson <rth at redhat.com>
-
- * gas/cris/rd-dw2-1.d, gas/cris/rd-dw2-10.d, gas/cris/rd-dw2-11.d,
- gas/cris/rd-dw2-12.d, gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d,
- gas/cris/rd-dw2-15.d, gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d,
- gas/cris/rd-dw2-4.d, gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d,
- gas/cris/rd-dw2-7.d, gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d,
- gas/mips/mips16-dwarf2-n32.d, gas/mips/mips16-dwarf2.d: Add 0x
- prefix in "Advance PC" lines.
-
-2005-09-08 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/arch6zk.d: Rename smi to smc.
- * gas/arm/arch6zk.s: Ditto.
- * gas/arm/thumb32.d: Ditto.
+ * gas/arm/thumb32.d: Add ldm and stm tests.
* gas/arm/thumb32.s: Ditto.
-2005-09-07 Richard Henderson <rth at redhat.com>
+2006-03-16 Bernd Schmidt <bernd.schmidt at analog.com>
- * gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
- * gas/lns/lns-common-1.s: Update for syntax change.
- * gas/lns/lns-diag-1.[sl]: Likewise.
+ * gas/bfin/shift2.s: Add new tests.
+ * gas/bfin/shift.d: Match changed disassembler behaviour.
+ * gas/bfin/parallel2.d: Likewise.
+ * gas/bfin/shift2.d: Likewise; also match new tests.
-2005-09-07 Richard Henderson <rth at redhat.com>
+2006-03-16 Paul Brook <paul at codesourcery.com>
- * gas/mips/mips16-dwarf2.d: Don't match anything but address and line
- number increments. Adjust relocation address.
- * gas/mips/mips16-dwarf2-n32.d: Likewise. Add "N32" to test name.
+ * gas/arm/svc.d: New test.
+ * gas/arm/svc.s: New test.
+ * gas/arm/inst.d: Accept svc mnemonic.
+ * gas/arm/thumb.d: Ditto.
+ * gas/arm/wince_inst.d: Ditto.
-2005-09-07 Richard Henderson <rth at redhat.com>
+2006-03-09 Paul Brook <paul at codesourcery.com>
- * gas/cris/rd-dw2-1.d: Don't match anything but address and line
- number increments.
- * gas/cris/rd-dw2-10.d, gas/cris/rd-dw2-11.d, gas/cris/rd-dw2-12.d,
- gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d, gas/cris/rd-dw2-15.d,
- gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d, gas/cris/rd-dw2-4.d,
- gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d, gas/cris/rd-dw2-7.d,
- gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d: Likewise.
+ * gas/arm/nomapping.d: New test.
+ * gas/arm/nomapping.s: New test.
-2005-09-07 Richard Henderson <rth at redhat.com>
+2006-03-07 H.J. Lu <hongjiu.lu at intel.com>
- * gas/lns/lns.exp: New file.
- * gas/lns/lns-common-1.[sd]: New test.
- * gas/lns/lns-diag-1.[sl]: New test.
+ PR binutils/2428
+ * gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
+ x86-64-rep-suffix.
-2005-09-06 Chao-ying Fu <fu at mips.com>
+ * gas/i386/naked.d: Replace repz with rep.
+ * gas/i386/x86_64.d: Likewise.
- * gas/mips/mips.exp: Run MT test for mips32r2 only.
- * gas/mips/mips32-mt.[sdl]: New test.
+ * gas/i386/rep-suffix.d: New file.
+ * gas/i386/rep-suffix.s: Likewise.
+ * gas/i386/rep.d: Likewise.
+ * gas/i386/rep.s: Likewise.
+ * gas/i386/x86-64-rep-suffix.d: Likewise.
+ * gas/i386/x86-64-rep-suffix.s: Likewise.
+ * gas/i386/x86-64-rep.d: Likewise.
+ * gas/i386/x86-64-rep.s: Likewise.
-2005-09-06 Paul Brook <paul at codesourcery.com>
+2006-03-07 Richard Sandiford <richard at codesourcery.com>
- * gas/arm/thumb2_relax.d: New test.
- * gas/arm/thumb2_relax.s: New test.
- * gas/arm/thumb32.d: Adjust expected results to include relaxation.
- * gas/arm/thumb32.s: Tweak for better coverage of relaxable
- instructions. Remove load/store tests.
+ * gas/arm/abs12.s, gas/arm/abs12.d: New test.
+ * gas/arm/pic.d: Skip for *-*-vxworks*...
+ * gas/arm/pic_vxworks.d: ...use this version instead.
+ * gas/arm/unwind_vxworks.d: Fix expected output.
-2005-09-02 Paul Brook <paul at codesourcery.com>
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
- * gas/arm/arm3-bad.s: New test.
- * gas/arm/arm3-bad.d: New test.
- * gas/arm/arm3.s: Avoid illegal instructions.
- * gas/arm/arm3.d: Ditto.
+ * gas/m68k/arch-cpu-1.s: Tweak.
+ * gas/m68k/arch-cpu-1.d: Tweak.
-2005-09-02 Paul Brook <paul at codesourcery.com>
+2006-02-28 Jan Beulich <jbeulich at novell.com>
- * gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
- gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
- gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
+ * gas/all/altmacro.s: Adjust.
+ * gas/all/altmac2.s: Adjust.
-2005-09-02 Paul Brook <paul at codesourcery.com>
+2006-02-28 Jan Beulich <jbeulich at novell.com>
- * gas/arm/fpa-mem.d: Test "stfpls".
- * gas/arm/fpa-mem.s: Ditto.
-
-2005-09-01 Hans-Peter Nilsson <hp at axis.com>
-
- * gas/cris: Adjust all files for testing target
- cris-axis-linux-gnu.
-
-2005-08-30 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
- * gas/arm/thumb32.d: Ditto.
-
-2005-08-26 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intel.s: Adjust.
- * gas/i386/intelok.s: Add two more insns.
- * gas/i386/intelok.d: Adjust.
-
-2005-08-26 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intelok.d: Adjust.
-
-2005-08-25 Chao-ying Fu <fu at mips.com>
-
- * gas/mips/mips.exp: Run DSP test.
- * gas/mips/mips32-dsp.[sdl]: New test.
-
-2005-08-22 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
- gas/i386/mixed-mode-reloc64.d: New.
- * gas/i386/i386.exp: Run new tests.
-
-2005-08-15 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb2_it.s: Add more instruction variants.
- * gas/arm/thumb2_it.d: Ditto.
-
-2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * gas/testsuite/gas/s390/s390.exp: Reorganize gas testsuite for s390
- and add tests for new cpu type z9-109.
- * gas/testsuite/gas/s390/esa-g5.d: New.
- * gas/testsuite/gas/s390/esa-g5.s: New.
- * gas/testsuite/gas/s390/esa-operands.d: New.
- * gas/testsuite/gas/s390/esa-operands.s: New.
- * gas/testsuite/gas/s390/esa-reloc.d: New.
- * gas/testsuite/gas/s390/esa-reloc.s: New.
- * gas/testsuite/gas/s390/esa-z9-109.d: New.
- * gas/testsuite/gas/s390/esa-z9-109.s: New.
- * gas/testsuite/gas/s390/esa-z900.d: New.
- * gas/testsuite/gas/s390/esa-z900.s: New.
- * gas/testsuite/gas/s390/esa-z990.d: New.
- * gas/testsuite/gas/s390/esa-z990.s: New.
- * gas/testsuite/gas/s390/zarch-operands.d: New.
- * gas/testsuite/gas/s390/zarch-operands.s: New.
- * gas/testsuite/gas/s390/zarch-reloc.d: New.
- * gas/testsuite/gas/s390/zarch-reloc.s: New.
- * gas/testsuite/gas/s390/zarch-z9-109.d: New.
- * gas/testsuite/gas/s390/zarch-z9-109.s: New.
- * gas/testsuite/gas/s390/zarch-z900.d: New.
- * gas/testsuite/gas/s390/zarch-z900.s: New.
- * gas/testsuite/gas/s390/zarch-z990.d: New.
- * gas/testsuite/gas/s390/zarch-z990.s: New.
- * gas/testsuite/gas/s390/opcode.d: Delete.
- * gas/testsuite/gas/s390/opcode.s: Delete.
- * gas/testsuite/gas/s390/opcode64.d: Delete.
- * gas/testsuite/gas/s390/opcode64.s: Delete.
- * gas/testsuite/gas/s390/operands.d: Delete.
- * gas/testsuite/gas/s390/operands.s: Delete.
- * gas/testsuite/gas/s390/operands64.d: Delete.
- * gas/testsuite/gas/s390/operands64.s: Delete.
- * gas/testsuite/gas/s390/reloc.d: Likewise.
- * gas/testsuite/gas/s390/reloc.s: Likewise.
- * gas/testsuite/gas/s390/reloc64.d: Likewise.
- * gas/testsuite/gas/s390/reloc64.s: Likewise.
-
-2005-08-11 Alan Modra <amodra at bigpond.net.au>
-
- * gas/all/gas.exp: Remove a29k and m88k support.
- * gas/m88k/allinsn.d: Delete.
- * gas/m88k/allinsn.s: Delete.
- * gas/m88k/init.d: Delete.
- * gas/m88k/init.s: Delete.
- * gas/m88k/m88k.exp: Delete.
- * gas/tic80/add.d: Delete.
- * gas/tic80/add.lst: Delete.
- * gas/tic80/add.s: Delete.
- * gas/tic80/align.d: Delete.
- * gas/tic80/align.lst: Delete.
- * gas/tic80/align.s: Delete.
- * gas/tic80/bitnum.d: Delete.
- * gas/tic80/bitnum.lst: Delete.
- * gas/tic80/bitnum.s: Delete.
- * gas/tic80/ccode.d: Delete.
- * gas/tic80/ccode.lst: Delete.
- * gas/tic80/ccode.s: Delete.
- * gas/tic80/cregops.d: Delete.
- * gas/tic80/cregops.lst: Delete.
- * gas/tic80/cregops.s: Delete.
- * gas/tic80/endmask.d: Delete.
- * gas/tic80/endmask.lst: Delete.
- * gas/tic80/endmask.s: Delete.
- * gas/tic80/float.d: Delete.
- * gas/tic80/float.lst: Delete.
- * gas/tic80/float.s: Delete.
- * gas/tic80/regops.d: Delete.
- * gas/tic80/regops.lst: Delete.
- * gas/tic80/regops.s: Delete.
- * gas/tic80/regops2.d: Delete.
- * gas/tic80/regops2.lst: Delete.
- * gas/tic80/regops2.s: Delete.
- * gas/tic80/regops3.d: Delete.
- * gas/tic80/regops3.lst: Delete.
- * gas/tic80/regops3.s: Delete.
- * gas/tic80/regops4.d: Delete.
- * gas/tic80/regops4.lst: Delete.
- * gas/tic80/regops4.s: Delete.
- * gas/tic80/relocs1.c: Delete.
- * gas/tic80/relocs1.d: Delete.
- * gas/tic80/relocs1.lst: Delete.
- * gas/tic80/relocs1.s: Delete.
- * gas/tic80/relocs1b.d: Delete.
- * gas/tic80/relocs2.c: Delete.
- * gas/tic80/relocs2.d: Delete.
- * gas/tic80/relocs2.lst: Delete.
- * gas/tic80/relocs2.s: Delete.
- * gas/tic80/relocs2b.d: Delete.
- * gas/tic80/tic80.exp: Delete.
-
-2005-08-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * gas/hppa/reloc/reloc.exp (do_function_reloc_bug): Add "L%" to regexp.
-
-2005-08-05 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb32.s: Use correct conditional suffixes inside IT
- blocks.
- * gas/arm/thumb2_it.d, gas/arm/thumb2_it.s: New test.
-
-2005-08-05 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb32.d: Update ldm/stm dests.
- * gas/arm/thumb32.s: Ditto.
-
-2005-08-03 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/iwmmxt-bad2.s: New file: Check for error messages about
- erroneous offsets in iwmmxt instructions. Cannot be part of
- iwmmxt-bad.s because the errors there stop the assembler before it
- gets to check the offsets in instructions.
- * gas/arm/iwmmxt-bad2.d: New file.
- * gas/arm/iwmmxt-bad2.l: New file: Expected error messages.
-
-2005-08-02 Khem Raj <kraj at mvista.com>
-
- * gas/arm/iwmmxt.s: Change the offset values of the WLDRD, WSTRD
- and WSTRW instructions to be larger than +/-255.
- * gas/arm/iwmmxt.d: Fix the expected results for these
- instructions.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb32.d: Fix expected output for writeback addressing
- modes. Add single high reg push/pop test.
- * gas/asm/thumb32.s: Add single high reg push/pop test.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
- * gas/arm/thumb32.d: Ditto.
-
-2005-07-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/unwind-bad.l: Uncomment patterns matching new warnings.
- * gas/ia64/unwind-ok.d: Correct expectations.
-
-2005-07-26 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/immed32.[sd]: New.
- * gas/i386/immed64.[sd]: New.
- * gas/i386/i386.exp: Run new tests.
-
-2005-07-21 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/thumb32.s: Add tests for [pc, #imm] addressing modes.
- * gas/arm/thumb32.d: Ditto.
-
-2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * gas/m32r/rel32.exp: New file.
- * gas/m32r/rel32.s: New file.
- * gas/m32r/rel32.d: New file.
- * gas/m32r/rel32-pic.s: New file.
- * gas/m32r/rel32-pic.d: New file.
- * gas/m32r/rel32-err.s: New file.
- * gas/m32r/error.exp: Added rel32-err.
-
-2005-07-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/i386.exp: Add suffix.
-
- * gas/i386/suffix.d: New file.
- * gas/i386/suffix.s: Likewise.
-
-2005-07-18 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
-
- * gas/hppa/basic/fp_comp.s: Add level 1.1 directive.
- * gas/hppa/basic/special.s, gas/hppa/basic/system.s: Likewise.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/reloc32.[sdl]: New.
- * gas/i386/reloc64.[sdl]: New.
- * gas/i386/i386.exp: Run new tests.
-
-2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/i386.exp: Add vmx and x86-64-vmx.
-
- * gas/i386/vmx.d: New file.
- * gas/i386/vmx.s: Likewise.
- * gas/i386/x86-64-vmx.d: Likewise.
- * gas/i386/x86-64-vmx.s: Likewise.
-
-2005-07-14 Nick Clifton <nickc at redhat.com>
-
- PR 1063
- * gas/crx/gas-segfault.d: New file.
- * gas/crx/gas-segfault.s: New file.
-
-2005-07-12 Hans-Peter Nilsson <hp at bitrange.com>
-
- * gas/mmix/relax1-n.d, gas/mmix/relax1-rn.d: Avoid "# FIXME: "
- first on a line, adjusting for testsuite framework change.
-
-2005-07-10 H.J. Lu <hongjiu.lu at intel.com>
-
- * i386/x86_64.s: Add absolute siged 32bit addressing tests for
- mov.
- * i386/x86_64.d: Updated.
-
-2005-07-08 Hans-Peter Nilsson <hp at axis.com>
-
- PR gas/1049
- * gas/cris/rd-pic-2.d, gas/cris/rd-pic-2.s: New test.
- * gas/cris/rd-abs32-1.d: Tweak for not emitting reloc-related
- garbage for global symbols.
-
-2005-07-07 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/vfp1xD.d: Adjust expected fadds disassemblies now that
- the dissassembler has been fixed.
-
-2005-05-07 Paul Brook <paul at codesourcery.com>
-
- * gas/ppc/altivec.d: Match all powerpc target vecs.
- * gas/ppc/booke.d: Ditto.
- * gas/ppc/e500.d: Ditto.
-
-2005-07-05 Aldy Hernandez <aldyh at redhat.com>
-
- * gas/ms1: New directory.
- * gas/ms1/allinsn.d: New.
- * gas/ms1/allinsn.s: New.
- * gas/ms1/badinsn.s: New.
- * gas/ms1/badinsn1.s: New.
- * gas/ms1/badoffsethigh.s: New.
- * gas/ms1/badoffsetlow.s: New.
- * gas/ms1/badorder.s: New.
- * gas/ms1/badreg.s: New.
- * gas/ms1/badsignedimmhigh.s: New.
- * gas/ms1/badsignedimmlow.s: New.
- * gas/ms1/badsyntax.s: New.
- * gas/ms1/badsyntax1.s: New.
- * gas/ms1/badunsignedimmhigh.s: New.
- * gas/ms1/badunsignedimmlow.s: New.
- * gas/ms1/errors.exp: New.
- * gas/ms1/ldst.s: New.
- * gas/ms1/misc.d: New.
- * gas/ms1/misc.s: New.
- * gas/ms1/ms1-16-003.d: New.
- * gas/ms1/ms1-16-003.s: New.
- * gas/ms1/ms1.exp: New.
- * gas/ms1/msys.d: New.
- * gas/ms1/msys.s: New.
- * gas/ms1/relocs.d: New.
- * gas/ms1/relocs.exp: New.
- * testsuite/gas/ms1/relocs1.s: New.
- * testsuite/gas/ms1/relocs2.s: New.
-
-2005-07-05 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/svme.d: New.
- * gas/i386/svme.s: New.
- * gas/i386/svme64.d: New.
- * gas/i386/i386.exp: Run new tests.
-
-2005-07-04 Zack Weinberg <zack at codesourcery.com>
-
- * lib/gas-defs.exp (run_dump_tests): New proc.
- (run_dump_test): Add support for new options: target, not-target,
- skip, not-skip, error-output. Document stderr. Tidy a
- little.
- (slurp_options): If a line doesn't match the option regexp, but
- does begin with #, ignore it; don't stop parsing options.
- * gas/arm/arm.exp: Remove most code. Use run_dump_tests.
-
- * gas/arm/archv6t2-bad.d, gas/arm/armv1.d, gas/arm/iwmmxt-bad.d
- * gas/arm/r15-bad.d, gas/arm/req.d, gas/arm/t16-bad.d
- * gas/arm/undefined.d, gas/arm/undefined_coff.d, gas/arm/vfp-bad.d:
- New files.
- * gas/arm/bignum1.d, gas/arm/mapping.d, gas/arm/pic.d:
- Only run on ELF targets.
- * gas/arm/tls.d, gas/arm/unwind.d: Only run on ELF targets.
- Skip on VxWorks.
- * gas/arm/tls_vxworks.d, gas/arm/unwind_vxworks.d: New files.
- * gas/arm/thumb.d, gas/arm/thumb32.d: Don't run on aout or pe.
- * gas/arm/le-fpconst.d: Only run on *-*-pe.
- * gas/arm/inst.d: Skip on WinCE.
- * gas/arm/wince_inst.d: Skip unless WinCE.
- * gas/arm/el_segundo.d: Mark up for actual use; adjust
- expectations.
- * gas/arm/el_segundo.s: Remove irrelevant junk. Add padding
- for a.out's sake.
-
-2005-07-01 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/group-2.s: Use register as second operand of .prologue.
- * gas/ia64/unwind-err.s: Add check for .vframesp.
- * gas/ia64/unwind-err.l: Adjust.
- * gas/ia64/strange.[sd]: New.
- * gas/ia64/unwind-bad.[sl]: New.
- * gas/ia64/unwind-ok.[sd]: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-06-30 Zack Weinberg <zack at codesourcery.com>
-
- * gas/arm/arm.exp: Don't special case ldconst, arm7t, or copro
- for *-wince-*.
- * gas/arm/wince_arm7t.d, gas/arm/wince_copro.d
- * gas/arm/wince_ldconst.d: Delete.
-
-2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 1013
- * i386/x86_64.s: Add absolute 64bit addressing tests for mov.
- * i386/x86_64.d: Updated.
-
-2005-06-17 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
- relocation. Add insns for all widths of non-pc-relative relocations.
- * gas/i386/x86-64-pcrel.d: Adjust.
-
-2005-06-13 Zack Weinberg <zack at codesourcery.com>
-
- * gas/arm/thumb.s: Only branch to labels defined in this file.
- * gas/arm/thumb.d, gas/arm/thumb32.d: Adjust expected output.
-
-2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/ldstla-32-1.l: Update to handle leading zeroes.
- * gas/mips/ldstla-32-mips3-1.l: Likewise.
-
-2005-05-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/proc.l: Adjust.
-
-2005-05-25 Steve Ellcey <sje at cup.hp.com>
-
- * gas/ia64/global.d: Change --sym to --syms.
-
-2005-05-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/group-1.d: Updated.
- * gas/ia64/group-2.d: Likewise.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/radix.s: New.
- * gas/ia64/radix.l: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intelok.d: Account for 32-bit displacements being shown
- in hex.
-
-2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/elf/group0b.d: Updated.
- * gas/elf/group1b.d: Likewise.
-
-2005-05-19 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/reloc-uw.s: New.
- * gas/ia64/reloc-uw.d: New.
- * gas/ia64/reloc-uw-ilp32.d: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-05-18 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/altmacro.s: Parenthesize operand of %.
-
-2005-05-17 Zack Weinberg <zack at codesourcery.com>
-
- * gas/arm/arm.exp: Convert all existing "gas_test" tests to
- "run_dump_test" tests. Run more tests unconditionally. Run new tests.
- * gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
- * gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
- * gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
- Adjust to work as a dump test.
- * gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
- * gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
- * gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
- New files.
-
- * gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
- diagnostics that don't happen in the first pass anymore.
-
- * gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
- * gas/arm/vfp-bad.l:
- Update expected diagnostics.
- * gas/arm/pic.d: Update expected reloc name.
- * gas/arm/thumbv6.d: CPY no longer appears in disassembly.
- * gas/arm/r15-bad.s: Avoid two-argument mul.
- * gas/arm/req.s: Adjust comments.
- * gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
- use of PC.
-
- * gas/arm/macro-1.d, gas/arm/macro1.s
- * gas/arm/t16-bad.l, gas/arm/t16-bad.s
- * gas/arm/tcompat.d, gas/arm/tcompat.s
- * gas/arm/tcompat2.d, gas/arm/tcompat2.s
- * gas/arm/thumb32.d, gas/arm/thumb32.s
- New test pair.
-
-2005-05-17 Jan Beulich <jbeulich at novell.com>
-
- * gas/mmix/err-byte1.s: Adjust expected error text on line 10.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- * gas/v850/split-lo16.s: Add test for a lo() pseudo reloc
- corrupting an ld.w instruction.
- * gas/v850/split-lo16.d: Add expected, correct (ie not corrupt)
- output.
-
-2005-05-10 Michael Matz <matz at suse.de>
-
- * gas/hppa/parse/block1.s: Use official limit (0x3fffffff) for
- .block.
-
-2005-05-10 Hans-Peter Nilsson <hp at bitrange.com>
-
- * gas/mmix/relax2.s: Drop ":" off label definitions.
-
-2005-05-09 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/tlsd.[sd]: Adjust to not assume zero displacement will
- actually be present in memory addressing.
- * gas/i386/tlspic.[sd]: Likewise.
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 940
- * gas/ia64/group-2.d: New.
- * gas/ia64/group-2.s: New.
-
- * gas/ia64/ia64.exp: Add "group-2".
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 843
- * gas/i386/i386.exp: Add x86-64-branch.
-
- * gas/i386/x86-64-branch.d: New.
- * gas/i386/x86-64-branch.s: New.
-
-2005-05-06 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/badarg.s: Add check for bad qualifier specification.
- * gas/macros/badarg.l: Adjust.
- * gas/macros/vararg.[sd]: New.
+ * gas/macros/paren[sd]: New.
* gas/macros/macros.exp: Run new test.
-2005-05-06 Jan Beulich <jbeulich at novell.com>
+2006-02-27 H.J. Lu <hongjiu.lu at intel.com>
- * gas/all/cond.s: Also test .ifb/.ifnb.
- * gas/all/cond.d: Adjust.
+ * gas/i386/i386.exp: Add merom and x86-64-merom.
-2005-05-06 Jan Beulich <jbeulich at novell.com>
+ * gas/i386/merom.d: New file.
+ * gas/i386/merom.s: Likewise.
+ * gas/i386/x86-64-merom.d: Likewise.
+ * gas/i386/x86-64-merom.s: Likewise.
- * gas/macros/dot.s: Don't use pseudo-ops in first column.
- * gas/macros/dot.l: Match broader range of possible outputs.
- * gas/macros/purge.l: Likewise.
- * gas/macros/purge.s: Start generated macro names with an underscore.
+2006-02-24 David S. Miller <davem at sunset.davemloft.net>
-2005-05-05 Paul Brook <paul at codesourcery.com>
+ * gas/sparc/rdhpr.s: New test.
+ * gas/sparc/rdhpr.d: New test.
+ * gas/sparc/wrhpr.s: New test.
+ * gas/sparc/wrhpr.d: New test.
+ * gas/sparc/window.s: New test.
+ * gas/sparc/window.d: New test.
+ * gas/sparc/rdpr.s: Add case for reading %gl register.
+ * gas/sparc/rdpr.d: Likewise.
+ * gas/sparc/wrpr.s: Add case for writing %gl register.
+ * gas/sparc/wrpr.d: Likewise.
+ * gas/sparc/sparc.exp: Update for new tests.
+
+2006-02-24 Paul Brook <paul at codesourcery.com>
- * gas/i386/i386.exp: Don't run divide test on vxworks.
+ * gas/arm/thumb32.d: Fix expected msr and mrs output.
+ * gas/arm/arch7.d: New test.
+ * gas/arm/arch7.s: New test.
+ * gas/arm/arch7m-bad.l: New test.
+ * gas/arm/arch7m-bad.d: New test.
+ * gas/arm/arch7m-bad.s: New test.
-2005-05-05 Nick Clifton <nickc at redhat.com>
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- gas/all/itbl-test.c, gas/all/test-example.c, gas/all/test-gen.c,
- gas/arm/maverick.c, gas/cris/cris.exp, gas/hppa/basic/basic.exp,
- gas/hppa/parse/parse.exp, gas/hppa/reloc/reloc.exp,
- gas/hppa/unsorted/unsorted.exp, gas/m88k/m88k.exp,
- gas/mmix/mmix-err.exp, gas/mmix/mmix-list.exp, gas/mmix/mmix.exp,
- gas/mn10200/basic.exp, gas/mn10300/am33-2.c,
- gas/mn10300/basic.exp, gas/pdp11/opcode.s, gas/ppc/aix.exp,
- gas/sh/basic.exp, gas/sh/err.exp, gas/sh/arch/arch.exp,
- gas/sh/sh64/sh64.exp, gas/v850/basic.exp, lib/gas-defs.exp
-
-2005-05-05 Mike Frysinger <vapier at gentoo.org>
-
- * gas/sh/basic.exp: Replace linux-gnu with linux-* to allow for
- versions of Linux which do not use glibc.
- * gas/vax/vax.exp: Likewise.
-
-2005-05-05 Paul Brook <paul at codesourcery.com>
-
- * lib/gas-defs.exp (regexp_diff): Pass test if last line is "#...".
-
-2005-04-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/all/assign.s: Make `x' and `y' global.
-
-2005-04-25 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/badarg.s: Add tests for collisions between/among macro
- parameters and local symbols.
- * gas/macros/badarg.l: Adjust.
-
-2005-04-20 Jan Beulich <jbeulich at novell.com>
-
- * gas/elf/struct.s: Adjust to not get into alignment issues.
- * gas/elf/struct.d: Adjust for the above and the test's name.
-
-2005-04-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/padlock.d: Updated.
-
-2005-04-19 Andreas Schwab <schwab at suse.de>
-
- * gas/ia64/invalid-ar.l: Adapt to changed error message.
-
-2005-04-18 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/purge.[ls]: New.
- * gas/macros/macros.exp: Run new test.
-
-2005-04-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/elf/struct.[sd]: New.
- * gas/elf/elf.exp: Run new test.
-
-2005-04-15 Alan Modra <amodra at bigpond.net.au>
-
- * gas/all/assign.s: New.
- * gas/all/assign.d: New.
- * gas/all/gas.exp: Run it.
-
-2005-04-13 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/ldstla-32.s: Exclude offsets that are now meant to fail
- and include more instructions/offsets that are meant to succeed.
- Use $4 instead $3 to avoid register dependencies.
- * gas/mips/ldstla-32.d: Update accordingly.
- * gas/mips/ldstla-32-shared.d: Likewise.
- * gas/mips/ldstla-32-mips3.d: New test based on the above, except
- for mips3.
- * gas/mips/ldstla-32-mips3-shared.d: Similarly, for PIC.
- * gas/mips/ldstla-32-mips3.s: Source for the new tests.
- * gas/mips/ldstla-32-1.s: New test for offsets that are meant to
- fail.
- * gas/mips/ldstla-32-mips3-1.s: Likewise, for mips3.
- * gas/mips/ldstla-32-1.l: Stderr output for the new test.
- * gas/mips/ldstla-32-mips3-1.l: Likewise.
- * gas/mips/mips.exp: Run the new tests.
-
-2005-04-11 Mark Kettenis <kettenis at gnu.org>
-
- * gas/all/gas.exp: Don't run fastcall labels test on
- i*86-*-openbsd*.
-
-2005-04-11 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/dot.[ls]: New.
- * gas/macros/macros.exp: Run new test.
-
-2005-04-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/x86-64-pcrel.s: Test R_X86_64_32S.
- * gas/i386/x86-64-pcrel.d: Updated.
-
-2005-04-01 Jan-Benedict Glaw <jbglaw at lug-owl.de>
-
- * gas/vax/flonum.s: New testcase: Encode some flonums.
- * gas/vax/flonum.d: Expected result of new testcase.
- * gas/vax/vax.exp: Call the new testcase.
-
- * gas/vax/elf-rel.d: Call gas with -k. Thanks to Matt Thomas for
- figuring out.
- * gas/vax/vax.exp: Run elf-rel.[sd] for NetBSD-ELF and Linux.
-
-2005-04-01 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/bss.[sd]: New.
- * gas/i386/i386.exp: Run new test.
-
-2005-04-01 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/x86-64-pcrel.[sd]: New.
- * gas/i386/i386.exp: Run new test.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * gas/arm/mapping.d: Update expected output due to mapping symbols
- being untyped.
-
-2005-03-29 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/i386.exp: Run segment and inval-seg for i386. Run
- x86-64-segment and x86-64-inval-seg for x86-64.
-
- * gas/i386/intel.d: Expect movw for moving between memory and
- segment register.
- * gas/i386/naked.d: Likewise.
- * gas/i386/opcode.d: Likewise.
- * gas/i386/x86-64-opcode.d: Likewise.
-
- * gas/i386/opcode.s: Use movw for moving between memory and
- segment register.
- * gas/i386/x86-64-opcode.s: Likewise.
-
- * : Likewise.
-
- * gas/i386/inval-seg.l: New.
- * gas/i386/inval-seg.s: New.
- * gas/i386/segment.l: New.
- * gas/i386/segment.s: New.
- * gas/i386/x86-64-inval-seg.l: New.
- * gas/i386/x86-64-inval-seg.s: New.
- * gas/i386/x86-64-segment.l: New.
- * gas/i386/x86-64-segment.s: New.
-
-2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
-
- * gas/arm/tls.s, gas/arm/tls.d: New files.
- * gas/arm/arm.exp: Run TLS test.
-
-2005-03-29 Julian Brown <julian at codesourcery.com>
-
- * gas/arm/unwind.d: Update expected output.
-
-2005-03-28 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 803
- * gas/ia64/dv-imply.d: Pass -mtune=itanium1 to as.
- * gas/ia64/dv-mutex.d : Likewise.
- * gas/ia64/dv-safe.d: Likewise.
- * gas/ia64/dv-srlz.d.nop: Likewise.
- * gas/ia64/ldxmov-1.d: Likewise.
- * gas/ia64/opc-b.d: Likewise.
- * gas/ia64/opc-f.d: Likewise.
- * gas/ia64/opc-i.d: Likewise.
- * gas/ia64/opc-m.d: Likewise.
- * gas/ia64/operand-or.d: Likewise.
- * gas/ia64/pcrel.d: Likewise.
+ * gas/ia64/opc-i.s: Add tests for tf.
+ * gas/ia64/pseudo.s: Likewise.
+ * gas/ia64/opc-i.d: Updated.
* gas/ia64/pseudo.d: Likewise.
- * gas/ia64/tls.d: Likewise.
-2005-03-24 Hans-Peter Nilsson <hp at axis.com>
+2006-02-22 H.J. Lu <hongjiu.lu at intel.com>
- * gas/cris/range-err-1.s: Adjust expected messages for hosts with
- 64-bit longs.
-
-2005-03-23 Alan Modra <amodra at bigpond.net.au>
-
- * gas/elf/section5.s: Don't start directives in first column.
-
-2005-03-21 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/iwmmxt.s: Update instructions that use the "never" value
- in the conditional field to use "le" instead. This is so that the
- disassembler will disassemble them.
- * gas/arm/iwmmxt.d: Update expected disassemblies.
-
-2005-03-17 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intel.d: Add stderr directive.
- * gas/i386/intel.e: New.
- * gas/i386/intel16.d: Add stderr directive. Adjust for changed
- source.
- * gas/i386/intel16.e: New.
- * gas/i386/intel16.s: Add instances of addressing forms with base
- and index specified in reverse order.
- * gas/i386/intelbad.l: Adjust for changed source.
- * gas/i386/intelbad.s: Add more operand forms to check.
- * gas/i386/intelok.d: Remove -r from objdump options. Add stderr
- directive. Adjust for changed source.
- * gas/i386/intelok.e: New.
- * gas/i386/intelok.s: Define MASM constants byte, word, etc. Add
- more operand forms to check.
- * gas/i386/x86_64.d: Add stderr directive.
- * gas/i386/x86_64.e: New.
- * gas/i386/x86_64.s: Adjust for parser changes.
-
-2005-03-15 Zack Weinberg <zack at codesourcery.com>
-
- * gas/arm/archv6t2.d, gas/arm/archv6t2.s: New dump test.
- * gas/arm/archv6t2-bad.l, gas/arm/archv6t2-bad.l: New errors test.
- * gas/arm/arm.exp: Run them.
-
-2005-03-14 Eric Christopher <echristo at redhat.com>
-
- * gas/cfi/cfi-mips-1.d, gas/cfi/cfi-mips-1.s: New dump test.
- * gas/cfi/cfi.exp: Run it.
- * gas/cfi/cfi-common-1.d: Update.
- * gas/cfi/cfi-common-2.d: Ditto.
- * gas/cfi/cfi-common-3.d: Ditto.
- * gas/cfi/cfi-common-4.d: Ditto.
-
-2005-03-12 Zack Weinberg <zack at codesourcery.com>
-
- * gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
- * gas/arm/arm.exp: Run it.
-
-2005-03-10 Aldy Hernandez <aldyh at redhat.com>
-
- * gas/ppc/e500.d: Fix encoding of efscfd.
-
-2005-03-10 Jeff Baker <jbaker at qnx.com>
- Alan Modra <amodra at bigpond.net.au>
-
- * gas/ppc/booke.s: Add new m[t,f]sprg testcases.
- * gas/ppc/booke.d: Likewise.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/vr4130.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2005-03-09 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/relax-swap1-mips[12].d: Expect the delay slots of
- bc1f and bc1t to be filled.
- * gas/mips/branch-misc-3.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2005-03-09 Ben Elliston <bje at au.ibm.com>
-
- * gas/maxq10/maxq10.exp: Remove stray semicolons.
- * gas/maxq20/maxq20.exp: Likewise.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/no-fit.[ls]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/xdata.[sd], gas/ia64/xdata-ilp32.d: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-03-08 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/pcrel.d: Account for big endian target.
- * gas/ia64/reloc-bad.s: Enforce 64-bit ABI.
-
-2005-03-08 Hans-Peter Nilsson <hp at axis.com>
-
- Adjust testsuite for cris-axis-aout.
- * gas/cris/rd-bcnst.d, gas/cris/rd-usp-1.d: Adjust regexps for a.out output.
- * gas/cris/mulbug-err-1.s, gas/cris/rd-arch-1.d,
- gas/cris/rd-arch-2.d, gas/cris/rd-arch-3.d, gas/cris/rd-break32.d,
- gas/cris/rd-pcrel2.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
- gas/cris/rd-usp-1b.d, gas/cris/v32-err-7.s: Pass --em=criself.
-
-2005-03-04 David Daney <ddaney at avtrex.com>
-
- * gas/mips/elf-rel23b.d: Use '__gnu_local_gp' instead of '_gp'
- for -mno-shared optimization.
- * gas/mips/elf-rel25a.d: Ditto.
-
-2005-03-04 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/arm.exp: Fix test for running the "undefined" to catch
- more non-ELF cases.
- * gas/arm/pic.d: Fix for vxworks target.
- * gas/arm/basic.d: Likewise.
- * gas/arm/unwind.d: Likewise.
-
-2005-03-04 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/ldstla-{n32.s, n32.d, n32-shared.d}: Delete.
- * gas/mips/ldstla-{n64.d, n64-shared.d}: Adjust expected output
- for loads and stores from constant addresses.
- * gas/mips/ldstla-{sym32.s, eabi64.d, n64-sym32.d}: New tests.
- * gas/mips/mips.exp: Run them.
-
-2005-03-03 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/mips.exp: Move tls tests to main $elf block.
-
-2005-03-03 Nick Clifton <nickc at redhat.com>
-
- * gas/macros/macros.exp (and.s): Expect this test to fail for the
- tic4x-coff target because it uses the '&' character as a line
- separator.
-
- * gas/sh/basic.exp: Add an sh-hms version of the pcrel test.
- * gas/sh/pcrel-hms.d: New file. Adjusted form of pcrel-coff.d for
- the sh-hms target.
- * gas/sh/arch/arch.exp: Expect the same failures for sh-hms port
- as for the sh-coff port.
-
- * gas/macros/macros.exp (run_list_test): Also expect the msp430
- port to fail the strings test because it defines
- ONLY_STANDARD_ESCAPES.
-
- * gas/arm/arch6zk.s: Add three nop instructions in order to pad
- the .text section out to a 32-byte boundary as will automatically
- be done by the arm-aout target.
- * gas/arm/arch6zk.d: Add expected nop disassemblies.
-
- * gas/d30v/serial.l: Remove listing lines that are no longer
- emitted and fix up expected binary encoding.
- * gas/d30v/serial2.l: Likewise.
- * gas/d30v/serial2O.l: Likewise.
-
-2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * gas/arc/extensions.s: Add tests for extcoreregister.
- * gas/arc/extensions.d: Likewise.
- * gas/arc/warn.s: Warnings for readonly core registers accessed.
- * gas/arc/warn.d: Likewise.
- * gas/arc/arc.exp: Run extensions testcase.
-
-2005-03-03 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/noat-1.d: Add -mips1 to assembler options.
-
-2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * gas/arc/ld.s: Add checks for short immediates with ld.
- * gas/arc/ld.d: Likewise.
-
-2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
-
- * gas/mips/tls-o32.d, gas/mips/tls-o32.s, gas/mips/tls-ill.l,
- gas/mips/tls-ill.s: New files.
- * gas/mips/mips.exp: Run TLS tests.
-
-2005-03-02 Alan Modra <amodra at bigpond.net.au>
-
- * gas/ppc/astest.d: Adjust for relocs reduced to section sym.
- * gas/ppc/astest2.d: Likewise.
- * gas/ppc/astest2_64.d: Likewise.
- * ppc/astest64.d: Likewise.
- * ppc/booke.d: Likewise.
- * ppc/power4.d: Likewise.
- * ppc/test1elf32.d: Likewise.
- * ppc/test1elf64.d: Likewise.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/cr-err.[ls]: New.
- * gas/i386/crx.[ds]: New.
- * gas/i386/i386.exp: Run new tests.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intelok.d: Add -r to objdump options. Adjust expectations.
- * gas/i386/intelok.s: Add checks for various special memory operands.
-
-2005-03-01 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * gas/arc/extensions.s: New file.
- * gas/arc/extensions.d: New file.
-
-2005-03-01 Nick Clifton <nickc at redhat.com>
-
- * gas/arm/arm.exp (undefined): Run a COFF variant of this test for
- COFF based ports.
- * gas/arm/undefined_coff.s: New file: Variant of undefined.s but
- with a COFF formated local label name.
- * gas/arm/undefined_coff.l: New file. Variant of undefined.l.
-
-2005-03-01 Stig Petter Olsroed <stigpo at users.sourceforge.net>
- Nick Clifton <nickc at redhat.com>
-
- * gas/arm/inst.d: Allow for ARM ports which decode the reloc
- associated with branches and so show the exact symbolic
- destination address rather than an offset from the start of the
- section.
- * gas/arm/pic.d: Likewise.
-
-2005-03-01 Alan Modra <amodra at bigpond.net.au>
-
- * gas/m68k/mcf-emac.d: Allow for 64-bit addresses.
- * gas/m68k/mcf-mac.d: Likewise.
- * gas/m68k/mcf-mov3q.d: Likewise.
- * gas/m68k/mode5.d: Likewise.
-
-2005-02-22 Eric Christopher <echristo at redhat.com>
-
- * gas/mips/elf-rel10.d: Update for label change.
-
-2005-02-22 Maciej W. Rozycki <macro at mips.com>
-
- * gas/mips/mips16-dwarf2.d: Pass -mabi=32. Include relocation
- information.
- * gas/mips/mips16-dwarf2-n32.d: New test to check DWARF2 line
- information for MIPS16 for the n32 ABI.
- * gas/mips/mips.exp. Run the new test.
-
-2005-02-22 Eric Christopher <echristo at redhat.com>
-
- * gas/mips/elf-rel10.s: Add label for frob.
-
-2005-02-22 Maciej W. Rozycki <macro at mips.com>
-
- * gas/mips/mips16-dwarf2.d: New test to check DWARF2 line
- information for MIPS16.
- * gas/mips/mips16-dwarf2.s: Source for the new test.
- * gas/mips/mips.exp: Run the new test.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * gas/d10v/instruction_packing-005.d: Adjust.
- * gas/d10v/instruction_packing-008.d: Ignore disassembled stabs.
- * gas/d10v/instruction_packing-009.d: Likewise.
- * gas/d10v/instruction_packing-010.d: Likewise.
- * gas/d10v/warning-001.d: Use #warning instead of #error.
- * gas/d10v/warning-002.d: Likewise.
- * gas/d10v/warning-003.d: Likewise.
- * gas/d10v/warning-004.d: Likewise.
- * gas/d10v/warning-005.d: Likewise.
- * gas/d10v/warning-006.d: Likewise.
- * gas/d10v/warning-007.d: Likewise.
- * gas/d10v/warning-008.d: Likewise.
- * gas/d10v/warning-009.d: Likewise.
- * gas/d10v/warning-010.d: Likewise.
- * gas/d10v/warning-011.d: Likewise.
- * gas/d10v/warning-012.d: Likewise.
- * gas/d10v/warning-013.d: Likewise.
- * gas/d10v/warning-015.d: Likewise.
- * gas/d10v/warning-016.d: Likewise.
- * gas/d10v/warning-017.d: Likewise.
- * gas/d10v/warning-018.d: Likewise.
- * gas/d10v/warning-019.d: Likewise.
- * lib/gas-defs.exp (run_dump_test): Don't require a dump program if
- #warning given. Rearrange to allow $program to remain unset.
- Fail the test if warning not found when expected. Conversely fail
- the test if assembler errors or warnings given when not expected.
-
-2005-02-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * gas/mips/noat-1.s, gas/mips/noat-1.d, gas/mips/noat-2.s,
- gas/mips/noat2.l, gas/mips/noat-3.s, gas/mips/noat-3.l,
- gas/mips/noat-4.s, gas/mips/noat-4.l, gas/mips/noat-5.s,
- gas/mips/noat-5.l, gas/mips/noat-6.s, gas/mips/noat-6.l,
- gas/mips/noat-7.s, gas/mips/noat-7.l: New files, testcases for
- .set noat in macro expansions.
- * gas/mips/mips.exp: Run new testcases.
- * gas/mips/rol-hw.d, gas/mips/rol-hw.l, gas/mips/rol.d,
- gas/mips/rol.l, gas/mips/rol.s, gas/mips/rol64-hw.d,
- gas/mips/rol64-hw.l, gas/mips/rol64.d, gas/mips/rol64.l,
- gas/mips/rol64.s, gas/mips/uld2-eb.d, gas/mips/uld2-el.d,
- gas/mips/uld2.l, gas/mips/uld2.s, gas/mips/ulh2-eb.d,
- gas/mips/ulh2-el.d, gas/mips/ulh2.l, gas/mips/ulh2.s,
- gas/mips/ulw2-eb-ilocks.d, gas/mips/ulw2-eb.d,
- gas/mips/ulw2-el-ilocks.d, gas/mips/ulw2-el.d, gas/mips/ulw2.l,
- gas/mips/ulw2.s: Don't try to test .set noat.
-
-2005-02-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/hint.b-err.l: New file.
- * gas/ia64/hint.b-err.s: Likewise.
- * gas/ia64/hint.b-warn.l: Likewise.
- * gas/ia64/hint.b-warn.s: Likewise.
-
- * gas/ia64/ia64.exp: Run hint.b-err and hint.b-warn.
-
- * gas/ia64/opc-b.d: Pass -mhint.b=ok to as.
-
-2005-02-17 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/nostkreg.[ds]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-02-16 Alan Modra <amodra at bigpond.net.au>
-
- * gas/all/gas.exp (quad): Don't run on i960.
-
-2005-02-15 Nigel Stephens <nigel at mips.com>
- Maciej W. Rozycki <macro at mips.com>
-
- * gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and
- R_MIPS16_LO16 relocs.
- * gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI.
- * gas/mips/mips16-hilo.s: Source for the new tests.
- * gas/mips/mips.exp: Run the new tests.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/pcrel.[ds]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/dv-raw-err.l: Expect specific resource for RAW
- violation on b0.
- * gas/ia64/regval.[ls]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/dv-raw-err.s: Don't use r0 or f0 as output operand.
- * gas/ia64/dv-waw-err.s: Likewise.
- * gas/ia64/reg-err.[ls]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/reloc.[ds]: New.
- * gas/ia64/reloc-bad.[ls]: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-02-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/operand-or.d: Pass -xnone to assembler.
-
-2005-02-13 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/label.l: Adjust line numbers.
- * gas/ia64/label.s: Add .explicit.
- * gas/ia64/nop_x.s: Likewise.
- * gas/ia64/opc-a.d: Add assembler option -xnone.
- * gas/ia64/opc-b.d: Likewise.
- * gas/ia64/opc-f.d: Likewise.
- * gas/ia64/opc-i.d: Likewise.
- * gas/ia64/opc-m.d: Likewise.
- * gas/ia64/opc-x.d: Likewise.
- * gas/ia64/pseudo.d: Likewise.
- * gas/ia64/regs.d: Likewise.
- * gas/ia64/tls.d: Likewise.
- * gas/ia64/unwind-err.l: Adjust line numbers.
- * gas/ia64/unwind-err.s: Remove explicit stops.
-
-2005-02-13 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/pound.[ls]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-02-13 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/ia64.exp: Add "operand-or".
-
- * gas/ia64/operand-or.d: New file.
- * gas/ia64/operand-or.s: Likewise.
-
-2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/ia64.exp: Pass -munwind-check=error for unwind-err
- and proc.
-
-2005-02-10 Julian Brown <julian at codesourcery.com>
-
- * gas/arm/unwind.d: Alter expected output to include dependency on
- __aeabi_unwind_cpp_pr[01].
-
-2005-02-09 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/intelok.s: Remove comments disabling alternative forms of
- fbld, fbstp, and fldcw.
- * gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw.
-
-2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
-
- * gas/maxq10/jump.d: Fixed relative jump offset.
- * gas/maxq10/call.d: Likewise.
- * gas/maxq20/jump.d: Likewise.
- * gas/maxq20/call.d: Likewise.
-
-2005-02-07 Hans-Peter Nilsson <hp at axis.com>
-
- * lib/gas-defs.exp: Support new directive "warning".
-
-2005-02-02 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/pred-rel.s: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
-
- * gas/mips/elf-rel23.d, gas/mips/elf-rel23a.d: Accept little-endian.
- * gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Accept section
- symbol names.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/repeat.[ds]: New.
- * gas/macros/macros.exp: Run new test.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/macros/badarg.[ls]: New.
- * gas/macros/end.[ls]: New.
- * gas/macros/redef.[ls]: New.
- * gas/macros/macros.exp (run_list_test): Copy from elsewhere.
- Run new tests.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/operands.[ls]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/proc.[ls]: New.
- * gas/ia64/unwind-err.[ls]: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/bundling.[ds]: New.
- * gas/ia64/label.[ls]: New.
- * gas/ia64/last.[ls]: New.
- * gas/ia64/slot2.[ls]: New.
- * gas/ia64/ia64.exp: Run new tests.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/pseudo.[ds]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-01-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/nop_x.[ds]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-01-27 Jan Beulich <jbeulich at novell.com>
-
- * gas/ia64/dv-waw-err.l: Don't expect ar112 move warning to refer to
- M-unit.
- * gas/ia64/mov-ar.[ds]: New.
- * gas/ia64/ia64.exp: Run new test.
-
-2005-01-24 Nick Clifton <nickc at redhat.com>
-
- * gas/all/sleb128.d: Do not assume an 8-bit byte.
- * gas/all/quad.d: Likewise. Also allow for ports which order
- bytes within words in other than simple big-endian or
- little-endian fashions.
-
-2005-01-19 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/all/sleb128.[sd]: New test.
- * gas/all/quad.[sd]: New test.
- * gas/all/gas.exp: Run them.
-
-2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
-
- * gas/sh/arch/arch.exp: Correct the email address.
- Correct a few comment typos.
- Add new tests to ensure that the assembler will only accept
- instructions valid in each architecture and vice-versa.
- * gas/sh/arch/arch_expected.txt: Update/Correct the test results.
- * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
- * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
- * gas/sh/arch/sh2a-nofpu.s: Generate new file.
- * gas/sh/arch/sh2a-or-sh3e.s: Regenerate.
- * gas/sh/arch/sh2a-or-sh4.s: Regenerate.
- * gas/sh/arch/sh2a.s: Generate new file.
- * gas/sh/arch/sh2e.s: Regenerate.
- * gas/sh/arch/sh2.s: Regenerate.
- * gas/sh/arch/sh3-dsp.s: Regenerate.
- * gas/sh/arch/sh3e.s: Regenerate.
- * gas/sh/arch/sh3-nommu.s: Regenerate.
- * gas/sh/arch/sh3.s: Regenerate.
- * gas/sh/arch/sh4al-dsp.s: Regenerate.
- * gas/sh/arch/sh4a-nofpu.s: Regenerate.
- * gas/sh/arch/sh4a.s: Regenerate.
- * gas/sh/arch/sh4-nofpu.s: Regenerate.
- * gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
- * gas/sh/arch/sh4.s: Regenerate.
- * gas/sh/arch/sh-dsp.s: Regenerate.
- * gas/sh/arch/sh.s: Regenerate.
-
-2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
-
- * i386/i386.exp: Run "sib".
-
- * gas/i386/sib.d: New file.
- * gas/i386/sib.s: Likewise.
-
-2005-01-09 Andreas Schwab <schwab at suse.de>
-
- * gas/i386/intel16.d: Ignore trailing text with #pass.
- * gas/i386/intelok.d: Likewise.
- * gas/i386/prefix.d: Likewise.
- * gas/i386/sub.d: Likewise.
- * gas/i386/padlock.d: Likewise.
- * gas/i386/x86_64.d: Likewise.
-
-2005-01-05 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * gas/elf/elf.exp (section5): Use 0-9 instead of [:digit:].
-
-2004-12-31 Alan Modra <amodra at bigpond.net.au>
-
- * gas/elf/elf.exp: Don't list reloc sections.
- * gas/elf/section5.e: Remove reloc sections.
-
-2004-12-21 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/beq_insn.d: Update reference file according to
- disassembler printing method.
- * gas/crx/bit_insn.d: Likewise.
- * gas/crx/br_insn.d: Likewise.
- * gas/crx/cmpbr_insn.d: Likewise.
- * gas/crx/cop_insn.d: Likewise.
- * gas/crx/load_stor_insn.d: Likewise.
-
-2004-12-21 Hans-Peter Nilsson <hp at axis.com>
-
- * gas/elf/section5.e, gas/elf/section5.l: Replace [:digit:],
- [:xdigit:] and {N} in regexps with [0-9], [0-9a-fA-F] and N
- copies, to cater to tcl versions before Tcl 8.2.3.
-
-2004-12-20 Nick Clifton <nickc at redhat.com>
-
- * gas/elf/section5.[ls]: Use % instead of @ in .section
- directives.
-
-2004-12-16 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/v850/split-lo16.{s,d}: New test.
- * gas/v850/v850.exp: Run it.
-
-2004-12-15 Jan Beulich <jbeulich at novell.com>
-
- * gas/elf/section5.[els]: New.
-
-2004-12-13 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel25.d, gas/mips/elf-rel25a.d: Cope with different
- .text alignments.
-
-2004-12-11 Alan Modra <amodra at bigpond.net.au>
-
- * gas/alpha/elf-usepv-1.d: Update for changed section syms.
- * gas/arm/mapping.d: Likewise.
- * gas/mips/tmips16-e.d: Likewise.
- * gas/mips/tmips16-f.d: Likewise.
- * gas/mmix/align-1.d: Likewise.
- * gas/mmix/basep-10.d: Likewise.
- * gas/mmix/basep-11.d: Likewise.
- * gas/mmix/basep-7.d: Likewise.
- * gas/mmix/basep-8.d: Likewise.
- * gas/mmix/basep-9.d: Likewise.
- * gas/mmix/builtin1.d: Likewise.
- * gas/mmix/builtin2.d: Likewise.
- * gas/mmix/builtin3.d: Likewise.
- * gas/mmix/bz-c.d: Likewise.
- * gas/mmix/comment-2.d: Likewise.
- * gas/mmix/comment-3.d: Likewise.
- * gas/mmix/cons-2.d: Likewise.
- * gas/mmix/fb-1.d: Likewise.
- * gas/mmix/fb-2.d: Likewise.
- * gas/mmix/geta-c.d: Likewise.
- * gas/mmix/greg1.d: Likewise.
- * gas/mmix/greg1a.d: Likewise.
- * gas/mmix/greg2.d: Likewise.
- * gas/mmix/greg2a.d: Likewise.
- * gas/mmix/greg3.d: Likewise.
- * gas/mmix/greg4.d: Likewise.
- * gas/mmix/greg5.d: Likewise.
- * gas/mmix/greg6.d: Likewise.
- * gas/mmix/greg7.d: Likewise.
- * gas/mmix/greg8.d: Likewise.
- * gas/mmix/is-1.d: Likewise.
- * gas/mmix/jump-c.d: Likewise.
- * gas/mmix/local-1.d: Likewise.
- * gas/mmix/locall1.d: Likewise.
- * gas/mmix/odd-1.d: Likewise.
- * gas/mmix/op-0-1.d: Likewise.
- * gas/mmix/op-0-1s.d: Likewise.
- * gas/mmix/op-0-2.d: Likewise.
- * gas/mmix/prefix1.d: Likewise.
- * gas/mmix/prefix2.d: Likewise.
- * gas/mmix/prefix3.d: Likewise.
- * gas/mmix/pseudo-1.d: Likewise.
- * gas/mmix/pushj-c.d: Likewise.
- * gas/mmix/pushj-cs.d: Likewise.
- * gas/mmix/sym-1.d: Likewise.
- * gas/mmix/weak1-s.d: Likewise.
- * gas/mmix/weak1.d: Likewise.
- * gas/mmix/zerop-1.d: Likewise.
- * gas/ppc/power4.d: Likewise.
- * gas/ppc/test1elf32.d: Likewise.
- * gas/ppc/test1elf64.d: Likewise.
- * gas/sh/sh64/datal32-3.d: Likewise.
- * gas/sh/sh64/datal64-3.d: Likewise.
- * gas/sh/sh64/localcom-1.d: Likewise.
-
-2004-12-10 Ian Lance Taylor <ian at wasabisystems.com>
-
- * gas/mips/elf-rel23a.d: New test.
- * gas/mips/elf-rel23b.d: New test.
- * gas/mips/elf-rel25.s: New test.
- * gas/mips/elf-rel25.d: New test.
- * gas/mips/elf-rel25a.d: New test.
- * gas/mips/mips.exp: Run new tests.
-
-2004-12-09 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/unwind.d: Expect R_ARM_PREL31 relocations.
-
-2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
-
- * gas/mips/branch-swap.d: Pass -32 to as.
-
-2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/br_insn.d: Fix error in expected disassembly.
-
-2004-11-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * gas/m32r/rela-1.s: New test.
- * gas/m32r/rela-1.d: Expected disassembly.
- * gas/m32r/m32r.exp: Run the new test.
- * gas/m32r/relax-1.d: Update for fixed pcrel reloc
- generation.
-
-2004-11-27 Richard Earnshaw <rearnsha at arm.com>
-
- * gas/arm/thumbv6.d (setend): Remove stray tab at end
- of dump pattern.
-
-2004-11-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/group-1.d: Adjust expected secion ordering.
-
-2004-11-25 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
-
-2004-11-24 Paul Brook <paul at codesourcery.com>
-
- * gas/elf/group0a.d: Adjust expected secion ordering.
- * gas/elf/group1a.d: Ditto.
- * gas/elf/section4.d: Ditto.
-
-2004-11-24 Nick Clifton <nickc at redhat.com>
-
- * gas/iq2000/allinsn.exp: Remove IQ10 tests.
- * gas/iq2000/q10allinsn.d: Delete.
- * gas/iq2000/q10allinsn.s: Delete.
- * gas/iq2000/q10hazard4.s: Delete.
- * gas/iq2000/q10hazard5.s: Delete.
- * gas/iq2000/q10load-hazards.exp: Delete.
- * gas/iq2000/q10nohazard.s: Delete.
- * gas/iq2000/q10noyield.s: Delete.
- * gas/iq2000/q10test0.d: Delete.
- * gas/iq2000/q10test0.s: Delete.
- * gas/iq2000/q10test1.d: Delete.
- * gas/iq2000/q10test1.s: Delete.
- * gas/iq2000/q10test10.d: Delete.
- * gas/iq2000/q10test10.s: Delete.
- * gas/iq2000/q10test11.d: Delete.
- * gas/iq2000/q10test11.s: Delete.
- * gas/iq2000/q10test12.d: Delete.
- * gas/iq2000/q10test12.s: Delete.
- * gas/iq2000/q10test2.d: Delete.
- * gas/iq2000/q10test2.s: Delete.
- * gas/iq2000/q10test3.d: Delete.
- * gas/iq2000/q10test3.s: Delete.
- * gas/iq2000/q10test4.d: Delete.
- * gas/iq2000/q10test4.s: Delete.
- * gas/iq2000/q10test5.d: Delete.
- * gas/iq2000/q10test5.s: Delete.
- * gas/iq2000/q10test6.d: Delete.
- * gas/iq2000/q10test6.s: Delete.
- * gas/iq2000/q10test7.d: Delete.
- * gas/iq2000/q10test7.s: Delete.
- * gas/iq2000/q10test8.d: Delete.
- * gas/iq2000/q10test8.s: Delete.
- * gas/iq2000/q10test9.d: Delete.
- * gas/iq2000/q10test9.s: Delete.
- * gas/iq2000/q10yield.exp: Delete.
- * gas/iq2000/test.exp: Delete.
-
-2004-11-24 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * gas/arc/st.s: Add checks for other variants of the sr and st
- instruction.
- * gas/arc/st.d: Update the expected disassembly.
-
-2004-11-23 Nick Clifton <nickc at redhat.com>
-
- * gas/mn10300/relax.s: Add further tests of the relaxing of branch
- instructions.
- * gas/mn10300/relax.d: Add expected relocations.
-
-2004-11-22 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
-
- * gas/arc/ld.s: Add check of load of a long immediate.
- * gas/arc/ld.d: Add expected disassembly.
-
-2004-11-22 Hans-Peter Nilsson <hp at axis.com>
-
- * gas/all/gas.exp: Run dg-runtest for all err-*.s and warn-*.s.
- * gas/all/err-1.s, gas/all/warn-1.s: New tests.
-
-2004-11-18 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
-
- * gas/maxq10/call.d: Fix expected results now that bfd assembler
- support is enabled by default.
- * gas/maxq10/range.d: Likewise.
- * gas/maxq20/call.d: Likewise.
-
-2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * gas/arm/mapping.d: Expect F markers for Thumb code.
- * gas/arm/unwind.d: Update big-endian pattern.
-
-2004-11-12 Nick Clifton <nickc at redhat.com>
-
- * gas/mn10300/basic.exp: Add relax test.
- * gas/mn10300/relax.s: New test.
- * gas/mn10300/relax.d: Expected results. Make sure that the
- correct size of instruction has been selected.
-
-2004-11-11 Bob Wilson <bob.wilson at acm.org>
-
- * gas/xtensa/short_branch_offset.s: New.
- * gas/xtensa/short_branch_offset.d: New.
- * gas/xtensa/all.exp: Run new test.
-
-2004-11-10 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/opcode.s: Pad section.
- * gas/i386/intelok.s: Likewise.
- * gas/i386/opcode.d: Update.
- * gas/i386/intelok.d: Update.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * gas/maxq10: New directory. Contains tests for maxq port.
- * gas/maxq20: Likewise.
-
-2004-11-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/general.s: Add movzb.
- * gas/i386/general.l: Updated.
-
-2004-11-04 Hans-Peter Nilsson <hp at axis.com>
-
- * gas/all/gas.exp: Exclude float.s for crisv32-*-*.
- * gas/cris/operand-err-1.s (test.m constant): Remove xfail marker
- and update rationale. Mark "ba [external_symbol]" and "ba [r3]"
- as invalid.
- * gas/ieee-fp/x930509a.exp: setup_xfail for crisv32-*-*.
- * gas/macros/macros.exp: setup_xfail strings for crisv32-*-*.
- * gas/cris/abs32-1.s, gas/cris/arch-err-1.s,
- gas/cris/arch-err-2.s, gas/cris/arch-err-3.s,
- gas/cris/arch-err-4.s, gas/cris/arch-err-5.s,
- gas/cris/bound-err-1.s, gas/cris/brokw-3b.s,
- gas/cris/march-err-1.s, gas/cris/march-err-2.s,
- gas/cris/push-err-1.s, gas/cris/push-err-2.s,
- gas/cris/pushpopv32.s, gas/cris/rd-abs32-1.d,
- gas/cris/rd-abs32-2.d, gas/cris/rd-arch-1.d, gas/cris/rd-arch-2.d,
- gas/cris/rd-arch-3.d, gas/cris/rd-bkw1b.d, gas/cris/rd-bkw2b.d,
- gas/cris/rd-bkw3b.d, gas/cris/rd-bound1.d, gas/cris/rd-bound1.s,
- gas/cris/rd-bound2.d, gas/cris/rd-bound3.d, gas/cris/rd-bound4.d,
- gas/cris/rd-break32.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
- gas/cris/rd-spr-1.d, gas/cris/rd-spr-1.s, gas/cris/rd-usp-1.d,
- gas/cris/rd-usp-1b.d, gas/cris/rd-v10_32o-1.d,
- gas/cris/rd-v10_32o-2.d, gas/cris/rd-v10_32o-2.s,
- gas/cris/rd-v32-b1.d, gas/cris/rd-v32-b1.s, gas/cris/rd-v32-b2.d,
- gas/cris/rd-v32-b2.s, gas/cris/rd-v32-b3.d, gas/cris/rd-v32-b3.s,
- gas/cris/rd-v32-f1.d, gas/cris/rd-v32-f1.s, gas/cris/rd-v32-i1.d,
- gas/cris/rd-v32-i1.s, gas/cris/rd-v32-l1.d, gas/cris/rd-v32-l1.s,
- gas/cris/rd-v32-l3.d, gas/cris/rd-v32-l3.s, gas/cris/rd-v32-l4.d,
- gas/cris/rd-v32-l4.s, gas/cris/rd-v32o-1.d, gas/cris/rd-v32s-1.d,
- gas/cris/rd-v32s-2.d, gas/cris/rd-v32s-2.s, gas/cris/rd-v32s-3.d,
- gas/cris/rd-v32s-3.s, gas/cris/rd-v32s-4.d, gas/cris/rd-v32s-4.s,
- gas/cris/rd-vao-1.d, gas/cris/v32-err-1.s, gas/cris/v32-err-10.s,
- gas/cris/v32-err-11.s, gas/cris/v32-err-2.s, gas/cris/v32-err-3.s,
- gas/cris/v32-err-4.s, gas/cris/v32-err-5.s, gas/cris/v32-err-6.s,
- gas/cris/v32-err-7.s, gas/cris/v32-err-8.s, gas/cris/v32-err-9.s:
- New tests.
-
-2004-11-04 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/i386.exp: Execute new tests intelbad and intelok.
- * gas/i386/intelbad.[sl]: New test to check for various things not
- permitted in Intel mode.
- * gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
- Adjust for change to segment register store.
- * gas/i386/intelok.[sd]: New test to check various Intel mode specific
- things get handled correctly.
- * gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
- 'high' and 'low' parts of an operand, which the parser previously
- accepted while neither telling that it's not supported nor that it
- ignored the remainder of the line following these supposed keywords.
-
-2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/cop_insn.d: Regenerate (after a bug fix in Assembler).
-
-2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/cop_insn.s: Test new Co-Processor instruction 'cpi'.
- * gas/crx/list_insn.s: Add hi/lo/u<N> registers tests, fix test bugs.
- * gas/crx/cop_insn.d: Regenerate.
- * gas/crx/list_insn.d: Likewise.
-
-2004-10-23 Daniel Jacobowitz <dan at debian.org>
-
- * gas/cfi/cfi-arm-1.d, gas/cfi/cfi-arm-1.s: New files.
- * gas/cfi/cfi.exp: Run cfi-arm-1 test.
-
-2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/cop_insn.s: Reverse operands order in store co-processor
- instructions.
- * gas/crx/list_insn.s: Remove test for unsupported 'popa' instruction.
- * gas/crx/cop_insn.d: Regenerate.
- * gas/crx/list_insn.d: Likewise.
-
-2004-10-14 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/mapping.d: Pass --special-syms to objdump.
-
-2004-10-08 Daniel Jacobowitz <dan at debian.org>
-
- * gas/i386/i386.exp: Don't run divide test for targets where '/'
- is a comment. Run x86-64-unwind for 64-bit ELF targets.
- * gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New.
-
-2004-10-08 Alan Modra <amodra at bigpond.net.au>
-
- * gas/cfi/cfi-common-4.d: Correct for 64 bit targets.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
-
- * gas/xtensa/all.exp: Adjust expected error message for j_too_far.
- Change entry_align test to expect an error.
- * gas/xtensa/entry_misalign2.s: Use no-transform instead of
- no-generics directives.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel{23,24}.[sd]: New tests.
- * gas/mips/mips.exp: New test.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel22.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-10-07 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel21.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-10-07 Jan Beulich <jbeulich at novell.com>
-
- * gas/cfi/cfi-common-4.[ds]: New.
- * gas/cfi/cfi.exp: Run new test.
-
-2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx/cop_insn.s: New file.
- * gas/crx/cop_insn.d: Likewise.
- * gas/crx/load_stor_insn.s: Move Co-processor insns to a separate
- test.
- * gas/crx/misc_insn.s: Likewise.
- * gas/crx/load_stor_insn.d: Regenerate.
- * gas/crx/misc_insn.d: Likewise.
-
-2004-10-06 Aldy Hernandez <aldyh at redhat.com>
-
- * gas/ppc/e500.s: Add double-precision instructions.
- * gas/ppc/e500.d: Same.
-
-2004-10-05 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/arm.exp: Add unwind table test. Recognise
- arm-symbian-symbianelf and arm-none-eabi.
- * gas/arm/unwind.s: New file.
- * gas/arm/unwind.d: New file.
-
-2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
-
- * gas/pdp11/opcode.d: Fix sob opcode value.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/arch6zk.d: New file.
- * gas/arm/arch6zk.s: New file.
- * gas/arm/arm.exp: Add them.
-
-2004-09-29 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/secrel.s: Pad .rdata out to 16 byte boundary.
- * gas/i386/secrel.d: Adjust to suit.
-
-2004-09-19 Paul Brook <paul at codesourcery.com>
-
- * gas/elf/elf.exp: Recognise additional arm elf targets.
-
-2004-09-17 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/pic.s: Add (target2).
- * gas/arm/pic.d: Ditto.
-
-2004-09-13 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/pic.d: Rename RELABS to TARGET1.
- * gas/arm/pic.s: Ditto.
-
-2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/crx: New directory.
- * gas/crx/allinsn.exp: New test script.
- * gas/crx/arith_insn.s: New file.
- * gas/crx/arith_insn.d: Likewise.
- * gas/crx/beq_insn.s: Likewise.
- * gas/crx/beq_insn.d: Likewise.
- * gas/crx/bit_insn.s: Likewise.
- * gas/crx/bit_insn.d: Likewise.
- * gas/crx/br_insn.s: Likewise.
- * gas/crx/br_insn.d: Likewise.
- * gas/crx/cmov_insn.s: Likewise.
- * gas/crx/cmov_insn.d: Likewise.
- * gas/crx/cmpbr_insn.s: Likewise.
- * gas/crx/cmpbr_insn.d: Likewise.
- * gas/crx/jscond_insn.s: Likewise.
- * gas/crx/jscond_insn.d: Likewise.
- * gas/crx/list_insn.s: Likewise.
- * gas/crx/list_insn.d: Likewise.
- * gas/crx/load_stor_insn.s: Likewise.
- * gas/crx/load_stor_insn.d: Likewise.
- * gas/crx/misc_insn.s: Likewise.
- * gas/crx/misc_insn.d: Likewise.
- * gas/crx/no_op_insn.s: Likewise.
- * gas/crx/no_op_insn.d: Likewise.
- * gas/crx/shift_insn.s: Likewise.
- * gas/crx/shift_insn.d: Likewise.
-
-2004-08-27 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/frv/fr550-pack1.[sd]: New test.
- * gas/frv/allinsn.exp: Run it.
-
-2004-08-27 Nick Clifton <nickc at redhat.com>
-
- * gas/i386/i386.exp: Allow pcrel test for COFF targets as well,
- but not for PE targets. Similarly for the absrel test.
-
-2004-08-26 Nick Clifton <nickc at redhat.com>
-
- * gas/i386/i386.exp: Group ELF specific tests together. Move the
- pcrel test into the ELF only section. Use is_elf_format to test
- for ELF based toolchains.
-
-2004-08-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/all/gas.exp: Use `string match ""' instead of `eq ""'.
-
-2004-08-24 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/altmacro.[sd]: Split out part from here...
- * gas/all/altmac2.[sd]: ... to here.
- * gas/all/excl.s: New.
- * gas/all/gas.exp: Suppress both tests for a few targets known to
- break. Run the new (split out) test only when the target doesn't
- use '!' as a comment character.
-
-2004-08-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * gas/mips/branch-swap.s: New testcase.
- * gas/mips/branch-swap.d: New testcase.
- * gas/mips/mips.exp: Run the testcase.
-
-2004-08-18 Nick Clifton <nickc at redhat.com>
-
- * gas/macros/strings.s: Remove #NO_APP, accidentally committed as
- part of another patch.
-
-2004-08-15 Nick Clifton <nickc at redhat.com>
-
- * gas/all/altmacro.d: Allow for rest of frag being padded to an
- alignment boundary.
-
- * gas/arm/arm.exp: Run bignum test for ELF based targets only.
-
-2004-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * gas/cfi/cfi-alpha-1.d: Adjust for readelf fix.
- * gas/cfi/cfi-alpha-3.d: Likewise.
- * gas/cfi/cfi-i386.d: Likewise.
- * gas/cfi/cfi-m68k.d: Likewise.
- * gas/cfi/cfi-ppc-1.d: Likewise.
- * gas/cfi/cfi-s390-1.d: Likewise.
- * gas/cfi/cfi-s390x-1.d: Likewise.
- * gas/cfi/cfi-sh-1.d: Likewise.
- * gas/cfi/cfi-sparc-1.d: Likewise.
- * gas/cfi/cfi-sparc64-1.d: Likewise.
- * gas/cfi/cfi-x86_64.d: Likewise.
-
-2004-08-13 Jan Beulich <jbeulich at novell.com>
-
- * gas/all/altmacro.[sd]: New test.
- * gas/all/gas.exp: Run the new test.
-
-2004-08-10 Mark Mitchell <mark at codesourcery.com>
-
- * gas/arm/bignum1.s: New test.
- * gas/arm/arm.exp: Run it.
-
-2004-08-06 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/pic.s,d: Test RELABS and SBREL relocations.
-
-2004-08-05 Nitin Yewale <nitiny at kpitcummins.com>
-
- * h8300/h8300.exp: Addition of new test case to check rx
- generation with adds and subs instruction for plain H8/300 target.
- * h8300/addsubrxcheck.s: New test source file.
-
-2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
-
- * gas/m68hc11/m68hc11.exp: Fix tests for 2.15
- * gas/elf/elf.exp: Test obj-elf for m6811-* and m6812-*
- * gas/symver/symver.exp: Likewise for symver tests.
-
-2004-07-30 Michal Ludvig <mludvig at suse.cz>
-
- * gas/i386/padlock.s, gas/i386/padlock.d: New tests for
- VIA PadLock instructions.
-
-2004-07-29 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/sh/basic.exp: Don't do sh2a test for sh5.
- * gas/sh/sh2a.d: Match elf32-sh* format too.
-
-2004-07-29 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-12-30 DJ Delorie <dj at redhat.com>
- * gas/sh/sh2a.s: New.
- * gas/sh/sh2a.d: New.
- * gas/sh/basic.exp: Add it.
-
-2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * gas/all/gas.exp (do_930509a): Disable test for crx.
-
-2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/i386/x86-64-inval.l: Remove the leading `+'.
-
-2004-07-22 Nick Clifton <nickc at redhat.com>
-
- PR/280
- * gas/h8300/ffxx1-coff.d: Remove duplicated raw insn values.
- * gas/h8300/ffxx1-elf.d: Likewise.
- * gas/h8300/h8sx_disp2.d: Likewise.
- * gas/h8300/h8sx_mov_imm.d: Likewise.
- * gas/h8300/h8sx_rtsl.d: Likewise.
- * gas/h8300/ffxx1-coff.s: Remove inappropriate insn width specifier.
- * gas/h8300/ffxx1-elf.s: Likewise.
-
-2004-07-21 Jan Beulich <jbeulich at novell.com>
-
- * gas/i386/x86-64-addr32.[ds]: New test for x86-64 32-bit
- addressing in 64-bit mode.
- * gas/i386/x86-64-rip.[ds]: New test for x86-64 rip-relative
- addressing.
- * gas/i386/i386.exp: Run the two new tests.
-
- * gas/cfi/cfi-x86_64.d: Adjust expectation for leave to not have a
- rex prefix.
- * gas/i386/x86-64-inval.[ls]: Add a bunch of instructions illegal
- in 64-bit mode.
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/elf-rel19.d: Pass -march=mips1 to gas as the test
- expects load delay slots.
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/vr5400.d: Update for a correct disassembly of
- "racm.ob".
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/mips32.s: Adjust for the unified "break" syntax. Add
- another "break" case. Update the comment accordingly.
- * gas/mips/set-arch.s: Likewise.
- * gas/mips/mips32.d: Adjust for the new output.
- * gas/mips/set-arch.d: Likewise.
-
-2004-07-15 Nitin Yewale <nitiny at kpitcummins.com>
-
- * gas/h8300/h8300.exp (do_h8300hn_addressgen): Addition of
- new test case for H8300H normal target to check symbol
- address generation.
- * gas/h8300/symaddgen.s: New test.
-
-2004-07-13 Nick Clifton <nickc at redhat.com>
-
- * gas/i386/intel.s: Add test of newly expand arithmetic support
- for Intel mode assembler.
- * gas/i386/intel.d: Add expected disassmbly.
-
-2004-07-13 Nick Clifton <nickc at redhat.com>
-
- * gas/vtable: Delete directory. These tests are no longer needed
- as the VTABLE_ reloc support is obsolete.
-
-2004-07-08 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * gas/m32r/pic.exp: Add New Test case for @GOTOFF, @GOT, @PLT.
- * gas/m32r/pic2.s: New file: Test case for @GOTOFF, @GOT, @PLT.
- * gas/m32r/pic2.d: New file: Expected results.
-
-2004-07-08 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel7.d: Expect relocations against bar to refer to bar.
- * gas/mips/elf-refl19.d: Likewise L2.
-
-2004-07-03 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf{,el}-rel.d: Adjust so that the earliest %hi() matches
- the earliest %lo().
- * gas/mips/elf-rel11.d: Don't expect the relocs to be reordered.
- * gas/mips/elf-rel20.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-07-03 Maciej W. Rozycki <macro at linux-mips.org>
-
- * gas/mips/elf-rel9.[sd]: Fix typo in %lo() expression.
-
-2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
-
- * gas/ia64/group-1.d: New.
- * gas/ia64/group-1.s: Likewise.
-
- * gas/ia64/ia64.exp: Add group-1 to test comdat group.
-
-2004-06-30 James E Wilson <wilson at specifixinc.com>
-
- * gas/ia64/dv-imply.d: Update.
- * gas/ia64/dv-mutex.d: Likewise.
- * gas/ia64/dv-safe.d: Likewise.
-
-2004-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * gas/m68k/mode5.s: Pad section.
- * gas/m68k/mode5.d: Update.
-
-2004-06-28 Alan Modra <amodra at bigpond.net.au>
-
- * gas/ppc/power4.d: Update.
-
-2004-06-24 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/prescott.s: Remove fisttpd and fisttpq.
- * gas/i386/prescott.d: Update.
-
-2004-06-08 Jakub Jelinek <jakub at redhat.com>
-
- * gas/ia64/dv-raw-err.s: Add some new postinc tests.
+ * gas/ia64/dv-raw-err.s: Add check for vmsw.0.
* gas/ia64/dv-raw-err.l: Updated.
-2004-05-28 Peter Barada <peter at the-baradas.com>
+ * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
+ * gas/ia64/opc-b.d: Updated.
- * gas/m68k/mode5.s: New test file. Checks conversion of mode 5
- addressing with zero offset into mode 2 addressing.
- * gas/m68k/mode5.d: New file: Expected disassmbly.
- * gas/m68k/all.exp: Run new test.
+2005-02-22 Paul Brook <paul at codesourcery.com>
-2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+ * gas/arm/thumb32.d: Fix expected pld opcode.
- * gas/sh/arch: New directory.
- * gas/sh/arch/arch.exp: New test script.
- * gas/sh/arch/arch_expected.txt: New file.
- * gas/sh/arch/sh.s: New file.
- * gas/sh/arch/sh2.s: New file.
- * gas/sh/arch/sh-dsp.s: New file.
- * gas/sh/arch/sh2e.s: New file.
- * gas/sh/arch/sh3-nommu.s: New file.
- * gas/sh/arch/sh3.s: New file.
- * gas/sh/arch/sh3-dsp.s: New file.
- * gas/sh/arch/sh3e.s: New file.
- * gas/sh/arch/sh4-nommu-nofpu.s: New file.
- * gas/sh/arch/sh4-nofpu.s: New file.
- * gas/sh/arch/sh4.s: New file.
- * gas/sh/arch/sh4a-nofpu.s: New file.
- * gas/sh/arch/sh4al-dsp.s: New file.
- * gas/sh/arch/sh4a.s: New file.
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
-2004-05-27 H.J. Lu <hongjiu.lu at intel.com>
+ * gas/xc16x: New directory.
+ * gas/xc16x/xc16x.exp: New file
+ * gas/xc16x/add.s: New file
+ * gas/xc16x/add_test.s: New file
+ * gas/xc16x/addb.s: New file
+ * gas/xc16x/addc.s: New file
+ * gas/xc16x/addcb.s: New file
+ * gas/xc16x/and.s: New file
+ * gas/xc16x/andb.s: New file
+ * gas/xc16x/bfldl.s: New file
+ * gas/xc16x/bit.s: New file
+ * gas/xc16x/calla.s: New file
+ * gas/xc16x/calli.s: New file
+ * gas/xc16x/cmp.s: New file
+ * gas/xc16x/cmp_test.s: New file
+ * gas/xc16x/cmpb.s: New file
+ * gas/xc16x/cmpi.s: New file
+ * gas/xc16x/cpl.s: New file
+ * gas/xc16x/div.s: New file
+ * gas/xc16x/jmpa.s: New file
+ * gas/xc16x/jmpi.s: New file
+ * gas/xc16x/jmpr.s: New file
+ * gas/xc16x/mov.s: New file
+ * gas/xc16x/mov_test.s: New file
+ * gas/xc16x/movb.s: New file
+ * gas/xc16x/movbs.s: New file
+ * gas/xc16x/movbz.s: New file
+ * gas/xc16x/mul.s: New file
+ * gas/xc16x/neg.s: New file
+ * gas/xc16x/nop.s: New file
+ * gas/xc16x/or.s: New file
+ * gas/xc16x/orb.s: New file
+ * gas/xc16x/prior.s: New file
+ * gas/xc16x/pushpop.s: New file
+ * gas/xc16x/ret.s: New file
+ * gas/xc16x/scxt.s: New file
+ * gas/xc16x/shlrol.s: New file
+ * gas/xc16x/sub.s: New file
+ * gas/xc16x/sub_test.s: New file
+ * gas/xc16x/subb.s: New file
+ * gas/xc16x/subcb.s: New file
+ * gas/xc16x/syscontrol1.s: New file
+ * gas/xc16x/syscontrol2.s: New file
+ * gas/xc16x/trap.s: New file
+ * gas/xc16x/xor.s: New file
+ * gas/xc16x/xorb.s: New file
- * gas/ia64/regs.d: Updated.
+2006-02-12 H.J. Lu <hongjiu.lu at intel.com>
-2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
+ * gas/i386/x86-64-crx-suffix.d: Undo the last change.
- * gas/ia64/ia64.exp: Run invalid-ar.
+2006-02-11 H.J. Lu <hongjiu.lu at intel.com>
- * gas/ia64/invalid-ar.l: New file. Test invalid AR access.
- * gas/ia64/invalid-ar.s: Likewise.
+ * gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".
-2004-05-24 Peter Barada <peter at the-baradas.com>
+ * gas/i386/x86-64-crx-suffix.d: Minor update.
- * gas/m68k/mcf-emac.d: Provide correct disassembler results.
- * gas/m68k/mcf-mac.d: Provide correct disassembler results.
+ * gas/i386/x86-64-drx-suffix.d: New file.
+ * gas/i386/x86-64-drx.d: Likewise.
+ * gas/i386/x86-64-drx.s: Likewise.
-2004-05-20 H.J. Lu <hongjiu.lu at intel.com>
+2006-02-11 H.J. Lu <hongjiu.lu at intel.com>
- * gas/ia64/dv-srlz.d: Fix a typo.
+ * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
-2004-05-12 Ben Elliston <bje at au.ibm.com>
+ * gas/i386/x86-64-crx-suffix.d: New file.
+ * gas/i386/x86-64-crx.d: Likewise.
+ * gas/i386/x86-64-crx.s: Likewise.
- * gas/h8300/t03_add.exp: Remove stray semicolons.
- * gas/h8300/t04_sub.exp: Likewise.
- * gas/h8300/t05_cmp.exp: Likewise.
- * gas/h8300/t08_or.exp: Likewise.
- * gas/h8300/t09_xor.exp: Likewise.
- * gas/h8300/t10_and.exp: Likewise.
- * gas/hppa/reloc/reloc.exp: Likewise.
- * gas/hppa/unsorted/unsorted.exp: Likewise.
- * gas/i386/i386.exp: Likewise.
- * gas/m68hc11/m68hc11.exp: Likewise.
- * gas/mips/mips.exp: Likewise.
- * gas/sparc/sparc.exp: Likewise.
- * lib/gas-defs.exp: Likewise.
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
-2004-05-11 Nick Clifton <nickc at redhat.com>
+ * testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
+ * testsuite/gas/m68k/arch-cpu-1.[sd]: New.
- * gas/elf/section4.s: New test. Checks label arithmetic when
- multiple same-name sections exist.
- * gas/elf/section4.d: New file: Expected section list
- * gas/elf/elf.exp: Run the new test.
- * gas/elf/group0.s: Use % instead of @ for type argument to
- .section directive (for compatability with ARM port).
- * gas/elf/group1.s: Likewise.
+2005-02-02 Paul Brook <paul at codesourcery.com>
-2004-05-07 Richard Sandiford <rsandifo at redhat.com>
+ * gas/arm/thumb2_invert.d: New test.
+ * gas/arm/thumb2_invert.s: New test.
- * gas/mips/vr4122.[sd]: Rename to...
- * gas/mips/vr4120-2.[sd]: ...and add tests for VR4181A errata
- MD(1) and MD(4).
- * gas/mips/mips.exp: Update accordingly.
+2006-01-31 Paul Brook <paul at codesourcery.com>
-2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+ * gas/testsuite/gas/arm/iwmmxt-bad.s: Add check for bad register name.
+ * gas/testsuite/gas/arm/iwmmxt-bad.l: Ditto.
- * gas/frv/reloc1.d: Match elf32-frvfdpic as well.
- * gas/frv/fr405-insn.d: Likewise.
- * gas/frv/fr450-insn.d: Likewise.
+2006-01-18 Arnold Metselaar <arnoldm at sourceware.org>
-2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+ * gas/z80/z80.exp: Add offset.
+ * gas/z80/offset.d: New file.
+ * gas/z80/offset.s: New file.
- * gas/elf/elf.exp: Remove group1, add group1a and group1b for
- section group.
+2006-01-16 Paul Brook <paul at codesourcery.com>
- * gas/elf/group1a.d: New file.
- * gas/elf/group1b.d: Likewise.
+ * gas/m68k/all.exp: Add mcf-fpu.
+ * gas/m68k/mcf-fpu.d: New file.
+ * gas/m68k/mcf-fpu.s: New file.
- * gas/elf/group1.e: Removed.
+2006-01-11 Nick Clifton <nickc at redhat.com>
-2004-04-30 Nick Clifton <nickc at redhat.com>
+ * gas/tic54x/address.d: Work with 64bit hosts.
+ * gas/tic54x/addrfar.d: Likewise.
+ * gas/tic54x/align.d: Likewise.
+ * gas/tic54x/all-opcodes.d: Likewise.
+ * gas/tic54x/asg.d: Likewise.
+ * gas/tic54x/cons.d: Likewise.
+ * gas/tic54x/consfar.d: Likewise.
+ * gas/tic54x/extaddr.d: Likewise.
+ * gas/tic54x/field.d: Likewise.
+ * gas/tic54x/labels.d: Likewise.
+ * gas/tic54x/loop.d: Likewise.
+ * gas/tic54x/lp.d: Likewise.
+ * gas/tic54x/macro.d: Likewise.
+ * gas/tic54x/math.d: Likewise.
+ * gas/tic54x/opcodes.d: Likewise.
+ * gas/tic54x/sections.d: Likewise.
+ * gas/tic54x/set.d: Likewise.
+ * gas/tic54x/struct.d: Likewise.
+ * gas/tic54x/subsym.d: Likewise.
- * gas/arm/reg-alias.s: New file: Test case sensitive register
- aliases.
- * gas/arm/reg-alias.d: New file: Expected test output.
- * gas/arm/arm.exp: Run reg-alias test.
- Arrange tests in a more orderly fashion.
+2006-01-09 H.J. Lu <hongjiu.lu at intel.com>
-2004-04-30 Ben Elliston <bje at au.ibm.com>
+ PR gas/2117
+ * gas/ia64/ia64.exp: Add ltoff22x-2, ltoff22x-3, ltoff22x-4 and
+ ltoff22x-5.
- * gas/ppc/power4.s: Add dcbz and dcbzl test cases.
- * gas/ppc/power4.d: Update accordingly.
+ * gas/ia64/ltoff22x-2.d: New file.
+ * gas/ia64/ltoff22x-2.s: Likewise.
+ * gas/ia64/ltoff22x-3.d: Likewise.
+ * gas/ia64/ltoff22x-3.s: Likewise.
+ * gas/ia64/ltoff22x-4.d: Likewise.
+ * gas/ia64/ltoff22x-4.s: Likewise.
+ * gas/ia64/ltoff22x-5.d: Likewise.
+ * gas/ia64/ltoff22x-5.s: Likewise.
-2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-03 Hans-Peter Nilsson <hp at bitrange.com>
- * gas/elf/elf.exp: Add group0a, group0b and group1 for section
- group.
+ PR gas/2101
+ * gas/mmix/hex2.s, gas/mmix/hex2.d: New test.
- * gas/elf/group0.s: New file.
- * gas/elf/group0a.d: Likewise.
- * gas/elf/group0b.d: Likewise.
- * gas/elf/group1.e: Likewise.
- * gas/elf/group1.s: Likewise.
-
-2004-04-23 Nick Clifton <nickc at redhat.com>
-
- * gas/symver/symver1.d: Cope with extra symbols inserted by
- arm-elf toolchains.
- * gas/symver/symver0.d: Likewise
- * gas/elf/symver.d: Likewise.
-
-2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/sh/pcrel2.d: Update.
- * gas/sh/tlsd.d: Update.
- * gas/sh/tlsnopic.d: Update.
- * gas/sh/tlspic.d: Update.
-
-2004-04-22 Mark Kettenis <kettenis at gnu.org>
-
- * lib/gas-defs.exp (is_elf_format): Add OpenBSD support.
-
-2004-04-22 Atsushi Nemoto <anemo at mba.ocn.ne.jp>
-
- * gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot.
- * gas/mips/mips-abi32-pic.d: Likewise.
- * gas/mips/mips-abi32-pic2.d: Likewise.
- * gas/mips/mips-gp32-fp32-pic.d: Likewise.
- * gas/mips/mips-gp32-fp64-pic.d: Likewise.
- * gas/mips/mips-gp64-fp32-pic.d: Likewise.
- * gas/mips/mips-gp64-fp64-pic.d: Likewise.
- * gas/mips/relax-swap1-mips2.d: Likewise.
- * gas/mips/lb-svr4pic-ilocks.d: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-04-22 Paul Brook <paul at codesourcery.com>
-
- * maverick.c (off8s): Test full shifted operand range.
- (MCC2): Define.
- (MVDSPACC, MVACCDSP): Use it.
- * maverick.d, maverick.s: Regenerate.
-
-2004-04-22 Peter Barada <peter at the-baradas.com>
-
- * gas/m68k/mcf-mac.s: New test: Check ColdFire MAC instructions.
- * gas/m68k/mcf-emac.s: New test: Similar checks.
- * gas/m68k/mcf-mac.d: New test: Expected output.
- * gas/m68k/mcf-emac.d: New test: Likewise.
- * gas/m68k/all.exp: Run new tests.
-
-2004-04-21 Chris Demetriou <cgd at broadcom.com>
-
- * gas/mips/elempic.d: File removed as part of -membedded-pic removal.
- * gas/mips/empic.d: Likewise.
- * gas/mips/empic.l: Likewise.
- * gas/mips/empic.s: Likewise.
- * gas/mips/empic2.d: Likewise.
- * gas/mips/empic2.s: Likewise.
- * gas/mips/empic3_e.d: Likewise.
- * gas/mips/empic3_e.s: Likewise.
- * gas/mips/empic3_g1.d: Likewise.
- * gas/mips/empic3_g1.s: Likewise.
- * gas/mips/empic3_g2.d: Likewise.
- * gas/mips/empic3_g2.s: Likewise.
- * gas/mips/jal-empic-elf-2.d: Likewise.
- * gas/mips/jal-empic-elf-2.s: Likewise.
- * gas/mips/jal-empic-elf-3.d: Likewise.
- * gas/mips/jal-empic-elf-3.s: Likewise.
- * gas/mips/jal-empic-elf.d: Likewise.
- * gas/mips/jal-empic.d: Likewise.
- * gas/mips/la-empic.d: Likewise.
- * gas/mips/la-empic.s: Likewise.
- * gas/mips/lb-empic.d: Likewise.
- * gas/mips/ld-empic.d: Likewise.
- * gas/mips/lif-empic.d: Likewise.
- * gas/mips/telempic.d: Likewise.
- * gas/mips/tempic.d: Likewise.
- * gas/mips/ulh-empic.d: Likewise.
- * gas/mips/ld-pic.s: Remove code conditional on EMPIC.
- * gas/mips/lifloat.s: Likewise.
- * gas/mips/mips.exp: Remove -membedded-pic tests and related comments.
-
-2004-04-20 Brian Ford <ford at vss.fsi.com>
- DJ Delorie <dj at redhat.com>
-
- * gas/i386/secrel.s: New test for .secrel32.
- * gas/i386/secrel.d: Likewise.
- * gas/i386/i386.exp: Call it for PE targets.
-
-2004-04-19 Jakub Jelinek <jakub at redhat.com>
-
- * gas/cfi/cfi-sparc64-1.d: Update.
-
-2004-04-14 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/vr4122.[sd]: Change option to -mfix-vr4120.
-
-2004-04-14 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/elf/section2.e-mips: Allow named section symbols.
- * gas/mips/{,el}empic.d, gas/mips/mips{,el}16-[ef].d: Likewise.
-
-2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * gas/m32r/parallel-2.s: New file: Test case for parallel code.
- * gas/m32r/parallel-2.d: New file: Expected results.
- * gas/m32r/m32r2.exp: Run the test.
-
- * gas/m32r/seth.s: New file: Test for seth.
- * gas/m32r/seth.d: New file: Expected results.
- * gas/m32r/m32r.exp: Run the new test.
-
-2004-04-01 Asgari Jinia <asgarij at kpitcummins.com>
-
- * gas/sh/renesas-1.s, gas/sh/renesas-1.d: New test for -renesas
- option.
- * gas/sh/basic.exp: Run the new test.
-
-2004-04-01 Dave Korn <dk at artimi.com>
-
- * gas/dlx/alltests.exp: Execute new lohi test.
- * gas/dlx/lohi.s: New test for spurious lo16/hi16
- reloc overflow checking.
- * gas/dlx/lohi.d: New file: expected output.
- * gas/dlx/lhi.d: Updated to properly expect lo16
- relocations where asked for.
- * gas/dlx/itype.d: Likewise.
- * gas/dlx/lhi.d: Corrected cut+paste error in test name.
-
-2004-03-30 Stan Shebs <shebs at apple.com>
-
- * gas/macros/macros.exp: Remove mention of MPW config.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i860/dir-intel03-err.l: Update for junk at end line becoming
- an error.
- * gas/m68hc11/m68hc11.exp: Likewise.
-
-2004-03-23 Andreas Schwab <schwab at suse.de>
-
- * gas/cfi/cfi-m68k.d: Adjust offsets.
-
-2004-03-22 Hans-Peter Nilsson <hp at axis.com>
-
- * gas/cris/regreg.d: Assemble with --no-mul-bug-abort.
- * gas/cris/mulbug-err-1.s, gas/cris/rd-mulbug-1.d: New tests.
-
-2004-03-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/cfi/cfi-sh-1.d: New file.
- * gas/cfi/cfi-sh-1.s: Likewise.
- * gas/cfi/cfi.exp: Add SH case.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * gas/ppc/altivec.d: Update.
- * gas/ppc/altivec_xcoff.d: Update.
- * gas/ppc/altivec_xcoff64.d: Update.
- * gas/ppc/astest.d: Update.
- * gas/ppc/astest2.d: Update.
- * gas/ppc/astest2_64.d: Update.
- * gas/ppc/astest64.d: Update.
- * gas/ppc/booke.d: Update.
- * gas/ppc/booke_xcoff.d: Update.
- * gas/ppc/booke_xcoff64.d: Update.
- * gas/ppc/e500.d: Update.
- * gas/ppc/power4.d: Update.
- * gas/ppc/test1elf32.d: Update.
- * gas/ppc/test1elf64.d: Update.
- * gas/ppc/test1xcoff32.d: Update.
-
-2004-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/padlock.s: Pad with .p2align.
- * gas/i386/padlock.d: Adjust.
-
-2004-03-12 Michal Ludvig <mludvig at suse.cz>
-
- * gas/i386/padlock.s, gas/i386/padlock.d: New tests for
- VIA PadLock instructions.
- * gas/i386/i386.exp: Run padlock tests.
-
-2004-03-12 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/katmai.d: Revert last change.
-
- * gas/i386/katmai.d: Adjust for clflush change.
-
-2004-03-08 Andreas Jaeger <aj at suse.de>
-
- * gas/cfi/cfi-s390x-1.d: Adjust offsets.
-
-2004-03-07 Richard Henderson <rth at redhat.com>
-
- * gas/cfi/cfi-common-2.d, gas/cfi/cfi-i386.d: Adjust offsets.
-
-2004-03-07 Andreas Jaeger <aj at suse.de>
-
- * gas/cfi/cfi-x86_64.d: Adjust offsets.
-
-2004-03-07 Richard Henderson <rth at redhat.com>
-
- * gas/alpha/elf-reloc-8.d, gas/cfi/cfi-alpha-1.d,
- gas/cfi/cfi-alpha-2.d, gas/cfi/cfi-alpha-3.d, gas/cfi/cfi-common-1.d,
- gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d: Adjust offsets.
-
-2004-03-03 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/sh/sh64/err-dsp.s: Fix expected error message.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/frv/fr405-insn.[sdl]: New test.
- * gas/frv/fr450-spr.[sd]: New test.
- * gas/frv/fr450-insn.[sdl]: New test.
- * gas/frv/fr450-media-issue.[sl]: New test.
- * gas/frv/allinsn.exp: Run new tests. Ensure fr405 instructions
- aren't accepted for -mcpu=fr400 or -mcpu=fr500. Ensure fr450
- instructions aren't accepted for -mcpu=fr400, -mcpu=fr405 or
- -mcpu=fr500.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
- (rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
- * gas/frv/allinsn.d: Update accordingly.
-
-2004-02-17 Petko Manolov <petkan at nucleusys.com>
-
- * gas/arm/maverick.c: DSPSC to/from opcode fixes.
- * gas/arm/maverick.d: Likewise.
- * gas/arm/maverick.s: Likewise.
-
-2004-02-09 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/sh/basic.exp: Don't do sh4a tests for sh5.
-
-2004-02-06 Nathan Sidwell <nathan at codesourcery.com>
-
- * gas/macros/test2.s: Lowercase it.
-
-2004-02-02 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * gas/mips/div.d: Update to accomodate changes in macro
- expansions.
- gas/mips/elf-rel-got-n32.d: Likewise.
- gas/mips/elf-rel-got-n64.d: Likewise.
- gas/mips/elf-rel-xgot-n32.d: Likewise.
- gas/mips/elf-rel-xgot-n64.d: Likewise.
- gas/mips/la-svr4pic.d: Likewise.
- gas/mips/la-xgot.d: Likewise.
- gas/mips/lca-svr4pic.d: Likewise.
- gas/mips/lca-xgot.d: Likewise.
-
-2004-02-01 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * gas/sh/sh4a-fp.d: Fix opcode name fssra to fsrra.
- * gas/sh/sh4a-fp.s: Likewise.
- * gas/sh/err-sh4a-fp.s: Likewise.
-
-2004-01-24 Chris Demetriou <cgd at broadcom.com>
-
- * gas/mips/relax-swap1.s: Add extra space at end, so the
- disassembly will consistently have "..." at its end.
- * gas/mips/relax-swap2.s: Likewise.
- * gas/mips/relax-swap1-mips2.d: Expect "..." at end of disassembly.
-
-2004-01-23 Daniel Jacobowitz <drow at mvista.com>
-
- * gas/arm/arm.exp: Add "undefined" test.
- * gas/arm/undefined.s, gas/arm/undefined.l: New files.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/macro-warn-[1234].[sdl]: New tests.
- * gas/mips/macro-warn-[12]-n32.[dl]: New tests.
- * gas/mips/mips.exp: Run them.
-
-2004-01-23 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel19.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-01-11 Tom Rix <tcrix at worldnet.att.net>
-
- * gas/m68hc11/movb.s: Add m68hc12 movb and movw dump test.
- * gas/m68hc11/movb.d: Likewise.
- * gas/m68hc11/m68hc11.exp: Likewise. Add more movb failure tests.
-
-2004-01-19 Alan Modra <amodra at bigpond.net.au>
-
- * gas/i386/katmai.d: Adjust for changed sib printing.
- * gas/i386/prescott.d: Likewise.
- * gas/i386/sse2.d: Likewise.
- * gas/i386/ssemmx2.d: Likewise.
-
-2004-01-16 Alexandre Oliva <aoliva at redhat.com>
-
- * gas/mn10300/mov5.s: New.
- * gas/mn10300/basic.exp (do_mov5): New.
-
-2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
-
- * gas/mips/relax-swap1-mips1.d: New test for branch relaxation
- with swapping for MIPS1.
- * gas/mips/relax-swap1-mips2.d: New test for branch relaxation
- with swapping for MIPS2.
- * gas/mips/relax-swap1.l: Stderr output for the new tests.
- * gas/mips/relax-swap1.s: Source for the new tests.
- * gas/mips/relax-swap2.d: New test for branch likely relaxation
- with swapping.
- * gas/mips/relax-swap2.l: Stderr output for the new test.
- * gas/mips/relax-swap2.s: Source for the new test.
- * gas/mips/mips.exp: Run the new tests.
-
-2004-01-13 Ian Lance Taylor <ian at wasabisystems.com>
-
- * gas/mips/mips16-64.d: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-01-12 Richard Sandiford <rsandifo at redhat.com>
-
- * gas/mips/elf-rel18.[sd]: New test.
- * gas/mips/mips.exp: Run it.
-
-2004-01-09 Paul Brook <paul at codesourcery.com>
-
- * gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
- * gas/arm/arm.exp: Add them.
-
-2004-01-08 Ian Lance Taylor <ian at wasabisystems.com>
-
- * gas/mips/ldstla-n64.d: Pass -64 to assembler, not -n64.
- * gas/mips/ldstla-n64-shared.d: Likewise.
-
-2004-01-07 Nick Clifton <nickc at redhat.com>
-
- * gas/cris/rd-dw2-1.d: Expect a pointer size from readelf.
-
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
- * lib/gas-defs.exp (is_elf_format): Match frv-uclinux.
- 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
- * gas/frv/fdpic.s, gas/frv/fdpic.d: Renamed from ucpic*.
- 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
- * gas/frv/ucpic.s, gas/frv/ucpic.d: Use gr15 as PIC register. Use
- gprel12 for rodata symbol and gotoff12 for sdata symbol.
- 2003-08-08 Alexandre Oliva <aoliva at redhat.com>
- * gas/frv/ucpic.d: Test gotoff and gotofffuncdesc.
- 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
- * gas/frv/ucpic.d, gas/frv/ucpic.s: New.
- * gas/frv/allinsns.exp: Run it.
-
-2004-01-02 Albert Bartoszko <albar at nt.kegel.com.pl>
-
- * gas/msp430/opcode.s: Add test for an 'add' instruction which
- looks similar to an 'rla' instruction.
-
-For older changes see ChangeLog-9303
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/gas/testsuite/ChangeLog-2004
===================================================================
--- branches/binutils/package/gas/testsuite/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1156 @@
+2004-12-31 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/elf/elf.exp: Don't list reloc sections.
+ * gas/elf/section5.e: Remove reloc sections.
+
+2004-12-21 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/beq_insn.d: Update reference file according to
+ disassembler printing method.
+ * gas/crx/bit_insn.d: Likewise.
+ * gas/crx/br_insn.d: Likewise.
+ * gas/crx/cmpbr_insn.d: Likewise.
+ * gas/crx/cop_insn.d: Likewise.
+ * gas/crx/load_stor_insn.d: Likewise.
+
+2004-12-21 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/elf/section5.e, gas/elf/section5.l: Replace [:digit:],
+ [:xdigit:] and {N} in regexps with [0-9], [0-9a-fA-F] and N
+ copies, to cater to tcl versions before Tcl 8.2.3.
+
+2004-12-20 Nick Clifton <nickc at redhat.com>
+
+ * gas/elf/section5.[ls]: Use % instead of @ in .section
+ directives.
+
+2004-12-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/v850/split-lo16.{s,d}: New test.
+ * gas/v850/v850.exp: Run it.
+
+2004-12-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/elf/section5.[els]: New.
+
+2004-12-13 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel25.d, gas/mips/elf-rel25a.d: Cope with different
+ .text alignments.
+
+2004-12-11 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/alpha/elf-usepv-1.d: Update for changed section syms.
+ * gas/arm/mapping.d: Likewise.
+ * gas/mips/tmips16-e.d: Likewise.
+ * gas/mips/tmips16-f.d: Likewise.
+ * gas/mmix/align-1.d: Likewise.
+ * gas/mmix/basep-10.d: Likewise.
+ * gas/mmix/basep-11.d: Likewise.
+ * gas/mmix/basep-7.d: Likewise.
+ * gas/mmix/basep-8.d: Likewise.
+ * gas/mmix/basep-9.d: Likewise.
+ * gas/mmix/builtin1.d: Likewise.
+ * gas/mmix/builtin2.d: Likewise.
+ * gas/mmix/builtin3.d: Likewise.
+ * gas/mmix/bz-c.d: Likewise.
+ * gas/mmix/comment-2.d: Likewise.
+ * gas/mmix/comment-3.d: Likewise.
+ * gas/mmix/cons-2.d: Likewise.
+ * gas/mmix/fb-1.d: Likewise.
+ * gas/mmix/fb-2.d: Likewise.
+ * gas/mmix/geta-c.d: Likewise.
+ * gas/mmix/greg1.d: Likewise.
+ * gas/mmix/greg1a.d: Likewise.
+ * gas/mmix/greg2.d: Likewise.
+ * gas/mmix/greg2a.d: Likewise.
+ * gas/mmix/greg3.d: Likewise.
+ * gas/mmix/greg4.d: Likewise.
+ * gas/mmix/greg5.d: Likewise.
+ * gas/mmix/greg6.d: Likewise.
+ * gas/mmix/greg7.d: Likewise.
+ * gas/mmix/greg8.d: Likewise.
+ * gas/mmix/is-1.d: Likewise.
+ * gas/mmix/jump-c.d: Likewise.
+ * gas/mmix/local-1.d: Likewise.
+ * gas/mmix/locall1.d: Likewise.
+ * gas/mmix/odd-1.d: Likewise.
+ * gas/mmix/op-0-1.d: Likewise.
+ * gas/mmix/op-0-1s.d: Likewise.
+ * gas/mmix/op-0-2.d: Likewise.
+ * gas/mmix/prefix1.d: Likewise.
+ * gas/mmix/prefix2.d: Likewise.
+ * gas/mmix/prefix3.d: Likewise.
+ * gas/mmix/pseudo-1.d: Likewise.
+ * gas/mmix/pushj-c.d: Likewise.
+ * gas/mmix/pushj-cs.d: Likewise.
+ * gas/mmix/sym-1.d: Likewise.
+ * gas/mmix/weak1-s.d: Likewise.
+ * gas/mmix/weak1.d: Likewise.
+ * gas/mmix/zerop-1.d: Likewise.
+ * gas/ppc/power4.d: Likewise.
+ * gas/ppc/test1elf32.d: Likewise.
+ * gas/ppc/test1elf64.d: Likewise.
+ * gas/sh/sh64/datal32-3.d: Likewise.
+ * gas/sh/sh64/datal64-3.d: Likewise.
+ * gas/sh/sh64/localcom-1.d: Likewise.
+
+2004-12-10 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * gas/mips/elf-rel23a.d: New test.
+ * gas/mips/elf-rel23b.d: New test.
+ * gas/mips/elf-rel25.s: New test.
+ * gas/mips/elf-rel25.d: New test.
+ * gas/mips/elf-rel25a.d: New test.
+ * gas/mips/mips.exp: Run new tests.
+
+2004-12-09 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/unwind.d: Expect R_ARM_PREL31 relocations.
+
+2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * gas/mips/branch-swap.d: Pass -32 to as.
+
+2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/br_insn.d: Fix error in expected disassembly.
+
+2004-11-29 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * gas/m32r/rela-1.s: New test.
+ * gas/m32r/rela-1.d: Expected disassembly.
+ * gas/m32r/m32r.exp: Run the new test.
+ * gas/m32r/relax-1.d: Update for fixed pcrel reloc
+ generation.
+
+2004-11-27 Richard Earnshaw <rearnsha at arm.com>
+
+ * gas/arm/thumbv6.d (setend): Remove stray tab at end
+ of dump pattern.
+
+2004-11-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/group-1.d: Adjust expected secion ordering.
+
+2004-11-25 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
+
+2004-11-24 Paul Brook <paul at codesourcery.com>
+
+ * gas/elf/group0a.d: Adjust expected secion ordering.
+ * gas/elf/group1a.d: Ditto.
+ * gas/elf/section4.d: Ditto.
+
+2004-11-24 Nick Clifton <nickc at redhat.com>
+
+ * gas/iq2000/allinsn.exp: Remove IQ10 tests.
+ * gas/iq2000/q10allinsn.d: Delete.
+ * gas/iq2000/q10allinsn.s: Delete.
+ * gas/iq2000/q10hazard4.s: Delete.
+ * gas/iq2000/q10hazard5.s: Delete.
+ * gas/iq2000/q10load-hazards.exp: Delete.
+ * gas/iq2000/q10nohazard.s: Delete.
+ * gas/iq2000/q10noyield.s: Delete.
+ * gas/iq2000/q10test0.d: Delete.
+ * gas/iq2000/q10test0.s: Delete.
+ * gas/iq2000/q10test1.d: Delete.
+ * gas/iq2000/q10test1.s: Delete.
+ * gas/iq2000/q10test10.d: Delete.
+ * gas/iq2000/q10test10.s: Delete.
+ * gas/iq2000/q10test11.d: Delete.
+ * gas/iq2000/q10test11.s: Delete.
+ * gas/iq2000/q10test12.d: Delete.
+ * gas/iq2000/q10test12.s: Delete.
+ * gas/iq2000/q10test2.d: Delete.
+ * gas/iq2000/q10test2.s: Delete.
+ * gas/iq2000/q10test3.d: Delete.
+ * gas/iq2000/q10test3.s: Delete.
+ * gas/iq2000/q10test4.d: Delete.
+ * gas/iq2000/q10test4.s: Delete.
+ * gas/iq2000/q10test5.d: Delete.
+ * gas/iq2000/q10test5.s: Delete.
+ * gas/iq2000/q10test6.d: Delete.
+ * gas/iq2000/q10test6.s: Delete.
+ * gas/iq2000/q10test7.d: Delete.
+ * gas/iq2000/q10test7.s: Delete.
+ * gas/iq2000/q10test8.d: Delete.
+ * gas/iq2000/q10test8.s: Delete.
+ * gas/iq2000/q10test9.d: Delete.
+ * gas/iq2000/q10test9.s: Delete.
+ * gas/iq2000/q10yield.exp: Delete.
+ * gas/iq2000/test.exp: Delete.
+
+2004-11-24 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * gas/arc/st.s: Add checks for other variants of the sr and st
+ instruction.
+ * gas/arc/st.d: Update the expected disassembly.
+
+2004-11-23 Nick Clifton <nickc at redhat.com>
+
+ * gas/mn10300/relax.s: Add further tests of the relaxing of branch
+ instructions.
+ * gas/mn10300/relax.d: Add expected relocations.
+
+2004-11-22 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
+
+ * gas/arc/ld.s: Add check of load of a long immediate.
+ * gas/arc/ld.d: Add expected disassembly.
+
+2004-11-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/all/gas.exp: Run dg-runtest for all err-*.s and warn-*.s.
+ * gas/all/err-1.s, gas/all/warn-1.s: New tests.
+
+2004-11-18 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+
+ * gas/maxq10/call.d: Fix expected results now that bfd assembler
+ support is enabled by default.
+ * gas/maxq10/range.d: Likewise.
+ * gas/maxq20/call.d: Likewise.
+
+2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * gas/arm/mapping.d: Expect F markers for Thumb code.
+ * gas/arm/unwind.d: Update big-endian pattern.
+
+2004-11-12 Nick Clifton <nickc at redhat.com>
+
+ * gas/mn10300/basic.exp: Add relax test.
+ * gas/mn10300/relax.s: New test.
+ * gas/mn10300/relax.d: Expected results. Make sure that the
+ correct size of instruction has been selected.
+
+2004-11-11 Bob Wilson <bob.wilson at acm.org>
+
+ * gas/xtensa/short_branch_offset.s: New.
+ * gas/xtensa/short_branch_offset.d: New.
+ * gas/xtensa/all.exp: Run new test.
+
+2004-11-10 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/opcode.s: Pad section.
+ * gas/i386/intelok.s: Likewise.
+ * gas/i386/opcode.d: Update.
+ * gas/i386/intelok.d: Update.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * gas/maxq10: New directory. Contains tests for maxq port.
+ * gas/maxq20: Likewise.
+
+2004-11-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/general.s: Add movzb.
+ * gas/i386/general.l: Updated.
+
+2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/all/gas.exp: Exclude float.s for crisv32-*-*.
+ * gas/cris/operand-err-1.s (test.m constant): Remove xfail marker
+ and update rationale. Mark "ba [external_symbol]" and "ba [r3]"
+ as invalid.
+ * gas/ieee-fp/x930509a.exp: setup_xfail for crisv32-*-*.
+ * gas/macros/macros.exp: setup_xfail strings for crisv32-*-*.
+ * gas/cris/abs32-1.s, gas/cris/arch-err-1.s,
+ gas/cris/arch-err-2.s, gas/cris/arch-err-3.s,
+ gas/cris/arch-err-4.s, gas/cris/arch-err-5.s,
+ gas/cris/bound-err-1.s, gas/cris/brokw-3b.s,
+ gas/cris/march-err-1.s, gas/cris/march-err-2.s,
+ gas/cris/push-err-1.s, gas/cris/push-err-2.s,
+ gas/cris/pushpopv32.s, gas/cris/rd-abs32-1.d,
+ gas/cris/rd-abs32-2.d, gas/cris/rd-arch-1.d, gas/cris/rd-arch-2.d,
+ gas/cris/rd-arch-3.d, gas/cris/rd-bkw1b.d, gas/cris/rd-bkw2b.d,
+ gas/cris/rd-bkw3b.d, gas/cris/rd-bound1.d, gas/cris/rd-bound1.s,
+ gas/cris/rd-bound2.d, gas/cris/rd-bound3.d, gas/cris/rd-bound4.d,
+ gas/cris/rd-break32.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
+ gas/cris/rd-spr-1.d, gas/cris/rd-spr-1.s, gas/cris/rd-usp-1.d,
+ gas/cris/rd-usp-1b.d, gas/cris/rd-v10_32o-1.d,
+ gas/cris/rd-v10_32o-2.d, gas/cris/rd-v10_32o-2.s,
+ gas/cris/rd-v32-b1.d, gas/cris/rd-v32-b1.s, gas/cris/rd-v32-b2.d,
+ gas/cris/rd-v32-b2.s, gas/cris/rd-v32-b3.d, gas/cris/rd-v32-b3.s,
+ gas/cris/rd-v32-f1.d, gas/cris/rd-v32-f1.s, gas/cris/rd-v32-i1.d,
+ gas/cris/rd-v32-i1.s, gas/cris/rd-v32-l1.d, gas/cris/rd-v32-l1.s,
+ gas/cris/rd-v32-l3.d, gas/cris/rd-v32-l3.s, gas/cris/rd-v32-l4.d,
+ gas/cris/rd-v32-l4.s, gas/cris/rd-v32o-1.d, gas/cris/rd-v32s-1.d,
+ gas/cris/rd-v32s-2.d, gas/cris/rd-v32s-2.s, gas/cris/rd-v32s-3.d,
+ gas/cris/rd-v32s-3.s, gas/cris/rd-v32s-4.d, gas/cris/rd-v32s-4.s,
+ gas/cris/rd-vao-1.d, gas/cris/v32-err-1.s, gas/cris/v32-err-10.s,
+ gas/cris/v32-err-11.s, gas/cris/v32-err-2.s, gas/cris/v32-err-3.s,
+ gas/cris/v32-err-4.s, gas/cris/v32-err-5.s, gas/cris/v32-err-6.s,
+ gas/cris/v32-err-7.s, gas/cris/v32-err-8.s, gas/cris/v32-err-9.s:
+ New tests.
+
+2004-11-04 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/i386.exp: Execute new tests intelbad and intelok.
+ * gas/i386/intelbad.[sl]: New test to check for various things not
+ permitted in Intel mode.
+ * gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
+ Adjust for change to segment register store.
+ * gas/i386/intelok.[sd]: New test to check various Intel mode specific
+ things get handled correctly.
+ * gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
+ 'high' and 'low' parts of an operand, which the parser previously
+ accepted while neither telling that it's not supported nor that it
+ ignored the remainder of the line following these supposed keywords.
+
+2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/cop_insn.d: Regenerate (after a bug fix in Assembler).
+
+2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/cop_insn.s: Test new Co-Processor instruction 'cpi'.
+ * gas/crx/list_insn.s: Add hi/lo/u<N> registers tests, fix test bugs.
+ * gas/crx/cop_insn.d: Regenerate.
+ * gas/crx/list_insn.d: Likewise.
+
+2004-10-23 Daniel Jacobowitz <dan at debian.org>
+
+ * gas/cfi/cfi-arm-1.d, gas/cfi/cfi-arm-1.s: New files.
+ * gas/cfi/cfi.exp: Run cfi-arm-1 test.
+
+2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/cop_insn.s: Reverse operands order in store co-processor
+ instructions.
+ * gas/crx/list_insn.s: Remove test for unsupported 'popa' instruction.
+ * gas/crx/cop_insn.d: Regenerate.
+ * gas/crx/list_insn.d: Likewise.
+
+2004-10-14 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/mapping.d: Pass --special-syms to objdump.
+
+2004-10-08 Daniel Jacobowitz <dan at debian.org>
+
+ * gas/i386/i386.exp: Don't run divide test for targets where '/'
+ is a comment. Run x86-64-unwind for 64-bit ELF targets.
+ * gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New.
+
+2004-10-08 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/cfi/cfi-common-4.d: Correct for 64 bit targets.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+
+ * gas/xtensa/all.exp: Adjust expected error message for j_too_far.
+ Change entry_align test to expect an error.
+ * gas/xtensa/entry_misalign2.s: Use no-transform instead of
+ no-generics directives.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel{23,24}.[sd]: New tests.
+ * gas/mips/mips.exp: New test.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel22.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-10-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel21.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-10-07 Jan Beulich <jbeulich at novell.com>
+
+ * gas/cfi/cfi-common-4.[ds]: New.
+ * gas/cfi/cfi.exp: Run new test.
+
+2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx/cop_insn.s: New file.
+ * gas/crx/cop_insn.d: Likewise.
+ * gas/crx/load_stor_insn.s: Move Co-processor insns to a separate
+ test.
+ * gas/crx/misc_insn.s: Likewise.
+ * gas/crx/load_stor_insn.d: Regenerate.
+ * gas/crx/misc_insn.d: Likewise.
+
+2004-10-06 Aldy Hernandez <aldyh at redhat.com>
+
+ * gas/ppc/e500.s: Add double-precision instructions.
+ * gas/ppc/e500.d: Same.
+
+2004-10-05 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/arm.exp: Add unwind table test. Recognise
+ arm-symbian-symbianelf and arm-none-eabi.
+ * gas/arm/unwind.s: New file.
+ * gas/arm/unwind.d: New file.
+
+2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
+
+ * gas/pdp11/opcode.d: Fix sob opcode value.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/arch6zk.d: New file.
+ * gas/arm/arch6zk.s: New file.
+ * gas/arm/arm.exp: Add them.
+
+2004-09-29 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/secrel.s: Pad .rdata out to 16 byte boundary.
+ * gas/i386/secrel.d: Adjust to suit.
+
+2004-09-19 Paul Brook <paul at codesourcery.com>
+
+ * gas/elf/elf.exp: Recognise additional arm elf targets.
+
+2004-09-17 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/pic.s: Add (target2).
+ * gas/arm/pic.d: Ditto.
+
+2004-09-13 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/pic.d: Rename RELABS to TARGET1.
+ * gas/arm/pic.s: Ditto.
+
+2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/crx: New directory.
+ * gas/crx/allinsn.exp: New test script.
+ * gas/crx/arith_insn.s: New file.
+ * gas/crx/arith_insn.d: Likewise.
+ * gas/crx/beq_insn.s: Likewise.
+ * gas/crx/beq_insn.d: Likewise.
+ * gas/crx/bit_insn.s: Likewise.
+ * gas/crx/bit_insn.d: Likewise.
+ * gas/crx/br_insn.s: Likewise.
+ * gas/crx/br_insn.d: Likewise.
+ * gas/crx/cmov_insn.s: Likewise.
+ * gas/crx/cmov_insn.d: Likewise.
+ * gas/crx/cmpbr_insn.s: Likewise.
+ * gas/crx/cmpbr_insn.d: Likewise.
+ * gas/crx/jscond_insn.s: Likewise.
+ * gas/crx/jscond_insn.d: Likewise.
+ * gas/crx/list_insn.s: Likewise.
+ * gas/crx/list_insn.d: Likewise.
+ * gas/crx/load_stor_insn.s: Likewise.
+ * gas/crx/load_stor_insn.d: Likewise.
+ * gas/crx/misc_insn.s: Likewise.
+ * gas/crx/misc_insn.d: Likewise.
+ * gas/crx/no_op_insn.s: Likewise.
+ * gas/crx/no_op_insn.d: Likewise.
+ * gas/crx/shift_insn.s: Likewise.
+ * gas/crx/shift_insn.d: Likewise.
+
+2004-08-27 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/frv/fr550-pack1.[sd]: New test.
+ * gas/frv/allinsn.exp: Run it.
+
+2004-08-27 Nick Clifton <nickc at redhat.com>
+
+ * gas/i386/i386.exp: Allow pcrel test for COFF targets as well,
+ but not for PE targets. Similarly for the absrel test.
+
+2004-08-26 Nick Clifton <nickc at redhat.com>
+
+ * gas/i386/i386.exp: Group ELF specific tests together. Move the
+ pcrel test into the ELF only section. Use is_elf_format to test
+ for ELF based toolchains.
+
+2004-08-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/all/gas.exp: Use `string match ""' instead of `eq ""'.
+
+2004-08-24 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/altmacro.[sd]: Split out part from here...
+ * gas/all/altmac2.[sd]: ... to here.
+ * gas/all/excl.s: New.
+ * gas/all/gas.exp: Suppress both tests for a few targets known to
+ break. Run the new (split out) test only when the target doesn't
+ use '!' as a comment character.
+
+2004-08-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * gas/mips/branch-swap.s: New testcase.
+ * gas/mips/branch-swap.d: New testcase.
+ * gas/mips/mips.exp: Run the testcase.
+
+2004-08-18 Nick Clifton <nickc at redhat.com>
+
+ * gas/macros/strings.s: Remove #NO_APP, accidentally committed as
+ part of another patch.
+
+2004-08-15 Nick Clifton <nickc at redhat.com>
+
+ * gas/all/altmacro.d: Allow for rest of frag being padded to an
+ alignment boundary.
+
+ * gas/arm/arm.exp: Run bignum test for ELF based targets only.
+
+2004-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/cfi/cfi-alpha-1.d: Adjust for readelf fix.
+ * gas/cfi/cfi-alpha-3.d: Likewise.
+ * gas/cfi/cfi-i386.d: Likewise.
+ * gas/cfi/cfi-m68k.d: Likewise.
+ * gas/cfi/cfi-ppc-1.d: Likewise.
+ * gas/cfi/cfi-s390-1.d: Likewise.
+ * gas/cfi/cfi-s390x-1.d: Likewise.
+ * gas/cfi/cfi-sh-1.d: Likewise.
+ * gas/cfi/cfi-sparc-1.d: Likewise.
+ * gas/cfi/cfi-sparc64-1.d: Likewise.
+ * gas/cfi/cfi-x86_64.d: Likewise.
+
+2004-08-13 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/altmacro.[sd]: New test.
+ * gas/all/gas.exp: Run the new test.
+
+2004-08-10 Mark Mitchell <mark at codesourcery.com>
+
+ * gas/arm/bignum1.s: New test.
+ * gas/arm/arm.exp: Run it.
+
+2004-08-06 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/pic.s,d: Test RELABS and SBREL relocations.
+
+2004-08-05 Nitin Yewale <nitiny at kpitcummins.com>
+
+ * h8300/h8300.exp: Addition of new test case to check rx
+ generation with adds and subs instruction for plain H8/300 target.
+ * h8300/addsubrxcheck.s: New test source file.
+
+2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
+
+ * gas/m68hc11/m68hc11.exp: Fix tests for 2.15
+ * gas/elf/elf.exp: Test obj-elf for m6811-* and m6812-*
+ * gas/symver/symver.exp: Likewise for symver tests.
+
+2004-07-30 Michal Ludvig <mludvig at suse.cz>
+
+ * gas/i386/padlock.s, gas/i386/padlock.d: New tests for
+ VIA PadLock instructions.
+
+2004-07-29 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/sh/basic.exp: Don't do sh2a test for sh5.
+ * gas/sh/sh2a.d: Match elf32-sh* format too.
+
+2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-12-30 DJ Delorie <dj at redhat.com>
+ * gas/sh/sh2a.s: New.
+ * gas/sh/sh2a.d: New.
+ * gas/sh/basic.exp: Add it.
+
+2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * gas/all/gas.exp (do_930509a): Disable test for crx.
+
+2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/x86-64-inval.l: Remove the leading `+'.
+
+2004-07-22 Nick Clifton <nickc at redhat.com>
+
+ PR/280
+ * gas/h8300/ffxx1-coff.d: Remove duplicated raw insn values.
+ * gas/h8300/ffxx1-elf.d: Likewise.
+ * gas/h8300/h8sx_disp2.d: Likewise.
+ * gas/h8300/h8sx_mov_imm.d: Likewise.
+ * gas/h8300/h8sx_rtsl.d: Likewise.
+ * gas/h8300/ffxx1-coff.s: Remove inappropriate insn width specifier.
+ * gas/h8300/ffxx1-elf.s: Likewise.
+
+2004-07-21 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/x86-64-addr32.[ds]: New test for x86-64 32-bit
+ addressing in 64-bit mode.
+ * gas/i386/x86-64-rip.[ds]: New test for x86-64 rip-relative
+ addressing.
+ * gas/i386/i386.exp: Run the two new tests.
+
+ * gas/cfi/cfi-x86_64.d: Adjust expectation for leave to not have a
+ rex prefix.
+ * gas/i386/x86-64-inval.[ls]: Add a bunch of instructions illegal
+ in 64-bit mode.
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/elf-rel19.d: Pass -march=mips1 to gas as the test
+ expects load delay slots.
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/vr5400.d: Update for a correct disassembly of
+ "racm.ob".
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/mips32.s: Adjust for the unified "break" syntax. Add
+ another "break" case. Update the comment accordingly.
+ * gas/mips/set-arch.s: Likewise.
+ * gas/mips/mips32.d: Adjust for the new output.
+ * gas/mips/set-arch.d: Likewise.
+
+2004-07-15 Nitin Yewale <nitiny at kpitcummins.com>
+
+ * gas/h8300/h8300.exp (do_h8300hn_addressgen): Addition of
+ new test case for H8300H normal target to check symbol
+ address generation.
+ * gas/h8300/symaddgen.s: New test.
+
+2004-07-13 Nick Clifton <nickc at redhat.com>
+
+ * gas/i386/intel.s: Add test of newly expand arithmetic support
+ for Intel mode assembler.
+ * gas/i386/intel.d: Add expected disassmbly.
+
+2004-07-13 Nick Clifton <nickc at redhat.com>
+
+ * gas/vtable: Delete directory. These tests are no longer needed
+ as the VTABLE_ reloc support is obsolete.
+
+2004-07-08 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * gas/m32r/pic.exp: Add New Test case for @GOTOFF, @GOT, @PLT.
+ * gas/m32r/pic2.s: New file: Test case for @GOTOFF, @GOT, @PLT.
+ * gas/m32r/pic2.d: New file: Expected results.
+
+2004-07-08 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel7.d: Expect relocations against bar to refer to bar.
+ * gas/mips/elf-refl19.d: Likewise L2.
+
+2004-07-03 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf{,el}-rel.d: Adjust so that the earliest %hi() matches
+ the earliest %lo().
+ * gas/mips/elf-rel11.d: Don't expect the relocs to be reordered.
+ * gas/mips/elf-rel20.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-07-03 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/elf-rel9.[sd]: Fix typo in %lo() expression.
+
+2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/group-1.d: New.
+ * gas/ia64/group-1.s: Likewise.
+
+ * gas/ia64/ia64.exp: Add group-1 to test comdat group.
+
+2004-06-30 James E Wilson <wilson at specifixinc.com>
+
+ * gas/ia64/dv-imply.d: Update.
+ * gas/ia64/dv-mutex.d: Likewise.
+ * gas/ia64/dv-safe.d: Likewise.
+
+2004-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/m68k/mode5.s: Pad section.
+ * gas/m68k/mode5.d: Update.
+
+2004-06-28 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/ppc/power4.d: Update.
+
+2004-06-24 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/prescott.s: Remove fisttpd and fisttpq.
+ * gas/i386/prescott.d: Update.
+
+2004-06-08 Jakub Jelinek <jakub at redhat.com>
+
+ * gas/ia64/dv-raw-err.s: Add some new postinc tests.
+ * gas/ia64/dv-raw-err.l: Updated.
+
+2004-05-28 Peter Barada <peter at the-baradas.com>
+
+ * gas/m68k/mode5.s: New test file. Checks conversion of mode 5
+ addressing with zero offset into mode 2 addressing.
+ * gas/m68k/mode5.d: New file: Expected disassmbly.
+ * gas/m68k/all.exp: Run new test.
+
+2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * gas/sh/arch: New directory.
+ * gas/sh/arch/arch.exp: New test script.
+ * gas/sh/arch/arch_expected.txt: New file.
+ * gas/sh/arch/sh.s: New file.
+ * gas/sh/arch/sh2.s: New file.
+ * gas/sh/arch/sh-dsp.s: New file.
+ * gas/sh/arch/sh2e.s: New file.
+ * gas/sh/arch/sh3-nommu.s: New file.
+ * gas/sh/arch/sh3.s: New file.
+ * gas/sh/arch/sh3-dsp.s: New file.
+ * gas/sh/arch/sh3e.s: New file.
+ * gas/sh/arch/sh4-nommu-nofpu.s: New file.
+ * gas/sh/arch/sh4-nofpu.s: New file.
+ * gas/sh/arch/sh4.s: New file.
+ * gas/sh/arch/sh4a-nofpu.s: New file.
+ * gas/sh/arch/sh4al-dsp.s: New file.
+ * gas/sh/arch/sh4a.s: New file.
+
+2004-05-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/regs.d: Updated.
+
+2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/ia64.exp: Run invalid-ar.
+
+ * gas/ia64/invalid-ar.l: New file. Test invalid AR access.
+ * gas/ia64/invalid-ar.s: Likewise.
+
+2004-05-24 Peter Barada <peter at the-baradas.com>
+
+ * gas/m68k/mcf-emac.d: Provide correct disassembler results.
+ * gas/m68k/mcf-mac.d: Provide correct disassembler results.
+
+2004-05-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/dv-srlz.d: Fix a typo.
+
+2004-05-12 Ben Elliston <bje at au.ibm.com>
+
+ * gas/h8300/t03_add.exp: Remove stray semicolons.
+ * gas/h8300/t04_sub.exp: Likewise.
+ * gas/h8300/t05_cmp.exp: Likewise.
+ * gas/h8300/t08_or.exp: Likewise.
+ * gas/h8300/t09_xor.exp: Likewise.
+ * gas/h8300/t10_and.exp: Likewise.
+ * gas/hppa/reloc/reloc.exp: Likewise.
+ * gas/hppa/unsorted/unsorted.exp: Likewise.
+ * gas/i386/i386.exp: Likewise.
+ * gas/m68hc11/m68hc11.exp: Likewise.
+ * gas/mips/mips.exp: Likewise.
+ * gas/sparc/sparc.exp: Likewise.
+ * lib/gas-defs.exp: Likewise.
+
+2004-05-11 Nick Clifton <nickc at redhat.com>
+
+ * gas/elf/section4.s: New test. Checks label arithmetic when
+ multiple same-name sections exist.
+ * gas/elf/section4.d: New file: Expected section list
+ * gas/elf/elf.exp: Run the new test.
+ * gas/elf/group0.s: Use % instead of @ for type argument to
+ .section directive (for compatability with ARM port).
+ * gas/elf/group1.s: Likewise.
+
+2004-05-07 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/vr4122.[sd]: Rename to...
+ * gas/mips/vr4120-2.[sd]: ...and add tests for VR4181A errata
+ MD(1) and MD(4).
+ * gas/mips/mips.exp: Update accordingly.
+
+2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * gas/frv/reloc1.d: Match elf32-frvfdpic as well.
+ * gas/frv/fr405-insn.d: Likewise.
+ * gas/frv/fr450-insn.d: Likewise.
+
+2004-04-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/elf/elf.exp: Remove group1, add group1a and group1b for
+ section group.
+
+ * gas/elf/group1a.d: New file.
+ * gas/elf/group1b.d: Likewise.
+
+ * gas/elf/group1.e: Removed.
+
+2004-04-30 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/reg-alias.s: New file: Test case sensitive register
+ aliases.
+ * gas/arm/reg-alias.d: New file: Expected test output.
+ * gas/arm/arm.exp: Run reg-alias test.
+ Arrange tests in a more orderly fashion.
+
+2004-04-30 Ben Elliston <bje at au.ibm.com>
+
+ * gas/ppc/power4.s: Add dcbz and dcbzl test cases.
+ * gas/ppc/power4.d: Update accordingly.
+
+2004-04-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/elf/elf.exp: Add group0a, group0b and group1 for section
+ group.
+
+ * gas/elf/group0.s: New file.
+ * gas/elf/group0a.d: Likewise.
+ * gas/elf/group0b.d: Likewise.
+ * gas/elf/group1.e: Likewise.
+ * gas/elf/group1.s: Likewise.
+
+2004-04-23 Nick Clifton <nickc at redhat.com>
+
+ * gas/symver/symver1.d: Cope with extra symbols inserted by
+ arm-elf toolchains.
+ * gas/symver/symver0.d: Likewise
+ * gas/elf/symver.d: Likewise.
+
+2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/sh/pcrel2.d: Update.
+ * gas/sh/tlsd.d: Update.
+ * gas/sh/tlsnopic.d: Update.
+ * gas/sh/tlspic.d: Update.
+
+2004-04-22 Mark Kettenis <kettenis at gnu.org>
+
+ * lib/gas-defs.exp (is_elf_format): Add OpenBSD support.
+
+2004-04-22 Atsushi Nemoto <anemo at mba.ocn.ne.jp>
+
+ * gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot.
+ * gas/mips/mips-abi32-pic.d: Likewise.
+ * gas/mips/mips-abi32-pic2.d: Likewise.
+ * gas/mips/mips-gp32-fp32-pic.d: Likewise.
+ * gas/mips/mips-gp32-fp64-pic.d: Likewise.
+ * gas/mips/mips-gp64-fp32-pic.d: Likewise.
+ * gas/mips/mips-gp64-fp64-pic.d: Likewise.
+ * gas/mips/relax-swap1-mips2.d: Likewise.
+ * gas/mips/lb-svr4pic-ilocks.d: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-04-22 Paul Brook <paul at codesourcery.com>
+
+ * maverick.c (off8s): Test full shifted operand range.
+ (MCC2): Define.
+ (MVDSPACC, MVACCDSP): Use it.
+ * maverick.d, maverick.s: Regenerate.
+
+2004-04-22 Peter Barada <peter at the-baradas.com>
+
+ * gas/m68k/mcf-mac.s: New test: Check ColdFire MAC instructions.
+ * gas/m68k/mcf-emac.s: New test: Similar checks.
+ * gas/m68k/mcf-mac.d: New test: Expected output.
+ * gas/m68k/mcf-emac.d: New test: Likewise.
+ * gas/m68k/all.exp: Run new tests.
+
+2004-04-21 Chris Demetriou <cgd at broadcom.com>
+
+ * gas/mips/elempic.d: File removed as part of -membedded-pic removal.
+ * gas/mips/empic.d: Likewise.
+ * gas/mips/empic.l: Likewise.
+ * gas/mips/empic.s: Likewise.
+ * gas/mips/empic2.d: Likewise.
+ * gas/mips/empic2.s: Likewise.
+ * gas/mips/empic3_e.d: Likewise.
+ * gas/mips/empic3_e.s: Likewise.
+ * gas/mips/empic3_g1.d: Likewise.
+ * gas/mips/empic3_g1.s: Likewise.
+ * gas/mips/empic3_g2.d: Likewise.
+ * gas/mips/empic3_g2.s: Likewise.
+ * gas/mips/jal-empic-elf-2.d: Likewise.
+ * gas/mips/jal-empic-elf-2.s: Likewise.
+ * gas/mips/jal-empic-elf-3.d: Likewise.
+ * gas/mips/jal-empic-elf-3.s: Likewise.
+ * gas/mips/jal-empic-elf.d: Likewise.
+ * gas/mips/jal-empic.d: Likewise.
+ * gas/mips/la-empic.d: Likewise.
+ * gas/mips/la-empic.s: Likewise.
+ * gas/mips/lb-empic.d: Likewise.
+ * gas/mips/ld-empic.d: Likewise.
+ * gas/mips/lif-empic.d: Likewise.
+ * gas/mips/telempic.d: Likewise.
+ * gas/mips/tempic.d: Likewise.
+ * gas/mips/ulh-empic.d: Likewise.
+ * gas/mips/ld-pic.s: Remove code conditional on EMPIC.
+ * gas/mips/lifloat.s: Likewise.
+ * gas/mips/mips.exp: Remove -membedded-pic tests and related comments.
+
+2004-04-20 Brian Ford <ford at vss.fsi.com>
+ DJ Delorie <dj at redhat.com>
+
+ * gas/i386/secrel.s: New test for .secrel32.
+ * gas/i386/secrel.d: Likewise.
+ * gas/i386/i386.exp: Call it for PE targets.
+
+2004-04-19 Jakub Jelinek <jakub at redhat.com>
+
+ * gas/cfi/cfi-sparc64-1.d: Update.
+
+2004-04-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/vr4122.[sd]: Change option to -mfix-vr4120.
+
+2004-04-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/elf/section2.e-mips: Allow named section symbols.
+ * gas/mips/{,el}empic.d, gas/mips/mips{,el}16-[ef].d: Likewise.
+
+2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * gas/m32r/parallel-2.s: New file: Test case for parallel code.
+ * gas/m32r/parallel-2.d: New file: Expected results.
+ * gas/m32r/m32r2.exp: Run the test.
+
+ * gas/m32r/seth.s: New file: Test for seth.
+ * gas/m32r/seth.d: New file: Expected results.
+ * gas/m32r/m32r.exp: Run the new test.
+
+2004-04-01 Asgari Jinia <asgarij at kpitcummins.com>
+
+ * gas/sh/renesas-1.s, gas/sh/renesas-1.d: New test for -renesas
+ option.
+ * gas/sh/basic.exp: Run the new test.
+
+2004-04-01 Dave Korn <dk at artimi.com>
+
+ * gas/dlx/alltests.exp: Execute new lohi test.
+ * gas/dlx/lohi.s: New test for spurious lo16/hi16
+ reloc overflow checking.
+ * gas/dlx/lohi.d: New file: expected output.
+ * gas/dlx/lhi.d: Updated to properly expect lo16
+ relocations where asked for.
+ * gas/dlx/itype.d: Likewise.
+ * gas/dlx/lhi.d: Corrected cut+paste error in test name.
+
+2004-03-30 Stan Shebs <shebs at apple.com>
+
+ * gas/macros/macros.exp: Remove mention of MPW config.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i860/dir-intel03-err.l: Update for junk at end line becoming
+ an error.
+ * gas/m68hc11/m68hc11.exp: Likewise.
+
+2004-03-23 Andreas Schwab <schwab at suse.de>
+
+ * gas/cfi/cfi-m68k.d: Adjust offsets.
+
+2004-03-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/cris/regreg.d: Assemble with --no-mul-bug-abort.
+ * gas/cris/mulbug-err-1.s, gas/cris/rd-mulbug-1.d: New tests.
+
+2004-03-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/cfi/cfi-sh-1.d: New file.
+ * gas/cfi/cfi-sh-1.s: Likewise.
+ * gas/cfi/cfi.exp: Add SH case.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/ppc/altivec.d: Update.
+ * gas/ppc/altivec_xcoff.d: Update.
+ * gas/ppc/altivec_xcoff64.d: Update.
+ * gas/ppc/astest.d: Update.
+ * gas/ppc/astest2.d: Update.
+ * gas/ppc/astest2_64.d: Update.
+ * gas/ppc/astest64.d: Update.
+ * gas/ppc/booke.d: Update.
+ * gas/ppc/booke_xcoff.d: Update.
+ * gas/ppc/booke_xcoff64.d: Update.
+ * gas/ppc/e500.d: Update.
+ * gas/ppc/power4.d: Update.
+ * gas/ppc/test1elf32.d: Update.
+ * gas/ppc/test1elf64.d: Update.
+ * gas/ppc/test1xcoff32.d: Update.
+
+2004-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/padlock.s: Pad with .p2align.
+ * gas/i386/padlock.d: Adjust.
+
+2004-03-12 Michal Ludvig <mludvig at suse.cz>
+
+ * gas/i386/padlock.s, gas/i386/padlock.d: New tests for
+ VIA PadLock instructions.
+ * gas/i386/i386.exp: Run padlock tests.
+
+2004-03-12 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/katmai.d: Revert last change.
+
+ * gas/i386/katmai.d: Adjust for clflush change.
+
+2004-03-08 Andreas Jaeger <aj at suse.de>
+
+ * gas/cfi/cfi-s390x-1.d: Adjust offsets.
+
+2004-03-07 Richard Henderson <rth at redhat.com>
+
+ * gas/cfi/cfi-common-2.d, gas/cfi/cfi-i386.d: Adjust offsets.
+
+2004-03-07 Andreas Jaeger <aj at suse.de>
+
+ * gas/cfi/cfi-x86_64.d: Adjust offsets.
+
+2004-03-07 Richard Henderson <rth at redhat.com>
+
+ * gas/alpha/elf-reloc-8.d, gas/cfi/cfi-alpha-1.d,
+ gas/cfi/cfi-alpha-2.d, gas/cfi/cfi-alpha-3.d, gas/cfi/cfi-common-1.d,
+ gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d: Adjust offsets.
+
+2004-03-03 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/sh/sh64/err-dsp.s: Fix expected error message.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/frv/fr405-insn.[sdl]: New test.
+ * gas/frv/fr450-spr.[sd]: New test.
+ * gas/frv/fr450-insn.[sdl]: New test.
+ * gas/frv/fr450-media-issue.[sl]: New test.
+ * gas/frv/allinsn.exp: Run new tests. Ensure fr405 instructions
+ aren't accepted for -mcpu=fr400 or -mcpu=fr500. Ensure fr450
+ instructions aren't accepted for -mcpu=fr400, -mcpu=fr405 or
+ -mcpu=fr500.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
+ (rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
+ * gas/frv/allinsn.d: Update accordingly.
+
+2004-02-17 Petko Manolov <petkan at nucleusys.com>
+
+ * gas/arm/maverick.c: DSPSC to/from opcode fixes.
+ * gas/arm/maverick.d: Likewise.
+ * gas/arm/maverick.s: Likewise.
+
+2004-02-09 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/sh/basic.exp: Don't do sh4a tests for sh5.
+
+2004-02-06 Nathan Sidwell <nathan at codesourcery.com>
+
+ * gas/macros/test2.s: Lowercase it.
+
+2004-02-02 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * gas/mips/div.d: Update to accomodate changes in macro
+ expansions.
+ gas/mips/elf-rel-got-n32.d: Likewise.
+ gas/mips/elf-rel-got-n64.d: Likewise.
+ gas/mips/elf-rel-xgot-n32.d: Likewise.
+ gas/mips/elf-rel-xgot-n64.d: Likewise.
+ gas/mips/la-svr4pic.d: Likewise.
+ gas/mips/la-xgot.d: Likewise.
+ gas/mips/lca-svr4pic.d: Likewise.
+ gas/mips/lca-xgot.d: Likewise.
+
+2004-02-01 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * gas/sh/sh4a-fp.d: Fix opcode name fssra to fsrra.
+ * gas/sh/sh4a-fp.s: Likewise.
+ * gas/sh/err-sh4a-fp.s: Likewise.
+
+2004-01-24 Chris Demetriou <cgd at broadcom.com>
+
+ * gas/mips/relax-swap1.s: Add extra space at end, so the
+ disassembly will consistently have "..." at its end.
+ * gas/mips/relax-swap2.s: Likewise.
+ * gas/mips/relax-swap1-mips2.d: Expect "..." at end of disassembly.
+
+2004-01-23 Daniel Jacobowitz <drow at mvista.com>
+
+ * gas/arm/arm.exp: Add "undefined" test.
+ * gas/arm/undefined.s, gas/arm/undefined.l: New files.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/macro-warn-[1234].[sdl]: New tests.
+ * gas/mips/macro-warn-[12]-n32.[dl]: New tests.
+ * gas/mips/mips.exp: Run them.
+
+2004-01-23 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel19.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-01-11 Tom Rix <tcrix at worldnet.att.net>
+
+ * gas/m68hc11/movb.s: Add m68hc12 movb and movw dump test.
+ * gas/m68hc11/movb.d: Likewise.
+ * gas/m68hc11/m68hc11.exp: Likewise. Add more movb failure tests.
+
+2004-01-19 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/katmai.d: Adjust for changed sib printing.
+ * gas/i386/prescott.d: Likewise.
+ * gas/i386/sse2.d: Likewise.
+ * gas/i386/ssemmx2.d: Likewise.
+
+2004-01-16 Alexandre Oliva <aoliva at redhat.com>
+
+ * gas/mn10300/mov5.s: New.
+ * gas/mn10300/basic.exp (do_mov5): New.
+
+2004-01-14 Maciej W. Rozycki <macro at ds2.pg.gda.pl>
+
+ * gas/mips/relax-swap1-mips1.d: New test for branch relaxation
+ with swapping for MIPS1.
+ * gas/mips/relax-swap1-mips2.d: New test for branch relaxation
+ with swapping for MIPS2.
+ * gas/mips/relax-swap1.l: Stderr output for the new tests.
+ * gas/mips/relax-swap1.s: Source for the new tests.
+ * gas/mips/relax-swap2.d: New test for branch likely relaxation
+ with swapping.
+ * gas/mips/relax-swap2.l: Stderr output for the new test.
+ * gas/mips/relax-swap2.s: Source for the new test.
+ * gas/mips/mips.exp: Run the new tests.
+
+2004-01-13 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * gas/mips/mips16-64.d: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-01-12 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/elf-rel18.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2004-01-09 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
+ * gas/arm/arm.exp: Add them.
+
+2004-01-08 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * gas/mips/ldstla-n64.d: Pass -64 to assembler, not -n64.
+ * gas/mips/ldstla-n64-shared.d: Likewise.
+
+2004-01-07 Nick Clifton <nickc at redhat.com>
+
+ * gas/cris/rd-dw2-1.d: Expect a pointer size from readelf.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
+ * lib/gas-defs.exp (is_elf_format): Match frv-uclinux.
+ 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
+ * gas/frv/fdpic.s, gas/frv/fdpic.d: Renamed from ucpic*.
+ 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
+ * gas/frv/ucpic.s, gas/frv/ucpic.d: Use gr15 as PIC register. Use
+ gprel12 for rodata symbol and gotoff12 for sdata symbol.
+ 2003-08-08 Alexandre Oliva <aoliva at redhat.com>
+ * gas/frv/ucpic.d: Test gotoff and gotofffuncdesc.
+ 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
+ * gas/frv/ucpic.d, gas/frv/ucpic.s: New.
+ * gas/frv/allinsns.exp: Run it.
+
+2004-01-02 Albert Bartoszko <albar at nt.kegel.com.pl>
+
+ * gas/msp430/opcode.s: Add test for an 'add' instruction which
+ looks similar to an 'rla' instruction.
+
+For older changes see ChangeLog-9303
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/gas/testsuite/ChangeLog-2005
===================================================================
--- branches/binutils/package/gas/testsuite/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1679 @@
+2005-12-22 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/cond.s: Also check .if works on equates to undefined
+ when the expression value can be known without knowing the
+ value of the symbol.
+ * gas/all/cond.l: Adjust.
+ * gas/i386/equ.s: Also check .if works on (equates to)
+ registers when the expression value can be known without
+ knowing the value of the register.
+ * gas/i386/equ.e: Adjust.
+
+2005-12-14 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/rex.[sd]: New.
+ * gas/i386/i386.exp: Run new test.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * gas/mt: Renamed from ms1 dir. Update file names as needed.
+ * gas/mt/errors.exp: Replace ms1 arch with mt arch.
+ * gas/mt/mt.exp: Replace ms1 arch with mt arch.
+ * gas/mt/relocs.exp: Replace ms1 arch with mt arch.
+
+2005-12-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/cris/rd-bcnst-pic.d, gas/cris/rd-branch-pic.d,
+ gas/cris/rd-brokw-pic-1.d, gas/cris/rd-brokw-pic-2.d,
+ gas/cris/rd-brokw-pic-3.d, gas/cris/rd-fragtest-pic.d: New tests.
+
+2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR gas/1874
+ * gas/i386/i386.exp: Add x86-64-prescott for 64bit.
+
+ * gas/i386/prescott.s: Test address size override for monitor.
+ * gas/i386/prescott.d: Updated.
+
+ * gas/i386/x86-64-prescott.d: New file.
+ * gas/i386/x86-64-prescott.s: Likewise.
+
+2005-12-06 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/cris/rd-pcplus.s, gas/cris/rd-pcplus.d: New test.
+
+2005-11-24 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * gas/macros/purge.l: Increment line numbers.
+ * gas/macros/purge.s: Add ".data" line.
+
+ Bug gas/1896
+ * gas/all/redef2.d: Allow "$DATA$" as well as ".data" in matches.
+ * gas/all/weakref1.d: Allow "$CODE$" as well as ".text" in matches.
+ * gas/hppa/reloc/reloc.exp: Adjust regexp for new output.
+
+2005-11-23 Daniel Jacobowitz <dan at codesourcery.com>
+ Thiemo Seufer <ths at networkno.de>
+
+ * gas/mips/bge.d, gas/mips/bge.s, gas/mips/bgeu.d, gas/mips/bgeu.s,
+ gas/mips/blt.d, gas/mips/blt.s, gas/mips/bltu.d,
+ gas/mips/bltu.s: Reactivate external branch tests.
+ * gas/mips/branch-misc-2.d, gas/mips/branch-misc-2pic.d,
+ gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic-64.d: New
+ tests.
+ * gas/mips/branch-misc-2.l, gas/mips/branch-misc-2pic.l,
+ gas/testsuite/gas/mips/branch-misc-2pic.s: Remove.
+ * gas/mips/mips.exp: Adjust branch-misc-2 tests. Add 64-bit
+ variants.
+
+2005-11-22 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * gas/all/quad.d: Add -j "\$DATA\$". Modify regexp to check for
+ "$DATA$" as well as ".data".
+ * gas/all/sleb128.d: Likewise.
+
+2005-11-20 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ Bug gas/1894 Bug gas/1895
+ * gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
+ * gas/all/redef.d: Add -j "\$DATA\$". Modify regexp to check for
+ "$DATA$" as well as ".data".
+ * gas/all/redef2.d: Likewise.
+
+ Bug gas/1879
+ * gas/all/weakref1.d: Check for "$CODE$" as well as ".text".
+ * gas/all/weakref1.s: Indent "-ld1 = l".
+ * gas/all/weakref1g.d: Remove --no-sort option.
+ * gas/all/weakref1l.d: Likewise.
+ * gas/all/weakref1u.d: Likewise. Sort expected results.
+ * gas/all/weakref1w.d: Likewise.
+ * gas/all/weakref2.s: Indent directives.
+ * gas/all/weakref3.s: Likewise.
+
+2005-11-17 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/cond.s: Also check ifdef works on equates and
+ commons.
+ * gas/all/cond.l: Adjust.
+ * gas/all/redef2.s: Also test redefining equate to label.
+ * gas/all/redef2.d: Adjust.
+ * gas/all/redef3.[sd]: New.
+ * gas/all/redef4.s: New.
+ * gas/all/redef5.s: New.
+ * gas/elf/redef.s: New, copied from original gas/all/redef2.s.
+ * gas/elf/redef.d: Remove #source.
+ * gas/all/gas.exp: Remove exclusion of iq2000-*-* from and
+ adjust xfails for redefinition tests. Run new tests. Exclude
+ alpha*-*-*, mips*-*-*, *c54x*-*-* from weakref tests.
+
+2005-11-16 Richard Henderson <rth at redhat.com>
+
+ * gas/all/weakref1.s: Use "=" instead of ".set" for equivalence.
+
+2005-11-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * gas/arm/unwind.s, gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Add
+ a test for saving only the low registers.
+
+2005-11-14 Thiemo Seufer <ths at networkno.de>
+
+ * gas/testsuite/gas/mips/mips16e-jrc.d: Tighten file format
+ check, relax whitespace checking.
+
+2005-11-14 David Ung <davidu at mips.com>
+
+ * gas/mips/mips.exp: Run new save/restore tests.
+ * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
+ different styles of save/restore instructions.
+ * gas/testsuite/gas/mips/mips16e-save.d: New.
+
+2005-11-10 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intelbad.d: Add tests for ill registers in brackets.
+ * gas/i386/intelbad.l: Adjust.
+
+2005-11-10 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/archv6t2-bad.s: Add tests of badly composed ldrex and
+ strex instructions.
+ * gas/arm/archv6t2-bad.l: Add expected error messages.
+ * gas/arm/r15-bad.l: Adjust error messages for r15 usage in ldrex
+ and strex instructions.
+
+2005-11-08 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * gas/all/cofftag.s: Convert numbers in .type
+ directives to decimal.
+ * gas/all/gas.exp: enable cofftag-test for z80-*-coff.
+
+2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
+
+ Add ms2.
+ * gas/ms1/allinsn.d: Adjust pcrel disassembly.
+ * gas/ms1/errors.exp: Fix target triplet.
+ * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
+ * gas/ms1/ms1-16-003.s: Tweak label.
+ * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
+ * gas/ms1/ms2.d, gas/ms1/ms2.s: New.
+ * gas/ms1/relocs.d: Adjust expected machine name and pcrel
+ disassembly.
+ * gas/ms1/relocs.exp: Adjust target triplet.
+
+2005-11-07 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/redef2.[sd]: New.
+ * gas/all/gas.exp: Run new test.
+ * gas/elf/redef.d: New.
+ * gas/elf/elf.exp: Run new test.
+
+2005-11-07 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/i386/divide.s: Test line comment starting with '/'.
+ * gas/i386/divide.d: Pass --divide to gas.
+ * gas/i386/intelok.d: Likewise.
+ * gas/i386/i386.exp (divide): Run for all targets.
+
+2005-11-07 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * gas/z80/z80.exp: Added "suffix" test.
+ * gas/z80/suffix.s: New file.
+ * gas/z80/suffix.d: New file.
+
+2005-11-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/padlock.d: Support 64bit BFD.
+
+2005-11-04 Alexandre Oliva <aoliva at redhat.com>
+
+ * gas/all/gas.exp: Remove weakref xfail. Run weakref4.s.
+ * gas/all/weakref1.s: Move redefinition bits to...
+ * gas/all/weakref4.s: ... new file.
+ * gas/all/weakref1.d: Remove command moved to weakref1u. Adjust
+ remaining command for leading tabs. Regenerate.
+ * gas/all/weakref1l.d: Regenerate.
+ * gas/all/weakref1u.d: Likewise.
+ * gas/all/wealref1w.d: Likewise.
+
+2005-11-04 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/gas.exp: xfail weakref dump tests for all targets.
+
+2005-10-29 Hans-Peter Nilsson <hp at axis.com>
+
+ PR gas/1630
+ * gas/all/gas.exp <weakref1, weakref1g, weakref1l, weakref1u,
+ weakref1w>: Xfail for cris-*-* and mmix-*-*.
+
+2005-10-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/equ.d: Fix typo.
+ * gas/i386/equ.s: Don't globalize r.
+
+2005-10-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/gas.exp: Don't xfail equiv1 test anymore.
+
+2005-10-26 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/archv6.d: Adjust expected output.
+
+2005-10-26 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intel.s: Replace register used in offset expression.
+ * gas/i386/intel.e: Adjust.
+ * gas/i386/intelbad.l: Adjust.
+ * gas/i386/equ.[sed]: New.
+ * gas/i386/i386.exp: Run new test.
+
+2005-10-26 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * gas/z80/z80.exp: Fix misplaced-open-brace typo.
+
+2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * gas/all/gas.exp: Exclude Z80-*-* from floating point, string,
+ and cofftag test.
+ * gas/macros/macros.exp: Expect z80-*-* to fail the strings test
+ because it has no string escapes.
+ * gas/z80/quotes.d: New file
+ * gas/z80/quotes.d: New file
+ * gas/z80/quotes.s: New file
+ * gas/z80/redef.d: New file
+ * gas/z80/redef.s: New file
+ * gas/z80/z80.exp: New file
+
+2005-10-24 Bernd Schmidt <bernd.schmidt at analog.com>
+
+ * gas/bfin/flow2.d: Match changed assembler behaviour.
+ * gas/bfin/reloc.d: Likewise.
+
+2005-10-24 Alexandre Oliva <aoliva at redhat.com>
+
+ * gas/all/weakref1.s, gas/all/weakref1.d: New test.
+ * gas/all/weakref1g.d, gas/all/weakref1l.d: New tests.
+ * gas/all/weakref1u.d, gas/all/weakref1w.d: New tests.
+ * gas/all/weakref2.s, gas/all/weakref3.s: New tests.
+ * gas/all/gas.exp: Run new tests.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/index.[sl]: New.
+ * gas/ia64/rotX.[sl]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/regs.pl: Also check tp alias of r13.
+ * gas/ia64/regs.s: Regenerate.
+ * gas/ia64/regs.d: Adjust.
+
+2005-10-19 David Ung <davidu at mips.com>
+
+ * gas/mips/mips.exp: Run new test.
+ * gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
+ jalr/jr to the compact jalrc/jrc instructions.
+ * gas/testsuite/gas/mips/mips16e-jrc.d: New.
+
+2005-10-19 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * gas/s390/zarch-z9-109.s: Add tests for unnormalized hfp multiply
+ and multiply-and-add instructions.
+ * gas/s390/zarch-z9-109.d: Update expected result.
+
+2005-10-17 Richard Earnshaw <richard.earnshaw at arm.com>
+
+ * gas/arm/copro.d: 'mcrlt' instruction should not be disassembled as
+ 'cfsh64lt'.
+
+2005-10-12 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * gas/hppa/basic/basic.exp (do_system): Adjust for removal of lha
+ instructions from system.s.
+ * gas/hppa/basic/system.s (lha): Remove.
+
+2005-10-12 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/forward.[sd]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-10-11 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/cond.s: Add test for resolution of fully resolvable
+ forward references in .if/.endif.
+ * gas/all/cond.d: Rename to:
+ * gas/all/cond.l: New.
+ * gas/all/assign-bad.s: New.
+ * gas/all/assign-ok.s: New.
+ * gas/all/equ-bad.s: New.
+ * gas/all/equ-ok.s: New.
+ * gas/all/equiv1.s: New.
+ * gas/all/equiv2.s: New.
+ * gas/all/eqv-bad.s: New.
+ * gas/all/eqv-ok.s: New.
+ * gas/all/eval.[sd]: New.
+ * gas/all/forward.[sd]: New.
+ * gas/all/redef.[sd]: New.
+ * gas/all/gas.exp: Run new tests, but xfail equiv1 (PR/1387).
+
+2005-10-10 Nick Clifton <nickc at redhat.com>
+
+ * gas/sh/reg-prefix.s: Use mov.l instruction in preference to
+ movli.l.
+ * gas/sh/reg-prefix.d: Force little endian assembly.
+
+2005-10-08 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/eabi_attr_1.s: New test.
+ * gas/arm/eabi_attr_1.d: New test.
+ * gas/arm/arm7t.d: Only disassemble code sections.
+ * gas/arm/bignum1.d: Ignore Arm object attribute sections.
+ * gas/arm/mapping.d: Ditto.
+ * gas/arm/unwind.d: Ditto.
+ * gas/elf/section0.d: Ditto.
+ * gas/elf/section1.d: Ditto.
+ * gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
+ * gas/elf/section2.e-armeabi: New file.
+
+2005-10-06 Khem Raj <kraj at mvista.com>
+ NIIBE Yutaka <gniibe at m17n.org>
+
+ * gas/sh/basic.exp: Run reg-prefix test.
+ * gas/sh/reg-prefix.s: New
+ * gas/sh/reg-prefix.d: New
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * gas/bfin: New testsuite for bfin.
+ * gas/all/gas.exp (bfin-*-*): Expected failure for alternate
+ macro syntax.
+
+2005-09-30 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/fpa-mem.s: Remove incorrect comments.
+ * gas/arm/fpa-mem.d: Update expected results.
+
+2005-09-29 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/alloc.[sl]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
+ gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/mixed-mode-reloc.s: Enable all insns.
+ * gas/i386/mixed-mode-reloc32.d: Adjust.
+ * gas/i386/mixed-mode-reloc64.d: Adjust.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/reloc64.s: Also test .slong.
+ * gas/i386/reloc64.l: Adjust.
+ * gas/i386/reloc64.d: Adjust.
+
+2005-09-21 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/lns/lns.exp (lns-common-1): Don't run on targets without
+ a bare nop insn.
+
+2005-09-20 Richard Henderson <rth at redhat.com>
+
+ * gas/cris/rd-dw2-1.d, gas/cris/rd-dw2-10.d, gas/cris/rd-dw2-11.d,
+ gas/cris/rd-dw2-12.d, gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d,
+ gas/cris/rd-dw2-15.d, gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d,
+ gas/cris/rd-dw2-4.d, gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d,
+ gas/cris/rd-dw2-7.d, gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d,
+ gas/mips/mips16-dwarf2-n32.d, gas/mips/mips16-dwarf2.d: Add 0x
+ prefix in "Advance PC" lines.
+
+2005-09-08 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/arch6zk.d: Rename smi to smc.
+ * gas/arm/arch6zk.s: Ditto.
+ * gas/arm/thumb32.d: Ditto.
+ * gas/arm/thumb32.s: Ditto.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
+ * gas/lns/lns-common-1.s: Update for syntax change.
+ * gas/lns/lns-diag-1.[sl]: Likewise.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * gas/mips/mips16-dwarf2.d: Don't match anything but address and line
+ number increments. Adjust relocation address.
+ * gas/mips/mips16-dwarf2-n32.d: Likewise. Add "N32" to test name.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * gas/cris/rd-dw2-1.d: Don't match anything but address and line
+ number increments.
+ * gas/cris/rd-dw2-10.d, gas/cris/rd-dw2-11.d, gas/cris/rd-dw2-12.d,
+ gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d, gas/cris/rd-dw2-15.d,
+ gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d, gas/cris/rd-dw2-4.d,
+ gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d, gas/cris/rd-dw2-7.d,
+ gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d: Likewise.
+
+2005-09-07 Richard Henderson <rth at redhat.com>
+
+ * gas/lns/lns.exp: New file.
+ * gas/lns/lns-common-1.[sd]: New test.
+ * gas/lns/lns-diag-1.[sl]: New test.
+
+2005-09-06 Chao-ying Fu <fu at mips.com>
+
+ * gas/mips/mips.exp: Run MT test for mips32r2 only.
+ * gas/mips/mips32-mt.[sdl]: New test.
+
+2005-09-06 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb2_relax.d: New test.
+ * gas/arm/thumb2_relax.s: New test.
+ * gas/arm/thumb32.d: Adjust expected results to include relaxation.
+ * gas/arm/thumb32.s: Tweak for better coverage of relaxable
+ instructions. Remove load/store tests.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/arm3-bad.s: New test.
+ * gas/arm/arm3-bad.d: New test.
+ * gas/arm/arm3.s: Avoid illegal instructions.
+ * gas/arm/arm3.d: Ditto.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
+ gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
+ gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/fpa-mem.d: Test "stfpls".
+ * gas/arm/fpa-mem.s: Ditto.
+
+2005-09-01 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/cris: Adjust all files for testing target
+ cris-axis-linux-gnu.
+
+2005-08-30 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
+ * gas/arm/thumb32.d: Ditto.
+
+2005-08-26 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intel.s: Adjust.
+ * gas/i386/intelok.s: Add two more insns.
+ * gas/i386/intelok.d: Adjust.
+
+2005-08-26 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intelok.d: Adjust.
+
+2005-08-25 Chao-ying Fu <fu at mips.com>
+
+ * gas/mips/mips.exp: Run DSP test.
+ * gas/mips/mips32-dsp.[sdl]: New test.
+
+2005-08-22 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
+ gas/i386/mixed-mode-reloc64.d: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2005-08-15 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb2_it.s: Add more instruction variants.
+ * gas/arm/thumb2_it.d: Ditto.
+
+2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * gas/testsuite/gas/s390/s390.exp: Reorganize gas testsuite for s390
+ and add tests for new cpu type z9-109.
+ * gas/testsuite/gas/s390/esa-g5.d: New.
+ * gas/testsuite/gas/s390/esa-g5.s: New.
+ * gas/testsuite/gas/s390/esa-operands.d: New.
+ * gas/testsuite/gas/s390/esa-operands.s: New.
+ * gas/testsuite/gas/s390/esa-reloc.d: New.
+ * gas/testsuite/gas/s390/esa-reloc.s: New.
+ * gas/testsuite/gas/s390/esa-z9-109.d: New.
+ * gas/testsuite/gas/s390/esa-z9-109.s: New.
+ * gas/testsuite/gas/s390/esa-z900.d: New.
+ * gas/testsuite/gas/s390/esa-z900.s: New.
+ * gas/testsuite/gas/s390/esa-z990.d: New.
+ * gas/testsuite/gas/s390/esa-z990.s: New.
+ * gas/testsuite/gas/s390/zarch-operands.d: New.
+ * gas/testsuite/gas/s390/zarch-operands.s: New.
+ * gas/testsuite/gas/s390/zarch-reloc.d: New.
+ * gas/testsuite/gas/s390/zarch-reloc.s: New.
+ * gas/testsuite/gas/s390/zarch-z9-109.d: New.
+ * gas/testsuite/gas/s390/zarch-z9-109.s: New.
+ * gas/testsuite/gas/s390/zarch-z900.d: New.
+ * gas/testsuite/gas/s390/zarch-z900.s: New.
+ * gas/testsuite/gas/s390/zarch-z990.d: New.
+ * gas/testsuite/gas/s390/zarch-z990.s: New.
+ * gas/testsuite/gas/s390/opcode.d: Delete.
+ * gas/testsuite/gas/s390/opcode.s: Delete.
+ * gas/testsuite/gas/s390/opcode64.d: Delete.
+ * gas/testsuite/gas/s390/opcode64.s: Delete.
+ * gas/testsuite/gas/s390/operands.d: Delete.
+ * gas/testsuite/gas/s390/operands.s: Delete.
+ * gas/testsuite/gas/s390/operands64.d: Delete.
+ * gas/testsuite/gas/s390/operands64.s: Delete.
+ * gas/testsuite/gas/s390/reloc.d: Likewise.
+ * gas/testsuite/gas/s390/reloc.s: Likewise.
+ * gas/testsuite/gas/s390/reloc64.d: Likewise.
+ * gas/testsuite/gas/s390/reloc64.s: Likewise.
+
+2005-08-11 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/all/gas.exp: Remove a29k and m88k support.
+ * gas/m88k/allinsn.d: Delete.
+ * gas/m88k/allinsn.s: Delete.
+ * gas/m88k/init.d: Delete.
+ * gas/m88k/init.s: Delete.
+ * gas/m88k/m88k.exp: Delete.
+ * gas/tic80/add.d: Delete.
+ * gas/tic80/add.lst: Delete.
+ * gas/tic80/add.s: Delete.
+ * gas/tic80/align.d: Delete.
+ * gas/tic80/align.lst: Delete.
+ * gas/tic80/align.s: Delete.
+ * gas/tic80/bitnum.d: Delete.
+ * gas/tic80/bitnum.lst: Delete.
+ * gas/tic80/bitnum.s: Delete.
+ * gas/tic80/ccode.d: Delete.
+ * gas/tic80/ccode.lst: Delete.
+ * gas/tic80/ccode.s: Delete.
+ * gas/tic80/cregops.d: Delete.
+ * gas/tic80/cregops.lst: Delete.
+ * gas/tic80/cregops.s: Delete.
+ * gas/tic80/endmask.d: Delete.
+ * gas/tic80/endmask.lst: Delete.
+ * gas/tic80/endmask.s: Delete.
+ * gas/tic80/float.d: Delete.
+ * gas/tic80/float.lst: Delete.
+ * gas/tic80/float.s: Delete.
+ * gas/tic80/regops.d: Delete.
+ * gas/tic80/regops.lst: Delete.
+ * gas/tic80/regops.s: Delete.
+ * gas/tic80/regops2.d: Delete.
+ * gas/tic80/regops2.lst: Delete.
+ * gas/tic80/regops2.s: Delete.
+ * gas/tic80/regops3.d: Delete.
+ * gas/tic80/regops3.lst: Delete.
+ * gas/tic80/regops3.s: Delete.
+ * gas/tic80/regops4.d: Delete.
+ * gas/tic80/regops4.lst: Delete.
+ * gas/tic80/regops4.s: Delete.
+ * gas/tic80/relocs1.c: Delete.
+ * gas/tic80/relocs1.d: Delete.
+ * gas/tic80/relocs1.lst: Delete.
+ * gas/tic80/relocs1.s: Delete.
+ * gas/tic80/relocs1b.d: Delete.
+ * gas/tic80/relocs2.c: Delete.
+ * gas/tic80/relocs2.d: Delete.
+ * gas/tic80/relocs2.lst: Delete.
+ * gas/tic80/relocs2.s: Delete.
+ * gas/tic80/relocs2b.d: Delete.
+ * gas/tic80/tic80.exp: Delete.
+
+2005-08-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * gas/hppa/reloc/reloc.exp (do_function_reloc_bug): Add "L%" to regexp.
+
+2005-08-05 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb32.s: Use correct conditional suffixes inside IT
+ blocks.
+ * gas/arm/thumb2_it.d, gas/arm/thumb2_it.s: New test.
+
+2005-08-05 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb32.d: Update ldm/stm dests.
+ * gas/arm/thumb32.s: Ditto.
+
+2005-08-03 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/iwmmxt-bad2.s: New file: Check for error messages about
+ erroneous offsets in iwmmxt instructions. Cannot be part of
+ iwmmxt-bad.s because the errors there stop the assembler before it
+ gets to check the offsets in instructions.
+ * gas/arm/iwmmxt-bad2.d: New file.
+ * gas/arm/iwmmxt-bad2.l: New file: Expected error messages.
+
+2005-08-02 Khem Raj <kraj at mvista.com>
+
+ * gas/arm/iwmmxt.s: Change the offset values of the WLDRD, WSTRD
+ and WSTRW instructions to be larger than +/-255.
+ * gas/arm/iwmmxt.d: Fix the expected results for these
+ instructions.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb32.d: Fix expected output for writeback addressing
+ modes. Add single high reg push/pop test.
+ * gas/asm/thumb32.s: Add single high reg push/pop test.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
+ * gas/arm/thumb32.d: Ditto.
+
+2005-07-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/unwind-bad.l: Uncomment patterns matching new warnings.
+ * gas/ia64/unwind-ok.d: Correct expectations.
+
+2005-07-26 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/immed32.[sd]: New.
+ * gas/i386/immed64.[sd]: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2005-07-21 Paul Brook <paul at codesourcery.com>
+
+ * gas/arm/thumb32.s: Add tests for [pc, #imm] addressing modes.
+ * gas/arm/thumb32.d: Ditto.
+
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * gas/m32r/rel32.exp: New file.
+ * gas/m32r/rel32.s: New file.
+ * gas/m32r/rel32.d: New file.
+ * gas/m32r/rel32-pic.s: New file.
+ * gas/m32r/rel32-pic.d: New file.
+ * gas/m32r/rel32-err.s: New file.
+ * gas/m32r/error.exp: Added rel32-err.
+
+2005-07-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/i386.exp: Add suffix.
+
+ * gas/i386/suffix.d: New file.
+ * gas/i386/suffix.s: Likewise.
+
+2005-07-18 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * gas/hppa/basic/fp_comp.s: Add level 1.1 directive.
+ * gas/hppa/basic/special.s, gas/hppa/basic/system.s: Likewise.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/reloc32.[sdl]: New.
+ * gas/i386/reloc64.[sdl]: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/i386.exp: Add vmx and x86-64-vmx.
+
+ * gas/i386/vmx.d: New file.
+ * gas/i386/vmx.s: Likewise.
+ * gas/i386/x86-64-vmx.d: Likewise.
+ * gas/i386/x86-64-vmx.s: Likewise.
+
+2005-07-14 Nick Clifton <nickc at redhat.com>
+
+ PR 1063
+ * gas/crx/gas-segfault.d: New file.
+ * gas/crx/gas-segfault.s: New file.
+
+2005-07-12 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * gas/mmix/relax1-n.d, gas/mmix/relax1-rn.d: Avoid "# FIXME: "
+ first on a line, adjusting for testsuite framework change.
+
+2005-07-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386/x86_64.s: Add absolute siged 32bit addressing tests for
+ mov.
+ * i386/x86_64.d: Updated.
+
+2005-07-08 Hans-Peter Nilsson <hp at axis.com>
+
+ PR gas/1049
+ * gas/cris/rd-pic-2.d, gas/cris/rd-pic-2.s: New test.
+ * gas/cris/rd-abs32-1.d: Tweak for not emitting reloc-related
+ garbage for global symbols.
+
+2005-07-07 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/vfp1xD.d: Adjust expected fadds disassemblies now that
+ the dissassembler has been fixed.
+
+2005-05-07 Paul Brook <paul at codesourcery.com>
+
+ * gas/ppc/altivec.d: Match all powerpc target vecs.
+ * gas/ppc/booke.d: Ditto.
+ * gas/ppc/e500.d: Ditto.
+
+2005-07-05 Aldy Hernandez <aldyh at redhat.com>
+
+ * gas/ms1: New directory.
+ * gas/ms1/allinsn.d: New.
+ * gas/ms1/allinsn.s: New.
+ * gas/ms1/badinsn.s: New.
+ * gas/ms1/badinsn1.s: New.
+ * gas/ms1/badoffsethigh.s: New.
+ * gas/ms1/badoffsetlow.s: New.
+ * gas/ms1/badorder.s: New.
+ * gas/ms1/badreg.s: New.
+ * gas/ms1/badsignedimmhigh.s: New.
+ * gas/ms1/badsignedimmlow.s: New.
+ * gas/ms1/badsyntax.s: New.
+ * gas/ms1/badsyntax1.s: New.
+ * gas/ms1/badunsignedimmhigh.s: New.
+ * gas/ms1/badunsignedimmlow.s: New.
+ * gas/ms1/errors.exp: New.
+ * gas/ms1/ldst.s: New.
+ * gas/ms1/misc.d: New.
+ * gas/ms1/misc.s: New.
+ * gas/ms1/ms1-16-003.d: New.
+ * gas/ms1/ms1-16-003.s: New.
+ * gas/ms1/ms1.exp: New.
+ * gas/ms1/msys.d: New.
+ * gas/ms1/msys.s: New.
+ * gas/ms1/relocs.d: New.
+ * gas/ms1/relocs.exp: New.
+ * testsuite/gas/ms1/relocs1.s: New.
+ * testsuite/gas/ms1/relocs2.s: New.
+
+2005-07-05 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/svme.d: New.
+ * gas/i386/svme.s: New.
+ * gas/i386/svme64.d: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2005-07-04 Zack Weinberg <zack at codesourcery.com>
+
+ * lib/gas-defs.exp (run_dump_tests): New proc.
+ (run_dump_test): Add support for new options: target, not-target,
+ skip, not-skip, error-output. Document stderr. Tidy a
+ little.
+ (slurp_options): If a line doesn't match the option regexp, but
+ does begin with #, ignore it; don't stop parsing options.
+ * gas/arm/arm.exp: Remove most code. Use run_dump_tests.
+
+ * gas/arm/archv6t2-bad.d, gas/arm/armv1.d, gas/arm/iwmmxt-bad.d
+ * gas/arm/r15-bad.d, gas/arm/req.d, gas/arm/t16-bad.d
+ * gas/arm/undefined.d, gas/arm/undefined_coff.d, gas/arm/vfp-bad.d:
+ New files.
+ * gas/arm/bignum1.d, gas/arm/mapping.d, gas/arm/pic.d:
+ Only run on ELF targets.
+ * gas/arm/tls.d, gas/arm/unwind.d: Only run on ELF targets.
+ Skip on VxWorks.
+ * gas/arm/tls_vxworks.d, gas/arm/unwind_vxworks.d: New files.
+ * gas/arm/thumb.d, gas/arm/thumb32.d: Don't run on aout or pe.
+ * gas/arm/le-fpconst.d: Only run on *-*-pe.
+ * gas/arm/inst.d: Skip on WinCE.
+ * gas/arm/wince_inst.d: Skip unless WinCE.
+ * gas/arm/el_segundo.d: Mark up for actual use; adjust
+ expectations.
+ * gas/arm/el_segundo.s: Remove irrelevant junk. Add padding
+ for a.out's sake.
+
+2005-07-01 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/group-2.s: Use register as second operand of .prologue.
+ * gas/ia64/unwind-err.s: Add check for .vframesp.
+ * gas/ia64/unwind-err.l: Adjust.
+ * gas/ia64/strange.[sd]: New.
+ * gas/ia64/unwind-bad.[sl]: New.
+ * gas/ia64/unwind-ok.[sd]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-06-30 Zack Weinberg <zack at codesourcery.com>
+
+ * gas/arm/arm.exp: Don't special case ldconst, arm7t, or copro
+ for *-wince-*.
+ * gas/arm/wince_arm7t.d, gas/arm/wince_copro.d
+ * gas/arm/wince_ldconst.d: Delete.
+
+2005-06-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 1013
+ * i386/x86_64.s: Add absolute 64bit addressing tests for mov.
+ * i386/x86_64.d: Updated.
+
+2005-06-17 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
+ relocation. Add insns for all widths of non-pc-relative relocations.
+ * gas/i386/x86-64-pcrel.d: Adjust.
+
+2005-06-13 Zack Weinberg <zack at codesourcery.com>
+
+ * gas/arm/thumb.s: Only branch to labels defined in this file.
+ * gas/arm/thumb.d, gas/arm/thumb32.d: Adjust expected output.
+
+2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/ldstla-32-1.l: Update to handle leading zeroes.
+ * gas/mips/ldstla-32-mips3-1.l: Likewise.
+
+2005-05-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/proc.l: Adjust.
+
+2005-05-25 Steve Ellcey <sje at cup.hp.com>
+
+ * gas/ia64/global.d: Change --sym to --syms.
+
+2005-05-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/group-1.d: Updated.
+ * gas/ia64/group-2.d: Likewise.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/radix.s: New.
+ * gas/ia64/radix.l: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intelok.d: Account for 32-bit displacements being shown
+ in hex.
+
+2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/elf/group0b.d: Updated.
+ * gas/elf/group1b.d: Likewise.
+
+2005-05-19 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/reloc-uw.s: New.
+ * gas/ia64/reloc-uw.d: New.
+ * gas/ia64/reloc-uw-ilp32.d: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-05-18 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/altmacro.s: Parenthesize operand of %.
+
+2005-05-17 Zack Weinberg <zack at codesourcery.com>
+
+ * gas/arm/arm.exp: Convert all existing "gas_test" tests to
+ "run_dump_test" tests. Run more tests unconditionally. Run new tests.
+ * gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
+ * gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
+ * gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
+ Adjust to work as a dump test.
+ * gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
+ * gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
+ * gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
+ New files.
+
+ * gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
+ diagnostics that don't happen in the first pass anymore.
+
+ * gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
+ * gas/arm/vfp-bad.l:
+ Update expected diagnostics.
+ * gas/arm/pic.d: Update expected reloc name.
+ * gas/arm/thumbv6.d: CPY no longer appears in disassembly.
+ * gas/arm/r15-bad.s: Avoid two-argument mul.
+ * gas/arm/req.s: Adjust comments.
+ * gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
+ use of PC.
+
+ * gas/arm/macro-1.d, gas/arm/macro1.s
+ * gas/arm/t16-bad.l, gas/arm/t16-bad.s
+ * gas/arm/tcompat.d, gas/arm/tcompat.s
+ * gas/arm/tcompat2.d, gas/arm/tcompat2.s
+ * gas/arm/thumb32.d, gas/arm/thumb32.s
+ New test pair.
+
+2005-05-17 Jan Beulich <jbeulich at novell.com>
+
+ * gas/mmix/err-byte1.s: Adjust expected error text on line 10.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ * gas/v850/split-lo16.s: Add test for a lo() pseudo reloc
+ corrupting an ld.w instruction.
+ * gas/v850/split-lo16.d: Add expected, correct (ie not corrupt)
+ output.
+
+2005-05-10 Michael Matz <matz at suse.de>
+
+ * gas/hppa/parse/block1.s: Use official limit (0x3fffffff) for
+ .block.
+
+2005-05-10 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * gas/mmix/relax2.s: Drop ":" off label definitions.
+
+2005-05-09 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/tlsd.[sd]: Adjust to not assume zero displacement will
+ actually be present in memory addressing.
+ * gas/i386/tlspic.[sd]: Likewise.
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 940
+ * gas/ia64/group-2.d: New.
+ * gas/ia64/group-2.s: New.
+
+ * gas/ia64/ia64.exp: Add "group-2".
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 843
+ * gas/i386/i386.exp: Add x86-64-branch.
+
+ * gas/i386/x86-64-branch.d: New.
+ * gas/i386/x86-64-branch.s: New.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/badarg.s: Add check for bad qualifier specification.
+ * gas/macros/badarg.l: Adjust.
+ * gas/macros/vararg.[sd]: New.
+ * gas/macros/macros.exp: Run new test.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * gas/all/cond.s: Also test .ifb/.ifnb.
+ * gas/all/cond.d: Adjust.
+
+2005-05-06 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/dot.s: Don't use pseudo-ops in first column.
+ * gas/macros/dot.l: Match broader range of possible outputs.
+ * gas/macros/purge.l: Likewise.
+ * gas/macros/purge.s: Start generated macro names with an underscore.
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * gas/i386/i386.exp: Don't run divide test on vxworks.
+
+2005-05-05 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ gas/all/itbl-test.c, gas/all/test-example.c, gas/all/test-gen.c,
+ gas/arm/maverick.c, gas/cris/cris.exp, gas/hppa/basic/basic.exp,
+ gas/hppa/parse/parse.exp, gas/hppa/reloc/reloc.exp,
+ gas/hppa/unsorted/unsorted.exp, gas/m88k/m88k.exp,
+ gas/mmix/mmix-err.exp, gas/mmix/mmix-list.exp, gas/mmix/mmix.exp,
+ gas/mn10200/basic.exp, gas/mn10300/am33-2.c,
+ gas/mn10300/basic.exp, gas/pdp11/opcode.s, gas/ppc/aix.exp,
+ gas/sh/basic.exp, gas/sh/err.exp, gas/sh/arch/arch.exp,
+ gas/sh/sh64/sh64.exp, gas/v850/basic.exp, lib/gas-defs.exp
+
+2005-05-05 Mike Frysinger <vapier at gentoo.org>
+
+ * gas/sh/basic.exp: Replace linux-gnu with linux-* to allow for
+ versions of Linux which do not use glibc.
+ * gas/vax/vax.exp: Likewise.
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * lib/gas-defs.exp (regexp_diff): Pass test if last line is "#...".
+
+2005-04-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/all/assign.s: Make `x' and `y' global.
+
+2005-04-25 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/badarg.s: Add tests for collisions between/among macro
+ parameters and local symbols.
+ * gas/macros/badarg.l: Adjust.
+
+2005-04-20 Jan Beulich <jbeulich at novell.com>
+
+ * gas/elf/struct.s: Adjust to not get into alignment issues.
+ * gas/elf/struct.d: Adjust for the above and the test's name.
+
+2005-04-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/padlock.d: Updated.
+
+2005-04-19 Andreas Schwab <schwab at suse.de>
+
+ * gas/ia64/invalid-ar.l: Adapt to changed error message.
+
+2005-04-18 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/purge.[ls]: New.
+ * gas/macros/macros.exp: Run new test.
+
+2005-04-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/elf/struct.[sd]: New.
+ * gas/elf/elf.exp: Run new test.
+
+2005-04-15 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/all/assign.s: New.
+ * gas/all/assign.d: New.
+ * gas/all/gas.exp: Run it.
+
+2005-04-13 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * gas/mips/ldstla-32.s: Exclude offsets that are now meant to fail
+ and include more instructions/offsets that are meant to succeed.
+ Use $4 instead $3 to avoid register dependencies.
+ * gas/mips/ldstla-32.d: Update accordingly.
+ * gas/mips/ldstla-32-shared.d: Likewise.
+ * gas/mips/ldstla-32-mips3.d: New test based on the above, except
+ for mips3.
+ * gas/mips/ldstla-32-mips3-shared.d: Similarly, for PIC.
+ * gas/mips/ldstla-32-mips3.s: Source for the new tests.
+ * gas/mips/ldstla-32-1.s: New test for offsets that are meant to
+ fail.
+ * gas/mips/ldstla-32-mips3-1.s: Likewise, for mips3.
+ * gas/mips/ldstla-32-1.l: Stderr output for the new test.
+ * gas/mips/ldstla-32-mips3-1.l: Likewise.
+ * gas/mips/mips.exp: Run the new tests.
+
+2005-04-11 Mark Kettenis <kettenis at gnu.org>
+
+ * gas/all/gas.exp: Don't run fastcall labels test on
+ i*86-*-openbsd*.
+
+2005-04-11 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/dot.[ls]: New.
+ * gas/macros/macros.exp: Run new test.
+
+2005-04-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/x86-64-pcrel.s: Test R_X86_64_32S.
+ * gas/i386/x86-64-pcrel.d: Updated.
+
+2005-04-01 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * gas/vax/flonum.s: New testcase: Encode some flonums.
+ * gas/vax/flonum.d: Expected result of new testcase.
+ * gas/vax/vax.exp: Call the new testcase.
+
+ * gas/vax/elf-rel.d: Call gas with -k. Thanks to Matt Thomas for
+ figuring out.
+ * gas/vax/vax.exp: Run elf-rel.[sd] for NetBSD-ELF and Linux.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/bss.[sd]: New.
+ * gas/i386/i386.exp: Run new test.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/x86-64-pcrel.[sd]: New.
+ * gas/i386/i386.exp: Run new test.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * gas/arm/mapping.d: Update expected output due to mapping symbols
+ being untyped.
+
+2005-03-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/i386/i386.exp: Run segment and inval-seg for i386. Run
+ x86-64-segment and x86-64-inval-seg for x86-64.
+
+ * gas/i386/intel.d: Expect movw for moving between memory and
+ segment register.
+ * gas/i386/naked.d: Likewise.
+ * gas/i386/opcode.d: Likewise.
+ * gas/i386/x86-64-opcode.d: Likewise.
+
+ * gas/i386/opcode.s: Use movw for moving between memory and
+ segment register.
+ * gas/i386/x86-64-opcode.s: Likewise.
+
+ * : Likewise.
+
+ * gas/i386/inval-seg.l: New.
+ * gas/i386/inval-seg.s: New.
+ * gas/i386/segment.l: New.
+ * gas/i386/segment.s: New.
+ * gas/i386/x86-64-inval-seg.l: New.
+ * gas/i386/x86-64-inval-seg.s: New.
+ * gas/i386/x86-64-segment.l: New.
+ * gas/i386/x86-64-segment.s: New.
+
+2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * gas/arm/tls.s, gas/arm/tls.d: New files.
+ * gas/arm/arm.exp: Run TLS test.
+
+2005-03-29 Julian Brown <julian at codesourcery.com>
+
+ * gas/arm/unwind.d: Update expected output.
+
+2005-03-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 803
+ * gas/ia64/dv-imply.d: Pass -mtune=itanium1 to as.
+ * gas/ia64/dv-mutex.d : Likewise.
+ * gas/ia64/dv-safe.d: Likewise.
+ * gas/ia64/dv-srlz.d.nop: Likewise.
+ * gas/ia64/ldxmov-1.d: Likewise.
+ * gas/ia64/opc-b.d: Likewise.
+ * gas/ia64/opc-f.d: Likewise.
+ * gas/ia64/opc-i.d: Likewise.
+ * gas/ia64/opc-m.d: Likewise.
+ * gas/ia64/operand-or.d: Likewise.
+ * gas/ia64/pcrel.d: Likewise.
+ * gas/ia64/pseudo.d: Likewise.
+ * gas/ia64/tls.d: Likewise.
+
+2005-03-24 Hans-Peter Nilsson <hp at axis.com>
+
+ * gas/cris/range-err-1.s: Adjust expected messages for hosts with
+ 64-bit longs.
+
+2005-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/elf/section5.s: Don't start directives in first column.
+
+2005-03-21 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/iwmmxt.s: Update instructions that use the "never" value
+ in the conditional field to use "le" instead. This is so that the
+ disassembler will disassemble them.
+ * gas/arm/iwmmxt.d: Update expected disassemblies.
+
+2005-03-17 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intel.d: Add stderr directive.
+ * gas/i386/intel.e: New.
+ * gas/i386/intel16.d: Add stderr directive. Adjust for changed
+ source.
+ * gas/i386/intel16.e: New.
+ * gas/i386/intel16.s: Add instances of addressing forms with base
+ and index specified in reverse order.
+ * gas/i386/intelbad.l: Adjust for changed source.
+ * gas/i386/intelbad.s: Add more operand forms to check.
+ * gas/i386/intelok.d: Remove -r from objdump options. Add stderr
+ directive. Adjust for changed source.
+ * gas/i386/intelok.e: New.
+ * gas/i386/intelok.s: Define MASM constants byte, word, etc. Add
+ more operand forms to check.
+ * gas/i386/x86_64.d: Add stderr directive.
+ * gas/i386/x86_64.e: New.
+ * gas/i386/x86_64.s: Adjust for parser changes.
+
+2005-03-15 Zack Weinberg <zack at codesourcery.com>
+
+ * gas/arm/archv6t2.d, gas/arm/archv6t2.s: New dump test.
+ * gas/arm/archv6t2-bad.l, gas/arm/archv6t2-bad.l: New errors test.
+ * gas/arm/arm.exp: Run them.
+
+2005-03-14 Eric Christopher <echristo at redhat.com>
+
+ * gas/cfi/cfi-mips-1.d, gas/cfi/cfi-mips-1.s: New dump test.
+ * gas/cfi/cfi.exp: Run it.
+ * gas/cfi/cfi-common-1.d: Update.
+ * gas/cfi/cfi-common-2.d: Ditto.
+ * gas/cfi/cfi-common-3.d: Ditto.
+ * gas/cfi/cfi-common-4.d: Ditto.
+
+2005-03-12 Zack Weinberg <zack at codesourcery.com>
+
+ * gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
+ * gas/arm/arm.exp: Run it.
+
+2005-03-10 Aldy Hernandez <aldyh at redhat.com>
+
+ * gas/ppc/e500.d: Fix encoding of efscfd.
+
+2005-03-10 Jeff Baker <jbaker at qnx.com>
+ Alan Modra <amodra at bigpond.net.au>
+
+ * gas/ppc/booke.s: Add new m[t,f]sprg testcases.
+ * gas/ppc/booke.d: Likewise.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/vr4130.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2005-03-09 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/relax-swap1-mips[12].d: Expect the delay slots of
+ bc1f and bc1t to be filled.
+ * gas/mips/branch-misc-3.[sd]: New test.
+ * gas/mips/mips.exp: Run it.
+
+2005-03-09 Ben Elliston <bje at au.ibm.com>
+
+ * gas/maxq10/maxq10.exp: Remove stray semicolons.
+ * gas/maxq20/maxq20.exp: Likewise.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/no-fit.[ls]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/xdata.[sd], gas/ia64/xdata-ilp32.d: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-03-08 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/pcrel.d: Account for big endian target.
+ * gas/ia64/reloc-bad.s: Enforce 64-bit ABI.
+
+2005-03-08 Hans-Peter Nilsson <hp at axis.com>
+
+ Adjust testsuite for cris-axis-aout.
+ * gas/cris/rd-bcnst.d, gas/cris/rd-usp-1.d: Adjust regexps for a.out output.
+ * gas/cris/mulbug-err-1.s, gas/cris/rd-arch-1.d,
+ gas/cris/rd-arch-2.d, gas/cris/rd-arch-3.d, gas/cris/rd-break32.d,
+ gas/cris/rd-pcrel2.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
+ gas/cris/rd-usp-1b.d, gas/cris/v32-err-7.s: Pass --em=criself.
+
+2005-03-04 David Daney <ddaney at avtrex.com>
+
+ * gas/mips/elf-rel23b.d: Use '__gnu_local_gp' instead of '_gp'
+ for -mno-shared optimization.
+ * gas/mips/elf-rel25a.d: Ditto.
+
+2005-03-04 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/arm.exp: Fix test for running the "undefined" to catch
+ more non-ELF cases.
+ * gas/arm/pic.d: Fix for vxworks target.
+ * gas/arm/basic.d: Likewise.
+ * gas/arm/unwind.d: Likewise.
+
+2005-03-04 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/ldstla-{n32.s, n32.d, n32-shared.d}: Delete.
+ * gas/mips/ldstla-{n64.d, n64-shared.d}: Adjust expected output
+ for loads and stores from constant addresses.
+ * gas/mips/ldstla-{sym32.s, eabi64.d, n64-sym32.d}: New tests.
+ * gas/mips/mips.exp: Run them.
+
+2005-03-03 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/mips.exp: Move tls tests to main $elf block.
+
+2005-03-03 Nick Clifton <nickc at redhat.com>
+
+ * gas/macros/macros.exp (and.s): Expect this test to fail for the
+ tic4x-coff target because it uses the '&' character as a line
+ separator.
+
+ * gas/sh/basic.exp: Add an sh-hms version of the pcrel test.
+ * gas/sh/pcrel-hms.d: New file. Adjusted form of pcrel-coff.d for
+ the sh-hms target.
+ * gas/sh/arch/arch.exp: Expect the same failures for sh-hms port
+ as for the sh-coff port.
+
+ * gas/macros/macros.exp (run_list_test): Also expect the msp430
+ port to fail the strings test because it defines
+ ONLY_STANDARD_ESCAPES.
+
+ * gas/arm/arch6zk.s: Add three nop instructions in order to pad
+ the .text section out to a 32-byte boundary as will automatically
+ be done by the arm-aout target.
+ * gas/arm/arch6zk.d: Add expected nop disassemblies.
+
+ * gas/d30v/serial.l: Remove listing lines that are no longer
+ emitted and fix up expected binary encoding.
+ * gas/d30v/serial2.l: Likewise.
+ * gas/d30v/serial2O.l: Likewise.
+
+2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * gas/arc/extensions.s: Add tests for extcoreregister.
+ * gas/arc/extensions.d: Likewise.
+ * gas/arc/warn.s: Warnings for readonly core registers accessed.
+ * gas/arc/warn.d: Likewise.
+ * gas/arc/arc.exp: Run extensions testcase.
+
+2005-03-03 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/mips/noat-1.d: Add -mips1 to assembler options.
+
+2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * gas/arc/ld.s: Add checks for short immediates with ld.
+ * gas/arc/ld.d: Likewise.
+
+2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * gas/mips/tls-o32.d, gas/mips/tls-o32.s, gas/mips/tls-ill.l,
+ gas/mips/tls-ill.s: New files.
+ * gas/mips/mips.exp: Run TLS tests.
+
+2005-03-02 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/ppc/astest.d: Adjust for relocs reduced to section sym.
+ * gas/ppc/astest2.d: Likewise.
+ * gas/ppc/astest2_64.d: Likewise.
+ * ppc/astest64.d: Likewise.
+ * ppc/booke.d: Likewise.
+ * ppc/power4.d: Likewise.
+ * ppc/test1elf32.d: Likewise.
+ * ppc/test1elf64.d: Likewise.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/cr-err.[ls]: New.
+ * gas/i386/crx.[ds]: New.
+ * gas/i386/i386.exp: Run new tests.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intelok.d: Add -r to objdump options. Adjust expectations.
+ * gas/i386/intelok.s: Add checks for various special memory operands.
+
+2005-03-01 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * gas/arc/extensions.s: New file.
+ * gas/arc/extensions.d: New file.
+
+2005-03-01 Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/arm.exp (undefined): Run a COFF variant of this test for
+ COFF based ports.
+ * gas/arm/undefined_coff.s: New file: Variant of undefined.s but
+ with a COFF formated local label name.
+ * gas/arm/undefined_coff.l: New file. Variant of undefined.l.
+
+2005-03-01 Stig Petter Olsroed <stigpo at users.sourceforge.net>
+ Nick Clifton <nickc at redhat.com>
+
+ * gas/arm/inst.d: Allow for ARM ports which decode the reloc
+ associated with branches and so show the exact symbolic
+ destination address rather than an offset from the start of the
+ section.
+ * gas/arm/pic.d: Likewise.
+
+2005-03-01 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/m68k/mcf-emac.d: Allow for 64-bit addresses.
+ * gas/m68k/mcf-mac.d: Likewise.
+ * gas/m68k/mcf-mov3q.d: Likewise.
+ * gas/m68k/mode5.d: Likewise.
+
+2005-02-22 Eric Christopher <echristo at redhat.com>
+
+ * gas/mips/elf-rel10.d: Update for label change.
+
+2005-02-22 Maciej W. Rozycki <macro at mips.com>
+
+ * gas/mips/mips16-dwarf2.d: Pass -mabi=32. Include relocation
+ information.
+ * gas/mips/mips16-dwarf2-n32.d: New test to check DWARF2 line
+ information for MIPS16 for the n32 ABI.
+ * gas/mips/mips.exp. Run the new test.
+
+2005-02-22 Eric Christopher <echristo at redhat.com>
+
+ * gas/mips/elf-rel10.s: Add label for frob.
+
+2005-02-22 Maciej W. Rozycki <macro at mips.com>
+
+ * gas/mips/mips16-dwarf2.d: New test to check DWARF2 line
+ information for MIPS16.
+ * gas/mips/mips16-dwarf2.s: Source for the new test.
+ * gas/mips/mips.exp: Run the new test.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/d10v/instruction_packing-005.d: Adjust.
+ * gas/d10v/instruction_packing-008.d: Ignore disassembled stabs.
+ * gas/d10v/instruction_packing-009.d: Likewise.
+ * gas/d10v/instruction_packing-010.d: Likewise.
+ * gas/d10v/warning-001.d: Use #warning instead of #error.
+ * gas/d10v/warning-002.d: Likewise.
+ * gas/d10v/warning-003.d: Likewise.
+ * gas/d10v/warning-004.d: Likewise.
+ * gas/d10v/warning-005.d: Likewise.
+ * gas/d10v/warning-006.d: Likewise.
+ * gas/d10v/warning-007.d: Likewise.
+ * gas/d10v/warning-008.d: Likewise.
+ * gas/d10v/warning-009.d: Likewise.
+ * gas/d10v/warning-010.d: Likewise.
+ * gas/d10v/warning-011.d: Likewise.
+ * gas/d10v/warning-012.d: Likewise.
+ * gas/d10v/warning-013.d: Likewise.
+ * gas/d10v/warning-015.d: Likewise.
+ * gas/d10v/warning-016.d: Likewise.
+ * gas/d10v/warning-017.d: Likewise.
+ * gas/d10v/warning-018.d: Likewise.
+ * gas/d10v/warning-019.d: Likewise.
+ * lib/gas-defs.exp (run_dump_test): Don't require a dump program if
+ #warning given. Rearrange to allow $program to remain unset.
+ Fail the test if warning not found when expected. Conversely fail
+ the test if assembler errors or warnings given when not expected.
+
+2005-02-18 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * gas/mips/noat-1.s, gas/mips/noat-1.d, gas/mips/noat-2.s,
+ gas/mips/noat2.l, gas/mips/noat-3.s, gas/mips/noat-3.l,
+ gas/mips/noat-4.s, gas/mips/noat-4.l, gas/mips/noat-5.s,
+ gas/mips/noat-5.l, gas/mips/noat-6.s, gas/mips/noat-6.l,
+ gas/mips/noat-7.s, gas/mips/noat-7.l: New files, testcases for
+ .set noat in macro expansions.
+ * gas/mips/mips.exp: Run new testcases.
+ * gas/mips/rol-hw.d, gas/mips/rol-hw.l, gas/mips/rol.d,
+ gas/mips/rol.l, gas/mips/rol.s, gas/mips/rol64-hw.d,
+ gas/mips/rol64-hw.l, gas/mips/rol64.d, gas/mips/rol64.l,
+ gas/mips/rol64.s, gas/mips/uld2-eb.d, gas/mips/uld2-el.d,
+ gas/mips/uld2.l, gas/mips/uld2.s, gas/mips/ulh2-eb.d,
+ gas/mips/ulh2-el.d, gas/mips/ulh2.l, gas/mips/ulh2.s,
+ gas/mips/ulw2-eb-ilocks.d, gas/mips/ulw2-eb.d,
+ gas/mips/ulw2-el-ilocks.d, gas/mips/ulw2-el.d, gas/mips/ulw2.l,
+ gas/mips/ulw2.s: Don't try to test .set noat.
+
+2005-02-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/hint.b-err.l: New file.
+ * gas/ia64/hint.b-err.s: Likewise.
+ * gas/ia64/hint.b-warn.l: Likewise.
+ * gas/ia64/hint.b-warn.s: Likewise.
+
+ * gas/ia64/ia64.exp: Run hint.b-err and hint.b-warn.
+
+ * gas/ia64/opc-b.d: Pass -mhint.b=ok to as.
+
+2005-02-17 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/nostkreg.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-02-16 Alan Modra <amodra at bigpond.net.au>
+
+ * gas/all/gas.exp (quad): Don't run on i960.
+
+2005-02-15 Nigel Stephens <nigel at mips.com>
+ Maciej W. Rozycki <macro at mips.com>
+
+ * gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and
+ R_MIPS16_LO16 relocs.
+ * gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI.
+ * gas/mips/mips16-hilo.s: Source for the new tests.
+ * gas/mips/mips.exp: Run the new tests.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/pcrel.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/dv-raw-err.l: Expect specific resource for RAW
+ violation on b0.
+ * gas/ia64/regval.[ls]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/dv-raw-err.s: Don't use r0 or f0 as output operand.
+ * gas/ia64/dv-waw-err.s: Likewise.
+ * gas/ia64/reg-err.[ls]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/reloc.[ds]: New.
+ * gas/ia64/reloc-bad.[ls]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-02-15 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/operand-or.d: Pass -xnone to assembler.
+
+2005-02-13 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/label.l: Adjust line numbers.
+ * gas/ia64/label.s: Add .explicit.
+ * gas/ia64/nop_x.s: Likewise.
+ * gas/ia64/opc-a.d: Add assembler option -xnone.
+ * gas/ia64/opc-b.d: Likewise.
+ * gas/ia64/opc-f.d: Likewise.
+ * gas/ia64/opc-i.d: Likewise.
+ * gas/ia64/opc-m.d: Likewise.
+ * gas/ia64/opc-x.d: Likewise.
+ * gas/ia64/pseudo.d: Likewise.
+ * gas/ia64/regs.d: Likewise.
+ * gas/ia64/tls.d: Likewise.
+ * gas/ia64/unwind-err.l: Adjust line numbers.
+ * gas/ia64/unwind-err.s: Remove explicit stops.
+
+2005-02-13 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/pound.[ls]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-02-13 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/ia64.exp: Add "operand-or".
+
+ * gas/ia64/operand-or.d: New file.
+ * gas/ia64/operand-or.s: Likewise.
+
+2005-02-11 H.J. Lu <hongjiu.lu at intel.com>
+
+ * gas/ia64/ia64.exp: Pass -munwind-check=error for unwind-err
+ and proc.
+
+2005-02-10 Julian Brown <julian at codesourcery.com>
+
+ * gas/arm/unwind.d: Alter expected output to include dependency on
+ __aeabi_unwind_cpp_pr[01].
+
+2005-02-09 Jan Beulich <jbeulich at novell.com>
+
+ * gas/i386/intelok.s: Remove comments disabling alternative forms of
+ fbld, fbstp, and fldcw.
+ * gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw.
+
+2005-02-07 Inderpreet Singh <inderpreetb at noida.hcltech.com>
+
+ * gas/maxq10/jump.d: Fixed relative jump offset.
+ * gas/maxq10/call.d: Likewise.
+ * gas/maxq20/jump.d: Likewise.
+ * gas/maxq20/call.d: Likewise.
+
+2005-02-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * lib/gas-defs.exp: Support new directive "warning".
+
+2005-02-02 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/pred-rel.s: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * gas/mips/elf-rel23.d, gas/mips/elf-rel23a.d: Accept little-endian.
+ * gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Accept section
+ symbol names.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/repeat.[ds]: New.
+ * gas/macros/macros.exp: Run new test.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/macros/badarg.[ls]: New.
+ * gas/macros/end.[ls]: New.
+ * gas/macros/redef.[ls]: New.
+ * gas/macros/macros.exp (run_list_test): Copy from elsewhere.
+ Run new tests.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/operands.[ls]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/proc.[ls]: New.
+ * gas/ia64/unwind-err.[ls]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/bundling.[ds]: New.
+ * gas/ia64/label.[ls]: New.
+ * gas/ia64/last.[ls]: New.
+ * gas/ia64/slot2.[ls]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/pseudo.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-01-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/nop_x.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-01-27 Jan Beulich <jbeulich at novell.com>
+
+ * gas/ia64/dv-waw-err.l: Don't expect ar112 move warning to refer to
+ M-unit.
+ * gas/ia64/mov-ar.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
+2005-01-24 Nick Clifton <nickc at redhat.com>
+
+ * gas/all/sleb128.d: Do not assume an 8-bit byte.
+ * gas/all/quad.d: Likewise. Also allow for ports which order
+ bytes within words in other than simple big-endian or
+ little-endian fashions.
+
+2005-01-19 Richard Sandiford <rsandifo at redhat.com>
+
+ * gas/all/sleb128.[sd]: New test.
+ * gas/all/quad.[sd]: New test.
+ * gas/all/gas.exp: Run them.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
+
+ * gas/sh/arch/arch.exp: Correct the email address.
+ Correct a few comment typos.
+ Add new tests to ensure that the assembler will only accept
+ instructions valid in each architecture and vice-versa.
+ * gas/sh/arch/arch_expected.txt: Update/Correct the test results.
+ * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
+ * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
+ * gas/sh/arch/sh2a-nofpu.s: Generate new file.
+ * gas/sh/arch/sh2a-or-sh3e.s: Regenerate.
+ * gas/sh/arch/sh2a-or-sh4.s: Regenerate.
+ * gas/sh/arch/sh2a.s: Generate new file.
+ * gas/sh/arch/sh2e.s: Regenerate.
+ * gas/sh/arch/sh2.s: Regenerate.
+ * gas/sh/arch/sh3-dsp.s: Regenerate.
+ * gas/sh/arch/sh3e.s: Regenerate.
+ * gas/sh/arch/sh3-nommu.s: Regenerate.
+ * gas/sh/arch/sh3.s: Regenerate.
+ * gas/sh/arch/sh4al-dsp.s: Regenerate.
+ * gas/sh/arch/sh4a-nofpu.s: Regenerate.
+ * gas/sh/arch/sh4a.s: Regenerate.
+ * gas/sh/arch/sh4-nofpu.s: Regenerate.
+ * gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
+ * gas/sh/arch/sh4.s: Regenerate.
+ * gas/sh/arch/sh-dsp.s: Regenerate.
+ * gas/sh/arch/sh.s: Regenerate.
+
+2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386/i386.exp: Run "sib".
+
+ * gas/i386/sib.d: New file.
+ * gas/i386/sib.s: Likewise.
+
+2005-01-09 Andreas Schwab <schwab at suse.de>
+
+ * gas/i386/intel16.d: Ignore trailing text with #pass.
+ * gas/i386/intelok.d: Likewise.
+ * gas/i386/prefix.d: Likewise.
+ * gas/i386/sub.d: Likewise.
+ * gas/i386/padlock.d: Likewise.
+ * gas/i386/x86_64.d: Likewise.
+
+2005-01-05 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * gas/elf/elf.exp (section5): Use 0-9 instead of [:digit:].
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/gas/testsuite/gas/all/altmac2.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/all/altmac2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/all/altmac2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
.macro m1 str
- .ascii &str
+ .ascii "&str"
.endm
.data
Modified: branches/binutils/package/gas/testsuite/gas/all/altmacro.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/all/altmacro.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/all/altmacro.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -20,7 +20,7 @@
m2 9, 27
m3 "abc"
-m3 <123>
+m3 <"1", "23">
.noaltmacro
Modified: branches/binutils/package/gas/testsuite/gas/all/cond.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/all/cond.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/all/cond.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -27,14 +27,33 @@
[ ]*[1-9][0-9]*[ ]+\.comm[ ]+c,[ ]*1[ ]*
[ ]*[1-9][0-9]*[ ]+\.ifndef[ ]+c[ ]*
[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
-[ ]*[1-9][0-9]*[ ]+
-[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+x,[ ]*y[ ]*
-[ ]*[1-9][0-9]*[ ]+\.ifndef[ ]+x[ ]*
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+x[ ]*<>[ ]*x[ ]*
[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
-[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+y,[ ]*0[ ]*
-[ ]*[1-9][0-9]*[ ]+\.if[ ]+x[ ]*
-[ ]*[1-9][0-9]*[ ]+\.elseif[ ]+x[ ]*
+[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+y,[ ]*x[ ]*
+[ ]*[1-9][0-9]*[ ]+\.ifndef[ ]+y[ ]*
[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+x[ ]*<>[ ]*y[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+z,[ ]*x[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+y[ ]*<>[ ]*z[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+a,[ ]*y[ ]*\+[ ]*1[ ]*
+[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+b,[ ]*z[ ]*-[ ]*1[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+a[ ]*==[ ]*x[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+a[ ]*-[ ]*1[ ]*<>[ ]*x[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+a[ ]*<>[ ]*b[ ]*\+[ ]*2[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+a[ ]*-[ ]*b[ ]*<>[ ]*2[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.equiv[ ]+x,[ ]*0[ ]*
+[ ]*[1-9][0-9]*[ ]+\.if[ ]+y[ ]*
+[ ]*[1-9][0-9]*[ ]+\.elseif[ ]+y[ ]*
+[ ]*[1-9][0-9]*[ ]+\.endif[ ]*
[ ]*[1-9][0-9]*[ ]+
[ ]*[1-9][0-9]*[ ]+\.macro[ ]+m[ ]+x,[ ]*y[ ]*
#...
Modified: branches/binutils/package/gas/testsuite/gas/all/cond.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/all/cond.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/all/cond.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -35,17 +35,43 @@
.err
.endif
- .equiv x, y
- .ifndef x
+ .if x <> x
.err
.endif
- .equiv y, 0
- .if x
+ .equiv y, x
+ .ifndef y
.err
- .elseif x
+ .endif
+ .if x <> y
.err
.endif
+ .equiv z, x
+ .if y <> z
+ .err
+ .endif
+ .equiv a, y + 1
+ .equiv b, z - 1
+ .if a == x
+ .err
+ .endif
+ .if a - 1 <> x
+ .err
+ .endif
+ .if a <> b + 2
+ .err
+ .endif
+ .if a - b <> 2
+ .err
+ .endif
+
+ .equiv x, 0
+ .if y
+ .err
+ .elseif y
+ .err
+ .endif
+
.macro m x, y
.ifb \x
.long -1
Added: branches/binutils/package/gas/testsuite/gas/arm/abs12.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/abs12.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/abs12.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,20 @@
+#objdump: -dr
+#not-skip: *-vxworks
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: e5910000 ldr r0, \[r1\]
+ 0: R_ARM_ABS12 global
+ 4: e5910000 ldr r0, \[r1\]
+ 4: R_ARM_ABS12 global\+0xc
+ 8: e5910000 ldr r0, \[r1\]
+ 8: R_ARM_ABS12 global\+0x100000
+ c: e5910000 ldr r0, \[r1\]
+ c: R_ARM_ABS12 \.text\+0x18
+ 10: e5910000 ldr r0, \[r1\]
+ 10: R_ARM_ABS12 \.text\+0x24
+ 14: e5910000 ldr r0, \[r1\]
+ 14: R_ARM_ABS12 \.text\+0x100018
Added: branches/binutils/package/gas/testsuite/gas/arm/abs12.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/abs12.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/abs12.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,7 @@
+ ldr r0,[r1,#global]
+ ldr r0,[r1,#global + 12]
+ ldr r0,[r1,#global + 0x100000]
+ ldr r0,[r1,#local]
+ ldr r0,[r1,#local + 12]
+ ldr r0,[r1,#local + 0x100000]
+local:
Added: branches/binutils/package/gas/testsuite/gas/arm/arch7.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/arch7.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/arch7.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,76 @@
+#name: ARM V7 instructions
+#as: -march=armv7r
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]*> f6d6f008 pli \[r6, r8\]
+0+004 <[^>]*> f6d9f007 pli \[r9, r7\]
+0+008 <[^>]*> f6d0f101 pli \[r0, r1, lsl #2\]
+0+00c <[^>]*> f4d5f000 pli \[r5\]
+0+010 <[^>]*> f4d5ffff pli \[r5, #4095\]
+0+014 <[^>]*> f455ffff pli \[r5, #-4095\]
+0+018 <[^>]*> e320f0f0 dbg #0
+0+01c <[^>]*> e320f0ff dbg #15
+0+020 <[^>]*> f57ff05f dmb sy
+0+024 <[^>]*> f57ff05f dmb sy
+0+028 <[^>]*> f57ff04f dsb sy
+0+02c <[^>]*> f57ff04f dsb sy
+0+030 <[^>]*> f57ff047 dsb un
+0+034 <[^>]*> f57ff04e dsb st
+0+038 <[^>]*> f57ff046 dsb unst
+0+03c <[^>]*> f57ff06f isb sy
+0+040 <[^>]*> f57ff06f isb sy
+0+044 <[^>]*> f916 f008 pli \[r6, r8\]
+0+048 <[^>]*> f919 f007 pli \[r9, r7\]
+0+04c <[^>]*> f910 f021 pli \[r0, r1, lsl #2\]
+0+050 <[^>]*> f995 f000 pli \[r5\]
+0+054 <[^>]*> f995 ffff pli \[r5, #4095\]
+0+058 <[^>]*> f915 fcff pli \[r5, #-255\]
+0+05c <[^>]*> f99f ffff pli \[pc, #4095\] ; 0000105f <[^>]*>
+0+060 <[^>]*> f91f ffff pli \[pc, #-4095\] ; fffff065 <[^>]*>
+0+064 <[^>]*> f3af 80f0 dbg #0
+0+068 <[^>]*> f3af 80ff dbg #15
+0+06c <[^>]*> f3bf 8f5f dmb sy
+0+070 <[^>]*> f3bf 8f5f dmb sy
+0+074 <[^>]*> f3bf 8f4f dsb sy
+0+078 <[^>]*> f3bf 8f4f dsb sy
+0+07c <[^>]*> f3bf 8f47 dsb un
+0+080 <[^>]*> f3bf 8f4e dsb st
+0+084 <[^>]*> f3bf 8f46 dsb unst
+0+088 <[^>]*> f3bf 8f6f isb sy
+0+08c <[^>]*> f3bf 8f6f isb sy
+0+090 <[^>]*> fb99 f6fc sdiv r6, r9, ip
+0+094 <[^>]*> fb96 f9f3 sdiv r9, r6, r3
+0+098 <[^>]*> fbb6 f9f3 udiv r9, r6, r3
+0+09c <[^>]*> fbb9 f6fc udiv r6, r9, ip
+# V7M APSR has the same encoding as V7A CPSR_f
+0+0a0 <[^>]*> f3ef 8000 mrs r0, (CPSR|APSR)
+0+0a4 <[^>]*> f3ef 8001 mrs r0, IAPSR
+0+0a8 <[^>]*> f3ef 8002 mrs r0, EAPSR
+0+0ac <[^>]*> f3ef 8003 mrs r0, PSR
+0+0b0 <[^>]*> f3ef 8005 mrs r0, IPSR
+0+0b4 <[^>]*> f3ef 8006 mrs r0, EPSR
+0+0b8 <[^>]*> f3ef 8007 mrs r0, IEPSR
+0+0bc <[^>]*> f3ef 8008 mrs r0, MSP
+0+0c0 <[^>]*> f3ef 8009 mrs r0, PSP
+0+0c4 <[^>]*> f3ef 8010 mrs r0, PRIMASK
+0+0c8 <[^>]*> f3ef 8011 mrs r0, BASEPRI
+0+0cc <[^>]*> f3ef 8012 mrs r0, BASEPRI_MASK
+0+0d0 <[^>]*> f3ef 8013 mrs r0, FAULTMASK
+0+0d4 <[^>]*> f3ef 8014 mrs r0, CONTROL
+0+0d8 <[^>]*> f380 8800 msr (CPSR_f|APSR), r0
+0+0dc <[^>]*> f380 8801 msr IAPSR, r0
+0+0e0 <[^>]*> f380 8802 msr EAPSR, r0
+0+0e4 <[^>]*> f380 8803 msr PSR, r0
+0+0e8 <[^>]*> f380 8805 msr IPSR, r0
+0+0ec <[^>]*> f380 8806 msr EPSR, r0
+0+0f0 <[^>]*> f380 8807 msr IEPSR, r0
+0+0f4 <[^>]*> f380 8808 msr MSP, r0
+0+0f8 <[^>]*> f380 8809 msr PSP, r0
+0+0fc <[^>]*> f380 8810 msr PRIMASK, r0
+0+100 <[^>]*> f380 8811 msr BASEPRI, r0
+0+104 <[^>]*> f380 8812 msr BASEPRI_MASK, r0
+0+108 <[^>]*> f380 8813 msr FAULTMASK, r0
+0+10c <[^>]*> f380 8814 msr CONTROL, r0
Added: branches/binutils/package/gas/testsuite/gas/arm/arch7.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/arch7.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/arch7.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,79 @@
+ # ARMV7 instructions
+ .text
+ .arch armv7r
+label1:
+ pli [r6, r8]
+ pli [r9, r7]
+ pli [r0, r1, lsl #2]
+ pli [r5]
+ pli [r5, #4095]
+ pli [r5, #-4095]
+
+ dbg #0
+ dbg #15
+ dmb
+ dmb sy
+ dsb
+ dsb sy
+ dsb un
+ dsb st
+ dsb unst
+ isb
+ isb sy
+ .thumb
+ .thumb_func
+label2:
+ pli [r6, r8]
+ pli [r9, r7]
+ pli [r0, r1, lsl #2]
+ pli [r5]
+ pli [r5, #4095]
+ pli [r5, #-255]
+ pli [pc, #4095]
+ pli [pc, #-4095]
+
+ dbg #0
+ dbg #15
+ dmb
+ dmb sy
+ dsb
+ dsb sy
+ dsb un
+ dsb st
+ dsb unst
+ isb
+ isb sy
+
+ sdiv r6, r9, r12
+ sdiv r9, r6, r3
+ udiv r9, r6, r3
+ udiv r6, r9, r12
+ .arch armv7m
+ mrs r0, apsr
+ mrs r0, iapsr
+ mrs r0, eapsr
+ mrs r0, psr
+ mrs r0, ipsr
+ mrs r0, epsr
+ mrs r0, iepsr
+ mrs r0, msp
+ mrs r0, psp
+ mrs r0, primask
+ mrs r0, basepri
+ mrs r0, basepri_max
+ mrs r0, faultmask
+ mrs r0, control
+ msr apsr, r0
+ msr iapsr, r0
+ msr eapsr, r0
+ msr psr, r0
+ msr ipsr, r0
+ msr epsr, r0
+ msr iepsr, r0
+ msr msp, r0
+ msr psp, r0
+ msr primask, r0
+ msr basepri, r0
+ msr basepri_max, r0
+ msr faultmask, r0
+ msr control, r0
Added: branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: Invalid V7M instructions
+#as: -march=armv7m
+#error-output: arch7m-bad.l
+
Added: branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:5: Error: selected processor does not support 'A' form of this instruction -- `cpsie a'
+[^:]*:6: Error: Thumb does not support the 2-argument form of this instruction -- `cpsie i,#0x10'
+[^:]*:7: Error: selected processor does not support `cps #0x10'
+
Added: branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/arch7m-bad.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,7 @@
+ .text
+ .thumb
+ .thumb_func
+label:
+ cpsie a
+ cpsie i, #0x10
+ cps #0x10
Modified: branches/binutils/package/gas/testsuite/gas/arm/armv1.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/armv1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/armv1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -43,7 +43,7 @@
0+84 <[^>]*> e1b00000 ? movs r0, r0
0+88 <[^>]*> e1e00000 ? mvn r0, r0
0+8c <[^>]*> e1f00000 ? mvns r0, r0
-0+90 <[^>]*> ef000000 ? swi 0x00000000
+0+90 <[^>]*> ef000000 ? (swi|svc) 0x00000000
0+94 <[^>]*> e5900000 ? ldr r0, \[r0\]
0+98 <[^>]*> e5d00000 ? ldrb r0, \[r0\]
0+9c <[^>]*> e4b10000 ? ldrt r0, \[r1\]
Added: branches/binutils/package/gas/testsuite/gas/arm/blx-local.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/blx-local.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/blx-local.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+#name: Local BLX instructions
+#objdump: -dr --prefix-addresses --show-raw-insn
+#as:
+
+# Test assembler resolution of blx instructions.
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+
+0+00 <[^>]*> fa000000 blx 00+8 <foo>
+0+04 <[^>]*> fbffffff blx 00+a <foo2>
+0+08 <[^>]*> 46c0 nop \(mov r8, r8\)
+0+0a <[^>]*> 46c0 nop \(mov r8, r8\)
Added: branches/binutils/package/gas/testsuite/gas/arm/blx-local.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/blx-local.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/blx-local.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+ .text
+ .arch armv5t
+ .arm
+one:
+ blx foo
+ blx foo2
+
+ .thumb
+ .type foo, %function
+ .thumb_func
+foo:
+ nop
+ .type foo2, %function
+ .thumb_func
+foo2:
+ nop
Modified: branches/binutils/package/gas/testsuite/gas/arm/inst.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/inst.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/inst.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -159,8 +159,8 @@
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
-0+258 <[^>]*> ef123456 ? swi 0x00123456
-0+25c <[^>]*> 2f000033 ? swics 0x00000033
+0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
+0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
0+260 <[^>]*> eb...... ? bl 0[0123456789abcdef]+ <[^>]*>
[ ]*260:.*_wombat.*
0+264 <[^>]*> 5b...... ? blpl 0[0123456789abcdef]+ <[^>]*>
Modified: branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -7,3 +7,4 @@
[^:]*:6: Error: iWMMXt data register expected -- `wstrb wcgr0,\[r1\]'
[^:]*:7: Error: iWMMXt data register expected -- `wstrh wcgr0,\[r1\]'
[^:]*:8: Error: iWMMXt data register expected -- `wstrd wcgr0,\[r1\]'
+[^:]*:9: Error: iWMMXt control register expected -- `tmcr wibble,r1'
Modified: branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/iwmmxt-bad.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,3 +6,4 @@
wstrb wcgr0,[r1]
wstrh wcgr0,[r1]
wstrd wcgr0,[r1]
+ tmcr wibble,r1
Added: branches/binutils/package/gas/testsuite/gas/arm/nomapping.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/nomapping.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/nomapping.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+#nm: -n
+#name: ARM Mapping Symbols Ignored
+# This test is only valid on ELF based ports.
+#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+# Check ARM ELF Mapping Symbols are ignored properly
+0+0 t sym1
+0+c t sym2
Added: branches/binutils/package/gas/testsuite/gas/arm/nomapping.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/nomapping.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/nomapping.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,19 @@
+ .text
+ .arm
+sym1:
+ nop
+ .thumb
+ nop
+ nop
+$a.foo:
+$t.foo:
+$d.foo:
+@ Obsolete mapping symbols generated by armcc.
+$m:
+$m.foo:
+$f:
+$f.foo:
+$p:
+$p.foo:
+ .word 0
+sym2:
Modified: branches/binutils/package/gas/testsuite/gas/arm/pic.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/pic.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/pic.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,6 +2,8 @@
#name: PIC
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+# VxWorks needs a special variant of this file.
+#skip: *-*-vxworks*
# Test generation of PIC
Added: branches/binutils/package/gas/testsuite/gas/arm/pic_vxworks.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/pic_vxworks.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/pic_vxworks.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,22 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PIC
+#source: pic.s
+#not-skip: *-*-vxworks*
+
+# Test generation of PIC
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+00+0 <[^>]*> eb000000 bl .*
+ 0: R_ARM_PC24 foo\+0xfffffff8
+00+4 <[^>]*> eb000000 bl .*
+ 4: R_ARM_PLT32 foo\+0xfffffff8
+ \.\.\.
+ 8: R_ARM_ABS32 sym
+ c: R_ARM_GOT32 sym
+ 10: R_ARM_GOTOFF32 sym
+ 14: R_ARM_GOTPC _GLOBAL_OFFSET_TABLE_
+ 18: R_ARM_TARGET1 foo2
+ 1c: R_ARM_SBREL32 foo3
+ 20: R_ARM_TARGET2 foo4
Added: branches/binutils/package/gas/testsuite/gas/arm/svc.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/svc.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/svc.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+# name: SWI/SVC instructions
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+0+000 <[^>]+> ef123456 (swi|svc) 0x00123456
+0+004 <[^>]+> ef876543 (swi|svc) 0x00876543
+0+008 <[^>]+> ef123456 (swi|svc) 0x00123456
+0+00c <[^>]+> ef876543 (swi|svc) 0x00876543
+0+010 <[^>]+> df5a (swi|svc) 90
+0+012 <[^>]+> dfa5 (swi|svc) 165
+0+014 <[^>]+> df5a (swi|svc) 90
+0+016 <[^>]+> dfa5 (swi|svc) 165
Added: branches/binutils/package/gas/testsuite/gas/arm/svc.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/svc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/svc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+ .text
+ .arch armv4t
+ .syntax unified
+foo:
+ swi 0x123456
+ swi 0x876543
+ svc 0x123456
+ svc 0x876543
+
+ .thumb
+bar:
+ swi 0x5a
+ swi 0xa5
+ svc 0x5a
+ svc 0xa5
Modified: branches/binutils/package/gas/testsuite/gas/arm/thumb.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -126,14 +126,14 @@
0+0ec <[^>]+> ebfffffc bl 0+0e4 <[^>]+>
0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+>
0+0f4 <[^>]+> e12fff10 bx r0
-0+0f8 <[^>]+> ef123456 swi 0x00123456
+0+0f8 <[^>]+> ef123456 (swi|svc) 0x00123456
0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0,0+110 <[^>]+>\)
0+0fe <[^>]+> e77f b.n 0+000 <[^>]+>
0+100 <[^>]+> e018 b.n 0+134 <[^>]+>
0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+>
0+106 <[^>]+> f000 f815 bl 0+134 <[^>]+>
0+10a <[^>]+> 4700 bx r0
-0+10c <[^>]+> dfff swi 255
+0+10c <[^>]+> dfff (swi|svc) 255
\.\.\.
0+110 <[^>]+> d010 beq.n 0+134 <[^>]+>
0+112 <[^>]+> d10f bne.n 0+134 <[^>]+>
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,25 @@
+# as:
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]+> bf18 it ne
+0+002 <[^>]+> e7fd b(|ne).n 0+0 <[^>]+>
+0+004 <[^>]+> bf38 it cc
+0+006 <[^>]+> f7ff bffb b(|cc).w 0+0 <[^>]+>
+0+00a <[^>]+> bf28 it cs
+0+00c <[^>]+> f7ff fff8 bl(|cs) 0+0 <[^>]+>
+0+010 <[^>]+> bfb8 it lt
+0+012 <[^>]+> 47a8 blx(|lr) r5
+0+014 <[^>]+> bf08 it eq
+0+016 <[^>]+> 4740 bx(|eq) r8
+0+018 <[^>]+> bfc8 it gt
+0+01a <[^>]+> e8d4 f001 tbb(|gt) \[r4, r1\]
+0+01e <[^>]+> bfb8 it lt
+0+020 <[^>]+> df00 svc(|lt) 0
+0+022 <[^>]+> bfdc itt le
+0+024 <[^>]+> be00 bkpt 0x0000
+0+026 <[^>]+> bf00 nop
+0+028 <[^>]+> bf00 nop
+0+02a <[^>]+> bf00 nop
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_bcond.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,25 @@
+ .text
+ .arch armv7
+ .thumb
+ .syntax unified
+ .thumb_func
+thumb2_bcond:
+ it ne
+ bne thumb2_bcond
+ it cc
+ bcc.w thumb2_bcond
+ it cs
+ blcs thumb2_bcond
+ it lt
+ blxlt r5
+ it eq
+ bxeq r8
+ it gt
+ tbbgt [r4, r1]
+ it lt
+ svclt 0
+ itt le
+ bkpt #0
+ nople
+ nop
+ nop
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+# as: -march=armv6kt2
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]+> f517 0f80 cmn.w r7, #4194304 ; 0x400000
+0+004 <[^>]+> f5b8 0f80 cmp.w r8, #4194304 ; 0x400000
+0+008 <[^>]+> f5a4 0980 sub.w r9, r4, #4194304 ; 0x400000
+0+00c <[^>]+> f506 0380 add.w r3, r6, #4194304 ; 0x400000
+0+010 <[^>]+> f160 4500 sbc.w r5, r0, #2147483648 ; 0x80000000
+0+014 <[^>]+> f147 4400 adc.w r4, r7, #2147483648 ; 0x80000000
+0+018 <[^>]+> f022 4600 bic.w r6, r2, #2147483648 ; 0x80000000
+0+01c <[^>]+> f002 4800 and.w r8, r2, #2147483648 ; 0x80000000
+0+020 <[^>]+> f06f 4300 mvn.w r3, #2147483648 ; 0x80000000
+0+024 <[^>]+> f04f 4100 mov.w r1, #2147483648 ; 0x80000000
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_invert.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+ .text
+ .thumb
+ .syntax unified
+thumb2_invert:
+ cmp r7, #0xffc00000
+ cmn r8, #0xffc00000
+ add r9, r4, #0xffc00000
+ sub r3, r6, #0xffc00000
+ adc r5, r0, #0x7fffffff
+ sbc r4, r7, #0x7fffffff
+ and r6, r2, #0x7fffffff
+ bic r8, r2, #0x7fffffff
+ mov r3, 0x7fffffff
+ mvn r1, 0x7fffffff
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,3 @@
+#name: Invalid IT instructions
+#as:
+#error-output: thumb2_it_bad.l
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+[^:]*: Assembler messages:
+[^:]*:8: Error: branch must be last instruction in IT block -- `beq foo'
+[^:]*:9: Error: branch must be last instruction in IT block -- `bleq foo'
+[^:]*:10: Error: branch must be last instruction in IT block -- `blxeq r0'
+[^:]*:11: Error: instruction not allowed in IT block -- `cbzeq r0,foo'
+[^:]*:13: Error: branch must be last instruction in IT block -- `bxeq r0'
+[^:]*:14: Error: branch must be last instruction in IT block -- `tbbeq \[r0,r1\]'
+[^:]*:15: Error: instruction not allowed in IT block -- `cpsieeq f'
+[^:]*:17: Error: instruction not allowed in IT block -- `cpseq #0x10'
+[^:]*:19: Error: instruction is always unconditional -- `bkpteq 0'
+[^:]*:20: Error: instruction not allowed in IT block -- `setendeq le'
+[^:]*:22: Error: instruction not allowed in IT block -- `iteq eq'
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_it_bad.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,24 @@
+ .text
+ .syntax unified
+ .arch armv7a
+ .thumb
+ .thumb_func
+thumb2_it_bad:
+ itttt eq
+ beq foo
+ bleq foo
+ blxeq r0
+ cbzeq r0, foo
+ ittt eq
+ bxeq r0
+ tbbeq [r0, r1]
+ cpsieeq f
+ it eq
+ cpseq #0x10
+ itt eq
+ bkpteq 0
+ setendeq le
+ it eq
+ iteq eq
+ nop
+foo:
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+# as: -march=armv6t2
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]+> 4e04 ldr r6, \[pc, #16\] \(00+14 <[^>]+>\)
+0+002 <[^>]+> 4904 ldr r1, \[pc, #16\] \(00+14 <[^>]+>\)
+0+004 <[^>]+> f8df 600c ldr\.w r6, \[pc, #12\] ; 00+14 <[^>]+>
+0+008 <[^>]+> f8df 9008 ldr\.w r9, \[pc, #8\] ; 00+14 <[^>]+>
+0+00c <[^>]+> bf00 nop
+0+00e <[^>]+> f8df 5004 ldr\.w r5, \[pc, #4\] ; 00+14 <[^>]+>
+0+012 <[^>]+> 4900 ldr r1, \[pc, #0\] \(00+14 <[^>]+>\)
+0+014 <[^>]+> (5678|1234) .*
+0+016 <[^>]+> (1234|5678) .*
Added: branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb2_pool.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+ .text
+ .thumb
+ .syntax unified
+ .thumb_func
+thumb2_ldr:
+ ldr r6, =0x12345678
+ ldr.n r1, =0x12345678
+ ldr.w r6, =0x12345678
+ ldr r9, =0x12345678
+ nop
+ ldr.w r5, =0x12345678
+ ldr r1, =0x12345678
+ .pool
Modified: branches/binutils/package/gas/testsuite/gas/arm/thumb32.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb32.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb32.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -513,8 +513,8 @@
0[0-9a-f]+ <[^>]+> f815 f930 pld \[r5\], #-48
0[0-9a-f]+ <[^>]+> f815 ff30 pld \[r5, #48\]!
0[0-9a-f]+ <[^>]+> f815 fd30 pld \[r5, #-48\]!
-0[0-9a-f]+ <[^>]+> f815 f000 pld \[r5, r0\]
-0[0-9a-f]+ <[^>]+> f819 f000 pld \[r9, r0\]
+0[0-9a-f]+ <[^>]+> f815 f004 pld \[r5, r4\]
+0[0-9a-f]+ <[^>]+> f819 f00c pld \[r9, ip\]
0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ba <[^>]+>
0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+58e <[^>]+>
0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\]
@@ -523,8 +523,8 @@
0[0-9a-f]+ <[^>]+> e9c5 2300 strd r2, r3, \[r5\]
0[0-9a-f]+ <[^>]+> e9c5 230c strd r2, r3, \[r5, #48\]
0[0-9a-f]+ <[^>]+> e945 230c strd r2, r3, \[r5, #-48\]
-0[0-9a-f]+ <[^>]+> f835 1e00 ldrht r1, \[r5\]
-0[0-9a-f]+ <[^>]+> f835 1e30 ldrht r1, \[r5, #48\]
+0[0-9a-f]+ <[^>]+> f815 1e00 ldrbt r1, \[r5\]
+0[0-9a-f]+ <[^>]+> f815 1e30 ldrbt r1, \[r5, #48\]
0[0-9a-f]+ <[^>]+> f915 1e00 ldrsbt r1, \[r5\]
0[0-9a-f]+ <[^>]+> f915 1e30 ldrsbt r1, \[r5, #48\]
0[0-9a-f]+ <[^>]+> f835 1e00 ldrht r1, \[r5\]
@@ -631,16 +631,16 @@
0[0-9a-f]+ <[^>]+> f240 5000 movw r0, #1280 ; 0x500
0[0-9a-f]+ <[^>]+> f240 0081 movw r0, #129 ; 0x81
0[0-9a-f]+ <[^>]+> f64f 70ff movw r0, #65535 ; 0xffff
-0[0-9a-f]+ <[^>]+> f3ef 8000 mrs r0, SPSR
-0[0-9a-f]+ <[^>]+> f3ff 8000 mrs r0, CPSR
-0[0-9a-f]+ <[^>]+> f3ef 8900 mrs r9, SPSR
-0[0-9a-f]+ <[^>]+> f3ff 8900 mrs r9, CPSR
-0[0-9a-f]+ <[^>]+> f380 8100 msr SPSR_c, r0
-0[0-9a-f]+ <[^>]+> f390 8100 msr CPSR_c, r0
-0[0-9a-f]+ <[^>]+> f389 8100 msr SPSR_c, r9
-0[0-9a-f]+ <[^>]+> f380 8200 msr SPSR_x, r0
-0[0-9a-f]+ <[^>]+> f380 8400 msr SPSR_s, r0
-0[0-9a-f]+ <[^>]+> f380 8800 msr SPSR_f, r0
+0[0-9a-f]+ <[^>]+> f3ef 8000 mrs r0, CPSR
+0[0-9a-f]+ <[^>]+> f3ff 8000 mrs r0, SPSR
+0[0-9a-f]+ <[^>]+> f3ef 8900 mrs r9, CPSR
+0[0-9a-f]+ <[^>]+> f3ff 8900 mrs r9, SPSR
+0[0-9a-f]+ <[^>]+> f380 8100 msr CPSR_c, r0
+0[0-9a-f]+ <[^>]+> f390 8100 msr SPSR_c, r0
+0[0-9a-f]+ <[^>]+> f389 8100 msr CPSR_c, r9
+0[0-9a-f]+ <[^>]+> f380 8200 msr CPSR_x, r0
+0[0-9a-f]+ <[^>]+> f380 8400 msr CPSR_s, r0
+0[0-9a-f]+ <[^>]+> f380 8800 msr CPSR_f, r0
0[0-9a-f]+ <[^>]+> fb00 f000 mul\.w r0, r0, r0
0[0-9a-f]+ <[^>]+> fb09 f000 mul\.w r0, r9, r0
0[0-9a-f]+ <[^>]+> fb00 f009 mul\.w r0, r0, r9
@@ -944,3 +944,13 @@
0[0-9a-f]+ <[^>]+> f85d 8b04 ldr.w r8, \[sp\], #4
0[0-9a-f]+ <[^>]+> e930 0580 ldmdb r0!, \{r7, r8, sl\}
0[0-9a-f]+ <[^>]+> e920 0580 stmdb r0!, \{r7, r8, sl\}
+0[0-9a-f]+ <[^>]+> c806 ldmia r0!, \{r1, r2\}
+0[0-9a-f]+ <[^>]+> c006 stmia r0!, \{r1, r2\}
+0[0-9a-f]+ <[^>]+> e890 0300 ldmia.w r0, \{r8, r9\}
+0[0-9a-f]+ <[^>]+> e880 0300 stmia.w r0, \{r8, r9\}
+0[0-9a-f]+ <[^>]+> bf01 itttt eq
+0[0-9a-f]+ <[^>]+> c806 ldmia r0!, \{r1, r2\}
+0[0-9a-f]+ <[^>]+> c006 stmia r0!, \{r1, r2\}
+0[0-9a-f]+ <[^>]+> e890 0300 ldmia.w r0, \{r8, r9\}
+0[0-9a-f]+ <[^>]+> e880 0300 stmia.w r0, \{r8, r9\}
+0[0-9a-f]+ <[^>]+> bf00 nop
Modified: branches/binutils/package/gas/testsuite/gas/arm/thumb32.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/thumb32.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/thumb32.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -758,3 +758,14 @@
ldmdb r0!, {r7,r8,r10}
stmdb r0!, {r7,r8,r10}
+
+ ldm r0!, {r1, r2}
+ stm r0!, {r1, r2}
+ ldm r0, {r8, r9}
+ stm r0, {r8, r9}
+ itttt eq
+ ldmeq r0!, {r1, r2}
+ stmeq r0!, {r1, r2}
+ ldmeq r0, {r8, r9}
+ stmeq r0, {r8, r9}
+ nop
Modified: branches/binutils/package/gas/testsuite/gas/arm/unwind_vxworks.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/unwind_vxworks.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/unwind_vxworks.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,5 @@
#objdump: -sr
#name: Unwind table generation
-# This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
# This is the VxWorks variant of this file.
#source: unwind.s
#not-skip: *-*-vxworks*
@@ -10,22 +8,22 @@
RELOCATION RECORDS FOR \[.ARM.extab\]:
OFFSET TYPE VALUE
-0000000c R_ARM_PREL31 .text\+0x0+c
+0000000c R_ARM_PREL31 .text
RELOCATION RECORDS FOR \[.ARM.exidx\]:
OFFSET TYPE VALUE
00000000 R_ARM_PREL31 .text
00000000 R_ARM_NONE __aeabi_unwind_cpp_pr0
-00000008 R_ARM_PREL31 .text.*
-00000008 R_ARM_NONE __aeabi_unwind_cpp_pr1\+0x0+8
-0000000c R_ARM_PREL31 .ARM.extab\+0x0+c
-00000010 R_ARM_PREL31 .text.*
-00000014 R_ARM_PREL31 .ARM.extab.*
-00000018 R_ARM_PREL31 .text.*
-0000001c R_ARM_PREL31 .ARM.extab.*
-00000020 R_ARM_PREL31 .text.*
-00000028 R_ARM_PREL31 .text.*
+00000008 R_ARM_PREL31 .text.*\+0x00000004
+00000008 R_ARM_NONE __aeabi_unwind_cpp_pr1
+0000000c R_ARM_PREL31 .ARM.extab
+00000010 R_ARM_PREL31 .text.*\+0x00000008
+00000014 R_ARM_PREL31 .ARM.extab.*\+0x0000000c
+00000018 R_ARM_PREL31 .text.*\+0x0000000c
+0000001c R_ARM_PREL31 .ARM.extab.*\+0x0000001c
+00000020 R_ARM_PREL31 .text.*\+0x00000010
+00000028 R_ARM_PREL31 .text.*\+0x00000012
Contents of section .text:
@@ -36,8 +34,8 @@
0010 (8402b101 b0b0b005 2a000000 00c60181|01b10284 05b0b0b0 0000002a 8101c600) .*
0020 (b0b0c1c1|c1c1b0b0) 00000000 .*
Contents of section .ARM.exidx:
- 0000 00000000 (b0b0a880 00000000|80a8b0b0 00000000) 00000000 .*
+ 0000 00000000 (b0b0a880|80a8b0b0) 00000000 00000000 .*
0010 00000000 00000000 00000000 00000000 .*
- 0020 (00000000 08849780 00000000 b00fb180|00000000 80978408 00000000 80b10fb0) .*
+ 0020 00000000 (08849780|80978408) 00000000 (b00fb180|80b10fb0) .*
# Ignore .ARM.attributes section
#...
Modified: branches/binutils/package/gas/testsuite/gas/arm/wince_inst.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/arm/wince_inst.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/arm/wince_inst.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -161,8 +161,8 @@
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
-0+258 <[^>]*> ef123456 ? swi 0x00123456
-0+25c <[^>]*> 2f000033 ? swics 0x00000033
+0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
+0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
0+260 <[^>]*> eb000000 ? bl 0+268 <[^>]*>
[ ]*260:.*_wombat.*
0+264 <[^>]*> 5b000000 ? blpl 0+26c <[^>]*>
Modified: branches/binutils/package/gas/testsuite/gas/i386/equ.e
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/equ.e 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/equ.e 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,2 +1,2 @@
.*: Assembler messages:
-.*:23: Warning: Treating .* as memory reference
+.*:30: Warning: Treating .* as memory reference
Modified: branches/binutils/package/gas/testsuite/gas/i386/equ.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/equ.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/equ.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -16,6 +16,13 @@
.equ x, %st(1)
fadd x
+ .if r <> %ecx
+ .err
+ .endif
+ .if r == s
+ .err
+ .endif
+
.intel_syntax noprefix
.equ r, -2
.equ s, -2
@@ -33,5 +40,12 @@
.equ x, st(7)
fadd x
+ .if s <> gs
+ .err
+ .endif
+ .if s == x
+ .err
+ .endif
+
.equ r, -3
.equ s, -3
Modified: branches/binutils/package/gas/testsuite/gas/i386/i386.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/i386.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/i386.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -68,6 +68,9 @@
run_dump_test "crx"
run_list_test "cr-err" ""
run_dump_test "svme"
+ run_dump_test "merom"
+ run_dump_test "rep"
+ run_dump_test "rep-suffix"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.
@@ -132,7 +135,29 @@
run_dump_test "x86-64-vmx"
run_dump_test "immed64"
run_dump_test "x86-64-prescott"
+ run_dump_test "x86-64-crx"
+ run_dump_test "x86-64-crx-suffix"
+ run_dump_test "x86-64-drx"
+ run_dump_test "x86-64-drx-suffix"
+ run_dump_test "x86-64-merom"
+ run_dump_test "x86-64-rep"
+ run_dump_test "x86-64-rep-suffix"
+ if { ![istarget "*-*-aix*"]
+ && ![istarget "*-*-beos*"]
+ && ![istarget "*-*-*bsd*"]
+ && ![istarget "*-*-chaos*"]
+ && ![istarget "*-*-kaos*"]
+ && ![istarget "*-*-lynx*"]
+ && ![istarget "*-*-moss*"]
+ && ![istarget "*-*-nto-qnx*"]
+ && ![istarget "*-*-rtems*"]
+ && ![istarget "*-*-sco*"]
+ && ![istarget "*-*-solaris*"]
+ && ![istarget "*-*-sysv*"] } then {
+ run_dump_test "rex"
+ }
+
# For ELF targets verify that @unwind works.
if { ([istarget "*-*-elf*"] || [istarget "*-*-linux*"]
|| [istarget "*-*-solaris2.*"])
Added: branches/binutils/package/gas/testsuite/gas/i386/merom.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/merom.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/merom.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,73 @@
+#objdump: -dw
+#name: i386 merom
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+ 0: 0f 38 01 01[ ]+phaddw \(%ecx\),%mm0
+ 4: 0f 38 01 c1[ ]+phaddw %mm1,%mm0
+ 8: 66 0f 38 01 01[ ]+phaddw \(%ecx\),%xmm0
+ d: 66 0f 38 01 c1[ ]+phaddw %xmm1,%xmm0
+ 12: 0f 38 02 01[ ]+phaddd \(%ecx\),%mm0
+ 16: 0f 38 02 c1[ ]+phaddd %mm1,%mm0
+ 1a: 66 0f 38 02 01[ ]+phaddd \(%ecx\),%xmm0
+ 1f: 66 0f 38 02 c1[ ]+phaddd %xmm1,%xmm0
+ 24: 0f 38 03 01[ ]+phaddsw \(%ecx\),%mm0
+ 28: 0f 38 03 c1[ ]+phaddsw %mm1,%mm0
+ 2c: 66 0f 38 03 01[ ]+phaddsw \(%ecx\),%xmm0
+ 31: 66 0f 38 03 c1[ ]+phaddsw %xmm1,%xmm0
+ 36: 0f 38 05 01[ ]+phsubw \(%ecx\),%mm0
+ 3a: 0f 38 05 c1[ ]+phsubw %mm1,%mm0
+ 3e: 66 0f 38 05 01[ ]+phsubw \(%ecx\),%xmm0
+ 43: 66 0f 38 05 c1[ ]+phsubw %xmm1,%xmm0
+ 48: 0f 38 06 01[ ]+phsubd \(%ecx\),%mm0
+ 4c: 0f 38 06 c1[ ]+phsubd %mm1,%mm0
+ 50: 66 0f 38 06 01[ ]+phsubd \(%ecx\),%xmm0
+ 55: 66 0f 38 06 c1[ ]+phsubd %xmm1,%xmm0
+ 5a: 0f 38 07 01[ ]+phsubsw \(%ecx\),%mm0
+ 5e: 0f 38 07 c1[ ]+phsubsw %mm1,%mm0
+ 62: 66 0f 38 07 01[ ]+phsubsw \(%ecx\),%xmm0
+ 67: 66 0f 38 07 c1[ ]+phsubsw %xmm1,%xmm0
+ 6c: 0f 38 04 01[ ]+pmaddubsw \(%ecx\),%mm0
+ 70: 0f 38 04 c1[ ]+pmaddubsw %mm1,%mm0
+ 74: 66 0f 38 04 01[ ]+pmaddubsw \(%ecx\),%xmm0
+ 79: 66 0f 38 04 c1[ ]+pmaddubsw %xmm1,%xmm0
+ 7e: 0f 38 0b 01[ ]+pmulhrsw \(%ecx\),%mm0
+ 82: 0f 38 0b c1[ ]+pmulhrsw %mm1,%mm0
+ 86: 66 0f 38 0b 01[ ]+pmulhrsw \(%ecx\),%xmm0
+ 8b: 66 0f 38 0b c1[ ]+pmulhrsw %xmm1,%xmm0
+ 90: 0f 38 00 01[ ]+pshufb \(%ecx\),%mm0
+ 94: 0f 38 00 c1[ ]+pshufb %mm1,%mm0
+ 98: 66 0f 38 00 01[ ]+pshufb \(%ecx\),%xmm0
+ 9d: 66 0f 38 00 c1[ ]+pshufb %xmm1,%xmm0
+ a2: 0f 38 08 01[ ]+psignb \(%ecx\),%mm0
+ a6: 0f 38 08 c1[ ]+psignb %mm1,%mm0
+ aa: 66 0f 38 08 01[ ]+psignb \(%ecx\),%xmm0
+ af: 66 0f 38 08 c1[ ]+psignb %xmm1,%xmm0
+ b4: 0f 38 09 01[ ]+psignw \(%ecx\),%mm0
+ b8: 0f 38 09 c1[ ]+psignw %mm1,%mm0
+ bc: 66 0f 38 09 01[ ]+psignw \(%ecx\),%xmm0
+ c1: 66 0f 38 09 c1[ ]+psignw %xmm1,%xmm0
+ c6: 0f 38 0a 01[ ]+psignd \(%ecx\),%mm0
+ ca: 0f 38 0a c1[ ]+psignd %mm1,%mm0
+ ce: 66 0f 38 0a 01[ ]+psignd \(%ecx\),%xmm0
+ d3: 66 0f 38 0a c1[ ]+psignd %xmm1,%xmm0
+ d8: 0f 3a 0f 01 02[ ]+palignr \$0x2,\(%ecx\),%mm0
+ dd: 0f 3a 0f c1 02[ ]+palignr \$0x2,%mm1,%mm0
+ e2: 66 0f 3a 0f 01 02[ ]+palignr \$0x2,\(%ecx\),%xmm0
+ e8: 66 0f 3a 0f c1 02[ ]+palignr \$0x2,%xmm1,%xmm0
+ ee: 0f 38 1c 01[ ]+pabsb \(%ecx\),%mm0
+ f2: 0f 38 1c c1[ ]+pabsb %mm1,%mm0
+ f6: 66 0f 38 1c 01[ ]+pabsb \(%ecx\),%xmm0
+ fb: 66 0f 38 1c c1[ ]+pabsb %xmm1,%xmm0
+ 100: 0f 38 1d 01[ ]+pabsw \(%ecx\),%mm0
+ 104: 0f 38 1d c1[ ]+pabsw %mm1,%mm0
+ 108: 66 0f 38 1d 01[ ]+pabsw \(%ecx\),%xmm0
+ 10d: 66 0f 38 1d c1[ ]+pabsw %xmm1,%xmm0
+ 112: 0f 38 1e 01[ ]+pabsd \(%ecx\),%mm0
+ 116: 0f 38 1e c1[ ]+pabsd %mm1,%mm0
+ 11a: 66 0f 38 1e 01[ ]+pabsd \(%ecx\),%xmm0
+ 11f: 66 0f 38 1e c1[ ]+pabsd %xmm1,%xmm0
+ ...
Added: branches/binutils/package/gas/testsuite/gas/i386/merom.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/merom.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/merom.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,70 @@
+#Merom New Instructions
+
+ .text
+foo:
+ phaddw (%ecx),%mm0
+ phaddw %mm1,%mm0
+ phaddw (%ecx),%xmm0
+ phaddw %xmm1,%xmm0
+ phaddd (%ecx),%mm0
+ phaddd %mm1,%mm0
+ phaddd (%ecx),%xmm0
+ phaddd %xmm1,%xmm0
+ phaddsw (%ecx),%mm0
+ phaddsw %mm1,%mm0
+ phaddsw (%ecx),%xmm0
+ phaddsw %xmm1,%xmm0
+ phsubw (%ecx),%mm0
+ phsubw %mm1,%mm0
+ phsubw (%ecx),%xmm0
+ phsubw %xmm1,%xmm0
+ phsubd (%ecx),%mm0
+ phsubd %mm1,%mm0
+ phsubd (%ecx),%xmm0
+ phsubd %xmm1,%xmm0
+ phsubsw (%ecx),%mm0
+ phsubsw %mm1,%mm0
+ phsubsw (%ecx),%xmm0
+ phsubsw %xmm1,%xmm0
+ pmaddubsw (%ecx),%mm0
+ pmaddubsw %mm1,%mm0
+ pmaddubsw (%ecx),%xmm0
+ pmaddubsw %xmm1,%xmm0
+ pmulhrsw (%ecx),%mm0
+ pmulhrsw %mm1,%mm0
+ pmulhrsw (%ecx),%xmm0
+ pmulhrsw %xmm1,%xmm0
+ pshufb (%ecx),%mm0
+ pshufb %mm1,%mm0
+ pshufb (%ecx),%xmm0
+ pshufb %xmm1,%xmm0
+ psignb (%ecx),%mm0
+ psignb %mm1,%mm0
+ psignb (%ecx),%xmm0
+ psignb %xmm1,%xmm0
+ psignw (%ecx),%mm0
+ psignw %mm1,%mm0
+ psignw (%ecx),%xmm0
+ psignw %xmm1,%xmm0
+ psignd (%ecx),%mm0
+ psignd %mm1,%mm0
+ psignd (%ecx),%xmm0
+ psignd %xmm1,%xmm0
+ palignr $0x2,(%ecx),%mm0
+ palignr $0x2,%mm1,%mm0
+ palignr $0x2,(%ecx),%xmm0
+ palignr $0x2,%xmm1,%xmm0
+ pabsb (%ecx),%mm0
+ pabsb %mm1,%mm0
+ pabsb (%ecx),%xmm0
+ pabsb %xmm1,%xmm0
+ pabsw (%ecx),%mm0
+ pabsw %mm1,%mm0
+ pabsw (%ecx),%xmm0
+ pabsw %xmm1,%xmm0
+ pabsd (%ecx),%mm0
+ pabsd %mm1,%mm0
+ pabsd (%ecx),%xmm0
+ pabsd %xmm1,%xmm0
+
+ .p2align 4,0
Modified: branches/binutils/package/gas/testsuite/gas/i386/naked.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/naked.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/naked.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -15,7 +15,7 @@
1b: 8c 2c ed 00 00 00 00 [ ]*movw %gs,0x0\(,%ebp,8\)
22: 26 88 25 00 00 00 00 [ ]*mov %ah,%es:0x0
29: 2e 8b 74 14 80 [ ]*mov %cs:0xffffff80\(%esp,%edx,1\),%esi
- 2e: f3 65 a5 [ ]*repz movsl %gs:\(%esi\),%es:\(%edi\)
+ 2e: f3 65 a5 [ ]*rep movsl %gs:\(%esi\),%es:\(%edi\)
31: ec [ ]*in \(%dx\),%al
32: 66 ef [ ]*out %ax,\(%dx\)
34: 67 d2 14 [ ]*addr16 rclb %cl,\(%si\)
Modified: branches/binutils/package/gas/testsuite/gas/i386/reloc64.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/reloc64.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/reloc64.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -19,6 +19,7 @@
.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_PC8[ ]+xtrn\+0xf+f
+.*[ ]+R_X86_64_GOT64[ ]+xtrn
.*[ ]+R_X86_64_GOT32[ ]+xtrn
.*[ ]+R_X86_64_GOT32[ ]+xtrn
.*[ ]+R_X86_64_GOTOFF64[ ]+xtrn
@@ -26,7 +27,7 @@
.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn\+0xf+c
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
-.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+f
+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
.*[ ]+R_X86_64_PLT32[ ]+xtrn
.*[ ]+R_X86_64_PLT32[ ]+xtrn
@@ -50,7 +51,9 @@
#...
.*[ ]+R_X86_64_64[ ]+xtrn
.*[ ]+R_X86_64_PC64[ ]+xtrn
+.*[ ]+R_X86_64_GOT64[ ]+xtrn
.*[ ]+R_X86_64_GOTOFF64[ ]+xtrn
+.*[ ]+R_X86_64_GOTPCREL64[ ]+xtrn
.*[ ]+R_X86_64_DTPOFF64[ ]+xtrn
.*[ ]+R_X86_64_TPOFF64[ ]+xtrn
.*[ ]+R_X86_64_32[ ]+xtrn
Modified: branches/binutils/package/gas/testsuite/gas/i386/reloc64.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/reloc64.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/reloc64.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,5 @@
.*: Assembler messages:
.*:29: Error: .*
-.*:33: Error: .*
.*:35: Error: .*
.*:36: Error: .*
.*:37: Error: .*
@@ -50,8 +49,6 @@
.*:123: Error: .*
.*:125: Error: .*
.*:126: Error: .*
-.*:131: Error: .*
-.*:133: Error: .*
.*:136: Error: .*
.*:137: Error: .*
.*:138: Error: .*
Modified: branches/binutils/package/gas/testsuite/gas/i386/reloc64.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/reloc64.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/reloc64.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -30,7 +30,7 @@
call xtrn
jrcxz xtrn
-bad movabs $xtrn at got, %rax
+ movabs $xtrn at got, %rax
add $xtrn at got, %rax
bad mov $xtrn at got, %eax
bad mov $xtrn at got, %ax
@@ -128,9 +128,9 @@
.data
.quad xtrn
.quad xtrn - .
-bad .quad xtrn at got
+ .quad xtrn at got
.quad xtrn at gotoff
-bad .quad xtrn at gotpcrel
+ .quad xtrn at gotpcrel
ill .quad _GLOBAL_OFFSET_TABLE_
ill .quad _GLOBAL_OFFSET_TABLE_ - .
bad .quad xtrn at plt
Added: branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+#objdump: -dwMsuffix
+#name: i386 rep prefix (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_start>:
+ 0: f3 ac[ ]+rep lodsb %ds:\(%esi\),%al
+ 2: f3 aa[ ]+rep stosb %al,%es:\(%edi\)
+ 4: f3 66 ad[ ]+rep lodsw %ds:\(%esi\),%ax
+ 7: f3 66 ab[ ]+rep stosw %ax,%es:\(%edi\)
+ a: f3 ad[ ]+rep lodsl %ds:\(%esi\),%eax
+ c: f3 ab[ ]+rep stosl %eax,%es:\(%edi\)
+#pass
Added: branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rep-suffix.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+# Disassembling with -Msuffix.
+ .text
+_start:
+ rep lodsb
+ rep stosb
+ rep lodsw
+ rep stosw
+ rep lodsl
+ rep stosl
Added: branches/binutils/package/gas/testsuite/gas/i386/rep.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rep.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rep.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,51 @@
+#objdump: -dw
+#name: i386 rep prefix
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ 0: f3 6c[ ]+rep insb \(%dx\),%es:\(%edi\)
+ 2: f3 6e[ ]+rep outsb %ds:\(%esi\),\(%dx\)
+ 4: f3 a4[ ]+rep movsb %ds:\(%esi\),%es:\(%edi\)
+ 6: f3 ac[ ]+rep lods %ds:\(%esi\),%al
+ 8: f3 aa[ ]+rep stos %al,%es:\(%edi\)
+ a: f3 a6[ ]+repz cmpsb %es:\(%edi\),%ds:\(%esi\)
+ c: f3 ae[ ]+repz scas %es:\(%edi\),%al
+ e: f3 66 6d[ ]+rep insw \(%dx\),%es:\(%edi\)
+ 11: f3 66 6f[ ]+rep outsw %ds:\(%esi\),\(%dx\)
+ 14: f3 66 a5[ ]+rep movsw %ds:\(%esi\),%es:\(%edi\)
+ 17: f3 66 ad[ ]+rep lods %ds:\(%esi\),%ax
+ 1a: f3 66 ab[ ]+rep stos %ax,%es:\(%edi\)
+ 1d: f3 66 a7[ ]+repz cmpsw %es:\(%edi\),%ds:\(%esi\)
+ 20: f3 66 af[ ]+repz scas %es:\(%edi\),%ax
+ 23: f3 6d[ ]+rep insl \(%dx\),%es:\(%edi\)
+ 25: f3 6f[ ]+rep outsl %ds:\(%esi\),\(%dx\)
+ 27: f3 a5[ ]+rep movsl %ds:\(%esi\),%es:\(%edi\)
+ 29: f3 ad[ ]+rep lods %ds:\(%esi\),%eax
+ 2b: f3 ab[ ]+rep stos %eax,%es:\(%edi\)
+ 2d: f3 a7[ ]+repz cmpsl %es:\(%edi\),%ds:\(%esi\)
+ 2f: f3 af[ ]+repz scas %es:\(%edi\),%eax
+ 31: f3 67 6c[ ]+rep addr16 insb \(%dx\),%es:\(%di\)
+ 34: f3 67 6e[ ]+rep addr16 outsb %ds:\(%si\),\(%dx\)
+ 37: f3 67 a4[ ]+rep addr16 movsb %ds:\(%si\),%es:\(%di\)
+ 3a: f3 67 ac[ ]+rep addr16 lods %ds:\(%si\),%al
+ 3d: f3 67 aa[ ]+rep addr16 stos %al,%es:\(%di\)
+ 40: f3 67 a6[ ]+repz addr16 cmpsb %es:\(%di\),%ds:\(%si\)
+ 43: f3 67 ae[ ]+repz addr16 scas %es:\(%di\),%al
+ 46: f3 67 66 6d[ ]+rep addr16 insw \(%dx\),%es:\(%di\)
+ 4a: f3 67 66 6f[ ]+rep addr16 outsw %ds:\(%si\),\(%dx\)
+ 4e: f3 67 66 a5[ ]+rep addr16 movsw %ds:\(%si\),%es:\(%di\)
+ 52: f3 67 66 ad[ ]+rep addr16 lods %ds:\(%si\),%ax
+ 56: f3 67 66 ab[ ]+rep addr16 stos %ax,%es:\(%di\)
+ 5a: f3 67 66 a7[ ]+repz addr16 cmpsw %es:\(%di\),%ds:\(%si\)
+ 5e: f3 67 66 af[ ]+repz addr16 scas %es:\(%di\),%ax
+ 62: f3 67 6d[ ]+rep addr16 insl \(%dx\),%es:\(%di\)
+ 65: f3 67 6f[ ]+rep addr16 outsl %ds:\(%si\),\(%dx\)
+ 68: f3 67 a5[ ]+rep addr16 movsl %ds:\(%si\),%es:\(%di\)
+ 6b: f3 67 ad[ ]+rep addr16 lods %ds:\(%si\),%eax
+ 6e: f3 67 ab[ ]+rep addr16 stos %eax,%es:\(%di\)
+ 71: f3 67 a7[ ]+repz addr16 cmpsl %es:\(%di\),%ds:\(%si\)
+ 74: f3 67 af[ ]+repz addr16 scas %es:\(%di\),%eax
+ ...
Added: branches/binutils/package/gas/testsuite/gas/i386/rep.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rep.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rep.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,52 @@
+ .text
+
+_start:
+ rep insb
+ rep outsb
+ rep movsb
+ rep lodsb
+ rep stosb
+ repz cmpsb
+ repz scasb
+
+ rep insw
+ rep outsw
+ rep movsw
+ rep lodsw
+ rep stosw
+ repz cmpsw
+ repz scasw
+
+ rep insl
+ rep outsl
+ rep movsl
+ rep lodsl
+ rep stosl
+ repz cmpsl
+ repz scasl
+
+ addr16 rep insb
+ addr16 rep outsb
+ addr16 rep movsb
+ addr16 rep lodsb
+ addr16 rep stosb
+ addr16 repz cmpsb
+ addr16 repz scasb
+
+ addr16 rep insw
+ addr16 rep outsw
+ addr16 rep movsw
+ addr16 rep lodsw
+ addr16 rep stosw
+ addr16 repz cmpsw
+ addr16 repz scasw
+
+ addr16 rep insl
+ addr16 rep outsl
+ addr16 rep movsl
+ addr16 rep lodsl
+ addr16 rep stosl
+ addr16 repz cmpsl
+ addr16 repz scasl
+
+ .p2align 4,0
Added: branches/binutils/package/gas/testsuite/gas/i386/rex.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rex.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rex.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,17 @@
+#objdump: -dw
+#name: x86-64 manual rex prefix use
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[0-9a-f]+:[ ]+40 0f ae 00[ ]+rex fxsavel?[ ]+\(%rax\)
+[ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+(rex64 )?fxsaveq?[ ]+\(%rax\)
+[ ]*[0-9a-f]+:[ ]+41 0f ae 00[ ]+fxsavel?[ ]+\(%r8\)
+[ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+(rex64Z? )?fxsaveq?[ ]+\(%r8\)
+[ ]*[0-9a-f]+:[ ]+42 0f ae 04 05 00 00 00 00[ ]+fxsavel?[ ]+(0x0)?\(,%r8(,1)?\)
+[ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+(rex64Y? )?fxsaveq?[ ]+(0x0)?\(,%r8(,1)?\)
+[ ]*[0-9a-f]+:[ ]+43 0f ae 04 00[ ]+fxsavel?[ ]+\(%r8,%r8(,1)?\)
+[ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+(rex64(YZ)? )?fxsaveq?[ ]+\(%r8,%r8(,1)?\)
+#pass
Added: branches/binutils/package/gas/testsuite/gas/i386/rex.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/rex.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/rex.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+ .text
+
+_start:
+ rex/fxsave (%rax)
+ rex64/fxsave (%rax)
+ rex/fxsave (%r8)
+ rex64/fxsave (%r8)
+ rex/fxsave (,%r8)
+ rex64/fxsave (,%r8)
+ rex/fxsave (%r8,%r8)
+ rex64/fxsave (%r8,%r8)
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx-suffix.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx-suffix.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx-suffix.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,21 @@
+#objdump: -dwMsuffix
+#name: x86-64 control register related opcodes (with suffixes)
+#source: x86-64-crx.s
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,21 @@
+#objdump: -dw
+#name: x86-64 control register related opcodes
+#source: x86-64-crx.s
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
+[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
+[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
+[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
+[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-crx.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,18 @@
+.text
+_start:
+ movq %cr8, %rax
+ movq %cr8, %rdi
+ movq %rax, %cr8
+ movq %rdi, %cr8
+
+.att_syntax noprefix
+ movq cr8, rax
+ movq cr8, rdi
+ movq rax, cr8
+ movq rdi, cr8
+
+.intel_syntax noprefix
+ mov rax, cr8
+ mov rdi, cr8
+ mov cr8, rax
+ mov cr8, rdi
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx-suffix.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx-suffix.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx-suffix.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,21 @@
+#objdump: -dwMsuffix
+#name: x86-64 debug register related opcodes (with suffixes)
+#source: x86-64-drx.s
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,20 @@
+#objdump: -dw
+#name: x86-64 debug register related opcodes
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8
+[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
+[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
+[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
+[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-drx.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,18 @@
+.text
+_start:
+ movq %dr8, %rax
+ movq %dr8, %rdi
+ movq %rax, %dr8
+ movq %rdi, %dr8
+
+.att_syntax noprefix
+ movq dr8, rax
+ movq dr8, rdi
+ movq rax, dr8
+ movq rdi, dr8
+
+.intel_syntax noprefix
+ mov rax, dr8
+ mov rdi, dr8
+ mov dr8, rax
+ mov dr8, rdi
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,73 @@
+#objdump: -dw
+#name: x86-64 merom
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+ 0: 0f 38 01 01[ ]+phaddw \(%rcx\),%mm0
+ 4: 0f 38 01 c1[ ]+phaddw %mm1,%mm0
+ 8: 66 0f 38 01 01[ ]+phaddw \(%rcx\),%xmm0
+ d: 66 0f 38 01 c1[ ]+phaddw %xmm1,%xmm0
+ 12: 0f 38 02 01[ ]+phaddd \(%rcx\),%mm0
+ 16: 0f 38 02 c1[ ]+phaddd %mm1,%mm0
+ 1a: 66 0f 38 02 01[ ]+phaddd \(%rcx\),%xmm0
+ 1f: 66 0f 38 02 c1[ ]+phaddd %xmm1,%xmm0
+ 24: 0f 38 03 01[ ]+phaddsw \(%rcx\),%mm0
+ 28: 0f 38 03 c1[ ]+phaddsw %mm1,%mm0
+ 2c: 66 0f 38 03 01[ ]+phaddsw \(%rcx\),%xmm0
+ 31: 66 0f 38 03 c1[ ]+phaddsw %xmm1,%xmm0
+ 36: 0f 38 05 01[ ]+phsubw \(%rcx\),%mm0
+ 3a: 0f 38 05 c1[ ]+phsubw %mm1,%mm0
+ 3e: 66 0f 38 05 01[ ]+phsubw \(%rcx\),%xmm0
+ 43: 66 0f 38 05 c1[ ]+phsubw %xmm1,%xmm0
+ 48: 0f 38 06 01[ ]+phsubd \(%rcx\),%mm0
+ 4c: 0f 38 06 c1[ ]+phsubd %mm1,%mm0
+ 50: 66 0f 38 06 01[ ]+phsubd \(%rcx\),%xmm0
+ 55: 66 0f 38 06 c1[ ]+phsubd %xmm1,%xmm0
+ 5a: 0f 38 07 01[ ]+phsubsw \(%rcx\),%mm0
+ 5e: 0f 38 07 c1[ ]+phsubsw %mm1,%mm0
+ 62: 66 0f 38 07 01[ ]+phsubsw \(%rcx\),%xmm0
+ 67: 66 0f 38 07 c1[ ]+phsubsw %xmm1,%xmm0
+ 6c: 0f 38 04 01[ ]+pmaddubsw \(%rcx\),%mm0
+ 70: 0f 38 04 c1[ ]+pmaddubsw %mm1,%mm0
+ 74: 66 0f 38 04 01[ ]+pmaddubsw \(%rcx\),%xmm0
+ 79: 66 0f 38 04 c1[ ]+pmaddubsw %xmm1,%xmm0
+ 7e: 0f 38 0b 01[ ]+pmulhrsw \(%rcx\),%mm0
+ 82: 0f 38 0b c1[ ]+pmulhrsw %mm1,%mm0
+ 86: 66 0f 38 0b 01[ ]+pmulhrsw \(%rcx\),%xmm0
+ 8b: 66 0f 38 0b c1[ ]+pmulhrsw %xmm1,%xmm0
+ 90: 0f 38 00 01[ ]+pshufb \(%rcx\),%mm0
+ 94: 0f 38 00 c1[ ]+pshufb %mm1,%mm0
+ 98: 66 0f 38 00 01[ ]+pshufb \(%rcx\),%xmm0
+ 9d: 66 0f 38 00 c1[ ]+pshufb %xmm1,%xmm0
+ a2: 0f 38 08 01[ ]+psignb \(%rcx\),%mm0
+ a6: 0f 38 08 c1[ ]+psignb %mm1,%mm0
+ aa: 66 0f 38 08 01[ ]+psignb \(%rcx\),%xmm0
+ af: 66 0f 38 08 c1[ ]+psignb %xmm1,%xmm0
+ b4: 0f 38 09 01[ ]+psignw \(%rcx\),%mm0
+ b8: 0f 38 09 c1[ ]+psignw %mm1,%mm0
+ bc: 66 0f 38 09 01[ ]+psignw \(%rcx\),%xmm0
+ c1: 66 0f 38 09 c1[ ]+psignw %xmm1,%xmm0
+ c6: 0f 38 0a 01[ ]+psignd \(%rcx\),%mm0
+ ca: 0f 38 0a c1[ ]+psignd %mm1,%mm0
+ ce: 66 0f 38 0a 01[ ]+psignd \(%rcx\),%xmm0
+ d3: 66 0f 38 0a c1[ ]+psignd %xmm1,%xmm0
+ d8: 0f 3a 0f 01 02[ ]+palignr \$0x2,\(%rcx\),%mm0
+ dd: 0f 3a 0f c1 02[ ]+palignr \$0x2,%mm1,%mm0
+ e2: 66 0f 3a 0f 01 02[ ]+palignr \$0x2,\(%rcx\),%xmm0
+ e8: 66 0f 3a 0f c1 02[ ]+palignr \$0x2,%xmm1,%xmm0
+ ee: 0f 38 1c 01[ ]+pabsb \(%rcx\),%mm0
+ f2: 0f 38 1c c1[ ]+pabsb %mm1,%mm0
+ f6: 66 0f 38 1c 01[ ]+pabsb \(%rcx\),%xmm0
+ fb: 66 0f 38 1c c1[ ]+pabsb %xmm1,%xmm0
+ 100: 0f 38 1d 01[ ]+pabsw \(%rcx\),%mm0
+ 104: 0f 38 1d c1[ ]+pabsw %mm1,%mm0
+ 108: 66 0f 38 1d 01[ ]+pabsw \(%rcx\),%xmm0
+ 10d: 66 0f 38 1d c1[ ]+pabsw %xmm1,%xmm0
+ 112: 0f 38 1e 01[ ]+pabsd \(%rcx\),%mm0
+ 116: 0f 38 1e c1[ ]+pabsd %mm1,%mm0
+ 11a: 66 0f 38 1e 01[ ]+pabsd \(%rcx\),%xmm0
+ 11f: 66 0f 38 1e c1[ ]+pabsd %xmm1,%xmm0
+ ...
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-merom.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,70 @@
+#Merom New Instructions
+
+ .text
+foo:
+ phaddw (%rcx),%mm0
+ phaddw %mm1,%mm0
+ phaddw (%rcx),%xmm0
+ phaddw %xmm1,%xmm0
+ phaddd (%rcx),%mm0
+ phaddd %mm1,%mm0
+ phaddd (%rcx),%xmm0
+ phaddd %xmm1,%xmm0
+ phaddsw (%rcx),%mm0
+ phaddsw %mm1,%mm0
+ phaddsw (%rcx),%xmm0
+ phaddsw %xmm1,%xmm0
+ phsubw (%rcx),%mm0
+ phsubw %mm1,%mm0
+ phsubw (%rcx),%xmm0
+ phsubw %xmm1,%xmm0
+ phsubd (%rcx),%mm0
+ phsubd %mm1,%mm0
+ phsubd (%rcx),%xmm0
+ phsubd %xmm1,%xmm0
+ phsubsw (%rcx),%mm0
+ phsubsw %mm1,%mm0
+ phsubsw (%rcx),%xmm0
+ phsubsw %xmm1,%xmm0
+ pmaddubsw (%rcx),%mm0
+ pmaddubsw %mm1,%mm0
+ pmaddubsw (%rcx),%xmm0
+ pmaddubsw %xmm1,%xmm0
+ pmulhrsw (%rcx),%mm0
+ pmulhrsw %mm1,%mm0
+ pmulhrsw (%rcx),%xmm0
+ pmulhrsw %xmm1,%xmm0
+ pshufb (%rcx),%mm0
+ pshufb %mm1,%mm0
+ pshufb (%rcx),%xmm0
+ pshufb %xmm1,%xmm0
+ psignb (%rcx),%mm0
+ psignb %mm1,%mm0
+ psignb (%rcx),%xmm0
+ psignb %xmm1,%xmm0
+ psignw (%rcx),%mm0
+ psignw %mm1,%mm0
+ psignw (%rcx),%xmm0
+ psignw %xmm1,%xmm0
+ psignd (%rcx),%mm0
+ psignd %mm1,%mm0
+ psignd (%rcx),%xmm0
+ psignd %xmm1,%xmm0
+ palignr $0x2,(%rcx),%mm0
+ palignr $0x2,%mm1,%mm0
+ palignr $0x2,(%rcx),%xmm0
+ palignr $0x2,%xmm1,%xmm0
+ pabsb (%rcx),%mm0
+ pabsb %mm1,%mm0
+ pabsb (%rcx),%xmm0
+ pabsb %xmm1,%xmm0
+ pabsw (%rcx),%mm0
+ pabsw %mm1,%mm0
+ pabsw (%rcx),%xmm0
+ pabsw %xmm1,%xmm0
+ pabsd (%rcx),%mm0
+ pabsd %mm1,%mm0
+ pabsd (%rcx),%xmm0
+ pabsd %xmm1,%xmm0
+
+ .p2align 4,0
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,17 @@
+#objdump: -dwMsuffix
+#name: x86-64 rep prefix (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_start>:
+ 0: f3 ac[ ]+rep lodsb %ds:\(%rsi\),%al
+ 2: f3 aa[ ]+rep stosb %al,%es:\(%rdi\)
+ 4: f3 66 ad[ ]+rep lodsw %ds:\(%rsi\),%ax
+ 7: f3 66 ab[ ]+rep stosw %ax,%es:\(%rdi\)
+ a: f3 ad[ ]+rep lodsl %ds:\(%rsi\),%eax
+ c: f3 ab[ ]+rep stosl %eax,%es:\(%rdi\)
+ e: f3 48 ad[ ]+rep lodsq %ds:\(%rsi\),%rax
+ 11: f3 48 ab[ ]+rep stosq %rax,%es:\(%rdi\)
+#pass
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep-suffix.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+# Disassembling with -Msuffix.
+ .text
+_start:
+ rep lodsb
+ rep stosb
+ rep lodsw
+ rep stosw
+ rep lodsl
+ rep stosl
+ rep lodsq
+ rep stosq
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,61 @@
+#objdump: -dw
+#name: x86-64 rep prefix
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ 0: f3 6c[ ]+rep insb \(%dx\),%es:\(%rdi\)
+ 2: f3 6e[ ]+rep outsb %ds:\(%rsi\),\(%dx\)
+ 4: f3 a4[ ]+rep movsb %ds:\(%rsi\),%es:\(%rdi\)
+ 6: f3 ac[ ]+rep lods %ds:\(%rsi\),%al
+ 8: f3 aa[ ]+rep stos %al,%es:\(%rdi\)
+ a: f3 a6[ ]+repz cmpsb %es:\(%rdi\),%ds:\(%rsi\)
+ c: f3 ae[ ]+repz scas %es:\(%rdi\),%al
+ e: f3 66 6d[ ]+rep insw \(%dx\),%es:\(%rdi\)
+ 11: f3 66 6f[ ]+rep outsw %ds:\(%rsi\),\(%dx\)
+ 14: f3 66 a5[ ]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
+ 17: f3 66 ad[ ]+rep lods %ds:\(%rsi\),%ax
+ 1a: f3 66 ab[ ]+rep stos %ax,%es:\(%rdi\)
+ 1d: f3 66 a7[ ]+repz cmpsw %es:\(%rdi\),%ds:\(%rsi\)
+ 20: f3 66 af[ ]+repz scas %es:\(%rdi\),%ax
+ 23: f3 6d[ ]+rep insl \(%dx\),%es:\(%rdi\)
+ 25: f3 6f[ ]+rep outsl %ds:\(%rsi\),\(%dx\)
+ 27: f3 a5[ ]+rep movsl %ds:\(%rsi\),%es:\(%rdi\)
+ 29: f3 ad[ ]+rep lods %ds:\(%rsi\),%eax
+ 2b: f3 ab[ ]+rep stos %eax,%es:\(%rdi\)
+ 2d: f3 a7[ ]+repz cmpsl %es:\(%rdi\),%ds:\(%rsi\)
+ 2f: f3 af[ ]+repz scas %es:\(%rdi\),%eax
+ 31: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
+ 34: f3 48 ad[ ]+rep lods %ds:\(%rsi\),%rax
+ 37: f3 48 ab[ ]+rep stos %rax,%es:\(%rdi\)
+ 3a: f3 48 a7[ ]+repz cmpsq %es:\(%rdi\),%ds:\(%rsi\)
+ 3d: f3 48 af[ ]+repz scas %es:\(%rdi\),%rax
+ 40: f3 67 6c[ ]+rep addr32 insb \(%dx\),%es:\(%edi\)
+ 43: f3 67 6e[ ]+rep addr32 outsb %ds:\(%esi\),\(%dx\)
+ 46: f3 67 a4[ ]+rep addr32 movsb %ds:\(%esi\),%es:\(%edi\)
+ 49: f3 67 ac[ ]+rep addr32 lods %ds:\(%esi\),%al
+ 4c: f3 67 aa[ ]+rep addr32 stos %al,%es:\(%edi\)
+ 4f: f3 67 a6[ ]+repz addr32 cmpsb %es:\(%edi\),%ds:\(%esi\)
+ 52: f3 67 ae[ ]+repz addr32 scas %es:\(%edi\),%al
+ 55: f3 67 66 6d[ ]+rep addr32 insw \(%dx\),%es:\(%edi\)
+ 59: f3 67 66 6f[ ]+rep addr32 outsw %ds:\(%esi\),\(%dx\)
+ 5d: f3 67 66 a5[ ]+rep addr32 movsw %ds:\(%esi\),%es:\(%edi\)
+ 61: f3 67 66 ad[ ]+rep addr32 lods %ds:\(%esi\),%ax
+ 65: f3 67 66 ab[ ]+rep addr32 stos %ax,%es:\(%edi\)
+ 69: f3 67 66 a7[ ]+repz addr32 cmpsw %es:\(%edi\),%ds:\(%esi\)
+ 6d: f3 67 66 af[ ]+repz addr32 scas %es:\(%edi\),%ax
+ 71: f3 67 6d[ ]+rep addr32 insl \(%dx\),%es:\(%edi\)
+ 74: f3 67 6f[ ]+rep addr32 outsl %ds:\(%esi\),\(%dx\)
+ 77: f3 67 a5[ ]+rep addr32 movsl %ds:\(%esi\),%es:\(%edi\)
+ 7a: f3 67 ad[ ]+rep addr32 lods %ds:\(%esi\),%eax
+ 7d: f3 67 ab[ ]+rep addr32 stos %eax,%es:\(%edi\)
+ 80: f3 67 a7[ ]+repz addr32 cmpsl %es:\(%edi\),%ds:\(%esi\)
+ 83: f3 67 af[ ]+repz addr32 scas %es:\(%edi\),%eax
+ 86: f3 67 48 a5[ ]+rep addr32 movsq %ds:\(%esi\),%es:\(%edi\)
+ 8a: f3 67 48 ad[ ]+rep addr32 lods %ds:\(%esi\),%rax
+ 8e: f3 67 48 ab[ ]+rep addr32 stos %rax,%es:\(%edi\)
+ 92: f3 67 48 a7[ ]+repz addr32 cmpsq %es:\(%edi\),%ds:\(%esi\)
+ 96: f3 67 48 af[ ]+repz addr32 scas %es:\(%edi\),%rax
+#pass
Added: branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86-64-rep.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,62 @@
+ .text
+
+_start:
+ rep insb
+ rep outsb
+ rep movsb
+ rep lodsb
+ rep stosb
+ repz cmpsb
+ repz scasb
+
+ rep insw
+ rep outsw
+ rep movsw
+ rep lodsw
+ rep stosw
+ repz cmpsw
+ repz scasw
+
+ rep insl
+ rep outsl
+ rep movsl
+ rep lodsl
+ rep stosl
+ repz cmpsl
+ repz scasl
+
+ rep movsq
+ rep lodsq
+ rep stosq
+ repz cmpsq
+ repz scasq
+
+ addr32 rep insb
+ addr32 rep outsb
+ addr32 rep movsb
+ addr32 rep lodsb
+ addr32 rep stosb
+ addr32 repz cmpsb
+ addr32 repz scasb
+
+ addr32 rep insw
+ addr32 rep outsw
+ addr32 rep movsw
+ addr32 rep lodsw
+ addr32 rep stosw
+ addr32 repz cmpsw
+ addr32 repz scasw
+
+ addr32 rep insl
+ addr32 rep outsl
+ addr32 rep movsl
+ addr32 rep lodsl
+ addr32 rep stosl
+ addr32 repz cmpsl
+ addr32 repz scasl
+
+ addr32 rep movsq
+ addr32 rep lodsq
+ addr32 rep stosq
+ addr32 repz cmpsq
+ addr32 repz scasq
Modified: branches/binutils/package/gas/testsuite/gas/i386/x86_64.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/i386/x86_64.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/i386/x86_64.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -37,9 +37,9 @@
[ ]+56: 41 0f 20 c0[ ]+mov[ ]+%cr0,%r8
[ ]+5a: 44 0f 20 c0[ ]+mov[ ]+%cr8,%rax
[ ]+5e: 44 0f 22 c0[ ]+mov[ ]+%rax,%cr8
-[ ]+62: f3 48 a5[ ]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
-[ ]+65: f3 66 a5[ ]+repz movsw %ds:\(%rsi\),%es:\(%rdi\)
-[ ]+68: f3 48 a5[ ]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ ]+62: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ ]+65: f3 66 a5[ ]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
+[ ]+68: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
[ ]+6b: b0 11[ ]+mov[ ]+\$0x11,%al
[ ]+6d: b4 11[ ]+mov[ ]+\$0x11,%ah
[ ]+6f: 40 b4 11[ ]+mov[ ]+\$0x11,%spl
Modified: branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.l
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.l 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.l 2006-04-19 08:33:31 UTC (rev 12)
@@ -291,3 +291,5 @@
.*:592: Warning: This is the location of the conflicting usage
.*:593: Warning: Use of 'ldfd' .* WAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 6
.*:592: Warning: This is the location of the conflicting usage
+.*:601: Warning: Use of 'ld8' .* RAW dependency 'PSR\.vm' \(implied\)
+.*:600: Warning: This is the location of the conflicting usage
Modified: branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/dv-raw-err.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -594,3 +594,9 @@
;;
L:
+ br.ret.sptk rp
+
+// PSR.vm. New in SDM 2.2
+ vmsw.0
+ ld8 r2 = [r1]
+ ;;
Modified: branches/binutils/package/gas/testsuite/gas/ia64/ia64.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ia64.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ia64.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -46,10 +46,17 @@
run_dump_test "ldxmov-1"
run_list_test "ldxmov-2" ""
run_dump_test "ltoff22x-1"
+ run_dump_test "ltoff22x-2"
+ run_dump_test "ltoff22x-3"
+ run_dump_test "ltoff22x-4"
+ run_dump_test "ltoff22x-5"
run_dump_test "nostkreg"
run_list_test "invalid-ar" ""
+ run_dump_test "nostkreg"
+ run_list_test "invalid-ar" ""
+
run_dump_test "dependency-1"
run_dump_test "reloc"
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+# objdump: -r
+# name: ia64 ltoff22x-2
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET[ ]+TYPE[ ]+VALUE
+0+000 LTOFF22X foo
+0+010 LDXMOV foo
+
+
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+ .global foo#
+ foo# = bar#
+ .global bar#
+ .data
+bar:
+ data4 0
+ .text
+ addl r3 = @ltoffx(foo#), gp
+ nop.i 0
+ nop.i 0
+ ld8.mov r3 = [r3], foo#
+ nop.i 0
+ nop.i 0
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+# objdump: -r
+# name: ia64 ltoff22x-3
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET[ ]+TYPE[ ]+VALUE
+0+000 LTOFF22X foo
+0+010 LDXMOV foo
+
+
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-3.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+ .global bar#
+ .data
+bar:
+ data4 0
+ .global foo#
+ foo# = bar#
+ .text
+ addl r3 = @ltoffx(foo#), gp
+ nop.i 0
+ nop.i 0
+ ld8.mov r3 = [r3], foo#
+ nop.i 0
+ nop.i 0
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+# objdump: -r
+# name: ia64 ltoff22x-4
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET[ ]+TYPE[ ]+VALUE
+0+000 LTOFF22X foo
+0+010 LDXMOV foo
+
+
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-4.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+ .text
+ addl r3 = @ltoffx(foo#), gp
+ nop.i 0
+ nop.i 0
+ ld8.mov r3 = [r3], foo#
+ nop.i 0
+ nop.i 0
+ .global foo#
+ foo# = bar#
+ .global bar#
+ .data
+bar:
+ data4 0
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+# objdump: -r
+# name: ia64 ltoff22x-5
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET[ ]+TYPE[ ]+VALUE
+0+000 LTOFF22X foo
+0+010 LDXMOV foo
+
+
Added: branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/ltoff22x-5.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+ .text
+ addl r3 = @ltoffx(foo#), gp
+ nop.i 0
+ nop.i 0
+ ld8.mov r3 = [r3], foo#
+ nop.i 0
+ nop.i 0
+ .global bar#
+ .data
+bar:
+ data4 0
+ .global foo#
+ foo# = bar#
Modified: branches/binutils/package/gas/testsuite/gas/ia64/opc-b.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/opc-b.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/opc-b.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -1016,6 +1016,6 @@
2bf0: 16 f8 ff 0f 00 00 \[BBB\] break\.b 0x1ffff
2bf6: 00 00 00 02 10 e0 hint\.b 0x0
2bfc: ff 3f 04 20 hint\.b 0x1ffff
- 2c00: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
- 2c06: 00 00 00 02 00 e0 nop\.f 0x0
- 2c0c: ff 3f 00 20 nop\.b 0x1ffff;;
+ 2c00: 17 f8 ff 0f 00 08 \[BBB\] nop\.b 0x1ffff
+ 2c06: 00 00 00 30 00 00 vmsw.0
+ 2c0c: 00 00 64 00 vmsw.1;;
Modified: branches/binutils/package/gas/testsuite/gas/ia64/opc-b.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/opc-b.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/opc-b.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -831,3 +831,7 @@
hint.b @pause
hint.b 0x1ffff
nop.b 0x1ffff
+
+ # instructions added by SDM2.2:
+ vmsw.0
+ vmsw.1
Modified: branches/binutils/package/gas/testsuite/gas/ia64/opc-i.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/opc-i.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/opc-i.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -259,6 +259,54 @@
ab0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
ab6: 01 00 00 03 80 03 \(p07\) hint\.i 0x0
abc: 00 00 06 00 \(p07\) hint\.i 0x0
- ac0: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ac6: 00 00 00 02 80 e3 nop\.f 0x0
- acc: ff ff 07 08 \(p07\) hint\.i 0x1fffff;;
+ ac0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ ac6: f1 ff ff 03 04 40 \(p07\) hint\.i 0x1fffff
+ acc: f0 04 0c 50 tf\.z p2,p3=39
+ ad0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ ad6: 20 7c 02 06 28 40 tf\.z\.unc p2,p3=39
+ adc: f0 04 0c 58 tf\.z\.and p2,p3=39
+ ae0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ ae6: 20 78 02 86 28 40 tf\.z\.or p2,p3=39
+ aec: f0 04 0c 59 tf\.z\.or\.andcm p2,p3=39
+ af0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ af6: 30 7c 02 84 28 60 tf\.nz\.or p3,p2=39
+ afc: f8 04 08 58 tf\.nz\.and p3,p2=39
+ b00: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ b06: 30 7c 02 84 2c 60 tf\.nz\.or\.andcm p3,p2=39
+ b0c: f0 04 08 50 tf\.z p3,p2=39
+ b10: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ b16: 30 7c 02 04 28 40 tf\.z\.unc p3,p2=39
+ b1c: f8 04 0c 58 tf\.nz\.and p2,p3=39
+ b20: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ b26: 20 7c 02 86 28 40 tf\.nz\.or p2,p3=39
+ b2c: f8 04 0c 59 tf\.nz\.or\.andcm p2,p3=39
+ b30: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ b36: 30 78 02 84 28 60 tf\.z\.or p3,p2=39
+ b3c: f0 04 08 58 tf\.z\.and p3,p2=39
+ b40: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
+ b46: 30 78 02 84 ac 43 tf\.z\.or\.andcm p3,p2=39
+ b4c: f0 04 0c 50 \(p07\) tf\.z p2,p3=39
+ b50: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ b56: 21 7c 02 06 a8 43 \(p07\) tf\.z\.unc p2,p3=39
+ b5c: f0 04 0c 58 \(p07\) tf\.z\.and p2,p3=39
+ b60: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ b66: 21 78 02 86 a8 43 \(p07\) tf\.z\.or p2,p3=39
+ b6c: f0 04 0c 59 \(p07\) tf\.z\.or\.andcm p2,p3=39
+ b70: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ b76: 31 7c 02 84 a8 63 \(p07\) tf\.nz\.or p3,p2=39
+ b7c: f8 04 08 58 \(p07\) tf\.nz\.and p3,p2=39
+ b80: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ b86: 31 7c 02 84 ac 63 \(p07\) tf\.nz\.or\.andcm p3,p2=39
+ b8c: f0 04 08 50 \(p07\) tf\.z p3,p2=39
+ b90: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ b96: 31 7c 02 04 a8 43 \(p07\) tf\.z\.unc p3,p2=39
+ b9c: f8 04 0c 58 \(p07\) tf\.nz\.and p2,p3=39
+ ba0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ ba6: 21 7c 02 86 a8 43 \(p07\) tf\.nz\.or p2,p3=39
+ bac: f8 04 0c 59 \(p07\) tf\.nz\.or\.andcm p2,p3=39
+ bb0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
+ bb6: 31 78 02 84 a8 63 \(p07\) tf\.z\.or p3,p2=39
+ bbc: f0 04 08 58 \(p07\) tf\.z\.and p3,p2=39
+ bc0: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
+ bc6: 00 00 00 02 80 63 nop\.f 0x0
+ bcc: f0 04 08 59 \(p07\) tf\.z\.or\.andcm p3,p2=39;;
Modified: branches/binutils/package/gas/testsuite/gas/ia64/opc-i.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/opc-i.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/opc-i.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -220,3 +220,39 @@
(p7) hint.i 0
(p7) hint.i @pause
(p7) hint.i 0x1fffff
+
+ # instructions added by SDM2.2:
+
+ tf.z p2, p3 = 39
+ tf.z.unc p2, p3 = 39
+ tf.z.and p2, p3 = 39
+ tf.z.or p2, p3 = 39
+ tf.z.or.andcm p2, p3 = 39
+ tf.z.orcm p2, p3 = 39
+ tf.z.andcm p2, p3 = 39
+ tf.z.and.orcm p2, p3 = 39
+ tf.nz p2, p3 = 39
+ tf.nz.unc p2, p3 = 39
+ tf.nz.and p2, p3 = 39
+ tf.nz.or p2, p3 = 39
+ tf.nz.or.andcm p2, p3 = 39
+ tf.nz.orcm p2, p3 = 39
+ tf.nz.andcm p2, p3 = 39
+ tf.nz.and.orcm p2, p3 = 39
+
+(p7) tf.z p2, p3 = 39
+(p7) tf.z.unc p2, p3 = 39
+(p7) tf.z.and p2, p3 = 39
+(p7) tf.z.or p2, p3 = 39
+(p7) tf.z.or.andcm p2, p3 = 39
+(p7) tf.z.orcm p2, p3 = 39
+(p7) tf.z.andcm p2, p3 = 39
+(p7) tf.z.and.orcm p2, p3 = 39
+(p7) tf.nz p2, p3 = 39
+(p7) tf.nz.unc p2, p3 = 39
+(p7) tf.nz.and p2, p3 = 39
+(p7) tf.nz.or p2, p3 = 39
+(p7) tf.nz.or.andcm p2, p3 = 39
+(p7) tf.nz.orcm p2, p3 = 39
+(p7) tf.nz.andcm p2, p3 = 39
+(p7) tf.nz.and.orcm p2, p3 = 39
Modified: branches/binutils/package/gas/testsuite/gas/ia64/pseudo.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/pseudo.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/pseudo.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -25,3 +25,5 @@
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+st16 \[r0\]=r0,ar\.csd
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tbit\.z p0,p12=r0,0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tnat\.z p0,p13=r0(;;)?
+#...
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tf\.z p3,p2=33(;;)?
Modified: branches/binutils/package/gas/testsuite/gas/ia64/pseudo.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/ia64/pseudo.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/ia64/pseudo.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -13,3 +13,7 @@
st16 [r0] = r0
tbit.nz p12 = r0, 0
tnat.nz p13 = r0
+
+ # instructions added by SDM2.2:
+
+ tf.nz p2, p3 = 33
Modified: branches/binutils/package/gas/testsuite/gas/m68k/all.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/m68k/all.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/m68k/all.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -38,6 +38,8 @@
run_dump_test mode5
run_dump_test mcf-mac
run_dump_test mcf-emac
+ run_dump_test mcf-fpu
+ run_dump_test arch-cpu-1
set testname "68000 operands"
gas_run "operands.s" "-m68000" "2>err.out"
Added: branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+#name: arch-cpu-1
+#objdump: -dp
+
+
+.*: file format elf32-m68k
+private flags = 21: \[isa A\] \[nodiv\] \[emac\]
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: a241 0280 macw %d1l,%a1u,<<,%acc0
Added: branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/m68k/arch-cpu-1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+ .arch isaa,no-div,emac
+ .cpu 5329
+
+ mac.w %d1l,%a1u,<<,%acc0
Added: branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,170 @@
+#objdump: -d --architecture=m68k:cfv4e
+#as: -mcfv4e
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 0-9a-f]+: f200 0004 fsqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4004 0008 fsqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4404 0008 fsqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5004 0008 fsqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5404 0008 fsqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5804 0008 fsqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0041 fssqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4041 0008 fssqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4441 0008 fssqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5041 0008 fssqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5441 0008 fssqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5841 0008 fssqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0045 fdsqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4045 0008 fdsqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4445 0008 fdsqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5045 0008 fdsqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5445 0008 fdsqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5845 0008 fdsqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0018 fabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 4018 0008 fabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4418 0008 fabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5018 0008 fabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5418 0008 fabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5818 0008 fabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0058 fsabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 4058 0008 fsabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4458 0008 fsabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5058 0008 fsabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5458 0008 fsabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5858 0008 fsabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005c fdabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 405c 0008 fdabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445c 0008 fdabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505c 0008 fdabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545c 0008 fdabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585c 0008 fdabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 001a fnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 401a 0008 fnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 441a 0008 fnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 501a 0008 fnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 541a 0008 fnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 581a 0008 fnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005a fsnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 405a 0008 fsnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445a 0008 fsnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505a 0008 fsnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545a 0008 fsnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585a 0008 fsnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005e fdnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 405e 0008 fdnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445e 0008 fdnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505e 0008 fdnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545e 0008 fdnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585e 0008 fdnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0020 fdivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4020 0008 fdivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4420 0008 fdivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5020 0008 fdivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5420 0008 fdivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5820 0008 fdivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0060 fsdivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4060 0008 fsdivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4460 0008 fsdivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5060 0008 fsdivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5460 0008 fsdivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5860 0008 fsdivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0064 fddivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4064 0008 fddivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4464 0008 fddivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5064 0008 fddivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5464 0008 fddivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5864 0008 fddivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0022 faddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4022 0008 faddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4422 0008 fadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5022 0008 faddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5422 0008 faddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5822 0008 faddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0062 fsaddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4062 0008 fsaddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4462 0008 fsadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5062 0008 fsaddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5462 0008 fsaddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5862 0008 fsaddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0066 fdaddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4066 0008 fdaddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4466 0008 fdadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5066 0008 fdaddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5466 0008 fdaddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5866 0008 fdaddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0023 fmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4023 0008 fmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4423 0008 fmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5023 0008 fmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5423 0008 fmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5823 0008 fmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0063 fsmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4063 0008 fsmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4463 0008 fsmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5063 0008 fsmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5463 0008 fsmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5863 0008 fsmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0067 fdmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4067 0008 fdmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4467 0008 fdmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5067 0008 fdmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5467 0008 fdmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5867 0008 fdmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0028 fsubd %fp0,%fp0
+[ 0-9a-f]+: f22e 4028 0008 fsubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4428 0008 fsubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5028 0008 fsubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5428 0008 fsubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5828 0008 fsubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0068 fssubd %fp0,%fp0
+[ 0-9a-f]+: f22e 4068 0008 fssubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4468 0008 fssubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5068 0008 fssubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5468 0008 fssubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5868 0008 fssubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 006c fdsubd %fp0,%fp0
+[ 0-9a-f]+: f22e 406c 0008 fdsubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 446c 0008 fdsubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 506c 0008 fdsubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 546c 0008 fdsubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 586c 0008 fdsubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0000 fmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4000 0008 fmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4400 0008 fmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5000 0008 fmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5400 0008 fmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5800 0008 fmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0040 fsmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4040 0008 fsmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4440 0008 fsmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5040 0008 fsmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5440 0008 fsmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5840 0008 fsmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0044 fdmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4044 0008 fdmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4444 0008 fdmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5044 0008 fdmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5444 0008 fdmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5844 0008 fdmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0001 fintd %fp0,%fp0
+[ 0-9a-f]+: f22e 4001 0008 fintl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4401 0008 fints %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5001 0008 fintw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5401 0008 fintd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5801 0008 fintb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0003 fintrzd %fp0,%fp0
+[ 0-9a-f]+: f22e 4003 0008 fintrzl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4403 0008 fintrzs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5003 0008 fintrzw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5403 0008 fintrzd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5803 0008 fintrzb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0038 fcmpd %fp0,%fp0
+[ 0-9a-f]+: f22e 4038 0008 fcmpl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4438 0008 fcmps %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5038 0008 fcmpw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5438 0008 fcmpd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5838 0008 fcmpb %fp@\(8\),%fp0
Added: branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/m68k/mcf-fpu.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,165 @@
+
+ .text
+
+ fsqrtd %fp0,%fp0
+ fsqrtl %fp@(8),%fp0
+ fsqrts %fp@(8),%fp0
+ fsqrtw %fp@(8),%fp0
+ fsqrtd %fp@(8),%fp0
+ fsqrtb %fp@(8),%fp0
+ fssqrtd %fp0,%fp0
+ fssqrtl %fp@(8),%fp0
+ fssqrts %fp@(8),%fp0
+ fssqrtw %fp@(8),%fp0
+ fssqrtd %fp@(8),%fp0
+ fssqrtb %fp@(8),%fp0
+ fdsqrtd %fp0,%fp0
+ fdsqrtl %fp@(8),%fp0
+ fdsqrts %fp@(8),%fp0
+ fdsqrtw %fp@(8),%fp0
+ fdsqrtd %fp@(8),%fp0
+ fdsqrtb %fp@(8),%fp0
+ fabsd %fp0,%fp0
+ fabsl %fp@(8),%fp0
+ fabss %fp@(8),%fp0
+ fabsw %fp@(8),%fp0
+ fabsd %fp@(8),%fp0
+ fabsb %fp@(8),%fp0
+ fsabsd %fp0,%fp0
+ fsabsl %fp@(8),%fp0
+ fsabss %fp@(8),%fp0
+ fsabsw %fp@(8),%fp0
+ fsabsd %fp@(8),%fp0
+ fsabsb %fp@(8),%fp0
+ fdabsd %fp0,%fp0
+ fdabsl %fp@(8),%fp0
+ fdabss %fp@(8),%fp0
+ fdabsw %fp@(8),%fp0
+ fdabsd %fp@(8),%fp0
+ fdabsb %fp@(8),%fp0
+ fnegd %fp0,%fp0
+ fnegl %fp@(8),%fp0
+ fnegs %fp@(8),%fp0
+ fnegw %fp@(8),%fp0
+ fnegd %fp@(8),%fp0
+ fnegb %fp@(8),%fp0
+ fsnegd %fp0,%fp0
+ fsnegl %fp@(8),%fp0
+ fsnegs %fp@(8),%fp0
+ fsnegw %fp@(8),%fp0
+ fsnegd %fp@(8),%fp0
+ fsnegb %fp@(8),%fp0
+ fdnegd %fp0,%fp0
+ fdnegl %fp@(8),%fp0
+ fdnegs %fp@(8),%fp0
+ fdnegw %fp@(8),%fp0
+ fdnegd %fp@(8),%fp0
+ fdnegb %fp@(8),%fp0
+ fdivd %fp0,%fp0
+ fdivl %fp@(8),%fp0
+ fdivs %fp@(8),%fp0
+ fdivw %fp@(8),%fp0
+ fdivd %fp@(8),%fp0
+ fdivb %fp@(8),%fp0
+ fsdivd %fp0,%fp0
+ fsdivl %fp@(8),%fp0
+ fsdivs %fp@(8),%fp0
+ fsdivw %fp@(8),%fp0
+ fsdivd %fp@(8),%fp0
+ fsdivb %fp@(8),%fp0
+ fddivd %fp0,%fp0
+ fddivl %fp@(8),%fp0
+ fddivs %fp@(8),%fp0
+ fddivw %fp@(8),%fp0
+ fddivd %fp@(8),%fp0
+ fddivb %fp@(8),%fp0
+ faddd %fp0,%fp0
+ faddl %fp@(8),%fp0
+ fadds %fp@(8),%fp0
+ faddw %fp@(8),%fp0
+ faddd %fp@(8),%fp0
+ faddb %fp@(8),%fp0
+ fsaddd %fp0,%fp0
+ fsaddl %fp@(8),%fp0
+ fsadds %fp@(8),%fp0
+ fsaddw %fp@(8),%fp0
+ fsaddd %fp@(8),%fp0
+ fsaddb %fp@(8),%fp0
+ fdaddd %fp0,%fp0
+ fdaddl %fp@(8),%fp0
+ fdadds %fp@(8),%fp0
+ fdaddw %fp@(8),%fp0
+ fdaddd %fp@(8),%fp0
+ fdaddb %fp@(8),%fp0
+ fmuld %fp0,%fp0
+ fmull %fp@(8),%fp0
+ fmuls %fp@(8),%fp0
+ fmulw %fp@(8),%fp0
+ fmuld %fp@(8),%fp0
+ fmulb %fp@(8),%fp0
+ fsmuld %fp0,%fp0
+ fsmull %fp@(8),%fp0
+ fsmuls %fp@(8),%fp0
+ fsmulw %fp@(8),%fp0
+ fsmuld %fp@(8),%fp0
+ fsmulb %fp@(8),%fp0
+ fdmuld %fp0,%fp0
+ fdmull %fp@(8),%fp0
+ fdmuls %fp@(8),%fp0
+ fdmulw %fp@(8),%fp0
+ fdmuld %fp@(8),%fp0
+ fdmulb %fp@(8),%fp0
+ fsubd %fp0,%fp0
+ fsubl %fp@(8),%fp0
+ fsubs %fp@(8),%fp0
+ fsubw %fp@(8),%fp0
+ fsubd %fp@(8),%fp0
+ fsubb %fp@(8),%fp0
+ fssubd %fp0,%fp0
+ fssubl %fp@(8),%fp0
+ fssubs %fp@(8),%fp0
+ fssubw %fp@(8),%fp0
+ fssubd %fp@(8),%fp0
+ fssubb %fp@(8),%fp0
+ fdsubd %fp0,%fp0
+ fdsubl %fp@(8),%fp0
+ fdsubs %fp@(8),%fp0
+ fdsubw %fp@(8),%fp0
+ fdsubd %fp@(8),%fp0
+ fdsubb %fp@(8),%fp0
+ fmoved %fp0,%fp0
+ fmovel %fp@(8),%fp0
+ fmoves %fp@(8),%fp0
+ fmovew %fp@(8),%fp0
+ fmoved %fp@(8),%fp0
+ fmoveb %fp@(8),%fp0
+ fsmoved %fp0,%fp0
+ fsmovel %fp@(8),%fp0
+ fsmoves %fp@(8),%fp0
+ fsmovew %fp@(8),%fp0
+ fsmoved %fp@(8),%fp0
+ fsmoveb %fp@(8),%fp0
+ fdmoved %fp0,%fp0
+ fdmovel %fp@(8),%fp0
+ fdmoves %fp@(8),%fp0
+ fdmovew %fp@(8),%fp0
+ fdmoved %fp@(8),%fp0
+ fdmoveb %fp@(8),%fp0
+ fintd %fp0,%fp0
+ fintl %fp@(8),%fp0
+ fints %fp@(8),%fp0
+ fintw %fp@(8),%fp0
+ fintd %fp@(8),%fp0
+ fintb %fp@(8),%fp0
+ fintrzd %fp0,%fp0
+ fintrzl %fp@(8),%fp0
+ fintrzs %fp@(8),%fp0
+ fintrzw %fp@(8),%fp0
+ fintrzd %fp@(8),%fp0
+ fintrzb %fp@(8),%fp0
+ fcmpd %fp0,%fp0
+ fcmpl %fp@(8),%fp0
+ fcmps %fp@(8),%fp0
+ fcmpw %fp@(8),%fp0
+ fcmpd %fp@(8),%fp0
+ fcmpb %fp@(8),%fp0
Modified: branches/binutils/package/gas/testsuite/gas/macros/macros.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/macros/macros.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/macros/macros.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -82,3 +82,9 @@
run_list_test end ""
run_list_test purge "--hash-size=8000"
run_list_test redef ""
+
+# This test is valid only when '!' is not a comment character
+# (it is allowed to be a line comment character).
+if [string match "" [lindex [gas_run ../all/excl.s "-o /dev/null" ""] 0]] {
+ run_dump_test paren
+}
Added: branches/binutils/package/gas/testsuite/gas/macros/paren.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/macros/paren.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/macros/paren.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#as: -f
+#objdump: -s -j .data
+#name parenthesized macro arguments
+
+.*: .*
+
+Contents of section .data:
+ 0000 01000202 020402.. ........ ........ ................
+#pass
Added: branches/binutils/package/gas/testsuite/gas/macros/paren.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/macros/paren.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/macros/paren.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+ .data
+ .macro m x
+ .byte (\x)
+ .endm
+
+ m (1)
+ m (!1)
+ m (1)+(1)
+ m 1+(1)
+ m (1 + 1)
+ m (1 + 1)*(1 + 1)
+ m (! 0)+(! 0)
Modified: branches/binutils/package/gas/testsuite/gas/mips/mips.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mips/mips.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mips/mips.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -383,12 +383,14 @@
{ -march=sb1 -mtune=sb1 } { -mmips:sb1 } \
{ mipsisa64sb1-*-* mipsisa64sb1el-*-* }
-
#
-# And now begin the actual tests!
+# And now begin the actual tests! VxWorks uses RELA rather than REL
+# relocations, so most of the generic dump tests will not work there.
#
-
-if { [istarget mips*-*-*] } then {
+if { [istarget mips*-*-vxworks*] } {
+ run_dump_test "vxworks1"
+ run_dump_test "vxworks1-xgot"
+} elseif { [istarget mips*-*-*] } {
set no_mips16 0
set elf [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] || [istarget *-*-netbsd*] ]
set ecoff [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
@@ -777,4 +779,6 @@
run_dump_test "mips16e-jrc"
run_dump_test "mips16e-save"
}
+ run_dump_test "vxworks1"
+ run_dump_test "vxworks1-xgot"
}
Added: branches/binutils/package/gas/testsuite/gas/mips/vxworks1-xgot.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mips/vxworks1-xgot.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mips/vxworks1-xgot.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,102 @@
+#as: -mips2 -mvxworks-pic -xgot -mabi=32
+#source: vxworks1.s
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+#
+# la $4,local
+#
+.*: 3c040000 lui a0,0x0
+ .*: R_MIPS_GOT_HI16 \.data
+.*: 009c2021 addu a0,a0,gp
+.*: 8c840000 lw a0,0\(a0\)
+ .*: R_MIPS_GOT_LO16 \.data
+#
+# la $4,global
+#
+.*: 3c040000 lui a0,0x0
+ .*: R_MIPS_GOT_HI16 global
+.*: 009c2021 addu a0,a0,gp
+.*: 8c840000 lw a0,0\(a0\)
+ .*: R_MIPS_GOT_LO16 global
+#
+# lw $4,local
+#
+.*: 3c040000 lui a0,0x0
+ .*: R_MIPS_GOT_HI16 \.data
+.*: 009c2021 addu a0,a0,gp
+.*: 8c840000 lw a0,0\(a0\)
+ .*: R_MIPS_GOT_LO16 \.data
+.*: 8c840000 lw a0,0\(a0\)
+#
+# lw $4,global
+#
+.*: 3c040000 lui a0,0x0
+ .*: R_MIPS_GOT_HI16 global
+.*: 009c2021 addu a0,a0,gp
+.*: 8c840000 lw a0,0\(a0\)
+ .*: R_MIPS_GOT_LO16 global
+.*: 8c840000 lw a0,0\(a0\)
+#
+# sw $4,local
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 \.data
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 \.data
+.*: ac240000 sw a0,0\(at\)
+#
+# sw $4,global
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 global
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 global
+.*: ac240000 sw a0,0\(at\)
+#
+# ulw $4,local
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 \.data
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 \.data
+.*: 88240000 lwl a0,0\(at\)
+.*: 98240003 lwr a0,3\(at\)
+#
+# ulw $4,global
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 global
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 global
+.*: 88240000 lwl a0,0\(at\)
+.*: 98240003 lwr a0,3\(at\)
+#
+# usw $4,local
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 \.data
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 \.data
+.*: a8240000 swl a0,0\(at\)
+.*: b8240003 swr a0,3\(at\)
+#
+# usw $4,global
+#
+.*: 3c010000 lui at,0x0
+ .*: R_MIPS_GOT_HI16 global
+.*: 003c0821 addu at,at,gp
+.*: 8c210000 lw at,0\(at\)
+ .*: R_MIPS_GOT_LO16 global
+.*: a8240000 swl a0,0\(at\)
+.*: b8240003 swr a0,3\(at\)
+ \.\.\.
Added: branches/binutils/package/gas/testsuite/gas/mips/vxworks1.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mips/vxworks1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mips/vxworks1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,71 @@
+#as: -mips2 -mvxworks-pic -mabi=32
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+#
+# la $4,local
+#
+.*: 8f840000 lw a0,0\(gp\)
+ .*: R_MIPS_GOT16 \.data
+#
+# la $4,global
+#
+.*: 8f840000 lw a0,0\(gp\)
+ .*: R_MIPS_GOT16 global
+#
+# lw $4,local
+#
+.*: 8f840000 lw a0,0\(gp\)
+ .*: R_MIPS_GOT16 \.data
+.*: 8c840000 lw a0,0\(a0\)
+#
+# lw $4,global
+#
+.*: 8f840000 lw a0,0\(gp\)
+ .*: R_MIPS_GOT16 global
+.*: 8c840000 lw a0,0\(a0\)
+#
+# sw $4,local
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 \.data
+.*: ac240000 sw a0,0\(at\)
+#
+# sw $4,global
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 global
+.*: ac240000 sw a0,0\(at\)
+#
+# ulw $4,local
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 \.data
+.*: 88240000 lwl a0,0\(at\)
+.*: 98240003 lwr a0,3\(at\)
+#
+# ulw $4,global
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 global
+.*: 88240000 lwl a0,0\(at\)
+.*: 98240003 lwr a0,3\(at\)
+#
+# usw $4,local
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 \.data
+.*: a8240000 swl a0,0\(at\)
+.*: b8240003 swr a0,3\(at\)
+#
+# usw $4,global
+#
+.*: 8f810000 lw at,0\(gp\)
+ .*: R_MIPS_GOT16 global
+.*: a8240000 swl a0,0\(at\)
+.*: b8240003 swr a0,3\(at\)
+ \.\.\.
Added: branches/binutils/package/gas/testsuite/gas/mips/vxworks1.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mips/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mips/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+ la $4,local
+ la $4,global
+ lw $4,local
+ lw $4,global
+ sw $4,local
+ sw $4,global
+ ulw $4,local
+ ulw $4,global
+ usw $4,local
+ usw $4,global
+ .space 16
+
+ .data
+ .global global
+local: .word 4
+global: .word 8
Added: branches/binutils/package/gas/testsuite/gas/mmix/hex2.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mmix/hex2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mmix/hex2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,17 @@
+# objdump: -dr
+.*: file format elf64-mmix
+
+Disassembly of section \.text:
+
+0+ <x>:
+[ ]+0:[ ]+fd000000[ ]+swym 0,0,0
+[ ]+4:[ ]+e309001f[ ]+setl \$9,0x1f
+[ ]+8:[ ]+e3081b2f[ ]+setl \$8,0x1b2f
+[ ]+c:[ ]+e307ff9f[ ]+setl \$7,0xff9f
+[ ]+10:[ ]+e3061f3a[ ]+setl \$6,0x1f3a
+[ ]+14:[ ]+e305001b[ ]+setl \$5,0x1b
+[ ]+18:[ ]+e3041a1b[ ]+setl \$4,0x1a1b
+[ ]+1c:[ ]+e303009f[ ]+setl \$3,0x9f
+[ ]+20:[ ]+e302009b[ ]+setl \$2,0x9b
+[ ]+24:[ ]+e301001f[ ]+setl \$1,0x1f
+[ ]+28:[ ]+e300001b[ ]+setl \$0,0x1b
Added: branches/binutils/package/gas/testsuite/gas/mmix/hex2.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/mmix/hex2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/mmix/hex2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+x:
+ swym
+0:
+ setl $9,#1F
+1:
+ setl $8,#1B2F
+ setl $7,0xFF9F
+ setl $6,#1F3A
+9:
+ setl $5,#1B
+ setl $4,#1A1B
+ setl $3,0x9F
+ setl $2,0x9B
+ setl $1,0x1F
+ setl $0,0x1b
Added: branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+#as: -64 -Av9
+#objdump: -dr
+#name: sparc64 rdhpr
+
+.*: +file format .*sparc.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 83 48 00 00 rdhpr %hpstate, %g1
+ 4: 85 48 40 00 rdhpr %htstate, %g2
+ 8: 87 48 c0 00 rdhpr %hintp, %g3
+ c: 89 49 40 00 rdhpr %htba, %g4
+ 10: 8b 49 80 00 rdhpr %hver, %g5
+ 14: 8d 4f c0 00 rdhpr %hstick_cmpr, %g6
Added: branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/rdhpr.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+# Test rdpr
+ .text
+ rdhpr %hpstate,%g1
+ rdhpr %htstate,%g2
+ rdhpr %hintp,%g3
+ rdhpr %htba,%g4
+ rdhpr %hver,%g5
+ rdhpr %hstick_cmpr,%g6
Modified: branches/binutils/package/gas/testsuite/gas/sparc/rdpr.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/rdpr.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/rdpr.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -23,4 +23,5 @@
34: 9d 53 40 00 rdpr %otherwin, %sp
38: 9f 53 80 00 rdpr %wstate, %o7
3c: a1 53 c0 00 rdpr %fq, %l0
- 40: a3 57 c0 00 rdpr %ver, %l1
+ 40: a3 54 00 00 rdpr %gl, %l1
+ 44: a5 57 c0 00 rdpr %ver, %l2
Modified: branches/binutils/package/gas/testsuite/gas/sparc/rdpr.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/rdpr.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/rdpr.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -16,4 +16,5 @@
rdpr %otherwin,%o6
rdpr %wstate,%o7
rdpr %fq,%l0
- rdpr %ver,%l1
+ rdpr %gl,%l1
+ rdpr %ver,%l2
Modified: branches/binutils/package/gas/testsuite/gas/sparc/sparc.exp
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/sparc.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/sparc.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -17,7 +17,7 @@
}
proc sparc_elf_setup { } {
- setup_xfail "sparc*-*-*aout*" "sparc*-*-sunos4*" "sparc*-*-vxworks*"
+ setup_xfail "sparc*-*-*aout*" "sparc*-*-sunos4*"
setup_xfail "sparc*-fujitsu-none" "sparc*-*-*n*bsd*"
setup_xfail "sparc*-*-coff" "sparc*-*-lynxos*"
clear_xfail "sparc64*-*-*n*bsd*"
@@ -40,13 +40,20 @@
run_dump_test "set64"
run_dump_test "synth64"
run_dump_test "rdpr"
+ run_dump_test "rdhpr"
run_dump_test "wrpr"
+ run_dump_test "wrhpr"
+ run_dump_test "window"
run_dump_test "reloc64"
run_dump_test "pcrel64"
run_dump_test "plt64"
}
}
+if [istarget sparc-*-vxworks*] {
+ run_dump_test "vxworks-pic"
+}
+
if [istarget sparclet*-*-*] {
run_dump_test "splet"
run_dump_test "splet-2"
Added: branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,27 @@
+#as: -KPIC
+#objdump: -dr
+#name: VxWorks PIC
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 2f 00 00 00 sethi %hi\(0\), %l7
+ 0: R_SPARC_HI22 __GOTT_BASE__
+ 4: ee 05 e0 00 ld \[ %l7 \], %l7
+ 4: R_SPARC_LO10 __GOTT_BASE__
+ 8: ee 05 e0 00 ld \[ %l7 \], %l7
+ 8: R_SPARC_LO10 __GOTT_INDEX__
+ c: 03 00 00 00 sethi %hi\(0\), %g1
+ c: R_SPARC_HI22 __GOTT_BASE__
+ 10: 82 10 60 00 mov %g1, %g1 ! 0x0
+ 10: R_SPARC_LO10 __GOTT_BASE__
+ 14: 03 00 00 00 sethi %hi\(0\), %g1
+ 14: R_SPARC_HI22 __GOTT_INDEX__
+ 18: 82 10 60 00 mov %g1, %g1 ! 0x0
+ 18: R_SPARC_LO10 __GOTT_INDEX__
+ 1c: 03 00 00 00 sethi %hi\(0\), %g1
+ 1c: R_SPARC_GOT22 __GOT_BASE__
+ 20: 82 10 60 00 mov %g1, %g1 ! 0x0
+ 20: R_SPARC_GOT10 __GOT_BASE__
Added: branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/vxworks-pic.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+ sethi %hi(__GOTT_BASE__), %l7
+ ld [%l7+%lo(__GOTT_BASE__)],%l7
+ ld [%l7+%lo(__GOTT_INDEX__)],%l7
+
+ sethi %hi(__GOTT_BASE__), %g1
+ or %g1, %lo(__GOTT_BASE__), %g1
+ sethi %hi(__GOTT_INDEX__), %g1
+ or %g1, %lo(__GOTT_INDEX__), %g1
+
+ sethi %hi(__GOT_BASE__), %g1
+ or %g1, %lo(__GOT_BASE__), %g1
Added: branches/binutils/package/gas/testsuite/gas/sparc/window.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/window.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/window.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,15 @@
+#as: -64 -Av9
+#objdump: -dr
+#name: sparc64 window
+
+.*: +file format .*sparc.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 81 88 00 00 saved
+ 4: 83 88 00 00 restored
+ 8: 85 88 00 00 allclean
+ c: 87 88 00 00 otherw
+ 10: 89 88 00 00 normalw
+ 14: 8b 88 00 00 invalw
Added: branches/binutils/package/gas/testsuite/gas/sparc/window.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/window.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/window.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+# Test window
+ .text
+ saved
+ restored
+ allclean
+ otherw
+ normalw
+ invalw
Added: branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+#as: -64 -Av9
+#objdump: -dr
+#name: sparc64 wrhpr
+
+.*: +file format .*sparc.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 81 98 40 00 wrhpr %g1, %hpstate
+ 4: 83 98 80 00 wrhpr %g2, %htstate
+ 8: 87 98 c0 00 wrhpr %g3, %hintp
+ c: 8b 99 00 00 wrhpr %g4, %htba
+ 10: bf 99 40 00 wrhpr %g5, %hstick_cmpr
Added: branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/wrhpr.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,7 @@
+# Test wrpr
+ .text
+ wrhpr %g1,%hpstate
+ wrhpr %g2,%htstate
+ wrhpr %g3,%hintp
+ wrhpr %g4,%htba
+ wrhpr %g5,%hstick_cmpr
Modified: branches/binutils/package/gas/testsuite/gas/sparc/wrpr.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/wrpr.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/wrpr.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -22,3 +22,4 @@
30: 99 93 40 00 wrpr %o5, %cleanwin
34: 9b 93 80 00 wrpr %sp, %otherwin
38: 9d 93 c0 00 wrpr %o7, %wstate
+ 3c: a1 94 00 00 wrpr %l0, %gl
Modified: branches/binutils/package/gas/testsuite/gas/sparc/wrpr.s
===================================================================
--- branches/binutils/package/gas/testsuite/gas/sparc/wrpr.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/sparc/wrpr.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -15,3 +15,4 @@
wrpr %o5,%cleanwin
wrpr %o6,%otherwin
wrpr %o7,%wstate
+ wrpr %l0,%gl
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/address.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/address.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/address.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <_addressing>:
+0+00 <_addressing>:
0: 1801.*
1: 1881.*
2: 1989.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/addrfar.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/addrfar.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/addrfar.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -7,7 +7,7 @@
Disassembly of section .text:
-00000000 <_addressing>:
+0+000 <_addressing>:
0: 1801.*
1: 1881.*
2: 1989.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/align.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/align.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/align.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,26 +4,26 @@
.*: +file format .*c54x.*
Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .text 00000089 00000000 00000000 0000.... 2..7
+Idx Name Size VMA + LMA + File off Algn
+ 0 .text 00000089 0+000 0+000 0000.... 2..7
CONTENTS, ALLOC, LOAD, ....
- 1 .data 00000005 00000000 00000000 0000.... 2..1
+ 1 .data 00000005 0+000 0+000 0000.... 2..1
CONTENTS, ALLOC, LOAD, DATA
- 2 .bss 00000000 00000000 00000000 0000.... 2..0
+ 2 .bss 00000000 0+000 0+000 0000.... 2..0
ALLOC
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 4160.*
1: 0001.*
2: 0002.*
...
-00000004 <even>:
+0+004 <even>:
4: 0003.*
...
-00000006 <align2>:
+0+006 <align2>:
6: 0061.*
7: 0062.*
8: 0063.*
@@ -31,7 +31,7 @@
a: 0065.*
...
-00000010 <align8>:
+0+010 <align8>:
10: 0008.*
11: 0000.*
12: 0001.*
@@ -43,7 +43,7 @@
18: 0007.*
...
-00000080 <align128>:
+0+080 <align128>:
80: 0004.*
81: 0000.*
82: 0001.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/all-opcodes.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/all-opcodes.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/all-opcodes.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,7 +6,7 @@
Disassembly of section .text:
-00000000 <start>:
+0+000 <start>:
0: e300.*
1: e304.*
2: e308.*
@@ -219145,7 +219145,7 @@
357ff: 6629.*
35800: 1df8.*
35801: 662a.*
-00035802 <testend>:
+0+035802 <testend>:
35802: f073.*
35803: 5802.*
.*35803: ARELEXT16.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/asg.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/asg.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/asg.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,17 +5,17 @@
Disassembly of section .text:
-00000000 <L1>:
+0+000 <L1>:
0: f000.*
1: 0064.*
-00000002 <L2>:
+0+002 <L2>:
2: 1090.*
-00000003 <L3>:
+0+003 <L3>:
3: 1090.*
-00000004 <newlabel>:
+0+004 <newlabel>:
4: f000.*
5: 0000.*
6: f000.*
@@ -127,5 +127,5 @@
70: 0063.*
71: 0064.*
-00000072 <end>:
+0+072 <end>:
72: 0100.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/cons.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/cons.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/cons.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,55 +5,55 @@
Disassembly of section .text:
-00000000 <binary>:
+0+000 <binary>:
0: 0003.*
1: 0004.*
-00000002 <octal>:
+0+002 <octal>:
2: 0009.*
3: 000a.*
4: 000b.*
-00000005 <hex>:
+0+005 <hex>:
5: 000f.*
6: 0010.*
-00000007 <field>:
+0+007 <field>:
7: 6440.*
8: 0123.*
9: 4000.*
a: 0000.*
b: 1234.*
-0000000c <byte>:
+0+00c <byte>:
c: 00aa.*
d: 00bb.*
-0000000e <word>:
+0+00e <word>:
e: 0ccc.*
-0000000f <xlong>:
+0+00f <xlong>:
f: 0eee.*
10: efff.*
...
-00000012 <long>:
+0+012 <long>:
12: eeee.*
13: ffff.*
-00000014 <int>:
+0+014 <int>:
14: dddd.*
-00000015 <xfloat>:
+0+015 <xfloat>:
15: 3fff.*
16: ffac.*
...
-00000018 <float>:
+0+018 <float>:
18: 3fff.*
19: ffac.*
-0000001a <string>:
+0+01a <string>:
1a: 0061.*
1b: 0062.*
1c: 0063.*
@@ -67,7 +67,7 @@
24: 0067.*
25: 0030.*
-00000026 <pstring>:
+0+026 <pstring>:
26: 6162.*
27: 6364.*
28: 6162.*
@@ -75,7 +75,7 @@
2a: 6566.*
2b: 6700.*
-0000002c <DAT1>:
+0+02c <DAT1>:
2c: 0000.*
2d: abcd.*
2e: 0000.*
@@ -85,17 +85,17 @@
32: 0000.*
33: 006f.*
-00000034 <xlong.0>:
+0+034 <xlong.0>:
34: 0000.*
35: 002c.*
36: aabb.*
37: ccdd.*
-00000038 <DAT2>:
+0+038 <DAT2>:
38: 0000.*
...
-0000003a <DAT3>:
+0+03a <DAT3>:
3a: 1234.*
3b: 5678.*
3c: 0000.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/consfar.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/consfar.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/consfar.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -7,55 +7,55 @@
Disassembly of section .text:
-00000000 <binary>:
+0+000 <binary>:
0: 0003.*
1: 0004.*
-00000002 <octal>:
+0+002 <octal>:
2: 0009.*
3: 000a.*
4: 000b.*
-00000005 <hex>:
+0+005 <hex>:
5: 000f.*
6: 0010.*
-00000007 <field>:
+0+007 <field>:
7: 6440.*
8: 0123.*
9: 4000.*
a: 0000.*
b: 1234.*
-0000000c <byte>:
+0+00c <byte>:
c: 00aa.*
d: 00bb.*
-0000000e <word>:
+0+00e <word>:
e: 0ccc.*
-0000000f <xlong>:
+0+00f <xlong>:
f: 0eee.*
10: efff.*
...
-00000012 <long>:
+0+012 <long>:
12: eeee.*
13: ffff.*
-00000014 <int>:
+0+014 <int>:
14: dddd.*
-00000015 <xfloat>:
+0+015 <xfloat>:
15: 3fff.*
16: ffac.*
...
-00000018 <float>:
+0+018 <float>:
18: 3fff.*
19: ffac.*
-0000001a <string>:
+0+01a <string>:
1a: 0061.*
1b: 0062.*
1c: 0063.*
@@ -69,7 +69,7 @@
24: 0067.*
25: 0030.*
-00000026 <pstring>:
+0+026 <pstring>:
26: 6162.*
27: 6364.*
28: 6162.*
@@ -77,7 +77,7 @@
2a: 6566.*
2b: 6700.*
-0000002c <DAT1>:
+0+02c <DAT1>:
2c: 0000.*
2d: abcd.*
2e: 0000.*
@@ -87,18 +87,18 @@
32: 0000.*
33: 006f.*
-00000034 <xlong.0>:
+0+034 <xlong.0>:
34: 0000.*
.*34: ARELEXT.*
35: 002c.*
36: aabb.*
37: ccdd.*
-00000038 <DAT2>:
+0+038 <DAT2>:
38: 0000.*
...
-0000003a <DAT3>:
+0+03a <DAT3>:
3a: 1234.*
3b: 5678.*
3c: 0000.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/extaddr.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/extaddr.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/extaddr.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f062.*
1: 0000.*
.*1: RELEXTMS7.*
@@ -14,7 +14,7 @@
.*3: RELEXT16.*
4: f4e2.*
-00000005 <start>:
+0+005 <start>:
5: f881.*
6: 0080.*
.*5: ARELEXT.*
@@ -49,7 +49,7 @@
20: f495.*
...
-00010080 <end>:
+0+010080 <end>:
10080: f881.*
10081: 0080.*
.*10080: ARELEXT.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/field.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/field.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/field.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,26 +5,26 @@
Disassembly of section .text:
-00000000 <f1>:
+0+000 <f1>:
0: 2af0.*
1: 5600.*
-00000001 <f2>:
+0+001 <f2>:
1: 5600.*
-00000002 <f4>:
+0+002 <f4>:
2: 0001.*
-00000003 <f5>:
+0+003 <f5>:
3: 0000.*
4: 4321.*
-00000005 <f6>:
+0+005 <f6>:
5: 000f.*
-00000006 <f7>:
+0+006 <f7>:
6: 6000.*
7: 008a.*
-00000007 <f8>:
+0+007 <f8>:
7: 008a.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/labels.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/labels.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/labels.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <label1>:
+0+000 <label1>:
0: 1000.*
1: 0800.*
2: f843.*
@@ -14,50 +14,50 @@
5: f073.*
6: 0008.*
-00000007 <\$1.*>:
+0+007 <\$1.*>:
7: 1000.*
-00000008 <\$2.*>:
+0+008 <\$2.*>:
8: 0000.*
9: f843.*
a: 000c.*
b: 8000.*
-0000000c <\$1.*>:
+0+00c <\$1.*>:
c: f495.*
d: f495.*
-0000000e <lab.*>:
+0+00e <lab.*>:
e: f000.*
f: 0001.*
10: f073.*
11: 000e.*
-00000012 <lab.*>:
+0+012 <lab.*>:
12: f845.*
13: 0012.*
-00000014 <lab.*>:
+0+014 <lab.*>:
14: f000.*
15: 0003.*
16: f073.*
17: 0014.*
-00000018 <lab.*>:
+0+018 <lab.*>:
18: f000.*
19: 0004.*
1a: f073.*
1b: 0018.*
-0000001c <after_macro>:
+0+01c <after_macro>:
1c: f073.*
1d: 0014.*
Disassembly of section new_sect:
-00000000 <new_section>:
+0+000 <new_section>:
0: f495.*
-00000001 <lab.7>:
+0+001 <lab.7>:
1: f000.*
2: 0005.*
3: f495.*
@@ -65,7 +65,7 @@
5: f073.*
6: 0001.*
-00000007 <lab.8>:
+0+007 <lab.8>:
7: f000.*
8: 0006.*
9: f495.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/loop.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/loop.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/loop.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,10 +5,10 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
...
-00000001 <label>:
+0+001 <label>:
1: 0000.*
2: 0001.*
3: 0002.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/lp.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/lp.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/lp.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,6 +5,6 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f49f.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/macro.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/macro.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/macro.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f000.*
1: 0000.*
2: f300.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/math.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/math.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/math.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 3fc9.*
1: 0fd8.*
...
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/opcodes.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/opcodes.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/opcodes.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <_opcodes>:
+0+000 <_opcodes>:
0: e39a abdst \*ar3\+,\*ar4\+
1: f485 abs a
2: f585 abs a,b
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/sections.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/sections.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/sections.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,73 +4,73 @@
.*: +file format .*c54x.*
Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .text 0000001b 00000000 00000000 0000.... 2..0
+Idx Name Size VMA + LMA + File off Algn
+ 0 .text 0000001b 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, RELOC, CODE
- 1 .data 00000007 00000000 00000000 0000.... 2..0
+ 1 .data 00000007 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA
- 2 .bss 00000014 00000000 00000000 0000.... 2..0
+ 2 .bss 00000014 0+000 0+000 0000.... 2..0
ALLOC
- 3 newvars 00000017 00000000 00000000 0000.... 2..1
+ 3 newvars 00000017 0+000 0+000 0000.... 2..1
ALLOC, BLOCK
- 4 vectors 00000002 00000000 00000000 0000.... 2..0
+ 4 vectors 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, CODE, BLOCK
- 5 clink 00000002 00000000 00000000 0000.... 2..0
+ 5 clink 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA, CLINK
- 6 blksect 00000002 00000000 00000000 0000.... 2..0
+ 6 blksect 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA, BLOCK
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 1234.*
-00000001 <add>:
+0+001 <add>:
1: 100f.*
-00000002 <aloop>:
+0+002 <aloop>:
2: f010.*
3: 0001.*
4: f842.*
5: 0002.*
-00000006 <mpy>:
+0+006 <mpy>:
6: 110a.*
-00000007 <mloop>:
+0+007 <mloop>:
7: f166.*
8: 000a.*
9: f868.*
a: 0007.*
-0000000b <space>:
+0+00b <space>:
...
-00000012 <bes>:
+0+012 <bes>:
...
-00000013 <spacep>:
+0+013 <spacep>:
13: 000b.*
-00000014 <besp>:
+0+014 <besp>:
14: 0012.*
-00000015 <pk1>:
+0+015 <pk1>:
...
-00000016 <endpk1>:
+0+016 <endpk1>:
16: 0000.*
...
-00000018 <endpk2>:
+0+018 <endpk2>:
...
-00000019 <pk3>:
+0+019 <pk3>:
...
-0000001a <endpk3>:
+0+01a <endpk3>:
...
Disassembly of section vectors:
-00000000 <vectors>:
+0+000 <vectors>:
0: f495.*
1: f495.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/set.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/set.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/set.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,12 +5,12 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 7711.*
1: 0056.*
2: f000.*
3: 0035.*
-00000004 <LABEL>:
+0+004 <LABEL>:
4: 000a.*
5: 0035.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/struct.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/struct.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/struct.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 0001.*
1: 0002.*
2: 8002.*
Modified: branches/binutils/package/gas/testsuite/gas/tic54x/subsym.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/tic54x/subsym.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/tic54x/subsym.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,10 +5,10 @@
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 0018.*
-00000001 <label>:
+0+001 <label>:
1: 0005.*
2: 0005.*
3: 0006.*
@@ -33,7 +33,7 @@
16: 0000.*
17: 0001.*
-00000018 <x>:
+0+018 <x>:
18: 0001.*
19: 0001.*
...
Modified: branches/binutils/package/gas/testsuite/gas/v850/v850e1.d
===================================================================
--- branches/binutils/package/gas/testsuite/gas/v850/v850e1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gas/testsuite/gas/v850/v850e1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -11,7 +11,7 @@
0x0+04 e0 1f 40 23 [ ]*bsw sp, gp
0x0+08 05 02 [ ]*callt 5
0x0+0a e8 3f e4 00 [ ]*clr1 r7, r8
-0x0+0e f6 17 14 1b [ ]*cmov nz, -10, r2, sp
+0x0+0e f6 17 14 1b [ ]*cmov nz, 22, r2, sp
0x0+12 e1 17 34 1b [ ]*cmov nz, r1, r2, sp
0x0+16 e0 07 44 01 [ ]*ctret
0x0+1a e0 07 46 01 [ ]*dbret
Modified: branches/binutils/package/gprof/ChangeLog
===================================================================
--- branches/binutils/package/gprof/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,241 +1,26 @@
-2005-11-16 Mark Mitchell <mark at codesourcery.com>
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
- * Makefile.am (gprof.info, gprof.1): Depend on config.texi.
- (config.texi): New file.
- * Makefile.in: Regenerated.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-10-30 Mark Mitchell <mark at codesourcery.com>
-
- * gprof.c (usage): Document "@FILE".
-
-2005-09-30 Nick Clifton <nickc at redhat.com>
-
- * po/ga.po: New Irish translation.
- * configure.in (ALL_LINGUAS): Add "ga".
- * configure: Regenerate.
-
-2005-09-30 Mark Mitchell <mark at codesourcery.com>
-
- * gprof.c (main): Use expandargv.
-
-2005-09-30 Matthias Kurz <mk at baerlap.north.de>
-
- * gprof.c (main):Only invoke bindtextdomain() and textdomain() if
- ENABLE_NLS is defined.
-
-2005-05-09 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- aclocal.m4, basic_blocks.c, basic_blocks.h, bb_exit_func.c,
- bbconv.pl, call_graph.c, call_graph.h, cg_print.c, cg_print.h,
- corefile.c, corefile.h, gmon_io.c, gmon_io.h, gmon_out.h,
- gprof.texi, hist.c, hist.h, search_list.c, search_list.h,
- source.c, source.h, sym_ids.c, sym_ids.h, symtab.c, symtab.h
-
-2005-04-25 Ben Elliston <bje at au.ibm.com>
-
- * corefile.h (core_num_syms): Remove unused extern declaration.
- (core_syms): Likewise.
- (min_insn_size): Likewise.
-
-2005-04-24 Ben Elliston <bje at au.ibm.com>
-
- * corefile.c (core_num_syms): Make static.
- (core_syms): Likewise.
- (min_insn_size): Likewise.
- * gprof.c (abfd): Remove unused variable.
- * hist.c (hist_dimension): Make static.
- (hist_dimension_abbrev): Likewise.
- * sym_ids.c (id_list): Likewise.
- (table_name): Likewise.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * corefile.c (core_init): Call bfd_get_synthetic_symtab.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define.
- * acinclude.m4: Include ../bfd/warning.m4.
- * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * po/Make-in: Add install-html target.
+ * Makefile.am: Add install-html, install-html-am and
+ install-html-recursive targets.
* Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
+ * configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
-2005-04-06 Nick Clifton <nickc at redhat.com>
+2006-03-21 Ben Elliston <bje at au.ibm.com>
- * po/rw.po: New translation: Kinyarwanda
- * configure.in (ALL_LINGUAS): Add rw
- * configure: Regenerate.
+ * corefile.c (core_init): Report that the executable is not in the
+ expected executable format rather than "a.out" format.
-2005-04-04 Nick Clifton <nickc at redhat.com>
+2006-03-09 Nick Clifton <nickc at redhat.com>
- * configure.in: Add a check for <unistd.h> providing a prototype
- for getopt() which is compatible with the one in
- include/getopt.h. If so then define HAVE_DECL_GETOPT.
- * configure: Regenerate.
- * gconfig.in (HAVE_DECL_GETOPT): Add.
+ * po/sv.po: Updated Swedish translation.
-2005-03-29 Nick Clifton <nickc at redhat.com>
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
- * po/de.po: Updated German translation.
+ * po/Make-in: Add html target.
-2005-03-17 Nick Clifton <nickc at redhat.com>
-
- * po/vi.po: Updated Vietnamese translation.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
-
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
- * configure: Regenerate.
-
-2005-03-15 Nick Clifton <nickc at redhat.com>
-
- * basic_blocks.c (print_exec_counts): Step through sorted array of
- basic blocks.
-
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * po/es.po: Commit new Spanish translation.
-
- * po/fr.po: Commit new French translation.
-
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
-
- * gmon_io.c (gmon_write_raw_arc): Return 1 for invalid size.
-
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
-
- * po/tr.po: Commit new Turkish translation.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/gprof.pot: Regenerate.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * basic_blocks.c: Warning fixes.
- * gmon_io.c: Likewise.
- * hist.c: Likewise.
- * hist.h: Likewise.
-
-2005-01-31 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * po/vi/po: New file: Vietnamese translation.
- * configure.in: (ALL_LINGUAS): Add vi.
- * configure: Regenerate.
-
-2005-01-27 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4 change.
-
-2005-01-21 Ben Elliston <bje at au.ibm.com>
-
- * gmon.h, alpha.c, vax.c: Remove #if 0'd chunks.
-
-2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
-
- * Makefile.am: Change LOCALEDIR to $(datadir)/share.
- * Makefile.in: Regenerate.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
- * po/gprof.pot: Regenerate.
-
-2004-07-13 Ben Elliston <bje at au.ibm.com>
-
- * gprof.c (main): For line-by-line profiling, there is no need to
- specially exclude the default function set from the flat profile.
-
-2004-06-28 Maciej W. Rozycki <macro at linux-mips.org>
-
- * Makefile.in: Regenerate to clean up breakage.
-
-2004-06-15 Ben Elliston <bje at au.ibm.com>
-
- * configure.in: Run through autoupdate.
- * configure: Regenerate with autoconf 2.59.
- * Makefile.am (install-local): Rename from this ..
- (install-data-local): .. to this.
- * Makefile.in: Regenerate with automake 1.8.5.
- * aclocal.m4: Regenerate with aclocal 1.8.5.
-
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
-
- * corefile.c (core_init): Use bfd_get_section_size
- instead of bfd_get_section_size_before_reloc or _raw_size.
- * symtab.c (symtab_finalize): Likewise.
-
-2004-05-26 Andrew Cagney <cagney at gnu.org>
-
- * corefile.c (core_create_line_syms): Per ISO C '90, move
- vma_high's declaration to the function's start.
-
-2004-05-26 Ben Elliston <bje at au.ibm.com>
-
- * gprof.c (main): Clean up some more.
-
- * alpha.c, basic_blocks.c, basic_blocks.h, bb_exit_func.c,
- call_graph.c, call_graph.h, cg_arcs.c, cg_arcs.h, cg_dfn.c,
- cg_dfn.h, cg_print.c, cg_print.h, corefile.c, corefile.h,
- gmon_io.c, gmon_io.h, gprof.c, gprof.h, hertz.h, hist.c, hist.h,
- i386.c, mips.c, search_list.c, search_list.h, source.c, source.h,
- sparc.c, sym_ids.c, sym_ids.h, symtab.c, symtab.h, tahoe.c,
- utils.c, utils.h, vax.c, gen-c-prog.awk: Convert K&R C to ANSI C.
-
-2004-05-26 Ben Elliston <bje at au.ibm.com>
-
- * corefile.c (core_init): Use a separate local variable,
- core_sym_bytes, to make the units from bfd_get_symtab_upper_bound
- more obvious.
- (core_create_function_syms): Discard cbfd argument. Eliminate
- `offset' variable and calculate VMA directly. Update all users.
- * corefile.h (core_create_function_syms): Update prototype.
- (core_create_line_syms): Likewise.
- * gprof.c (main): Remove #ifdef PROF_SUPPORT_IMPLEMENTED code.
- Tidy.
-
-2004-05-17 Ben Elliston <bje at au.ibm.com>
-
- * gprof.texi (Output Options): Correct last patch to use @itemx, not
- @item, for options with long option alternatives.
-
-2004-05-17 Ben Elliston <bje at au.ibm.com>
-
- * gprof.texi (Introduction): Update synopsis.
- (Output Options): Document -r and -R.
- (Analysis Options): Document -t, --table-length.
- (Miscellaneous Options): Document -h, --help.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * po/sv.po: Updated.
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * gconfig.in: Regenerate.
- * po/gprof.pot: Regenerate.
-
-For older changes see ChangeLog-9203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/gprof/ChangeLog-2004
===================================================================
--- branches/binutils/package/gprof/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,98 @@
+2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
+
+ * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ * Makefile.in: Regenerate.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+ * po/gprof.pot: Regenerate.
+
+2004-07-13 Ben Elliston <bje at au.ibm.com>
+
+ * gprof.c (main): For line-by-line profiling, there is no need to
+ specially exclude the default function set from the flat profile.
+
+2004-06-28 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * Makefile.in: Regenerate to clean up breakage.
+
+2004-06-15 Ben Elliston <bje at au.ibm.com>
+
+ * configure.in: Run through autoupdate.
+ * configure: Regenerate with autoconf 2.59.
+ * Makefile.am (install-local): Rename from this ..
+ (install-data-local): .. to this.
+ * Makefile.in: Regenerate with automake 1.8.5.
+ * aclocal.m4: Regenerate with aclocal 1.8.5.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * corefile.c (core_init): Use bfd_get_section_size
+ instead of bfd_get_section_size_before_reloc or _raw_size.
+ * symtab.c (symtab_finalize): Likewise.
+
+2004-05-26 Andrew Cagney <cagney at gnu.org>
+
+ * corefile.c (core_create_line_syms): Per ISO C '90, move
+ vma_high's declaration to the function's start.
+
+2004-05-26 Ben Elliston <bje at au.ibm.com>
+
+ * gprof.c (main): Clean up some more.
+
+ * alpha.c, basic_blocks.c, basic_blocks.h, bb_exit_func.c,
+ call_graph.c, call_graph.h, cg_arcs.c, cg_arcs.h, cg_dfn.c,
+ cg_dfn.h, cg_print.c, cg_print.h, corefile.c, corefile.h,
+ gmon_io.c, gmon_io.h, gprof.c, gprof.h, hertz.h, hist.c, hist.h,
+ i386.c, mips.c, search_list.c, search_list.h, source.c, source.h,
+ sparc.c, sym_ids.c, sym_ids.h, symtab.c, symtab.h, tahoe.c,
+ utils.c, utils.h, vax.c, gen-c-prog.awk: Convert K&R C to ANSI C.
+
+2004-05-26 Ben Elliston <bje at au.ibm.com>
+
+ * corefile.c (core_init): Use a separate local variable,
+ core_sym_bytes, to make the units from bfd_get_symtab_upper_bound
+ more obvious.
+ (core_create_function_syms): Discard cbfd argument. Eliminate
+ `offset' variable and calculate VMA directly. Update all users.
+ * corefile.h (core_create_function_syms): Update prototype.
+ (core_create_line_syms): Likewise.
+ * gprof.c (main): Remove #ifdef PROF_SUPPORT_IMPLEMENTED code.
+ Tidy.
+
+2004-05-17 Ben Elliston <bje at au.ibm.com>
+
+ * gprof.texi (Output Options): Correct last patch to use @itemx, not
+ @item, for options with long option alternatives.
+
+2004-05-17 Ben Elliston <bje at au.ibm.com>
+
+ * gprof.texi (Introduction): Update synopsis.
+ (Output Options): Document -r and -R.
+ (Analysis Options): Document -t, --table-length.
+ (Miscellaneous Options): Document -h, --help.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * po/sv.po: Updated.
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * gconfig.in: Regenerate.
+ * po/gprof.pot: Regenerate.
+
+For older changes see ChangeLog-9203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/gprof/ChangeLog-2005
===================================================================
--- branches/binutils/package/gprof/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,162 @@
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (Makefile): Remove dependency.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * gconfig.in: Regenerate.
+
+2005-11-16 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (gprof.info, gprof.1): Depend on config.texi.
+ (config.texi): New file.
+ * Makefile.in: Regenerated.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-10-30 Mark Mitchell <mark at codesourcery.com>
+
+ * gprof.c (usage): Document "@FILE".
+
+2005-09-30 Nick Clifton <nickc at redhat.com>
+
+ * po/ga.po: New Irish translation.
+ * configure.in (ALL_LINGUAS): Add "ga".
+ * configure: Regenerate.
+
+2005-09-30 Mark Mitchell <mark at codesourcery.com>
+
+ * gprof.c (main): Use expandargv.
+
+2005-09-30 Matthias Kurz <mk at baerlap.north.de>
+
+ * gprof.c (main):Only invoke bindtextdomain() and textdomain() if
+ ENABLE_NLS is defined.
+
+2005-05-09 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ aclocal.m4, basic_blocks.c, basic_blocks.h, bb_exit_func.c,
+ bbconv.pl, call_graph.c, call_graph.h, cg_print.c, cg_print.h,
+ corefile.c, corefile.h, gmon_io.c, gmon_io.h, gmon_out.h,
+ gprof.texi, hist.c, hist.h, search_list.c, search_list.h,
+ source.c, source.h, sym_ids.c, sym_ids.h, symtab.c, symtab.h
+
+2005-04-25 Ben Elliston <bje at au.ibm.com>
+
+ * corefile.h (core_num_syms): Remove unused extern declaration.
+ (core_syms): Likewise.
+ (min_insn_size): Likewise.
+
+2005-04-24 Ben Elliston <bje at au.ibm.com>
+
+ * corefile.c (core_num_syms): Make static.
+ (core_syms): Likewise.
+ (min_insn_size): Likewise.
+ * gprof.c (abfd): Remove unused variable.
+ * hist.c (hist_dimension): Make static.
+ (hist_dimension_abbrev): Likewise.
+ * sym_ids.c (id_list): Likewise.
+ (table_name): Likewise.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * corefile.c (core_init): Call bfd_get_synthetic_symtab.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define.
+ * acinclude.m4: Include ../bfd/warning.m4.
+ * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2005-04-06 Nick Clifton <nickc at redhat.com>
+
+ * po/rw.po: New translation: Kinyarwanda
+ * configure.in (ALL_LINGUAS): Add rw
+ * configure: Regenerate.
+
+2005-04-04 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Add a check for <unistd.h> providing a prototype
+ for getopt() which is compatible with the one in
+ include/getopt.h. If so then define HAVE_DECL_GETOPT.
+ * configure: Regenerate.
+ * gconfig.in (HAVE_DECL_GETOPT): Add.
+
+2005-03-29 Nick Clifton <nickc at redhat.com>
+
+ * po/de.po: Updated German translation.
+
+2005-03-17 Nick Clifton <nickc at redhat.com>
+
+ * po/vi.po: Updated Vietnamese translation.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-15 Nick Clifton <nickc at redhat.com>
+
+ * basic_blocks.c (print_exec_counts): Step through sorted array of
+ basic blocks.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+ * po/fr.po: Commit new French translation.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * gmon_io.c (gmon_write_raw_arc): Return 1 for invalid size.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * po/tr.po: Commit new Turkish translation.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/gprof.pot: Regenerate.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * basic_blocks.c: Warning fixes.
+ * gmon_io.c: Likewise.
+ * hist.c: Likewise.
+ * hist.h: Likewise.
+
+2005-01-31 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * po/vi/po: New file: Vietnamese translation.
+ * configure.in: (ALL_LINGUAS): Add vi.
+ * configure: Regenerate.
+
+2005-01-27 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-21 Ben Elliston <bje at au.ibm.com>
+
+ * gmon.h, alpha.c, vax.c: Remove #if 0'd chunks.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/gprof/Makefile.am
===================================================================
--- branches/binutils/package/gprof/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -75,8 +75,54 @@
(rm -f $@.T$$$$ && exit 1)
rm -f gprof.pod
-Makefile: $(BFDDIR)/configure.in
+.PHONY: install-html install-html-am install-html-recursive
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-recursive install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install-data-local: install-info
Modified: branches/binutils/package/gprof/Makefile.in
===================================================================
--- branches/binutils/package/gprof/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,8 +1,8 @@
-# Makefile.in generated by automake 1.9.3 from Makefile.am.
+# Makefile.in generated by automake 1.9.5 from Makefile.am.
# @configure_input@
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
-# 2003, 2004 Free Software Foundation, Inc.
+# 2003, 2004, 2005 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@@ -203,12 +203,15 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -259,6 +262,7 @@
POD2MAN = pod2man --center="GNU" --release="binutils-$(VERSION)" --section=1
info_TEXINFOS = gprof.texi
man_MANS = gprof.1
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
CLEANFILES = dep.sed DEP DEPA DEP1 DEP2
all: $(BUILT_SOURCES) gconfig.h
$(MAKE) $(AM_MAKEFLAGS) all-recursive
@@ -281,6 +285,15 @@
cd $(top_srcdir) && \
$(AUTOMAKE) --foreign Makefile
.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ echo ' $(SHELL) ./config.status'; \
+ $(SHELL) ./config.status;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
+ esac;
$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
$(SHELL) ./config.status --recheck
@@ -414,7 +427,7 @@
$(DVIPS) -o $@ $<
uninstall-info-am:
- $(PRE_UNINSTALL)
+ @$(PRE_UNINSTALL)
@if (install-info --version && \
install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
list='$(INFO_DEPS)'; \
@@ -430,7 +443,7 @@
relfile=`echo "$$file" | sed 's|^.*/||'`; \
relfile_i=`echo "$$relfile" | sed 's|\.info$$||;s|$$|.i|'`; \
(if cd "$(DESTDIR)$(infodir)"; then \
- echo " rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9])"; \
+ echo " cd '$(DESTDIR)$(infodir)' && rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9]"; \
rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9]; \
else :; fi); \
done
@@ -517,7 +530,13 @@
# (which will cause the Makefiles to be regenerated when you run `make');
# (2) otherwise, pass the desired values on the `make' command line.
$(RECURSIVE_TARGETS):
- @set fnord $$MAKEFLAGS; amf=$$2; \
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
dot_seen=no; \
target=`echo $@ | sed s/-recursive//`; \
list='$(SUBDIRS)'; for subdir in $$list; do \
@@ -529,7 +548,7 @@
local_target="$$target"; \
fi; \
(cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
- || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+ || eval $$failcom; \
done; \
if test "$$dot_seen" = "no"; then \
$(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
@@ -537,7 +556,13 @@
mostlyclean-recursive clean-recursive distclean-recursive \
maintainer-clean-recursive:
- @set fnord $$MAKEFLAGS; amf=$$2; \
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
dot_seen=no; \
case "$@" in \
distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
@@ -558,7 +583,7 @@
local_target="$$target"; \
fi; \
(cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
- || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+ || eval $$failcom; \
done && test -z "$$fail"
tags-recursive:
list='$(SUBDIRS)'; for subdir in $$list; do \
@@ -799,8 +824,52 @@
(rm -f $@.T$$$$ && exit 1)
rm -f gprof.pod
-Makefile: $(BFDDIR)/configure.in
+.PHONY: install-html install-html-am install-html-recursive
+install-html: install-html-recursive install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
# We want install to imply install-info as per GNU standards, despite the
# cygnus option.
install-data-local: install-info
Modified: branches/binutils/package/gprof/aclocal.m4
===================================================================
--- branches/binutils/package/gprof/aclocal.m4 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/aclocal.m4 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,7 @@
-# generated automatically by aclocal 1.9.3 -*- Autoconf -*-
+# generated automatically by aclocal 1.9.5 -*- Autoconf -*-
-# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
-# Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+# 2005 Free Software Foundation, Inc.
# This file is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@@ -11,24 +11,12 @@
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE.
-# -*- Autoconf -*-
-# Copyright (C) 2002, 2003 Free Software Foundation, Inc.
-# Generated from amversion.in; do not edit by hand.
+# Copyright (C) 2002, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-
# AM_AUTOMAKE_VERSION(VERSION)
# ----------------------------
# Automake X.Y traces this macro to ensure aclocal.m4 has been
@@ -40,27 +28,16 @@
# Call AM_AUTOMAKE_VERSION so it can be traced.
# This function is AC_REQUIREd by AC_INIT_AUTOMAKE.
AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
- [AM_AUTOMAKE_VERSION([1.9.3])])
+ [AM_AUTOMAKE_VERSION([1.9.5])])
-# AM_AUX_DIR_EXPAND
+# AM_AUX_DIR_EXPAND -*- Autoconf -*-
-# Copyright (C) 2001, 2003 Free Software Foundation, Inc.
+# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
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-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
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-# but WITHOUT ANY WARRANTY; without even the implied warranty of
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-
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@@ -106,27 +83,17 @@
am_aux_dir=`cd $ac_aux_dir && pwd`
])
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+# AM_CONDITIONAL -*- Autoconf -*-
-# Copyright (C) 1997, 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
+# Copyright (C) 1997, 2000, 2001, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 7
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
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-
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@@ -149,27 +116,16 @@
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fi])])
-# serial 7 -*- Autoconf -*-
-# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 8
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
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# There are a few dirty hacks below to avoid letting `AC_PROG_CC' be
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@@ -317,28 +272,17 @@
AC_SUBST([AMDEPBACKSLASH])
])
-# Generate code to set up dependency tracking. -*- Autoconf -*-
+# Generate code to set up dependency tracking. -*- Autoconf -*-
-# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
-# Free Software Foundation, Inc.
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+#serial 3
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
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@@ -396,31 +340,20 @@
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-# Do all the work for Automake. -*- Autoconf -*-
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-# This macro actually does too much some checks are only needed if
-# your package does certain things. But this isn't really a big deal.
-
-# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 12
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
+# This macro actually does too much. Some checks are only needed if
+# your package does certain things. But this isn't really a big deal.
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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# -----------------------------------------------
@@ -521,52 +454,28 @@
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+
# AM_PROG_INSTALL_SH
# ------------------
# Define $install_sh.
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install_sh=${install_sh-"$am_aux_dir/install-sh"}
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-# -*- Autoconf -*-
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+# with or without modifications, as long as this notice is preserved.
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-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 2
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
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-# GNU General Public License for more details.
-
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@@ -580,29 +489,18 @@
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AC_SUBST([am__leading_dot])])
-# Add --enable-maintainer-mode option to configure.
+# Add --enable-maintainer-mode option to configure. -*- Autoconf -*-
# From Jim Meyering
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+# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005
# Free Software Foundation, Inc.
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+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 4
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 3
-
AC_DEFUN([AM_MAINTAINER_MODE],
[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
dnl maintainer-mode is disabled by default
@@ -620,27 +518,16 @@
AU_DEFUN([jm_MAINTAINER_MODE], [AM_MAINTAINER_MODE])
-# Check to see how 'make' treats includes. -*- Autoconf -*-
+# Check to see how 'make' treats includes. -*- Autoconf -*-
-# Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
+# Copyright (C) 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 3
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 2
-
# AM_MAKE_INCLUDE()
# -----------------
# Check to see how make treats includes.
@@ -683,28 +570,17 @@
rm -f confinc confmf
])
-# -*- Autoconf -*-
+# Fake the existence of programs that GNU maintainers use. -*- Autoconf -*-
+# Copyright (C) 1997, 1999, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# Copyright (C) 1997, 1999, 2000, 2001, 2003 Free Software Foundation, Inc.
+# serial 4
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 3
-
# AM_MISSING_PROG(NAME, PROGRAM)
# ------------------------------
AC_DEFUN([AM_MISSING_PROG],
@@ -729,27 +605,16 @@
fi
])
+# Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
# AM_PROG_MKDIR_P
# ---------------
# Check whether `mkdir -p' is supported, fallback to mkinstalldirs otherwise.
-
-# Copyright (C) 2003, 2004 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
+#
# Automake 1.8 used `mkdir -m 0755 -p --' to ensure that directories
# created by `make install' are always world readable, even if the
# installer happens to have an overly restrictive umask (e.g. 077).
@@ -803,27 +668,16 @@
fi
AC_SUBST([mkdir_p])])
-# Helper functions for option handling. -*- Autoconf -*-
+# Helper functions for option handling. -*- Autoconf -*-
-# Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
+# Copyright (C) 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 3
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 2
-
# _AM_MANGLE_OPTION(NAME)
# -----------------------
AC_DEFUN([_AM_MANGLE_OPTION],
@@ -847,29 +701,17 @@
AC_DEFUN([_AM_IF_OPTION],
[m4_ifset(_AM_MANGLE_OPTION([$1]), [$2], [$3])])
+# Check to make sure that the build environment is sane. -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
#
-# Check to make sure that the build environment is sane.
-#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# Copyright (C) 1996, 1997, 2000, 2001, 2003 Free Software Foundation, Inc.
+# serial 4
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 3
-
# AM_SANITY_CHECK
# ---------------
AC_DEFUN([AM_SANITY_CHECK],
@@ -911,25 +753,14 @@
fi
AC_MSG_RESULT(yes)])
-# AM_PROG_INSTALL_STRIP
+# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# Copyright (C) 2001, 2003 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
+# AM_PROG_INSTALL_STRIP
+# ---------------------
# One issue with vendor `install' (even GNU) is that you can't
# specify the program used to strip binaries. This is especially
# annoying in cross-compiling environments, where the build's strip
@@ -952,26 +783,14 @@
# Check how to create a tarball. -*- Autoconf -*-
-# Copyright (C) 2004 Free Software Foundation, Inc.
+# Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
+# serial 2
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-# 02110-1301, USA.
-
-# serial 1
-
-
# _AM_PROG_TAR(FORMAT)
# --------------------
# Check how to create a tarball in format FORMAT.
Modified: branches/binutils/package/gprof/configure
===================================================================
--- branches/binutils/package/gprof/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT WARN_CFLAGS NO_WERROR LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT WARN_CFLAGS NO_WERROR datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
ac_subst_files=''
# Initialize some variables set by options.
@@ -3339,6 +3339,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3349,6 +3350,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3409,14 +3411,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3477,6 +3472,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3810,7 +3866,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3813 "configure"' > conftest.$ac_ext
+ echo '#line 3869 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -3865,6 +3921,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -8403,6 +8505,10 @@
+
+
+
+
ac_config_files="$ac_config_files Makefile po/Makefile.in:po/Make-in"
ac_config_commands="$ac_config_commands default"
@@ -9136,6 +9242,9 @@
s, at MAINT@,$MAINT,;t t
s, at WARN_CFLAGS@,$WARN_CFLAGS,;t t
s, at NO_WERROR@,$NO_WERROR,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LIBOBJS@,$LIBOBJS,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
CEOF
Modified: branches/binutils/package/gprof/configure.in
===================================================================
--- branches/binutils/package/gprof/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -44,6 +44,11 @@
AM_BINUTILS_WARNINGS
+dnl Required by html and install-html
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
AC_CONFIG_FILES([Makefile po/Makefile.in:po/Make-in])
AC_CONFIG_COMMANDS([default],[[sed -e '/POTFILES =/r po/POTFILES' po/Makefile.in > po/Makefile]],[[]])
AC_OUTPUT
Modified: branches/binutils/package/gprof/corefile.c
===================================================================
--- branches/binutils/package/gprof/corefile.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/corefile.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -155,7 +155,7 @@
if (!bfd_check_format (core_bfd, bfd_object))
{
- fprintf (stderr, _("%s: %s: not in a.out format\n"), whoami, aout_name);
+ fprintf (stderr, _("%s: %s: not in executable format\n"), whoami, aout_name);
done (1);
}
Modified: branches/binutils/package/gprof/gconfig.in
===================================================================
--- branches/binutils/package/gprof/gconfig.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/gconfig.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,143 +1,171 @@
-/* gconfig.in. Generated automatically from configure.in by autoheader. */
+/* gconfig.in. Generated from configure.in by autoheader. */
-/* Define if using alloca.c. */
+/* Define to one of `_getb67', `GETB67', `getb67' for Cray-2 and Cray-YMP
+ systems. This function is required for `alloca.c' support on those systems.
+ */
+#undef CRAY_STACKSEG_END
+
+/* Define to 1 if using `alloca.c'. */
#undef C_ALLOCA
-/* Define to empty if the keyword does not work. */
-#undef const
+/* Define to 1 if NLS is requested */
+#undef ENABLE_NLS
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
+/* Define to 1 if you have `alloca', as a function or macro. */
#undef HAVE_ALLOCA
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
+/* Define to 1 if you have <alloca.h> and it should be used (not on Ultrix).
+ */
#undef HAVE_ALLOCA_H
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
+/* Define to 1 if you have the <argz.h> header file. */
+#undef HAVE_ARGZ_H
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
+/* Define to 1 if you have the `dcgettext' function. */
+#undef HAVE_DCGETTEXT
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
+/* Is the prototype for getopt in <unistd.h> in the expected format? */
+#undef HAVE_DECL_GETOPT
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
+/* Define to 1 if you have the `getcwd' function. */
+#undef HAVE_GETCWD
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
+/* Define to 1 if you have the `getpagesize' function. */
+#undef HAVE_GETPAGESIZE
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
+/* Define as 1 if you have gettext and don't want to use GNU gettext. */
+#undef HAVE_GETTEXT
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
+/* Define if your locale.h file contains LC_MESSAGES. */
+#undef HAVE_LC_MESSAGES
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
+/* Define to 1 if you have the <limits.h> header file. */
+#undef HAVE_LIMITS_H
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
+/* Define to 1 if you have the <locale.h> header file. */
+#undef HAVE_LOCALE_H
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
+/* Define to 1 if you have the <malloc.h> header file. */
+#undef HAVE_MALLOC_H
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
+/* Define to 1 if you have the <memory.h> header file. */
+#undef HAVE_MEMORY_H
-/* Define if you have the munmap function. */
+/* Define to 1 if you have a working `mmap' system call. */
+#undef HAVE_MMAP
+
+/* Define to 1 if you have the `munmap' function. */
#undef HAVE_MUNMAP
-/* Define if you have the putenv function. */
+/* Define to 1 if you have the <nl_types.h> header file. */
+#undef HAVE_NL_TYPES_H
+
+/* Define to 1 if you have the `putenv' function. */
#undef HAVE_PUTENV
-/* Define if you have the setenv function. */
+/* Define to 1 if you have the `setenv' function. */
#undef HAVE_SETENV
-/* Define if you have the setlocale function. */
+/* Define to 1 if you have the `setlocale' function. */
#undef HAVE_SETLOCALE
-/* Define if you have the setmode function. */
+/* Define to 1 if you have the `setmode' function. */
#undef HAVE_SETMODE
-/* Define if you have the stpcpy function. */
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define if you have the stpcpy function */
#undef HAVE_STPCPY
-/* Define if you have the strcasecmp function. */
+/* Define to 1 if you have the `strcasecmp' function. */
#undef HAVE_STRCASECMP
-/* Define if you have the strchr function. */
+/* Define to 1 if you have the `strchr' function. */
#undef HAVE_STRCHR
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
+/* Define to 1 if you have the <string.h> header file. */
#undef HAVE_STRING_H
-/* Define if you have the <sys/gmon_out.h> header file. */
+/* Define to 1 if you have the <sys/gmon_out.h> header file. */
#undef HAVE_SYS_GMON_OUT_H
-/* Define if you have the <sys/param.h> header file. */
+/* Define to 1 if you have the <sys/param.h> header file. */
#undef HAVE_SYS_PARAM_H
-/* Define if you have the <sys/stat.h> header file. */
+/* Define to 1 if you have the <sys/stat.h> header file. */
#undef HAVE_SYS_STAT_H
-/* Define if you have the <sys/types.h> header file. */
+/* Define to 1 if you have the <sys/types.h> header file. */
#undef HAVE_SYS_TYPES_H
-/* Define if you have the <unistd.h> header file. */
+/* Define to 1 if you have the <unistd.h> header file. */
#undef HAVE_UNISTD_H
-/* Define if you have the <values.h> header file. */
+/* Define to 1 if you have the <values.h> header file. */
#undef HAVE_VALUES_H
+/* Define to 1 if you have the `__argz_count' function. */
+#undef HAVE___ARGZ_COUNT
+
+/* Define to 1 if you have the `__argz_next' function. */
+#undef HAVE___ARGZ_NEXT
+
+/* Define to 1 if you have the `__argz_stringify' function. */
+#undef HAVE___ARGZ_STRINGIFY
+
/* Name of package */
#undef PACKAGE
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* If using the C implementation of alloca, define if you know the
+ direction of stack growth for your system; otherwise it will be
+ automatically deduced at run-time.
+ STACK_DIRECTION > 0 => grows toward higher addresses
+ STACK_DIRECTION < 0 => grows toward lower addresses
+ STACK_DIRECTION = 0 => direction of growth unknown */
+#undef STACK_DIRECTION
+
+/* Define to 1 if you have the ANSI C header files. */
+#undef STDC_HEADERS
+
/* Version number of package */
#undef VERSION
-/* Define if you have the stpcpy function */
-#undef HAVE_STPCPY
+/* Define to empty if `const' does not conform to ANSI C. */
+#undef const
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+ calls it, or to nothing if 'inline' is not supported under any name. */
+#ifndef __cplusplus
+#undef inline
+#endif
-/* Define to 1 if NLS is requested */
-#undef ENABLE_NLS
+/* Define to `long' if <sys/types.h> does not define. */
+#undef off_t
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Is the prototype for getopt in <unistd.h> in the expected format? */
-#undef HAVE_DECL_GETOPT
+/* Define to `unsigned' if <sys/types.h> does not define. */
+#undef size_t
Modified: branches/binutils/package/gprof/po/Make-in
===================================================================
--- branches/binutils/package/gprof/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright 2002, 2003 Free Software Foundation, Inc.
+# Copyright 2002, 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -110,6 +110,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -185,7 +186,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Modified: branches/binutils/package/gprof/po/sv.po
===================================================================
--- branches/binutils/package/gprof/po/sv.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/gprof/po/sv.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,58 +1,60 @@
# Swedish messages for gprof.
-# Copyright (C) 2001, 2002, 2004 Free Software Foundation, Inc.
+# Copyright (C) 2001, 2002, 2004, 2006 Free Software Foundation, Inc.
# Christian Rose <menthos at menthos.com>, 2001, 2002, 2004.
+# Daniel Nylander <po at danielnylander.se>, 2006.
#
msgid ""
msgstr ""
-"Project-Id-Version: gprof 2.14rel030712\n"
-"POT-Creation-Date: 2003-07-11 13:58+0930\n"
-"PO-Revision-Date: 2004-03-18 23:52+0100\n"
-"Last-Translator: Christian Rose <menthos at menthos.com>\n"
-"Language-Team: Swedish <sv at li.org>\n"
+"Project-Id-Version: gprof 2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-03 21:05+1030\n"
+"PO-Revision-Date: 2006-02-12 23:55+0100\n"
+"Last-Translator: Daniel Nylander <po at danielnylander.se>\n"
+"Language-Team: Swedish <tp-sv at listor.tp-sv.se>\n"
"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=iso-8859-1\n"
"Content-Transfer-Encoding: 8bit\n"
-#: alpha.c:103 mips.c:57
+#: alpha.c:102 mips.c:54
msgid "<indirect child>"
msgstr "<indirekt barn>"
-#: alpha.c:120 mips.c:74
+#: alpha.c:119 mips.c:71
#, c-format
msgid "[find_call] %s: 0x%lx to 0x%lx\n"
msgstr "[find_call] %s: 0x%lx till 0x%lx\n"
-#: alpha.c:142
+#: alpha.c:141
#, c-format
msgid "[find_call] 0x%lx: jsr%s <indirect_child>\n"
msgstr "[find_call] 0x%lx: jsr%s <indirekt_barn>\n"
-#: alpha.c:152
+#: alpha.c:151
#, c-format
msgid "[find_call] 0x%lx: bsr"
msgstr "[find_call] 0x%lx: bsr"
-#: basic_blocks.c:134 call_graph.c:94 hist.c:98
+#: basic_blocks.c:128 call_graph.c:89 hist.c:97
#, c-format
msgid "%s: %s: unexpected end of file\n"
msgstr "%s: %s: oväntat filslut\n"
-#: basic_blocks.c:202
+#: basic_blocks.c:196
#, c-format
msgid "%s: warning: ignoring basic-block exec counts (use -l or --line)\n"
msgstr "%s: varning: ignorerar exekveringsräkning för grundblock (använd -l eller --line)\n"
#. FIXME: This only works if bfd_vma is unsigned long.
-#: basic_blocks.c:295 basic_blocks.c:305
+#: basic_blocks.c:287 basic_blocks.c:297
#, c-format
msgid "%s:%d: (%s:0x%lx) %lu executions\n"
msgstr "%s:%d: (%s:0x%lx) %lu exekveringar\n"
-#: basic_blocks.c:296 basic_blocks.c:306
+#: basic_blocks.c:288 basic_blocks.c:298
msgid "<unknown>"
msgstr "<okänd>"
-#: basic_blocks.c:553
+#: basic_blocks.c:541
#, c-format
msgid ""
"\n"
@@ -69,7 +71,8 @@
" Rad Antal\n"
"\n"
-#: basic_blocks.c:577
+#: basic_blocks.c:565
+#, c-format
msgid ""
"\n"
"Execution Summary:\n"
@@ -79,22 +82,22 @@
"Exekveringssammanfattning:\n"
"\n"
-#: basic_blocks.c:578
+#: basic_blocks.c:566
#, c-format
msgid "%9ld Executable lines in this file\n"
msgstr "%9ld Exekverbara rader i denna fil\n"
-#: basic_blocks.c:580
+#: basic_blocks.c:568
#, c-format
msgid "%9ld Lines executed\n"
msgstr "%9ld Exekverade rader\n"
-#: basic_blocks.c:581
+#: basic_blocks.c:569
#, c-format
msgid "%9.2f Percent of the file executed\n"
msgstr "%9.2f Procent av filen som exekverats\n"
-#: basic_blocks.c:585
+#: basic_blocks.c:573
#, c-format
msgid ""
"\n"
@@ -103,17 +106,18 @@
"\n"
"%9lu Totala antalet radexekveringar\n"
-#: basic_blocks.c:587
+#: basic_blocks.c:575
#, c-format
msgid "%9.2f Average executions per line\n"
msgstr "%9.2f Medelexekveringar per rad\n"
-#: call_graph.c:71
+#: call_graph.c:68
#, c-format
msgid "[cg_tally] arc from %s to %s traversed %lu times\n"
msgstr "[cg_tally] båge från %s till %s traverserad %lu gånger\n"
#: cg_print.c:73
+#, c-format
msgid ""
"\t\t Call graph (explanation follows)\n"
"\n"
@@ -122,6 +126,7 @@
"\n"
#: cg_print.c:75
+#, c-format
msgid ""
"\t\t\tCall graph\n"
"\n"
@@ -129,7 +134,7 @@
"\t\t\tAnropsgraf\n"
"\n"
-#: cg_print.c:78 hist.c:363
+#: cg_print.c:78 hist.c:359
#, c-format
msgid ""
"\n"
@@ -148,6 +153,7 @@
"\n"
#: cg_print.c:86
+#, c-format
msgid ""
" no time propagated\n"
"\n"
@@ -184,7 +190,7 @@
msgid "descendants"
msgstr "ättlingar"
-#: cg_print.c:98 hist.c:389
+#: cg_print.c:98 hist.c:385
msgid "name"
msgstr "namn"
@@ -197,22 +203,23 @@
msgid "index %% time self children called name\n"
msgstr "index %% tid själv barn anropad namn\n"
-#: cg_print.c:129
+#: cg_print.c:128
#, c-format
msgid " <cycle %d as a whole> [%d]\n"
msgstr " <hela cykel %d> [%d]\n"
-#: cg_print.c:363
+#: cg_print.c:354
#, c-format
msgid "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s <spontaneous>\n"
msgstr "%6.6s %5.5s %7.7s %11.11s %7.7s %7.7s <spontant>\n"
-#: cg_print.c:364
+#: cg_print.c:355
#, c-format
msgid "%6.6s %5.5s %7.7s %7.7s %7.7s %7.7s <spontaneous>\n"
msgstr "%6.6s %5.5s %7.7s %7.7s %7.7s %7.7s <spontant>\n"
-#: cg_print.c:604
+#: cg_print.c:589
+#, c-format
msgid ""
"Index by function name\n"
"\n"
@@ -220,7 +227,7 @@
"Index efter funktionsnamn\n"
"\n"
-#: cg_print.c:661 cg_print.c:670
+#: cg_print.c:646 cg_print.c:655
#, c-format
msgid "<cycle %d>"
msgstr "<cykel %d>"
@@ -245,123 +252,124 @@
msgid "%s: can't find .text section in %s\n"
msgstr "%s: kan inte hitta .text-sektion i %s\n"
-#: corefile.c:225
+#: corefile.c:224
#, c-format
msgid "%s: ran out room for %lu bytes of text space\n"
msgstr "%s: slut på utrymme för %lu byte textutrymme\n"
-#: corefile.c:239
+#: corefile.c:238
#, c-format
msgid "%s: can't do -c\n"
msgstr "%s: kan inte göra -c\n"
-#: corefile.c:276
+#: corefile.c:272
#, c-format
msgid "%s: -c not supported on architecture %s\n"
msgstr "%s: -c stöds inte på arkitekturen %s\n"
-#: corefile.c:447
+#: corefile.c:437
#, c-format
msgid "%s: file `%s' has no symbols\n"
msgstr "%s: filen \"%s\" har inga symboler\n"
-#: corefile.c:758
+#: corefile.c:751
#, c-format
msgid "%s: somebody miscounted: ltab.len=%d instead of %ld\n"
msgstr "%s: någon räknade fel: ltab.len=%d istället för %ld\n"
-#: gmon_io.c:82
+#: gmon_io.c:83
#, c-format
msgid "%s: address size has unexpected value of %u\n"
msgstr "%s: adresstorleken har ett oväntat värde på %u\n"
-#: gmon_io.c:345 gmon_io.c:440
+#: gmon_io.c:317 gmon_io.c:413
#, c-format
msgid "%s: file too short to be a gmon file\n"
msgstr "%s: filen är för kort för att vara en gmon-fil\n"
-#: gmon_io.c:355 gmon_io.c:483
+#: gmon_io.c:327 gmon_io.c:456
#, c-format
msgid "%s: file `%s' has bad magic cookie\n"
msgstr "%s: filen \"%s\" har felaktigt magiskt tal\n"
-#: gmon_io.c:366
+#: gmon_io.c:338
#, c-format
msgid "%s: file `%s' has unsupported version %d\n"
msgstr "%s: filen \"%s\" har version %d som inte stöds\n"
-#: gmon_io.c:396
+#: gmon_io.c:368
#, c-format
msgid "%s: %s: found bad tag %d (file corrupted?)\n"
msgstr "%s: %s: hittade felaktig tagg %d (är filen skadad?)\n"
-#: gmon_io.c:462
+#: gmon_io.c:435
#, c-format
msgid "%s: profiling rate incompatible with first gmon file\n"
msgstr "%s: profileringshastighet är inkompatibel med första gmon-filen\n"
-#: gmon_io.c:510
+#: gmon_io.c:483
#, c-format
msgid "%s: incompatible with first gmon file\n"
msgstr "%s: inkompatibel med första gmon-filen\n"
-#: gmon_io.c:538
+#: gmon_io.c:511
#, c-format
msgid "%s: file '%s' does not appear to be in gmon.out format\n"
msgstr "%s: filen \"%s\" verkar inte vara i gmon.out-format\n"
# Man brukar tala om "bins" i hashtabeller
#
-#: gmon_io.c:559
+#: gmon_io.c:532
#, c-format
msgid "%s: unexpected EOF after reading %d/%d bins\n"
msgstr "%s: oväntat filslut efter läsning av %d/%d poster\n"
-#: gmon_io.c:592
+#: gmon_io.c:565
+#, c-format
msgid "time is in ticks, not seconds\n"
msgstr "tiden är i tick, inte sekunder\n"
-#: gmon_io.c:598 gmon_io.c:775
+#: gmon_io.c:571 gmon_io.c:747
#, c-format
msgid "%s: don't know how to deal with file format %d\n"
msgstr "%s: vet inte hur fileformat %d ska hanteras\n"
-#: gmon_io.c:605
+#: gmon_io.c:578
#, c-format
msgid "File `%s' (version %d) contains:\n"
msgstr "Filen \"%s\" (version %d) innehåller:\n"
-#: gmon_io.c:608
+#: gmon_io.c:581
#, c-format
msgid "\t%d histogram record\n"
msgstr "\t%d histogrampost\n"
-#: gmon_io.c:609
+#: gmon_io.c:582
#, c-format
msgid "\t%d histogram records\n"
msgstr "\t%d histogramposter\n"
-#: gmon_io.c:611
+#: gmon_io.c:584
#, c-format
msgid "\t%d call-graph record\n"
msgstr "\t%d anropsgrafpost\n"
-#: gmon_io.c:612
+#: gmon_io.c:585
#, c-format
msgid "\t%d call-graph records\n"
msgstr "\t%d anropsgrafposter\n"
-#: gmon_io.c:614
+#: gmon_io.c:587
#, c-format
msgid "\t%d basic-block count record\n"
msgstr "\t%d grundblocksräkningspost\n"
-#: gmon_io.c:615
+#: gmon_io.c:588
#, c-format
msgid "\t%d basic-block count records\n"
msgstr "\t%d grundblocksräkningsposter\n"
-#: gprof.c:163
+#: gprof.c:160
#, c-format
msgid ""
"Usage: %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqQZ][name]] [-I dirs]\n"
@@ -392,78 +400,80 @@
"\t[--demangle[=STIL]] [--no-demangle]\n"
"\t[bildfil] [profilfil...]\n"
-#: gprof.c:179
+#: gprof.c:176
#, c-format
msgid "Report bugs to %s\n"
msgstr ""
"Rapportera fel till %s,\n"
"och synpunkter på översättningen till sv at li.org\n"
-#: gprof.c:253
+#: gprof.c:248
#, c-format
msgid "%s: debugging not supported; -d ignored\n"
msgstr "%s: felsökning stöds inte; -d ignorerades\n"
-#: gprof.c:333
+#: gprof.c:328
#, c-format
msgid "%s: unknown file format %s\n"
msgstr "%s: okänt filformat %s\n"
#. This output is intended to follow the GNU standards document.
-#: gprof.c:417
+#: gprof.c:412
#, c-format
msgid "GNU gprof %s\n"
msgstr "GNU gprof %s\n"
-#: gprof.c:418
+#: gprof.c:413
+#, c-format
msgid "Based on BSD gprof, copyright 1983 Regents of the University of California.\n"
msgstr "Baserat på BSD gprof, copyright 1983 Regents of the University of California.\n"
-#: gprof.c:419
+#: gprof.c:414
+#, c-format
msgid "This program is free software. This program has absolutely no warranty.\n"
msgstr "Detta program är fri programvara. Detta program har ingen som helst garanti.\n"
-#: gprof.c:460
+#: gprof.c:455
#, c-format
msgid "%s: unknown demangling style `%s'\n"
msgstr "%s: okänd avmanglingsstil \"%s\"\n"
-#: gprof.c:480
+#: gprof.c:475
#, c-format
msgid "%s: Only one of --function-ordering and --file-ordering may be specified.\n"
msgstr "%s: Endast en av --function-ordering och --file-ordering kan anges.\n"
-#: gprof.c:578
+#: gprof.c:525
#, c-format
msgid "%s: sorry, file format `prof' is not yet supported\n"
msgstr "%s: tyvärr, filformatet \"prof\" stöds inte än\n"
-#: gprof.c:639
+#: gprof.c:574
#, c-format
msgid "%s: gmon.out file is missing histogram\n"
msgstr "%s: gmon.out-filen saknar histogram\n"
-#: gprof.c:646
+#: gprof.c:581
#, c-format
msgid "%s: gmon.out file is missing call-graph data\n"
msgstr "%s: gmon.out-filen saknar anropsgrafdata\n"
-#: hist.c:127
+#: hist.c:126
#, c-format
msgid "%s: `%s' is incompatible with first gmon file\n"
msgstr "%s: \"%s\" är inkompatibel med första gmon-filen\n"
-#: hist.c:143
+#: hist.c:142
#, c-format
-msgid "%s: %s: unexpected EOF after reading %d of %d samples\n"
-msgstr "%s: %s: oväntat filslut efter läsning av %d av %d stickprov\n"
+msgid "%s: %s: unexpected EOF after reading %u of %u samples\n"
+msgstr "%s: %s: oväntat filslut efter läsning av %u av %u stickprov\n"
-#: hist.c:359
+#: hist.c:355
#, c-format
msgid "%c%c/call"
msgstr "%c%c/anrop"
-#: hist.c:367
+#: hist.c:363
#, c-format
msgid ""
" for %.2f%% of %.2f %s\n"
@@ -472,7 +482,7 @@
" för %.2f%% av %.2f %s\n"
"\n"
-#: hist.c:373
+#: hist.c:369
#, c-format
msgid ""
"\n"
@@ -481,7 +491,8 @@
"\n"
"Varje stickprov räknas som %g %s.\n"
-#: hist.c:378
+#: hist.c:374
+#, c-format
msgid ""
" no time accumulated\n"
"\n"
@@ -489,27 +500,28 @@
" ingen ackumulerad tid\n"
"\n"
-#: hist.c:385
+#: hist.c:381
msgid "cumulative"
msgstr "kumulativ"
-#: hist.c:385
+#: hist.c:381
msgid "self "
msgstr "själv"
-#: hist.c:385
+#: hist.c:381
msgid "total "
msgstr "totalt"
-#: hist.c:388
+#: hist.c:384
msgid "time"
msgstr "tid"
-#: hist.c:388
+#: hist.c:384
msgid "calls"
msgstr "anrop"
-#: hist.c:481
+#: hist.c:473
+#, c-format
msgid ""
"\n"
"\n"
@@ -521,31 +533,32 @@
"\n"
"platt profil:\n"
-#: hist.c:487
+#: hist.c:479
+#, c-format
msgid "Flat profile:\n"
msgstr "Platt profil:\n"
-#: mips.c:85
+#: mips.c:82
#, c-format
msgid "[find_call] 0x%lx: jal"
msgstr "[find_call] 0x%lx: jal"
-#: mips.c:110
+#: mips.c:107
#, c-format
msgid "[find_call] 0x%lx: jalr\n"
msgstr "[find_call] 0x%lx: jalr\n"
-#: source.c:166
+#: source.c:162
#, c-format
msgid "%s: could not locate `%s'\n"
msgstr "%s: kunde inte hitta \"%s\"\n"
-#: source.c:241
+#: source.c:237
#, c-format
msgid "*** File %s:\n"
msgstr "*** Fil %s:\n"
-#: utils.c:109
+#: utils.c:107
#, c-format
msgid " <cycle %d>"
msgstr " <cykel %d>"
Modified: branches/binutils/package/include/ChangeLog
===================================================================
--- branches/binutils/package/include/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,55 @@
+2006-04-11 Jim Blandy <jimb at codesourcery.com>
+
+ * libiberty.h (pex_input_file, pex_input_pipe): New declarations.
+
+2006-04-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * bfdlink.h (bfd_link_info): Replace need_relax_finalize with
+ relax_pass.
+
+2006-03-25 Bernd Schmidt <bernd.schmidt at analog.com>
+
+ * elf/bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,
+ R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI,
+ R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE,
+ R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI,
+ R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI,
+ R_BFIN_GOTOFFLO): New relocs.
+ (EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
+
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
+
+ * dis-asm.h (print_insn_xc16c): New prototype.
+
+2006-02-06 Steve Ellcey <sje at cup.hp.com>
+
+ * elf/ia64.h (SHF_IA_64_HP_TLS): New.
+
+2006-01-18 DJ Delorie <dj at redhat.com>
+
+ * md5.h: Include ansidecl.h
+
+2006-01-17 Andreas Schwab <schwab at suse.de>
+
+ PR binutils/1486
+ * dis-asm.h (struct disassemble_info): Add
+ disassembler_needs_relocs.
+
+2006-01-09 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-config.h (XCHAL_HAVE_MUL32_HIGH): Define.
+
+2005-12-30 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-config.h (XCHAL_HAVE_WIDE_BRANCHES): New.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * dis-asm.h (print_insn_mt): Renamed.
+
2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
* elf/mt.h: Renamed from ms1.h
Modified: branches/binutils/package/include/bfdlink.h
===================================================================
--- branches/binutils/package/include/bfdlink.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/bfdlink.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -301,9 +301,6 @@
/* TRUE if global symbols in discarded sections should be stripped. */
unsigned int strip_discarded: 1;
- /* TRUE if the final relax pass is needed. */
- unsigned int need_relax_finalize: 1;
-
/* TRUE if generating a position independent executable. */
unsigned int pie: 1;
@@ -398,6 +395,12 @@
unloaded. */
const char *fini_function;
+ /* Number of relaxation passes. Usually only one relaxation pass
+ is needed. But a backend can have as many relaxation passes as
+ necessary. During bfd_relax_section call, it is set to the
+ current pass, starting from 0. */
+ int relax_pass;
+
/* Non-zero if auto-import thunks for DATA items in pei386 DLLs
should be generated/linked against. Set to 1 if this feature
is explicitly requested by the user, -1 if enabled by default. */
Modified: branches/binutils/package/include/coff/ChangeLog
===================================================================
--- branches/binutils/package/include/coff/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/coff/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,7 @@
+2006-02-05 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * internal.h: Add relocation number R_IMM24 for Z80.
+
2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
* internal.h: Add relocation number for Z80
Modified: branches/binutils/package/include/coff/internal.h
===================================================================
--- branches/binutils/package/include/coff/internal.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/coff/internal.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -717,6 +717,7 @@
/* Z80 modes */
#define R_OFF8 0x32 /* 8 bit signed abs, for (i[xy]+d) */
+#define R_IMM24 0x33 /* 24 bit abs */
/* R_JR, R_IMM8, R_IMM16, R_IMM32 - as for Z8k */
/* H8500 modes */
Modified: branches/binutils/package/include/dis-asm.h
===================================================================
--- branches/binutils/package/include/dis-asm.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/dis-asm.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,7 +2,7 @@
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
-
+
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
@@ -17,7 +17,7 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA.
-
+
Written by Cygnus Support, 1993.
The opcode library (libopcodes.a) provides instruction decoders for
@@ -48,7 +48,7 @@
dis_dref2 /* Two data references in instruction */
};
-/* This struct is passed into the instruction decoding routine,
+/* This struct is passed into the instruction decoding routine,
and is passed back out into each callback. The various fields are used
for conveying information from your main routine into your callbacks,
for passing information into the instruction decoders (such as the
@@ -136,7 +136,7 @@
displaying debugging outout. */
bfd_boolean (* symbol_is_valid)
(asymbol *, struct disassemble_info * info);
-
+
/* These are for buffer_read_memory. */
bfd_byte *buffer;
bfd_vma buffer_vma;
@@ -156,7 +156,7 @@
int bytes_per_chunk;
enum bfd_endian display_endian;
- /* Number of octets per incremented target address
+ /* Number of octets per incremented target address
Normally one, but some DSPs have byte sizes of 16 or 32 bits. */
unsigned int octets_per_byte;
@@ -172,6 +172,9 @@
alignment. */
unsigned int skip_zeroes_at_end;
+ /* Whether the disassembler always needs the relocations. */
+ bfd_boolean disassembler_needs_relocs;
+
/* Results from instruction decoders. Not all decoders yet support
this information. This info is set each time an instruction is
decoded, and is only valid for the last such instruction.
@@ -237,7 +240,7 @@
extern int print_insn_mmix (bfd_vma, disassemble_info *);
extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
-extern int print_insn_ms1 (bfd_vma, disassemble_info *);
+extern int print_insn_mt (bfd_vma, disassemble_info *);
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
extern int print_insn_crx (bfd_vma, disassemble_info *);
@@ -249,7 +252,7 @@
extern int print_insn_big_powerpc (bfd_vma, disassemble_info *);
extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
extern int print_insn_rs6000 (bfd_vma, disassemble_info *);
-extern int print_insn_s390 (bfd_vma, disassemble_info *);
+extern int print_insn_s390 (bfd_vma, disassemble_info *);
extern int print_insn_sh (bfd_vma, disassemble_info *);
extern int print_insn_tic30 (bfd_vma, disassemble_info *);
extern int print_insn_tic4x (bfd_vma, disassemble_info *);
@@ -264,6 +267,7 @@
extern int print_insn_sh64x_media (bfd_vma, disassemble_info *);
extern int print_insn_frv (bfd_vma, disassemble_info *);
extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
+extern int print_insn_xc16x (bfd_vma, disassemble_info *);
extern int print_insn_m32c (bfd_vma, disassemble_info *);
extern disassembler_ftype arc_get_disassembler (void *);
@@ -312,10 +316,10 @@
extern int generic_symbol_at_address
(bfd_vma, struct disassemble_info *);
-/* Also always true. */
+/* Also always true. */
extern bfd_boolean generic_symbol_is_valid
(asymbol *, struct disassemble_info *);
-
+
/* Method to initialize a disassemble_info struct. This should be
called by all applications creating such a struct. */
extern void init_disassemble_info (struct disassemble_info *info, void *stream,
Modified: branches/binutils/package/include/elf/ChangeLog
===================================================================
--- branches/binutils/package/include/elf/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,111 @@
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
+
+ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
+
+2006-03-19 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hppa.h (SHF_HP_TLS, SHF_HP_NEAR_SHARED, SHF_HP_FAR_SHARED,
+ SHF_HP_COMDAT, SHF_HP_CONST, SHN_TLS_COMMON, SHN_NS_COMMON,
+ SHN_NS_UNDEF, SHN_FS_UNDEF, SHN_HP_EXTERN, SHN_HP_EXTHINT,
+ SHN_HP_UNDEF_BIND_IMM, SHT_HP_OVLBITS, SHT_HP_DLKM, SHT_HP_COMDAT,
+ SHT_HP_OBJDICT, SHT_HP_ANNOT, STB_HP_ALIAS): Define.
+
+2006-03-10 Paul Brook <paul at codesourcery.com>
+
+ * arm.h (EF_ARM_EABI_VER5): Define.
+
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
+
+ * m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A,
+ EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust.
+ (EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New.
+ (EF_M68K_HW_DIV, EF_M68K_USP): Remove.
+ (EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust.
+ (EF_M68K_EMAC_B): New.
+
+2006-03-03 Bjoern Haase <bjoern.m.haase at web.de>
+
+ * avr.h (R_AVR_MS8_LDI,R_AVR_MS8_LDI_NEG): Add.
+ (EF_AVR_LINKRELAX_PREPARED): Add.
+
+2006-03-02 Ben Elliston <bje at au.ibm.com>
+
+ Import from the GCC tree:
+ 2006-03-01 Jakub Jelinek <jakub at redhat.com>
+
+ * dwarf2.h (DW_TAG_condition, DW_TAG_shared_type): New constants
+ from DWARF 3.
+ (DW_AT_description, DW_AT_binary_scale, DW_AT_decimal_scale,
+ DW_AT_small, DW_AT_decimal_sign, DW_AT_digit_count,
+ DW_AT_picture_string, DW_AT_mutable, DW_AT_threads_scaled,
+ DW_AT_explicit, DW_AT_object_pointer, DW_AT_endianity,
+ DW_AT_elemental, DW_AT_pure, DW_AT_recursive): New.
+ (DW_OP_form_tls_address, DW_OP_call_frame_cfa, DW_OP_bit_piece): New.
+ (DW_ATE_packed_decimal, DW_ATE_numeric_string, DW_ATE_edited,
+ DW_ATE_signed_fixed, DW_ATE_unsigned_fixed): New.
+ (DW_DS_unsigned, DW_DS_leading_overpunch, DW_DS_trailing_overpunch,
+ DW_DS_leading_separate, DW_DS_trailing_separate): New.
+ (DW_END_default, DW_END_big, DW_END_little): New.
+ (DW_END_lo_user, DW_END_hi_user): Define.
+ (DW_LNE_lo_user, DW_LNE_hi_user): Define.
+ (DW_CFA_val_offset, DW_CFA_val_offset_sf, DW_CFA_val_expression): New.
+ (DW_LANG_PLI, DW_LANG_ObjC, DW_LANG_ObjC_plus_plus, DW_LANG_UPC,
+ DW_LANG_D): New.
+
+2006-02-24 DJ Delorie <dj at redhat.com>
+
+ * m32c.h: Add relax relocs.
+
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
+
+ * common.h (EM_XC16X): New entry for xc16x cpu.
+ Sort other EM_* numbers into numerical order.
+ * xc16x.h: New file.
+
+2006-02-10 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR binutils/2258
+ * internal.h (ELF_IS_SECTION_IN_SEGMENT_FILE): New.
+ (ELF_IS_SECTION_IN_SEGMENT_MEMORY): Likewise.
+
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
+
+ * m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
+ (EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
+ (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
+ EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
+ EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
+
+2006-02-06 Steve Ellcey <sje at cup.hp.com>
+
+ * ia64.h (SHF_IA_64_HP_TLS): New.
+
+2006-01-18 Alexandre Oliva <aoliva at redhat.com>
+
+ Introduce TLS descriptors for i386 and x86_64.
+ * common.h (DT_TLSDESC_GOT, DT_TLSDESC_PLT): New.
+ * i386.h (R_386_TLS_GOTDESC, R_386_TLS_DESC_CALL, R_386_TLS_DESC):
+ New.
+ * x86-64.h (R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC_CALL,
+ R_X86_64_TLSDESC): New.
+
+2006-01-09 Mike Frysinger <vapier at gentoo.org>:
+
+ * common.h (EM_ALTERA_NIOS2, EM_NIOS32) Define.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * common.h (EM_MT): Renamed.
+ * mt.h: Rename relocs, cpu & other defines.
+
2005-12-12 Paul Brook <paul at codesourcery.com>
* arm.h (elf32_arm_get_eabi_attr_int): Add prototype.
Modified: branches/binutils/package/include/elf/arm.h
===================================================================
--- branches/binutils/package/include/elf/arm.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/arm.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -56,6 +56,7 @@
#define EF_ARM_EABI_VER2 0x02000000
#define EF_ARM_EABI_VER3 0x03000000
#define EF_ARM_EABI_VER4 0x04000000
+#define EF_ARM_EABI_VER5 0x05000000
/* Local aliases for some flags to match names used by COFF port. */
#define F_INTERWORK EF_ARM_INTERWORK
Modified: branches/binutils/package/include/elf/avr.h
===================================================================
--- branches/binutils/package/include/elf/avr.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/avr.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -26,6 +26,10 @@
/* Processor specific flags for the ELF header e_flags field. */
#define EF_AVR_MACH 0xf
+/* If bit #7 is set, it is assumed that the elf file uses local symbols
+ as reference for the relocations so that linker relaxation is possible. */
+#define EF_AVR_LINKRELAX_PREPARED 0x80
+
#define E_AVR_MACH_AVR1 1
#define E_AVR_MACH_AVR2 2
#define E_AVR_MACH_AVR3 3
@@ -56,6 +60,8 @@
RELOC_NUMBER (R_AVR_LDI, 19)
RELOC_NUMBER (R_AVR_6, 20)
RELOC_NUMBER (R_AVR_6_ADIW, 21)
+ RELOC_NUMBER (R_AVR_MS8_LDI, 22)
+ RELOC_NUMBER (R_AVR_MS8_LDI_NEG, 23)
END_RELOC_NUMBERS (R_AVR_max)
#endif /* _ELF_AVR_H */
Modified: branches/binutils/package/include/elf/bfin.h
===================================================================
--- branches/binutils/package/include/elf/bfin.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/bfin.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -43,6 +43,21 @@
RELOC_NUMBER (R_byte2_data, 0x11) /* 0x11, 0x00) .byte2 var = symbol */
RELOC_NUMBER (R_byte4_data, 0x12) /* 0x12, 0x00) .byte4 var = symbol and .var var=symbol */
RELOC_NUMBER (R_pcrel11, 0x13) /* 0x13, 0x00) lsetup part b */
+ RELOC_NUMBER (R_BFIN_GOT17M4, 0x14)
+ RELOC_NUMBER (R_BFIN_GOTHI, 0x15)
+ RELOC_NUMBER (R_BFIN_GOTLO, 0x16)
+ RELOC_NUMBER (R_BFIN_FUNCDESC, 0x17)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOT17M4, 0x18)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOTHI, 0x19)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOTLO, 0x1a)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_VALUE, 0x1b)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOTOFF17M4, 0x1c)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOTOFFHI, 0x1d)
+ RELOC_NUMBER (R_BFIN_FUNCDESC_GOTOFFLO, 0x1e)
+ RELOC_NUMBER (R_BFIN_GOTOFF17M4, 0x1f)
+ RELOC_NUMBER (R_BFIN_GOTOFFHI, 0x20)
+ RELOC_NUMBER (R_BFIN_GOTOFFLO, 0x21)
+
RELOC_NUMBER (R_push, 0xE0)
RELOC_NUMBER (R_const, 0xE1)
RELOC_NUMBER (R_add, 0xE2)
@@ -69,4 +84,9 @@
RELOC_NUMBER (R_BFIN_GNU_VTENTRY, 0x43) /* C++, gnu only */
END_RELOC_NUMBERS (R_max)
+/* Processor specific flags for the ELF header e_flags field. */
+#define EF_BFIN_PIC 0x00000001 /* -fpic */
+#define EF_BFIN_FDPIC 0x00000002 /* -mfdpic */
+
+#define EF_BFIN_PIC_FLAGS (EF_BFIN_PIC | EF_BFIN_FDPIC)
#endif /* _ELF_BFIN_H */
Modified: branches/binutils/package/include/elf/common.h
===================================================================
--- branches/binutils/package/include/elf/common.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/common.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* ELF support for BFD.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004
+ 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Fred Fish @ Cygnus Support, from information published
@@ -183,6 +183,7 @@
#define EM_CR 103 /* National Semiconductor CompactRISC */
#define EM_MSP430 105 /* TI msp430 micro controller */
#define EM_BLACKFIN 106 /* ADI Blackfin */
+#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
#define EM_CRX 114 /* National Semiconductor CRX */
/* If it is necessary to assign new unofficial EM_* values, please pick large
@@ -197,81 +198,85 @@
unofficial e_machine number should eventually ask registry at caldera.com for
an officially blessed number to be added to the list above. */
-#define EM_PJ_OLD 99 /* picoJava */
+/* Old version of Sparc v9, from before the ABI;
+ This should be removed shortly. */
+#define EM_OLD_SPARCV9 11
-/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
-#define EM_CYGNUS_POWERPC 0x9025
+/* Old version of PowerPC, this should be removed shortly. */
+#define EM_PPC_OLD 17
-/* Old version of Sparc v9, from before the ABI; this should be
- removed shortly. */
-#define EM_OLD_SPARCV9 11
+/* picoJava */
+#define EM_PJ_OLD 99
-/* Old version of PowerPC, this should be removed shortly. */
-#define EM_PPC_OLD 17
+/* AVR magic number. Written in the absense of an ABI. */
+#define EM_AVR_OLD 0x1057
-/* (Deprecated) Temporary number for the OpenRISC processor. */
-#define EM_OR32 0x8472
+/* MSP430 magic number. Written in the absense of everything. */
+#define EM_MSP430_OLD 0x1059
-/* Renesas M32C and M16C. */
-#define EM_M32C 0xFEB0
+/* Morpho MT. Written in the absense of an ABI. */
+#define EM_MT 0x2530
-/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
-#define EM_CYGNUS_M32R 0x9041
+/* FR30 magic number - no EABI available. */
+#define EM_CYGNUS_FR30 0x3330
-/* Alpha backend magic number. Written in the absence of an ABI. */
-#define EM_ALPHA 0x9026
+/* OpenRISC magic number. Written in the absense of an ABI. */
+#define EM_OPENRISC_OLD 0x3426
-/* old S/390 backend magic number. Written in the absence of an ABI. */
-#define EM_S390_OLD 0xa390
+/* DLX magic number. Written in the absense of an ABI. */
+#define EM_DLX 0x5aa5
+/* FRV magic number - no EABI available??. */
+#define EM_CYGNUS_FRV 0x5441
+
+/* Infineon Technologies 16-bit microcontroller with C166-V2 core. */
+#define EM_XC16X 0x4688
+
/* D10V backend magic number. Written in the absence of an ABI. */
-#define EM_CYGNUS_D10V 0x7650
+#define EM_CYGNUS_D10V 0x7650
/* D30V backend magic number. Written in the absence of an ABI. */
-#define EM_CYGNUS_D30V 0x7676
+#define EM_CYGNUS_D30V 0x7676
-/* V850 backend magic number. Written in the absense of an ABI. */
-#define EM_CYGNUS_V850 0x9080
+/* Ubicom IP2xxx; Written in the absense of an ABI. */
+#define EM_IP2K_OLD 0x8217
-/* mn10200 and mn10300 backend magic numbers.
- Written in the absense of an ABI. */
-#define EM_CYGNUS_MN10200 0xdead
-#define EM_CYGNUS_MN10300 0xbeef
+/* (Deprecated) Temporary number for the OpenRISC processor. */
+#define EM_OR32 0x8472
-/* FR30 magic number - no EABI available. */
-#define EM_CYGNUS_FR30 0x3330
+/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_POWERPC 0x9025
-/* AVR magic number
- Written in the absense of an ABI. */
-#define EM_AVR_OLD 0x1057
+/* Alpha backend magic number. Written in the absence of an ABI. */
+#define EM_ALPHA 0x9026
-/* OpenRISC magic number
- Written in the absense of an ABI. */
-#define EM_OPENRISC_OLD 0x3426
+/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_M32R 0x9041
-/* DLX magic number
- Written in the absense of an ABI. */
-#define EM_DLX 0x5aa5
+/* V850 backend magic number. Written in the absense of an ABI. */
+#define EM_CYGNUS_V850 0x9080
-#define EM_XSTORMY16 0xad45
+/* old S/390 backend magic number. Written in the absence of an ABI. */
+#define EM_S390_OLD 0xa390
-/* FRV magic number - no EABI available??. */
-#define EM_CYGNUS_FRV 0x5441
+/* Old, unofficial value for Xtensa. */
+#define EM_XTENSA_OLD 0xabc7
-/* Ubicom IP2xxx; no ABI */
-#define EM_IP2K_OLD 0x8217
+#define EM_XSTORMY16 0xad45
-#define EM_MS1 0x2530 /* Morpho MS1; no ABI */
+/* mn10200 and mn10300 backend magic numbers.
+ Written in the absense of an ABI. */
+#define EM_CYGNUS_MN10300 0xbeef
+#define EM_CYGNUS_MN10200 0xdead
-/* MSP430 magic number
- Written in the absense everything. */
-#define EM_MSP430_OLD 0x1059
+/* Renesas M32C and M16C. */
+#define EM_M32C 0xFEB0
/* Vitesse IQ2000. */
#define EM_IQ2000 0xFEBA
-/* Old, unofficial value for Xtensa. */
-#define EM_XTENSA_OLD 0xabc7
+/* NIOS magic number - no EABI available. */
+#define EM_NIOS32 0xFEBB
/* See the above comment before you add a new EM_* value here. */
@@ -572,6 +577,8 @@
#define DT_VALRNGHI 0x6ffffdff
#define DT_ADDRRNGLO 0x6ffffe00
+#define DT_TLSDESC_PLT 0x6ffffef6
+#define DT_TLSDESC_GOT 0x6ffffef7
#define DT_GNU_CONFLICT 0x6ffffef8
#define DT_GNU_LIBLIST 0x6ffffef9
#define DT_CONFIG 0x6ffffefa
Modified: branches/binutils/package/include/elf/dwarf2.h
===================================================================
--- branches/binutils/package/include/elf/dwarf2.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/dwarf2.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,7 +1,7 @@
-/* Declarations and definitions of codes relating to the DWARF2 symbolic
- debugging information format.
+/* Declarations and definitions of codes relating to the DWARF2 and
+ DWARF3 symbolic debugging information formats.
Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002,
- 2003, 2005 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Gary Funck (gary at intrepid.com) The Ada Joint Program
Office (AJPO), Florida State University and Silicon Graphics Inc.
@@ -187,6 +187,8 @@
DW_TAG_unspecified_type = 0x3b,
DW_TAG_partial_unit = 0x3c,
DW_TAG_imported_unit = 0x3d,
+ DW_TAG_condition = 0x3f,
+ DW_TAG_shared_type = 0x40,
/* SGI/MIPS Extensions. */
DW_TAG_MIPS_loop = 0x4081,
/* HP extensions. See: ftp://ftp.hp.com/pub/lang/tools/WDB/wdb-4.0.tar.gz . */
@@ -317,6 +319,21 @@
DW_AT_call_column = 0x57,
DW_AT_call_file = 0x58,
DW_AT_call_line = 0x59,
+ DW_AT_description = 0x5a,
+ DW_AT_binary_scale = 0x5b,
+ DW_AT_decimal_scale = 0x5c,
+ DW_AT_small = 0x5d,
+ DW_AT_decimal_sign = 0x5e,
+ DW_AT_digit_count = 0x5f,
+ DW_AT_picture_string = 0x60,
+ DW_AT_mutable = 0x61,
+ DW_AT_threads_scaled = 0x62,
+ DW_AT_explicit = 0x63,
+ DW_AT_object_pointer = 0x64,
+ DW_AT_endianity = 0x65,
+ DW_AT_elemental = 0x66,
+ DW_AT_pure = 0x67,
+ DW_AT_recursive = 0x68,
/* SGI/MIPS extensions. */
DW_AT_MIPS_fde = 0x2001,
DW_AT_MIPS_loop_begin = 0x2002,
@@ -518,6 +535,9 @@
DW_OP_call2 = 0x98,
DW_OP_call4 = 0x99,
DW_OP_call_ref = 0x9a,
+ DW_OP_form_tls_address = 0x9b,
+ DW_OP_call_frame_cfa = 0x9c,
+ DW_OP_bit_piece = 0x9d,
/* GNU extensions. */
DW_OP_GNU_push_tls_address = 0xe0,
/* HP extensions. */
@@ -547,6 +567,11 @@
DW_ATE_unsigned_char = 0x8,
/* DWARF 3. */
DW_ATE_imaginary_float = 0x9,
+ DW_ATE_packed_decimal = 0xa,
+ DW_ATE_numeric_string = 0xb,
+ DW_ATE_edited = 0xc,
+ DW_ATE_signed_fixed = 0xd,
+ DW_ATE_unsigned_fixed = 0xe,
DW_ATE_decimal_float = 0xf,
/* HP extensions. */
DW_ATE_HP_float80 = 0x80, /* Floating-point (80 bit). */
@@ -561,6 +586,29 @@
#define DW_ATE_lo_user 0x80
#define DW_ATE_hi_user 0xff
+/* Decimal sign encodings. */
+enum dwarf_decimal_sign_encoding
+ {
+ /* DWARF 3. */
+ DW_DS_unsigned = 0x01,
+ DW_DS_leading_overpunch = 0x02,
+ DW_DS_trailing_overpunch = 0x03,
+ DW_DS_leading_separate = 0x04,
+ DW_DS_trailing_separate = 0x05
+ };
+
+/* Endianity encodings. */
+enum dwarf_endianity_encoding
+ {
+ /* DWARF 3. */
+ DW_END_default = 0x00,
+ DW_END_big = 0x01,
+ DW_END_little = 0x02
+ };
+
+#define DW_END_lo_user 0x40
+#define DW_END_hi_user 0xff
+
/* Array ordering names and codes. */
enum dwarf_array_dim_ordering
{
@@ -667,6 +715,9 @@
DW_LNE_HP_define_proc = 0x20
};
+#define DW_LNE_lo_user 0x80
+#define DW_LNE_hi_user 0xff
+
/* Call frame information. */
enum dwarf_call_frame_info
{
@@ -694,6 +745,9 @@
DW_CFA_offset_extended_sf = 0x11,
DW_CFA_def_cfa_sf = 0x12,
DW_CFA_def_cfa_offset_sf = 0x13,
+ DW_CFA_val_offset = 0x14,
+ DW_CFA_val_offset_sf = 0x15,
+ DW_CFA_val_expression = 0x16,
/* SGI/MIPS specific. */
DW_CFA_MIPS_advance_loc8 = 0x1d,
/* GNU extensions. */
@@ -727,11 +781,16 @@
DW_LANG_Fortran90 = 0x0008,
DW_LANG_Pascal83 = 0x0009,
DW_LANG_Modula2 = 0x000a,
+ /* DWARF 3. */
DW_LANG_Java = 0x000b,
- /* DWARF 3. */
DW_LANG_C99 = 0x000c,
DW_LANG_Ada95 = 0x000d,
DW_LANG_Fortran95 = 0x000e,
+ DW_LANG_PLI = 0x000f,
+ DW_LANG_ObjC = 0x0010,
+ DW_LANG_ObjC_plus_plus = 0x0011,
+ DW_LANG_UPC = 0x0012,
+ DW_LANG_D = 0x0013,
/* MIPS. */
DW_LANG_Mips_Assembler = 0x8001,
/* UPC. */
Modified: branches/binutils/package/include/elf/hppa.h
===================================================================
--- branches/binutils/package/include/elf/hppa.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/hppa.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -490,6 +490,30 @@
#define PT_PARISC_UNWIND 0x70000001
#define PT_PARISC_WEAKORDER 0x70000002
+/* Flag bits in sh_flags of ElfXX_Shdr. */
+#define SHF_HP_TLS 0x01000000
+#define SHF_HP_NEAR_SHARED 0x02000000
+#define SHF_HP_FAR_SHARED 0x04000000
+#define SHF_HP_COMDAT 0x08000000
+#define SHF_HP_CONST 0x00800000
+
+/* Reserved section header indices. */
+#define SHN_TLS_COMMON (SHN_LOOS + 0x0)
+#define SHN_NS_COMMON (SHN_LOOS + 0x1)
+#define SHN_FS_COMMON (SHN_LOOS + 0x2)
+#define SHN_NS_UNDEF (SHN_LOOS + 0x3)
+#define SHN_FS_UNDEF (SHN_LOOS + 0x4)
+#define SHN_HP_EXTERN (SHN_LOOS + 0x5)
+#define SHN_HP_EXTHINT (SHN_LOOS + 0x6)
+#define SHN_HP_UNDEF_BIND_IMM (SHN_LOOS + 0x7)
+
+/* Values of sh_type in ElfXX_Shdr. */
+#define SHT_HP_OVLBITS (SHT_LOOS + 0x0)
+#define SHT_HP_DLKM (SHT_LOOS + 0x1)
+#define SHT_HP_COMDAT (SHT_LOOS + 0x2)
+#define SHT_HP_OBJDICT (SHT_LOOS + 0x3)
+#define SHT_HP_ANNOT (SHT_LOOS + 0x4)
+
/* Flag bits in p_flags of ElfXX_Phdr. */
#define PF_HP_CODE 0x00040000
#define PF_HP_MODIFY 0x00080000
@@ -571,6 +595,9 @@
#define PT_HP_STACK (PT_LOOS + 0x14)
#define PT_HP_CORE_UTSNAME (PT_LOOS + 0x15)
+/* Binding information. */
+#define STB_HP_ALIAS (STB_LOOS + 0x0)
+
/* Additional symbol types. */
#define STT_HP_OPAQUE (STT_LOOS + 0x1)
#define STT_HP_STUB (STT_LOOS + 0x2)
Modified: branches/binutils/package/include/elf/i386.h
===================================================================
--- branches/binutils/package/include/elf/i386.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/i386.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* ix86 ELF support for BFD.
- Copyright 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -61,6 +62,10 @@
RELOC_NUMBER (R_386_TLS_DTPMOD32, 35)
RELOC_NUMBER (R_386_TLS_DTPOFF32, 36)
RELOC_NUMBER (R_386_TLS_TPOFF32, 37)
+/* 38 */
+ RELOC_NUMBER (R_386_TLS_GOTDESC, 39)
+ RELOC_NUMBER (R_386_TLS_DESC_CALL,40)
+ RELOC_NUMBER (R_386_TLS_DESC, 41)
/* Used by Intel. */
RELOC_NUMBER (R_386_USED_BY_INTEL_200, 200)
Modified: branches/binutils/package/include/elf/ia64.h
===================================================================
--- branches/binutils/package/include/elf/ia64.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/ia64.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -57,6 +57,8 @@
#define SHF_IA_64_SHORT 0x10000000 /* Section near gp. */
#define SHF_IA_64_NORECOV 0x20000000 /* Spec insns w/o recovery. */
+#define SHF_IA_64_HP_TLS 0x01000000 /* HP specific TLS flag. */
+
/* Possible values for sh_type in Elf64_Shdr: */
#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* Extension bits. */
Modified: branches/binutils/package/include/elf/internal.h
===================================================================
--- branches/binutils/package/include/elf/internal.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/internal.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -251,4 +251,29 @@
asection *sections[1];
};
+/* Decide if the given sec_hdr is in the given segment in file. */
+#define ELF_IS_SECTION_IN_SEGMENT_FILE(sec_hdr, segment) \
+ (sec_hdr->sh_size > 0 \
+ /* PT_TLS segment contains only SHF_TLS sections. */ \
+ && (segment->p_type != PT_TLS \
+ || (sec_hdr->sh_flags & SHF_TLS) != 0) \
+ /* Compare allocated sec_hdrs by VMA, unallocated sec_hdrs \
+ by file offset. */ \
+ && (sec_hdr->sh_flags & SHF_ALLOC \
+ ? (sec_hdr->sh_addr >= segment->p_vaddr \
+ && sec_hdr->sh_addr + sec_hdr->sh_size \
+ <= segment->p_vaddr + segment->p_memsz) \
+ : ((bfd_vma) sec_hdr->sh_offset >= segment->p_offset \
+ && (sec_hdr->sh_offset + sec_hdr->sh_size \
+ <= segment->p_offset + segment->p_filesz))))
+
+/* Decide if the given sec_hdr is in the given segment in memory. */
+#define ELF_IS_SECTION_IN_SEGMENT_MEMORY(sec_hdr, segment) \
+ (ELF_IS_SECTION_IN_SEGMENT_FILE (sec_hdr, segment) \
+ /* .tbss is special. It doesn't contribute memory space to \
+ normal segments. */ \
+ && (!((sec_hdr->sh_flags & SHF_TLS) != 0 \
+ && sec_hdr->sh_type == SHT_NOBITS) \
+ || segment->p_type == PT_TLS))
+
#endif /* _ELF_INTERNAL_H */
Modified: branches/binutils/package/include/elf/m32c.h
===================================================================
--- branches/binutils/package/include/elf/m32c.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/m32c.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -40,6 +40,14 @@
/* Bits 16..31 of an address, for LDE's A1A0 etc. */
RELOC_NUMBER (R_M32C_HI16, 9)
+ /* These are relocs we need when relaxing. */
+ /* Marks various jump opcodes. */
+ RELOC_NUMBER (R_M32C_RL_JUMP, 10)
+ /* Marks standard one-address form. */
+ RELOC_NUMBER (R_M32C_RL_1ADDR, 11)
+ /* Marks standard two-address form. */
+ RELOC_NUMBER (R_M32C_RL_2ADDR, 12)
+
END_RELOC_NUMBERS (R_M32C_max)
#define EF_M32C_CPU_M16C 0x00000075 /* default */
Modified: branches/binutils/package/include/elf/m68k.h
===================================================================
--- branches/binutils/package/include/elf/m68k.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/m68k.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* MC68k ELF support for BFD.
- Copyright 1998, 1999, 2000, 2002, 2005 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2005, 2006 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -52,8 +52,24 @@
RELOC_NUMBER (R_68K_GNU_VTENTRY, 24)
END_RELOC_NUMBERS (R_68K_max)
-#define EF_CPU32 0x00810000
-#define EF_M68000 0x01000000
-#define EF_CFV4E 0x00008000
+#define EF_M68K_CPU32 0x00810000
+#define EF_M68K_M68000 0x01000000
+#define EF_M68K_CFV4E 0x00008000
+/* We use the bottom 8 bits to encode information about the
+ coldfire variant. */
+#define EF_M68K_ISA_MASK 0x0F /* Which ISA */
+#define EF_M68K_ISA_A_NODIV 0x01 /* ISA A except for div */
+#define EF_M68K_ISA_A 0x02
+#define EF_M68K_ISA_A_PLUS 0x03
+#define EF_M68K_ISA_B_NOUSP 0x04 /* ISA_B except for USP */
+#define EF_M68K_ISA_B 0x05
+#define EF_M68K_ISA_C 0x06
+#define EF_M68K_MAC_MASK 0x30
+#define EF_M68K_MAC 0x10 /* MAC */
+#define EF_M68K_EMAC 0x20 /* EMAC */
+#define EF_M68K_EMAC_B 0x30 /* EMAC_B */
+#define EF_M68K_FLOAT 0x40 /* Has float insns */
+#define EF_M68K_CF_MASK 0xFF
+
#endif
Modified: branches/binutils/package/include/elf/mips.h
===================================================================
--- branches/binutils/package/include/elf/mips.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/mips.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -97,6 +97,9 @@
RELOC_NUMBER (R_MIPS16_HI16, 104)
RELOC_NUMBER (R_MIPS16_LO16, 105)
FAKE_RELOC (R_MIPS16_max, 106)
+ /* These relocations are specific to VxWorks. */
+ RELOC_NUMBER (R_MIPS_COPY, 126)
+ RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
/* This was a GNU extension used by embedded-PIC. It was co-opted by
mips-linux for exception-handling data. It is no longer used, but
should continue to be supported by the linker for backward
Modified: branches/binutils/package/include/elf/mt.h
===================================================================
--- branches/binutils/package/include/elf/mt.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/mt.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -17,30 +17,30 @@
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-#ifndef _ELF_MS1_H
-#define _ELF_MS1_H
+#ifndef _ELF_MT_H
+#define _ELF_MT_H
#include "elf/reloc-macros.h"
/* Relocations. */
-START_RELOC_NUMBERS (elf_ms1_reloc_type)
- RELOC_NUMBER (R_MS1_NONE, 0)
- RELOC_NUMBER (R_MS1_16, 1)
- RELOC_NUMBER (R_MS1_32, 2)
- RELOC_NUMBER (R_MS1_32_PCREL, 3)
- RELOC_NUMBER (R_MS1_PC16, 4)
- RELOC_NUMBER (R_MS1_HI16, 5)
- RELOC_NUMBER (R_MS1_LO16, 6)
-END_RELOC_NUMBERS(R_MS1_max)
+START_RELOC_NUMBERS (elf_mt_reloc_type)
+ RELOC_NUMBER (R_MT_NONE, 0)
+ RELOC_NUMBER (R_MT_16, 1)
+ RELOC_NUMBER (R_MT_32, 2)
+ RELOC_NUMBER (R_MT_32_PCREL, 3)
+ RELOC_NUMBER (R_MT_PC16, 4)
+ RELOC_NUMBER (R_MT_HI16, 5)
+ RELOC_NUMBER (R_MT_LO16, 6)
+END_RELOC_NUMBERS(R_MT_max)
-#define EF_MS1_CPU_MRISC 0x00000001 /* default */
-#define EF_MS1_CPU_MRISC2 0x00000002 /* MRISC2 */
-#define EF_MS1_CPU_MS2 0x00000003 /* MS2 */
-#define EF_MS1_CPU_MASK 0x00000003 /* specific cpu bits */
-#define EF_MS1_ALL_FLAGS (EF_MS1_CPU_MASK)
+#define EF_MT_CPU_MRISC 0x00000001 /* default */
+#define EF_MT_CPU_MRISC2 0x00000002 /* MRISC2 */
+#define EF_MT_CPU_MS2 0x00000003 /* MS2 */
+#define EF_MT_CPU_MASK 0x00000003 /* specific cpu bits */
+#define EF_MT_ALL_FLAGS (EF_MT_CPU_MASK)
/* The location of the memory mapped hardware stack. */
-#define MS1_STACK_VALUE 0x0f000000
-#define MS1_STACK_SIZE 0x20
+#define MT_STACK_VALUE 0x0f000000
+#define MT_STACK_SIZE 0x20
-#endif /* _ELF_MS1_H */
+#endif /* _ELF_MT_H */
Modified: branches/binutils/package/include/elf/x86-64.h
===================================================================
--- branches/binutils/package/include/elf/x86-64.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/x86-64.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* x86_64 ELF support for BFD.
- Copyright (C) 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2000, 2001, 2002, 2004, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by Jan Hubicka <jh at suse.cz>
This file is part of BFD, the Binary File Descriptor library.
@@ -53,6 +54,23 @@
RELOC_NUMBER (R_X86_64_GOTOFF64, 25) /* 64 bit offset to GOT */
RELOC_NUMBER (R_X86_64_GOTPC32, 26) /* 32 bit signed pc relative
offset to GOT */
+ RELOC_NUMBER (R_X86_64_GOT64, 27) /* 64 bit GOT entry offset */
+ RELOC_NUMBER (R_X86_64_GOTPCREL64, 28) /* 64 bit signed pc relative
+ offset to GOT entry */
+ RELOC_NUMBER (R_X86_64_GOTPC64, 29) /* 64 bit signed pc relative
+ offset to GOT */
+ RELOC_NUMBER (R_X86_64_GOTPLT64, 30) /* like GOT64, but indicates
+ that PLT entry is needed */
+ RELOC_NUMBER (R_X86_64_PLTOFF64, 31) /* 64 bit GOT relative offset
+ to PLT entry */
+ /* 32 .. 33 */
+ RELOC_NUMBER (R_X86_64_GOTPC32_TLSDESC, 34)
+ /* 32 bit signed pc relative
+ offset to TLS descriptor
+ in the GOT. */
+ RELOC_NUMBER (R_X86_64_TLSDESC_CALL, 35) /* Relaxable call through TLS
+ descriptor. */
+ RELOC_NUMBER (R_X86_64_TLSDESC, 36) /* 2x64-bit TLS descriptor. */
RELOC_NUMBER (R_X86_64_GNU_VTINHERIT, 250) /* GNU C++ hack */
RELOC_NUMBER (R_X86_64_GNU_VTENTRY, 251) /* GNU C++ hack */
END_RELOC_NUMBERS (R_X86_64_max)
Added: branches/binutils/package/include/elf/xc16x.h
===================================================================
--- branches/binutils/package/include/elf/xc16x.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/elf/xc16x.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,41 @@
+/* Infineon XC16X ELF support for BFD.
+ Copyright 2006 Free Software Foundation, Inc.
+ Contributed by KPIT Cummins Infosystems
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+
+#ifndef _ELF_XC16X_H
+#define _ELF_XC16X_H
+
+#include "elf/reloc-macros.h"
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_xc16x_reloc_type)
+ RELOC_NUMBER (R_XC16X_NONE, 0)
+ RELOC_NUMBER (R_XC16X_ABS_8, 1)
+ RELOC_NUMBER (R_XC16X_ABS_16, 2)
+ RELOC_NUMBER (R_XC16X_ABS_32, 3)
+ RELOC_NUMBER (R_XC16X_8_PCREL, 4)
+ RELOC_NUMBER (R_XC16X_PAG, 5)
+ RELOC_NUMBER (R_XC16X_POF, 6)
+ RELOC_NUMBER (R_XC16X_SEG, 7)
+ RELOC_NUMBER (R_XC16X_SOF, 8)
+
+END_RELOC_NUMBERS (R_XC16X_max)
+
+#endif /* _ELF_XC16X_H */
Modified: branches/binutils/package/include/libiberty.h
===================================================================
--- branches/binutils/package/include/libiberty.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/libiberty.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -448,6 +448,47 @@
const char *outname, const char *errname,
int *err);
+/* Return a `FILE' pointer FP for the standard input of the first
+ program in the pipeline; FP is opened for writing. You must have
+ passed `PEX_USE_PIPES' to the `pex_init' call that returned OBJ.
+ You must close FP yourself with `fclose' to indicate that the
+ pipeline's input is complete.
+
+ The file descriptor underlying FP is marked not to be inherited by
+ child processes.
+
+ This call is not supported on systems which do not support pipes;
+ it returns with an error. (We could implement it by writing a
+ temporary file, but then you would need to write all your data and
+ close FP before your first call to `pex_run' -- and that wouldn't
+ work on systems that do support pipes: the pipe would fill up, and
+ you would block. So there isn't any easy way to conceal the
+ differences between the two types of systems.)
+
+ If you call both `pex_write_input' and `pex_read_output', be
+ careful to avoid deadlock. If the output pipe fills up, so that
+ each program in the pipeline is waiting for the next to read more
+ data, and you fill the input pipe by writing more data to FP, then
+ there is no way to make progress: the only process that could read
+ data from the output pipe is you, but you are blocked on the input
+ pipe. */
+
+extern FILE *pex_write_input (struct pex_obj *obj, int binary);
+
+/* Return a stream for a temporary file to pass to the first program
+ in the pipeline as input. The file name is chosen as for pex_run.
+ pex_run closes the file automatically; don't close it yourself. */
+
+extern FILE *pex_input_file (struct pex_obj *obj, int flags,
+ const char *in_name);
+
+/* Return a stream for a pipe connected to the standard input of the
+ first program in the pipeline. You must have passed
+ `PEX_USE_PIPES' to `pex_init'. Close the returned stream
+ yourself. */
+
+extern FILE *pex_input_pipe (struct pex_obj *obj, int binary);
+
/* Read the standard output of the last program to be executed.
pex_run can not be called after this. BINARY should be non-zero if
the file should be opened in binary mode; this is ignored on Unix.
Modified: branches/binutils/package/include/md5.h
===================================================================
--- branches/binutils/package/include/md5.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/md5.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -27,6 +27,8 @@
# include <limits.h>
#endif
+#include "ansidecl.h"
+
/* The following contortions are an attempt to use the C preprocessor
to determine an unsigned integral type that is 32 bits wide. An
alternative approach is to use autoconf's AC_CHECK_SIZEOF macro, but
Modified: branches/binutils/package/include/opcode/ChangeLog
===================================================================
--- branches/binutils/package/include/opcode/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,45 @@
+2006-04-07 Joerg Wunsch <j.gnu at uriah.heep.sax.de>
+
+ * avr.h (AVR_ISA_PWMx): New.
+
+2006-03-28 Nathan Sidwell <nathan at codesourcery.com>
+
+ * m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
+ cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
+ cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
+ cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
+ cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
+
+2006-03-10 Paul Brook <paul at codesourcery.com>
+
+ * arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
+
+2006-03-04 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
+ first. Correct mask of bb "B" opcode.
+
+2006-02-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386.h (i386_optab): Support Intel Merom New Instructions.
+
+2006-02-24 Paul Brook <paul at codesourcery.com>
+
+ * arm.h: Add V7 feature bits.
+
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
+
+2006-01-31 Paul Brook <paul at codesourcery.com>
+ Richard Earnshaw <rearnsha at arm.com>
+
+ * arm.h: Use ARM_CPU_FEATURE.
+ (ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
+ (arm_feature_set): Change to a structure.
+ (ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
+ ARM_FEATURE): New macros.
+
2005-12-07 Hans-Peter Nilsson <hp at axis.com>
* cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
@@ -254,6 +296,14 @@
FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
fnstsw.
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
+
+ * m68k.h (m68008, m68ec030, m68882): Remove.
+ (m68k_mask): New.
+ (cpu_m68k, cpu_cf): New.
+ (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
+ mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
+
2005-01-25 Alexandre Oliva <aoliva at redhat.com>
2004-11-10 Alexandre Oliva <aoliva at redhat.com>
Modified: branches/binutils/package/include/opcode/arm.h
===================================================================
--- branches/binutils/package/include/opcode/arm.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/arm.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -35,67 +35,152 @@
#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
#define ARM_EXT_V6Z 0x00004000 /* ARM V6Z. */
#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
+#define ARM_EXT_DIV 0x00010000 /* Integer division. */
+/* The 'M' in Arm V7M stands for Microcontroller.
+ On earlier architecture variants it stands for Multiply. */
+#define ARM_EXT_V5E_NOTM 0x00020000 /* Arm V5E but not Arm V7M. */
+#define ARM_EXT_V6_NOTM 0x00040000 /* Arm V6 but not Arm V7M. */
+#define ARM_EXT_V7 0x00080000 /* Arm V7. */
+#define ARM_EXT_V7A 0x00100000 /* Arm V7A. */
+#define ARM_EXT_V7R 0x00200000 /* Arm V7R. */
+#define ARM_EXT_V7M 0x00400000 /* Arm V7M. */
/* Co-processor space extensions. */
-#define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */
-#define ARM_CEXT_MAVERICK 0x00400000 /* Use Cirrus/DSP coprocessor. */
-#define ARM_CEXT_IWMMXT 0x00200000 /* Intel Wireless MMX technology coprocessor. */
+#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
+#define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */
+#define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */
+#define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */
+#define FPU_ENDIAN_BIG 0 /* Double words-big-endian. */
+#define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */
+#define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */
+#define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */
+#define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */
+#define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */
+#define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
+
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add
three more to cover cores prior to ARM6. Finally, there are cores which
implement further extensions in the co-processor space. */
-#define ARM_ARCH_V1 ARM_EXT_V1
-#define ARM_ARCH_V2 (ARM_ARCH_V1 | ARM_EXT_V2)
-#define ARM_ARCH_V2S (ARM_ARCH_V2 | ARM_EXT_V2S)
-#define ARM_ARCH_V3 (ARM_ARCH_V2S | ARM_EXT_V3)
-#define ARM_ARCH_V3M (ARM_ARCH_V3 | ARM_EXT_V3M)
-#define ARM_ARCH_V4xM (ARM_ARCH_V3 | ARM_EXT_V4)
-#define ARM_ARCH_V4 (ARM_ARCH_V3M | ARM_EXT_V4)
-#define ARM_ARCH_V4TxM (ARM_ARCH_V4xM | ARM_EXT_V4T)
-#define ARM_ARCH_V4T (ARM_ARCH_V4 | ARM_EXT_V4T)
-#define ARM_ARCH_V5xM (ARM_ARCH_V4xM | ARM_EXT_V5)
-#define ARM_ARCH_V5 (ARM_ARCH_V4 | ARM_EXT_V5)
-#define ARM_ARCH_V5TxM (ARM_ARCH_V5xM | ARM_EXT_V4T | ARM_EXT_V5T)
-#define ARM_ARCH_V5T (ARM_ARCH_V5 | ARM_EXT_V4T | ARM_EXT_V5T)
-#define ARM_ARCH_V5TExP (ARM_ARCH_V5T | ARM_EXT_V5ExP)
-#define ARM_ARCH_V5TE (ARM_ARCH_V5TExP | ARM_EXT_V5E)
-#define ARM_ARCH_V5TEJ (ARM_ARCH_V5TE | ARM_EXT_V5J)
-#define ARM_ARCH_V6 (ARM_ARCH_V5TEJ | ARM_EXT_V6)
-#define ARM_ARCH_V6K (ARM_ARCH_V6 | ARM_EXT_V6K)
-#define ARM_ARCH_V6Z (ARM_ARCH_V6 | ARM_EXT_V6Z)
-#define ARM_ARCH_V6ZK (ARM_ARCH_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
-#define ARM_ARCH_V6T2 (ARM_ARCH_V6 | ARM_EXT_V6T2)
-#define ARM_ARCH_V6KT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K)
-#define ARM_ARCH_V6ZT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6Z)
-#define ARM_ARCH_V6ZKT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
+#define ARM_AEXT_V1 ARM_EXT_V1
+#define ARM_AEXT_V2 (ARM_AEXT_V1 | ARM_EXT_V2)
+#define ARM_AEXT_V2S (ARM_AEXT_V2 | ARM_EXT_V2S)
+#define ARM_AEXT_V3 (ARM_AEXT_V2S | ARM_EXT_V3)
+#define ARM_AEXT_V3M (ARM_AEXT_V3 | ARM_EXT_V3M)
+#define ARM_AEXT_V4xM (ARM_AEXT_V3 | ARM_EXT_V4)
+#define ARM_AEXT_V4 (ARM_AEXT_V3M | ARM_EXT_V4)
+#define ARM_AEXT_V4TxM (ARM_AEXT_V4xM | ARM_EXT_V4T)
+#define ARM_AEXT_V4T (ARM_AEXT_V4 | ARM_EXT_V4T)
+#define ARM_AEXT_V5xM (ARM_AEXT_V4xM | ARM_EXT_V5)
+#define ARM_AEXT_V5 (ARM_AEXT_V4 | ARM_EXT_V5)
+#define ARM_AEXT_V5TxM (ARM_AEXT_V5xM | ARM_EXT_V4T | ARM_EXT_V5T)
+#define ARM_AEXT_V5T (ARM_AEXT_V5 | ARM_EXT_V4T | ARM_EXT_V5T)
+#define ARM_AEXT_V5TExP (ARM_AEXT_V5T | ARM_EXT_V5ExP)
+#define ARM_AEXT_V5TE (ARM_AEXT_V5TExP | ARM_EXT_V5E)
+#define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
+#define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
+#define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
+#define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
+#define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
+#define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
+#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
+#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
+#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
+#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
+#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
+#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
+#define ARM_AEXT_NOTM \
+ (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
+#define ARM_AEXT_V7M \
+ ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
+#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
/* Processors with specific extensions in the co-processor space. */
-#define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE)
-#define ARM_ARCH_IWMMXT (ARM_ARCH_XSCALE | ARM_CEXT_IWMMXT)
+#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
+#define ARM_ARCH_IWMMXT \
+ ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
-#define FPU_FPA_EXT_V1 0x80000000 /* Base FPA instruction set. */
-#define FPU_FPA_EXT_V2 0x40000000 /* LFM/SFM. */
-#define FPU_VFP_EXT_NONE 0x20000000 /* Use VFP word-ordering. */
-#define FPU_VFP_EXT_V1xD 0x10000000 /* Base VFP instruction set. */
-#define FPU_VFP_EXT_V1 0x08000000 /* Double-precision insns. */
-#define FPU_VFP_EXT_V2 0x04000000 /* ARM10E VFPr1. */
-#define FPU_MAVERICK 0x02000000 /* Cirrus Maverick. */
-#define FPU_NONE 0
+#define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
+#define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
+#define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
+#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2)
+#define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
-#define FPU_ARCH_FPE FPU_FPA_EXT_V1
-#define FPU_ARCH_FPA (FPU_ARCH_FPE | FPU_FPA_EXT_V2)
+/* Deprecated */
+#define FPU_ARCH_VFP ARM_FEATURE (0, FPU_ENDIAN_PURE)
-#define FPU_ARCH_VFP FPU_VFP_EXT_NONE
-#define FPU_ARCH_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_NONE)
-#define FPU_ARCH_VFP_V1 (FPU_ARCH_VFP_V1xD | FPU_VFP_EXT_V1)
-#define FPU_ARCH_VFP_V2 (FPU_ARCH_VFP_V1 | FPU_VFP_EXT_V2)
+#define FPU_ARCH_FPE ARM_FEATURE (0, FPU_FPA_EXT_V1)
+#define FPU_ARCH_FPA ARM_FEATURE (0, FPU_FPA)
-#define FPU_ARCH_MAVERICK FPU_MAVERICK
+#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
+#define FPU_ARCH_VFP_V1 ARM_FEATURE (0, FPU_VFP_V1)
+#define FPU_ARCH_VFP_V2 ARM_FEATURE (0, FPU_VFP_V2)
+#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
+#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
+
+#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
+
+#define ARM_ARCH_V1 ARM_FEATURE (ARM_AEXT_V1, 0)
+#define ARM_ARCH_V2 ARM_FEATURE (ARM_AEXT_V2, 0)
+#define ARM_ARCH_V2S ARM_FEATURE (ARM_AEXT_V2S, 0)
+#define ARM_ARCH_V3 ARM_FEATURE (ARM_AEXT_V3, 0)
+#define ARM_ARCH_V3M ARM_FEATURE (ARM_AEXT_V3M, 0)
+#define ARM_ARCH_V4xM ARM_FEATURE (ARM_AEXT_V4xM, 0)
+#define ARM_ARCH_V4 ARM_FEATURE (ARM_AEXT_V4, 0)
+#define ARM_ARCH_V4TxM ARM_FEATURE (ARM_AEXT_V4TxM, 0)
+#define ARM_ARCH_V4T ARM_FEATURE (ARM_AEXT_V4T, 0)
+#define ARM_ARCH_V5xM ARM_FEATURE (ARM_AEXT_V5xM, 0)
+#define ARM_ARCH_V5 ARM_FEATURE (ARM_AEXT_V5, 0)
+#define ARM_ARCH_V5TxM ARM_FEATURE (ARM_AEXT_V5TxM, 0)
+#define ARM_ARCH_V5T ARM_FEATURE (ARM_AEXT_V5T, 0)
+#define ARM_ARCH_V5TExP ARM_FEATURE (ARM_AEXT_V5TExP, 0)
+#define ARM_ARCH_V5TE ARM_FEATURE (ARM_AEXT_V5TE, 0)
+#define ARM_ARCH_V5TEJ ARM_FEATURE (ARM_AEXT_V5TEJ, 0)
+#define ARM_ARCH_V6 ARM_FEATURE (ARM_AEXT_V6, 0)
+#define ARM_ARCH_V6K ARM_FEATURE (ARM_AEXT_V6K, 0)
+#define ARM_ARCH_V6Z ARM_FEATURE (ARM_AEXT_V6Z, 0)
+#define ARM_ARCH_V6ZK ARM_FEATURE (ARM_AEXT_V6ZK, 0)
+#define ARM_ARCH_V6T2 ARM_FEATURE (ARM_AEXT_V6T2, 0)
+#define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0)
+#define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
+#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
+#define ARM_ARCH_V7 ARM_FEATURE (ARM_AEXT_V7, 0)
+#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
+#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
+#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
+
/* Some useful combinations: */
-#define ARM_ANY 0x0000ffff /* Any basic core. */
-#define ARM_ALL 0x00ffffff /* Any core + co-processor */
-#define CPROC_ANY 0x00ff0000 /* Any co-processor */
-#define FPU_ANY 0xff000000 /* Note this is ~ARM_ALL. */
+#define ARM_ARCH_NONE ARM_FEATURE (0, 0)
+#define FPU_NONE ARM_FEATURE (0, 0)
+#define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */
+#define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
+#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
+
+/* There are too many feature bits to fit in a single word, so use a
+ structure. For simplicity we put all core features in one word and
+ everything else in the other. */
+typedef struct
+{
+ unsigned long core;
+ unsigned long coproc;
+} arm_feature_set;
+
+#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
+ (((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
+
+#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \
+ do { \
+ (TARG).core = (F1).core | (F2).core; \
+ (TARG).coproc = (F1).coproc | (F2).coproc; \
+ } while (0)
+
+#define ARM_CLEAR_FEATURE(TARG,F1,F2) \
+ do { \
+ (TARG).core = (F1).core &~ (F2).core; \
+ (TARG).coproc = (F1).coproc &~ (F2).coproc; \
+ } while (0)
+
+#define ARM_FEATURE(core, coproc) {(core), (coproc)}
Modified: branches/binutils/package/include/opcode/avr.h
===================================================================
--- branches/binutils/package/include/opcode/avr.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/avr.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Opcode table for the Atmel AVR micro controllers.
- Copyright 2000, 2001, 2004 Free Software Foundation, Inc.
+ Copyright 2000, 2001, 2004, 2006 Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc at overta.ru>
This program is free software; you can redistribute it and/or modify
@@ -17,7 +17,7 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-#define AVR_ISA_1200 0x0001 /* in the beginning there was ... */
+#define AVR_ISA_1200 0x0001 /* In the beginning there was ... */
#define AVR_ISA_LPM 0x0002 /* device has LPM */
#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
@@ -32,18 +32,19 @@
#define AVR_ISA_MOVW 0x1000 /* device has MOVW */
#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
-#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
+#define AVR_ISA_PWMx (AVR_ISA_M8 | AVR_ISA_BRK)
+#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
#define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
- AVR_ISA_SPM | AVR_ISA_BRK)
-#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
- AVR_ISA_LPMX | AVR_ISA_SPM)
-#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
-#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
-#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
- AVR_ISA_LPMX | AVR_ISA_SPM)
-#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
-#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
-#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
+ AVR_ISA_SPM | AVR_ISA_BRK)
+#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
+ AVR_ISA_LPMX | AVR_ISA_SPM)
+#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
+#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
+#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
+ AVR_ISA_LPMX | AVR_ISA_SPM)
+#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
+#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
+#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
#define AVR_ISA_ALL 0xFFFF
Modified: branches/binutils/package/include/opcode/hppa.h
===================================================================
--- branches/binutils/package/include/opcode/hppa.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/hppa.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -593,10 +593,10 @@
{ "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
{ "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
{ "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
+{ "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
{ "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
+{ "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT},
{ "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
-{ "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
-{ "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
{ "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
{ "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
{ "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
Modified: branches/binutils/package/include/opcode/i386.h
===================================================================
--- branches/binutils/package/include/opcode/i386.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/i386.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1379,6 +1379,41 @@
{"vmxoff", 0, 0x0f01, 0xc4, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} },
{"vmxon", 1, 0xf30fc7, 6, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} },
+/* Merom New Instructions. */
+
+{"phaddw", 2, 0x0f3801,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phaddw", 2, 0x660f3801,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"phaddd", 2, 0x0f3802,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phaddd", 2, 0x660f3802,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"phaddsw", 2, 0x0f3803,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phaddsw", 2, 0x660f3803,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"phsubw", 2, 0x0f3805,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phsubw", 2, 0x660f3805,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"phsubd", 2, 0x0f3806,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phsubd", 2, 0x660f3806,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"phsubsw", 2, 0x0f3807,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"phsubsw", 2, 0x660f3807,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"pmaddubsw", 2, 0x0f3804,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmaddubsw", 2, 0x660f3804,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"pmulhrsw", 2, 0x0f380b,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pmulhrsw", 2, 0x660f380b,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"pshufb", 2, 0x0f3800,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pshufb", 2, 0x660f3800,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"psignb", 2, 0x0f3808,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psignb", 2, 0x660f3808,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"psignw", 2, 0x0f3809,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psignw", 2, 0x660f3809,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"psignd", 2, 0x0f380a,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"psignd", 2, 0x660f380a,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"palignr", 3, 0x0f3a0f,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { Imm8, RegMMX|LongMem, RegMMX } },
+{"palignr", 3, 0x660f3a0f,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
+{"pabsb", 2, 0x0f381c,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pabsb", 2, 0x660f381c,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"pabsw", 2, 0x0f381d,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pabsw", 2, 0x660f381d,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+{"pabsd", 2, 0x0f381e,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
+{"pabsd", 2, 0x660f381e,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
+
/* AMD 3DNow! instructions. */
{"prefetch", 1, 0x0f0d, 0, Cpu3dnow, NoSuf|IgnoreSize|Modrm, { ByteMem, 0, 0 } },
Modified: branches/binutils/package/include/opcode/ia64.h
===================================================================
--- branches/binutils/package/include/opcode/ia64.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/ia64.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,7 @@
/* ia64.h -- Header file for ia64 opcode table
- Copyright (C) 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
- Contributed by David Mosberger-Tang <davidm at hpl.hp.com> */
+ Copyright (C) 1998, 1999, 2000, 2002, 2005, 2006
+ Free Software Foundation, Inc.
+ Contributed by David Mosberger-Tang <davidm at hpl.hp.com> */
#ifndef opcode_ia64_h
#define opcode_ia64_h
@@ -102,6 +103,7 @@
IA64_OPND_CPOS6c, /* 6-bit count (63 - bits 31-36) */
IA64_OPND_IMM1, /* signed 1-bit immediate (bit 36) */
IA64_OPND_IMMU2, /* unsigned 2-bit immediate (bits 13-14) */
+ IA64_OPND_IMMU5b, /* unsigned 5-bit immediate (32 + bits 14-18) */
IA64_OPND_IMMU7a, /* unsigned 7-bit immediate (bits 13-19) */
IA64_OPND_IMMU7b, /* unsigned 7-bit immediate (bits 20-26) */
IA64_OPND_SOF, /* 8-bit stack frame size */
Modified: branches/binutils/package/include/opcode/m68k.h
===================================================================
--- branches/binutils/package/include/opcode/m68k.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/opcode/m68k.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Opcode table header for m680[01234]0/m6888[12]/m68851.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001,
- 2003, 2004 Free Software Foundation, Inc.
+ 2003, 2004, 2006 Free Software Foundation, Inc.
This file is part of GDB, GAS, and the GNU binutils.
@@ -23,19 +23,15 @@
structure. */
#define _m68k_undef 0
#define m68000 0x001
-#define m68008 m68000 /* Synonym for -m68000. otherwise unused. */
#define m68010 0x002
#define m68020 0x004
#define m68030 0x008
-#define m68ec030 m68030 /* Similar enough to -m68030 to ignore differences;
- gas will deal with the few differences. */
#define m68040 0x010
-/* There is no 68050. */
#define m68060 0x020
#define m68881 0x040
-#define m68882 m68881 /* Synonym for -m68881. otherwise unused. */
#define m68851 0x080
#define cpu32 0x100 /* e.g., 68332 */
+#define m68k_mask 0x1ff
#define mcfmac 0x200 /* ColdFire MAC. */
#define mcfemac 0x400 /* ColdFire EMAC. */
@@ -47,24 +43,14 @@
#define mcfisa_b 0x8000 /* ColdFire ISA_B. */
#define mcfusp 0x10000 /* ColdFire USP instructions. */
-#define mcf5200 0x20000
-#define mcf5206e 0x40000
-#define mcf521x 0x80000
-#define mcf5249 0x100000
-#define mcf528x 0x200000
-#define mcf5307 0x400000
-#define mcf5407 0x800000
-#define mcf5470 0x1000000
-#define mcf5480 0x2000000
-
- /* Handy aliases. */
+/* Handy aliases. */
#define m68040up (m68040 | m68060)
#define m68030up (m68030 | m68040up)
#define m68020up (m68020 | m68030up)
#define m68010up (m68010 | cpu32 | m68020up)
#define m68000up (m68000 | m68010up)
-#define mfloat (m68881 | m68882 | m68040 | m68060)
+#define mfloat (m68881 | m68040 | m68060)
#define mmmu (m68851 | m68030 | m68040 | m68060)
/* The structure used to hold information for an opcode. */
Modified: branches/binutils/package/include/xtensa-config.h
===================================================================
--- branches/binutils/package/include/xtensa-config.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/include/xtensa-config.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* Xtensa configuration settings.
- Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson at tensilica.com) at Tensilica.
This program is free software; you can redistribute it and/or modify
@@ -54,6 +54,9 @@
#undef XCHAL_HAVE_MUL32
#define XCHAL_HAVE_MUL32 0
+#undef XCHAL_HAVE_MUL32_HIGH
+#define XCHAL_HAVE_MUL32_HIGH 0
+
#undef XCHAL_HAVE_DIV32
#define XCHAL_HAVE_DIV32 0
@@ -90,6 +93,9 @@
#undef XCHAL_HAVE_WINDOWED
#define XCHAL_HAVE_WINDOWED 1
+#undef XCHAL_HAVE_WIDE_BRANCHES
+#define XCHAL_HAVE_WIDE_BRANCHES 0
+
#undef XCHAL_HAVE_PREDICTED_BRANCHES
#define XCHAL_HAVE_PREDICTED_BRANCHES 0
Modified: branches/binutils/package/intl/ChangeLog
===================================================================
--- branches/binutils/package/intl/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/intl/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,12 @@
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
+
+ * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
+ Add install-html target.
+
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
+
+ * intl/Makefile.in: Add html target.
+
2005-05-13 Nick Clifton <nickc at redhat.com>
* Update the address and phone number of the FSF organization in
Modified: branches/binutils/package/intl/Makefile.in
===================================================================
--- branches/binutils/package/intl/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/intl/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
# Makefile for directory with message catalog handling in GNU NLS Utilities.
-# Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
+# Copyright (C) 1995, 1996, 1997, 1998, 2006 Free Software Foundation, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -149,8 +149,12 @@
rm -f $(gettextsrcdir)/$$file; \
done
-info dvi:
+.PHONY: html info dvi
+html info dvi:
+.PHONY: install-html
+install-html:
+
$(OBJECTS): config.h libgettext.h
bindtextdom.$lo finddomain.$lo loadmsgcat.$lo: gettextP.h gettext.h loadinfo.h
dcgettext.$lo: gettextP.h gettext.h hash-string.h loadinfo.h
Modified: branches/binutils/package/ld/ChangeLog
===================================================================
--- branches/binutils/package/ld/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3211 +1,255 @@
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+2006-04-11 Diego Pettenò <flameeyes at gentoo.org>
- * Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
- (eelf32mt.c): Update target name and dependencies.
- * Makefile.in: Rebuilt.
- * configure.tgt: Replace ms1 arch with mt arch.
- * emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
- comment.
-
-2005-12-11 Bernhard Fischer <aldot at gcc.gnu.org>
-
- * scripttempl/armbpabi.sc: Fix typo in comment for .ctors.
- * scripttempl/elf.sc: Ditto.
- * scripttempl/elf32sh-symbian.sc: Ditto.
- * scripttempl/elf_chaos.sc: Ditto.
- * scripttempl/elfd10v.sc: Ditto.
- * scripttempl/elfd30v.sc: Ditto.
- * scripttempl/elfxtensa.sc: Ditto.
- * scripttempl/iq2000.sc: Ditto.
- * scripttempl/xstormy16.sc: Ditto.
-
-2005-12-08 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc32elf.em (emit_stub_syms): New var.
- (ppc_after_open): Pass it to ppc_elf_select_plt_layout.
- (PARSE_AND_LIST_PROLOGUE <OPTION_STUBSYMS>): Define.
- (PARSE_AND_LIST_LONGOPTS): Add emit-stub-syms.
- (PARSE_AND_LIST_OPTIONS): Describe emit-stub-syms.
- (PARSE_AND_LIST_OPTIONS): Handle it.
-
-2005-12-08 Alan Modra <amodra at bigpond.net.au>
-
- * pe-dll.c (build_filler_bfd): Conform error message to standard.
- (pe_dll_generate_implib): Use %E in error message.
- (add_bfd_to_link): Likewise.
- (pe_implied_import_dll): Likewise.
-
-2005-12-07 Thiemo Seufer <ths at networkno.de>
- H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1932
- * emultempl/elf32.em (gld${EMULATION_NAME}_find_exp_assignment):
- Adjust bfd_elf_record_link_assignment call.
-
- * ldexp.c (exp_fold_tree_1): Remove call to bfd_hide_symbol.
-
-2005-11-25 Jan Beulich <jbeulich at novell.com>
-
- * Makefile.am: Make configdoc.texi writeable before trying
- to write to it.
- * Makefile.in: Refresh.
-
-2005-11-24 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_output_section_find_by_flags): Add match_type param.
- Run two passes, first using match_type, second without.
- * ldlang.h (lang_match_sec_type_func): New typedef.
- (lang_output_section_find_by_flags): Update prototype.
- bfd_match_sections_by_type and lang_output_section_find_by_flags.
- * emultempl/pe.em (place_orphan): Likewise.
-
-2005-11-24 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_insert_orphan): Skip first assignment to dot
- in script when looking for place to insert orphan statements.
-
-2005-11-18 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/elf64ppc.sh (.tocbss): Use new section alignment scheme.
- (.got, .toc1, .opd): Likewise.
-
-2005-11-18 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_size_sections_1): Revert 2005-11-16 functional
- changes to section alignment.
- * ldmisc.c (vfinfo): Handle %ld and %lu.
-
-2005-11-16 Mark Mitchell <mark at codesourcery.com>
-
- * Makefile.am (configdoc.texi): Set top_srcdir in configdoc.texi..
- * Makefile.in: Regenerated.
- * ld.texinfo: Include configdoc.texi and ldver.texi in man pages.
- Add @file documentation.
-
-2005-11-17 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.h (lang_input_section_type): Remove "ifile" field.
- (lang_insert_orphan, lang_add_section): Update prototypes.
- * ldlang.c (lang_insert_orphan): Remove "file" param.
- (lang_add_section): Likewise. Update all callers.
- (wild_sort): Get an input section's bfd via "section->owner".
- (size_input_section): Access just_syms_flag via bfd usrdata.
- (lang_place_orphans): Update ldemul_place_orphan call.
- * ldemul.h (ldemul_place_orphan): Remove input_statement param.
- (struct ld_emulation_xfer_struct <place_orphan>): Likewise.
- * ldemul.c (ldemul_place_orphan): Likewise.
- * ldwrite.c (build_link_order): Access just_syms_flag via bfd usrdata.
- * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Likewise.
- * emultempl/beos.em (sort_by_file_name): Access bfd by section->owner.
- (sort_sections): Likewise.
- (place_orphan): Remove "file" param. Adjust lang_add_section call.
- * emultempl/elf32.em (place_orphan): Remove "file" param. Adjust
- lang_add_section and lang_insert_orphan calls.
- * emultempl/hppaelf.em (hppaelf_add_stub_section): Adjust
- lang_add_section call.
- (build_section_lists): Access just_syms_flag via bfd usrdata.
- * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Adjust
- lang_add_section call.
- * emultempl/mmo.em (mmo_place_orphan): Remove "file" param. Adjust
- lang_add_section and lang_insert_orphan calls.
- * emultempl/pe.em (place_orphan): Likewise. Access bfd via section
- owner.
- * emultempl/ppc64elf.em (ppc_add_stub_section): Adjust
- lang_add_section call.
- (build_toc_list): Access just_syms_flag via bfd usrdata.
- (build_section_lists): Likewise.
- * emultempl/xtensaelf.em (elf_xtensa_place_orphan): Remove "file"
- param. Adjust place_orphan call.
- (ld_build_required_section_dependence): Access bfd via section owner.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.h (lang_output_section_statement_type): Add prev.
- * ldlang.c (new_afile): Always init header.type.
- (output_statement_newfunc): Set os.prev.
- (output_prev_sec_find): Use os.prev.
- (lang_enter_output_section_statement): Formatting.
- (lang_final, lang_add_target, lang_add_fill): Likewise.
- (lang_add_data, lang_add_reloc): Likewise.
- (lang_add_attribute): Only alloc the header.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * ld.texinfo (Forced Output Alignment): Specify that this is an
- alignment increase, not an override.
- * ldlang.c (init_os): Set output section alignment here..
- (lang_add_section): ..rather than here.
- (lang_size_sections_1): Consolidate alignment code. Warn if section
- alignment affects start address when explicit address given.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-11-07 Olaf Hering <olh at suse.de>
-
- * ldmain.c (main): Add \n to error message.
-
-2005-11-04 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (struct output_statement_hash_entry): Don't indirect to os.
- (output_statement_newfunc): Rewrite.
- (lang_output_section_find_1): Merge into..
- (lang_output_section_find): ..here.
- (lang_output_section_statement_lookup_1): Rewrite to handle
- multiple sections with the same name.
- (output_statement_table_init): Commonise error message.
- (lang_init, open_output): Likewise.
-
-2005-11-03 Paul Brook <paul at codesourcery.com>
-
- * scripttempl/elf.sc: Add .init_array.* and .fini_array.*.
- * scripttempl/armbpabi.sc: Make init/fini array consistent with
- elf.sc.
- * scripttempl/elf32sh-symbian.sc: Ditto.
- * scripttempl/elfxtensa.sc: Ditto.
-
-2005-11-03 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.h (lang_output_section_statement_type): Rearrange. Remove
- memspec. Make "processed" a bitfield.
- (lang_data_statement_type, lang_reloc_statement_type): Rename
- output_vma to output_offset.
- * ldlang.c (lang_output_section_statement_lookup_1): Init
- all_input_readonly. Don't init memspec.
- (init_os): Remove incorrect comment.
- (print_data_statement, print_reloc_statement): Adjust for
- lang_data_statement_type and lang_reloc_statement_type change.
- (lang_size_sections_1, lang_add_reloc): Likewise.
- * ldwrite.c (build_link_order): Likewise.
-
-2005-10-30 Mark Mitchell <mark at codesourcery.com>
-
- * lexsup.c (help): Document "@FILE".
-
-2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * dep-in.sed: Replace " ./" with " ".
-
-2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * Makefile.am: Add support for Z80
- * Makefile.in: Regenerated
- * configure.tgt: Add z80-*-coff
- * emulparams/z80.sh: New file.
- * emultempl/z80.em: New file.
- * scripttempl/z80.sc New file.
- * NEWS: Mention this new support.
-
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
-
- * po/ld.pot: Regenerate.
-
-2005-10-25 Chris Metcalf <cdmetcalf at comcast.net>
-
- * ld.texinfo (--reduce-memory-overheads): Fix typo.
-
-2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1487
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Call
- bfd_match_sections_by_type to match section types.
-
- * ldlang.c (init_os): Take the input section. Call
- bfd_init_private_section_data if the input section isn't NULL.
- (exp_init_os): Pass NULL to init_os.
- (map_input_to_output_sections): Likewise.
- (lang_add_section): Pass the input section to init_os.
-
-2005-10-19 Paul Brook <paul at codesourcery.com>
-
- * emulparams/armelf.sh: Add .ARM.attributes to OTHER_SECTIONS.
-
-2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1467
- * emultempl/elf32.em: Include "elf-bfd.h".
- (gld${EMULATION_NAME}_place_orphan): Check section type and
- don't use section name for ELF input sections.
-
- * ld.texinfo: Document orphan section processing.
-
- * ldlang.c (lang_output_section_find_by_flags): Match section
- types by calling bfd_match_sections_by_type.
-
-2005-10-13 Mark Mitchell <mark at codesourcery.com>
-
- * ld.texino: Describe double-quoted string syntax for version
- nodes.
- * ldlang.h (lang_new_vers_pattern): Add literal_p parameter.
- * ldgram.y (vers_defns): Allow NAME as well as VERS_IDENTIFIER.
- Adjust calls to lang_new_vers_pattern to pass literal_p argument.
- * ldlang.c (lang_vers_match): Fix indentation. Do not glob-match
- version nodes without a pattern.
- (lang_new_vers_pattern): Add literal_p parameter.
- (lang_do_version_exports_section): Pass it.
-
-2005-10-12 Mark Mitchell <mark at codesourcery.com>
-
- * NEWS: Mention @file.
-
-2005-10-05 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1396
- * ldcref.c (check_refs): Accept bfd_boolean.
- (check_local_sym_xref): Pass FALSE to check_refs.
- (check_nocrossref): Pass TRUE to check_refs.
- (check_refs_info): Add bfd_boolean.
- (check_refs): Add bfd_boolean to check_refs_info.
- (check_reloc_refs): Match relocations with proper symbols.
-
- * ldmisc.c (vfinfo): Don't add extra ":\n".
-
-2005-10-05 Danny Smith <dannysmith at users.sourceforge.net>
-
- * emultempl/pe.em (gld_${EMULATION_NAME}_before_parse): Set
- default entry symbol to ENTRY here.
- * scripttempl/pe.sc: Not here.
-
-2005-09-30 James E Wilson <wilson at specifix.com>
-
- * ldlang.c (lang_startup): Add missing ": " to einfo call.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldlang.c (output_statement_hash_entry): New type.
- (output_statement_table): New variable for hash table.
- (output_statement_newfunc): New function.
- (output_statement_table_init): Likewise.
- (output_statement_table_free): Likewise.
- (lang_init): Call output_statement_table_init.
- (lang_finish): Renamed to ...
- (lang_end): This.
- (lang_process): Updated.
- (lang_finish): New function.
- (lang_output_section_find_1): Use hash table.
- (lang_output_section_statement_lookup_1): Likewise.
-
- * ldlang.h (lang_finish): New.
-
- * ldmain.c (main): Call lang_finish.
-
-2005-09-30 Mark Mitchell <mark at codesourcery.com>
-
- * ldmain.c (main): Use expandargv.
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * Makefile.am: Bfin support.
- * Makefile.in: Regenerated.
- * aclocal.m4: Regenerated.
- * configure.tgt: Bfin support.
- * emulparams/bfin.sh: New file.
- * emultempl/bfin.em: New file.
-
-2005-09-30 Matthias Kurz <mk at baerlap.north.de>
-
- * ld.h: Prevent the inclusion of <libintl.h> from the Solaris
- version of <locale.h> when ENABLE_NLS is not defined.
-
-2005-09-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld.texinfo (ALIGN): Document it as forcing output section
- alignment.
-
- * ldgram.y (ALIGN): Support it for forcing output section
- alignment.
-
-2005-09-20 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.h (lang_output_section_statement_struct): Change type of
- "processed" to bfd_boolean.
- * ldexp.c (fold_name): Update references to os->processed.
- * ldlang.c (lang_output_section_statement_lookup_1): Likewise.
- (lang_size_sections_1): Likewise.
- (lang_reset_memory_regions): Likewise.
-
- PR ld/1353
- * ldlang.c (lang_size_sections_1): Process addr_tree earlier,
- so that unused output section statements affect dot.
-
-2005-09-08 Jakub Jelinek <jakub at redhat.com>
-
- * ld.texinfo: Document -z {no,}execstack, -z {no,}relro
- and --eh-frame-hdr options.
-
-2005-09-07 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (fold_name <SIZEOF>): Return 0 for non-existent section.
- (exp_fold_tree_1): Print assert message only in final stage of
- linking. Trigger assertion failure if expression cannot be
- evaluated.
-
-2005-09-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR ld/1263
- * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): Check
- --just-symbols on DSO.
-
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempl/elf.sc: Remove commented out defines.
-
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/a29k.sh: Delete.
- * emulparams/ebmon29k.sh: Delete.
- * emulparams/sa29200.sh: Delete.
- * Makefile.am: Remove a29k support.
- * configure.tgt: Likewise.
- * ld.texinfo: Likewise.
+ * emultempl/elf32.em: Add support for elf-hints.h on FreeBSD
+ and Dragonfly targets.
+ * configure.in (AC_CHECK_HEADERS): Add elf-hints.h.
+ * Makefile.am (HFILES): Add elf-hints-local.h.
+ * elf-hints-local.h: New file.
* Makefile.in: Regenerate.
-
-2005-08-17 Jakub Jelinek <jakub at redhat.com>
-
- * ldgram.y (vers_defns): Don't lose pattern list before
- extern NAME {}. Handle global, local and extern symbol names.
-
-2005-08-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation):
- Don't increment rel_count of .cranges here. Set rawsize of .cranges.
-
-2005-08-10 Nick Clifton <nickc at redhat.com>
-
- * pe-dll.c (pe_exe_fill_sections): Call lang_reset_memory_regions
- before lang_size_sections.
-
-2005-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/hppa64linux.sh (LARGE_SECTIONS): Remove .tbss.
-
-2005-08-08 Eric Doenges <Eric.Doenges at betty-tv.com>
-
- * Makefile.am (ALL_EMULATIONS): Add msp430x21xx variants.
- Add rules to build these emulations.
- * Makefile.in: Regenerate.
- * configure.tgt (msp430): Add the new variants to the
- targ_extra_emuls list.
- * emulparams/msp430all.sh: Add entries for the msp430x21xx
- variants.
-
-2005-08-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld.texinfo: Document PROVIDE_HIDDEN.
-
- * ldexp.c (exp_fold_tree_1): Hide a provided symbol if asked.
- (exp_provide): Add and set hidden.
-
- * ldexp.h (etree_type): Add hidden to assign.
-
- * ldgram.y (PROVIDE_HIDDEN): New.
- * ldlex.l (PROVIDE_HIDDEN): Likewise.
-
- * scripttempl/elf.sc: Use PROVIDE_HIDDEN on array bound
- symbols.
-
-2005-08-05 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/elf_x86_64.sh: Revert last change.
- * scripttempl/elf.sc (REL_LARGE, LARGE_SECTIONS): Define here.
-
-2005-08-05 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/armelf.sh (OTHER_BSS_END_SYMBOLS): Split out from
- OTHER_END_SYMBOLS.
- * emulparams/armelf_linux.sh: Likewise.
- * emulparams/armnto.sh: Likewise.
- * emulparams/criself.sh: Likewise.
- * emulparams/elf32mcore.sh: Likewise.
- * emulparams/criself.sh (OTHER_SYMBOLS): Define.
- * emulparams/crislinux.sh (OTHER_SYMBOLS): Define.
- (OTHER_END_SYMBOLS): Don't define.
- * emulparams/elf32fr30.sh: Likewise.
- * emulparams/elf64mmix.sh: Likewise.
- * emulparams/hppa64linux.sh: Likewise.
- * emulparams/m32relf.sh: Likewise.
- * emulparams/vxworks.sh: Likewise.
- * scripttempl/armbpabi.sc (OTHER_BSS_SECTIONS): Delete.
- (OTHER_BSS_END_SYMBOLS): Add.
- (OTHER_END_SYMBOLS): Move before current end sym definitions.
- (OTHER_SYMBOLS): Replace OTHER_END_SYMBOLS near end of script.
- * scripttempl/elf.sc: Likewise.
- * scripttempl/elf32sh-symbian.sc: Likewise.
- * scripttempl/elf_chaos.sc: Likewise.
- * scripttempl/elfxtensa.sc: Likewise.
- * scripttempl/iq2000.sc: Likewise.
- * scripttempl/xstormy16.sc: Likewise.
-
- * scripttempl/elf.sc (LBSS, LARGE_SECTIONS): Delete.
- (REL_LDATA, REL_LBSS, REL_LRODATA): Delete.
- (REL_LARGE, LARGE_SECTIONS): Add.
- * emulparams/elf_x86_64.sh (LARGE_SECTIONS): Define as script text.
- (REL_LARGE): Define.
- * emulparams/hppa64linux.sh (OTHER_BSS_SECTIONS): Don't define.
- (LARGE_SECTIONS): Define.
- * emulparams/hppa64linux.sh (OTHER_BSS_SECTIONS): Don't define.
- (LARGE_SECTIONS): Define.
-
-2005-08-04 Alan Modra <amodra at bigpond.net.au>
-
- * ldemul.c (ldemul_do_assignments, do_assignments_default): Delete.
- * ldemul.h (ldemul_do_assignments, do_assignments_default): Delete.
- (struct ld_emulation_xfer_struct): Remove do_assignments field.
- * ldlang.c (lang_do_assignments): Don't call ldemul_do_assignments.
- * emulparams/elf32ppc.sh (SDATA_START_SYMBOLS): New.
- (SDATA2_START_SYMBOLS, SBSS_START_SYMBOLS, SBSS_END_SYMBOLS): New.
- * emultempl/aix.em (ld_*_emulation): Delete do_assignments init.
- * emultempl/armcoff.em: Likewise.
- * emultempl/beos.em: Likewise.
- * emultempl/generic.em: Likewise.
- * emultempl/gld960.em: Likewise.
- * emultempl/gld960c.em: Likewise.
- * emultempl/linux.em: Likewise.
- * emultempl/lnk960.em: Likewise.
- * emultempl/m68kcoff.em: Likewise.
- * emultempl/pe.em: Likewise.
- * emultempl/sunos.em: Likewise.
- * emultempl/ticoff.em: Likewise.
- * emultempl/vanilla.em: Likewise.
- * emultempl/elf32.em: Likewise.
- (gld*_provide_bound_symbols): Delete.
- (gld*_provide_init_fini_syms): Delete.
- (gld*_before_allocation): Don't call ldemul_do_assignments.
- * emultempl/ppc32elf.em (ppc_do_assignments): Delete.
- (LDEMUL_DO_ASSIGNMENTS): Delete.
- * scripttempl/elf.sc: Provide init/fini syms. Add SBSS_START_SYMBOLS,
- SBSS_END_SYMBOLS, SDATA2_START_SYMBOLS.
-
-2005-08-04 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (eelf32m32c.c): Fix dependencies.
- * Makefile.in: Regenerate.
-
-2005-08-04 Alan Modra <amodra at bigpond.net.au>
-
- * ldemul.c (ldemul_finish): Call ld_emulation->finish unconditionally.
- (finish_default): New function.
- * ldemul.h (finish_default): Declare.
- * emultempl/aix.em (gld*_before_allocation): Call
- before_allocation_default rather than strip_excluded_output_sections.
- (ld_*_emulation): Init finish field to finish_default.
- * emultempl/armcoff.em: Likewise.
- * emultempl/beos.em: Likewise.
- * emultempl/elf32.em: Likewise.
- * emultempl/generic.em: Likewise.
- * emultempl/gld960.em: Likewise.
- * emultempl/gld960c.em: Likewise.
- * emultempl/hppaelf.em: Likewise.
- * emultempl/linux.em: Likewise.
- * emultempl/lnk960.em: Likewise.
- * emultempl/m68kcoff.em: Likewise.
- * emultempl/mmo.em: Likewise.
- * emultempl/pe.em: Likewise.
- * emultempl/ppc64elf.em: Likewise.
- * emultempl/sunos.em: Likewise.
- * emultempl/ticoff.em: Likewise.
- * emultempl/vanilla.em: Likewise.
-
-2005-08-03 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (exp_init_os): Handle etree_provide.
- * emulparams/armelf.sh (OTHER_END_SYMBOLS): Rename from..
- (OTHER_BSS_END_SYMBOLS): ..this.
- * emulparams/armelf_linux.sh: Likewise.
- * emulparams/armnto.sh: Likewise.
- * emulparams/criself.sh: Likewise.
- * emulparams/crislinux.sh: Likewise.
- * emulparams/elf32frv.sh: Likewise.
- * emulparams/elf32mcore.sh: Likewise.
- * emulparams/elf32ppc.sh: Likewise.
- * emulparams/elf32ppclinux.sh: Likewise.
- * emulparams/hppa64linux.sh: Likewise.
- * scripttempl/armbpabi.sc: Substitute $OTHER_END_SYMBOLS, not
- $OTHER_BSS_END_SYMBOLS.
- * scripttempl/elf32sh-symbian.sc: Likewise.
- * scripttempl/elf_chaos.sc: Likewise.
- * scripttempl/iq2000.sc: Likewise.
- * scripttempl/xstormy16.sc: Likewise.
- * scripttempl/elf.sc: Likewise. Delete __bss_start comment.
- * scripttempl/elfxtensa.sc: Likewise.
-
-2005-07-29 Nick Clifton <nickc at redhat.com>
-
- * ldmain.c (main): Allow -shared and -static to be used together.
- * ld.texinfo (-static): Mention that it is allowed with -shared.
-
-2005-07-28 DJ Delorie <dj at redhat.com>
-
- * ldlang.c (lang_output_section_statement_lookup_1): Don't cast a
- unary & address operator, as that breaks GCC's strict aliasing
- rules.
-
-2005-07-25 Jan Hubicka <jh at suse.cz>
- H.J. Lu <hongjiu.lu at intel.com>
-
- * emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
-
- * scripttempl/elf.sc: Updated for large section support.
-
-2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Remove i[3-7]86-*-rtemself*.
- Remove sparc-*-rtemself*.
-
-2005-07-21 Ben Elliston <bje at gnu.org>
-
- * ldgram.y (ldgram_want_filename): Remove unused static.
-
-2005-07-20 DJ Delorie <dj at redhat.com>
-
- * emulparams/elf32m32c.sh (TEMPLATE_NAME): New.
- (EXTRA_EM_FILE): New.
-
-2005-07-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldmain.c (main): Reindent.
-
-2005-07-19 Paul Brook <paul at codesourcery.com>
-
- * configure.host (HOSTING_CRT0): Parse output of gcc --help --verbose
- to determine dynamic linker name.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * configure.tgt: Restore alpha ordering to list of arches.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld*_provide_init_fini_syms): Prototype.
- (gld*_before_allocation): Call ldemul_do_assignments rather than
- gld*_provide_init_fini_syms directly.
- * emultempl/ppc32elf.em (gld*_after_allocation): Delete.
- (ppc_do_assignments): New function.
- (LDEMUL_AFTER_ALLOCATION): Don't define.
- (LDEMUL_DO_ASSIGNMENTS): Define.
-
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- (emipsidt.c, emipsidtl.c): Depend on generic.em.
- * Makefile.in: Regenerate.
-
-2005-07-15 Alan Modra <amodra at bigpond.net.au>
-
- * ldemul.c (ldemul_do_assignments): New function.
- (do_assignments_default): New function.
- * ldemul.h (ldemul_do_assignments): Declare.
- (do_assignments_default): Declare.
- (struct ld_emulation_xfer_struct): Add do_assignments.
- * ldlang.c (lang_do_assignments) Call ldemul_do_assignments.
- * emultempl/aix.em (ld_*_emulation): Init do_assignments field.
- * emultempl/armcoff.em: Likewise.
- * emultempl/beos.em: Likewise.
- * emultempl/generic.em: Likewise.
- * emultempl/gld960.em: Likewise.
- * emultempl/gld960c.em: Likewise.
- * emultempl/linux.em: Likewise.
- * emultempl/lnk960.em: Likewise.
- * emultempl/m68kcoff.em: Likewise.
- * emultempl/pe.em: Likewise.
- * emultempl/sunos.em: Likewise.
- * emultempl/ticoff.em: Likewise.
- * emultempl/vanilla.em: Likewise.
- * emultempl/elf32.em: Likewise, to call gld*_provide_init_fini_syms.
- (gld*_find_exp_assignment): Adjust bfd_elf_record_link_assignment call.
-
-2005-07-14 Jim Blandy <jimb at redhat.com>
-
- Add support for the Renesas M32C and M16C.
- * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
- (eelf32m32c.c): New target.
- * Makefile.in: Regenerated.
- * configure.tgt: Add case for m32c-*-elf.
- * emulparams/elf32m32c.sh: New file.
-
-2005-07-14 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (strip_excluded_output_sections): Don't call
- bfd_gc_sections.
- * emultempl/elf32.em (gld*_provide_bound_symbols): Move.
- (gld*_provide_init_fini_syms): Move.
- (gld*_before_allocation): Call the above from here..
- (gld*_finish): ..not here. Call _bfd_elf_fix_excluded_sec_syms.
- * emultempl/hppaelf.em (hppaelf_finish): Likewise.
- * emultempl/ppc64elf.em (ppc_finish): Likewise.
-
-2005-07-10 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Remove sparc*-*-rtemsaout*, i[3-7]86-go32-rtems*,
- i[3-7]86-*-rtemscoff*, hppa*-*-rtems*, mips*el-*-rtems*,
- powerpcle-*-rtems*.
-
-2005-07-09 Christopher Faylor <cgf at timesys.com>
-
- * emultempl/pe.em (gld_${EMULATION_NAME}_before_parse): Enable runtime
- relocation by default.
- (compute_dll_image_base): Avoid linking into cygwin dll address space.
-
-2005-07-08 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (wild_sort): Formatting.
- (strip_excluded_output_sections): Strip zero size sections here.
- * emultempl/elf32.em (gld*_strip_empty_sections): Delete.
- (gld*_finish): Don't call the above.
- * emultempl/hppaelf.em (hppaelf_finish): Likewise.
- * emultempl/ppc64elf.em (ppc_finish): Likewise.
-
-2005-07-05 Paul Brook <paul at codesourcery.com>
-
- * Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o.
- (eelf32ppcvxworks.o): Add dependencies.
- * Makefile.in: Regenerate.
- * configure.tgt: Add entry for powerpc-vxworks.
- * emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment.
- * emulparams/elf32ppcvxworks.sh: New file.
- * emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare.
- (is_ppc_elf32_vec): New function.
- (ppc_after_open, ppc_before_allocation,
- gld${EMULATION_NAME}_after_allocation): Use it.
-
-2005-07-05 Peter S. Mazinger" <ps.m at gmx.net>
-
- * emulparams/elf32bmip.sh (GENERATE_PIE_SCRIPT): Define as "yes".
- * emulparams/elf32bmipn32-defs.sh (GENERATE_PIE_SCRIPT): Define as "yes".
-
-2005-07-04 Mike Frysinger <vapier at gentoo.org>
-
- * emulparams/hppalinux.sh (GENERATE_PIE_SCRIPT): Fix typo in
- name.
-
-2005-07-04 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * emulparams/m32relf_linux.sh (GENERATE_PIE_SCRIPT): Set to yes.
-
-2005-07-04 Aurelien Jarno <aurel32 at debian.org>
-
- * emultempl/elf32.em: Enable use of ld.so.conf for *-*-k*bsd-*.
-
-2005-07-01 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempl/elf.sc (.gcc_except_table): Don't KEEP.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (check-DEJAGNU): Don't search for expect.
- * Makefile.in: Regenerate.
-
-2005-06-30 Ben Elliston <bje at gnu.org>
-
- * Makefile.am (EXPECT): Set to expect.
- (RUNTEST): Likewise, set to runtest.
- * Makefile.in: Regenerate.
-
-2005-06-16 Alexander Klimov <alserkli at inbox.ru>
-
- * emultempl/armelf.em: Add quotes to avoid a null test
- expression.
-
-2005-06-12 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld.texinfo (Command Line Options): Add @item for --hash-size.
-
-2005-06-10 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempt/elf.sc (.bss): Align tail in a way that allows
- empty section pruning.
-
-2005-06-09 Steve Ellcey <sje at cup.hp.com>
-
- * configure.in (AM_BINUTILS_WARNINGS): Add.
- (BFD_NEED_DECLARATION) Replace with AC_CHECK_DECLS.
- * config.in: Regenerate.
* configure: Regenerate.
- * sysdep.h (NEED_DECLARATION_*): Replace with HAVE_DECL_*
- * ldmain.c: Ditto.
-2005-06-09 Alan Modra <amodra at bigpond.net.au>
+2006-04-07 Bernhard Fischer <aldot at gcc.gnu.org>
- * ldexp.c (fold_unary <ALIGN_K>): Revert last change.
+ * ld.texinfo: Fix typo in documentation of --check-sections.
-2005-06-09 Alan Modra <amodra at bigpond.net.au>
+2006-04-07 Kaz Kojima <kkojima at rr.iij4u.or.jp>
- * ld.h (lang_phase_type): Move to..
- * ldexp.h: ..here. Add lang_mark_phase_enum.
- (node_type): Remove etree_undef and etree_unspec.
- (exp_data_seg): Delete.
- (struct ldexp_control, expld): New.
- (invalid, exp_mark_used_section): Delete.
- (exp_fold_tree, exp_get_vma, exp_get_value_int, exp_get_fill,
- exp_get_abs_int): Update prototypes.
- * ldexp.c (assigning_to_dot): Delete.
- (expld): Define.
- (make_abs): Operate directly on expld.result. Update all callers.
- (new_abs): Likewise. Return void.
- (new_rel_from_abs): Rename from new_rel_from_section.
- (new_rel, new_rel_from_abs): Operate on expld.result and return void.
- Update all callers.
- (fold_unary): Operate on expld.result and return void. Remove
- "current_section", "allocation_done", "dot", "dotp" and "mark_used"
- params. Update all callers.
- (fold_binary, fold_trinary, fold_name, exp_fold_tree_1): Likewise.
- (fold_unary <ALIGN_K>): Ensure alignment is absolute.
- (fold_unary <ABSOLUTE>): Use make_abs.
- (fold_unary <DATA_SEGMENT_END>): Evaluate mark_phase as for
- allocating_phase.
- (fold_binary <DATA_SEGMENT_ALIGN, DATA_SEGMENT_RELRO_END, >): Ditto.
- (fold_binary <'%','/'>): Don't error if marking.
- (fold_name <SIZEOF_HEADERS>): Don't call bfd_sizeof_headers when
- marking.
- (fold_name <NAME>): Remove FIXME; -R is handled correctly. Don't
- error when marking.
- (fold_name <ADDR, LOADADDR, SIZEOF>): Don't set SEC_KEEP.
- (exp_fold_tree_1): Don't error when marking.
- (exp_fold_tree_1 <etree_rel>): Evaluate in all phases except first.
- (exp_fold_tree_1 <etree_assign to dot>): Don't check for NULL
- current section, instead check for NULL dotp.
- (exp_fold_tree_1 <etree_provide>): Don't evaluate the assignment
- source unless the symbol is referenced and undefined.
- (exp_fold_tree): Remove "allocation_done" and "dot" params. Save
- params to expld.
- (exp_fold_tree_no_dot): Remove "current_section", "allocation_done
- and "mark_used" params. Save params to expld. Update all callers.
- (exp_assop): Do without temp var.
- (exp_print_tree <etree_undef>): Delete code.
- (exp_get_vma): Remove "allocation_done" param. Correct error return.
- (exp_get_fill, exp_get_abs_int): Likewise.
- (exp_get_value_int): Remove "allocation_done" param.
- (exp_mark_used_section): Delete.
- * ldgram.y (fill_exp): Update exp_get_fill call.
- (origin_spec, length_spec): Update exp_get_vma call.
- * ldlang.c (lang_init): Don't bother clearing lang_statement_iteration.
- (lang_mark_used_section_1, lang_mark_used_section): Delete.
- (strip_excluded_output_sections): Call one_lang_size_sections_pass in
- marking mode. Merge old lang_mark_used_section code. Correct handling
- of output sections with excluded input sections and data statements.
- Don't drop non-zero sized sections. Don't zap os->bfd_section.
- Do set SEC_EXCLUDE when appropriate.
- (print_output_section_statement): Update for changed ldexp.c
- interface.
- (print_assignment, lang_size_sections_1): Likewise.
- (lang_do_assignments_1, lang_enter_output_section_statement): Likewise.
- (lang_new_phdr, lang_record_phdrs): Likewise.
- (lang_size_sections): Likewise.
- (insert_pad): Use following statement if it is a pad, rather than
- creating a new one.
- (lang_size_sections_1 <lang_output_section_statement_enum>): Do
- process ignored output section to set vma and lma, but don't
- update dot for these sections. Don't error if marking.
- (lang_size_sections_1 <lang_assignment_statement_enum>): Don't
- update dot for ignored sections.
- (lang_size_sections_1 <lang_data_statement_enum>): Don't mark absolute
- section with SEC_ALLOC.
- (one_lang_size_sections_pass): New function.
- (lang_size_sections): Remove first five params. Set expld.phase on
- entry and exit. Use one_lang_size_sections_pass.
- (lang_do_assignments): Remove all params. Update all callers.
- (lang_reset_memory_regions): Clear os->processed for all output
- section statements.
- * ldlang.h (lang_do_assignments): Update prototype.
- (lang_size_sections): Likewise.
- (one_lang_size_sections_pass): Declare.
- * pe-dll.c (pe_dll_fill_sections, pe_exe_fill_sections): Update
- lang_size_sections and lang_do_assignments calls.
- * emultempl/elf32.em (layout_sections_again): Likewise.
- * emultempl/ppc64elf.em (ppc_before_allocation): Use
- one_lang_size_sections_pass.
+ * ldlang.c (load_symbols): Set as_needed and add_needed according
+ to the corresponding script's fields while processing it.
-2005-06-08 Aldy Hernandez <aldyh at redhat.com>
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
- * emulparams/elf32ms1.sh: New.
-
-2005-06-07 Eric Christopher <echristo at redhat.com>
-
- * Makefile.am (eelf32ms1.c): Use tab.
+ * Makefile.am: Add install-html, install-html-am, and
+ install-html-recursive targets.
* Makefile.in: Regenerate.
-
-2005-06-07 Aldy Hernandez <aldyh at redhat.com>
- Michael Snyder <msnyder at redhat.com>
- Stan Cox <scox at redhat.com>
-
- * configure.tgt: Same.
-
- * Makefile.am (ALL_EMULATIONS): Depend on eelf32ms1.o.
- (eelf32ms1.c): Add eelf32ms1.c rule.
-
- * Makefile.in: Regenerate.
-
-2005-06-06 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (ppc_before_allocation): Always run
- ppc64_elf_edit_opd.
-
-2005-06-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldexp.c (exp_mark_used_section): Set SEC_KEEP on current
- section only if the symbol will be defined.
-
-2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 992
- * ldexp.c (exp_mark_used_section): Set SEC_KEEP on current
- section for etree_assign, etree_provide and etree_provided.
- Call fold_binary on etree_binary.
-
- * ldlang.c (lang_mark_used_section_1): Handle load base.
-
-2005-06-03 Alan Modra <amodra at bigpond.net.au>
-
- * ldmain.c (link_callbacks): Add einfo.
- (add_archive_element): Use passed info, not link_info.
- (constructor_callback): Likewise.
- (reloc_overflow): Don't handle null bfd specially.
- (reloc_dangerous, unattached_reloc): Likewise.
- * ldmisc.c (vfinfo <B>): Print "ld generated" for null bfd.
- (vfinfo <C, D, G>): Handle null bfd. Wrap comments.
-
-2005-06-02 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.h (etree_value_type): Use "asection *" in place of
- "struct lang_output_section_statement_struct *" for "section".
- (exp_fold_tree): Likewise.
- (exp_mark_used_section): Likewise.
- * ldexp.c (new_rel, new_rel_from_section, fold_unary, fold_binary,
- fold_trinary, fold_name, exp_fold_tree_1, exp_fold_tree,
- exp_mark_used_section): Likewise for "current_section" param.
- (make_abs, new_abs, exp_binop, exp_unop, exp_get_vma, exp_get_fill,
- exp_get_abs_int): Adjust for above changes.
- * ldlang.c (lang_mark_used_section_1, print_assignment,
- lang_size_sections_1, lang_do_assignments_1): Likewise.
- * ldexp.c (fold_name): Init entire result struct.
-
-2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
-
- * emulparams/elf32btsmip.sh: Unset DATA_ADDR.
-
-2005-05-31 Zack Weinberg <zack at codesourcery.com>
-
- * ldlang.c (entry_symbol_default): New file-scope global.
- (lang_finish): Use it, not a hardwired "start".
- (lang_default_entry): Set it.
- * ldlang.h: Declare lang_default_entry.
- * emultempl/beos.em, emultempl/pe.em: Use lang_default_entry,
- not lang_add_entry, to override default entry point symbol.
-
-2005-05-29 Richard Henderson <rth at redhat.com>
-
- * emulparams/elf64alpha.sh (PLT): New.
- (TEXT_PLT): New.
- * emultempl/alphaelf.em (disable_relaxation): New.
- (limit_32bit): Rename from elf64alpha_32bit; update all users.
- (elf64_alpha_use_secureplt): Declare.
- (bfd_elf64_alpha_vec, bfd_elf64_alpha_freebsd_vec): Declare.
- (alpha_after_open): New.
- (alpha_before_allocation): New.
- (OPTION_NO_RELAX, OPTION_SECUREPLT, OPTION_NO_SECUREPLT): New.
- (PARSE_AND_LIST_LONGOPTS): Include them.
- (PARSE_AND_LIST_OPTIONS): Likewise.
- (PARSE_AND_LIST_ARGS_CASES): Likewise.
- (LDEMUL_AFTER_OPEN, LDEMUL_BEFORE_ALLOCATION): New.
- * scripttempl/elf.sc (TEXT_PLT): New.
- (PLT): Use it.
-
-2005-05-27 Andreas Schwab <schwab at suse.de>
-
- * configure.host (HOSTING_LIBS): Add libunwind.a if it exists.
-
-2005-05-24 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc32elf.em (after_allocation): Don't call
- ppc_elf_set_sdata_syms when relocatable.
-
-2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (ld.1): Revert the last 2 changes.
- (info-recursive): Depend on ld.1.
- * Makefile.in: Regenerated.
-
-2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (ld.1): Depend on "info" instead of
- "configdoc.texi ldver.texi".
- * Makefile.in: Regenerated.
-
-2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (ld.1): Depend on "info".
- * Makefile.in: Regenerated.
-
-2005-05-19 Zack Weinberg <zack at codesourcery.com>
-
- * Makefile.am: Have 'all' depend on 'info' and 'ld.1'.
- * Makefile.in: Regenerate.
-
-2005-05-17 Zack Weinberg <zack at codesourcery.com>
-
- * ld-arm/mixed-app.d: Adjust expected disassembly a little.
-
-2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am (ldver.texi): Don't use $<.
- * Makefile.in: Regenerated.
-
-2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am (AM_MAKEINFOFLAGS, TEXI2DVI): Explicitly include
- $(srcdir) before $(BFDDIR)/doc.
- * Makefile.in: Regenerated.
-
-2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 797
- * ldexp.c (exp_fold_tree_1): Renamed from exp_fold_tree and
- take take a bfd_boolean, mark_used. Ignore assert failure if
- mark_used is TRUE.
- (exp_fold_tree) Call exp_fold_tree_1 with mark_used == FALSE.
- (exp_fold_tree_no_dot): Updated to take a bfd_boolean,
- mark_used and pass down.
- (fold_unary): Likewise.
- (fold_binary): Likewise.
- (fold_trinary): Likewise.
- (exp_binop): Add FALSE to call to exp_fold_tree_no_dot.
- (exp_trinop): Likewise.
- (exp_unop): Likewise.
- (exp_nameop): Likewise.
- (exp_get_vma): Likewise.
- (exp_get_fill): Likewise.
- (exp_get_abs_int): Likewise.
- (fold_name): Likewise. Set SEC_KEEP in output section flags.
- (exp_mark_used_section): New.
-
- * ldexp.h (exp_mark_used_section): New.
-
- * ldlang.c (lang_output_section_statement_lookup_1): Set the
- ignored field to FALSE.
- (lang_mark_used_section_1): New.
- (lang_mark_used_section): Call lang_mark_used_section_1.
- (strip_excluded_output_sections): Call lang_mark_used_section
- and check for unused sections.
- (lang_size_sections_1): Skip an output section if it should
- be ignored.
- (lang_do_assignments_1): Likewise.
- (lang_process): Don't call lang_mark_used_section here.
-
- * ldlang.h (lang_output_section_statement_type): Change
- all_input_readonly to bitfield. Add ignored.
-
-2005-05-17 Lennert Buytenhek <buytenh at wantstofly.org>
- Peter S. Mazinger" <ps.m at gmx.net>
-
- * emulparams/armelf_linux.sh (GENERATE_PIE_SCRIPT): Define as "yes".
- * emulparams/hppalinux.sh (GENERATE_PIE_SCRIPT): Define as "yes".
-
-2005-05-17 Julian Brown <julian at codesourcery.com>
-
- * ldlang.c (print_assignment): Do not rely upon a valid result
- having a section associated with it.
-
-2005-05-17 Nick Clifton <nickc at redhat.com>
-
- * ldlang.c (Scan_for_self_assignment): Check an assignment tree to
- see if the same value is being used on the rhs as on the lhs.
- (print_assignment): Call scan_for_self_assignment and if it
- returns true, do no display the result of the computation but
- instead just the final value of the symbol on the lhs.
- * ld.texinfo: Document this behaviour and provide an example of
- when it will happen.
-
-2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am (AM_MAKEINFOFLAGS): Define.
- (TEXI2DVI): Define.
- (ldver.texi): Depend on distributed files instead of built files.
- (ld.info): Include $(srcdir) in the rule target. Remove actions.
- (ld.dvi): Remove actions.
- (MAINTAINERCLEANFILES): Add configdoc.texi.
- (CONFIG_STATUS_DEPENDENCIES): Add bfd/configure.in.
- (install-data-local): Renamed from install.
- (Makefile): Remove explicit dependency.
- * acinclude.m4: Remove obsolete code.
- * configure.in: Update AC_PREREQ. Remove extra $CONFIG_SHELL.
- * Makefile.in, aclocal.m4, config.in, configure: Regenerated.
-
-2005-05-11 Bob Wilson <bob.wilson at acm.org>
-
- * scripttempl/elfxtensa.sc: Sync up with elf.sc.
- * emulparams/elf32xtensa.sh (PLT, GOT): Define.
-
-2005-05-11 Alan Modra <amodra at bigpond.net.au>
-
- * ldgram.y: Add SPECIAL token.
- (sect_constraint): Handle SPECIAL.
- * ldlang.c (lang_output_section_find_1): Don't match SPECIAL.
- (map_input_to_output_sections): Likewise.
- * ldlex.l (SPECIAL): Define.
- * emulparams/elf32ppc.sh (DATA_GOT, SDATA_GOT, SEPARATE_GOTPLT,
- GOT, PLT, GOTPLT): Define.
- * emultempl/ppc32elf.em (old_plt, old_got): New static vars.
- (ppc_after_open): New function.
- (PARSE_AND_LIST_PROLOGUE): Define OPTION_OLD_LPT and OPTION_OLD_GOT.
- (PARSE_AND_LIST_LONGOPTS): Add "bss-plt" and "sdata-got".
- (PARSE_AND_LIST_OPTIONS): Document them.
- (PARSE_AND_LIST_ARGS_CASES): Handle them.
- (LDEMUL_AFTER_OPEN): Define.
- * scripttempl/elf.sc (PLT): Don't override existing define.
- (DATA_GOT, SDATA_GOT): Define and use to enable alternate got
- placement rather than using NO_SMALL_DATA. Emit GOTPLT for RELRO_NOW.
-
-2005-05-10 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempl/elf.sc (DATA_SEGMENT_RELRO_GOTPLT_END): Delete.
- (DATA_SEGMENT_RELRO_END): Use SEPARATE_GOTPLT value.
- (GOTPLT): Remove DATA_SEGMENT_RELRO_GOTPLT_END. Place after
- DATA_SEGMENT_RELRO_END in script.
-
-2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
- Don't use a removed section.
-
-2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldmain.c (reloc_overflow): Use output_bfd if the symbol
- is defined in the ABS section.
-
-2005-05-06 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_init_fini_syms):
- Put back !link_info.relocatable.
-
-2005-05-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 878
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_init_fini_syms):
- Just check link_info.executable.
-
-2005-05-06 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- aclocal.m4, deffile.h, deffilep.y, fdl.texi, ld.h, ldcref.c,
- ldctor.c, ldctor.h, ldemul.c, ldexp.c, ldexp.h, ldfile.c,
- ldfile.h, 20ldgram.y, ldint.texinfo, ldlang.c, ldlang.h, ldlex.h,
- ldlex.l, ldmain.c, ldmain.h, ldmisc.c, ldmisc.h, ldver.c, ldver.h,
- ldwrite.c, ldwrite.h, lexsup.c, mri.c, mri.h, pe-dll.c, pe-dll.h,
- sysdep.h, emultempl/aix.em, emultempl/alphaelf.em,
- emultempl/armcoff.em, emultempl/armelf.em, emultempl/beos.em,
- emultempl/crxelf.em, emultempl/elf32.em, emultempl/generic.em,
- emultempl/gld960.em, emultempl/gld960c.em, emultempl/hppaelf.em,
- emultempl/ia64elf.em, emultempl/irix.em, emultempl/linux.em,
- emultempl/lnk960.em, emultempl/m68hc1xelf.em,
- emultempl/m68kcoff.em, emultempl/m68kelf.em,
- emultempl/mipsecoff.em, emultempl/mmix-elfnmmo.em,
- emultempl/mmixelf.em, emultempl/mmo.em, emultempl/needrelax.em,
- emultempl/pe.em, emultempl/ppc32elf.em, emultempl/ppc64elf.em,
- emultempl/sh64elf.em, emultempl/sunos.em, emultempl/ticoff.em,
- emultempl/vanilla.em, emultempl/xtensaelf.em
-
-2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * scripttempl/elf.sc: Document the usage of __bss_start.
-
-2005-05-05 Paul Brook <paul at codesourcery.com>
-
- * Makefile.am: Add eelf_i386_vxworks.
- * Makefile.in: Regenerate.
- * configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
- * emulparams/elf_i386_vxworks.sh: New file.
- * emulparams/vxworks.sh: New file.
- * scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
-
-2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
- Call _bfd_elf_provide_section_bound_symbols.
-
-2005-05-04 Alan Modra <amodra at bigpond.net.au>
-
- * ldemul.c: Include bfdlink.h.
- (ldemul_before_allocation): Assume before_allocation is non-zero.
- (before_allocation_default): Call strip_excluded_output_sections.
- * ldlang.c (stripped_excluded_sections): New variable.
- (lang_add_section): Build input section list for each output
- section, attached via map_head and map_tail pointers.
- (strip_excluded_output_sections): Make global. Traverse the
- input section lists to find which output sections can go. Clear
- link_order pointers and set stripped_excluded_sections.
- (lang_process): Call strip_excluded_output_sections.
- * ldlang.h (strip_excluded_output_sections): Declare.
- * ldwrite.c: Update throuhout for link_order_head -> map_head change.
- * emultempl/aix.em (before_allocation): Call
- strip_excluded_output_sections.
- * emultempl/armcoff.em (before_allocation): Likewise.
- * emultempl/beos.em (before_allocation): Likewise.
- * emultempl/linux.em (before_allocation): Likewise.
- * emultempl/pe.em (before_allocation): Likewise.
- * emultempl/sunos.em (before_allocation): Likewise.
- * emultempl/elf32.em (before_allocation): Likewise. Call
- bfd_elf_size_dynsym_hash_dynstr too.
- * emultempl/lnk960.em (lnk960_before_allocation): Delete.
- (ld_lnk960): Use before_allocation_default.
-
-2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_strip_empty_section):
- Updated for bfd_section_list_remove change.
- * ldlang.c (lang_insert_orphan): Likewise.
- (strip_excluded_output_sections): Likewise.
- (sort_sections_by_lma): New.
- (lang_check_section_addresses): Sort the sections before
- checking addresses.
-
-2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
-
- * configure.tgt: Add h8300*-*-rtemscoff.
- Switch h8300*-*-rtems* to elf.
-
-2005-04-29 Ben Elliston <bje at au.ibm.com>
-
- * ldgram.y (lang_memory_region_type): Make static.
- (ldgram_want_filename): Likewise.
- * ldemul.c (ld_emulation): Make static.
- * ldfile.h (ldfile_find_command_file): Remove extern.
- * ldfile.c (ldfile_find_command_file): Make static.
- * ldlang.h (unique_section_list): Remove extern declaration.
- * ldlang.c (unique_section_list): Make static.
- * mri.h (symbol_truncate): Remove extern declaration.
- * mri.c (symbol_truncate): Make static.
- (order, only_load, address, alias): Likewise.
- (alignment, subalignment): Likewise.
-
-2005-04-27 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
- Use the first SEC_ALLOC section which isn't SEC_READONLY or the
- last SEC_ALLOC section if such a section doesn't exist.
-
-2005-04-24 Mark Kettenis <kettenis at gnu.org>
-
- * configure.host: Add *-*-openbsd support.
-
-2005-04-15 Julian Brown <julian at codesourcery.com>
-
- * ld.texinfo: Document --use-blx.
- * emultempl/armelf.em (use_blx): New variable.
- (arm_elf_create_output_section_statements): Communicate value of
- use_blx to bfd.
- (PARSE_AND_LIST_PROLOGUE): Add OPTION_USE_BLX.
- (PARSE_AND_LIST_OPTIONS): Add --use-blx option.
- (PARSE_AND_LIST_ARGS_CASES): Add OPTION_USE_BLX case.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
- * configure.in: Include ../bfd/warning.m4 contents.
- * Makefile.in: Regenerate.
+ * configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
+ * po/Make-in: Add install-html target.
-2005-04-12 Alan Modra <amodra at bigpond.net.au>
+2006-04-06 H.J. Lu <hongjiu.lu at intel.com>
- * Makefile.am: Run "make dep-am".
- (ldgram.o, ldlex.o, deffilep.o): Add -Wno-error to command.
- * Makefile.in: Regenerate.
- * config.in: Regenerate.
+ * emultempl/ia64elf.em: Set link_info.relax_pass to 2. Remove
+ link_info.need_relax_finalize.
-2005-04-11 Alan Modra <amodra at bigpond.net.au>
+ * ldlang.c (relax_sections): New.
+ (lang_process): Use. Call relax_sections link_info.relax_pass
+ times.
- * emultempl/elf32.em (gld${EMULATION_NAME}_stat_needed): Ignore
- as_needed libs that were not needed.
- (gld${EMULATION_NAME}_check_needed): Likewise.
+ * ldmain.c (main): Set link_info.relax_pass to 1. Remove
+ link_info.need_relax_finalize.
-2005-04-07 Nick Clifton <nickc at redhat.com>
+2006-04-05 Alan Modra <amodra at bigpond.net.au>
- * emultempl/m68kcoff.em: Include ldexp.h and ldlang.h so that
- ldfile.h can use the lang_input_statement type.
-
-2005-04-06 Jakub Jelinek <jakub at redhat.com>
-
- * ldlang.c: Formatting.
- (walk_wild_consider_section): Remember return value from wildcardp.
- (is_simple_wild): Use strcspn instead of 2 strpbrk calls and strlen.
- (wild_spec_can_overlap): Use strcspn instead of strpbrk and strlen.
-
-2005-04-06 Robert O'Callahan <rocallahan at novell.com>
-
- * ld.h (lean_section_userdata_type): Remove.
- (fat_section_userdata_type): Remove file field.
- (SECTION_USERDATA_SIZE): Remove.
- * ldlang.c (init_os): Eliminate initialization of unused
- lean_section_userdata_type.
-
- * ldlang.h (callback_t, walk_wild_section_handler_t): New
- typedefs.
- (struct lang_wild_statement_struct): Add walk_wild_section_handler
- and handler_data fields.
- * ldlang.c (callback_t): Removed.
- (walk_wild_consider_section, walk_wild_section_general,
- section_iterator_callback, find_section, is_simple_wild,
- match_simple_wild, walk_wild_section_specs1_wild0,
- walk_wild_section_specs1_wild1, walk_wild_section_specs2_wild1,
- walk_wild_section_specs3_wild2, walk_wild_section_specs4_wild2,
- wild_spec_can_overlap, analyze_walk_wild_section_handler): New
- functions.
- (lang_add_wild): Call analyze_walk_wild_section_handler.
- (walk_wild_section): Renamed to walk_wild_section_general and
- created a wrapper function.
- (section_iterator_callback_data): New typedef.
-
-2005-04-04 Nick Clifton <nickc at redhat.com>
-
- * configure.in: Add a check for <unistd.h> providing a prototype
- for getopt() which is compatible with the one in
- include/getopt.h. If so then define HAVE_DECL_GETOPT.
- * configure: Regenerate.
- * config.in (HAVE_DECL_GETOPT): Add.
- * ldemul.c: Include config.h
- * lexsup.c: Likewise.
- * emultempl/elf32.sc: Likewise.
-
-2005-03-29 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_layout_sections_again):
- New function, extracted from static void gld${EMULATION_NAME}_finish.
- (gld${EMULATION_NAME}_strip_empty_sections): Likewise.
- (gld${EMULATION_NAME}_provide_init_fini_syms): Likewise.
- * emultempl/ppc64elf.em: Revert last change.
- (ppc_layout_sections_again): Use
- gld${EMULATION_NAME}_layout_sections_again.
- (ppc_finish): Don't call gld${EMULATION_NAME}_finish. Instead call
- gld${EMULATION_NAME}_strip_empty_sections and
- gld${EMULATION_NAME}_provide_init_fini_syms.
- * emultempl/hppaelf.em: Similarly.
-
-2005-03-29 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (need_laying_out): Delete. Remove all refs.
- (ppc_finish): Don't call bfd_elf_discard_info.
- * emultempl/hppaelf.em: Similarly.
-
-2005-03-24 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2005-03-23 Mike Frysinger <vapier at gentoo.org>
- Nick Clifton <nickc at redhat.com>
-
- * configure.host: Accept any C library to accompany a GNU Linux
- implementation, not just the GNU C library.
- * configure.tgt: Likewise.
- * emultempl/elf32.em: Likewise.
-
-2005-03-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols): New
- (gld${EMULATION_NAME}_finish): Call
- gld${EMULATION_NAME}_provide_bound_symbols to provide
- __preinit_array_start, __preinit_array_end, __init_array_start,
- __init_array_end, __fini_array_start and __fini_array_end.
-
- * scripttempl/elf.sc: Don't provide __preinit_array_start,
- __preinit_array_end, __init_array_start, __init_array_end,
- __fini_array_start nor __fini_array_end.
-
-2005-03-23 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Set
- SEC_EXCLUDE on .gnu.warning sections.
-
-2005-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempl/elf.sc (SBSS): Don't provide sbss start and end syms.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc32elf.em (gld${EMULATION_NAME}_after_allocation): New
- function.
- (LDEMUL_AFTER_ALLOCATION): Define.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (ppc_finish): Rename from
- gld${EMULATION_NAME}_finish. Call gld${EMULATION_NAME}_finish.
- (LDEMUL_FINISH): Update.
- * emultempl/hppaelf.em (hppaelf_finish, LDEMUL_FINISH): Likewise.
- * emultempl/m68hc1xelf.em (m68hc11elf_finish, LDEMUL_FINISH): Likewise.
-
-2005-03-18 Julian Brown <julian at codesourcery.com>
-
- * scripttempl/armbpapi.sc (.rel.dyn): Add .rel.init_array,
- .rel.fini_array.
- (.rela.dyn): Add .rela.init_array, .rela.fini_array.
- (SECTIONS): Add .rel.other, .rela.other, .reli.other after PLT relocs.
-
-2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Don't set
- bfd_section when removing unused empty output sections for
- non-relocatable link.
-
-2005-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_insert_orphan): Use old section_tail rather than
- traversing the bfd section list to find pointer to new section.
-
-2005-03-18 Alan Modra <amodra at bigpond.net.au>
-
- * scripttempl/elf.sc: When CREATE_SHLIB, put .sdata2 and .sbss2
- input sections into .sdata and .sbss output respectively.
-
-2005-03-16 David Heine <dlheine at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * ldlang.c (IGNORE_SECTION): Remove check for zero size.
- (lang_check_section_addresses): Ignore zero size sections here.
-
-2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove
- unused empty output sections for non-relocatable link.
-
- * ld.h (args_type): Remove gc_sections.
-
- * ldlang.c (lang_mark_used_section): New.
- (lang_gc_sections): Use link_info.gc_sections instead of
- command_line.gc_sections.
- * ldmain.c (main): Likewise.
- * lexsup.c (parse_args): Likewise.
- * ldlang.c (lang_process): Call lang_mark_used_section.
-
- * ldmain.c (main): Initialize link_info.gc_sections to FALSE.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
-
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
- * configure: Regenerate.
-
-2005-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/elf32ppclinux.sh (OTHER_READWRITE_SECTION): Delete.
- (OTHER_RELRO_SECTIONS): Set this instead.
-
-2005-03-15 Nick Clifton <nickc at redhat.com>
-
- * NEWS: Add cutoff for changes in 2.16 release.
-
-2005-03-15 Mikkel Krautz <krautz at gmail.com>
-
- * configure.tgt (x86_64-elf): Add target.
-
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * po/es.po: Commit new Spanish translation.
-
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (exp_fold_tree): Ensure return value is initialized.
- Tidy etree_assert case.
-
-2005-03-14 Alan Modra <amodra at bigpond.net.au>
-
- * po/tr.po: Commit new Turkish translation.
-
-2005-03-11 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am: Remove references to em68klynx.o and esparclynx.o.
- * Makefile.in: Regenerated.
- * emulparams/m68klynx.sh, emulparams/sparclynx.sh: Remove.
-
-2005-03-07 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated translation.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/ld.pot: Regenerate.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * ldmain.c (remove_output): Use unlink_if_ordinary instead of unlink.
- * pe-dll.c (pe_dll_generate_implib): Likewise.
-
-2005-02-24 Ben Elliston <bje at au.ibm.com>
-
- * ldfile.c: Remove GNU960 conditional code.
- * emultempl/gld960.em: Likewise.
- * emultempl/gld960c.em: Likewise.
- * emultempl/lnk960.em: Likewise.
-
-2005-02-24 Nick Clifton <nickc at redhat.com>
-
- * emultempl/lnk960.em (lnk960_before_parse): Remove redundant
- empty string from calls to concat.
-
-2005-02-23 Nick Clifton <nickc at redhat.com>
-
- * emultempl/lnk960.em (lnk960_before_parse): Terminate list of
- arguments passed to concat() with a NULL.
-
- * emultempl/m68kcoff.em: Include ldexp.h and ldlang.h because they
- define types needed by ldfile.h
-
-2005-02-23 Alan Modra <amodra at bigpond.net.au>
-
- * pe-dll.c: Warning fixes.
- * emultempl/sunos.em: Likewise.
-
-2005-02-22 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ldlang.c (section_already_linked): Don't call
- bfd_section_already_linked for dynamic objects.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c: Warning fixes.
- * ldwrite.c: Likewise.
- * emultempl/elf32.em: Likewise.
-
-2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldlang.c (lang_add_section): Check SEC_TIC54X_BLOCK for TI
- tic54x input only.
- (lang_size_sections_1): Check SEC_COFF_SHARED_LIBRARY for COFF
- and ECOFF output only.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * config.in: Regenerate.
- * configure: Regenerate.
-
-2005-02-17 Zack Weinberg <zack at codesourcery.com>
-
- * ldexp.c (assigning_to_dot): New global flag.
- (fold_name): If assigning_to_dot is true, object immediately to
- an undefined symbol.
- (exp_fold_tree): Set and clear assigning_to_dot around the
- recursive call to exp_fold_tree to process the right-hand side
- of an assignment to the location counter.
-
-2005-02-17 Paul Brook <paul at codesourcery.com>
-
- * scripttempl/armbpabi.sc: Add dummy name to version block.
-
-2005-02-17 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (new_abs): Init new.str.
-
-2005-02-15 Mark Mitchell <mark at codesourcery.com>
-
- * configure.in (AC_CHECK_FUNCS): Add glob.
- * configure: Regenerated.
- * emultempl/elf32.em (<glob.h>): Do not include if HAVE_GLOB is
- not defined.
- (gld${EMULATION_NAME}_parse_ld_so_conf_include): Do not use glob
- if HAVE_GLOB is not defined.
-
-2005-02-16 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Define
- lib_path if NATIVE is yes.
-
-2005-02-16 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (ppc_create_output_section_statements): Make
- an error creating fake bfd fatal.
- (ppc_before_allocation): Continue on after errors.
- (gld${EMULATION_NAME}_finish): Likewise.
-
-2005-02-15 Nick Clifton <nickc at redhat.com>
-
- * ldlex.l (YY_NO_UNPUT): Define so that the yy_unput function is
- not declared. It is not used and its presence causes a compile
- time warning.
-
-2005-02-11 Zack Weinberg <zack at codesourcery.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_stat_needed):
- If st.st_ino is zero, do not treat the library as a duplicate.
-
-2005-02-10 Jakub Jelinek <jakub at redhat.com>
-
- * emultempl/hppaelf.em (hppaelf_create_output_section_statements):
- Set BFD_LINKER_CREATED on the stubs bfd.
- * emultempl/ppc64elf.em (ppc_create_output_section_statements):
- Likewise.
-
-2005-02-08 Mark Mitchell <mark at codesourcery.com>
-
- * scripttempl/armbpabi.sc (VERSION): Make special section symbols
- local.
- (Image$$ER_RO$$Base): Define whenever RELOCATING.
- (Image$$ER_RO$$Limit): Likewise.
- (SHT$$INIT_ARRAY$$Base): Likewise.
- (SHT$$INIT_ARRAY$$Limit): Likeise.
-
-2005-02-10 Ben Elliston <bje at au.ibm.com>
-
- * emultempl/beos.em: Remove #if 0 and #if 1 blocks.
-
-2005-02-08 Richard Sandiford <rsandifo at redhat.com>
-
- * configure.tgt (mips64*el-*-linux-gnu*): Define targ_extra_libpath
- to include o32 and n64 emulations.
- (mips64*-*-linux-gnu*): Likewise.
-
-2005-02-08 Hans-Peter Nilsson <hp at axis.com>
-
- * ldmain.c (warning_callback, warning_find_reloc): Prepend
- "warning: " to warning messages.
-
-2005-02-04 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_find_exp_assignment): Don't
- look up symbol for etree_provide here.
-
-2005-02-02 Daniel Jacobowitz <dan at codesourcery.com>
-
- * emulparams/elf32bmip.sh (TEXT_DYNAMIC): Always set.
-
-2005-02-01 Edward Welbourne <eddy at opera.com>
- Nick Clifton <nickc at redhat.com>
-
- * ld.texinfo (Source Code Reference): New node describing how to
- access linker script defined variables from source code.
-
-2005-02-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld.texinfo: Clarify --as-needed operation.
-
-2005-01-31 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * ldver.c (ldversion): Bump reported copyright date to 2005.
-
-2005-01-31 Nick Clifton <nickc at redhat.com>
-
- * configure.tgt: Remove obsolete targets m68k-lynxos and
- sparc-lynxos.
-
-2005-01-28 Julian Brown <julian at codesourcery.com>
-
- * emultempl/armelf.em (fix_v4bx): New variable.
- (arm_elf_create_output_section_statements): Communicate fix_v4bx flag
- value to bfd.
- (PARSE_AND_LIST_PROLOGUE): Add option token OPTION_FIX_V4BX.
- (PARSE_AND_LIST_LONGOPTS): Add option --fix-v4bx.
- (PARSE_AND_LIST_OPTIONS): Add option --fix-v4bx.
- (PARSE_AND_LIST_ARGS_CASES): Add option OPTION_FIX_V4BX.
- * NEWS: Mention --fix-v4bx.
- * ld.texinfo: Document --fix-v4bx.
-
-2005-01-25 Mark Mitchell <mark at codesourcery.com>
-
- * emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS): Define, so
- as to include .ARM.exidx$${Base,Limit}.
- * ld/scripttempl/armbpabi.sc: Move .plt to end of text segment.
- Define IMAGE$$ER_RO$${Base,Limit} and SHT$$INIT_ARRAY$${Base,Limit}.
- Put .init_array, .fini_array, etc. into the read-only data
- segment.
-
-2005-01-25 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_try_needed): Formatting.
- (gld${EMULATION_NAME}_after_open): Ignore needed libs if they were
- only needed by an as-needed lib that didn't get linked.
-
-2005-01-23 Alan Modra <amodra at bigpond.net.au>
-
- * ld.texinfo (Output Section Keywords <CONSTRUCTORS>): Correct
- __DTOR_LIST__ description.
-
-2005-01-23 Alan Modra <amodra at bigpond.net.au>
-
- * ld.texinfo (Location Counter <dot outside sections>): Document
- effects of orphan section placement, and ". = ." workaround.
+ * Makefile.am (GENSCRIPTS): Pass prefix.
* Makefile.in: Regenerate.
+ * genscripts.sh: Adjust for extra parameter.
+ * emultempl/elf32.em (parse_ld_so_conf): Return true iff file
+ exists.
+ (check_ld_so_conf): Use ${prefix}/etc/ld.so.conf if it exists.
+ * NEWS: Update.
-2005-01-22 Richard Sandiford <rsandifo at redhat.com>
+2006-04-05 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
- * emulparams/elf32bmip.sh (OTHER_GOT_SECTIONS): Add ". = .;".
- * emulparams/elf32bmipn32-defs.sh (OTHER_GOT_SECTIONS): Likewise.
-
-2005-01-21 Jakub Jelinek <jakub at redhat.com>
-
- * ldgram.y (AS_NEEDED): New token.
- (input_list): Handle AS_NEEDED ( input_list ).
- * ldlex.l (AS_NEEDED): Add.
- * ld.texinfo: Document AS_NEEDED ().
- * NEWS: Mention AS_NEEDED ().
-
-2005-01-21 Ben Elliston <bje at au.ibm.com>
-
- * ldlang.c (lang_reasonable_defaults): Remove.
- (lang_process): Don't call lang_reasonable_defaults.
-
- * ldexp.c (exp_assop): Remove #if 0'd code.
- (exp_print_tree): Likewise.
- * ldlang.c (lang_memory_region_lookup): Likewise.
- (open_output): Likewise.
- (lang_do_assignments_1): Likewise.
- (lang_place_orphans): Likewise.
- (lang_enter_output_section_statement): Likewise.
- (lang_reasonable_defaults): Likewise.
- * ldlang.h (struct lang_input_statement_struct): Likewise.
- * mri.c (mri_draw_tree): Likewise.
- (mri_load): Likewise.
- * pe-dll.c (generate_reloc): Likewise.
- (make_import_fixup_entry): Likewise.
- (pe_as16): Likewise.
- * emultempl/beos.em (set_pe_subsystem): Likewise.
- * emultempl/hppaelf.em (hppaelf_after_parse): Likewise.
- * emultempl/pe.em: Likewise.
- * emultempl/xtensaelf.em (xtensa_colocate_literals): Likewise.
-
-2005-01-20 Daniel Jacobowitz <dan at codesourcery.com>
-
- * Makefile.am (ALL_EMULATIONS): Add earmelfb_linux_eabi.o.
- (earmelfb_linux_eabi.c): New target.
- * Makefile.in: Regenerated.
- * configure.tgt (arm*b-*-linux-gnueabi): New target.
- * emulparams/armelfb_linux_eabi.sh: New file.
-
-2005-01-20 Nick Hudson <skrll at netbsd.org>
-
- PR ld/676
- * emultempl/hppaelf.em (hppaelf_create_output_section_statements):
- Handle bfd_elf32_hppa_nbsd_vec.
-
-2005-01-19 Richard Sandiford <rsandifo at redhat.com>
-
- * ldmain.h (ld_sysroot): Change type to a constant string.
- * ldmain.c (ld_sysroot): Likewise.
- (get_relative_sysroot, get_sysroot): New functions, adding command-line
- support for changing the sysroot.
- (main): Call the new functions.
- * lexsup.c (OPTION_SYSROOT): New.
- (ld_options): Add --sysroot.
- (parse_args): Add a dummy handler for it.
- * ld.texinfo (--sysroot): Document.
- * NEWS: Mention the new --sysroot option.
-
-2005-01-18 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (section_already_linked): Adjust bfd_link_just_syms call.
- (lang_place_orphans): Don't abort on just_syms_flag, instead call
- bfd_link_just_syms.
-
-2005-01-16 Danny Smith <dannysmith at users.sourceforge.net>
-
- * defilep.y (def_name, def_library): Combine into...
- (def_image_name): New function. Strip name to basename,
- with warning.
-
-2005-01-12 Mark Kettenis <kettenis at gnu.org>
-
- * configure.in: Be sure to invoke config.sub using the shell.
- * configure: Regenerate.
-
-2005-01-11 Alan Modra <amodra at bigpond.net.au>
-
- * configure.host: Correct sed patterns for last change.
-
-2005-01-10 Nick Clifton <nickc at redhat.com>
-
- PR binutils/609
- * ldmisc.c (vfinfo): Add an extra argument: is_warning. Use this
- to determine whether config.make_executable should be set to FALSE in
- conjunction with config.fatal_warnings.
- (info_msg, minfo, lfinof): Pass FALSE as the extra argument.
- (einfo): Pass TRUE as the extra argument.
-
-2005-01-10 Greg Schaffer <gschafer at zip.com.au>
-
- * configure.host (linux targets): Use "${CC} -dumpspecs" instead
- of "${CC} --print-file-name=specs" to appease GCC versions >= 4.0.
- (ia64-*-aix): Delete - this target is obsolete, and would be
- broken by this patch.
-
-2005-01-06 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * configure.host (sparc*-*-solaris2*): Rename into sparc-*-solaris2*.
- (sparc64-sun-solaris2*): New host.
-
-2005-01-06 Paul Brook <paul at codesourcery.com>
-
- * Makefie.am: Add earmelf_vxworks.
+ * configure.tgt (sparc*-*-vxworks*): New stanza.
+ * emulparams/elf32_sparc_vxworks.sh: New file.
+ * Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_vxworks.o.
+ (eelf32_sparc_vxworks.c): New rule.
* Makefile.in: Regenerate.
- * configure.tgt: Make arm-*-vxworks a separate case.
- * emulparams/armelf_vxworks.sh: New function.
-2005-01-06 Alan Modra <amodra at bigpond.net.au>
+2006-04-04 Eric Botcazou <ebotcazou at adacore.com>
- * emultempl/ppc64elf.em (no_multi_toc): New var.
- (gld${EMULATION_NAME}_finish): Pass to ppc64_elf_setup_section_lists.
- (OPTION_NO_MULTI_TOC): Define.
- (PARSE_AND_LIST_LONGOPTS): Add --no-multi-toc support.
- (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
+ * ldlang.c (lang_map): Print the list of discarded input sections.
+ (print_input_section): Change parameter and print zero-sized sections.
+ (print_statement): Adjust call to print_input_section.
-2005-01-05 Nick Clifton <nickc at redhat.com>
+2006-04-01 Danny Smith <dannysmith at users.sourceforge.net>
- PR binutils/614
- * ldmisc.c (vfinfo): Alter output to conform to the GNU Coding
- Standard's specification for parsable error messages.
+ * deffilep.y (def_image_name): If LIBRARY or NAME statement
+ specifies an empty string, retain the name specified on command
+ line.
+ * ld.texinfo: Document above.
-2005-01-04 Paul Brook <paul at codesourcery.com>
+2006-03-31 Jakub Jelinek <jakub at redhat.com>
- * Makefile.am: Correct dependency for earmsymbian.c.
- * Makefile.in: Regenerate.
+ * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
+ bfd_find_nearest_line succeeded for %C or %D, but filename
+ is NULL, print section+offset at the end.
-2004-12-28 Danny Smith <dannysmith at users.sourceforge.net>
+2006-03-25 Bernd Schmidt <bernd.schmidt at analog.com>
- * emultempl/pe.em (set_pe_subsystem): Change second arg to
- lang_add_entry to FALSE.
-
-2004-12-23 Nick Clifton <nickc at redhat.com>
-
- PR 600
- * emulparams/shelf.sh (.stack): Increase stack start address to
- 0x300000.
-
-2004-12-20 Nick Clifton <nickc at redhat.com>
-
- * ldmain.c (main): Issue an error message if -static and -shared
- are used together.
-
-2004-12-17 Jakub Jelinek <jakub at redhat.com>
-
- * ldexp.h (exp_data_seg): Add min_base and maxpagesize fields.
- * ldexp.c (fold_binary) <case DATA_SEGMENT_ALIGN>: Initialize them.
- * ldlang.c (lang_size_sections): Use them to avoid wasting virtual
- address space at DATA_SEGMENT_ALIGN. Fix computation of expected
- PT_GNU_RELRO segment end.
-
-2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
-
- * configure.tgt: Add s390x-ibm-tpf support.
-
-2004-12-16 Martin Kögler <mkoegler at auto.tuwien.ac.at>
-
- * ldmisc.c (vfinfo): Handle the case where %B is passed a NULL
- BFD.
-
-2004-12-07 Ben Elliston <bje at gnu.org>
-
- * ldemul.h: Forward declare struct option.
-
-2004-12-01 Danny Smith <dannysmith at users.sourceforge.net>
-
- * scripttempl/pe.sc (.data): Add .jcr subsection.
-
-2004-11-30 Paul Brook <paul at codesourcery.com>
-
- * emultempl/armelf.em: Ignore -p and -no-pipeline-knowledge.
-
-2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
-
- * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ * emulparams/elf32bfinfd.sh: New file.
+ * emultempl/bfin.em: Delete.
+ * emulparams/bfin.sh: Lose reference to bfin.em.
+ * Makefile.am (eelf32bfin.c): Likewise.
+ (eelf32bfinfd.c): New.
* Makefile.in: Regenerate.
+ * configure.tgt (bfin-*-elf, bfin-*-uclinux): Add elf32bfinfd to
+ targ_extra_emuls.
-2004-11-26 Melissa Mears <asterisk at graces.dricas.com>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Mark Mitchell <mark at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
- * emultempl/pe.em: Add --subsystem:xbox as well as
- --subsystem:%d.
- * ld.texinfo: (ld_options): Document acceptance of subsystem xbox
- and numeric subsystems.
-
-2004-11-24 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (fold_name): Correct PR 338 fix.
-
-2004-11-19 Mark Mitchell <mark at codesourcery.com>
-
- * Makefile.am (ALL_EMULATIONS): Add earmelf_linux_eabi.o.
- (earmelf_linux_eabi.c): New target.
- * configure.tgt (arm*-*-linux-gnueabi): Handle it.
- * emulparams/armelf_linux_eabi.sh: New file.
- * Makefile.in: Regenerated.
-
-2004-11-19 Nick Clifton <nickc at redhat.com>
-
- PR 518
- * ld.texinfo (MEMORY): Update the descriptions of the ORIGIN and
- LENGTH fields in the MEMORY command, to explicitly state that
- symbols cannot be used in their expressions.
-
-2004-11-19 Jon Beniston <jon at beniston.com>
-
- * ld/ldlex.l: Allow ORIGIN and LENGTH in EXPRESSION.
- * ld/ldgram.y: Add ORIGIN and LENGTH expressions.
- * ld/ldexp.c (fold_name): Implement LENGTH() and ORIGIN() functions
- which return the length and origin of a memory.
- * ld/ld.texinfo: Document LENGTH() and ORIGIN() functions.
- * NEWS: Mention support for ORIGIN and LENGTH operators.
-
-2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use
- a dynamic object for stubs.
-
-2004-11-04 Paul Brook <paul at codesourcery.com>
-
- * ld.texinfo: Document --default-imported-symver.
- * ldmain.c (main): Set link_info.default_imported_symver.
- * lexsup.c (option_values): Add OPTION_DEFAULT_IMPORTED_SYMVER.
- (ld_options): Add --default-imported-symver.
- (parse_args): Handle OPTION_DEFAULT_IMPORTED_SYMVER.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * Makefile.am: Add entries for new maxq-coff target.
+ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
+ separate VxWorks emulations.
+ * emulparams/elf32ebmipvxworks.sh: New file.
+ * emulparams/elf32elmipvxworks.sh: New file.
+ * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
+ eelf32elmipvxworks.o.
+ (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
- * configure.tgt: Add support for maxq.
- * emulparams/maxqcoff.sh: New File.
- * scripttempl/maxqcoff.sc: New linker script for target maxq.
- * NEWS: Mention the new target.
-2004-11-04 Daniel Jacobowitz <dan at debian.org>
+2006-03-16 Alan Modra <amodra at bigpond.net.au>
- * Makefile.am (ALL_EMULATIONS): Remove earmelf_oabi.o.
- (earmelf_oabi.c): Remove rule.
- * configure.tgt: Remove arm-*-oabi and thumb-*-oabi.
- * emulparams/armelf_oabi.sh, emultempl/armelf_oabi.em: Delete files.
- * Makefile.in: Regenerated.
+ PR 2434
+ * ldcref.c (add_cref): Adjust bfd_hash_table_init calls.
+ * ldlang.c (output_statement_table_init, lang_init): Likewise.
+ * ldmain.c (add_ysym, add_wrap, add_keepsyms_file): Likewise.
+ (undefined_symbol): Likewise.
-2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+2006-03-07 Richard Sandiford <richard at codesourcery.com>
+ Daniel Jacobowitz <dan at codesourcery.com>
+ Zack Weinberg <zack at codesourcery.com>
+ Nathan Sidwell <nathan at codesourcery.com>
+ Paul Brook <paul at codesourcery.com>
+ Ricardo Anguiano <anguiano at codesourcery.com>
+ Phil Edwards <phil at codesourcery.com>
- * configure.tgt (crisv32-*-*): Handle like cris-*-* for non-aout.
- * emulparams/criself.sh (INIT_START): Remove emitted "push srp".
- (FINI_START): Ditto.
- (INIT_END): Remove emitted "jump [sp+]".
- (FINI_END): Ditto.
-
-2004-11-04 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (no_tls_opt): Rename from notlsopt.
- (no_opd_opt, no_toc_opt): New static vars.
- (ppc_before_allocation): Don't edit opt if no_opd_opt. Call
- ppc64_elf_edit_toc.
- (OPTION_NO_OPD_OPT, OPTION_NO_TOC_OPT): Define.
- (PARSE_AND_LIST_LONGOPTS): Add no-opd-optimize and no-toc-optimize.
- (PARSE_AND_LIST_OPTIONS): Describe new options.
- (PARSE_AND_LIST_ARGS_CASES): Handle them.
-
-2004-10-27 Nick Clifton <nickc at redhat.com>
-
- * emultempl/alphaelf.em (alpha_after_parse): Add extra, NULL,
- parameter to invocation of lang_section_start.
- * emultempl/aix.em (_handle_option): Likewise.
-
- * Makefile.am (eelf64alpha.c, eelf64alpha_fbsd.c,
- eelf64alpha_nbsd.c): Add dependency upon emultempl/alphaelf.em.
+ * emulparams/armelf_vxworks.sh: Include vxworks.sh.
+ (MAXPAGESIZE): Define.
+ * emulparams/vxworks.sh: Undefine EMBEDDED.
+ * Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
-2004-10-26 Mark Mitchell <mark at codesourcery.com>
+2006-03-03 Bjoern Haase <bjoern.m.haase at web.de>
- * emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Do not emit
- __exidx_{start,end} when not relocating.
+ * scripttempl/avr.sc: Add *(.jumptables) *(.lowtext) sections.
+ Add KEEP() directives.
+ Add *(.data*) *(.rodata) and *(.rodata*) and *(.bss*) to .data and
+ .bss output sections.
-2004-10-25 Mark Mitchell <mark at codesourcery.com>
+2006-03-03 Richard Sandiford <richard at codesourcery.com>
- * Makefile.in (earmsymbian.c): Depend on armbpabi.sc, not elf.sc.
- * ldexp.h (segment_type): New type.
- (segments): New variable.
- * ldexp.c (segments): New variable.
- (exp_print_token): Handle SEGMENT_START.
- (fold_binary): Likewise.
- * ldgram.y (SEGMENT_START): Declare it as a token.
- (exp): Handle SEGMENT_START.
- * ldlang.h (lang_address_statement_type): Add segment field.
- (lang_section_start): Change prototype.
- * ldlang.c (map_input_to_output_sections): Do not process section
- assignments if a corresponding SEGMENT_START has already been
- seen.
- (lang_section_start): Add segment parameter.
- * ldlex.l (SEGMENT_START): Add it.
- * lexsup.c (seg_segment_start): New function.
- (parse_args): Use it for -Tbss, -Tdata, and -Ttext.
- * ld.texinfo (SEGMENT_START): Document it.
- * emulparams/armsymbian.sh (EMBEDDED): Set it.
- * scripttempl/armbpabi.sc: Use SEGMENT_START to control segment
- base addresses. Do not map relocations.
- * NEWS: Mention SEGMENT_START.
-
-2004-10-26 Paul Brook <paul at codesourcery.com>
-
- * ld.texinfo: Document --default-symver.
- * ldmain.c (main): Set link_info.create_default_symver.
- * lexsup.c (enum option_values): Add OPTION_DEFAULT_SYMVER.
- (ld_options): Add default-symver.
- (parse_args): Handle OPTION_DEFAULT_SYMVER.
-
-2004-10-24 Danny Smith <dannysmith at users.sourceforge.net>
-
- * pe-dll.c (process_def_file): Don't export all symbols by default if
- building a position-independent executable.
-
-2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 463
- * ldmain.c (reloc_overflow): Accept a pointer to struct
- bfd_link_hash_entry. Report symbol location for relocation
- overflow.
-
-2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
-
- * genscripts.sh (libpath.exp): Really generate for first
- emulation only.
-
-2004-10-19 Danny Smith <dannysmith at users.sourceforge.net>
-
- * emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Simplify
- comparison and replacement of filenames.
-
-2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 459
- * ldlang.c (load_symbols): Use the same -Bdynamic/-Bstatic
- option on linker script as the one for linker script.
-
-2004-10-16 Daniel Jacobowitz <dan at debian.org>
-
- * ldlang.c (struct excluded_lib, excluded_libs, add_excluded_libs)
- (check_excluded_libs): New.
- (load_symbols): Call check_excluded_libs.
- * ldlang.h (add_excluded_libs): New prototype.
- * emultempl/elf32.em (OPTION_EXCLUDED_LIBS): Define.
- (gld${EMULATION_NAME}_add_options): Add --exclude-libs.
- (gld${EMULATION_NAME}_handle_option): Handle --exclude-libs.
- * ld.texinfo (Command Line Variables): Document --exclude-libs.
- (Options Specific to i386 PE Targets): Remove --exclude-libs.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (exp_fold_tree): Don't immediately exit ld on a
- failing link script assert.
-
- * ldctor.c (ldctor_add_set_entry): Fix comment typo.
-
-2004-10-14 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 445
- * emulparams/elf64_ia64.sh (SMALL_DATA_CTOR): Set.
- (SMALL_DATA_DTOR): Set.
- * emulparams/elf64_ia64_fbsd.sh (SMALL_DATA_CTOR): Unset.
- (SMALL_DATA_DTOR): Unset.
- * scripttempl/elf.sc: If SMALL_DATA_CTOR is set, move .ctors
- after .data. If SMALL_DATA_DTOR is set, move .dtors after
- .data.
-
-2004-10-14 Alan Modra <amodra at bigpond.net.au>
-
- PR 63
- * ldlang.h (lang_output_section_statement_type): Make "next" a
- struct lang_output_section_statement_struct *.
- (struct orphan_save): Move from elf32.em. Add "name" and "flags".
- (lang_output_section_find_by_flags, lang_insert_orphan): Declare.
- * ldlang.c (lang_output_section_find_1): Adjust for changed
- output_section_statement "next".
- (strip_excluded_output_sections): Likewise.
- (lang_record_phdrs): Likewise.
- (lang_output_section_find_by_flags): New function.
- (output_prev_sec_find): Move from pe.em. Adjust iterator.
- (lang_insert_orphan): New function. Tail end of elf32.em's
- place_orphan merged with that from pe.em. Allow bfd_section to
- be placed first. New heuristic for placing new output section
- statement in existing script, and accompanying split of __start
- symbol alignment into a separate assignment to dot.
- (lang_add_section): Consistently use output->bfd_section rather than
- an alias, section->output_section.
- (map_input_to_output_sections): Rename overly long arg. Move
- initialization of data_statement output section to here..
- (lang_check_section_addresses): ..from here.
- (print_assignment): Correct printing of etree_assert.
- (print_all_symbols): Don't bomb if userdata is NULL.
- (IGNORE_SECTION): Rearrange.
- * emultempl/elf32.em (output_rel_find): Adjust interator.
- (output_prev_sec_find): Delete.
- (struct orphan_save): Delete.
- (gld${EMULATION_NAME}_place_orphan): Cater for zero bfd_section
- flags without creating a duplicate output section statement.
- Revise code holding history of various orphan section placements.
- Allow orphan sections to place before script specified output
- sections. Call lang_output_section_find_by_flags when placement
- by name fails. Use lang_insert_orphan.
- * emultempl/mmo.em (output_prev_sec_find): Delete.
- (struct orphan_save): Delete.
- (mmo_place_orphan): Revise code holding history of orphan placement.
- Allow orphans to place before existing output sections. Use
- lang_insert_orphan.
- * emultempl/pe.em (output_prev_sec_find): Delete.
- (struct orphan_save): Delete.
- (gld_${EMULATION_NAME}_place_orphan): Revise to suit use of
- lang_insert_orphan.
-
-2004-10-13 Mark Mitchell <mark at codesourcery.com>
-
- * scripttempl/armbpabi.sc: Do not put .gnu.version.* into a
- loadable segment.
-
-2004-10-13 Alan Modra <amodra at bigpond.net.au>
-
- PR 44
- * ldcref.c (check_section_sym_xref): Delete.
- (check_local_sym_xref): New function.
- (check_nocrossrefs): Adjust call.
- * emultempl/pe.em (struct orphan_save): Add os_tail.
- (place_orphan): Backport assorted fixes from elf32.em.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * emultempl/xtensaelf.em: Use ISO C90 formatting.
-
-2004-10-11 Jakub Jelinek <jakub at redhat.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_parse_ld_so_conf): Avoid
- getline for portability.
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_ld_so_conf): New structure.
- (gld${EMULATION_NAME}_parse_ld_so_conf,
- gld${EMULATION_NAME}_parse_ld_so_conf_include): New functions.
- (gld${EMULATION_NAME}_check_ld_so_conf): Use them.
-
-2004-10-11 Alan Modra <amodra at bigpond.net.au>
-
- PR 423
- * ldfile.c (ldfile_try_open_bfd): Ensure dynamic objects are
- rejected when linking statically.
-
-2004-10-08 Daniel Jacobowitz <dan at debian.org>
-
- * configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
-
- * ld.texinfo (Xtensa): Describe new linker relaxation to optimize
- assembler-generated longcall sequences. Describe new --size-opt
- option.
- * emulparams/elf32xtensa.sh (OTHER_SECTIONS): Add .xt.prop section.
- * emultempl/xtensaelf.em (remove_section,
- replace_insn_sec_with_prop_sec, replace_instruction_table_sections,
- elf_xtensa_after_open): New.
- (OPTION_OPT_SIZEOPT, OPTION_LITERAL_MOVEMENT,
- OPTION_NO_LITERAL_MOVEMENT): Define.
- (elf32xtensa_size_opt, elf32xtensa_no_literal_movement): New globals.
- (PARSE_AND_LIST_LONGOPTS): Add size-opt and [no-]literal-movement.
- (PARSE_AND_LIST_OPTIONS): Add --size-opt.
- (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_OPT_SIZEOPT,
- OPTION_LITERAL_MOVEMENT, and OPTION_NO_LITERAL_MOVEMENT.
- (LDEMUL_AFTER_OPEN): Set to elf_xtensa_after_open.
- * scripttempl/elfxtensa.sc: Update with changes from elf.sc.
- * Makefile.am (eelf32xtensa.c): Update dependencies.
+ * emulparams/vxworks.sh (VXWORKS_BASE_EM_FILE): New variable.
+ (EXTRA_EM_FILE): Define.
+ * emultempl/vxworks.em: New file.
+ * ld.texinfo (--force-dynamic): Document.
+ * Makefile.am (eelf32ppcvxworks.cm, eelf_i386_vxworks.c): Depend
+ on vxworks.em.
* Makefile.in: Regenerate.
-2004-10-07 Jeff Baker <jbaker at qnx.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * lexsup.c: Handle --warn-shared-textrel option.
- (ld_options): Restore alpha sorting of options.
- * ldmain.c (main): Initialise warn_shared_info field to FALSE.
- * ld.texinfo: Add documentation for --warn-shared-textrel.
- * NEWS: Added mention of --warn-shared-textrel option.
-
-2004-10-05 Tomer Levi <Tomer.Levi at nsc.com>
-
- * emultempl/crxelf.em (disable_relaxation): Add.
- (crxelf_before_allocation): Enable --relax option by default.
- (PARSE_AND_LIST_PROLOGUE): Add OPTION_NO_RELAX.
- (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-relax.
- (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_NO_RELAX.
-
-2004-10-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * NEWS: Mention SORT_BY_NAME, SORT_BY_ALIGNMENT and
- --sort-section name|alignment.
-
- * ld.texinfo: Document SORT_BY_NAME, SORT_BY_ALIGNMENT and
- --sort-section name|alignment.
-
- * ld.h (sort_type): New enum.
- (wildcard_spec): Change the type of `sorted' to sort_type.
-
- * ldgram.y (SORT): Removed.
- (SORT_BY_NAME): Added.
- (SORT_BY_ALIGNMENT): Added.
- (wildcard_spec): Updated `sorted'. Handle SORT_BY_NAME and
- SORT_BY_ALIGNMENT.
- (input_section_spec_no_keep): Updated `sorted'.
- (statement): Replace SORT with SORT_BY_NAME.
-
- * ldlang.c (compare_section): New function to compare 2
- sections with different sorting schemes.
- (wild_sort): Updated. Use compare_section.
- (update_wild_statements): New function.
- (lang_process): Call update_wild_statements before
- map_input_to_output_sections.
-
- * ldlex.l (SORT_BY_NAME): New.
- (SORT_BY_ALIGNMENT): New.
- (SORT): Return SORT_BY_NAME.
-
- * ldmain.c (sort_section): New. Defined.
- (main): Initialize it to none.
-
- * lexsup.c (option_values): Add OPTION_SORT_SECTION.
- (ld_options): Add an entry for OPTION_SORT_SECTION.
- (parse_args): Handle OPTION_SORT_SECTION.
-
- * mri.c (mri_draw_tree): Updated `sorted'.
-
-2004-10-04 Jakub Jelinek <jakub at redhat.com>
-
- * ldgram.y (DATA_SEGMENT_RELRO_END): Add one argument.
- * scripttempl/elf.sc (DATA_SEGMENT_RELRO_END): Add 0 as first
- argument.
- (DATA_SEGMENT_RELRO_GOTPLT_END): Pass $SEPARATE_GOTPLT as first
- and . as second argument.
- (GOTPLT): Move $DATA_SEGMENT_RELRO_GOTPLT_END before the section.
- * ldexp.c (fold_unary): Remove DATA_SEGMENT_RELRO_END handling here.
- (fold_binary): Add it here. Insert padding to make relro_end
- COMMONPAGESIZE bytes aligned. For DATA_SEGMENT_ALIGN in
- exp_dataseg_relro_adjust phase just use previously computed
- exp_data_seg.base.
- * ldlang.c (lang_size_sections): Set exp_data_seg.base for
- relro_adjust here. Call lang_size_sections_1 once more if there
- was too big padding at DATA_SEGMENT_RELRO_END.
- * ld.texinfo (DATA_SEGMENT_RELRO_END): Add documentation.
-
-2004-10-01 Paul Brook <paul at codesourcery.com>
-
- * emulparams/armelf.sh: Add unwinding table sections.
-
-2004-09-30 Filip Navara <navaraf at reactos.com>
-
- * emultempl/pe.em (gld_${EMULATION_NAME}_set_symbols): Generate
- correct base address for position independant executables.
- * pe-dll.c (pe_dll_fill_sections): Don't mark position independant
- executables as DLLs.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * ld.texinfo: Document --target2=abs.
- * emulparms/armsymbian.sh (TARGET2_TYPE): Set.
-
-2004-09-29 Nick Clifton <nickc at redhat.com>
-
- * scripttempl/xstormy16.sc: Only perform the assignments to the
- ROM region when not performing a relocatable link. The ROM region
- does not start at address 0, but the sections will.
- * Makefile.am: Fix linker script dependency for the generation of
- eelf32xstormy16.c.
+ * emulparams/elf32ppccommon.sh: New file, extracted from...
+ * emulparams/elf32ppc.sh: ...here.
+ * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh
+ instead of elf32ppc.sh.
+ (BSS_PLT): Remove override.
+ * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h.
+ (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise.
+ (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise.
+ (eelf32ppclinux.c): Likewise.
+ (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency.
* Makefile.in: Regenerate.
-2004-09-18 Filip Navara <navaraf at reactos.com>
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
- * emulparams/arm_epoc_pe.sh, emulparams/armpe.sh, emulparams/i386pe.sh,
- emulparams/i386pe_posix.sh, emulparams/mcorepe.sh,
- emulparams/mipspe.sh, emulparams/ppcpe.sh, scripttempl/pe.sc: Define
- TARGET_PAGE_SIZE.
- * scripttempl/pe.sc: Make the virtual address and file offset synced if
- the alignment is lower than the target page size.
-
-2004-09-27 Filip Navara <navaraf at reactos.com>
-
- * emultempl/pe.em (gld_${EMULATION_NAME}_unrecognized_file): Allow
- def_file_parse to handle pe_def_file if NULL and prevent crash with
- invalid .def files.
-
-2004-09-27 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Enable
- --emit-stub-syms automatically when --emit-relocs.
-
-2004-09-24 Paul Brook <paul at codeosurcery.com>
-
- * scripttempl/elf.sc: Keep .preinit_array, .init_array and
- .fini_array sections.
-
-2004-09-19 Andreas Schwab <schwab at suse.de>
-
- * ldexp.c (fold_binary) [DATA_SEGMENT_ALIGN]: Adjust data segment
- base so that relro end is suitably aligned.
-
-2004-09-17 Paul Brook <paul at codesourcery.com>
-
- * ld.texinfo: Rename arm-specific section. Document --target*
- * emulparams/armelf_fbsd.sh: Set TARGET2_TYPE.
- * emulparams/armelf_linux.sh: Ditto.
- * emulparams/armelf_nbsd.sh: Ditto.
- * emultempl/armelf.em: Set default for TARGET2_TYPE.
- (target2_type): New variable.
- (arm_elf_before_allocation): Don't pass target1_type.
- (arm_elf_create_output_section_statements): New function.
- (PARSE_AND_LIST_PROLOGUE): Add OPTION_TARGET2.
- (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --target=.
- (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_TARGET2.
- (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Set.
- * emultempl/armelf_oabi.em (_before_allocation): Remove extra
- argument to bfd_elf32_arm_process_before_allocation.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (fold_name): Update u.undef.next refs.
- * emultempl/pe.em: Likewise.
- * emultempl/sunos.em: Likewise.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
+ * Makefile.am: Add html target.
* Makefile.in: Regenerate.
- * config.in: Regenerate.
- * configure: Regenerate.
- * aclocal.m4: Regenerate.
- * po/ld.pot: Regenerate.
+ * po/Make-in: Add html target.
-2004-09-16 Tomer Levi <Tomer.Levi at nsc.com>
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
- * scripttempl/elf32crx.sc (.init): Add KEEP for section's *personality*.
- (.fini): Likewise.
- (.jcr): Likewise.
-
-2004-09-16 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/armelf_oabi.em (before_allocation): Add extra zero param
- to bfd_elf32_arm_process_before_allocation call.
-
-2004-09-13 Paul Brook <paul at codesourcery.com>
-
- * emulparams/armsymbian.sh: Set TARGET1_IS_REL.
- * emultempl/armelf.em: Use TARGET1_IS_REL. Add --target1-{rel,abs}.
-
-2004-09-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * configure: Regenerated with autconfig 2.13.
-
-2004-09-07 Andreas Schwab <schwab at suse.de>
-
- * ldexp.c (fold_binary) [DATA_SEGMENT_ALIGN]: Apply data segment
- alignment before adjusting DATA_SEGMENT_RELRO_END.
-
-2004-09-06 Mark Mitchell <mark at codesourcery.com>
-
- * emulparams/armsymbian.sh: Use armbpabi script.
- * scripttempl/armbpabi.sc: New script.
-
-2004-09-02 Mark Mitchell <mark at codesourcery.com>
-
- * Makefile.am (ALL_EMULATIONS): Add earmsymbian.o.
- (earmsymbian.c): New target.
- * configure.tgt: Use armsymbian emulation for arm*-*-symbianelf*.
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
- * configure: Likewise.
- * emulparams/armsymbian.sh: New file.
-
-2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
-
- * scripttempl/elf32crx.sc: Edit file with comments.
- (.init): Add new section.
- (.fini): Likewise.
- (.ctor): Control the linkage order.
- (.dtor): Likewise.
-
-2004-08-27 Nick Clifton <nickc at redhat.com>
-
- * emultempl/pe.em (after_open): Do not assume that either bfd is
- an archive.
-
-2004-08-26 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_init): Don't compare with TRUE.
-
-2004-08-25 Dmitry Diky <diwil at spec.ru>
-
- * emulparams/msp430all.sh: Fix RAM sizes for all targets.
- * scripttempl/elf32msp430.sc: Add .profiler section definition.
-
-2004-08-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldlang.c (wildcardp): Defined as a macro with strpbrk.
-
-2004-08-19 Mark Mitchell <mark at codesourcery.com>
-
- * configure.tgt (arm*-*-symbianelf*): New target.
- (arm*-*-eabi*): Likewise.
-
-2004-08-19 Jakub Jelinek <jakub at redhat.com>
-
- * emultempl/ppc64elf.em (non_overlapping_opd): New variable.
- (ppc_before_allocation): Pass it to ppc64_elf_edit_opd).
- (OPTION_NON_OVERLAPPING_OPD): Define.
- (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add
- --non-overlapping-opd option.
-
-2004-08-18 Alan Modra <amodra at bigpond.net.au>
-
- PR 338
- * ldexp.c (fold_name): Don't call bfd_link_add_undef if the symbol
- was already on the undefs list.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (gld${EMULATION_NAME}_new_vers_pattern): Dot
- prefix the symbol field too.
-
-2004-08-13 Alan Modra <amodra at bigpond.net.au>
-
- * ldmain.c (link_callbacks): Remove "error_handler".
- * ldmisc.c: Include elf-bfd.h.
- (vfinfo): Sort comment. Handle %A. Use %A instead of
- bfd_get_section_indent.
- (error_handler): Delete.
- * ldmisc.h (error_handler): Delete declaration.
-
-2004-08-10 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Call
- ppc64_elf_restore_symbols.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Error if
- .toc is too large on relocatable linking.
-
-2004-08-09 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (ppc_after_open): Delete.
- (LDEMUL_AFTER_OPEN): Don't define.
-
-2004-08-02 Stephane Carrez <stcarrez at nerim.fr>
-
- * ld.texinfo (Top): Document specific options of 68HC11 and 68HC12.
-
-2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
-
- * scripttempl/elfm68hc12.sc: Align text, rodata and data section
- on power of 2.
-
-2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
-
- * emulparams/hppanbsd.sh (OUTPUT_FORMAT): Set to "elf32-hppa-netbsd".
-
-2004-07-26 Dmitry Diky <diwil at spec.ru>
-
- * Makefile.am: Add new subtargets: msp430x1610, msp430x1611,
- msp430x1612, msp430x415, msp430x417, msp430xG437, msp430xG438,
- msp430xG439.
- * configure.tgt: Likewise.
- * emulparams/msp430all.sh: Likewise.
+ * scripttemp/elf32xc16x.sc: Default linker script for tiny model.
+ * scripttemp/elf32xc16xl.sc: Default linker script for large model.
+ * scripttemp/elf32xc16xs.sc: Default linker script for small model.
+ * emulparams/elf32xc16x.sh: Emulation script for tiny model.
+ * emulparams/elf32xc16xl.sh: Emulation script for large model.
+ * emulparams/elf32xc16xs.sh: Emulation script for small model.
+ * Makefile.am: Add entry to make xc16x target.
* Makefile.in: Regenerate.
+ * configure.tgt: Specify default and other emulation parameters
+ for xc16x.
+ * NEWS: Announce the support for the new target.
-2004-07-23 Nick Clifton <nickc at redhat.com>
+2006-02-16 Nick Hudson <nick.hudson at dsl.pipex.com>
- * emultempl/elf32.em (_place_orphan): Use an already existing
- section name if that section does not have any flags set.
+ * configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):
+ Use the traditional target.
-2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
+2006-02-13 Joseph S. Myers <joseph at codesourcery.com>
- * ldlang.c (already_linked_hash_entry): Removed.
- (already_linked): Likewise.
- (already_linked_table): Likewise.
- (section_already_linked): Call bfd_section_already_linked.
- (lang_process): Replace already_linked_table_init with
- bfd_section_already_linked_table_init and check return. Replace
- already_linked_table_free with bfd_section_already_linked_table_free.
+ * configure.tgt (arm*b-*-linux-gnueabi): Change to
+ arm*b-*-linux-*eabi.
+ (arm*-*-linux-gnueabi): Change to arm*-*-linux-*eabi.
-2004-07-21 Nick Clifton <nickc at redhat.com>
+2006-02-08 H.J. Lu <hongjiu.lu at intel.com>
- * ldlang.c (init_os): Make sure that the newly allocated userdata
- structure is zeroed out.
+ PR ld/2290
+ * NEWS: Updated for the Linux linker search order change.
-2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
+ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Call
+ gld${EMULATION_NAME}_check_ld_so_conf before checking default
+ search directories for DT_NEEDED entries.
- * NEWS: Mention the new --add-needed/--no-add-needed and
- --as-needed/--no-as-needed options.
+2006-02-07 Paul Brook <paul at codesourcery.com>
-2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
+ * emultempl/armelf.em: Include elf/arm.h.
+ (arm_elf_finish): Set low address bit if enty point is a Thumb
+ function.
- * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): Also
- check the add_needed field.
- (dt_needed): New struct.
- (gld${EMULATION_NAME}_try_needed): Change the first argument
- to a pointer to struct dt_needed. Check the DYN_NO_ADD_NEEDED
- bit in the file where the DT_NEEDED entry comes from.
- (gld${EMULATION_NAME}_search_needed): Change the second
- argument to a pointer to struct dt_needed.
- (gld${EMULATION_NAME}_check_ld_so_conf): Updated.
- (gld${EMULATION_NAME}_after_open): Likewise.
+2006-02-01 Danny Smith <dannysmith at users.sourceforge.net>
- * ld.texinfo: Add --add-needed document.
- * ldlang.c (new_afile): Set p->add_needed.
- * ldlang.h (lang_input_statement_type): Add add_needed field.
- * ldmain.h (add_needed): Declare.
- * ldmain.c (add_needed): New global var.
- * lexsup.c (option_values): Add OPTION_ADD_NEEDED and
- OPTION_NO_ADD_NEEDED.
- (ld_options): Likewise.
- (parse_args): Handle them.
+ * deffilep.y (def_image_name): If the image name does not have
+ a suffix, append the default.
+ * ld.texinfo: Document NAME, LIBRARY usage in PE-COFF .def files.
-2004-07-13 Christof Petig <christof at petig-baender.de>
+2006-01-31 Danny Smith dannysmith at users.sourceforge.net
- * emultempl/pe.em (make_import_fixup): Use bfd_get_32 to correct
- for endian-ness of extracted addend.
+ * NEWS: Mention support for forward exports in PE-COFF dll's.
+ * ld.texinfo: Expand documentation of EXPORT statements in
+ PE-COFF .def files.
-2004-07-13 Danny Smith <dannysmith at usesr.sourceforge.net>
+2006-01-31 Filip Navara <navaraf at reactos.com>
- * pe-dll.c (auto_export): Filter on just the import prefix,
- "_imp_", not "_imp__".
+ * deffile.h (struct def_file_export): Add field flag_forward.
+ * pe-dll.c (process_def_file): Check for forward exports.
+ (generate_edata): Generate forward export symbols.
+ (fill_edata): Emit them.
-2004-07-09 Nick Clifton <nickc at redhat.com>
+ * pe-dll.c (process_def_file): Don't crash on malformed
+ fastcall symbol names in .def file.
- * configure.tgt: Change sh-sybmian-elf to sh-*-symbianelf.
+2006-01-30 Nick Clifton <nickc at redhat.com>
-2004-07-06 Tomer Levi <Tomer.Levi at nsc.com>
+ * po/vi.po: Updated Vietnamese translation.
- * Makefile.am (ALL_EMULATIONS): Add eelf32crx.o.
- (eelf32crx.c): New target.
- * Makefile.in: Regenerate.
- * configure.tgt: Handle crx-*-elf*.
- * emulparams/elf32crx.sh: New file.
- * emultempl/crxelf.em: New file.
- * scripttempl/elf32crx.sc: New file.
- * NEWS: Mention new target.
+2006-01-27 Yitzchak Scott-Thoennes <sthoenna at efn.org>
-2004-07-06 Nick Clifton <nickc at redhat.com>
+ * pe-dll.c (pe_dll_generate_implib): Issue "Creating library
+ file:" as informational message, not a warning.
- * Makefile.am: Add eshlsymbian.c.
- * Makefile.in: Regenerate.
- * configure.tgt: Add sh*-symbian-elf target.
- * emulparams/shlsymbian.sh: New file. Configure the
- sh-symbian-elf linker scripts.
- * scripttemp/elf32sh-symbian.sc: New file. Linker script
- template for the sh-symbian-elf target.
+2006-01-18 Roger Sayle <roger at eyesopen.com>
-2004-07-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+ * emultempl/irix.em: Use lbasename instead of basename.
- * emulparams/hppa64linux.sh: Define PLT_BEFORE_GOT.
- * emulparams/hppalinux.sh: Likewise.
- * scripttempl/elf.sc: Place .plt just before .got when .plt is in
- data segment and PLT_BEFORE_GOT is defined.
+2006-01-16 Nick Clifton <nickc at redhat.com>
-2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * ld.texinfo (WIN32): Document PE weak symbols.
-
-2004-07-02 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * emulparams/shlelf32_linux.sh (COMMONPAGESIZE): Set to 4KB.
-
-2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
-
- * ldmisc.c (vfinfo): Call bfd_get_section_ident to identify
- the section.
-
-2004-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_reset_memory_regions): Save last relax pass section
- size in rawsize.
-
-2004-06-24 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (print_output_section_statement): Don't print size before
- relaxation.
- (IGNORE_SECTION): Remove bfd arg. Update all callers.
-
- * ldexp.c (fold_name): .. See below.
- * ldlang.c (section_already_linked, print_output_section_statement,
- print_input_section, insert_pad, size_input_section,
- lang_check_section_addresses, lang_size_sections_1,
- lang_size_sections, lang_do_assignments_1, lang_set_startof,
- lang_one_common, lang_reset_memory_regions, lang_process,
- lang_abs_symbol_at_end_of, lang_do_version_exports_section): ..
- * ldwrite.c (build_link_order, clone_section, ds, split_sections): ..
- * pe-dll.c (process_def_file, generate_reloc): ..
- * emultempl/elf32.em (gld${EMULATION_NAME}_find_statement_assignment,
- gld${EMULATION_NAME}_before_allocation): ..
- * emultempl/mmix-elfnmmo.em (mmix_after_allocation): ..
- * emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_before_allocation,
- sh64_elf_${EMULATION_NAME}_after_allocation): ..
- * emultempl/sunos.em (gld${EMULATION_NAME}_before_allocation): ..
- * emultempl/xtensaelf.em (ld_assign_relative_paged_dot,
- ld_local_file_relocations_fit, ld_xtensa_insert_page_offsets): Use
- "size" instead of "_raw_size" and "_cooked_size". Expand
- bfd_section_size macro invocations.
-
-2004-06-22 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * ld/scripttemp/pe.sc (.CRT): Define ___crt_xc_start__,
- ___crt_xc_end__, ___crt_xi_start__, ___crt_xi_end__, ___crt_xl_start__,
- ___crt_xp_start__, ___crt_xp_end__, ___crt_xt_start__ and
- ___crt_xt_end__.
- (.tls): Define ___tls_start__ and ___tls_end__.
-
-2004-06-21 Alexandre Oliva <aoliva at redhat.com>
-
- * emulparams/elf32frvfd.sh (GENERATE_PIE_SCRIPT): Set to yes.
-
-2004-06-18 Adam Nemet <anemet at lnxw.com>
-
- * configure.in: Set EXTRA_SHLIB_EXTENSION to .a for LynxOS.
+ * po/zh_CN.po: New Chinese (simplified) translation.
+ * configure.in (ALL_LINGUAS): Add "zh_CH".
* configure: Regenerate.
-2004-06-15 Jakub Jelinek <jakub at redhat.com>
+2006-01-16 Bernhard Fischer <aldot at gcc.gnu.org>
- * scripttempl/elf.sc: Readd KEEP and .gcc_except_table.* to
- .gcc_except_table output sections lost accidentally with
- -z relro patch.
+ * ld.texinfo (Options): Fix typo.
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
-
- * ldwrite.c (build_link_order): Use bfd_get_section_size
- instead of bfd_get_section_size_before_reloc or _raw_size.
- * pe-dll.c (process_def_file): Likewise.
-
-2004-06-14 Alan Modra <amodra at bigpond.net.au>
-
- From Richard Wirth <r.wirth at wirthware.de>
- * ldlang.c (lang_finish): Don't free lang_definedness_table.
-
-2004-05-29 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (gc_section_callback): Move SEC_EXCLUDE twiddles..
- (lang_gc_sections): .. to a LANG_FOR_EACH_INPUT_STATEMENT loop here.
-
-2004-05-28 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c: Formatting. Wrap long lines, expand bfd_get_section_flags
- throughout file.
- * lexsup.c: Formatting. Wrap long lines.
- * ldwrite.c: Update copyright date.
-
- * ldlang.c (lang_add_section): Don't twidlle SEC_EXCLUDE here.
- (output_section_callback): Nor SEC_KEEP here.
- (gc_section_callback): Twiddle SEC_EXCLUDE here.
- (lang_gc_wild): Delete. Fold into..
- (lang_gc_sections_1): ..here. Only call bfd_gc_sections when garbage
- collecting.
- (lang_process): Always call lang_gc_sections.
- (lang_place_orphans): Handle SEC_EXCLUDE sections.
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Remove
- SEC_EXCLUDE code.
-
-2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Clear
- SEC_EXCLUDE on non-SEC_DEBUGGING sections for relocatable link.
- * ldlang.c (lang_add_section): Likewise.
-
-2004-05-26 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_add_section): Set SEC_EXCLUDE for SEC_GROUP
- sections when doing a final link. Clear SEC_EXCLUDE when doing
- a relocable link, except for SEC_DEBUGGING sections.
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Use the
- same condition here to drop SEC_EXCLUDE orphan sections.
-
-2004-05-25 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (lang_process): Call bfd_merge_sections later, and
- only when not a relocatable link.
- (print_input_section): Handle SEC_EXCLUDE sections.
- (size_input_section): Don't update dot on SEC_EXCLUDE sections.
- (lang_do_assignments_1): Likewise.
- * ldwrite.c (build_link_order): Ignore SEC_EXCLUDE input sections.
- * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Likewise.
- * emultempl/hppaelf.em (build_section_lists): Likewise.
- * emultempl/ppc64elf.em (build_toc_list): Likewise.
- (build_section_lists): Likewise.
-
-2004-05-23 Andreas Schwab <schwab at suse.de>
-
- * ld.texinfo (Options): Fix typo in last change.
-
-2004-05-21 Andy Chittenden <achittenden at bluearc.com>
-
- * ld.h (ld_config_type): Add new field: hash_table_size.
- * ldmain.c: Initialise the new field to zero. If it is non-zero
- after parsing the linker's command line call
- bfd_hash_set_default_size.
- * lexsup.c (option_values): Add OPTION_HASH_SIZE.
- (ld_options): Add hash-size.
- (parse_args): Parse --hash-size option. Allow
- --reduce-memory-overheads to set the default hash table size as
- well.
- * ld.texinfo: Document the new switch. Also mention that
- --reduce-memory-overheads can affect the hash table size.
- * NEWS: Mention the new feature.
-
-2004-05-19 J"orn Rennecke <joern.rennecke at superh.com>
-
- * NEWS: Mention new linker map file generation and the
- --reduce-memory-overheads option.
- * ld.texinfo: Document --reduce-memory-overheads option.
- * ld.h (map_symbol_def): New struct.
- (struct user_section_struct, section_userdata_type): Rename to:
- (struct lean_user_section_struct, lean_section_userdata_type).
- (struct fat_user_section_struct, fat_section_userdata_type): New.
- (SECTION_USERDATA_SIZE): Define.
- (args_type): New member reduce_memory_overheads.
- * ldlang.c (map_obstack): New static variable.
- (init_map_userdata, print_all_symbols, sort_def_symbol): New functions.
- (lang_map): Unless command_line.reduce_memory_overheads is set,
- initialize lists of defined symbols for each section.
- (print_input_section): Unless command_line.reduce_memory_overheads
- is set, use print_all_symbols.
- (init_os): Use lean_section_userdata_type / SECTION_USERDATA_SIZE.
- * ldmain.c (main): Initialize command_line.reduce_memory_overheads.
- * lexsup.c (enum option_values): Add OPTION_REDUCE_MEMORY_OVERHEADS.
- (ld_options): Add entry for --reduce-memory-overheads.
- (parse_args): Handle OPTION_REDUCE_MEMORY_OVERHEADS.
-
-2004-05-19 Jakub Jelinek <jakub at redhat.com>
-
- * ldgram.y (sect_constraint): New.
- (ONLY_IF_RO, ONLY_IF_RW): New tokens.
- (section): Add sect_constraint. Pass additional argument
- to lang_enter_output_section_statement.
- * mri.c (mri_draw_tree): Pass additional argument to
- lang_enter_output_section_statement.
- * emultempl/pe.em (place_orphan): Likewise.
- (output_prev_sec_find): Disregard output section statements with
- constraint == -1.
- * emultempl/mmo.em (output_prev_sec_find): Likewise.
- (mmo_place_orphan): Pass additional argument to
- lang_enter_output_section_statement.
- * emultempl/elf32.em (output_prev_sec_find): Disregard output section
- statements with constraint == -1.
- (place_orphan): Pass additional argument to
- lang_enter_output_section_statement.
- * ldlang.c (lang_enter_overlay_section): Likewise.
- (lang_output_section_find_1): New.
- (lang_output_section_find): Use it.
- (lang_output_section_statement_lookup_1): New.
- (lang_output_section_statement_lookup): Use it.
- (check_section_callback, check_input_sections): New.
- (map_input_to_output_sections): Check if all input sections
- are readonly if ONLY_IF_RO or ONLY_IF_RW was seen.
- (strip_excluded_output_sections): Disregard output section statements
- with constraint == -1.
- (lang_record_phdrs): Likewise.
- (lang_enter_output_section_statement): Add constraint argument.
- Use lang_output_section_statement_lookup_1.
- * ldlang.h (lang_output_section_statement_type): Add constraint
- and all_input_readonly fields.
- (lang_enter_output_section_statement): Adjust prototype.
- * ldlex.l (ONLY_IF_RO, ONLY_IF_RW): New tokens.
- * scripttempl/elf.sc (.eh_frame, .gcc_except_table): Move into text
- segment if all input sections are readonly.
-
-2004-05-19 Adam Nemet <anemet at lnxw.com>
-
- * scripttempl/i386lynx.sc: Remove file.
-
-2004-05-17 Bob Wilson <bob.wilson at acm.org>
-
- * ld.texinfo (Output Section Address): Correct subsection name.
-
-2004-05-17 Adam Nemet <anemet at lnxw.com>
-
- * configure.tgt (powerpc-*-lynxos* case): New case.
- * configure.host (i[3-7]86-*-lynxos* case): Remove case.
- * emulparams/ppclynx.sh: New file.
- * emulparams/i386lynx.sh (SCRIPT_NAME): Update to LynxOS 4.0.
- * Makefile.am (ALL_EMULATIONS): Add eppclynx.o
- (ei386lynx.c): Update rule to LynxOS 4.0 ELF.
- (eppclynx.c): New rule.
- * Makefile.in: Regenerate.
-
-2004-05-13 Joel Sherrill <joel at oarcorp.com>
-
- * configure.tgt (or32-*-rtems*): Switch to elf and
- support versioned targets.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-05-11 Jakub Jelinek <jakub at redhat.com>
-
- * genscripts.sh: Generate -z combreloc -z now -z relro scripts
- for binaries, -shared and -pie.
- * emulparams/elf_i386.sh (SEPARATE_GOTPLT): Set.
- * emulparams/elf_x86_64.sh (SEPARATE_GOTPLT): Set.
- * emulparams/elf32ppc.sh (OTHER_READWRITE_SECTIONS): Rename to...
- (OTHER_RELRO_SECTIONS): ... this.
- * ldlex.l (DATA_SEGMENT_RELRO_END): Add.
- * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
- -z relro and -z norelro.
- (gld${EMULATION_NAME}_list_options): Add it to usage.
- (gld${EMULATION_NAME}_get_script): Return -z combreloc -z now
- -z relro scripts when appropriate.
- * scripttempl/elf.sc: Unset SEPARATE_GOTPLT if RELRO_NOW is set.
- Create separate .got.plt section if SEPARATE_GOTPLT.
- Move sections which are only written during relocation handling
- to the beginning of RW segment. If NO_SMALL_DATA, move .got
- before .data. Add DATA_SEGMENT_RELRO_END directive.
- Include OTHER_RELRO_SECTIONS.
- * ldgram.y (DATA_SEGMENT_RELRO_END): Add.
- * ldexp.c (exp_print_token): Handle DATA_SEGMENT_RELRO_END.
- (fold_unary): Likewise.
- (fold_binary): Handle -z relro.
- * ldexp.h (struct exp_data_seg): Add exp_dataseg_relro_seen and
- exp_dataseg_relro_adjust phases. Add relro_end field.
- * ldmain.c (main): Initialize link_info.relro to FALSE.
- * ldlang.c (lang_size_sections): Handle -z relro.
-
-2004-05-08 Marek Michalkiewicz <marekm at amelek.gda.pl>
-
- * scripttempl/avr.sc: Do not set LMA for "eeprom" section.
-
-2004-05-07 J"orn Rennecke <joern.rennecke at superh.com>
-
- * ldlang.c (print_padding_statement): Cast size_t to bfd_vma
- before printing it with %W.
-
-2004-05-07 Brian Ford <ford at vss.fsi.com>
- DJ Delorie <dj at redhat.com>
-
- * emultempl/pe.em (real_flags): New static.
- (OPTION_LARGE_ADDRESS_AWARE): New define.
- (gld${EMULATION_NAME}_add_options): Add --large-address-aware option.
- (gld_${EMULATION_NAME}_list_options): Likewise.
- (gld${EMULATION_NAME}_handle_option): Likewise.
- (gld_${EMULATION_NAME}_after_open): Pass real_flags to PE private data.
- * ld.texinfo: Document it.
- * NEWS: Mention it.
-
-2004-05-07 Brian Ford <ford at vss.fsi.com>
-
- * NEWS: Mention DWARF 2 support for i386pe.
-
-2004-05-05 Alexandre Oliva <aoliva at redhat.com>
-
- * emulparams/elf32frvfd.sh (OUTPUT_FORMAT): Switch to new
- elf32-frvfdpic.
-
-2004-04-30 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (unique_section_p): Pass section parm, return true on
- group sections.
- (output_section_callback): Adjust.
- * ldlang.h (unique_section_p): Update prototype.
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Adjust.
-
-2004-04-30 Eric Botcazou <ebotcazou at act-europe.fr>
-
- * ld.texinfo (--gc-sections): Remove restriction for
- dynamic linking.
-
-2004-04-29 Brian Ford <ford at vss.fsi.com>
-
- * scripttempl/pe.sc: Handle .debug* and .gnu.linkonce.wi.* sections
- for DWARF 2/3. Update stab section's syntax.
-
-2004-04-29 Alan Modra <amodra at bigpond.net.au>
-
- * pe-dll.c: Revert changes accidentally committed 2004-03-08.
- (fill_edata): Correct pointer arithmetic.
-
-2004-04-21 Chris Demetriou <cgd at broadcom.com>
-
- * ld.texinfo: Remove MIPS --embedded-relocs documentation.
- * emulparams/elf32bmip.sh (EXTRA_EM_FILE): Remove definition.
- * emulparams/mipsidt.sh (TEMPLATE_NAME): Use generic.em.
- (EXTRA_EM_FILE): Use mipsecoff.em
- * emulparams/mipsidtl.sh (TEMPLATE_NAME): Use generic.em.
- (EXTRA_EM_FILE): Use mipsecoff.em
- * emultempl/mipsecoff.em: Restructure to be included as an
- extra emulation file.
- (check_sections, gld${EMULATION_NAME}_after_open)
- (gld${EMULATION_NAME}_after_allocation)
- (gld${EMULATION_NAME}_get_script)
- (ld_${EMULATION_NAME}_emulation): Remove
- (gld${EMULATION_NAME}_before_parse): Rename to...
- (mipsecoff_before_parse): This.
- (LDEMUL_BEFORE_PARSE): Define.
- * emultempl/mipself.em: Remove file.
- * scripttempl/mips.sc (.rel.sdata): Do not include in output.
- (__runtime_reloc_start, __runtime_reloc_stop): Stop providing
- these symbols.
- * Makefile.am: Remove dependencies on emultempl/mipself.em.
- * Makefile.in: Regenerate.
-
-2004-04-21 Anil Paranjpe <anilp1 at kpitcummins.com>
-
- * ld.texinfo (synthesizing on H8/300): Information about linker
- relaxation support for bit manipulation instructions and system
- control instructions is added.
-
-2004-04-21 Hans-Peter Nilsson <hp at axis.com>
-
- * NEWS: Mention change in DEFINED semantics.
-
-2004-04-21 Eric Botcazou <ebotcazou at act-europe.fr>
-
- * scripttempl/elf.sc (.text): Add KEEP for .text.*personality*.
- (.data): Add KEEP for .gnu.linkonce.d.*personality*.
- (.gcc_except_table): Add KEEP for self and accept .gcc_except_table.*.
-
-2004-04-21 Ben Elliston <bje at au.ibm.com>
-
- * ld.texinfo (Simple Example): Add missing punctuation.
-
-2004-04-20 Chris Demetriou <cgd at broadcom.com>
-
- * NEWS: Note that MIPS --embedded-relocs option is deprecated.
-
-2004-04-19 Jakub Jelinek <jakub at redhat.com>
-
- * ldlang.c (lang_do_assignments_1): Handle .tbss output section
- specially.
-
-2004-04-18 Danny Smith <dannysmith at users.sourceforge.net>
-
- * scriptempl/pe.sc: Put numbered .ctors.* after .ctors
- with default priority. Likewise for dtors.
-
-2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-
- * configure.host: Remove mips*-dec-bsd* target.
- * configure.tgt: Likewise.
-
-2004-04-08 Richard Sandiford <rsandifo at redhat.com>
-
- * emulparams/elf32bsmip.sh (EXTRA_EM_FILE): Define to irix.
- * emulparams/elf64bmip.sh (EXTRA_EM_FILE): Likewise.
- * emulparams/elf32bmipn32.sh (EXTRA_EM_FILE): Likewise.
- * emultempl/irix.em: New file.
- * Makefile.am (eelf32bsmip.c, eelf32bmipn32.c, eelf64bmip.c): Update
- dependencies.
- * Makefile.in: Regenerate.
-
-2004-04-01 Paul Brook <paul at codesourcery.com>
-
- * emultempl/armelf.em (byteswap_code): Add.
- (arm_elf_before_allocation): Pass extra parameter.
- (PARSE_AND_LIST_PROLOGUE): Add OPTION_BE8.
- (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add be8.
- (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_BE8.
- * emultempl/armelf_oabi.em: Pass extra parameter.
- * ld.texinfo: Document --be8.
-
-2004-03-30 Stan Shebs <shebs at apple.com>
-
- Remove long-obsolete MPW support.
- * mpw-config.in, mpw-make.sed, mac-ld.r: Remove files.
- * Makefile.am (mpw): Remove file-presynthesizing actions.
- * Makefile.in: Likewise.
- * ldfile.c (slash): Remove MPW case.
- * ldlex.l [MPW]: Remove unused definition.
-
-2004-03-30 Galit Heller <Galit.Heller at nsc.com>
-
- * Makefile.am (ALL_EMULATIONS): Add eelf32cr16c.o.
- (eelf32cr16c.c): New target.
- * Makefile.in: Regenerate.
- * configure.tgt: Handle cr16c-*-elf*.
- * emulparams/elf32cr16c.sh: New file.
- * scripttempl/elfcr16c.sc: Likewise
- * NEWS: Mention support for new target.
-
-2004-03-30 Nick Clifton <nickc at redhat.com>
-
- * po/sv.po: Updated Swedish translation.
-
-2004-03-27 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em: Update new bfd_elf_discard_info name.
- * emultempl/hppaelf.em: Likewise.
- * emultempl/ppc64elf.em: Likewise.
- * emultempl/sh64elf.em: Likewise.
-
-2004-03-25 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Update
- size_dynamic_sections call.
-
-2004-03-23 Alan Modra <amodra at bigpond.net.au>
-
- PR 51.
- * emultempl/ppc64elf.em (ppc_create_output_section_statements): Set
- link_info.wrap_char.
-
-2004-03-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * lexsup.c (parse_args): Don't set unresolved_syms_in_objects
- or unresolved_syms_in_shared_libs for -Bdynamic and -Bstatic.
-
-2004-03-20 Alexandre Oliva <aoliva at redhat.com>
-
- * emulparams/elf32frvfd.sh (MAXPAGESIZE): Change to 16Kb.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * config.in: Regenerate.
- * po/ld.pot: Regenerate.
-
-2004-03-18 Alan Modra <amodra at bigpond.net.au>
-
- * ld.texinfo: Add --as-needed doco.
- * ldmain.c (as_needed): New global var.
- * ldmain.h (as_needed): Declare.
- * lexsup.c (option_values): Add OPTION_AS_NEEDED and
- OPTION_NO_AS_NEEDED.
- (ld_options): Likewise.
- (parse_args): Handle them.
- * ldlang.h (lang_input_statement_type): Add as_needed field.
- * ldlang.c (new_afile): Set p->as_needed.
- * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): New function.
- (gld${EMULATION_NAME}_try_needed): Use bfd_elf_set_dyn_lib_class.
- (ld_${EMULATION_NAME}_emulation): Set LDEMUL_RECOGNIZED_FILE entry.
-
- * ldlang.c (open_input_bfds): Remove useless cast.
- (lang_do_assignments_1): Likewise.
- (lang_for_each_input_section): Delete.
-
-2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
-
- * configure.tgt: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
-
-2004-03-08 Danny Smith <dannysmith at users.sourceforge.net>
-
- * pe-dll.c (pe_dll_generate_implib): Skip sections marked as
- private when building implib.
-
-2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
-
- * ldlang.c (lang_add_section): Don't force SEC_LOAD on
- SEC_THREAD_LOCAL.
- (IGNORE_SECTION): Ignore .tbss sections too.
- (lang_size_sections_1): .tbss sections do not advance dot.
-
-2004-03-01 Andreas Schwab <schwab at suse.de>
-
- * ld.texinfo (Options): Fix example for --wrap.
-
-2004-02-25 Danny Smith <dannysmith at users.sourceforge.net>
-
- * pe-dll.c (fill_edata): Check that exported_symbol_sections is
- not NULL.
-
-2004-02-23 Ian Lance Taylor <ian at wasabisystems.com>
-
- * ldlang.c (lang_check): Use %P, not %E, in error message.
-
-2004-02-23 Nathan Sidwell <nathan at codesourcery.com>
-
- * ldlang.h (struct lang_output_section_state): Change processed
- field's type.
- * ldexp.c (check, invalid): Remove.
- (fold_name): Move valid_p assignments. Create undefined symbol
- when needed. Directly exampine section's processd flag.
- * ldlang.c (lang_output_section_statement_lookup): Adjust
- processed field init.
- (lang_size_sections_1): Allow LOADADDR when determining section's
- VMA. Adjust error message. Fold data statement's expr.
- (lang_size_sections): Correctly increment lang_statement_iteration.
-
-2004-02-23 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (fold_tree): Follow indirect symbols.
-
-2004-02-20 Nathan Sidwell <nathan at codesourcery.com>
-
- * ldgram.y (exp): Add two operand ALIGN.
- * ldexp.c (fold_binary): Add ALIGN_K case.
- * ld.texinfo (ALIGN): Document two operand version.
-
-2004-02-19 Nathan Sidwell <nathan at codesourcery.com>
-
- * ldlang.c (map_input_to_output_sections): Initialize sections
- mentioned in a data statement expression.
- (lang_do_assignments_1): Add data statement's expression's
- section's vma.
-
-2004-02-18 Nathan Sidwell <nathan at codesourcery.com>
-
- * ldgram.y (statement_anywhere): Add assert rule.
- * ldlang.c (exp_init_os): Add assert case.
-
-2004-02-14 Andrew Cagney <cagney at redhat.com>
-
- * ldmain.c (remove_output): Call bfd_cache_close.
-
-2004-02-14 Richard Sandiford <rsandifo at redhat.com>
-
- * emulparams/elf32bmipn32-defs.sh (OTHER_SECTIONS): Discard
- .MIPS.content* and .MIPS.events* sections.
-
-2004-02-09 Daniel Jacobowitz <drow at mvista.com>
-
- * emulparams/armelf.sh, emulparams/armelf_linux.sh: Move
- .note.gnu.arm.ident to after allocated sections. Mark its
- address as 0.
-
-2004-02-09 Daniel Jacobowitz <drow at mvista.com>
-
- * emulparams/armelf_linux.sh (COMMONPAGESIZE): Set to 4KB.
- * emulparams/elf32bmip.sh (COMMONPAGESIZE): Likewise.
- * emulparams/elf32bmipn32.sh (COMMONPAGESIZE): Likewise.
- * emulparams/elf32btsmipn32.sh (COMMONPAGESIZE): Likewise.
- * emulparams/shlelf_linux.sh (COMMONPAGESIZE): Likewise.
-
-2004-02-05 Nick Clifton <nickc at redhat.com>
-
- * emultempl/pe.em (_after_open): Fix typo in previous delta.
-
-2004-02-04 Danny Smith <dannysmith at users.sourceforge.net>
-
- * emultempl/pe.em (_after_open): Fix thinko in 2003-12-18 patch.
-
-2004-01-28 Alan Modra <amodra at bigpond.net.au>
-
- * genscripts.sh: Fix typo.
-
- * genscripts.sh: Apply $LIBPATH_SUFFIX to $tool_lib and $libdir too.
-
-2004-01-24 Jakub Jelinek <jakub at redhat.com>
-
- * emulparams/elf64_ia64.sh: Put .rela.opd into
- OTHER_GOT_RELOC_SECTIONS instead of OTHER_PLT_RELOC_SECTIONS.
-
-2004-01-20 Danny Smith <dannysmith at users.sourceforge.net>
-
- * pe-dll.c (pe_create_import_fixup): Clear WP_TEXT flag.
- * ld.texinfo (--omagic): Note that writable text section
- does not conform to published PE-COFF specs.
- (--enable-auto-import): Likewise.
-
-2004-01-15 Alan Modra <amodra at bigpond.net.au>
-
- * emulparams/elf32ppc.sh (COMMONPAGESIZE): Define.
-
-2004-01-13 Nick Clifton <nickc at redhat.com>
-
- * ldlang.c (lang_get_regions): Add extra parameter 'have_vma'
- which if true will prevent the LMA region being used as a
- replacement for a default VMA region.
- (lang_leave_output_section_statement): Pass extra parameter.
- (lang_leave_overlay): Likewise.
- * ld.texinfo (Output Section LMA): Document that the LMA
- region can be set to the VMA region if no VMA has been set.
- * ldlang.h (struct lang_output_section_phdr_list): Create a
- typedef for this type. Minor formatting fixes.
-
-2004-01-13 Nick Clifton <nickc at redhat.com>
-
- * ldlang.c (lang_size_sections_1): If dot is advanced, then
- assume that the section should be allocated.
-
-2004-01-13 Alan Modra <amodra at bigpond.net.au>
-
- * ldlang.c (IGNORE_SECTION): Don't ignore SEC_ALLOC && !SEC_LOAD
- sections. Do ignore SEC_NEVER_LOAD sections.
- (lang_size_sections_1): Remove test made redundant with the above.
-
-2004-01-09 Alan Modra <amodra at bigpond.net.au>
-
- * emultempl/ppc64elf.em (ppc_before_allocation): Clear cached
- program_header_size.
-
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-11-28 Alexandre Oliva <aoliva at redhat.com>
- * emulparams/elf32frvfd.sh (EMBEDDED): Clear.
- 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
- * emulparams/elf32frvfd.sh (STACK_ADDR): Unset.
- (MAXPAGESIZE): Set to 64Kb.
- (OTHER_READONLY_SECTIONS): Define __ROFIXUP_LIST__ and
- __ROFIXUP_END__. Don't map .rofixup.got any more.
- * emulparams/elf32frv.sh (NOP): Set.
- 2003-10-31 Alexandre Oliva <aoliva at redhat.com>
- * configure.tgt: Add frv-*-*linux*.
- 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
- * Makefile.am (ALL_EMULATIONS): Added eelf32frvfd.o.
- (eelf32frvfd.c): New.
- * configure.tgt <frv-*-*>: Added it to targ_extra_emuls.
- * emulparams/elf32frv.sh: Reverted previous two patches.
- * emulparams/elf32frvfd.sh: New.
- * Makefile.in: Rebuilt.
- 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
- * emulparams/elf32frv.sh (OTHER_READONLY_SECTIONS): Added
- .rofixup.got to .rofixup.
- 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
- * emulparams/elf32frv.sh (MAXPAGESIZE): Make it 256KiB, not 256B.
- (TEMPLATE_NAME, GENERATE_SHLIB_SCRIPT): Set.
-
-2004-01-05 Jakub Jelinek <jakub at redhat.com>
-
- * emulparams/elf_s390.sh (NO_SMALL_DATA): Set to yes.
- * emulparams/elf64_s390.sh (NO_SMALL_DATA): Set to yes.
-
-2004-01-03 Alan Modra <amodra at bigpond.net.au>
-
- * ldexp.c (align_n): Make static.
- * ldexp.h (align_n): Delete declaration.
- * ldlang.h (lang_enter_output_section_statement): Remove
- block_value param.
- * ldlang.c (lang_enter_output_section_statement): Likewise.
- (TO_ADDR, TO_SIZE): Define.
- (opb_shift): New var.
- (init_opb): New function.
- (print_input_section): Call init_opb and use TO_ADDR.
- (print_data_statement, print_reloc_statement): Likewise.
- (print_padding_statement): Likewise.
- (size_input_section): Use TO_SIZE and TO_ADDR, and global opb_shift.
- (lang_check_section_addresses): Likewise.
- (lang_size_sections_1): Likewise.
- (lang_do_assignments_1): Likewise.
- (lang_set_startof): Likewise.
- (lang_one_common): Likewise. Combine power_of_two and opb_shift align.
- (lang_process): Call init_opb.
- (lang_abs_symbol_at_end_of): Use TO_ADDR and global opb_shift.
- (lang_enter_overlay_section): Adjust
- lang_enter_output_section_statement call.
- * ldgram.y: Likewise.
- * mri.c (mri_draw_tree): Likewise.
- * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Likewise.
- * emultempl/mmo.em (mmo_place_orphan): Likewise.
- * emultempl/pe.em (gld${EMULATION_NAME}_place_orphan): Likewise.
-
- * ldfile.c (ldfile_set_output_arch): Add defarch param.
- * ldfile.h (ldfile_set_output_arch): Ditto.
- * emultempl/aix.em (gld${EMULATION_NAME}_before_parse): Use
- ldfile_set_output_arch.
- * emultempl/beos.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/linux.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/mipsecoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/pe.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/sunos.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * ldgram.y: Adjust ldfile_set_output_arch call.
- * emultempl/armcoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/armelf.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/armelf_oabi.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/generic.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/gld960c.em (gld960_set_output_arch): Ditto.
- * emultempl/m68kcoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
- * emultempl/ticoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
-
-2004-01-02 Bernardo Innocenti <bernie at develer.com>
-
- * configure.tgt: Add m68k-uClinux target.
-
-For older changes see ChangeLog-0203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/ld/ChangeLog-2004
===================================================================
--- branches/binutils/package/ld/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1442 @@
+2004-12-28 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * emultempl/pe.em (set_pe_subsystem): Change second arg to
+ lang_add_entry to FALSE.
+
+2004-12-23 Nick Clifton <nickc at redhat.com>
+
+ PR 600
+ * emulparams/shelf.sh (.stack): Increase stack start address to
+ 0x300000.
+
+2004-12-20 Nick Clifton <nickc at redhat.com>
+
+ * ldmain.c (main): Issue an error message if -static and -shared
+ are used together.
+
+2004-12-17 Jakub Jelinek <jakub at redhat.com>
+
+ * ldexp.h (exp_data_seg): Add min_base and maxpagesize fields.
+ * ldexp.c (fold_binary) <case DATA_SEGMENT_ALIGN>: Initialize them.
+ * ldlang.c (lang_size_sections): Use them to avoid wasting virtual
+ address space at DATA_SEGMENT_ALIGN. Fix computation of expected
+ PT_GNU_RELRO segment end.
+
+2004-12-14 P.J. Darcy <darcypj at us.ibm.com>
+
+ * configure.tgt: Add s390x-ibm-tpf support.
+
+2004-12-16 Martin Kögler <mkoegler at auto.tuwien.ac.at>
+
+ * ldmisc.c (vfinfo): Handle the case where %B is passed a NULL
+ BFD.
+
+2004-12-07 Ben Elliston <bje at gnu.org>
+
+ * ldemul.h: Forward declare struct option.
+
+2004-12-01 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * scripttempl/pe.sc (.data): Add .jcr subsection.
+
+2004-11-30 Paul Brook <paul at codesourcery.com>
+
+ * emultempl/armelf.em: Ignore -p and -no-pipeline-knowledge.
+
+2004-11-30 Tero Niemela <tero_niemela at yahoo.com>
+
+ * Makefile.am: Change LOCALEDIR to $(datadir)/share.
+ * Makefile.in: Regenerate.
+
+2004-11-26 Melissa Mears <asterisk at graces.dricas.com>
+
+ * emultempl/pe.em: Add --subsystem:xbox as well as
+ --subsystem:%d.
+ * ld.texinfo: (ld_options): Document acceptance of subsystem xbox
+ and numeric subsystems.
+
+2004-11-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (fold_name): Correct PR 338 fix.
+
+2004-11-19 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add earmelf_linux_eabi.o.
+ (earmelf_linux_eabi.c): New target.
+ * configure.tgt (arm*-*-linux-gnueabi): Handle it.
+ * emulparams/armelf_linux_eabi.sh: New file.
+ * Makefile.in: Regenerated.
+
+2004-11-19 Nick Clifton <nickc at redhat.com>
+
+ PR 518
+ * ld.texinfo (MEMORY): Update the descriptions of the ORIGIN and
+ LENGTH fields in the MEMORY command, to explicitly state that
+ symbols cannot be used in their expressions.
+
+2004-11-19 Jon Beniston <jon at beniston.com>
+
+ * ld/ldlex.l: Allow ORIGIN and LENGTH in EXPRESSION.
+ * ld/ldgram.y: Add ORIGIN and LENGTH expressions.
+ * ld/ldexp.c (fold_name): Implement LENGTH() and ORIGIN() functions
+ which return the length and origin of a memory.
+ * ld/ld.texinfo: Document LENGTH() and ORIGIN() functions.
+ * NEWS: Mention support for ORIGIN and LENGTH operators.
+
+2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use
+ a dynamic object for stubs.
+
+2004-11-04 Paul Brook <paul at codesourcery.com>
+
+ * ld.texinfo: Document --default-imported-symver.
+ * ldmain.c (main): Set link_info.default_imported_symver.
+ * lexsup.c (option_values): Add OPTION_DEFAULT_IMPORTED_SYMVER.
+ (ld_options): Add --default-imported-symver.
+ (parse_args): Handle OPTION_DEFAULT_IMPORTED_SYMVER.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * Makefile.am: Add entries for new maxq-coff target.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Add support for maxq.
+ * emulparams/maxqcoff.sh: New File.
+ * scripttempl/maxqcoff.sc: New linker script for target maxq.
+ * NEWS: Mention the new target.
+
+2004-11-04 Daniel Jacobowitz <dan at debian.org>
+
+ * Makefile.am (ALL_EMULATIONS): Remove earmelf_oabi.o.
+ (earmelf_oabi.c): Remove rule.
+ * configure.tgt: Remove arm-*-oabi and thumb-*-oabi.
+ * emulparams/armelf_oabi.sh, emultempl/armelf_oabi.em: Delete files.
+ * Makefile.in: Regenerated.
+
+2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+
+ * configure.tgt (crisv32-*-*): Handle like cris-*-* for non-aout.
+ * emulparams/criself.sh (INIT_START): Remove emitted "push srp".
+ (FINI_START): Ditto.
+ (INIT_END): Remove emitted "jump [sp+]".
+ (FINI_END): Ditto.
+
+2004-11-04 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (no_tls_opt): Rename from notlsopt.
+ (no_opd_opt, no_toc_opt): New static vars.
+ (ppc_before_allocation): Don't edit opt if no_opd_opt. Call
+ ppc64_elf_edit_toc.
+ (OPTION_NO_OPD_OPT, OPTION_NO_TOC_OPT): Define.
+ (PARSE_AND_LIST_LONGOPTS): Add no-opd-optimize and no-toc-optimize.
+ (PARSE_AND_LIST_OPTIONS): Describe new options.
+ (PARSE_AND_LIST_ARGS_CASES): Handle them.
+
+2004-10-27 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/alphaelf.em (alpha_after_parse): Add extra, NULL,
+ parameter to invocation of lang_section_start.
+ * emultempl/aix.em (_handle_option): Likewise.
+
+ * Makefile.am (eelf64alpha.c, eelf64alpha_fbsd.c,
+ eelf64alpha_nbsd.c): Add dependency upon emultempl/alphaelf.em.
+ * Makefile.in: Regenerate.
+
+2004-10-26 Mark Mitchell <mark at codesourcery.com>
+
+ * emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Do not emit
+ __exidx_{start,end} when not relocating.
+
+2004-10-25 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.in (earmsymbian.c): Depend on armbpabi.sc, not elf.sc.
+ * ldexp.h (segment_type): New type.
+ (segments): New variable.
+ * ldexp.c (segments): New variable.
+ (exp_print_token): Handle SEGMENT_START.
+ (fold_binary): Likewise.
+ * ldgram.y (SEGMENT_START): Declare it as a token.
+ (exp): Handle SEGMENT_START.
+ * ldlang.h (lang_address_statement_type): Add segment field.
+ (lang_section_start): Change prototype.
+ * ldlang.c (map_input_to_output_sections): Do not process section
+ assignments if a corresponding SEGMENT_START has already been
+ seen.
+ (lang_section_start): Add segment parameter.
+ * ldlex.l (SEGMENT_START): Add it.
+ * lexsup.c (seg_segment_start): New function.
+ (parse_args): Use it for -Tbss, -Tdata, and -Ttext.
+ * ld.texinfo (SEGMENT_START): Document it.
+ * emulparams/armsymbian.sh (EMBEDDED): Set it.
+ * scripttempl/armbpabi.sc: Use SEGMENT_START to control segment
+ base addresses. Do not map relocations.
+ * NEWS: Mention SEGMENT_START.
+
+2004-10-26 Paul Brook <paul at codesourcery.com>
+
+ * ld.texinfo: Document --default-symver.
+ * ldmain.c (main): Set link_info.create_default_symver.
+ * lexsup.c (enum option_values): Add OPTION_DEFAULT_SYMVER.
+ (ld_options): Add default-symver.
+ (parse_args): Handle OPTION_DEFAULT_SYMVER.
+
+2004-10-24 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * pe-dll.c (process_def_file): Don't export all symbols by default if
+ building a position-independent executable.
+
+2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 463
+ * ldmain.c (reloc_overflow): Accept a pointer to struct
+ bfd_link_hash_entry. Report symbol location for relocation
+ overflow.
+
+2004-10-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * genscripts.sh (libpath.exp): Really generate for first
+ emulation only.
+
+2004-10-19 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Simplify
+ comparison and replacement of filenames.
+
+2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 459
+ * ldlang.c (load_symbols): Use the same -Bdynamic/-Bstatic
+ option on linker script as the one for linker script.
+
+2004-10-16 Daniel Jacobowitz <dan at debian.org>
+
+ * ldlang.c (struct excluded_lib, excluded_libs, add_excluded_libs)
+ (check_excluded_libs): New.
+ (load_symbols): Call check_excluded_libs.
+ * ldlang.h (add_excluded_libs): New prototype.
+ * emultempl/elf32.em (OPTION_EXCLUDED_LIBS): Define.
+ (gld${EMULATION_NAME}_add_options): Add --exclude-libs.
+ (gld${EMULATION_NAME}_handle_option): Handle --exclude-libs.
+ * ld.texinfo (Command Line Variables): Document --exclude-libs.
+ (Options Specific to i386 PE Targets): Remove --exclude-libs.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (exp_fold_tree): Don't immediately exit ld on a
+ failing link script assert.
+
+ * ldctor.c (ldctor_add_set_entry): Fix comment typo.
+
+2004-10-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 445
+ * emulparams/elf64_ia64.sh (SMALL_DATA_CTOR): Set.
+ (SMALL_DATA_DTOR): Set.
+ * emulparams/elf64_ia64_fbsd.sh (SMALL_DATA_CTOR): Unset.
+ (SMALL_DATA_DTOR): Unset.
+ * scripttempl/elf.sc: If SMALL_DATA_CTOR is set, move .ctors
+ after .data. If SMALL_DATA_DTOR is set, move .dtors after
+ .data.
+
+2004-10-14 Alan Modra <amodra at bigpond.net.au>
+
+ PR 63
+ * ldlang.h (lang_output_section_statement_type): Make "next" a
+ struct lang_output_section_statement_struct *.
+ (struct orphan_save): Move from elf32.em. Add "name" and "flags".
+ (lang_output_section_find_by_flags, lang_insert_orphan): Declare.
+ * ldlang.c (lang_output_section_find_1): Adjust for changed
+ output_section_statement "next".
+ (strip_excluded_output_sections): Likewise.
+ (lang_record_phdrs): Likewise.
+ (lang_output_section_find_by_flags): New function.
+ (output_prev_sec_find): Move from pe.em. Adjust iterator.
+ (lang_insert_orphan): New function. Tail end of elf32.em's
+ place_orphan merged with that from pe.em. Allow bfd_section to
+ be placed first. New heuristic for placing new output section
+ statement in existing script, and accompanying split of __start
+ symbol alignment into a separate assignment to dot.
+ (lang_add_section): Consistently use output->bfd_section rather than
+ an alias, section->output_section.
+ (map_input_to_output_sections): Rename overly long arg. Move
+ initialization of data_statement output section to here..
+ (lang_check_section_addresses): ..from here.
+ (print_assignment): Correct printing of etree_assert.
+ (print_all_symbols): Don't bomb if userdata is NULL.
+ (IGNORE_SECTION): Rearrange.
+ * emultempl/elf32.em (output_rel_find): Adjust interator.
+ (output_prev_sec_find): Delete.
+ (struct orphan_save): Delete.
+ (gld${EMULATION_NAME}_place_orphan): Cater for zero bfd_section
+ flags without creating a duplicate output section statement.
+ Revise code holding history of various orphan section placements.
+ Allow orphan sections to place before script specified output
+ sections. Call lang_output_section_find_by_flags when placement
+ by name fails. Use lang_insert_orphan.
+ * emultempl/mmo.em (output_prev_sec_find): Delete.
+ (struct orphan_save): Delete.
+ (mmo_place_orphan): Revise code holding history of orphan placement.
+ Allow orphans to place before existing output sections. Use
+ lang_insert_orphan.
+ * emultempl/pe.em (output_prev_sec_find): Delete.
+ (struct orphan_save): Delete.
+ (gld_${EMULATION_NAME}_place_orphan): Revise to suit use of
+ lang_insert_orphan.
+
+2004-10-13 Mark Mitchell <mark at codesourcery.com>
+
+ * scripttempl/armbpabi.sc: Do not put .gnu.version.* into a
+ loadable segment.
+
+2004-10-13 Alan Modra <amodra at bigpond.net.au>
+
+ PR 44
+ * ldcref.c (check_section_sym_xref): Delete.
+ (check_local_sym_xref): New function.
+ (check_nocrossrefs): Adjust call.
+ * emultempl/pe.em (struct orphan_save): Add os_tail.
+ (place_orphan): Backport assorted fixes from elf32.em.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * emultempl/xtensaelf.em: Use ISO C90 formatting.
+
+2004-10-11 Jakub Jelinek <jakub at redhat.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_parse_ld_so_conf): Avoid
+ getline for portability.
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_ld_so_conf): New structure.
+ (gld${EMULATION_NAME}_parse_ld_so_conf,
+ gld${EMULATION_NAME}_parse_ld_so_conf_include): New functions.
+ (gld${EMULATION_NAME}_check_ld_so_conf): Use them.
+
+2004-10-11 Alan Modra <amodra at bigpond.net.au>
+
+ PR 423
+ * ldfile.c (ldfile_try_open_bfd): Ensure dynamic objects are
+ rejected when linking statically.
+
+2004-10-08 Daniel Jacobowitz <dan at debian.org>
+
+ * configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+
+ * ld.texinfo (Xtensa): Describe new linker relaxation to optimize
+ assembler-generated longcall sequences. Describe new --size-opt
+ option.
+ * emulparams/elf32xtensa.sh (OTHER_SECTIONS): Add .xt.prop section.
+ * emultempl/xtensaelf.em (remove_section,
+ replace_insn_sec_with_prop_sec, replace_instruction_table_sections,
+ elf_xtensa_after_open): New.
+ (OPTION_OPT_SIZEOPT, OPTION_LITERAL_MOVEMENT,
+ OPTION_NO_LITERAL_MOVEMENT): Define.
+ (elf32xtensa_size_opt, elf32xtensa_no_literal_movement): New globals.
+ (PARSE_AND_LIST_LONGOPTS): Add size-opt and [no-]literal-movement.
+ (PARSE_AND_LIST_OPTIONS): Add --size-opt.
+ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_OPT_SIZEOPT,
+ OPTION_LITERAL_MOVEMENT, and OPTION_NO_LITERAL_MOVEMENT.
+ (LDEMUL_AFTER_OPEN): Set to elf_xtensa_after_open.
+ * scripttempl/elfxtensa.sc: Update with changes from elf.sc.
+ * Makefile.am (eelf32xtensa.c): Update dependencies.
+ * Makefile.in: Regenerate.
+
+2004-10-07 Jeff Baker <jbaker at qnx.com>
+
+ * lexsup.c: Handle --warn-shared-textrel option.
+ (ld_options): Restore alpha sorting of options.
+ * ldmain.c (main): Initialise warn_shared_info field to FALSE.
+ * ld.texinfo: Add documentation for --warn-shared-textrel.
+ * NEWS: Added mention of --warn-shared-textrel option.
+
+2004-10-05 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * emultempl/crxelf.em (disable_relaxation): Add.
+ (crxelf_before_allocation): Enable --relax option by default.
+ (PARSE_AND_LIST_PROLOGUE): Add OPTION_NO_RELAX.
+ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-relax.
+ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_NO_RELAX.
+
+2004-10-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention SORT_BY_NAME, SORT_BY_ALIGNMENT and
+ --sort-section name|alignment.
+
+ * ld.texinfo: Document SORT_BY_NAME, SORT_BY_ALIGNMENT and
+ --sort-section name|alignment.
+
+ * ld.h (sort_type): New enum.
+ (wildcard_spec): Change the type of `sorted' to sort_type.
+
+ * ldgram.y (SORT): Removed.
+ (SORT_BY_NAME): Added.
+ (SORT_BY_ALIGNMENT): Added.
+ (wildcard_spec): Updated `sorted'. Handle SORT_BY_NAME and
+ SORT_BY_ALIGNMENT.
+ (input_section_spec_no_keep): Updated `sorted'.
+ (statement): Replace SORT with SORT_BY_NAME.
+
+ * ldlang.c (compare_section): New function to compare 2
+ sections with different sorting schemes.
+ (wild_sort): Updated. Use compare_section.
+ (update_wild_statements): New function.
+ (lang_process): Call update_wild_statements before
+ map_input_to_output_sections.
+
+ * ldlex.l (SORT_BY_NAME): New.
+ (SORT_BY_ALIGNMENT): New.
+ (SORT): Return SORT_BY_NAME.
+
+ * ldmain.c (sort_section): New. Defined.
+ (main): Initialize it to none.
+
+ * lexsup.c (option_values): Add OPTION_SORT_SECTION.
+ (ld_options): Add an entry for OPTION_SORT_SECTION.
+ (parse_args): Handle OPTION_SORT_SECTION.
+
+ * mri.c (mri_draw_tree): Updated `sorted'.
+
+2004-10-04 Jakub Jelinek <jakub at redhat.com>
+
+ * ldgram.y (DATA_SEGMENT_RELRO_END): Add one argument.
+ * scripttempl/elf.sc (DATA_SEGMENT_RELRO_END): Add 0 as first
+ argument.
+ (DATA_SEGMENT_RELRO_GOTPLT_END): Pass $SEPARATE_GOTPLT as first
+ and . as second argument.
+ (GOTPLT): Move $DATA_SEGMENT_RELRO_GOTPLT_END before the section.
+ * ldexp.c (fold_unary): Remove DATA_SEGMENT_RELRO_END handling here.
+ (fold_binary): Add it here. Insert padding to make relro_end
+ COMMONPAGESIZE bytes aligned. For DATA_SEGMENT_ALIGN in
+ exp_dataseg_relro_adjust phase just use previously computed
+ exp_data_seg.base.
+ * ldlang.c (lang_size_sections): Set exp_data_seg.base for
+ relro_adjust here. Call lang_size_sections_1 once more if there
+ was too big padding at DATA_SEGMENT_RELRO_END.
+ * ld.texinfo (DATA_SEGMENT_RELRO_END): Add documentation.
+
+2004-10-01 Paul Brook <paul at codesourcery.com>
+
+ * emulparams/armelf.sh: Add unwinding table sections.
+
+2004-09-30 Filip Navara <navaraf at reactos.com>
+
+ * emultempl/pe.em (gld_${EMULATION_NAME}_set_symbols): Generate
+ correct base address for position independant executables.
+ * pe-dll.c (pe_dll_fill_sections): Don't mark position independant
+ executables as DLLs.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * ld.texinfo: Document --target2=abs.
+ * emulparms/armsymbian.sh (TARGET2_TYPE): Set.
+
+2004-09-29 Nick Clifton <nickc at redhat.com>
+
+ * scripttempl/xstormy16.sc: Only perform the assignments to the
+ ROM region when not performing a relocatable link. The ROM region
+ does not start at address 0, but the sections will.
+ * Makefile.am: Fix linker script dependency for the generation of
+ eelf32xstormy16.c.
+ * Makefile.in: Regenerate.
+
+2004-09-18 Filip Navara <navaraf at reactos.com>
+
+ * emulparams/arm_epoc_pe.sh, emulparams/armpe.sh, emulparams/i386pe.sh,
+ emulparams/i386pe_posix.sh, emulparams/mcorepe.sh,
+ emulparams/mipspe.sh, emulparams/ppcpe.sh, scripttempl/pe.sc: Define
+ TARGET_PAGE_SIZE.
+ * scripttempl/pe.sc: Make the virtual address and file offset synced if
+ the alignment is lower than the target page size.
+
+2004-09-27 Filip Navara <navaraf at reactos.com>
+
+ * emultempl/pe.em (gld_${EMULATION_NAME}_unrecognized_file): Allow
+ def_file_parse to handle pe_def_file if NULL and prevent crash with
+ invalid .def files.
+
+2004-09-27 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Enable
+ --emit-stub-syms automatically when --emit-relocs.
+
+2004-09-24 Paul Brook <paul at codeosurcery.com>
+
+ * scripttempl/elf.sc: Keep .preinit_array, .init_array and
+ .fini_array sections.
+
+2004-09-19 Andreas Schwab <schwab at suse.de>
+
+ * ldexp.c (fold_binary) [DATA_SEGMENT_ALIGN]: Adjust data segment
+ base so that relro end is suitably aligned.
+
+2004-09-17 Paul Brook <paul at codesourcery.com>
+
+ * ld.texinfo: Rename arm-specific section. Document --target*
+ * emulparams/armelf_fbsd.sh: Set TARGET2_TYPE.
+ * emulparams/armelf_linux.sh: Ditto.
+ * emulparams/armelf_nbsd.sh: Ditto.
+ * emultempl/armelf.em: Set default for TARGET2_TYPE.
+ (target2_type): New variable.
+ (arm_elf_before_allocation): Don't pass target1_type.
+ (arm_elf_create_output_section_statements): New function.
+ (PARSE_AND_LIST_PROLOGUE): Add OPTION_TARGET2.
+ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --target=.
+ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_TARGET2.
+ (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Set.
+ * emultempl/armelf_oabi.em (_before_allocation): Remove extra
+ argument to bfd_elf32_arm_process_before_allocation.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (fold_name): Update u.undef.next refs.
+ * emultempl/pe.em: Likewise.
+ * emultempl/sunos.em: Likewise.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * aclocal.m4: Regenerate.
+ * po/ld.pot: Regenerate.
+
+2004-09-16 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * scripttempl/elf32crx.sc (.init): Add KEEP for section's *personality*.
+ (.fini): Likewise.
+ (.jcr): Likewise.
+
+2004-09-16 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/armelf_oabi.em (before_allocation): Add extra zero param
+ to bfd_elf32_arm_process_before_allocation call.
+
+2004-09-13 Paul Brook <paul at codesourcery.com>
+
+ * emulparams/armsymbian.sh: Set TARGET1_IS_REL.
+ * emultempl/armelf.em: Use TARGET1_IS_REL. Add --target1-{rel,abs}.
+
+2004-09-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * configure: Regenerated with autconfig 2.13.
+
+2004-09-07 Andreas Schwab <schwab at suse.de>
+
+ * ldexp.c (fold_binary) [DATA_SEGMENT_ALIGN]: Apply data segment
+ alignment before adjusting DATA_SEGMENT_RELRO_END.
+
+2004-09-06 Mark Mitchell <mark at codesourcery.com>
+
+ * emulparams/armsymbian.sh: Use armbpabi script.
+ * scripttempl/armbpabi.sc: New script.
+
+2004-09-02 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add earmsymbian.o.
+ (earmsymbian.c): New target.
+ * configure.tgt: Use armsymbian emulation for arm*-*-symbianelf*.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+ * emulparams/armsymbian.sh: New file.
+
+2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * scripttempl/elf32crx.sc: Edit file with comments.
+ (.init): Add new section.
+ (.fini): Likewise.
+ (.ctor): Control the linkage order.
+ (.dtor): Likewise.
+
+2004-08-27 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/pe.em (after_open): Do not assume that either bfd is
+ an archive.
+
+2004-08-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_init): Don't compare with TRUE.
+
+2004-08-25 Dmitry Diky <diwil at spec.ru>
+
+ * emulparams/msp430all.sh: Fix RAM sizes for all targets.
+ * scripttempl/elf32msp430.sc: Add .profiler section definition.
+
+2004-08-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldlang.c (wildcardp): Defined as a macro with strpbrk.
+
+2004-08-19 Mark Mitchell <mark at codesourcery.com>
+
+ * configure.tgt (arm*-*-symbianelf*): New target.
+ (arm*-*-eabi*): Likewise.
+
+2004-08-19 Jakub Jelinek <jakub at redhat.com>
+
+ * emultempl/ppc64elf.em (non_overlapping_opd): New variable.
+ (ppc_before_allocation): Pass it to ppc64_elf_edit_opd).
+ (OPTION_NON_OVERLAPPING_OPD): Define.
+ (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add
+ --non-overlapping-opd option.
+
+2004-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ PR 338
+ * ldexp.c (fold_name): Don't call bfd_link_add_undef if the symbol
+ was already on the undefs list.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_new_vers_pattern): Dot
+ prefix the symbol field too.
+
+2004-08-13 Alan Modra <amodra at bigpond.net.au>
+
+ * ldmain.c (link_callbacks): Remove "error_handler".
+ * ldmisc.c: Include elf-bfd.h.
+ (vfinfo): Sort comment. Handle %A. Use %A instead of
+ bfd_get_section_indent.
+ (error_handler): Delete.
+ * ldmisc.h (error_handler): Delete declaration.
+
+2004-08-10 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Call
+ ppc64_elf_restore_symbols.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Error if
+ .toc is too large on relocatable linking.
+
+2004-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (ppc_after_open): Delete.
+ (LDEMUL_AFTER_OPEN): Don't define.
+
+2004-08-02 Stephane Carrez <stcarrez at nerim.fr>
+
+ * ld.texinfo (Top): Document specific options of 68HC11 and 68HC12.
+
+2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
+
+ * scripttempl/elfm68hc12.sc: Align text, rodata and data section
+ on power of 2.
+
+2004-07-27 Jason Thorpe <thorpej at wasabisystems.com>
+
+ * emulparams/hppanbsd.sh (OUTPUT_FORMAT): Set to "elf32-hppa-netbsd".
+
+2004-07-26 Dmitry Diky <diwil at spec.ru>
+
+ * Makefile.am: Add new subtargets: msp430x1610, msp430x1611,
+ msp430x1612, msp430x415, msp430x417, msp430xG437, msp430xG438,
+ msp430xG439.
+ * configure.tgt: Likewise.
+ * emulparams/msp430all.sh: Likewise.
+ * Makefile.in: Regenerate.
+
+2004-07-23 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/elf32.em (_place_orphan): Use an already existing
+ section name if that section does not have any flags set.
+
+2004-07-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldlang.c (already_linked_hash_entry): Removed.
+ (already_linked): Likewise.
+ (already_linked_table): Likewise.
+ (section_already_linked): Call bfd_section_already_linked.
+ (lang_process): Replace already_linked_table_init with
+ bfd_section_already_linked_table_init and check return. Replace
+ already_linked_table_free with bfd_section_already_linked_table_free.
+
+2004-07-21 Nick Clifton <nickc at redhat.com>
+
+ * ldlang.c (init_os): Make sure that the newly allocated userdata
+ structure is zeroed out.
+
+2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * NEWS: Mention the new --add-needed/--no-add-needed and
+ --as-needed/--no-as-needed options.
+
+2004-07-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): Also
+ check the add_needed field.
+ (dt_needed): New struct.
+ (gld${EMULATION_NAME}_try_needed): Change the first argument
+ to a pointer to struct dt_needed. Check the DYN_NO_ADD_NEEDED
+ bit in the file where the DT_NEEDED entry comes from.
+ (gld${EMULATION_NAME}_search_needed): Change the second
+ argument to a pointer to struct dt_needed.
+ (gld${EMULATION_NAME}_check_ld_so_conf): Updated.
+ (gld${EMULATION_NAME}_after_open): Likewise.
+
+ * ld.texinfo: Add --add-needed document.
+ * ldlang.c (new_afile): Set p->add_needed.
+ * ldlang.h (lang_input_statement_type): Add add_needed field.
+ * ldmain.h (add_needed): Declare.
+ * ldmain.c (add_needed): New global var.
+ * lexsup.c (option_values): Add OPTION_ADD_NEEDED and
+ OPTION_NO_ADD_NEEDED.
+ (ld_options): Likewise.
+ (parse_args): Handle them.
+
+2004-07-13 Christof Petig <christof at petig-baender.de>
+
+ * emultempl/pe.em (make_import_fixup): Use bfd_get_32 to correct
+ for endian-ness of extracted addend.
+
+2004-07-13 Danny Smith <dannysmith at usesr.sourceforge.net>
+
+ * pe-dll.c (auto_export): Filter on just the import prefix,
+ "_imp_", not "_imp__".
+
+2004-07-09 Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Change sh-sybmian-elf to sh-*-symbianelf.
+
+2004-07-06 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add eelf32crx.o.
+ (eelf32crx.c): New target.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Handle crx-*-elf*.
+ * emulparams/elf32crx.sh: New file.
+ * emultempl/crxelf.em: New file.
+ * scripttempl/elf32crx.sc: New file.
+ * NEWS: Mention new target.
+
+2004-07-06 Nick Clifton <nickc at redhat.com>
+
+ * Makefile.am: Add eshlsymbian.c.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Add sh*-symbian-elf target.
+ * emulparams/shlsymbian.sh: New file. Configure the
+ sh-symbian-elf linker scripts.
+ * scripttemp/elf32sh-symbian.sc: New file. Linker script
+ template for the sh-symbian-elf target.
+
+2004-07-05 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * emulparams/hppa64linux.sh: Define PLT_BEFORE_GOT.
+ * emulparams/hppalinux.sh: Likewise.
+ * scripttempl/elf.sc: Place .plt just before .got when .plt is in
+ data segment and PLT_BEFORE_GOT is defined.
+
+2004-07-03 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * ld.texinfo (WIN32): Document PE weak symbols.
+
+2004-07-02 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * emulparams/shlelf32_linux.sh (COMMONPAGESIZE): Set to 4KB.
+
+2004-07-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldmisc.c (vfinfo): Call bfd_get_section_ident to identify
+ the section.
+
+2004-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_reset_memory_regions): Save last relax pass section
+ size in rawsize.
+
+2004-06-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (print_output_section_statement): Don't print size before
+ relaxation.
+ (IGNORE_SECTION): Remove bfd arg. Update all callers.
+
+ * ldexp.c (fold_name): .. See below.
+ * ldlang.c (section_already_linked, print_output_section_statement,
+ print_input_section, insert_pad, size_input_section,
+ lang_check_section_addresses, lang_size_sections_1,
+ lang_size_sections, lang_do_assignments_1, lang_set_startof,
+ lang_one_common, lang_reset_memory_regions, lang_process,
+ lang_abs_symbol_at_end_of, lang_do_version_exports_section): ..
+ * ldwrite.c (build_link_order, clone_section, ds, split_sections): ..
+ * pe-dll.c (process_def_file, generate_reloc): ..
+ * emultempl/elf32.em (gld${EMULATION_NAME}_find_statement_assignment,
+ gld${EMULATION_NAME}_before_allocation): ..
+ * emultempl/mmix-elfnmmo.em (mmix_after_allocation): ..
+ * emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_before_allocation,
+ sh64_elf_${EMULATION_NAME}_after_allocation): ..
+ * emultempl/sunos.em (gld${EMULATION_NAME}_before_allocation): ..
+ * emultempl/xtensaelf.em (ld_assign_relative_paged_dot,
+ ld_local_file_relocations_fit, ld_xtensa_insert_page_offsets): Use
+ "size" instead of "_raw_size" and "_cooked_size". Expand
+ bfd_section_size macro invocations.
+
+2004-06-22 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * ld/scripttemp/pe.sc (.CRT): Define ___crt_xc_start__,
+ ___crt_xc_end__, ___crt_xi_start__, ___crt_xi_end__, ___crt_xl_start__,
+ ___crt_xp_start__, ___crt_xp_end__, ___crt_xt_start__ and
+ ___crt_xt_end__.
+ (.tls): Define ___tls_start__ and ___tls_end__.
+
+2004-06-21 Alexandre Oliva <aoliva at redhat.com>
+
+ * emulparams/elf32frvfd.sh (GENERATE_PIE_SCRIPT): Set to yes.
+
+2004-06-18 Adam Nemet <anemet at lnxw.com>
+
+ * configure.in: Set EXTRA_SHLIB_EXTENSION to .a for LynxOS.
+ * configure: Regenerate.
+
+2004-06-15 Jakub Jelinek <jakub at redhat.com>
+
+ * scripttempl/elf.sc: Readd KEEP and .gcc_except_table.* to
+ .gcc_except_table output sections lost accidentally with
+ -z relro patch.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ldwrite.c (build_link_order): Use bfd_get_section_size
+ instead of bfd_get_section_size_before_reloc or _raw_size.
+ * pe-dll.c (process_def_file): Likewise.
+
+2004-06-14 Alan Modra <amodra at bigpond.net.au>
+
+ From Richard Wirth <r.wirth at wirthware.de>
+ * ldlang.c (lang_finish): Don't free lang_definedness_table.
+
+2004-05-29 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (gc_section_callback): Move SEC_EXCLUDE twiddles..
+ (lang_gc_sections): .. to a LANG_FOR_EACH_INPUT_STATEMENT loop here.
+
+2004-05-28 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c: Formatting. Wrap long lines, expand bfd_get_section_flags
+ throughout file.
+ * lexsup.c: Formatting. Wrap long lines.
+ * ldwrite.c: Update copyright date.
+
+ * ldlang.c (lang_add_section): Don't twidlle SEC_EXCLUDE here.
+ (output_section_callback): Nor SEC_KEEP here.
+ (gc_section_callback): Twiddle SEC_EXCLUDE here.
+ (lang_gc_wild): Delete. Fold into..
+ (lang_gc_sections_1): ..here. Only call bfd_gc_sections when garbage
+ collecting.
+ (lang_process): Always call lang_gc_sections.
+ (lang_place_orphans): Handle SEC_EXCLUDE sections.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Remove
+ SEC_EXCLUDE code.
+
+2004-05-26 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Clear
+ SEC_EXCLUDE on non-SEC_DEBUGGING sections for relocatable link.
+ * ldlang.c (lang_add_section): Likewise.
+
+2004-05-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_add_section): Set SEC_EXCLUDE for SEC_GROUP
+ sections when doing a final link. Clear SEC_EXCLUDE when doing
+ a relocable link, except for SEC_DEBUGGING sections.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Use the
+ same condition here to drop SEC_EXCLUDE orphan sections.
+
+2004-05-25 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_process): Call bfd_merge_sections later, and
+ only when not a relocatable link.
+ (print_input_section): Handle SEC_EXCLUDE sections.
+ (size_input_section): Don't update dot on SEC_EXCLUDE sections.
+ (lang_do_assignments_1): Likewise.
+ * ldwrite.c (build_link_order): Ignore SEC_EXCLUDE input sections.
+ * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Likewise.
+ * emultempl/hppaelf.em (build_section_lists): Likewise.
+ * emultempl/ppc64elf.em (build_toc_list): Likewise.
+ (build_section_lists): Likewise.
+
+2004-05-23 Andreas Schwab <schwab at suse.de>
+
+ * ld.texinfo (Options): Fix typo in last change.
+
+2004-05-21 Andy Chittenden <achittenden at bluearc.com>
+
+ * ld.h (ld_config_type): Add new field: hash_table_size.
+ * ldmain.c: Initialise the new field to zero. If it is non-zero
+ after parsing the linker's command line call
+ bfd_hash_set_default_size.
+ * lexsup.c (option_values): Add OPTION_HASH_SIZE.
+ (ld_options): Add hash-size.
+ (parse_args): Parse --hash-size option. Allow
+ --reduce-memory-overheads to set the default hash table size as
+ well.
+ * ld.texinfo: Document the new switch. Also mention that
+ --reduce-memory-overheads can affect the hash table size.
+ * NEWS: Mention the new feature.
+
+2004-05-19 J"orn Rennecke <joern.rennecke at superh.com>
+
+ * NEWS: Mention new linker map file generation and the
+ --reduce-memory-overheads option.
+ * ld.texinfo: Document --reduce-memory-overheads option.
+ * ld.h (map_symbol_def): New struct.
+ (struct user_section_struct, section_userdata_type): Rename to:
+ (struct lean_user_section_struct, lean_section_userdata_type).
+ (struct fat_user_section_struct, fat_section_userdata_type): New.
+ (SECTION_USERDATA_SIZE): Define.
+ (args_type): New member reduce_memory_overheads.
+ * ldlang.c (map_obstack): New static variable.
+ (init_map_userdata, print_all_symbols, sort_def_symbol): New functions.
+ (lang_map): Unless command_line.reduce_memory_overheads is set,
+ initialize lists of defined symbols for each section.
+ (print_input_section): Unless command_line.reduce_memory_overheads
+ is set, use print_all_symbols.
+ (init_os): Use lean_section_userdata_type / SECTION_USERDATA_SIZE.
+ * ldmain.c (main): Initialize command_line.reduce_memory_overheads.
+ * lexsup.c (enum option_values): Add OPTION_REDUCE_MEMORY_OVERHEADS.
+ (ld_options): Add entry for --reduce-memory-overheads.
+ (parse_args): Handle OPTION_REDUCE_MEMORY_OVERHEADS.
+
+2004-05-19 Jakub Jelinek <jakub at redhat.com>
+
+ * ldgram.y (sect_constraint): New.
+ (ONLY_IF_RO, ONLY_IF_RW): New tokens.
+ (section): Add sect_constraint. Pass additional argument
+ to lang_enter_output_section_statement.
+ * mri.c (mri_draw_tree): Pass additional argument to
+ lang_enter_output_section_statement.
+ * emultempl/pe.em (place_orphan): Likewise.
+ (output_prev_sec_find): Disregard output section statements with
+ constraint == -1.
+ * emultempl/mmo.em (output_prev_sec_find): Likewise.
+ (mmo_place_orphan): Pass additional argument to
+ lang_enter_output_section_statement.
+ * emultempl/elf32.em (output_prev_sec_find): Disregard output section
+ statements with constraint == -1.
+ (place_orphan): Pass additional argument to
+ lang_enter_output_section_statement.
+ * ldlang.c (lang_enter_overlay_section): Likewise.
+ (lang_output_section_find_1): New.
+ (lang_output_section_find): Use it.
+ (lang_output_section_statement_lookup_1): New.
+ (lang_output_section_statement_lookup): Use it.
+ (check_section_callback, check_input_sections): New.
+ (map_input_to_output_sections): Check if all input sections
+ are readonly if ONLY_IF_RO or ONLY_IF_RW was seen.
+ (strip_excluded_output_sections): Disregard output section statements
+ with constraint == -1.
+ (lang_record_phdrs): Likewise.
+ (lang_enter_output_section_statement): Add constraint argument.
+ Use lang_output_section_statement_lookup_1.
+ * ldlang.h (lang_output_section_statement_type): Add constraint
+ and all_input_readonly fields.
+ (lang_enter_output_section_statement): Adjust prototype.
+ * ldlex.l (ONLY_IF_RO, ONLY_IF_RW): New tokens.
+ * scripttempl/elf.sc (.eh_frame, .gcc_except_table): Move into text
+ segment if all input sections are readonly.
+
+2004-05-19 Adam Nemet <anemet at lnxw.com>
+
+ * scripttempl/i386lynx.sc: Remove file.
+
+2004-05-17 Bob Wilson <bob.wilson at acm.org>
+
+ * ld.texinfo (Output Section Address): Correct subsection name.
+
+2004-05-17 Adam Nemet <anemet at lnxw.com>
+
+ * configure.tgt (powerpc-*-lynxos* case): New case.
+ * configure.host (i[3-7]86-*-lynxos* case): Remove case.
+ * emulparams/ppclynx.sh: New file.
+ * emulparams/i386lynx.sh (SCRIPT_NAME): Update to LynxOS 4.0.
+ * Makefile.am (ALL_EMULATIONS): Add eppclynx.o
+ (ei386lynx.c): Update rule to LynxOS 4.0 ELF.
+ (eppclynx.c): New rule.
+ * Makefile.in: Regenerate.
+
+2004-05-13 Joel Sherrill <joel at oarcorp.com>
+
+ * configure.tgt (or32-*-rtems*): Switch to elf and
+ support versioned targets.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-05-11 Jakub Jelinek <jakub at redhat.com>
+
+ * genscripts.sh: Generate -z combreloc -z now -z relro scripts
+ for binaries, -shared and -pie.
+ * emulparams/elf_i386.sh (SEPARATE_GOTPLT): Set.
+ * emulparams/elf_x86_64.sh (SEPARATE_GOTPLT): Set.
+ * emulparams/elf32ppc.sh (OTHER_READWRITE_SECTIONS): Rename to...
+ (OTHER_RELRO_SECTIONS): ... this.
+ * ldlex.l (DATA_SEGMENT_RELRO_END): Add.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
+ -z relro and -z norelro.
+ (gld${EMULATION_NAME}_list_options): Add it to usage.
+ (gld${EMULATION_NAME}_get_script): Return -z combreloc -z now
+ -z relro scripts when appropriate.
+ * scripttempl/elf.sc: Unset SEPARATE_GOTPLT if RELRO_NOW is set.
+ Create separate .got.plt section if SEPARATE_GOTPLT.
+ Move sections which are only written during relocation handling
+ to the beginning of RW segment. If NO_SMALL_DATA, move .got
+ before .data. Add DATA_SEGMENT_RELRO_END directive.
+ Include OTHER_RELRO_SECTIONS.
+ * ldgram.y (DATA_SEGMENT_RELRO_END): Add.
+ * ldexp.c (exp_print_token): Handle DATA_SEGMENT_RELRO_END.
+ (fold_unary): Likewise.
+ (fold_binary): Handle -z relro.
+ * ldexp.h (struct exp_data_seg): Add exp_dataseg_relro_seen and
+ exp_dataseg_relro_adjust phases. Add relro_end field.
+ * ldmain.c (main): Initialize link_info.relro to FALSE.
+ * ldlang.c (lang_size_sections): Handle -z relro.
+
+2004-05-08 Marek Michalkiewicz <marekm at amelek.gda.pl>
+
+ * scripttempl/avr.sc: Do not set LMA for "eeprom" section.
+
+2004-05-07 J"orn Rennecke <joern.rennecke at superh.com>
+
+ * ldlang.c (print_padding_statement): Cast size_t to bfd_vma
+ before printing it with %W.
+
+2004-05-07 Brian Ford <ford at vss.fsi.com>
+ DJ Delorie <dj at redhat.com>
+
+ * emultempl/pe.em (real_flags): New static.
+ (OPTION_LARGE_ADDRESS_AWARE): New define.
+ (gld${EMULATION_NAME}_add_options): Add --large-address-aware option.
+ (gld_${EMULATION_NAME}_list_options): Likewise.
+ (gld${EMULATION_NAME}_handle_option): Likewise.
+ (gld_${EMULATION_NAME}_after_open): Pass real_flags to PE private data.
+ * ld.texinfo: Document it.
+ * NEWS: Mention it.
+
+2004-05-07 Brian Ford <ford at vss.fsi.com>
+
+ * NEWS: Mention DWARF 2 support for i386pe.
+
+2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * emulparams/elf32frvfd.sh (OUTPUT_FORMAT): Switch to new
+ elf32-frvfdpic.
+
+2004-04-30 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (unique_section_p): Pass section parm, return true on
+ group sections.
+ (output_section_callback): Adjust.
+ * ldlang.h (unique_section_p): Update prototype.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Adjust.
+
+2004-04-30 Eric Botcazou <ebotcazou at act-europe.fr>
+
+ * ld.texinfo (--gc-sections): Remove restriction for
+ dynamic linking.
+
+2004-04-29 Brian Ford <ford at vss.fsi.com>
+
+ * scripttempl/pe.sc: Handle .debug* and .gnu.linkonce.wi.* sections
+ for DWARF 2/3. Update stab section's syntax.
+
+2004-04-29 Alan Modra <amodra at bigpond.net.au>
+
+ * pe-dll.c: Revert changes accidentally committed 2004-03-08.
+ (fill_edata): Correct pointer arithmetic.
+
+2004-04-21 Chris Demetriou <cgd at broadcom.com>
+
+ * ld.texinfo: Remove MIPS --embedded-relocs documentation.
+ * emulparams/elf32bmip.sh (EXTRA_EM_FILE): Remove definition.
+ * emulparams/mipsidt.sh (TEMPLATE_NAME): Use generic.em.
+ (EXTRA_EM_FILE): Use mipsecoff.em
+ * emulparams/mipsidtl.sh (TEMPLATE_NAME): Use generic.em.
+ (EXTRA_EM_FILE): Use mipsecoff.em
+ * emultempl/mipsecoff.em: Restructure to be included as an
+ extra emulation file.
+ (check_sections, gld${EMULATION_NAME}_after_open)
+ (gld${EMULATION_NAME}_after_allocation)
+ (gld${EMULATION_NAME}_get_script)
+ (ld_${EMULATION_NAME}_emulation): Remove
+ (gld${EMULATION_NAME}_before_parse): Rename to...
+ (mipsecoff_before_parse): This.
+ (LDEMUL_BEFORE_PARSE): Define.
+ * emultempl/mipself.em: Remove file.
+ * scripttempl/mips.sc (.rel.sdata): Do not include in output.
+ (__runtime_reloc_start, __runtime_reloc_stop): Stop providing
+ these symbols.
+ * Makefile.am: Remove dependencies on emultempl/mipself.em.
+ * Makefile.in: Regenerate.
+
+2004-04-21 Anil Paranjpe <anilp1 at kpitcummins.com>
+
+ * ld.texinfo (synthesizing on H8/300): Information about linker
+ relaxation support for bit manipulation instructions and system
+ control instructions is added.
+
+2004-04-21 Hans-Peter Nilsson <hp at axis.com>
+
+ * NEWS: Mention change in DEFINED semantics.
+
+2004-04-21 Eric Botcazou <ebotcazou at act-europe.fr>
+
+ * scripttempl/elf.sc (.text): Add KEEP for .text.*personality*.
+ (.data): Add KEEP for .gnu.linkonce.d.*personality*.
+ (.gcc_except_table): Add KEEP for self and accept .gcc_except_table.*.
+
+2004-04-21 Ben Elliston <bje at au.ibm.com>
+
+ * ld.texinfo (Simple Example): Add missing punctuation.
+
+2004-04-20 Chris Demetriou <cgd at broadcom.com>
+
+ * NEWS: Note that MIPS --embedded-relocs option is deprecated.
+
+2004-04-19 Jakub Jelinek <jakub at redhat.com>
+
+ * ldlang.c (lang_do_assignments_1): Handle .tbss output section
+ specially.
+
+2004-04-18 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * scriptempl/pe.sc: Put numbered .ctors.* after .ctors
+ with default priority. Likewise for dtors.
+
+2004-04-11 Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+
+ * configure.host: Remove mips*-dec-bsd* target.
+ * configure.tgt: Likewise.
+
+2004-04-08 Richard Sandiford <rsandifo at redhat.com>
+
+ * emulparams/elf32bsmip.sh (EXTRA_EM_FILE): Define to irix.
+ * emulparams/elf64bmip.sh (EXTRA_EM_FILE): Likewise.
+ * emulparams/elf32bmipn32.sh (EXTRA_EM_FILE): Likewise.
+ * emultempl/irix.em: New file.
+ * Makefile.am (eelf32bsmip.c, eelf32bmipn32.c, eelf64bmip.c): Update
+ dependencies.
+ * Makefile.in: Regenerate.
+
+2004-04-01 Paul Brook <paul at codesourcery.com>
+
+ * emultempl/armelf.em (byteswap_code): Add.
+ (arm_elf_before_allocation): Pass extra parameter.
+ (PARSE_AND_LIST_PROLOGUE): Add OPTION_BE8.
+ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add be8.
+ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_BE8.
+ * emultempl/armelf_oabi.em: Pass extra parameter.
+ * ld.texinfo: Document --be8.
+
+2004-03-30 Stan Shebs <shebs at apple.com>
+
+ Remove long-obsolete MPW support.
+ * mpw-config.in, mpw-make.sed, mac-ld.r: Remove files.
+ * Makefile.am (mpw): Remove file-presynthesizing actions.
+ * Makefile.in: Likewise.
+ * ldfile.c (slash): Remove MPW case.
+ * ldlex.l [MPW]: Remove unused definition.
+
+2004-03-30 Galit Heller <Galit.Heller at nsc.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add eelf32cr16c.o.
+ (eelf32cr16c.c): New target.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Handle cr16c-*-elf*.
+ * emulparams/elf32cr16c.sh: New file.
+ * scripttempl/elfcr16c.sc: Likewise
+ * NEWS: Mention support for new target.
+
+2004-03-30 Nick Clifton <nickc at redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2004-03-27 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em: Update new bfd_elf_discard_info name.
+ * emultempl/hppaelf.em: Likewise.
+ * emultempl/ppc64elf.em: Likewise.
+ * emultempl/sh64elf.em: Likewise.
+
+2004-03-25 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Update
+ size_dynamic_sections call.
+
+2004-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ PR 51.
+ * emultempl/ppc64elf.em (ppc_create_output_section_statements): Set
+ link_info.wrap_char.
+
+2004-03-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * lexsup.c (parse_args): Don't set unresolved_syms_in_objects
+ or unresolved_syms_in_shared_libs for -Bdynamic and -Bstatic.
+
+2004-03-20 Alexandre Oliva <aoliva at redhat.com>
+
+ * emulparams/elf32frvfd.sh (MAXPAGESIZE): Change to 16Kb.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * config.in: Regenerate.
+ * po/ld.pot: Regenerate.
+
+2004-03-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.texinfo: Add --as-needed doco.
+ * ldmain.c (as_needed): New global var.
+ * ldmain.h (as_needed): Declare.
+ * lexsup.c (option_values): Add OPTION_AS_NEEDED and
+ OPTION_NO_AS_NEEDED.
+ (ld_options): Likewise.
+ (parse_args): Handle them.
+ * ldlang.h (lang_input_statement_type): Add as_needed field.
+ * ldlang.c (new_afile): Set p->as_needed.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): New function.
+ (gld${EMULATION_NAME}_try_needed): Use bfd_elf_set_dyn_lib_class.
+ (ld_${EMULATION_NAME}_emulation): Set LDEMUL_RECOGNIZED_FILE entry.
+
+ * ldlang.c (open_input_bfds): Remove useless cast.
+ (lang_do_assignments_1): Likewise.
+ (lang_for_each_input_section): Delete.
+
+2004-03-17 Ralf Corsepius <corsepiu at faw.uni-ulm.de>
+
+ * configure.tgt: Switch sh-*-rtems* to ELF. Add sh-*-rtemscoff*.
+
+2004-03-08 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * pe-dll.c (pe_dll_generate_implib): Skip sections marked as
+ private when building implib.
+
+2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ldlang.c (lang_add_section): Don't force SEC_LOAD on
+ SEC_THREAD_LOCAL.
+ (IGNORE_SECTION): Ignore .tbss sections too.
+ (lang_size_sections_1): .tbss sections do not advance dot.
+
+2004-03-01 Andreas Schwab <schwab at suse.de>
+
+ * ld.texinfo (Options): Fix example for --wrap.
+
+2004-02-25 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * pe-dll.c (fill_edata): Check that exported_symbol_sections is
+ not NULL.
+
+2004-02-23 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * ldlang.c (lang_check): Use %P, not %E, in error message.
+
+2004-02-23 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ldlang.h (struct lang_output_section_state): Change processed
+ field's type.
+ * ldexp.c (check, invalid): Remove.
+ (fold_name): Move valid_p assignments. Create undefined symbol
+ when needed. Directly exampine section's processd flag.
+ * ldlang.c (lang_output_section_statement_lookup): Adjust
+ processed field init.
+ (lang_size_sections_1): Allow LOADADDR when determining section's
+ VMA. Adjust error message. Fold data statement's expr.
+ (lang_size_sections): Correctly increment lang_statement_iteration.
+
+2004-02-23 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (fold_tree): Follow indirect symbols.
+
+2004-02-20 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ldgram.y (exp): Add two operand ALIGN.
+ * ldexp.c (fold_binary): Add ALIGN_K case.
+ * ld.texinfo (ALIGN): Document two operand version.
+
+2004-02-19 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ldlang.c (map_input_to_output_sections): Initialize sections
+ mentioned in a data statement expression.
+ (lang_do_assignments_1): Add data statement's expression's
+ section's vma.
+
+2004-02-18 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ldgram.y (statement_anywhere): Add assert rule.
+ * ldlang.c (exp_init_os): Add assert case.
+
+2004-02-14 Andrew Cagney <cagney at redhat.com>
+
+ * ldmain.c (remove_output): Call bfd_cache_close.
+
+2004-02-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * emulparams/elf32bmipn32-defs.sh (OTHER_SECTIONS): Discard
+ .MIPS.content* and .MIPS.events* sections.
+
+2004-02-09 Daniel Jacobowitz <drow at mvista.com>
+
+ * emulparams/armelf.sh, emulparams/armelf_linux.sh: Move
+ .note.gnu.arm.ident to after allocated sections. Mark its
+ address as 0.
+
+2004-02-09 Daniel Jacobowitz <drow at mvista.com>
+
+ * emulparams/armelf_linux.sh (COMMONPAGESIZE): Set to 4KB.
+ * emulparams/elf32bmip.sh (COMMONPAGESIZE): Likewise.
+ * emulparams/elf32bmipn32.sh (COMMONPAGESIZE): Likewise.
+ * emulparams/elf32btsmipn32.sh (COMMONPAGESIZE): Likewise.
+ * emulparams/shlelf_linux.sh (COMMONPAGESIZE): Likewise.
+
+2004-02-05 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/pe.em (_after_open): Fix typo in previous delta.
+
+2004-02-04 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * emultempl/pe.em (_after_open): Fix thinko in 2003-12-18 patch.
+
+2004-01-28 Alan Modra <amodra at bigpond.net.au>
+
+ * genscripts.sh: Fix typo.
+
+ * genscripts.sh: Apply $LIBPATH_SUFFIX to $tool_lib and $libdir too.
+
+2004-01-24 Jakub Jelinek <jakub at redhat.com>
+
+ * emulparams/elf64_ia64.sh: Put .rela.opd into
+ OTHER_GOT_RELOC_SECTIONS instead of OTHER_PLT_RELOC_SECTIONS.
+
+2004-01-20 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * pe-dll.c (pe_create_import_fixup): Clear WP_TEXT flag.
+ * ld.texinfo (--omagic): Note that writable text section
+ does not conform to published PE-COFF specs.
+ (--enable-auto-import): Likewise.
+
+2004-01-15 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/elf32ppc.sh (COMMONPAGESIZE): Define.
+
+2004-01-13 Nick Clifton <nickc at redhat.com>
+
+ * ldlang.c (lang_get_regions): Add extra parameter 'have_vma'
+ which if true will prevent the LMA region being used as a
+ replacement for a default VMA region.
+ (lang_leave_output_section_statement): Pass extra parameter.
+ (lang_leave_overlay): Likewise.
+ * ld.texinfo (Output Section LMA): Document that the LMA
+ region can be set to the VMA region if no VMA has been set.
+ * ldlang.h (struct lang_output_section_phdr_list): Create a
+ typedef for this type. Minor formatting fixes.
+
+2004-01-13 Nick Clifton <nickc at redhat.com>
+
+ * ldlang.c (lang_size_sections_1): If dot is advanced, then
+ assume that the section should be allocated.
+
+2004-01-13 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (IGNORE_SECTION): Don't ignore SEC_ALLOC && !SEC_LOAD
+ sections. Do ignore SEC_NEVER_LOAD sections.
+ (lang_size_sections_1): Remove test made redundant with the above.
+
+2004-01-09 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (ppc_before_allocation): Clear cached
+ program_header_size.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-11-28 Alexandre Oliva <aoliva at redhat.com>
+ * emulparams/elf32frvfd.sh (EMBEDDED): Clear.
+ 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
+ * emulparams/elf32frvfd.sh (STACK_ADDR): Unset.
+ (MAXPAGESIZE): Set to 64Kb.
+ (OTHER_READONLY_SECTIONS): Define __ROFIXUP_LIST__ and
+ __ROFIXUP_END__. Don't map .rofixup.got any more.
+ * emulparams/elf32frv.sh (NOP): Set.
+ 2003-10-31 Alexandre Oliva <aoliva at redhat.com>
+ * configure.tgt: Add frv-*-*linux*.
+ 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
+ * Makefile.am (ALL_EMULATIONS): Added eelf32frvfd.o.
+ (eelf32frvfd.c): New.
+ * configure.tgt <frv-*-*>: Added it to targ_extra_emuls.
+ * emulparams/elf32frv.sh: Reverted previous two patches.
+ * emulparams/elf32frvfd.sh: New.
+ * Makefile.in: Rebuilt.
+ 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
+ * emulparams/elf32frv.sh (OTHER_READONLY_SECTIONS): Added
+ .rofixup.got to .rofixup.
+ 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
+ * emulparams/elf32frv.sh (MAXPAGESIZE): Make it 256KiB, not 256B.
+ (TEMPLATE_NAME, GENERATE_SHLIB_SCRIPT): Set.
+
+2004-01-05 Jakub Jelinek <jakub at redhat.com>
+
+ * emulparams/elf_s390.sh (NO_SMALL_DATA): Set to yes.
+ * emulparams/elf64_s390.sh (NO_SMALL_DATA): Set to yes.
+
+2004-01-03 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (align_n): Make static.
+ * ldexp.h (align_n): Delete declaration.
+ * ldlang.h (lang_enter_output_section_statement): Remove
+ block_value param.
+ * ldlang.c (lang_enter_output_section_statement): Likewise.
+ (TO_ADDR, TO_SIZE): Define.
+ (opb_shift): New var.
+ (init_opb): New function.
+ (print_input_section): Call init_opb and use TO_ADDR.
+ (print_data_statement, print_reloc_statement): Likewise.
+ (print_padding_statement): Likewise.
+ (size_input_section): Use TO_SIZE and TO_ADDR, and global opb_shift.
+ (lang_check_section_addresses): Likewise.
+ (lang_size_sections_1): Likewise.
+ (lang_do_assignments_1): Likewise.
+ (lang_set_startof): Likewise.
+ (lang_one_common): Likewise. Combine power_of_two and opb_shift align.
+ (lang_process): Call init_opb.
+ (lang_abs_symbol_at_end_of): Use TO_ADDR and global opb_shift.
+ (lang_enter_overlay_section): Adjust
+ lang_enter_output_section_statement call.
+ * ldgram.y: Likewise.
+ * mri.c (mri_draw_tree): Likewise.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Likewise.
+ * emultempl/mmo.em (mmo_place_orphan): Likewise.
+ * emultempl/pe.em (gld${EMULATION_NAME}_place_orphan): Likewise.
+
+ * ldfile.c (ldfile_set_output_arch): Add defarch param.
+ * ldfile.h (ldfile_set_output_arch): Ditto.
+ * emultempl/aix.em (gld${EMULATION_NAME}_before_parse): Use
+ ldfile_set_output_arch.
+ * emultempl/beos.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/linux.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/mipsecoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/pe.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/sunos.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * ldgram.y: Adjust ldfile_set_output_arch call.
+ * emultempl/armcoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/armelf.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/armelf_oabi.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/generic.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/gld960c.em (gld960_set_output_arch): Ditto.
+ * emultempl/m68kcoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
+ * emultempl/ticoff.em (gld${EMULATION_NAME}_before_parse): Ditto.
+
+2004-01-02 Bernardo Innocenti <bernie at develer.com>
+
+ * configure.tgt: Add m68k-uClinux target.
+
+For older changes see ChangeLog-0203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/ld/ChangeLog-2005
===================================================================
--- branches/binutils/package/ld/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1842 @@
+2005-12-28 Jie Zhang <jie.zhang at analog.com>
+
+ * emulparams/bfin.sh: Define DATA_END_SYMBOLS and END_SYMBOLS.
+ And add a prefix '_' to ENTRY.
+ * scripttempl/elf.sc: Add END_SYMBOLS.
+
+2005-12-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/xtensaelf.em (elf_xtensa_place_orphan): Delete.
+ (LDEMUL_PLACE_ORPHAN): Delete.
+
+2005-12-27 Leif Ekblad <leif at rdos.net>
+
+ * configure.tgt: Add support for RDOS targets.
+
+2005-12-27 Nick Clifton <nickc at redhat.com>
+
+ * po/vi.po: New Vietnamese translation.
+ * configure.in (ALL_LINGUAS): Add vi.
+ * configure: Regenerate.
+
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2005-12-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.h (lang_output_section_statement_type): Add prev.
+ * ldlang.c (output_statement_newfunc): Set os.prev.
+ (lang_insert_orphan): Likewise.
+ (output_prev_sec_find): Use os.prev.
+
+2005-12-22 Santosh Raktawan <santoshr2 at kpitcummins.com>
+
+ * ld/emulparms/h8300helf.sh (TINY_READONLY_SECTION,
+ TINY_DATA_SECTION, TINY_BSS_SECTION): Define.
+ * ld/emulparms/h8300self.sh: Likewise.
+ * ld/emulparms/h8300sxelf.sh: Likewise.
+ * ld/scripttempl/elf.sc: Add TINY_READONLY_SECTION,
+ TINY_DATA_SECTION, TINY_BSS_SECTION.
+
+2005-12-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/2065
+ * ldlang.c (output_statement_newfunc): Revert the change made on
+ 2005-11-16.
+ (output_prev_sec_find): Likewise.
+ * ldlang.h (lang_statement_list_type): Likewise.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
+
+2005-12-14 Jakub Jelinek <jakub at redhat.com>
+
+ * scripttempl/elf.sc: Put .gnu.linkonce.d.rel.ro.* sections into
+ .data.rel.ro output section. Fix a pasto for -z nocombreloc
+ .rela.data.rel.ro section content.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
+ (eelf32mt.c): Update target name and dependencies.
+ * Makefile.in: Rebuilt.
+ * configure.tgt: Replace ms1 arch with mt arch.
+ * emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
+ comment.
+
+2005-12-11 Bernhard Fischer <aldot at gcc.gnu.org>
+
+ * scripttempl/armbpabi.sc: Fix typo in comment for .ctors.
+ * scripttempl/elf.sc: Ditto.
+ * scripttempl/elf32sh-symbian.sc: Ditto.
+ * scripttempl/elf_chaos.sc: Ditto.
+ * scripttempl/elfd10v.sc: Ditto.
+ * scripttempl/elfd30v.sc: Ditto.
+ * scripttempl/elfxtensa.sc: Ditto.
+ * scripttempl/iq2000.sc: Ditto.
+ * scripttempl/xstormy16.sc: Ditto.
+
+2005-12-08 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc32elf.em (emit_stub_syms): New var.
+ (ppc_after_open): Pass it to ppc_elf_select_plt_layout.
+ (PARSE_AND_LIST_PROLOGUE <OPTION_STUBSYMS>): Define.
+ (PARSE_AND_LIST_LONGOPTS): Add emit-stub-syms.
+ (PARSE_AND_LIST_OPTIONS): Describe emit-stub-syms.
+ (PARSE_AND_LIST_OPTIONS): Handle it.
+
+2005-12-08 Alan Modra <amodra at bigpond.net.au>
+
+ * pe-dll.c (build_filler_bfd): Conform error message to standard.
+ (pe_dll_generate_implib): Use %E in error message.
+ (add_bfd_to_link): Likewise.
+ (pe_implied_import_dll): Likewise.
+
+2005-12-07 Thiemo Seufer <ths at networkno.de>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1932
+ * emultempl/elf32.em (gld${EMULATION_NAME}_find_exp_assignment):
+ Adjust bfd_elf_record_link_assignment call.
+
+ * ldexp.c (exp_fold_tree_1): Remove call to bfd_hide_symbol.
+
+2005-11-25 Jan Beulich <jbeulich at novell.com>
+
+ * Makefile.am: Make configdoc.texi writeable before trying
+ to write to it.
+ * Makefile.in: Refresh.
+
+2005-11-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_output_section_find_by_flags): Add match_type param.
+ Run two passes, first using match_type, second without.
+ * ldlang.h (lang_match_sec_type_func): New typedef.
+ (lang_output_section_find_by_flags): Update prototype.
+ bfd_match_sections_by_type and lang_output_section_find_by_flags.
+ * emultempl/pe.em (place_orphan): Likewise.
+
+2005-11-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_insert_orphan): Skip first assignment to dot
+ in script when looking for place to insert orphan statements.
+
+2005-11-18 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/elf64ppc.sh (.tocbss): Use new section alignment scheme.
+ (.got, .toc1, .opd): Likewise.
+
+2005-11-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_size_sections_1): Revert 2005-11-16 functional
+ changes to section alignment.
+ * ldmisc.c (vfinfo): Handle %ld and %lu.
+
+2005-11-16 Mark Mitchell <mark at codesourcery.com>
+
+ * Makefile.am (configdoc.texi): Set top_srcdir in configdoc.texi..
+ * Makefile.in: Regenerated.
+ * ld.texinfo: Include configdoc.texi and ldver.texi in man pages.
+ Add @file documentation.
+
+2005-11-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.h (lang_input_section_type): Remove "ifile" field.
+ (lang_insert_orphan, lang_add_section): Update prototypes.
+ * ldlang.c (lang_insert_orphan): Remove "file" param.
+ (lang_add_section): Likewise. Update all callers.
+ (wild_sort): Get an input section's bfd via "section->owner".
+ (size_input_section): Access just_syms_flag via bfd usrdata.
+ (lang_place_orphans): Update ldemul_place_orphan call.
+ * ldemul.h (ldemul_place_orphan): Remove input_statement param.
+ (struct ld_emulation_xfer_struct <place_orphan>): Likewise.
+ * ldemul.c (ldemul_place_orphan): Likewise.
+ * ldwrite.c (build_link_order): Access just_syms_flag via bfd usrdata.
+ * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Likewise.
+ * emultempl/beos.em (sort_by_file_name): Access bfd by section->owner.
+ (sort_sections): Likewise.
+ (place_orphan): Remove "file" param. Adjust lang_add_section call.
+ * emultempl/elf32.em (place_orphan): Remove "file" param. Adjust
+ lang_add_section and lang_insert_orphan calls.
+ * emultempl/hppaelf.em (hppaelf_add_stub_section): Adjust
+ lang_add_section call.
+ (build_section_lists): Access just_syms_flag via bfd usrdata.
+ * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Adjust
+ lang_add_section call.
+ * emultempl/mmo.em (mmo_place_orphan): Remove "file" param. Adjust
+ lang_add_section and lang_insert_orphan calls.
+ * emultempl/pe.em (place_orphan): Likewise. Access bfd via section
+ owner.
+ * emultempl/ppc64elf.em (ppc_add_stub_section): Adjust
+ lang_add_section call.
+ (build_toc_list): Access just_syms_flag via bfd usrdata.
+ (build_section_lists): Likewise.
+ * emultempl/xtensaelf.em (elf_xtensa_place_orphan): Remove "file"
+ param. Adjust place_orphan call.
+ (ld_build_required_section_dependence): Access bfd via section owner.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.h (lang_output_section_statement_type): Add prev.
+ * ldlang.c (new_afile): Always init header.type.
+ (output_statement_newfunc): Set os.prev.
+ (output_prev_sec_find): Use os.prev.
+ (lang_enter_output_section_statement): Formatting.
+ (lang_final, lang_add_target, lang_add_fill): Likewise.
+ (lang_add_data, lang_add_reloc): Likewise.
+ (lang_add_attribute): Only alloc the header.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.texinfo (Forced Output Alignment): Specify that this is an
+ alignment increase, not an override.
+ * ldlang.c (init_os): Set output section alignment here..
+ (lang_add_section): ..rather than here.
+ (lang_size_sections_1): Consolidate alignment code. Warn if section
+ alignment affects start address when explicit address given.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-11-07 Olaf Hering <olh at suse.de>
+
+ * ldmain.c (main): Add \n to error message.
+
+2005-11-04 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (struct output_statement_hash_entry): Don't indirect to os.
+ (output_statement_newfunc): Rewrite.
+ (lang_output_section_find_1): Merge into..
+ (lang_output_section_find): ..here.
+ (lang_output_section_statement_lookup_1): Rewrite to handle
+ multiple sections with the same name.
+ (output_statement_table_init): Commonise error message.
+ (lang_init, open_output): Likewise.
+
+2005-11-03 Paul Brook <paul at codesourcery.com>
+
+ * scripttempl/elf.sc: Add .init_array.* and .fini_array.*.
+ * scripttempl/armbpabi.sc: Make init/fini array consistent with
+ elf.sc.
+ * scripttempl/elf32sh-symbian.sc: Ditto.
+ * scripttempl/elfxtensa.sc: Ditto.
+
+2005-11-03 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.h (lang_output_section_statement_type): Rearrange. Remove
+ memspec. Make "processed" a bitfield.
+ (lang_data_statement_type, lang_reloc_statement_type): Rename
+ output_vma to output_offset.
+ * ldlang.c (lang_output_section_statement_lookup_1): Init
+ all_input_readonly. Don't init memspec.
+ (init_os): Remove incorrect comment.
+ (print_data_statement, print_reloc_statement): Adjust for
+ lang_data_statement_type and lang_reloc_statement_type change.
+ (lang_size_sections_1, lang_add_reloc): Likewise.
+ * ldwrite.c (build_link_order): Likewise.
+
+2005-10-30 Mark Mitchell <mark at codesourcery.com>
+
+ * lexsup.c (help): Document "@FILE".
+
+2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+
+ * dep-in.sed: Replace " ./" with " ".
+
+2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * Makefile.am: Add support for Z80
+ * Makefile.in: Regenerated
+ * configure.tgt: Add z80-*-coff
+ * emulparams/z80.sh: New file.
+ * emultempl/z80.em: New file.
+ * scripttempl/z80.sc New file.
+ * NEWS: Mention this new support.
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * po/ld.pot: Regenerate.
+
+2005-10-25 Chris Metcalf <cdmetcalf at comcast.net>
+
+ * ld.texinfo (--reduce-memory-overheads): Fix typo.
+
+2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1487
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Call
+ bfd_match_sections_by_type to match section types.
+
+ * ldlang.c (init_os): Take the input section. Call
+ bfd_init_private_section_data if the input section isn't NULL.
+ (exp_init_os): Pass NULL to init_os.
+ (map_input_to_output_sections): Likewise.
+ (lang_add_section): Pass the input section to init_os.
+
+2005-10-19 Paul Brook <paul at codesourcery.com>
+
+ * emulparams/armelf.sh: Add .ARM.attributes to OTHER_SECTIONS.
+
+2005-10-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1467
+ * emultempl/elf32.em: Include "elf-bfd.h".
+ (gld${EMULATION_NAME}_place_orphan): Check section type and
+ don't use section name for ELF input sections.
+
+ * ld.texinfo: Document orphan section processing.
+
+ * ldlang.c (lang_output_section_find_by_flags): Match section
+ types by calling bfd_match_sections_by_type.
+
+2005-10-13 Mark Mitchell <mark at codesourcery.com>
+
+ * ld.texino: Describe double-quoted string syntax for version
+ nodes.
+ * ldlang.h (lang_new_vers_pattern): Add literal_p parameter.
+ * ldgram.y (vers_defns): Allow NAME as well as VERS_IDENTIFIER.
+ Adjust calls to lang_new_vers_pattern to pass literal_p argument.
+ * ldlang.c (lang_vers_match): Fix indentation. Do not glob-match
+ version nodes without a pattern.
+ (lang_new_vers_pattern): Add literal_p parameter.
+ (lang_do_version_exports_section): Pass it.
+
+2005-10-12 Mark Mitchell <mark at codesourcery.com>
+
+ * NEWS: Mention @file.
+
+2005-10-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1396
+ * ldcref.c (check_refs): Accept bfd_boolean.
+ (check_local_sym_xref): Pass FALSE to check_refs.
+ (check_nocrossref): Pass TRUE to check_refs.
+ (check_refs_info): Add bfd_boolean.
+ (check_refs): Add bfd_boolean to check_refs_info.
+ (check_reloc_refs): Match relocations with proper symbols.
+
+ * ldmisc.c (vfinfo): Don't add extra ":\n".
+
+2005-10-05 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * emultempl/pe.em (gld_${EMULATION_NAME}_before_parse): Set
+ default entry symbol to ENTRY here.
+ * scripttempl/pe.sc: Not here.
+
+2005-09-30 James E Wilson <wilson at specifix.com>
+
+ * ldlang.c (lang_startup): Add missing ": " to einfo call.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldlang.c (output_statement_hash_entry): New type.
+ (output_statement_table): New variable for hash table.
+ (output_statement_newfunc): New function.
+ (output_statement_table_init): Likewise.
+ (output_statement_table_free): Likewise.
+ (lang_init): Call output_statement_table_init.
+ (lang_finish): Renamed to ...
+ (lang_end): This.
+ (lang_process): Updated.
+ (lang_finish): New function.
+ (lang_output_section_find_1): Use hash table.
+ (lang_output_section_statement_lookup_1): Likewise.
+
+ * ldlang.h (lang_finish): New.
+
+ * ldmain.c (main): Call lang_finish.
+
+2005-09-30 Mark Mitchell <mark at codesourcery.com>
+
+ * ldmain.c (main): Use expandargv.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * configure.tgt: Bfin support.
+ * emulparams/bfin.sh: New file.
+ * emultempl/bfin.em: New file.
+
+2005-09-30 Matthias Kurz <mk at baerlap.north.de>
+
+ * ld.h: Prevent the inclusion of <libintl.h> from the Solaris
+ version of <locale.h> when ENABLE_NLS is not defined.
+
+2005-09-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld.texinfo (ALIGN): Document it as forcing output section
+ alignment.
+
+ * ldgram.y (ALIGN): Support it for forcing output section
+ alignment.
+
+2005-09-20 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.h (lang_output_section_statement_struct): Change type of
+ "processed" to bfd_boolean.
+ * ldexp.c (fold_name): Update references to os->processed.
+ * ldlang.c (lang_output_section_statement_lookup_1): Likewise.
+ (lang_size_sections_1): Likewise.
+ (lang_reset_memory_regions): Likewise.
+
+ PR ld/1353
+ * ldlang.c (lang_size_sections_1): Process addr_tree earlier,
+ so that unused output section statements affect dot.
+
+2005-09-08 Jakub Jelinek <jakub at redhat.com>
+
+ * ld.texinfo: Document -z {no,}execstack, -z {no,}relro
+ and --eh-frame-hdr options.
+
+2005-09-07 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (fold_name <SIZEOF>): Return 0 for non-existent section.
+ (exp_fold_tree_1): Print assert message only in final stage of
+ linking. Trigger assertion failure if expression cannot be
+ evaluated.
+
+2005-09-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1263
+ * emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols): Check
+ --just-symbols on DSO.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempl/elf.sc: Remove commented out defines.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/a29k.sh: Delete.
+ * emulparams/ebmon29k.sh: Delete.
+ * emulparams/sa29200.sh: Delete.
+ * Makefile.am: Remove a29k support.
+ * configure.tgt: Likewise.
+ * ld.texinfo: Likewise.
+ * Makefile.in: Regenerate.
+
+2005-08-17 Jakub Jelinek <jakub at redhat.com>
+
+ * ldgram.y (vers_defns): Don't lose pattern list before
+ extern NAME {}. Handle global, local and extern symbol names.
+
+2005-08-17 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation):
+ Don't increment rel_count of .cranges here. Set rawsize of .cranges.
+
+2005-08-10 Nick Clifton <nickc at redhat.com>
+
+ * pe-dll.c (pe_exe_fill_sections): Call lang_reset_memory_regions
+ before lang_size_sections.
+
+2005-08-09 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/hppa64linux.sh (LARGE_SECTIONS): Remove .tbss.
+
+2005-08-08 Eric Doenges <Eric.Doenges at betty-tv.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add msp430x21xx variants.
+ Add rules to build these emulations.
+ * Makefile.in: Regenerate.
+ * configure.tgt (msp430): Add the new variants to the
+ targ_extra_emuls list.
+ * emulparams/msp430all.sh: Add entries for the msp430x21xx
+ variants.
+
+2005-08-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld.texinfo: Document PROVIDE_HIDDEN.
+
+ * ldexp.c (exp_fold_tree_1): Hide a provided symbol if asked.
+ (exp_provide): Add and set hidden.
+
+ * ldexp.h (etree_type): Add hidden to assign.
+
+ * ldgram.y (PROVIDE_HIDDEN): New.
+ * ldlex.l (PROVIDE_HIDDEN): Likewise.
+
+ * scripttempl/elf.sc: Use PROVIDE_HIDDEN on array bound
+ symbols.
+
+2005-08-05 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/elf_x86_64.sh: Revert last change.
+ * scripttempl/elf.sc (REL_LARGE, LARGE_SECTIONS): Define here.
+
+2005-08-05 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/armelf.sh (OTHER_BSS_END_SYMBOLS): Split out from
+ OTHER_END_SYMBOLS.
+ * emulparams/armelf_linux.sh: Likewise.
+ * emulparams/armnto.sh: Likewise.
+ * emulparams/criself.sh: Likewise.
+ * emulparams/elf32mcore.sh: Likewise.
+ * emulparams/criself.sh (OTHER_SYMBOLS): Define.
+ * emulparams/crislinux.sh (OTHER_SYMBOLS): Define.
+ (OTHER_END_SYMBOLS): Don't define.
+ * emulparams/elf32fr30.sh: Likewise.
+ * emulparams/elf64mmix.sh: Likewise.
+ * emulparams/hppa64linux.sh: Likewise.
+ * emulparams/m32relf.sh: Likewise.
+ * emulparams/vxworks.sh: Likewise.
+ * scripttempl/armbpabi.sc (OTHER_BSS_SECTIONS): Delete.
+ (OTHER_BSS_END_SYMBOLS): Add.
+ (OTHER_END_SYMBOLS): Move before current end sym definitions.
+ (OTHER_SYMBOLS): Replace OTHER_END_SYMBOLS near end of script.
+ * scripttempl/elf.sc: Likewise.
+ * scripttempl/elf32sh-symbian.sc: Likewise.
+ * scripttempl/elf_chaos.sc: Likewise.
+ * scripttempl/elfxtensa.sc: Likewise.
+ * scripttempl/iq2000.sc: Likewise.
+ * scripttempl/xstormy16.sc: Likewise.
+
+ * scripttempl/elf.sc (LBSS, LARGE_SECTIONS): Delete.
+ (REL_LDATA, REL_LBSS, REL_LRODATA): Delete.
+ (REL_LARGE, LARGE_SECTIONS): Add.
+ * emulparams/elf_x86_64.sh (LARGE_SECTIONS): Define as script text.
+ (REL_LARGE): Define.
+ * emulparams/hppa64linux.sh (OTHER_BSS_SECTIONS): Don't define.
+ (LARGE_SECTIONS): Define.
+ * emulparams/hppa64linux.sh (OTHER_BSS_SECTIONS): Don't define.
+ (LARGE_SECTIONS): Define.
+
+2005-08-04 Alan Modra <amodra at bigpond.net.au>
+
+ * ldemul.c (ldemul_do_assignments, do_assignments_default): Delete.
+ * ldemul.h (ldemul_do_assignments, do_assignments_default): Delete.
+ (struct ld_emulation_xfer_struct): Remove do_assignments field.
+ * ldlang.c (lang_do_assignments): Don't call ldemul_do_assignments.
+ * emulparams/elf32ppc.sh (SDATA_START_SYMBOLS): New.
+ (SDATA2_START_SYMBOLS, SBSS_START_SYMBOLS, SBSS_END_SYMBOLS): New.
+ * emultempl/aix.em (ld_*_emulation): Delete do_assignments init.
+ * emultempl/armcoff.em: Likewise.
+ * emultempl/beos.em: Likewise.
+ * emultempl/generic.em: Likewise.
+ * emultempl/gld960.em: Likewise.
+ * emultempl/gld960c.em: Likewise.
+ * emultempl/linux.em: Likewise.
+ * emultempl/lnk960.em: Likewise.
+ * emultempl/m68kcoff.em: Likewise.
+ * emultempl/pe.em: Likewise.
+ * emultempl/sunos.em: Likewise.
+ * emultempl/ticoff.em: Likewise.
+ * emultempl/vanilla.em: Likewise.
+ * emultempl/elf32.em: Likewise.
+ (gld*_provide_bound_symbols): Delete.
+ (gld*_provide_init_fini_syms): Delete.
+ (gld*_before_allocation): Don't call ldemul_do_assignments.
+ * emultempl/ppc32elf.em (ppc_do_assignments): Delete.
+ (LDEMUL_DO_ASSIGNMENTS): Delete.
+ * scripttempl/elf.sc: Provide init/fini syms. Add SBSS_START_SYMBOLS,
+ SBSS_END_SYMBOLS, SDATA2_START_SYMBOLS.
+
+2005-08-04 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (eelf32m32c.c): Fix dependencies.
+ * Makefile.in: Regenerate.
+
+2005-08-04 Alan Modra <amodra at bigpond.net.au>
+
+ * ldemul.c (ldemul_finish): Call ld_emulation->finish unconditionally.
+ (finish_default): New function.
+ * ldemul.h (finish_default): Declare.
+ * emultempl/aix.em (gld*_before_allocation): Call
+ before_allocation_default rather than strip_excluded_output_sections.
+ (ld_*_emulation): Init finish field to finish_default.
+ * emultempl/armcoff.em: Likewise.
+ * emultempl/beos.em: Likewise.
+ * emultempl/elf32.em: Likewise.
+ * emultempl/generic.em: Likewise.
+ * emultempl/gld960.em: Likewise.
+ * emultempl/gld960c.em: Likewise.
+ * emultempl/hppaelf.em: Likewise.
+ * emultempl/linux.em: Likewise.
+ * emultempl/lnk960.em: Likewise.
+ * emultempl/m68kcoff.em: Likewise.
+ * emultempl/mmo.em: Likewise.
+ * emultempl/pe.em: Likewise.
+ * emultempl/ppc64elf.em: Likewise.
+ * emultempl/sunos.em: Likewise.
+ * emultempl/ticoff.em: Likewise.
+ * emultempl/vanilla.em: Likewise.
+
+2005-08-03 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (exp_init_os): Handle etree_provide.
+ * emulparams/armelf.sh (OTHER_END_SYMBOLS): Rename from..
+ (OTHER_BSS_END_SYMBOLS): ..this.
+ * emulparams/armelf_linux.sh: Likewise.
+ * emulparams/armnto.sh: Likewise.
+ * emulparams/criself.sh: Likewise.
+ * emulparams/crislinux.sh: Likewise.
+ * emulparams/elf32frv.sh: Likewise.
+ * emulparams/elf32mcore.sh: Likewise.
+ * emulparams/elf32ppc.sh: Likewise.
+ * emulparams/elf32ppclinux.sh: Likewise.
+ * emulparams/hppa64linux.sh: Likewise.
+ * scripttempl/armbpabi.sc: Substitute $OTHER_END_SYMBOLS, not
+ $OTHER_BSS_END_SYMBOLS.
+ * scripttempl/elf32sh-symbian.sc: Likewise.
+ * scripttempl/elf_chaos.sc: Likewise.
+ * scripttempl/iq2000.sc: Likewise.
+ * scripttempl/xstormy16.sc: Likewise.
+ * scripttempl/elf.sc: Likewise. Delete __bss_start comment.
+ * scripttempl/elfxtensa.sc: Likewise.
+
+2005-07-29 Nick Clifton <nickc at redhat.com>
+
+ * ldmain.c (main): Allow -shared and -static to be used together.
+ * ld.texinfo (-static): Mention that it is allowed with -shared.
+
+2005-07-28 DJ Delorie <dj at redhat.com>
+
+ * ldlang.c (lang_output_section_statement_lookup_1): Don't cast a
+ unary & address operator, as that breaks GCC's strict aliasing
+ rules.
+
+2005-07-25 Jan Hubicka <jh at suse.cz>
+ H.J. Lu <hongjiu.lu at intel.com>
+
+ * emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
+
+ * scripttempl/elf.sc: Updated for large section support.
+
+2005-07-21 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Remove i[3-7]86-*-rtemself*.
+ Remove sparc-*-rtemself*.
+
+2005-07-21 Ben Elliston <bje at gnu.org>
+
+ * ldgram.y (ldgram_want_filename): Remove unused static.
+
+2005-07-20 DJ Delorie <dj at redhat.com>
+
+ * emulparams/elf32m32c.sh (TEMPLATE_NAME): New.
+ (EXTRA_EM_FILE): New.
+
+2005-07-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldmain.c (main): Reindent.
+
+2005-07-19 Paul Brook <paul at codesourcery.com>
+
+ * configure.host (HOSTING_CRT0): Parse output of gcc --help --verbose
+ to determine dynamic linker name.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Restore alpha ordering to list of arches.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld*_provide_init_fini_syms): Prototype.
+ (gld*_before_allocation): Call ldemul_do_assignments rather than
+ gld*_provide_init_fini_syms directly.
+ * emultempl/ppc32elf.em (gld*_after_allocation): Delete.
+ (ppc_do_assignments): New function.
+ (LDEMUL_AFTER_ALLOCATION): Don't define.
+ (LDEMUL_DO_ASSIGNMENTS): Define.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (emipsidt.c, emipsidtl.c): Depend on generic.em.
+ * Makefile.in: Regenerate.
+
+2005-07-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ldemul.c (ldemul_do_assignments): New function.
+ (do_assignments_default): New function.
+ * ldemul.h (ldemul_do_assignments): Declare.
+ (do_assignments_default): Declare.
+ (struct ld_emulation_xfer_struct): Add do_assignments.
+ * ldlang.c (lang_do_assignments) Call ldemul_do_assignments.
+ * emultempl/aix.em (ld_*_emulation): Init do_assignments field.
+ * emultempl/armcoff.em: Likewise.
+ * emultempl/beos.em: Likewise.
+ * emultempl/generic.em: Likewise.
+ * emultempl/gld960.em: Likewise.
+ * emultempl/gld960c.em: Likewise.
+ * emultempl/linux.em: Likewise.
+ * emultempl/lnk960.em: Likewise.
+ * emultempl/m68kcoff.em: Likewise.
+ * emultempl/pe.em: Likewise.
+ * emultempl/sunos.em: Likewise.
+ * emultempl/ticoff.em: Likewise.
+ * emultempl/vanilla.em: Likewise.
+ * emultempl/elf32.em: Likewise, to call gld*_provide_init_fini_syms.
+ (gld*_find_exp_assignment): Adjust bfd_elf_record_link_assignment call.
+
+2005-07-14 Jim Blandy <jimb at redhat.com>
+
+ Add support for the Renesas M32C and M16C.
+ * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
+ (eelf32m32c.c): New target.
+ * Makefile.in: Regenerated.
+ * configure.tgt: Add case for m32c-*-elf.
+ * emulparams/elf32m32c.sh: New file.
+
+2005-07-14 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (strip_excluded_output_sections): Don't call
+ bfd_gc_sections.
+ * emultempl/elf32.em (gld*_provide_bound_symbols): Move.
+ (gld*_provide_init_fini_syms): Move.
+ (gld*_before_allocation): Call the above from here..
+ (gld*_finish): ..not here. Call _bfd_elf_fix_excluded_sec_syms.
+ * emultempl/hppaelf.em (hppaelf_finish): Likewise.
+ * emultempl/ppc64elf.em (ppc_finish): Likewise.
+
+2005-07-10 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Remove sparc*-*-rtemsaout*, i[3-7]86-go32-rtems*,
+ i[3-7]86-*-rtemscoff*, hppa*-*-rtems*, mips*el-*-rtems*,
+ powerpcle-*-rtems*.
+
+2005-07-09 Christopher Faylor <cgf at timesys.com>
+
+ * emultempl/pe.em (gld_${EMULATION_NAME}_before_parse): Enable runtime
+ relocation by default.
+ (compute_dll_image_base): Avoid linking into cygwin dll address space.
+
+2005-07-08 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (wild_sort): Formatting.
+ (strip_excluded_output_sections): Strip zero size sections here.
+ * emultempl/elf32.em (gld*_strip_empty_sections): Delete.
+ (gld*_finish): Don't call the above.
+ * emultempl/hppaelf.em (hppaelf_finish): Likewise.
+ * emultempl/ppc64elf.em (ppc_finish): Likewise.
+
+2005-07-05 Paul Brook <paul at codesourcery.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o.
+ (eelf32ppcvxworks.o): Add dependencies.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Add entry for powerpc-vxworks.
+ * emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment.
+ * emulparams/elf32ppcvxworks.sh: New file.
+ * emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare.
+ (is_ppc_elf32_vec): New function.
+ (ppc_after_open, ppc_before_allocation,
+ gld${EMULATION_NAME}_after_allocation): Use it.
+
+2005-07-05 Peter S. Mazinger" <ps.m at gmx.net>
+
+ * emulparams/elf32bmip.sh (GENERATE_PIE_SCRIPT): Define as "yes".
+ * emulparams/elf32bmipn32-defs.sh (GENERATE_PIE_SCRIPT): Define as "yes".
+
+2005-07-04 Mike Frysinger <vapier at gentoo.org>
+
+ * emulparams/hppalinux.sh (GENERATE_PIE_SCRIPT): Fix typo in
+ name.
+
+2005-07-04 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * emulparams/m32relf_linux.sh (GENERATE_PIE_SCRIPT): Set to yes.
+
+2005-07-04 Aurelien Jarno <aurel32 at debian.org>
+
+ * emultempl/elf32.em: Enable use of ld.so.conf for *-*-k*bsd-*.
+
+2005-07-01 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempl/elf.sc (.gcc_except_table): Don't KEEP.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (check-DEJAGNU): Don't search for expect.
+ * Makefile.in: Regenerate.
+
+2005-06-30 Ben Elliston <bje at gnu.org>
+
+ * Makefile.am (EXPECT): Set to expect.
+ (RUNTEST): Likewise, set to runtest.
+ * Makefile.in: Regenerate.
+
+2005-06-16 Alexander Klimov <alserkli at inbox.ru>
+
+ * emultempl/armelf.em: Add quotes to avoid a null test
+ expression.
+
+2005-06-12 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld.texinfo (Command Line Options): Add @item for --hash-size.
+
+2005-06-10 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempt/elf.sc (.bss): Align tail in a way that allows
+ empty section pruning.
+
+2005-06-09 Steve Ellcey <sje at cup.hp.com>
+
+ * configure.in (AM_BINUTILS_WARNINGS): Add.
+ (BFD_NEED_DECLARATION) Replace with AC_CHECK_DECLS.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * sysdep.h (NEED_DECLARATION_*): Replace with HAVE_DECL_*
+ * ldmain.c: Ditto.
+
+2005-06-09 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (fold_unary <ALIGN_K>): Revert last change.
+
+2005-06-09 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.h (lang_phase_type): Move to..
+ * ldexp.h: ..here. Add lang_mark_phase_enum.
+ (node_type): Remove etree_undef and etree_unspec.
+ (exp_data_seg): Delete.
+ (struct ldexp_control, expld): New.
+ (invalid, exp_mark_used_section): Delete.
+ (exp_fold_tree, exp_get_vma, exp_get_value_int, exp_get_fill,
+ exp_get_abs_int): Update prototypes.
+ * ldexp.c (assigning_to_dot): Delete.
+ (expld): Define.
+ (make_abs): Operate directly on expld.result. Update all callers.
+ (new_abs): Likewise. Return void.
+ (new_rel_from_abs): Rename from new_rel_from_section.
+ (new_rel, new_rel_from_abs): Operate on expld.result and return void.
+ Update all callers.
+ (fold_unary): Operate on expld.result and return void. Remove
+ "current_section", "allocation_done", "dot", "dotp" and "mark_used"
+ params. Update all callers.
+ (fold_binary, fold_trinary, fold_name, exp_fold_tree_1): Likewise.
+ (fold_unary <ALIGN_K>): Ensure alignment is absolute.
+ (fold_unary <ABSOLUTE>): Use make_abs.
+ (fold_unary <DATA_SEGMENT_END>): Evaluate mark_phase as for
+ allocating_phase.
+ (fold_binary <DATA_SEGMENT_ALIGN, DATA_SEGMENT_RELRO_END, >): Ditto.
+ (fold_binary <'%','/'>): Don't error if marking.
+ (fold_name <SIZEOF_HEADERS>): Don't call bfd_sizeof_headers when
+ marking.
+ (fold_name <NAME>): Remove FIXME; -R is handled correctly. Don't
+ error when marking.
+ (fold_name <ADDR, LOADADDR, SIZEOF>): Don't set SEC_KEEP.
+ (exp_fold_tree_1): Don't error when marking.
+ (exp_fold_tree_1 <etree_rel>): Evaluate in all phases except first.
+ (exp_fold_tree_1 <etree_assign to dot>): Don't check for NULL
+ current section, instead check for NULL dotp.
+ (exp_fold_tree_1 <etree_provide>): Don't evaluate the assignment
+ source unless the symbol is referenced and undefined.
+ (exp_fold_tree): Remove "allocation_done" and "dot" params. Save
+ params to expld.
+ (exp_fold_tree_no_dot): Remove "current_section", "allocation_done
+ and "mark_used" params. Save params to expld. Update all callers.
+ (exp_assop): Do without temp var.
+ (exp_print_tree <etree_undef>): Delete code.
+ (exp_get_vma): Remove "allocation_done" param. Correct error return.
+ (exp_get_fill, exp_get_abs_int): Likewise.
+ (exp_get_value_int): Remove "allocation_done" param.
+ (exp_mark_used_section): Delete.
+ * ldgram.y (fill_exp): Update exp_get_fill call.
+ (origin_spec, length_spec): Update exp_get_vma call.
+ * ldlang.c (lang_init): Don't bother clearing lang_statement_iteration.
+ (lang_mark_used_section_1, lang_mark_used_section): Delete.
+ (strip_excluded_output_sections): Call one_lang_size_sections_pass in
+ marking mode. Merge old lang_mark_used_section code. Correct handling
+ of output sections with excluded input sections and data statements.
+ Don't drop non-zero sized sections. Don't zap os->bfd_section.
+ Do set SEC_EXCLUDE when appropriate.
+ (print_output_section_statement): Update for changed ldexp.c
+ interface.
+ (print_assignment, lang_size_sections_1): Likewise.
+ (lang_do_assignments_1, lang_enter_output_section_statement): Likewise.
+ (lang_new_phdr, lang_record_phdrs): Likewise.
+ (lang_size_sections): Likewise.
+ (insert_pad): Use following statement if it is a pad, rather than
+ creating a new one.
+ (lang_size_sections_1 <lang_output_section_statement_enum>): Do
+ process ignored output section to set vma and lma, but don't
+ update dot for these sections. Don't error if marking.
+ (lang_size_sections_1 <lang_assignment_statement_enum>): Don't
+ update dot for ignored sections.
+ (lang_size_sections_1 <lang_data_statement_enum>): Don't mark absolute
+ section with SEC_ALLOC.
+ (one_lang_size_sections_pass): New function.
+ (lang_size_sections): Remove first five params. Set expld.phase on
+ entry and exit. Use one_lang_size_sections_pass.
+ (lang_do_assignments): Remove all params. Update all callers.
+ (lang_reset_memory_regions): Clear os->processed for all output
+ section statements.
+ * ldlang.h (lang_do_assignments): Update prototype.
+ (lang_size_sections): Likewise.
+ (one_lang_size_sections_pass): Declare.
+ * pe-dll.c (pe_dll_fill_sections, pe_exe_fill_sections): Update
+ lang_size_sections and lang_do_assignments calls.
+ * emultempl/elf32.em (layout_sections_again): Likewise.
+ * emultempl/ppc64elf.em (ppc_before_allocation): Use
+ one_lang_size_sections_pass.
+
+2005-06-08 Aldy Hernandez <aldyh at redhat.com>
+
+ * emulparams/elf32ms1.sh: New.
+
+2005-06-07 Eric Christopher <echristo at redhat.com>
+
+ * Makefile.am (eelf32ms1.c): Use tab.
+ * Makefile.in: Regenerate.
+
+2005-06-07 Aldy Hernandez <aldyh at redhat.com>
+ Michael Snyder <msnyder at redhat.com>
+ Stan Cox <scox at redhat.com>
+
+ * configure.tgt: Same.
+
+ * Makefile.am (ALL_EMULATIONS): Depend on eelf32ms1.o.
+ (eelf32ms1.c): Add eelf32ms1.c rule.
+
+ * Makefile.in: Regenerate.
+
+2005-06-06 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (ppc_before_allocation): Always run
+ ppc64_elf_edit_opd.
+
+2005-06-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldexp.c (exp_mark_used_section): Set SEC_KEEP on current
+ section only if the symbol will be defined.
+
+2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 992
+ * ldexp.c (exp_mark_used_section): Set SEC_KEEP on current
+ section for etree_assign, etree_provide and etree_provided.
+ Call fold_binary on etree_binary.
+
+ * ldlang.c (lang_mark_used_section_1): Handle load base.
+
+2005-06-03 Alan Modra <amodra at bigpond.net.au>
+
+ * ldmain.c (link_callbacks): Add einfo.
+ (add_archive_element): Use passed info, not link_info.
+ (constructor_callback): Likewise.
+ (reloc_overflow): Don't handle null bfd specially.
+ (reloc_dangerous, unattached_reloc): Likewise.
+ * ldmisc.c (vfinfo <B>): Print "ld generated" for null bfd.
+ (vfinfo <C, D, G>): Handle null bfd. Wrap comments.
+
+2005-06-02 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.h (etree_value_type): Use "asection *" in place of
+ "struct lang_output_section_statement_struct *" for "section".
+ (exp_fold_tree): Likewise.
+ (exp_mark_used_section): Likewise.
+ * ldexp.c (new_rel, new_rel_from_section, fold_unary, fold_binary,
+ fold_trinary, fold_name, exp_fold_tree_1, exp_fold_tree,
+ exp_mark_used_section): Likewise for "current_section" param.
+ (make_abs, new_abs, exp_binop, exp_unop, exp_get_vma, exp_get_fill,
+ exp_get_abs_int): Adjust for above changes.
+ * ldlang.c (lang_mark_used_section_1, print_assignment,
+ lang_size_sections_1, lang_do_assignments_1): Likewise.
+ * ldexp.c (fold_name): Init entire result struct.
+
+2005-06-01 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * emulparams/elf32btsmip.sh: Unset DATA_ADDR.
+
+2005-05-31 Zack Weinberg <zack at codesourcery.com>
+
+ * ldlang.c (entry_symbol_default): New file-scope global.
+ (lang_finish): Use it, not a hardwired "start".
+ (lang_default_entry): Set it.
+ * ldlang.h: Declare lang_default_entry.
+ * emultempl/beos.em, emultempl/pe.em: Use lang_default_entry,
+ not lang_add_entry, to override default entry point symbol.
+
+2005-05-29 Richard Henderson <rth at redhat.com>
+
+ * emulparams/elf64alpha.sh (PLT): New.
+ (TEXT_PLT): New.
+ * emultempl/alphaelf.em (disable_relaxation): New.
+ (limit_32bit): Rename from elf64alpha_32bit; update all users.
+ (elf64_alpha_use_secureplt): Declare.
+ (bfd_elf64_alpha_vec, bfd_elf64_alpha_freebsd_vec): Declare.
+ (alpha_after_open): New.
+ (alpha_before_allocation): New.
+ (OPTION_NO_RELAX, OPTION_SECUREPLT, OPTION_NO_SECUREPLT): New.
+ (PARSE_AND_LIST_LONGOPTS): Include them.
+ (PARSE_AND_LIST_OPTIONS): Likewise.
+ (PARSE_AND_LIST_ARGS_CASES): Likewise.
+ (LDEMUL_AFTER_OPEN, LDEMUL_BEFORE_ALLOCATION): New.
+ * scripttempl/elf.sc (TEXT_PLT): New.
+ (PLT): Use it.
+
+2005-05-27 Andreas Schwab <schwab at suse.de>
+
+ * configure.host (HOSTING_LIBS): Add libunwind.a if it exists.
+
+2005-05-24 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc32elf.em (after_allocation): Don't call
+ ppc_elf_set_sdata_syms when relocatable.
+
+2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (ld.1): Revert the last 2 changes.
+ (info-recursive): Depend on ld.1.
+ * Makefile.in: Regenerated.
+
+2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (ld.1): Depend on "info" instead of
+ "configdoc.texi ldver.texi".
+ * Makefile.in: Regenerated.
+
+2005-05-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (ld.1): Depend on "info".
+ * Makefile.in: Regenerated.
+
+2005-05-19 Zack Weinberg <zack at codesourcery.com>
+
+ * Makefile.am: Have 'all' depend on 'info' and 'ld.1'.
+ * Makefile.in: Regenerate.
+
+2005-05-17 Zack Weinberg <zack at codesourcery.com>
+
+ * ld-arm/mixed-app.d: Adjust expected disassembly a little.
+
+2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am (ldver.texi): Don't use $<.
+ * Makefile.in: Regenerated.
+
+2005-05-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am (AM_MAKEINFOFLAGS, TEXI2DVI): Explicitly include
+ $(srcdir) before $(BFDDIR)/doc.
+ * Makefile.in: Regenerated.
+
+2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 797
+ * ldexp.c (exp_fold_tree_1): Renamed from exp_fold_tree and
+ take take a bfd_boolean, mark_used. Ignore assert failure if
+ mark_used is TRUE.
+ (exp_fold_tree) Call exp_fold_tree_1 with mark_used == FALSE.
+ (exp_fold_tree_no_dot): Updated to take a bfd_boolean,
+ mark_used and pass down.
+ (fold_unary): Likewise.
+ (fold_binary): Likewise.
+ (fold_trinary): Likewise.
+ (exp_binop): Add FALSE to call to exp_fold_tree_no_dot.
+ (exp_trinop): Likewise.
+ (exp_unop): Likewise.
+ (exp_nameop): Likewise.
+ (exp_get_vma): Likewise.
+ (exp_get_fill): Likewise.
+ (exp_get_abs_int): Likewise.
+ (fold_name): Likewise. Set SEC_KEEP in output section flags.
+ (exp_mark_used_section): New.
+
+ * ldexp.h (exp_mark_used_section): New.
+
+ * ldlang.c (lang_output_section_statement_lookup_1): Set the
+ ignored field to FALSE.
+ (lang_mark_used_section_1): New.
+ (lang_mark_used_section): Call lang_mark_used_section_1.
+ (strip_excluded_output_sections): Call lang_mark_used_section
+ and check for unused sections.
+ (lang_size_sections_1): Skip an output section if it should
+ be ignored.
+ (lang_do_assignments_1): Likewise.
+ (lang_process): Don't call lang_mark_used_section here.
+
+ * ldlang.h (lang_output_section_statement_type): Change
+ all_input_readonly to bitfield. Add ignored.
+
+2005-05-17 Lennert Buytenhek <buytenh at wantstofly.org>
+ Peter S. Mazinger" <ps.m at gmx.net>
+
+ * emulparams/armelf_linux.sh (GENERATE_PIE_SCRIPT): Define as "yes".
+ * emulparams/hppalinux.sh (GENERATE_PIE_SCRIPT): Define as "yes".
+
+2005-05-17 Julian Brown <julian at codesourcery.com>
+
+ * ldlang.c (print_assignment): Do not rely upon a valid result
+ having a section associated with it.
+
+2005-05-17 Nick Clifton <nickc at redhat.com>
+
+ * ldlang.c (Scan_for_self_assignment): Check an assignment tree to
+ see if the same value is being used on the rhs as on the lhs.
+ (print_assignment): Call scan_for_self_assignment and if it
+ returns true, do no display the result of the computation but
+ instead just the final value of the symbol on the lhs.
+ * ld.texinfo: Document this behaviour and provide an example of
+ when it will happen.
+
+2005-05-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am (AM_MAKEINFOFLAGS): Define.
+ (TEXI2DVI): Define.
+ (ldver.texi): Depend on distributed files instead of built files.
+ (ld.info): Include $(srcdir) in the rule target. Remove actions.
+ (ld.dvi): Remove actions.
+ (MAINTAINERCLEANFILES): Add configdoc.texi.
+ (CONFIG_STATUS_DEPENDENCIES): Add bfd/configure.in.
+ (install-data-local): Renamed from install.
+ (Makefile): Remove explicit dependency.
+ * acinclude.m4: Remove obsolete code.
+ * configure.in: Update AC_PREREQ. Remove extra $CONFIG_SHELL.
+ * Makefile.in, aclocal.m4, config.in, configure: Regenerated.
+
+2005-05-11 Bob Wilson <bob.wilson at acm.org>
+
+ * scripttempl/elfxtensa.sc: Sync up with elf.sc.
+ * emulparams/elf32xtensa.sh (PLT, GOT): Define.
+
+2005-05-11 Alan Modra <amodra at bigpond.net.au>
+
+ * ldgram.y: Add SPECIAL token.
+ (sect_constraint): Handle SPECIAL.
+ * ldlang.c (lang_output_section_find_1): Don't match SPECIAL.
+ (map_input_to_output_sections): Likewise.
+ * ldlex.l (SPECIAL): Define.
+ * emulparams/elf32ppc.sh (DATA_GOT, SDATA_GOT, SEPARATE_GOTPLT,
+ GOT, PLT, GOTPLT): Define.
+ * emultempl/ppc32elf.em (old_plt, old_got): New static vars.
+ (ppc_after_open): New function.
+ (PARSE_AND_LIST_PROLOGUE): Define OPTION_OLD_LPT and OPTION_OLD_GOT.
+ (PARSE_AND_LIST_LONGOPTS): Add "bss-plt" and "sdata-got".
+ (PARSE_AND_LIST_OPTIONS): Document them.
+ (PARSE_AND_LIST_ARGS_CASES): Handle them.
+ (LDEMUL_AFTER_OPEN): Define.
+ * scripttempl/elf.sc (PLT): Don't override existing define.
+ (DATA_GOT, SDATA_GOT): Define and use to enable alternate got
+ placement rather than using NO_SMALL_DATA. Emit GOTPLT for RELRO_NOW.
+
+2005-05-10 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempl/elf.sc (DATA_SEGMENT_RELRO_GOTPLT_END): Delete.
+ (DATA_SEGMENT_RELRO_END): Use SEPARATE_GOTPLT value.
+ (GOTPLT): Remove DATA_SEGMENT_RELRO_GOTPLT_END. Place after
+ DATA_SEGMENT_RELRO_END in script.
+
+2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
+ Don't use a removed section.
+
+2005-05-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldmain.c (reloc_overflow): Use output_bfd if the symbol
+ is defined in the ABS section.
+
+2005-05-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_init_fini_syms):
+ Put back !link_info.relocatable.
+
+2005-05-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 878
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_init_fini_syms):
+ Just check link_info.executable.
+
+2005-05-06 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ aclocal.m4, deffile.h, deffilep.y, fdl.texi, ld.h, ldcref.c,
+ ldctor.c, ldctor.h, ldemul.c, ldexp.c, ldexp.h, ldfile.c,
+ ldfile.h, 20ldgram.y, ldint.texinfo, ldlang.c, ldlang.h, ldlex.h,
+ ldlex.l, ldmain.c, ldmain.h, ldmisc.c, ldmisc.h, ldver.c, ldver.h,
+ ldwrite.c, ldwrite.h, lexsup.c, mri.c, mri.h, pe-dll.c, pe-dll.h,
+ sysdep.h, emultempl/aix.em, emultempl/alphaelf.em,
+ emultempl/armcoff.em, emultempl/armelf.em, emultempl/beos.em,
+ emultempl/crxelf.em, emultempl/elf32.em, emultempl/generic.em,
+ emultempl/gld960.em, emultempl/gld960c.em, emultempl/hppaelf.em,
+ emultempl/ia64elf.em, emultempl/irix.em, emultempl/linux.em,
+ emultempl/lnk960.em, emultempl/m68hc1xelf.em,
+ emultempl/m68kcoff.em, emultempl/m68kelf.em,
+ emultempl/mipsecoff.em, emultempl/mmix-elfnmmo.em,
+ emultempl/mmixelf.em, emultempl/mmo.em, emultempl/needrelax.em,
+ emultempl/pe.em, emultempl/ppc32elf.em, emultempl/ppc64elf.em,
+ emultempl/sh64elf.em, emultempl/sunos.em, emultempl/ticoff.em,
+ emultempl/vanilla.em, emultempl/xtensaelf.em
+
+2005-05-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * scripttempl/elf.sc: Document the usage of __bss_start.
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * Makefile.am: Add eelf_i386_vxworks.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
+ * emulparams/elf_i386_vxworks.sh: New file.
+ * emulparams/vxworks.sh: New file.
+ * scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
+
+2005-05-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
+ Call _bfd_elf_provide_section_bound_symbols.
+
+2005-05-04 Alan Modra <amodra at bigpond.net.au>
+
+ * ldemul.c: Include bfdlink.h.
+ (ldemul_before_allocation): Assume before_allocation is non-zero.
+ (before_allocation_default): Call strip_excluded_output_sections.
+ * ldlang.c (stripped_excluded_sections): New variable.
+ (lang_add_section): Build input section list for each output
+ section, attached via map_head and map_tail pointers.
+ (strip_excluded_output_sections): Make global. Traverse the
+ input section lists to find which output sections can go. Clear
+ link_order pointers and set stripped_excluded_sections.
+ (lang_process): Call strip_excluded_output_sections.
+ * ldlang.h (strip_excluded_output_sections): Declare.
+ * ldwrite.c: Update throuhout for link_order_head -> map_head change.
+ * emultempl/aix.em (before_allocation): Call
+ strip_excluded_output_sections.
+ * emultempl/armcoff.em (before_allocation): Likewise.
+ * emultempl/beos.em (before_allocation): Likewise.
+ * emultempl/linux.em (before_allocation): Likewise.
+ * emultempl/pe.em (before_allocation): Likewise.
+ * emultempl/sunos.em (before_allocation): Likewise.
+ * emultempl/elf32.em (before_allocation): Likewise. Call
+ bfd_elf_size_dynsym_hash_dynstr too.
+ * emultempl/lnk960.em (lnk960_before_allocation): Delete.
+ (ld_lnk960): Use before_allocation_default.
+
+2005-05-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_strip_empty_section):
+ Updated for bfd_section_list_remove change.
+ * ldlang.c (lang_insert_orphan): Likewise.
+ (strip_excluded_output_sections): Likewise.
+ (sort_sections_by_lma): New.
+ (lang_check_section_addresses): Sort the sections before
+ checking addresses.
+
+2005-04-29 Ralf Corsepius <ralf.corsepius at rtems.org>
+
+ * configure.tgt: Add h8300*-*-rtemscoff.
+ Switch h8300*-*-rtems* to elf.
+
+2005-04-29 Ben Elliston <bje at au.ibm.com>
+
+ * ldgram.y (lang_memory_region_type): Make static.
+ (ldgram_want_filename): Likewise.
+ * ldemul.c (ld_emulation): Make static.
+ * ldfile.h (ldfile_find_command_file): Remove extern.
+ * ldfile.c (ldfile_find_command_file): Make static.
+ * ldlang.h (unique_section_list): Remove extern declaration.
+ * ldlang.c (unique_section_list): Make static.
+ * mri.h (symbol_truncate): Remove extern declaration.
+ * mri.c (symbol_truncate): Make static.
+ (order, only_load, address, alias): Likewise.
+ (alignment, subalignment): Likewise.
+
+2005-04-27 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols):
+ Use the first SEC_ALLOC section which isn't SEC_READONLY or the
+ last SEC_ALLOC section if such a section doesn't exist.
+
+2005-04-24 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.host: Add *-*-openbsd support.
+
+2005-04-15 Julian Brown <julian at codesourcery.com>
+
+ * ld.texinfo: Document --use-blx.
+ * emultempl/armelf.em (use_blx): New variable.
+ (arm_elf_create_output_section_statements): Communicate value of
+ use_blx to bfd.
+ (PARSE_AND_LIST_PROLOGUE): Add OPTION_USE_BLX.
+ (PARSE_AND_LIST_OPTIONS): Add --use-blx option.
+ (PARSE_AND_LIST_ARGS_CASES): Add OPTION_USE_BLX case.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
+ * configure.in: Include ../bfd/warning.m4 contents.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2005-04-12 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (ldgram.o, ldlex.o, deffilep.o): Add -Wno-error to command.
+ * Makefile.in: Regenerate.
+ * config.in: Regenerate.
+
+2005-04-11 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_stat_needed): Ignore
+ as_needed libs that were not needed.
+ (gld${EMULATION_NAME}_check_needed): Likewise.
+
+2005-04-07 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/m68kcoff.em: Include ldexp.h and ldlang.h so that
+ ldfile.h can use the lang_input_statement type.
+
+2005-04-06 Jakub Jelinek <jakub at redhat.com>
+
+ * ldlang.c: Formatting.
+ (walk_wild_consider_section): Remember return value from wildcardp.
+ (is_simple_wild): Use strcspn instead of 2 strpbrk calls and strlen.
+ (wild_spec_can_overlap): Use strcspn instead of strpbrk and strlen.
+
+2005-04-06 Robert O'Callahan <rocallahan at novell.com>
+
+ * ld.h (lean_section_userdata_type): Remove.
+ (fat_section_userdata_type): Remove file field.
+ (SECTION_USERDATA_SIZE): Remove.
+ * ldlang.c (init_os): Eliminate initialization of unused
+ lean_section_userdata_type.
+
+ * ldlang.h (callback_t, walk_wild_section_handler_t): New
+ typedefs.
+ (struct lang_wild_statement_struct): Add walk_wild_section_handler
+ and handler_data fields.
+ * ldlang.c (callback_t): Removed.
+ (walk_wild_consider_section, walk_wild_section_general,
+ section_iterator_callback, find_section, is_simple_wild,
+ match_simple_wild, walk_wild_section_specs1_wild0,
+ walk_wild_section_specs1_wild1, walk_wild_section_specs2_wild1,
+ walk_wild_section_specs3_wild2, walk_wild_section_specs4_wild2,
+ wild_spec_can_overlap, analyze_walk_wild_section_handler): New
+ functions.
+ (lang_add_wild): Call analyze_walk_wild_section_handler.
+ (walk_wild_section): Renamed to walk_wild_section_general and
+ created a wrapper function.
+ (section_iterator_callback_data): New typedef.
+
+2005-04-04 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Add a check for <unistd.h> providing a prototype
+ for getopt() which is compatible with the one in
+ include/getopt.h. If so then define HAVE_DECL_GETOPT.
+ * configure: Regenerate.
+ * config.in (HAVE_DECL_GETOPT): Add.
+ * ldemul.c: Include config.h
+ * lexsup.c: Likewise.
+ * emultempl/elf32.sc: Likewise.
+
+2005-03-29 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_layout_sections_again):
+ New function, extracted from static void gld${EMULATION_NAME}_finish.
+ (gld${EMULATION_NAME}_strip_empty_sections): Likewise.
+ (gld${EMULATION_NAME}_provide_init_fini_syms): Likewise.
+ * emultempl/ppc64elf.em: Revert last change.
+ (ppc_layout_sections_again): Use
+ gld${EMULATION_NAME}_layout_sections_again.
+ (ppc_finish): Don't call gld${EMULATION_NAME}_finish. Instead call
+ gld${EMULATION_NAME}_strip_empty_sections and
+ gld${EMULATION_NAME}_provide_init_fini_syms.
+ * emultempl/hppaelf.em: Similarly.
+
+2005-03-29 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (need_laying_out): Delete. Remove all refs.
+ (ppc_finish): Don't call bfd_elf_discard_info.
+ * emultempl/hppaelf.em: Similarly.
+
+2005-03-24 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2005-03-23 Mike Frysinger <vapier at gentoo.org>
+ Nick Clifton <nickc at redhat.com>
+
+ * configure.host: Accept any C library to accompany a GNU Linux
+ implementation, not just the GNU C library.
+ * configure.tgt: Likewise.
+ * emultempl/elf32.em: Likewise.
+
+2005-03-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_provide_bound_symbols): New
+ (gld${EMULATION_NAME}_finish): Call
+ gld${EMULATION_NAME}_provide_bound_symbols to provide
+ __preinit_array_start, __preinit_array_end, __init_array_start,
+ __init_array_end, __fini_array_start and __fini_array_end.
+
+ * scripttempl/elf.sc: Don't provide __preinit_array_start,
+ __preinit_array_end, __init_array_start, __init_array_end,
+ __fini_array_start nor __fini_array_end.
+
+2005-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Set
+ SEC_EXCLUDE on .gnu.warning sections.
+
+2005-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempl/elf.sc (SBSS): Don't provide sbss start and end syms.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc32elf.em (gld${EMULATION_NAME}_after_allocation): New
+ function.
+ (LDEMUL_AFTER_ALLOCATION): Define.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (ppc_finish): Rename from
+ gld${EMULATION_NAME}_finish. Call gld${EMULATION_NAME}_finish.
+ (LDEMUL_FINISH): Update.
+ * emultempl/hppaelf.em (hppaelf_finish, LDEMUL_FINISH): Likewise.
+ * emultempl/m68hc1xelf.em (m68hc11elf_finish, LDEMUL_FINISH): Likewise.
+
+2005-03-18 Julian Brown <julian at codesourcery.com>
+
+ * scripttempl/armbpapi.sc (.rel.dyn): Add .rel.init_array,
+ .rel.fini_array.
+ (.rela.dyn): Add .rela.init_array, .rela.fini_array.
+ (SECTIONS): Add .rel.other, .rela.other, .reli.other after PLT relocs.
+
+2005-03-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Don't set
+ bfd_section when removing unused empty output sections for
+ non-relocatable link.
+
+2005-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (lang_insert_orphan): Use old section_tail rather than
+ traversing the bfd section list to find pointer to new section.
+
+2005-03-18 Alan Modra <amodra at bigpond.net.au>
+
+ * scripttempl/elf.sc: When CREATE_SHLIB, put .sdata2 and .sbss2
+ input sections into .sdata and .sbss output respectively.
+
+2005-03-16 David Heine <dlheine at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * ldlang.c (IGNORE_SECTION): Remove check for zero size.
+ (lang_check_section_addresses): Ignore zero size sections here.
+
+2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove
+ unused empty output sections for non-relocatable link.
+
+ * ld.h (args_type): Remove gc_sections.
+
+ * ldlang.c (lang_mark_used_section): New.
+ (lang_gc_sections): Use link_info.gc_sections instead of
+ command_line.gc_sections.
+ * ldmain.c (main): Likewise.
+ * lexsup.c (parse_args): Likewise.
+ * ldlang.c (lang_process): Call lang_mark_used_section.
+
+ * ldmain.c (main): Initialize link_info.gc_sections to FALSE.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * emulparams/elf32ppclinux.sh (OTHER_READWRITE_SECTION): Delete.
+ (OTHER_RELRO_SECTIONS): Set this instead.
+
+2005-03-15 Nick Clifton <nickc at redhat.com>
+
+ * NEWS: Add cutoff for changes in 2.16 release.
+
+2005-03-15 Mikkel Krautz <krautz at gmail.com>
+
+ * configure.tgt (x86_64-elf): Add target.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (exp_fold_tree): Ensure return value is initialized.
+ Tidy etree_assert case.
+
+2005-03-14 Alan Modra <amodra at bigpond.net.au>
+
+ * po/tr.po: Commit new Turkish translation.
+
+2005-03-11 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am: Remove references to em68klynx.o and esparclynx.o.
+ * Makefile.in: Regenerated.
+ * emulparams/m68klynx.sh, emulparams/sparclynx.sh: Remove.
+
+2005-03-07 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated translation.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/ld.pot: Regenerate.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * ldmain.c (remove_output): Use unlink_if_ordinary instead of unlink.
+ * pe-dll.c (pe_dll_generate_implib): Likewise.
+
+2005-02-24 Ben Elliston <bje at au.ibm.com>
+
+ * ldfile.c: Remove GNU960 conditional code.
+ * emultempl/gld960.em: Likewise.
+ * emultempl/gld960c.em: Likewise.
+ * emultempl/lnk960.em: Likewise.
+
+2005-02-24 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/lnk960.em (lnk960_before_parse): Remove redundant
+ empty string from calls to concat.
+
+2005-02-23 Nick Clifton <nickc at redhat.com>
+
+ * emultempl/lnk960.em (lnk960_before_parse): Terminate list of
+ arguments passed to concat() with a NULL.
+
+ * emultempl/m68kcoff.em: Include ldexp.h and ldlang.h because they
+ define types needed by ldfile.h
+
+2005-02-23 Alan Modra <amodra at bigpond.net.au>
+
+ * pe-dll.c: Warning fixes.
+ * emultempl/sunos.em: Likewise.
+
+2005-02-22 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ldlang.c (section_already_linked): Don't call
+ bfd_section_already_linked for dynamic objects.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c: Warning fixes.
+ * ldwrite.c: Likewise.
+ * emultempl/elf32.em: Likewise.
+
+2005-02-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ldlang.c (lang_add_section): Check SEC_TIC54X_BLOCK for TI
+ tic54x input only.
+ (lang_size_sections_1): Check SEC_COFF_SHARED_LIBRARY for COFF
+ and ECOFF output only.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * config.in: Regenerate.
+ * configure: Regenerate.
+
+2005-02-17 Zack Weinberg <zack at codesourcery.com>
+
+ * ldexp.c (assigning_to_dot): New global flag.
+ (fold_name): If assigning_to_dot is true, object immediately to
+ an undefined symbol.
+ (exp_fold_tree): Set and clear assigning_to_dot around the
+ recursive call to exp_fold_tree to process the right-hand side
+ of an assignment to the location counter.
+
+2005-02-17 Paul Brook <paul at codesourcery.com>
+
+ * scripttempl/armbpabi.sc: Add dummy name to version block.
+
+2005-02-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ldexp.c (new_abs): Init new.str.
+
+2005-02-15 Mark Mitchell <mark at codesourcery.com>
+
+ * configure.in (AC_CHECK_FUNCS): Add glob.
+ * configure: Regenerated.
+ * emultempl/elf32.em (<glob.h>): Do not include if HAVE_GLOB is
+ not defined.
+ (gld${EMULATION_NAME}_parse_ld_so_conf_include): Do not use glob
+ if HAVE_GLOB is not defined.
+
+2005-02-16 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Define
+ lib_path if NATIVE is yes.
+
+2005-02-16 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (ppc_create_output_section_statements): Make
+ an error creating fake bfd fatal.
+ (ppc_before_allocation): Continue on after errors.
+ (gld${EMULATION_NAME}_finish): Likewise.
+
+2005-02-15 Nick Clifton <nickc at redhat.com>
+
+ * ldlex.l (YY_NO_UNPUT): Define so that the yy_unput function is
+ not declared. It is not used and its presence causes a compile
+ time warning.
+
+2005-02-11 Zack Weinberg <zack at codesourcery.com>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_stat_needed):
+ If st.st_ino is zero, do not treat the library as a duplicate.
+
+2005-02-10 Jakub Jelinek <jakub at redhat.com>
+
+ * emultempl/hppaelf.em (hppaelf_create_output_section_statements):
+ Set BFD_LINKER_CREATED on the stubs bfd.
+ * emultempl/ppc64elf.em (ppc_create_output_section_statements):
+ Likewise.
+
+2005-02-08 Mark Mitchell <mark at codesourcery.com>
+
+ * scripttempl/armbpabi.sc (VERSION): Make special section symbols
+ local.
+ (Image$$ER_RO$$Base): Define whenever RELOCATING.
+ (Image$$ER_RO$$Limit): Likewise.
+ (SHT$$INIT_ARRAY$$Base): Likewise.
+ (SHT$$INIT_ARRAY$$Limit): Likeise.
+
+2005-02-10 Ben Elliston <bje at au.ibm.com>
+
+ * emultempl/beos.em: Remove #if 0 and #if 1 blocks.
+
+2005-02-08 Richard Sandiford <rsandifo at redhat.com>
+
+ * configure.tgt (mips64*el-*-linux-gnu*): Define targ_extra_libpath
+ to include o32 and n64 emulations.
+ (mips64*-*-linux-gnu*): Likewise.
+
+2005-02-08 Hans-Peter Nilsson <hp at axis.com>
+
+ * ldmain.c (warning_callback, warning_find_reloc): Prepend
+ "warning: " to warning messages.
+
+2005-02-04 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_find_exp_assignment): Don't
+ look up symbol for etree_provide here.
+
+2005-02-02 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * emulparams/elf32bmip.sh (TEXT_DYNAMIC): Always set.
+
+2005-02-01 Edward Welbourne <eddy at opera.com>
+ Nick Clifton <nickc at redhat.com>
+
+ * ld.texinfo (Source Code Reference): New node describing how to
+ access linker script defined variables from source code.
+
+2005-02-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.texinfo: Clarify --as-needed operation.
+
+2005-01-31 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * ldver.c (ldversion): Bump reported copyright date to 2005.
+
+2005-01-31 Nick Clifton <nickc at redhat.com>
+
+ * configure.tgt: Remove obsolete targets m68k-lynxos and
+ sparc-lynxos.
+
+2005-01-28 Julian Brown <julian at codesourcery.com>
+
+ * emultempl/armelf.em (fix_v4bx): New variable.
+ (arm_elf_create_output_section_statements): Communicate fix_v4bx flag
+ value to bfd.
+ (PARSE_AND_LIST_PROLOGUE): Add option token OPTION_FIX_V4BX.
+ (PARSE_AND_LIST_LONGOPTS): Add option --fix-v4bx.
+ (PARSE_AND_LIST_OPTIONS): Add option --fix-v4bx.
+ (PARSE_AND_LIST_ARGS_CASES): Add option OPTION_FIX_V4BX.
+ * NEWS: Mention --fix-v4bx.
+ * ld.texinfo: Document --fix-v4bx.
+
+2005-01-25 Mark Mitchell <mark at codesourcery.com>
+
+ * emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS): Define, so
+ as to include .ARM.exidx$${Base,Limit}.
+ * ld/scripttempl/armbpabi.sc: Move .plt to end of text segment.
+ Define IMAGE$$ER_RO$${Base,Limit} and SHT$$INIT_ARRAY$${Base,Limit}.
+ Put .init_array, .fini_array, etc. into the read-only data
+ segment.
+
+2005-01-25 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_try_needed): Formatting.
+ (gld${EMULATION_NAME}_after_open): Ignore needed libs if they were
+ only needed by an as-needed lib that didn't get linked.
+
+2005-01-23 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.texinfo (Output Section Keywords <CONSTRUCTORS>): Correct
+ __DTOR_LIST__ description.
+
+2005-01-23 Alan Modra <amodra at bigpond.net.au>
+
+ * ld.texinfo (Location Counter <dot outside sections>): Document
+ effects of orphan section placement, and ". = ." workaround.
+ * Makefile.in: Regenerate.
+
+2005-01-22 Richard Sandiford <rsandifo at redhat.com>
+
+ * emulparams/elf32bmip.sh (OTHER_GOT_SECTIONS): Add ". = .;".
+ * emulparams/elf32bmipn32-defs.sh (OTHER_GOT_SECTIONS): Likewise.
+
+2005-01-21 Jakub Jelinek <jakub at redhat.com>
+
+ * ldgram.y (AS_NEEDED): New token.
+ (input_list): Handle AS_NEEDED ( input_list ).
+ * ldlex.l (AS_NEEDED): Add.
+ * ld.texinfo: Document AS_NEEDED ().
+ * NEWS: Mention AS_NEEDED ().
+
+2005-01-21 Ben Elliston <bje at au.ibm.com>
+
+ * ldlang.c (lang_reasonable_defaults): Remove.
+ (lang_process): Don't call lang_reasonable_defaults.
+
+ * ldexp.c (exp_assop): Remove #if 0'd code.
+ (exp_print_tree): Likewise.
+ * ldlang.c (lang_memory_region_lookup): Likewise.
+ (open_output): Likewise.
+ (lang_do_assignments_1): Likewise.
+ (lang_place_orphans): Likewise.
+ (lang_enter_output_section_statement): Likewise.
+ (lang_reasonable_defaults): Likewise.
+ * ldlang.h (struct lang_input_statement_struct): Likewise.
+ * mri.c (mri_draw_tree): Likewise.
+ (mri_load): Likewise.
+ * pe-dll.c (generate_reloc): Likewise.
+ (make_import_fixup_entry): Likewise.
+ (pe_as16): Likewise.
+ * emultempl/beos.em (set_pe_subsystem): Likewise.
+ * emultempl/hppaelf.em (hppaelf_after_parse): Likewise.
+ * emultempl/pe.em: Likewise.
+ * emultempl/xtensaelf.em (xtensa_colocate_literals): Likewise.
+
+2005-01-20 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add earmelfb_linux_eabi.o.
+ (earmelfb_linux_eabi.c): New target.
+ * Makefile.in: Regenerated.
+ * configure.tgt (arm*b-*-linux-gnueabi): New target.
+ * emulparams/armelfb_linux_eabi.sh: New file.
+
+2005-01-20 Nick Hudson <skrll at netbsd.org>
+
+ PR ld/676
+ * emultempl/hppaelf.em (hppaelf_create_output_section_statements):
+ Handle bfd_elf32_hppa_nbsd_vec.
+
+2005-01-19 Richard Sandiford <rsandifo at redhat.com>
+
+ * ldmain.h (ld_sysroot): Change type to a constant string.
+ * ldmain.c (ld_sysroot): Likewise.
+ (get_relative_sysroot, get_sysroot): New functions, adding command-line
+ support for changing the sysroot.
+ (main): Call the new functions.
+ * lexsup.c (OPTION_SYSROOT): New.
+ (ld_options): Add --sysroot.
+ (parse_args): Add a dummy handler for it.
+ * ld.texinfo (--sysroot): Document.
+ * NEWS: Mention the new --sysroot option.
+
+2005-01-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ldlang.c (section_already_linked): Adjust bfd_link_just_syms call.
+ (lang_place_orphans): Don't abort on just_syms_flag, instead call
+ bfd_link_just_syms.
+
+2005-01-16 Danny Smith <dannysmith at users.sourceforge.net>
+
+ * defilep.y (def_name, def_library): Combine into...
+ (def_image_name): New function. Strip name to basename,
+ with warning.
+
+2005-01-12 Mark Kettenis <kettenis at gnu.org>
+
+ * configure.in: Be sure to invoke config.sub using the shell.
+ * configure: Regenerate.
+
+2005-01-11 Alan Modra <amodra at bigpond.net.au>
+
+ * configure.host: Correct sed patterns for last change.
+
+2005-01-10 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/609
+ * ldmisc.c (vfinfo): Add an extra argument: is_warning. Use this
+ to determine whether config.make_executable should be set to FALSE in
+ conjunction with config.fatal_warnings.
+ (info_msg, minfo, lfinof): Pass FALSE as the extra argument.
+ (einfo): Pass TRUE as the extra argument.
+
+2005-01-10 Greg Schaffer <gschafer at zip.com.au>
+
+ * configure.host (linux targets): Use "${CC} -dumpspecs" instead
+ of "${CC} --print-file-name=specs" to appease GCC versions >= 4.0.
+ (ia64-*-aix): Delete - this target is obsolete, and would be
+ broken by this patch.
+
+2005-01-06 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * configure.host (sparc*-*-solaris2*): Rename into sparc-*-solaris2*.
+ (sparc64-sun-solaris2*): New host.
+
+2005-01-06 Paul Brook <paul at codesourcery.com>
+
+ * Makefie.am: Add earmelf_vxworks.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Make arm-*-vxworks a separate case.
+ * emulparams/armelf_vxworks.sh: New function.
+
+2005-01-06 Alan Modra <amodra at bigpond.net.au>
+
+ * emultempl/ppc64elf.em (no_multi_toc): New var.
+ (gld${EMULATION_NAME}_finish): Pass to ppc64_elf_setup_section_lists.
+ (OPTION_NO_MULTI_TOC): Define.
+ (PARSE_AND_LIST_LONGOPTS): Add --no-multi-toc support.
+ (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
+
+2005-01-05 Nick Clifton <nickc at redhat.com>
+
+ PR binutils/614
+ * ldmisc.c (vfinfo): Alter output to conform to the GNU Coding
+ Standard's specification for parsable error messages.
+
+2005-01-04 Paul Brook <paul at codesourcery.com>
+
+ * Makefile.am: Correct dependency for earmsymbian.c.
+ * Makefile.in: Regenerate.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/ld/Makefile.am
===================================================================
--- branches/binutils/package/ld/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -147,8 +147,10 @@
eelf32_i960.o \
eelf32_i860.o \
eelf32_sparc.o \
+ eelf32_sparc_vxworks.o \
eelf32b4300.o \
eelf32bfin.o \
+ eelf32bfinfd.o \
eelf32cr16c.o \
eelf32bmip.o \
eelf32bmipn32.o \
@@ -158,7 +160,9 @@
eelf32ltsmip.o \
eelf32ltsmipn32.o \
eelf32ebmip.o \
+ eelf32ebmipvxworks.o \
eelf32elmip.o \
+ eelf32elmipvxworks.o \
eelf32fr30.o \
eelf32frv.o \
eelf32i370.o \
@@ -183,6 +187,9 @@
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
+ eelf32xc16x.o \
+ eelf32xc16xl.o \
+ eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@@ -411,7 +418,7 @@
HFILES = ld.h ldctor.h ldemul.h ldexp.h ldfile.h \
ldlang.h ldlex.h ldmain.h ldmisc.h ldver.h \
- ldwrite.h mri.h deffile.h pe-dll.h
+ ldwrite.h mri.h deffile.h pe-dll.h elf-hints-local.h
GENERATED_CFILES = ldgram.c ldlex.c deffilep.c
GENERATED_HFILES = ldgram.h ldemul-list.h deffilep.h
@@ -468,7 +475,7 @@
# These all start with e so 'make clean' can find them.
-GENSCRIPTS = LIB_PATH='${LIB_PATH}' $(SHELL) $(srcdir)/genscripts.sh ${srcdir} ${libdir} "${exec_prefix}" @host@ @target@ @target_alias@ "@EMULATION_LIBPATH@" "@NATIVE_LIB_DIRS@" @use_sysroot@
+GENSCRIPTS = LIB_PATH='${LIB_PATH}' $(SHELL) $(srcdir)/genscripts.sh "${srcdir}" "${libdir}" "${prefix}" "${exec_prefix}" @host@ @target@ @target_alias@ "@EMULATION_LIBPATH@" "@NATIVE_LIB_DIRS@" @use_sysroot@
GEN_DEPENDS = $(srcdir)/genscripts.sh stringify.sed
@TDIRS@
@@ -536,7 +543,8 @@
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} armelfb_nbsd "$(tdir_armelfb_nbsd)"
earmelf_vxworks.c: $(srcdir)/emulparams/armelf_vxworks.sh \
- $(srcdir)/emulparams/armelf.sh $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emulparams/armelf.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/emultempl/armelf.em $(srcdir)/scripttempl/elf.sc \
${GEN_DEPENDS}
${GENSCRIPTS} armelf_vxworks "$(tdir_armelf)"
@@ -618,12 +626,28 @@
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/delta68.sc ${GEN_DEPENDS}
${GENSCRIPTS} delta68 "$(tdir_delta68)"
eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
- $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/bfin.em \
+ $(srcdir)/emultempl/elf32.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32bfin "$(tdir_elf32bfin)" bfin
+eelf32bfinfd.c: $(srcdir)/emulparams/elf32bfinfd.sh $(srcdir)/emulparams/bfin.sh \
+ $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32bfinfd "$(tdir_elf32bfinfd)" elf32bfinfd
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
+eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
+eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}
@@ -664,6 +688,11 @@
eelf32_sparc.c: $(srcdir)/emulparams/elf32_sparc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_sparc "$(tdir_elf32_sparc)"
+eelf32_sparc_vxworks.c: $(srcdir)/emulparams/elf32_sparc_vxworks.sh \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emulparams/elf32_sparc.sh \
+ $(srcdir)/emultempl/vxworks.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32_sparc_vxworks "$(tdir_elf32_sparc_vxworks)"
eelf32_i860.c: $(srcdir)/emulparams/elf32_i860.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_i860 "$(tdir_elf32_i860)"
@@ -709,10 +738,20 @@
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmip "$(tdir_elf32ebmip)"
+eelf32ebmipvxworks.c: $(srcdir)/emulparams/elf32ebmipvxworks.sh \
+ $(srcdir)/emulparams/elf32ebmip.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32ebmipvxworks "$(tdir_elf32ebmipvxworks)"
eelf32elmip.c: $(srcdir)/emulparams/elf32elmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmip "$(tdir_elf32elmip)"
+eelf32elmipvxworks.c: $(srcdir)/emulparams/elf32elmipvxworks.sh \
+ $(srcdir)/emulparams/elf32elmip.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32elmipvxworks "$(tdir_elf32elmipvxworks)"
eelf32bmipn32.c: $(srcdir)/emulparams/elf32bmipn32.sh \
$(srcdir)/emultempl/irix.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@@ -729,27 +768,32 @@
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32mipswindiss "$(tdir_elf32mipswindiss)"
eelf32lppc.c: $(srcdir)/emulparams/elf32lppc.sh \
+ $(srcdir)/emulparams/elf32ppccommon.sh \
$(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppc "$(tdir_elf32lppc)"
eelf32lppcnto.c: $(srcdir)/emulparams/elf32lppcnto.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppcnto "$(tdir_elf32lppcnto)"
eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
$(srcdir)/emulparams/elf32lppc.sh $(srcdir)/emulparams/elf32ppc.sh \
- $(srcdir)/emultempl/ppc32elf.em \
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppcsim "$(tdir_elf32lppcsim)"
eelf32ppcnto.c: $(srcdir)/emulparams/elf32ppcnto.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcnto "$(tdir_elf32ppcnto)"
eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcwindiss "$(tdir_elf32ppcwindiss)"
eelf32ppcvxworks.c: $(srcdir)/emulparams/elf32ppcvxworks.sh \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/vxworks.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcvxworks "$(tdir_elf32ppcvxworks)"
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
@@ -758,20 +802,24 @@
eelf32openrisc.c: $(srcdir)/emulparams/elf32openrisc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32openrisc "$(tdir_openrisc)"
-eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
+eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh \
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc "$(tdir_elf32ppc)"
eelf32ppc_fbsd.c: $(srcdir)/emulparams/elf32ppc_fbsd.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc_fbsd "$(tdir_elf32ppc_fbsd)"
eelf32ppcsim.c: $(srcdir)/emulparams/elf32ppcsim.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcsim "$(tdir_elf32ppcsim)"
eelf32ppclinux.c: $(srcdir)/emulparams/elf32ppclinux.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppclinux "$(tdir_elf32ppclinux)"
eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@@ -878,7 +926,7 @@
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_i386_ldso "$(tdir_elf_i386_ldso)"
eelf_i386_vxworks.c: $(srcdir)/emulparams/elf_i386_vxworks.sh \
- $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emultempl/vxworks.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_i386_vxworks "$(tdir_elf_i386_vxworks)"
eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \
@@ -1661,8 +1709,7 @@
eval `grep '^ *VERSION=' $(srcdir)/../bfd/configure`; \
echo "@set VERSION $$VERSION" > $@
-$(srcdir)/ld.info: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
-ld.dvi: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
+$(srcdir)/ld.info ld.dvi ld.html: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
# Build the man page from the texinfo file
# The sed command removes the no-adjust Nroff command so that
@@ -1689,6 +1736,54 @@
-rm -rf tmpdir
CLEANFILES = dep.sed DEP DEPA DEP1 DEP2
+.PHONY: install-html install-html-am install-html-recursive
+
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-recursive install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
.PHONY: install-exec-local install-data-local
install-exec-local: ld-new$(EXEEXT)
@@ -1790,65 +1885,59 @@
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
ldmisc.h ldexp.h ldgram.h ldlang.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/safe-ctype.h
ldfile.o: ldfile.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h \
ldmisc.h ldexp.h ldlang.h ldfile.h ldmain.h ldgram.h \
- ldlex.h ldemul.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/filenames.h
+ ldlex.h ldemul.h $(INCDIR)/libiberty.h $(INCDIR)/filenames.h
ldlang.o: ldlang.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/obstack.h $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h \
- ldmain.h ldexp.h ldlang.h ldgram.h ldlex.h ldmisc.h \
- ldctor.h ldfile.h ldemul.h $(INCDIR)/fnmatch.h $(INCDIR)/demangle.h \
- $(INCDIR)/libiberty.h $(INCDIR)/hashtab.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
+ $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
+ ldexp.h ldlang.h ldgram.h ldlex.h ldmisc.h ldctor.h \
+ ldfile.h ldemul.h $(INCDIR)/fnmatch.h $(INCDIR)/demangle.h \
+ $(INCDIR)/hashtab.h
ldmain.o: ldmain.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/progress.h $(INCDIR)/bfdlink.h $(INCDIR)/filenames.h \
- ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldwrite.h \
- ldexp.h ldlang.h ldgram.h ldlex.h ldfile.h ldemul.h \
- ldctor.h
+ $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h $(INCDIR)/progress.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/filenames.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmain.h ldmisc.h ldwrite.h ldexp.h ldlang.h ldgram.h \
+ ldlex.h ldfile.h ldemul.h ldctor.h
ldmisc.o: ldmisc.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/bfdlink.h sysdep.h config.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h ld.h $(INCDIR)/bin-bugs.h \
- ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h ldmain.h \
- ldfile.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ ld.h $(INCDIR)/bin-bugs.h ldmisc.h ldexp.h ldlang.h \
+ ldgram.h ldlex.h ldmain.h ldfile.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h
ldver.o: ldver.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h sysdep.h config.h \
$(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h ldver.h \
ldexp.h ldlang.h ldfile.h ldemul.h ldmain.h
ldwrite.o: ldwrite.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
- ldlang.h ldwrite.h ldmisc.h ldgram.h ldmain.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ ld.h $(INCDIR)/bin-bugs.h ldexp.h ldlang.h ldwrite.h \
+ ldmisc.h ldgram.h ldmain.h
lexsup.o: lexsup.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
- ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h ldfile.h \
- ldver.h ldemul.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/bfdlink.h \
+ ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldexp.h \
+ ldlang.h ldgram.h ldlex.h ldfile.h ldver.h ldemul.h \
+ $(INCDIR)/demangle.h
mri.o: mri.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
sysdep.h config.h $(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h \
- ldexp.h ldlang.h ldmisc.h mri.h ldgram.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ ldexp.h ldlang.h ldmisc.h mri.h ldgram.h $(INCDIR)/libiberty.h
ldcref.o: ldcref.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldexp.h \
- ldlang.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmain.h ldmisc.h ldexp.h ldlang.h
pe-dll.o: pe-dll.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
- ldlang.h ldwrite.h ldmisc.h ldgram.h ldmain.h ldfile.h \
- ldemul.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h deffile.h pe-dll.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ ld.h $(INCDIR)/bin-bugs.h ldexp.h ldlang.h ldwrite.h \
+ ldmisc.h ldgram.h ldmain.h ldfile.h ldemul.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h deffile.h pe-dll.h
ldgram.o: ldgram.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
@@ -1858,9 +1947,9 @@
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h \
ldmisc.h ldexp.h ldlang.h ldgram.h ldfile.h ldlex.h \
- ldmain.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ ldmain.h $(INCDIR)/libiberty.h
deffilep.o: deffilep.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- ld.h $(INCDIR)/bin-bugs.h ldmisc.h deffile.h
+ $(INCDIR)/safe-ctype.h ../bfd/bfd.h $(INCDIR)/symcat.h \
+ sysdep.h config.h $(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmisc.h deffile.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
Modified: branches/binutils/package/ld/Makefile.in
===================================================================
--- branches/binutils/package/ld/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -232,12 +232,15 @@
build_os = @build_os@
build_vendor = @build_vendor@
datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
+htmldir = @htmldir@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
@@ -370,8 +373,10 @@
eelf32_i960.o \
eelf32_i860.o \
eelf32_sparc.o \
+ eelf32_sparc_vxworks.o \
eelf32b4300.o \
eelf32bfin.o \
+ eelf32bfinfd.o \
eelf32cr16c.o \
eelf32bmip.o \
eelf32bmipn32.o \
@@ -381,7 +386,9 @@
eelf32ltsmip.o \
eelf32ltsmipn32.o \
eelf32ebmip.o \
+ eelf32ebmipvxworks.o \
eelf32elmip.o \
+ eelf32elmipvxworks.o \
eelf32fr30.o \
eelf32frv.o \
eelf32i370.o \
@@ -406,6 +413,9 @@
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
+ eelf32xc16x.o \
+ eelf32xc16xl.o \
+ eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@@ -634,7 +644,7 @@
HFILES = ld.h ldctor.h ldemul.h ldexp.h ldfile.h \
ldlang.h ldlex.h ldmain.h ldmisc.h ldver.h \
- ldwrite.h mri.h deffile.h pe-dll.h
+ ldwrite.h mri.h deffile.h pe-dll.h elf-hints-local.h
GENERATED_CFILES = ldgram.c ldlex.c deffilep.c
GENERATED_HFILES = ldgram.h ldemul-list.h deffilep.h
@@ -650,7 +660,7 @@
POTFILES = $(CFILES) $(HFILES) $(EMULATION_FILES)
# These all start with e so 'make clean' can find them.
-GENSCRIPTS = LIB_PATH='${LIB_PATH}' $(SHELL) $(srcdir)/genscripts.sh ${srcdir} ${libdir} "${exec_prefix}" @host@ @target@ @target_alias@ "@EMULATION_LIBPATH@" "@NATIVE_LIB_DIRS@" @use_sysroot@
+GENSCRIPTS = LIB_PATH='${LIB_PATH}' $(SHELL) $(srcdir)/genscripts.sh "${srcdir}" "${libdir}" "${prefix}" "${exec_prefix}" @host@ @target@ @target_alias@ "@EMULATION_LIBPATH@" "@NATIVE_LIB_DIRS@" @use_sysroot@
GEN_DEPENDS = $(srcdir)/genscripts.sh stringify.sed
# We need this for automake to use YLWRAP.
@@ -671,6 +681,7 @@
ldemul-list.h crtbegin.o crtend.o ld.log ld.sum
CLEANFILES = dep.sed DEP DEPA DEP1 DEP2
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
# Stuff that should be included in a distribution. The diststuff
# target is run by the taz target in ../Makefile.in.
@@ -802,7 +813,7 @@
else \
rc=$$?; \
cd $(srcdir) && \
- $$restore $$backupdir/* `echo "./$@" | sed 's|[^/]*$$||'`; \
+ $$restore $$backupdir/* `echo "$@" | sed 's|[^/]*$$||'`; \
fi; \
rm -rf $$backupdir; exit $$rc
@@ -829,6 +840,8 @@
rm -rf $(@:.html=); else rm -Rf $(@:.html=.htp) $@; fi; \
exit 1; \
fi
+$(srcdir)/ld.info: ld.texinfo
+ld.dvi: ld.texinfo
ld.pdf: ld.texinfo
ld.html: ld.texinfo
.dvi.ps:
@@ -1340,7 +1353,8 @@
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} armelfb_nbsd "$(tdir_armelfb_nbsd)"
earmelf_vxworks.c: $(srcdir)/emulparams/armelf_vxworks.sh \
- $(srcdir)/emulparams/armelf.sh $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emulparams/armelf.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/emultempl/armelf.em $(srcdir)/scripttempl/elf.sc \
${GEN_DEPENDS}
${GENSCRIPTS} armelf_vxworks "$(tdir_armelf)"
@@ -1422,12 +1436,28 @@
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/delta68.sc ${GEN_DEPENDS}
${GENSCRIPTS} delta68 "$(tdir_delta68)"
eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
- $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/bfin.em \
+ $(srcdir)/emultempl/elf32.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32bfin "$(tdir_elf32bfin)" bfin
+eelf32bfinfd.c: $(srcdir)/emulparams/elf32bfinfd.sh $(srcdir)/emulparams/bfin.sh \
+ $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32bfinfd "$(tdir_elf32bfinfd)" elf32bfinfd
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
+eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
+eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}
@@ -1468,6 +1498,11 @@
eelf32_sparc.c: $(srcdir)/emulparams/elf32_sparc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_sparc "$(tdir_elf32_sparc)"
+eelf32_sparc_vxworks.c: $(srcdir)/emulparams/elf32_sparc_vxworks.sh \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emulparams/elf32_sparc.sh \
+ $(srcdir)/emultempl/vxworks.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32_sparc_vxworks "$(tdir_elf32_sparc_vxworks)"
eelf32_i860.c: $(srcdir)/emulparams/elf32_i860.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_i860 "$(tdir_elf32_i860)"
@@ -1513,10 +1548,20 @@
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmip "$(tdir_elf32ebmip)"
+eelf32ebmipvxworks.c: $(srcdir)/emulparams/elf32ebmipvxworks.sh \
+ $(srcdir)/emulparams/elf32ebmip.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32ebmipvxworks "$(tdir_elf32ebmipvxworks)"
eelf32elmip.c: $(srcdir)/emulparams/elf32elmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmip "$(tdir_elf32elmip)"
+eelf32elmipvxworks.c: $(srcdir)/emulparams/elf32elmipvxworks.sh \
+ $(srcdir)/emulparams/elf32elmip.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32elmipvxworks "$(tdir_elf32elmipvxworks)"
eelf32bmipn32.c: $(srcdir)/emulparams/elf32bmipn32.sh \
$(srcdir)/emultempl/irix.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@@ -1533,27 +1578,32 @@
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32mipswindiss "$(tdir_elf32mipswindiss)"
eelf32lppc.c: $(srcdir)/emulparams/elf32lppc.sh \
+ $(srcdir)/emulparams/elf32ppccommon.sh \
$(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppc "$(tdir_elf32lppc)"
eelf32lppcnto.c: $(srcdir)/emulparams/elf32lppcnto.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppcnto "$(tdir_elf32lppcnto)"
eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
$(srcdir)/emulparams/elf32lppc.sh $(srcdir)/emulparams/elf32ppc.sh \
- $(srcdir)/emultempl/ppc32elf.em \
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lppcsim "$(tdir_elf32lppcsim)"
eelf32ppcnto.c: $(srcdir)/emulparams/elf32ppcnto.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcnto "$(tdir_elf32ppcnto)"
eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcwindiss "$(tdir_elf32ppcwindiss)"
eelf32ppcvxworks.c: $(srcdir)/emulparams/elf32ppcvxworks.sh \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emultempl/vxworks.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcvxworks "$(tdir_elf32ppcvxworks)"
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
@@ -1562,20 +1612,24 @@
eelf32openrisc.c: $(srcdir)/emulparams/elf32openrisc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32openrisc "$(tdir_openrisc)"
-eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
+eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh \
+ $(srcdir)/emulparams/elf32ppccommon.sh $(srcdir)/emultempl/ppc32elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc "$(tdir_elf32ppc)"
eelf32ppc_fbsd.c: $(srcdir)/emulparams/elf32ppc_fbsd.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc_fbsd "$(tdir_elf32ppc_fbsd)"
eelf32ppcsim.c: $(srcdir)/emulparams/elf32ppcsim.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppcsim "$(tdir_elf32ppcsim)"
eelf32ppclinux.c: $(srcdir)/emulparams/elf32ppclinux.sh \
- $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emultempl/ppc32elf.em \
- $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ $(srcdir)/emulparams/elf32ppc.sh $(srcdir)/emulparams/elf32ppccommon.sh \
+ $(srcdir)/emultempl/ppc32elf.em $(srcdir)/emultempl/elf32.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppclinux "$(tdir_elf32ppclinux)"
eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@@ -1682,7 +1736,7 @@
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_i386_ldso "$(tdir_elf_i386_ldso)"
eelf_i386_vxworks.c: $(srcdir)/emulparams/elf_i386_vxworks.sh \
- $(srcdir)/emulparams/vxworks.sh \
+ $(srcdir)/emulparams/vxworks.sh $(srcdir)/emultempl/vxworks.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_i386_vxworks "$(tdir_elf_i386_vxworks)"
eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \
@@ -2454,8 +2508,7 @@
eval `grep '^ *VERSION=' $(srcdir)/../bfd/configure`; \
echo "@set VERSION $$VERSION" > $@
-$(srcdir)/ld.info: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
-ld.dvi: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
+$(srcdir)/ld.info ld.dvi ld.html: $(srcdir)/ld.texinfo configdoc.texi ldver.texi
# Build the man page from the texinfo file
# The sed command removes the no-adjust Nroff command so that
@@ -2471,6 +2524,52 @@
mostlyclean-local:
-rm -rf tmpdir
+.PHONY: install-html install-html-am install-html-recursive
+
+install-html: install-html-recursive install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
.PHONY: install-exec-local install-data-local
install-exec-local: ld-new$(EXEEXT)
@@ -2566,65 +2665,59 @@
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
ldmisc.h ldexp.h ldgram.h ldlang.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/safe-ctype.h
ldfile.o: ldfile.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h \
ldmisc.h ldexp.h ldlang.h ldfile.h ldmain.h ldgram.h \
- ldlex.h ldemul.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/filenames.h
+ ldlex.h ldemul.h $(INCDIR)/libiberty.h $(INCDIR)/filenames.h
ldlang.o: ldlang.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/obstack.h $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h \
- ldmain.h ldexp.h ldlang.h ldgram.h ldlex.h ldmisc.h \
- ldctor.h ldfile.h ldemul.h $(INCDIR)/fnmatch.h $(INCDIR)/demangle.h \
- $(INCDIR)/libiberty.h $(INCDIR)/hashtab.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
+ $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
+ ldexp.h ldlang.h ldgram.h ldlex.h ldmisc.h ldctor.h \
+ ldfile.h ldemul.h $(INCDIR)/fnmatch.h $(INCDIR)/demangle.h \
+ $(INCDIR)/hashtab.h
ldmain.o: ldmain.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/progress.h $(INCDIR)/bfdlink.h $(INCDIR)/filenames.h \
- ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldwrite.h \
- ldexp.h ldlang.h ldgram.h ldlex.h ldfile.h ldemul.h \
- ldctor.h
+ $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h $(INCDIR)/progress.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/filenames.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmain.h ldmisc.h ldwrite.h ldexp.h ldlang.h ldgram.h \
+ ldlex.h ldfile.h ldemul.h ldctor.h
ldmisc.o: ldmisc.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/bfdlink.h sysdep.h config.h \
- $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/demangle.h $(INCDIR)/libiberty.h ld.h $(INCDIR)/bin-bugs.h \
- ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h ldmain.h \
- ldfile.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
+ ld.h $(INCDIR)/bin-bugs.h ldmisc.h ldexp.h ldlang.h \
+ ldgram.h ldlex.h ldmain.h ldfile.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h
ldver.o: ldver.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h ../bfd/bfdver.h sysdep.h config.h \
$(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h ldver.h \
ldexp.h ldlang.h ldfile.h ldemul.h ldmain.h
ldwrite.o: ldwrite.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
- ldlang.h ldwrite.h ldmisc.h ldgram.h ldmain.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ ld.h $(INCDIR)/bin-bugs.h ldexp.h ldlang.h ldwrite.h \
+ ldmisc.h ldgram.h ldmain.h
lexsup.o: lexsup.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldmain.h \
- ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h ldfile.h \
- ldver.h ldemul.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/bfdlink.h \
+ ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldexp.h \
+ ldlang.h ldgram.h ldlex.h ldfile.h ldver.h ldemul.h \
+ $(INCDIR)/demangle.h
mri.o: mri.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
sysdep.h config.h $(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h \
- ldexp.h ldlang.h ldmisc.h mri.h ldgram.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ ldexp.h ldlang.h ldmisc.h mri.h ldgram.h $(INCDIR)/libiberty.h
ldcref.o: ldcref.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- ld.h $(INCDIR)/bin-bugs.h ldmain.h ldmisc.h ldexp.h \
- ldlang.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmain.h ldmisc.h ldexp.h ldlang.h
pe-dll.o: pe-dll.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
- ldlang.h ldwrite.h ldmisc.h ldgram.h ldmain.h ldfile.h \
- ldemul.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
- $(INCDIR)/bfdlink.h deffile.h pe-dll.h
+ $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
+ ld.h $(INCDIR)/bin-bugs.h ldexp.h ldlang.h ldwrite.h \
+ ldmisc.h ldgram.h ldmain.h ldfile.h ldemul.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h deffile.h pe-dll.h
ldgram.o: ldgram.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h ldexp.h \
@@ -2634,11 +2727,11 @@
$(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/safe-ctype.h $(INCDIR)/bfdlink.h ld.h $(INCDIR)/bin-bugs.h \
ldmisc.h ldexp.h ldlang.h ldgram.h ldfile.h ldlex.h \
- ldmain.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ ldmain.h $(INCDIR)/libiberty.h
deffilep.o: deffilep.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/safe-ctype.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- ld.h $(INCDIR)/bin-bugs.h ldmisc.h deffile.h
+ $(INCDIR)/safe-ctype.h ../bfd/bfd.h $(INCDIR)/symcat.h \
+ sysdep.h config.h $(INCDIR)/fopen-same.h ld.h $(INCDIR)/bin-bugs.h \
+ ldmisc.h deffile.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
Modified: branches/binutils/package/ld/NEWS
===================================================================
--- branches/binutils/package/ld/NEWS 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/NEWS 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,15 @@
-*- text -*-
+* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
+
+* Modify the Linux linker search order to better match ld.so search order.
+ Look for DT_NEEDED libraries in paths specified by ld.so.conf before
+ searching the default directories, rather than vice versa.
+ Use $prefix/etc/ld.so.conf if it exists, otherwise /etc/ld.so.conf.
+
+* PE-COFF: Forward exports from DLL's can now be specified in .def files
+ passed directly to ld.
+
* Support for the Z80 processor family has been added.
* Add support for the "@<file>" syntax to the command line, so that extra
Modified: branches/binutils/package/ld/configure
===================================================================
--- branches/binutils/package/ld/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL use_sysroot TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE WARN_CFLAGS NO_WERROR CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l YACC LEX LEXLIB LEX_OUTPUT_ROOT MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT HDEFINES HOSTING_CRT0 HOSTING_LIBS NATIVE_LIB_DIRS STRINGIFY EMUL EMULATION_OFILES EMUL_EXTRA_OFILES LIB_PATH EMULATION_LIBPATH TESTBFDLIB LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA CYGPATH_W PACKAGE VERSION ACLOCAL AUTOCONF AUTOMAKE AUTOHEADER MAKEINFO install_sh STRIP ac_ct_STRIP INSTALL_STRIP_PROGRAM mkdir_p AWK SET_MAKE am__leading_dot AMTAR am__tar am__untar DEPDIR am__include am__quote AMDEP_TRUE AMDEP_FALSE AMDEPBACKSLASH CCDEPMODE am__fastdepCC_TRUE am__fastdepCC_FALSE LN_S RANLIB ac_ct_RANLIB LIBTOOL use_sysroot TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE WARN_CFLAGS NO_WERROR CPP EGREP ALLOCA USE_NLS MSGFMT GMSGFMT XGETTEXT USE_INCLUDED_LIBINTL CATALOGS CATOBJEXT DATADIRNAME GMOFILES INSTOBJEXT INTLDEPS INTLLIBS INTLOBJS POFILES POSUB INCLUDE_LOCALE_H GT_NO GT_YES MKINSTALLDIRS l YACC LEX LEXLIB LEX_OUTPUT_ROOT MAINTAINER_MODE_TRUE MAINTAINER_MODE_FALSE MAINT HDEFINES HOSTING_CRT0 HOSTING_LIBS NATIVE_LIB_DIRS STRINGIFY EMUL EMULATION_OFILES EMUL_EXTRA_OFILES LIB_PATH EMULATION_LIBPATH TESTBFDLIB datarootdir docdir htmldir LIBOBJS LTLIBOBJS'
ac_subst_files='TDIRS'
# Initialize some variables set by options.
@@ -3342,6 +3342,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3352,6 +3353,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3412,14 +3414,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3480,6 +3475,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3813,7 +3869,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3816 "configure"' > conftest.$ac_ext
+ echo '#line 3872 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -3868,6 +3924,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -5004,7 +5106,7 @@
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-ALL_LINGUAS="fr sv tr es da"
+ALL_LINGUAS="fr sv tr es da vi zh_CN"
if test -n "$ac_tool_prefix"; then
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
@@ -8505,7 +8607,8 @@
-for ac_header in string.h strings.h stdlib.h unistd.h
+
+for ac_header in string.h strings.h stdlib.h unistd.h elf-hints.h
do
as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh`
if eval "test \"\${$as_ac_Header+set}\" = set"; then
@@ -9694,6 +9797,10 @@
fi
+
+
+
+
ac_config_files="$ac_config_files Makefile po/Makefile.in:po/Make-in"
ac_config_commands="$ac_config_commands default"
cat >confcache <<\_ACEOF
@@ -10442,6 +10549,9 @@
s, at LIB_PATH@,$LIB_PATH,;t t
s, at EMULATION_LIBPATH@,$EMULATION_LIBPATH,;t t
s, at TESTBFDLIB@,$TESTBFDLIB,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LIBOBJS@,$LIBOBJS,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
/@TDIRS@/r $TDIRS
Modified: branches/binutils/package/ld/configure.in
===================================================================
--- branches/binutils/package/ld/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -82,7 +82,7 @@
AC_PROG_CC
AC_PROG_INSTALL
-ALL_LINGUAS="fr sv tr es da"
+ALL_LINGUAS="fr sv tr es da vi zh_CN"
CY_GNU_GETTEXT
AC_EXEEXT
@@ -99,7 +99,7 @@
AC_SUBST(HOSTING_LIBS)
AC_SUBST(NATIVE_LIB_DIRS)
-AC_CHECK_HEADERS(string.h strings.h stdlib.h unistd.h)
+AC_CHECK_HEADERS(string.h strings.h stdlib.h unistd.h elf-hints.h)
AC_CHECK_FUNCS(sbrk realpath glob)
AC_HEADER_DIRENT
@@ -253,5 +253,10 @@
[Additional extension a shared object might have.])
fi
+dnl Required by html and install-html
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
AC_OUTPUT(Makefile po/Makefile.in:po/Make-in,
[sed -e '/POTFILES =/r po/POTFILES' po/Makefile.in > po/Makefile])
Modified: branches/binutils/package/ld/configure.tgt
===================================================================
--- branches/binutils/package/ld/configure.tgt 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/configure.tgt 2006-04-19 08:33:31 UTC (rev 12)
@@ -60,9 +60,9 @@
arm*-*-symbianelf*) targ_emul=armsymbian;;
arm-*-kaos*) targ_emul=armelf ;;
arm9e-*-elf) targ_emul=armelf ;;
-arm*b-*-linux-gnueabi) targ_emul=armelfb_linux_eabi ;;
+arm*b-*-linux-*eabi) targ_emul=armelfb_linux_eabi ;;
arm*b-*-linux-*) targ_emul=armelfb_linux; targ_extra_emuls=armelfb ;;
-arm*-*-linux-gnueabi) targ_emul=armelf_linux_eabi ;;
+arm*-*-linux-*eabi) targ_emul=armelf_linux_eabi ;;
arm*-*-linux-*) targ_emul=armelf_linux; targ_extra_emuls=armelf ;;
arm*-*-uclinux*) targ_emul=armelf_linux; targ_extra_emuls=armelf ;;
arm-*-vxworks) targ_emul=armelf_vxworks ;;
@@ -83,8 +83,8 @@
avr-*-*) targ_emul=avr2
targ_extra_emuls="avr1 avr3 avr4 avr5"
;;
-bfin-*-elf) targ_emul=elf32bfin ;;
-bfin-*-uclinux*) targ_emul=elf32bfin ;;
+bfin-*-elf) targ_emul=elf32bfin; targ_extra_emuls="elf32bfinfd" ;;
+bfin-*-uclinux*) targ_emul=elf32bfin; targ_extra_emuls="elf32bfinfd" ;;
cr16c-*-elf*) targ_emul=elf32cr16c
;;
cris-*-*aout*) targ_emul=crisaout
@@ -140,6 +140,7 @@
i[3-7]86-*-coff) targ_emul=i386coff ;;
i[3-7]86-*-rtems*) targ_emul=elf_i386 ;;
i[3-7]86-*-aros*) targ_emul=elf_i386 ;;
+i[3-7]86-*-rdos*) targ_emul=elf_i386 ;;
i[3-7]86-*-bsd) targ_emul=i386bsd ;;
i[3-7]86-*-bsd386) targ_emul=i386bsd ;;
i[3-7]86-*-bsdi*) targ_emul=i386bsd ;;
@@ -307,10 +308,12 @@
mips*-sgi-irix*) targ_emul=mipsbig ;;
mips*el-*-ecoff*) targ_emul=mipsidtl ;;
mips*-*-ecoff*) targ_emul=mipsidt ;;
-mips*el-*-netbsd*) targ_emul=elf32lmip
- targ_extra_emuls="elf32bmip" ;;
-mips*-*-netbsd*) targ_emul=elf32bmip
- targ_extra_emuls="elf32lmip" ;;
+mips*el-*-netbsd*) targ_emul=elf32ltsmip
+ targ_extra_emuls="elf32btsmip elf64ltsmip elf64btsmip"
+ ;;
+mips*-*-netbsd*) targ_emul=elf32btsmip
+ targ_extra_emuls="elf32ltsmip elf64btsmip elf64ltsmip"
+ ;;
mips*-*-bsd*) targ_emul=mipsbig ;;
mips*vr4300el-*-elf*) targ_emul=elf32l4300 ;;
mips*vr4300-*-elf*) targ_emul=elf32b4300 ;;
@@ -321,9 +324,10 @@
mips*el-*-elf*) targ_emul=elf32elmip ;;
mips*-*-elf*) targ_emul=elf32ebmip ;;
mips*-*-rtems*) targ_emul=elf32ebmip ;;
-mips*el-*-vxworks*) targ_emul=elf32elmip ;;
-mips*-*-vxworks*) targ_emul=elf32ebmip
- targ_extra_emuls="elf32elmip" ;;
+mips*el-*-vxworks*) targ_emul=elf32elmipvxworks
+ targ_extra_emuls="elf32ebmipvxworks" ;;
+mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
+ targ_extra_emuls="elf32elmipvxworks" ;;
mips*-*-windiss) targ_emul=elf32mipswindiss ;;
mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
@@ -490,6 +494,7 @@
sparc*-*-coff) targ_emul=coff_sparc ;;
sparc*-*-elf) targ_emul=elf32_sparc ;;
sparc*-*-sysv4*) targ_emul=elf32_sparc ;;
+sparc*-*-vxworks*) targ_emul=elf32_sparc_vxworks ;;
sparc64-*-freebsd* | sparcv9-*-freebsd* | sparc64-*-kfreebsd*-gnu | sparcv9-*-kfreebsd*-gnu)
targ_emul=elf64_sparc_fbsd
targ_extra_emuls="elf64_sparc elf32_sparc"
@@ -551,6 +556,9 @@
;;
w65-*-*) targ_emul=w65
;;
+xc16x-*-elf) targ_emul=elf32xc16x
+ targ_extra_emuls="elf32xc16xl elf32xc16xs"
+ ;;
xstormy16-*-*) targ_emul=elf32xstormy16
;;
xtensa-*-*) targ_emul=elf32xtensa
Modified: branches/binutils/package/ld/deffile.h
===================================================================
--- branches/binutils/package/ld/deffile.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/deffile.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -36,7 +36,7 @@
char *internal_name; /* always set, may == name */
int ordinal; /* -1 if not specified */
int hint;
- char flag_private, flag_constant, flag_noname, flag_data;
+ char flag_private, flag_constant, flag_noname, flag_data, flag_forward;
} def_file_export;
typedef struct def_file_module {
Modified: branches/binutils/package/ld/deffilep.y
===================================================================
--- branches/binutils/package/ld/deffilep.y 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/deffilep.y 2006-04-19 08:33:31 UTC (rev 12)
@@ -648,13 +648,30 @@
static void
def_image_name (const char *name, int base, int is_dll)
{
- const char* image_name = lbasename (name);
- if (image_name != name)
- einfo ("%s:%d: Warning: path components stripped from %s, '%s'\n",
- def_filename, linenumber, is_dll ? "LIBRARY" : "NAME", name);
- if (def->name)
- free (def->name);
- def->name = xstrdup (image_name);
+ /* If a LIBRARY or NAME statement is specified without a name, there is nothing
+ to do here. We retain the output filename specified on command line. */
+ if (*name)
+ {
+ const char* image_name = lbasename (name);
+ if (image_name != name)
+ einfo ("%s:%d: Warning: path components stripped from %s, '%s'\n",
+ def_filename, linenumber, is_dll ? "LIBRARY" : "NAME",
+ name);
+ if (def->name)
+ free (def->name);
+ /* Append the default suffix, if none specified. */
+ if (strchr (image_name, '.') == 0)
+ {
+ const char * suffix = is_dll ? ".dll" : ".exe";
+
+ def->name = xmalloc (strlen (image_name) + strlen (suffix) + 1);
+ sprintf (def->name, "%s%s", image_name, suffix);
+ }
+ else
+ def->name = xstrdup (image_name);
+ }
+
+ /* Honor a BASE address statement, even if LIBRARY string is empty. */
def->base_address = base;
def->is_dll = is_dll;
}
Added: branches/binutils/package/ld/elf-hints-local.h
===================================================================
--- branches/binutils/package/ld/elf-hints-local.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/elf-hints-local.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,44 @@
+/* Copyright (c) 1997 John D. Polstra.
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ SUCH DAMAGE. */
+
+#ifndef _ELF_HINTS_H_
+#define _ELF_HINTS_H_
+
+/* Hints file produced by ldconfig. */
+struct elfhints_hdr
+{
+ u_int32_t magic; /* Magic number. */
+ u_int32_t version; /* File version (1). */
+ u_int32_t strtab; /* Offset of string table in file. */
+ u_int32_t strsize; /* Size of string table. */
+ u_int32_t dirlist; /* Offset of directory list in string table. */
+ u_int32_t dirlistlen; /* strlen(dirlist). */
+ u_int32_t spare[26]; /* Room for expansion. */
+};
+
+#define ELFHINTS_MAGIC 0x746e6845
+
+#define _PATH_ELF_HINTS "/var/run/ld-elf.so.hints"
+
+#endif /* !_ELF_HINTS_H_ */
Modified: branches/binutils/package/ld/emulparams/armelf_vxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/armelf_vxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/armelf_vxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,3 +2,5 @@
OUTPUT_FORMAT="elf32-littlearm-vxworks"
BIG_OUTPUT_FORMAT="elf32-bigarm-vxworks"
LITTLE_OUTPUT_FORMAT="$OUTPUT_FORMAT"
+MAXPAGESIZE=0x1000
+. ${srcdir}/emulparams/vxworks.sh
Modified: branches/binutils/package/ld/emulparams/bfin.sh
===================================================================
--- branches/binutils/package/ld/emulparams/bfin.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/bfin.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,8 +6,9 @@
NONPAGED_TEXT_START_ADDR=${TEXT_START_ADDR}
ARCH=bfin
MACHINE=
-ENTRY=_start
+ENTRY=__start
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
EMBEDDED=yes
-EXTRA_EM_FILE=bfin
+DATA_END_SYMBOLS="__edata = .; PROVIDE (_edata = .);"
+END_SYMBOLS="__end = .; PROVIDE (_end = .);"
Added: branches/binutils/package/ld/emulparams/elf32_sparc_vxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32_sparc_vxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32_sparc_vxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+. ${srcdir}/emulparams/elf32_sparc.sh
+OUTPUT_FORMAT="elf32-sparc-vxworks"
+unset DATA_PLT
+. ${srcdir}/emulparams/vxworks.sh
Added: branches/binutils/package/ld/emulparams/elf32bfinfd.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32bfinfd.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32bfinfd.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+. ${srcdir}/emulparams/bfin.sh
+unset STACK_ADDR
+OUTPUT_FORMAT="elf32-bfinfdpic"
+MAXPAGESIZE=0x4000
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+EMBEDDED= # This gets us program headers mapped as part of the text segment.
+OTHER_GOT_SYMBOLS=
+OTHER_READONLY_SECTIONS="
+ .rofixup : {
+ ${RELOCATING+__ROFIXUP_LIST__ = .;}
+ *(.rofixup)
+ ${RELOCATING+__ROFIXUP_END__ = .;}
+ }
+"
Added: branches/binutils/package/ld/emulparams/elf32ebmipvxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32ebmipvxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32ebmipvxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+. ${srcdir}/emulparams/elf32bmip.sh
+
+OUTPUT_FORMAT="elf32-bigmips-vxworks"
+BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
+LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
+unset OTHER_GOT_SYMBOLS
+SHLIB_TEXT_START_ADDR=0
+unset TEXT_DYNAMIC
+unset DATA_ADDR
+
+. ${srcdir}/emulparams/vxworks.sh
Added: branches/binutils/package/ld/emulparams/elf32elmipvxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32elmipvxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32elmipvxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+. ${srcdir}/emulparams/elf32bmip.sh
+
+OUTPUT_FORMAT="elf32-littlemips-vxworks"
+BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
+LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
+unset OTHER_GOT_SYMBOLS
+SHLIB_TEXT_START_ADDR=0
+unset TEXT_DYNAMIC
+unset DATA_ADDR
+
+. ${srcdir}/emulparams/vxworks.sh
Modified: branches/binutils/package/ld/emulparams/elf32mt.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32mt.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32mt.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,9 +1,9 @@
MACHINE=
SCRIPT_NAME=elf
-OUTPUT_FORMAT="elf32-ms1"
+OUTPUT_FORMAT="elf32-mt"
# See also `include/elf/mt.h'
TEXT_START_ADDR=0x2000
-ARCH=ms1
+ARCH=mt
ENTRY=_start
EMBEDDED=yes
ELFSIZE=32
Modified: branches/binutils/package/ld/emulparams/elf32ppc.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32ppc.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32ppc.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,17 +1,7 @@
# If you change this file, please also look at files which source this one:
-# elf32lppc.sh elf32ppclinux.sh elf32ppcsim.sh elf32ppcvxworks.sh
+# elf32lppc.sh elf32ppclinux.sh elf32ppcsim.sh
-TEMPLATE_NAME=elf32
-EXTRA_EM_FILE=ppc32elf
-GENERATE_SHLIB_SCRIPT=yes
-GENERATE_PIE_SCRIPT=yes
-SCRIPT_NAME=elf
-OUTPUT_FORMAT="elf32-powerpc"
-TEXT_START_ADDR=0x01800000
-MAXPAGESIZE=0x10000
-COMMONPAGESIZE=0x1000
-ARCH=powerpc:common
-MACHINE=
+. ${srcdir}/emulparams/elf32ppccommon.sh
# Yes, we want duplicate .got and .plt sections. The linker chooses the
# appropriate one magically in ppc_after_open
DATA_GOT=
@@ -22,40 +12,4 @@
PLT=".plt ${RELOCATING-0} : SPECIAL { *(.plt) }"
GOTPLT="${PLT}"
OTHER_TEXT_SECTIONS="*(.glink)"
-EXECUTABLE_SYMBOLS='PROVIDE (__stack = 0); PROVIDE (___stack = 0);'
-if test -z "${CREATE_SHLIB}"; then
- SDATA_START_SYMBOLS="PROVIDE (_SDA_BASE_ = 32768);"
- SDATA2_START_SYMBOLS="PROVIDE (_SDA2_BASE_ = 32768);"
- SBSS_START_SYMBOLS="PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);"
- SBSS_END_SYMBOLS="PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);"
-else
- unset SDATA_START_SYMBOLS
- unset SDATA2_START_SYMBOLS
- unset SBSS_START_SYMBOLS
- unset SBSS_END_SYMBOLS
-fi
-OTHER_END_SYMBOLS="__end = .;"
-OTHER_RELRO_SECTIONS="
- .fixup ${RELOCATING-0} : { *(.fixup) }
- .got1 ${RELOCATING-0} : { *(.got1) }
- .got2 ${RELOCATING-0} : { *(.got2) }
-"
-OTHER_GOT_RELOC_SECTIONS="
- .rela.got1 ${RELOCATING-0} : { *(.rela.got1) }
- .rela.got2 ${RELOCATING-0} : { *(.rela.got2) }
-"
-
-# Treat a host that matches the target with the possible exception of "64"
-# in the name as if it were native.
-if test `echo "$host" | sed -e s/64//` = `echo "$target" | sed -e s/64//`; then
- case " $EMULATION_LIBPATH " in
- *" ${EMULATION_NAME} "*)
- NATIVE=yes
- ;;
- esac
-fi
-
-# Look for 64 bit target libraries in /lib64, /usr/lib64 etc., first.
-case "$EMULATION_NAME" in
- *64*) LIBPATH_SUFFIX=64 ;;
-esac
+EXTRA_EM_FILE=ppc32elf
Added: branches/binutils/package/ld/emulparams/elf32ppccommon.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32ppccommon.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32ppccommon.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,49 @@
+# The PLT-agnostic parts of a generic 32-bit ELF PowerPC target. Included by:
+# elf32ppc.sh elf32ppcvxworks.sh
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf32-powerpc"
+TEXT_START_ADDR=0x01800000
+MAXPAGESIZE=0x10000
+COMMONPAGESIZE=0x1000
+ARCH=powerpc:common
+MACHINE=
+EXECUTABLE_SYMBOLS='PROVIDE (__stack = 0); PROVIDE (___stack = 0);'
+if test -z "${CREATE_SHLIB}"; then
+ SDATA_START_SYMBOLS="PROVIDE (_SDA_BASE_ = 32768);"
+ SDATA2_START_SYMBOLS="PROVIDE (_SDA2_BASE_ = 32768);"
+ SBSS_START_SYMBOLS="PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);"
+ SBSS_END_SYMBOLS="PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);"
+else
+ unset SDATA_START_SYMBOLS
+ unset SDATA2_START_SYMBOLS
+ unset SBSS_START_SYMBOLS
+ unset SBSS_END_SYMBOLS
+fi
+OTHER_END_SYMBOLS="__end = .;"
+OTHER_RELRO_SECTIONS="
+ .fixup ${RELOCATING-0} : { *(.fixup) }
+ .got1 ${RELOCATING-0} : { *(.got1) }
+ .got2 ${RELOCATING-0} : { *(.got2) }
+"
+OTHER_GOT_RELOC_SECTIONS="
+ .rela.got1 ${RELOCATING-0} : { *(.rela.got1) }
+ .rela.got2 ${RELOCATING-0} : { *(.rela.got2) }
+"
+
+# Treat a host that matches the target with the possible exception of "64"
+# in the name as if it were native.
+if test `echo "$host" | sed -e s/64//` = `echo "$target" | sed -e s/64//`; then
+ case " $EMULATION_LIBPATH " in
+ *" ${EMULATION_NAME} "*)
+ NATIVE=yes
+ ;;
+ esac
+fi
+
+# Look for 64 bit target libraries in /lib64, /usr/lib64 etc., first.
+case "$EMULATION_NAME" in
+ *64*) LIBPATH_SUFFIX=64 ;;
+esac
Modified: branches/binutils/package/ld/emulparams/elf32ppcvxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32ppcvxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32ppcvxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,4 +1,3 @@
-. ${srcdir}/emulparams/elf32ppc.sh
+. ${srcdir}/emulparams/elf32ppccommon.sh
OUTPUT_FORMAT="elf32-powerpc-vxworks"
-unset BSS_PLT
. ${srcdir}/emulparams/vxworks.sh
Added: branches/binutils/package/ld/emulparams/elf32xc16x.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32xc16x.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32xc16x.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16x
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0x00400
+ARCH=xc16x
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
Added: branches/binutils/package/ld/emulparams/elf32xc16xl.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32xc16xl.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32xc16xl.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16xl
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0xc00300
+ARCH=xc16x:xc16xl
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
Added: branches/binutils/package/ld/emulparams/elf32xc16xs.sh
===================================================================
--- branches/binutils/package/ld/emulparams/elf32xc16xs.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/elf32xc16xs.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16xs
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0xc00300
+ARCH=xc16x:xc16xs
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
Modified: branches/binutils/package/ld/emulparams/h8300.sh
===================================================================
--- branches/binutils/package/ld/emulparams/h8300.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/h8300.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,3 +3,16 @@
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300
+TINY_READONLY_SECTION=".tinyrodata :
+ {
+ *(.tinyrodata)
+ } =0"
+TINY_DATA_SECTION=".tinydata 0xff8000 :
+ {
+ *(.tinydata)
+ _tinydata = .;
+ }"
+TINY_BSS_SECTION=".tinybss : AT (_tinydata)
+ {
+ *(.tinybss)
+ }"
Modified: branches/binutils/package/ld/emulparams/h8300elf.sh
===================================================================
--- branches/binutils/package/ld/emulparams/h8300elf.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/h8300elf.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -10,3 +10,16 @@
TEMPLATE_NAME=elf32
EMBEDDED=yes
STACK_ADDR=0xfefc
+TINY_READONLY_SECTION=".tinyrodata :
+ {
+ *(.tinyrodata)
+ } =0"
+TINY_DATA_SECTION=".tinydata 0xff8000 :
+ {
+ *(.tinydata)
+ _tinydata = .;
+ }"
+TINY_BSS_SECTION=".tinybss : AT (_tinydata)
+ {
+ *(.tinybss)
+ }"
Modified: branches/binutils/package/ld/emulparams/h8300sxelf.sh
===================================================================
--- branches/binutils/package/ld/emulparams/h8300sxelf.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/h8300sxelf.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,16 @@
. ${srcdir}/emulparams/h8300elf.sh
ARCH="h8300:h8300sx"
STACK_ADDR=0x2fefc
+TINY_READONLY_SECTION=".tinyrodata :
+ {
+ *(.tinyrodata)
+ } =0"
+TINY_DATA_SECTION=".tinydata 0xff8000 :
+ {
+ *(.tinydata)
+ _tinydata = .;
+ }"
+TINY_BSS_SECTION=".tinybss : AT (_tinydata)
+ {
+ *(.tinybss)
+ }"
Modified: branches/binutils/package/ld/emulparams/vxworks.sh
===================================================================
--- branches/binutils/package/ld/emulparams/vxworks.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emulparams/vxworks.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -23,3 +23,6 @@
ETEXT_NAME=etext_unrelocated
OTHER_SYMBOLS="PROVIDE (_ehdr = ${TEXT_START_ADDR});"
DATA_END_SYMBOLS=".edata : { PROVIDE (_edata = .); }"
+VXWORKS_BASE_EM_FILE=$EXTRA_EM_FILE
+EXTRA_EM_FILE=vxworks
+unset EMBEDDED
Modified: branches/binutils/package/ld/emultempl/armelf.em
===================================================================
--- branches/binutils/package/ld/emultempl/armelf.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/armelf.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -26,6 +26,8 @@
test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
cat >>e${EMULATION_NAME}.c <<EOF
+#include "elf/arm.h"
+
static char *thumb_entry_symbol = NULL;
static bfd *bfd_for_interwork;
static int byteswap_code = 0;
@@ -150,12 +152,26 @@
/* Call the elf32.em routine. */
gld${EMULATION_NAME}_finish ();
- if (thumb_entry_symbol == NULL)
- return;
+ if (thumb_entry_symbol)
+ {
+ h = bfd_link_hash_lookup (link_info.hash, thumb_entry_symbol,
+ FALSE, FALSE, TRUE);
+ }
+ else
+ {
+ struct elf_link_hash_entry * eh;
- h = bfd_link_hash_lookup (link_info.hash, thumb_entry_symbol,
- FALSE, FALSE, TRUE);
+ if (!entry_symbol.name)
+ return;
+ h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
+ FALSE, FALSE, TRUE);
+ eh = (struct elf_link_hash_entry *)h;
+ if (!h || ELF_ST_TYPE(eh->type) != STT_ARM_TFUNC)
+ return;
+ }
+
+
if (h != (struct bfd_link_hash_entry *) NULL
&& (h->type == bfd_link_hash_defined
|| h->type == bfd_link_hash_defweak)
@@ -180,7 +196,8 @@
sprintf_vma (buffer + 2, val);
- if (entry_symbol.name != NULL && entry_from_cmdline)
+ if (thumb_entry_symbol != NULL && entry_symbol.name != NULL
+ && entry_from_cmdline)
einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
thumb_entry_symbol, entry_symbol.name);
entry_symbol.name = buffer;
Modified: branches/binutils/package/ld/emultempl/elf32.em
===================================================================
--- branches/binutils/package/ld/emultempl/elf32.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/elf32.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -13,7 +13,7 @@
/* ${ELFSIZE} bit ELF emulation code for ${EMULATION_NAME}
Copyright 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Steve Chamberlain <sac at cygnus.com>
ELF support by Ian Lance Taylor <ian at cygnus.com>
@@ -529,6 +529,68 @@
EOF
case ${target} in
+ *-*-freebsd* | *-*-dragonfly*)
+ cat >>e${EMULATION_NAME}.c <<EOF
+/* Read the system search path the FreeBSD way rather than the Linux way. */
+#ifdef HAVE_ELF_HINTS_H
+#include <elf-hints.h>
+#else
+#include "elf-hints-local.h"
+#endif
+
+static bfd_boolean
+gld${EMULATION_NAME}_check_ld_elf_hints (const char *name, int force)
+{
+ static bfd_boolean initialized;
+ static char *ld_elf_hints;
+ struct dt_needed needed;
+
+ if (!initialized)
+ {
+ FILE *f;
+ char *tmppath;
+
+ tmppath = concat (ld_sysroot, _PATH_ELF_HINTS, NULL);
+ f = fopen (tmppath, FOPEN_RB);
+ free (tmppath);
+ if (f != NULL)
+ {
+ struct elfhints_hdr hdr;
+
+ if (fread (&hdr, 1, sizeof (hdr), f) == sizeof (hdr)
+ && hdr.magic == ELFHINTS_MAGIC
+ && hdr.version == 1)
+ {
+ if (fseek (f, hdr.strtab + hdr.dirlist, SEEK_SET) != -1)
+ {
+ char *b;
+
+ b = xmalloc (hdr.dirlistlen + 1);
+ if (fread (b, 1, hdr.dirlistlen + 1, f) ==
+ hdr.dirlistlen + 1)
+ ld_elf_hints = gld${EMULATION_NAME}_add_sysroot (b);
+
+ free (b);
+ }
+ }
+ fclose (f);
+ }
+
+ initialized = TRUE;
+ }
+
+ if (ld_elf_hints == NULL)
+ return FALSE;
+
+ needed.by = NULL;
+ needed.name = name;
+ return gld${EMULATION_NAME}_search_needed (ld_elf_hints, & needed,
+ force);
+}
+EOF
+ # FreeBSD
+ ;;
+
*-*-linux-* | *-*-k*bsd*-*)
cat >>e${EMULATION_NAME}.c <<EOF
/* For a native linker, check the file /etc/ld.so.conf for directories
@@ -541,7 +603,7 @@
size_t len, alloc;
};
-static void
+static bfd_boolean
gld${EMULATION_NAME}_parse_ld_so_conf
(struct gld${EMULATION_NAME}_ld_so_conf *info, const char *filename);
@@ -584,7 +646,7 @@
free (newp);
}
-static void
+static bfd_boolean
gld${EMULATION_NAME}_parse_ld_so_conf
(struct gld${EMULATION_NAME}_ld_so_conf *info, const char *filename)
{
@@ -593,7 +655,7 @@
size_t linelen;
if (f == NULL)
- return;
+ return FALSE;
linelen = 256;
line = xmalloc (linelen);
@@ -691,6 +753,7 @@
while (! feof (f));
free (line);
fclose (f);
+ return TRUE;
}
static bfd_boolean
@@ -705,11 +768,17 @@
char *tmppath;
struct gld${EMULATION_NAME}_ld_so_conf info;
- tmppath = concat (ld_sysroot, "/etc/ld.so.conf", NULL);
info.path = NULL;
info.len = info.alloc = 0;
- gld${EMULATION_NAME}_parse_ld_so_conf (&info, tmppath);
+ tmppath = concat (ld_sysroot, "${prefix}/etc/ld.so.conf", NULL);
+ if (!gld${EMULATION_NAME}_parse_ld_so_conf (&info, tmppath))
+ {
+ free (tmppath);
+ tmppath = concat (ld_sysroot, "/etc/ld.so.conf", NULL);
+ gld${EMULATION_NAME}_parse_ld_so_conf (&info, tmppath);
+ }
free (tmppath);
+
if (info.path)
{
char *d = gld${EMULATION_NAME}_add_sysroot (info.path);
@@ -919,6 +988,26 @@
EOF
fi
+if [ "x${USE_LIBPATH}" = xyes ] ; then
+ case ${target} in
+ *-*-freebsd* | *-*-dragonfly*)
+ cat >>e${EMULATION_NAME}.c <<EOF
+ if (gld${EMULATION_NAME}_check_ld_elf_hints (l->name, force))
+ break;
+EOF
+ # FreeBSD
+ ;;
+
+ *-*-linux-* | *-*-k*bsd*-*)
+ # Linux
+ cat >>e${EMULATION_NAME}.c <<EOF
+ if (gld${EMULATION_NAME}_check_ld_so_conf (l->name, force))
+ break;
+
+EOF
+ ;;
+ esac
+fi
cat >>e${EMULATION_NAME}.c <<EOF
len = strlen (l->name);
for (search = search_head; search != NULL; search = search->next)
@@ -937,17 +1026,6 @@
if (search != NULL)
break;
EOF
-if [ "x${USE_LIBPATH}" = xyes ] ; then
- case ${target} in
- *-*-linux-* | *-*-k*bsd*-*)
- cat >>e${EMULATION_NAME}.c <<EOF
- if (gld${EMULATION_NAME}_check_ld_so_conf (l->name, force))
- break;
-EOF
- # Linux
- ;;
- esac
-fi
cat >>e${EMULATION_NAME}.c <<EOF
}
Modified: branches/binutils/package/ld/emultempl/ia64elf.em
===================================================================
--- branches/binutils/package/ld/emultempl/ia64elf.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/ia64elf.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -32,7 +32,7 @@
static void
gld${EMULATION_NAME}_after_parse (void)
{
- link_info.need_relax_finalize = TRUE;
+ link_info.relax_pass = 2;
bfd_elf${ELFSIZE}_ia64_after_parse (itanium);
}
Modified: branches/binutils/package/ld/emultempl/irix.em
===================================================================
--- branches/binutils/package/ld/emultempl/irix.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/irix.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
# This shell script emits a C file. -*- C -*-
-# Copyright 2004 Free Software Foundation, Inc.
+# Copyright 2004, 2006 Free Software Foundation, Inc.
#
# This file is part of GLD, the Gnu Linker.
#
@@ -32,7 +32,7 @@
irix_after_open (void)
{
if (link_info.shared && command_line.soname == 0)
- command_line.soname = basename (bfd_get_filename (output_bfd));
+ command_line.soname = (char *) lbasename (bfd_get_filename (output_bfd));
gld${EMULATION_NAME}_after_open ();
}
Added: branches/binutils/package/ld/emultempl/vxworks.em
===================================================================
--- branches/binutils/package/ld/emultempl/vxworks.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/vxworks.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,49 @@
+if test -n "$VXWORKS_BASE_EM_FILE" ; then
+. "${srcdir}/emultempl/${VXWORKS_BASE_EM_FILE}.em"
+fi
+
+cat >>e${EMULATION_NAME}.c <<EOF
+
+static int force_dynamic;
+
+static void
+vxworks_after_open (void)
+{
+ ${LDEMUL_AFTER_OPEN-gld${EMULATION_NAME}_after_open} ();
+
+ if (force_dynamic
+ && link_info.input_bfds
+ && !_bfd_elf_link_create_dynamic_sections (link_info.input_bfds,
+ &link_info))
+ einfo ("%X%P: Cannot create dynamic sections %E\n");
+
+ if (!force_dynamic
+ && !link_info.shared
+ && elf_hash_table (&link_info)->dynamic_sections_created)
+ einfo ("%X%P: Dynamic sections created in non-dynamic link\n");
+}
+
+EOF
+
+PARSE_AND_LIST_PROLOGUE=$PARSE_AND_LIST_PROLOGUE'
+enum {
+ OPTION_FORCE_DYNAMIC = 501
+};
+'
+
+PARSE_AND_LIST_LONGOPTS=$PARSE_AND_LIST_LONGOPTS'
+ {"force-dynamic", no_argument, NULL, OPTION_FORCE_DYNAMIC},
+'
+
+PARSE_AND_LIST_OPTIONS=$PARSE_AND_LIST_OPTIONS'
+ fprintf (file, _("\
+ --force-dynamic Always create dynamic sections\n"));
+'
+
+PARSE_AND_LIST_ARGS_CASES=$PARSE_AND_LIST_ARGS_CASES'
+ case OPTION_FORCE_DYNAMIC:
+ force_dynamic = 1;
+ break;
+'
+
+LDEMUL_AFTER_OPEN=vxworks_after_open
Modified: branches/binutils/package/ld/emultempl/xtensaelf.em
===================================================================
--- branches/binutils/package/ld/emultempl/xtensaelf.em 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/emultempl/xtensaelf.em 2006-04-19 08:33:31 UTC (rev 12)
@@ -58,17 +58,6 @@
}
-static bfd_boolean
-elf_xtensa_place_orphan (asection *s)
-{
- /* Early exit for relocatable links. */
- if (link_info.relocatable)
- return FALSE;
-
- return gld${EMULATION_NAME}_place_orphan (s);
-}
-
-
static void
elf_xtensa_before_parse (void)
{
@@ -1728,6 +1717,5 @@
LDEMUL_BEFORE_PARSE=elf_xtensa_before_parse
LDEMUL_AFTER_OPEN=elf_xtensa_after_open
LDEMUL_CHOOSE_TARGET=elf_xtensa_choose_target
-LDEMUL_PLACE_ORPHAN=elf_xtensa_place_orphan
LDEMUL_BEFORE_ALLOCATION=elf_xtensa_before_allocation
Modified: branches/binutils/package/ld/genscripts.sh
===================================================================
--- branches/binutils/package/ld/genscripts.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/genscripts.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,6 +4,7 @@
# Usage: genscripts_extra.sh \
# srcdir \
# libdir \
+# prefix \
# exec_prefix \
# host \
# target \
@@ -22,6 +23,7 @@
# /sources/ld \
# /usr/local/lib \
# /usr/local \
+# /usr/local \
# sparc-sun-sunos4.1.3 \
# sparc-sun-sunos4.1.3 \
# sparc-sun-sunos4.1.3 \
@@ -59,17 +61,18 @@
srcdir=$1
libdir=$2
-exec_prefix=$3
-host=$4
-target=$5
-target_alias=$6
-EMULATION_LIBPATH=$7
-NATIVE_LIB_DIRS=$8
-use_sysroot=$9
+prefix=$3
+exec_prefix=$4
+host=$5
+target=$6
+target_alias=$7
+EMULATION_LIBPATH=$8
+NATIVE_LIB_DIRS=$9
shift 9
-EMULATION_NAME=$1
-TOOL_LIB=$2
-CUSTOMIZER_SCRIPT=$3
+use_sysroot=$1
+EMULATION_NAME=$2
+TOOL_LIB=$3
+CUSTOMIZER_SCRIPT=$4
# Can't use ${TOOL_LIB:-$target_alias} here due to an Ultrix shell bug.
if [ "x${TOOL_LIB}" = "x" ] ; then
Modified: branches/binutils/package/ld/ld.texinfo
===================================================================
--- branches/binutils/package/ld/ld.texinfo 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ld.texinfo 2006-04-19 08:33:31 UTC (rev 12)
@@ -772,6 +772,12 @@
This option is currently only supported on ELF platforms.
+ at kindex --force-dynamic
+ at cindex forcing the creation of dynamic sections
+ at item --force-dynamic
+Force the output file to have dynamic sections. This option is specific
+to VxWorks targets.
+
@cindex partial link
@cindex relocatable output
@kindex -r
@@ -1111,7 +1117,7 @@
@item --check-sections
@itemx --no-check-sections
Asks the linker @emph{not} to check section addresses after they have
-been assigned to see if there any overlaps. Normally the linker will
+been assigned to see if there are any overlaps. Normally the linker will
perform this check, and if it finds any overlaps it will produce
suitable error messages. The linker does know about, and does make
allowances for sections in overlays. The default behaviour can be
@@ -1857,7 +1863,7 @@
@kindex --reduce-memory-overheads
@item --reduce-memory-overheads
This option reduces memory requirements at ld runtime, at the expense of
-linking speed. This was introduced to to select the old O(n^2) algorithm
+linking speed. This was introduced to select the old O(n^2) algorithm
for link map file generation, rather than the new O(n) algorithm which uses
about 40% more memory for symbol storage.
@@ -5581,18 +5587,86 @@
Here is an example of a DEF file for a shared library called @samp{xyz.dll}:
@example
-LIBRARY "xyz.dll" BASE=0x10000000
+LIBRARY "xyz.dll" BASE=0x20000000
EXPORTS
foo
bar
_bar = bar
+another_foo = abc.dll.afoo
+var1 DATA
@end example
-This example defines a base address and three symbols. The third
-symbol is an alias for the second. For the complete format
-specification see ld/deffilep.y in the binutils sources.
+This example defines a DLL with a non-default base address and five
+symbols in the export table. The third exported symbol @code{_bar} is an
+alias for the second. The fourth symbol, @code{another_foo} is resolved
+by "forwarding" to another module and treating it as an alias for
+ at code{afoo} exported from the DLL @samp{abc.dll}. The final symbol
+ at code{var1} is declared to be a data object.
+The optional @code{LIBRARY <name>} command indicates the @emph{internal}
+name of the output DLL. If @samp{<name>} does not include a suffix,
+the default library suffix, @samp{.DLL} is appended.
+
+When the .DEF file is used to build an application. rather than a
+library, the @code{NAME <name>} command shoud be used instead of
+ at code{LIBRARY}. If @samp{<name>} does not include a suffix, the default
+executable suffix, @samp{.EXE} is appended.
+
+With either @code{LIBRARY <name>} or @code{NAME <name>} the optional
+specification @code{BASE = <number>} may be used to specify a
+non-default base address for the image.
+
+If neither @code{LIBRARY <name>} nor @code{NAME <name>} is specified,
+or they specify an empty string, the internal name is the same as the
+filename specified on the command line.
+
+The complete specification of an export symbol is:
+
+ at example
+EXPORTS
+ ( ( ( <name1> [ = <name2> ] )
+ | ( <name1> = <module-name> . <external-name>))
+ [ @@ <integer> ] [NONAME] [DATA] [CONSTANT] [PRIVATE] ) *
+ at end example
+
+Declares @samp{<name1>} as an exported symbol from the DLL, or declares
+ at samp{<name1>} as an exported alias for @samp{<name2>}; or declares
+ at samp{<name1>} as a "forward" alias for the symbol
+ at samp{<external-name>} in the DLL @samp{<module-name>}.
+Optionally, the symbol may be exported by the specified ordinal
+ at samp{<integer>} alias.
+
+The optional keywords that follow the declaration indicate:
+
+ at code{NONAME}: Do not put the symbol name in the DLL's export table. It
+will still be exported by its ordinal alias (either the value specified
+by the .def specification or, otherwise, the value assigned by the
+linker). The symbol name, however, does remain visible in the import
+library (if any), unless @code{PRIVATE} is also specified.
+
+ at code{DATA}: The symbol is a variable or object, rather than a function.
+The import lib will export only an indirect reference to @code{foo} as
+the symbol @code{_imp__foo} (ie, @code{foo} must be resolved as
+ at code{*_imp__foo}).
+
+ at code{CONSTANT}: Like @code{DATA}, but put the undecorated @code{foo} as
+well as @code{_imp__foo} into the import library. Both refer to the
+read-only import address table's pointer to the variable, not to the
+variable itself. This can be dangerous. If the user code fails to add
+the @code{dllimport} attribute and also fails to explicitly add the
+extra indirection that the use of the attribute enforces, the
+application will behave unexpectedly.
+
+ at code{PRIVATE}: Put the symbol in the DLL's export table, but do not put
+it into the static import library used to resolve imports at link time. The
+symbol can still be imported using the @code{LoadLibrary/GetProcAddress}
+API at runtime or by by using the GNU ld extension of linking directly to
+the DLL without an import library.
+
+See ld/deffilep.y in the binutils sources for the full specification of
+other DEF file statements
+
@cindex creating a DEF file
While linking a shared dll, @command{ld} is able to create a DEF file
with the @samp{--output-def <file>} command line option.
Modified: branches/binutils/package/ld/ldcref.c
===================================================================
--- branches/binutils/package/ld/ldcref.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ldcref.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* ldcref.c -- output a cross reference table
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2006
Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian at cygnus.com>
@@ -149,7 +149,8 @@
if (! cref_initialized)
{
- if (! bfd_hash_table_init (&cref_table.root, cref_hash_newfunc))
+ if (!bfd_hash_table_init (&cref_table.root, cref_hash_newfunc,
+ sizeof (struct cref_hash_entry)))
einfo (_("%X%P: bfd_hash_table_init of cref table failed: %E\n"));
cref_initialized = TRUE;
}
Modified: branches/binutils/package/ld/ldlang.c
===================================================================
--- branches/binutils/package/ld/ldlang.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ldlang.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Linker command language support.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005
+ 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GLD, the Gnu Linker.
@@ -81,6 +81,7 @@
static void print_statement_list (lang_statement_union_type *,
lang_output_section_statement_type *);
static void print_statements (void);
+static void print_input_section (asection *);
static bfd_boolean lang_one_common (struct bfd_link_hash_entry *, void *);
static void lang_record_phdrs (void);
static void lang_do_version_exports_section (void);
@@ -912,8 +913,14 @@
(lang_statement_union_type *) &ret->os,
&ret->os.header.next);
- ret->os.prev = &((*lang_output_section_statement.tail)
- ->output_section_statement);
+ /* For every output section statement added to the list, except the
+ first one, lang_output_section_statement.tail points to the "next"
+ field of the last element of the list. */
+ if (lang_output_section_statement.head != NULL)
+ ret->os.prev = (lang_output_section_statement_type *)
+ ((char *) lang_output_section_statement.tail
+ - offsetof (lang_output_section_statement_type, next));
+
/* GCC's strict aliasing rules prevent us from just casting the
address, so we store the pointer in a variable and cast that
instead. */
@@ -927,8 +934,10 @@
static void
output_statement_table_init (void)
{
- if (! bfd_hash_table_init_n (&output_statement_table,
- output_statement_newfunc, 61))
+ if (!bfd_hash_table_init_n (&output_statement_table,
+ output_statement_newfunc,
+ sizeof (struct output_statement_hash_entry),
+ 61))
einfo (_("%P%F: can not create hash table: %E\n"));
}
@@ -968,7 +977,9 @@
of code-complexity here in ld, besides the initialization which just
looks like other code here. */
if (!bfd_hash_table_init_n (&lang_definedness_table,
- lang_definedness_newfunc, 3))
+ lang_definedness_newfunc,
+ sizeof (struct lang_definedness_hash_entry),
+ 3))
einfo (_("%P%F: can not create hash table: %E\n"));
}
@@ -1541,7 +1552,12 @@
/* Do the same for the list of output section statements. */
newly_added_os = *os_tail;
*os_tail = NULL;
+ newly_added_os->prev = (lang_output_section_statement_type *)
+ ((char *) place->os_tail
+ - offsetof (lang_output_section_statement_type, next));
newly_added_os->next = *place->os_tail;
+ if (newly_added_os->next != NULL)
+ newly_added_os->next->prev = newly_added_os;
*place->os_tail = newly_added_os;
place->os_tail = &newly_added_os->next;
@@ -1581,8 +1597,31 @@
lang_map (void)
{
lang_memory_region_type *m;
+ bfd_boolean dis_header_printed = FALSE;
bfd *p;
+ LANG_FOR_EACH_INPUT_STATEMENT (file)
+ {
+ asection *s;
+
+ if ((file->the_bfd->flags & (BFD_LINKER_CREATED | DYNAMIC)) != 0
+ || file->just_syms_flag)
+ continue;
+
+ for (s = file->the_bfd->sections; s != NULL; s = s->next)
+ if (s->output_section == NULL
+ || s->output_section->owner != output_bfd)
+ {
+ if (! dis_header_printed)
+ {
+ fprintf (config.map_file, _("\nDiscarded input sections\n\n"));
+ dis_header_printed = TRUE;
+ }
+
+ print_input_section (s);
+ }
+ }
+
minfo (_("\nMemory Configuration\n\n"));
fprintf (config.map_file, "%-16s %-18s %-18s %s\n",
_("Name"), _("Origin"), _("Length"), _("Attributes"));
@@ -2284,6 +2323,7 @@
lang_statement_list_type *hold;
bfd_boolean bad_load = TRUE;
bfd_boolean save_ldlang_sysrooted_script;
+ bfd_boolean save_as_needed, save_add_needed;
err = bfd_get_error ();
@@ -2317,6 +2357,10 @@
stat_ptr = place;
save_ldlang_sysrooted_script = ldlang_sysrooted_script;
ldlang_sysrooted_script = entry->sysrooted;
+ save_as_needed = as_needed;
+ as_needed = entry->as_needed;
+ save_add_needed = add_needed;
+ add_needed = entry->add_needed;
ldfile_assumed_script = TRUE;
parser_input = input_script;
@@ -2327,6 +2371,8 @@
ldfile_assumed_script = FALSE;
ldlang_sysrooted_script = save_ldlang_sysrooted_script;
+ as_needed = save_as_needed;
+ add_needed = save_add_needed;
stat_ptr = hold;
return ! bad_load;
@@ -3460,13 +3506,12 @@
/* Print information about an input section to the map file. */
static void
-print_input_section (lang_input_section_type *in)
+print_input_section (asection *i)
{
- asection *i = in->section;
bfd_size_type size = i->size;
init_opb ();
- if (size != 0)
+
{
int len;
bfd_vma addr;
@@ -3486,7 +3531,7 @@
++len;
}
- if (i->output_section != NULL && (i->flags & SEC_EXCLUDE) == 0)
+ if (i->output_section != NULL && i->output_section->owner == output_bfd)
addr = i->output_section->vma + i->output_offset;
else
{
@@ -3513,7 +3558,7 @@
minfo (_("%W (size before relaxing)\n"), i->rawsize);
}
- if (i->output_section != NULL && (i->flags & SEC_EXCLUDE) == 0)
+ if (i->output_section != NULL && i->output_section->owner == output_bfd)
{
if (command_line.reduce_memory_overheads)
bfd_link_hash_traverse (link_info.hash, print_one_symbol, i);
@@ -3782,7 +3827,7 @@
print_reloc_statement (&s->reloc_statement);
break;
case lang_input_section_enum:
- print_input_section (&s->input_section);
+ print_input_section (s->input_section.section);
break;
case lang_padding_statement_enum:
print_padding_statement (&s->padding_statement);
@@ -5373,6 +5418,37 @@
bfd_gc_sections (output_bfd, &link_info);
}
+/* Relax all sections until bfd_relax_section gives up. */
+
+static void
+relax_sections (void)
+{
+ /* Keep relaxing until bfd_relax_section gives up. */
+ bfd_boolean relax_again;
+
+ do
+ {
+ relax_again = FALSE;
+
+ /* Note: pe-dll.c does something like this also. If you find
+ you need to change this code, you probably need to change
+ pe-dll.c also. DJ */
+
+ /* Do all the assignments with our current guesses as to
+ section sizes. */
+ lang_do_assignments ();
+
+ /* We must do this after lang_do_assignments, because it uses
+ size. */
+ lang_reset_memory_regions ();
+
+ /* Perform another relax pass - this time we know where the
+ globals are, so can make a better guess. */
+ lang_size_sections (&relax_again, FALSE);
+ }
+ while (relax_again);
+}
+
void
lang_process (void)
{
@@ -5469,38 +5545,17 @@
/* Now run around and relax if we can. */
if (command_line.relax)
{
- /* Keep relaxing until bfd_relax_section gives up. */
- bfd_boolean relax_again;
+ /* We may need more than one relaxation pass. */
+ int i = link_info.relax_pass;
- do
+ /* The backend can use it to determine the current pass. */
+ link_info.relax_pass = 0;
+
+ while (i--)
{
- relax_again = FALSE;
-
- /* Note: pe-dll.c does something like this also. If you find
- you need to change this code, you probably need to change
- pe-dll.c also. DJ */
-
- /* Do all the assignments with our current guesses as to
- section sizes. */
- lang_do_assignments ();
-
- /* We must do this after lang_do_assignments, because it uses
- size. */
- lang_reset_memory_regions ();
-
- /* Perform another relax pass - this time we know where the
- globals are, so can make a better guess. */
- lang_size_sections (&relax_again, FALSE);
-
- /* If the normal relax is done and the relax finalize pass
- is not performed yet, we perform another relax pass. */
- if (!relax_again && link_info.need_relax_finalize)
- {
- link_info.need_relax_finalize = FALSE;
- relax_again = TRUE;
- }
+ relax_sections ();
+ link_info.relax_pass++;
}
- while (relax_again);
/* Final extra sizing to report errors. */
lang_do_assignments ();
Modified: branches/binutils/package/ld/ldmain.c
===================================================================
--- branches/binutils/package/ld/ldmain.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ldmain.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Main program of GNU linker.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005
+ 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Steve Chamberlain steve at cygnus.com
@@ -313,7 +313,7 @@
link_info.spare_dynamic_tags = 5;
link_info.flags = 0;
link_info.flags_1 = 0;
- link_info.need_relax_finalize = FALSE;
+ link_info.relax_pass = 1;
link_info.warn_shared_textrel = FALSE;
link_info.gc_sections = FALSE;
@@ -777,9 +777,10 @@
if (link_info.notice_hash == NULL)
{
link_info.notice_hash = xmalloc (sizeof (struct bfd_hash_table));
- if (! bfd_hash_table_init_n (link_info.notice_hash,
- bfd_hash_newfunc,
- 61))
+ if (!bfd_hash_table_init_n (link_info.notice_hash,
+ bfd_hash_newfunc,
+ sizeof (struct bfd_hash_entry),
+ 61))
einfo (_("%P%F: bfd_hash_table_init failed: %E\n"));
}
@@ -795,9 +796,10 @@
if (link_info.wrap_hash == NULL)
{
link_info.wrap_hash = xmalloc (sizeof (struct bfd_hash_table));
- if (! bfd_hash_table_init_n (link_info.wrap_hash,
- bfd_hash_newfunc,
- 61))
+ if (!bfd_hash_table_init_n (link_info.wrap_hash,
+ bfd_hash_newfunc,
+ sizeof (struct bfd_hash_entry),
+ 61))
einfo (_("%P%F: bfd_hash_table_init failed: %E\n"));
}
@@ -827,7 +829,8 @@
}
link_info.keep_hash = xmalloc (sizeof (struct bfd_hash_table));
- if (! bfd_hash_table_init (link_info.keep_hash, bfd_hash_newfunc))
+ if (!bfd_hash_table_init (link_info.keep_hash, bfd_hash_newfunc,
+ sizeof (struct bfd_hash_entry)))
einfo (_("%P%F: bfd_hash_table_init failed: %E\n"));
bufsize = 100;
@@ -1326,7 +1329,8 @@
if (hash == NULL)
{
hash = xmalloc (sizeof (struct bfd_hash_table));
- if (! bfd_hash_table_init (hash, bfd_hash_newfunc))
+ if (!bfd_hash_table_init (hash, bfd_hash_newfunc,
+ sizeof (struct bfd_hash_entry)))
einfo (_("%F%P: bfd_hash_table_init failed: %E\n"));
}
Modified: branches/binutils/package/ld/ldmisc.c
===================================================================
--- branches/binutils/package/ld/ldmisc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/ldmisc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* ldmisc.c
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005
+ 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Steve Chamberlain of Cygnus Support.
@@ -337,7 +337,7 @@
&& strcmp (last_file, filename) != 0)
|| strcmp (last_function, functionname) != 0)
{
- lfinfo (fp, _("%B: In function `%T'"),
+ lfinfo (fp, _("%B: In function `%T':\n"),
abfd, functionname);
last_bfd = abfd;
@@ -353,20 +353,17 @@
discard_last = FALSE;
}
else
- lfinfo (fp, "%B", abfd);
+ lfinfo (fp, "%B:", abfd);
if (filename != NULL)
- fprintf (fp, ":%s", filename);
+ fprintf (fp, "%s:", filename);
if (functionname != NULL && fmt[-1] == 'G')
- lfinfo (fp, ":%T", functionname);
- else if (filename != NULL)
- {
- if (linenumber != 0)
- fprintf (fp, ":%u", linenumber);
- else
- lfinfo (fp, ":(%A+0x%v)", section, offset);
- }
+ lfinfo (fp, "%T", functionname);
+ else if (filename != NULL && linenumber != 0)
+ fprintf (fp, "%u", linenumber);
+ else
+ lfinfo (fp, "(%A+0x%v)", section, offset);
}
else
lfinfo (fp, "%B:(%A+0x%v)", abfd, section, offset);
Modified: branches/binutils/package/ld/pe-dll.c
===================================================================
--- branches/binutils/package/ld/pe-dll.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/pe-dll.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -596,8 +596,13 @@
have. */
int lead_at = (*pe_def_file->exports[i].name == '@');
char *tmp = xstrdup (pe_def_file->exports[i].name + lead_at);
+ char *tmp_at = strchr (tmp, '@');
- *(strchr (tmp, '@')) = 0;
+ if (tmp_at)
+ *tmp_at = 0;
+ else
+ einfo (_("%XCannot export %s: invalid export name\n"),
+ pe_def_file->exports[i].name);
pe_def_file->exports[i].name = tmp;
}
}
@@ -680,6 +685,27 @@
{
char *name;
+ /* Check for forward exports */
+ if (strchr (pe_def_file->exports[i].internal_name, '.'))
+ {
+ count_exported++;
+ if (!pe_def_file->exports[i].flag_noname)
+ count_exported_byname++;
+
+ pe_def_file->exports[i].flag_forward = 1;
+
+ if (pe_def_file->exports[i].ordinal != -1)
+ {
+ if (max_ordinal < pe_def_file->exports[i].ordinal)
+ max_ordinal = pe_def_file->exports[i].ordinal;
+ if (min_ordinal > pe_def_file->exports[i].ordinal)
+ min_ordinal = pe_def_file->exports[i].ordinal;
+ count_with_ordinals++;
+ }
+
+ continue;
+ }
+
name = xmalloc (strlen (pe_def_file->exports[i].internal_name) + 2);
if (pe_details->underscored
&& (*pe_def_file->exports[i].internal_name != '@'))
@@ -837,7 +863,8 @@
/* Now we need to assign ordinals to those that don't have them. */
for (i = 0; i < NE; i++)
{
- if (exported_symbol_sections[i])
+ if (exported_symbol_sections[i] ||
+ pe_def_file->exports[i].flag_forward)
{
if (pe_def_file->exports[i].ordinal != -1)
{
@@ -856,19 +883,26 @@
}
name_table_size += strlen (pe_def_file->exports[i].name) + 1;
}
+
+ /* Reserve space for the forward name. */
+ if (pe_def_file->exports[i].flag_forward)
+ {
+ name_table_size += strlen (pe_def_file->exports[i].internal_name) + 1;
+ }
}
next_ordinal = min_ordinal;
for (i = 0; i < NE; i++)
- if (exported_symbol_sections[i])
- if (pe_def_file->exports[i].ordinal == -1)
- {
- while (exported_symbols[next_ordinal - min_ordinal] != -1)
- next_ordinal++;
+ if ((exported_symbol_sections[i] ||
+ pe_def_file->exports[i].flag_forward) &&
+ pe_def_file->exports[i].ordinal == -1)
+ {
+ while (exported_symbols[next_ordinal - min_ordinal] != -1)
+ next_ordinal++;
- exported_symbols[next_ordinal - min_ordinal] = i;
- pe_def_file->exports[i].ordinal = next_ordinal;
- }
+ exported_symbols[next_ordinal - min_ordinal] = i;
+ pe_def_file->exports[i].ordinal = next_ordinal;
+ }
/* OK, now we can allocate some memory. */
edata_sz = (40 /* directory */
@@ -967,16 +1001,29 @@
for (s = 0; s < NE; s++)
{
struct bfd_section *ssec = exported_symbol_sections[s];
- if (ssec && pe_def_file->exports[s].ordinal != -1)
+ if (pe_def_file->exports[s].ordinal != -1 &&
+ (pe_def_file->exports[s].flag_forward || ssec != NULL))
{
- unsigned long srva = (exported_symbol_offsets[s]
- + ssec->output_section->vma
- + ssec->output_offset);
int ord = pe_def_file->exports[s].ordinal;
- bfd_put_32 (abfd, srva - image_base,
- eaddresses + 4 * (ord - min_ordinal));
+ if (pe_def_file->exports[s].flag_forward)
+ {
+ bfd_put_32 (abfd, ERVA (enamestr),
+ eaddresses + 4 * (ord - min_ordinal));
+ strcpy (enamestr, pe_def_file->exports[s].internal_name);
+ enamestr += strlen (pe_def_file->exports[s].internal_name) + 1;
+ }
+ else
+ {
+ unsigned long srva = (exported_symbol_offsets[s]
+ + ssec->output_section->vma
+ + ssec->output_offset);
+
+ bfd_put_32 (abfd, srva - image_base,
+ eaddresses + 4 * (ord - min_ordinal));
+ }
+
if (!pe_def_file->exports[s].flag_noname)
{
char *ename = pe_def_file->exports[s].name;
@@ -2237,8 +2284,8 @@
}
/* xgettext:c-format */
- einfo (_("Creating library file: %s\n"), impfilename);
-
+ info_msg (_("Creating library file: %s\n"), impfilename);
+
bfd_set_format (outarch, bfd_archive);
outarch->has_armap = 1;
Modified: branches/binutils/package/ld/po/Make-in
===================================================================
--- branches/binutils/package/ld/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright 2003 Free Software Foundation, Inc.
+# Copyright 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -110,6 +110,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -185,7 +186,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Modified: branches/binutils/package/ld/po/ld.pot
===================================================================
--- branches/binutils/package/ld/po/ld.pot 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/po/ld.pot 2006-04-19 08:33:31 UTC (rev 12)
@@ -8,7 +8,7 @@
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2005-10-24 11:45+0930\n"
+"POT-Creation-Date: 2006-03-25 18:36+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL at ADDRESS>\n"
"Language-Team: LANGUAGE <LL at li.org>\n"
@@ -333,20 +333,20 @@
msgid "Errors encountered processing file %s for interworking"
msgstr ""
-#: emultempl/pe.em:1345 ldexp.c:522 ldlang.c:2928 ldlang.c:5785 ldlang.c:5816
-#: ldmain.c:1164
+#: emultempl/pe.em:1345 ldexp.c:522 ldlang.c:2946 ldlang.c:5800 ldlang.c:5831
+#: ldmain.c:1167
msgid "%P%F: bfd_link_hash_lookup failed: %E\n"
msgstr ""
-#: ldcref.c:153
+#: ldcref.c:154
msgid "%X%P: bfd_hash_table_init of cref table failed: %E\n"
msgstr ""
-#: ldcref.c:159
+#: ldcref.c:160
msgid "%X%P: cref_hash_lookup failed: %E\n"
msgstr ""
-#: ldcref.c:225
+#: ldcref.c:226
#, c-format
msgid ""
"\n"
@@ -354,33 +354,33 @@
"\n"
msgstr ""
-#: ldcref.c:226
+#: ldcref.c:227
msgid "Symbol"
msgstr ""
-#: ldcref.c:234
+#: ldcref.c:235
#, c-format
msgid "File\n"
msgstr ""
-#: ldcref.c:238
+#: ldcref.c:239
#, c-format
msgid "No symbols\n"
msgstr ""
-#: ldcref.c:359 ldcref.c:481
+#: ldcref.c:360 ldcref.c:482
msgid "%B%F: could not read symbols; %E\n"
msgstr ""
-#: ldcref.c:363 ldcref.c:485 ldmain.c:1229 ldmain.c:1233
+#: ldcref.c:364 ldcref.c:486 ldmain.c:1232 ldmain.c:1236
msgid "%B%F: could not read symbols: %E\n"
msgstr ""
-#: ldcref.c:414
+#: ldcref.c:415
msgid "%P: symbol `%T' missing from main hash table\n"
msgstr ""
-#: ldcref.c:556 ldcref.c:563 ldmain.c:1276 ldmain.c:1283
+#: ldcref.c:557 ldcref.c:564 ldmain.c:1279 ldmain.c:1286
msgid "%B%F: could not read relocs: %E\n"
msgstr ""
@@ -388,7 +388,7 @@
#. in OUTSECNAME. This reloc is from a section which is
#. mapped into a section from which references to OUTSECNAME
#. are prohibited. We must report an error.
-#: ldcref.c:590
+#: ldcref.c:591
msgid "%X%C: prohibited cross reference from %s to `%T' in %s\n"
msgstr ""
@@ -482,16 +482,16 @@
msgid "%F%S cannot move location counter backwards (from %V to %V)\n"
msgstr ""
-#: ldexp.c:750
+#: ldexp.c:748
msgid "%P%F:%s: hash creation failed\n"
msgstr ""
-#: ldexp.c:1002 ldexp.c:1027
+#: ldexp.c:1000 ldexp.c:1025
#, c-format
msgid "%F%S nonconstant expression for %s\n"
msgstr ""
-#: ldexp.c:1084
+#: ldexp.c:1082
#, c-format
msgid "%F%S non constant expression for %s\n"
msgstr ""
@@ -552,50 +552,46 @@
msgid "%P%F: cannot represent machine `%s'\n"
msgstr ""
-#: ldlang.c:901 ldlang.c:5388
-msgid "%P%F: Failed to create hash table\n"
+#: ldlang.c:940 ldlang.c:982 ldlang.c:2695
+msgid "%P%F: can not create hash table: %E\n"
msgstr ""
-#: ldlang.c:941
-msgid "%P%F: out of memory during initialization"
-msgstr ""
-
-#: ldlang.c:984
+#: ldlang.c:1025
msgid "%P:%S: warning: redeclaration of memory region '%s'\n"
msgstr ""
-#: ldlang.c:990
+#: ldlang.c:1031
msgid "%P:%S: warning: memory region %s not declared\n"
msgstr ""
-#: ldlang.c:1107
-msgid "%P%F: bfd_hash_lookup failed creating section `%s'\n"
+#: ldlang.c:1108 ldlang.c:1135
+msgid "%P%F: failed creating section `%s': %E\n"
msgstr ""
-#: ldlang.c:1575
+#: ldlang.c:1601
msgid ""
"\n"
"Memory Configuration\n"
"\n"
msgstr ""
-#: ldlang.c:1577
+#: ldlang.c:1603
msgid "Name"
msgstr ""
-#: ldlang.c:1577
+#: ldlang.c:1603
msgid "Origin"
msgstr ""
-#: ldlang.c:1577
+#: ldlang.c:1603
msgid "Length"
msgstr ""
-#: ldlang.c:1577
+#: ldlang.c:1603
msgid "Attributes"
msgstr ""
-#: ldlang.c:1617
+#: ldlang.c:1643
#, c-format
msgid ""
"\n"
@@ -603,217 +599,217 @@
"\n"
msgstr ""
-#: ldlang.c:1683
+#: ldlang.c:1709
msgid "%P%F: Illegal use of `%s' section\n"
msgstr ""
-#: ldlang.c:1690
+#: ldlang.c:1716
msgid "%P%F: output format %s cannot represent section called %s\n"
msgstr ""
-#: ldlang.c:2295
+#: ldlang.c:2313
msgid "%B: file not recognized: %E\n"
msgstr ""
-#: ldlang.c:2296
+#: ldlang.c:2314
msgid "%B: matching formats:"
msgstr ""
-#: ldlang.c:2303
+#: ldlang.c:2321
msgid "%F%B: file not recognized: %E\n"
msgstr ""
-#: ldlang.c:2367
+#: ldlang.c:2385
msgid "%F%B: member %B in archive is not an object\n"
msgstr ""
-#: ldlang.c:2378 ldlang.c:2392
+#: ldlang.c:2396 ldlang.c:2410
msgid "%F%B: could not read symbols: %E\n"
msgstr ""
-#: ldlang.c:2647
+#: ldlang.c:2665
msgid ""
"%P: warning: could not find any targets that match endianness requirement\n"
msgstr ""
-#: ldlang.c:2661
+#: ldlang.c:2679
msgid "%P%F: target %s not found\n"
msgstr ""
-#: ldlang.c:2663
+#: ldlang.c:2681
msgid "%P%F: cannot open output file %s: %E\n"
msgstr ""
-#: ldlang.c:2669
+#: ldlang.c:2687
msgid "%P%F:%s: can not make object file: %E\n"
msgstr ""
-#: ldlang.c:2673
+#: ldlang.c:2691
msgid "%P%F:%s: can not set architecture: %E\n"
msgstr ""
-#: ldlang.c:2677
-msgid "%P%F: can not create link hash table: %E\n"
-msgstr ""
-
-#: ldlang.c:2821
+#: ldlang.c:2839
msgid "%P%F: bfd_hash_lookup failed creating symbol %s\n"
msgstr ""
-#: ldlang.c:2839
+#: ldlang.c:2857
msgid "%P%F: bfd_hash_allocate failed creating symbol %s\n"
msgstr ""
-#: ldlang.c:3270
+#: ldlang.c:3288
msgid " load address 0x%V"
msgstr ""
-#: ldlang.c:3510
+#: ldlang.c:3528
msgid "%W (size before relaxing)\n"
msgstr ""
-#: ldlang.c:3597
+#: ldlang.c:3615
#, c-format
msgid "Address of section %s set to "
msgstr ""
-#: ldlang.c:3750
+#: ldlang.c:3768
#, c-format
msgid "Fail with %d\n"
msgstr ""
-#: ldlang.c:4021
+#: ldlang.c:4040
msgid "%X%P: section %s [%V -> %V] overlaps section %s [%V -> %V]\n"
msgstr ""
-#: ldlang.c:4046
+#: ldlang.c:4065
msgid "%X%P: address 0x%v of %B section %s is not within region %s\n"
msgstr ""
-#: ldlang.c:4055
+#: ldlang.c:4074
msgid "%X%P: region %s is full (%B section %s)\n"
msgstr ""
-#: ldlang.c:4095
+#: ldlang.c:4114
#, c-format
msgid ""
"%F%S: non constant or forward reference address expression for section %s\n"
msgstr ""
-#: ldlang.c:4120
+#: ldlang.c:4139
msgid "%P%X: Internal error on COFF shared library section %s\n"
msgstr ""
-#: ldlang.c:4176
+#: ldlang.c:4197
msgid "%P%F: error: no memory region specified for loadable section `%s'\n"
msgstr ""
-#: ldlang.c:4181
+#: ldlang.c:4202
msgid "%P: warning: no memory region specified for loadable section `%s'\n"
msgstr ""
-#: ldlang.c:4198
+#: ldlang.c:4224
msgid "%P: warning: changing start of section %s by %lu bytes\n"
msgstr ""
-#: ldlang.c:4369
+#: ldlang.c:4388
msgid "%P%F: can't relax section: %E\n"
msgstr ""
-#: ldlang.c:4617
+#: ldlang.c:4636
msgid "%F%P: invalid data statement\n"
msgstr ""
-#: ldlang.c:4650
+#: ldlang.c:4669
msgid "%F%P: invalid reloc statement\n"
msgstr ""
-#: ldlang.c:4783
+#: ldlang.c:4802
msgid "%P%F:%s: can't set start address\n"
msgstr ""
-#: ldlang.c:4796 ldlang.c:4815
+#: ldlang.c:4815 ldlang.c:4834
msgid "%P%F: can't set start address\n"
msgstr ""
-#: ldlang.c:4808
+#: ldlang.c:4827
msgid "%P: warning: cannot find entry symbol %s; defaulting to %V\n"
msgstr ""
-#: ldlang.c:4820
+#: ldlang.c:4839
msgid "%P: warning: cannot find entry symbol %s; not setting start address\n"
msgstr ""
-#: ldlang.c:4869
+#: ldlang.c:4888
msgid ""
"%P%F: Relocatable linking with relocations from format %s (%B) to format %s "
"(%B) is not supported\n"
msgstr ""
-#: ldlang.c:4879
+#: ldlang.c:4898
msgid ""
"%P: warning: %s architecture of input file `%B' is incompatible with %s "
"output\n"
msgstr ""
-#: ldlang.c:4901
+#: ldlang.c:4920
msgid "%P%X: failed to merge target specific data of file %B\n"
msgstr ""
-#: ldlang.c:4985
+#: ldlang.c:5004
msgid ""
"\n"
"Allocating common symbols\n"
msgstr ""
-#: ldlang.c:4986
+#: ldlang.c:5005
msgid ""
"Common symbol size file\n"
"\n"
msgstr ""
-#: ldlang.c:5112
+#: ldlang.c:5131
msgid "%P%F: invalid syntax in flags\n"
msgstr ""
-#: ldlang.c:5707
+#: ldlang.c:5406
+msgid "%P%F: Failed to create hash table\n"
+msgstr ""
+
+#: ldlang.c:5722
msgid "%P%F: multiple STARTUP files\n"
msgstr ""
-#: ldlang.c:5755
+#: ldlang.c:5770
msgid "%X%P:%S: section has both a load address and a load region\n"
msgstr ""
-#: ldlang.c:5992
+#: ldlang.c:6007
msgid "%F%P: bfd_record_phdr failed: %E\n"
msgstr ""
-#: ldlang.c:6012
+#: ldlang.c:6027
msgid "%X%P: section `%s' assigned to non-existent phdr `%s'\n"
msgstr ""
-#: ldlang.c:6403
+#: ldlang.c:6418
msgid "%X%P: unknown language `%s' in version information\n"
msgstr ""
-#: ldlang.c:6545
+#: ldlang.c:6560
msgid ""
"%X%P: anonymous version tag cannot be combined with other version tags\n"
msgstr ""
-#: ldlang.c:6554
+#: ldlang.c:6569
msgid "%X%P: duplicate version tag `%s'\n"
msgstr ""
-#: ldlang.c:6574 ldlang.c:6583 ldlang.c:6600 ldlang.c:6610
+#: ldlang.c:6589 ldlang.c:6598 ldlang.c:6615 ldlang.c:6625
msgid "%X%P: duplicate expression `%s' in version information\n"
msgstr ""
-#: ldlang.c:6650
+#: ldlang.c:6665
msgid "%X%P: unable to find version dependency `%s'\n"
msgstr ""
-#: ldlang.c:6672
+#: ldlang.c:6687
msgid "%X%P: unable to read .exports section contents\n"
msgstr ""
@@ -877,7 +873,7 @@
msgid "%P: Error writing file `%s'\n"
msgstr ""
-#: ldmain.c:535 pe-dll.c:1447
+#: ldmain.c:535 pe-dll.c:1494
#, c-format
msgid "%P: Error closing file `%s'\n"
msgstr ""
@@ -896,196 +892,196 @@
msgid "%P%F: missing argument to -m\n"
msgstr ""
-#: ldmain.c:783 ldmain.c:801 ldmain.c:831
+#: ldmain.c:784 ldmain.c:803 ldmain.c:834
msgid "%P%F: bfd_hash_table_init failed: %E\n"
msgstr ""
-#: ldmain.c:787 ldmain.c:805
+#: ldmain.c:788 ldmain.c:807
msgid "%P%F: bfd_hash_lookup failed: %E\n"
msgstr ""
-#: ldmain.c:819
+#: ldmain.c:821
msgid "%X%P: error: duplicate retain-symbols-file\n"
msgstr ""
-#: ldmain.c:861
+#: ldmain.c:864
msgid "%P%F: bfd_hash_lookup for insertion failed: %E\n"
msgstr ""
-#: ldmain.c:866
+#: ldmain.c:869
msgid "%P: `-retain-symbols-file' overrides `-s' and `-S'\n"
msgstr ""
-#: ldmain.c:941
+#: ldmain.c:944
#, c-format
msgid ""
"Archive member included because of file (symbol)\n"
"\n"
msgstr ""
-#: ldmain.c:1011
+#: ldmain.c:1014
msgid "%X%C: multiple definition of `%T'\n"
msgstr ""
-#: ldmain.c:1014
+#: ldmain.c:1017
msgid "%D: first defined here\n"
msgstr ""
-#: ldmain.c:1018
+#: ldmain.c:1021
msgid "%P: Disabling relaxation: it will not work with multiple definitions\n"
msgstr ""
-#: ldmain.c:1048
+#: ldmain.c:1051
msgid "%B: warning: definition of `%T' overriding common\n"
msgstr ""
-#: ldmain.c:1051
+#: ldmain.c:1054
msgid "%B: warning: common is here\n"
msgstr ""
-#: ldmain.c:1058
+#: ldmain.c:1061
msgid "%B: warning: common of `%T' overridden by definition\n"
msgstr ""
-#: ldmain.c:1061
+#: ldmain.c:1064
msgid "%B: warning: defined here\n"
msgstr ""
-#: ldmain.c:1068
+#: ldmain.c:1071
msgid "%B: warning: common of `%T' overridden by larger common\n"
msgstr ""
-#: ldmain.c:1071
+#: ldmain.c:1074
msgid "%B: warning: larger common is here\n"
msgstr ""
-#: ldmain.c:1075
+#: ldmain.c:1078
msgid "%B: warning: common of `%T' overriding smaller common\n"
msgstr ""
-#: ldmain.c:1078
+#: ldmain.c:1081
msgid "%B: warning: smaller common is here\n"
msgstr ""
-#: ldmain.c:1082
+#: ldmain.c:1085
msgid "%B: warning: multiple common of `%T'\n"
msgstr ""
-#: ldmain.c:1084
+#: ldmain.c:1087
msgid "%B: warning: previous common is here\n"
msgstr ""
-#: ldmain.c:1104 ldmain.c:1142
+#: ldmain.c:1107 ldmain.c:1145
msgid "%P: warning: global constructor %s used\n"
msgstr ""
-#: ldmain.c:1152
+#: ldmain.c:1155
msgid "%P%F: BFD backend error: BFD_RELOC_CTOR unsupported\n"
msgstr ""
#. We found a reloc for the symbol we are looking for.
-#: ldmain.c:1206 ldmain.c:1208 ldmain.c:1210 ldmain.c:1248 ldmain.c:1296
+#: ldmain.c:1209 ldmain.c:1211 ldmain.c:1213 ldmain.c:1251 ldmain.c:1299
msgid "warning: "
msgstr ""
-#: ldmain.c:1330
+#: ldmain.c:1334
msgid "%F%P: bfd_hash_table_init failed: %E\n"
msgstr ""
-#: ldmain.c:1337
+#: ldmain.c:1341
msgid "%F%P: bfd_hash_lookup failed: %E\n"
msgstr ""
-#: ldmain.c:1358
+#: ldmain.c:1362
msgid "%X%C: undefined reference to `%T'\n"
msgstr ""
-#: ldmain.c:1361
+#: ldmain.c:1365
msgid "%C: warning: undefined reference to `%T'\n"
msgstr ""
-#: ldmain.c:1367
+#: ldmain.c:1371
msgid "%X%D: more undefined references to `%T' follow\n"
msgstr ""
-#: ldmain.c:1370
+#: ldmain.c:1374
msgid "%D: warning: more undefined references to `%T' follow\n"
msgstr ""
-#: ldmain.c:1381
+#: ldmain.c:1385
msgid "%X%B: undefined reference to `%T'\n"
msgstr ""
-#: ldmain.c:1384
+#: ldmain.c:1388
msgid "%B: warning: undefined reference to `%T'\n"
msgstr ""
-#: ldmain.c:1390
+#: ldmain.c:1394
msgid "%X%B: more undefined references to `%T' follow\n"
msgstr ""
-#: ldmain.c:1393
+#: ldmain.c:1397
msgid "%B: warning: more undefined references to `%T' follow\n"
msgstr ""
-#: ldmain.c:1432
+#: ldmain.c:1436
msgid " additional relocation overflows omitted from the output\n"
msgstr ""
-#: ldmain.c:1445
+#: ldmain.c:1449
msgid " relocation truncated to fit: %s against undefined symbol `%T'"
msgstr ""
-#: ldmain.c:1450
+#: ldmain.c:1454
msgid ""
" relocation truncated to fit: %s against symbol `%T' defined in %A section "
"in %B"
msgstr ""
-#: ldmain.c:1462
+#: ldmain.c:1466
msgid " relocation truncated to fit: %s against `%T'"
msgstr ""
-#: ldmain.c:1479
+#: ldmain.c:1483
#, c-format
msgid "%X%C: dangerous relocation: %s\n"
msgstr ""
-#: ldmain.c:1494
+#: ldmain.c:1498
msgid "%X%C: reloc refers to symbol `%T' which is not being output\n"
msgstr ""
-#: ldmisc.c:149
+#: ldmisc.c:147
#, c-format
msgid "no symbol"
msgstr ""
-#: ldmisc.c:240
+#: ldmisc.c:238
#, c-format
msgid "built in linker script:%u"
msgstr ""
-#: ldmisc.c:296 ldmisc.c:300
+#: ldmisc.c:294 ldmisc.c:298
msgid "%B%F: could not read symbols\n"
msgstr ""
-#: ldmisc.c:342
+#: ldmisc.c:340
msgid "%B: In function `%T'"
msgstr ""
-#: ldmisc.c:493
+#: ldmisc.c:510
msgid "%F%P: internal error %s %d\n"
msgstr ""
-#: ldmisc.c:539
+#: ldmisc.c:556
msgid "%P: internal error: aborting at %s line %d in %s\n"
msgstr ""
-#: ldmisc.c:542
+#: ldmisc.c:559
msgid "%P: internal error: aborting at %s line %d\n"
msgstr ""
-#: ldmisc.c:544
+#: ldmisc.c:561
msgid "%P%F: please report this bug\n"
msgstr ""
@@ -1116,20 +1112,20 @@
msgid "%P%F: bfd_new_link_order failed\n"
msgstr ""
-#: ldwrite.c:341
+#: ldwrite.c:344
msgid "%F%P: cannot create split section name for %s\n"
msgstr ""
-#: ldwrite.c:353
+#: ldwrite.c:356
msgid "%F%P: clone section failed: %E\n"
msgstr ""
-#: ldwrite.c:391
+#: ldwrite.c:394
#, c-format
msgid "%8x something else\n"
msgstr ""
-#: ldwrite.c:561
+#: ldwrite.c:564
msgid "%F%P: final link failed: %E\n"
msgstr ""
@@ -1802,34 +1798,44 @@
msgid "%P%F: invalid hex number `%s'\n"
msgstr ""
-#: lexsup.c:1446
+#: lexsup.c:1447
#, c-format
msgid "Usage: %s [options] file...\n"
msgstr ""
-#: lexsup.c:1448
+#: lexsup.c:1449
#, c-format
msgid "Options:\n"
msgstr ""
+#: lexsup.c:1527
+#, c-format
+msgid " @FILE"
+msgstr ""
+
+#: lexsup.c:1530
+#, c-format
+msgid "Read options from FILE\n"
+msgstr ""
+
#. Note: Various tools (such as libtool) depend upon the
#. format of the listings below - do not change them.
-#: lexsup.c:1531
+#: lexsup.c:1535
#, c-format
msgid "%s: supported targets:"
msgstr ""
-#: lexsup.c:1539
+#: lexsup.c:1543
#, c-format
msgid "%s: supported emulations: "
msgstr ""
-#: lexsup.c:1544
+#: lexsup.c:1548
#, c-format
msgid "%s: emulation specific options:\n"
msgstr ""
-#: lexsup.c:1548
+#: lexsup.c:1552
#, c-format
msgid "Report bugs to %s\n"
msgstr ""
@@ -1843,63 +1849,68 @@
msgid "%XUnsupported PEI architecture: %s\n"
msgstr ""
-#: pe-dll.c:652
+#: pe-dll.c:604
#, c-format
+msgid "%XCannot export %s: invalid export name\n"
+msgstr ""
+
+#: pe-dll.c:657
+#, c-format
msgid "%XError, duplicate EXPORT with ordinals: %s (%d vs %d)\n"
msgstr ""
-#: pe-dll.c:659
+#: pe-dll.c:664
#, c-format
msgid "Warning, duplicate EXPORT: %s\n"
msgstr ""
-#: pe-dll.c:725
+#: pe-dll.c:751
#, c-format
msgid "%XCannot export %s: symbol not defined\n"
msgstr ""
-#: pe-dll.c:731
+#: pe-dll.c:757
#, c-format
msgid "%XCannot export %s: symbol wrong type (%d vs %d)\n"
msgstr ""
-#: pe-dll.c:738
+#: pe-dll.c:764
#, c-format
msgid "%XCannot export %s: symbol not found\n"
msgstr ""
-#: pe-dll.c:850
+#: pe-dll.c:877
#, c-format
msgid "%XError, ordinal used twice: %d (%s vs %s)\n"
msgstr ""
-#: pe-dll.c:1172
+#: pe-dll.c:1219
#, c-format
msgid "%XError: %d-bit reloc in dll\n"
msgstr ""
-#: pe-dll.c:1300
+#: pe-dll.c:1347
#, c-format
msgid "%s: Can't open output def file %s\n"
msgstr ""
-#: pe-dll.c:1443
+#: pe-dll.c:1490
#, c-format
msgid "; no contents available\n"
msgstr ""
-#: pe-dll.c:2205
+#: pe-dll.c:2252
msgid ""
"%C: variable '%T' can't be auto-imported. Please read the documentation for "
"ld's --enable-auto-import for details.\n"
msgstr ""
-#: pe-dll.c:2235
+#: pe-dll.c:2282
#, c-format
msgid "%XCan't open .lib file: %s\n"
msgstr ""
-#: pe-dll.c:2240
+#: pe-dll.c:2287
#, c-format
msgid "Creating library file: %s\n"
msgstr ""
Added: branches/binutils/package/ld/po/vi.po
===================================================================
--- branches/binutils/package/ld/po/vi.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/po/vi.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1944 @@
+# Vietnamese translation for LD.
+# Copyright © 2005 Free Software Foundation, Inc.
+# Clytie Siddall <clytie at riverland.net.au>, 2005.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: ld-2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-03 21:05+1030\n"
+"PO-Revision-Date: 2005-12-24 14:47+1030\n"
+"Last-Translator: Clytie Siddall <clytie at riverland.net.au>\n"
+"Language-Team: Vietnamese <gnomevi-list at lists.sourceforge.net>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"Plural-Forms: nplurals=1; plural=0\n"
+"X-Generator: LocFactoryEditor 1.5.1b\n"
+
+#: emultempl/armcoff.em:72
+#, c-format
+msgid " --support-old-code Support interworking with old code\n"
+msgstr " --support-old-code _Hỗ trợ_ dệt và o với _mã cũ_\n"
+
+#: emultempl/armcoff.em:73
+#, c-format
+msgid " --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"
+msgstr " --thumb-entry=<ký_hiệu> Láºp Ä‘iểm _và o_ là ký hiệu _Hình Nhá»_Thumb nà y\n"
+
+#: emultempl/armcoff.em:121
+#, c-format
+msgid "Errors encountered processing file %s"
+msgstr "Gặp lá»—i khi xá» lý táºp tin %s"
+
+#: emultempl/armcoff.em:188 emultempl/pe.em:1455
+msgid "%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"
+msgstr "%P: cảnh báo: « --thumb-entry %s » Ä‘ang lấy quyá»n cao hÆ¡n « -e %s »\n"
+
+#: emultempl/armcoff.em:193 emultempl/pe.em:1460
+msgid "%P: warning: connot find thumb start symbol %s\n"
+msgstr "%P: warning: connot find thumb start symbol %s\n"
+
+#: emultempl/pe.em:301
+#, c-format
+msgid " --base_file <basefile> Generate a base file for relocatable DLLs\n"
+msgstr ""
+" --base_file <táºp_tinbasefile> Tạo ra má»™t _táºp tin cÆ¡ bản_ choocác ata\n"
+"\t\t\t\t\t\t\tcó thể định vị lạile DLLs\n"
+
+#: emultempl/pe.em:302
+#, c-format
+msgid " --dll Set image base to the default for DLLs\n"
+msgstr " --dll Láºp cÆ¡ bản ảnh là mặc định cho các DLL\n"
+
+#: emultempl/pe.em:303
+#, c-format
+msgid " --file-alignment <size> Set file alignment\n"
+msgstr " --file-alignment <kÃch_cỡ> Láºp cách _canh lá» táºp tin_\n"
+
+#: emultempl/pe.em:304
+#, c-format
+msgid " --heap <size> Set initial size of the heap\n"
+msgstr " --heap <kÃch_cỡ> Láºp kÃch cỡ _miá»n nhá»›_ ban đầu\n"
+
+#: emultempl/pe.em:305
+#, c-format
+msgid " --image-base <address> Set start address of the executable\n"
+msgstr ""
+" --image-base <địa_chỉ> Láºp địa chỉ bắt đầu của ứng dụng chạy được\n"
+"\t\t\t\t\t\t\t\t (_cơ bản ảnh_)\n"
+
+#: emultempl/pe.em:306
+#, c-format
+msgid " --major-image-version <number> Set version number of the executable\n"
+msgstr ""
+" --major-image-version <số> \tLáºp số thứ tá»± _phiên bản_\n"
+"\t\t\t\t\tcủa ứng dụng chạy được (_ảnh lớn_)\n"
+
+#: emultempl/pe.em:307
+#, c-format
+msgid " --major-os-version <number> Set minimum required OS version\n"
+msgstr ""
+" --major-os-version <số> \t\tLáºp số thứ tá»± _phiên bản\n"
+"\t\t\t\thệ Ä‘iá»u hà nh_ tối thiểu cần thiết (_lá»›n_)\n"
+
+#: emultempl/pe.em:308
+#, c-format
+msgid " --major-subsystem-version <number> Set minimum required OS subsystem version\n"
+msgstr ""
+" --major-subsystem-version <số> \t Láºp số thứ tá»± _phiên bản\n"
+"\t\t\t\thệ Ä‘iá»u hà nh con_ tối thiểu cần thiết (_lá»›n_)\n"
+
+#: emultempl/pe.em:309
+#, c-format
+msgid " --minor-image-version <number> Set revision number of the executable\n"
+msgstr ""
+" --minor-image-version <số> \tLáºp số thứ tá»± bản sá»a đổi\n"
+"\tcủa ứng dụng chạy được (_phiên bản ảnh nhá»_)\n"
+
+#: emultempl/pe.em:310
+#, c-format
+msgid " --minor-os-version <number> Set minimum required OS revision\n"
+msgstr ""
+" --minor-os-version <số> \t\tLáºp số thứ tá»± bản sá»a đổi\n"
+"\t\tcủa hệ Ä‘iá»u hà nh cần thiết (_phiên bản hệ Ä‘iá»u hà nh nhá»_)\n"
+
+#: emultempl/pe.em:311
+#, c-format
+msgid " --minor-subsystem-version <number> Set minimum required OS subsystem revision\n"
+msgstr ""
+" --minor-subsystem-version <số> \t Láºp số thứ tá»± bản sá»a đổi\n"
+"\t\tcủa hệ Ä‘iá»u hà nh con cần thiết (_phiên bản hệ Ä‘iá»u hà nh con nhá»_)\n"
+
+#: emultempl/pe.em:312
+#, c-format
+msgid " --section-alignment <size> Set section alignment\n"
+msgstr " --section-alignment <kÃch_cỡ> Láºp cách _canh lá» phần_\n"
+
+#: emultempl/pe.em:313
+#, c-format
+msgid " --stack <size> Set size of the initial stack\n"
+msgstr " --stack <kÃch_cỡ> Láºp kÃch cỡ của _đống_ ban đầu\n"
+
+#: emultempl/pe.em:314
+#, c-format
+msgid " --subsystem <name>[:<version>] Set required OS subsystem [& version]\n"
+msgstr " --subsystem <tên>[:<phiên_bản>] Láºp _hệ Ä‘iá»u hà nh con_ [và phiên bản] cần thiết\n"
+
+#: emultempl/pe.em:315
+#, c-format
+msgid " --support-old-code Support interworking with old code\n"
+msgstr " --support-old-code _Hỗ trợ_ dệt và o với _mã cũ_\n"
+
+#: emultempl/pe.em:316
+#, c-format
+msgid " --thumb-entry=<symbol> Set the entry point to be Thumb <symbol>\n"
+msgstr " --thumb-entry=<ký_hiệu> Láºp Ä‘iểm _và o_ là ký hiệu _Hình Nhá»_ nà y\n"
+
+#: emultempl/pe.em:318
+#, c-format
+msgid " --add-stdcall-alias Export symbols with and without @nn\n"
+msgstr " --add-stdcall-alias Xuất ký hiệu vá»›i và không vá»›i « @nn » (_thêm bà danh gá»i chuẩn_)\n"
+
+#: emultempl/pe.em:319
+#, c-format
+msgid " --disable-stdcall-fixup Don't link _sym to _sym at nn\n"
+msgstr " --disable-stdcall-fixup Äừng liên kết « _sym » đến « _sym at nn » (_tắt sá»a gá»i chuẩn_)\n"
+
+#: emultempl/pe.em:320
+#, c-format
+msgid " --enable-stdcall-fixup Link _sym to _sym at nn without warnings\n"
+msgstr ""
+" --enable-stdcall-fixup Liên kết « _sym » đến « _sym at nn », không có cảnh báo\n"
+" \t\t\t\t\t\t\t(_báºt sá»a gá»i chuẩn_)\n"
+
+#: emultempl/pe.em:321
+#, c-format
+msgid " --exclude-symbols sym,sym,... Exclude symbols from automatic export\n"
+msgstr " --exclude-symbols ký_hiệu,ký_hiệu,... _Loại trừ những ký hiệu_ nà y ra việc xuất tự động\n"
+
+#: emultempl/pe.em:322
+#, c-format
+msgid " --exclude-libs lib,lib,... Exclude libraries from automatic export\n"
+msgstr " --exclude-libs thư_viên,thư_viên,... _Loại trừ những thư viên_ nà y ra việc xuất tự động\n"
+
+#: emultempl/pe.em:323
+#, c-format
+msgid " --export-all-symbols Automatically export all globals to DLL\n"
+msgstr " --export-all-symbols Tá»± Ä‘á»™ng _xuất má»i_ Ä‘iá»u toà n cục và o DLL (_ký hiệu_)\n"
+
+#: emultempl/pe.em:324
+#, c-format
+msgid " --kill-at Remove @nn from exported symbols\n"
+msgstr " --kill-at Gỡ bỠ« @nn » ra những ký hiệu đã xuất (_buộc kết thức tại_)\n"
+
+#: emultempl/pe.em:325
+#, c-format
+msgid " --out-implib <file> Generate import library\n"
+msgstr " --out-implib <táºp_tin> Tạo _ra thÆ° viên nháºp_\n"
+
+#: emultempl/pe.em:326
+#, c-format
+msgid " --output-def <file> Generate a .DEF file for the built DLL\n"
+msgstr " --output-def <táºp_tin> Tạo _ra_ má»™t táºp tin .DEF cho DLL đã xây dụng\n"
+
+#: emultempl/pe.em:327
+#, c-format
+msgid " --warn-duplicate-exports Warn about duplicate exports.\n"
+msgstr " --warn-duplicate-exports _Cảnh báo_ vỠ_việc xuất trùng_ nà o.\n"
+
+#: emultempl/pe.em:328
+#, c-format
+msgid ""
+" --compat-implib Create backward compatible import libs;\n"
+" create __imp_<SYMBOL> as well.\n"
+msgstr ""
+" --compat-implib Tạo các _thÆ° viên nháºp tÆ°Æ¡ng thÃch_ ngược;\n"
+"\t\t\t\t\tcÅ©ng tạo « __imp_<KÃ_HIỆU> ».\n"
+
+#: emultempl/pe.em:330
+#, c-format
+msgid ""
+" --enable-auto-image-base Automatically choose image base for DLLs\n"
+" unless user specifies one\n"
+msgstr ""
+" --enable-auto-image-base Tá»± Ä‘á»™ng chá»n cÆ¡ bản ảnh cho má»i DLL\n"
+"\t\t\t\t\t\t\ttrừ khi ngÆ°á»i dùng gõ nó\n"
+
+#: emultempl/pe.em:332
+#, c-format
+msgid " --disable-auto-image-base Do not auto-choose image base. (default)\n"
+msgstr " --disable-auto-image-base Äừng _tá»± Ä‘á»™ng_ chá»n _cÆ¡ bản ảnh_ (mặc định) (_tắt_)\n"
+
+#: emultempl/pe.em:333
+#, c-format
+msgid ""
+" --dll-search-prefix=<string> When linking dynamically to a dll without\n"
+" an importlib, use <string><basename>.dll\n"
+" in preference to lib<basename>.dll \n"
+msgstr ""
+" --dll-search-prefix=<chuá»—i> Khi liên kết Ä‘á»™ng đến DLL không có thÆ° viên nháºp,\n"
+"\thãy dùng « <chuỗi><tên_cơ_bản>.dll » hơn « <tên_cơ_bản>.dll »\n"
+"\t(_tiá»n_tố_tìm_kiếm_)\n"
+
+#: emultempl/pe.em:336
+#, c-format
+msgid ""
+" --enable-auto-import Do sophistcated linking of _sym to\n"
+" __imp_sym for DATA references\n"
+msgstr ""
+" --enable-auto-import Liên kết một cách tinh tế\n"
+"\t« _sym » đến « __imp_sym » cho các tham chiếu DATA (dữ liệu)\n"
+"\t(_báºt nháºp tá»± Ä‘á»™ng)\n"
+
+#: emultempl/pe.em:338
+#, c-format
+msgid " --disable-auto-import Do not auto-import DATA items from DLLs\n"
+msgstr " --disable-auto-import Äừng _tá»± Ä‘á»™ng nháºp_ mục DATA từ DLL (_tắt_)\n"
+
+#: emultempl/pe.em:339
+#, c-format
+msgid ""
+" --enable-runtime-pseudo-reloc Work around auto-import limitations by\n"
+" adding pseudo-relocations resolved at\n"
+" runtime.\n"
+msgstr ""
+" --enable-runtime-pseudo-reloc Chỉnh sá»a các hạn chế nháºp tá»± Ä‘á»™ng,\n"
+"\tbằng cách thêm các việc _định vị lại giả_ được tháo gỡ và o _lúc chạy_. (_báºt_)\n"
+
+#: emultempl/pe.em:342
+#, c-format
+msgid ""
+" --disable-runtime-pseudo-reloc Do not add runtime pseudo-relocations for\n"
+" auto-imported DATA.\n"
+msgstr ""
+" --disable-runtime-pseudo-reloc Äừng thêm việc _định vị lại giả_\n"
+"\tvà o _lúc chạy_ cho DATA (dữ liệu) được nháºp tá»± Ä‘á»™ng. (_tắt_)\n"
+
+#: emultempl/pe.em:344
+#, c-format
+msgid ""
+" --enable-extra-pe-debug Enable verbose debug output when building\n"
+" or linking to DLLs (esp. auto-import)\n"
+msgstr ""
+" --enable-extra-pe-debug _Báºt_ xuất dữ liệu _gỡ lá»—i_ chi tiết\n"
+"\ttrong khi xây dụng hay liên kết đến DLL nà o (nhất là việc tá»± Ä‘á»™ng nháºp) (_thêm_)\n"
+
+#: emultempl/pe.em:347
+#, c-format
+msgid ""
+" --large-address-aware Executable supports virtual addresses\n"
+" greater than 2 gigabytes\n"
+msgstr ""
+" --large-address-aware Ứng dụng chạy có hỗ trợ _địa chỉ_ ảo _lớn_ hơn 2 GB\n"
+"\t\t\t\t\t\t\t(_kiến thức_)\n"
+
+#: emultempl/pe.em:414
+msgid "%P: warning: bad version number in -subsystem option\n"
+msgstr "%P: cảnh báo: gặp số thứ tá»± phiên bản sai trong tùy chá»n « -subsystem » (hệ thống con)\n"
+
+#: emultempl/pe.em:445
+msgid "%P%F: invalid subsystem type %s\n"
+msgstr "%P%F: invalid subsystem type %s\n"
+
+#: emultempl/pe.em:484
+msgid "%P%F: invalid hex number for PE parameter '%s'\n"
+msgstr "%P%F: invalid hex number for PE parameter '%s'\n"
+
+#: emultempl/pe.em:501
+msgid "%P%F: strange hex info for PE parameter '%s'\n"
+msgstr "%P%F: thông tin tháºp lục lạ cho tham sốstr « %s »or PE parameter '%s'\n"
+
+#: emultempl/pe.em:518
+#, c-format
+msgid "%s: Can't open base file %s\n"
+msgstr "%s: Không thể mở táºp tin cÆ¡ bản %s\n"
+
+#: emultempl/pe.em:734
+msgid "%P: warning, file alignment > section alignment.\n"
+msgstr "%P: cảnh báo, canh lá» táºp tin > canh lá» phần.\n"
+
+#: emultempl/pe.em:821 emultempl/pe.em:848
+#, c-format
+msgid "Warning: resolving %s by linking to %s\n"
+msgstr "Cảnh báo: đang tháo gỡ %s bằng cách liên kết đến %s\n"
+
+#: emultempl/pe.em:826 emultempl/pe.em:853
+msgid "Use --enable-stdcall-fixup to disable these warnings\n"
+msgstr "Hãy dùng « --enable-stdcall-fixup » (báºt sá»a gá»i chuẩn) để tắt các cảnh báo nà y\n"
+
+#: emultempl/pe.em:827 emultempl/pe.em:854
+msgid "Use --disable-stdcall-fixup to disable these fixups\n"
+msgstr "Hãy dùng « --disable-stdcall-fixup » (tắt sá»a gá»i chuẩn) để tắt các việc sá»a nà y\n"
+
+#: emultempl/pe.em:873
+#, c-format
+msgid "%C: Cannot get section contents - auto-import exception\n"
+msgstr "%C: Không thể lấy ná»™i dung phần: ngoà i lệ nháºp tá»± Ä‘á»™ng\n"
+
+#: emultempl/pe.em:910
+#, c-format
+msgid "Info: resolving %s by linking to %s (auto-import)\n"
+msgstr "Thông tin: Ä‘ang tháo gỡ %s bằng cách liên kết đến %s (tá»± Ä‘á»™ng nháºp)\n"
+
+#: emultempl/pe.em:983
+msgid "%F%P: PE operations on non PE file.\n"
+msgstr "%F%P: thao tác PE vá»›i táºp tin không phải PE.\n"
+
+#: emultempl/pe.em:1258
+#, c-format
+msgid "Errors encountered processing file %s\n"
+msgstr "Gặp lá»—i trong khi xá» lý táºp tin %s\n"
+
+#: emultempl/pe.em:1281
+#, c-format
+msgid "Errors encountered processing file %s for interworking"
+msgstr "Gặp lá»—i trong khi xá» lý táºp tin %s để dệt và o vá»›i nhau"
+
+#: emultempl/pe.em:1340 ldexp.c:570 ldlang.c:2408 ldlang.c:5135 ldlang.c:5166
+#: ldmain.c:1161
+msgid "%P%F: bfd_link_hash_lookup failed: %E\n"
+msgstr "%P%F: « bfd_link_hash_lookup » (bfd liên kết băm tra cứu) thất bại: %E\n"
+
+#: ldcref.c:153
+msgid "%X%P: bfd_hash_table_init of cref table failed: %E\n"
+msgstr "%X%P: « bfd_hash_table_init » (bfd băm bảng khởi động) với bảng cref thất bại: %E\n"
+
+#: ldcref.c:159
+msgid "%X%P: cref_hash_lookup failed: %E\n"
+msgstr "%X%P: cref_hash_lookup failed: %E\n"
+
+#: ldcref.c:225
+#, c-format
+msgid ""
+"\n"
+"Cross Reference Table\n"
+"\n"
+msgstr ""
+"\n"
+"Bảng Tham Chiếu Chéo\n"
+"\n"
+
+#: ldcref.c:226
+msgid "Symbol"
+msgstr "Ký hiệu"
+
+#: ldcref.c:234
+#, c-format
+msgid "File\n"
+msgstr "Táºp tin\n"
+
+#: ldcref.c:238
+#, c-format
+msgid "No symbols\n"
+msgstr "Không có ký hiệu\n"
+
+#: ldcref.c:359 ldcref.c:478
+msgid "%B%F: could not read symbols; %E\n"
+msgstr "%B%F: could not read symbols; %E\n"
+
+#: ldcref.c:363 ldcref.c:482 ldmain.c:1226 ldmain.c:1230
+msgid "%B%F: could not read symbols: %E\n"
+msgstr "%B%F: could not read symbols: %E\n"
+
+#: ldcref.c:414
+msgid "%P: symbol `%T' missing from main hash table\n"
+msgstr "%P: thiếu ký hiệus« mb »ltrong bảng băm chÃnh table\n"
+
+#: ldcref.c:547 ldcref.c:554 ldmain.c:1273 ldmain.c:1280
+msgid "%B%F: could not read relocs: %E\n"
+msgstr "%B%F: could not read relocs: %E\n"
+
+#. We found a reloc for the symbol. The symbol is defined
+#. in OUTSECNAME. This reloc is from a section which is
+#. mapped into a section from which references to OUTSECNAME
+#. are prohibited. We must report an error.
+#: ldcref.c:573
+msgid "%X%C: prohibited cross reference from %s to `%T' in %s\n"
+msgstr "%X%C: không cho phép tham chiếu chéo từprohđếni« ed »ctrongss reference from %s to `%T' in %s\n"
+
+#: ldctor.c:84
+msgid "%P%X: Different relocs used in set %s\n"
+msgstr "%P%X: Sá» dụng sá»± định vị lại khác nhau trong táºp hợpDifferent relocs used in set %s\n"
+
+#: ldctor.c:102
+msgid "%P%X: Different object file formats composing set %s\n"
+msgstr "%P%X: Có gồm khuôn dạng táºp tin đối tượng khác nhau trong %s\n"
+
+#: ldctor.c:281 ldctor.c:295
+msgid "%P%X: %s does not support reloc %s for set %s\n"
+msgstr "%P%X: %s không há»— trợ định vị lại %s cho táºp hợp %s\n"
+
+#: ldctor.c:316
+msgid "%P%X: Unsupported size %d for set %s\n"
+msgstr "%P%X: Unsupported size %d for set %s\n"
+
+#: ldctor.c:337
+msgid ""
+"\n"
+"Set Symbol\n"
+"\n"
+msgstr ""
+"\n"
+"Set Symbol\n"
+"\n"
+
+#: ldemul.c:227
+#, c-format
+msgid "%S SYSLIB ignored\n"
+msgstr "%S SYSLIB bị bỠquaignored\n"
+
+#: ldemul.c:233
+#, c-format
+msgid "%S HLL ignored\n"
+msgstr "%S HLL bị bỠqua\n"
+
+#: ldemul.c:253
+msgid "%P: unrecognised emulation mode: %s\n"
+msgstr "%P: unrecognised emulation mode: %s\n"
+
+#: ldemul.c:254
+msgid "Supported emulations: "
+msgstr "Mô phá»ngHđã à m há»— trợ:"
+
+#: ldemul.c:296
+#, c-format
+msgid " no emulation specific options.\n"
+msgstr " không có tùy chá»n đặc trÆ°ng cho mô phá»ng.\n"
+
+#: ldexp.c:379
+#, c-format
+msgid "%F%S %% by zero\n"
+msgstr "%F%S %% cho số không\n"
+
+#: ldexp.c:386
+#, c-format
+msgid "%F%S / by zero\n"
+msgstr "%F%S / cho số không\n"
+
+#: ldexp.c:583
+#, c-format
+msgid "%X%S: unresolvable symbol `%s' referenced in expression\n"
+msgstr "%X%S: ký hiệu không tháo gỡ được « %s » được tham chiếu trong biểu thức\n"
+
+#: ldexp.c:604
+#, c-format
+msgid "%F%S: undefined symbol `%s' referenced in expression\n"
+msgstr "%F%S: ký hiệu chưa định nghĩa « %s » được tham chiếu trong biểu thức\n"
+
+#: ldexp.c:665 ldexp.c:678
+#, c-format
+msgid "%F%S: undefined MEMORY region `%s' referenced in expression\n"
+msgstr "%F%S: miá»n MEMORY (nhá»›) chÆ°a định nghÄ©a « %s » được tham chiếu trong biểu thức\n"
+
+#: ldexp.c:757
+#, c-format
+msgid "%F%S can not PROVIDE assignment to location counter\n"
+msgstr "%F%S không thể PROVIDE (cung cấp) việc gán cho bộ đếm địa điểm\n"
+
+#: ldexp.c:770
+#, c-format
+msgid "%F%S invalid assignment to location counter\n"
+msgstr "%F%S việc gán không hợp lệ cho bộ đếm địa điểm\n"
+
+#: ldexp.c:774
+#, c-format
+msgid "%F%S assignment to location counter invalid outside of SECTION\n"
+msgstr "%F%S việc gán cho bộ đếm địa điểm không phải hợp lệ bên ngoà i SECTION (phần)\n"
+
+#: ldexp.c:783
+msgid "%F%S cannot move location counter backwards (from %V to %V)\n"
+msgstr "%F%S không thể chạy ngược bộ đếm địa điểm (từ %V vỠ%V)\n"
+
+#: ldexp.c:810
+msgid "%P%F:%s: hash creation failed\n"
+msgstr "%P%F:%s: hash creation failed\n"
+
+#: ldexp.c:1077 ldexp.c:1109
+#, c-format
+msgid "%F%S nonconstant expression for %s\n"
+msgstr "%F%S biểu thức thay đổi chononconstant expression for %s\n"
+
+#: ldexp.c:1163
+#, c-format
+msgid "%F%S non constant expression for %s\n"
+msgstr "%F%S biểu thức thay đổi cho %s\n"
+
+#: ldfile.c:139
+#, c-format
+msgid "attempt to open %s failed\n"
+msgstr "việc cố mở %s bị lỗi\n"
+
+#: ldfile.c:141
+#, c-format
+msgid "attempt to open %s succeeded\n"
+msgstr "%s đã được mở\n"
+
+#: ldfile.c:147
+msgid "%F%P: invalid BFD target `%s'\n"
+msgstr "%F%P: invalid BFD target `%s'\n"
+
+#: ldfile.c:255 ldfile.c:282
+msgid "%P: skipping incompatible %s when searching for %s\n"
+msgstr "%P: Ä‘ang nhảy quaskipkhông tÆ°Æ¡ng thÃch trong khi tìm kiếm%s when searching for %s\n"
+
+#: ldfile.c:267
+msgid "%F%P: attempted static link of dynamic object `%s'\n"
+msgstr "%F%P: đã cố liên kết tĩnh đối tượng động « %s »\n"
+
+#: ldfile.c:384
+msgid "%F%P: %s (%s): No such file: %E\n"
+msgstr "%F%P: %s (%s): Không có táºp tin nhÆ° váºy: %E\n"
+
+#: ldfile.c:387
+msgid "%F%P: %s: No such file: %E\n"
+msgstr "%F%P: %s: No such file: %E\n"
+
+#: ldfile.c:417
+msgid "%F%P: cannot find %s inside %s\n"
+msgstr "%F%P: cannot find %s inside %s\n"
+
+#: ldfile.c:420
+msgid "%F%P: cannot find %s\n"
+msgstr "%F%P: cannot find %s\n"
+
+#: ldfile.c:437 ldfile.c:453
+#, c-format
+msgid "cannot find script file %s\n"
+msgstr "không tìm thấy táºp tin táºp lệnh %s\n"
+
+#: ldfile.c:439 ldfile.c:455
+#, c-format
+msgid "opened script file %s\n"
+msgstr "đã mở táºp tin táºp lệnh %s\n"
+
+#: ldfile.c:499
+msgid "%P%F: cannot open linker script file %s: %E\n"
+msgstr "%P%F: cannot open linker script file %s: %E\n"
+
+#: ldfile.c:546
+msgid "%P%F: cannot represent machine `%s'\n"
+msgstr "%P%F: cannot represent machine `%s'\n"
+
+#: ldlang.c:511
+msgid "%P%F: out of memory during initialization"
+msgstr "%P%F: out of memory during initialization"
+
+#: ldlang.c:551
+msgid "%P:%S: warning: redeclaration of memory region '%s'\n"
+msgstr "%P:%S: warning: redeclaration of memory region '%s'\n"
+
+#: ldlang.c:557
+msgid "%P:%S: warning: memory region %s not declared\n"
+msgstr "%P:%S: cảnh báowachÆ°a tuyên bố miá»n bá»™ nhá»› reeclared\n"
+
+#: ldlang.c:1073
+msgid ""
+"\n"
+"Memory Configuration\n"
+"\n"
+msgstr ""
+"\n"
+"Memory Configuration\n"
+"\n"
+
+#: ldlang.c:1075
+msgid "Name"
+msgstr "Tên"
+
+#: ldlang.c:1075
+msgid "Origin"
+msgstr "Gốc"
+
+#: ldlang.c:1075
+msgid "Length"
+msgstr "Äá»™ dà i"
+
+#: ldlang.c:1075
+msgid "Attributes"
+msgstr "Thuá»™c tÃnh"
+
+#: ldlang.c:1115
+#, c-format
+msgid ""
+"\n"
+"Linker script and memory map\n"
+"\n"
+msgstr ""
+"\n"
+"Táºp lệnh liên kết được và bản đồ bá»™ nhá»›Linker script and memory map\n"
+"\n"
+
+#: ldlang.c:1183
+msgid "%P%F: Illegal use of `%s' section\n"
+msgstr "%P%F: Không cho phép cách sỠdụng phần « %s »\n"
+
+#: ldlang.c:1193
+msgid "%P%F: output format %s cannot represent section called %s\n"
+msgstr "%P%F: khuôn dạng %s không thể miêu tả phần được gá»i là %s\n"
+
+#: ldlang.c:1775
+msgid "%B: file not recognized: %E\n"
+msgstr "%B: file not recognized: %E\n"
+
+#: ldlang.c:1776
+msgid "%B: matching formats:"
+msgstr "%B: matching formats:"
+
+#: ldlang.c:1783
+msgid "%F%B: file not recognized: %E\n"
+msgstr "%F%B: file not recognized: %E\n"
+
+#: ldlang.c:1847
+msgid "%F%B: member %B in archive is not an object\n"
+msgstr "%F%B: bộ phạnmembtrong kho không phải là đối tượngobject\n"
+
+#: ldlang.c:1858 ldlang.c:1872
+msgid "%F%B: could not read symbols: %E\n"
+msgstr "%F%B: could not read symbols: %E\n"
+
+#: ldlang.c:2127
+msgid "%P: warning: could not find any targets that match endianness requirement\n"
+msgstr "%P: cảnh báowakhông tìm thấy Ä‘Ãch nà o khá»›p vá»›itkiểu endian đã cần thiếtirement\n"
+
+#: ldlang.c:2141
+msgid "%P%F: target %s not found\n"
+msgstr "%P%F: target %s not found\n"
+
+#: ldlang.c:2143
+msgid "%P%F: cannot open output file %s: %E\n"
+msgstr "%P%F: cannot open output file %s: %E\n"
+
+#: ldlang.c:2149
+msgid "%P%F:%s: can not make object file: %E\n"
+msgstr "%P%F:%s: can not make object file: %E\n"
+
+#: ldlang.c:2153
+msgid "%P%F:%s: can not set architecture: %E\n"
+msgstr "%P%F:%s: can not set architecture: %E\n"
+
+#: ldlang.c:2157
+msgid "%P%F: can not create link hash table: %E\n"
+msgstr "%P%F: can not create link hash table: %E\n"
+
+#: ldlang.c:2301
+msgid "%P%F: bfd_hash_lookup failed creating symbol %s\n"
+msgstr "%P%F: « bfd_hash_lookup » (bfd băm tra cứu) thất bại, tạo ký hiệu %s\n"
+
+#: ldlang.c:2319
+msgid "%P%F: bfd_hash_allocate failed creating symbol %s\n"
+msgstr "%P%F: « bfd_hash_allocate » (bfd băm cấp cho) thất bại, tạo ký hiệu %s\n"
+
+#: ldlang.c:2710
+msgid " load address 0x%V"
+msgstr " load address 0x%V"
+
+#: ldlang.c:2874
+msgid "%W (size before relaxing)\n"
+msgstr "%W (kÃch cỡ trÆ°á»›c khi lÆ¡i rasize before relaxing)\n"
+
+#: ldlang.c:2961
+#, c-format
+msgid "Address of section %s set to "
+msgstr "Äịa chỉ của phần %s được láºp là "
+
+#: ldlang.c:3114
+#, c-format
+msgid "Fail with %d\n"
+msgstr "Thất bại với %d\n"
+
+#: ldlang.c:3351
+msgid "%X%P: section %s [%V -> %V] overlaps section %s [%V -> %V]\n"
+msgstr "%X%P: phần %s [%V → %V] đè lên phần %s [%V → %V]\n"
+
+#: ldlang.c:3379
+msgid "%X%P: address 0x%v of %B section %s is not within region %s\n"
+msgstr "%X%P: địa chỉ 0x%v cá»a %B phần %s không phải ở trong miá»n %s\n"
+
+#: ldlang.c:3388
+msgid "%X%P: region %s is full (%B section %s)\n"
+msgstr "%X%P: miá»n %s đầy (%B phần %s)\n"
+
+#: ldlang.c:3439
+msgid "%P%X: Internal error on COFF shared library section %s\n"
+msgstr "%P%X: Lỗi nội bộ trên phần thư viên dùng chung COFF %s\n"
+
+#: ldlang.c:3493
+msgid "%P%F: error: no memory region specified for loadable section `%s'\n"
+msgstr "%P%F: lá»—i: chÆ°a ghi rõ miá»n bá»™ nhá»› cho phần tải được « %s »\n"
+
+#: ldlang.c:3498
+msgid "%P: warning: no memory region specified for loadable section `%s'\n"
+msgstr "%P: lá»—i: chÆ°a ghi rõ miá»n bá»™ nhá»› cho phần tải được « %s »\n"
+
+#: ldlang.c:3515
+msgid "%P: warning: changing start of section %s by %u bytes\n"
+msgstr "%P: cảnh báo: đang thay đổi đầu phần %s bằng %u byte\n"
+
+#: ldlang.c:3532
+#, c-format
+msgid "%F%S: non constant or forward reference address expression for section %s\n"
+msgstr "%F%S: biểu thức địa chỉ tham chiếu thay đổi hay tiếp lên %s\n"
+
+#: ldlang.c:3703
+msgid "%P%F: can't relax section: %E\n"
+msgstr "%P%F: can't relax section: %E\n"
+
+#: ldlang.c:3960
+msgid "%F%P: invalid data statement\n"
+msgstr "%F%P: invalid data statement\n"
+
+#: ldlang.c:3999
+msgid "%F%P: invalid reloc statement\n"
+msgstr "%F%P: invalid reloc statement\n"
+
+#: ldlang.c:4141
+msgid "%P%F:%s: can't set start address\n"
+msgstr "%P%F:%s: can't set start address\n"
+
+#: ldlang.c:4154 ldlang.c:4173
+msgid "%P%F: can't set start address\n"
+msgstr "%P%F: can't set start address\n"
+
+#: ldlang.c:4166
+msgid "%P: warning: cannot find entry symbol %s; defaulting to %V\n"
+msgstr "%P: warning: cannot find entry symbol %s; defaulting to %V\n"
+
+#: ldlang.c:4178
+msgid "%P: warning: cannot find entry symbol %s; not setting start address\n"
+msgstr "%P: cảnh báo: không tìm thấy ký hiệu và o %s;wnên không láºp địa chỉ bắt đầu symbol %s; not setting start address\n"
+
+#: ldlang.c:4227
+msgid "%P%F: Relocatable linking with relocations from format %s (%B) to format %s (%B) is not supported\n"
+msgstr "%P%F: Không há»— trợ liên kết định vị lại Ä‘Æ°á»c có định vị lại từ khuôn dạng %s (%B) sang khuôn dạng %s (%B)\n"
+
+#: ldlang.c:4237
+msgid "%P: warning: %s architecture of input file `%B' is incompatible with %s output\n"
+msgstr "%P: cảnh báo: kiến trức %s của táºp tin nháºp « %B » không tÆ°Æ¡ng thÃch vá»›i dữ liệu xuất %s\n"
+
+#: ldlang.c:4259
+msgid "%P%X: failed to merge target specific data of file %B\n"
+msgstr "%P%X: lá»—i hợp nhất dữ liệu đặc trÆ°ng cho dữ liệu của táºp tin %B\n"
+
+#: ldlang.c:4343
+msgid ""
+"\n"
+"Allocating common symbols\n"
+msgstr ""
+"\n"
+"Äang cấp phát các ký hiệu dùng chung\n"
+
+#: ldlang.c:4344
+msgid ""
+"Common symbol size file\n"
+"\n"
+msgstr ""
+"Common symbol size file\n"
+"\n"
+
+#: ldlang.c:4470
+msgid "%P%F: invalid syntax in flags\n"
+msgstr "%P%F: invalid syntax in flags\n"
+
+# Type: error
+# Description
+#: ldlang.c:4740
+msgid "%P%F: Failed to create hash table\n"
+msgstr "%P%F: Failed to create hash table\n"
+
+#: ldlang.c:5057
+msgid "%P%Fmultiple STARTUP files\n"
+msgstr "%P%Fmultiple STARTUP files\n"
+
+#: ldlang.c:5105
+msgid "%X%P:%S: section has both a load address and a load region\n"
+msgstr "%X%P:%S: phần có cả địa chỉ tải lẫn miá»n tải Ä‘á»usection has both a load address and a load region\n"
+
+#: ldlang.c:5345
+msgid "%F%P: bfd_record_phdr failed: %E\n"
+msgstr "%F%P: « bfd_record_phdr » thất bại: %E\n"
+
+#: ldlang.c:5365
+msgid "%X%P: section `%s' assigned to non-existent phdr `%s'\n"
+msgstr "%X%P: phần « %s » được cấp cho phdr không có « %s »\n"
+
+#: ldlang.c:5751
+msgid "%X%P: unknown language `%s' in version information\n"
+msgstr "%X%P: không biết ngôn ngữ « %s » trong thông tin phiên bản\n"
+
+#: ldlang.c:5893
+msgid "%X%P: anonymous version tag cannot be combined with other version tags\n"
+msgstr "%X%P: thẻ phiên bản vô danh không kết hợp được với thẻ phiên bản khác\n"
+
+#: ldlang.c:5902
+msgid "%X%P: duplicate version tag `%s'\n"
+msgstr "%X%P: duplicate version tag `%s'\n"
+
+#: ldlang.c:5922 ldlang.c:5931 ldlang.c:5948 ldlang.c:5958
+msgid "%X%P: duplicate expression `%s' in version information\n"
+msgstr "%X%P: biểu thức trùng « %s » trong thông tin phiên bảnduplicate expression `%s' in version information\n"
+
+#: ldlang.c:5998
+msgid "%X%P: unable to find version dependency `%s'\n"
+msgstr "%X%P: unable to find version dependency `%s'\n"
+
+#: ldlang.c:6020
+msgid "%X%P: unable to read .exports section contents\n"
+msgstr "%X%P: unable to read .exports section contents\n"
+
+#: ldmain.c:229
+msgid "%X%P: can't set BFD default target to `%s': %E\n"
+msgstr "%X%P: không thể láºp Ä‘Ãch can'mặc định là « %s »:t to `%s': %E\n"
+
+#: ldmain.c:341
+msgid "%P%F: --relax and -r may not be used together\n"
+msgstr "%P%F: không cho phép sá» dụng hai tùy chá»n « --relax » (lÆ¡i ra) và « -r » vá»›i nhau \n"
+
+#: ldmain.c:343
+msgid "%P%F: -r and -shared may not be used together\n"
+msgstr "%P%F: -r and -shared may not be used together\n"
+
+#: ldmain.c:347
+msgid "%P%F: -static and -shared may not be used together\n"
+msgstr "%P%F: -static and -shared may not be used together\n"
+
+#: ldmain.c:352
+msgid "%P%F: -F may not be used without -shared\n"
+msgstr "%P%F: không thể sá» dụng tùy chá»n « -F » khi không có tùy chá»n « -shared » (dùng chung)\n"
+
+#: ldmain.c:354
+msgid "%P%F: -f may not be used without -shared\n"
+msgstr "%P%F: không thể sá» dụng tùy chá»n « -f » khi không có tùy chá»n « -shared » (dùng chung)\n"
+
+#: ldmain.c:396
+msgid "using external linker script:"
+msgstr "Ä‘ang dùng táºp lệnh liên kết bên ngoà i:"
+
+#: ldmain.c:398
+msgid "using internal linker script:"
+msgstr "Ä‘ang dùng táºp lệnh liên kết bên trong:"
+
+#: ldmain.c:432
+msgid "%P%F: no input files\n"
+msgstr "%P%F: không có táºp tin nháºp nà o\n"
+
+#: ldmain.c:436
+msgid "%P: mode %s\n"
+msgstr "%P: chế độ %s\n"
+
+#: ldmain.c:452
+msgid "%P%F: cannot open map file %s: %E\n"
+msgstr "%P%F: cannot open map file %s: %E\n"
+
+#: ldmain.c:482
+msgid "%P: link errors found, deleting executable `%s'\n"
+msgstr "%P: link errors found, deleting executable `%s'\n"
+
+#: ldmain.c:491
+msgid "%F%B: final close failed: %E\n"
+msgstr "%F%B: final close failed: %E\n"
+
+#: ldmain.c:517
+msgid "%X%P: unable to open for source of copy `%s'\n"
+msgstr "%X%P: unable to open for source of copy `%s'\n"
+
+#: ldmain.c:520
+msgid "%X%P: unable to open for destination of copy `%s'\n"
+msgstr "%X%P: unable to open for destination of copy `%s'\n"
+
+#: ldmain.c:527
+msgid "%P: Error writing file `%s'\n"
+msgstr "%P: Error writing file `%s'\n"
+
+#: ldmain.c:532 pe-dll.c:1447
+#, c-format
+msgid "%P: Error closing file `%s'\n"
+msgstr "%P: Gặp lá»—i khi đóng táºp tin « %s »\n"
+
+#: ldmain.c:548
+#, c-format
+msgid "%s: total time in link: %ld.%06ld\n"
+msgstr "%s: thá»i gian tổng trong liên kết: %ld.%06ld\n"
+
+#: ldmain.c:551
+#, c-format
+msgid "%s: data size %ld\n"
+msgstr "%s: kÃch cỡ dữ liệu %ld\n"
+
+#: ldmain.c:634
+msgid "%P%F: missing argument to -m\n"
+msgstr "%P%F: missing argument to -m\n"
+
+#: ldmain.c:780 ldmain.c:798 ldmain.c:828
+msgid "%P%F: bfd_hash_table_init failed: %E\n"
+msgstr "%P%F: « bfd_hash_table_init » (bfd băm bảng khởi động) thất bại: %E\n"
+
+#: ldmain.c:784 ldmain.c:802
+msgid "%P%F: bfd_hash_lookup failed: %E\n"
+msgstr "%P%F: bfd_hash_lookup failed: %E\n"
+
+#: ldmain.c:816
+msgid "%X%P: error: duplicate retain-symbols-file\n"
+msgstr "%X%P: lá»—ieicate retain-symbols (giữ lại táºp tin ký hiệu) trùng-file\n"
+
+#: ldmain.c:858
+msgid "%P%F: bfd_hash_lookup for insertion failed: %E\n"
+msgstr "%P%F: « bfd_hash_lookup » (bfd băm tra cứu) cho sự chèn đã thất bại: %E\n"
+
+#: ldmain.c:863
+msgid "%P: `-retain-symbols-file' overrides `-s' and `-S'\n"
+msgstr "%P: tùy chá»n « -retain-symbols-file » (giữ lại táºp tin ký hiệu) đè lên « -s » và « -S »\n"
+
+#: ldmain.c:938
+#, c-format
+msgid ""
+"Archive member included because of file (symbol)\n"
+"\n"
+msgstr ""
+"Gồm bá»™ phạn kho vì táºp tin (ký hiệu)\n"
+"\n"
+
+#: ldmain.c:1008
+msgid "%X%C: multiple definition of `%T'\n"
+msgstr "%X%C: multiple definition of `%T'\n"
+
+#: ldmain.c:1011
+msgid "%D: first defined here\n"
+msgstr "%D: first defined here\n"
+
+#: ldmain.c:1015
+msgid "%P: Disabling relaxation: it will not work with multiple definitions\n"
+msgstr "%P: Tắt khả năng lÆ¡i ra: nó sẽ không hoạt Ä‘á»™ng vá»›i nhiá»u lá»i định nghÄ©aisabling relaxation: it will not work with multiple definitions\n"
+
+#: ldmain.c:1045
+msgid "%B: warning: definition of `%T' overriding common\n"
+msgstr "%B: cảnh báo: lá»i định nghÄ©a « %T » đè lên Ä‘iá»u dùng chung\n"
+
+#: ldmain.c:1048
+msgid "%B: warning: common is here\n"
+msgstr "%B: warning: common is here\n"
+
+#: ldmain.c:1055
+msgid "%B: warning: common of `%T' overridden by definition\n"
+msgstr "%B: cảnh báowalá»i định nghÄ©a đè lên Ä‘iá»um« on » dùng chunginition\n"
+
+#: ldmain.c:1058
+msgid "%B: warning: defined here\n"
+msgstr "%B: warning: defined here\n"
+
+#: ldmain.c:1065
+msgid "%B: warning: common of `%T' overridden by larger common\n"
+msgstr ""
+"%B: cảnh báowaÄ‘iá»u dùng chung lá»›n hÆ¡n có đè lên Ä‘iá»um« %T » dùng chung\n"
+"ommon\n"
+
+#: ldmain.c:1068
+msgid "%B: warning: larger common is here\n"
+msgstr "%B: cảnh báo: Ä‘iá»u dùng chung lá»›n hÆ¡n tại đây\n"
+
+#: ldmain.c:1072
+msgid "%B: warning: common of `%T' overriding smaller common\n"
+msgstr "%B: cảnh báo: Ä‘iá»u « %T » dùng chung có đè lên Ä‘iá»u dùng chung nhá» hÆ¡n\n"
+
+#: ldmain.c:1075
+msgid "%B: warning: smaller common is here\n"
+msgstr "%B: warning: smaller common is here\n"
+
+#: ldmain.c:1079
+msgid "%B: warning: multiple common of `%T'\n"
+msgstr "%B: warning: multiple common of `%T'\n"
+
+#: ldmain.c:1081
+msgid "%B: warning: previous common is here\n"
+msgstr "%B: warning: previous common is here\n"
+
+#: ldmain.c:1101 ldmain.c:1139
+msgid "%P: warning: global constructor %s used\n"
+msgstr "%P: warning: global constructor %s used\n"
+
+#: ldmain.c:1149
+msgid "%P%F: BFD backend error: BFD_RELOC_CTOR unsupported\n"
+msgstr "%P%F: lá»—i háºu phÆ°Æ¡ng BFDbakhông há»— trợ « ckend error: B »R unsupported\n"
+
+#. We found a reloc for the symbol we are looking for.
+#: ldmain.c:1203 ldmain.c:1205 ldmain.c:1207 ldmain.c:1245 ldmain.c:1293
+msgid "warning: "
+msgstr "cảnh báo: "
+
+#: ldmain.c:1327
+msgid "%F%P: bfd_hash_table_init failed: %E\n"
+msgstr "%F%P: « bfd_hash_table_init » (bfd băm bảng khởi động) thất bại: %E\n"
+
+#: ldmain.c:1334
+msgid "%F%P: bfd_hash_lookup failed: %E\n"
+msgstr "%F%P: bfd_hash_lookup failed: %E\n"
+
+#: ldmain.c:1355
+msgid "%X%C: undefined reference to `%T'\n"
+msgstr "%X%C: undefined reference to `%T'\n"
+
+#: ldmain.c:1358
+msgid "%C: warning: undefined reference to `%T'\n"
+msgstr "%C: warning: undefined reference to `%T'\n"
+
+#: ldmain.c:1364
+msgid "%X%D: more undefined references to `%T' follow\n"
+msgstr "%X%D: more undefined references to `%T' follow\n"
+
+#: ldmain.c:1367
+msgid "%D: warning: more undefined references to `%T' follow\n"
+msgstr "%D: chÆ°a định nghÄ©a lá»i tham chiếu đến « %T » tại nhiá»u nÆ¡i nữa theo đây\n"
+
+#: ldmain.c:1378
+msgid "%X%B: undefined reference to `%T'\n"
+msgstr "%X%B: undefined reference to `%T'\n"
+
+#: ldmain.c:1381
+msgid "%B: warning: undefined reference to `%T'\n"
+msgstr "%B: cảnh báo: chÆ°a định nghÄ©a lá»i tham chiếu đến « %T »\n"
+
+#: ldmain.c:1387
+msgid "%X%B: more undefined references to `%T' follow\n"
+msgstr "%X%B: more undefined references to `%T' follow\n"
+
+#: ldmain.c:1390
+msgid "%B: warning: more undefined references to `%T' follow\n"
+msgstr "%B: cảnh báo: chÆ°a định nghÄ©a lá»i tham chiếu đến « %T » tại nhiá»u nÆ¡i nữa theo đây\n"
+
+#: ldmain.c:1425 ldmain.c:1478 ldmain.c:1496
+msgid "%P%X: generated"
+msgstr "%P%X: generated"
+
+#: ldmain.c:1432
+msgid " additional relocation overflows omitted from the output\n"
+msgstr "trà n định vị lại thêm bị bá» Ä‘i khá»i dữ liệu xuấtdditional relocation overflows omitted from the output\n"
+
+#: ldmain.c:1445
+msgid " relocation truncated to fit: %s against undefined symbol `%T'"
+msgstr " sự định vị lại bị cắt xém để vừa: %s đối với ký hiệu chưa định nghĩa « %T »"
+
+#: ldmain.c:1450
+msgid " relocation truncated to fit: %s against symbol `%T' defined in %A section in %B"
+msgstr " sự định vị lại bị cắt xém để vừa: %s đối với ký hiệu « %T » đã định nghĩa trong phần %A trong %B"
+
+#: ldmain.c:1460
+msgid " relocation truncated to fit: %s against `%T'"
+msgstr "sự định vị lại bị cắt xém để vừa: %s đối với « %T »"
+
+#: ldmain.c:1481
+#, c-format
+msgid "dangerous relocation: %s\n"
+msgstr "sự định vị lại nguy hiểm: %s\n"
+
+#: ldmain.c:1499
+msgid " reloc refers to symbol `%T' which is not being output\n"
+msgstr " sự định vị lại tham chiếu đến ký hiệu « %T » mà không còn được xuất lại\n"
+
+#: ldmisc.c:149
+#, c-format
+msgid "no symbol"
+msgstr "không có ký hiệu"
+
+#: ldmisc.c:240
+#, c-format
+msgid "built in linker script:%u"
+msgstr "táºp lệnh liên kết có sẵn:%u"
+
+#: ldmisc.c:289 ldmisc.c:293
+msgid "%B%F: could not read symbols\n"
+msgstr "%B%F: could not read symbols\n"
+
+#: ldmisc.c:329
+msgid "%B: In function `%T':\n"
+msgstr "%B: In function `%T':\n"
+
+#: ldmisc.c:480
+msgid "%F%P: internal error %s %d\n"
+msgstr "%F%P: internal error %s %d\n"
+
+#: ldmisc.c:526
+msgid "%P: internal error: aborting at %s line %d in %s\n"
+msgstr "%P: internal error: aborting at %s line %d in %s\n"
+
+#: ldmisc.c:529
+msgid "%P: internal error: aborting at %s line %d\n"
+msgstr "%P: internal error: aborting at %s line %d\n"
+
+#: ldmisc.c:531
+msgid "%P%F: please report this bug\n"
+msgstr "%P%F: vui lòng thông báo lỗi nà yplease report this bug\n"
+
+#. Output for noisy == 2 is intended to follow the GNU standards.
+#: ldver.c:38
+#, c-format
+msgid "GNU ld version %s\n"
+msgstr "Trình ld phiên bản %s của GNU\n"
+
+#: ldver.c:42
+#, c-format
+msgid "Copyright 2005 Free Software Foundation, Inc.\n"
+msgstr "Bản quyá»n © năm 2005 Tổ chức Phần má»m Tá»± do.\n"
+
+#: ldver.c:43
+#, c-format
+msgid ""
+"This program is free software; you may redistribute it under the terms of\n"
+"the GNU General Public License. This program has absolutely no warranty.\n"
+msgstr ""
+"ChÆ°Æ¡ng trình nà y là phần má»m tá»± do mà không bảo đảm gì cả.\n"
+"Bạn có thể phân phối lại nó vá»›i Ä‘iá»u kiện của Quyá»n công chung Gnu (GPL).\n"
+
+#: ldver.c:52
+#, c-format
+msgid " Supported emulations:\n"
+msgstr " Mô phá»ng đã há»— trợ :\n"
+
+#: ldwrite.c:55 ldwrite.c:191
+msgid "%P%F: bfd_new_link_order failed\n"
+msgstr "%P%F: « bfd_new_link_order » (bfd mới liên kết thứ tự) thất bại\n"
+
+#: ldwrite.c:341
+msgid "%F%P: cannot create split section name for %s\n"
+msgstr "%F%P: cannot create split section name for %s\n"
+
+#: ldwrite.c:353
+msgid "%F%P: clone section failed: %E\n"
+msgstr "%F%P: clone section failed: %E\n"
+
+#: ldwrite.c:391
+#, c-format
+msgid "%8x something else\n"
+msgstr "%8x cái gì khácsomething else\n"
+
+#: ldwrite.c:561
+msgid "%F%P: final link failed: %E\n"
+msgstr "%F%P: final link failed: %E\n"
+
+#: lexsup.c:195 lexsup.c:327
+msgid "KEYWORD"
+msgstr "TỪ_KHÓAÊN_BÀN_PHÃM"
+
+#: lexsup.c:195
+msgid "Shared library control for HP/UX compatibility"
+msgstr "Äiá»u khiển thÆ° viên dùng chung để tÆ°Æ¡ng thÃch vá»›i HP/UX"
+
+#: lexsup.c:198
+msgid "ARCH"
+msgstr "ARCH"
+
+#: lexsup.c:198
+msgid "Set architecture"
+msgstr "Láºp kiến trúc"
+
+#: lexsup.c:200 lexsup.c:421
+msgid "TARGET"
+msgstr "ÄÃCH"
+
+#: lexsup.c:200
+msgid "Specify target for following input files"
+msgstr "Ghi rõ Ä‘Ãch cho những táºp tin nháºp theo đây"
+
+#: lexsup.c:203 lexsup.c:252 lexsup.c:264 lexsup.c:277 lexsup.c:380
+#: lexsup.c:433 lexsup.c:490
+msgid "FILE"
+msgstr "TẬP TIN"
+
+#: lexsup.c:203
+msgid "Read MRI format linker script"
+msgstr "Äá»c táºp lệnh liên kết khuôn dạng MRI"
+
+#: lexsup.c:205
+msgid "Force common symbols to be defined"
+msgstr "Ép buá»™c định nghÄ©a má»i ký hiệu dùng chung"
+
+#: lexsup.c:209 lexsup.c:475 lexsup.c:477 lexsup.c:479
+msgid "ADDRESS"
+msgstr "ÄỊA CHỈ"
+
+#: lexsup.c:209
+msgid "Set start address"
+msgstr "Láºp địa chỉ bắt đầu"
+
+#: lexsup.c:211
+msgid "Export all dynamic symbols"
+msgstr "Xuất má»i ký hiệu Ä‘á»™ng"
+
+#: lexsup.c:213
+msgid "Link big-endian objects"
+msgstr "Liên kết má»i đối tượng big-endian (cuối lá»›n)"
+
+#: lexsup.c:215
+msgid "Link little-endian objects"
+msgstr "Liên kết má»i đối tượng little-endian (cuối nhá»)"
+
+#: lexsup.c:217 lexsup.c:220
+msgid "SHLIB"
+msgstr "SHLIB"
+
+#: lexsup.c:217
+msgid "Auxiliary filter for shared object symbol table"
+msgstr "Bá»™ lá»c phụ cho bảng ký hiệu đối tượng dùng chung"
+
+#: lexsup.c:220
+msgid "Filter for shared object symbol table"
+msgstr "Bá»™ lá»c cho bảng ký hiệu đối tượng dùng chung"
+
+#: lexsup.c:223
+msgid "Ignored"
+msgstr "Ignored"
+
+#: lexsup.c:225
+msgid "SIZE"
+msgstr "Cá» "
+
+#: lexsup.c:225
+msgid "Small data size (if no size, same as --shared)"
+msgstr "KÃch cỡ dữ liệu nhá» (nếu không có, nó bằng tùy chá»n « --shared »)"
+
+#: lexsup.c:228
+msgid "FILENAME"
+msgstr "TÊN TẬP TIN"
+
+#: lexsup.c:228
+msgid "Set internal name of shared library"
+msgstr "Láºp tên ná»™i bá»™ của thÆ° viên dùng chung"
+
+#: lexsup.c:230
+msgid "PROGRAM"
+msgstr "CHÆ¯Æ NG TRÃŒNH"
+
+#: lexsup.c:230
+msgid "Set PROGRAM as the dynamic linker to use"
+msgstr "Láºp CHÆ¯Æ NG TRÃŒNH là bá»™ liên kết Ä‘á»™ng cần dùng"
+
+#: lexsup.c:233
+msgid "LIBNAME"
+msgstr "TÊN THƯ VIÊN"
+
+#: lexsup.c:233
+msgid "Search for library LIBNAME"
+msgstr "Tìm kiếm thư viên TÊN THƯ VIÊN"
+
+#: lexsup.c:235
+msgid "DIRECTORY"
+msgstr "THƯ MỤC"
+
+#: lexsup.c:235
+msgid "Add DIRECTORY to library search path"
+msgstr "Thêm THƯ MỤC và o Ä‘Æ°á»ng dẫn tìm kiếm thÆ° viên"
+
+#: lexsup.c:238
+msgid "Override the default sysroot location"
+msgstr "Äè lên địa Ä‘iểm sysroot (gốc hệ thống) mặc định"
+
+#: lexsup.c:240
+msgid "EMULATION"
+msgstr "MÔ PHỎNG"
+
+#: lexsup.c:240
+msgid "Set emulation"
+msgstr "Láºp cách mô phá»ng"
+
+#: lexsup.c:242
+msgid "Print map file on standard output"
+msgstr "In táºp tin bản đồ ra thiết bị xuất chuẩn"
+
+#: lexsup.c:244
+msgid "Do not page align data"
+msgstr "Äừng canh lá» trang dữ liệu"
+
+#: lexsup.c:246
+msgid "Do not page align data, do not make text readonly"
+msgstr "Äừng canh lá» trang dữ liệu, đừng láºp văn bản là chỉ Ä‘á»c"
+
+#: lexsup.c:249
+msgid "Page align data, make text readonly"
+msgstr "Canh lá» trang dữ liệu, láºp văn bản là chỉ Ä‘á»c"
+
+#: lexsup.c:252
+msgid "Set output file name"
+msgstr "Láºp tên táºp tin xuất"
+
+#: lexsup.c:254
+msgid "Optimize output file"
+msgstr "Ưu tiên hóa táºp tin xuất"
+
+#: lexsup.c:256
+msgid "Ignored for SVR4 compatibility"
+msgstr "Bị bá» qua để tÆ°Æ¡ng thÃch vá»›i SVR4"
+
+#: lexsup.c:260
+msgid "Generate relocatable output"
+msgstr "Tạo ra dữ liệu có thể định vị lại"
+
+#: lexsup.c:264
+msgid "Just link symbols (if directory, same as --rpath)"
+msgstr "Chỉ liên kết ký hiệu (nếu thÆ° mục, bằng tùy chá»n « --rpath »)"
+
+#: lexsup.c:267
+msgid "Strip all symbols"
+msgstr "TÆ°á»›c má»i ký hiệu"
+
+#: lexsup.c:269
+msgid "Strip debugging symbols"
+msgstr "Tước ký hiệu gỡ lối"
+
+#: lexsup.c:271
+msgid "Strip symbols in discarded sections"
+msgstr "Tước ký hiệu trong phần bị hủy"
+
+#: lexsup.c:273
+msgid "Do not strip symbols in discarded sections"
+msgstr "Äừng tÆ°á»›c ký hiệu trong phần bị hủy"
+
+#: lexsup.c:275
+msgid "Trace file opens"
+msgstr "Táºp tin vết có mở"
+
+#: lexsup.c:277
+msgid "Read linker script"
+msgstr "Read linker script"
+
+#: lexsup.c:279 lexsup.c:297 lexsup.c:363 lexsup.c:378 lexsup.c:468
+#: lexsup.c:493 lexsup.c:520
+msgid "SYMBOL"
+msgstr "Kà HIỆUSMB"
+
+#: lexsup.c:279
+msgid "Start with undefined reference to SYMBOL"
+msgstr "Bắt đầu với tham chiệu gạch chân đến Kà HIỆU"
+
+#: lexsup.c:282
+msgid "[=SECTION]"
+msgstr "[=PHẦN]"
+
+#: lexsup.c:283
+msgid "Don't merge input [SECTION | orphan] sections"
+msgstr "Äừng kết hợp phần nháºp [PHẦN | mồ côi]"
+
+#: lexsup.c:285
+msgid "Build global constructor/destructor tables"
+msgstr "Xây dụng bảng cấu tạo/phá toà n cục"
+
+#: lexsup.c:287
+msgid "Print version information"
+msgstr "In ra thông tin phiên bản"
+
+#: lexsup.c:289
+msgid "Print version and emulation information"
+msgstr "In ra thông tin phiên bản và mô phá»ng"
+
+#: lexsup.c:291
+msgid "Discard all local symbols"
+msgstr "Discard all local symbols"
+
+#: lexsup.c:293
+msgid "Discard temporary local symbols (default)"
+msgstr "Hủy ký hiệu địa phương tạm (mặc định)"
+
+#: lexsup.c:295
+msgid "Don't discard any local symbols"
+msgstr "Äừng hủy ký hiệu địa phÆ°Æ¡ng nà o"
+
+#: lexsup.c:297
+msgid "Trace mentions of SYMBOL"
+msgstr "Vết nơi ghi Kà HIỆU"
+
+#: lexsup.c:299 lexsup.c:435 lexsup.c:437
+msgid "PATH"
+msgstr "ÄƯỜNG DẪN"
+
+#: lexsup.c:299
+msgid "Default search path for Solaris compatibility"
+msgstr "ÄÆ°á»ng dẫn tìm kiếm để tÆ°Æ¡ng thÃch vá»›i Solaris"
+
+#: lexsup.c:302
+msgid "Start a group"
+msgstr "Bắt đầu nhóm"
+
+#: lexsup.c:304
+msgid "End a group"
+msgstr "Kết thức nhóm"
+
+#: lexsup.c:308
+msgid "Accept input files whose architecture cannot be determined"
+msgstr "Chấp nháºn táºp tin nháºp có kiến trức không thể được tháo gỡ"
+
+#: lexsup.c:312
+msgid "Reject input files whose architecture is unknown"
+msgstr "Từ chối táºp tin nháºp có kiến trức lạ"
+
+#: lexsup.c:315
+msgid ""
+"Set DT_NEEDED tags for DT_NEEDED entries in\n"
+"\t\t\t\tfollowing dynamic libs"
+msgstr ""
+"Láºp thẻ « DT_NEEDED » (cần thiết DT)\n"
+"\tcho mục nháºp « DT_NEEDED »\n"
+"\ttrong những thư viên động theo đây"
+
+#: lexsup.c:318
+msgid ""
+"Do not set DT_NEEDED tags for DT_NEEDED entries\n"
+"\t\t\t\tin following dynamic libs"
+msgstr ""
+"Äừng láºp thẻ « DT_NEEDED » (cần thiết DT)\n"
+"\tcho mục nháºp « DT_NEEDED »\n"
+"\ttrong những thư viên động theo đây"
+
+#: lexsup.c:321
+msgid "Only set DT_NEEDED for following dynamic libs if used"
+msgstr ""
+"Chỉ láºp thẻ « DT_NEEDED » (cần thiết DT)\n"
+"\tcho những thư viên động theo đây nếu được dùng"
+
+#: lexsup.c:324
+msgid "Always set DT_NEEDED for following dynamic libs"
+msgstr ""
+"Luôn láºp thẻ « DT_NEEDED » (cần thiết DT)\n"
+"\tcho những thư viên động theo đây"
+
+#: lexsup.c:327
+msgid "Ignored for SunOS compatibility"
+msgstr "Bị bá» qua để tÆ°Æ¡ng thÃch vá»›i SunOS"
+
+#: lexsup.c:329
+msgid "Link against shared libraries"
+msgstr "Liên kết đối với thư viên dùng chung"
+
+#: lexsup.c:335
+msgid "Do not link against shared libraries"
+msgstr "Äừng liên kết đối vá»›i thÆ° viên dùng chung"
+
+#: lexsup.c:343
+msgid "Bind global references locally"
+msgstr "Äóng kết tham chiếu toà n cục má»™t cách địa phÆ°Æ¡ng"
+
+#: lexsup.c:345
+msgid "Check section addresses for overlaps (default)"
+msgstr "Kiểm tra địa chỉ phần có chồng chéo (mặc định)"
+
+#: lexsup.c:348
+msgid "Do not check section addresses for overlaps"
+msgstr "Äừng kiểm tra địa chỉ phần có chồng chéo"
+
+#: lexsup.c:351
+msgid "Output cross reference table"
+msgstr "Xuất bảng tham chiếu chéo"
+
+#: lexsup.c:353
+msgid "SYMBOL=EXPRESSION"
+msgstr "BIỂU THỨC=BIỂU THỨC"
+
+#: lexsup.c:353
+msgid "Define a symbol"
+msgstr "Äịnh nghÄ©a ký hiệu"
+
+#: lexsup.c:355
+msgid "[=STYLE]"
+msgstr "[=KIỂU DÃNG]"
+
+#: lexsup.c:355
+msgid "Demangle symbol names [using STYLE]"
+msgstr "Tháo gỡ tên ký hiệu [bằng KIỂU DÃNG]"
+
+#: lexsup.c:358
+msgid "Generate embedded relocs"
+msgstr "Tạo ra sự định vị lại nhúng"
+
+#: lexsup.c:360
+msgid "Treat warnings as errors"
+msgstr "XỠlý cảnh báo là lỗi"
+
+#: lexsup.c:363
+msgid "Call SYMBOL at unload-time"
+msgstr "Gá»i Kà HIỆU và o lúc bá» tải"
+
+#: lexsup.c:365
+msgid "Force generation of file with .exe suffix"
+msgstr "Ép buá»™c tạo ra táºp tin có háºu tố « .exe »"
+
+#: lexsup.c:367
+msgid "Remove unused sections (on some targets)"
+msgstr "Gỡ bá» phần không dùng (trên má»™t số Ä‘Ãch)"
+
+#: lexsup.c:370
+msgid "Don't remove unused sections (default)"
+msgstr "Äừng gỡ bá» phần không dùng (mặc định)"
+
+#: lexsup.c:373
+msgid "Set default hash table size close to <NUMBER>"
+msgstr "Láºp kÃch cỡ bảng băm mặc định là gần <Sá»>"
+
+#: lexsup.c:376
+msgid "Print option help"
+msgstr "In ra trợ giúp vá» tùy chá»n"
+
+#: lexsup.c:378
+msgid "Call SYMBOL at load-time"
+msgstr "Gá»i Kà HIỆU và o lúc tải"
+
+#: lexsup.c:380
+msgid "Write a map file"
+msgstr "Ghi táºp tin bản đồ"
+
+#: lexsup.c:382
+msgid "Do not define Common storage"
+msgstr "Äừng định nghÄ©a kho dùng chung"
+
+#: lexsup.c:384
+msgid "Do not demangle symbol names"
+msgstr "Äừng tháo gỡ tên ký hiệu"
+
+#: lexsup.c:386
+msgid "Use less memory and more disk I/O"
+msgstr "Chiếm Ãt bá»™ nhá»› hÆ¡n, và nhiá»u nháºp/xuất Ä‘Ä©a hÆ¡n"
+
+#: lexsup.c:388
+msgid "Do not allow unresolved references in object files"
+msgstr "Äừng cho phép tham chiệu chÆ°a tháo gỡ trong táºp tin đối tượng"
+
+#: lexsup.c:391
+msgid "Allow unresolved references in shared libaries"
+msgstr "Cho phép tham chiệu chưa tháo gỡ trong thư viên dùng chung"
+
+#: lexsup.c:395
+msgid "Do not allow unresolved references in shared libs"
+msgstr "Äừng cho phép tham chiệu chÆ°a tháo gỡ trong thÆ° viên dùng chung"
+
+#: lexsup.c:399
+msgid "Allow multiple definitions"
+msgstr "Cho phép nhiá»u lá»i định nghÄ©a"
+
+#: lexsup.c:401
+msgid "Disallow undefined version"
+msgstr "BỠcho phép phiên bản chưa định nghĩa"
+
+#: lexsup.c:403
+msgid "Create default symbol version"
+msgstr "Tạo phiên bản ký hiệu mặc định"
+
+#: lexsup.c:406
+msgid "Create default symbol version for imported symbols"
+msgstr "Tạo phiên bản ký hiệu mặc định cho ký hiệu đã nháºp"
+
+#: lexsup.c:409
+msgid "Don't warn about mismatched input files"
+msgstr "Äừng cảnh báo vá» táºp tin nháºp không khá»›p vá»›i nhau"
+
+#: lexsup.c:411
+msgid "Turn off --whole-archive"
+msgstr "Tắt tùy chá»n « --whole-archive » (toà n kho)"
+
+#: lexsup.c:413
+msgid "Create an output file even if errors occur"
+msgstr "Tạo táºp tin xuất dù gặp lá»—i"
+
+#: lexsup.c:418
+msgid ""
+"Only use library directories specified on\n"
+"\t\t\t\tthe command line"
+msgstr ""
+"Chỉ dùng thư mục thư viên\n"
+"\tđược ghi rõ trên dòng lệnh"
+
+#: lexsup.c:421
+msgid "Specify target of output file"
+msgstr "Ghi rõ Ä‘Ãch của táºp tin xuất"
+
+#: lexsup.c:424
+msgid "Ignored for Linux compatibility"
+msgstr "Bị bá» qua để tÆ°Æ¡ng thÃch vá»›i Linux"
+
+#: lexsup.c:427
+msgid "Reduce memory overheads, possibly taking much longer"
+msgstr "Giảm bá»™ nhá»› duy tu, có thể mất rất nhiá»u thá»i gian hÆ¡n"
+
+#: lexsup.c:430
+msgid "Relax branches on certain targets"
+msgstr "LÆ¡i ra nhánh trên má»™t số Ä‘Ãch nà o đó"
+
+#: lexsup.c:433
+msgid "Keep only symbols listed in FILE"
+msgstr "Giữ chỉ những ký hiệu được liệt kê trong TẬP TIN"
+
+#: lexsup.c:435
+msgid "Set runtime shared library search path"
+msgstr "Láºp Ä‘Æ°á»ng dẫn tìm kiếm thÆ° viên dùng chung và o lúc chạy"
+
+#: lexsup.c:437
+msgid "Set link time shared library search path"
+msgstr "Láºp Ä‘Æ°á»ng dẫn tìm kiếm thÆ° viên dùng chung và o lúc liên kết"
+
+#: lexsup.c:440
+msgid "Create a shared library"
+msgstr "Tạo thư viên dùng chung"
+
+#: lexsup.c:444
+msgid "Create a position independent executable"
+msgstr "Tạo ứng dụng chạy được không phụ thuá»™c và o vị trÃ"
+
+#: lexsup.c:448
+msgid "Sort common symbols by size"
+msgstr "Sắp xếp ký hiệu dùng chung theo kÃch cỡ"
+
+#: lexsup.c:452
+msgid "name|alignment"
+msgstr "tên|canh_hà ng"
+
+#: lexsup.c:453
+msgid "Sort sections by name or maximum alignment"
+msgstr "Sắp xếp phần theo tên hay canh lỠtối đa"
+
+#: lexsup.c:455
+msgid "COUNT"
+msgstr "Sá»_ÄẾM"
+
+#: lexsup.c:455
+msgid "How many tags to reserve in .dynamic section"
+msgstr "Số thẻ cần giữ lại trong phần « .dynamic » (động)"
+
+#: lexsup.c:458
+msgid "[=SIZE]"
+msgstr "[=SIZE]"
+
+#: lexsup.c:458
+msgid "Split output sections every SIZE octets"
+msgstr "Chia tách phần xuất tại mỗi CỠoctet"
+
+#: lexsup.c:461
+msgid "[=COUNT]"
+msgstr "[=Sá»_ÄẾM]"
+
+#: lexsup.c:461
+msgid "Split output sections every COUNT relocs"
+msgstr "Chia tách phần xuất tại má»—i Sá»_ÄẾM việc định vị lại"
+
+#: lexsup.c:464
+msgid "Print memory usage statistics"
+msgstr "In ra thống kê cách sỠdụng bộ nhớ"
+
+#: lexsup.c:466
+msgid "Display target specific options"
+msgstr "Hiển thị tùy chá»n đặc trÆ°ng cho Ä‘Ãch"
+
+#: lexsup.c:468
+msgid "Do task level linking"
+msgstr "Liên kết trong lớp tác vụ"
+
+#: lexsup.c:470
+msgid "Use same format as native linker"
+msgstr "Dùng cùng khuôn dạng với bộ liên kết sở hữu"
+
+#: lexsup.c:472
+msgid "SECTION=ADDRESS"
+msgstr "PHẦN=ÄỊA CHỈ"
+
+#: lexsup.c:472
+msgid "Set address of named section"
+msgstr "Láºp địa chỉ của phần có tên"
+
+#: lexsup.c:475
+msgid "Set address of .bss section"
+msgstr "Láºp địa chỉ của phần « .bss »"
+
+#: lexsup.c:477
+msgid "Set address of .data section"
+msgstr "Láºp địa chỉ của phần « .data » (dữ liệu)"
+
+#: lexsup.c:479
+msgid "Set address of .text section"
+msgstr "Láºp địa chỉ của phần « .text » (văn bản)"
+
+#: lexsup.c:482
+msgid ""
+"How to handle unresolved symbols. <method> is:\n"
+"\t\t\t\tignore-all, report-all, ignore-in-object-files,\n"
+"\t\t\t\tignore-in-shared-libs"
+msgstr ""
+"Cách quản lý ký hiệu chưa tháo gỡ.\n"
+" \t<phương_pháp> là :\n"
+" • ignore-all\t\t\t\tbỠqua hết\n"
+" • report-all\t\t\t\tthông báo hết\n"
+" • ignore-in-object-files\tbá» qua trong táºp tin đối tượng\n"
+" • ignore-in-shared-libs\tbỠqua trong thư viên dùng chung"
+
+#: lexsup.c:486
+msgid "Output lots of information during link"
+msgstr "Xuất nhiá»u thông tin trong khi liên kết"
+
+#: lexsup.c:490
+msgid "Read version information script"
+msgstr "Äá»c táºp lệnh thông tin phiên bản"
+
+#: lexsup.c:493
+msgid ""
+"Take export symbols list from .exports, using\n"
+"\t\t\t\tSYMBOL as the version."
+msgstr ""
+"Lấy danh sách ký hiệu xuất từ « .exports » (xuất),\n"
+"\t\tvới phiên bản là Kà HIỆU"
+
+#: lexsup.c:496
+msgid "Warn about duplicate common symbols"
+msgstr "Cảnh báo vỠký hiệu dùng chung trùng"
+
+#: lexsup.c:498
+msgid "Warn if global constructors/destructors are seen"
+msgstr "Cảnh báo nếu gặp bộ cấu tạo/phá toà n cục"
+
+#: lexsup.c:501
+msgid "Warn if the multiple GP values are used"
+msgstr "Cảnh báo nếu sá» dụng nhiá»u giá trị GP"
+
+#: lexsup.c:503
+msgid "Warn only once per undefined symbol"
+msgstr "Cảnh báo chỉ một lần vỠmỗi ký hiệu chưa định nghĩa"
+
+#: lexsup.c:505
+msgid "Warn if start of section changes due to alignment"
+msgstr "Cảnh báo nếu đầu phần thay đổi vì canh lá»"
+
+#: lexsup.c:508
+msgid "Warn if shared object has DT_TEXTREL"
+msgstr "Cảnh báo nếu đối tượng dùng chung có « DT_TEXTREL »"
+
+#: lexsup.c:512
+msgid "Report unresolved symbols as warnings"
+msgstr "Thông báo ký hiệu chưa tháo gỡ là cảnh báo"
+
+#: lexsup.c:515
+msgid "Report unresolved symbols as errors"
+msgstr "Thông báo ký hiệu chưa tháo gỡ là lỗi"
+
+#: lexsup.c:517
+msgid "Include all objects from following archives"
+msgstr "Gồm má»i đối tượng từ những kho theo đây"
+
+#: lexsup.c:520
+msgid "Use wrapper functions for SYMBOL"
+msgstr "SỠdụng hà m cuốn cho Kà HIỆU"
+
+#: lexsup.c:667
+msgid "%P: unrecognized option '%s'\n"
+msgstr "%P: unrecognized option '%s'\n"
+
+#: lexsup.c:669
+msgid "%P%F: use the --help option for usage information\n"
+msgstr "%P%F: use the --help option for usage information\n"
+
+#: lexsup.c:687
+msgid "%P%F: unrecognized -a option `%s'\n"
+msgstr "%P%F: unrecognized -a option `%s'\n"
+
+#: lexsup.c:700
+msgid "%P%F: unrecognized -assert option `%s'\n"
+msgstr "%P%F: unrecognized -assert option `%s'\n"
+
+#: lexsup.c:743
+msgid "%F%P: unknown demangling style `%s'"
+msgstr "%F%Ps:không biết kiểu dáng tháo gõ (demangle « %s »n"
+
+#: lexsup.c:805
+msgid "%P%F: invalid number `%s'\n"
+msgstr "%P%F: invalid number `%s'\n"
+
+#: lexsup.c:897
+msgid "%P%F: bad --unresolved-symbols option: %s\n"
+msgstr "%P%F: tùy chá»nb« ad --unresolved-symbo» (ký hiệu chÆ°a tháo gỡ) saiion: %s\n"
+
+#. This can happen if the user put "-rpath,a" on the command
+#. line. (Or something similar. The comma is important).
+#. Getopt becomes confused and thinks that this is a -r option
+#. but it cannot parse the text after the -r so it refuses to
+#. increment the optind counter. Detect this case and issue
+#. an error message here. We cannot just make this a warning,
+#. increment optind, and continue because getopt is too confused
+#. and will seg-fault the next time around.
+#: lexsup.c:968
+msgid "%P%F: bad -rpath option\n"
+msgstr "%P%F: tùy chá»n « -rpath » (Ä‘Æ°á»ng dẫn r) sai\n"
+
+#: lexsup.c:1080
+msgid "%P%F: -shared not supported\n"
+msgstr "%P%F: -shared not supported\n"
+
+#: lexsup.c:1089
+msgid "%P%F: -pie not supported\n"
+msgstr "%P%F: không há»— trợ tùy chá»n « -pie » (bánh)\n"
+
+#: lexsup.c:1099
+msgid "name"
+msgstr "tên"
+
+#: lexsup.c:1101
+msgid "alignment"
+msgstr "canh lá»"
+
+#: lexsup.c:1104
+msgid "%P%F: invalid section sorting option: %s\n"
+msgstr "%P%F: invalid section sorting option: %s\n"
+
+#: lexsup.c:1130
+msgid "%P%F: invalid argument to option \"--section-start\"\n"
+msgstr "%P%F: đối số không hợp lệ đối vá»›i tùy chá»ni« alid argument t » (bắt đầu phần)option \"--section-start\"\n"
+
+#: lexsup.c:1137
+msgid "%P%F: missing argument(s) to option \"--section-start\"\n"
+msgstr "%P%F: thiếu đối số đối vá»›i tùy chá»n « --section-start » (bắt đầu phần)\n"
+
+#: lexsup.c:1311
+msgid "%P%F: may not nest groups (--help for usage)\n"
+msgstr "%P%F: không cho phép lồng nhóm với nhau (« --help » để xem cách sỠdụng đúng)\n"
+
+#: lexsup.c:1318
+msgid "%P%F: group ended before it began (--help for usage)\n"
+msgstr "%P%F: nhóm kết thức trước bắt đầu (« --help » để xem cách sỠdụng đúng)\n"
+
+#: lexsup.c:1346
+msgid "%P%X: --hash-size needs a numeric argument\n"
+msgstr "%P%X: --hash-size needs a numeric argument\n"
+
+#: lexsup.c:1397 lexsup.c:1410
+msgid "%P%F: invalid hex number `%s'\n"
+msgstr "%P%F: invalid hex number `%s'\n"
+
+#: lexsup.c:1445
+#, c-format
+msgid "Usage: %s [options] file...\n"
+msgstr "Cách sá» dụng: %s <tùy_chá»n> táºp_tin...\n"
+
+#: lexsup.c:1447
+#, c-format
+msgid "Options:\n"
+msgstr "Tùy chá»n:\n"
+
+#. Note: Various tools (such as libtool) depend upon the
+#. format of the listings below - do not change them.
+#: lexsup.c:1530
+#, c-format
+msgid "%s: supported targets:"
+msgstr "%s: Ä‘Ãch há»— trợ :"
+
+#: lexsup.c:1538
+#, c-format
+msgid "%s: supported emulations: "
+msgstr "%s: mô phá»ng há»— trợ :"
+
+#: lexsup.c:1543
+#, c-format
+msgid "%s: emulation specific options:\n"
+msgstr "%s: tùy chá»n đặc trÆ°ng cho mô phá»ng:\n"
+
+#: lexsup.c:1547
+#, c-format
+msgid "Report bugs to %s\n"
+msgstr "Hãy thông báo lỗi nà o cho %s\n"
+
+#: mri.c:291
+msgid "%P%F: unknown format type %s\n"
+msgstr "%P%F: không biết kiểu khuôn dạng %s\n"
+
+#: pe-dll.c:303
+#, c-format
+msgid "%XUnsupported PEI architecture: %s\n"
+msgstr "%XChưa hỗ trợ kiến trúc PEI: %s\n"
+
+#: pe-dll.c:652
+#, c-format
+msgid "%XError, duplicate EXPORT with ordinals: %s (%d vs %d)\n"
+msgstr "%XLá»—i: XUẤT trùng vá»›i Ä‘iá»u thứ tá»± : %s (%d so vá»›i %d)\n"
+
+#: pe-dll.c:659
+#, c-format
+msgid "Warning, duplicate EXPORT: %s\n"
+msgstr "Cảnh báo, XUẤT trùng: %s\n"
+
+#: pe-dll.c:725
+#, c-format
+msgid "%XCannot export %s: symbol not defined\n"
+msgstr "%XKhông thể xuất %s: chưa định nghĩa ký hiệu\n"
+
+#: pe-dll.c:731
+#, c-format
+msgid "%XCannot export %s: symbol wrong type (%d vs %d)\n"
+msgstr "%XKhông thể xuất %s: ký hiệu sai kiểu (%d so với %d)\n"
+
+#: pe-dll.c:738
+#, c-format
+msgid "%XCannot export %s: symbol not found\n"
+msgstr "%XKhông thể xuất %s: không tìm thấy ký hiệu\n"
+
+#: pe-dll.c:850
+#, c-format
+msgid "%XError, ordinal used twice: %d (%s vs %s)\n"
+msgstr "%XLá»—i, Ä‘iá»u thứ tá»± được dùng hai lần: %d (%s so vá»›i %s)\n"
+
+#: pe-dll.c:1172
+#, c-format
+msgid "%XError: %d-bit reloc in dll\n"
+msgstr "%xLỗi: định vị lại %d-bit trong DLL\n"
+
+#: pe-dll.c:1300
+#, c-format
+msgid "%s: Can't open output def file %s\n"
+msgstr "%s: Không thể mở táºp tin xuất def (định nghÄ©a) %s\n"
+
+#: pe-dll.c:1443
+#, c-format
+msgid "; no contents available\n"
+msgstr "; không có nội dung sẵn sà ng\n"
+
+#: pe-dll.c:2205
+msgid "%C: variable '%T' can't be auto-imported. Please read the documentation for ld's --enable-auto-import for details.\n"
+msgstr "%C: không thể tá»± Ä‘á»™ng nháºp biến « %T ». Hãy Ä‘á»c tà i liệu hÆ°á»›ng dẫn vá» tùy chá»n « --enable-auto-import » (báºt nháºp tá»± Ä‘á»™ng) của trình ld, để xem chi tiết.\n"
+
+#: pe-dll.c:2235
+#, c-format
+msgid "%XCan't open .lib file: %s\n"
+msgstr "%XKhông thể mở táºp tin « .lib » (thÆ° viên): %s\n"
+
+#: pe-dll.c:2240
+#, c-format
+msgid "Creating library file: %s\n"
+msgstr "Äang tạo táºp tin thÆ° viên: %s\n"
Added: branches/binutils/package/ld/po/zh_CN.po
===================================================================
--- branches/binutils/package/ld/po/zh_CN.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/po/zh_CN.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1942 @@
+# Simplified Chinese translation for ld.
+# Copyright (C) 2005 Free Software Foundation, Inc.
+# This file is distributed under the same license as the ld package.
+# Meng Jie <zuxyhere at eastday.com>, 2005.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: ld 2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-03 21:05+1030\n"
+"PO-Revision-Date: 2006-01-15 01:40+0800\n"
+"Last-Translator: Meng Jie <zuxyhere at eastday.com>\n"
+"Language-Team: Chinese (simplified) <i18n-translation at lists.linux.net.cn>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=utf-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: emultempl/armcoff.em:72
+#, c-format
+msgid " --support-old-code Support interworking with old code\n"
+msgstr " --support-old-code 支æŒä¸Žæ—§å¼ä»£ç 的交互工作\n"
+
+#: emultempl/armcoff.em:73
+#, c-format
+msgid " --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"
+msgstr ""
+
+#: emultempl/armcoff.em:121
+#, c-format
+msgid "Errors encountered processing file %s"
+msgstr "处ç†æ–‡ä»¶ %s æ—¶é‡åˆ°é”™è¯¯"
+
+#: emultempl/armcoff.em:188 emultempl/pe.em:1455
+msgid "%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"
+msgstr ""
+
+#: emultempl/armcoff.em:193 emultempl/pe.em:1460
+msgid "%P: warning: connot find thumb start symbol %s\n"
+msgstr ""
+
+#: emultempl/pe.em:301
+#, c-format
+msgid " --base_file <basefile> Generate a base file for relocatable DLLs\n"
+msgstr " --base_file <基å€æ–‡ä»¶> 为å¯é‡å®šä½çš„ DLL 生æˆä¸€ä¸ªåŸºå€æ–‡ä»¶\n"
+
+#: emultempl/pe.em:302
+#, c-format
+msgid " --dll Set image base to the default for DLLs\n"
+msgstr " --dll 设定 DLL çš„é»˜è®¤æ˜ è±¡åŸºåœ°å€\n"
+
+#: emultempl/pe.em:303
+#, c-format
+msgid " --file-alignment <size> Set file alignment\n"
+msgstr " --file-alignment <大å°> 设定文件对é½è¾¹ç•Œ\n"
+
+#: emultempl/pe.em:304
+#, c-format
+msgid " --heap <size> Set initial size of the heap\n"
+msgstr " --heap <大å°> è®¾å®šå †çš„åˆå§‹å¤§å°\n"
+
+#: emultempl/pe.em:305
+#, c-format
+msgid " --image-base <address> Set start address of the executable\n"
+msgstr " --image-base <地å€> 设定å¯æ‰§è¡Œæ–‡ä»¶çš„起始地å€\n"
+
+#: emultempl/pe.em:306
+#, c-format
+msgid " --major-image-version <number> Set version number of the executable\n"
+msgstr " --major-image-version <æ•°> 设定å¯æ‰§è¡Œæ–‡ä»¶çš„版本å·\n"
+
+#: emultempl/pe.em:307
+#, c-format
+msgid " --major-os-version <number> Set minimum required OS version\n"
+msgstr " --major-os-version <æ•°> 设定对æ“作系统版本的最低è¦æ±‚\n"
+
+#: emultempl/pe.em:308
+#, c-format
+msgid " --major-subsystem-version <number> Set minimum required OS subsystem version\n"
+msgstr " --major-subsystem-version <æ•°> 设定对æ“作系统å系统版本的最低è¦æ±‚\n"
+
+#: emultempl/pe.em:309
+#, c-format
+msgid " --minor-image-version <number> Set revision number of the executable\n"
+msgstr " --minor-image-version <æ•°> 设定å¯æ‰§è¡Œæ–‡ä»¶çš„修订版本å·\n"
+
+#: emultempl/pe.em:310
+#, c-format
+msgid " --minor-os-version <number> Set minimum required OS revision\n"
+msgstr " --minor-os-version <æ•°> 设定对æ“作系统修订版本的最低è¦æ±‚\n"
+
+#: emultempl/pe.em:311
+#, c-format
+msgid " --minor-subsystem-version <number> Set minimum required OS subsystem revision\n"
+msgstr " --minor-subsystem-version <æ•°> 设定对æ“作系统å系统修订版本的最低è¦æ±‚\n"
+
+#: emultempl/pe.em:312
+#, c-format
+msgid " --section-alignment <size> Set section alignment\n"
+msgstr " --section-alignment <大å°> 设定节的对é½è¾¹ç•Œ\n"
+
+#: emultempl/pe.em:313
+#, c-format
+msgid " --stack <size> Set size of the initial stack\n"
+msgstr " --stack <大å°> 设定åˆå§‹æ ˆçš„大å°\n"
+
+#: emultempl/pe.em:314
+#, c-format
+msgid " --subsystem <name>[:<version>] Set required OS subsystem [& version]\n"
+msgstr " --subsystem <å>[:<版本>] 设定需è¦çš„æ“作系统å系统[和版本å·]\n"
+
+#: emultempl/pe.em:315
+#, c-format
+msgid " --support-old-code Support interworking with old code\n"
+msgstr " --support-old-code 支æŒä¸Žæ—§å¼ä»£ç 的交互工作\n"
+
+#: emultempl/pe.em:316
+#, c-format
+msgid " --thumb-entry=<symbol> Set the entry point to be Thumb <symbol>\n"
+msgstr ""
+
+#: emultempl/pe.em:318
+#, c-format
+msgid " --add-stdcall-alias Export symbols with and without @nn\n"
+msgstr " --add-stdcall-alias 导出带与ä¸å¸¦ @nn 的符å·\n"
+
+#: emultempl/pe.em:319
+#, c-format
+msgid " --disable-stdcall-fixup Don't link _sym to _sym at nn\n"
+msgstr " --disable-stdcall-fixup ä¸å°† _sym 链接至 _sym at nn\n"
+
+#: emultempl/pe.em:320
+#, c-format
+msgid " --enable-stdcall-fixup Link _sym to _sym at nn without warnings\n"
+msgstr " --enable-stdcall-fixup å°† _sym 链接至 _sym at nn 而ä¸ç»™å‡ºè¦å‘Š\n"
+
+#: emultempl/pe.em:321
+#, c-format
+msgid " --exclude-symbols sym,sym,... Exclude symbols from automatic export\n"
+msgstr " --exclude-symbols 符å·,符å·,... 将一些符å·æŽ’除在自动导入以外\n"
+
+#: emultempl/pe.em:322
+#, c-format
+msgid " --exclude-libs lib,lib,... Exclude libraries from automatic export\n"
+msgstr " --exclude-libs 库,库,... 将一些库排除在自动导入以外\n"
+
+#: emultempl/pe.em:323
+#, c-format
+msgid " --export-all-symbols Automatically export all globals to DLL\n"
+msgstr " --export-all-symbols 自动将所有全局é‡å¯¼å‡ºè‡³ DLL\n"
+
+#: emultempl/pe.em:324
+#, c-format
+msgid " --kill-at Remove @nn from exported symbols\n"
+msgstr " --kill-at 从导出符å·ä¸ç§»åŽ» @nn\n"
+
+#: emultempl/pe.em:325
+#, c-format
+msgid " --out-implib <file> Generate import library\n"
+msgstr " --out-implib <文件> 生æˆå¯¼å…¥åº“\n"
+
+#: emultempl/pe.em:326
+#, c-format
+msgid " --output-def <file> Generate a .DEF file for the built DLL\n"
+msgstr " --output-def <文件> 为建立的 DLL 生æˆä¸€ä¸ª .DEF 文件\n"
+
+#: emultempl/pe.em:327
+#, c-format
+msgid " --warn-duplicate-exports Warn about duplicate exports.\n"
+msgstr " --warn-duplicate-exports 对é‡å¤å¯¼å‡ºç»™å‡ºè¦å‘Šã€‚\n"
+
+#: emultempl/pe.em:328
+#, c-format
+msgid ""
+" --compat-implib Create backward compatible import libs;\n"
+" create __imp_<SYMBOL> as well.\n"
+msgstr ""
+" --compat-implib 生æˆåŽå‘兼容的导入库；\n"
+" åŒæ—¶ç”Ÿæˆ __imp_<符å·>。\n"
+
+#: emultempl/pe.em:330
+#, c-format
+msgid ""
+" --enable-auto-image-base Automatically choose image base for DLLs\n"
+" unless user specifies one\n"
+msgstr " --enable-auto-image-base 除éžç”¨æˆ·æŒ‡å®šå¦åˆ™è‡ªåŠ¨é€‰æ‹©æ˜ 象基地å€\n"
+
+#: emultempl/pe.em:332
+#, c-format
+msgid " --disable-auto-image-base Do not auto-choose image base. (default)\n"
+msgstr " --disable-auto-image-base ä¸è‡ªåŠ¨é€‰æ‹©æ˜ 象基地å€ã€‚(默认)\n"
+
+#: emultempl/pe.em:333
+#, c-format
+msgid ""
+" --dll-search-prefix=<string> When linking dynamically to a dll without\n"
+" an importlib, use <string><basename>.dll\n"
+" in preference to lib<basename>.dll \n"
+msgstr ""
+" --dll-search-prefix=<å—符串> 动æ€é“¾æŽ¥è‡³ DLL 而缺少导入库时，使用\n"
+" <å—符串><基本å>.dll 而ä¸æ˜¯ lib<基本å>.dll\n"
+
+#: emultempl/pe.em:336
+#, c-format
+msgid ""
+" --enable-auto-import Do sophistcated linking of _sym to\n"
+" __imp_sym for DATA references\n"
+msgstr ""
+" --enable-auto-import 为实现 DATA 引用，使用å¤æ‚的手段将 _sym\n"
+" 链接至 __imp_sym\n"
+
+#: emultempl/pe.em:338
+#, c-format
+msgid " --disable-auto-import Do not auto-import DATA items from DLLs\n"
+msgstr " --disable-auto-import ä¸ä¸º DLL 自动导入 DATA 项\n"
+
+#: emultempl/pe.em:339
+#, c-format
+msgid ""
+" --enable-runtime-pseudo-reloc Work around auto-import limitations by\n"
+" adding pseudo-relocations resolved at\n"
+" runtime.\n"
+msgstr ""
+
+#: emultempl/pe.em:342
+#, c-format
+msgid ""
+" --disable-runtime-pseudo-reloc Do not add runtime pseudo-relocations for\n"
+" auto-imported DATA.\n"
+msgstr ""
+
+#: emultempl/pe.em:344
+#, c-format
+msgid ""
+" --enable-extra-pe-debug Enable verbose debug output when building\n"
+" or linking to DLLs (esp. auto-import)\n"
+msgstr ""
+" --enable-extra-pe-debug 当生æˆæˆ–链接至 DLL æ—¶(尤其当自动导入时)å¯ç”¨\n"
+" 详细的调试输出\n"
+
+#: emultempl/pe.em:347
+#, c-format
+msgid ""
+" --large-address-aware Executable supports virtual addresses\n"
+" greater than 2 gigabytes\n"
+msgstr " --large-address-aware å¯æ‰§è¡Œæ–‡ä»¶æ”¯æŒå¤§äºŽ 2 GB 的虚拟内å˜åœ°å€\n"
+
+#: emultempl/pe.em:414
+msgid "%P: warning: bad version number in -subsystem option\n"
+msgstr ""
+
+#: emultempl/pe.em:445
+#, fuzzy
+msgid "%P%F: invalid subsystem type %s\n"
+msgstr "æ— æ•ˆçš„æŒ‡å£ç±»åž‹"
+
+#: emultempl/pe.em:484
+msgid "%P%F: invalid hex number for PE parameter '%s'\n"
+msgstr ""
+
+#: emultempl/pe.em:501
+msgid "%P%F: strange hex info for PE parameter '%s'\n"
+msgstr ""
+
+#: emultempl/pe.em:518
+#, c-format
+msgid "%s: Can't open base file %s\n"
+msgstr "%sï¼šæ— æ³•æ‰“å¼€åŸºå€æ–‡ä»¶ %s\n"
+
+#: emultempl/pe.em:734
+#, fuzzy
+msgid "%P: warning, file alignment > section alignment.\n"
+msgstr " --section-alignment <大å°> 设定节的对é½è¾¹ç•Œ\n"
+
+#: emultempl/pe.em:821 emultempl/pe.em:848
+#, c-format
+msgid "Warning: resolving %s by linking to %s\n"
+msgstr ""
+
+#: emultempl/pe.em:826 emultempl/pe.em:853
+msgid "Use --enable-stdcall-fixup to disable these warnings\n"
+msgstr "使用 --enable-stdcall-fixup æ¥ç¦ç”¨è¿™äº›è¦å‘Š\n"
+
+#: emultempl/pe.em:827 emultempl/pe.em:854
+msgid "Use --disable-stdcall-fixup to disable these fixups\n"
+msgstr "使用 --disable-stdcall-fixup æ¥ç¦ç”¨è¿™äº›ä¿®æ£\n"
+
+#: emultempl/pe.em:873
+#, c-format
+msgid "%C: Cannot get section contents - auto-import exception\n"
+msgstr ""
+
+#: emultempl/pe.em:910
+#, c-format
+msgid "Info: resolving %s by linking to %s (auto-import)\n"
+msgstr ""
+
+#: emultempl/pe.em:983
+msgid "%F%P: PE operations on non PE file.\n"
+msgstr ""
+
+#: emultempl/pe.em:1258
+#, c-format
+msgid "Errors encountered processing file %s\n"
+msgstr "处ç†æ–‡ä»¶ %s 时出错\n"
+
+#: emultempl/pe.em:1281
+#, c-format
+msgid "Errors encountered processing file %s for interworking"
+msgstr ""
+
+#: emultempl/pe.em:1340 ldexp.c:570 ldlang.c:2408 ldlang.c:5135 ldlang.c:5166
+#: ldmain.c:1161
+msgid "%P%F: bfd_link_hash_lookup failed: %E\n"
+msgstr ""
+
+#: ldcref.c:153
+msgid "%X%P: bfd_hash_table_init of cref table failed: %E\n"
+msgstr ""
+
+#: ldcref.c:159
+#, fuzzy
+msgid "%X%P: cref_hash_lookup failed: %E\n"
+msgstr "主机寻找失败：%s：没有找到主机"
+
+#: ldcref.c:225
+#, c-format
+msgid ""
+"\n"
+"Cross Reference Table\n"
+"\n"
+msgstr ""
+"\n"
+"交å‰å¼•ç”¨è¡¨\n"
+"\n"
+
+#: ldcref.c:226
+msgid "Symbol"
+msgstr "符å·"
+
+#: ldcref.c:234
+#, c-format
+msgid "File\n"
+msgstr "文件\n"
+
+#: ldcref.c:238
+#, c-format
+msgid "No symbols\n"
+msgstr "没有符å·\n"
+
+#: ldcref.c:359 ldcref.c:478
+#, fuzzy
+msgid "%B%F: could not read symbols; %E\n"
+msgstr "%sï¼šæ— æ³•è¯»å–地å€"
+
+#: ldcref.c:363 ldcref.c:482 ldmain.c:1226 ldmain.c:1230
+#, fuzzy
+msgid "%B%F: could not read symbols: %E\n"
+msgstr "%sï¼šæ— æ³•è¯»å–地å€"
+
+#: ldcref.c:414
+msgid "%P: symbol `%T' missing from main hash table\n"
+msgstr ""
+
+#: ldcref.c:547 ldcref.c:554 ldmain.c:1273 ldmain.c:1280
+#, fuzzy
+msgid "%B%F: could not read relocs: %E\n"
+msgstr "%sï¼šæ— æ³•è¯»å–地å€"
+
+#. We found a reloc for the symbol. The symbol is defined
+#. in OUTSECNAME. This reloc is from a section which is
+#. mapped into a section from which references to OUTSECNAME
+#. are prohibited. We must report an error.
+#: ldcref.c:573
+msgid "%X%C: prohibited cross reference from %s to `%T' in %s\n"
+msgstr ""
+
+#: ldctor.c:84
+msgid "%P%X: Different relocs used in set %s\n"
+msgstr ""
+
+#: ldctor.c:102
+msgid "%P%X: Different object file formats composing set %s\n"
+msgstr ""
+
+#: ldctor.c:281 ldctor.c:295
+#, fuzzy
+msgid "%P%X: %s does not support reloc %s for set %s\n"
+msgstr "ISO C ä¸æ”¯æŒç”¨ ~ 求共è½å¤æ•°"
+
+#: ldctor.c:316
+#, fuzzy
+msgid "%P%X: Unsupported size %d for set %s\n"
+msgstr "扩展的寄å˜å™¨ä¸æ”¯æŒçš„æ“作数大å°"
+
+#: ldctor.c:337
+#, fuzzy
+msgid ""
+"\n"
+"Set Symbol\n"
+"\n"
+msgstr "没有符å·"
+
+#: ldemul.c:227
+#, fuzzy, c-format
+msgid "%S SYSLIB ignored\n"
+msgstr "被忽略的方法‘"
+
+#: ldemul.c:233
+#, fuzzy, c-format
+msgid "%S HLL ignored\n"
+msgstr "被忽略的方法‘"
+
+#: ldemul.c:253
+#, fuzzy
+msgid "%P: unrecognised emulation mode: %s\n"
+msgstr "未知的指令模å¼"
+
+#: ldemul.c:254
+msgid "Supported emulations: "
+msgstr "支æŒçš„仿真： "
+
+#: ldemul.c:296
+#, fuzzy, c-format
+msgid " no emulation specific options.\n"
+msgstr "没有定义选项"
+
+#: ldexp.c:379
+#, c-format
+msgid "%F%S %% by zero\n"
+msgstr "%F%S 对零å–模\n"
+
+#: ldexp.c:386
+#, c-format
+msgid "%F%S / by zero\n"
+msgstr "%F%S 被零除\n"
+
+#: ldexp.c:583
+#, c-format
+msgid "%X%S: unresolvable symbol `%s' referenced in expression\n"
+msgstr "%X%Sï¼šæ— æ³•è§£æžçš„符å·â€˜%s’在表达å¼ä¸è¢«å¼•ç”¨\n"
+
+#: ldexp.c:604
+#, c-format
+msgid "%F%S: undefined symbol `%s' referenced in expression\n"
+msgstr "%F%S：未定义的符å·â€˜%s’在表达å¼ä¸è¢«å¼•ç”¨\n"
+
+#: ldexp.c:665 ldexp.c:678
+#, c-format
+msgid "%F%S: undefined MEMORY region `%s' referenced in expression\n"
+msgstr "%F%S：未定义的 MEMORY 区域‘%s’在表达å¼ä¸è¢«å¼•ç”¨\n"
+
+#: ldexp.c:757
+#, c-format
+msgid "%F%S can not PROVIDE assignment to location counter\n"
+msgstr ""
+
+#: ldexp.c:770
+#, c-format
+msgid "%F%S invalid assignment to location counter\n"
+msgstr ""
+
+#: ldexp.c:774
+#, c-format
+msgid "%F%S assignment to location counter invalid outside of SECTION\n"
+msgstr ""
+
+#: ldexp.c:783
+msgid "%F%S cannot move location counter backwards (from %V to %V)\n"
+msgstr ""
+
+#: ldexp.c:810
+msgid "%P%F:%s: hash creation failed\n"
+msgstr "%P%F:%s：创建散列表失败\n"
+
+#: ldexp.c:1077 ldexp.c:1109
+#, c-format
+msgid "%F%S nonconstant expression for %s\n"
+msgstr ""
+
+#: ldexp.c:1163
+#, fuzzy, c-format
+msgid "%F%S non constant expression for %s\n"
+msgstr "用éžå¸¸é‡çš„数组表达å¼åˆå§‹åŒ–数组"
+
+#: ldfile.c:139
+#, c-format
+msgid "attempt to open %s failed\n"
+msgstr "试图打开 %s 失败\n"
+
+#: ldfile.c:141
+#, c-format
+msgid "attempt to open %s succeeded\n"
+msgstr "试图打开 %s æˆåŠŸ\n"
+
+#: ldfile.c:147
+#, fuzzy
+msgid "%F%P: invalid BFD target `%s'\n"
+msgstr "æ— æ•ˆçš„ç›®æ ‡å€¼ï¼"
+
+#: ldfile.c:255 ldfile.c:282
+#, fuzzy
+msgid "%P: skipping incompatible %s when searching for %s\n"
+msgstr "æœç´¢æ—¶æ€»æ˜¯æ£€æŸ¥ä¸¤æ¬¡"
+
+#: ldfile.c:267
+msgid "%F%P: attempted static link of dynamic object `%s'\n"
+msgstr ""
+
+#: ldfile.c:384
+msgid "%F%P: %s (%s): No such file: %E\n"
+msgstr "%F%P：%s (%s)：没有这个文件：%E\n"
+
+#: ldfile.c:387
+msgid "%F%P: %s: No such file: %E\n"
+msgstr "%F%P：%s：没有这个文件：%E\n"
+
+#: ldfile.c:417
+#, fuzzy
+msgid "%F%P: cannot find %s inside %s\n"
+msgstr "找ä¸åˆ° ‘nm’"
+
+#: ldfile.c:420
+msgid "%F%P: cannot find %s\n"
+msgstr "%F%P：找ä¸åˆ° %s\n"
+
+#: ldfile.c:437 ldfile.c:453
+#, c-format
+msgid "cannot find script file %s\n"
+msgstr "找ä¸åˆ°è„šæœ¬æ–‡ä»¶ %s\n"
+
+#: ldfile.c:439 ldfile.c:455
+#, c-format
+msgid "opened script file %s\n"
+msgstr "打开脚本文件 %s\n"
+
+#: ldfile.c:499
+msgid "%P%F: cannot open linker script file %s: %E\n"
+msgstr "%P%Fï¼šæ— æ³•æ‰“å¼€é“¾æŽ¥è„šæœ¬æ–‡ä»¶ %s：%E\n"
+
+#: ldfile.c:546
+#, fuzzy
+msgid "%P%F: cannot represent machine `%s'\n"
+msgstr "激活自动应ç”机(&A)"
+
+#: ldlang.c:511
+msgid "%P%F: out of memory during initialization"
+msgstr "%P%F：åˆå§‹åŒ–时内å˜ä¸è¶³"
+
+#: ldlang.c:551
+#, fuzzy
+msgid "%P:%S: warning: redeclaration of memory region '%s'\n"
+msgstr "è¦å‘Šï¼šæ£åœ¨ä½¿ç”¨ä¸å®‰å…¨çš„内å˜ï¼\n"
+
+#: ldlang.c:557
+msgid "%P:%S: warning: memory region %s not declared\n"
+msgstr "%P：%S：è¦å‘Šï¼šå†…å˜åŒºåŸŸ %s 未声明\n"
+
+#: ldlang.c:1073
+msgid ""
+"\n"
+"Memory Configuration\n"
+"\n"
+msgstr ""
+"\n"
+"内å˜é…ç½®\n"
+"\n"
+
+#: ldlang.c:1075
+msgid "Name"
+msgstr "å称"
+
+#: ldlang.c:1075
+msgid "Origin"
+msgstr "æ¥æº"
+
+#: ldlang.c:1075
+msgid "Length"
+msgstr "长度"
+
+#: ldlang.c:1075
+msgid "Attributes"
+msgstr "属性"
+
+#: ldlang.c:1115
+#, c-format
+msgid ""
+"\n"
+"Linker script and memory map\n"
+"\n"
+msgstr ""
+
+#: ldlang.c:1183
+msgid "%P%F: Illegal use of `%s' section\n"
+msgstr "%P%F：对‘%s’节的éžæ³•ä½¿ç”¨\n"
+
+#: ldlang.c:1193
+msgid "%P%F: output format %s cannot represent section called %s\n"
+msgstr ""
+
+#: ldlang.c:1775
+msgid "%B: file not recognized: %E\n"
+msgstr "%Bï¼šæ— æ³•è¯†åˆ«æ–‡ä»¶ï¼š%E\n"
+
+#: ldlang.c:1776
+#, fuzzy
+msgid "%B: matching formats:"
+msgstr "å¯ç”¨æ ¼å¼"
+
+#: ldlang.c:1783
+#, fuzzy
+msgid "%F%B: file not recognized: %E\n"
+msgstr "æ–‡ä»¶æ ¼å¼æ— 法识别。"
+
+#: ldlang.c:1847
+msgid "%F%B: member %B in archive is not an object\n"
+msgstr ""
+
+#: ldlang.c:1858 ldlang.c:1872
+#, fuzzy
+msgid "%F%B: could not read symbols: %E\n"
+msgstr "%sï¼šæ— æ³•è¯»å–地å€"
+
+#: ldlang.c:2127
+msgid "%P: warning: could not find any targets that match endianness requirement\n"
+msgstr ""
+
+#: ldlang.c:2141
+#, fuzzy
+msgid "%P%F: target %s not found\n"
+msgstr "文件未找到‘%s’"
+
+#: ldlang.c:2143
+msgid "%P%F: cannot open output file %s: %E\n"
+msgstr "%P%Fï¼šæ— æ³•æ‰“å¼€è¾“å‡ºæ–‡ä»¶ %s：%E\n"
+
+#: ldlang.c:2149
+#, fuzzy
+msgid "%P%F:%s: can not make object file: %E\n"
+msgstr "æ— æ³•è£…å…¥ .glade2 文件"
+
+#: ldlang.c:2153
+msgid "%P%F:%s: can not set architecture: %E\n"
+msgstr "%P%F:%sï¼šæ— æ³•è®¾ç½®æž¶æž„ï¼š%E\n"
+
+#: ldlang.c:2157
+msgid "%P%F: can not create link hash table: %E\n"
+msgstr ""
+
+#: ldlang.c:2301
+msgid "%P%F: bfd_hash_lookup failed creating symbol %s\n"
+msgstr ""
+
+#: ldlang.c:2319
+msgid "%P%F: bfd_hash_allocate failed creating symbol %s\n"
+msgstr ""
+
+#: ldlang.c:2710
+#, fuzzy
+msgid " load address 0x%V"
+msgstr "从地å€ç°¿è£…å…¥"
+
+#: ldlang.c:2874
+#, fuzzy
+msgid "%W (size before relaxing)\n"
+msgstr "å¯ç”¨é“¾æŽ¥å™¨æ¾å¼›"
+
+#: ldlang.c:2961
+#, fuzzy, c-format
+msgid "Address of section %s set to "
+msgstr "设定有å节的地å€"
+
+#: ldlang.c:3114
+#, fuzzy, c-format
+msgid "Fail with %d\n"
+msgstr "é…置为：%s\n"
+
+#: ldlang.c:3351
+#, fuzzy
+msgid "%X%P: section %s [%V -> %V] overlaps section %s [%V -> %V]\n"
+msgstr "节=地å€"
+
+#: ldlang.c:3379
+msgid "%X%P: address 0x%v of %B section %s is not within region %s\n"
+msgstr ""
+
+#: ldlang.c:3388
+#, fuzzy
+msgid "%X%P: region %s is full (%B section %s)\n"
+msgstr "ä¿å˜æ–‡ç« 出错“%sâ€ï¼ˆ%s满了？）"
+
+#: ldlang.c:3439
+msgid "%P%X: Internal error on COFF shared library section %s\n"
+msgstr ""
+
+#: ldlang.c:3493
+msgid "%P%F: error: no memory region specified for loadable section `%s'\n"
+msgstr ""
+
+#: ldlang.c:3498
+msgid "%P: warning: no memory region specified for loadable section `%s'\n"
+msgstr ""
+
+#: ldlang.c:3515
+msgid "%P: warning: changing start of section %s by %u bytes\n"
+msgstr ""
+
+#: ldlang.c:3532
+#, c-format
+msgid "%F%S: non constant or forward reference address expression for section %s\n"
+msgstr ""
+
+#: ldlang.c:3703
+#, fuzzy
+msgid "%P%F: can't relax section: %E\n"
+msgstr "未知的节å“%sâ€"
+
+#: ldlang.c:3960
+#, fuzzy
+msgid "%F%P: invalid data statement\n"
+msgstr "æ— æ•ˆçš„è¡¨è¾¾å¼è¯å¥"
+
+#: ldlang.c:3999
+#, fuzzy
+msgid "%F%P: invalid reloc statement\n"
+msgstr "æ— æ•ˆçš„è¡¨è¾¾å¼è¯å¥"
+
+#: ldlang.c:4141
+msgid "%P%F:%s: can't set start address\n"
+msgstr "%P%F:%sï¼šæ— æ³•è®¾ç½®èµ·å§‹åœ°å€\n"
+
+#: ldlang.c:4154 ldlang.c:4173
+msgid "%P%F: can't set start address\n"
+msgstr "%P%Fï¼šæ— æ³•è®¾ç½®èµ·å§‹åœ°å€\n"
+
+#: ldlang.c:4166
+msgid "%P: warning: cannot find entry symbol %s; defaulting to %V\n"
+msgstr ""
+
+#: ldlang.c:4178
+msgid "%P: warning: cannot find entry symbol %s; not setting start address\n"
+msgstr ""
+
+#: ldlang.c:4227
+msgid "%P%F: Relocatable linking with relocations from format %s (%B) to format %s (%B) is not supported\n"
+msgstr ""
+
+#: ldlang.c:4237
+msgid "%P: warning: %s architecture of input file `%B' is incompatible with %s output\n"
+msgstr ""
+
+#: ldlang.c:4259
+msgid "%P%X: failed to merge target specific data of file %B\n"
+msgstr ""
+
+#: ldlang.c:4343
+msgid ""
+"\n"
+"Allocating common symbols\n"
+msgstr ""
+"\n"
+"分é…公共符å·\n"
+
+#: ldlang.c:4344
+msgid ""
+"Common symbol size file\n"
+"\n"
+msgstr ""
+"å…¬å…±ç¬¦å· å¤§å° æ–‡ä»¶\n"
+"\n"
+
+#: ldlang.c:4470
+#, fuzzy
+msgid "%P%F: invalid syntax in flags\n"
+msgstr "Comment=è¯æ³•æœ‰é”™"
+
+#: ldlang.c:4740
+msgid "%P%F: Failed to create hash table\n"
+msgstr "%P%Fï¼šæ— æ³•åˆ›å»ºæ•£åˆ—è¡¨\n"
+
+#: ldlang.c:5057
+#, fuzzy
+msgid "%P%Fmultiple STARTUP files\n"
+msgstr "å¯åŠ¨æ—¶é‡æ–°æ‰“开文件(&F)"
+
+#: ldlang.c:5105
+msgid "%X%P:%S: section has both a load address and a load region\n"
+msgstr ""
+
+#: ldlang.c:5345
+#, fuzzy
+msgid "%F%P: bfd_record_phdr failed: %E\n"
+msgstr "%s：记录归零时失败：%s\n"
+
+#: ldlang.c:5365
+msgid "%X%P: section `%s' assigned to non-existent phdr `%s'\n"
+msgstr ""
+
+#: ldlang.c:5751
+#, fuzzy
+msgid "%X%P: unknown language `%s' in version information\n"
+msgstr "%%:version-compare ä¸æœ‰æœªçŸ¥çš„æ“作数‘%s’"
+
+#: ldlang.c:5893
+msgid "%X%P: anonymous version tag cannot be combined with other version tags\n"
+msgstr ""
+
+#: ldlang.c:5902
+msgid "%X%P: duplicate version tag `%s'\n"
+msgstr "%X%P：é‡å¤çš„ç‰ˆæœ¬æ ‡è®°â€˜%s’\n"
+
+#: ldlang.c:5922 ldlang.c:5931 ldlang.c:5948 ldlang.c:5958
+msgid "%X%P: duplicate expression `%s' in version information\n"
+msgstr ""
+
+#: ldlang.c:5998
+#, fuzzy
+msgid "%X%P: unable to find version dependency `%s'\n"
+msgstr "æ— æ³•æ‰“å¼€åŠ¨æ€ä¾èµ–项‘%s’"
+
+#: ldlang.c:6020
+msgid "%X%P: unable to read .exports section contents\n"
+msgstr ""
+
+#: ldmain.c:229
+msgid "%X%P: can't set BFD default target to `%s': %E\n"
+msgstr ""
+
+#: ldmain.c:341
+msgid "%P%F: --relax and -r may not be used together\n"
+msgstr "%P%F：-relax å’Œ -r ä¸èƒ½ä¸€èµ·ä½¿ç”¨\n"
+
+#: ldmain.c:343
+msgid "%P%F: -r and -shared may not be used together\n"
+msgstr "%P%F：-r å’Œ -shared ä¸èƒ½ä¸€èµ·ä½¿ç”¨\n"
+
+#: ldmain.c:347
+msgid "%P%F: -static and -shared may not be used together\n"
+msgstr "%P%F：-static å’Œ -shared ä¸èƒ½ä¸€èµ·ä½¿ç”¨\n"
+
+#: ldmain.c:352
+msgid "%P%F: -F may not be used without -shared\n"
+msgstr "%P%F：-F 必须与 -shared 一起作用\n"
+
+#: ldmain.c:354
+msgid "%P%F: -f may not be used without -shared\n"
+msgstr "%P%F：-f 必须与 -shared 一起作用\n"
+
+#: ldmain.c:396
+msgid "using external linker script:"
+msgstr "使用外部链接脚本："
+
+#: ldmain.c:398
+msgid "using internal linker script:"
+msgstr "使用内部链接脚本："
+
+#: ldmain.c:432
+msgid "%P%F: no input files\n"
+msgstr "%P%F：没有输入文件\n"
+
+#: ldmain.c:436
+msgid "%P: mode %s\n"
+msgstr "%Pï¼šæ¨¡å¼ %s\n"
+
+#: ldmain.c:452
+#, fuzzy
+msgid "%P%F: cannot open map file %s: %E\n"
+msgstr "%sï¼šæ— æ³•æ‰“å¼€å›¾æ–‡ä»¶\n"
+
+#: ldmain.c:482
+msgid "%P: link errors found, deleting executable `%s'\n"
+msgstr ""
+
+#: ldmain.c:491
+#, fuzzy
+msgid "%F%B: final close failed: %E\n"
+msgstr "æ— æ³•å…³é—文件“%sâ€ï¼š%s"
+
+#: ldmain.c:517
+#, fuzzy
+msgid "%X%P: unable to open for source of copy `%s'\n"
+msgstr "æ— æ³•ç¡®å®š %1 çš„æºç±»åž‹ã€‚"
+
+#: ldmain.c:520
+#, fuzzy
+msgid "%X%P: unable to open for destination of copy `%s'\n"
+msgstr "<qt>æ— æ³•æ‰“å¼€ <b>%1</b> 读å–。</qt>"
+
+#: ldmain.c:527
+msgid "%P: Error writing file `%s'\n"
+msgstr "%P：写入文件‘%s’时出错\n"
+
+#: ldmain.c:532 pe-dll.c:1447
+#, c-format
+msgid "%P: Error closing file `%s'\n"
+msgstr "%P：关é—文件‘%s’时出错\n"
+
+#: ldmain.c:548
+#, c-format
+msgid "%s: total time in link: %ld.%06ld\n"
+msgstr ""
+
+#: ldmain.c:551
+#, fuzzy, c-format
+msgid "%s: data size %ld\n"
+msgstr "读å–æ•°æ®å¤§å°"
+
+#: ldmain.c:634
+#, fuzzy
+msgid "%P%F: missing argument to -m\n"
+msgstr "‘%s’缺少实å‚\n"
+
+#: ldmain.c:780 ldmain.c:798 ldmain.c:828
+msgid "%P%F: bfd_hash_table_init failed: %E\n"
+msgstr ""
+
+#: ldmain.c:784 ldmain.c:802
+#, fuzzy
+msgid "%P%F: bfd_hash_lookup failed: %E\n"
+msgstr "主机寻找失败：%s：没有找到主机"
+
+#: ldmain.c:816
+msgid "%X%P: error: duplicate retain-symbols-file\n"
+msgstr ""
+
+#: ldmain.c:858
+msgid "%P%F: bfd_hash_lookup for insertion failed: %E\n"
+msgstr ""
+
+#: ldmain.c:863
+msgid "%P: `-retain-symbols-file' overrides `-s' and `-S'\n"
+msgstr "%P：‘-retain-symbols-file’覆盖了‘-s’和‘-S’\n"
+
+#: ldmain.c:938
+#, c-format
+msgid ""
+"Archive member included because of file (symbol)\n"
+"\n"
+msgstr ""
+
+#: ldmain.c:1008
+#, fuzzy
+msgid "%X%C: multiple definition of `%T'\n"
+msgstr "%q#T 多次定义"
+
+#: ldmain.c:1011
+msgid "%D: first defined here\n"
+msgstr "%D：第一次在æ¤å®šä¹‰\n"
+
+#: ldmain.c:1015
+msgid "%P: Disabling relaxation: it will not work with multiple definitions\n"
+msgstr ""
+
+#: ldmain.c:1045
+#, fuzzy
+msgid "%B: warning: definition of `%T' overriding common\n"
+msgstr "%s：%d：è¦å‘Šï¼š%s 的定义未被转化\n"
+
+#: ldmain.c:1048
+#, fuzzy
+msgid "%B: warning: common is here\n"
+msgstr "%J被éšè—的声明在这里"
+
+#: ldmain.c:1055
+msgid "%B: warning: common of `%T' overridden by definition\n"
+msgstr ""
+
+#: ldmain.c:1058
+msgid "%B: warning: defined here\n"
+msgstr "%B：è¦å‘Šï¼šåœ¨æ¤å®šä¹‰\n"
+
+#: ldmain.c:1065
+msgid "%B: warning: common of `%T' overridden by larger common\n"
+msgstr ""
+
+#: ldmain.c:1068
+msgid "%B: warning: larger common is here\n"
+msgstr ""
+
+#: ldmain.c:1072
+msgid "%B: warning: common of `%T' overriding smaller common\n"
+msgstr ""
+
+#: ldmain.c:1075
+msgid "%B: warning: smaller common is here\n"
+msgstr ""
+
+#: ldmain.c:1079
+#, fuzzy
+msgid "%B: warning: multiple common of `%T'\n"
+msgstr ""
+"\n"
+"分é…公共符å·\n"
+
+#: ldmain.c:1081
+msgid "%B: warning: previous common is here\n"
+msgstr ""
+
+#: ldmain.c:1101 ldmain.c:1139
+#, fuzzy
+msgid "%P: warning: global constructor %s used\n"
+msgstr "寄å˜å™¨ç”¨ä½œä¸¤ä¸ªå…¨å±€å¯„å˜å™¨å˜é‡"
+
+#: ldmain.c:1149
+msgid "%P%F: BFD backend error: BFD_RELOC_CTOR unsupported\n"
+msgstr ""
+
+#. We found a reloc for the symbol we are looking for.
+#: ldmain.c:1203 ldmain.c:1205 ldmain.c:1207 ldmain.c:1245 ldmain.c:1293
+msgid "warning: "
+msgstr "è¦å‘Šï¼š"
+
+#: ldmain.c:1327
+msgid "%F%P: bfd_hash_table_init failed: %E\n"
+msgstr ""
+
+#: ldmain.c:1334
+#, fuzzy
+msgid "%F%P: bfd_hash_lookup failed: %E\n"
+msgstr "主机寻找失败：%s：没有找到主机"
+
+#: ldmain.c:1355
+msgid "%X%C: undefined reference to `%T'\n"
+msgstr "%X%C：对‘%T’未定义的引用\n"
+
+#: ldmain.c:1358
+#, fuzzy
+msgid "%C: warning: undefined reference to `%T'\n"
+msgstr "%B：è¦å‘Šï¼šå¯¹â€˜%T’未定义的引用\n"
+
+#: ldmain.c:1364
+msgid "%X%D: more undefined references to `%T' follow\n"
+msgstr ""
+
+#: ldmain.c:1367
+msgid "%D: warning: more undefined references to `%T' follow\n"
+msgstr ""
+
+#: ldmain.c:1378
+msgid "%X%B: undefined reference to `%T'\n"
+msgstr "%X%B：对‘%T’未定义的引用\n"
+
+#: ldmain.c:1381
+msgid "%B: warning: undefined reference to `%T'\n"
+msgstr "%B：è¦å‘Šï¼šå¯¹â€˜%T’未定义的引用\n"
+
+#: ldmain.c:1387
+msgid "%X%B: more undefined references to `%T' follow\n"
+msgstr ""
+
+#: ldmain.c:1390
+msgid "%B: warning: more undefined references to `%T' follow\n"
+msgstr ""
+
+#: ldmain.c:1425 ldmain.c:1478 ldmain.c:1496
+msgid "%P%X: generated"
+msgstr "%P%X：已生æˆ"
+
+#: ldmain.c:1432
+msgid " additional relocation overflows omitted from the output\n"
+msgstr ""
+
+#: ldmain.c:1445
+msgid " relocation truncated to fit: %s against undefined symbol `%T'"
+msgstr ""
+
+#: ldmain.c:1450
+msgid " relocation truncated to fit: %s against symbol `%T' defined in %A section in %B"
+msgstr ""
+
+#: ldmain.c:1460
+msgid " relocation truncated to fit: %s against `%T'"
+msgstr ""
+
+#: ldmain.c:1481
+#, c-format
+msgid "dangerous relocation: %s\n"
+msgstr "å±é™©çš„é‡å®šä½ï¼š%s\n"
+
+#: ldmain.c:1499
+msgid " reloc refers to symbol `%T' which is not being output\n"
+msgstr ""
+
+#: ldmisc.c:149
+#, c-format
+msgid "no symbol"
+msgstr "没有符å·"
+
+#: ldmisc.c:240
+#, c-format
+msgid "built in linker script:%u"
+msgstr "内建链接脚本：%u"
+
+#: ldmisc.c:289 ldmisc.c:293
+msgid "%B%F: could not read symbols\n"
+msgstr "%B%Fï¼šæ— æ³•è¯»å–符å·\n"
+
+#: ldmisc.c:329
+msgid "%B: In function `%T':\n"
+msgstr "%B：在函数‘%T’ä¸ï¼š\n"
+
+#: ldmisc.c:480
+msgid "%F%P: internal error %s %d\n"
+msgstr "%F%P：内部错误 %s %d\n"
+
+#: ldmisc.c:526
+msgid "%P: internal error: aborting at %s line %d in %s\n"
+msgstr ""
+
+#: ldmisc.c:529
+msgid "%P: internal error: aborting at %s line %d\n"
+msgstr "%P：内部错误：于 %s 行 %d 放弃\n"
+
+#: ldmisc.c:531
+msgid "%P%F: please report this bug\n"
+msgstr "%P%F：请报告æ¤é”™è¯¯\n"
+
+#. Output for noisy == 2 is intended to follow the GNU standards.
+#: ldver.c:38
+#, c-format
+msgid "GNU ld version %s\n"
+msgstr "GNU ld 版本 %s\n"
+
+#: ldver.c:42
+#, c-format
+msgid "Copyright 2005 Free Software Foundation, Inc.\n"
+msgstr "版æƒæ‰€æœ‰ 2005 自由软件基金会\n"
+
+#: ldver.c:43
+#, c-format
+msgid ""
+"This program is free software; you may redistribute it under the terms of\n"
+"the GNU General Public License. This program has absolutely no warranty.\n"
+msgstr ""
+"本程åºæ˜¯è‡ªç”±è½¯ä»¶ï¼›æ‚¨å¯ä»¥åœ¨éµå¾ª GNU 通用公共许å¯è¯çš„å‰æ下分å‘。本程åºä¸å«ä»»ä½•\n"
+"æ‹…ä¿ã€‚\n"
+
+#: ldver.c:52
+#, c-format
+msgid " Supported emulations:\n"
+msgstr " 支æŒçš„仿真：\n"
+
+#: ldwrite.c:55 ldwrite.c:191
+msgid "%P%F: bfd_new_link_order failed\n"
+msgstr ""
+
+#: ldwrite.c:341
+msgid "%F%P: cannot create split section name for %s\n"
+msgstr ""
+
+#: ldwrite.c:353
+#, fuzzy
+msgid "%F%P: clone section failed: %E\n"
+msgstr "verify_ssa 失败"
+
+#: ldwrite.c:391
+#, fuzzy, c-format
+msgid "%8x something else\n"
+msgstr "#else 没有匹é…çš„ #if"
+
+#: ldwrite.c:561
+#, fuzzy
+msgid "%F%P: final link failed: %E\n"
+msgstr "æ— æ³•å°†â€œ%sâ€é“¾æŽ¥åˆ°â€œ%sâ€ï¼š%s"
+
+#: lexsup.c:195 lexsup.c:327
+msgid "KEYWORD"
+msgstr "关键å—"
+
+#: lexsup.c:195
+msgid "Shared library control for HP/UX compatibility"
+msgstr ""
+
+#: lexsup.c:198
+msgid "ARCH"
+msgstr "架构"
+
+#: lexsup.c:198
+msgid "Set architecture"
+msgstr "设定 CPU 架构"
+
+#: lexsup.c:200 lexsup.c:421
+msgid "TARGET"
+msgstr "ç›®æ ‡"
+
+#: lexsup.c:200
+msgid "Specify target for following input files"
+msgstr "指定éšåŽçš„è¾“å…¥æ–‡ä»¶çš„ç›®æ ‡"
+
+#: lexsup.c:203 lexsup.c:252 lexsup.c:264 lexsup.c:277 lexsup.c:380
+#: lexsup.c:433 lexsup.c:490
+msgid "FILE"
+msgstr "文件"
+
+#: lexsup.c:203
+msgid "Read MRI format linker script"
+msgstr "è¯»å– MRI æ ¼å¼çš„链接脚本"
+
+#: lexsup.c:205
+msgid "Force common symbols to be defined"
+msgstr "强制公共符å·å¿…须定义"
+
+#: lexsup.c:209 lexsup.c:475 lexsup.c:477 lexsup.c:479
+msgid "ADDRESS"
+msgstr "地å€"
+
+#: lexsup.c:209
+msgid "Set start address"
+msgstr "设定起始地å€"
+
+#: lexsup.c:211
+msgid "Export all dynamic symbols"
+msgstr "导出所有动æ€ç¬¦å·"
+
+#: lexsup.c:213
+msgid "Link big-endian objects"
+msgstr "链接高ä½å—节在å‰çš„ç›®æ ‡æ–‡ä»¶"
+
+#: lexsup.c:215
+msgid "Link little-endian objects"
+msgstr "链接低ä½å—节在å‰çš„ç›®æ ‡æ–‡ä»¶"
+
+#: lexsup.c:217 lexsup.c:220
+msgid "SHLIB"
+msgstr "共享库"
+
+#: lexsup.c:217
+msgid "Auxiliary filter for shared object symbol table"
+msgstr "指定为æŸå…±äº«å¯¹è±¡ç¬¦å·è¡¨çš„辅助过滤器"
+
+#: lexsup.c:220
+msgid "Filter for shared object symbol table"
+msgstr "指定为æŸå…±äº«å¯¹è±¡ç¬¦å·è¡¨çš„过滤器"
+
+#: lexsup.c:223
+msgid "Ignored"
+msgstr "忽略"
+
+#: lexsup.c:225
+msgid "SIZE"
+msgstr "大å°"
+
+#: lexsup.c:225
+msgid "Small data size (if no size, same as --shared)"
+msgstr "å°æ•°æ®çš„大å°(如果未给出大å°ï¼Œä¸Ž --shared 相åŒ)"
+
+#: lexsup.c:228
+msgid "FILENAME"
+msgstr "文件å"
+
+#: lexsup.c:228
+msgid "Set internal name of shared library"
+msgstr "设定共享库的内部å称"
+
+#: lexsup.c:230
+msgid "PROGRAM"
+msgstr "程åº"
+
+#: lexsup.c:230
+msgid "Set PROGRAM as the dynamic linker to use"
+msgstr "将“程åºâ€è®¾ä¸ºè¦ä½¿ç”¨çš„动æ€é“¾æŽ¥å™¨"
+
+#: lexsup.c:233
+msgid "LIBNAME"
+msgstr "库å"
+
+#: lexsup.c:233
+msgid "Search for library LIBNAME"
+msgstr "æœç´¢åº““库åâ€"
+
+#: lexsup.c:235
+msgid "DIRECTORY"
+msgstr "目录"
+
+#: lexsup.c:235
+msgid "Add DIRECTORY to library search path"
+msgstr "将“目录â€æ·»åŠ 到库æœç´¢è·¯å¾„ä¸"
+
+#: lexsup.c:238
+#, fuzzy
+msgid "Override the default sysroot location"
+msgstr "替代默认的主目录。"
+
+#: lexsup.c:240
+msgid "EMULATION"
+msgstr "仿真"
+
+#: lexsup.c:240
+msgid "Set emulation"
+msgstr "设定仿真"
+
+#: lexsup.c:242
+msgid "Print map file on standard output"
+msgstr "åœ¨æ ‡å‡†è¾“å‡ºä¸Šæ‰“å°é“¾æŽ¥å›¾æ–‡ä»¶"
+
+#: lexsup.c:244
+msgid "Do not page align data"
+msgstr "ä¸å°†æ•°æ®å¯¹é½è‡³é¡µè¾¹ç•Œ"
+
+#: lexsup.c:246
+msgid "Do not page align data, do not make text readonly"
+msgstr "ä¸å°†æ•°æ®å¯¹é½è‡³é¡µè¾¹ç•Œï¼Œä¸å°† text 节åªè¯»"
+
+#: lexsup.c:249
+msgid "Page align data, make text readonly"
+msgstr "将数æ®å¯¹é½è‡³é¡µè¾¹ç•Œï¼Œä»¤ text 节åªè¯»"
+
+#: lexsup.c:252
+msgid "Set output file name"
+msgstr "设定输出文件å"
+
+#: lexsup.c:254
+msgid "Optimize output file"
+msgstr "优化输出文件"
+
+#: lexsup.c:256
+msgid "Ignored for SVR4 compatibility"
+msgstr "为 SVR4 兼容性所忽略"
+
+#: lexsup.c:260
+msgid "Generate relocatable output"
+msgstr "生æˆå¯é‡æ–°å®šä½çš„输出"
+
+#: lexsup.c:264
+msgid "Just link symbols (if directory, same as --rpath)"
+msgstr "ä»…é“¾æŽ¥ç¬¦å· (å¦‚æžœæ˜¯ç›®æ ‡ï¼Œä¸Ž --rpath 相åŒ)"
+
+#: lexsup.c:267
+msgid "Strip all symbols"
+msgstr "剔除所有符å·ä¿¡æ¯"
+
+#: lexsup.c:269
+msgid "Strip debugging symbols"
+msgstr "剔除调试符å·ä¿¡æ¯"
+
+#: lexsup.c:271
+msgid "Strip symbols in discarded sections"
+msgstr "剔除被丢弃的节ä¸çš„符å·"
+
+#: lexsup.c:273
+msgid "Do not strip symbols in discarded sections"
+msgstr "ä¸å‰”除被丢弃的节ä¸çš„符å·"
+
+#: lexsup.c:275
+msgid "Trace file opens"
+msgstr "跟踪文件打开æ“作"
+
+#: lexsup.c:277
+msgid "Read linker script"
+msgstr "读å–链接脚本"
+
+#: lexsup.c:279 lexsup.c:297 lexsup.c:363 lexsup.c:378 lexsup.c:468
+#: lexsup.c:493 lexsup.c:520
+msgid "SYMBOL"
+msgstr "符å·"
+
+#: lexsup.c:279
+msgid "Start with undefined reference to SYMBOL"
+msgstr ""
+
+#: lexsup.c:282
+msgid "[=SECTION]"
+msgstr "[=节]"
+
+#: lexsup.c:283
+msgid "Don't merge input [SECTION | orphan] sections"
+msgstr "ä¸åˆå¹¶å为“节â€çš„输入节或å¤ç«‹èŠ‚"
+
+#: lexsup.c:285
+msgid "Build global constructor/destructor tables"
+msgstr "生æˆå…¨å±€æž„é€ /æžæž„函数表"
+
+#: lexsup.c:287
+msgid "Print version information"
+msgstr "显示版本信æ¯"
+
+#: lexsup.c:289
+msgid "Print version and emulation information"
+msgstr "显示版本和仿真信æ¯"
+
+#: lexsup.c:291
+msgid "Discard all local symbols"
+msgstr "丢弃所有局部符å·"
+
+#: lexsup.c:293
+msgid "Discard temporary local symbols (default)"
+msgstr "丢弃临时局部符å·(默认)"
+
+#: lexsup.c:295
+msgid "Don't discard any local symbols"
+msgstr "ä¸ä¸¢å¼ƒä»»ä½•å±€éƒ¨ç¬¦å·"
+
+#: lexsup.c:297
+#, fuzzy
+msgid "Trace mentions of SYMBOL"
+msgstr "符å·â€˜%s’未知"
+
+#: lexsup.c:299 lexsup.c:435 lexsup.c:437
+msgid "PATH"
+msgstr "路径"
+
+#: lexsup.c:299
+msgid "Default search path for Solaris compatibility"
+msgstr ""
+
+#: lexsup.c:302
+msgid "Start a group"
+msgstr "开始一个组"
+
+#: lexsup.c:304
+msgid "End a group"
+msgstr "结æŸä¸€ä¸ªç»„"
+
+#: lexsup.c:308
+msgid "Accept input files whose architecture cannot be determined"
+msgstr "接å—æ— æ³•å†³å®šå…¶æž¶æž„çš„è¾“å…¥æ–‡ä»¶"
+
+#: lexsup.c:312
+msgid "Reject input files whose architecture is unknown"
+msgstr "æ‹’ç»æž¶æž„ä¸æ˜Žçš„输入文件"
+
+#: lexsup.c:315
+msgid ""
+"Set DT_NEEDED tags for DT_NEEDED entries in\n"
+"\t\t\t\tfollowing dynamic libs"
+msgstr ""
+
+#: lexsup.c:318
+msgid ""
+"Do not set DT_NEEDED tags for DT_NEEDED entries\n"
+"\t\t\t\tin following dynamic libs"
+msgstr ""
+
+#: lexsup.c:321
+msgid "Only set DT_NEEDED for following dynamic libs if used"
+msgstr ""
+
+#: lexsup.c:324
+msgid "Always set DT_NEEDED for following dynamic libs"
+msgstr ""
+
+#: lexsup.c:327
+msgid "Ignored for SunOS compatibility"
+msgstr "为 SunOS 兼容性所忽略"
+
+#: lexsup.c:329
+msgid "Link against shared libraries"
+msgstr "链接到共享库"
+
+#: lexsup.c:335
+msgid "Do not link against shared libraries"
+msgstr "ä¸é“¾æŽ¥åˆ°å…±äº«åº“"
+
+#: lexsup.c:343
+msgid "Bind global references locally"
+msgstr ""
+
+#: lexsup.c:345
+msgid "Check section addresses for overlaps (default)"
+msgstr ""
+
+#: lexsup.c:348
+msgid "Do not check section addresses for overlaps"
+msgstr ""
+
+#: lexsup.c:351
+msgid "Output cross reference table"
+msgstr "输出交å‰å¼•ç”¨è¡¨"
+
+#: lexsup.c:353
+msgid "SYMBOL=EXPRESSION"
+msgstr "符å·=表达å¼"
+
+#: lexsup.c:353
+msgid "Define a symbol"
+msgstr "定义一个符å·"
+
+#: lexsup.c:355
+msgid "[=STYLE]"
+msgstr "[=é£Žæ ¼]"
+
+#: lexsup.c:355
+msgid "Demangle symbol names [using STYLE]"
+msgstr "解修饰符å·å[ä½¿ç”¨â€œé£Žæ ¼â€]"
+
+#: lexsup.c:358
+#, fuzzy
+msgid "Generate embedded relocs"
+msgstr "æ ¼å¼å—符串嵌有 %<\\0%>"
+
+#: lexsup.c:360
+msgid "Treat warnings as errors"
+msgstr "å°†è¦å‘Šå½“作错误"
+
+#: lexsup.c:363
+msgid "Call SYMBOL at unload-time"
+msgstr ""
+
+#: lexsup.c:365
+msgid "Force generation of file with .exe suffix"
+msgstr "强制为生æˆçš„æ–‡ä»¶æ·»åŠ .exe åŽç¼€"
+
+#: lexsup.c:367
+msgid "Remove unused sections (on some targets)"
+msgstr "åˆ é™¤æœªä½¿ç”¨çš„èŠ‚(在æŸäº›ç›®æ ‡ä¸Š)"
+
+#: lexsup.c:370
+msgid "Don't remove unused sections (default)"
+msgstr "ä¸åˆ 除未使用的节(默认)"
+
+#: lexsup.c:373
+msgid "Set default hash table size close to <NUMBER>"
+msgstr "åˆå§‹çš„散列表大å°è®¾å®šæŽ¥è¿‘“数â€"
+
+#: lexsup.c:376
+msgid "Print option help"
+msgstr "显示选项帮助"
+
+#: lexsup.c:378
+msgid "Call SYMBOL at load-time"
+msgstr ""
+
+#: lexsup.c:380
+msgid "Write a map file"
+msgstr "写入一个链接图文件"
+
+#: lexsup.c:382
+msgid "Do not define Common storage"
+msgstr ""
+
+#: lexsup.c:384
+msgid "Do not demangle symbol names"
+msgstr ""
+
+#: lexsup.c:386
+msgid "Use less memory and more disk I/O"
+msgstr "更多地使用ç£ç›˜ I/O 而ä¸æ˜¯å†…å˜"
+
+#: lexsup.c:388
+msgid "Do not allow unresolved references in object files"
+msgstr "ä¸å…è®¸åœ¨ç›®æ ‡æ–‡ä»¶ä¸å˜åœ¨æ— 法解æžçš„引用"
+
+#: lexsup.c:391
+msgid "Allow unresolved references in shared libaries"
+msgstr "å…è®¸åœ¨ç›®æ ‡æ–‡ä»¶ä¸å˜åœ¨æ— 法解æžçš„引用"
+
+#: lexsup.c:395
+msgid "Do not allow unresolved references in shared libs"
+msgstr "ä¸å…许在共享库ä¸å˜åœ¨æ— 法解æžçš„引用"
+
+#: lexsup.c:399
+msgid "Allow multiple definitions"
+msgstr "å…许多个定义"
+
+#: lexsup.c:401
+msgid "Disallow undefined version"
+msgstr "ä¸å…许未定义的版本"
+
+#: lexsup.c:403
+msgid "Create default symbol version"
+msgstr "生æˆé»˜è®¤çš„符å·ç‰ˆæœ¬"
+
+#: lexsup.c:406
+msgid "Create default symbol version for imported symbols"
+msgstr "为导入符å·ç”Ÿæˆé»˜è®¤çš„符å·ç‰ˆæœ¬"
+
+#: lexsup.c:409
+msgid "Don't warn about mismatched input files"
+msgstr "ä¸ä¸ºä¸åŒ¹é…的输入文件å‘出è¦å‘Š"
+
+#: lexsup.c:411
+msgid "Turn off --whole-archive"
+msgstr "å…³é— --whole-archive"
+
+#: lexsup.c:413
+msgid "Create an output file even if errors occur"
+msgstr ""
+
+#: lexsup.c:418
+msgid ""
+"Only use library directories specified on\n"
+"\t\t\t\tthe command line"
+msgstr "åªä½¿ç”¨å‘½ä»¤è¡Œä¸ç»™å‡ºçš„库目录"
+
+#: lexsup.c:421
+msgid "Specify target of output file"
+msgstr "æŒ‡å®šè¾“å‡ºæ–‡ä»¶çš„ç›®æ ‡"
+
+#: lexsup.c:424
+msgid "Ignored for Linux compatibility"
+msgstr "为 Linux 兼容性所忽略"
+
+#: lexsup.c:427
+msgid "Reduce memory overheads, possibly taking much longer"
+msgstr ""
+
+#: lexsup.c:430
+msgid "Relax branches on certain targets"
+msgstr "为æŸäº›ç›®æ ‡ä¼˜åŒ–分支"
+
+#: lexsup.c:433
+msgid "Keep only symbols listed in FILE"
+msgstr "åªä¿ç•™åœ¨â€œæ–‡ä»¶â€ä¸åˆ—出的符å·"
+
+#: lexsup.c:435
+msgid "Set runtime shared library search path"
+msgstr "设定è¿è¡Œæ—¶å…±äº«åº“çš„æœç´¢è·¯å¾„"
+
+#: lexsup.c:437
+msgid "Set link time shared library search path"
+msgstr "设定链接时共享库的æœç´¢è·¯å¾„"
+
+#: lexsup.c:440
+msgid "Create a shared library"
+msgstr "创建一个共享库"
+
+#: lexsup.c:444
+msgid "Create a position independent executable"
+msgstr "生æˆä¸€ä¸ªä½ç½®æ— 关的å¯æ‰§è¡Œæ–‡ä»¶"
+
+#: lexsup.c:448
+#, fuzzy
+msgid "Sort common symbols by size"
+msgstr "按文件大å°æŽ’åºæ–‡ä»¶åˆ—表"
+
+#: lexsup.c:452
+msgid "name|alignment"
+msgstr "å称|对é½"
+
+#: lexsup.c:453
+msgid "Sort sections by name or maximum alignment"
+msgstr ""
+
+#: lexsup.c:455
+msgid "COUNT"
+msgstr "计数"
+
+#: lexsup.c:455
+msgid "How many tags to reserve in .dynamic section"
+msgstr ""
+
+#: lexsup.c:458
+msgid "[=SIZE]"
+msgstr "[=大å°]"
+
+#: lexsup.c:458
+msgid "Split output sections every SIZE octets"
+msgstr ""
+
+#: lexsup.c:461
+msgid "[=COUNT]"
+msgstr "[=计数]"
+
+#: lexsup.c:461
+msgid "Split output sections every COUNT relocs"
+msgstr ""
+
+#: lexsup.c:464
+msgid "Print memory usage statistics"
+msgstr "打å°å†…å˜ä½¿ç”¨ç»Ÿè®¡"
+
+#: lexsup.c:466
+msgid "Display target specific options"
+msgstr "æ˜¾ç¤ºç›®æ ‡ç›¸å…³çš„é€‰é¡¹"
+
+#: lexsup.c:468
+#, fuzzy
+msgid "Do task level linking"
+msgstr "任务下移(_W)"
+
+#: lexsup.c:470
+msgid "Use same format as native linker"
+msgstr ""
+
+#: lexsup.c:472
+msgid "SECTION=ADDRESS"
+msgstr "节=地å€"
+
+#: lexsup.c:472
+msgid "Set address of named section"
+msgstr "设定有å节的地å€"
+
+#: lexsup.c:475
+msgid "Set address of .bss section"
+msgstr "设定 .bss 节的地å€"
+
+#: lexsup.c:477
+msgid "Set address of .data section"
+msgstr "设定 .data 节的地å€"
+
+#: lexsup.c:479
+msgid "Set address of .text section"
+msgstr "设定 .text 节的地å€"
+
+#: lexsup.c:482
+msgid ""
+"How to handle unresolved symbols. <method> is:\n"
+"\t\t\t\tignore-all, report-all, ignore-in-object-files,\n"
+"\t\t\t\tignore-in-shared-libs"
+msgstr ""
+"如何处ç†ä¸èƒ½è§£æžçš„符å·ã€‚方法å¯ä»¥æ˜¯ï¼š\n"
+"\t\t\t\tignore-all，report-all，ignore-in-object-files，\n"
+"\t\t\t\tignore-in-shared-libs"
+
+#: lexsup.c:486
+msgid "Output lots of information during link"
+msgstr "链接过程ä¸è¾“出大é‡ç›¸å…³ä¿¡æ¯"
+
+#: lexsup.c:490
+msgid "Read version information script"
+msgstr "读å–版本信æ¯è„šæœ¬"
+
+#: lexsup.c:493
+msgid ""
+"Take export symbols list from .exports, using\n"
+"\t\t\t\tSYMBOL as the version."
+msgstr ""
+
+#: lexsup.c:496
+msgid "Warn about duplicate common symbols"
+msgstr "为é‡å¤çš„公共符å·ç»™å‡ºè¦å‘Š"
+
+#: lexsup.c:498
+msgid "Warn if global constructors/destructors are seen"
+msgstr ""
+
+#: lexsup.c:501
+msgid "Warn if the multiple GP values are used"
+msgstr ""
+
+#: lexsup.c:503
+msgid "Warn only once per undefined symbol"
+msgstr "为æ¯ä¸€ä¸ªæœªå®šä¹‰çš„符å·åªè¦å‘Šä¸€æ¬¡"
+
+#: lexsup.c:505
+msgid "Warn if start of section changes due to alignment"
+msgstr ""
+
+#: lexsup.c:508
+msgid "Warn if shared object has DT_TEXTREL"
+msgstr ""
+
+#: lexsup.c:512
+msgid "Report unresolved symbols as warnings"
+msgstr "å°†ä¸èƒ½è§£æžçš„符å·è§†ä½œè¦å‘Š"
+
+#: lexsup.c:515
+msgid "Report unresolved symbols as errors"
+msgstr "å°†ä¸èƒ½è§£æžçš„符å·è§†ä½œé”™è¯¯"
+
+#: lexsup.c:517
+msgid "Include all objects from following archives"
+msgstr ""
+
+#: lexsup.c:520
+msgid "Use wrapper functions for SYMBOL"
+msgstr ""
+
+#: lexsup.c:667
+msgid "%P: unrecognized option '%s'\n"
+msgstr "%Pï¼šæ— æ³•è¯†åˆ«çš„é€‰é¡¹â€˜%s’\n"
+
+#: lexsup.c:669
+msgid "%P%F: use the --help option for usage information\n"
+msgstr "%P%F：使用 --help 选项以获å–使用信æ¯\n"
+
+#: lexsup.c:687
+msgid "%P%F: unrecognized -a option `%s'\n"
+msgstr "%P%Fï¼šæ— æ³•è¯†åˆ«çš„ -a 选项‘%s’\n"
+
+#: lexsup.c:700
+msgid "%P%F: unrecognized -assert option `%s'\n"
+msgstr "%P%Fï¼šæ— æ³•è¯†åˆ«çš„ -assert 选项‘%s’\n"
+
+#: lexsup.c:743
+#, fuzzy
+msgid "%F%P: unknown demangling style `%s'"
+msgstr "æœªçŸ¥çš„è§£ä¿®é¥°é£Žæ ¼â€˜%s’"
+
+#: lexsup.c:805
+msgid "%P%F: invalid number `%s'\n"
+msgstr "%P%Fï¼šæ— æ•ˆçš„æ•°â€˜%s’\n"
+
+#: lexsup.c:897
+msgid "%P%F: bad --unresolved-symbols option: %s\n"
+msgstr "%P%F：--unresolved-symbols é€‰é¡¹æ— æ•ˆï¼š%s\n"
+
+#. This can happen if the user put "-rpath,a" on the command
+#. line. (Or something similar. The comma is important).
+#. Getopt becomes confused and thinks that this is a -r option
+#. but it cannot parse the text after the -r so it refuses to
+#. increment the optind counter. Detect this case and issue
+#. an error message here. We cannot just make this a warning,
+#. increment optind, and continue because getopt is too confused
+#. and will seg-fault the next time around.
+#: lexsup.c:968
+msgid "%P%F: bad -rpath option\n"
+msgstr "%P%F：错误的 -rpath 选项\n"
+
+#: lexsup.c:1080
+msgid "%P%F: -shared not supported\n"
+msgstr "%P%F：ä¸æ”¯æŒ -shared\n"
+
+#: lexsup.c:1089
+msgid "%P%F: -pie not supported\n"
+msgstr "%P%F：ä¸æ”¯æŒ -pie\n"
+
+#: lexsup.c:1099
+msgid "name"
+msgstr "å称"
+
+#: lexsup.c:1101
+msgid "alignment"
+msgstr "对é½"
+
+#: lexsup.c:1104
+#, fuzzy
+msgid "%P%F: invalid section sorting option: %s\n"
+msgstr "æ— æ•ˆçš„é€‰é¡¹å‚æ•° %qs"
+
+#: lexsup.c:1130
+msgid "%P%F: invalid argument to option \"--section-start\"\n"
+msgstr "%P%F：给予选项“--section-startâ€çš„å‚æ•°æ— æ•ˆ\n"
+
+#: lexsup.c:1137
+msgid "%P%F: missing argument(s) to option \"--section-start\"\n"
+msgstr "%P%F：选项“--section-startâ€ç¼ºå°‘å‚æ•°\n"
+
+#: lexsup.c:1311
+msgid "%P%F: may not nest groups (--help for usage)\n"
+msgstr ""
+
+#: lexsup.c:1318
+msgid "%P%F: group ended before it began (--help for usage)\n"
+msgstr ""
+
+#: lexsup.c:1346
+msgid "%P%X: --hash-size needs a numeric argument\n"
+msgstr "%P%X：--hash-size 需è¦ä¸€ä¸ªæ•°å—作为å‚æ•°\n"
+
+#: lexsup.c:1397 lexsup.c:1410
+msgid "%P%F: invalid hex number `%s'\n"
+msgstr "%P%Fï¼šæ— æ•ˆçš„åå…进制数‘%s’\n"
+
+#: lexsup.c:1445
+#, c-format
+msgid "Usage: %s [options] file...\n"
+msgstr "用法：%s [选项] 文件...\n"
+
+#: lexsup.c:1447
+#, c-format
+msgid "Options:\n"
+msgstr "选项：\n"
+
+#. Note: Various tools (such as libtool) depend upon the
+#. format of the listings below - do not change them.
+#: lexsup.c:1530
+#, c-format
+msgid "%s: supported targets:"
+msgstr "%s：支æŒçš„ç›®æ ‡ï¼š"
+
+#: lexsup.c:1538
+#, c-format
+msgid "%s: supported emulations: "
+msgstr "%s：支æŒçš„仿真："
+
+#: lexsup.c:1543
+#, c-format
+msgid "%s: emulation specific options:\n"
+msgstr "%s：仿真特定选项：\n"
+
+#: lexsup.c:1547
+#, c-format
+msgid "Report bugs to %s\n"
+msgstr "å‘ %s 报告程åºç¼ºé™·\n"
+
+#: mri.c:291
+msgid "%P%F: unknown format type %s\n"
+msgstr "%P%Fï¼šæœªçŸ¥çš„æ ¼å¼ç±»åž‹ %s\n"
+
+#: pe-dll.c:303
+#, c-format
+msgid "%XUnsupported PEI architecture: %s\n"
+msgstr "%Xä¸æ”¯æŒçš„ PEI 架构：%s\n"
+
+#: pe-dll.c:652
+#, c-format
+msgid "%XError, duplicate EXPORT with ordinals: %s (%d vs %d)\n"
+msgstr ""
+
+#: pe-dll.c:659
+#, c-format
+msgid "Warning, duplicate EXPORT: %s\n"
+msgstr "è¦å‘Šï¼šé‡å¤çš„ EXPORT：%s\n"
+
+#: pe-dll.c:725
+#, c-format
+msgid "%XCannot export %s: symbol not defined\n"
+msgstr "%Xä¸èƒ½å¯¼å‡º %s：符å·æœªå®šä¹‰\n"
+
+#: pe-dll.c:731
+#, c-format
+msgid "%XCannot export %s: symbol wrong type (%d vs %d)\n"
+msgstr ""
+
+#: pe-dll.c:738
+#, c-format
+msgid "%XCannot export %s: symbol not found\n"
+msgstr "%Xä¸èƒ½å¯¼å‡º %s：找ä¸åˆ°ç¬¦å·\n"
+
+#: pe-dll.c:850
+#, c-format
+msgid "%XError, ordinal used twice: %d (%s vs %s)\n"
+msgstr ""
+
+#: pe-dll.c:1172
+#, c-format
+msgid "%XError: %d-bit reloc in dll\n"
+msgstr ""
+
+#: pe-dll.c:1300
+#, c-format
+msgid "%s: Can't open output def file %s\n"
+msgstr "%sï¼šæ— æ³•æ‰“å¼€è¾“å‡º def 文件 %s\n"
+
+#: pe-dll.c:1443
+#, c-format
+msgid "; no contents available\n"
+msgstr "；没有å¯ç”¨çš„内容\n"
+
+#: pe-dll.c:2205
+msgid "%C: variable '%T' can't be auto-imported. Please read the documentation for ld's --enable-auto-import for details.\n"
+msgstr "%C：å˜é‡â€˜%T’ä¸èƒ½è¢«è‡ªåŠ¨å¯¼å…¥ã€‚请阅读与 ld --enable-auto-import 相关的文档以获å–更详细的信æ¯ã€‚\n"
+
+#: pe-dll.c:2235
+#, c-format
+msgid "%XCan't open .lib file: %s\n"
+msgstr "%Xæ— æ³•æ‰“å¼€ .lib 文件：%s\n"
+
+#: pe-dll.c:2240
+#, c-format
+msgid "Creating library file: %s\n"
+msgstr "æ£åœ¨åˆ›å»ºåº“文件：%s\n"
Modified: branches/binutils/package/ld/scripttempl/avr.sc
===================================================================
--- branches/binutils/package/ld/scripttempl/avr.sc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/scripttempl/avr.sc 2006-04-19 08:33:31 UTC (rev 12)
@@ -75,6 +75,7 @@
.text :
{
*(.vectors)
+ KEEP(*(.vectors))
${CONSTRUCTING+ __ctors_start = . ; }
${CONSTRUCTING+ *(.ctors) }
@@ -82,34 +83,65 @@
${CONSTRUCTING+ __dtors_start = . ; }
${CONSTRUCTING+ *(.dtors) }
${CONSTRUCTING+ __dtors_end = . ; }
+ KEEP(SORT(*)(.ctors))
+ KEEP(SORT(*)(.dtors))
+ /* For data that needs to reside in the lower 64k of progmem */
*(.progmem.gcc*)
*(.progmem*)
${RELOCATING+. = ALIGN(2);}
+
+ /* for future tablejump instruction arrays for 3 byte pc devices */
+ *(.jumptables)
+ *(.jumptables*)
+ /* for code that needs to reside in the lower 128k progmem */
+ *(.lowtext)
+ *(.lowtext*)
+
*(.init0) /* Start here after reset. */
+ KEEP (*(.init0))
*(.init1)
+ KEEP (*(.init1))
*(.init2) /* Clear __zero_reg__, set up stack pointer. */
+ KEEP (*(.init2))
*(.init3)
+ KEEP (*(.init3))
*(.init4) /* Initialize data and BSS. */
+ KEEP (*(.init4))
*(.init5)
+ KEEP (*(.init5))
*(.init6) /* C++ constructors. */
+ KEEP (*(.init6))
*(.init7)
+ KEEP (*(.init7))
*(.init8)
+ KEEP (*(.init8))
*(.init9) /* Call main(). */
+ KEEP (*(.init9))
*(.text)
${RELOCATING+. = ALIGN(2);}
*(.text.*)
${RELOCATING+. = ALIGN(2);}
*(.fini9) /* _exit() starts here. */
+ KEEP (*(.fini9))
*(.fini8)
+ KEEP (*(.fini8))
*(.fini7)
+ KEEP (*(.fini7))
*(.fini6) /* C++ destructors. */
+ KEEP (*(.fini6))
*(.fini5)
+ KEEP (*(.fini5))
*(.fini4)
+ KEEP (*(.fini4))
*(.fini3)
+ KEEP (*(.fini3))
*(.fini2)
+ KEEP (*(.fini2))
*(.fini1)
+ KEEP (*(.fini1))
*(.fini0) /* Infinite loop after program termination. */
+ KEEP (*(.fini0))
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > text}
@@ -117,6 +149,9 @@
{
${RELOCATING+ PROVIDE (__data_start = .) ; }
*(.data)
+ *(.data*)
+ *(.rodata) /* We need to include .rodata here if gcc is used */
+ *(.rodata*) /* with -fdata-sections. */
*(.gnu.linkonce.d*)
${RELOCATING+. = ALIGN(2);}
${RELOCATING+ _edata = . ; }
@@ -127,6 +162,7 @@
{
${RELOCATING+ PROVIDE (__bss_start = .) ; }
*(.bss)
+ *(.bss*)
*(COMMON)
${RELOCATING+ PROVIDE (__bss_end = .) ; }
} ${RELOCATING+ > data}
Modified: branches/binutils/package/ld/scripttempl/elf.sc
===================================================================
--- branches/binutils/package/ld/scripttempl/elf.sc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/scripttempl/elf.sc 2006-04-19 08:33:31 UTC (rev 12)
@@ -117,7 +117,7 @@
fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
STACKNOTE="/DISCARD/ : { *(.note.GNU-stack) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
@@ -282,8 +282,8 @@
.rel.rodata ${RELOCATING-0} : { *(.rel.rodata${RELOCATING+ .rel.rodata.* .rel.gnu.linkonce.r.*}) }
.rela.rodata ${RELOCATING-0} : { *(.rela.rodata${RELOCATING+ .rela.rodata.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+*}) }
- .rela.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+*}) }
+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+* .rel.gnu.linkonce.d.rel.ro.*}) }
+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+* .rela.gnu.linkonce.d.rel.ro.*}) }
.rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
.rel.tdata ${RELOCATING-0} : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
@@ -334,6 +334,7 @@
} =${NOP-0}
${TEXT_PLT+${PLT}}
+ ${TINY_READONLY_SECTION}
.text ${RELOCATING-0} :
{
${RELOCATING+${TEXT_START_SYMBOLS}}
@@ -451,8 +452,7 @@
${LARGE_SECTIONS}
${RELOCATING+. = ALIGN(${ALIGNMENT});}
${RELOCATING+${OTHER_END_SYMBOLS}}
- ${RELOCATING+_end = .;}
- ${RELOCATING+PROVIDE (end = .);}
+ ${RELOCATING+${END_SYMBOLS-_end = .; PROVIDE (end = .);}}
${RELOCATING+${DATA_SEGMENT_END}}
/* Stabs debugging sections. */
@@ -496,6 +496,9 @@
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
+ ${TINY_DATA_SECTION}
+ ${TINY_BSS_SECTION}
+
${STACK_ADDR+${STACK}}
${OTHER_SECTIONS}
${RELOCATING+${OTHER_SYMBOLS}}
Added: branches/binutils/package/ld/scripttempl/elf32xc16x.sc
===================================================================
--- branches/binutils/package/ld/scripttempl/elf32xc16x.sc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/scripttempl/elf32xc16x.sc 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,61 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+
+ vectarea : o =0x00000, l = 0x0300
+
+ introm : o = 0x00400, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+
+SECTIONS
+{
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+}
+EOF
Added: branches/binutils/package/ld/scripttempl/elf32xc16xl.sc
===================================================================
--- branches/binutils/package/ld/scripttempl/elf32xc16xl.sc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/scripttempl/elf32xc16xl.sc 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,64 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+ vectarea : o =0xc00000, l = 0x0300
+
+ introm : o = 0xc00300, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+SECTIONS
+{
+/*.vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea} */
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+
+}
+EOF
Added: branches/binutils/package/ld/scripttempl/elf32xc16xs.sc
===================================================================
--- branches/binutils/package/ld/scripttempl/elf32xc16xs.sc 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/scripttempl/elf32xc16xs.sc 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,64 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+ vectarea : o =0xc00000, l = 0x0300
+
+ introm : o = 0xc00300, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+SECTIONS
+{
+/*.vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea} */
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+
+}
+EOF
Modified: branches/binutils/package/ld/testsuite/ChangeLog
===================================================================
--- branches/binutils/package/ld/testsuite/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,1497 +1,219 @@
-2005-12-12 Paul Brook <paul at codesourcery.com>
+2006-04-05 Richard Sandiford <richard at codesourcery.com>
- * ld-arm/arm-call.d: New test.
- * ld-arm/arm-call1.s: New file.
- * ld-arm/arm-call1.s: New file.
- * ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5.
- * ld-arm/arm.ld: Add .glue_7 and .ARM.attribues.
- * ld-arm/mixed-app-v5.d: New file.
- * ld-arm/mixed-app.r: Tweak expected output.
+ * ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd,
+ * ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd,
+ * ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s,
+ * ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s,
+ * ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests.
+ * ld-sparc/sparc.exp: Run them.
-2005-11-18 Alan Modra <amodra at bigpond.net.au>
+2006-04-05 Ben Elliston <bje at au.ibm.com>
- * ld-powerpc/symtocbase.d: Adjust for alignment change.
+ * lib/ld-lib.exp: Comment cleanups.
-2005-11-17 Hans-Peter Nilsson <hp at bitrange.com>
+2006-03-27 Richard Sandiford <richard at codesourcery.com>
- * ld-mmix/sec-1.d: Adjust section order for recent ELF section
- rearrangement.
+ * ld-mips-elf/tls-hidden3a.s, ld-mips-elf/tls-hidden3b.s,
+ * ld-mips-elf/tls-hidden3.d, ld-mips-elf/tls-hidden3.got,
+ * ld-mips-elf/tls-hidden3.ld, ld-mips-elf/tls-hidden3.r,
+ * ld-mips-elf/tls-hidden4a.s, ld-mips-elf/tls-hidden4b.s,
+ * ld-mips-elf/tls-hidden4.got, ld-mips-elf/tls-hidden4.r: New tests.
+ * ld-mips-elf/mips-elf.exp: Run them.
-2005-11-15 Jan Beulich <jbeulich at novell.com>
+2006-03-25 Richard Sandiford <richard at codesourcery.com>
- * ld-bootstrap/bootstrap.exp: Delete ld-partial.o and ld[123]*
- after test.
- * ld-elf/elf.exp: Delete preinit, init, and fini after test.
- * ld-elf/sec64k.exp: Use macro and repeat in generated source
- files. Delete object files after test.
+ * ld-m68k/merge-error-1a.s, ld-m68k/merge-error-1b.s,
+ * ld-m68k/merge-error-1a.d, ld-m68k/merge-error-1b.d,
+ * ld-m68k/merge-error-1c.d, ld-m68k/merge-error-1d.d,
+ * ld-m68k/merge-error-1e.d, ld-m68k/merge-ok-1a.d,
+ * ld-m68k/merge-ok-1b.d: New tests.
+ * ld-m68k/m68k.exp: Run them.
-2005-11-11 Hans-Peter Nilsson <hp at axis.com>
+2006-03-22 Richard Sandiford <richard at codesourcery.com>
- * ld-cris/noov.d: Restrict to cris-*-*elf*.
+ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
+ * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
+ * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
+ * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
+ * ld-mips/vxworks2-static.sd: New tests.
+ * ld-mips/mips-elf.exp: Run them.
-2005-10-31 Hans-Peter Nilsson <hp at bitrange.com>
+2006-03-17 Alexandre Oliva <aoliva at redhat.com>
- PR ld/1501
- * ld-mmix/bpo-10.d: Adjust for empty-section-removal.
+ * ld-powerpc/tls32.s: Verify that +32768 @plt addend is
+ discarded.
-2005-10-28 Hans-Peter Nilsson <hp at axis.com>
+2006-03-14 Richard Sandiford <richard at codesourcery.com>
- PR ld/1567
- * ld-cris/noov.s, ld-cris/noov.d: New test.
+ * ld-mips/emit-relocs-1a.s, ld-mips/emit-relocs-1b.s,
+ * ld-mips/emit-relocs-1.ld, ld-mips/emit-relocs-1.d: New test.
+ * ld-mips/mips-elf.exp: Run it.
-2005-10-26 Alan Modra <amodra at bigpond.net.au>
+2006-03-07 Richard Sandiford <richard at codesourcery.com>
- * ld-elf/empty2.d: Allow more symbols.
+ * ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
+ * ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
+ * ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
+ * ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
+ * ld-arm/vxworks2-static.sd: New tests.
+ * ld-arm/arm-elf.exp: Run them.
-2005-10-26 Hans-Peter Nilsson <hp at bitrange.com>
+2006-03-06 Nathan Sidwell <nathan at codesourcery.com>
- * ld-mmix/bpo-6.d, ld-mmix/bpo-19.d: Adjust for symbols between
- section symbols and the _start symbol.
+ * ld-m68k: New tests.
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
+2006-03-03 Richard Sandiford <richard at codesourcery.com>
- * ld-elf/orphan.d: Adjust for mips.
+ * ld-i386/vxworks1-static.d, ld-i386/vxworks2.s,
+ * ld-i386/vxworks2.sd, ld-i386/vxworks2-static.sd: New tests.
+ * ld-i386/i386.exp: Run them.
+ * ld-powerpc/vxworks1-static.d, ld-powerpc/vxworks2.s,
+ * ld-powerpc/vxworks2.sd, ld-powerpc/vxworks2-static.sd: New tests.
+ * ld-powerpc/powerpc.exp: Run them.
-2005-10-24 Jan Beulich <jbeulich at novell.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * ld-elf/empty2.[sd]: New.
+ * ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000.
+ * ld-powerpc/vxworks1.dd: Update accordingly.
+ * ld-powerpc/vxworks1-lib.nd: Likewise.
+ * ld-powerpc/vxworks1-lib.rd: Likewise.
+ * ld-powerpc/vxworks1.rd: Likewise.
-2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- PR ld/1487
- * ld-ia64/tlspic.rd: Updated.
+ * ld-i386/vxworks1.ld (.data): New section.
+ * ld-i386/vxworks1-lib.s: Add a pointer to a local symbol.
+ * ld-i386/vxworks1-lib.rd: Test for the associated reloc.
+ * ld-powerpc/vxworks1.ld (.data): New section.
+ * ld-powerpc/vxworks1-lib.s: Add a pointer to a local symbol.
+ * ld-powerpc/vxworks1-lib.rd: Test for the associated reloc.
-2005-10-21 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- PR ld/1467
- * ld-elf/orphan.d: New file.
- * ld-elf/orphan.ld: Likewise.
- * ld-elf/orphan.s: Likewise.
+ * ld-i386/ld-i386/vxworks1-lib.nd: New test.
+ * ld-i386/i386.exp: Run it.
+ * ld-powerpc/ld-powerpc/vxworks1-lib.nd: New test.
+ * ld-powerpc/powerc.exp: Run it.
-2005-10-20 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
- * ld-ia64/ia64.exp: Undo the last change. Add support for *.d.
+ * ld-i386/vxworks1.ld: Use bigger alignments. Make sure .bss isn't
+ placed as an orphan.
+ * ld-i386/vxworks1-lib.dd, ld-i386/vxworks1.dd,
+ * ld-i386/vxworks1.rd: Update accordingly.
+ * ld-i386/vxworks1-lib.rd: Likewise. Remove symbol indexes.
- * ld-ia64/link-order.d: New file.
+2006-03-02 Richard Sandiford <richard at codesourcery.com>
-2005-10-20 H.J. Lu <hongjiu.lu at intel.com>
+ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd,
+ * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s,
+ * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd,
+ * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test.
+ * ld-powerpc/powerpc.exp: Run it.
- PR ld/251
- * ld-elf/group.2d: New file.
+2006-02-28 Richard Sandiford <richard at codesourcery.com>
-2005-10-19 H.J. Lu <hongjiu.lu at intel.com>
+ * ld-i386/vxworks1-lib.s, ld-i386/vxworks1-lib.dd,
+ * ld-i386/vxworks1-lib.rd, ld-i386/vxworks1.s, ld-i386/vxworks1.dd,
+ * ld-i386/vxworks1.rd, ld-i386/vxworks1.ld: New test.
+ * ld-i386/i386.exp: Run it.
- PR ld/1487
- * ld-elf/unknown.d: New file.
+2006-02-28 Richard Sandiford <richard at codesourcery.com>
-2005-10-19 H.J. Lu <hongjiu.lu at intel.com>
+ * ld-i386/emit-relocs.s, ld-i386/emit-relocs.d: New test.
+ * ld-i386/i386.exp: Run it.
- * ld-ia64/ia64.exp: Check link order for ld -r.
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
-2005-10-18 Alan Modra <amodra at bigpond.net.au>
+ * ld-pie/weakundef-data.c: Fix the typo.
- * ld-scripts/crossref.exp: Add -mcall-aixdesc to CFLAGS for
- powerpc64.
+2006-02-22 H.J. Lu <hongjiu.lu at intel.com>
-2005-10-13 Mark Mitchell <mark at codesourcery.com>
+ * ld-pie/pie.c: New file.
- * ld-elfvers/vers.exp: Add vers31.
- * ld-elfvers/vers31.c: New file.
- * ld-elfvers/vers31.dsym: Likewise.
- * ld-elfvers/vers31.map: Likewise.
- * ld-elfvers/vers31.ver: Likewise.
+ * ld-pie/pie.exp: Check if compiler supports -pie.
-2005-10-08 Paul Brook <paul at codesourcery.com>
+2006-02-20 H.J. Lu <hongjiu.lu at intel.com>
- * ld-arm/arm-rel31.d: Ignore Arm object attribute sections.
- * ld-arm/arm-target1-abs.d: Ditto.
- * ld-arm/arm-target1-rel.d: Ditto.
- * ld-arm/arm-target2-abs.d: Ditto.
- * ld-arm/arm-target2-got-rel.d: Ditto.
- * ld-arm/arm-target2-rel.d: Ditto.
+ PR ld/2218
+ * ld-pie/pie.exp: Add the weak undefined data test.
-2005-10-04 H.J. Lu <hongjiu.lu at intel.com>
+ * ld-pie/weakundef-data.c: New file.
- PR ld/1396
- * ld-scripts/cross3.t: New file.
- * ld-scripts/cross4.c: Likewise.
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
- * ld-scripts/crossref.exp: Add a new test for "ld -r".
+ * ld-xc16x: New directory.
+ * ld-xc16x/absrel.d: New file.
+ * ld-xc16x/absrel.s: New file.
+ * ld-xc16x/offset.d: New file.
+ * ld-xc16x/offset.s: New file.
+ * ld-xc16x/pcreloc.d: New file.
+ * ld-xc16x/pcreloc.s: New file.
+ * ld-xc16x/xc16x.exp: New file.
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+2006-02-07 Paul Brook <paul at codesourcery.com>
- * ld-elf/sec64k.exp: Enabled for all ELF targets.
+ * ld-arm/arm-elf.exp: Add thumb-entry test.
+ * ld-arm/thumb-entry.d: New test.
+ * ld-arm/thumb-entry.s: New test.
-2005-09-30 Catherine Moore <clm at cm00re.com>
+2006-02-04 Richard Sandiford <richard at codesourcery.com>
- * ld-elf/merge.d: Xfail bfin.
+ * ld-mips-elf/tls-hidden2a.s, ld-mips-elf/tls-hidden2b.s,
+ * ld/testsuite/ld-mips-elf/tls-hidden2.d,
+ * ld/testsuite/ld-mips-elf/tls-hidden2-got.d: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
-2005-09-28 Alexandre Oliva <aoliva at redhat.com>
+2006-02-04 Richard Sandiford <richard at codesourcery.com>
- * symtocbase-1.s, symtocbase-2.s, symtocbase.d: New test.
- * powerpc.exp: Run it.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * ld-x86-64/tlspic.dd: Adjust.
-
-2005-09-01 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris: Skip tests unsuitable for testing target
- cris-axis-linux-gnu.
-
-2005-08-18 David Daney <ddaney at avtrex.com>
-
- * ld-mips-elf/multi-got-1.d: Adjust for new ld behavior.
- * ld-mips-elf/multi-got-no-shared.d: Likewise.
- * ld-mips-elf/rel32-n32.d: Likewise.
+ * ld-mips-elf/rel32-n32.d: Adjust for changes in linker behaviour.
* ld-mips-elf/rel32-o32.d: Likewise.
* ld-mips-elf/rel64.d: Likewise.
+ * ld-mips-elf/tls-multi-got-1.got: Likewise.
+ * ld-mips-elf/tls-multi-got-1.r: Likewise.
+ * ld-mips-elf/tlsdyn-o32-1.d: Likewise.
+ * ld-mips-elf/tlsdyn-o32-1.got: Likewise.
+ * ld-mips-elf/tlsdyn-o32-2.d: Likewise.
+ * ld-mips-elf/tlsdyn-o32-2.got: Likewise.
+ * ld-mips-elf/tlsdyn-o32-3.d: Likewise.
+ * ld-mips-elf/tlsdyn-o32-3.got: Likewise.
+ * ld-mips-elf/tlsdyn-o32.d: Likewise.
+ * ld-mips-elf/tlsdyn-o32.got: Likewise.
+ * ld-mips-elf/tlslib-o32-hidden.got: Likewise.
+ * ld-mips-elf/tlslib-o32-ver.got: Likewise.
+ * ld-mips-elf/tlslib-o32.got: Likewise.
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
+2006-02-02 H.J. Lu <hongjiu.lu at intel.com>
- * ld-d10v/default_layout.d: Adjust for section removal.
- * ld-elf/empty.s: Define "main".
- * ld-elf/frame.exp: Don't run for hppa64 and v850.
- * ld-elf/group1.d: xfail various targets.
- * ld-elf/merge.d: Likewise.
- * ld-elf/merge2.d: Likewise.
- * ld-elf/warn1.d: Likewise.
- * ld-scripts/defined2.d: Likewise.
- * ld-scripts/defined3.d: Likewise.
- * ld-scripts/empty-aligned.d: Likewise.
- * ld-scripts/size-2.d: Likewise.
- * ld-scripts/weak.exp: Likewise.
- * ld-selective/sel-dump.exp: Likewise.
- * ld-undefined/weak-undef.exp: Likewise.
-
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/crossref.exp: Remove a29k support.
- * ld-srec/srec.exp: Likewise.
-
-2005-08-17 Jakub Jelinek <jakub at redhat.com>
-
- * lib/ld-lib.exp (default_ld_compile): Append $cc arguments after
- $CFLAGS instead of prepending them.
-
- * ld-elfvers/vers.exp: Add a new test, vers30.
- * ld-elfvers/vers30.c: New file.
- * ld-elfvers/vers30.map: New file.
- * ld-elfvers/vers30.ver: New file.
- * ld-elfvers/vers30.dsym: New file.
-
-2005-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * ld-alpha/tlsbin.rd: Update.
- * ld-alpha/tlsbinr.rd: Update.
- * ld-cris/locref1.d: Update.
- * ld-cris/locref2.d: Update.
- * ld-i386/tlsbin.rd: Update.
- * ld-ia64/tlsbin.rd: Update.
- * ld-powerpc/tlsexe.r: Update.
- * ld-powerpc/tlsexe32.r: Update.
- * ld-powerpc/tlsexetoc.r: Update.
- * ld-s390/tlsbin.rd: Update.
- * ld-s390/tlsbin_64.rd: Update.
- * ld-sparc/tlssunbin32.rd: Update.
- * ld-sparc/tlssunbin64.rd: Update.
- * ld-x86-64/tlsbin.rd: Update.
-
-2005-08-16 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris/dso-1.s: Add missing alignment directive.
- * ld-cris/libdso-10.d: Adjust accordingly.
-
-2005-08-16 Alan Modra <amodra at bigpond.net.au>
-
- * ld-alpha/tlsbin.rd: Adjust for dynamic sym changes.
- * ld-alpha/tlsbinr.rd: Likewise.
- * ld-alpha/tlspic.rd: Likewise.
- * ld-arm/mixed-app.d: Likewise.
- * ld-arm/mixed-app.sym: Likewise.
- * ld-arm/mixed-lib.sym: Likewise.
- * ld-arm/tls-app.d: Likewise.
- * ld-arm/tls-app.r: Likewise.
- * ld-cris/expdyn5.d: Likewise.
- * ld-cris/expdyn6.d: Likewise.
- * ld-cris/expdyn7.d: Likewise.
- * ld-cris/gotplt1.d: Likewise.
- * ld-cris/gotplt2.d: Likewise.
- * ld-cris/gotplt3.d: Likewise.
- * ld-cris/hiddef1.d: Likewise.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-11.d: Likewise.
- * ld-cris/libdso-12.d: Likewise.
- * ld-cris/libdso-13.d: Likewise.
- * ld-cris/libdso-14.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
- * ld-cris/pv32-1.d: Likewise.
- * ld-cris/weakref2.d: Likewise.
- * ld-frv/fdpic-pie-1.d: Likewise.
- * ld-frv/fdpic-pie-2.d: Likewise.
- * ld-frv/fdpic-pie-6.d: Likewise.
- * ld-frv/fdpic-pie-7.d: Likewise.
- * ld-frv/fdpic-pie-8.d: Likewise.
- * ld-frv/fdpic-shared-1.d: Likewise.
- * ld-frv/fdpic-shared-2.d: Likewise.
- * ld-frv/fdpic-shared-3.d: Likewise.
- * ld-frv/fdpic-shared-4.d: Likewise.
- * ld-frv/fdpic-shared-5.d: Likewise.
- * ld-frv/fdpic-shared-6.d: Likewise.
- * ld-frv/fdpic-shared-7.d: Likewise.
- * ld-frv/fdpic-shared-8.d: Likewise.
- * ld-frv/fdpic-shared-local-2.d: Likewise.
- * ld-frv/fdpic-shared-local-8.d: Likewise.
- * ld-frv/fdpic-static-1.d: Likewise.
- * ld-frv/fdpic-static-2.d: Likewise.
- * ld-frv/fdpic-static-6.d: Likewise.
- * ld-frv/fdpic-static-7.d: Likewise.
- * ld-frv/fdpic-static-8.d: Likewise.
- * ld-frv/tls-dynamic-1.d: Likewise.
- * ld-frv/tls-dynamic-2.d: Likewise.
- * ld-frv/tls-dynamic-3.d: Likewise.
- * ld-frv/tls-initial-shared-2.d: Likewise.
- * ld-frv/tls-pie-1.d: Likewise.
- * ld-frv/tls-pie-3.d: Likewise.
- * ld-frv/tls-relax-dynamic-1.d: Likewise.
- * ld-frv/tls-relax-dynamic-2.d: Likewise.
- * ld-frv/tls-relax-dynamic-3.d: Likewise.
- * ld-frv/tls-relax-initial-shared-2.d: Likewise.
- * ld-frv/tls-relax-pie-1.d: Likewise.
- * ld-frv/tls-relax-pie-3.d: Likewise.
- * ld-frv/tls-relax-shared-1.d: Likewise.
- * ld-frv/tls-relax-shared-2.d: Likewise.
- * ld-frv/tls-relax-shared-3.d: Likewise.
- * ld-frv/tls-relax-static-1.d: Likewise.
- * ld-frv/tls-shared-1.d: Likewise.
- * ld-frv/tls-shared-2.d: Likewise.
- * ld-frv/tls-shared-3.d: Likewise.
- * ld-frv/tls-static-1.d: Likewise.
- * ld-frv/tls-static-3.d: Likewise.
- * ld-i386/tlsbin.rd: Likewise.
+ * ld-i386/tlsbin.rd: Undo the last change.
+ * ld-i386/tlsbindesc.rd: Likewise.
+ * ld-i386/tlsdesc.rd: Likewise.
* ld-i386/tlsnopic.rd: Likewise.
* ld-i386/tlspic.rd: Likewise.
- * ld-ia64/tlsbin.dd: Likewise.
- * ld-ia64/tlsbin.rd: Likewise.
- * ld-ia64/tlspic.dd: Likewise.
- * ld-ia64/tlspic.rd: Likewise.
- * ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
- * ld-powerpc/tlsexe32.d: Likewise.
- * ld-powerpc/tlsexe32.g: Likewise.
* ld-powerpc/tlsexe32.r: Likewise.
- * ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
- * ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
- * ld-powerpc/tlsso32.d: Likewise.
- * ld-powerpc/tlsso32.g: Likewise.
* ld-powerpc/tlsso32.r: Likewise.
- * ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
* ld-s390/tlsbin.rd: Likewise.
* ld-s390/tlsbin_64.rd: Likewise.
* ld-s390/tlspic.rd: Likewise.
* ld-s390/tlspic_64.rd: Likewise.
- * ld-sh/shared-1.d: Likewise.
* ld-sh/tlsbin-2.d: Likewise.
- * ld-sh/tlsbin-3.d: Likewise.
- * ld-sh/tlsbin-4.d: Likewise.
* ld-sh/tlspic-2.d: Likewise.
- * ld-sh/sh64/abi32.xd: Likewise.
- * ld-sh/sh64/abi64.xd: Likewise.
- * ld-sh/sh64/cmpct1.xd: Likewise.
- * ld-sh/sh64/crange1.rd: Likewise.
- * ld-sh/sh64/crange2.rd: Likewise.
- * ld-sh/sh64/crange3-cmpct.rd: Likewise.
- * ld-sh/sh64/crange3-media.rd: Likewise.
- * ld-sh/sh64/crange3.rd: Likewise.
- * ld-sh/sh64/gotplt.d: Likewise.
- * ld-sh/sh64/init-cmpct.d: Likewise.
- * ld-sh/sh64/init-media.d: Likewise.
- * ld-sh/sh64/init64.d: Likewise.
- * ld-sh/sh64/mix1.xd: Likewise.
- * ld-sh/sh64/mix2.xd: Likewise.
- * ld-sh/sh64/sh64.exp: Likewise.
- * ld-sh/sh64/shdl32.xd: Likewise.
- * ld-sh/sh64/shdl64.xd: Likewise.
- * ld-sparc/tlssunbin32.rd: Likewise.
- * ld-sparc/tlssunbin64.rd: Likewise.
- * ld-sparc/tlssunnopic32.rd: Likewise.
- * ld-sparc/tlssunnopic64.rd: Likewise.
- * ld-sparc/tlssunpic32.rd: Likewise.
- * ld-sparc/tlssunpic64.rd: Likewise.
* ld-x86-64/tlsbin.rd: Likewise.
- * ld-x86-64/tlspic.dd: Likewise.
+ * ld-x86-64/tlsbindesc.rd: Likewise.
+ * ld-x86-64/tlsdesc.rd: Likewise.
* ld-x86-64/tlspic.rd: Likewise.
-2005-08-15 Alan Modra <amodra at bigpond.net.au>
+2006-02-02 H.J. Lu <hongjiu.lu at intel.com>
- * ld-elf/empty.s: Define "start".
- * ld-elf/merge2.d: xfail arc-*-* and dlx-*-*.
- * ld-scripts/empty-aligned.s: No .data section.
- * ld-scripts/empty-aligned.t: Discard most sections.
- * ld-scripts/empty-aligned.d: Adjust.
-
-2005-08-11 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris/expdyn1.s (expobj): Set size here, at definition...
- * ld-cris/pv32.s: ...not here.
- * ld-cris/expdyn1.d, ld-cris/libdso-12.d, ld-cris/locref1.d:
- Adjust for expobj size being set at definition.
-
- * ld-cris/v32-ba-1.d: Regexpize to adjust for symbol change.
-
-2005-08-08 Richard Earnshaw <richard.earnshaw at arm.com>
-
- * ld-arm/mixed-app.sym: Expact _stack to be in the ABS section.
- * ld-arm/mixed-lib.sym: Likewise.
- * tls-lib.d: Use a regexp for the address locations.
- * tls-lib.r: Likewise.
-
-2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-i386/pcrel16.d: Updated.
- * ld-i386/pcrel16.s: Likewise.
- * ld-x86-64/pcrel16.d: Likewise.
-
-2005-08-01 Richard Sandiford <richard at codesourcery.com>
-
- * ld-mips/mips-elf-flags.exp: Add more good_combination tests.
-
-2005-07-28 Ben Elliston <bje at gnu.org>
-
- * lib/ld-lib.exp (run_ld_link_exec_tests): Add new parameter
- ${targets_to_xfail} that is applied for each test item.
- * ld-elf/elf.exp: Pass *-*-netbsdelf* as an xfailed target.
-
-2005-07-27 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elfweak/size2a.s: Extend test to check size for two weaks.
- * ld-elfweak/size2b.s: Likewise.
- * ld-elfweak/size2.d: Update.
-
-2005-07-18 Jan Beulich <jbeulich at novell.com>
-
- * ld-i386/abs.s, ld-i386/zero.s, ld-i386/abs.d, ld-x86-64/abs.d,
- ld-i386/pcrel16.s, ld-i386/pcrel16.d, ld-x86-64/pcrel16.d,
- ld-i386/pcrel8.s, ld-i386/pcrel8.d, ld-x86-64/pcrel8.d: New.
- * ld-i386/i386.exp, ld-x86-64/x86-64.exp: Run new tests.
-
-2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * lib/ld-lib.exp (run_ld_link_exec_tests): Ignore assembler
- warnings.
-
-2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * lib/ld-lib.exp (run_ld_link_exec_tests): Update comments.
-
-2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elf/elf.exp (array_tests): New.
- Call run_ld_link_exec_tests with array_tests.
-
- * ld-elf/fini.c: New file.
- * ld-elf/fini.out: Likewise.
- * ld-elf/init.c: Likewise.
- * ld-elf/init.out: Likewise.
- * ld-elf/preinit.c: Likewise.
- * ld-elf/preinit.out: Likewise.
-
- * lib/ld-lib.exp (run_ld_link_exec_tests): New.
-
-2005-07-12 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/sdalib.s (lib_var): Size it.
-
-2005-07-08 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-ia64/tlsbin.rd: Update for empty section removal change.
- * ld-ia64/tlsbin.sd: Likewise.
- * ld-ia64/tlspic.dd: Likewise.
- * ld-ia64/tlspic.rd: Likewise.
- * ld-ia64/tlspic.sd: Likewise.
- * ld-x86-64/tlspic.dd: Likewise.
- * ld-x86-64/tlspic.rd: Likewise.
-
-2005-07-08 Alan Modra <amodra at bigpond.net.au>
-
- * ld-cris/pv32.s: Give expobj a size.
- * ld-cris/pv32-1.d: Update.
- * ld-alpha/tlsbin.dd: Update for empty section removal change.
- * ld-alpha/tlsbin.sd: Likewise.
- * ld-alpha/tlsbin.td: Likewise.
- * ld-alpha/tlsbinr.dd: Likewise.
- * ld-alpha/tlsbinr.rd: Likewise.
- * ld-alpha/tlspic.dd: Likewise.
- * ld-alpha/tlspic.rd: Likewise.
- * ld-alpha/tlspic.sd: Likewise.
- * ld-alpha/tlspic.td: Likewise.
- * ld-arm/tls-lib.d: Likewise.
- * ld-arm/tls-lib.r: Likewise.
- * ld-cris/gotplt2.d: Likewise.
- * ld-cris/gotplt3.d: Likewise.
- * ld-cris/hiddef1.d: Likewise.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-11.d: Likewise.
- * ld-cris/libdso-12.d: Likewise.
- * ld-cris/libdso-14.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
- * ld-i386/tlsnopic.dd: Likewise.
- * ld-i386/tlsnopic.rd: Likewise.
- * ld-i386/tlsnopic.sd: Likewise.
- * ld-i386/tlspic.rd: Likewise.
- * ld-mmix/bpo-10.d: Likewise.
- * ld-mmix/bpo-22.d: Likewise.
- * ld-mmix/sec-7m.d: Likewise.
- * ld-powerpc/tlsexe.r: Likewise.
- * ld-powerpc/tlsexetoc.r: Likewise.
- * ld-powerpc/tlsso.g: Likewise.
- * ld-powerpc/tlsso.r: Likewise.
- * ld-powerpc/tlsso32.d: Likewise.
- * ld-powerpc/tlsso32.g: Likewise.
- * ld-powerpc/tlsso32.r: Likewise.
- * ld-powerpc/tlstocso.g: Likewise.
- * ld-powerpc/tlstocso.r: Likewise.
-
-2005-06-23 Andreas Schwab <schwab at suse.de>
-
- * ld-elfweak/size_foo.c (foo): Fix warning about implicit return
- type.
-
-2005-06-10 Alan Modra <amodra at bigpond.net.au>
-
- * ld-cris/libdso-10.d: Adjust for elf.sc .bss change.
- * ld-cris/libdso-2.d: Likewise.
- * ld-mmix/loc6.d: Likewise.
-
-2005-06-10 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/empty-aligned.t: Adjust alignment expressions so
- that no .text? section is kept. Also check setting vma and
- lma.
- * ld-scripts/empty-aligned.d: Update.
-
-2005-06-09 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/empty-aligned.d: Adjust.
-
-2005-06-05 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-cris/hiddef1.d: Undo the last change.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
-
-2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-cris/hiddef1.d: Updated.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
-
-2005-06-02 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/powerpc.exp (ppcelftests): Assemble sda test with -a32.
-
-2005-05-31 Zack Weinberg <zack at codesourcery.com>
-
- * ld-scripts/align.exp: Mark align1 XFAIL on PECOFF targets.
- * ld-scripts/data.exp: Mark data UNSUPPORTED on a.out targets.
- * ld-scripts/provide.exp, ld-scripts/size.exp: Mark all tests
- UNSUPPORTED on a.out targets. Tidy.
-
-2005-05-27 Mark Mitchell <mark at codesourcery.com>
-
- * config/default.exp (CC): Use find_gcc.
- (CFLAGS): Define, if no definition has been provided by the user.
- (CXX): Likewise.
- (CXXFLAGS): Likewise.
-
-2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-mmix/bpo-6.d: Updated.
- * ld-mmix/bpo-19.d: Likewise.
-
-2005-05-22 Richard Henderson <rth at redhat.com>
-
- * ld-elfweak/dsow.dsym: Adjust for non-zero ST_OTHER.
- * ld-elfweak/weak.dsym: Likewise.
-
- * ld-selective/selective.exp: Don't test alpha.
-
-2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-powerpc/sdalib.s, ld-powerpc/sdadyn.s, ld-powerpc/sdadyn.d: New
- files.
- * ld-powerpc/powerpc.exp: Run the new test.
-
-2005-05-20 Bob Wilson <bob.wilson at acm.org>
-
- * ld-undefined/undefined.exp: Revert xfail for xtensa-*-*.
-
-2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 797
- * empty-aligned.d: New file.
- * empty-aligned.exp: Likewise.
- * empty-aligned.s: Likewise.
- * empty-aligned.t: Likewise.
-
-2005-05-11 Bob Wilson <bob.wilson at acm.org>
-
- * ld-undefined/undefined.exp: xfail xtensa-*-*.
-
-2005-05-07 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe32.d: Update for changed got layout.
- * ld-powerpc/tlsexe32.g: Likewise.
- * ld-powerpc/tlsexe32.r: Likewise.
- * ld-powerpc/tlsso32.d: Likewise.
- * ld-powerpc/tlsso32.g: Likewise.
- * ld-powerpc/tlsso32.r: Likewise.
-
-2005-05-06 Nick Clifton <nickc at redhat.com>
-
- Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- * config/default.exp, ld-alpha/alpha.exp, ld-arm/arm-elf.exp,
- ld-auto-import/auto-import.exp, ld-bootstrap/bootstrap.exp,
- ld-cdtest/cdtest.exp, ld-checks/checks.exp, ld-cris/cris.exp,
- ld-crx/crx.exp, ld-cygwin/exe-export.exp, ld-d10v/d10v.exp,
- ld-discard/discard.exp, ld-elf/elf.exp, ld-elf/exclude.exp,
- ld-elf/frame.exp, ld-elf/sec64k.exp, ld-elfcomm/elfcomm.exp,
- ld-elfvers/vers.exp, ld-elfvsb/elfvsb.exp, ld-elfweak/elfweak.exp,
- ld-fastcall/fastcall.exp, ld-frv/fdpic.exp, ld-frv/tls.exp,
- ld-h8300/h8300.exp, ld-i386/i386.exp, ld-ia64/ia64.exp,
- ld-linkonce/linkonce.exp, ld-m68hc11/m68hc11.exp,
- ld-maxq/maxq.exp, ld-mips-elf/mips-elf-flags.exp,
- ld-mips-elf/mips-elf.exp, ld-mmix/mmix.exp, ld-pe/pe.exp,
- ld-powerpc/powerpc.exp, ld-s390/s390.exp, ld-scripts/align.exp,
- ld-scripts/assert.exp, ld-scripts/crossref.exp,
- ld-scripts/data.exp, ld-scripts/defined.exp,
- ld-scripts/empty-orphan.exp, ld-scripts/map-address.exp,
- ld-scripts/overlay-size.exp, ld-scripts/phdrs.exp,
- ld-scripts/phdrs2.exp, ld-scripts/provide.exp,
- ld-scripts/script.exp, ld-scripts/size.exp, ld-scripts/sizeof.exp,
- ld-scripts/sort.exp, ld-scripts/weak.exp,
- ld-selective/sel-dump.exp, ld-selective/selective.exp,
- ld-sh/rd-sh.exp, ld-sh/arch/arch.exp, ld-sh/sh64/rd-sh64.exp,
- ld-sh/sh64/relax.exp, ld-sh/sh64/relfail.exp, ld-sh/sh64/sh64.exp,
- ld-shared/shared.exp, ld-sparc/sparc.exp,
- ld-undefined/undefined.exp, ld-undefined/weak-undef.exp,
- ld-versados/versados.exp, ld-x86-64/x86-64.exp,
- ld-xstormy16/xstormy16.exp, ld-xtensa/coalesce.exp,
- ld-xtensa/lcall.exp, lib/ld-lib.exp
-
-2005-05-05 Mike Frysinger <vapier at gentoo.org>
-
- * ld-srec/srec.exp: Replace linux-gnu with linux-* to allow for
- versions of Linux which do not use glibc.
- * ld-sh/sh.exp: Likewise
-
-2005-05-05 Paul Brook <paul at codesourcery.com>
-
- * lib/ld-lib.exp (regexp_diff): Pass test if last line is "#...".
- * ld-elfweak/elfweak.exp: Run size2.d.
- * ld-elfweak/size2.d: New file.
- * ld-elfweak/size2a.s: New file.
- * ld-elfweak/size2b.s: New file.
-
-2005-04-26 Mark Kettenis <kettenis at gnu.org>
-
- * ld-fastcall/fastcall.exp: Don't run on i*86-*-openbsd*.
-
- * ld-srec/srec.exp (run_srec_test): Deal with ProPolice on
- *-*-openbsd*.
-
-2005-04-25 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-discard/extern.d: Expect error.
- * ld-discard/start.d: Likewise.
- * ld-discard/static.d: Likewise.
-
-2005-04-19 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/reloc.d: Update to suit removal of non-alloc relocs.
-
-2005-04-15 Alan Modra <amodra at bigpond.net.au>
-
- * ld-d10v/default_layout.d: Update for unused section removal.
-
-2005-04-14 David S. Miller <davem at davemloft.net>
-
- * ld-selective/sel-dump.exp: Do not exclude sparc64-*.
- * ld-selective/selective.exp: Likewise.
- * ld-sparc/sparc.exp: Add {32,64}-bit prefix to test
- names so we know which one is failing. Run sparc64 TLS
- tests on multi-arch sparc platforms.
- * ld-sparc/tls64.sd, ld-sparc/tlssunbin64.dd,
- ld-sparc/tlssunbin64.rd, ld/ld-sparc/tlssunbin64.sd,
- ld-sparc/tlssunbin64.td, ld-sparc/tlssunnopic64.dd,
- ld-sparc/tlssunnopic64.rd, ld-sparc/tlssunnopic64.sd,
- ld-sparc/tlssunpic64.dd, ld-sparc/tlssunpic64.rd,
- ld-sparc/tlssunpic64.sd, ld-sparc/tlssunpic64.td): Update now
- that sparc64 ELF does support TLS.
-
-2005-04-13 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elf/empty.d: New file.
- * ld-elf/empty.s: Likewise.
-
-2005-04-11 David S. Miller <davem at davemloft.net>
-
- * ld-sparc/tlssunbin32.dd: Update for TLS relocation fixes.
- * ld-sparc/tlssunbin32.rd: Likewise.
- * ld-sparc/tlssunbin32.sd: Likewise.
- * ld-sparc/tlssunpic32.dd: Likewise.
-
-2005-03-30 Julian Brown <julian at codesourcery.com>
-
- * ld-arm/arm-app-abs32.d: Update expected output due to mapping symbols
- being untyped.
- * ld-arm/arm-app.d: Likewise.
- * ld-arm/mixed-app.d: Likewise.
-
-2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-arm/tls-lib.s, ld-arm/tls-lib.d, ld-arm/tls-lib.r,
- ld-arm/tls-app.s, ld-arm/tls-app.d, ld-arm/tls-app.r: New files.
- * ld-arm/arm-lib.ld, ld-arm/arm-dyn.ld: Increase data segment
- alignment.
- * ld-arm/arm-elf.exp: Run TLS tests.
-
-2005-03-28 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 803
- * ld-ia64/ia64.exp: Pass -mtune=itanium1 to as.
-
-2005-03-24 Mark Mitchell <mark at codesourcery.com>
-
- * config/default.exp: Do not load libpath.exp if it does not
- exist.
- (CC): Provide fallback definition.
-
-2005-03-24 Eric Christopher <echristo at redhat.com>
-
- * ld-mips-elf/rel32-n32.d: Revert changes.
- * ld-mips-elf/rel32-o32.d: Ditto.
- * ld-mips-elf/rel64.d: Ditto.
-
-2005-03-23 Eric Christopher <echristo at redhat.com>
-
- * ld-mips-elf/textrel-1.s, ld-mips-elf/textrel-1.d: New
- test.
- * ld-mips-elf/mips-elf.exp: Call it.
- * ld-mips-elf/rel32-n32.d: Update for DF_TEXTREL removal.
- * ld-mips-elf/rel32-o32.d: Ditto.
- * ld-mips-elf/rel64.d: Ditto.
-
-2005-03-23 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-cris/expdyn5.d: Updated for alignment change in elf.sc.
- * ld-cris/expdyn6.d: Likewise.
- * ld-cris/expdyn7.d: Likewise.
- * ld-cris/gotplt1.d: Likewise.
- * ld-cris/gotplt2.d: Likewise.
- * ld-cris/gotplt3.d: Likewise.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-11.d: Likewise.
- * ld-cris/libdso-12.d: Likewise.
- * ld-cris/libdso-14.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
- * ld-cris/locref1.d: Likewise.
- * ld-cris/locref2.d: Likewise.
- * ld-cris/nodyn5.d: Likewise.
- * ld-cris/pv32-1.d: Likewise.
- * ld-cris/weakref2.d: Likewise.
-
-2005-03-23 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elf/tbss.s: Don't start directives in first column.
- * ld-scripts/weak1.s: Likewise.
- * ld-scripts/weak2.s: Likewise.
- * ld-undefined/weak-undef.s: Likewise.
- * ld-undefined/undefined.exp: Enable tests for hppa-elf.
-
-2005-03-22 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe32.r: Update.
- * ld-powerpc/tlsso32.d: Update.
- * ld-powerpc/tlsso32.g: Update.
- * ld-powerpc/tlsso32.r: Update.
-
-2005-03-21 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe.r: Update.
- * ld-powerpc/tlsexetoc.r: Update.
- * ld-powerpc/tlsso.r: Update.
- * ld-powerpc/tlstocso.r: Update.
-
-2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-mmix/bpo-1.d: Updated for empty section removal.
- * ld-mmix/bpo-10.d: Likewise.
- * ld-mmix/bpo-11.d: Likewise.
- * ld-mmix/bpo-14.d: Likewise.
- * ld-mmix/bpo-16.d: Likewise.
- * ld-mmix/bpo-17.d: Likewise.
- * ld-mmix/bpo-18.d: Likewise.
- * ld-mmix/bpo-19.d: Likewise.
- * ld-mmix/bpo-2.d: Likewise.
- * ld-mmix/bpo-3.d: Likewise.
- * ld-mmix/bpo-4.d: Likewise.
- * ld-mmix/bpo-5.d: Likewise.
- * ld-mmix/bpo-6.d: Likewise.
- * ld-mmix/bpo-9.d: Likewise.
- * ld-mmix/bspec1.d: Likewise.
- * ld-mmix/bspec2.d: Likewise.
- * ld-mmix/greg-1.d: Likewise.
- * ld-mmix/greg-19.d: Likewise.
- * ld-mmix/greg-2.d: Likewise.
- * ld-mmix/greg-3.d: Likewise.
- * ld-mmix/greg-4.d: Likewise.
- * ld-mmix/greg-5.d: Likewise.
- * ld-mmix/greg-5s.d: Likewise.
- * ld-mmix/greg-6.d: Likewise.
- * ld-mmix/greg-7.d: Likewise.
- * ld-mmix/loc1.d: Likewise.
- * ld-mmix/loc2.d: Likewise.
- * ld-mmix/loc3.d: Likewise.
- * ld-mmix/loc4.d: Likewise.
- * ld-mmix/loc6.d: Likewise.
- * ld-mmix/local1.d: Likewise.
- * ld-mmix/local12.d: Likewise.
- * ld-mmix/local3.d: Likewise.
- * ld-mmix/local5.d: Likewise.
- * ld-mmix/local7.d: Likewise.
- * ld-mmix/locdo-1.d: Likewise.
- * ld-mmix/loct-1.d: Likewise.
- * ld-mmix/locto-1.d: Likewise.
- * ld-mmix/start-1.d: Likewise.
- * ld-mmix/undef-3.d: Likewise.
-
-2005-03-16 David Heine <dlheine at tensilica.com>
- Bob Wilson <bob.wilson at acm.org>
-
- * ld-scripts/empty-orphan.d, ld-scripts/empty-orphan.exp,
- ld-scripts/empty-orphan.s, ld-scripts/emtpy-orphan.t: New test.
-
-2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-cris/hiddef1.d: Updated for empty section removal.
- * ld-cris/libdso-10.d: Likewise.
- * ld-cris/libdso-2.d: Likewise.
-
-2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-alpha/tlsbin.rd: Updated for empty section removal.
- * ld-alpha/tlsbinr.rd: Likewise.
- * ld-alpha/tlspic.rd: Likewise.
- * ld-arm/mixed-lib.sym: Likewise.
- * ld-i386/tlsbin.rd: Likewise.
- * ld-i386/tlsnopic.rd: Likewise.
- * ld-i386/tlspic.rd: Likewise.
- * ld-ia64/tlsbin.rd: Likewise.
- * ld-ia64/tlspic.rd: Likewise.
- * ld-powerpc/apuinfo.rd: Likewise.
- * ld-powerpc/powerpc.exp: Likewise.
- * ld-powerpc/tlsexe32.r: Likewise.
- * ld-s390/tlsbin.rd: Likewise.
- * ld-s390/tlsbin_64.rd: Likewise.
- * ld-s390/tlspic.rd: Likewise.
- * ld-s390/tlspic_64.rd: Likewise.
- * ld-sh/tlsbin-2.d: Likewise.
- * ld-sh/tlspic-2.d: Likewise.
- * ld-sparc/tlssunbin32.rd: Likewise.
- * ld-sparc/tlssunnopic32.rd: Likewise.
- * ld-sparc/tlssunpic32.rd: Likewise.
- * ld-x86-64/tlsbin.rd: Likewise.
- * ld-x86-64/tlspic.rd: Likewise.
-
-2005-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe32.d: Update.
- * ld-powerpc/tlsexe32.g: Update.
- * ld-powerpc/tlsexe32.r: Update.
- * ld-powerpc/tlsexe32.t: Update.
- * ld-powerpc/tlsso32.d: Update.
- * ld-powerpc/tlsso32.g: Update.
- * ld-powerpc/tlsso32.r: Update.
- * ld-powerpc/tlsso32.t: Update.
-
-2005-03-08 Hans-Peter Nilsson <hp at axis.com>
-
- Adjust testsuite for cris-axis-aout.
- * ld-cris/noglob1.d: Adjust regexp for a.out output.
- * ld-cris/badgotr1.d, ld-cris/expdyn1.d, ld-cris/expdyn2.d,
- ld-cris/expdyn3.d, ld-cris/expdyn4.d, ld-cris/expdyn5.d,
- ld-cris/expdyn6.d, ld-cris/expdyn7.d, ld-cris/gotplt1.d,
- ld-cris/gotplt2.d, ld-cris/gotplt3.d, ld-cris/hiddef1.d,
- ld-cris/libdso-1.d, ld-cris/libdso-10.d, ld-cris/libdso-11.d,
- ld-cris/libdso-12.d, ld-cris/libdso-13.d, ld-cris/libdso-14.d,
- ld-cris/libdso-2.d, ld-cris/libdso-3.d, ld-cris/libdso-4.d,
- ld-cris/locref1.d, ld-cris/locref2.d, ld-cris/nodyn4.d,
- ld-cris/nodyn5.d, ld-cris/pv32-1.d, ld-cris/undef1.d,
- ld-cris/weakref1.d: ld-cris/weakref2.d: Pass --em=criself to gas.
- * ld-cris/v10-v32.d, ld-cris/v10-va.d, ld-cris/v32-ba-1.d,
- ld-cris/v32-v10.d, ld-cris/v32-va.d, ld-cris/va-v10.d,
- ld-cris/va-v32.d: Ditto. Pass -m criself to gld.
- * ld-cris/v32-bin-1.d: Pass -m criself to gld.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * ld-alpha/tlsbin.dd: Update to suit changed section layout and
- removed section symbols.
- * ld-alpha/tlsbin.rd: Likewise.
- * ld-alpha/tlsbin.sd: Likewise.
- * ld-alpha/tlsbinr.dd: Likewise.
- * ld-alpha/tlsbinr.rd: Likewise.
- * ld-alpha/tlspic.dd: Likewise.
- * ld-alpha/tlspic.rd: Likewise.
- * ld-alpha/tlspic.sd: Likewise.
-
- * ld-powerpc/tlsexe.g: Update for removed dot-symbols.
- * ld-powerpc/tlsexe.r: Likewise.
- * ld-powerpc/tlsexetoc.g: Likewise.
- * ld-powerpc/tlsexetoc.r: Likewise.
-
-2005-03-04 David Daney <ddaney at avtrex.com>
-
- * ld-mips-elf/multi-got-no-shared-1.s,
- ld-mips-elf/multi-got-no-shared-2.s,
- ld-mips-elf/multi-got-no-shared.d: New tests.
- * ld-mips-elf/mips-elf.exp: Run them.
-
-2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-mips-elf/tlsbin-o32.s, ld-mips-elf/mips-dyn.ld,
- ld-mips-elf/tlslib-o32.got, ld-mips-elf/tlslib-o32.d,
- ld-mips-elf/tlslib-o32.s, ld-mips-elf/mips-lib.ld,
- ld-mips-elf/tlsbin-o32.got, ld-mips-elf/tlsdyn-o32.d,
- ld-mips-elf/tlsdyn-o32.got, ld-mips-elf/tlsbin-o32.d,
- ld-mips-elf/tlsdyn-o32.s, ld-mips-elf/tls-multi-got-1.got,
- ld-mips-elf/tls-multi-got-1-1.s, ld-mips-elf/tls-multi-got-1.d,
- ld-mips-elf/tls-multi-got-1.r, ld-mips-elf/tls-multi-got-1-2.s,
- ld-mips-elf/tlslib-o32-ver.got, ld-mips-elf/tlslib.ver,
- ld-mips-elf/tlslib-o32-hidden.got, ld-mips-elf/tlslib-hidden.ver,
- ld-mips-elf/tlsdyn-o32-1.d, ld-mips-elf/tlsdyn-o32-3.got,
- ld-mips-elf/tlsdyn-o32-2.d, ld-mips-elf/tlsdyn-o32-2.s,
- ld-mips-elf/tlsdyn-o32-3.d, ld-mips-elf/tlsdyn-o32-1.got,
- ld-mips-elf/tlsdyn-o32-2.got: New files.
- * ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2005-03-01 Nick Clifton <nickc at redhat.com>
-
- * ld-d10v/default_layout.d: Adjust expected offsets to allow for
- section alignment.
-
- * ld-discard/extern.d: Adjust expected warning to take into
- account the fact that the linker's name might be included and that
- the reloc might have been adjusted to be against the section
- symbol.
-
-2005-02-22 Eric Christopher <echristo at redhat.com>
-
- * ld-mips-elf/reloc-merge-lo16.d: Correct symbol
- table size for __start.
-
-2005-02-22 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-elfvsb/hidden2.d: Expect OBJECT.
- * ld-elfvsb/hidden2.s: Force type OBJECT.
- * ld-elfvsb/hidden2.ld: Place .dynamic explicitly.
- * ld-elf/start.s: Provide __start for MIPS.
- * ld-elfcomm/elfcomm.exp: Accept MIPS common section. XFAIL size change
- test.
- * ld-elf/warn1.d: Use group.ld instead of -Ttext.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * lib/ld-lib.exp (run_dump_test): Don't require a dump program if
- #warning given. Rearrange to allow $program to remain unset.
- Don't allow gas errors. Append objcopy_as_link output to that
- from the linker before testing against expected output. Fail the
- test if warning not found when expected. Conversely fail the
- test if ld errors or warnings given when not expected.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elf/exclude1.s: Use ".dc.a".
- * ld-elfvsb/hidden2.s: Likewise.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elf/warn1.d: Specify -Ttext.
- * ld-scripts/align.exp (align2a, align2b: Don't run on aout targets.
- * ld-scripts/align2.t: Discard all but .text and .data.
- * ld-scripts/align2a.d: Accept non-readonly for coff.
- * ld-scripts/align2b.d: Likewise.
- * lib/ld-lib.exp (is_aout_format): New function.
-
-2005-02-18 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/align2a.d: Don't assume anything about section
- padding or alignment, or max page size. Allow 64-bit addresses.
- * ld-scripts/align2b.d: Likewise.
-
-2005-02-17 Zack Weinberg <zack at codesourcery.com>
-
- * ld-scripts/align.exp: Rename existing "ALIGN" test to "align1".
- Add dump tests "align2a", "align2b", "align2c".
- * ld-scripts/align2.t, ld-scripts/align2a.s, ld-scripts/align2a.d
- * ld-scripts/align2b.s, ld-scripts/align2b.d
- * ld-scripts/align2c.s, ld-scripts/align2c.d: New files.
-
-2005-02-17 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic-static-6.d: Update.
- * ld-frv/fdpic*.d: Remove explicit -mfdpic from #as. Update
- spelling of errors and warnings.
-
-2005-02-15 Nigel Stephens <nigel at mips.com>
- Maciej W. Rozycki <macro at mips.com>
-
- * ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and
- R_MIPS16_LO16 relocs.
- * ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI.
- * ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests.
- * ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2005-02-14 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * ld-sparc/sparc.exp: Enable on Solaris. Disable 32-bit tests
- on sparc64-elf.
-
-2005-02-13 Jan Beulich <jbeulich at novell.com>
-
- * ld-elfvers/vers.exp (as_options): New. Set to -x for ia64.
- (build_binary): Pass as_options to ld_assemble.
- (test_ldfail): Likewise.
- (build_exec): Likewise.
- Pass as_options to run_ld_link_tests.
- * ld-ia64/tlsbin.s: Add .explicit.
- * ld-ia64/tlsbinpic.s: Likewise.
- * ld-ia64/tlspic1.s: Likewise.
-
-2005-02-13 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * ld-sparc/tlssunnopic32.rd: Adjust for .dynsym changes.
- * ld-sparc/tlssunpic32.rd: Likewise.
-
-2005-02-13 Eric Botcazou <ebotcazou at libertysurf.fr>
-
- * ld-elf/warn1.d: Do not run on sparc64-*-solaris2*.
-
-2005-02-11 Paul Brook <paul at codesourcery.com>
-
- * ld-elf/symbol1w.s: Avoid using @function syntax.
-
-2005-02-12 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elfvsb/hidden2.s: Replace .word with .long.
-
-2005-02-10 Paul Brook <paul at codesourcery.com>
-
- * ld-elfvsb/hidden2.s: New file
- * ld-elfvsb/hidden2.d: New file
- * ld-elfvsb/hidden2.ld: New file
-
-2005-02-07 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic-shared-8-fail.d: Tweak error messages.
-
-2005-02-07 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris/libdso-13.d: Adjust for being identified as warning.
-
- * ld-cris/globsymw2.s: New file.
- * ld-cris/warn3.d, ld-cris/warn4.d: New tests.
-
- * ld-discard/extern.d, ld-discard/start.d, ld-discard/static.d:
- Adjust for being identified as warnings.
-
- * ld-cris/stabs1.s: New file.
- * ld-cris/undef2.d, ld-cris/undef3.d: New tests.
-
- * ld-elf/start.s, ld-elf/symbolref.s, ld-elf/symbol1w.s,
- ld-elf/warn1.d: New test.
-
- * lib/ld-lib.exp: Support new directive "warning".
-
-2005-02-02 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-mips-elf/eh-frame3.d, ld-mips-elf/eh-frame4.d: Move comments
- after test commands.
- * ld-mips-elf/mips-elf.exp: Skip multi-got-1 on non-GNU/Linux
- systems.
-
-2005-02-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsso.r: Update.
- * ld-powerpc/tlstocso.r: Update.
-
-2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-mips-elf/elf-rel-got-n32.d, ld-mips-elf/elf-rel-got-n64-linux.d,
- ld-mips-elf/elf-rel-got-n64.d, ld-mips-elf/elf-rel-xgot-n32.d,
- ld-mips-elf/elf-rel-xgot-n64-linux.d, ld-mips-elf/elf-rel-xgot-n64.d,
- ld-mips-elf/jalbal.d: Force big-endian.
- * ld-mips-elf/multi-got-1.d: Make more flexible.
- * ld-mips-elf/rel32-n32.d, ld-mips-elf/rel32-o32.d,
- ld-mips-elf/rel64.d: Update offsets.
-
-2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-elf/group1.d: Accept OBJECT symbols.
-
-2005-01-31 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips-elf/eh-frame1.s: Create a .gcc_compiled_long32 if using
- 32-bit pointers.
- * ld-mips-elf/eh-frame1.d: Link in .gcc_compiled_long32 sections.
- * ld-mips-elf/eh-frame[34].d: New tests.
- * ld-mips-elf/mips-elf.exp: Run them.
-
-2005-01-28 Jan Beulich <jbeulich at novell.com>
-
- * ld/ia64/tlsbin.[rt]d: Widen expected offset/size ranges.
- * ld/ia64/tlspic.[rt]d: Likewise.
-
-2005-01-25 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
- * ld-frv/tls.exp: Likewise.
- 2004-11-26 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/tls-3.s: New.
- * ld-frv/tls-static-3.d: New.
- * ld-frv/tls-dynamic-3.d: New.
- * ld-frv/tls-pie-3.d: New.
- * ld-frv/tls-shared-3.d: New.
- * ld-frv/tls-relax-static-3.d: New.
- * ld-frv/tls-relax-dynamic-3.d: New.
- * ld-frv/tls-relax-pie-3.d: New.
- * ld-frv/tls-relax-shared-3.d: New.
- * ld-frv/tls.exp: Run the new tests.
- * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
- * ld-frv/tls-relax-dynamic-2.d: Likewise.
- * ld-frv/tls-relax-initial-shared-2.d: Likewise.
- 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/tls-1-dep.s: New.
- * ld-frv/tls-1-shared.lds: New.
- * ld-frv/tls-1.s: New.
- * ld-frv/tls-2.s: New.
- * ld-frv/tls-dynamic-1.d: New.
- * ld-frv/tls-dynamic-2.d: New.
- * ld-frv/tls-initial-shared-2.d: New.
- * ld-frv/tls-pie-1.d: New.
- * ld-frv/tls-relax-dynamic-1.d: New.
- * ld-frv/tls-relax-dynamic-2.d: New.
- * ld-frv/tls-relax-initial-shared-2.d: New.
- * ld-frv/tls-relax-pie-1.d: New.
- * ld-frv/tls-relax-shared-1.d: New.
- * ld-frv/tls-relax-shared-2.d: New.
- * ld-frv/tls-relax-static-1.d: New.
- * ld-frv/tls-shared-1-fail.d: New.
- * ld-frv/tls-shared-1.d: New.
- * ld-frv/tls-shared-2.d: New.
- * ld-frv/tls-static-1.d: New.
- * ld-frv/tls.exp: New.
- * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
- * ld-frv/fdpic-pie-2.d: Likewise.
- * ld-frv/fdpic-pie-6.d: Likewise.
- * ld-frv/fdpic-pie-7.d: Likewise.
- * ld-frv/fdpic-pie-8.d: Likewise.
- * ld-frv/fdpic-shared-1.d: Likewise.
- * ld-frv/fdpic-shared-2.d: Likewise.
- * ld-frv/fdpic-shared-3.d: Likewise.
- * ld-frv/fdpic-shared-4.d: Likewise.
- * ld-frv/fdpic-shared-5.d: Likewise.
- * ld-frv/fdpic-shared-6.d: Likewise.
- * ld-frv/fdpic-shared-7.d: Likewise.
- * ld-frv/fdpic-shared-8.d: Likewise.
- * ld-frv/fdpic-shared-local-2.d: Likewise.
- * ld-frv/fdpic-shared-local-8.d: Likewise.
- * ld-frv/fdpic-static-1.d: Likewise.
- * ld-frv/fdpic-static-2.d: Likewise.
- * ld-frv/fdpic-static-6.d: Likewise.
- * ld-frv/fdpic-static-7.d: Likewise.
- * ld-frv/fdpic-static-8.d: Likewise.
-
-2005-01-17 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips-elf/eh-frame2-{n32,n64}.d: New tests.
- * ld-mips-elf/mips-elf.exp: Run them.
-
-2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
-
- * ld-sh/arch/arch.exp: Correct the email address.
- Correct a few comment typos.
- (test_arch,test_arch_error): Use 'ld -r' to avoid illegal
- relocations killing the test.
- * ld-sh/arch/arch_expected.txt: Update/Correct the test results.
- * ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
- * ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
- * ld-sh/arch/sh2a-nofpu.s: Generate new file.
- * ld-sh/arch/sh2a-or-sh3e.s: Regenerate.
- * ld-sh/arch/sh2a-or-sh4.s: Regenerate.
- * ld-sh/arch/sh2a.s: Generate new file.
- * ld-sh/arch/sh2e.s: Regenerate.
- * ld-sh/arch/sh2.s: Regenerate.
- * ld-sh/arch/sh3-dsp.s: Regenerate.
- * ld-sh/arch/sh3e.s: Regenerate.
- * ld-sh/arch/sh3-nommu.s: Regenerate.
- * ld-sh/arch/sh3.s: Regenerate.
- * ld-sh/arch/sh4al-dsp.s: Regenerate.
- * ld-sh/arch/sh4a-nofpu.s: Regenerate.
- * ld-sh/arch/sh4a.s: Regenerate.
- * ld-sh/arch/sh4-nofpu.s: Regenerate.
- * ld-sh/arch/sh4-nommu-nofpu.s: Regenerate.
- * ld-sh/arch/sh4.s: Regenerate.
- * ld-sh/arch/sh-dsp.s: Regenerate.
- * ld-sh/arch/sh.s: Regenerate.
-
-2005-01-11 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-sh/shared-1.d: Update for changed dynamic syms.
- * ld-sh/sh64/gotplt.d: Likewise.
- * ld-sh/sh64/init-cmpct.d: Likewise.
- * ld-sh/sh64/init-media.d: Likewise.
- * ld-sh/sh64/init64.d: Likewise.
-
-2004-12-21 Tomer Levi <Tomer.Levi at nsc.com>
-
- * ld-crx/reloc-abs32.d: Update reference file according
- to disassembler printing method.
- * ld-crx/reloc-rel16.d: Likewise.
- * ld-crx/reloc-rel24.d: Likewise.
- * ld-crx/reloc-rel32.d: Likewise.
- * ld-crx/reloc-rel4.d: Likewise.
- * ld-crx/reloc-rel8-cmp.d: Likewise.
- * ld-crx/reloc-rel8.d: Likewise.
-
-2004-12-16 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-v850: New directory.
-
-2004-12-14 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips-elf/jal-overflow-2.[sd]: New test.
- * ld-mips-elf/mips-elf.exp: Run it.
-
-2004-12-13 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips-elf/mips-elf.exp: Only run jalbal if n32 is supported.
-
-2004-12-11 Alan Modra <amodra at bigpond.net.au>
-
- * ld-mmix/bpo-1.d: Update for changed section syms.
- * ld-mmix/bpo-10.d: Likewise.
- * ld-mmix/bpo-11.d: Likewise.
- * ld-mmix/bpo-14.d: Likewise.
- * ld-mmix/bpo-16.d: Likewise.
- * ld-mmix/bpo-17.d: Likewise.
- * ld-mmix/bpo-18.d: Likewise.
- * ld-mmix/bpo-19.d: Likewise.
- * ld-mmix/bpo-2.d: Likewise.
- * ld-mmix/bpo-22.d: Likewise.
- * ld-mmix/bpo-3.d: Likewise.
- * ld-mmix/bpo-4.d: Likewise.
- * ld-mmix/bpo-5.d: Likewise.
- * ld-mmix/bpo-6.d: Likewise.
- * ld-mmix/bpo-9.d: Likewise.
- * ld-mmix/greg-1.d: Likewise.
- * ld-mmix/greg-19.d: Likewise.
- * ld-mmix/greg-2.d: Likewise.
- * ld-mmix/greg-3.d: Likewise.
- * ld-mmix/greg-4.d: Likewise.
- * ld-mmix/greg-5.d: Likewise.
- * ld-mmix/greg-5s.d: Likewise.
- * ld-mmix/greg-6.d: Likewise.
- * ld-mmix/greg-7.d: Likewise.
- * ld-mmix/loc1.d: Likewise.
- * ld-mmix/loc2.d: Likewise.
- * ld-mmix/loc3.d: Likewise.
- * ld-mmix/loc4.d: Likewise.
- * ld-mmix/loc6.d: Likewise.
- * ld-mmix/locdo-1.d: Likewise.
- * ld-mmix/loct-1.d: Likewise.
- * ld-mmix/locto-1.d: Likewise.
- * ld-mmix/start-1.d: Likewise.
- * ld-sh/sh64/abi32.xd: Likewise.
- * ld-sh/sh64/abi64.xd: Likewise.
- * ld-sh/sh64/cmpct1.xd: Likewise.
- * ld-sh/sh64/mix1.xd: Likewise.
- * ld-sh/sh64/mix2.xd: Likewise.
- * ld-sh/sh64/rel32.xd: Likewise.
- * ld-sh/sh64/rel64.xd: Likewise.
- * ld-sh/sh64/shdl32.xd: Likewise.
- * ld-sh/sh64/shdl64.xd: Likewise.
-
-2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
-
- * ld-mips-elf/jalbal.d: New test.
- * ld-mips-elf/jalbal.s: New test.
- * ld-mips-elf/mips-elf.exp: Run it.
-
-2004-12-08 Ian Lance Taylor <ian at wasabisystems.com>
-
- * ld-mips-elf/jaloverflow.d: New test.
- * ld-mips-elf/jaloverflow.s: New test.
- * ld-mips-elf/mips-elf.exp: Run it.
-
-2004-12-03 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elf/group1.d: Support 64bit.
-
-2004-12-01 Paul Brook <paul at codesourcery.com>
-
- * ld-elf/group1.d: New test.
- * ld-elf/group.ld, ld-elf/group1a.s, ld-elf/group1b.s: New test.
-
-2004-12-01 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-selective/selective.exp: Use -print-libgcc-file-name for
- ARM and v850 also.
-
-2004-11-24 Paul Brook <paul at codesourcery.com>
-
- * ld-arm/mixed-lib.sym: Update for THUMB_FUNC change.
-
-2004-11-19 Nick Clifton <nickc at redhat.com>
-
- * ld-scripts/script.exp: Add test of memory linker script.
- Reorganise code to remove unnecessary indentation.
- Fix target tests to avoid using --image-base with *-nto targets.
- * ld-scripts/memory.t: New linker script to test the MEMORY
- section and the ORIGIN and LENGTH operators.
-
-2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s,
- ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r,
- ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld,
- ld-arm/arm-lib.ld: New files.
- * ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d,
- ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
- ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d,
- ld-arm/arm-static-app.r: Update for big-endian.
- * ld-arm/arm-elf.exp: Run the new tests.
-
-2004-11-16 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips-elf/eh-frame1.{s,ld},
- * ld-mips-elf/eh-frame1-{n32,n64},d: New test.
- * ld-mips-elf/mips-elf.exp: Run it.
-
-2004-11-10 Alan Modra <amodra at bigpond.net.au>
-
- * ld-d10v/reloc-003.d: Update for changed error message.
- * ld-d10v/reloc-004.d: Likewise.
- * ld-d10v/reloc-007.d: Likewise.
- * ld-d10v/reloc-008.d: Likewise.
- * ld-d10v/reloc-011.d: Likewise.
- * ld-d10v/reloc-012.d: Likewise.
- * ld-d10v/reloc-015.d: Likewise.
- * ld-d10v/reloc-016.d: Likewise.
-
-2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
-
- * ld-scripts/weak.exp: Enable test on PE, XFAIL non-i386 PE.
- * ld-undefined/weak-undef.exp: Enable test on PE, XFAIL non-i386
- PE.
- * lib/ld-lib.exp (is_pecoff_format): New.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * ld-maxq: New directory. Contains tests for the new maxq port.
-
-2004-11-04 Hans-Peter Nilsson <hp at bitrange.com>
-
- * ld-elf/merge.d: xfail crisv32-*-*.
- * ld-cris/dsov32-1.s, ld-cris/dsov32-2.s, ld-cris/dsov32-3.s,
- ld-cris/dsov32-4.s, ld-cris/libdso-10.d, ld-cris/libdso-11.d,
- ld-cris/libdso-12.d, ld-cris/libdso-13.d, ld-cris/libdso-14.d,
- ld-cris/move-1.s, ld-cris/pv32-1.d, ld-cris/pv32.s,
- ld-cris/start1.s, ld-cris/v10-v32.d, ld-cris/v10-va.d,
- ld-cris/v32-ba-1.d, ld-cris/v32-ba-1.s, ld-cris/v32-bin-1.d,
- ld-cris/v32-bin-1.s, ld-cris/v32-v10.d, ld-cris/v32-va.d,
- ld-cris/va-v10.d, ld-cris/va-v32.d: New tests.
- * ld-cris/ldsym1.d: Adjust for change in linker script.
-
-2004-11-02 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris/expdyn1.d, ld-cris/expdyn5.d, ld-cris/expdyn6.d,
- ld-cris/expdyn7.d, ld-cris/gotplt1.d, ld-cris/gotplt2.d,
- ld-cris/gotplt3.d, ld-cris/hiddef1.d, ld-cris/libdso-2.d,
- ld-cris/locref1.d, ld-cris/locref2.d, ld-cris/weakref2.d,
- ld-i386/tlsbin.rd, ld-i386/tlsnopic.rd, ld-i386/tlspic.rd,
- ld-ia64/tlsbin.dd, ld-ia64/tlsbin.rd, ld-ia64/tlspic.dd,
- ld-ia64/tlspic.rd, ld-powerpc/tlsexe32.d, ld-powerpc/tlsexe32.g,
- ld-powerpc/tlsexe32.r, ld-powerpc/tlsexe32.t,
- ld-powerpc/tlsso32.d, ld-powerpc/tlsso32.g, ld-powerpc/tlsso32.r,
- ld-powerpc/tlsso32.t, ld-s390/tlsbin.dd, ld-s390/tlsbin.rd,
- ld-s390/tlspic.rd, ld-sparc/tlssunbin32.rd,
- ld-sparc/tlssunpic32.rd, ld-x86-64/tlsbin.rd, ld-x86-64/tlspic.dd,
- ld-x86-64/tlspic.rd: Adjust for _GLOBAL_OFFSET_TABLE_ now hidden.
-
-2004-10-26 Paul Brook <paul at codesourcery.com>
-
- * ld-elfvers/vers.exp (build_binary): Add ldargs parameter.
- (build_vers_lib_pic_flags): New function.
- Add vers29 test.
- * ld-elfvers/vers29.c: New file.
- * ld-elfvers/vers29.dsym: New file.
- * ld-elfvers/vers29.ver: New file.
-
-2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
-
- * ld-mmix/sec-8m.d: Adjust test for dump using correct section
- length.
- * ld-mmix/sec-9.d: Renamed test, formerly known as sec-5.d.
- * ld-mmix/sec-5.d, ld-mmix/b-offloc.s: Rewritten test.
-
- * ld-mmix/getaa-6b.d, ld-mmix/getaa-6f.d, ld-mmix/getaa14b.d,
- ld-mmix/getaa14f.d, ld-mmix/jumpa-6b.d, ld-mmix/jumpa-6f.d,
- ld-mmix/jumpa14b.d, ld-mmix/jumpa14f.d, ld-mmix/reg-1.d,
- ld-mmix/reg-1m.d: Adjust for changed error message format.
-
-2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elf/exclude.exp: Allow cris-*-elf.
-
- * ld-elf/exclude1.s: Add ".data". Remove "- include_sym".
- * ld-elf/exclude2.s: Add ".data".
-
-2004-10-19 Hans-Peter Nilsson <hp at bitrange.com>
-
- * ld-elf/exclude.exp: Don't run for cris-*-elf.
-
-2004-10-16 Daniel Jacobowitz <dan at debian.org>
-
- * ld-elf/exclude1.s, ld-elf/exclude2.s, ld-elf/exclude.exp: New.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * ld-crx/reloc-num8.d: Adjust for changed orphan placement.
- * ld-crx/reloc-num16.d: Likewise.
- * ld-crx/reloc-num32.d: Likewise.
- * ld-scripts/provide-2.t: Start .data at 0x2000.
- * ld-scripts/provide-2.d: Adjust.
-
-2004-10-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-scripts/sort.exp: Run for ELF targets only.
-
-2004-10-14 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/overlay-size.d: Update for changed orphan section
- placement.
- * ld-mmix/bpo-18.d: Likewise.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
-
- * ld-xtensa/lcall1.s: Use .literal directive.
- * ld-xtensa/lcall2.s: Align function entry.
- * ld-xtensa/coalesce2.s: Likewise.
-
-2004-10-04 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-scripts/sort.exp: New file for section sorting tests.
- * ld-scripts/sort_b_a.d: Likewise
- * ld-scripts/sort_b_a.s: Likewise
- * ld-scripts/sort_b_a.t: Likewise
- * ld-scripts/sort_b_a_a-1.d: Likewise
- * ld-scripts/sort_b_a_a-2.d: Likewise
- * ld-scripts/sort_b_a_a-3.d: Likewise
- * ld-scripts/sort_b_a_a.t: Likewise
- * ld-scripts/sort_b_a_n-1.d: Likewise
- * ld-scripts/sort_b_a_n-2.d: Likewise
- * ld-scripts/sort_b_a_n-3.d: Likewise
- * ld-scripts/sort_b_a_n.t: Likewise
- * ld-scripts/sort_b_n.d: Likewise
- * ld-scripts/sort_b_n.s: Likewise
- * ld-scripts/sort_b_n.t: Likewise
- * ld-scripts/sort_b_n_a-1.d: Likewise
- * ld-scripts/sort_b_n_a-2.d: Likewise
- * ld-scripts/sort_b_n_a-3.d: Likewise
- * ld-scripts/sort_b_n_a.t: Likewise
- * ld-scripts/sort_b_n_n-1.d: Likewise
- * ld-scripts/sort_b_n_n-2.d: Likewise
- * ld-scripts/sort_b_n_n-3.d: Likewise
- * ld-scripts/sort_b_n_n.t: Likewise
- * ld-scripts/sort_n_a-a.s: Likewise
- * ld-scripts/sort_n_a-b.s: Likewise
- * ld-scripts/sort_no-1.d: Likewise
- * ld-scripts/sort_no-2.d: Likewise
- * ld-scripts/sort_no.t: Likewise
-
-2004-10-01 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-powerpc/tls.s: Don't set tls type for undefined syms.
- * ld-powerpc/tls32.s: Likewise.
- * ld-powerpc/tlstoc.s: Likewise.
- * ld-s390/tlsbin.s: Likewise.
- * ld-s390/tlsbin_64.s: Likewise.
- * ld-s390/tlsbinpic.s: Likewise.
- * ld-s390/tlsbinpic_64.s: Likewise.
- * ld-s390/tlspic1.s: Likewise.
- * ld-s390/tlspic1_64.s: Likewise.
- * ld-sparc/tlssunbin32.s: Likewise.
- * ld-sparc/tlssunbinpic32.s: Likewise.
- * ld-sparc/tlssunnopic32.s: Likewise.
- * ld-sparc/tlssunpic32.s: Likewise.
-
-2004-10-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld-s390/tlsbin.s: Set tls type for undefined syms.
- * ld-s390/tlsbin_64.s: Likewise.
- * ld-s390/tlsbinpic.s: Likewise.
- * ld-s390/tlsbinpic_64.s: Likewise.
- * ld-s390/tlspic1.s: Likewise.
- * ld-s390/tlspic1_64.s: Likewise.
- * ld-sparc/tlssunbin32.s: Likewise.
- * ld-sparc/tlssunbinpic32.s: Likewise.
- * ld-sparc/tlssunnopic32.s: Likewise.
- * ld-sparc/tlssunpic32.s: Likewise.
-
-2004-10-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld-sparc/tlssunbin32.sd: Adjust for changed .dynamic location.
-
-2004-10-01 Nick Clifton <nickc at redhat.com>
-
- PR 371
- * ld-undefined/undefined.exp: Remove redundant XPASS
- specifications.
-
-2004-10-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tls.s (gd, ld): Set tls type for undefined syms.
- * ld-powerpc/tls32.s (gd, ld): Likewise.
- * ld-powerpc/tlstoc.s (gd, ld): Likewise.
- * ld-powerpc/tlsso.r: Update.
- * ld-powerpc/tlsso32.r: Update.
- * ld-powerpc/tlstocso.r: Update.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * ld-arm/arm-elf.exp: Add test for --target2=abs.
- * ld-arm/arm-target2-abs.d: New file.
-
-2004-09-29 Alan Modra <amodra at bigpond.net.au>
-
- * ld-pe/secrel1.s: Pad .rdata out to 16 byte boundary.
- * ld-pe/secrel.d: Adjust to suit.
-
-2004-09-24 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elfvsb/elfvsb.exp: Remove file name from "undefined ref" string.
-
-2004-09-22 Alan Modra <amodra at bigpond.net.au>
-
* ld-i386/tlsbin.rd: Update for changed segment map.
+ * ld-i386/tlsbindesc.rd: Likewise.
+ * ld-i386/tlsdesc.rd: Likewise.
* ld-i386/tlsnopic.rd: Likewise.
* ld-i386/tlspic.rd: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
@@ -1507,736 +229,66 @@
* ld-sh/tlsbin-2.d: Likewise.
* ld-sh/tlspic-2.d: Likewise.
* ld-x86-64/tlsbin.rd: Likewise.
+ * ld-x86-64/tlsbindesc.rd: Likewise.
+ * ld-x86-64/tlsdesc.rd: Likewise.
* ld-x86-64/tlspic.rd: Likewise.
-2004-09-22 Alan Modra <amodra at bigpond.net.au>
+2006-01-31 Eric Botcazou <ebotcazou at libertysurf.fr>
- * ld-scripts/overlay-size.d: Don't check .mbss lma.
- * ld-sh/sh64/mix1.xd: Update for changed .bss file offset.
- * ld-sh/sh64/shdl32.xd: Likewise.
- * ld-sh/sh64/shdl64.xd: Likewise.
+ * ld-sparc/sparc.exp: Do not run 64-bit tests on Solaris 2.5.1
+ and Solaris 2.6.
-2004-09-17 Paul Brook <paul at codesourcery.com>
+2006-01-27 H.J. Lu <hongjiu.lu at intel.com>
- * ld-arm/arm-target1-{abs,rel}.d}: New files.
- * ld-arm/arm-target1.s: New file.
- * ld-arm/arm-target2-{,got-}rel.d: New files.
- * ld-arm/arm-target2.s: New file.
- * ld-arm/arm-rel31.d: New files.
- * ld-arm/arm-rel31.s: New files.
- * ld-arm/arm.ld: New file.
- * ld-arm/arm-elf.exp: Add new tests.
+ PR ld/2218
+ * ld-pie/pie.exp: New file.
+ * ld-pie/weakundef.c: Likewise.
+ * ld-pie/weakundef.out: Likewise.
-2004-09-07 Hans-Peter Nilsson <hp at axis.com>
+ * lib/ld-lib.exp (run_ld_link_exec_tests): Fix nesting. Support
+ building PIE and shared library.
- * ld-cris/hiddef1.d, ld-cris/hiddef1.s, ld-cris/hidrefgotplt1.s:
- New test.
+2006-01-18 Alexandre Oliva <aoliva at redhat.com>
-2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+ Introduce TLS descriptors for i386 and x86_64.
+ * ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*.
+ Add new tests.
+ * ld-i386/pcrel16.d: Add -melf_i386.
+ * ld-i386/pcrel8.d: Likewise.
+ * ld-i386/tlsbindesc.dd: New.
+ * ld-i386/tlsbindesc.rd: New.
+ * ld-i386/tlsbindesc.s: New.
+ * ld-i386/tlsbindesc.sd: New.
+ * ld-i386/tlsbindesc.td: New.
+ * ld-i386/tlsdesc.dd: New.
+ * ld-i386/tlsdesc.rd: New.
+ * ld-i386/tlsdesc.s: New.
+ * ld-i386/tlsdesc.sd: New.
+ * ld-i386/tlsdesc.td: New.
+ * ld-i386/tlsgdesc.dd: New.
+ * ld-i386/tlsgdesc.rd: New.
+ * ld-i386/tlsgdesc.s: New.
+ * ld-x86-64/x86-64.exp: Run new tests.
+ * ld-x86-64/tlsbindesc.dd: New.
+ * ld-x86-64/tlsbindesc.rd: New.
+ * ld-x86-64/tlsbindesc.s: New.
+ * ld-x86-64/tlsbindesc.sd: New.
+ * ld-x86-64/tlsbindesc.td: New.
+ * ld-x86-64/tlsdesc.dd: New.
+ * ld-x86-64/tlsdesc.pd: New.
+ * ld-x86-64/tlsdesc.rd: New.
+ * ld-x86-64/tlsdesc.s: New.
+ * ld-x86-64/tlsdesc.sd: New.
+ * ld-x86-64/tlsdesc.td: New.
+ * ld-x86-64/tlsgdesc.dd: New.
+ * ld-x86-64/tlsgdesc.rd: New.
+ * ld-x86-64/tlsgdesc.s: New.
- * ld-crx: New directory.
- * ld-crx/crx.exp: New test script.
- * ld-crx/crx.ld: New linker script.
- * ld-crx/reloc-abs32.s: New file.
- * ld-crx/reloc-abs32.d: Likewise.
- * ld-crx/reloc-imm16.s: Likewise.
- * ld-crx/reloc-imm16.d: Likewise.
- * ld-crx/reloc-imm32.s: Likewise.
- * ld-crx/reloc-imm32.d: Likewise.
- * ld-crx/reloc-num8.s: Likewise.
- * ld-crx/reloc-num8.d: Likewise.
- * ld-crx/reloc-num16.s: Likewise.
- * ld-crx/reloc-num16.d: Likewise.
- * ld-crx/reloc-num32.s: Likewise.
- * ld-crx/reloc-num32.d: Likewise.
- * ld-crx/reloc-regrel12.s: Likewise.
- * ld-crx/reloc-regrel12.d: Likewise.
- * ld-crx/reloc-regrel22.s: Likewise.
- * ld-crx/reloc-regrel22.d: Likewise.
- * ld-crx/reloc-regrel28.s: Likewise.
- * ld-crx/reloc-regrel28.d: Likewise.
- * ld-crx/reloc-regrel32.s: Likewise.
- * ld-crx/reloc-regrel32.d: Likewise.
- * ld-crx/reloc-rel4.s: Likewise.
- * ld-crx/reloc-rel4.d: Likewise.
- * ld-crx/reloc-rel8.s: Likewise.
- * ld-crx/reloc-rel8.d: Likewise.
- * ld-crx/reloc-rel8-cmp.s: Likewise.
- * ld-crx/reloc-rel8-cmp.d: Likewise.
- * ld-crx/reloc-rel16.s: Likewise.
- * ld-crx/reloc-rel16.d: Likewise.
- * ld-crx/reloc-rel24.s: Likewise.
- * ld-crx/reloc-rel24.d: Likewise.
- * ld-crx/reloc-rel32.s: Likewise.
- * ld-crx/reloc-rel32.d: Likewise.
+2006-01-03 Hans-Peter Nilsson <hp at bitrange.com>
-2004-08-21 Hans-Peter Nilsson <hp at axis.com>
+ * ld-mmix/sec-1.d: Adjust for section order changes.
- * ld-cris/expdyn1.d, ld-cris/expdyn5.d, ld-cris/expdyn6.d,
- ld-cris/expdyn7.d, ld-cris/gotplt2.d, ld-cris/gotplt3.d,
- ld-cris/libdso-1.d, ld-cris/libdso-2.d, ld-cris/locref1.d,
- ld-cris/nodyn4.d, ld-cris/nodyn5.d: Adjust for reordered
- sections.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elfvsb/elfvsb.exp: Cope with ppc64 dot symbols.
-
-2004-08-17 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/cross1.t: Remove .opd section spec.
-
-2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
-
- * ld-undefined/undefined.exp: The undefine tests now work on
- 68HC11 and 68HC12.
-
-2004-07-29 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-sh/sh64/crange3-cmpct.rd: Update.
- * ld-sh/sh64/crange3-media.rd: Update.
-
-2004-07-27 Nitin Yewale <nitiny at kpitcummins.com>
-
- * ld-h8300/h8300.exp: Addition of new test case to check
- relaxation for H8S target.
- * ld-h8300/relax-6.s: New test source file.
- * ld-h8300/relax-6.d: New test expected disassembly file.
- * ld-h8300/relax-6-coff.d: New test expected disassembly file for
- coff format.
-
-2004-07-22 Nick Clifton <nickc at redhat.com>
-
- PR/280
- * ld-h8300/relax-3-coff.d: Remove duplicated raw insn values.
- * ld-h8300/relax-3.d: Likewise.
- * ld-h8300/relax-4-coff.d: Likewise.
- * ld-h8300/relax-4.d: Likewise.
- * ld-h8300/relax-5-coff.d: Likewise.
- * ld-h8300/relax.d: Likewise.
-
-2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-scripts/crossref.exp: XFAIL ia64-*-* on the first test.
-
-2004-07-13 Nitin Yewale <nitiny at kpitcummins.com>
-
- * ld-h8300/h8300.exp: Addition of gcsection test case.
- * ld-h8300/gcsection.s: New test source file.
- * ld-h8300/gcsection.d: New test expected disassembly file.
-
-2004-07-08 Maciej W. Rozycki <macro at linux-mips.org>
-
- * ld-mips-elf/reloc-merge-lo16.{s,d,ld}: New test.
- * ld-mips-elf/mips-elf.exp: Run it.
-
-2004-07-02 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-elf/frame.exp: Don't run on sh*-*-elf*.
- * ld-sh/shared-1.d: Adjust for section reordering changes.
- * ld-sh/shared-2.d: Likewise.
- * ld-sh/tlsbin-2.d: Likewise.
- * ld-sh/tlspic-2.d: Likewise.
- * ld-sh/sh64/abi32.xd: Likewise.
- * ld-sh/sh64/abi64.xd: Likewise.
- * ld-sh/sh64/cmpct1.xd: Likewise.
- * ld-sh/sh64/crange1.rd: Likewise.
- * ld-sh/sh64/crange2.rd: Likewise.
- * ld-sh/sh64/crange3-cmpct.rd: Likewise.
- * ld-sh/sh64/crange3-media.rd: Likewise.
- * ld-sh/sh64/crange3.rd: Likewise.
- * ld-sh/sh64/gotplt.d: Likewise.
- * ld-sh/sh64/init-cmpct.d: Likewise.
- * ld-sh/sh64/init-media.d: Likewise.
- * ld-sh/sh64/init64.d: Likewise.
- * ld-sh/sh64/mix1.xd: Likewise.
- * ld-sh/sh64/mix2.xd: Likewise.
- * ld-sh/sh64/shdl32.xd: Likewise.
- * ld-sh/sh64/shdl64.xd: Likewise.
-
-2004-07-02 Alan Modra <amodra at bigpond.net.au>
-
- * ld-discard/static.d: Accept both original sym and section sym.
-
-2004-07-01 Jakub Jelinek <jakub at redhat.com>
-
- * ld-sparc/tlssunpic32.rd: Adjust for section reordering changes
- and removal of unneeded STT_SECTION symbols from .dynsym.
- * ld-sparc/tlssunbin32.rd: Likewise.
- * ld-sparc/tlssunpic32.dd: Likewise.
- * ld-sparc/tlssunpic32.sd: Likewise.
- * ld-sparc/tlssunbin32.dd: Likewise.
- * ld-sparc/tlssunbin32.sd: Likewise.
- * ld-sparc/tlssunbin32.td: Likewise.
-
-2004-07-01 Alan Modra <amodra at bigpond.net.au>
-
- * ld-discard/extern.d: Update.
- * ld-discard/start.d: Update.
- * ld-discard/static.d: Update.
-
-2004-06-30 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 233
- * ld-discard/extern.d: Updated.
- * ld-discard/start.d: Likewise.
- * ld-discard/static.d: Likewise.
-
-2004-06-29 J"orn Rennecke <joern.rennecke at superh.com>
-
- Actually add these files:
- 2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
- * ld-sh/arch/arch.exp: New test script.
- * ld-sh/arch/arch_expected.txt: New file.
- * ld-sh/arch/sh.s: New file.
- * ld-sh/arch/sh2.s: New file.
- * ld-sh/arch/sh-dsp.s: New file.
- * ld-sh/arch/sh2e.s: New file.
- * ld-sh/arch/sh3-nommu.s: New file.
- * ld-sh/arch/sh3.s: New file.
- * ld-sh/arch/sh3-dsp.s: New file.
- * ld-sh/arch/sh3e.s: New file.
- * ld-sh/arch/sh4-nommu-nofpu.s: New file.
- * ld-sh/arch/sh4-nofpu.s: New file.
- * ld-sh/arch/sh4.s: New file.
- * ld-sh/arch/sh4a-nofpu.s: New file.
- * ld-sh/arch/sh4al-dsp.s: New file.
- * ld-sh/arch/sh4a.s: New file.
-
-2004-06-29 Alan Modra <amodra at bigpond.net.au>
-
- * ld-elf/frame.exp: Don't run on mcore.
-
-2004-06-26 Alan Modra <amodra at bigpond.net.au>
-
- * ld-bootstrap/bootstrap.exp: Handle timestamps in more pe targets.
-
-2004-06-24 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elfvers/vers.exp: Use PIC for shared libraries by default.
-
-2004-06-21 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic-pie-1.d: Adjust for pie-specific link script.
- * ld-frv/fdpic-pie-2.d: Likewise.
- * ld-frv/fdpic-pie-6.d: Likewise.
- * ld-frv/fdpic-pie-7.d: Likewise.
- * ld-frv/fdpic-pie-8.d: Likewise.
- * ld-frv/fdpic-shared-1.d: Likewise.
- * ld-frv/fdpic-shared-2.d: Likewise.
- * ld-frv/fdpic-shared-3.d: Likewise.
- * ld-frv/fdpic-shared-4.d: Likewise.
- * ld-frv/fdpic-shared-5.d: Likewise.
- * ld-frv/fdpic-shared-6.d: Likewise.
- * ld-frv/fdpic-shared-7.d: Likewise.
- * ld-frv/fdpic-shared-8.d: Likewise.
- * ld-frv/fdpic-shared-local-2.d: Likewise.
- * ld-frv/fdpic-shared-local-8.d: Likewise.
-
-2004-06-21 Nick Clifton <nickc at redhat.com>
-
- * ld-elf/frame.exp: Handle ports which do not support the --shared
- linker switch.
-
-2004-06-18 Jan Beulich <jbeulich at novell.com>
-
- * ld-elfvsb/main.c: Ensure visibility_def and visibility_func are
- actually referenced (gcc 3.4 eliminates comparisons of addresses
- of global symbols with NULL).
- * ld-selective/selective.exp: Suppress -fvtable-gc tests for gcc
- 3.4.0 and above, as this option and its functionality is no longer
- supported, making these tests fail).
-
-2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * ld-sh/arch/arch.exp: New test script.
- * ld-sh/arch/arch_expected.txt: New file.
- * ld-sh/arch/sh.s: New file.
- * ld-sh/arch/sh2.s: New file.
- * ld-sh/arch/sh-dsp.s: New file.
- * ld-sh/arch/sh2e.s: New file.
- * ld-sh/arch/sh3-nommu.s: New file.
- * ld-sh/arch/sh3.s: New file.
- * ld-sh/arch/sh3-dsp.s: New file.
- * ld-sh/arch/sh3e.s: New file.
- * ld-sh/arch/sh4-nommu-nofpu.s: New file.
- * ld-sh/arch/sh4-nofpu.s: New file.
- * ld-sh/arch/sh4.s: New file.
- * ld-sh/arch/sh4a-nofpu.s: New file.
- * ld-sh/arch/sh4al-dsp.s: New file.
- * ld-sh/arch/sh4a.s: New file.
-
-2004-05-18 Nick Clifton <nickc at redhat.com>
-
- * ld-elf/frame.s: Replace @ with % so that the file can be
- compiled by an ARM targeted GAS.
- * ld-elf/table.s: Likewise.
- * ld-elf/tbss.s: Likewise. Also replace .align <foo> with
- .p2align (log2 <foo>) to cope with the fact that the ARM .align
- directive takes a power-of-two argument.
-
-2004-05-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elf/frame.exp: New file. Test read-only .eh_frame and
- .gcc_except_table sections.
- * ld-elf/frame.s: Likewise.
- * ld-elf/table.s: Likewise.
- * ld-elf/tbss.s: Likewise.
-
-2004-05-12 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-sh/tlsbin-2.d: Adjust for section reordering changes
- and removal of unneeded STT_SECTION symbols from .dynsym.
- * ld-sh/tlsbin-3.d: Likewise.
- * ld-sh/tlspic-2.d: Likewise.
-
-2004-05-12 Ben Elliston <bje at au.ibm.com>
-
- * ld-sh/sh64/relax.exp: Remove stray semicolons.
- * ld-sh/sh64/relfail.exp: Likewise.
- * lib/ld-lib.exp: Likewise.
-
-2004-05-11 Jakub Jelinek <jakub at redhat.com>
-
- * ld-i386/tlspic.rd: Adjust for section reordering changes
- and removal of unneeded STT_SECTION symbols from .dynsym.
- * ld-i386/tlspic.dd: Likewise.
- * ld-i386/tlspic.sd: Likewise.
- * ld-i386/tlsbin.rd: Likewise.
- * ld-i386/tlsbinpic.s: Likewise.
- * ld-i386/tlsbin.dd: Likewise.
- * ld-i386/tlsbin.sd: Likewise.
- * ld-i386/tlsnopic.rd: Likewise.
- * ld-i386/tlsnopic1.s: Likewise.
- * ld-i386/combreloc.d: Likewise.
- * ld-i386/tlsnopic.dd: Likewise.
- * ld-i386/tlsnopic.sd: Likewise.
- * ld-x86-64/tlspic.rd: Likewise.
- * ld-x86-64/tlspic.dd: Likewise.
- * ld-x86-64/tlsbin.dd: Likewise.
- * ld-x86-64/tlspic.sd: Likewise.
- * ld-x86-64/tlsbin.sd: Likewise.
- * ld-x86-64/tlspic.td: Likewise.
- * ld-x86-64/tlsbin.td: Likewise.
- * ld-x86-64/tlsbin.rd: Likewise.
- * ld-s390/tlspic1.s: Likewise.
- * ld-s390/tlsbinpic.s: Likewise.
- * ld-s390/tlspic.rd: Likewise.
- * ld-s390/tlsbin.rd: Likewise.
- * ld-s390/tlspic.dd: Likewise.
- * ld-s390/tlsbin.dd: Likewise.
- * ld-s390/tlsbin.sd: Likewise.
- * ld-s390/tlsbin.td: Likewise.
- * ld-s390/tlspic.sd: Likewise.
- * ld-s390/tlspic.td: Likewise.
- * ld-s390/tlspic1_64.s: Likewise.
- * ld-s390/tlsbinpic_64.s: Likewise.
- * ld-s390/tlspic_64.rd: Likewise.
- * ld-s390/tlsbin_64.rd: Likewise.
- * ld-s390/tlspic_64.dd: Likewise.
- * ld-s390/tlsbin_64.dd: Likewise.
- * ld-s390/tlspic_64.sd: Likewise.
- * ld-s390/tlspic_64.td: Likewise.
- * ld-s390/tlsbin_64.td: Likewise.
- * ld-s390/tlsbin_64.sd: Likewise.
- * ld-powerpc/tlsexe32.r: Likewise.
- * ld-powerpc/tlsso32.r: Likewise.
- * ld-powerpc/tlsso32.d: Likewise.
- * ld-powerpc/tlsso32.g: Likewise.
- * ld-powerpc/tlsso32.t: Likewise.
- * ld-powerpc/tlsexe.r: Likewise.
- * ld-powerpc/tlsso.r: Likewise.
- * ld-powerpc/tlsso.g: Likewise.
- * ld-powerpc/tlsexetoc.r: Likewise.
- * ld-powerpc/tlstocso.r: Likewise.
- * ld-powerpc/tlstocso.g: Likewise.
- * ld-ia64/tlspic.rd: Likewise.
- * ld-ia64/tlspic.dd: Likewise.
- * ld-ia64/tlspic.sd: Likewise.
- * ld-ia64/tlspic.td: Likewise.
- * ld-ia64/tlsbin.rd: Likewise.
- * ld-ia64/tlsbin.sd: Likewise.
- * ld-ia64/tlsbin.td: Likewise.
- * ld-elfvsb/elfvsb.exp: XFAIL non-PIC load offset tests on s390x.
- * ld-shared/shared.exp: Likewise.
-
-2004-05-10 John Paul Wallington <jpw at gnu.org>
-
- * ld-mmix/bspec2.d: Update sh_info to decimal.
- * ld-mmix/local1.d: Likewise.
- * ld-mmix/local3.d: Likewise.
- * ld-mmix/local5.d: Likewise.
- * ld-mmix/local7.d: Likewise.
-
-2004-05-05 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic.exp: Restore $LDFLAGS at the end.
- * ld-frv/fr450-link.d: Match fdpic as well.
-
-2004-05-05 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-sh/sh64/crange1.rd: Update sh_info to decimal.
- * ld-sh/sh64/crange2.rd: Likewise.
- * ld-sh/sh64/crange3.rd: Likewise.
- * ld-sh/sh64/crange3-cmpct.rd: Likewise.
- * ld-sh/sh64/crange3-media.rd: Likewise.
- * ld-sh/sh64/crangerel1.rd: Likewise.
- * ld-sh/sh64/crangerel2.rd: Likewise.
-
-2004-05-05 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe.r: Update sh_info to decimal.
- * ld-powerpc/tlsexe32.r: Likewise.
- * ld-powerpc/tlsexetoc.r: Likewise.
- * ld-powerpc/tlsso.r: Likewise.
- * ld-powerpc/tlsso32.r: Likewise.
- * ld-powerpc/tlstocso.r: Likewise.
-
-2004-04-24 Chris Demetriou <cgd at broadcom.com>
-
- * ld-elf/merge.d: XFAIL on all MIPS targets.
-
-2004-04-24 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe32.d: Update.
- * ld-powerpc/tlsso32.d: Update.
-
-2004-04-23 Chris Demetriou <cgd at broadcom.com>
-
- * ld-mips-elf/reloc-3-r.d: Remove, as part of MIPS -membedded-pic
- removal.
- * ld-mips-elf/reloc-3-srec.d: Likewise.
- * ld-mips-elf/reloc-3.ld: Likewise.
- * ld-mips-elf/reloc-3a.s: Likewise.
- * ld-mips-elf/reloc-3b.s: Likewise.
- * ld-mips-elf/mips-elf.exp: Don't run now-removed tests.
-
-2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * ld-sh/tlsbin-1.d: Update
- * ld-sh/tlspic-1.d: Update.
-
-2004-04-22 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-i386/tlspic.dd: Updated.
-
-2004-04-21 Chris Demetriou <cgd at broadcom.com>
-
- * ld-empic/run.c: Removed as part of MIPS --embedded-relocs removal.
- * ld-empic/empic.exp: Likewise.
- * ld-empic/relax.t: Likewise.
- * ld-empic/relax1.c: Likewise.
- * ld-empic/relax2.c: Likewise.
- * ld-empic/relax3.c: Likewise.
- * ld-empic/relax4.c: Likewise.
- * ld-empic/runtest1.c: Likewise.
- * ld-empic/runtest2.c: Likewise.
- * ld-empic/runtesti.s: Likewise.
- * ld-mips-elf/empic1-ln.d: Likewise.
- * ld-mips-elf/empic1-lp.d: Likewise.
- * ld-mips-elf/empic1-mn.d: Likewise.
- * ld-mips-elf/empic1-mp.d: Likewise.
- * ld-mips-elf/empic1-ref.s: Likewise.
- * ld-mips-elf/empic1-sn.d: Likewise.
- * ld-mips-elf/empic1-sp.d: Likewise.
- * ld-mips-elf/empic1-space.s: Likewise.
- * ld-mips-elf/empic1-tgt.s: Likewise.
- * ld-mips-elf/empic2-fwd-0.d: Likewise.
- * ld-mips-elf/empic2-fwd-1.d: Likewise.
- * ld-mips-elf/empic2-fwd-tgt.s: Likewise.
- * ld-mips-elf/empic2-ref.s: Likewise.
- * ld-mips-elf/empic2-rev-0.d: Likewise.
- * ld-mips-elf/empic2-rev-1.d: Likewise.
- * ld-mips-elf/empic2-rev-tgt.s: Likewise.
- * ld-mips-elf/empic2-space.s: Likewise.
- * ld-mips-elf/emrelocs-eb.d: Likewise.
- * ld-mips-elf/emrelocs-el.d: Likewise.
- * ld-mips-elf/emrelocs.ld: Likewise.
- * ld-mips-elf/emrelocs1.s: Likewise.
- * ld-mips-elf/emrelocs2.s: Likewise.
- * ld-mips-elf/mips-elf.exp: Don't run now-removed tests.
-
-2004-04-20 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elfweak/elfweak.exp: Add an undefined weak size change
- test.
-
- * ld-elfweak/size.dat: New file.
- * ld-elfweak/size_bar.c: Likewise.
- * ld-elfweak/size_foo.c: Likewise.
- * ld-elfweak/size_main.c: Likewise.
-
-2004-04-14 Brian Ford <ford at vss.fsi.com>
- DJ Delorie <dj at redhat.com>
-
- * ld-pe/pe.exp: New, tests for i?86 PE.
- * ld-pe/secrel1.s: New, test R_SECREL32 reloc.
- * ld-pe/secrel2.s: Likewise.
- * ld-pe/secrel.d: Likewise.
-
-2004-04-19 Jakub Jelinek <jakub at redhat.com>
-
- * ld-elfvsb/elfvsb.exp: XFAIL some tests on sparc64.
- * ld-shared/shared.exp: Likewise.
-
-2004-04-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-scripts/assert.s: Add a newline.
- * ld-scripts/data.s: Likewise.
-
-2004-04-08 Alan Modra <amodra at bigpond.net.au>
-
- PR 47.
- * ld-cdtest/cdtest.exp: Remove -fgnu-linker.
-
-2004-04-08 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/align.exp: Don't run on aix.
- * ld-scripts/assert.s: Remove comment.
- * ld-scripts/data.s: Likewise.
- * ld-scripts/data.t: Set start address to allow for aout headers.
- Make first LONG pc-relative.
- * ld-scripts/data.d: Update.
- * ld-scripts/defined2.d: Allow other random syms.
- * ld-scripts/defined3.d: Likewise.
- * ld-scripts/provide-1.s: Pad section.
- * ld-scripts/provide-1.t: Set .data address and align.
- * ld-scripts/provide-1.d: Update.
- * ld-scripts/provide-2.s: Pad section.
- * ld-scripts/provide-2.d: Allow random trailing syms.
- * ld-scripts/provide-3.s: Pad section.
- * ld-scripts/provide-3.d: Fix typos.
- * ld-scripts/provide.exp: Don't run on aix.
- * ld-scripts/size-1.s: Simplify test.
- * ld-scripts/size-1.t: Rewrite.
- * ld-scripts/size-1.d: Update.
- * ld-scripts/size-2.s: Simplify.
- * ld-scripts/size-2.t: Set start address. Set exe flag on image.
- * ld-scripts/size-2.d: Update.
- * ld-scripts/size.exp: Don't run on aix. Run size-2 on all elf
- targets except mips.
-
-2004-03-27 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic*.d: Adjust to compensate for page size change.
-
-2004-03-26 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tlsexe.r: Update for changed sym type.
- * ld-powerpc/tlsexetoc.r: Likewise.
-
-2004-03-22 Hans-Peter Nilsson <hp at axis.com>
-
- * ld-cris/dsofnf.s, ld-cris/dsofnf2.s, ld-cris/gotplt1.d,
- ld-cris/gotplt2.d, ld-cris/gotplt3.d: New tests.
-
-2004-03-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-elfvers/vers.exp: Add new tests for versioned weak
- definition.
-
- * ld-elfvers/vers28a.c: New file.
- * ld-elfvers/vers28a.dsym: Likewise.
- * ld-elfvers/vers28a.ver: Likewise.
- * ld-elfvers/vers28b.c: Likewise.
- * ld-elfvers/vers28b.dsym: Likewise.
- * ld-elfvers/vers28b.map: Likewise.
- * ld-elfvers/vers28b.ver: Likewise.
- * ld-elfvers/vers28c.c: Likewise.
- * ld-elfvers/vers28c.dsym: Likewise.
- * ld-elfvers/vers28c.ver: Likewise.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/provide-2.d: Ignore random symbols.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * ld-powerpc/tls.d: Update.
- * ld-powerpc/tls32.d: Update.
- * ld-powerpc/tlsexe.d: Update.
- * ld-powerpc/tlsexe32.d: Update.
- * ld-powerpc/tlsexetoc.d: Update.
- * ld-powerpc/tlsso.d: Update.
- * ld-powerpc/tlsso32.d: Update.
- * ld-powerpc/tlstoc.d: Update.
- * ld-powerpc/tlstocso.d: Update.
-
-2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
-
- * ld-scripts/size-1.d: Add bigendian regexps.
- * ld-scripts/size-2.d: Set --wide for readelf.
-
- * ld-scripts/size.exp: New.
- * ld-scripts/size-[12].{d,s,t}: New.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-frv/fr450-link[abc].s, fr450-link.d: New test.
- * ld-frv/frv.exp: New harness.
-
-2004-02-24 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv/fdpic-pie-2.d: Adjust for decay of FUNCDESC relocs that
- bind locally.
- * ld-frv/fdpic-pie-8.d: Likewise.
- * ld-frv/fdpic-shared-4.d: Likewise.
- * ld-frv/fdpic-pie-6-fail.d: Renamed from...
- * ld-frv/fdpic-pie-6.d: New test.
- * ld-frv/fdpic-shared-6-fail.d: Renamed from...
- * ld-frv/fdpic-shared-6.d: New test.
- * ld-frv/fdpic6.ldv: New.
- * ld-frv/fdpic-static-6.d: Adjust test name.
- * ld-frv/fdpic-pie-8-fail.d: Removed.
- * ld-frv/fdpic.exp: Run new tests.
-
-2004-02-23 Nathan Sidwell <nathan at codesourcery.com>
-
- * ld-scripts/provide.exp: New.
- * ld-scripts/provide-{1,2,3}.{s,t,d}.exp: New.
-
-2004-02-23 Alan Modra <amodra at bigpond.net.au>
-
- * ld-scripts/data.t: Set ".other" address so location doesn't
- depend on target alignment.
- * ld-scripts/data.d: Update.
-
-2004-02-20 Nathan Sidwell <nathan at codesourcery.com>
-
- * ld-scripts/align.{s,t,exp}: New.
-
-2004-02-19 Nathan Sidwell <nathan at codesourcery.com>
-
- * ld-scripts/data.{s,t,d,exp}: New.
-
-2004-02-18 Nathan Sidwell <nathan at codesourcery.com>
-
- * ld-scripts/assert.{s,t,exp}: New.
-
-2004-02-17 Richard Sandiford <rsandifo at redhat.com>
-
- * ld-mips/elf/elf-rel-xgot-{n32,n64-linux}.d: Update after 2004-02-02
- changes to the way large constants are added.
- * ld-mips/elf/elf-rel-got-{n32,n64-linux}.d: Likewise. Adjust order
- of GOT entries after today's change to the handling of GOT_PAGE
- relocations.
-
-2004-02-09 Anil Paranjpe <anilp1 at KPITCummins.com>
-
- * ld-h8300/relax-5.s: New file: Source for relax-5 test.
- * ld-h8300/relax-5.d: New file: Expected output and commands for
- assembling and linking the relax-5 test.
- * ld-h8300/relax-5-coff.d: New file: Variant for the COFF based
- toolchain.
- * ld-h8300/h8300-exp: Run the relax-5 test.
-
-2004-01-23 Daniel Jacobowitz <drow at mvista.com>
-
- * ld-arm/arm-app-abs32.s, ld-arm/arm-app-abs32.r,
- ld-arm/arm-app-abs32.d: New files.
- * ld-arm/arm-elf.exp: Add arm-app-abs32 testcase.
-
-2004-01-19 Alan Modra <amodra at bigpond.net.au>
-
- * ld-i386/tlsbin.dd: Adjust for changed sib printing.
-
-2004-01-13 Daniel Jacobowitz <drow at mvista.com>
-
- * ld-arm/arm-elf.exp: Add arm-static-app test.
- * ld-arm/arm-static-app.s, ld-arm/arm-static-app.d,
- ld-arm/arm-static-app.r: New files.
-
-2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
-
- * ld-h8300/h8300-exp: Run the relax-4 test.
- * ld-h8300/relax-4.s: New file: Source for relax-4 test.
- * ld-h8300/relax-4.d: New file: Expected output and commands for
- assembling and linking the relax-4 test.
- * ld-h8300/relax-4-coff.d: New file: Variant for the COFF based
- toolchain.
-
-2004-01-09 H.J. Lu <hongjiu.lu at intel.com>
-
- * ld-selective/selective.exp: Skip ia64-*-*.
-
-2004-01-09 Daniel Jacobowitz <drow at mvista.com>
-
- * ld-arm/arm-lib.d, ld-arm/arm-lib.r: Update for R_ARM_PLT32
- changes.
-
-2004-01-06 Daniel Jacobowitz <drow at mvista.com>
-
- * ld-arm/arm-app.d, ld-arm/arm-app.r, ld-arm/arm-app.s,
- ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-lib.s,
- ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
- ld-arm/arm-lib-plt32.s, ld-arm/arm-elf.exp: New files.
-
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
-
- * ld-frv: Update .d files with correct addresses displayed for
- dynamic relocations.
- 2003-12-02 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic1.s (.D0): Move to separate data section.
- 2003-11-28 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
- * ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Update to
- reflect EMBEDDED= change in linker script.
- 2003-11-27 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv: Update .d files to reflect changes in the page size, the
- addition of a stack segment, the use of a NULL function descriptor
- for weakundef functions and the change in the lazy funcdesc_value
- in-place addend value.
- 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
- * lib/ld-lib.exp (is_elf_format): Match frv-uclinux.
- 2003-10-06 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
- ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Addresses are
- now _gp-based, not \.rofixup-based.
- * ld-frv/fdpic-static-6.d: Likewise. Match warning about
- relocation to different section.
- 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic.exp: Add -melf32frvfd to LDFLAGS.
- 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic7.s, ld-frv/fdpic-static-7.d, ld-frv/fdpic-pie-7.d,
- ld-frv/fdpic-shared-7.d: New.
- * ld-frv/fdpic8.s, ld-frv/fdpic-static-8.d, ld-frv/fdpic-pie-8.d,
- ld-frv/fdpic-shared-8.d: New.
- * ld-frv/fdpic-pie-8-fail.d, ld-frv/fdpic-shared-8-fail.d: New.
- * ld-frv/fdpic.exp: Run them.
- * ld-frv/fdpic8.ldv, ld-frv/fdpic8min.ldv: New.
- 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/fdpic5.s, ld-frv/fdpic-static-5.d, ld-frv/fdpic-pie-5.d,
- ld-frv/fdpic-shared-5.d: New.
- * ld-frv/fdpic6.s, ld-frv/fdpic-static-6.d, ld-frv/fdpic-pie-6.d,
- ld-frv/fdpic-shared-6.d: New.
- * ld-frv/fdpic.exp: Run them.
- * ld-frv/fdpic*.d: Add -mfdpic to assembler flags. Updated.
- * ld-frv/fdpic2min.ldv: New, used by fdpic-shared-2.d.
- * ld-frv/fdpic-shared-2-fail.d: New.
- * ld-frv/fdpic.exp: Run it.
- * ld-frv/fdpic4.s, ld-frv/fdpic-shared-4.d: New.
- * ld-frv/fdpic.exp: Add new test.
- * ld-frv/fdpic-pie-2.d: Remove unnecessary function descriptors.
- * ld-frv/fdpic-shared-local-2.d, ld-frv/fdpic2.ldv: New.
- * ld-frv/fdpic3.s, ld-frv/fdpic-shared-3.d: New.
- * ld-frv/fdpic.exp: Add new tests.
- * ld-frv/fdpic.exp, ld-frv/fdpic1.s, ld-frv/fdpic2.s,
- * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
- * ld-frv/fdpic-pie-1.d, ld-frv/fdpic-pie-2.d,
- * ld-frv/fdpic-shared-1.d, ld-frv/fdpic-shared-2.d: Renamed from
- ucpic.
- 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
- * ld-frv/ucpic.exp, ld-frv/ucpic1.s, ld-frv/ucpic2.s: New.
- * ld-frv/ucpic-static-1.d, ld-frv/ucpic-static-2.d: New.
- * ld-frv/ucpic-pie-1.d, ld-frv/ucpic-pie-2.d: New.
- * ld-frv/ucpic-shared-1.d, ld-frv/ucpic-shared-2.d: New.
-
-2004-01-02 Alan Modra <amodra at bigpond.net.au>
-
- * ld-selective/sel-dump.exp: Use is_elf_format, xfail assorted targets.
- * ld-selective/selective.exp: Likewise.
-
-For older changes see ChangeLog-9303
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/ld/testsuite/ChangeLog-2004
===================================================================
--- branches/binutils/package/ld/testsuite/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1085 @@
+2004-12-21 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * ld-crx/reloc-abs32.d: Update reference file according
+ to disassembler printing method.
+ * ld-crx/reloc-rel16.d: Likewise.
+ * ld-crx/reloc-rel24.d: Likewise.
+ * ld-crx/reloc-rel32.d: Likewise.
+ * ld-crx/reloc-rel4.d: Likewise.
+ * ld-crx/reloc-rel8-cmp.d: Likewise.
+ * ld-crx/reloc-rel8.d: Likewise.
+
+2004-12-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-v850: New directory.
+
+2004-12-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips-elf/jal-overflow-2.[sd]: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+
+2004-12-13 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips-elf/mips-elf.exp: Only run jalbal if n32 is supported.
+
+2004-12-11 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-mmix/bpo-1.d: Update for changed section syms.
+ * ld-mmix/bpo-10.d: Likewise.
+ * ld-mmix/bpo-11.d: Likewise.
+ * ld-mmix/bpo-14.d: Likewise.
+ * ld-mmix/bpo-16.d: Likewise.
+ * ld-mmix/bpo-17.d: Likewise.
+ * ld-mmix/bpo-18.d: Likewise.
+ * ld-mmix/bpo-19.d: Likewise.
+ * ld-mmix/bpo-2.d: Likewise.
+ * ld-mmix/bpo-22.d: Likewise.
+ * ld-mmix/bpo-3.d: Likewise.
+ * ld-mmix/bpo-4.d: Likewise.
+ * ld-mmix/bpo-5.d: Likewise.
+ * ld-mmix/bpo-6.d: Likewise.
+ * ld-mmix/bpo-9.d: Likewise.
+ * ld-mmix/greg-1.d: Likewise.
+ * ld-mmix/greg-19.d: Likewise.
+ * ld-mmix/greg-2.d: Likewise.
+ * ld-mmix/greg-3.d: Likewise.
+ * ld-mmix/greg-4.d: Likewise.
+ * ld-mmix/greg-5.d: Likewise.
+ * ld-mmix/greg-5s.d: Likewise.
+ * ld-mmix/greg-6.d: Likewise.
+ * ld-mmix/greg-7.d: Likewise.
+ * ld-mmix/loc1.d: Likewise.
+ * ld-mmix/loc2.d: Likewise.
+ * ld-mmix/loc3.d: Likewise.
+ * ld-mmix/loc4.d: Likewise.
+ * ld-mmix/loc6.d: Likewise.
+ * ld-mmix/locdo-1.d: Likewise.
+ * ld-mmix/loct-1.d: Likewise.
+ * ld-mmix/locto-1.d: Likewise.
+ * ld-mmix/start-1.d: Likewise.
+ * ld-sh/sh64/abi32.xd: Likewise.
+ * ld-sh/sh64/abi64.xd: Likewise.
+ * ld-sh/sh64/cmpct1.xd: Likewise.
+ * ld-sh/sh64/mix1.xd: Likewise.
+ * ld-sh/sh64/mix2.xd: Likewise.
+ * ld-sh/sh64/rel32.xd: Likewise.
+ * ld-sh/sh64/rel64.xd: Likewise.
+ * ld-sh/sh64/shdl32.xd: Likewise.
+ * ld-sh/sh64/shdl64.xd: Likewise.
+
+2004-12-09 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * ld-mips-elf/jalbal.d: New test.
+ * ld-mips-elf/jalbal.s: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+
+2004-12-08 Ian Lance Taylor <ian at wasabisystems.com>
+
+ * ld-mips-elf/jaloverflow.d: New test.
+ * ld-mips-elf/jaloverflow.s: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+
+2004-12-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/group1.d: Support 64bit.
+
+2004-12-01 Paul Brook <paul at codesourcery.com>
+
+ * ld-elf/group1.d: New test.
+ * ld-elf/group.ld, ld-elf/group1a.s, ld-elf/group1b.s: New test.
+
+2004-12-01 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-selective/selective.exp: Use -print-libgcc-file-name for
+ ARM and v850 also.
+
+2004-11-24 Paul Brook <paul at codesourcery.com>
+
+ * ld-arm/mixed-lib.sym: Update for THUMB_FUNC change.
+
+2004-11-19 Nick Clifton <nickc at redhat.com>
+
+ * ld-scripts/script.exp: Add test of memory linker script.
+ Reorganise code to remove unnecessary indentation.
+ Fix target tests to avoid using --image-base with *-nto targets.
+ * ld-scripts/memory.t: New linker script to test the MEMORY
+ section and the ORIGIN and LENGTH operators.
+
+2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s,
+ ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r,
+ ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld,
+ ld-arm/arm-lib.ld: New files.
+ * ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d,
+ ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
+ ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d,
+ ld-arm/arm-static-app.r: Update for big-endian.
+ * ld-arm/arm-elf.exp: Run the new tests.
+
+2004-11-16 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips-elf/eh-frame1.{s,ld},
+ * ld-mips-elf/eh-frame1-{n32,n64},d: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+
+2004-11-10 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-d10v/reloc-003.d: Update for changed error message.
+ * ld-d10v/reloc-004.d: Likewise.
+ * ld-d10v/reloc-007.d: Likewise.
+ * ld-d10v/reloc-008.d: Likewise.
+ * ld-d10v/reloc-011.d: Likewise.
+ * ld-d10v/reloc-012.d: Likewise.
+ * ld-d10v/reloc-015.d: Likewise.
+ * ld-d10v/reloc-016.d: Likewise.
+
+2004-11-08 Aaron W. LaFramboise <aaron98wiridge9 at aaronwl.com>
+
+ * ld-scripts/weak.exp: Enable test on PE, XFAIL non-i386 PE.
+ * ld-undefined/weak-undef.exp: Enable test on PE, XFAIL non-i386
+ PE.
+ * lib/ld-lib.exp (is_pecoff_format): New.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * ld-maxq: New directory. Contains tests for the new maxq port.
+
+2004-11-04 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * ld-elf/merge.d: xfail crisv32-*-*.
+ * ld-cris/dsov32-1.s, ld-cris/dsov32-2.s, ld-cris/dsov32-3.s,
+ ld-cris/dsov32-4.s, ld-cris/libdso-10.d, ld-cris/libdso-11.d,
+ ld-cris/libdso-12.d, ld-cris/libdso-13.d, ld-cris/libdso-14.d,
+ ld-cris/move-1.s, ld-cris/pv32-1.d, ld-cris/pv32.s,
+ ld-cris/start1.s, ld-cris/v10-v32.d, ld-cris/v10-va.d,
+ ld-cris/v32-ba-1.d, ld-cris/v32-ba-1.s, ld-cris/v32-bin-1.d,
+ ld-cris/v32-bin-1.s, ld-cris/v32-v10.d, ld-cris/v32-va.d,
+ ld-cris/va-v10.d, ld-cris/va-v32.d: New tests.
+ * ld-cris/ldsym1.d: Adjust for change in linker script.
+
+2004-11-02 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/expdyn1.d, ld-cris/expdyn5.d, ld-cris/expdyn6.d,
+ ld-cris/expdyn7.d, ld-cris/gotplt1.d, ld-cris/gotplt2.d,
+ ld-cris/gotplt3.d, ld-cris/hiddef1.d, ld-cris/libdso-2.d,
+ ld-cris/locref1.d, ld-cris/locref2.d, ld-cris/weakref2.d,
+ ld-i386/tlsbin.rd, ld-i386/tlsnopic.rd, ld-i386/tlspic.rd,
+ ld-ia64/tlsbin.dd, ld-ia64/tlsbin.rd, ld-ia64/tlspic.dd,
+ ld-ia64/tlspic.rd, ld-powerpc/tlsexe32.d, ld-powerpc/tlsexe32.g,
+ ld-powerpc/tlsexe32.r, ld-powerpc/tlsexe32.t,
+ ld-powerpc/tlsso32.d, ld-powerpc/tlsso32.g, ld-powerpc/tlsso32.r,
+ ld-powerpc/tlsso32.t, ld-s390/tlsbin.dd, ld-s390/tlsbin.rd,
+ ld-s390/tlspic.rd, ld-sparc/tlssunbin32.rd,
+ ld-sparc/tlssunpic32.rd, ld-x86-64/tlsbin.rd, ld-x86-64/tlspic.dd,
+ ld-x86-64/tlspic.rd: Adjust for _GLOBAL_OFFSET_TABLE_ now hidden.
+
+2004-10-26 Paul Brook <paul at codesourcery.com>
+
+ * ld-elfvers/vers.exp (build_binary): Add ldargs parameter.
+ (build_vers_lib_pic_flags): New function.
+ Add vers29 test.
+ * ld-elfvers/vers29.c: New file.
+ * ld-elfvers/vers29.dsym: New file.
+ * ld-elfvers/vers29.ver: New file.
+
+2004-10-24 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * ld-mmix/sec-8m.d: Adjust test for dump using correct section
+ length.
+ * ld-mmix/sec-9.d: Renamed test, formerly known as sec-5.d.
+ * ld-mmix/sec-5.d, ld-mmix/b-offloc.s: Rewritten test.
+
+ * ld-mmix/getaa-6b.d, ld-mmix/getaa-6f.d, ld-mmix/getaa14b.d,
+ ld-mmix/getaa14f.d, ld-mmix/jumpa-6b.d, ld-mmix/jumpa-6f.d,
+ ld-mmix/jumpa14b.d, ld-mmix/jumpa14f.d, ld-mmix/reg-1.d,
+ ld-mmix/reg-1m.d: Adjust for changed error message format.
+
+2004-10-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/exclude.exp: Allow cris-*-elf.
+
+ * ld-elf/exclude1.s: Add ".data". Remove "- include_sym".
+ * ld-elf/exclude2.s: Add ".data".
+
+2004-10-19 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * ld-elf/exclude.exp: Don't run for cris-*-elf.
+
+2004-10-16 Daniel Jacobowitz <dan at debian.org>
+
+ * ld-elf/exclude1.s, ld-elf/exclude2.s, ld-elf/exclude.exp: New.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-crx/reloc-num8.d: Adjust for changed orphan placement.
+ * ld-crx/reloc-num16.d: Likewise.
+ * ld-crx/reloc-num32.d: Likewise.
+ * ld-scripts/provide-2.t: Start .data at 0x2000.
+ * ld-scripts/provide-2.d: Adjust.
+
+2004-10-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-scripts/sort.exp: Run for ELF targets only.
+
+2004-10-14 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/overlay-size.d: Update for changed orphan section
+ placement.
+ * ld-mmix/bpo-18.d: Likewise.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+
+ * ld-xtensa/lcall1.s: Use .literal directive.
+ * ld-xtensa/lcall2.s: Align function entry.
+ * ld-xtensa/coalesce2.s: Likewise.
+
+2004-10-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-scripts/sort.exp: New file for section sorting tests.
+ * ld-scripts/sort_b_a.d: Likewise
+ * ld-scripts/sort_b_a.s: Likewise
+ * ld-scripts/sort_b_a.t: Likewise
+ * ld-scripts/sort_b_a_a-1.d: Likewise
+ * ld-scripts/sort_b_a_a-2.d: Likewise
+ * ld-scripts/sort_b_a_a-3.d: Likewise
+ * ld-scripts/sort_b_a_a.t: Likewise
+ * ld-scripts/sort_b_a_n-1.d: Likewise
+ * ld-scripts/sort_b_a_n-2.d: Likewise
+ * ld-scripts/sort_b_a_n-3.d: Likewise
+ * ld-scripts/sort_b_a_n.t: Likewise
+ * ld-scripts/sort_b_n.d: Likewise
+ * ld-scripts/sort_b_n.s: Likewise
+ * ld-scripts/sort_b_n.t: Likewise
+ * ld-scripts/sort_b_n_a-1.d: Likewise
+ * ld-scripts/sort_b_n_a-2.d: Likewise
+ * ld-scripts/sort_b_n_a-3.d: Likewise
+ * ld-scripts/sort_b_n_a.t: Likewise
+ * ld-scripts/sort_b_n_n-1.d: Likewise
+ * ld-scripts/sort_b_n_n-2.d: Likewise
+ * ld-scripts/sort_b_n_n-3.d: Likewise
+ * ld-scripts/sort_b_n_n.t: Likewise
+ * ld-scripts/sort_n_a-a.s: Likewise
+ * ld-scripts/sort_n_a-b.s: Likewise
+ * ld-scripts/sort_no-1.d: Likewise
+ * ld-scripts/sort_no-2.d: Likewise
+ * ld-scripts/sort_no.t: Likewise
+
+2004-10-01 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-powerpc/tls.s: Don't set tls type for undefined syms.
+ * ld-powerpc/tls32.s: Likewise.
+ * ld-powerpc/tlstoc.s: Likewise.
+ * ld-s390/tlsbin.s: Likewise.
+ * ld-s390/tlsbin_64.s: Likewise.
+ * ld-s390/tlsbinpic.s: Likewise.
+ * ld-s390/tlsbinpic_64.s: Likewise.
+ * ld-s390/tlspic1.s: Likewise.
+ * ld-s390/tlspic1_64.s: Likewise.
+ * ld-sparc/tlssunbin32.s: Likewise.
+ * ld-sparc/tlssunbinpic32.s: Likewise.
+ * ld-sparc/tlssunnopic32.s: Likewise.
+ * ld-sparc/tlssunpic32.s: Likewise.
+
+2004-10-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-s390/tlsbin.s: Set tls type for undefined syms.
+ * ld-s390/tlsbin_64.s: Likewise.
+ * ld-s390/tlsbinpic.s: Likewise.
+ * ld-s390/tlsbinpic_64.s: Likewise.
+ * ld-s390/tlspic1.s: Likewise.
+ * ld-s390/tlspic1_64.s: Likewise.
+ * ld-sparc/tlssunbin32.s: Likewise.
+ * ld-sparc/tlssunbinpic32.s: Likewise.
+ * ld-sparc/tlssunnopic32.s: Likewise.
+ * ld-sparc/tlssunpic32.s: Likewise.
+
+2004-10-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-sparc/tlssunbin32.sd: Adjust for changed .dynamic location.
+
+2004-10-01 Nick Clifton <nickc at redhat.com>
+
+ PR 371
+ * ld-undefined/undefined.exp: Remove redundant XPASS
+ specifications.
+
+2004-10-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tls.s (gd, ld): Set tls type for undefined syms.
+ * ld-powerpc/tls32.s (gd, ld): Likewise.
+ * ld-powerpc/tlstoc.s (gd, ld): Likewise.
+ * ld-powerpc/tlsso.r: Update.
+ * ld-powerpc/tlsso32.r: Update.
+ * ld-powerpc/tlstocso.r: Update.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * ld-arm/arm-elf.exp: Add test for --target2=abs.
+ * ld-arm/arm-target2-abs.d: New file.
+
+2004-09-29 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-pe/secrel1.s: Pad .rdata out to 16 byte boundary.
+ * ld-pe/secrel.d: Adjust to suit.
+
+2004-09-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elfvsb/elfvsb.exp: Remove file name from "undefined ref" string.
+
+2004-09-22 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-i386/tlsbin.rd: Update for changed segment map.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlspic.rd: Likewise.
+ * ld-powerpc/tlsexe.r: Likewise.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+ * ld-s390/tlsbin.rd: Likewise.
+ * ld-s390/tlsbin_64.rd: Likewise.
+ * ld-s390/tlspic.rd: Likewise.
+ * ld-s390/tlspic_64.rd: Likewise.
+ * ld-sh/tlsbin-2.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+ * ld-x86-64/tlsbin.rd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2004-09-22 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/overlay-size.d: Don't check .mbss lma.
+ * ld-sh/sh64/mix1.xd: Update for changed .bss file offset.
+ * ld-sh/sh64/shdl32.xd: Likewise.
+ * ld-sh/sh64/shdl64.xd: Likewise.
+
+2004-09-17 Paul Brook <paul at codesourcery.com>
+
+ * ld-arm/arm-target1-{abs,rel}.d}: New files.
+ * ld-arm/arm-target1.s: New file.
+ * ld-arm/arm-target2-{,got-}rel.d: New files.
+ * ld-arm/arm-target2.s: New file.
+ * ld-arm/arm-rel31.d: New files.
+ * ld-arm/arm-rel31.s: New files.
+ * ld-arm/arm.ld: New file.
+ * ld-arm/arm-elf.exp: Add new tests.
+
+2004-09-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/hiddef1.d, ld-cris/hiddef1.s, ld-cris/hidrefgotplt1.s:
+ New test.
+
+2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * ld-crx: New directory.
+ * ld-crx/crx.exp: New test script.
+ * ld-crx/crx.ld: New linker script.
+ * ld-crx/reloc-abs32.s: New file.
+ * ld-crx/reloc-abs32.d: Likewise.
+ * ld-crx/reloc-imm16.s: Likewise.
+ * ld-crx/reloc-imm16.d: Likewise.
+ * ld-crx/reloc-imm32.s: Likewise.
+ * ld-crx/reloc-imm32.d: Likewise.
+ * ld-crx/reloc-num8.s: Likewise.
+ * ld-crx/reloc-num8.d: Likewise.
+ * ld-crx/reloc-num16.s: Likewise.
+ * ld-crx/reloc-num16.d: Likewise.
+ * ld-crx/reloc-num32.s: Likewise.
+ * ld-crx/reloc-num32.d: Likewise.
+ * ld-crx/reloc-regrel12.s: Likewise.
+ * ld-crx/reloc-regrel12.d: Likewise.
+ * ld-crx/reloc-regrel22.s: Likewise.
+ * ld-crx/reloc-regrel22.d: Likewise.
+ * ld-crx/reloc-regrel28.s: Likewise.
+ * ld-crx/reloc-regrel28.d: Likewise.
+ * ld-crx/reloc-regrel32.s: Likewise.
+ * ld-crx/reloc-regrel32.d: Likewise.
+ * ld-crx/reloc-rel4.s: Likewise.
+ * ld-crx/reloc-rel4.d: Likewise.
+ * ld-crx/reloc-rel8.s: Likewise.
+ * ld-crx/reloc-rel8.d: Likewise.
+ * ld-crx/reloc-rel8-cmp.s: Likewise.
+ * ld-crx/reloc-rel8-cmp.d: Likewise.
+ * ld-crx/reloc-rel16.s: Likewise.
+ * ld-crx/reloc-rel16.d: Likewise.
+ * ld-crx/reloc-rel24.s: Likewise.
+ * ld-crx/reloc-rel24.d: Likewise.
+ * ld-crx/reloc-rel32.s: Likewise.
+ * ld-crx/reloc-rel32.d: Likewise.
+
+2004-08-21 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/expdyn1.d, ld-cris/expdyn5.d, ld-cris/expdyn6.d,
+ ld-cris/expdyn7.d, ld-cris/gotplt2.d, ld-cris/gotplt3.d,
+ ld-cris/libdso-1.d, ld-cris/libdso-2.d, ld-cris/locref1.d,
+ ld-cris/nodyn4.d, ld-cris/nodyn5.d: Adjust for reordered
+ sections.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elfvsb/elfvsb.exp: Cope with ppc64 dot symbols.
+
+2004-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/cross1.t: Remove .opd section spec.
+
+2004-08-01 Stephane Carrez <stcarrez at nerim.fr>
+
+ * ld-undefined/undefined.exp: The undefine tests now work on
+ 68HC11 and 68HC12.
+
+2004-07-29 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-sh/sh64/crange3-cmpct.rd: Update.
+ * ld-sh/sh64/crange3-media.rd: Update.
+
+2004-07-27 Nitin Yewale <nitiny at kpitcummins.com>
+
+ * ld-h8300/h8300.exp: Addition of new test case to check
+ relaxation for H8S target.
+ * ld-h8300/relax-6.s: New test source file.
+ * ld-h8300/relax-6.d: New test expected disassembly file.
+ * ld-h8300/relax-6-coff.d: New test expected disassembly file for
+ coff format.
+
+2004-07-22 Nick Clifton <nickc at redhat.com>
+
+ PR/280
+ * ld-h8300/relax-3-coff.d: Remove duplicated raw insn values.
+ * ld-h8300/relax-3.d: Likewise.
+ * ld-h8300/relax-4-coff.d: Likewise.
+ * ld-h8300/relax-4.d: Likewise.
+ * ld-h8300/relax-5-coff.d: Likewise.
+ * ld-h8300/relax.d: Likewise.
+
+2004-07-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-scripts/crossref.exp: XFAIL ia64-*-* on the first test.
+
+2004-07-13 Nitin Yewale <nitiny at kpitcummins.com>
+
+ * ld-h8300/h8300.exp: Addition of gcsection test case.
+ * ld-h8300/gcsection.s: New test source file.
+ * ld-h8300/gcsection.d: New test expected disassembly file.
+
+2004-07-08 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * ld-mips-elf/reloc-merge-lo16.{s,d,ld}: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+
+2004-07-02 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-elf/frame.exp: Don't run on sh*-*-elf*.
+ * ld-sh/shared-1.d: Adjust for section reordering changes.
+ * ld-sh/shared-2.d: Likewise.
+ * ld-sh/tlsbin-2.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+ * ld-sh/sh64/abi32.xd: Likewise.
+ * ld-sh/sh64/abi64.xd: Likewise.
+ * ld-sh/sh64/cmpct1.xd: Likewise.
+ * ld-sh/sh64/crange1.rd: Likewise.
+ * ld-sh/sh64/crange2.rd: Likewise.
+ * ld-sh/sh64/crange3-cmpct.rd: Likewise.
+ * ld-sh/sh64/crange3-media.rd: Likewise.
+ * ld-sh/sh64/crange3.rd: Likewise.
+ * ld-sh/sh64/gotplt.d: Likewise.
+ * ld-sh/sh64/init-cmpct.d: Likewise.
+ * ld-sh/sh64/init-media.d: Likewise.
+ * ld-sh/sh64/init64.d: Likewise.
+ * ld-sh/sh64/mix1.xd: Likewise.
+ * ld-sh/sh64/mix2.xd: Likewise.
+ * ld-sh/sh64/shdl32.xd: Likewise.
+ * ld-sh/sh64/shdl64.xd: Likewise.
+
+2004-07-02 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-discard/static.d: Accept both original sym and section sym.
+
+2004-07-01 Jakub Jelinek <jakub at redhat.com>
+
+ * ld-sparc/tlssunpic32.rd: Adjust for section reordering changes
+ and removal of unneeded STT_SECTION symbols from .dynsym.
+ * ld-sparc/tlssunbin32.rd: Likewise.
+ * ld-sparc/tlssunpic32.dd: Likewise.
+ * ld-sparc/tlssunpic32.sd: Likewise.
+ * ld-sparc/tlssunbin32.dd: Likewise.
+ * ld-sparc/tlssunbin32.sd: Likewise.
+ * ld-sparc/tlssunbin32.td: Likewise.
+
+2004-07-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-discard/extern.d: Update.
+ * ld-discard/start.d: Update.
+ * ld-discard/static.d: Update.
+
+2004-06-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 233
+ * ld-discard/extern.d: Updated.
+ * ld-discard/start.d: Likewise.
+ * ld-discard/static.d: Likewise.
+
+2004-06-29 J"orn Rennecke <joern.rennecke at superh.com>
+
+ Actually add these files:
+ 2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+ * ld-sh/arch/arch.exp: New test script.
+ * ld-sh/arch/arch_expected.txt: New file.
+ * ld-sh/arch/sh.s: New file.
+ * ld-sh/arch/sh2.s: New file.
+ * ld-sh/arch/sh-dsp.s: New file.
+ * ld-sh/arch/sh2e.s: New file.
+ * ld-sh/arch/sh3-nommu.s: New file.
+ * ld-sh/arch/sh3.s: New file.
+ * ld-sh/arch/sh3-dsp.s: New file.
+ * ld-sh/arch/sh3e.s: New file.
+ * ld-sh/arch/sh4-nommu-nofpu.s: New file.
+ * ld-sh/arch/sh4-nofpu.s: New file.
+ * ld-sh/arch/sh4.s: New file.
+ * ld-sh/arch/sh4a-nofpu.s: New file.
+ * ld-sh/arch/sh4al-dsp.s: New file.
+ * ld-sh/arch/sh4a.s: New file.
+
+2004-06-29 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/frame.exp: Don't run on mcore.
+
+2004-06-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-bootstrap/bootstrap.exp: Handle timestamps in more pe targets.
+
+2004-06-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elfvers/vers.exp: Use PIC for shared libraries by default.
+
+2004-06-21 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic-pie-1.d: Adjust for pie-specific link script.
+ * ld-frv/fdpic-pie-2.d: Likewise.
+ * ld-frv/fdpic-pie-6.d: Likewise.
+ * ld-frv/fdpic-pie-7.d: Likewise.
+ * ld-frv/fdpic-pie-8.d: Likewise.
+ * ld-frv/fdpic-shared-1.d: Likewise.
+ * ld-frv/fdpic-shared-2.d: Likewise.
+ * ld-frv/fdpic-shared-3.d: Likewise.
+ * ld-frv/fdpic-shared-4.d: Likewise.
+ * ld-frv/fdpic-shared-5.d: Likewise.
+ * ld-frv/fdpic-shared-6.d: Likewise.
+ * ld-frv/fdpic-shared-7.d: Likewise.
+ * ld-frv/fdpic-shared-8.d: Likewise.
+ * ld-frv/fdpic-shared-local-2.d: Likewise.
+ * ld-frv/fdpic-shared-local-8.d: Likewise.
+
+2004-06-21 Nick Clifton <nickc at redhat.com>
+
+ * ld-elf/frame.exp: Handle ports which do not support the --shared
+ linker switch.
+
+2004-06-18 Jan Beulich <jbeulich at novell.com>
+
+ * ld-elfvsb/main.c: Ensure visibility_def and visibility_func are
+ actually referenced (gcc 3.4 eliminates comparisons of addresses
+ of global symbols with NULL).
+ * ld-selective/selective.exp: Suppress -fvtable-gc tests for gcc
+ 3.4.0 and above, as this option and its functionality is no longer
+ supported, making these tests fail).
+
+2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * ld-sh/arch/arch.exp: New test script.
+ * ld-sh/arch/arch_expected.txt: New file.
+ * ld-sh/arch/sh.s: New file.
+ * ld-sh/arch/sh2.s: New file.
+ * ld-sh/arch/sh-dsp.s: New file.
+ * ld-sh/arch/sh2e.s: New file.
+ * ld-sh/arch/sh3-nommu.s: New file.
+ * ld-sh/arch/sh3.s: New file.
+ * ld-sh/arch/sh3-dsp.s: New file.
+ * ld-sh/arch/sh3e.s: New file.
+ * ld-sh/arch/sh4-nommu-nofpu.s: New file.
+ * ld-sh/arch/sh4-nofpu.s: New file.
+ * ld-sh/arch/sh4.s: New file.
+ * ld-sh/arch/sh4a-nofpu.s: New file.
+ * ld-sh/arch/sh4al-dsp.s: New file.
+ * ld-sh/arch/sh4a.s: New file.
+
+2004-05-18 Nick Clifton <nickc at redhat.com>
+
+ * ld-elf/frame.s: Replace @ with % so that the file can be
+ compiled by an ARM targeted GAS.
+ * ld-elf/table.s: Likewise.
+ * ld-elf/tbss.s: Likewise. Also replace .align <foo> with
+ .p2align (log2 <foo>) to cope with the fact that the ARM .align
+ directive takes a power-of-two argument.
+
+2004-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/frame.exp: New file. Test read-only .eh_frame and
+ .gcc_except_table sections.
+ * ld-elf/frame.s: Likewise.
+ * ld-elf/table.s: Likewise.
+ * ld-elf/tbss.s: Likewise.
+
+2004-05-12 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-sh/tlsbin-2.d: Adjust for section reordering changes
+ and removal of unneeded STT_SECTION symbols from .dynsym.
+ * ld-sh/tlsbin-3.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+
+2004-05-12 Ben Elliston <bje at au.ibm.com>
+
+ * ld-sh/sh64/relax.exp: Remove stray semicolons.
+ * ld-sh/sh64/relfail.exp: Likewise.
+ * lib/ld-lib.exp: Likewise.
+
+2004-05-11 Jakub Jelinek <jakub at redhat.com>
+
+ * ld-i386/tlspic.rd: Adjust for section reordering changes
+ and removal of unneeded STT_SECTION symbols from .dynsym.
+ * ld-i386/tlspic.dd: Likewise.
+ * ld-i386/tlspic.sd: Likewise.
+ * ld-i386/tlsbin.rd: Likewise.
+ * ld-i386/tlsbinpic.s: Likewise.
+ * ld-i386/tlsbin.dd: Likewise.
+ * ld-i386/tlsbin.sd: Likewise.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlsnopic1.s: Likewise.
+ * ld-i386/combreloc.d: Likewise.
+ * ld-i386/tlsnopic.dd: Likewise.
+ * ld-i386/tlsnopic.sd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+ * ld-x86-64/tlspic.dd: Likewise.
+ * ld-x86-64/tlsbin.dd: Likewise.
+ * ld-x86-64/tlspic.sd: Likewise.
+ * ld-x86-64/tlsbin.sd: Likewise.
+ * ld-x86-64/tlspic.td: Likewise.
+ * ld-x86-64/tlsbin.td: Likewise.
+ * ld-x86-64/tlsbin.rd: Likewise.
+ * ld-s390/tlspic1.s: Likewise.
+ * ld-s390/tlsbinpic.s: Likewise.
+ * ld-s390/tlspic.rd: Likewise.
+ * ld-s390/tlsbin.rd: Likewise.
+ * ld-s390/tlspic.dd: Likewise.
+ * ld-s390/tlsbin.dd: Likewise.
+ * ld-s390/tlsbin.sd: Likewise.
+ * ld-s390/tlsbin.td: Likewise.
+ * ld-s390/tlspic.sd: Likewise.
+ * ld-s390/tlspic.td: Likewise.
+ * ld-s390/tlspic1_64.s: Likewise.
+ * ld-s390/tlsbinpic_64.s: Likewise.
+ * ld-s390/tlspic_64.rd: Likewise.
+ * ld-s390/tlsbin_64.rd: Likewise.
+ * ld-s390/tlspic_64.dd: Likewise.
+ * ld-s390/tlsbin_64.dd: Likewise.
+ * ld-s390/tlspic_64.sd: Likewise.
+ * ld-s390/tlspic_64.td: Likewise.
+ * ld-s390/tlsbin_64.td: Likewise.
+ * ld-s390/tlsbin_64.sd: Likewise.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlsso32.d: Likewise.
+ * ld-powerpc/tlsso32.g: Likewise.
+ * ld-powerpc/tlsso32.t: Likewise.
+ * ld-powerpc/tlsexe.r: Likewise.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso.g: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+ * ld-powerpc/tlstocso.g: Likewise.
+ * ld-ia64/tlspic.rd: Likewise.
+ * ld-ia64/tlspic.dd: Likewise.
+ * ld-ia64/tlspic.sd: Likewise.
+ * ld-ia64/tlspic.td: Likewise.
+ * ld-ia64/tlsbin.rd: Likewise.
+ * ld-ia64/tlsbin.sd: Likewise.
+ * ld-ia64/tlsbin.td: Likewise.
+ * ld-elfvsb/elfvsb.exp: XFAIL non-PIC load offset tests on s390x.
+ * ld-shared/shared.exp: Likewise.
+
+2004-05-10 John Paul Wallington <jpw at gnu.org>
+
+ * ld-mmix/bspec2.d: Update sh_info to decimal.
+ * ld-mmix/local1.d: Likewise.
+ * ld-mmix/local3.d: Likewise.
+ * ld-mmix/local5.d: Likewise.
+ * ld-mmix/local7.d: Likewise.
+
+2004-05-05 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic.exp: Restore $LDFLAGS at the end.
+ * ld-frv/fr450-link.d: Match fdpic as well.
+
+2004-05-05 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-sh/sh64/crange1.rd: Update sh_info to decimal.
+ * ld-sh/sh64/crange2.rd: Likewise.
+ * ld-sh/sh64/crange3.rd: Likewise.
+ * ld-sh/sh64/crange3-cmpct.rd: Likewise.
+ * ld-sh/sh64/crange3-media.rd: Likewise.
+ * ld-sh/sh64/crangerel1.rd: Likewise.
+ * ld-sh/sh64/crangerel2.rd: Likewise.
+
+2004-05-05 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe.r: Update sh_info to decimal.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+
+2004-04-24 Chris Demetriou <cgd at broadcom.com>
+
+ * ld-elf/merge.d: XFAIL on all MIPS targets.
+
+2004-04-24 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe32.d: Update.
+ * ld-powerpc/tlsso32.d: Update.
+
+2004-04-23 Chris Demetriou <cgd at broadcom.com>
+
+ * ld-mips-elf/reloc-3-r.d: Remove, as part of MIPS -membedded-pic
+ removal.
+ * ld-mips-elf/reloc-3-srec.d: Likewise.
+ * ld-mips-elf/reloc-3.ld: Likewise.
+ * ld-mips-elf/reloc-3a.s: Likewise.
+ * ld-mips-elf/reloc-3b.s: Likewise.
+ * ld-mips-elf/mips-elf.exp: Don't run now-removed tests.
+
+2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-sh/tlsbin-1.d: Update
+ * ld-sh/tlspic-1.d: Update.
+
+2004-04-22 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-i386/tlspic.dd: Updated.
+
+2004-04-21 Chris Demetriou <cgd at broadcom.com>
+
+ * ld-empic/run.c: Removed as part of MIPS --embedded-relocs removal.
+ * ld-empic/empic.exp: Likewise.
+ * ld-empic/relax.t: Likewise.
+ * ld-empic/relax1.c: Likewise.
+ * ld-empic/relax2.c: Likewise.
+ * ld-empic/relax3.c: Likewise.
+ * ld-empic/relax4.c: Likewise.
+ * ld-empic/runtest1.c: Likewise.
+ * ld-empic/runtest2.c: Likewise.
+ * ld-empic/runtesti.s: Likewise.
+ * ld-mips-elf/empic1-ln.d: Likewise.
+ * ld-mips-elf/empic1-lp.d: Likewise.
+ * ld-mips-elf/empic1-mn.d: Likewise.
+ * ld-mips-elf/empic1-mp.d: Likewise.
+ * ld-mips-elf/empic1-ref.s: Likewise.
+ * ld-mips-elf/empic1-sn.d: Likewise.
+ * ld-mips-elf/empic1-sp.d: Likewise.
+ * ld-mips-elf/empic1-space.s: Likewise.
+ * ld-mips-elf/empic1-tgt.s: Likewise.
+ * ld-mips-elf/empic2-fwd-0.d: Likewise.
+ * ld-mips-elf/empic2-fwd-1.d: Likewise.
+ * ld-mips-elf/empic2-fwd-tgt.s: Likewise.
+ * ld-mips-elf/empic2-ref.s: Likewise.
+ * ld-mips-elf/empic2-rev-0.d: Likewise.
+ * ld-mips-elf/empic2-rev-1.d: Likewise.
+ * ld-mips-elf/empic2-rev-tgt.s: Likewise.
+ * ld-mips-elf/empic2-space.s: Likewise.
+ * ld-mips-elf/emrelocs-eb.d: Likewise.
+ * ld-mips-elf/emrelocs-el.d: Likewise.
+ * ld-mips-elf/emrelocs.ld: Likewise.
+ * ld-mips-elf/emrelocs1.s: Likewise.
+ * ld-mips-elf/emrelocs2.s: Likewise.
+ * ld-mips-elf/mips-elf.exp: Don't run now-removed tests.
+
+2004-04-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elfweak/elfweak.exp: Add an undefined weak size change
+ test.
+
+ * ld-elfweak/size.dat: New file.
+ * ld-elfweak/size_bar.c: Likewise.
+ * ld-elfweak/size_foo.c: Likewise.
+ * ld-elfweak/size_main.c: Likewise.
+
+2004-04-14 Brian Ford <ford at vss.fsi.com>
+ DJ Delorie <dj at redhat.com>
+
+ * ld-pe/pe.exp: New, tests for i?86 PE.
+ * ld-pe/secrel1.s: New, test R_SECREL32 reloc.
+ * ld-pe/secrel2.s: Likewise.
+ * ld-pe/secrel.d: Likewise.
+
+2004-04-19 Jakub Jelinek <jakub at redhat.com>
+
+ * ld-elfvsb/elfvsb.exp: XFAIL some tests on sparc64.
+ * ld-shared/shared.exp: Likewise.
+
+2004-04-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-scripts/assert.s: Add a newline.
+ * ld-scripts/data.s: Likewise.
+
+2004-04-08 Alan Modra <amodra at bigpond.net.au>
+
+ PR 47.
+ * ld-cdtest/cdtest.exp: Remove -fgnu-linker.
+
+2004-04-08 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/align.exp: Don't run on aix.
+ * ld-scripts/assert.s: Remove comment.
+ * ld-scripts/data.s: Likewise.
+ * ld-scripts/data.t: Set start address to allow for aout headers.
+ Make first LONG pc-relative.
+ * ld-scripts/data.d: Update.
+ * ld-scripts/defined2.d: Allow other random syms.
+ * ld-scripts/defined3.d: Likewise.
+ * ld-scripts/provide-1.s: Pad section.
+ * ld-scripts/provide-1.t: Set .data address and align.
+ * ld-scripts/provide-1.d: Update.
+ * ld-scripts/provide-2.s: Pad section.
+ * ld-scripts/provide-2.d: Allow random trailing syms.
+ * ld-scripts/provide-3.s: Pad section.
+ * ld-scripts/provide-3.d: Fix typos.
+ * ld-scripts/provide.exp: Don't run on aix.
+ * ld-scripts/size-1.s: Simplify test.
+ * ld-scripts/size-1.t: Rewrite.
+ * ld-scripts/size-1.d: Update.
+ * ld-scripts/size-2.s: Simplify.
+ * ld-scripts/size-2.t: Set start address. Set exe flag on image.
+ * ld-scripts/size-2.d: Update.
+ * ld-scripts/size.exp: Don't run on aix. Run size-2 on all elf
+ targets except mips.
+
+2004-03-27 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic*.d: Adjust to compensate for page size change.
+
+2004-03-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe.r: Update for changed sym type.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+
+2004-03-22 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/dsofnf.s, ld-cris/dsofnf2.s, ld-cris/gotplt1.d,
+ ld-cris/gotplt2.d, ld-cris/gotplt3.d: New tests.
+
+2004-03-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elfvers/vers.exp: Add new tests for versioned weak
+ definition.
+
+ * ld-elfvers/vers28a.c: New file.
+ * ld-elfvers/vers28a.dsym: Likewise.
+ * ld-elfvers/vers28a.ver: Likewise.
+ * ld-elfvers/vers28b.c: Likewise.
+ * ld-elfvers/vers28b.dsym: Likewise.
+ * ld-elfvers/vers28b.map: Likewise.
+ * ld-elfvers/vers28b.ver: Likewise.
+ * ld-elfvers/vers28c.c: Likewise.
+ * ld-elfvers/vers28c.dsym: Likewise.
+ * ld-elfvers/vers28c.ver: Likewise.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/provide-2.d: Ignore random symbols.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tls.d: Update.
+ * ld-powerpc/tls32.d: Update.
+ * ld-powerpc/tlsexe.d: Update.
+ * ld-powerpc/tlsexe32.d: Update.
+ * ld-powerpc/tlsexetoc.d: Update.
+ * ld-powerpc/tlsso.d: Update.
+ * ld-powerpc/tlsso32.d: Update.
+ * ld-powerpc/tlstoc.d: Update.
+ * ld-powerpc/tlstocso.d: Update.
+
+2004-03-05 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ld-scripts/size-1.d: Add bigendian regexps.
+ * ld-scripts/size-2.d: Set --wide for readelf.
+
+ * ld-scripts/size.exp: New.
+ * ld-scripts/size-[12].{d,s,t}: New.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-frv/fr450-link[abc].s, fr450-link.d: New test.
+ * ld-frv/frv.exp: New harness.
+
+2004-02-24 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic-pie-2.d: Adjust for decay of FUNCDESC relocs that
+ bind locally.
+ * ld-frv/fdpic-pie-8.d: Likewise.
+ * ld-frv/fdpic-shared-4.d: Likewise.
+ * ld-frv/fdpic-pie-6-fail.d: Renamed from...
+ * ld-frv/fdpic-pie-6.d: New test.
+ * ld-frv/fdpic-shared-6-fail.d: Renamed from...
+ * ld-frv/fdpic-shared-6.d: New test.
+ * ld-frv/fdpic6.ldv: New.
+ * ld-frv/fdpic-static-6.d: Adjust test name.
+ * ld-frv/fdpic-pie-8-fail.d: Removed.
+ * ld-frv/fdpic.exp: Run new tests.
+
+2004-02-23 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ld-scripts/provide.exp: New.
+ * ld-scripts/provide-{1,2,3}.{s,t,d}.exp: New.
+
+2004-02-23 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/data.t: Set ".other" address so location doesn't
+ depend on target alignment.
+ * ld-scripts/data.d: Update.
+
+2004-02-20 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ld-scripts/align.{s,t,exp}: New.
+
+2004-02-19 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ld-scripts/data.{s,t,d,exp}: New.
+
+2004-02-18 Nathan Sidwell <nathan at codesourcery.com>
+
+ * ld-scripts/assert.{s,t,exp}: New.
+
+2004-02-17 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips/elf/elf-rel-xgot-{n32,n64-linux}.d: Update after 2004-02-02
+ changes to the way large constants are added.
+ * ld-mips/elf/elf-rel-got-{n32,n64-linux}.d: Likewise. Adjust order
+ of GOT entries after today's change to the handling of GOT_PAGE
+ relocations.
+
+2004-02-09 Anil Paranjpe <anilp1 at KPITCummins.com>
+
+ * ld-h8300/relax-5.s: New file: Source for relax-5 test.
+ * ld-h8300/relax-5.d: New file: Expected output and commands for
+ assembling and linking the relax-5 test.
+ * ld-h8300/relax-5-coff.d: New file: Variant for the COFF based
+ toolchain.
+ * ld-h8300/h8300-exp: Run the relax-5 test.
+
+2004-01-23 Daniel Jacobowitz <drow at mvista.com>
+
+ * ld-arm/arm-app-abs32.s, ld-arm/arm-app-abs32.r,
+ ld-arm/arm-app-abs32.d: New files.
+ * ld-arm/arm-elf.exp: Add arm-app-abs32 testcase.
+
+2004-01-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-i386/tlsbin.dd: Adjust for changed sib printing.
+
+2004-01-13 Daniel Jacobowitz <drow at mvista.com>
+
+ * ld-arm/arm-elf.exp: Add arm-static-app test.
+ * ld-arm/arm-static-app.s, ld-arm/arm-static-app.d,
+ ld-arm/arm-static-app.r: New files.
+
+2004-01-12 Anil Paranjpe <anilp1 at KPITCummins.com>
+
+ * ld-h8300/h8300-exp: Run the relax-4 test.
+ * ld-h8300/relax-4.s: New file: Source for relax-4 test.
+ * ld-h8300/relax-4.d: New file: Expected output and commands for
+ assembling and linking the relax-4 test.
+ * ld-h8300/relax-4-coff.d: New file: Variant for the COFF based
+ toolchain.
+
+2004-01-09 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-selective/selective.exp: Skip ia64-*-*.
+
+2004-01-09 Daniel Jacobowitz <drow at mvista.com>
+
+ * ld-arm/arm-lib.d, ld-arm/arm-lib.r: Update for R_ARM_PLT32
+ changes.
+
+2004-01-06 Daniel Jacobowitz <drow at mvista.com>
+
+ * ld-arm/arm-app.d, ld-arm/arm-app.r, ld-arm/arm-app.s,
+ ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-lib.s,
+ ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
+ ld-arm/arm-lib-plt32.s, ld-arm/arm-elf.exp: New files.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv: Update .d files with correct addresses displayed for
+ dynamic relocations.
+ 2003-12-02 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic1.s (.D0): Move to separate data section.
+ 2003-11-28 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
+ * ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Update to
+ reflect EMBEDDED= change in linker script.
+ 2003-11-27 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv: Update .d files to reflect changes in the page size, the
+ addition of a stack segment, the use of a NULL function descriptor
+ for weakundef functions and the change in the lazy funcdesc_value
+ in-place addend value.
+ 2003-11-05 Alexandre Oliva <aoliva at redhat.com>
+ * lib/ld-lib.exp (is_elf_format): Match frv-uclinux.
+ 2003-10-06 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
+ ld-frv/fdpic-static-7.d, ld-frv/fdpic-static-8.d: Addresses are
+ now _gp-based, not \.rofixup-based.
+ * ld-frv/fdpic-static-6.d: Likewise. Match warning about
+ relocation to different section.
+ 2003-09-30 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic.exp: Add -melf32frvfd to LDFLAGS.
+ 2003-09-19 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic7.s, ld-frv/fdpic-static-7.d, ld-frv/fdpic-pie-7.d,
+ ld-frv/fdpic-shared-7.d: New.
+ * ld-frv/fdpic8.s, ld-frv/fdpic-static-8.d, ld-frv/fdpic-pie-8.d,
+ ld-frv/fdpic-shared-8.d: New.
+ * ld-frv/fdpic-pie-8-fail.d, ld-frv/fdpic-shared-8-fail.d: New.
+ * ld-frv/fdpic.exp: Run them.
+ * ld-frv/fdpic8.ldv, ld-frv/fdpic8min.ldv: New.
+ 2003-09-18 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/fdpic5.s, ld-frv/fdpic-static-5.d, ld-frv/fdpic-pie-5.d,
+ ld-frv/fdpic-shared-5.d: New.
+ * ld-frv/fdpic6.s, ld-frv/fdpic-static-6.d, ld-frv/fdpic-pie-6.d,
+ ld-frv/fdpic-shared-6.d: New.
+ * ld-frv/fdpic.exp: Run them.
+ * ld-frv/fdpic*.d: Add -mfdpic to assembler flags. Updated.
+ * ld-frv/fdpic2min.ldv: New, used by fdpic-shared-2.d.
+ * ld-frv/fdpic-shared-2-fail.d: New.
+ * ld-frv/fdpic.exp: Run it.
+ * ld-frv/fdpic4.s, ld-frv/fdpic-shared-4.d: New.
+ * ld-frv/fdpic.exp: Add new test.
+ * ld-frv/fdpic-pie-2.d: Remove unnecessary function descriptors.
+ * ld-frv/fdpic-shared-local-2.d, ld-frv/fdpic2.ldv: New.
+ * ld-frv/fdpic3.s, ld-frv/fdpic-shared-3.d: New.
+ * ld-frv/fdpic.exp: Add new tests.
+ * ld-frv/fdpic.exp, ld-frv/fdpic1.s, ld-frv/fdpic2.s,
+ * ld-frv/fdpic-static-1.d, ld-frv/fdpic-static-2.d,
+ * ld-frv/fdpic-pie-1.d, ld-frv/fdpic-pie-2.d,
+ * ld-frv/fdpic-shared-1.d, ld-frv/fdpic-shared-2.d: Renamed from
+ ucpic.
+ 2003-09-15 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/ucpic.exp, ld-frv/ucpic1.s, ld-frv/ucpic2.s: New.
+ * ld-frv/ucpic-static-1.d, ld-frv/ucpic-static-2.d: New.
+ * ld-frv/ucpic-pie-1.d, ld-frv/ucpic-pie-2.d: New.
+ * ld-frv/ucpic-shared-1.d, ld-frv/ucpic-shared-2.d: New.
+
+2004-01-02 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-selective/sel-dump.exp: Use is_elf_format, xfail assorted targets.
+ * ld-selective/selective.exp: Likewise.
+
+For older changes see ChangeLog-9303
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/ld/testsuite/ChangeLog-2005
===================================================================
--- branches/binutils/package/ld/testsuite/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1189 @@
+2005-12-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/orphan2.d: Undo the last change.
+
+2005-12-19 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-elf/unknown2.d: Only run for *-*-linux*.
+ * ld-elf/orphan2.d: Xfail everywhere.
+
+2005-12-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/2065
+ * ld-elf/orphan2.d: New file.
+ * ld-elf/orphan2.s: Likewise.
+
+2005-12-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/unknown2.d: New.
+ * ld-elf/unknown2.s: Likewise.
+
+2005-12-12 Paul Brook <paul at codesourcery.com>
+
+ * ld-arm/arm-call.d: New test.
+ * ld-arm/arm-call1.s: New file.
+ * ld-arm/arm-call1.s: New file.
+ * ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5.
+ * ld-arm/arm.ld: Add .glue_7 and .ARM.attribues.
+ * ld-arm/mixed-app-v5.d: New file.
+ * ld-arm/mixed-app.r: Tweak expected output.
+
+2005-11-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/symtocbase.d: Adjust for alignment change.
+
+2005-11-17 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * ld-mmix/sec-1.d: Adjust section order for recent ELF section
+ rearrangement.
+
+2005-11-15 Jan Beulich <jbeulich at novell.com>
+
+ * ld-bootstrap/bootstrap.exp: Delete ld-partial.o and ld[123]*
+ after test.
+ * ld-elf/elf.exp: Delete preinit, init, and fini after test.
+ * ld-elf/sec64k.exp: Use macro and repeat in generated source
+ files. Delete object files after test.
+
+2005-11-11 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/noov.d: Restrict to cris-*-*elf*.
+
+2005-10-31 Hans-Peter Nilsson <hp at bitrange.com>
+
+ PR ld/1501
+ * ld-mmix/bpo-10.d: Adjust for empty-section-removal.
+
+2005-10-28 Hans-Peter Nilsson <hp at axis.com>
+
+ PR ld/1567
+ * ld-cris/noov.s, ld-cris/noov.d: New test.
+
+2005-10-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/empty2.d: Allow more symbols.
+
+2005-10-26 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * ld-mmix/bpo-6.d, ld-mmix/bpo-19.d: Adjust for symbols between
+ section symbols and the _start symbol.
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/orphan.d: Adjust for mips.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * ld-elf/empty2.[sd]: New.
+
+2005-10-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1487
+ * ld-ia64/tlspic.rd: Updated.
+
+2005-10-21 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1467
+ * ld-elf/orphan.d: New file.
+ * ld-elf/orphan.ld: Likewise.
+ * ld-elf/orphan.s: Likewise.
+
+2005-10-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-ia64/ia64.exp: Undo the last change. Add support for *.d.
+
+ * ld-ia64/link-order.d: New file.
+
+2005-10-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/251
+ * ld-elf/group2.d: New file.
+
+2005-10-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1487
+ * ld-elf/unknown.d: New file.
+
+2005-10-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-ia64/ia64.exp: Check link order for ld -r.
+
+2005-10-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/crossref.exp: Add -mcall-aixdesc to CFLAGS for
+ powerpc64.
+
+2005-10-13 Mark Mitchell <mark at codesourcery.com>
+
+ * ld-elfvers/vers.exp: Add vers31.
+ * ld-elfvers/vers31.c: New file.
+ * ld-elfvers/vers31.dsym: Likewise.
+ * ld-elfvers/vers31.map: Likewise.
+ * ld-elfvers/vers31.ver: Likewise.
+
+2005-10-08 Paul Brook <paul at codesourcery.com>
+
+ * ld-arm/arm-rel31.d: Ignore Arm object attribute sections.
+ * ld-arm/arm-target1-abs.d: Ditto.
+ * ld-arm/arm-target1-rel.d: Ditto.
+ * ld-arm/arm-target2-abs.d: Ditto.
+ * ld-arm/arm-target2-got-rel.d: Ditto.
+ * ld-arm/arm-target2-rel.d: Ditto.
+
+2005-10-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR ld/1396
+ * ld-scripts/cross3.t: New file.
+ * ld-scripts/cross4.c: Likewise.
+
+ * ld-scripts/crossref.exp: Add a new test for "ld -r".
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/sec64k.exp: Enabled for all ELF targets.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * ld-elf/merge.d: Xfail bfin.
+
+2005-09-28 Alexandre Oliva <aoliva at redhat.com>
+
+ * symtocbase-1.s, symtocbase-2.s, symtocbase.d: New test.
+ * powerpc.exp: Run it.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * ld-x86-64/tlspic.dd: Adjust.
+
+2005-09-01 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris: Skip tests unsuitable for testing target
+ cris-axis-linux-gnu.
+
+2005-08-18 David Daney <ddaney at avtrex.com>
+
+ * ld-mips-elf/multi-got-1.d: Adjust for new ld behavior.
+ * ld-mips-elf/multi-got-no-shared.d: Likewise.
+ * ld-mips-elf/rel32-n32.d: Likewise.
+ * ld-mips-elf/rel32-o32.d: Likewise.
+ * ld-mips-elf/rel64.d: Likewise.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-d10v/default_layout.d: Adjust for section removal.
+ * ld-elf/empty.s: Define "main".
+ * ld-elf/frame.exp: Don't run for hppa64 and v850.
+ * ld-elf/group1.d: xfail various targets.
+ * ld-elf/merge.d: Likewise.
+ * ld-elf/merge2.d: Likewise.
+ * ld-elf/warn1.d: Likewise.
+ * ld-scripts/defined2.d: Likewise.
+ * ld-scripts/defined3.d: Likewise.
+ * ld-scripts/empty-aligned.d: Likewise.
+ * ld-scripts/size-2.d: Likewise.
+ * ld-scripts/weak.exp: Likewise.
+ * ld-selective/sel-dump.exp: Likewise.
+ * ld-undefined/weak-undef.exp: Likewise.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/crossref.exp: Remove a29k support.
+ * ld-srec/srec.exp: Likewise.
+
+2005-08-17 Jakub Jelinek <jakub at redhat.com>
+
+ * lib/ld-lib.exp (default_ld_compile): Append $cc arguments after
+ $CFLAGS instead of prepending them.
+
+ * ld-elfvers/vers.exp: Add a new test, vers30.
+ * ld-elfvers/vers30.c: New file.
+ * ld-elfvers/vers30.map: New file.
+ * ld-elfvers/vers30.ver: New file.
+ * ld-elfvers/vers30.dsym: New file.
+
+2005-08-17 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-alpha/tlsbin.rd: Update.
+ * ld-alpha/tlsbinr.rd: Update.
+ * ld-cris/locref1.d: Update.
+ * ld-cris/locref2.d: Update.
+ * ld-i386/tlsbin.rd: Update.
+ * ld-ia64/tlsbin.rd: Update.
+ * ld-powerpc/tlsexe.r: Update.
+ * ld-powerpc/tlsexe32.r: Update.
+ * ld-powerpc/tlsexetoc.r: Update.
+ * ld-s390/tlsbin.rd: Update.
+ * ld-s390/tlsbin_64.rd: Update.
+ * ld-sparc/tlssunbin32.rd: Update.
+ * ld-sparc/tlssunbin64.rd: Update.
+ * ld-x86-64/tlsbin.rd: Update.
+
+2005-08-16 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/dso-1.s: Add missing alignment directive.
+ * ld-cris/libdso-10.d: Adjust accordingly.
+
+2005-08-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-alpha/tlsbin.rd: Adjust for dynamic sym changes.
+ * ld-alpha/tlsbinr.rd: Likewise.
+ * ld-alpha/tlspic.rd: Likewise.
+ * ld-arm/mixed-app.d: Likewise.
+ * ld-arm/mixed-app.sym: Likewise.
+ * ld-arm/mixed-lib.sym: Likewise.
+ * ld-arm/tls-app.d: Likewise.
+ * ld-arm/tls-app.r: Likewise.
+ * ld-cris/expdyn5.d: Likewise.
+ * ld-cris/expdyn6.d: Likewise.
+ * ld-cris/expdyn7.d: Likewise.
+ * ld-cris/gotplt1.d: Likewise.
+ * ld-cris/gotplt2.d: Likewise.
+ * ld-cris/gotplt3.d: Likewise.
+ * ld-cris/hiddef1.d: Likewise.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-11.d: Likewise.
+ * ld-cris/libdso-12.d: Likewise.
+ * ld-cris/libdso-13.d: Likewise.
+ * ld-cris/libdso-14.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+ * ld-cris/pv32-1.d: Likewise.
+ * ld-cris/weakref2.d: Likewise.
+ * ld-frv/fdpic-pie-1.d: Likewise.
+ * ld-frv/fdpic-pie-2.d: Likewise.
+ * ld-frv/fdpic-pie-6.d: Likewise.
+ * ld-frv/fdpic-pie-7.d: Likewise.
+ * ld-frv/fdpic-pie-8.d: Likewise.
+ * ld-frv/fdpic-shared-1.d: Likewise.
+ * ld-frv/fdpic-shared-2.d: Likewise.
+ * ld-frv/fdpic-shared-3.d: Likewise.
+ * ld-frv/fdpic-shared-4.d: Likewise.
+ * ld-frv/fdpic-shared-5.d: Likewise.
+ * ld-frv/fdpic-shared-6.d: Likewise.
+ * ld-frv/fdpic-shared-7.d: Likewise.
+ * ld-frv/fdpic-shared-8.d: Likewise.
+ * ld-frv/fdpic-shared-local-2.d: Likewise.
+ * ld-frv/fdpic-shared-local-8.d: Likewise.
+ * ld-frv/fdpic-static-1.d: Likewise.
+ * ld-frv/fdpic-static-2.d: Likewise.
+ * ld-frv/fdpic-static-6.d: Likewise.
+ * ld-frv/fdpic-static-7.d: Likewise.
+ * ld-frv/fdpic-static-8.d: Likewise.
+ * ld-frv/tls-dynamic-1.d: Likewise.
+ * ld-frv/tls-dynamic-2.d: Likewise.
+ * ld-frv/tls-dynamic-3.d: Likewise.
+ * ld-frv/tls-initial-shared-2.d: Likewise.
+ * ld-frv/tls-pie-1.d: Likewise.
+ * ld-frv/tls-pie-3.d: Likewise.
+ * ld-frv/tls-relax-dynamic-1.d: Likewise.
+ * ld-frv/tls-relax-dynamic-2.d: Likewise.
+ * ld-frv/tls-relax-dynamic-3.d: Likewise.
+ * ld-frv/tls-relax-initial-shared-2.d: Likewise.
+ * ld-frv/tls-relax-pie-1.d: Likewise.
+ * ld-frv/tls-relax-pie-3.d: Likewise.
+ * ld-frv/tls-relax-shared-1.d: Likewise.
+ * ld-frv/tls-relax-shared-2.d: Likewise.
+ * ld-frv/tls-relax-shared-3.d: Likewise.
+ * ld-frv/tls-relax-static-1.d: Likewise.
+ * ld-frv/tls-shared-1.d: Likewise.
+ * ld-frv/tls-shared-2.d: Likewise.
+ * ld-frv/tls-shared-3.d: Likewise.
+ * ld-frv/tls-static-1.d: Likewise.
+ * ld-frv/tls-static-3.d: Likewise.
+ * ld-i386/tlsbin.rd: Likewise.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlspic.rd: Likewise.
+ * ld-ia64/tlsbin.dd: Likewise.
+ * ld-ia64/tlsbin.rd: Likewise.
+ * ld-ia64/tlspic.dd: Likewise.
+ * ld-ia64/tlspic.rd: Likewise.
+ * ld-powerpc/tlsexe.g: Likewise.
+ * ld-powerpc/tlsexe.r: Likewise.
+ * ld-powerpc/tlsexe32.d: Likewise.
+ * ld-powerpc/tlsexe32.g: Likewise.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-powerpc/tlsexetoc.g: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+ * ld-powerpc/tlsso.g: Likewise.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso32.d: Likewise.
+ * ld-powerpc/tlsso32.g: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlstocso.g: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+ * ld-s390/tlsbin.rd: Likewise.
+ * ld-s390/tlsbin_64.rd: Likewise.
+ * ld-s390/tlspic.rd: Likewise.
+ * ld-s390/tlspic_64.rd: Likewise.
+ * ld-sh/shared-1.d: Likewise.
+ * ld-sh/tlsbin-2.d: Likewise.
+ * ld-sh/tlsbin-3.d: Likewise.
+ * ld-sh/tlsbin-4.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+ * ld-sh/sh64/abi32.xd: Likewise.
+ * ld-sh/sh64/abi64.xd: Likewise.
+ * ld-sh/sh64/cmpct1.xd: Likewise.
+ * ld-sh/sh64/crange1.rd: Likewise.
+ * ld-sh/sh64/crange2.rd: Likewise.
+ * ld-sh/sh64/crange3-cmpct.rd: Likewise.
+ * ld-sh/sh64/crange3-media.rd: Likewise.
+ * ld-sh/sh64/crange3.rd: Likewise.
+ * ld-sh/sh64/gotplt.d: Likewise.
+ * ld-sh/sh64/init-cmpct.d: Likewise.
+ * ld-sh/sh64/init-media.d: Likewise.
+ * ld-sh/sh64/init64.d: Likewise.
+ * ld-sh/sh64/mix1.xd: Likewise.
+ * ld-sh/sh64/mix2.xd: Likewise.
+ * ld-sh/sh64/sh64.exp: Likewise.
+ * ld-sh/sh64/shdl32.xd: Likewise.
+ * ld-sh/sh64/shdl64.xd: Likewise.
+ * ld-sparc/tlssunbin32.rd: Likewise.
+ * ld-sparc/tlssunbin64.rd: Likewise.
+ * ld-sparc/tlssunnopic32.rd: Likewise.
+ * ld-sparc/tlssunnopic64.rd: Likewise.
+ * ld-sparc/tlssunpic32.rd: Likewise.
+ * ld-sparc/tlssunpic64.rd: Likewise.
+ * ld-x86-64/tlsbin.rd: Likewise.
+ * ld-x86-64/tlspic.dd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2005-08-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/empty.s: Define "start".
+ * ld-elf/merge2.d: xfail arc-*-* and dlx-*-*.
+ * ld-scripts/empty-aligned.s: No .data section.
+ * ld-scripts/empty-aligned.t: Discard most sections.
+ * ld-scripts/empty-aligned.d: Adjust.
+
+2005-08-11 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/expdyn1.s (expobj): Set size here, at definition...
+ * ld-cris/pv32.s: ...not here.
+ * ld-cris/expdyn1.d, ld-cris/libdso-12.d, ld-cris/locref1.d:
+ Adjust for expobj size being set at definition.
+
+ * ld-cris/v32-ba-1.d: Regexpize to adjust for symbol change.
+
+2005-08-08 Richard Earnshaw <richard.earnshaw at arm.com>
+
+ * ld-arm/mixed-app.sym: Expact _stack to be in the ABS section.
+ * ld-arm/mixed-lib.sym: Likewise.
+ * tls-lib.d: Use a regexp for the address locations.
+ * tls-lib.r: Likewise.
+
+2005-08-03 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-i386/pcrel16.d: Updated.
+ * ld-i386/pcrel16.s: Likewise.
+ * ld-x86-64/pcrel16.d: Likewise.
+
+2005-08-01 Richard Sandiford <richard at codesourcery.com>
+
+ * ld-mips/mips-elf-flags.exp: Add more good_combination tests.
+
+2005-07-28 Ben Elliston <bje at gnu.org>
+
+ * lib/ld-lib.exp (run_ld_link_exec_tests): Add new parameter
+ ${targets_to_xfail} that is applied for each test item.
+ * ld-elf/elf.exp: Pass *-*-netbsdelf* as an xfailed target.
+
+2005-07-27 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elfweak/size2a.s: Extend test to check size for two weaks.
+ * ld-elfweak/size2b.s: Likewise.
+ * ld-elfweak/size2.d: Update.
+
+2005-07-18 Jan Beulich <jbeulich at novell.com>
+
+ * ld-i386/abs.s, ld-i386/zero.s, ld-i386/abs.d, ld-x86-64/abs.d,
+ ld-i386/pcrel16.s, ld-i386/pcrel16.d, ld-x86-64/pcrel16.d,
+ ld-i386/pcrel8.s, ld-i386/pcrel8.d, ld-x86-64/pcrel8.d: New.
+ * ld-i386/i386.exp, ld-x86-64/x86-64.exp: Run new tests.
+
+2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * lib/ld-lib.exp (run_ld_link_exec_tests): Ignore assembler
+ warnings.
+
+2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * lib/ld-lib.exp (run_ld_link_exec_tests): Update comments.
+
+2005-07-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/elf.exp (array_tests): New.
+ Call run_ld_link_exec_tests with array_tests.
+
+ * ld-elf/fini.c: New file.
+ * ld-elf/fini.out: Likewise.
+ * ld-elf/init.c: Likewise.
+ * ld-elf/init.out: Likewise.
+ * ld-elf/preinit.c: Likewise.
+ * ld-elf/preinit.out: Likewise.
+
+ * lib/ld-lib.exp (run_ld_link_exec_tests): New.
+
+2005-07-12 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/sdalib.s (lib_var): Size it.
+
+2005-07-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-ia64/tlsbin.rd: Update for empty section removal change.
+ * ld-ia64/tlsbin.sd: Likewise.
+ * ld-ia64/tlspic.dd: Likewise.
+ * ld-ia64/tlspic.rd: Likewise.
+ * ld-ia64/tlspic.sd: Likewise.
+ * ld-x86-64/tlspic.dd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2005-07-08 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-cris/pv32.s: Give expobj a size.
+ * ld-cris/pv32-1.d: Update.
+ * ld-alpha/tlsbin.dd: Update for empty section removal change.
+ * ld-alpha/tlsbin.sd: Likewise.
+ * ld-alpha/tlsbin.td: Likewise.
+ * ld-alpha/tlsbinr.dd: Likewise.
+ * ld-alpha/tlsbinr.rd: Likewise.
+ * ld-alpha/tlspic.dd: Likewise.
+ * ld-alpha/tlspic.rd: Likewise.
+ * ld-alpha/tlspic.sd: Likewise.
+ * ld-alpha/tlspic.td: Likewise.
+ * ld-arm/tls-lib.d: Likewise.
+ * ld-arm/tls-lib.r: Likewise.
+ * ld-cris/gotplt2.d: Likewise.
+ * ld-cris/gotplt3.d: Likewise.
+ * ld-cris/hiddef1.d: Likewise.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-11.d: Likewise.
+ * ld-cris/libdso-12.d: Likewise.
+ * ld-cris/libdso-14.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+ * ld-i386/tlsnopic.dd: Likewise.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlsnopic.sd: Likewise.
+ * ld-i386/tlspic.rd: Likewise.
+ * ld-mmix/bpo-10.d: Likewise.
+ * ld-mmix/bpo-22.d: Likewise.
+ * ld-mmix/sec-7m.d: Likewise.
+ * ld-powerpc/tlsexe.r: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+ * ld-powerpc/tlsso.g: Likewise.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso32.d: Likewise.
+ * ld-powerpc/tlsso32.g: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlstocso.g: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+
+2005-06-23 Andreas Schwab <schwab at suse.de>
+
+ * ld-elfweak/size_foo.c (foo): Fix warning about implicit return
+ type.
+
+2005-06-10 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-cris/libdso-10.d: Adjust for elf.sc .bss change.
+ * ld-cris/libdso-2.d: Likewise.
+ * ld-mmix/loc6.d: Likewise.
+
+2005-06-10 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/empty-aligned.t: Adjust alignment expressions so
+ that no .text? section is kept. Also check setting vma and
+ lma.
+ * ld-scripts/empty-aligned.d: Update.
+
+2005-06-09 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/empty-aligned.d: Adjust.
+
+2005-06-05 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-cris/hiddef1.d: Undo the last change.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+
+2005-06-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-cris/hiddef1.d: Updated.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+
+2005-06-02 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/powerpc.exp (ppcelftests): Assemble sda test with -a32.
+
+2005-05-31 Zack Weinberg <zack at codesourcery.com>
+
+ * ld-scripts/align.exp: Mark align1 XFAIL on PECOFF targets.
+ * ld-scripts/data.exp: Mark data UNSUPPORTED on a.out targets.
+ * ld-scripts/provide.exp, ld-scripts/size.exp: Mark all tests
+ UNSUPPORTED on a.out targets. Tidy.
+
+2005-05-27 Mark Mitchell <mark at codesourcery.com>
+
+ * config/default.exp (CC): Use find_gcc.
+ (CFLAGS): Define, if no definition has been provided by the user.
+ (CXX): Likewise.
+ (CXXFLAGS): Likewise.
+
+2005-05-24 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-mmix/bpo-6.d: Updated.
+ * ld-mmix/bpo-19.d: Likewise.
+
+2005-05-22 Richard Henderson <rth at redhat.com>
+
+ * ld-elfweak/dsow.dsym: Adjust for non-zero ST_OTHER.
+ * ld-elfweak/weak.dsym: Likewise.
+
+ * ld-selective/selective.exp: Don't test alpha.
+
+2005-05-20 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-powerpc/sdalib.s, ld-powerpc/sdadyn.s, ld-powerpc/sdadyn.d: New
+ files.
+ * ld-powerpc/powerpc.exp: Run the new test.
+
+2005-05-20 Bob Wilson <bob.wilson at acm.org>
+
+ * ld-undefined/undefined.exp: Revert xfail for xtensa-*-*.
+
+2005-05-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 797
+ * empty-aligned.d: New file.
+ * empty-aligned.exp: Likewise.
+ * empty-aligned.s: Likewise.
+ * empty-aligned.t: Likewise.
+
+2005-05-11 Bob Wilson <bob.wilson at acm.org>
+
+ * ld-undefined/undefined.exp: xfail xtensa-*-*.
+
+2005-05-07 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe32.d: Update for changed got layout.
+ * ld-powerpc/tlsexe32.g: Likewise.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-powerpc/tlsso32.d: Likewise.
+ * ld-powerpc/tlsso32.g: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+
+2005-05-06 Nick Clifton <nickc at redhat.com>
+
+ Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ * config/default.exp, ld-alpha/alpha.exp, ld-arm/arm-elf.exp,
+ ld-auto-import/auto-import.exp, ld-bootstrap/bootstrap.exp,
+ ld-cdtest/cdtest.exp, ld-checks/checks.exp, ld-cris/cris.exp,
+ ld-crx/crx.exp, ld-cygwin/exe-export.exp, ld-d10v/d10v.exp,
+ ld-discard/discard.exp, ld-elf/elf.exp, ld-elf/exclude.exp,
+ ld-elf/frame.exp, ld-elf/sec64k.exp, ld-elfcomm/elfcomm.exp,
+ ld-elfvers/vers.exp, ld-elfvsb/elfvsb.exp, ld-elfweak/elfweak.exp,
+ ld-fastcall/fastcall.exp, ld-frv/fdpic.exp, ld-frv/tls.exp,
+ ld-h8300/h8300.exp, ld-i386/i386.exp, ld-ia64/ia64.exp,
+ ld-linkonce/linkonce.exp, ld-m68hc11/m68hc11.exp,
+ ld-maxq/maxq.exp, ld-mips-elf/mips-elf-flags.exp,
+ ld-mips-elf/mips-elf.exp, ld-mmix/mmix.exp, ld-pe/pe.exp,
+ ld-powerpc/powerpc.exp, ld-s390/s390.exp, ld-scripts/align.exp,
+ ld-scripts/assert.exp, ld-scripts/crossref.exp,
+ ld-scripts/data.exp, ld-scripts/defined.exp,
+ ld-scripts/empty-orphan.exp, ld-scripts/map-address.exp,
+ ld-scripts/overlay-size.exp, ld-scripts/phdrs.exp,
+ ld-scripts/phdrs2.exp, ld-scripts/provide.exp,
+ ld-scripts/script.exp, ld-scripts/size.exp, ld-scripts/sizeof.exp,
+ ld-scripts/sort.exp, ld-scripts/weak.exp,
+ ld-selective/sel-dump.exp, ld-selective/selective.exp,
+ ld-sh/rd-sh.exp, ld-sh/arch/arch.exp, ld-sh/sh64/rd-sh64.exp,
+ ld-sh/sh64/relax.exp, ld-sh/sh64/relfail.exp, ld-sh/sh64/sh64.exp,
+ ld-shared/shared.exp, ld-sparc/sparc.exp,
+ ld-undefined/undefined.exp, ld-undefined/weak-undef.exp,
+ ld-versados/versados.exp, ld-x86-64/x86-64.exp,
+ ld-xstormy16/xstormy16.exp, ld-xtensa/coalesce.exp,
+ ld-xtensa/lcall.exp, lib/ld-lib.exp
+
+2005-05-05 Mike Frysinger <vapier at gentoo.org>
+
+ * ld-srec/srec.exp: Replace linux-gnu with linux-* to allow for
+ versions of Linux which do not use glibc.
+ * ld-sh/sh.exp: Likewise
+
+2005-05-05 Paul Brook <paul at codesourcery.com>
+
+ * lib/ld-lib.exp (regexp_diff): Pass test if last line is "#...".
+ * ld-elfweak/elfweak.exp: Run size2.d.
+ * ld-elfweak/size2.d: New file.
+ * ld-elfweak/size2a.s: New file.
+ * ld-elfweak/size2b.s: New file.
+
+2005-04-26 Mark Kettenis <kettenis at gnu.org>
+
+ * ld-fastcall/fastcall.exp: Don't run on i*86-*-openbsd*.
+
+ * ld-srec/srec.exp (run_srec_test): Deal with ProPolice on
+ *-*-openbsd*.
+
+2005-04-25 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-discard/extern.d: Expect error.
+ * ld-discard/start.d: Likewise.
+ * ld-discard/static.d: Likewise.
+
+2005-04-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/reloc.d: Update to suit removal of non-alloc relocs.
+
+2005-04-15 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-d10v/default_layout.d: Update for unused section removal.
+
+2005-04-14 David S. Miller <davem at davemloft.net>
+
+ * ld-selective/sel-dump.exp: Do not exclude sparc64-*.
+ * ld-selective/selective.exp: Likewise.
+ * ld-sparc/sparc.exp: Add {32,64}-bit prefix to test
+ names so we know which one is failing. Run sparc64 TLS
+ tests on multi-arch sparc platforms.
+ * ld-sparc/tls64.sd, ld-sparc/tlssunbin64.dd,
+ ld-sparc/tlssunbin64.rd, ld/ld-sparc/tlssunbin64.sd,
+ ld-sparc/tlssunbin64.td, ld-sparc/tlssunnopic64.dd,
+ ld-sparc/tlssunnopic64.rd, ld-sparc/tlssunnopic64.sd,
+ ld-sparc/tlssunpic64.dd, ld-sparc/tlssunpic64.rd,
+ ld-sparc/tlssunpic64.sd, ld-sparc/tlssunpic64.td): Update now
+ that sparc64 ELF does support TLS.
+
+2005-04-13 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-elf/empty.d: New file.
+ * ld-elf/empty.s: Likewise.
+
+2005-04-11 David S. Miller <davem at davemloft.net>
+
+ * ld-sparc/tlssunbin32.dd: Update for TLS relocation fixes.
+ * ld-sparc/tlssunbin32.rd: Likewise.
+ * ld-sparc/tlssunbin32.sd: Likewise.
+ * ld-sparc/tlssunpic32.dd: Likewise.
+
+2005-03-30 Julian Brown <julian at codesourcery.com>
+
+ * ld-arm/arm-app-abs32.d: Update expected output due to mapping symbols
+ being untyped.
+ * ld-arm/arm-app.d: Likewise.
+ * ld-arm/mixed-app.d: Likewise.
+
+2005-03-29 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-arm/tls-lib.s, ld-arm/tls-lib.d, ld-arm/tls-lib.r,
+ ld-arm/tls-app.s, ld-arm/tls-app.d, ld-arm/tls-app.r: New files.
+ * ld-arm/arm-lib.ld, ld-arm/arm-dyn.ld: Increase data segment
+ alignment.
+ * ld-arm/arm-elf.exp: Run TLS tests.
+
+2005-03-28 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 803
+ * ld-ia64/ia64.exp: Pass -mtune=itanium1 to as.
+
+2005-03-24 Mark Mitchell <mark at codesourcery.com>
+
+ * config/default.exp: Do not load libpath.exp if it does not
+ exist.
+ (CC): Provide fallback definition.
+
+2005-03-24 Eric Christopher <echristo at redhat.com>
+
+ * ld-mips-elf/rel32-n32.d: Revert changes.
+ * ld-mips-elf/rel32-o32.d: Ditto.
+ * ld-mips-elf/rel64.d: Ditto.
+
+2005-03-23 Eric Christopher <echristo at redhat.com>
+
+ * ld-mips-elf/textrel-1.s, ld-mips-elf/textrel-1.d: New
+ test.
+ * ld-mips-elf/mips-elf.exp: Call it.
+ * ld-mips-elf/rel32-n32.d: Update for DF_TEXTREL removal.
+ * ld-mips-elf/rel32-o32.d: Ditto.
+ * ld-mips-elf/rel64.d: Ditto.
+
+2005-03-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-cris/expdyn5.d: Updated for alignment change in elf.sc.
+ * ld-cris/expdyn6.d: Likewise.
+ * ld-cris/expdyn7.d: Likewise.
+ * ld-cris/gotplt1.d: Likewise.
+ * ld-cris/gotplt2.d: Likewise.
+ * ld-cris/gotplt3.d: Likewise.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-11.d: Likewise.
+ * ld-cris/libdso-12.d: Likewise.
+ * ld-cris/libdso-14.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+ * ld-cris/locref1.d: Likewise.
+ * ld-cris/locref2.d: Likewise.
+ * ld-cris/nodyn5.d: Likewise.
+ * ld-cris/pv32-1.d: Likewise.
+ * ld-cris/weakref2.d: Likewise.
+
+2005-03-23 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/tbss.s: Don't start directives in first column.
+ * ld-scripts/weak1.s: Likewise.
+ * ld-scripts/weak2.s: Likewise.
+ * ld-undefined/weak-undef.s: Likewise.
+ * ld-undefined/undefined.exp: Enable tests for hppa-elf.
+
+2005-03-22 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe32.r: Update.
+ * ld-powerpc/tlsso32.d: Update.
+ * ld-powerpc/tlsso32.g: Update.
+ * ld-powerpc/tlsso32.r: Update.
+
+2005-03-21 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe.r: Update.
+ * ld-powerpc/tlsexetoc.r: Update.
+ * ld-powerpc/tlsso.r: Update.
+ * ld-powerpc/tlstocso.r: Update.
+
+2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-mmix/bpo-1.d: Updated for empty section removal.
+ * ld-mmix/bpo-10.d: Likewise.
+ * ld-mmix/bpo-11.d: Likewise.
+ * ld-mmix/bpo-14.d: Likewise.
+ * ld-mmix/bpo-16.d: Likewise.
+ * ld-mmix/bpo-17.d: Likewise.
+ * ld-mmix/bpo-18.d: Likewise.
+ * ld-mmix/bpo-19.d: Likewise.
+ * ld-mmix/bpo-2.d: Likewise.
+ * ld-mmix/bpo-3.d: Likewise.
+ * ld-mmix/bpo-4.d: Likewise.
+ * ld-mmix/bpo-5.d: Likewise.
+ * ld-mmix/bpo-6.d: Likewise.
+ * ld-mmix/bpo-9.d: Likewise.
+ * ld-mmix/bspec1.d: Likewise.
+ * ld-mmix/bspec2.d: Likewise.
+ * ld-mmix/greg-1.d: Likewise.
+ * ld-mmix/greg-19.d: Likewise.
+ * ld-mmix/greg-2.d: Likewise.
+ * ld-mmix/greg-3.d: Likewise.
+ * ld-mmix/greg-4.d: Likewise.
+ * ld-mmix/greg-5.d: Likewise.
+ * ld-mmix/greg-5s.d: Likewise.
+ * ld-mmix/greg-6.d: Likewise.
+ * ld-mmix/greg-7.d: Likewise.
+ * ld-mmix/loc1.d: Likewise.
+ * ld-mmix/loc2.d: Likewise.
+ * ld-mmix/loc3.d: Likewise.
+ * ld-mmix/loc4.d: Likewise.
+ * ld-mmix/loc6.d: Likewise.
+ * ld-mmix/local1.d: Likewise.
+ * ld-mmix/local12.d: Likewise.
+ * ld-mmix/local3.d: Likewise.
+ * ld-mmix/local5.d: Likewise.
+ * ld-mmix/local7.d: Likewise.
+ * ld-mmix/locdo-1.d: Likewise.
+ * ld-mmix/loct-1.d: Likewise.
+ * ld-mmix/locto-1.d: Likewise.
+ * ld-mmix/start-1.d: Likewise.
+ * ld-mmix/undef-3.d: Likewise.
+
+2005-03-16 David Heine <dlheine at tensilica.com>
+ Bob Wilson <bob.wilson at acm.org>
+
+ * ld-scripts/empty-orphan.d, ld-scripts/empty-orphan.exp,
+ ld-scripts/empty-orphan.s, ld-scripts/emtpy-orphan.t: New test.
+
+2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-cris/hiddef1.d: Updated for empty section removal.
+ * ld-cris/libdso-10.d: Likewise.
+ * ld-cris/libdso-2.d: Likewise.
+
+2005-03-16 H.J. Lu <hongjiu.lu at intel.com>
+
+ * ld-alpha/tlsbin.rd: Updated for empty section removal.
+ * ld-alpha/tlsbinr.rd: Likewise.
+ * ld-alpha/tlspic.rd: Likewise.
+ * ld-arm/mixed-lib.sym: Likewise.
+ * ld-i386/tlsbin.rd: Likewise.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlspic.rd: Likewise.
+ * ld-ia64/tlsbin.rd: Likewise.
+ * ld-ia64/tlspic.rd: Likewise.
+ * ld-powerpc/apuinfo.rd: Likewise.
+ * ld-powerpc/powerpc.exp: Likewise.
+ * ld-powerpc/tlsexe32.r: Likewise.
+ * ld-s390/tlsbin.rd: Likewise.
+ * ld-s390/tlsbin_64.rd: Likewise.
+ * ld-s390/tlspic.rd: Likewise.
+ * ld-s390/tlspic_64.rd: Likewise.
+ * ld-sh/tlsbin-2.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+ * ld-sparc/tlssunbin32.rd: Likewise.
+ * ld-sparc/tlssunnopic32.rd: Likewise.
+ * ld-sparc/tlssunpic32.rd: Likewise.
+ * ld-x86-64/tlsbin.rd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2005-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsexe32.d: Update.
+ * ld-powerpc/tlsexe32.g: Update.
+ * ld-powerpc/tlsexe32.r: Update.
+ * ld-powerpc/tlsexe32.t: Update.
+ * ld-powerpc/tlsso32.d: Update.
+ * ld-powerpc/tlsso32.g: Update.
+ * ld-powerpc/tlsso32.r: Update.
+ * ld-powerpc/tlsso32.t: Update.
+
+2005-03-08 Hans-Peter Nilsson <hp at axis.com>
+
+ Adjust testsuite for cris-axis-aout.
+ * ld-cris/noglob1.d: Adjust regexp for a.out output.
+ * ld-cris/badgotr1.d, ld-cris/expdyn1.d, ld-cris/expdyn2.d,
+ ld-cris/expdyn3.d, ld-cris/expdyn4.d, ld-cris/expdyn5.d,
+ ld-cris/expdyn6.d, ld-cris/expdyn7.d, ld-cris/gotplt1.d,
+ ld-cris/gotplt2.d, ld-cris/gotplt3.d, ld-cris/hiddef1.d,
+ ld-cris/libdso-1.d, ld-cris/libdso-10.d, ld-cris/libdso-11.d,
+ ld-cris/libdso-12.d, ld-cris/libdso-13.d, ld-cris/libdso-14.d,
+ ld-cris/libdso-2.d, ld-cris/libdso-3.d, ld-cris/libdso-4.d,
+ ld-cris/locref1.d, ld-cris/locref2.d, ld-cris/nodyn4.d,
+ ld-cris/nodyn5.d, ld-cris/pv32-1.d, ld-cris/undef1.d,
+ ld-cris/weakref1.d: ld-cris/weakref2.d: Pass --em=criself to gas.
+ * ld-cris/v10-v32.d, ld-cris/v10-va.d, ld-cris/v32-ba-1.d,
+ ld-cris/v32-v10.d, ld-cris/v32-va.d, ld-cris/va-v10.d,
+ ld-cris/va-v32.d: Ditto. Pass -m criself to gld.
+ * ld-cris/v32-bin-1.d: Pass -m criself to gld.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-alpha/tlsbin.dd: Update to suit changed section layout and
+ removed section symbols.
+ * ld-alpha/tlsbin.rd: Likewise.
+ * ld-alpha/tlsbin.sd: Likewise.
+ * ld-alpha/tlsbinr.dd: Likewise.
+ * ld-alpha/tlsbinr.rd: Likewise.
+ * ld-alpha/tlspic.dd: Likewise.
+ * ld-alpha/tlspic.rd: Likewise.
+ * ld-alpha/tlspic.sd: Likewise.
+
+ * ld-powerpc/tlsexe.g: Update for removed dot-symbols.
+ * ld-powerpc/tlsexe.r: Likewise.
+ * ld-powerpc/tlsexetoc.g: Likewise.
+ * ld-powerpc/tlsexetoc.r: Likewise.
+
+2005-03-04 David Daney <ddaney at avtrex.com>
+
+ * ld-mips-elf/multi-got-no-shared-1.s,
+ ld-mips-elf/multi-got-no-shared-2.s,
+ ld-mips-elf/multi-got-no-shared.d: New tests.
+ * ld-mips-elf/mips-elf.exp: Run them.
+
+2005-03-02 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-mips-elf/tlsbin-o32.s, ld-mips-elf/mips-dyn.ld,
+ ld-mips-elf/tlslib-o32.got, ld-mips-elf/tlslib-o32.d,
+ ld-mips-elf/tlslib-o32.s, ld-mips-elf/mips-lib.ld,
+ ld-mips-elf/tlsbin-o32.got, ld-mips-elf/tlsdyn-o32.d,
+ ld-mips-elf/tlsdyn-o32.got, ld-mips-elf/tlsbin-o32.d,
+ ld-mips-elf/tlsdyn-o32.s, ld-mips-elf/tls-multi-got-1.got,
+ ld-mips-elf/tls-multi-got-1-1.s, ld-mips-elf/tls-multi-got-1.d,
+ ld-mips-elf/tls-multi-got-1.r, ld-mips-elf/tls-multi-got-1-2.s,
+ ld-mips-elf/tlslib-o32-ver.got, ld-mips-elf/tlslib.ver,
+ ld-mips-elf/tlslib-o32-hidden.got, ld-mips-elf/tlslib-hidden.ver,
+ ld-mips-elf/tlsdyn-o32-1.d, ld-mips-elf/tlsdyn-o32-3.got,
+ ld-mips-elf/tlsdyn-o32-2.d, ld-mips-elf/tlsdyn-o32-2.s,
+ ld-mips-elf/tlsdyn-o32-3.d, ld-mips-elf/tlsdyn-o32-1.got,
+ ld-mips-elf/tlsdyn-o32-2.got: New files.
+ * ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2005-03-01 Nick Clifton <nickc at redhat.com>
+
+ * ld-d10v/default_layout.d: Adjust expected offsets to allow for
+ section alignment.
+
+ * ld-discard/extern.d: Adjust expected warning to take into
+ account the fact that the linker's name might be included and that
+ the reloc might have been adjusted to be against the section
+ symbol.
+
+2005-02-22 Eric Christopher <echristo at redhat.com>
+
+ * ld-mips-elf/reloc-merge-lo16.d: Correct symbol
+ table size for __start.
+
+2005-02-22 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-elfvsb/hidden2.d: Expect OBJECT.
+ * ld-elfvsb/hidden2.s: Force type OBJECT.
+ * ld-elfvsb/hidden2.ld: Place .dynamic explicitly.
+ * ld-elf/start.s: Provide __start for MIPS.
+ * ld-elfcomm/elfcomm.exp: Accept MIPS common section. XFAIL size change
+ test.
+ * ld-elf/warn1.d: Use group.ld instead of -Ttext.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * lib/ld-lib.exp (run_dump_test): Don't require a dump program if
+ #warning given. Rearrange to allow $program to remain unset.
+ Don't allow gas errors. Append objcopy_as_link output to that
+ from the linker before testing against expected output. Fail the
+ test if warning not found when expected. Conversely fail the
+ test if ld errors or warnings given when not expected.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/exclude1.s: Use ".dc.a".
+ * ld-elfvsb/hidden2.s: Likewise.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elf/warn1.d: Specify -Ttext.
+ * ld-scripts/align.exp (align2a, align2b: Don't run on aout targets.
+ * ld-scripts/align2.t: Discard all but .text and .data.
+ * ld-scripts/align2a.d: Accept non-readonly for coff.
+ * ld-scripts/align2b.d: Likewise.
+ * lib/ld-lib.exp (is_aout_format): New function.
+
+2005-02-18 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-scripts/align2a.d: Don't assume anything about section
+ padding or alignment, or max page size. Allow 64-bit addresses.
+ * ld-scripts/align2b.d: Likewise.
+
+2005-02-17 Zack Weinberg <zack at codesourcery.com>
+
+ * ld-scripts/align.exp: Rename existing "ALIGN" test to "align1".
+ Add dump tests "align2a", "align2b", "align2c".
+ * ld-scripts/align2.t, ld-scripts/align2a.s, ld-scripts/align2a.d
+ * ld-scripts/align2b.s, ld-scripts/align2b.d
+ * ld-scripts/align2c.s, ld-scripts/align2c.d: New files.
+
+2005-02-17 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic-static-6.d: Update.
+ * ld-frv/fdpic*.d: Remove explicit -mfdpic from #as. Update
+ spelling of errors and warnings.
+
+2005-02-15 Nigel Stephens <nigel at mips.com>
+ Maciej W. Rozycki <macro at mips.com>
+
+ * ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and
+ R_MIPS16_LO16 relocs.
+ * ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI.
+ * ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests.
+ * ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2005-02-14 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * ld-sparc/sparc.exp: Enable on Solaris. Disable 32-bit tests
+ on sparc64-elf.
+
+2005-02-13 Jan Beulich <jbeulich at novell.com>
+
+ * ld-elfvers/vers.exp (as_options): New. Set to -x for ia64.
+ (build_binary): Pass as_options to ld_assemble.
+ (test_ldfail): Likewise.
+ (build_exec): Likewise.
+ Pass as_options to run_ld_link_tests.
+ * ld-ia64/tlsbin.s: Add .explicit.
+ * ld-ia64/tlsbinpic.s: Likewise.
+ * ld-ia64/tlspic1.s: Likewise.
+
+2005-02-13 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * ld-sparc/tlssunnopic32.rd: Adjust for .dynsym changes.
+ * ld-sparc/tlssunpic32.rd: Likewise.
+
+2005-02-13 Eric Botcazou <ebotcazou at libertysurf.fr>
+
+ * ld-elf/warn1.d: Do not run on sparc64-*-solaris2*.
+
+2005-02-11 Paul Brook <paul at codesourcery.com>
+
+ * ld-elf/symbol1w.s: Avoid using @function syntax.
+
+2005-02-12 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-elfvsb/hidden2.s: Replace .word with .long.
+
+2005-02-10 Paul Brook <paul at codesourcery.com>
+
+ * ld-elfvsb/hidden2.s: New file
+ * ld-elfvsb/hidden2.d: New file
+ * ld-elfvsb/hidden2.ld: New file
+
+2005-02-07 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic-shared-8-fail.d: Tweak error messages.
+
+2005-02-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * ld-cris/libdso-13.d: Adjust for being identified as warning.
+
+ * ld-cris/globsymw2.s: New file.
+ * ld-cris/warn3.d, ld-cris/warn4.d: New tests.
+
+ * ld-discard/extern.d, ld-discard/start.d, ld-discard/static.d:
+ Adjust for being identified as warnings.
+
+ * ld-cris/stabs1.s: New file.
+ * ld-cris/undef2.d, ld-cris/undef3.d: New tests.
+
+ * ld-elf/start.s, ld-elf/symbolref.s, ld-elf/symbol1w.s,
+ ld-elf/warn1.d: New test.
+
+ * lib/ld-lib.exp: Support new directive "warning".
+
+2005-02-02 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-mips-elf/eh-frame3.d, ld-mips-elf/eh-frame4.d: Move comments
+ after test commands.
+ * ld-mips-elf/mips-elf.exp: Skip multi-got-1 on non-GNU/Linux
+ systems.
+
+2005-02-01 Alan Modra <amodra at bigpond.net.au>
+
+ * ld-powerpc/tlsso.r: Update.
+ * ld-powerpc/tlstocso.r: Update.
+
+2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-mips-elf/elf-rel-got-n32.d, ld-mips-elf/elf-rel-got-n64-linux.d,
+ ld-mips-elf/elf-rel-got-n64.d, ld-mips-elf/elf-rel-xgot-n32.d,
+ ld-mips-elf/elf-rel-xgot-n64-linux.d, ld-mips-elf/elf-rel-xgot-n64.d,
+ ld-mips-elf/jalbal.d: Force big-endian.
+ * ld-mips-elf/multi-got-1.d: Make more flexible.
+ * ld-mips-elf/rel32-n32.d, ld-mips-elf/rel32-o32.d,
+ ld-mips-elf/rel64.d: Update offsets.
+
+2005-01-31 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ld-elf/group1.d: Accept OBJECT symbols.
+
+2005-01-31 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips-elf/eh-frame1.s: Create a .gcc_compiled_long32 if using
+ 32-bit pointers.
+ * ld-mips-elf/eh-frame1.d: Link in .gcc_compiled_long32 sections.
+ * ld-mips-elf/eh-frame[34].d: New tests.
+ * ld-mips-elf/mips-elf.exp: Run them.
+
+2005-01-28 Jan Beulich <jbeulich at novell.com>
+
+ * ld/ia64/tlsbin.[rt]d: Widen expected offset/size ranges.
+ * ld/ia64/tlspic.[rt]d: Likewise.
+
+2005-01-25 Alexandre Oliva <aoliva at redhat.com>
+
+ * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
+ * ld-frv/tls.exp: Likewise.
+ 2004-11-26 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/tls-3.s: New.
+ * ld-frv/tls-static-3.d: New.
+ * ld-frv/tls-dynamic-3.d: New.
+ * ld-frv/tls-pie-3.d: New.
+ * ld-frv/tls-shared-3.d: New.
+ * ld-frv/tls-relax-static-3.d: New.
+ * ld-frv/tls-relax-dynamic-3.d: New.
+ * ld-frv/tls-relax-pie-3.d: New.
+ * ld-frv/tls-relax-shared-3.d: New.
+ * ld-frv/tls.exp: Run the new tests.
+ * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
+ * ld-frv/tls-relax-dynamic-2.d: Likewise.
+ * ld-frv/tls-relax-initial-shared-2.d: Likewise.
+ 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
+ * ld-frv/tls-1-dep.s: New.
+ * ld-frv/tls-1-shared.lds: New.
+ * ld-frv/tls-1.s: New.
+ * ld-frv/tls-2.s: New.
+ * ld-frv/tls-dynamic-1.d: New.
+ * ld-frv/tls-dynamic-2.d: New.
+ * ld-frv/tls-initial-shared-2.d: New.
+ * ld-frv/tls-pie-1.d: New.
+ * ld-frv/tls-relax-dynamic-1.d: New.
+ * ld-frv/tls-relax-dynamic-2.d: New.
+ * ld-frv/tls-relax-initial-shared-2.d: New.
+ * ld-frv/tls-relax-pie-1.d: New.
+ * ld-frv/tls-relax-shared-1.d: New.
+ * ld-frv/tls-relax-shared-2.d: New.
+ * ld-frv/tls-relax-static-1.d: New.
+ * ld-frv/tls-shared-1-fail.d: New.
+ * ld-frv/tls-shared-1.d: New.
+ * ld-frv/tls-shared-2.d: New.
+ * ld-frv/tls-static-1.d: New.
+ * ld-frv/tls.exp: New.
+ * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
+ * ld-frv/fdpic-pie-2.d: Likewise.
+ * ld-frv/fdpic-pie-6.d: Likewise.
+ * ld-frv/fdpic-pie-7.d: Likewise.
+ * ld-frv/fdpic-pie-8.d: Likewise.
+ * ld-frv/fdpic-shared-1.d: Likewise.
+ * ld-frv/fdpic-shared-2.d: Likewise.
+ * ld-frv/fdpic-shared-3.d: Likewise.
+ * ld-frv/fdpic-shared-4.d: Likewise.
+ * ld-frv/fdpic-shared-5.d: Likewise.
+ * ld-frv/fdpic-shared-6.d: Likewise.
+ * ld-frv/fdpic-shared-7.d: Likewise.
+ * ld-frv/fdpic-shared-8.d: Likewise.
+ * ld-frv/fdpic-shared-local-2.d: Likewise.
+ * ld-frv/fdpic-shared-local-8.d: Likewise.
+ * ld-frv/fdpic-static-1.d: Likewise.
+ * ld-frv/fdpic-static-2.d: Likewise.
+ * ld-frv/fdpic-static-6.d: Likewise.
+ * ld-frv/fdpic-static-7.d: Likewise.
+ * ld-frv/fdpic-static-8.d: Likewise.
+
+2005-01-17 Richard Sandiford <rsandifo at redhat.com>
+
+ * ld-mips-elf/eh-frame2-{n32,n64}.d: New tests.
+ * ld-mips-elf/mips-elf.exp: Run them.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
+
+ * ld-sh/arch/arch.exp: Correct the email address.
+ Correct a few comment typos.
+ (test_arch,test_arch_error): Use 'ld -r' to avoid illegal
+ relocations killing the test.
+ * ld-sh/arch/arch_expected.txt: Update/Correct the test results.
+ * ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
+ * ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
+ * ld-sh/arch/sh2a-nofpu.s: Generate new file.
+ * ld-sh/arch/sh2a-or-sh3e.s: Regenerate.
+ * ld-sh/arch/sh2a-or-sh4.s: Regenerate.
+ * ld-sh/arch/sh2a.s: Generate new file.
+ * ld-sh/arch/sh2e.s: Regenerate.
+ * ld-sh/arch/sh2.s: Regenerate.
+ * ld-sh/arch/sh3-dsp.s: Regenerate.
+ * ld-sh/arch/sh3e.s: Regenerate.
+ * ld-sh/arch/sh3-nommu.s: Regenerate.
+ * ld-sh/arch/sh3.s: Regenerate.
+ * ld-sh/arch/sh4al-dsp.s: Regenerate.
+ * ld-sh/arch/sh4a-nofpu.s: Regenerate.
+ * ld-sh/arch/sh4a.s: Regenerate.
+ * ld-sh/arch/sh4-nofpu.s: Regenerate.
+ * ld-sh/arch/sh4-nommu-nofpu.s: Regenerate.
+ * ld-sh/arch/sh4.s: Regenerate.
+ * ld-sh/arch/sh-dsp.s: Regenerate.
+ * ld-sh/arch/sh.s: Regenerate.
+
+2005-01-11 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * ld-sh/shared-1.d: Update for changed dynamic syms.
+ * ld-sh/sh64/gotplt.d: Likewise.
+ * ld-sh/sh64/init-cmpct.d: Likewise.
+ * ld-sh/sh64/init-media.d: Likewise.
+ * ld-sh/sh64/init64.d: Likewise.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/ld/testsuite/ld-arm/arm-elf.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/arm-elf.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/arm-elf.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -16,6 +16,33 @@
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
+if {[istarget "arm-*-vxworks"]} {
+ set armvxworkstests {
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $armvxworkstests
+ run_dump_test "vxworks1-static"
+}
+
# Exclude non-ARM-ELF targets.
if { ![is_elf_format] || ![istarget "arm*-*-*"] } {
@@ -89,6 +116,9 @@
{"TLS dynamic application" "-T arm-dyn.ld tmpdir/tls-lib.so" "" {tls-app.s}
{{objdump -fdw tls-app.d} {objdump -Rw tls-app.r}}
"tls-app"}
+ {"Thumb entry point" "-T arm.ld" "" {thumb-entry.s}
+ {{readelf -h thumb-entry.d}}
+ "thumb-entry"}
}
run_ld_link_tests $armelftests
Added: branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,3 @@
+#...
+ Entry point address: 0x8001
+#...
Added: branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/thumb-entry.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+ .text
+ .arch armv4t
+ .thumb
+ .global _start
+ .thumb_func
+_start:
+ bx lr
+
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,41 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>
+ 80804: e79cf009 ldr pc, \[ip, r9\]
+ 80808: 0000000c andeq r0, r0, ip
+ 8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
+ 80810: e599f008 ldr pc, \[r9, #8\]
+ 80814: 00000000 andeq r0, r0, r0
+ 80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+ 8081c: e79cf009 ldr pc, \[ip, r9\]
+ 80820: 00000010 andeq r0, r0, r0, lsl r0
+ 80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c>
+ 80828: e599f008 ldr pc, \[r9, #8\]
+ 8082c: 0000000c andeq r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: e92dc200 stmdb sp!, {r9, lr, pc}
+ 80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <\.text\+0x30>
+ 80c08: e5999000 ldr r9, \[r9\]
+ 80c0c: e5999000 ldr r9, \[r9\]
+ 80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <\.text\+0x34>
+ 80c14: e7991000 ldr r1, \[r9, r0\]
+ 80c18: e2811001 add r1, r1, #1 ; 0x1
+ 80c1c: e7891000 str r1, \[r9, r0\]
+ 80c20: eb000004 bl 80c38 <slocal>
+ 80c24: ebfffefb bl 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+ 80c28: ebfffef4 bl 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80c2c: e8bd8200 ldmia sp!, {r9, pc}
+ 80c30: 00000000 andeq r0, r0, r0
+ 80c34: 00000014 andeq r0, r0, r4, lsl r0
+
+00080c38 <slocal>:
+ 80c38: e1a0f00e mov pc, lr
+
+00080c3c <sglobal>:
+ 80c3c: e1a0f00e mov pc, lr
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.nd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.nd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.nd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008140c .*16 R_ARM_JUMP_SLOT 00000000 sexternal \+ 0
+00081410 .*16 R_ARM_JUMP_SLOT 00080c3c sglobal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 4 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00081c00 00000017 R_ARM_RELATIVE * 00080c38
+00080c0c .*06 R_ARM_ABS12 00000000 __GOTT_INDEX__ \+ 0
+00080c30 .*02 R_ARM_ABS32 00000000 __GOTT_BASE__ \+ 0
+00081414 .*15 R_ARM_GLOB_DAT 00081800 x \+ 0
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1-lib.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,36 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ stmfd sp!, {r9, lr, pc}
+ ldr r9, 1f
+ ldr r9, [r9]
+ ldr r9, [r9, #__GOTT_INDEX__]
+ ldr r0, 1f + 4
+ ldr r1, [r9, r0]
+ add r1, r1, #1
+ str r1, [r9, r0]
+ bl slocal(PLT)
+ bl sglobal(PLT)
+ bl sexternal(PLT)
+ ldmfd sp!, {r9, pc}
+1:
+ .word __GOTT_BASE__
+ .word x(got)
+ .size foo, .-foo
+
+ .type slocal, %function
+slocal:
+ mov pc,lr
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, %function
+sglobal:
+ mov pc,lr
+ .size sglobal, .-sglobal
+
+ .data
+ .4byte slocal
+
+ .comm x,4,4
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1-static.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1-static.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1-static.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,37 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: e52dc008 str ip, \[sp, #-8\]!
+ 80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+ 80808: e59cf008 ldr pc, \[ip, #8\]
+ 8080c: 00081400 andeq r1, r8, r0, lsl #8
+ 8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_
+ 80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+ 80814: e59cf000 ldr pc, \[ip\]
+ 80818: 0008140c andeq r1, r8, ip, lsl #8
+ 80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc
+ 8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <_PROCEDURE_LINKAGE_TABLE_\+0x24>
+ 80820: eafffff6 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80824: 00000000 andeq r0, r0, r0
+ 80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <_PROCEDURE_LINKAGE_TABLE_\+0x30>
+ 8082c: e59cf000 ldr pc, \[ip\]
+ 80830: 00081410 andeq r1, r8, r0, lsl r4
+ 80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10
+ 80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <_PROCEDURE_LINKAGE_TABLE_\+0x3c>
+ 80838: eafffff0 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 8083c: 0000000c andeq r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: ebffff08 bl 80428 <_PROCEDURE_LINKAGE_TABLE_-0x3d8>
+ 80c00: R_ARM_PC24 \.plt\+0x20
+ 80c04: eb000000 bl 80c14 <sexternal\+0x8>
+ 80c04: R_ARM_PC24 sexternal\+0xfffffff8
+ 80c08: eaffff00 b 80408 <_PROCEDURE_LINKAGE_TABLE_-0x3f8>
+ 80c08: R_ARM_PC24 \.plt\+0x8
+
+00080c0c <sexternal>:
+ 80c0c: e1a0f00e mov pc, lr
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,30 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rela.dyn : { *(.rela.dyn) }
+ .rela.plt : { *(.rela.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x1000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) *(.dynbss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+}
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,19 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008140c .*16 R_ARM_JUMP_SLOT 00080810 sglobal \+ 0
+00081410 .*16 R_ARM_JUMP_SLOT 00080828 foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym.Value Sym. Name \+ Addend
+00080c00 .*01 R_ARM_PC24 00080800 \.plt \+ 20
+00080c04 .*01 R_ARM_PC24 00080c0c sexternal \+ fffffff8
+00080c08 .*01 R_ARM_PC24 00080800 \.plt \+ 8
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008080c .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0
+00080818 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ c
+0008140c .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0
+00080830 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00081410 .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks1.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+ .text
+ .globl _start
+ .type _start, %function
+_start:
+ bl foo
+ bl sexternal
+ b sglobal
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, %function
+sexternal:
+ mov pc, lr
+ .size sexternal, .-sexternal
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks2-static.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks2-static.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks2-static.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5 @@
+ .globl _start
+ .type _start, %function
+_start:
+ mov pc, lr
+ .end _start
Added: branches/binutils/package/ld/testsuite/ld-arm/vxworks2.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-arm/vxworks2.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-arm/vxworks2.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+ LOAD .* 0x00081000 0x00081000 .* RW 0x1000
+ DYNAMIC .*
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-elf/orphan2.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-elf/orphan2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-elf/orphan2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+#source: orphan2.s
+#ld: -r
+#readelf: -S --wide
+
+#...
+ \[[ 0-9]+\] \.text[ \t]+PROGBITS[ \t0-9a-f]+AX?.*
+ \[[ 0-9]+\] \.modinfo[ \t]+PROGBITS[ \t0-9a-f]+A.*
+#pass
Added: branches/binutils/package/ld/testsuite/ld-elf/orphan2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-elf/orphan2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-elf/orphan2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+ .text
+ .long 0
+ .section .modinfo,"a","progbits"
+ .long 0
Added: branches/binutils/package/ld/testsuite/ld-elf/unknown2.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-elf/unknown2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-elf/unknown2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+#source: unknown2.s
+#ld: -shared
+#readelf: -S
+#target: *-*-linux*
+
+#...
+ \[[ 0-9]+\] \.note.foo[ \t]+NOTE[ \t]+.*
+#pass
Added: branches/binutils/package/ld/testsuite/ld-elf/unknown2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-elf/unknown2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-elf/unknown2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,6 @@
+ .section .note.foo,"a","note"
+ .space 16
+ .section .data,"aw"
+ .space 3800
+ .section .rodata,"a"
+ .space 4
Added: branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,8 @@
+
+Relocation section '\.rel\.plt' at offset .* contains 1 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+.* .*07 R_386_JUMP_SLOT 00000000 foo
+
+Relocation section '\.rel\.text' at offset .* contains 1 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+.* .*04 R_386_PLT32 00000000 foo
Added: branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/emit-relocs.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1 @@
+ call foo at plt
Modified: branches/binutils/package/ld/testsuite/ld-i386/i386.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/i386.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/i386.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
# Expect script for ld-i386 tests
-# Copyright (C) 2002 Free Software Foundation
+# Copyright (C) 2002, 2005, 2006 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -19,10 +19,39 @@
# Test i386 linking; all types of relocs. This tests the assembler and
# tools like objdump as well as the linker.
+if {[istarget "i?86-*-vxworks"]} {
+ set i386tests {
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $i386tests
+ run_dump_test "vxworks1-static"
+}
+
if { !([istarget "i?86-*-elf*"]
|| ([istarget "i?86-*-linux*"]
&& ![istarget "*-*-*aout*"]
- && ![istarget "*-*-*oldld*"])) } {
+ && ![istarget "*-*-*oldld*"])
+ || [istarget "x86_64-*-linux*"]
+ || [istarget "amd64-*-linux*"]) } {
return
}
@@ -41,6 +70,11 @@
{{readelf -Ssrl tlspic.rd} {objdump -drj.text tlspic.dd}
{objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}}
"libtlspic.so"}
+ {"TLS descriptor -fpic -shared transitions" "-shared -melf_i386"
+ "--32" {tlsdesc.s tlspic2.s}
+ {{readelf -Ssrl tlsdesc.rd} {objdump -drj.text tlsdesc.dd}
+ {objdump "-s -j.got -j.got.plt" tlsdesc.sd} {objdump -sj.tdata tlsdesc.td}}
+ "libtlsdesc.so"}
{"Helper shared library" "-shared -melf_i386"
"--32" {tlslib.s} {} "libtlslib.so"}
{"TLS -fpic and -fno-pic exec transitions"
@@ -48,10 +82,19 @@
{{readelf -Ssrl tlsbin.rd} {objdump -drj.text tlsbin.dd}
{objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}}
"tlsbin"}
+ {"TLS descriptor -fpic and -fno-pic exec transitions"
+ "-melf_i386 tmpdir/libtlslib.so" "--32" {tlsbindesc.s tlsbin.s}
+ {{readelf -Ssrl tlsbindesc.rd} {objdump -drj.text tlsbindesc.dd}
+ {objdump -sj.got tlsbindesc.sd} {objdump -sj.tdata tlsbindesc.td}}
+ "tlsbindesc"}
{"TLS -fno-pic -shared" "-shared -melf_i386"
"--32" {tlsnopic1.s tlsnopic2.s}
{{readelf -Ssrl tlsnopic.rd} {objdump -drj.text tlsnopic.dd}
{objdump -sj.got tlsnopic.sd}} "libtlsnopic.so"}
+ {"TLS with global dynamic and descriptors"
+ "-shared -melf_i386" "--32" {tlsgdesc.s}
+ {{readelf -Ssrl tlsgdesc.rd} {objdump -drj.text tlsgdesc.dd}}
+ "libtlsgdesc.so"}
{"TLS in debug sections" "-melf_i386"
"--32" {tlsg.s}
{{objdump -sj.debug_foobar tlsg.sd}} "tlsg"}
@@ -59,6 +102,8 @@
{{objdump -drj.text tlsindntpoff.dd}} "tlsindntpoff"}
{"Reloc section order" "-shared -melf_i386 -z nocombreloc" "--32"
{reloc.s} {{objdump -hw reloc.d}} "reloc.so"}
+ {"Basic --emit-relocs support" "-shared -melf_i386 --emit-relocs" "--32"
+ {emit-relocs.s} {{readelf --relocs emit-relocs.d}} "emit-relocs.so"}
{"-z combreloc relocation sections" "-shared -melf_i386 -z combreloc"
"--32" {combreloc.s} {{readelf -r combreloc.d}} "combreloc.so"}
}
Modified: branches/binutils/package/ld/testsuite/ld-i386/pcrel16.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/pcrel16.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/pcrel16.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
#name: PCREL16 overflow
-#ld: -Ttext 0x0
+#as: --32
+#ld: -melf_i386 -Ttext 0x0
#objdump: -drj.text -m i8086
.*: +file format elf32-i386
Modified: branches/binutils/package/ld/testsuite/ld-i386/pcrel8.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/pcrel8.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/pcrel8.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,4 @@
#name: PCREL8 overflow
-#ld:
+#as: --32
+#ld: -melf_i386
#error: .*relocation truncated to fit: R_386_PC8 .*
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,463 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --32
+#ld: -melf_i386 tmpdir/libtlslib.so
+#objdump: -drj.text
+#target: i?86-*-*
+
+# PT_TLS layout is:
+# Offset from Offset from Name
+# TCB base TCB end
+# 0x00 -0xa0 sg1..sg8
+# 0x20 -0x80 sl1..sl8
+# 0x40 -0x60 sh1..sh8
+# 0x60 -0x40 bg1..bg8
+# 0x80 -0x20 bl1..bl8
+
+.*: +file format elf32-i386
+
+Disassembly of section .text:
+
+[0-9a-f]+ <fn2>:
+ [0-9a-f]+: 55[ ]+push %ebp
+ [0-9a-f]+: 89 e5[ ]+mov %esp,%ebp
+ [0-9a-f]+: 53[ ]+push %ebx
+ [0-9a-f]+: 50[ ]+push %eax
+ [0-9a-f]+: e8 00 00 00 00[ ]+call [0-9a-f]+ <fn2\+0xa>
+ [0-9a-f]+: 5b[ ]+pop %ebx
+ [0-9a-f]+: 81 c3 fa 10 00 00[ ]+add \$0x10fa,%ebx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is not defined in executable
+ [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov 0xfffffff8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG1
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is not defined in executable where
+# the variable is referenced through @gottpoff too
+ [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov 0xffffffe8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG2
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is not defined in executable where
+# the variable is referenced through @gotntpoff too
+ [0-9a-f]+: 8b 83 dc ff ff ff[ ]+mov 0xffffffdc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is not defined in executable where
+# the variable is referenced through @gottpoff and @gotntpoff too
+ [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with global variable defined in executable
+ [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax
+# sg1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with local variable defined in executable
+ [0-9a-f]+: 8d 05 20 f0 ff ff[ ]+lea 0xfffff020,%eax
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with hidden variable defined in executable
+ [0-9a-f]+: 8d 05 40 f0 ff ff[ ]+lea 0xfffff040,%eax
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD -> LE
+ [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 90 20 f0 ff ff[ ]+lea 0xfffff020\(%eax\),%edx
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 88 24 f0 ff ff[ ]+lea 0xfffff024\(%eax\),%ecx
+# sl2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD -> LE against hidden variables
+ [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 90 40 f0 ff ff[ ]+lea 0xfffff040\(%eax\),%edx
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 88 44 f0 ff ff[ ]+lea 0xfffff044\(%eax\),%ecx
+# sh2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b e8 ff ff ff[ ]+sub 0xffffffe8\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 sG2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 83 ec ff ff ff[ ]+sub 0xffffffec\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b dc ff ff ff[ ]+add 0xffffffdc\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sG3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE -> LE against global var defined in exec
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 e9 00 10 00 00[ ]+sub \$0x1000,%ecx
+# sg1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE -> LE against local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 c0 20 f0 ff ff[ ]+add \$0xfffff020,%eax
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE -> LE against hidden var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 e9 c0 0f 00 00[ ]+sub \$0xfc0,%ecx
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# Direct access through %gs
+# @gotntpoff IE against global var
+ [0-9a-f]+: 8b 8b e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sG5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 11[ ]+mov %gs:\(%ecx\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE->LE against local var
+ [0-9a-f]+: c7 c0 30 f0 ff ff[ ]+mov \$0xfffff030,%eax
+# sl5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 10[ ]+mov %gs:\(%eax\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE->LE against hidden var
+ [0-9a-f]+: c7 c2 50 f0 ff ff[ ]+mov \$0xfffff050,%edx
+# sh5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 12[ ]+mov %gs:\(%edx\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx
+ [0-9a-f]+: c9[ ]+leave *
+ [0-9a-f]+: c3[ ]+ret *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+
+[0-9a-f]+ <_start>:
+ [0-9a-f]+: 55[ ]+push %ebp
+ [0-9a-f]+: 89 e5[ ]+mov %esp,%ebp
+ [0-9a-f]+: e8 00 00 00 00[ ]+call [0-9a-f]+ <_start\+0x8>
+ [0-9a-f]+: 59[ ]+pop %ecx
+ [0-9a-f]+: 81 c1 a4 0f 00 00[ ]+add \$0xfa4,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 91 f4 ff ff ff[ ]+sub 0xfffffff4\(%ecx\),%edx
+# ->R_386_TLS_TPOFF32 sG6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff IE against global var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 05 e8 a0 04 08[ ]+add 0x804a0e8,%eax
+# ->R_386_TLS_TPOFF sG7
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff direct %gs access IE against global var
+ [0-9a-f]+: 8b 15 00 a1 04 08[ ]+mov 0x804a100,%edx
+# ->R_386_TLS_TPOFF sG8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 02[ ]+mov %gs:\(%edx\),%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE -> LE against global var defined in exec
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 ea 8c 0f 00 00[ ]+sub \$0xf8c,%edx
+# bg6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff IE -> LE against global var defined in exec
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 c0 78 f0 ff ff[ ]+add \$0xfffff078,%eax
+# bg7
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff direct %gs access IE -> LE against global var defined
+# in exec
+ [0-9a-f]+: c7 c2 7c f0 ff ff[ ]+mov \$0xfffff07c,%edx
+# bg8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 02[ ]+mov %gs:\(%edx\),%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE -> LE against local var
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 ea 6c 0f 00 00[ ]+sub \$0xf6c,%edx
+# bl6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff IE -> LE against local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 c0 98 f0 ff ff[ ]+add \$0xfffff098,%eax
+# bl7
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff direct %gs access IE -> LE against local var
+ [0-9a-f]+: c7 c2 9c f0 ff ff[ ]+mov \$0xfffff09c,%edx
+# bl8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 02[ ]+mov %gs:\(%edx\),%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE -> LE against hidden but not local var
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 ea ac 0f 00 00[ ]+sub \$0xfac,%edx
+# sh6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff IE -> LE against hidden but not local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 c0 58 f0 ff ff[ ]+add \$0xfffff058,%eax
+# sh7
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @indntpoff direct %gs access IE -> LE against hidden but not
+# local var
+ [0-9a-f]+: c7 c2 5c f0 ff ff[ ]+mov \$0xfffff05c,%edx
+# sh8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 02[ ]+mov %gs:\(%edx\),%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @tpoff, global var defined in exec
+ [0-9a-f]+: ba 00 10 00 00[ ]+mov \$0x1000,%edx
+# sg1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 29 d0[ ]+sub %edx,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @tpoff, local var
+ [0-9a-f]+: b8 7f 0f 00 00[ ]+mov \$0xf7f,%eax
+# bl1+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 29 c2[ ]+sub %eax,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @tpoff, hidden var defined in exec
+ [0-9a-f]+: b8 bd 0f 00 00[ ]+mov \$0xfbd,%eax
+# sh1+3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 29 c2[ ]+sub %eax,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, global var defined in exec
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 90 04 f0 ff ff[ ]+lea 0xfffff004\(%eax\),%edx
+# sg2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, local var, non-canonical sequence
+ [0-9a-f]+: b8 86 f0 ff ff[ ]+mov \$0xfffff086,%eax
+# bl2+2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 01 c2[ ]+add %eax,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, hidden var defined in exec, non-canonical sequence
+ [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 81 c2 45 f0 ff ff[ ]+add \$0xfffff045,%edx
+# sh2+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, global var defined in exec
+ [0-9a-f]+: 65 a1 08 f0 ff ff[ ]+mov %gs:0xfffff008,%eax
+# sg3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, local var
+ [0-9a-f]+: 65 8b 15 8b f0 ff ff[ ]+mov %gs:0xfffff08b,%edx
+# bl3+3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE @ntpoff, hidden var defined in exec
+ [0-9a-f]+: 65 8b 15 49 f0 ff ff[ ]+mov %gs:0xfffff049,%edx
+# sh3+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx
+ [0-9a-f]+: c9[ ]+leave *
+ [0-9a-f]+: c3[ ]+ret *
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,154 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --32
+#ld: -melf_i386 tmpdir/libtlslib.so
+#readelf: -Ssrl
+#target: i?86-*-*
+
+There are 15 section headers, starting at offset 0x[0-9a-f]+:
+
+Section Headers:
+ \[Nr\] Name +Type +Addr +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 0+ +0 +0 +0
+ \[ 1\] \.interp +.*
+ \[ 2\] \.hash +.*
+ \[ 3\] \.dynsym +.*
+ \[ 4\] \.dynstr +.*
+ \[ 5\] \.rel.dyn +.*
+ \[ 6\] \.text +PROGBITS +0+8049000 .*
+ \[ 7\] \.tdata +PROGBITS +0+804a000 [0-9a-f]+ 000060 00 WAT 0 0 4096
+ \[ 8\] \.tbss +NOBITS +[0-9a-f]+ [0-9a-f]+ 000040 00 WAT 0 0 1
+ \[ 9\] \.dynamic +DYNAMIC +0+804a060 .*
+ \[10\] \.got +PROGBITS +0+804a0e0 .*
+ \[11\] \.got\.plt +PROGBITS +0+804a104 .*
+ \[12\] \.shstrtab +.*
+ \[13\] \.symtab +.*
+ \[14\] \.strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x8049158
+There are 6 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ PHDR.*
+ INTERP.*
+.*Requesting program interpreter.*
+ LOAD.*
+ LOAD.*
+ DYNAMIC.*
+ TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+a0 R +0x1000
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 +
+ 01 +.interp *
+ 02 +.interp .hash .dynsym .dynstr .rel.dyn .text *
+ 03 +.tdata .dynamic .got .got.plt *
+ 04 +.dynamic *
+ 05 +.tdata .tbss *
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 9 entries:
+ Offset +Info +Type +Sym.Value +Sym. Name
+0+804a0e0 0000010e R_386_TLS_TPOFF +0+ +sG3
+0+804a0e4 0000020e R_386_TLS_TPOFF +0+ +sG5
+0+804a0e8 0000030e R_386_TLS_TPOFF +0+ +sG7
+0+804a0ec 00000425 R_386_TLS_TPOFF32 0+ +sG2
+0+804a0f0 00000525 R_386_TLS_TPOFF32 0+ +sG4
+0+804a0f4 0000050e R_386_TLS_TPOFF +0+ +sG4
+0+804a0f8 00000725 R_386_TLS_TPOFF32 0+ +sG6
+0+804a0fc 00000825 R_386_TLS_TPOFF32 0+ +sG1
+0+804a100 00000b0e R_386_TLS_TPOFF +0+ +sG8
+
+Symbol table '.dynsym' contains 12 entries:
+ +Num: +Value Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG7
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG8
+
+Symbol table '.symtab' contains 71 entries:
+ +Num: +Value Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 *
+ +[0-9]+: 00000020 +0 TLS +LOCAL DEFAULT +7 sl1
+ +[0-9]+: 00000024 +0 TLS +LOCAL DEFAULT +7 sl2
+ +[0-9]+: 00000028 +0 TLS +LOCAL DEFAULT +7 sl3
+ +[0-9]+: 0000002c +0 TLS +LOCAL DEFAULT +7 sl4
+ +[0-9]+: 00000030 +0 TLS +LOCAL DEFAULT +7 sl5
+ +[0-9]+: 00000034 +0 TLS +LOCAL DEFAULT +7 sl6
+ +[0-9]+: 00000038 +0 TLS +LOCAL DEFAULT +7 sl7
+ +[0-9]+: 0000003c +0 TLS +LOCAL DEFAULT +7 sl8
+ +[0-9]+: 00000080 +0 TLS +LOCAL DEFAULT +8 bl1
+ +[0-9]+: 00000084 +0 TLS +LOCAL DEFAULT +8 bl2
+ +[0-9]+: 00000088 +0 TLS +LOCAL DEFAULT +8 bl3
+ +[0-9]+: 0000008c +0 TLS +LOCAL DEFAULT +8 bl4
+ +[0-9]+: 00000090 +0 TLS +LOCAL DEFAULT +8 bl5
+ +[0-9]+: 00000094 +0 TLS +LOCAL DEFAULT +8 bl6
+ +[0-9]+: 00000098 +0 TLS +LOCAL DEFAULT +8 bl7
+ +[0-9]+: 0000009c +0 TLS +LOCAL DEFAULT +8 bl8
+ +[0-9]+: 00000000 +0 TLS +LOCAL HIDDEN +7 _TLS_MODULE_BASE_
+ +[0-9]+: 0+804a060 +0 OBJECT LOCAL HIDDEN 9 _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN 11 _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0000001c +0 TLS +GLOBAL DEFAULT +7 sg8
+ +[0-9]+: 0000007c +0 TLS +GLOBAL DEFAULT +8 bg8
+ +[0-9]+: 00000074 +0 TLS +GLOBAL DEFAULT +8 bg6
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 00000068 +0 TLS +GLOBAL DEFAULT +8 bg3
+ +[0-9]+: 00000008 +0 TLS +GLOBAL DEFAULT +7 sg3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG7
+ +[0-9]+: 00000048 +0 TLS +GLOBAL HIDDEN +7 sh3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0000000c +0 TLS +GLOBAL DEFAULT +7 sg4
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: 00000010 +0 TLS +GLOBAL DEFAULT +7 sg5
+ +[0-9]+: 00000070 +0 TLS +GLOBAL DEFAULT +8 bg5
+ +[0-9]+: 00000058 +0 TLS +GLOBAL HIDDEN +7 sh7
+ +[0-9]+: 0000005c +0 TLS +GLOBAL HIDDEN +7 sh8
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +7 sg1
+ +[0-9]+: 0+8049158 +0 FUNC +GLOBAL DEFAULT +6 _start
+ +[0-9]+: 0000004c +0 TLS +GLOBAL HIDDEN +7 sh4
+ +[0-9]+: 00000078 +0 TLS +GLOBAL DEFAULT +8 bg7
+ +[0-9]+: 00000050 +0 TLS +GLOBAL HIDDEN +7 sh5
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: 0+8049000 +0 FUNC +GLOBAL DEFAULT +6 fn2
+ +[0-9]+: 00000004 +0 TLS +GLOBAL DEFAULT +7 sg2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: 00000040 +0 TLS +GLOBAL HIDDEN +7 sh1
+ +[0-9]+: 00000014 +0 TLS +GLOBAL DEFAULT +7 sg6
+ +[0-9]+: 00000018 +0 TLS +GLOBAL DEFAULT +7 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+ +[0-9]+: 00000044 +0 TLS +GLOBAL HIDDEN +7 sh2
+ +[0-9]+: 00000054 +0 TLS +GLOBAL HIDDEN +7 sh6
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG8
+ +[0-9]+: 00000064 +0 TLS +GLOBAL DEFAULT +8 bg2
+ +[0-9]+: 00000060 +0 TLS +GLOBAL DEFAULT +8 bg1
+ +[0-9]+: 0000006c +0 TLS +GLOBAL DEFAULT +8 bg4
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,167 @@
+ /* Force .got aligned to 4K, so it very likely gets at 0x804a100
+ (0x60 bytes .tdata and 0xa0 bytes .dynamic) */
+ .section ".tdata", "awT", @progbits
+ .balign 4096
+ .globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
+ .globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+ .hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+sg1: .long 17
+sg2: .long 18
+sg3: .long 19
+sg4: .long 20
+sg5: .long 21
+sg6: .long 22
+sg7: .long 23
+sg8: .long 24
+sl1: .long 65
+sl2: .long 66
+sl3: .long 67
+sl4: .long 68
+sl5: .long 69
+sl6: .long 70
+sl7: .long 71
+sl8: .long 72
+sh1: .long 257
+sh2: .long 258
+sh3: .long 259
+sh4: .long 260
+sh5: .long 261
+sh6: .long 262
+sh7: .long 263
+sh8: .long 264
+ /* Force .text aligned to 4K, so it very likely gets at 0x8049000. */
+ .text
+ .balign 4096
+ .globl fn2
+ .type fn2, at function
+fn2:
+ pushl %ebp
+ movl %esp, %ebp
+ pushl %ebx
+ pushl %eax
+ call 1f
+1: popl %ebx
+ addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is not defined in executable */
+ leal sG1 at tlsdesc(%ebx), %eax
+ call *sG1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is not defined in executable where
+ the variable is referenced through @gottpoff too */
+ leal sG2 at tlsdesc(%ebx), %eax
+ call *sG2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is not defined in executable where
+ the variable is referenced through @gotntpoff too */
+ leal sG3 at tlsdesc(%ebx), %eax
+ call *sG3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is not defined in executable where
+ the variable is referenced through @gottpoff and @gotntpoff too */
+ leal sG4 at tlsdesc(%ebx), %eax
+ call *sG4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with global variable defined in executable */
+ leal sg1 at tlsdesc(%ebx), %eax
+ call *sg1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with local variable defined in executable */
+ leal sl1 at tlsdesc(%ebx), %eax
+ call *sl1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with hidden variable defined in executable */
+ leal sh1 at tlsdesc(%ebx), %eax
+ call *sh1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* LD -> LE */
+ leal _TLS_MODULE_BASE_ at tlsdesc(%ebx), %eax
+ call *_TLS_MODULE_BASE_ at tlscall(%eax)
+ nop;nop
+ leal sl1 at dtpoff(%eax), %edx
+ nop;nop
+ leal sl2 at dtpoff(%eax), %ecx
+ nop;nop;nop;nop
+
+ /* LD -> LE against hidden variables */
+ leal _TLS_MODULE_BASE_ at tlsdesc(%ebx), %eax
+ call *_TLS_MODULE_BASE_ at tlscall(%eax)
+ nop;nop
+ leal sh1 at dtpoff(%eax), %edx
+ nop;nop
+ leal sh2 at dtpoff(%eax), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sG2 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %eax
+ nop;nop
+ subl sG4 at gottpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sG3 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %eax
+ nop;nop
+ addl sG4 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gottpoff IE -> LE against global var defined in exec */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sg1 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE -> LE against local var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sl1 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gottpoff IE -> LE against hidden var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sh1 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* Direct access through %gs */
+
+ /* @gotntpoff IE against global var */
+ movl sG5 at gotntpoff(%ebx), %ecx
+ nop;nop
+ movl %gs:(%ecx), %edx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE->LE against local var */
+ movl sl5 at gotntpoff(%ebx), %eax
+ nop;nop
+ movl %gs:(%eax), %edx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE->LE against hidden var */
+ movl sh5 at gotntpoff(%ebx), %edx
+ nop;nop
+ movl %gs:(%edx), %edx
+ nop;nop;nop;nop
+
+ movl -4(%ebp), %ebx
+ leave
+ ret
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --32
+#ld: -melf_i386 tmpdir/libtlslib.so
+#objdump: -sj.got
+#target: i?86-*-*
+
+.*: file format elf32-i386
+
+Contents of section \.got:
+ 804a0e0 [0-9a-f]+ 00000000 00000000 [0-9a-f]+ .*
+ 804a0f0 00000000 00000000 00000000 00000000 .*
+ 804a100 00000000 +.*
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.td
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.td 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsbindesc.td 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --32
+#ld: -melf_i386 tmpdir/libtlslib.so
+#objdump: -sj.tdata
+#target: i?86-*-*
+
+.*: file format elf32-i386
+
+Contents of section \.tdata:
+ 804a000 11000000 12000000 13000000 14000000 .*
+ 804a010 15000000 16000000 17000000 18000000 .*
+ 804a020 41000000 42000000 43000000 44000000 .*
+ 804a030 45000000 46000000 47000000 48000000 .*
+ 804a040 01010000 02010000 03010000 04010000 .*
+ 804a050 05010000 06010000 07010000 08010000 .*
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,399 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --32
+#ld: -shared -melf_i386
+#objdump: -drj.text
+#target: i?86-*-*
+
+.*: +file format elf32-i386
+
+Disassembly of section .text:
+
+[0-9a-f]+ <fn1>:
+ [0-9a-f]+: 55[ ]+push %ebp
+ [0-9a-f]+: 89 e5[ ]+mov %esp,%ebp
+ [0-9a-f]+: 53[ ]+push %ebx
+ [0-9a-f]+: 50[ ]+push %eax
+ [0-9a-f]+: e8 00 00 00 00[ ]+call [0-9a-f]+ <fn1\+0xa>
+ [0-9a-f]+: 5b[ ]+pop %ebx
+ [0-9a-f]+: 81 c3 9a 13 00 00[ ]+add \$0x[0-9a-f]+,%ebx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GDesc
+ [0-9a-f]+: 8d 83 24 00 00 00[ ]+lea 0x24\(%ebx\),%eax
+# ->R_386_TLS_DESC sg1
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gottpoff too
+ [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov 0xfffffff8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sg2
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gotntpoff too
+ [0-9a-f]+: 8b 83 c4 ff ff ff[ ]+mov 0xffffffc4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sg3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gottpoff and
+ [0-9a-f]+: 8b 83 d4 ff ff ff[ ]+mov 0xffffffd4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sg4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD against local variable
+ [0-9a-f]+: 8d 83 0c 00 00 00[ ]+lea 0xc\(%ebx\),%eax
+# ->R_386_TLS_DESC sl1
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against local variable referenced through @gottpoff too
+ [0-9a-f]+: 8b 83 b0 ff ff ff[ ]+mov 0xffffffb0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sl2
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against local variable referenced through @gotntpoff
+ [0-9a-f]+: 8b 83 b4 ff ff ff[ ]+mov 0xffffffb4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sl3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against local variable referenced through @gottpoff and
+ [0-9a-f]+: 8b 83 bc ff ff ff[ ]+mov 0xffffffbc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sl4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD against hidden and local variable
+ [0-9a-f]+: 8d 83 2c 00 00 00[ ]+lea 0x2c\(%ebx\),%eax
+# ->R_386_TLS_DESC sh1
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden and local variable referenced through @gottpoff too
+ [0-9a-f]+: 8b 83 fc ff ff ff[ ]+mov 0xfffffffc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sh2
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden and local variable referenced through @gotntpoff too
+ [0-9a-f]+: 8b 83 c8 ff ff ff[ ]+mov 0xffffffc8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sh3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden and local variable referenced through @gottpoff and @gotntpoff too
+ [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov 0xffffffe8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sh4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD against hidden but not local variable
+ [0-9a-f]+: 8d 83 14 00 00 00[ ]+lea 0x14\(%ebx\),%eax
+# ->R_386_TLS_DESC sH1
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden but not local variable referenced through
+ [0-9a-f]+: 8b 83 cc ff ff ff[ ]+mov 0xffffffcc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sH2
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden but not local variable referenced through
+ [0-9a-f]+: 8b 83 ec ff ff ff[ ]+mov 0xffffffec\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sH3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden but not local variable referenced through
+ [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sH4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD
+ [0-9a-f]+: 8d 83 1c 00 00 00[ ]+lea 0x1c\(%ebx\),%eax
+# ->R_386_TLS_DESC _TLS_MODULE_BASE_
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 90 20 00 00 00[ ]+lea 0x20\(%eax\),%edx
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 88 26 00 00 00[ ]+lea 0x26\(%eax\),%ecx
+# sl2+2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD against hidden and local variables
+ [0-9a-f]+: 8d 90 40 00 00 00[ ]+lea 0x40\(%eax\),%edx
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 88 47 00 00 00[ ]+lea 0x47\(%eax\),%ecx
+# sh2+3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD against hidden but not local variables
+ [0-9a-f]+: 8d 90 60 00 00 00[ ]+lea 0x60\(%eax\),%edx
+# sH1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 88 65 00 00 00[ ]+lea 0x65\(%eax\),%ecx
+# sH2+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b f8 ff ff ff[ ]+sub 0xfffffff8\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 sg2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 83 d0 ff ff ff[ ]+sub 0xffffffd0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sg4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b c4 ff ff ff[ ]+add 0xffffffc4\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sg3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 83 d4 ff ff ff[ ]+add 0xffffffd4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sg4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b b0 ff ff ff[ ]+sub 0xffffffb0\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 [0xdcffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 83 b8 ff ff ff[ ]+sub 0xffffffb8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 [0xd4ffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b b4 ff ff ff[ ]+add 0xffffffb4\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF [0x28000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 83 bc ff ff ff[ ]+add 0xffffffbc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF [0x2c000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against hidden and local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b fc ff ff ff[ ]+sub 0xfffffffc\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 [0xbcffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against hidden and local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 83 e4 ff ff ff[ ]+sub 0xffffffe4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 [0xb4ffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden and local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b c8 ff ff ff[ ]+add 0xffffffc8\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF [0x48000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden and local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 83 e8 ff ff ff[ ]+add 0xffffffe8\(%ebx\),%eax
+# ->R_386_TLS_TPOFF [0x4c000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against hidden but not local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b cc ff ff ff[ ]+sub 0xffffffcc\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 [0x9cffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against hidden but not local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub 0xffffffdc\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 [0x94ffffff]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden but not local var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b ec ff ff ff[ ]+add 0xffffffec\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF [0x68000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden but not local var
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 83 e0 ff ff ff[ ]+add 0xffffffe0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF [0x6c000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# Direct access through %gs
+# @gotntpoff IE against global var
+ [0-9a-f]+: 8b 8b d8 ff ff ff[ ]+mov 0xffffffd8\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sg5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 11[ ]+mov %gs:\(%ecx\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against local var
+ [0-9a-f]+: 8b 83 c0 ff ff ff[ ]+mov 0xffffffc0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF [0x30000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 10[ ]+mov %gs:\(%eax\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden and local var
+ [0-9a-f]+: 8b 93 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%edx
+# ->R_386_TLS_TPOFF [0x50000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 12[ ]+mov %gs:\(%edx\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against hidden but not local var
+ [0-9a-f]+: 8b 8b f4 ff ff ff[ ]+mov 0xfffffff4\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF [0x70000000]
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 8b 11[ ]+mov %gs:\(%ecx\),%edx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx
+ [0-9a-f]+: c9[ ]+leave *
+ [0-9a-f]+: c3[ ]+ret *
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,155 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --32
+#ld: -shared -melf_i386
+#readelf: -Ssrl
+#target: i?86-*-*
+
+There are [0-9]+ section headers, starting at offset 0x.*:
+
+Section Headers:
+ \[Nr\] Name +Type +Addr +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 0+ +0 +0 +0
+ \[ 1\] \.hash +.*
+ \[ 2\] \.dynsym +.*
+ \[ 3\] \.dynstr +.*
+ \[ 4\] \.rel.dyn +.*
+ \[ 5\] \.rel.plt +.*
+ \[ 6\] \.text +.*
+ \[ 7\] \.tdata +PROGBITS +[0-9a-f]+ [0-9a-f]+ 000060 00 WAT 0 0 1
+ \[ 8\] \.tbss +NOBITS +[0-9aa-f]+ [0-9a-f]+ 000020 00 WAT 0 0 1
+ \[ 9\] \.dynamic +.*
+ \[10\] \.got +.*
+ \[11\] \.got.plt +.*
+ \[12\] \.shstrtab +.*
+ \[13\] \.symtab +.*
+ \[14\] \.strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is DYN \(Shared object file\)
+Entry point 0x[0-9a-f]+
+There are [0-9]+ program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ LOAD.*
+ LOAD.*
+ DYNAMIC.*
+ TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+80 R +0x1
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 +.hash .dynsym .dynstr .rel.dyn .rel.plt .text *
+ 01 +.tdata .dynamic .got .got.plt *
+ 02 +.dynamic *
+ 03 +.tdata .tbss *
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 20 entries:
+ Offset +Info +Type +Sym.Value +Sym. Name
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+0e R_386_TLS_TPOFF *
+[0-9a-f]+ +0+25 R_386_TLS_TPOFF32
+[0-9a-f]+ +0+50e R_386_TLS_TPOFF 0+8 sg3
+[0-9a-f]+ +0+625 R_386_TLS_TPOFF32 0+c sg4
+[0-9a-f]+ +0+60e R_386_TLS_TPOFF 0+c sg4
+[0-9a-f]+ +0+70e R_386_TLS_TPOFF 0+10 sg5
+[0-9a-f]+ +0+b25 R_386_TLS_TPOFF32 0+4 sg2
+
+Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 5 entries:
+ Offset Info Type Sym.Value Sym. Name
+[0-9a-f]+ +0+829 R_386_TLS_DESC * 0+ sg1
+[0-9a-f]+ +0+29 R_386_TLS_DESC *
+[0-9a-f]+ +0+29 R_386_TLS_DESC *
+[0-9a-f]+ +0+29 R_386_TLS_DESC *
+[0-9a-f]+ +0+29 R_386_TLS_DESC *
+
+Symbol table '.dynsym' contains 16 entries:
+ +Num: + Value Size Type + Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +7 sg8
+ +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +7 sg3
+ +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +7 sg4
+ +[0-9]+: 0+10 +0 TLS +GLOBAL DEFAULT +7 sg5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +7 sg1
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +6 fn1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+4 +0 TLS +GLOBAL DEFAULT +7 sg2
+ +[0-9]+: 0+14 +0 TLS +GLOBAL DEFAULT +7 sg6
+ +[0-9]+: 0+18 +0 TLS +GLOBAL DEFAULT +7 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+
+Symbol table '.symtab' contains 54 entries:
+ +Num: +Value Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 *
+ +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +7 sl1
+ +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +7 sl2
+ +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +7 sl3
+ +[0-9]+: 0+2c +0 TLS +LOCAL DEFAULT +7 sl4
+ +[0-9]+: 0+30 +0 TLS +LOCAL DEFAULT +7 sl5
+ +[0-9]+: 0+34 +0 TLS +LOCAL DEFAULT +7 sl6
+ +[0-9]+: 0+38 +0 TLS +LOCAL DEFAULT +7 sl7
+ +[0-9]+: 0+3c +0 TLS +LOCAL DEFAULT +7 sl8
+ +[0-9]+: 0+60 +0 TLS +LOCAL HIDDEN +8 sH1
+ +[0-9]+: 0+ +0 TLS +LOCAL HIDDEN +7 _TLS_MODULE_BASE_
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC
+ +[0-9]+: 0+48 +0 TLS +LOCAL HIDDEN +7 sh3
+ +[0-9]+: 0+64 +0 TLS +LOCAL HIDDEN +8 sH2
+ +[0-9]+: 0+78 +0 TLS +LOCAL HIDDEN +8 sH7
+ +[0-9]+: 0+58 +0 TLS +LOCAL HIDDEN +7 sh7
+ +[0-9]+: 0+5c +0 TLS +LOCAL HIDDEN +7 sh8
+ +[0-9]+: 0+6c +0 TLS +LOCAL HIDDEN +8 sH4
+ +[0-9]+: 0+4c +0 TLS +LOCAL HIDDEN +7 sh4
+ +[0-9]+: 0+68 +0 TLS +LOCAL HIDDEN +8 sH3
+ +[0-9]+: 0+50 +0 TLS +LOCAL HIDDEN +7 sh5
+ +[0-9]+: 0+70 +0 TLS +LOCAL HIDDEN +8 sH5
+ +[0-9]+: 0+74 +0 TLS +LOCAL HIDDEN +8 sH6
+ +[0-9]+: 0+7c +0 TLS +LOCAL HIDDEN +8 sH8
+ +[0-9]+: 0+40 +0 TLS +LOCAL HIDDEN +7 sh1
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+44 +0 TLS +LOCAL HIDDEN +7 sh2
+ +[0-9]+: 0+54 +0 TLS +LOCAL HIDDEN +7 sh6
+ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +7 sg8
+ +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +7 sg3
+ +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +7 sg4
+ +[0-9]+: 0+10 +0 TLS +GLOBAL DEFAULT +7 sg5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +7 sg1
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +6 fn1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+4 +0 TLS +GLOBAL DEFAULT +7 sg2
+ +[0-9]+: 0+14 +0 TLS +GLOBAL DEFAULT +7 sg6
+ +[0-9]+: 0+18 +0 TLS +GLOBAL DEFAULT +7 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,276 @@
+ .section ".tdata", "awT", @progbits
+ .globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
+ .globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+ .hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+sg1: .long 17
+sg2: .long 18
+sg3: .long 19
+sg4: .long 20
+sg5: .long 21
+sg6: .long 22
+sg7: .long 23
+sg8: .long 24
+sl1: .long 65
+sl2: .long 66
+sl3: .long 67
+sl4: .long 68
+sl5: .long 69
+sl6: .long 70
+sl7: .long 71
+sl8: .long 72
+sh1: .long 257
+sh2: .long 258
+sh3: .long 259
+sh4: .long 260
+sh5: .long 261
+sh6: .long 262
+sh7: .long 263
+sh8: .long 264
+ .text
+ .globl fn1
+ .type fn1, at function
+fn1:
+ pushl %ebp
+ movl %esp, %ebp
+ pushl %ebx
+ pushl %eax
+ call 1f
+1: popl %ebx
+ addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
+ nop;nop;nop;nop
+
+ /* GD */
+ leal sg1 at tlsdesc(%ebx), %eax
+ call *sg1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is referenced through @gottpoff too */
+ leal sg2 at tlsdesc(%ebx), %eax
+ call *sg2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is referenced through @gotntpoff too */
+ leal sg3 at tlsdesc(%ebx), %eax
+ call *sg3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is referenced through @gottpoff and
+ @gotntpoff too */
+ leal sg4 at tlsdesc(%ebx), %eax
+ call *sg4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD against local variable */
+ leal sl1 at tlsdesc(%ebx), %eax
+ call *sl1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against local variable referenced through @gottpoff too */
+ leal sl2 at tlsdesc(%ebx), %eax
+ call *sl2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against local variable referenced through @gotntpoff
+ too */
+ leal sl3 at tlsdesc(%ebx), %eax
+ call *sl3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against local variable referenced through @gottpoff and
+ @gotntpoff too */
+ leal sl4 at tlsdesc(%ebx), %eax
+ call *sl4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD against hidden and local variable */
+ leal sh1 at tlsdesc(%ebx), %eax
+ call *sh1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden and local variable referenced through
+ @gottpoff too */
+ leal sh2 at tlsdesc(%ebx), %eax
+ call *sh2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden and local variable referenced through
+ @gotntpoff too */
+ leal sh3 at tlsdesc(%ebx), %eax
+ call *sh3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden and local variable referenced through
+ @gottpoff and @gotntpoff too */
+ leal sh4 at tlsdesc(%ebx), %eax
+ call *sh4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD against hidden but not local variable */
+ leal sH1 at tlsdesc(%ebx), %eax
+ call *sH1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden but not local variable referenced through
+ @gottpoff too */
+ leal sH2 at tlsdesc(%ebx), %eax
+ call *sH2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden but not local variable referenced through
+ @gotntpoff too */
+ leal sH3 at tlsdesc(%ebx), %eax
+ call *sH3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden but not local variable referenced through
+ @gottpoff and @gotntpoff too */
+ leal sH4 at tlsdesc(%ebx), %eax
+ call *sH4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* LD */
+ leal _TLS_MODULE_BASE_ at tlsdesc(%ebx), %eax
+ call *_TLS_MODULE_BASE_ at tlscall(%eax)
+ nop;nop
+ leal sl1 at dtpoff(%eax), %edx
+ nop;nop
+ leal 2+sl2 at dtpoff(%eax), %ecx
+ nop;nop;nop;nop
+
+ /* LD against hidden and local variables */
+ leal sh1 at dtpoff(%eax), %edx
+ nop;nop
+ leal sh2 at dtpoff+3(%eax), %ecx
+ nop;nop;nop;nop
+
+ /* LD against hidden but not local variables */
+ leal sH1 at dtpoff(%eax), %edx
+ nop;nop
+ leal sH2 at dtpoff+1(%eax), %ecx
+ nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sg2 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %eax
+ nop;nop
+ subl sg4 at gottpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sg3 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %eax
+ nop;nop
+ addl sg4 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against local var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sl2 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against local var */
+ movl %gs:0, %eax
+ nop;nop
+ subl sl4 at gottpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against local var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sl3 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against local var */
+ movl %gs:0, %eax
+ nop;nop
+ addl sl4 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against hidden and local var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sh2 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against hidden and local var */
+ movl %gs:0, %eax
+ nop;nop
+ subl sh4 at gottpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden and local var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sh3 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden and local var */
+ movl %gs:0, %eax
+ nop;nop
+ addl sh4 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against hidden but not local var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sH2 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against hidden but not local var */
+ movl %gs:0, %eax
+ nop;nop
+ subl sH4 at gottpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden but not local var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sH3 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden but not local var */
+ movl %gs:0, %eax
+ nop;nop
+ addl sH4 at gotntpoff(%ebx), %eax
+ nop;nop;nop;nop
+
+ /* Direct access through %gs */
+
+ /* @gotntpoff IE against global var */
+ movl sg5 at gotntpoff(%ebx), %ecx
+ nop;nop
+ movl %gs:(%ecx), %edx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against local var */
+ movl sl5 at gotntpoff(%ebx), %eax
+ nop;nop
+ movl %gs:(%eax), %edx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden and local var */
+ movl sh5 at gotntpoff(%ebx), %edx
+ nop;nop
+ movl %gs:(%edx), %edx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against hidden but not local var */
+ movl sH5 at gotntpoff(%ebx), %ecx
+ nop;nop
+ movl %gs:(%ecx), %edx
+ nop;nop;nop;nop
+
+ movl -4(%ebp), %ebx
+ leave
+ ret
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,20 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --32
+#ld: -shared -melf_i386
+#objdump: -s -j.got -j.got.plt
+#target: i?86-*-*
+
+.*: file format elf32-i386
+
+Contents of section \.got:
+ [0-9a-f]+ dcffffff 28000000 d4ffffff 2c000000 .*
+ [0-9a-f]+ 30000000 00000000 48000000 9cffffff .*
+ [0-9a-f]+ 00000000 00000000 00000000 94ffffff .*
+ [0-9a-f]+ 6c000000 b4ffffff 4c000000 68000000 .*
+ [0-9a-f]+ 50000000 70000000 00000000 bcffffff .*
+Contents of section \.got\.plt:
+ [0-9a-f]+ ec150000 00000000 00000000 00000000 .*
+ [0-9a-f]+ 20000000 00000000 60000000 00000000 .*
+ [0-9a-f]+ 00000000 00000000 00000000 00000000 .*
+ [0-9a-f]+ 40000000 +.*
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.td
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.td 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsdesc.td 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --32
+#ld: -shared -melf_i386
+#objdump: -sj.tdata
+#target: i?86-*-*
+
+.*: file format elf32-i386
+
+Contents of section \.tdata:
+ [0-9a-f]+ 11000000 12000000 13000000 14000000 .*
+ [0-9a-f]+ 15000000 16000000 17000000 18000000 .*
+ [0-9a-f]+ 41000000 42000000 43000000 44000000 .*
+ [0-9a-f]+ 45000000 46000000 47000000 48000000 .*
+ [0-9a-f]+ 01010000 02010000 03010000 04010000 .*
+ [0-9a-f]+ 05010000 06010000 07010000 08010000 .*
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,158 @@
+#source: tlsgdesc.s
+#as: --32
+#ld: -shared -melf_i386
+#objdump: -drj.text
+#target: i?86-*-*
+
+.*: +file format elf32-i386
+
+Disassembly of section .text:
+
+[0-9a-f]+ <fc1>:
+ [0-9a-f]+: 55[ ]+push %ebp
+ [0-9a-f]+: 89 e5[ ]+mov %esp,%ebp
+ [0-9a-f]+: 53[ ]+push %ebx
+ [0-9a-f]+: 50[ ]+push %eax
+ [0-9a-f]+: e8 00 00 00 00[ ]+call [0-9a-f]+ <.*>
+ [0-9a-f]+: 5b[ ]+pop %ebx
+ [0-9a-f]+: 81 c3 be 11 00 00[ ]+add \$0x[0-9a-f]+,%ebx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b e0 ff ff ff[ ]+sub 0xffffffe0\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 sG3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD
+ [0-9a-f]+: 8d 04 1d f8 ff ff ff[ ]+lea 0xfffffff8\(,%ebx,1\),%eax
+# ->R_386_TLS_DTPMOD32 sG1
+ [0-9a-f]+: e8 a9 ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr at plt>
+# ->R_386_JUMP_SLOT ___tls_get_addr
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 83 18 00 00 00[ ]+lea 0x18\(%ebx\),%eax
+# ->R_386_TLS_DESC sG1
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 83 10 00 00 00[ ]+lea 0x10\(%ebx\),%eax
+# ->R_386_TLS_DESC sG2
+ [0-9a-f]+: ff 10[ ]+call \*\(%eax\)
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8d 04 1d e8 ff ff ff[ ]+lea 0xffffffe8\(,%ebx,1\),%eax
+# ->R_386_TLS_DTPMOD32 sG2
+ [0-9a-f]+: e8 81 ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr at plt>
+# ->R_386_JUMP_SLOT ___tls_get_addr
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gottpoff too
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 2b 83 e0 ff ff ff[ ]+sub 0xffffffe0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG3
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gotntpoff too
+ [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG4
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gotntpoff too
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 03 83 e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 83 e4 ff ff ff[ ]+mov 0xffffffe4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF sG5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through @gottpoff too
+ [0-9a-f]+: 8b 83 f4 ff ff ff[ ]+mov 0xfffffff4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG6
+ [0-9a-f]+: f7 d8[ ]+neg %eax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
+ [0-9a-f]+: 2b 83 f4 ff ff ff[ ]+sub 0xfffffff4\(%ebx\),%eax
+# ->R_386_TLS_TPOFF32 sG6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gotntpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 03 8b e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF sG5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# @gottpoff IE against global var
+ [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 2b 8b f4 ff ff ff[ ]+sub 0xfffffff4\(%ebx\),%ecx
+# ->R_386_TLS_TPOFF32 sG6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx
+ [0-9a-f]+: c9[ ]+leave *
+ [0-9a-f]+: c3[ ]+ret *
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,107 @@
+#source: tlsgdesc.s
+#as: --32
+#ld: -shared -melf_i386
+#readelf: -Ssrl
+#target: i?86-*-*
+
+There are [0-9]+ section headers, starting at offset 0x.*:
+
+Section Headers:
+ \[Nr\] Name +Type +Addr +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 0+ +0 +0 +0
+ \[ 1\] \.hash +.*
+ \[ 2\] \.dynsym +.*
+ \[ 3\] \.dynstr +.*
+ \[ 4\] \.rel.dyn +.*
+ \[ 5\] \.rel.plt +.*
+ \[ 6\] \.plt +.*
+ \[ 7\] \.text +.*
+ \[ 8\] \.dynamic +.*
+ \[ 9\] \.got +.*
+ \[10\] \.got.plt +.*
+ \[11\] \.shstrtab +.*
+ \[12\] \.symtab +.*
+ \[13\] \.strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is DYN \(Shared object file\)
+Entry point 0x[0-9a-f]+
+There are [0-9]+ program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ LOAD.*
+ LOAD.*
+ DYNAMIC.*
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 +.hash .dynsym .dynstr .rel.dyn .rel.plt .plt .text *
+ 01 +.dynamic .got .got.plt *
+ 02 +.dynamic *
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
+ Offset +Info +Type +Sym.Value +Sym. Name
+[0-9a-f]+ +0+225 R_386_TLS_TPOFF32 0+ sG3
+[0-9a-f]+ +0+30e R_386_TLS_TPOFF 0+ sG5
+[0-9a-f]+ +0+423 R_386_TLS_DTPMOD3 0+ sG2
+[0-9a-f]+ +0+424 R_386_TLS_DTPOFF3 0+ sG2
+[0-9a-f]+ +0+50e R_386_TLS_TPOFF 0+ sG4
+[0-9a-f]+ +0+725 R_386_TLS_TPOFF32 0+ sG6
+[0-9a-f]+ +0+923 R_386_TLS_DTPMOD3 0+ sG1
+[0-9a-f]+ +0+924 R_386_TLS_DTPOFF3 0+ sG1
+
+Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 3 entries:
+ Offset Info Type Sym.Value Sym. Name
+[0-9a-f]+ 0+c07 R_386_JUMP_SLOT 0+ ___tls_get_addr
+[0-9a-f]+ 0+929 R_386_TLS_DESC 0+ sG1
+[0-9a-f]+ 0+429 R_386_TLS_DESC 0+ sG2
+
+Symbol table '.dynsym' contains 13 entries:
+ +Num: + Value Size Type + Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +7 fc1
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+ +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND ___tls_get_addr
+
+Symbol table '.symtab' contains 27 entries:
+ +Num: +Value Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +7 fc1
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+ +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND ___tls_get_addr
Added: branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/tlsgdesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,100 @@
+ .text
+ .globl fc1
+ .type fc1, at function
+fc1:
+ pushl %ebp
+ movl %esp, %ebp
+ pushl %ebx
+ pushl %eax
+ call 1f
+1: popl %ebx
+ addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sG3 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sG4 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* GD */
+ leal sG1 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD */
+ leal sG1 at tlsdesc(%ebx), %eax
+ call *sG1 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD */
+ leal sG2 at tlsdesc(%ebx), %eax
+ call *sG2 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD */
+ leal sG2 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE tpoff */
+ leal sG3 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE tpoff */
+ leal sG3 at tlsdesc(%ebx), %eax
+ call *sG3 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE ntpoff */
+ leal sG4 at tlsdesc(%ebx), %eax
+ call *sG4 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE ntpoff */
+ leal sG4 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE ntpoff */
+ leal sG5 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE ntpoff */
+ leal sG5 at tlsdesc(%ebx), %eax
+ call *sG5 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE tpoff */
+ leal sG6 at tlsdesc(%ebx), %eax
+ call *sG6 at tlscall(%eax)
+ nop;nop;nop;nop
+
+ /* GD -> IE tpoff */
+ leal sG6 at tlsgd(,%ebx,1), %eax
+ call ___tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* @gotntpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ addl sG5 at gotntpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ /* @gottpoff IE against global var */
+ movl %gs:0, %ecx
+ nop;nop
+ subl sG6 at gottpoff(%ebx), %ecx
+ nop;nop;nop;nop
+
+ movl -4(%ebp), %ebx
+ leave
+ ret
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,41 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+ 80806: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+ 8080c: 90 nop
+ 8080d: 90 nop
+ 8080e: 90 nop
+ 8080f: 90 nop
+
+00080810 <sexternal at plt>:
+ 80810: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+ 80816: 68 00 00 00 00 push \$0x0
+ 8081b: e9 e0 ff ff ff jmp 80800 <_PROCEDURE_LINKAGE_TABLE_>
+
+00080820 <sglobal at plt>:
+ 80820: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+ 80826: 68 08 00 00 00 push \$0x8
+ 8082b: e9 d0 ff ff ff jmp 80800 <_PROCEDURE_LINKAGE_TABLE_>
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: 53 push %ebx
+ 80c01: 8b 1d 00 00 00 00 mov 0x0,%ebx
+ 80c07: 8b 99 00 00 00 00 mov 0x0\(%ecx\),%ebx
+ 80c0d: 8b 83 14 00 00 00 mov 0x14\(%ebx\),%eax
+ 80c13: ff 00 incl \(%eax\)
+ 80c15: e8 0c 00 00 00 call 80c26 <slocal>
+ 80c1a: e8 01 fc ff ff call 80820 <sglobal at plt>
+ 80c1f: e8 ec fb ff ff call 80810 <sexternal at plt>
+ 80c24: 5b pop %ebx
+ 80c25: c3 ret
+
+00080c26 <slocal>:
+ 80c26: c3 ret
+
+00080c27 <sglobal>:
+ 80c27: c3 ret
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.nd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.nd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.nd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+
+Relocation section '\.rel\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+0008140c .*07 R_386_JUMP_SLOT 00000000 sexternal
+00081410 .*07 R_386_JUMP_SLOT 00080c27 sglobal
+
+Relocation section '\.rel\.dyn' at offset .* contains 4 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+00081c00 00000008 R_386_RELATIVE *
+00080c03 .*01 R_386_32 00000000 __GOTT_BASE__
+00080c09 .*01 R_386_32 00000000 __GOTT_INDEX__
+00081414 .*06 R_386_GLOB_DAT 00081800 x
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1-lib.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,31 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ push %ebx
+ movl __GOTT_BASE__, %ebx
+ movl __GOTT_INDEX__(%ecx), %ebx
+ movl x at GOT(%ebx), %eax
+ incl (%eax)
+ call slocal at plt
+ call sglobal at plt
+ call sexternal at plt
+ pop %ebx
+ ret
+ .size foo, .-foo
+
+ .type slocal, @function
+slocal:
+ ret
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, @function
+sglobal:
+ ret
+ .size sglobal, .-sglobal
+
+ .data
+ .4byte slocal
+
+ .comm x,4,4
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1-static.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1-static.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1-static.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,38 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: ff 35 04 14 08 00 pushl 0x81404
+ 80802: R_386_32 _GLOBAL_OFFSET_TABLE_
+ 80806: ff 25 08 14 08 00 jmp \*0x81408
+ 80808: R_386_32 _GLOBAL_OFFSET_TABLE_
+ 8080c: 90 nop
+ 8080d: 90 nop
+ 8080e: 90 nop
+ 8080f: 90 nop
+
+00080810 <sglobal at plt>:
+ 80810: ff 25 0c 14 08 00 jmp \*0x8140c
+ 80812: R_386_32 _GLOBAL_OFFSET_TABLE_
+ 80816: 68 00 00 00 00 push \$0x0
+ 8081b: e9 e0 ff ff ff jmp 80800 <_PROCEDURE_LINKAGE_TABLE_>
+
+00080820 <foo at plt>:
+ 80820: ff 25 10 14 08 00 jmp \*0x81410
+ 80822: R_386_32 _GLOBAL_OFFSET_TABLE_
+ 80826: 68 08 00 00 00 push \$0x8
+ 8082b: e9 d0 ff ff ff jmp 80800 <_PROCEDURE_LINKAGE_TABLE_>
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: e8 1b fc ff ff call 80820 <foo at plt>
+ 80c01: R_386_PLT32 \.plt
+ 80c05: e8 05 00 00 00 call 80c0f <sexternal>
+ 80c06: R_386_PLT32 sexternal
+ 80c0a: e9 01 fc ff ff jmp 80810 <sglobal at plt>
+ 80c0b: R_386_PLT32 \.plt
+
+00080c0f <sexternal>:
+ 80c0f: c3 ret
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,30 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rel.dyn : { *(.rel.dyn) }
+ .rel.plt : { *(.rel.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x1000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) *(.dynbss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+}
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,20 @@
+
+Relocation section '\.rel\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+0008140c .*07 R_386_JUMP_SLOT 00000000 sglobal
+00081410 .*07 R_386_JUMP_SLOT 00000000 foo
+
+Relocation section '\.rel\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym.Value Sym. Name
+00080c01 .*04 R_386_PLT32 00080800 .plt
+00080c06 .*04 R_386_PLT32 00080c0f sexternal
+00080c0b .*04 R_386_PLT32 00080800 .plt
+
+Relocation section '\.rel\.plt\.unloaded' at offset .* contains 6 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+00080802 .*01 R_386_32 00081400 _GLOBAL_OFFSET_TABLE_
+00080808 .*01 R_386_32 00081400 _GLOBAL_OFFSET_TABLE_
+00080812 .*01 R_386_32 00081400 _GLOBAL_OFFSET_TABLE_
+0008140c .*01 R_386_32 00080800 _PROCEDURE_LINKAGE_TAB.*
+00080822 .*01 R_386_32 00081400 _GLOBAL_OFFSET_TABLE_
+00081410 .*01 R_386_32 00080800 _PROCEDURE_LINKAGE_TAB.*
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks1.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+ .text
+ .globl _start
+ .type _start, at function
+_start:
+ call foo at plt
+ call sexternal at plt
+ jmp sglobal at plt
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, at function
+sexternal:
+ ret
+ .size sexternal, .-sexternal
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks2-static.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks2-static.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks2-static.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5 @@
+ .globl _start
+ .type _start, at function
+_start:
+ ret
+ .end _start
Added: branches/binutils/package/ld/testsuite/ld-i386/vxworks2.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-i386/vxworks2.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-i386/vxworks2.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+ LOAD .* 0x00081000 0x00081000 .* RW 0x1000
+ DYNAMIC .*
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,37 @@
+#name: Emit relocs 1
+#source: emit-relocs-1a.s -mabi=n32 -EB
+#source: emit-relocs-1b.s -mabi=n32 -EB
+#ld: -q -T emit-relocs-1.ld -melf32btsmipn32
+#objdump: -sr
+
+.*: file format .*
+
+RELOCATION RECORDS FOR \[\.data\]:
+OFFSET TYPE VALUE *
+00000000 R_MIPS_32 \.data
+00000004 R_MIPS_32 \.data\+0x00001000
+00000008 R_MIPS_32 \.merge1\+0x00000002
+0000000c R_MIPS_32 \.merge2
+00000010 R_MIPS_32 \.merge3
+00000014 R_MIPS_32 \.merge3\+0x00000004
+00000020 R_MIPS_32 \.data\+0x00000020
+00000024 R_MIPS_32 \.data\+0x00001020
+00000028 R_MIPS_32 \.merge1
+0000002c R_MIPS_32 \.merge2\+0x00000002
+00000030 R_MIPS_32 \.merge3\+0x00000008
+00000034 R_MIPS_32 \.merge3\+0x00000004
+
+
+Contents of section \.text:
+ 80000 03e00008 00000000 00000000 00000000 .*
+Contents of section \.merge1:
+ 80400 666c7574 74657200 flutter.*
+Contents of section \.merge2:
+ 80800 74617374 696e6700 tasting.*
+Contents of section \.merge3:
+ 80c00 00000100 00000200 00000300 .*
+Contents of section \.data:
+ 81000 00081000 00082000 00080402 00080800 .*
+ 81010 00080c00 00080c04 00000000 00000000 .*
+ 81020 00081020 00082020 00080400 00080802 .*
+ 81030 00080c08 00080c04 .*
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,20 @@
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x80000;
+ .text : { *(.text) }
+
+ . = ALIGN (0x400);
+ .merge1 : { *(.merge1) }
+
+ . = ALIGN (0x400);
+ .merge2 : { *(.merge2) }
+
+ . = ALIGN (0x400);
+ .merge3 : { *(.merge3) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+
+ /DISCARD/ : { *(*) }
+}
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1a.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1a.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1a.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,22 @@
+ .text
+ .globl _start
+_start:
+ jr $31
+
+ .section .merge1,"aMS", at progbits,1
+A: .string "utter"
+
+ .section .merge2,"aMS", at progbits,1
+B: .string "tasting"
+
+ .section .merge3,"aM", at progbits,4
+C: .4byte 0x100
+D: .4byte 0x200
+
+ .data
+E: .4byte E
+ .4byte E + 0x1000
+ .4byte A
+ .4byte B
+ .4byte C
+ .4byte D
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1b.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1b.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/emit-relocs-1b.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,17 @@
+ .section .merge1,"aMS", at progbits,1
+A: .string "flutter"
+
+ .section .merge2,"aMS", at progbits,1
+B: .string "sting"
+
+ .section .merge3,"aM", at progbits,4
+C: .4byte 0x300
+D: .4byte 0x200
+
+ .data
+E: .4byte E
+ .4byte E + 0x1000
+ .4byte A
+ .4byte B
+ .4byte C
+ .4byte D
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/mips-elf.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/mips-elf.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/mips-elf.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -16,6 +16,34 @@
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
+if {[istarget "mips*-*-vxworks"]} {
+ set mipsvxtests {
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "-mips2" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "-mips2" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "-mips2" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "-mips2" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $mipsvxtests
+ run_dump_test "vxworks1-static"
+ return
+}
+
if {![istarget mips*-*-*] || ![is_elf_format]} {
return
}
@@ -105,6 +133,10 @@
run_dump_test "textrel-1"
}
+if $has_newabi {
+ run_dump_test "emit-relocs-1"
+}
+
# For tests which may involve multiple files, use run_ld_link_tests.
# List contains test-items with 3 items followed by 2 lists:
@@ -162,6 +194,22 @@
"-EB -march=mips1 -32 -KPIC" {tlslib-o32.s}
{{objdump {-dr -m mips:isa32r2} tlslib-o32.d} {objdump -Rsj.got tlslib-o32-hidden.got}}
"tlslib-o32-hidden.so"}
+ {"Shared library with TLS and hidden symbols (2)"
+ "-shared -melf32btsmip -T mips-lib.ld"
+ "-EB -march=mips1 -32 -KPIC" {tls-hidden2a.s tls-hidden2b.s}
+ {{objdump -drj.text tls-hidden2.d} {objdump -sj.got tls-hidden2-got.d}}
+ "tls-hidden2.so"}
+ {"Shared library with TLS and hidden symbols (3)"
+ "-shared -melf32btsmip -T tls-hidden3.ld"
+ "-EB -march=mips2 -32 -KPIC" {tls-hidden3a.s tls-hidden3b.s}
+ {{objdump -dj.text tls-hidden3.d} {objdump -sj.got tls-hidden3.got}
+ {readelf --relocs tls-hidden3.r}}
+ "tls-hidden3.so"}
+ {"Shared library with TLS and hidden symbols (4)"
+ "-shared -melf32btsmip -T tls-hidden3.ld"
+ "-EB -march=mips2 -32 -KPIC" {tls-hidden4a.s tls-hidden4b.s}
+ {{objdump -sj.got tls-hidden4.got} {readelf --relocs tls-hidden4.r}}
+ "tls-hidden4.so"}
}
if {[istarget mips*-*-linux*]} {
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-n32.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-n32.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-n32.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,12 +4,12 @@
#readelf: -x 5 -r
#ld: -shared -melf32btsmipn32
-Relocation section '.rel.dyn' at offset 0x2c0 contains 2 entries:
+Relocation section '.rel.dyn' at offset .* contains 2 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-000002e0 00000003 R_MIPS_REL32
+000002d0 00000003 R_MIPS_REL32
Hex dump of section '.text':
- 0x000002d0 00000000 00000000 00000000 00000000 ................
- 0x000002e0 000002e0 00000000 00000000 00000000 ................
- 0x000002f0 00000000 00000000 00000000 00000000 ................
+ 0x000002c0 00000000 00000000 00000000 00000000 ................
+ 0x000002d0 000002d0 00000000 00000000 00000000 ................
+ 0x000002e0 00000000 00000000 00000000 00000000 ................
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-o32.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-o32.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/rel32-o32.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,12 +4,12 @@
#readelf: -x 6 -r
#ld: -shared -melf32btsmip
-Relocation section '.rel.dyn' at offset 0x2d8 contains 2 entries:
+Relocation section '.rel.dyn' at offset .* contains 2 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-00000300 00000003 R_MIPS_REL32
+000002f0 00000003 R_MIPS_REL32
Hex dump of section '.text':
- 0x000002f0 00000000 00000000 00000000 00000000 ................
- 0x00000300 00000300 00000000 00000000 00000000 ................
- 0x00000310 00000000 00000000 00000000 00000000 ................
+ 0x000002e0 00000000 00000000 00000000 00000000 ................
+ 0x000002f0 000002f0 00000000 00000000 00000000 ................
+ 0x00000300 00000000 00000000 00000000 00000000 ................
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/rel64.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/rel64.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/rel64.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,16 +4,16 @@
#readelf: -x 6 -r
#ld: -shared -melf64btsmip
-Relocation section '.rel.dyn' at offset 0x440 contains 2 entries:
+Relocation section '.rel.dyn' at offset .* contains 2 entries:
Offset Info Type Sym. Value Sym. Name
000000000000 000000000000 R_MIPS_NONE
Type2: R_MIPS_NONE
Type3: R_MIPS_NONE
-000000000470 000000001203 R_MIPS_REL32
+000000000450 000000001203 R_MIPS_REL32
Type2: R_MIPS_64
Type3: R_MIPS_NONE
Hex dump of section '.text':
+ 0x00000440 00000000 00000000 00000000 00000000 ................
+ 0x00000450 00000000 00000450 00000000 00000000 ................
0x00000460 00000000 00000000 00000000 00000000 ................
- 0x00000470 00000000 00000470 00000000 00000000 ................
- 0x00000480 00000000 00000000 00000000 00000000 ................
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2-got.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2-got.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2-got.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,6 @@
+
+.*file format.*
+
+Contents of section \.got:
+ *[0-9a-f]* 00000000 80000000 00000000 00000000 *\..*
+ *[0-9a-f]* 00000000 00000000 00000000 00000ba8 *\..*
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,10 @@
+
+.*file format.*
+
+Disassembly of section \.text:
+
+.* <.*>:
+.*: 8f82802c * lw v0,-32724\(gp\)
+ \.\.\.
+.*: 8f82802c * lw v0,-32724\(gp\)
+ \.\.\.
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2a.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2a.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2a.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,11 @@
+ .text
+ lw $2,%gottprel(tls_hidden)($28)
+
+ .section .tdata,"awT"
+ .globl tls_hidden
+ .hidden tls_hidden
+ .type tls_hidden, at object
+ .size tls_hidden,4
+ .space 0xba8
+tls_hidden:
+ .word 1
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2b.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2b.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden2b.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,2 @@
+ .text
+ lw $2,%gottprel(tls_hidden)($28)
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,24 @@
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+#
+# The TLS entries are ordered as follows:
+#
+# foo0 (-0x7ff0 + 0x20)
+# foo2 (-0x7ff0 + 0x24)
+# foo3 (-0x7ff0 + 0x28)
+# foo1 (-0x7ff0 + 0x2c)
+#
+# Any order would be acceptable, but it must match the .got dump.
+#
+00080c00 <\.text>:
+ 80c00: 8f848030 lw a0,-32720\(gp\)
+ 80c04: 8f84803c lw a0,-32708\(gp\)
+ 80c08: 8f848034 lw a0,-32716\(gp\)
+ 80c0c: 8f848038 lw a0,-32712\(gp\)
+ 80c10: 8f848030 lw a0,-32720\(gp\)
+ 80c14: 8f84803c lw a0,-32708\(gp\)
+ 80c18: 8f848034 lw a0,-32716\(gp\)
+ 80c1c: 8f848038 lw a0,-32712\(gp\)
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,24 @@
+
+.*: file format .*
+
+#
+# The GOT layout is:
+#
+# - 2 reserved entries
+# - 5 local page entries
+# - 1 global entry for "undef"
+# - 4 TLS entries
+#
+# The order of the TLS entries is:
+#
+# foo0 (offset 0x20)
+# foo2 (offset 0x24)
+# foo3 (offset 0x28)
+# foo1 (offset 0x2c)
+#
+# Any order would be acceptable, but it must match the .d dump.
+#
+Contents of section \.got:
+ 90000 00000000 80000000 00000000 00000000 .*
+ 90010 00000000 00000000 00000000 00000000 .*
+ 90020 0000abc0 0000abc8 0000abcc 0000abc4 .*
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,31 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rel.dyn : { *(.rel.dyn) }
+
+ . = ALIGN (0x400);
+ .MIPS.stubs : { *(.MIPS.stubs) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x10000);
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+
+ . = ALIGN (0x400);
+ .tdata : { *(.tdata) }
+
+ /DISCARD/ : { *(.reginfo) }
+}
+
+VERSION
+{
+ { local: *; };
+}
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.r
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.r 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3.r 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains 6 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+00000000 00000000 R_MIPS_NONE
+#
+# The order of the next four entries doesn't matter. The important thing
+# is that there is exactly one entry per GOT TLS slot.
+#
+00090020 0000002f R_MIPS_TLS_TPREL3
+0009002c 0000002f R_MIPS_TLS_TPREL3
+00090024 0000002f R_MIPS_TLS_TPREL3
+00090028 0000002f R_MIPS_TLS_TPREL3
+00090030 .*03 R_MIPS_REL32 00000000 undef
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3a.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3a.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3a.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,10 @@
+ .macro load
+ lw $4,%gottprel(foo\@)($gp)
+ .endm
+
+ .rept 4
+ load
+ .endr
+
+ .section .tdata,"awT", at progbits
+ .fill 0xabc0
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3b.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3b.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden3b.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,18 @@
+ .macro load
+ .text
+ lw $4,%gottprel(foo\@)($gp)
+
+ .global foo\@
+ .type foo\@, at object
+ .size foo\@,4
+ .section .tdata,"awT", at progbits
+foo\@:
+ .word \@
+ .endm
+
+ .rept 4
+ load
+ .endr
+
+ .data
+ .word undef
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,28 @@
+
+.*: file format .*
+
+Contents of section \.got:
+#
+# The order of the TLS entries in this GOT is:
+#
+# foo2
+# foo3
+# foo0
+# foo1
+#
+# The order and address don't matter; the important thing is that the
+# addresses match the relocs in the .r dump and that there is a separate
+# entry for each symbol.
+#
+#...
+ 1c4080 0000abc8 0000abcc 0000abc0 0000abc4 .*
+#
+# Likewise, but the order of the entries in this GOT is:
+#
+# foo3
+# foo2
+# foo0
+# foo1
+#...
+ 1d00c0 00000000 00000000 00000000 0000abcc .*
+ 1d00d0 0000abc8 0000abc0 0000abc4 .*
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.r
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.r 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4.r 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,19 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .* entries:
+ Offset Info Type Sym\.Value Sym\. Name
+00000000 00000000 R_MIPS_NONE
+#
+# The order and addresses of the next eight entries don't matter. The
+# important thing is that there is exactly one entry per GOT TLS slot
+# and that the addresses match those in the .got dump.
+#
+001d00d4 0000002f R_MIPS_TLS_TPREL3
+001d00d8 0000002f R_MIPS_TLS_TPREL3
+001d00d0 0000002f R_MIPS_TLS_TPREL3
+001d00cc 0000002f R_MIPS_TLS_TPREL3
+001c4088 0000002f R_MIPS_TLS_TPREL3
+001c408c 0000002f R_MIPS_TLS_TPREL3
+001c4080 0000002f R_MIPS_TLS_TPREL3
+001c4084 0000002f R_MIPS_TLS_TPREL3
+.* R_MIPS_REL32 .*
+#pass
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4a.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4a.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4a.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,18 @@
+ .macro load
+ lw $4,%gottprel(foo\@)($gp)
+ .endm
+
+ .rept 4
+ load
+ .endr
+
+ .macro load2
+ lw $4,%got(undefa\@)($gp)
+ .endm
+
+ .rept 0x3000
+ load2
+ .endr
+
+ .section .tdata,"awT", at progbits
+ .fill 0xabc0
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4b.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4b.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-hidden4b.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,27 @@
+ .macro load
+ .text
+ lw $4,%gottprel(foo\@)($gp)
+
+ .global foo\@
+ .type foo\@, at object
+ .size foo\@,4
+ .section .tdata,"awT", at progbits
+foo\@:
+ .word \@
+ .endm
+
+ .rept 4
+ load
+ .endr
+
+ .text
+ .macro load2
+ lw $4,%got(undefb\@)($gp)
+ .endm
+
+ .rept 0x3000
+ load2
+ .endr
+
+ .data
+ .word undef
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,17 +4,17 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-00149630 R_MIPS_TLS_DTPMOD32 \*ABS\*
-0013f9a8 R_MIPS_TLS_DTPMOD32 \*ABS\*
-0014963c R_MIPS_TLS_DTPMOD32 tlsvar_gd
-00149640 R_MIPS_TLS_DTPREL32 tlsvar_gd
-0013f9b4 R_MIPS_TLS_DTPMOD32 tlsvar_gd
-0013f9b8 R_MIPS_TLS_DTPREL32 tlsvar_gd
-00149638 R_MIPS_TLS_TPREL32 tlsvar_ie
-0013f9b0 R_MIPS_TLS_TPREL32 tlsvar_ie
-0013602c R_MIPS_REL32 sym_2_8355
+001495d0 R_MIPS_TLS_DTPMOD32 \*ABS\*
+0013f948 R_MIPS_TLS_DTPMOD32 \*ABS\*
+001495dc R_MIPS_TLS_DTPMOD32 tlsvar_gd
+001495e0 R_MIPS_TLS_DTPREL32 tlsvar_gd
+0013f954 R_MIPS_TLS_DTPMOD32 tlsvar_gd
+0013f958 R_MIPS_TLS_DTPREL32 tlsvar_gd
+001495d8 R_MIPS_TLS_TPREL32 tlsvar_ie
+0013f950 R_MIPS_TLS_TPREL32 tlsvar_ie
+00135fcc R_MIPS_REL32 sym_2_8355
#...
-00142d4c R_MIPS_REL32 sym_1_0945
+00142cec R_MIPS_REL32 sym_1_0945
00000000 R_MIPS_NONE \*ABS\*
00000000 R_MIPS_NONE \*ABS\*
00000000 R_MIPS_NONE \*ABS\*
@@ -40,19 +40,19 @@
Contents of section .got:
- 122480 00000000 80000000 00000000 00000000 ................
- 122490 00000000 00000000 00000000 00000000 ................
- 1224a0 00000000 00000000 00000000 00000000 ................
- 1224b0 00000000 000e0aac 000d35f4 000d35e4 ..........5...5.
+ 122420 00000000 80000000 00000000 00000000 ................
+ 122430 00000000 00000000 00000000 00000000 ................
+ 122440 00000000 00000000 00000000 00000000 ................
+ 122450 00000000 000e0a4c 000d3594 000d3584 ..........5...5.
#...
- 13f990 00000000 00000000 00000000 00000000 ................
- 13f9a0 00000000 00000000 00000000 00000000 ................
- 13f9b0 00000000 00000000 00000000 00000000 ................
- 13f9c0 80000000 00000000 00000000 00000000 ................
+ 13f930 00000000 00000000 00000000 00000000 ................
+ 13f940 00000000 00000000 00000000 00000000 ................
+ 13f950 00000000 00000000 00000000 00000000 ................
+ 13f960 80000000 00000000 00000000 00000000 ................
#...
- 149600 00000000 00000000 00000000 00000000 ................
- 149610 00000000 00000000 00000000 00000000 ................
- 149620 00000000 00000000 00000000 00000000 ................
- 149630 00000000 00000000 00000000 00000000 ................
- 149640 00000000 ....
+ 1495a0 00000000 00000000 00000000 00000000 ................
+ 1495b0 00000000 00000000 00000000 00000000 ................
+ 1495c0 00000000 00000000 00000000 00000000 ................
+ 1495d0 00000000 00000000 00000000 00000000 ................
+ 1495e0 00000000 ....
#pass
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.r
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.r 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tls-multi-got-1.r 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,41 +2,41 @@
Dynamic section at offset 0xec contains 19 entries:
Tag Type Name/Value
0x00000004 \(HASH\) 0x1ac
- 0x00000005 \(STRTAB\) 0x71e08
- 0x00000006 \(SYMTAB\) 0x23ae8
- 0x0000000a \(STRSZ\) 220100 \(bytes\)
+ 0x00000005 \(STRTAB\) 0x71db8
+ 0x00000006 \(SYMTAB\) 0x23ad8
+ 0x0000000a \(STRSZ\) 220091 \(bytes\)
0x0000000b \(SYMENT\) 16 \(bytes\)
0x00000015 \(DEBUG\) 0x0
- 0x00000003 \(PLTGOT\) 0x122480
- 0x00000011 \(REL\) 0xa79cc
+ 0x00000003 \(PLTGOT\) 0x122420
+ 0x00000011 \(REL\) 0xa7974
0x00000012 \(RELSZ\) 160072 \(bytes\)
0x00000013 \(RELENT\) 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) 1
0x70000005 \(MIPS_FLAGS\) NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) 0
0x7000000a \(MIPS_LOCAL_GOTNO\) 13
- 0x70000011 \(MIPS_SYMTABNO\) 20018
- 0x70000012 \(MIPS_UNREFEXTNO\) 15
- 0x70000013 \(MIPS_GOTSYM\) 0x12
+ 0x70000011 \(MIPS_SYMTABNO\) 20014
+ 0x70000012 \(MIPS_UNREFEXTNO\) 11
+ 0x70000013 \(MIPS_GOTSYM\) 0xe
0x0000001e \(FLAGS\) STATIC_TLS
0x00000000 \(NULL\) 0x0
Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 20031 entries:
Offset Info Type Sym.Value Sym. Name
00000000 00000000 R_MIPS_NONE
-00149630 00000026 R_MIPS_TLS_DTPMOD
-0013f9a8 00000026 R_MIPS_TLS_DTPMOD
-0014963c 00000a26 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd
-00149640 00000a27 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd
-0013f9b4 00000a26 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd
-0013f9b8 00000a27 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd
-00149638 0000102f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie
-0013f9b0 0000102f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie
-0013602c 00001203 R_MIPS_REL32 000e0aac sym_2_8355
-0014250c 00001303 R_MIPS_REL32 000d35f4 sym_1_4745
+001495d0 00000026 R_MIPS_TLS_DTPMOD
+0013f948 00000026 R_MIPS_TLS_DTPMOD
+001495dc 00000626 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd
+001495e0 00000627 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd
+0013f954 00000626 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd
+0013f958 00000627 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd
+001495d8 00000c2f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie
+0013f950 00000c2f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie
+00135fcc 00000e03 R_MIPS_REL32 000e0a4c sym_2_8355
+001424ac 00000f03 R_MIPS_REL32 000d3594 sym_1_4745
#...
-00136a10 004e3003 R_MIPS_REL32 000da990 sym_2_2140
-00142d4c 004e3103 R_MIPS_REL32 000cfa94 sym_1_0945
+001369b0 004e2c03 R_MIPS_REL32 000da930 sym_2_2140
+00142cec 004e2d03 R_MIPS_REL32 000cfa34 sym_1_0945
00000000 00000000 R_MIPS_NONE
00000000 00000000 R_MIPS_NONE
00000000 00000000 R_MIPS_NONE
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
.* <__start>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7b60 addiu gp,gp,31584
+ .*: 279c7b70 addiu gp,gp,31600
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
@@ -55,7 +55,7 @@
.* <other>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7aa0 addiu gp,gp,31392
+ .*: 279c7ab0 addiu gp,gp,31408
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,16 +4,16 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd
-10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
-1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
-1000005c R_MIPS_TLS_TPREL32 tlsbin_ie
+10000044 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+10000048 R_MIPS_TLS_DTPREL32 tlsbin_gd
+10000038 R_MIPS_TLS_DTPMOD32 tlsvar_gd
+1000003c R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000040 R_MIPS_TLS_TPREL32 tlsvar_ie
+1000004c R_MIPS_TLS_TPREL32 tlsbin_ie
Contents of section .got:
- 10000020 00000000 80000000 00000000 00000000 ................
- 10000030 00000000 00000000 00000000 0040055c ............. at ..
- 10000040 00000001 00000000 00000000 00000000 ................
- 10000050 00000000 00000000 00000000 00000000 ................
+ 10000010 00000000 80000000 00000000 00000000 ................
+ 10000020 00000000 00000000 00000000 0040053c ............. at ..
+ 10000030 00000001 00000000 00000000 00000000 ................
+ 10000040 00000000 00000000 00000000 00000000 ................
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,26 +5,26 @@
.* <__start>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7b60 addiu gp,gp,31584
+ .*: 279c7b70 addiu gp,gp,31600
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848044 addiu a0,gp,-32700
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848048 addiu a0,gp,-32696
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848038 addiu a0,gp,-32712
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 2784803c addiu a0,gp,-32708
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848030 addiu a0,gp,-32720
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848034 addiu a0,gp,-32716
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -33,10 +33,10 @@
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f83804c lw v1,-32692\(gp\)
+ .*: 8f838050 lw v1,-32688\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838040 lw v1,-32704\(gp\)
+ .*: 8f838044 lw v1,-32700\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
@@ -55,26 +55,26 @@
.* <other>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7aa0 addiu gp,gp,31392
+ .*: 279c7ab0 addiu gp,gp,31408
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848044 addiu a0,gp,-32700
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848048 addiu a0,gp,-32696
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848038 addiu a0,gp,-32712
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 2784803c addiu a0,gp,-32708
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848030 addiu a0,gp,-32720
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848034 addiu a0,gp,-32716
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -83,10 +83,10 @@
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f83804c lw v1,-32692\(gp\)
+ .*: 8f838050 lw v1,-32688\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838040 lw v1,-32704\(gp\)
+ .*: 8f838044 lw v1,-32700\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,17 +4,17 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd
-10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
-1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
-1000005c R_MIPS_TLS_TPREL32 tlsbin_ie
+10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd
+1000003c R_MIPS_TLS_DTPMOD32 tlsvar_gd
+10000040 R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000044 R_MIPS_TLS_TPREL32 tlsvar_ie
+10000050 R_MIPS_TLS_TPREL32 tlsbin_ie
Contents of section .got:
- 10000020 00000000 80000000 00000000 00000000 ................
- 10000030 00000000 00000000 00000000 0040055c ............. at ..
- 10000040 00000001 00000000 00000000 00000000 ................
+ 10000010 00000000 80000000 00000000 00000000 ................
+ 10000020 00000000 00000000 00000000 00000000 ................
+ 10000030 0040053c 00000001 00000000 00000000 . at .<............
+ 10000040 00000000 00000000 00000000 00000000 ................
10000050 00000000 00000000 00000000 00000000 ................
- 10000060 00000000 00000000 00000000 ............
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,26 +5,26 @@
.* <other>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7b60 addiu gp,gp,31584
+ .*: 279c7b70 addiu gp,gp,31600
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848044 addiu a0,gp,-32700
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848048 addiu a0,gp,-32696
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848038 addiu a0,gp,-32712
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 2784803c addiu a0,gp,-32708
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848030 addiu a0,gp,-32720
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848034 addiu a0,gp,-32716
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -33,10 +33,10 @@
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f83804c lw v1,-32692\(gp\)
+ .*: 8f838050 lw v1,-32688\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838040 lw v1,-32704\(gp\)
+ .*: 8f838044 lw v1,-32700\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
@@ -51,26 +51,26 @@
.* <__start>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7ab0 addiu gp,gp,31408
+ .*: 279c7ac0 addiu gp,gp,31424
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848044 addiu a0,gp,-32700
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848048 addiu a0,gp,-32696
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848038 addiu a0,gp,-32712
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 2784803c addiu a0,gp,-32708
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f99802c lw t9,-32724\(gp\)
- .*: 27848030 addiu a0,gp,-32720
+ .*: 8f998030 lw t9,-32720\(gp\)
+ .*: 27848034 addiu a0,gp,-32716
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -79,10 +79,10 @@
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f83804c lw v1,-32692\(gp\)
+ .*: 8f838050 lw v1,-32688\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838040 lw v1,-32704\(gp\)
+ .*: 8f838044 lw v1,-32700\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,17 +4,17 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd
-10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
-1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
-1000005c R_MIPS_TLS_TPREL32 tlsbin_ie
+10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd
+1000003c R_MIPS_TLS_DTPMOD32 tlsvar_gd
+10000040 R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000044 R_MIPS_TLS_TPREL32 tlsvar_ie
+10000050 R_MIPS_TLS_TPREL32 tlsbin_ie
Contents of section .got:
- 10000020 00000000 80000000 00000000 00000000 ................
- 10000030 00000000 00000000 00000000 0040060c ............. at ..
- 10000040 00000001 00000000 00000000 00000000 ................
+ 10000010 00000000 80000000 00000000 00000000 ................
+ 10000020 00000000 00000000 00000000 00000000 ................
+ 10000030 004005ec 00000001 00000000 00000000 . at ..............
+ 10000040 00000000 00000000 00000000 00000000 ................
10000050 00000000 00000000 00000000 00000000 ................
- 10000060 00000000 00000000 00000000 ............
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -5,7 +5,7 @@
.* <__start>:
.*: 3c1c0fc0 lui gp,0xfc0
- .*: 279c7b50 addiu gp,gp,31568
+ .*: 279c7bb0 addiu gp,gp,31664
.*: 0399e021 addu gp,gp,t9
.*: 27bdfff0 addiu sp,sp,-16
.*: afbe0008 sw s8,8\(sp\)
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlsdyn-o32.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,16 +4,16 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd
-10000058 R_MIPS_TLS_DTPMOD32 tlsvar_gd
-1000005c R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000054 R_MIPS_TLS_TPREL32 tlsbin_ie
-10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
+10000038 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+1000003c R_MIPS_TLS_DTPREL32 tlsbin_gd
+10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
+1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000044 R_MIPS_TLS_TPREL32 tlsbin_ie
+10000040 R_MIPS_TLS_TPREL32 tlsvar_ie
Contents of section .got:
- 10000020 00000000 80000000 00000000 00000000 ................
- 10000030 00000000 00000000 00000000 0040056c ................
- 10000040 00000001 00000000 00000000 00000000 ................
- 10000050 00000000 00000000 00000000 00000000 ................
+ 10000010 00000000 80000000 00000000 00000000 ................
+ 10000020 00000000 00000000 00000000 004004fc ................
+ 10000030 00000001 00000000 00000000 00000000 ................
+ 10000040 00000000 00000000 00000000 00000000 ................
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,13 +4,13 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-0004043c R_MIPS_TLS_DTPMOD32 \*ABS\*
-00040434 R_MIPS_TLS_DTPMOD32 \*ABS\*
-00040430 R_MIPS_TLS_TPREL32 \*ABS\*
+000403fc R_MIPS_TLS_DTPMOD32 \*ABS\*
+000403f4 R_MIPS_TLS_DTPMOD32 \*ABS\*
+000403f0 R_MIPS_TLS_TPREL32 \*ABS\*
Contents of section .got:
- 40410 00000000 80000000 00000000 00000000 ................
- 40420 00000000 00000000 00000000 000003e0 ................
- 40430 00000008 00000000 00000000 00000000 ................
- 40440 ffff8004 ....
+ 403d0 00000000 80000000 00000000 00000000 ................
+ 403e0 00000000 00000000 00000000 000003a0 ................
+ 403f0 00000008 00000000 00000000 00000000 ................
+ 40400 ffff8004 ....
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,14 +4,14 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-000405e4 R_MIPS_TLS_DTPMOD32 \*ABS\*
-000405ec R_MIPS_TLS_DTPMOD32 tlsvar_gd
-000405f0 R_MIPS_TLS_DTPREL32 tlsvar_gd
-000405e0 R_MIPS_TLS_TPREL32 tlsvar_ie
+00040574 R_MIPS_TLS_DTPMOD32 \*ABS\*
+0004057c R_MIPS_TLS_DTPMOD32 tlsvar_gd
+00040580 R_MIPS_TLS_DTPREL32 tlsvar_gd
+00040570 R_MIPS_TLS_TPREL32 tlsvar_ie
Contents of section .got:
- 405c0 00000000 80000000 00000000 00000000 ................
- 405d0 00000000 00000000 00000000 00000590 ................
- 405e0 00000000 00000000 00000000 00000000 ................
- 405f0 00000000 ....
+ 40550 00000000 80000000 00000000 00000000 ................
+ 40560 00000000 00000000 00000000 00000520 ................
+ 40570 00000000 00000000 00000000 00000000 ................
+ 40580 00000000 ....
Modified: branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32.got
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32.got 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/tlslib-o32.got 2006-04-19 08:33:31 UTC (rev 12)
@@ -4,14 +4,14 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-00040534 R_MIPS_TLS_DTPMOD32 \*ABS\*
-0004053c R_MIPS_TLS_DTPMOD32 tlsvar_gd
-00040540 R_MIPS_TLS_DTPREL32 tlsvar_gd
-00040530 R_MIPS_TLS_TPREL32 tlsvar_ie
+000404d4 R_MIPS_TLS_DTPMOD32 \*ABS\*
+000404dc R_MIPS_TLS_DTPMOD32 tlsvar_gd
+000404e0 R_MIPS_TLS_DTPREL32 tlsvar_gd
+000404d0 R_MIPS_TLS_TPREL32 tlsvar_ie
Contents of section .got:
- 40510 00000000 80000000 00000000 00000000 ................
- 40520 00000000 00000000 00000000 000004e0 ................
- 40530 00000000 00000000 00000000 00000000 ................
- 40540 00000000 ....
+ 404b0 00000000 80000000 00000000 00000000 ................
+ 404c0 00000000 00000000 00000000 00000480 ................
+ 404d0 00000000 00000000 00000000 00000000 ................
+ 404e0 00000000 ....
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,50 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: 8f990008 lw t9,8\(gp\)
+ 80804: 00000000 nop
+ 80808: 03200008 jr t9
+ 8080c: 00000000 nop
+ \.\.\.
+ 80818: 1000fff9 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 8081c: 24180000 li t8,0
+ 80820: 1000fff7 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80824: 24180001 li t8,1
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: 27bdffe0 addiu sp,sp,-32
+ 80c04: afbf0000 sw ra,0\(sp\)
+ 80c08: afbc0004 sw gp,4\(sp\)
+ 80c0c: 3c1c0000 lui gp,0x0
+ 80c10: 8f9c0000 lw gp,0\(gp\)
+ 80c14: 8f9c0000 lw gp,0\(gp\)
+ 80c18: 8f820014 lw v0,20\(gp\)
+ 80c1c: 8c430000 lw v1,0\(v0\)
+ 80c20: 24630001 addiu v1,v1,1
+ 80c24: ac430000 sw v1,0\(v0\)
+ 80c28: 8f99000c lw t9,12\(gp\)
+ 80c2c: 0320f809 jalr t9
+ 80c30: 00000000 nop
+ 80c34: 8f99fff4 lw t9,-12\(gp\)
+ 80c38: 0320f809 jalr t9
+ 80c3c: 00000000 nop
+ 80c40: 8f99fff0 lw t9,-16\(gp\)
+ 80c44: 0320f809 jalr t9
+ 80c48: 00000000 nop
+ 80c4c: 8fbf0000 lw ra,0\(sp\)
+ 80c50: 8fbc0004 lw gp,4\(sp\)
+ 80c54: 03e00008 jr ra
+ 80c58: 27bd0020 addiu sp,sp,32
+
+00080c5c <slocal>:
+ 80c5c: 03e00008 jr ra
+ 80c60: 00000000 nop
+
+00080c64 <sglobal>:
+ 80c64: 03e00008 jr ra
+ 80c68: 00000000 nop
+#pass
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.nd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.nd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.nd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,18 @@
+
+Relocation section '\.rela\.dyn' at offset .* contains .* entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080c0c .*05 R_MIPS_HI16 00000000 __GOTT_BASE__ \+ 0
+00080c10 .*06 R_MIPS_LO16 00000000 __GOTT_BASE__ \+ 0
+00080c14 .*01 R_MIPS_16 00000000 __GOTT_INDEX__ \+ 0
+0008141c .*02 R_MIPS_32 00080c00 \.text \+ 5c
+00081c00 00000002 R_MIPS_32 00080c5c
+00081c04 00000002 R_MIPS_32 00081c00
+00081c08 .*02 R_MIPS_32 00081c08 dglobal \+ 0
+00081c0c .*02 R_MIPS_32 00000000 dexternal \+ 0
+00081424 .*02 R_MIPS_32 00081800 x \+ 0
+00000000 00000000 R_MIPS_NONE 00000000
+#...
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00081400 .*7f R_MIPS_JUMP_SLOT 00000000 sexternal \+ 0
+00081404 .*7f R_MIPS_JUMP_SLOT 00080c64 sglobal \+ 0
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-lib.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,52 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ addiu $sp,$sp,-32
+ sw $31,($sp)
+ sw $28,4($sp)
+ lui $28,%hi(__GOTT_BASE__)
+ lw $28,%lo(__GOTT_BASE__)($28)
+ lw $28,%half(__GOTT_INDEX__)($28)
+ lw $2,%got(x)($28)
+ lw $3,($2)
+ addiu $3,$3,1
+ sw $3,($2)
+ lw $25,%got(slocal)($gp)
+ jalr $25
+ lw $25,%call16(sglobal)($gp)
+ jalr $25
+ lw $25,%call16(sexternal)($gp)
+ jalr $25
+ lw $31,($sp)
+ lw $28,4($sp)
+ addiu $sp,$sp,32
+ jr $31
+ .size foo, .-foo
+
+ .type slocal, @function
+slocal:
+ jr $31
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, @function
+sglobal:
+ jr $31
+ .size sglobal, .-sglobal
+
+ .comm x,4,4
+
+ .data
+ .type dlocal, @object
+dlocal:
+ .word slocal
+ .word dlocal
+ .size dlocal, .-dlocal
+
+ .globl dglobal
+ .type dglobal, @object
+dglobal:
+ .word dglobal
+ .word dexternal
+ .size dglobal, .-dglobal
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-static.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-static.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1-static.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,51 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: 3c190008 lui t9,0x8
+ 80800: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_
+ 80804: 27391410 addiu t9,t9,5136
+ 80804: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_
+ 80808: 8f390008 lw t9,8\(t9\)
+ 8080c: 00000000 nop
+ 80810: 03200008 jr t9
+ 80814: 00000000 nop
+ 80818: 1000fff9 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 8081c: 24180000 li t8,0
+ 80820: 3c190008 lui t9,0x8
+ 80820: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0
+ 80824: 27391400 addiu t9,t9,5120
+ 80824: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0
+ 80828: 8f390000 lw t9,0\(t9\)
+ 8082c: 00000000 nop
+ 80830: 03200008 jr t9
+ 80834: 00000000 nop
+ 80838: 1000fff1 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 8083c: 24180001 li t8,1
+ 80840: 3c190008 lui t9,0x8
+ 80840: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4
+ 80844: 27391404 addiu t9,t9,5124
+ 80844: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4
+ 80848: 8f390000 lw t9,0\(t9\)
+ 8084c: 00000000 nop
+ 80850: 03200008 jr t9
+ 80854: 00000000 nop
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: 0c020210 jal 80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
+ 80c00: R_MIPS_26 \.plt\+0x40
+ 80c04: 00000000 nop
+ 80c08: 0c020306 jal 80c18 <sexternal>
+ 80c08: R_MIPS_26 sexternal
+ 80c0c: 00000000 nop
+ 80c10: 08020208 j 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+ 80c10: R_MIPS_26 \.plt\+0x20
+ 80c14: 00000000 nop
+
+00080c18 <sexternal>:
+ 80c18: 03e00008 jr ra
+ 80c1c: 00000000 nop
+#pass
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,32 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rela.dyn : { *(.rela.dyn) }
+ .rela.plt : { *(.rela.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x1000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) *(.dynbss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+
+ /DISCARD/ : { *(.reginfo) }
+}
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,32 @@
+
+Relocation section '\.rela\.dyn' at offset .* contains 1 entries:
+ Offset Info Type Sym.Value Sym. Name \+ Addend
+00081800 .*7e R_MIPS_COPY 00081800 dglobal \+ 0
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00081400 .*7f R_MIPS_JUMP_SLOT 00080820 sglobal \+ 0
+00081404 .*7f R_MIPS_JUMP_SLOT 00080840 foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080c00 .*04 R_MIPS_26 00080800 \.plt \+ 40
+00080c08 .*04 R_MIPS_26 00080c18 sexternal \+ 0
+00080c10 .*04 R_MIPS_26 00080800 \.plt \+ 20
+
+Relocation section '\.rela\.data' at offset .* contains 3 entries:
+ Offset Info Type Sym.Value Sym. Name \+ Addend
+00081c00 .*02 R_MIPS_32 00081c00 .data \+ 0
+00081c04 .*02 R_MIPS_32 00081800 .bss \+ 0
+00081c08 .*02 R_MIPS_32 00081c04 dexternal \+ 0
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080800 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0
+00080804 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0
+00081400 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 18
+00080820 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0
+00080824 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0
+00081404 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 38
+00080840 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4
+00080844 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,27 @@
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ jal foo
+ jal sexternal
+ j sglobal
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, @function
+sexternal:
+ jr $31
+ .size sexternal, .-sexternal
+
+ .data
+ .type dlocal, @object
+dlocal:
+ .word dlocal
+ .size dlocal, .-dlocal
+
+ .globl dexternal
+ .type dexternal, @object
+dexternal:
+ .word dglobal
+ .word dexternal
+ .size dexternal, .-dexternal
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2-static.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2-static.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2-static.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5 @@
+ .globl _start
+ .type _start, @function
+_start:
+ jr $31
+ .size _start, .-_start
Added: branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mips-elf/vxworks2.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+ LOAD .* 0x00081000 0x00081000 .* RW 0x1000
+ DYNAMIC .*
+
+#...
Modified: branches/binutils/package/ld/testsuite/ld-mmix/sec-1.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-mmix/sec-1.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-mmix/sec-1.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -13,21 +13,21 @@
Idx Name Size VMA LMA File off Algn
0 \.text 0+4 0+ 0+ 0+ 2\*\*2
CONTENTS, ALLOC, LOAD, CODE
- 1 \.a\.fourth\.section 0+10 0+20 0+20 0+ 2\*\*2
+ 1 secname 0+19 0+4 0+4 0+ 2\*\*2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 \.a\.fourth\.section 0+10 0+20 0+20 0+ 2\*\*2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 2 secname 0+19 0+4 0+4 0+ 2\*\*2
- CONTENTS, ALLOC, LOAD, READONLY, CODE
3 anothersec 0+13 2000000000000000 2000000000000000 0+ 2\*\*2
CONTENTS, ALLOC, LOAD, DATA
4 thirdsec 0+a 0+ 0+ 0+ 2\*\*2
CONTENTS, READONLY
Contents of section \.text:
0000 e3fd0001 .*
-Contents of section \.a\.fourth\.section:
- 0020 00000000 0087a238 00000000 302a55a8 .*
Contents of section secname:
0004 00000001 00000002 00000003 00000004 .*
0014 ffffffff fffff827 50 .*
+Contents of section \.a\.fourth\.section:
+ 0020 00000000 0087a238 00000000 302a55a8 .*
Contents of section anothersec:
2000000000000000 0000000a 00000009 00000008 00000007 .*
2000000000000010 252729 .*
Modified: branches/binutils/package/ld/testsuite/ld-powerpc/powerpc.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/powerpc.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/powerpc.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -20,6 +20,38 @@
return
}
+if {[istarget "*-*-vxworks"]} {
+ set ppcvxtests {
+ {"VxWorks shared library test 1 (default script)" "-shared"
+ "-mregnames" {vxworks1-lib.s}
+ {{readelf --segments vxworks1-lib.sd}}
+ "libvxworks1.so"}
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "-mregnames" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "-mregnames" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "-mregnames" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "-mregnames" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $ppcvxtests
+ run_dump_test "vxworks1-static"
+ return
+}
+
# powerpc ELF only at the moment.
if { [istarget "*-*-macos*"] || [istarget "*-*-netware*"]
Modified: branches/binutils/package/ld/testsuite/ld-powerpc/tls32.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/tls32.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/tls32.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -33,11 +33,11 @@
#global syms
#GD
addi 3,31,gd0 at got@tlsgd #R_PPC_GOT_TLSGD16 gd0
- bl __tls_get_addr at plt #R_PPC_PLTREL24 __tls_get_addr
+ bl __tls_get_addr+0x8000 at plt #R_PPC_PLTREL24 __tls_get_addr
#LD
addi 3,31,ld0 at got@tlsld #R_PPC_GOT_TLSLD16 ld0
- bl __tls_get_addr at plt #R_PPC_PLTREL24 __tls_get_addr
+ bl __tls_get_addr+0x8000 at plt #R_PPC_PLTREL24 __tls_get_addr
addi 9,3,ld0 at dtprel #R_PPC_DTPREL16 ld0
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,56 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: 81 9e 00 08 lwz r12,8\(r30\)
+ 80804: 7d 89 03 a6 mtctr r12
+ 80808: 81 9e 00 04 lwz r12,4\(r30\)
+ 8080c: 4e 80 04 20 bctr
+ 80810: 60 00 00 00 nop
+ 80814: 60 00 00 00 nop
+ 80818: 60 00 00 00 nop
+ 8081c: 60 00 00 00 nop
+ 80820: 3d 9e 00 00 addis r12,r30,0
+ 80824: 81 8c 00 0c lwz r12,12\(r12\)
+ 80828: 7d 89 03 a6 mtctr r12
+ 8082c: 4e 80 04 20 bctr
+ 80830: 39 60 00 00 li r11,0
+ 80834: 4b ff ff cc b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80838: 60 00 00 00 nop
+ 8083c: 60 00 00 00 nop
+ 80840: 3d 9e 00 00 addis r12,r30,0
+ 80844: 81 8c 00 10 lwz r12,16\(r12\)
+ 80848: 7d 89 03 a6 mtctr r12
+ 8084c: 4e 80 04 20 bctr
+ 80850: 39 60 00 01 li r11,1
+ 80854: 4b ff ff ac b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80858: 60 00 00 00 nop
+ 8085c: 60 00 00 00 nop
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: 94 21 ff e8 stwu r1,-24\(r1\)
+ 80c04: 7c 08 02 a6 mflr r0
+ 80c08: 90 01 00 1c stw r0,28\(r1\)
+ 80c0c: 3f c0 00 00 lis r30,0
+ 80c10: 83 de 00 00 lwz r30,0\(r30\)
+ 80c14: 83 de 00 00 lwz r30,0\(r30\)
+ 80c18: 80 3e 00 14 lwz r1,20\(r30\)
+ 80c1c: 80 01 00 00 lwz r0,0\(r1\)
+ 80c20: 38 00 00 01 li r0,1
+ 80c24: 90 01 00 00 stw r0,0\(r1\)
+ 80c28: 48 00 00 1d bl 80c44 <slocal>
+ 80c2c: 4b ff fc 15 bl 80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
+ 80c30: 4b ff fb f1 bl 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+ 80c34: 80 01 00 1c lwz r0,28\(r1\)
+ 80c38: 7c 08 03 a6 mtlr r0
+ 80c3c: 38 21 00 18 addi r1,r1,24
+ 80c40: 4e 80 00 20 blr
+
+00080c44 <slocal>:
+ 80c44: 4e 80 00 20 blr
+
+00080c48 <sglobal>:
+ 80c48: 4e 80 00 20 blr
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.nd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.nd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.nd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0009040c .*15 R_PPC_JMP_SLOT 00000000 sexternal \+ 0
+00090410 .*15 R_PPC_JMP_SLOT 00080c48 sglobal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 5 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00090c00 00000016 R_PPC_RELATIVE * 00080c44
+00080c0e .*06 R_PPC_ADDR16_HA 00000000 __GOTT_BASE__ \+ 0
+00080c12 .*04 R_PPC_ADDR16_LO 00000000 __GOTT_BASE__ \+ 0
+00080c16 .*03 R_PPC_ADDR16 00000000 __GOTT_INDEX__ \+ 0
+00090414 .*14 R_PPC_GLOB_DAT 00090800 x \+ 0
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,38 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ stwu r1,-24(r1)
+ mflr r0
+ stw r0,28(r1)
+ lis r30,__GOTT_BASE__ at ha
+ lwz r30,__GOTT_BASE__ at l(r30)
+ lwz r30,__GOTT_INDEX__(r30)
+ lwz r1,x at got(r30)
+ lwz r0,0(r1)
+ addi r0,r0,1
+ stw r0,0(r1)
+ bl slocal
+ bl sglobal at plt
+ bl sexternal at plt
+ lwz r0,28(r1)
+ mtlr r0
+ addi r1,r1,24
+ blr
+ .size foo, .-foo
+
+ .type slocal, @function
+slocal:
+ blr
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, @function
+sglobal:
+ blr
+ .size sglobal, .-sglobal
+
+ .data
+ .4byte slocal
+
+ .comm x,4,4
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-lib.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+#...
+Program Headers:
+ Type .* Flg Align
+ LOAD .* R E 0x10000
+ LOAD .* RW 0x10000
+ DYNAMIC .* RW 0x4
+
+ Section to Segment mapping:
+ Segment Sections\.\.\.
+ 00 .* \.plt .*
+ 01 .* \.got .*
+ 02 .* \.dynamic $
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-static.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-static.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1-static.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s -mregnames
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,48 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: 3d 80 00 09 lis r12,9
+ 80802: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_
+ 80804: 39 8c 04 00 addi r12,r12,1024
+ 80806: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_
+ 80808: 80 0c 00 08 lwz r0,8\(r12\)
+ 8080c: 7c 09 03 a6 mtctr r0
+ 80810: 81 8c 00 04 lwz r12,4\(r12\)
+ 80814: 4e 80 04 20 bctr
+ 80818: 60 00 00 00 nop
+ 8081c: 60 00 00 00 nop
+ 80820: 3d 80 00 09 lis r12,9
+ 80822: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0xc
+ 80824: 81 8c 04 0c lwz r12,1036\(r12\)
+ 80826: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0xc
+ 80828: 7d 89 03 a6 mtctr r12
+ 8082c: 4e 80 04 20 bctr
+ 80830: 39 60 00 00 li r11,0
+ 80834: 4b ff ff cc b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80838: 60 00 00 00 nop
+ 8083c: 60 00 00 00 nop
+ 80840: 3d 80 00 09 lis r12,9
+ 80842: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0x10
+ 80844: 81 8c 04 10 lwz r12,1040\(r12\)
+ 80846: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0x10
+ 80848: 7d 89 03 a6 mtctr r12
+ 8084c: 4e 80 04 20 bctr
+ 80850: 39 60 00 01 li r11,1
+ 80854: 4b ff ff ac b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80858: 60 00 00 00 nop
+ 8085c: 60 00 00 00 nop
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: 4b ff fc 41 bl 80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
+ 80c00: R_PPC_PLTREL24 \.plt\+0x40
+ 80c04: 48 00 00 09 bl 80c0c <sexternal>
+ 80c04: R_PPC_PLTREL24 sexternal
+ 80c08: 4b ff fc 19 bl 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+ 80c08: R_PPC_PLTREL24 \.plt\+0x20
+
+00080c0c <sexternal>:
+ 80c0c: 4e 80 00 20 blr
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,30 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rela.dyn : { *(.rela.dyn) }
+ .rela.plt : { *(.rela.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x10000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+}
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,22 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0009040c .*15 R_PPC_JMP_SLOT 00080820 sglobal \+ 0
+00090410 .*15 R_PPC_JMP_SLOT 00080840 foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080c00 .*12 R_PPC_PLTREL24 00080800 \.plt \+ 40
+00080c04 .*12 R_PPC_PLTREL24 00080c0c sexternal \+ 0
+00080c08 .*12 R_PPC_PLTREL24 00080800 \.plt \+ 20
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080802 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ 0
+00080806 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ 0
+00080822 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ c
+00080826 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ c
+0009040c .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 30
+00080842 .*06 R_PPC_ADDR16_HA 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00080846 .*04 R_PPC_ADDR16_LO 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00090410 .*01 R_PPC_ADDR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 50
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,14 @@
+ .text
+ .globl _start
+ .type _start, at function
+_start:
+ bl foo at plt
+ bl sexternal at plt
+ bl sglobal at plt
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, at function
+sexternal:
+ blr
+ .size sexternal, .-sexternal
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2-static.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2-static.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2-static.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,5 @@
+ .globl _start
+ .type _start, at function
+_start:
+ blr
+ .end _start
Added: branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-powerpc/vxworks2.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+ LOAD .* 0x00090000 0x00090000 .* RW 0x10000
+ DYNAMIC .*
+
+#...
Modified: branches/binutils/package/ld/testsuite/ld-sparc/sparc.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/sparc.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/sparc.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -19,6 +19,33 @@
# Test SPARC linking; all types of relocs. This tests the assembler and
# tools like objdump as well as the linker.
+if {[istarget "sparc-*-vxworks"]} {
+ set sparcvxworkstests {
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "-KPIC" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $sparcvxworkstests
+ run_dump_test "vxworks1-static"
+}
+
if { !([istarget "sparc*-*-elf*"]
|| [istarget "sparc*-sun-solaris*"]
|| ([istarget "sparc*-*-linux*"]
@@ -88,6 +115,8 @@
if { ![istarget "sparc64-*-elf*"] } {
run_ld_link_tests $sparctests
}
-if { ![istarget "sparc-*-elf*"] } {
+if { !([istarget "sparc-*-elf*"]
+ || [istarget "sparc-sun-solaris2.5*"]
+ || [istarget "sparc-sun-solaris2.6"]) } {
run_ld_link_tests $sparc64tests
}
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,45 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: c4 05 e0 08 ld \[ %l7 \+ 8 \], %g2
+ 80804: 81 c0 80 00 jmp %g2
+ 80808: 01 00 00 00 nop
+ 8080c: 03 00 00 00 sethi %hi\(0\), %g1
+ 80810: 82 10 60 0c or %g1, 0xc, %g1 ! c <_PROCEDURE_LINKAGE_TABLE_-0x807f4>
+ 80814: c2 05 c0 01 ld \[ %l7 \+ %g1 \], %g1
+ 80818: 81 c0 40 00 jmp %g1
+ 8081c: 01 00 00 00 nop
+ 80820: 03 00 00 00 sethi %hi\(0\), %g1
+ 80824: 10 bf ff f7 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80828: 82 10 60 00 mov %g1, %g1 ! 0 <_PROCEDURE_LINKAGE_TABLE_-0x80800>
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: 9d e3 bf 98 save %sp, -104, %sp
+ 80c04: 2f 00 00 00 sethi %hi\(0\), %l7
+ 80c08: ee 05 e0 00 ld \[ %l7 \], %l7
+ 80c0c: ee 05 e0 00 ld \[ %l7 \], %l7
+ 80c10: 03 00 00 00 sethi %hi\(0\), %g1
+ 80c14: 82 10 60 10 or %g1, 0x10, %g1 ! 10 <_PROCEDURE_LINKAGE_TABLE_-0x807f0>
+ 80c18: c2 05 c0 01 ld \[ %l7 \+ %g1 \], %g1
+ 80c1c: c4 00 40 00 ld \[ %g1 \], %g2
+ 80c20: 84 00 a0 01 inc %g2
+ 80c24: 40 00 00 08 call 80c44 <slocal>
+ 80c28: c4 20 40 00 st %g2, \[ %g1 \]
+ 80c2c: 7f ff fe f8 call 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+ 80c30: 01 00 00 00 nop
+ 80c34: 7f ff fe f6 call 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+ 80c38: 01 00 00 00 nop
+ 80c3c: 81 c7 e0 08 ret
+ 80c40: 81 e8 00 00 restore
+
+00080c44 <slocal>:
+ 80c44: 81 c3 e0 08 retl
+ 80c48: 01 00 00 00 nop
+
+00080c4c <sglobal>:
+ 80c4c: 81 c3 e0 08 retl
+ 80c50: 01 00 00 00 nop
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.nd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.nd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.nd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 1 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0009040c .*15 R_SPARC_JMP_SLOT 00000000 sexternal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 5 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00090c00 00000016 R_SPARC_RELATIVE 00080c44
+00080c04 .*09 R_SPARC_HI22 00000000 __GOTT_BASE__ \+ 0
+00080c08 .*0c R_SPARC_LO10 00000000 __GOTT_BASE__ \+ 0
+00080c0c .*0c R_SPARC_LO10 00000000 __GOTT_INDEX__ \+ 0
+00090410 .*14 R_SPARC_GLOB_DAT 00090800 x \+ 0
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-lib.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,44 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ save %sp, -104, %sp
+ sethi %hi(__GOTT_BASE__), %l7
+ ld [%l7+%lo(__GOTT_BASE__)],%l7
+ ld [%l7+%lo(__GOTT_INDEX__)],%l7
+ sethi %hi(x), %g1
+ or %g1, %lo(x), %g1
+ ld [%l7+%g1], %g1
+ ld [%g1], %g2
+ add %g2, 1, %g2
+
+ call slocal, 0
+ st %g2, [%g1]
+
+ call sexternal, 0
+ nop
+
+ call sexternal, 0
+ nop
+
+ ret
+ restore
+ .size foo, .-foo
+
+ .type slocal, %function
+slocal:
+ retl
+ nop
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, %function
+sglobal:
+ retl
+ nop
+ .size sglobal, .-sglobal
+
+ .data
+ .4byte slocal
+
+ .comm x,4,4
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-static.d
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-static.d 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1-static.d 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,52 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: 05 00 02 41 sethi %hi\(0x90400\), %g2
+ 80800: R_SPARC_HI22 _GLOBAL_OFFSET_TABLE_\+0x8
+ 80804: 84 10 a0 08 or %g2, 8, %g2 ! 90408 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ 80804: R_SPARC_LO10 _GLOBAL_OFFSET_TABLE_\+0x8
+ 80808: c4 00 80 00 ld \[ %g2 \], %g2
+ 8080c: 81 c0 80 00 jmp %g2
+ 80810: 01 00 00 00 nop
+ 80814: 03 00 02 41 sethi %hi\(0x90400\), %g1
+ 80814: R_SPARC_HI22 _GLOBAL_OFFSET_TABLE_\+0xc
+ 80818: 82 10 60 0c or %g1, 0xc, %g1 ! 9040c <sglobal at plt>
+ 80818: R_SPARC_LO10 _GLOBAL_OFFSET_TABLE_\+0xc
+ 8081c: c2 00 40 00 ld \[ %g1 \], %g1
+ 80820: 81 c0 40 00 jmp %g1
+ 80824: 01 00 00 00 nop
+ 80828: 03 00 00 00 sethi %hi\(0\), %g1
+ 8082c: 10 bf ff f5 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80830: 82 10 60 00 mov %g1, %g1 ! 0 <_PROCEDURE_LINKAGE_TABLE_-0x80800>
+ 80834: 03 00 02 41 sethi %hi\(0x90400\), %g1
+ 80834: R_SPARC_HI22 _GLOBAL_OFFSET_TABLE_\+0x10
+ 80838: 82 10 60 10 or %g1, 0x10, %g1 ! 90410 <foo at plt>
+ 80838: R_SPARC_LO10 _GLOBAL_OFFSET_TABLE_\+0x10
+ 8083c: c2 00 40 00 ld \[ %g1 \], %g1
+ 80840: 81 c0 40 00 jmp %g1
+ 80844: 01 00 00 00 nop
+ 80848: 03 00 00 00 sethi %hi\(0\), %g1
+ 8084c: 10 bf ff ed b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80850: 82 10 60 01 or %g1, 1, %g1 ! 1 <_PROCEDURE_LINKAGE_TABLE_-0x807ff>
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: 9d e3 bf 98 save %sp, -104, %sp
+ 80c04: 7f ff ff 0c call 80834 <_PROCEDURE_LINKAGE_TABLE_\+0x34>
+ 80c04: R_SPARC_WDISP30 \.plt\+0x34
+ 80c08: 01 00 00 00 nop
+ 80c0c: 40 00 00 06 call 80c24 <sexternal>
+ 80c0c: R_SPARC_WDISP30 sexternal
+ 80c10: 01 00 00 00 nop
+ 80c14: 7f ff ff 00 call 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
+ 80c14: R_SPARC_WDISP30 \.plt\+0x14
+ 80c18: 01 00 00 00 nop
+ 80c1c: 81 c7 e0 08 ret
+ 80c20: 81 e8 00 00 restore
+
+00080c24 <sexternal>:
+ 80c24: 81 c3 e0 08 retl
+ 80c28: 01 00 00 00 nop
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.ld
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.ld 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.ld 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,30 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rela.dyn : { *(.rela.dyn) }
+ .rela.plt : { *(.rela.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x10000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+}
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,22 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0009040c .*15 R_SPARC_JMP_SLOT 00080814 sglobal \+ 0
+00090410 .*15 R_SPARC_JMP_SLOT 00080834 foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080c04 .*07 R_SPARC_WDISP30 00080800 \.plt \+ 34
+00080c0c .*07 R_SPARC_WDISP30 00080c24 sexternal \+ 0
+00080c14 .*07 R_SPARC_WDISP30 00080800 \.plt \+ 14
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00080800 .*09 R_SPARC_HI22 00090400 _GLOBAL_OFFSET_TABLE_ \+ 8
+00080804 .*0c R_SPARC_LO10 00090400 _GLOBAL_OFFSET_TABLE_ \+ 8
+00080814 .*09 R_SPARC_HI22 00090400 _GLOBAL_OFFSET_TABLE_ \+ c
+00080818 .*0c R_SPARC_LO10 00090400 _GLOBAL_OFFSET_TABLE_ \+ c
+0009040c .*03 R_SPARC_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 28
+00080834 .*09 R_SPARC_HI22 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00080838 .*0c R_SPARC_LO10 00090400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00090410 .*03 R_SPARC_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 48
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks1.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,25 @@
+ .text
+ .globl _start
+ .type _start, %function
+_start:
+ save %sp, -104, %sp
+
+ call foo, 0
+ nop
+
+ call sexternal, 0
+ nop
+
+ call sglobal, 0
+ nop
+
+ ret
+ restore
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, %function
+sexternal:
+ retl
+ nop
+ .size sexternal, .-sexternal
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks2-static.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks2-static.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks2-static.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,6 @@
+ .globl _start
+ .type _start, %function
+_start:
+ retl
+ nop
+ .end _start
Added: branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-sparc/vxworks2.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+ LOAD .* 0x00090000 0x00090000 .* RW 0x10000
+ DYNAMIC .*
+
+#...
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,307 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -drj.text
+#target: x86_64-*-*
+
+# PT_TLS layout is:
+# Offset from Offset from Name
+# TCB base TCB end
+# 0x00 -0xa0 sg1..sg8
+# 0x20 -0x80 sl1..sl8
+# 0x40 -0x60 sh1..sh8
+# 0x60 -0x40 bg1..bg8
+# 0x80 -0x20 bl1..bl8
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+401000 <fn2>:
+ [0-9a-f]+: 55[ ]+push %rbp
+ [0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp
+# GD -> IE because variable is not defined in executable
+ [0-9a-f]+: 48 8b 05 65 03 10 00[ ]+mov 1049445\(%rip\),%rax +# 501370 <.*>
+# -> R_X86_64_TPOFF64 sG1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is not defined in executable where
+# the variable is referenced through IE too
+ [0-9a-f]+: 48 8b 05 48 03 10 00[ ]+mov 1049416\(%rip\),%rax +# 501360 <.*>
+# -> R_X86_64_TPOFF64 sG2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with global variable defined in executable
+ [0-9a-f]+: 48 c7 c0 60 ff ff ff[ ]+mov \$0xf+60,%rax
+# sg1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with local variable defined in executable
+ [0-9a-f]+: 48 c7 c0 80 ff ff ff[ ]+mov \$0xf+80,%rax
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# GD -> LE with hidden variable defined in executable
+ [0-9a-f]+: 48 c7 c0 a0 ff ff ff[ ]+mov \$0xf+a0,%rax
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD -> LE
+ [0-9a-f]+: 48 c7 c0 60 ff ff ff[ ]+mov \$0xf+60,%rax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 90 81 ff ff ff[ ]+lea 0xf+81\(%rax\),%rdx
+# sl1+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 4c 8d 88 86 ff ff ff[ ]+lea 0xf+86\(%rax\),%r9
+# sl2+2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LD -> LE against hidden variables
+ [0-9a-f]+: 48 8d 90 a0 ff ff ff[ ]+lea 0xf+a0\(%rax\),%rdx
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 88 a7 ff ff ff[ ]+lea 0xf+a7\(%rax\),%rcx
+# sh2+3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE against global var
+ [0-9a-f]+: 64 4c 8b 0c 25 00 00[ ]+mov %fs:0x0,%r9
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 4c 03 0d d6 02 10 00[ ]+add 1049302\(%rip\),%r9 +# 501360 <.*>
+# -> R_X86_64_TPOFF64 sG2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against global var defined in exec
+ [0-9a-f]+: 64 4c 8b 14 25 00 00[ ]+mov %fs:0x0,%r10
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 4d 8d 92 60 ff ff ff[ ]+lea 0xf+60\(%r10\),%r10
+# sg1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against local var
+ [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 80 80 ff ff ff[ ]+lea 0xf+80\(%rax\),%rax
+# sl1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against hidden var
+ [0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 89 a0 ff ff ff[ ]+lea 0xf+a0\(%rcx\),%rcx
+# sh1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# Direct access through %fs
+# IE against global var
+ [0-9a-f]+: 48 8b 0d 81 02 10 00[ ]+mov 1049217\(%rip\),%rcx +# 501358 <.*>
+# -> R_X86_64_TPOFF64 sG5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 48 8b 11[ ]+mov %fs:\(%rcx\),%rdx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE->LE against local var
+ [0-9a-f]+: 49 c7 c3 90 ff ff ff[ ]+mov \$0xf+90,%r11
+# sl5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 4d 8b 23[ ]+mov %fs:\(%r11\),%r12
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE->LE against hidden var
+ [0-9a-f]+: 48 c7 c2 b0 ff ff ff[ ]+mov \$0xf+b0,%rdx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 48 8b 12[ ]+mov %fs:\(%rdx\),%rdx
+# sh5
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: c9[ ]+leaveq *
+ [0-9a-f]+: c3[ ]+retq *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+
+[0-9a-f]+ <_start>:
+ [0-9a-f]+: 55[ ]+push %rbp
+ [0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp
+# IE against global var
+ [0-9a-f]+: 64 4c 8b 1c 25 00 00[ ]+mov %fs:0x0,%r11
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 4c 03 1d 4a 02 10 00[ ]+add 1049162\(%rip\),%r11 +# 501368 <.*>
+# -> R_X86_64_TPOFF64 sG6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against global var defined in exec
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 92 d4 ff ff ff[ ]+lea 0xf+d4\(%rdx\),%rdx
+# bg6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against local var
+ [0-9a-f]+: 64 4c 8b 24 25 00 00[ ]+mov %fs:0x0,%r12
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 49 81 c4 f4 ff ff ff[ ]+add \$0xf+f4,%r12
+# bl6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# direct %fs access IE -> LE against local var
+ [0-9a-f]+: 48 c7 c2 fc ff ff ff[ ]+mov \$0xf+fc,%rdx
+# bl8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 48 8b 02[ ]+mov %fs:\(%rdx\),%rax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# IE -> LE against hidden but not local var
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 92 b4 ff ff ff[ ]+lea 0xf+b4\(%rdx\),%rdx
+# sh6
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# direct %fs access IE -> LE against hidden but not local var
+ [0-9a-f]+: 48 c7 c2 bc ff ff ff[ ]+mov \$0xf+bc,%rdx
+# sh8
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 48 8b 02[ ]+mov %fs:\(%rdx\),%rax
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE, global var defined in exec
+ [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 8d 90 64 ff ff ff[ ]+lea 0xf+64\(%rax\),%rdx
+# sg2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE, local var, non-canonical sequence
+ [0-9a-f]+: 49 c7 c1 e6 ff ff ff[ ]+mov \$0xf+e6,%r9
+# bl2+2
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 4c 01 ca[ ]+add %r9,%rdx
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE, hidden var defined in exec, non-canonical sequence
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 00 00 *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 48 81 c2 a5 ff ff ff[ ]+add \$0xf+a5,%rdx
+# sh2+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# Direct %fs access
+# LE, global var defined in exec
+ [0-9a-f]+: 64 48 8b 04 25 68 ff[ ]+mov %fs:0xf+68,%rax
+ [0-9a-f]+: ff ff *
+# sg3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE, local var
+ [0-9a-f]+: 64 4c 8b 14 25 eb ff[ ]+mov %fs:0xf+eb,%r10
+ [0-9a-f]+: ff ff *
+# bl3+3
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+# LE, hidden var defined in exec
+ [0-9a-f]+: 64 48 8b 14 25 a9 ff[ ]+mov %fs:0xf+a9,%rdx
+ [0-9a-f]+: ff ff *
+# sh3+1
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: 90[ ]+nop *
+ [0-9a-f]+: c9[ ]+leaveq *
+ [0-9a-f]+: c3[ ]+retq *
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,141 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --64
+#ld: -shared -melf_x86_64
+#readelf: -WSsrl
+#target: x86_64-*-*
+
+There are 15 section headers, starting at offset 0x[0-9a-f]+:
+
+Section Headers:
+ \[Nr\] Name +Type +Address +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 00 +0 +0 +0
+ \[ 1\] .interp +.*
+ \[ 2\] .hash +.*
+ \[ 3\] .dynsym +.*
+ \[ 4\] .dynstr +.*
+ \[ 5\] .rela.dyn +.*
+ \[ 6\] .text +PROGBITS +0+401000 0+1000 0+1f6 00 +AX +0 +0 +4096
+ \[ 7\] .tdata +PROGBITS +0+5011f6 0+11f6 0+60 00 WAT +0 +0 +1
+ \[ 8\] .tbss +NOBITS +0+501256 0+1256 0+40 00 WAT +0 +0 +1
+ \[ 9\] .dynamic +DYNAMIC +0+501258 0+1258 0+100 10 +WA +4 +0 +8
+ \[10\] .got +PROGBITS +0+501358 0+1358 0+20 08 +WA +0 +0 +8
+ \[11\] .got.plt +PROGBITS +0+501378 0+1378 0+18 08 +WA +0 +0 +8
+ \[12\] .shstrtab +.*
+ \[13\] .symtab +.*
+ \[14\] .strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x401108
+There are 6 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ PHDR.*
+ INTERP.*
+.*Requesting program interpreter.*
+ LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11f6 0x0+11f6 R E 0x100000
+ LOAD +0x0+11f6 0x0+5011f6 0x0+5011f6 0x0+19a 0x0+19a RW 0x100000
+ DYNAMIC +0x0+1258 0x0+501258 0x0+501258 0x0+100 0x0+100 RW 0x8
+ TLS +0x0+11f6 0x0+5011f6 0x0+5011f6 0x0+60 0x0+a0 R +0x1
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 *
+ 01 +.interp *
+ 02 +.interp .hash .dynsym .dynstr .rela.dyn .text *
+ 03 +.tdata .dynamic .got .got.plt *
+ 04 +.dynamic *
+ 05 +.tdata .tbss *
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
+ +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend
+0+501358 0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
+0+501360 0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
+0+501368 0+400000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
+0+501370 0+500000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
+
+Symbol table '.dynsym' contains 8 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+[0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: 0+[0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: 0+[0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+
+Symbol table '.symtab' contains 67 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 *
+ +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +7 sl1
+ +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +7 sl2
+ +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +7 sl3
+ +[0-9]+: 0+2c +0 TLS +LOCAL DEFAULT +7 sl4
+ +[0-9]+: 0+30 +0 TLS +LOCAL DEFAULT +7 sl5
+ +[0-9]+: 0+34 +0 TLS +LOCAL DEFAULT +7 sl6
+ +[0-9]+: 0+38 +0 TLS +LOCAL DEFAULT +7 sl7
+ +[0-9]+: 0+3c +0 TLS +LOCAL DEFAULT +7 sl8
+ +[0-9]+: 0+80 +0 TLS +LOCAL DEFAULT +8 bl1
+ +[0-9]+: 0+84 +0 TLS +LOCAL DEFAULT +8 bl2
+ +[0-9]+: 0+88 +0 TLS +LOCAL DEFAULT +8 bl3
+ +[0-9]+: 0+8c +0 TLS +LOCAL DEFAULT +8 bl4
+ +[0-9]+: 0+90 +0 TLS +LOCAL DEFAULT +8 bl5
+ +[0-9]+: 0+94 +0 TLS +LOCAL DEFAULT +8 bl6
+ +[0-9]+: 0+98 +0 TLS +LOCAL DEFAULT +8 bl7
+ +[0-9]+: 0+9c +0 TLS +LOCAL DEFAULT +8 bl8
+ +[0-9]+: 0+0 +0 TLS +LOCAL HIDDEN +7 _TLS_MODULE_BASE_
+ +[0-9]+: 0+501258 +0 OBJECT LOCAL HIDDEN 9 _DYNAMIC
+ +[0-9]+: 0+501378 +0 OBJECT LOCAL HIDDEN 11 _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +7 sg8
+ +[0-9]+: 0+7c +0 TLS +GLOBAL DEFAULT +8 bg8
+ +[0-9]+: 0+74 +0 TLS +GLOBAL DEFAULT +8 bg6
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+68 +0 TLS +GLOBAL DEFAULT +8 bg3
+ +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +7 sg3
+ +[0-9]+: 0+48 +0 TLS +GLOBAL HIDDEN +7 sh3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +7 sg4
+ +[0-9]+: 0+10 +0 TLS +GLOBAL DEFAULT +7 sg5
+ +[0-9]+: 0+70 +0 TLS +GLOBAL DEFAULT +8 bg5
+ +[0-9]+: 0+58 +0 TLS +GLOBAL HIDDEN +7 sh7
+ +[0-9]+: 0+5c +0 TLS +GLOBAL HIDDEN +7 sh8
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +7 sg1
+ +[0-9]+: 0+401108 +0 FUNC +GLOBAL DEFAULT +6 _start
+ +[0-9]+: 0+4c +0 TLS +GLOBAL HIDDEN +7 sh4
+ +[0-9]+: 0+78 +0 TLS +GLOBAL DEFAULT +8 bg7
+ +[0-9]+: 0+50 +0 TLS +GLOBAL HIDDEN +7 sh5
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: 0+401000 +0 FUNC +GLOBAL DEFAULT +6 fn2
+ +[0-9]+: 0+4 +0 TLS +GLOBAL DEFAULT +7 sg2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: 0+40 +0 TLS +GLOBAL HIDDEN +7 sh1
+ +[0-9]+: 0+14 +0 TLS +GLOBAL DEFAULT +7 sg6
+ +[0-9]+: 0+18 +0 TLS +GLOBAL DEFAULT +7 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+ +[0-9]+: 0+44 +0 TLS +GLOBAL HIDDEN +7 sh2
+ +[0-9]+: 0+54 +0 TLS +GLOBAL HIDDEN +7 sh6
+ +[0-9]+: 0+64 +0 TLS +GLOBAL DEFAULT +8 bg2
+ +[0-9]+: 0+60 +0 TLS +GLOBAL DEFAULT +8 bg1
+ +[0-9]+: 0+6c +0 TLS +GLOBAL DEFAULT +8 bg4
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,128 @@
+ /* Force .data aligned to 4K, so that .got very likely gets at
+ 0x5021a0 (0x60 bytes .tdata and 0x140 bytes .dynamic) */
+ .data
+ .balign 4096
+ .section ".tdata", "awT", @progbits
+ .globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
+ .globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+ .hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+sg1: .long 17
+sg2: .long 18
+sg3: .long 19
+sg4: .long 20
+sg5: .long 21
+sg6: .long 22
+sg7: .long 23
+sg8: .long 24
+sl1: .long 65
+sl2: .long 66
+sl3: .long 67
+sl4: .long 68
+sl5: .long 69
+sl6: .long 70
+sl7: .long 71
+sl8: .long 72
+sh1: .long 257
+sh2: .long 258
+sh3: .long 259
+sh4: .long 260
+sh5: .long 261
+sh6: .long 262
+sh7: .long 263
+sh8: .long 264
+ /* Force .text aligned to 4K, so it very likely gets at 0x401000. */
+ .text
+ .balign 4096
+ .globl fn2
+ .type fn2, at function
+fn2:
+ pushq %rbp
+ movq %rsp, %rbp
+
+ /* GD -> IE because variable is not defined in executable */
+ leaq sG1 at tlsdesc(%rip), %rax
+ call *sG1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is not defined in executable where
+ the variable is referenced through IE too */
+ leaq sG2 at tlsdesc(%rip), %rax
+ call *sG2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with global variable defined in executable */
+ leaq sg1 at tlsdesc(%rip), %rax
+ call *sg1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with local variable defined in executable */
+ leaq sl1 at tlsdesc(%rip), %rax
+ call *sl1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> LE with hidden variable defined in executable */
+ leaq sh1 at tlsdesc(%rip), %rax
+ call *sh1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* LD -> LE */
+ leaq _TLS_MODULE_BASE_ at tlsdesc(%rip), %rax
+ call *_TLS_MODULE_BASE_ at tlscall(%rax)
+ nop;nop
+ leaq 1+sl1 at dtpoff(%rax), %rdx
+ nop;nop
+ leaq sl2 at dtpoff+2(%rax), %r9
+ nop;nop;nop;nop
+
+ /* LD -> LE against hidden variables */
+ leaq sh1 at dtpoff(%rax), %rdx
+ nop;nop
+ leaq 3+sh2 at dtpoff(%rax), %rcx
+ nop;nop;nop;nop
+
+ /* IE against global var */
+ movq %fs:0, %r9
+ nop;nop
+ addq sG2 at gottpoff(%rip), %r9
+ nop;nop;nop;nop
+
+ /* IE -> LE against global var defined in exec */
+ movq %fs:0, %r10
+ nop;nop
+ addq sg1 at gottpoff(%rip), %r10
+ nop;nop;nop;nop
+
+ /* IE -> LE against local var */
+ movq %fs:0, %rax
+ nop;nop
+ addq sl1 at gottpoff(%rip), %rax
+ nop;nop;nop;nop
+
+ /* IE -> LE against hidden var */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sh1 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* Direct access through %fs */
+
+ /* IE against global var */
+ movq sG5 at gottpoff(%rip), %rcx
+ nop;nop
+ movq %fs:(%rcx), %rdx
+ nop;nop;nop;nop
+
+ /* IE->LE against local var */
+ movq sl5 at gottpoff(%rip), %r11
+ nop;nop
+ movq %fs:(%r11), %r12
+ nop;nop;nop;nop
+
+ /* IE->LE against hidden var */
+ movq sh5 at gottpoff(%rip), %rdx
+ nop;nop
+ movq %fs:(%rdx), %rdx
+ nop;nop;nop;nop
+
+ leave
+ ret
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,12 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -sj.got
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Contents of section .got:
+ 501358 00000000 00000000 00000000 00000000 .*
+ 501368 00000000 00000000 00000000 00000000 .*
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.td
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.td 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsbindesc.td 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+#source: tlsbindesc.s
+#source: tlsbin.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -sj.tdata
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Contents of section .tdata:
+ 5011f6 11000000 12000000 13000000 14000000 .*
+ 501206 15000000 16000000 17000000 18000000 .*
+ 501216 41000000 42000000 43000000 44000000 .*
+ 501226 45000000 46000000 47000000 48000000 .*
+ 501236 01010000 02010000 03010000 04010000 .*
+ 501246 05010000 06010000 07010000 08010000 .*
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,204 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -drj.text
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+[0-9a-f]+ <fn1>:
+ +[0-9a-f]+: 55[ ]+push %rbp
+ +[0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD
+ +[0-9a-f]+: 48 8d 05 89 03 10 00[ ]+lea 1049481\(%rip\),%rax +# 101398 <.*>
+# -> R_X86_64_TLSDESC sg1
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE because variable is referenced through IE too
+ +[0-9a-f]+: 48 8b 05 1c 03 10 00[ ]+mov 1049372\(%rip\),%rax +# 101338 <.*>
+# -> R_X86_64_TPOFF64 sg2
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD against local variable
+ +[0-9a-f]+: 48 8d 05 3f 03 10 00[ ]+lea 1049407\(%rip\),%rax +# 101368 <.*>
+# -> R_X86_64_TLSDESC [0 0x2000000000000000]
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE against local variable referenced through IE too
+ +[0-9a-f]+: 48 8b 05 d2 02 10 00[ ]+mov 1049298\(%rip\),%rax +# 101308 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x24
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD against hidden and local variable
+ +[0-9a-f]+: 48 8d 05 65 03 10 00[ ]+lea 1049445\(%rip\),%rax +# 1013a8 <.*>
+# -> R_X86_64_TLSDESC [0 0x4000000000000000]
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden and local variable referenced through IE too
+ +[0-9a-f]+: 48 8b 05 f0 02 10 00[ ]+mov 1049328\(%rip\),%rax +# 101340 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x44
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD against hidden but not local variable
+ +[0-9a-f]+: 48 8d 05 1b 03 10 00[ ]+lea 1049371\(%rip\),%rax +# 101378 <.*>
+# -> R_X86_64_TLSDESC [0 0x6000000000000000]
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE against hidden but not local variable referenced through IE too
+ +[0-9a-f]+: 48 8b 05 ae 02 10 00[ ]+mov 1049262\(%rip\),%rax +# 101318 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x64
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# LD
+ +[0-9a-f]+: 48 8d 05 11 03 10 00[ ]+lea 1049361\(%rip\),%rax +# 101388 <.*>
+# -> R_X86_64_TLSDESC [0 0x000000000000000]
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8d 90 20 00 00 00[ ]+lea 0x20\(%rax\),%rdx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 4c 8d 88 26 00 00 00[ ]+lea 0x26\(%rax\),%r9
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# LD against hidden and local variables
+ +[0-9a-f]+: 48 8d 90 40 00 00 00[ ]+lea 0x40\(%rax\),%rdx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8d 88 47 00 00 00[ ]+lea 0x47\(%rax\),%rcx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# LD against hidden but not local variables
+ +[0-9a-f]+: 4c 8d a0 60 00 00 00[ ]+lea 0x60\(%rax\),%r12
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8d 88 65 00 00 00[ ]+lea 0x65\(%rax\),%rcx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against global var
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 71 02 10 00[ ]+add 1049201\(%rip\),%rcx +# 101338 <.*>
+# -> R_X86_64_TPOFF64 sg2
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against local var
+ +[0-9a-f]+: 64 4c 8b 34 25 00 00[ ]+mov %fs:0x0,%r14
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 4c 03 35 2b 02 10 00[ ]+add 1049131\(%rip\),%r14 +# 101308 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x24
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against hidden and local var
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 4d 02 10 00[ ]+add 1049165\(%rip\),%rcx +# 101340 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x44
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against hidden but not local var
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 0f 02 10 00[ ]+add 1049103\(%rip\),%rcx +# 101318 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x64
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# Direct access through %fs
+# IE against global var
+ +[0-9a-f]+: 48 8b 0d 0c 02 10 00[ ]+mov 1049100\(%rip\),%rcx +# 101320 <.*>
+# -> R_X86_64_TPOFF64 sg5
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 48 8b 11[ ]+mov %fs:\(%rcx\),%rdx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against local var
+ +[0-9a-f]+: 4c 8b 15 eb 01 10 00[ ]+mov 1049067\(%rip\),%r10 +# 101310 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x30
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 4d 8b 22[ ]+mov %fs:\(%r10\),%r12
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against hidden and local var
+ +[0-9a-f]+: 48 8b 15 f2 01 10 00[ ]+mov 1049074\(%rip\),%rdx +# 101328 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x50
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 48 8b 12[ ]+mov %fs:\(%rdx\),%rdx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE against hidden but not local var
+ +[0-9a-f]+: 48 8b 0d e9 01 10 00[ ]+mov 1049065\(%rip\),%rcx +# 101330 <.*>
+# -> R_X86_64_TPOFF64 *ABS*+0x70
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 48 8b 11[ ]+mov %fs:\(%rcx\),%rdx
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: c9[ ]+leaveq *
+ +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: 90[ ]+nop *
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.pd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.pd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.pd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,26 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -drj.plt
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .plt:
+
+0000000000000470 <.*@plt-0x10>:
+ 470: ff 35 e2 0e 10 00 pushq 1052386\(%rip\) # 101358 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ 476: ff 25 e4 0e 10 00 jmpq \*1052388\(%rip\) # 101360 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ 47c: 90 nop *
+ 47d: 90 nop *
+ 47e: 90 nop *
+ 47f: 90 nop *
+0000000000000480 <.*@plt>:
+ 480: ff 35 d2 0e 10 00 pushq 1052370\(%rip\) # 101358 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ 486: ff 25 bc 0e 10 00 jmpq \*1052348\(%rip\) # 101348 <_DYNAMIC\+0x190>
+ 48c: 90 nop *
+ 48d: 90 nop *
+ 48e: 90 nop *
+ 48f: 90 nop *
+
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,164 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --64
+#ld: -shared -melf_x86_64
+#readelf: -WSsrld
+#target: x86_64-*-*
+
+There are 16 section headers, starting at offset 0x[0-9a-f]+:
+
+Section Headers:
+ \[Nr\] Name +Type +Address +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 00 +0 +0 +0
+ \[ 1\] .hash +.*
+ \[ 2\] .dynsym +.*
+ \[ 3\] .dynstr +.*
+ \[ 4\] .rela.dyn +.*
+ \[ 5\] .rela.plt +.*
+ \[ 6\] .plt +PROGBITS +0+470 0+470 0+20 10 +AX +0 +0 +4
+ \[ 7\] .text +PROGBITS +0+1000 0+1000 0+154 00 +AX +0 +0 4096
+ \[ 8\] .tdata +PROGBITS +0+101154 0+1154 0+60 00 WAT +0 +0 +1
+ \[ 9\] .tbss +NOBITS +0+1011b4 0+11b4 0+20 00 WAT +0 +0 +1
+ \[10\] .dynamic +DYNAMIC +0+1011b8 0+11b8 0+150 10 +WA +3 +0 +8
+ \[11\] .got +PROGBITS +0+101308 0+1308 0+48 08 +WA +0 +0 +8
+ \[12\] .got.plt +PROGBITS +0+101350 0+1350 0+68 08 +WA +0 +0 +8
+ \[13\] .shstrtab +.*
+ \[14\] .symtab +.*
+ \[15\] .strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is DYN \(Shared object file\)
+Entry point 0x1000
+There are 4 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x100000
+ LOAD +0x0+1154 0x0+101154 0x0+101154 0x0+264 0x0+264 RW +0x100000
+ DYNAMIC +0x0+11b8 0x0+1011b8 0x0+1011b8 0x0+150 0x0+150 RW +0x8
+ TLS +0x0+1154 0x0+101154 0x0+101154 0x0+60 0x0+80 R +0x1
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 +.hash .dynsym .dynstr .rela.dyn .rela.plt .plt .text *
+ 01 +.tdata .dynamic .got .got.plt *
+ 02 +.dynamic *
+ 03 +.tdata .tbss *
+
+Dynamic section at offset 0x[0-9a-f]+ contains 16 entries:
+ +Tag +Type +Name/Value
+ 0x[0-9a-f]+ +\(HASH\).*
+ 0x[0-9a-f]+ +\(STRTAB\).*
+ 0x[0-9a-f]+ +\(SYMTAB\).*
+ 0x[0-9a-f]+ +\(STRSZ\).*
+ 0x[0-9a-f]+ +\(SYMENT\).*
+ 0x[0-9a-f]+ +\(PLTGOT\).*
+ 0x[0-9a-f]+ +\(PLTRELSZ\).*
+ 0x[0-9a-f]+ +\(PLTREL\).*
+ 0x[0-9a-f]+ +\(JMPREL\).*
+ 0x[0-9a-f]+ +\(TLSDESC_PLT\) +0x480
+ 0x[0-9a-f]+ +\(TLSDESC_GOT\) +0x101348
+ 0x[0-9a-f]+ +\(RELA\).*
+ 0x[0-9a-f]+ +\(RELASZ\).*
+ 0x[0-9a-f]+ +\(RELAENT\).*
+ 0x[0-9a-f]+ +\(FLAGS\).*
+ 0x[0-9a-f]+ +\(NULL\).*
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
+ +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
+0+101308 0+12 R_X86_64_TPOFF64 +0+24
+0+101310 0+12 R_X86_64_TPOFF64 +0+30
+0+101318 0+12 R_X86_64_TPOFF64 +0+64
+0+101328 0+12 R_X86_64_TPOFF64 +0+50
+0+101330 0+12 R_X86_64_TPOFF64 +0+70
+0+101340 0+12 R_X86_64_TPOFF64 +0+44
+0+101320 0+700000012 R_X86_64_TPOFF64 +0+10 sg5 \+ 0
+0+101338 0+b00000012 R_X86_64_TPOFF64 +0+4 sg2 \+ 0
+
+Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 5 entries:
+ +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend
+0+101398 0+800000024 R_X86_64_TLSDESC +0+ sg1 \+ 0
+0+101368 0+24 R_X86_64_TLSDESC +0+20
+0+1013a8 0+24 R_X86_64_TLSDESC +0+40
+0+101378 0+24 R_X86_64_TLSDESC +0+60
+0+101388 0+24 R_X86_64_TLSDESC +0+
+
+Symbol table '.dynsym' contains 16 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +8 sg8
+ +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +8 sg3
+ +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +8 sg4
+ +[0-9]+: 0+10 +0 TLS +GLOBAL DEFAULT +8 sg5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +8 sg1
+ +[0-9]+: 0+1000 +0 FUNC +GLOBAL DEFAULT +7 fn1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+4 +0 TLS +GLOBAL DEFAULT +8 sg2
+ +[0-9]+: 0+14 +0 TLS +GLOBAL DEFAULT +8 sg6
+ +[0-9]+: 0+18 +0 TLS +GLOBAL DEFAULT +8 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+
+Symbol table '.symtab' contains 55 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +15 *
+ +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +8 sl1
+ +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +8 sl2
+ +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +8 sl3
+ +[0-9]+: 0+2c +0 TLS +LOCAL DEFAULT +8 sl4
+ +[0-9]+: 0+30 +0 TLS +LOCAL DEFAULT +8 sl5
+ +[0-9]+: 0+34 +0 TLS +LOCAL DEFAULT +8 sl6
+ +[0-9]+: 0+38 +0 TLS +LOCAL DEFAULT +8 sl7
+ +[0-9]+: 0+3c +0 TLS +LOCAL DEFAULT +8 sl8
+ +[0-9]+: 0+60 +0 TLS +LOCAL HIDDEN +9 sH1
+ +[0-9]+: 0+ +0 TLS +LOCAL HIDDEN +8 _TLS_MODULE_BASE_
+ +[0-9]+: 0+1011b8 +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC
+ +[0-9]+: 0+48 +0 TLS +LOCAL HIDDEN +8 sh3
+ +[0-9]+: 0+64 +0 TLS +LOCAL HIDDEN +9 sH2
+ +[0-9]+: 0+78 +0 TLS +LOCAL HIDDEN +9 sH7
+ +[0-9]+: 0+58 +0 TLS +LOCAL HIDDEN +8 sh7
+ +[0-9]+: 0+5c +0 TLS +LOCAL HIDDEN +8 sh8
+ +[0-9]+: 0+6c +0 TLS +LOCAL HIDDEN +9 sH4
+ +[0-9]+: 0+4c +0 TLS +LOCAL HIDDEN +8 sh4
+ +[0-9]+: 0+68 +0 TLS +LOCAL HIDDEN +9 sH3
+ +[0-9]+: 0+50 +0 TLS +LOCAL HIDDEN +8 sh5
+ +[0-9]+: 0+70 +0 TLS +LOCAL HIDDEN +9 sH5
+ +[0-9]+: 0+74 +0 TLS +LOCAL HIDDEN +9 sH6
+ +[0-9]+: 0+7c +0 TLS +LOCAL HIDDEN +9 sH8
+ +[0-9]+: 0+40 +0 TLS +LOCAL HIDDEN +8 sh1
+ +[0-9]+: 0+101350 +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+44 +0 TLS +LOCAL HIDDEN +8 sh2
+ +[0-9]+: 0+54 +0 TLS +LOCAL HIDDEN +8 sh6
+ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +8 sg8
+ +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +8 sg3
+ +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +8 sg4
+ +[0-9]+: 0+10 +0 TLS +GLOBAL DEFAULT +8 sg5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT +8 sg1
+ +[0-9]+: 0+1000 +0 FUNC +GLOBAL DEFAULT +7 fn1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+4 +0 TLS +GLOBAL DEFAULT +8 sg2
+ +[0-9]+: 0+14 +0 TLS +GLOBAL DEFAULT +8 sg6
+ +[0-9]+: 0+18 +0 TLS +GLOBAL DEFAULT +8 sg7
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,157 @@
+ /* Force .data aligned to 4K, so .got very likely gets at 0x102190
+ (0x60 bytes .tdata and 0x130 bytes .dynamic) */
+ .data
+ .balign 4096
+ .section ".tdata", "awT", @progbits
+ .globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
+ .globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+ .hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
+sg1: .long 17
+sg2: .long 18
+sg3: .long 19
+sg4: .long 20
+sg5: .long 21
+sg6: .long 22
+sg7: .long 23
+sg8: .long 24
+sl1: .long 65
+sl2: .long 66
+sl3: .long 67
+sl4: .long 68
+sl5: .long 69
+sl6: .long 70
+sl7: .long 71
+sl8: .long 72
+sh1: .long 257
+sh2: .long 258
+sh3: .long 259
+sh4: .long 260
+sh5: .long 261
+sh6: .long 262
+sh7: .long 263
+sh8: .long 264
+ /* Force .text aligned to 4K, so it very likely gets at 0x1000. */
+ .text
+ .balign 4096
+ .globl fn1
+ .type fn1, at function
+fn1:
+ pushq %rbp
+ movq %rsp, %rbp
+ nop;nop;nop;nop
+
+ /* GD */
+ leaq sg1 at tlsdesc(%rip), %rax
+ call *sg1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE because variable is referenced through IE too */
+ leaq sg2 at tlsdesc(%rip), %rax
+ call *sg2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD against local variable */
+ leaq sl1 at tlsdesc(%rip), %rax
+ call *sl1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against local variable referenced through IE too */
+ leaq sl2 at tlsdesc(%rip), %rax
+ call *sl2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD against hidden and local variable */
+ leaq sh1 at tlsdesc(%rip), %rax
+ call *sh1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden and local variable referenced through
+ IE too */
+ leaq sh2 at tlsdesc(%rip), %rax
+ call *sh2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD against hidden but not local variable */
+ leaq sH1 at tlsdesc(%rip), %rax
+ call *sH1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE against hidden but not local variable referenced through
+ IE too */
+ leaq sH2 at tlsdesc(%rip), %rax
+ call *sH2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* LD */
+ leaq _TLS_MODULE_BASE_ at tlsdesc(%rip), %rax
+ call *_TLS_MODULE_BASE_ at tlscall(%rax)
+ nop;nop
+ leaq sl1 at dtpoff(%rax), %rdx
+ nop;nop
+ leaq 2+sl2 at dtpoff(%rax), %r9
+ nop;nop;nop;nop
+
+ /* LD against hidden and local variables */
+ leaq sh1 at dtpoff(%rax), %rdx
+ nop;nop
+ leaq sh2 at dtpoff+3(%rax), %rcx
+ nop;nop;nop;nop
+
+ /* LD against hidden but not local variables */
+ leaq sH1 at dtpoff(%rax), %r12
+ nop;nop
+ leaq sH2 at dtpoff+1(%rax), %rcx
+ nop;nop
+
+ /* IE against global var */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sg2 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* IE against local var */
+ movq %fs:0, %r14
+ nop;nop
+ addq sl2 at gottpoff(%rip), %r14
+ nop;nop;nop;nop
+
+ /* IE against hidden and local var */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sh2 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* IE against hidden but not local var */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sH2 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* Direct access through %fs */
+
+ /* IE against global var */
+ movq sg5 at gottpoff(%rip), %rcx
+ nop;nop
+ movq %fs:(%rcx), %rdx
+ nop;nop;nop;nop
+
+ /* IE against local var */
+ movq sl5 at gottpoff(%rip), %r10
+ nop;nop
+ movq %fs:(%r10), %r12
+ nop;nop;nop;nop
+
+ /* IE against hidden and local var */
+ movq sh5 at gottpoff(%rip), %rdx
+ nop;nop
+ movq %fs:(%rdx), %rdx
+ nop;nop;nop;nop
+
+ /* IE against hidden but not local var */
+ movq sH5 at gottpoff(%rip), %rcx
+ nop;nop
+ movq %fs:(%rcx), %rdx
+ nop;nop;nop;nop
+
+ leave
+ ret
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.sd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.sd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.sd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,23 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -s -j.got -j.got.plt
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Contents of section \.got:
+ 101308 00000000 00000000 00000000 00000000 .*
+ 101318 00000000 00000000 00000000 00000000 .*
+ 101328 00000000 00000000 00000000 00000000 .*
+ 101338 00000000 00000000 00000000 00000000 .*
+ 101348 00000000 00000000 .*
+Contents of section \.got\.plt:
+ 101350 b8111000 00000000 00000000 00000000 .*
+ 101360 00000000 00000000 00000000 00000000 .*
+ 101370 00000000 00000000 00000000 00000000 .*
+ 101380 00000000 00000000 00000000 00000000 .*
+ 101390 00000000 00000000 00000000 00000000 .*
+ 1013a0 00000000 00000000 00000000 00000000 .*
+ 1013b0 00000000 00000000 .*
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.td
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.td 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsdesc.td 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,16 @@
+#source: tlsdesc.s
+#source: tlspic2.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -sj.tdata
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Contents of section .tdata:
+ 101154 11000000 12000000 13000000 14000000 .*
+ 101164 15000000 16000000 17000000 18000000 .*
+ 101174 41000000 42000000 43000000 44000000 .*
+ 101184 45000000 46000000 47000000 48000000 .*
+ 101194 01010000 02010000 03010000 04010000 .*
+ 1011a4 05010000 06010000 07010000 08010000 .*
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.dd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.dd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.dd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,167 @@
+#source: tlsgdesc.s
+#as: --64
+#ld: -shared -melf_x86_64
+#objdump: -drj.text
+#target: x86_64-*-*
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+[0-9a-f]+ <fc1>:
+ +[0-9a-f]+: 55[ ]+push %rbp
+ +[0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 5e 02 10 00[ ]+add 1049182\(%rip\),%rcx +# 100660 <.*>
+# -> R_X86_64_TPOFF64 sG3
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 68 02 10 00[ ]+add 1049192\(%rip\),%rcx +# 100680 <.*>
+# -> R_X86_64_TPOFF64 sG4
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD, gd first
+ +[0-9a-f]+: 66 48 8d 3d 6c 02 10[ ]+lea 1049196\(%rip\),%rdi +# 100690 <.*>
+ +[0-9a-f]+: 00 *
+# -> R_X86_64_DTPMOD64 sG1
+ +[0-9a-f]+: 66 66 48 e8 9c ff ff[ ]+callq [0-9a-f]+ <.*>
+ +[0-9a-f]+: ff[ ]+
+# -> R_X86_64_JUMP_SLOT __tls_get_addr
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8d 05 a1 02 10 00[ ]+lea 1049249\(%rip\),%rax +# 1006d8 <.*>
+# -> R_X86_64_TLSDESC sG1
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD, desc first
+ +[0-9a-f]+: 48 8d 05 84 02 10 00[ ]+lea 1049220\(%rip\),%rax +# 1006c8 <.*>
+# -> R_X86_64_TLSDESC sG2
+ +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\)
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 66 48 8d 3d 1e 02 10[ ]+lea 1049118\(%rip\),%rdi +# 100670 <.*>
+ +[0-9a-f]+: 00 *
+# -> R_X86_64_DTPMOD64 sG2
+ +[0-9a-f]+: 66 66 48 e8 6e ff ff[ ]+callq [0-9a-f]+ <.*>
+ +[0-9a-f]+: ff[ ]+
+# -> R_X86_64_JUMP_SLOT __tls_get_addr
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE, gd first, after IE use
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 48 03 05 f2 01 10 00[ ]+add 1049074\(%rip\),%rax +# 100660 <.*>
+# -> R_X86_64_TPOFF64 sG3
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8b 05 e7 01 10 00[ ]+mov 1049063\(%rip\),%rax +# 100660 <.*>
+# -> R_X86_64_TPOFF64 sG3
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE, desc first, after IE use
+ +[0-9a-f]+: 48 8b 05 fa 01 10 00[ ]+mov 1049082\(%rip\),%rax +# 100680 <.*>
+# -> R_X86_64_TPOFF64 sG4
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 48 03 05 e4 01 10 00[ ]+add 1049060\(%rip\),%rax +# 100680 <.*>
+# -> R_X86_64_TPOFF64 sG4
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE, gd first, before IE use
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 48 03 05 b8 01 10 00[ ]+add 1049016\(%rip\),%rax +# 100668 <.*>
+# -> R_X86_64_TPOFF64 sG5
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 8b 05 ad 01 10 00[ ]+mov 1049005\(%rip\),%rax +# 100668 <.*>
+# -> R_X86_64_TPOFF64 sG5
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# GD -> IE, desc first, before IE use
+ +[0-9a-f]+: 48 8b 05 c0 01 10 00[ ]+mov 1049024\(%rip\),%rax +# 100688 <.*>
+# -> R_X86_64_TPOFF64 sG6
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 48 03 05 aa 01 10 00[ ]+add 1049002\(%rip\),%rax +# 100688 <.*>
+# -> R_X86_64_TPOFF64 sG6
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 74 01 10 00[ ]+add 1048948\(%rip\),%rcx +# 100668 <.*>
+# -> R_X86_64_TPOFF64 sG5
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+# IE
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 00 00 *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 48 03 0d 7e 01 10 00[ ]+add 1048958\(%rip\),%rcx +# 100688 <.*>
+# -> R_X86_64_TPOFF64 sG6
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: 90[ ]+nop *
+ +[0-9a-f]+: c9[ ]+leaveq *
+ +[0-9a-f]+: c3[ ]+retq *
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.rd
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.rd 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.rd 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,107 @@
+#source: tlsgdesc.s
+#as: --64
+#ld: -shared -melf64_x86_64
+#readelf: -WSsrl
+#target: x86_64-*-*
+
+There are [0-9]+ section headers, starting at offset 0x.*:
+
+Section Headers:
+ \[Nr\] Name +Type +Address +Off +Size +ES Flg Lk Inf Al
+ \[ 0\] +NULL +0+ 0+ 0+ 0+ +0 +0 +0
+ \[ 1\] \.hash +.*
+ \[ 2\] \.dynsym +.*
+ \[ 3\] \.dynstr +.*
+ \[ 4\] \.rela.dyn +.*
+ \[ 5\] \.rela.plt +.*
+ \[ 6\] \.plt +.*
+ \[ 7\] \.text +.*
+ \[ 8\] \.dynamic +.*
+ \[ 9\] \.got +.*
+ \[10\] \.got.plt +.*
+ \[11\] \.shstrtab +.*
+ \[12\] \.symtab +.*
+ \[13\] \.strtab +.*
+Key to Flags:
+.*
+.*
+.*
+
+Elf file type is DYN \(Shared object file\)
+Entry point 0x[0-9a-f]+
+There are [0-9]+ program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
+ LOAD.*
+ LOAD.*
+ DYNAMIC.*
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 +.hash .dynsym .dynstr .rela.dyn .rela.plt .plt .text *
+ 01 +.dynamic .got .got.plt *
+ 02 +.dynamic *
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
+ +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend
+[0-9a-f]+ 0+200000012 R_X86_64_TPOFF64 +0+ sG3 \+ 0
+[0-9a-f]+ 0+300000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
+[0-9a-f]+ 0+400000010 R_X86_64_DTPMOD64 +0+ sG2 \+ 0
+[0-9a-f]+ 0+400000011 R_X86_64_DTPOFF64 +0+ sG2 \+ 0
+[0-9a-f]+ 0+500000012 R_X86_64_TPOFF64 +0+ sG4 \+ 0
+[0-9a-f]+ 0+800000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
+[0-9a-f]+ 0+a00000010 R_X86_64_DTPMOD64 +0+ sG1 \+ 0
+[0-9a-f]+ 0+a00000011 R_X86_64_DTPOFF64 +0+ sG1 \+ 0
+
+Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 3 entries:
+ +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend
+[0-9a-f]+ 0+600000007 R_X86_64_JUMP_SLOT +0+ __tls_get_addr \+ 0
+[0-9a-f]+ 0+a00000024 R_X86_64_TLSDESC +0+ sG1 \+ 0
+[0-9a-f]+ 0+400000024 R_X86_64_TLSDESC +0+ sG2 \+ 0
+
+Symbol table '.dynsym' contains 13 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND __tls_get_addr
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +7 fc1
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
+
+Symbol table '.symtab' contains 27 entries:
+ +Num: +Value +Size Type +Bind +Vis +Ndx Name
+ +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +2 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +3 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +4 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 *
+ +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 *
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG4
+ +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND __tls_get_addr
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG6
+ +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT +7 fc1
+ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG1
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata
+ +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end
Added: branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.s
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.s 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/tlsgdesc.s 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,106 @@
+ .text
+ .globl fc1
+ .type fc1, at function
+fc1:
+ pushq %rbp
+ movq %rsp, %rbp
+ nop;nop;nop;nop
+
+ /* IE against global var. */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sG3 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* IE against global var. */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sG4 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* GD, gd first. */
+ .byte 0x66
+ leaq sG1 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ leaq sG1 at tlsdesc(%rip), %rax
+ call *sG1 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD, desc first. */
+ leaq sG2 at tlsdesc(%rip), %rax
+ call *sG2 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ .byte 0x66
+ leaq sG2 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE, gd first, after IE use. */
+ .byte 0x66
+ leaq sG3 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ leaq sG3 at tlsdesc(%rip), %rax
+ call *sG3 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE, desc first, after IE use. */
+ leaq sG4 at tlsdesc(%rip), %rax
+ call *sG4 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ .byte 0x66
+ leaq sG4 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* GD -> IE, gd first, before IE use. */
+ .byte 0x66
+ leaq sG5 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ leaq sG5 at tlsdesc(%rip), %rax
+ call *sG5 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ /* GD -> IE, desc first, before IE use. */
+ leaq sG6 at tlsdesc(%rip), %rax
+ call *sG6 at tlscall(%rax)
+ nop;nop;nop;nop
+
+ .byte 0x66
+ leaq sG6 at tlsgd(%rip), %rdi
+ .word 0x6666
+ rex64
+ call __tls_get_addr at plt
+ nop;nop;nop;nop
+
+ /* IE against global var. */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sG5 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ /* IE against global var. */
+ movq %fs:0, %rcx
+ nop;nop
+ addq sG6 at gottpoff(%rip), %rcx
+ nop;nop;nop;nop
+
+ leave
+ ret
Modified: branches/binutils/package/ld/testsuite/ld-x86-64/x86-64.exp
===================================================================
--- branches/binutils/package/ld/testsuite/ld-x86-64/x86-64.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/ld-x86-64/x86-64.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
# Expect script for ld-x86_64 tests
-# Copyright (C) 2002 Free Software Foundation
+# Copyright (C) 2002, 2005, 2006 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -39,6 +39,11 @@
{{readelf -WSsrl tlspic.rd} {objdump -drj.text tlspic.dd}
{objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}}
"libtlspic.so"}
+ {"TLS descriptor -fpic -shared transitions" "-shared -melf_x86_64"
+ "--64" {tlsdesc.s tlspic2.s}
+ {{readelf -WSsrld tlsdesc.rd} {objdump -drj.text tlsdesc.dd}
+ {objdump "-s -j.got -j.got.plt" tlsdesc.sd} {objdump -sj.tdata tlsdesc.td}
+ {objdump -drj.plt tlsdesc.pd}} "libtlsdesc.so"}
{"Helper shared library" "-shared -melf_x86_64"
"--64" {tlslib.s} {} "libtlslib.so"}
{"TLS -fpic and -fno-pic exec transitions"
@@ -46,6 +51,15 @@
{{readelf -WSsrl tlsbin.rd} {objdump -drj.text tlsbin.dd}
{objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}}
"tlsbin"}
+ {"TLS descriptor -fpic and -fno-pic exec transitions"
+ "-melf_x86_64 tmpdir/libtlslib.so" "--64" {tlsbindesc.s tlsbin.s}
+ {{readelf -WSsrl tlsbindesc.rd} {objdump -drj.text tlsbindesc.dd}
+ {objdump -sj.got tlsbindesc.sd} {objdump -sj.tdata tlsbindesc.td}}
+ "tlsbindesc"}
+ {"TLS with global dynamic and descriptors"
+ "-shared -melf_x86_64" "--64" {tlsgdesc.s}
+ {{readelf -WSsrl tlsgdesc.rd} {objdump -drj.text tlsgdesc.dd}}
+ "libtlsgdesc.so"}
{"TLS in debug sections" "-melf_x86_64"
"--64" {tlsg.s}
{{objdump -sj.debug_foobar tlsg.sd}} "tlsg"}
Modified: branches/binutils/package/ld/testsuite/lib/ld-lib.exp
===================================================================
--- branches/binutils/package/ld/testsuite/lib/ld-lib.exp 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ld/testsuite/lib/ld-lib.exp 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Support routines for LD testsuite.
# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-# 2004, 2005 Free Software Foundation, Inc.
+# 2004, 2005, 2006 Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -15,11 +15,9 @@
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+# Extract and print the version number of ld.
#
-#
-# default_ld_version
-# extract and print the version number of ld
-#
proc default_ld_version { ld } {
global host_triplet
@@ -36,10 +34,8 @@
}
}
+# Link an object using relocation.
#
-# default_ld_relocate
-# link an object using relocation
-#
proc default_ld_relocate { ld target objects } {
global HOSTING_EMU
global host_triplet
@@ -62,7 +58,7 @@
}
# Check to see if ld is being invoked with a non-endian output format
-
+#
proc is_endian_output_format { object_flags } {
if {[string match "*-oformat binary*" $object_flags] || \
@@ -86,7 +82,7 @@
# the site.exp file will include the switch "-mbig-endian"
# (rather than "big-endian") which is not detected by proc
# process_multilib_options.
-
+#
proc big_or_little_endian {} {
if [board_info [target_info name] exists multilib_flags] {
@@ -110,10 +106,8 @@
return $flags
}
+# Link a program using ld.
#
-# default_ld_link
-# link a program using ld
-#
proc default_ld_link { ld target objects } {
global HOSTING_EMU
global HOSTING_CRT0
@@ -147,10 +141,8 @@
}
}
+# Link a program using ld, without including any libraries.
#
-# default_ld_simple_link
-# link a program using ld, without including any libraries
-#
proc default_ld_simple_link { ld target objects } {
global host_triplet
global link_output
@@ -197,10 +189,8 @@
}
}
+# Compile an object using cc.
#
-# default_ld_compile
-# compile an object using cc
-#
proc default_ld_compile { cc source object } {
global CFLAGS
global srcdir
@@ -272,10 +262,8 @@
}
}
+# Assemble a file.
#
-# default_ld_assemble
-# assemble a file
-#
proc default_ld_assemble { as source object } {
global ASFLAGS
global host_triplet
@@ -302,10 +290,8 @@
}
}
+# Run nm on a file, putting the result in the array nm_output.
#
-# default_ld_nm
-# run nm on a file, putting the result in the array nm_output
-#
proc default_ld_nm { nm nmflags object } {
global NMFLAGS
global nm_output
@@ -355,10 +341,8 @@
}
}
+# True if the object format is known to be ELF.
#
-# is_elf_format
-# true if the object format is known to be ELF
-#
proc is_elf_format {} {
if { ![istarget *-*-sysv4*] \
&& ![istarget *-*-unixware*] \
@@ -393,9 +377,8 @@
return 1
}
+# True if the object format is known to be 64-bit ELF.
#
-# is_elf64
-# true if the object format is known to be 64bit ELF
proc is_elf64 { binary_file } {
global READELF
global READELFFLAGS
@@ -419,9 +402,8 @@
return 0
}
+# True if the object format is known to be a.out.
#
-# is_aout_format
-# true if the object format is known to be aout
proc is_aout_format {} {
if { [istarget *-*-*\[ab\]out*] \
|| [istarget *-*-linux*oldld*] \
@@ -449,10 +431,8 @@
return 0
}
+# True if the object format is known to be PE COFF.
#
-# is_pecoff_format
-# true if the object format is known to be PECOFF
-#
proc is_pecoff_format {} {
if { ![istarget *-*-mingw32*] \
&& ![istarget *-*-cygwin*] \
@@ -463,12 +443,10 @@
return 1
}
+# Compares two files line-by-line.
+# Returns differences if exist.
+# Returns null if file(s) cannot be opened.
#
-# simple_diff
-# compares two files line-by-line
-# returns differences if exist
-# returns null if file(s) cannot be opened
-#
proc simple_diff { file_1 file_2 } {
global target
@@ -630,7 +608,7 @@
# `regexp_diff' to compare the output of the dumping tool against the
# regexps in FILE.d. `regexp_diff' is defined later in this file; see
# further comments there.
-
+#
proc run_dump_test { name } {
global subdir srcdir
global OBJDUMP NM AS OBJCOPY READELF LD
@@ -851,7 +829,7 @@
# redirected, exec *always* returns failure, regardless of the
# program exit code. Thankfully, we can retrieve the true
# return status from a special variable. Redirection would
- # cause a tcl-specific message to be appended, and we'd rather
+ # cause a Tcl-specific message to be appended, and we'd rather
# not deal with that if we can help it.
global errorCode
if { [lindex $errorCode 0] == "NONE" } {
@@ -1099,12 +1077,12 @@
# 0:name 1:ld options 2:assembler options
# 3:filenames of assembler files 4: action and options. 5: name of output file
# 6:compiler flags (optional)
-
+#
# Actions:
# objdump: Apply objdump options on result. Compare with regex (last arg).
# nm: Apply nm options on result. Compare with regex (last arg).
# readelf: Apply readelf options on result. Compare with regex (last arg).
-
+#
proc run_ld_link_tests { ldtests } {
global ld
global as
@@ -1313,33 +1291,44 @@
set objfile "tmpdir/[file rootname $src_file].o"
lappend objfiles $objfile
- # We ignore warnings since some compilers may generate
- # incorrect section attributes and the assembler will warn
- # them.
- ld_compile "$CC -c $CFLAGS $cflags" $srcdir/$subdir/$src_file $objfile
+ # We ignore warnings since some compilers may generate
+ # incorrect section attributes and the assembler will warn
+ # them.
+ ld_compile "$CC -c $CFLAGS $cflags" $srcdir/$subdir/$src_file $objfile
- if ![ld_link $ld $binfile "-L$srcdir/$subdir $ld_options $objfiles"] {
- set failed 1
- } else {
- set failed 0
- send_log "Running: $binfile > $binfile.out\n"
- verbose "Running: $binfile > $binfile.out"
- catch "exec $binfile > $binfile.out" exec_output
-
- if ![string match "" $exec_output] then {
- send_log "$exec_output\n"
- verbose "$exec_output" 1
- set failed 1
+ # We have to use $CC to build PIE and shared library.
+ if { [ string match "-shared" $ld_options ] \
+ || [ string match "-pie" $ld_options ] } {
+ set link_proc ld_simple_link
+ set link_cmd $CC
} else {
- send_log "diff $binfile.out $srcdir/$subdir/$expfile\n"
- verbose "diff $binfile.out $srcdir/$subdir/$expfile"
- catch "exec diff $binfile.out $srcdir/$subdir/$expfile" exec_output
- set exec_output [prune_warnings $exec_output]
+ set link_proc ld_link
+ set link_cmd $ld
+ }
+ if ![$link_proc $link_cmd $binfile "-L$srcdir/$subdir $ld_options $objfiles"] {
+ set failed 1
+ } else {
+ set failed 0
+ send_log "Running: $binfile > $binfile.out\n"
+ verbose "Running: $binfile > $binfile.out"
+ catch "exec $binfile > $binfile.out" exec_output
+
if ![string match "" $exec_output] then {
send_log "$exec_output\n"
verbose "$exec_output" 1
set failed 1
+ } else {
+ send_log "diff $binfile.out $srcdir/$subdir/$expfile\n"
+ verbose "diff $binfile.out $srcdir/$subdir/$expfile"
+ catch "exec diff $binfile.out $srcdir/$subdir/$expfile" exec_output
+ set exec_output [prune_warnings $exec_output]
+
+ if ![string match "" $exec_output] then {
+ send_log "$exec_output\n"
+ verbose "$exec_output" 1
+ set failed 1
+ }
}
}
@@ -1348,7 +1337,7 @@
} else {
set errcnt 0
pass $testname
- } }
+ }
}
}
}
Modified: branches/binutils/package/libiberty/ChangeLog
===================================================================
--- branches/binutils/package/libiberty/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,96 @@
+2006-03-29 Jim Blandy <jimb at codesourcery.com>
+
+ * pex-common.c (pex_input_file, pex_input_pipe): New functions.
+ (pex_init_common): Initialize obj->input_file.
+ (pex_run): Close any file opened by pex_input_file.
+ * pexecute.txh (pex_input_file, pex_input_pipe): New docs.
+ * pex-common.h (struct pex_obj): New field input_file.
+ (struct pex_funcs): New function ptr fdopenw.
+ * pex-unix.c (pex_unix_fdopenw): New function.
+ (funcs): List it as our fdopenw function.
+ * pex-win32.c (pex_win32_fdopenw): New function.
+ (funcs): List it as our fdopenw function.
+ * pex-djgpp.c (funcs): Leave fdopenw null.
+ * pex-msdos (funcs): Same.
+ * functions.texi: Regenerated.
+
+2006-04-10 Jim Blandy <jimb at codesourcery.com>
+
+ * pex-common.c (temp_file): New function, containing guts of
+ pex-style temporary file name generation.
+ (pex_run): Use it.
+
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
+
+ * Makefile.in: Add install-html, install-html-am, and
+ install-html-recursive targets. Define mkdir_p and
+ NORMAL_INSTALL.
+ * configure.ac: AC_SUBST datarootdir, docdir, htmldir.
+ * configure: Regenerate.
+ * testsuite/Makefile.in: Add install-html and html targets.
+
+2006-03-31 Mark Mitchell <mark at codesourcery.com>
+
+ * pex-win32.c (<errno.h>): Include.
+ (fix_argv): Remove.
+ (argv_to_cmdline): New function.
+ (std_suffixes): New variable.
+ (no_suffixes): Likewise.
+ (find_executable): New function.
+ (win32_spawn): Likewise.
+ (spawn_script): Use win32_spawn instead of _spawnv[p].
+ (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
+ (pex_win32_wait): Likewise.
+
+2006-03-24 Jim Blandy <jimb at codesourcery.com>
+
+ * pex-common.c (pex_run): Simplify output name handling.
+
+2006-03-12 Jim Blandy <jimb at red-bean.com>
+
+ * pex-common.h (struct pex_obj): Doc fixes.
+
+2006-03-11 Jim Blandy <jimb at red-bean.com>
+
+ * functions.texi: Regenerate.
+
+2006-02-21 Ben Elliston <bje at au.ibm.com>
+
+ * pexecute.c (pwait): Syntax fix for previous change.
+
+2006-02-17 Uttam Pawar <uttamp at us.ibm.com>
+
+ * pexecute.c (pwait): Free vector pointer.
+ * partition.c (partition_print): Free class_elements pointer.
+
+2006-02-11 Roger Sayle <roger at eyesopen.com>
+ R. Scott Bailey <scott.bailey at eds.com>
+ Bill Northcott <w.northcott at unsw.edu.au>
+
+ PR bootstrap/16787
+ * floatformat.c: Include <float.h> where available.
+ (NAN): Use value of DBL_QNAN if defined, and NAN isn't.
+
+2006-01-29 Gabriel Dos Reis <gdr at integrable-solutions.net>
+
+ * configure.ac: Add -Wc++-compat to ac_libibety_warn_cflags where
+ supported.
+ * configure: Regenerated.
+
+2006-01-20 Carlos O'Donell <carlos at codesourcery.com>
+
+ * testsuite/Makefile.in: Add test-expandargv test.
+ * testsuite/test-expandargv.c: New test.
+ * argv.c (expandargv): Check for errors with ferror,
+ rather than just by looking at return value from fread.
+
+2005-12-17 Gabriel Dos Reis <gdr at integrable-solutions.net>
+
+ * floatformat.c (floatformat_i387_ext_is_valid): Use explicit cast
+ to convert from "from".
+ (floatformat_to_double): Likewise.
+ (floatformat_from_double): Use explicit cast to convert from "to".
+
2005-12-10 Terry Laurenzo <tlaurenzo at gmail.com>
PR java/9861
Modified: branches/binutils/package/libiberty/Makefile.in
===================================================================
--- branches/binutils/package/libiberty/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
#
# Makefile
-# Copyright (C) 1990, 91-99, 2000, 2001, 2002, 2003, 2004, 2005
+# Copyright (C) 1990, 91-99, 2000, 2001, 2002, 2003, 2004, 2005, 2006
# Free Software Foundation
#
# This file is part of the libiberty library.
@@ -245,8 +245,63 @@
install-info: install-info-subdir
clean-info: clean-info-subdir
dvi: libiberty.dvi dvi-subdir
-html: libiberty.html
+# html, install-html targets
+HTMLS = libiberty.html
+
+html: $(HTMLS)
+
+.PHONY: install-html install-html-am install-html-recursive
+
+NORMAL_INSTALL = :
+mkdir_p = mkdir -p --
+
+html__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+
+install-html: install-html-recursive install-html-am
+
+install-html-am: $(HTMLS)
+ @$(NORMAL_INSTALL)
+ test -z "$(htmldir)" || $(mkdir_p) "$(DESTDIR)$(htmldir)"
+ @list='$(HTMLS)'; for p in $$list; do \
+ if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \
+ f=$(html__strip_dir) \
+ if test -d "$$d$$p"; then \
+ echo " $(mkdir_p) '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(mkdir_p) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
+ echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \
+ else \
+ echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \
+ $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \
+ fi; \
+ done
+
+install-html-recursive:
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || eval $$failcom; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
TEXISRC = \
$(srcdir)/libiberty.texi \
$(srcdir)/copying-lib.texi \
Modified: branches/binutils/package/libiberty/argv.c
===================================================================
--- branches/binutils/package/libiberty/argv.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/argv.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -328,8 +328,12 @@
const char *filename;
/* The response file. */
FILE *f;
- /* The number of characters in the response file. */
+ /* An upper bound on the number of characters in the response
+ file. */
long pos;
+ /* The number of characters in the response file, when actually
+ read. */
+ size_t len;
/* A dynamically allocated buffer used to hold options read from a
response file. */
char *buffer;
@@ -337,7 +341,7 @@
response file. */
char **file_argv;
/* The number of options read from the response file, if any. */
- size_t file_argc;
+ size_t file_argc;
/* We are only interested in options of the form "@file". */
filename = (*argvp)[i];
if (filename[0] != '@')
@@ -354,10 +358,15 @@
if (fseek (f, 0L, SEEK_SET) == -1)
goto error;
buffer = (char *) xmalloc (pos * sizeof (char) + 1);
- if (fread (buffer, sizeof (char), pos, f) != (size_t) pos)
+ len = fread (buffer, sizeof (char), pos, f);
+ if (len != (size_t) pos
+ /* On Windows, fread may return a value smaller than POS,
+ due to CR/LF->CR translation when reading text files.
+ That does not in-and-of itself indicate failure. */
+ && ferror (f))
goto error;
/* Add a NUL terminator. */
- buffer[pos] = '\0';
+ buffer[len] = '\0';
/* Parse the string. */
file_argv = buildargv (buffer);
/* If *ARGVP is not already dynamically allocated, copy it. */
Modified: branches/binutils/package/libiberty/configure
===================================================================
--- branches/binutils/package/libiberty/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -309,7 +309,7 @@
# include <unistd.h>
#endif"
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS libiberty_topdir MAINT NOTMAINT MAKEINFO BUILD_INFO PERL HAVE_PERL build build_cpu build_vendor build_os host host_cpu host_vendor host_os AR ac_ct_AR RANLIB ac_ct_RANLIB CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT CPP ac_libiberty_warn_cflags NO_MINUS_C_MINUS_O OUTPUT_OPTION INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA EGREP LIBOBJS CHECK target_header_dir pexecute INSTALL_DEST LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS libiberty_topdir MAINT NOTMAINT MAKEINFO BUILD_INFO PERL HAVE_PERL build build_cpu build_vendor build_os host host_cpu host_vendor host_os AR ac_ct_AR RANLIB ac_ct_RANLIB CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT CPP ac_libiberty_warn_cflags NO_MINUS_C_MINUS_O OUTPUT_OPTION INSTALL_PROGRAM INSTALL_SCRIPT INSTALL_DATA EGREP LIBOBJS CHECK target_header_dir pexecute INSTALL_DEST datarootdir docdir htmldir LTLIBOBJS'
ac_subst_files='host_makefile_frag'
# Initialize some variables set by options.
@@ -957,7 +957,7 @@
else
echo "$as_me: WARNING: no configuration information is in $ac_dir" >&2
fi
- cd "$ac_popdir"
+ cd $ac_popdir
done
fi
@@ -2330,7 +2330,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2388,7 +2389,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2504,7 +2506,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2558,7 +2561,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2603,7 +2607,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2647,7 +2652,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -2923,9 +2929,66 @@
ac_c_preproc_warn_flag=yes
+# Warn C++ incompatibilities if supported.
+
+echo "$as_me:$LINENO: checking whether ${CC} accepts -Wc++-compat" >&5
+echo $ECHO_N "checking whether ${CC} accepts -Wc++-compat... $ECHO_C" >&6
+if test "${ac_cv_prog_cc_w_cxx_compat+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ save_CFLAGS="$CFLAGS"
+ CFLAGS="-Wc++-compat"
+ cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h. */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h. */
+
+_ACEOF
+rm -f conftest.$ac_objext
+if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>conftest.er1
+ ac_status=$?
+ grep -v '^ *+' conftest.er1 >conftest.err
+ rm -f conftest.er1
+ cat conftest.err >&5
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); } &&
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; } &&
+ { ac_try='test -s conftest.$ac_objext'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }; then
+ ac_cv_prog_cc_w_cxx_compat=yes
+else
+ echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+ac_cv_prog_cc_w_cxx_compat=no
+fi
+rm -f conftest.err conftest.$ac_objext conftest.$ac_ext
+ CFLAGS="$save_CFLAGS"
+
+fi
+echo "$as_me:$LINENO: result: $ac_cv_prog_cc_w_cxx_compat" >&5
+echo "${ECHO_T}$ac_cv_prog_cc_w_cxx_compat" >&6
+
+
if test x$GCC = xyes; then
ac_libiberty_warn_cflags='-W -Wall -pedantic -Wwrite-strings -Wstrict-prototypes'
fi
+if test $ac_cv_prog_cc_w_cxx_compat = yes ; then
+ ac_libiberty_warn_cflags="${ac_libiberty_warn_cflags} -Wc++-compat"
+fi
if test "x$CC" != xcc; then
@@ -3027,7 +3090,6 @@
-
echo "$as_me:$LINENO: checking for an ANSI C-conforming const" >&5
echo $ECHO_N "checking for an ANSI C-conforming const... $ECHO_C" >&6
if test "${ac_cv_c_const+set}" = set; then
@@ -3103,7 +3165,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3163,7 +3226,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3239,7 +3303,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3281,7 +3346,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3338,7 +3404,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3710,7 +3777,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3774,7 +3842,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3835,7 +3904,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -3916,7 +3986,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4145,7 +4216,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4207,7 +4279,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4247,7 +4320,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4303,7 +4377,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4343,7 +4418,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4407,7 +4483,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4438,8 +4515,10 @@
esac
else
if test "$cross_compiling" = yes; then
- { { echo "$as_me:$LINENO: error: internal error: not reached in cross-compile" >&5
-echo "$as_me: error: internal error: not reached in cross-compile" >&2;}
+ { { echo "$as_me:$LINENO: error: cannot run test program while cross compiling
+See \`config.log' for more details." >&5
+echo "$as_me: error: cannot run test program while cross compiling
+See \`config.log' for more details." >&2;}
{ (exit 1); exit 1; }; }
else
cat >conftest.$ac_ext <<_ACEOF
@@ -4552,7 +4631,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4618,7 +4698,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4664,7 +4745,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4710,7 +4792,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -4787,7 +4870,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5029,7 +5113,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5093,7 +5178,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5162,7 +5248,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5231,7 +5318,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5300,7 +5388,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5369,7 +5458,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5438,7 +5528,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5864,7 +5955,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -5923,7 +6015,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6023,7 +6116,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6161,7 +6255,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6382,7 +6477,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6727,7 +6823,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6838,7 +6935,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6907,7 +7005,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -6972,7 +7071,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7068,7 +7168,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7132,7 +7233,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7201,7 +7303,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7270,7 +7373,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7339,7 +7443,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7408,7 +7513,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7477,7 +7583,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7548,7 +7655,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7617,7 +7725,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7686,7 +7795,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7755,7 +7865,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7824,7 +7935,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7893,7 +8005,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -7964,7 +8077,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -8047,7 +8161,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -8219,7 +8334,8 @@
cat conftest.err >&5
echo "$as_me:$LINENO: \$? = $ac_status" >&5
(exit $ac_status); } &&
- { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err'
+ { ac_try='test -z "$ac_c_werror_flag"
+ || test ! -s conftest.err'
{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
(eval $ac_try) 2>&5
ac_status=$?
@@ -8561,6 +8677,10 @@
done
LIBOBJS="$L"
+
+
+
+
# We need multilib support, but only if configuring for the target.
ac_config_files="$ac_config_files Makefile testsuite/Makefile"
@@ -9238,6 +9358,9 @@
s, at target_header_dir@,$target_header_dir,;t t
s, at pexecute@,$pexecute,;t t
s, at INSTALL_DEST@,$INSTALL_DEST,;t t
+s, at datarootdir@,$datarootdir,;t t
+s, at docdir@,$docdir,;t t
+s, at htmldir@,$htmldir,;t t
s, at LTLIBOBJS@,$LTLIBOBJS,;t t
/@host_makefile_frag@/r $host_makefile_frag
s, at host_makefile_frag@,,;t t
@@ -9407,6 +9530,11 @@
*) ac_INSTALL=$ac_top_builddir$INSTALL ;;
esac
+ if test x"$ac_file" != x-; then
+ { echo "$as_me:$LINENO: creating $ac_file" >&5
+echo "$as_me: creating $ac_file" >&6;}
+ rm -f "$ac_file"
+ fi
# Let's still pretend it is `configure' which instantiates (i.e., don't
# use $as_me), people would be surprised to read:
# /* config.h. Generated by config.status. */
@@ -9445,12 +9573,6 @@
fi;;
esac
done` || { (exit 1); exit 1; }
-
- if test x"$ac_file" != x-; then
- { echo "$as_me:$LINENO: creating $ac_file" >&5
-echo "$as_me: creating $ac_file" >&6;}
- rm -f "$ac_file"
- fi
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF
sed "$ac_vpsub
Modified: branches/binutils/package/libiberty/configure.ac
===================================================================
--- branches/binutils/package/libiberty/configure.ac 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/configure.ac 2006-04-19 08:33:31 UTC (rev 12)
@@ -113,9 +113,25 @@
AC_PROG_CC
AC_PROG_CPP_WERROR
+# Warn C++ incompatibilities if supported.
+AC_CACHE_CHECK(
+ [whether ${CC} accepts -Wc++-compat],
+ [ac_cv_prog_cc_w_cxx_compat],
+ [save_CFLAGS="$CFLAGS"
+ CFLAGS="-Wc++-compat"
+ AC_COMPILE_IFELSE([AC_LANG_SOURCE([[]])],
+ [ac_cv_prog_cc_w_cxx_compat=yes],
+ [ac_cv_prog_cc_w_cxx_compat=no])
+ CFLAGS="$save_CFLAGS"
+ ])
+
+
if test x$GCC = xyes; then
ac_libiberty_warn_cflags='-W -Wall -pedantic -Wwrite-strings -Wstrict-prototypes'
fi
+if test $ac_cv_prog_cc_w_cxx_compat = yes ; then
+ ac_libiberty_warn_cflags="${ac_libiberty_warn_cflags} -Wc++-compat"
+fi
AC_SUBST(ac_libiberty_warn_cflags)
AC_PROG_CC_C_O
@@ -623,6 +639,11 @@
done
LIBOBJS="$L"
+dnl Required by html and install-html
+AC_SUBST(datarootdir)
+AC_SUBST(docdir)
+AC_SUBST(htmldir)
+
# We need multilib support, but only if configuring for the target.
AC_CONFIG_FILES([Makefile testsuite/Makefile])
AC_CONFIG_COMMANDS([default],
Modified: branches/binutils/package/libiberty/floatformat.c
===================================================================
--- branches/binutils/package/libiberty/floatformat.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/floatformat.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* IEEE floating point support routines, for GDB, the GNU Debugger.
- Copyright 1991, 1994, 1999, 2000, 2003, 2005
+ Copyright 1991, 1994, 1999, 2000, 2003, 2005, 2006
Free Software Foundation, Inc.
This file is part of GDB.
@@ -31,6 +31,11 @@
#include <string.h>
#endif
+/* On some platforms, <float.h> provides DBL_QNAN. */
+#ifdef STDC_HEADERS
+#include <float.h>
+#endif
+
#include "ansidecl.h"
#include "libiberty.h"
#include "floatformat.h"
@@ -44,8 +49,12 @@
#endif
#ifndef NAN
+#ifdef DBL_QNAN
+#define NAN DBL_QNAN
+#else
#define NAN (0.0 / 0.0)
#endif
+#endif
static unsigned long get_field (const unsigned char *,
enum floatformat_byteorders,
@@ -143,7 +152,7 @@
nor ~0, the intbit must also be set. Only if the exponent is
zero can it be zero, and then it must be zero. */
unsigned long exponent, int_bit;
- const unsigned char *ufrom = from;
+ const unsigned char *ufrom = (const unsigned char *) from;
exponent = get_field (ufrom, fmt->byteorder, fmt->totalsize,
fmt->exp_start, fmt->exp_len);
@@ -295,7 +304,7 @@
floatformat_to_double (const struct floatformat *fmt,
const void *from, double *to)
{
- const unsigned char *ufrom = from;
+ const unsigned char *ufrom = (const unsigned char *) from;
double dto;
long exponent;
unsigned long mant;
@@ -471,7 +480,7 @@
double mant;
unsigned int mant_bits, mant_off;
int mant_bits_left;
- unsigned char *uto = to;
+ unsigned char *uto = (unsigned char *) to;
dfrom = *from;
memset (uto, 0, fmt->totalsize / FLOATFORMAT_CHAR_BIT);
Modified: branches/binutils/package/libiberty/functions.texi
===================================================================
--- branches/binutils/package/libiberty/functions.texi 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/functions.texi 2006-04-19 08:33:31 UTC (rev 12)
@@ -214,6 +214,26 @@
@end deftypefn
+ at c argv.c:293
+ at deftypefn Extension void expandargv (int *@var{argcp}, char ***@var{argvp})
+
+The @var{argcp} and @code{argvp} arguments are pointers to the usual
+ at code{argc} and @code{argv} arguments to @code{main}. This function
+looks for arguments that begin with the character @samp{@@}. Any such
+arguments are interpreted as ``response files''. The contents of the
+response file are interpreted as additional command line options. In
+particular, the file is separated into whitespace-separated strings;
+each such string is taken as a command-line option. The new options
+are inserted in place of the option naming the response file, and
+ at code{*argcp} and @code{*argvp} will be updated. If the value of
+ at code{*argvp} is modified by this function, then the new value has
+been dynamically allocated and can be deallocated by the caller with
+ at code{freeargv}. However, most callers will simply call
+ at code{expandargv} near the beginning of @code{main} and allow the
+operating system to free the memory when the program exits.
+
+ at end deftypefn
+
@c fdmatch.c:23
@deftypefn Extension int fdmatch (int @var{fd1}, int @var{fd2})
@@ -648,14 +668,14 @@
@end deftypefn
- at c pexecute.txh:169
+ at c pexecute.txh:231
@deftypefn Extension void pex_free (struct pex_obj @var{obj})
Clean up and free all data associated with @var{obj}.
@end deftypefn
- at c pexecute.txh:144
+ at c pexecute.txh:206
@deftypefn Extension int pex_get_status (struct pex_obj *@var{obj}, int @var{count}, int *@var{vector})
Returns the exit status of all programs run using @var{obj}.
@@ -665,7 +685,7 @@
@end deftypefn
- at c pexecute.txh:153
+ at c pexecute.txh:215
@deftypefn Extension int pex_get_times (struct pex_obj *@var{obj}, int @var{count}, struct pex_time *@var{vector})
Returns the process execution times of all programs run using
@@ -682,7 +702,7 @@
@end deftypefn
- at c pexecute.txh:1
+ at c pexecute.txh:2
@deftypefn Extension {struct pex_obj *} pex_init (int @var{flags}, const char *@var{pname}, const char *@var{tempbase})
Prepare to execute one or more programs, with standard output of each
@@ -714,7 +734,70 @@
@end deftypefn
- at c pexecute.txh:175
+ at c pexecute.txh:133
+ at deftypefn Extension {FILE *} pex_input_file (struct pex_obj *@var{obj}, int @var{flags}, const char *@var{in_name})
+
+Return a stream for a temporary file to pass to the first program in
+the pipeline as input.
+
+The name of the input file is chosen according to the same rules
+ at code{pex_run} uses to choose output file names, based on
+ at var{in_name}, @var{obj} and the @code{PEX_SUFFIX} bit in @var{flags}.
+
+Don't call @code{fclose} on the returned stream; the first call to
+ at code{pex_run} closes it automatically.
+
+If @var{flags} includes @code{PEX_BINARY_OUTPUT}, open the stream in
+binary mode; otherwise, open it in the default mode. Including
+ at code{PEX_BINARY_OUTPUT} in @var{flags} has no effect on Unix.
+ at end deftypefn
+
+ at c pexecute.txh:150
+ at deftypefn Extension {FILE *} pex_input_pipe (struct pex_obj *@var{obj}, int @var{binary})
+
+Return a stream @var{fp} for a pipe connected to the standard input of
+the first program in the pipeline; @var{fp} is opened for writing.
+You must have passed @code{PEX_USE_PIPES} to the @code{pex_init} call
+that returned @var{obj}.
+
+You must close @var{fp} using @code{fclose} yourself when you have
+finished writing data to the pipeline.
+
+The file descriptor underlying @var{fp} is marked not to be inherited
+by child processes.
+
+On systems that do not support pipes, this function returns
+ at code{NULL}, and sets @code{errno} to @code{EINVAL}. If you would
+like to write code that is portable to all systems the @code{pex}
+functions support, consider using @code{pex_input_file} instead.
+
+There are two opportunities for deadlock using
+ at code{pex_input_pipe}:
+
+ at itemize @bullet
+ at item
+Most systems' pipes can buffer only a fixed amount of data; a process
+that writes to a full pipe blocks. Thus, if you write to @file{fp}
+before starting the first process, you run the risk of blocking when
+there is no child process yet to read the data and allow you to
+continue. @code{pex_input_pipe} makes no promises about the
+size of the pipe's buffer, so if you need to write any data at all
+before starting the first process in the pipeline, consider using
+ at code{pex_input_file} instead.
+
+ at item
+Using @code{pex_input_pipe} and @code{pex_read_output} together
+may also cause deadlock. If the output pipe fills up, so that each
+program in the pipeline is waiting for the next to read more data, and
+you fill the input pipe by writing more data to @var{fp}, then there
+is no way to make progress: the only process that could read data from
+the output pipe is you, but you are blocked on the input pipe.
+
+ at end itemize
+
+ at end deftypefn
+
+ at c pexecute.txh:237
@deftypefn Extension {const char *} pex_one (int @var{flags}, const char *@var{executable}, char * const *@var{argv}, const char *@var{pname}, const char *@var{outname}, const char *@var{errname}, int *@var{status}, int *@var{err})
An interface to permit the easy execution of a
@@ -727,7 +810,7 @@
@end deftypefn
- at c pexecute.txh:132
+ at c pexecute.txh:194
@deftypefn Extension {FILE *} pex_read_output (struct pex_obj *@var{obj}, int @var{binary})
Returns a @code{FILE} pointer which may be used to read the standard
@@ -740,7 +823,7 @@
@end deftypefn
- at c pexecute.txh:32
+ at c pexecute.txh:33
@deftypefn Extension {const char *} pex_run (struct pex_obj *@var{obj}, int @var{flags}, const char *@var{executable}, char * const *@var{argv}, const char *@var{outname}, const char *@var{errname}, int *@var{err})
Execute one program in a pipeline. On success this returns
@@ -841,7 +924,7 @@
@end deftypefn
- at c pexecute.txh:187
+ at c pexecute.txh:249
@deftypefn Extension int pexecute (const char *@var{program}, char * const *@var{argv}, const char *@var{this_pname}, const char *@var{temp_base}, char **@var{errmsg_fmt}, char **@var{errmsg_arg}, int flags)
This is the old interface to execute one or more programs. It is
@@ -869,7 +952,7 @@
@end deftypefn
- at c pexecute.txh:195
+ at c pexecute.txh:257
@deftypefn Extension int pwait (int @var{pid}, int *@var{status}, int @var{flags})
Another part of the old execution interface.
@@ -1194,7 +1277,7 @@
@end deftypefn
- at c strverscmp.c:24
+ at c strverscmp.c:25
@deftypefun int strverscmp (const char *@var{s1}, const char *@var{s2})
The @code{strverscmp} function compares the string @var{s1} against
@var{s2}, considering them as holding indices/version numbers. Return
Modified: branches/binutils/package/libiberty/partition.c
===================================================================
--- branches/binutils/package/libiberty/partition.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/partition.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -177,6 +177,7 @@
}
fputc (']', fp);
+ free (class_elements);
free (done);
}
Modified: branches/binutils/package/libiberty/pex-common.c
===================================================================
--- branches/binutils/package/libiberty/pex-common.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-common.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -67,6 +67,7 @@
obj->status = NULL;
obj->time = NULL;
obj->number_waited = 0;
+ obj->input_file = NULL;
obj->read_output = NULL;
obj->remove_count = 0;
obj->remove = NULL;
@@ -91,6 +92,56 @@
obj->remove[obj->remove_count - 1] = add;
}
+/* Generate a temporary file name based on OBJ, FLAGS, and NAME.
+ Return NULL if we were unable to reserve a temporary filename.
+
+ If non-NULL, the result is either allocated with malloc, or the
+ same pointer as NAME. */
+static char *
+temp_file (struct pex_obj *obj, int flags, char *name)
+{
+ if (name == NULL)
+ {
+ if (obj->tempbase == NULL)
+ {
+ name = make_temp_file (NULL);
+ }
+ else
+ {
+ int len = strlen (obj->tempbase);
+ int out;
+
+ if (len >= 6
+ && strcmp (obj->tempbase + len - 6, "XXXXXX") == 0)
+ name = xstrdup (obj->tempbase);
+ else
+ name = concat (obj->tempbase, "XXXXXX", NULL);
+
+ out = mkstemps (name, 0);
+ if (out < 0)
+ {
+ free (name);
+ return NULL;
+ }
+
+ /* This isn't obj->funcs->close because we got the
+ descriptor from mkstemps, not from a function in
+ obj->funcs. Calling close here is just like what
+ make_temp_file does. */
+ close (out);
+ }
+ }
+ else if ((flags & PEX_SUFFIX) != 0)
+ {
+ if (obj->tempbase == NULL)
+ name = make_temp_file (name);
+ else
+ name = concat (obj->tempbase, name, NULL);
+ }
+
+ return name;
+}
+
/* Run a program. */
const char *
@@ -111,6 +162,17 @@
outname = (char *) orig_outname;
outname_allocated = 0;
+ /* If the user called pex_input_file, close the file now. */
+ if (obj->input_file)
+ {
+ if (fclose (obj->input_file) == EOF)
+ {
+ errmsg = "closing pipeline input file";
+ goto error_exit;
+ }
+ obj->input_file = NULL;
+ }
+
/* Set IN. */
if (obj->next_input_name != NULL)
@@ -161,67 +223,27 @@
}
else if ((obj->flags & PEX_USE_PIPES) == 0)
{
- if (outname == NULL)
- {
- if (obj->tempbase == NULL)
- {
- outname = make_temp_file (NULL);
- outname_allocated = 1;
- }
- else
- {
- int len = strlen (obj->tempbase);
+ outname = temp_file (obj, flags, outname);
+ if (! outname)
+ {
+ *err = 0;
+ errmsg = "could not create temporary file";
+ goto error_exit;
+ }
- if (len >= 6
- && strcmp (obj->tempbase + len - 6, "XXXXXX") == 0)
- outname = xstrdup (obj->tempbase);
- else
- outname = concat (obj->tempbase, "XXXXXX", NULL);
+ if (outname != orig_outname)
+ outname_allocated = 1;
- outname_allocated = 1;
-
- out = mkstemps (outname, 0);
- if (out < 0)
- {
- *err = 0;
- errmsg = "could not create temporary output file";
- goto error_exit;
- }
-
- /* This isn't obj->funcs->close because we got the
- descriptor from mkstemps, not from a function in
- obj->funcs. Calling close here is just like what
- make_temp_file does. */
- close (out);
- out = -1;
- }
- }
- else if ((flags & PEX_SUFFIX) != 0)
- {
- if (obj->tempbase == NULL)
- outname = make_temp_file (outname);
- else
- outname = concat (obj->tempbase, outname, NULL);
- outname_allocated = 1;
- }
-
if ((obj->flags & PEX_SAVE_TEMPS) == 0)
{
pex_add_remove (obj, outname, outname_allocated);
outname_allocated = 0;
}
- if (!outname_allocated)
- {
- obj->next_input_name = outname;
- obj->next_input_name_allocated = 0;
- }
- else
- {
- obj->next_input_name = outname;
- outname_allocated = 0;
- obj->next_input_name_allocated = 1;
- }
+ /* Hand off ownership of outname to the next stage. */
+ obj->next_input_name = outname;
+ obj->next_input_name_allocated = outname_allocated;
+ outname_allocated = 0;
}
else
{
@@ -297,6 +319,87 @@
return errmsg;
}
+/* Return a FILE pointer for a temporary file to fill with input for
+ the pipeline. */
+FILE *
+pex_input_file (struct pex_obj *obj, int flags, const char *in_name)
+{
+ char *name = (char *) in_name;
+ FILE *f;
+
+ /* This must be called before the first pipeline stage is run, and
+ there must not have been any other input selected. */
+ if (obj->count != 0
+ || (obj->next_input >= 0 && obj->next_input != STDIN_FILE_NO)
+ || obj->next_input_name)
+ {
+ errno = EINVAL;
+ return NULL;
+ }
+
+ name = temp_file (obj, flags, name);
+ if (! name)
+ return NULL;
+
+ f = fopen (name, (flags & PEX_BINARY_OUTPUT) ? "wb" : "w");
+ if (! f)
+ {
+ free (name);
+ return NULL;
+ }
+
+ obj->input_file = f;
+ obj->next_input_name = name;
+ obj->next_input_name_allocated = (name != in_name);
+
+ return f;
+}
+
+/* Return a stream for a pipe connected to the standard input of the
+ first stage of the pipeline. */
+FILE *
+pex_input_pipe (struct pex_obj *obj, int binary)
+{
+ int p[2];
+ FILE *f;
+
+ /* You must call pex_input_pipe before the first pex_run or pex_one. */
+ if (obj->count > 0)
+ goto usage_error;
+
+ /* You must be using pipes. Implementations that don't support
+ pipes clear this flag before calling pex_init_common. */
+ if (! (obj->flags & PEX_USE_PIPES))
+ goto usage_error;
+
+ /* If we have somehow already selected other input, that's a
+ mistake. */
+ if ((obj->next_input >= 0 && obj->next_input != STDIN_FILE_NO)
+ || obj->next_input_name)
+ goto usage_error;
+
+ if (obj->funcs->pipe (obj, p, binary != 0) < 0)
+ return NULL;
+
+ f = obj->funcs->fdopenw (obj, p[WRITE_PORT], binary != 0);
+ if (! f)
+ {
+ int saved_errno = errno;
+ obj->funcs->close (obj, p[READ_PORT]);
+ obj->funcs->close (obj, p[WRITE_PORT]);
+ errno = saved_errno;
+ return NULL;
+ }
+
+ obj->next_input = p[READ_PORT];
+
+ return f;
+
+ usage_error:
+ errno = EINVAL;
+ return NULL;
+}
+
/* Return a FILE pointer for the output of the last program
executed. */
Modified: branches/binutils/package/libiberty/pex-common.h
===================================================================
--- branches/binutils/package/libiberty/pex-common.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-common.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -61,7 +61,7 @@
int next_input_name_allocated;
/* Number of child processes. */
int count;
- /* PIDs of child processes; array allocated using maloc. */
+ /* PIDs of child processes; array allocated using malloc. */
long *children;
/* Exit statuses of child processes; array allocated using malloc. */
int *status;
@@ -69,6 +69,8 @@
struct pex_time *time;
/* Number of children we have already waited for. */
int number_waited;
+ /* FILE created by pex_input_file. */
+ FILE *input_file;
/* FILE created by pex_read_output. */
FILE *read_output;
/* Number of temporary files to remove. */
@@ -88,10 +90,11 @@
{
/* Open file NAME for reading. If BINARY is non-zero, open in
binary mode. Return >= 0 on success, -1 on error. */
- int (*open_read) (struct pex_obj *, const char *name, int binary);
+ int (*open_read) (struct pex_obj *, const char */* name */, int /* binary */);
/* Open file NAME for writing. If BINARY is non-zero, open in
binary mode. Return >= 0 on success, -1 on error. */
- int (*open_write) (struct pex_obj *, const char *name, int binary);
+ int (*open_write) (struct pex_obj *, const char */* name */,
+ int /* binary */);
/* Execute a child process. FLAGS, EXECUTABLE, ARGV, ERR are from
pex_run. IN, OUT, ERRDES are each a descriptor, from open_read,
open_write, or pipe, or they are one of STDIN_FILE_NO,
@@ -99,25 +102,32 @@
should be closed. The function should handle the
PEX_STDERR_TO_STDOUT flag. Return >= 0 on success, or -1 on
error and set *ERRMSG and *ERR. */
- long (*exec_child) (struct pex_obj *, int flags, const char *executable,
- char * const * argv, int in, int out, int errdes,
- const char **errmsg, int *err);
+ long (*exec_child) (struct pex_obj *, int /* flags */,
+ const char */* executable */, char * const * /* argv */,
+ int /* in */, int /* out */, int /* errdes */,
+ const char **/* errmsg */, int */* err */);
/* Close a descriptor. Return 0 on success, -1 on error. */
int (*close) (struct pex_obj *, int);
/* Wait for a child to complete, returning exit status in *STATUS
and time in *TIME (if it is not null). CHILD is from fork. DONE
is 1 if this is called via pex_free. ERRMSG and ERR are as in
fork. Return 0 on success, -1 on error. */
- int (*wait) (struct pex_obj *, long, int *status, struct pex_time *time,
- int done, const char **errmsg, int *err);
+ int (*wait) (struct pex_obj *, long /* child */, int * /* status */,
+ struct pex_time * /* time */, int /* done */,
+ const char ** /* errmsg */, int * /* err */);
/* Create a pipe (only called if PEX_USE_PIPES is set) storing two
- descriptin in *P. If BINARY is non-zero, open in binary mode.
- Return 0 on success, -1 on error. */
- int (*pipe) (struct pex_obj *, int *p, int binary);
+ descriptors in P[0] and P[1]. If BINARY is non-zero, open in
+ binary mode. Return 0 on success, -1 on error. */
+ int (*pipe) (struct pex_obj *, int * /* p */, int /* binary */);
/* Get a FILE pointer to read from a file descriptor (only called if
PEX_USE_PIPES is set). If BINARY is non-zero, open in binary
mode. Return pointer on success, NULL on error. */
- FILE * (*fdopenr) (struct pex_obj *, int fd, int binary);
+ FILE * (*fdopenr) (struct pex_obj *, int /* fd */, int /* binary */);
+ /* Get a FILE pointer to write to the file descriptor FD (only
+ called if PEX_USE_PIPES is set). If BINARY is non-zero, open in
+ binary mode. Arrange for FD not to be inherited by the child
+ processes. Return pointer on success, NULL on error. */
+ FILE * (*fdopenw) (struct pex_obj *, int /* fd */, int /* binary */);
/* Free any system dependent data associated with OBJ. May be
NULL if there is nothing to do. */
void (*cleanup) (struct pex_obj *);
Modified: branches/binutils/package/libiberty/pex-djgpp.c
===================================================================
--- branches/binutils/package/libiberty/pex-djgpp.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-djgpp.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -62,6 +62,7 @@
pex_djgpp_wait,
NULL, /* pipe */
NULL, /* fdopenr */
+ NULL, /* fdopenw */
NULL /* cleanup */
};
Modified: branches/binutils/package/libiberty/pex-msdos.c
===================================================================
--- branches/binutils/package/libiberty/pex-msdos.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-msdos.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -73,6 +73,7 @@
pex_msdos_wait,
NULL, /* pipe */
NULL, /* fdopenr */
+ NULL, /* fdopenw */
pex_msdos_cleanup
};
Modified: branches/binutils/package/libiberty/pex-unix.c
===================================================================
--- branches/binutils/package/libiberty/pex-unix.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-unix.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -277,6 +277,7 @@
int, const char **, int *);
static int pex_unix_pipe (struct pex_obj *, int *, int);
static FILE *pex_unix_fdopenr (struct pex_obj *, int, int);
+static FILE *pex_unix_fdopenw (struct pex_obj *, int, int);
static void pex_unix_cleanup (struct pex_obj *);
/* The list of functions we pass to the common routines. */
@@ -290,6 +291,7 @@
pex_unix_wait,
pex_unix_pipe,
pex_unix_fdopenr,
+ pex_unix_fdopenw,
pex_unix_cleanup
};
@@ -495,6 +497,15 @@
return fdopen (fd, "r");
}
+static FILE *
+pex_unix_fdopenw (struct pex_obj *obj ATTRIBUTE_UNUSED, int fd,
+ int binary ATTRIBUTE_UNUSED)
+{
+ if (fcntl (fd, F_SETFD, FD_CLOEXEC) < 0)
+ return NULL;
+ return fdopen (fd, "w");
+}
+
static void
pex_unix_cleanup (struct pex_obj *obj ATTRIBUTE_UNUSED)
{
Modified: branches/binutils/package/libiberty/pex-win32.c
===================================================================
--- branches/binutils/package/libiberty/pex-win32.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pex-win32.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -41,6 +41,7 @@
#include <fcntl.h>
#include <signal.h>
#include <sys/stat.h>
+#include <errno.h>
/* mingw32 headers may not define the following. */
@@ -72,115 +73,6 @@
return;
}
-/* This is a kludge to get around the Microsoft C spawn functions' propensity
- to remove the outermost set of double quotes from all arguments. */
-
-static const char * const *
-fix_argv (char * const *argvec)
-{
- char **argv;
- int i;
- char *command0;
-
- /* See whether we need to change anything. */
- for (command0 = argvec[0]; *command0 != '\0'; command0++)
- if (*command0 == '/')
- break;
- if (*command0 == '\0')
- {
- for (i = 1; argvec[i] != NULL; i++)
- if (strpbrk (argvec[i], "\" \t") != NULL)
- break;
-
- if (argvec[i] == NULL)
- return (const char * const *) argvec;
- }
-
- for (i = 0; argvec[i] != NULL; i++)
- ;
- argv = XNEWVEC (char *, i + 2);
-
- argv++; /* Leave space at the beginning of argv
- for potential #! handling */
-
- for (i = 0; argvec[i] != NULL; i++)
- argv[i] = xstrdup (argvec[i]);
- argv[i] = NULL;
-
- backslashify (argv[0]);
-
- for (i = 1; argv[i] != 0; i++)
- {
- int len, j;
- char *temp, *newtemp;
-
- temp = argv[i];
- len = strlen (temp);
- for (j = 0; j < len; j++)
- {
- if (temp[j] == '"')
- {
- newtemp = XNEWVEC (char, len + 2);
- strncpy (newtemp, temp, j);
- newtemp [j] = '\\';
- strncpy (&newtemp [j+1], &temp [j], len-j);
- newtemp [len+1] = 0;
- temp = newtemp;
- len++;
- j++;
- }
- }
-
- if (argv[i] != temp)
- {
- free (argv[i]);
- argv[i] = temp;
- }
- }
-
- for (i = 0; argv[i] != 0; i++)
- {
- if (strpbrk (argv[i], " \t"))
- {
- int len, trailing_backslash;
- char *temp;
-
- len = strlen (argv[i]);
- trailing_backslash = 0;
-
- /* There is an added complication when an arg with embedded white
- space ends in a backslash (such as in the case of -iprefix arg
- passed to cpp). The resulting quoted strings gets misinterpreted
- by the command interpreter -- it thinks that the ending quote
- is escaped by the trailing backslash and things get confused.
- We handle this case by escaping the trailing backslash, provided
- it was not escaped in the first place. */
- if (len > 1
- && argv[i][len-1] == '\\'
- && argv[i][len-2] != '\\')
- {
- trailing_backslash = 1;
- ++len; /* to escape the final backslash. */
- }
-
- len += 2; /* and for the enclosing quotes. */
-
- temp = XNEWVEC (char, len + 1);
- temp[0] = '"';
- strcpy (temp + 1, argv[i]);
- if (trailing_backslash)
- temp[len - 2] = '\\';
- temp[len - 1] = '"';
- temp[len] = '\0';
-
- free (argv[i]);
- argv[i] = temp;
- }
- }
-
- return (const char * const *) argv;
-}
-
static int pex_win32_open_read (struct pex_obj *, const char *, int);
static int pex_win32_open_write (struct pex_obj *, const char *, int);
static long pex_win32_exec_child (struct pex_obj *, int, const char *,
@@ -191,6 +83,7 @@
struct pex_time *, int, const char **, int *);
static int pex_win32_pipe (struct pex_obj *, int *, int);
static FILE *pex_win32_fdopenr (struct pex_obj *, int, int);
+static FILE *pex_win32_fdopenw (struct pex_obj *, int, int);
/* The list of functions we pass to the common routines. */
@@ -203,6 +96,7 @@
pex_win32_wait,
pex_win32_pipe,
pex_win32_fdopenr,
+ pex_win32_fdopenw,
NULL /* cleanup */
};
@@ -422,9 +316,226 @@
}
#endif
+/* Return a Windows command-line from ARGV. It is the caller's
+ responsibility to free the string returned. */
+
+static char *
+argv_to_cmdline (char *const *argv)
+{
+ char *cmdline;
+ char *p;
+ size_t cmdline_len;
+ int i, j, k;
+
+ cmdline_len = 0;
+ for (i = 0; argv[i]; i++)
+ {
+ /* We quote every last argument. This simplifies the problem;
+ we need only escape embedded double-quotes and immediately
+ preceeding backslash characters. A sequence of backslach characters
+ that is not follwed by a double quote character will not be
+ escaped. */
+ for (j = 0; argv[i][j]; j++)
+ {
+ if (argv[i][j] == '"')
+ {
+ /* Escape preceeding backslashes. */
+ for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
+ cmdline_len++;
+ /* Escape the qote character. */
+ cmdline_len++;
+ }
+ }
+ /* Trailing backslashes also need to be escaped because they will be
+ followed by the terminating quote. */
+ for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
+ cmdline_len++;
+ cmdline_len += j;
+ cmdline_len += 3; /* for leading and trailing quotes and space */
+ }
+ cmdline = xmalloc (cmdline_len);
+ p = cmdline;
+ for (i = 0; argv[i]; i++)
+ {
+ *p++ = '"';
+ for (j = 0; argv[i][j]; j++)
+ {
+ if (argv[i][j] == '"')
+ {
+ for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
+ *p++ = '\\';
+ *p++ = '\\';
+ }
+ *p++ = argv[i][j];
+ }
+ for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
+ *p++ = '\\';
+ *p++ = '"';
+ *p++ = ' ';
+ }
+ p[-1] = '\0';
+ return cmdline;
+}
+
+static const char *const
+std_suffixes[] = {
+ ".com",
+ ".exe",
+ ".bat",
+ ".cmd",
+ 0
+};
+static const char *const
+no_suffixes[] = {
+ "",
+ 0
+};
+
+/* Returns the full path to PROGRAM. If SEARCH is true, look for
+ PROGRAM in each directory in PATH. */
+
+static char *
+find_executable (const char *program, BOOL search)
+{
+ char *full_executable;
+ char *e;
+ size_t fe_len;
+ const char *path = 0;
+ const char *const *ext;
+ const char *p, *q;
+ size_t proglen = strlen (program);
+ int has_extension = !!strchr (program, '.');
+ int has_slash = (strchr (program, '/') || strchr (program, '\\'));
+ HANDLE h;
+
+ if (has_slash)
+ search = FALSE;
+
+ if (search)
+ path = getenv ("PATH");
+ if (!path)
+ path = "";
+
+ fe_len = 0;
+ for (p = path; *p; p = q)
+ {
+ q = p;
+ while (*q != ';' && *q != '\0')
+ q++;
+ if ((size_t)(q - p) > fe_len)
+ fe_len = q - p;
+ if (*q == ';')
+ q++;
+ }
+ fe_len = fe_len + 1 + proglen + (has_extension ? 1 : 5);
+ full_executable = xmalloc (fe_len);
+
+ p = path;
+ do
+ {
+ q = p;
+ while (*q != ';' && *q != '\0')
+ q++;
+
+ e = full_executable;
+ memcpy (e, p, q - p);
+ e += (q - p);
+ if (q - p)
+ *e++ = '\\';
+ strcpy (e, program);
+
+ if (*q == ';')
+ q++;
+
+ for (e = full_executable; *e; e++)
+ if (*e == '/')
+ *e = '\\';
+
+ /* At this point, e points to the terminating NUL character for
+ full_executable. */
+ for (ext = has_extension ? no_suffixes : std_suffixes; *ext; ext++)
+ {
+ /* Remove any current extension. */
+ *e = '\0';
+ /* Add the new one. */
+ strcat (full_executable, *ext);
+
+ /* Attempt to open this file. */
+ h = CreateFile (full_executable, GENERIC_READ,
+ FILE_SHARE_READ | FILE_SHARE_WRITE,
+ 0, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, 0);
+ if (h != INVALID_HANDLE_VALUE)
+ goto found;
+ }
+ p = q;
+ }
+ while (*p);
+ free (full_executable);
+ return 0;
+
+ found:
+ CloseHandle (h);
+ return full_executable;
+}
+
+/* Low-level process creation function. */
+
static long
-spawn_script (const char *executable, const char * const * argv)
+win32_spawn (const char *executable,
+ BOOL search,
+ char *const *argv,
+ DWORD dwCreationFlags,
+ LPSTARTUPINFO si,
+ LPPROCESS_INFORMATION pi)
{
+ char *full_executable;
+ char *cmdline;
+
+ full_executable = NULL;
+ cmdline = NULL;
+
+ full_executable = find_executable (executable, search);
+ if (!full_executable)
+ goto error;
+ cmdline = argv_to_cmdline (argv);
+ if (!cmdline)
+ goto error;
+
+ /* Create the child process. */
+ if (!CreateProcess (full_executable, cmdline,
+ /*lpProcessAttributes=*/NULL,
+ /*lpThreadAttributes=*/NULL,
+ /*bInheritHandles=*/TRUE,
+ dwCreationFlags,
+ /*lpEnvironment=*/NULL,
+ /*lpCurrentDirectory=*/NULL,
+ si,
+ pi))
+ {
+ free (full_executable);
+ return -1;
+ }
+
+ /* Clean up. */
+ CloseHandle (pi->hThread);
+ free (full_executable);
+
+ return (long) pi->hProcess;
+
+ error:
+ if (cmdline)
+ free (cmdline);
+ if (full_executable)
+ free (full_executable);
+ return -1;
+}
+
+static long
+spawn_script (const char *executable, char *const *argv,
+ DWORD dwCreationFlags,
+ LPSTARTUPINFO si,
+ LPPROCESS_INFORMATION pi)
+{
int pid = -1;
int save_errno = errno;
int fd = _open (executable, _O_RDONLY);
@@ -455,17 +566,21 @@
executable = strrchr (executable1, '\\') + 1;
if (!executable)
executable = executable1;
- pid = _spawnvp (_P_NOWAIT, executable, argv);
+ pid = win32_spawn (executable, TRUE, argv,
+ dwCreationFlags, si, pi);
#else
if (strchr (executable1, '\\') == NULL)
- pid = _spawnvp (_P_NOWAIT, executable1, argv);
+ pid = win32_spawn (executable1, TRUE, argv,
+ dwCreationFlags, si, pi);
else if (executable1[0] != '\\')
- pid = _spawnv (_P_NOWAIT, executable1, argv);
+ pid = win32_spawn (executable1, FALSE, argv,
+ dwCreationFlags, si, pi);
else
{
const char *newex = mingw_rootify (executable1);
*avhere = newex;
- pid = _spawnv (_P_NOWAIT, newex, argv);
+ pid = win32_spawn (newex, FALSE, argv,
+ dwCreationFlags, si, pi);
if (executable1 != newex)
free ((char *) newex);
if (pid < 0)
@@ -474,7 +589,8 @@
if (newex != executable1)
{
*avhere = newex;
- pid = _spawnv (_P_NOWAIT, newex, argv);
+ pid = win32_spawn (newex, FALSE, argv,
+ dwCreationFlags, si, pi);
free ((char *) newex);
}
}
@@ -496,150 +612,96 @@
int in, int out, int errdes, const char **errmsg,
int *err)
{
- int org_in, org_out, org_errdes;
long pid;
- const char * const * newargv;
+ HANDLE stdin_handle;
+ HANDLE stdout_handle;
+ HANDLE stderr_handle;
+ DWORD dwCreationFlags;
+ OSVERSIONINFO version_info;
+ STARTUPINFO si;
+ PROCESS_INFORMATION pi;
- org_in = -1;
- org_out = -1;
- org_errdes = -1;
+ stdin_handle = INVALID_HANDLE_VALUE;
+ stdout_handle = INVALID_HANDLE_VALUE;
+ stderr_handle = INVALID_HANDLE_VALUE;
- if (in != STDIN_FILE_NO)
- {
- org_in = _dup (STDIN_FILE_NO);
- if (org_in < 0)
- {
- *err = errno;
- *errmsg = "_dup";
- return -1;
- }
- if (_dup2 (in, STDIN_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (_close (in) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
+ stdin_handle = (HANDLE) _get_osfhandle (in);
+ stdout_handle = (HANDLE) _get_osfhandle (out);
+ if (!(flags & PEX_STDERR_TO_STDOUT))
+ stderr_handle = (HANDLE) _get_osfhandle (errdes);
+ else
+ stderr_handle = stdout_handle;
- if (out != STDOUT_FILE_NO)
+ /* Determine the version of Windows we are running on. */
+ version_info.dwOSVersionInfoSize = sizeof (version_info);
+ GetVersionEx (&version_info);
+ if (version_info.dwPlatformId == VER_PLATFORM_WIN32_WINDOWS)
+ /* On Windows 95/98/ME the CREATE_NO_WINDOW flag is not
+ supported, so we cannot avoid creating a console window. */
+ dwCreationFlags = 0;
+ else
{
- org_out = _dup (STDOUT_FILE_NO);
- if (org_out < 0)
- {
- *err = errno;
- *errmsg = "_dup";
- return -1;
- }
- if (_dup2 (out, STDOUT_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (_close (out) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
+ HANDLE conout_handle;
- if (errdes != STDERR_FILE_NO
- || (flags & PEX_STDERR_TO_STDOUT) != 0)
- {
- org_errdes = _dup (STDERR_FILE_NO);
- if (org_errdes < 0)
+ /* Determine whether or not we have an associated console. */
+ conout_handle = CreateFile("CONOUT$",
+ GENERIC_WRITE,
+ FILE_SHARE_WRITE,
+ /*lpSecurityAttributes=*/NULL,
+ OPEN_EXISTING,
+ FILE_ATTRIBUTE_NORMAL,
+ /*hTemplateFile=*/NULL);
+ if (conout_handle == INVALID_HANDLE_VALUE)
+ /* There is no console associated with this process. Since
+ the child is a console process, the OS would normally
+ create a new console Window for the child. Since we'll be
+ redirecting the child's standard streams, we do not need
+ the console window. */
+ dwCreationFlags = CREATE_NO_WINDOW;
+ else
{
- *err = errno;
- *errmsg = "_dup";
- return -1;
+ /* There is a console associated with the process, so the OS
+ will not create a new console. And, if we use
+ CREATE_NO_WINDOW in this situation, the child will have
+ no associated console. Therefore, if the child's
+ standard streams are connected to the console, the output
+ will be discarded. */
+ CloseHandle(conout_handle);
+ dwCreationFlags = 0;
}
- if (_dup2 ((flags & PEX_STDERR_TO_STDOUT) != 0 ? STDOUT_FILE_NO : errdes,
- STDERR_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (errdes != STDERR_FILE_NO)
- {
- if (_close (errdes) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
}
- newargv = fix_argv (argv);
- pid = (((flags & PEX_SEARCH) != 0 ? _spawnvp : _spawnv)
- (_P_NOWAIT, executable, newargv));
+ /* Since the child will be a console process, it will, by default,
+ connect standard input/output to its console. However, we want
+ the child to use the handles specifically designated above. In
+ addition, if there is no console (such as when we are running in
+ a Cygwin X window), then we must redirect the child's
+ input/output, as there is no console for the child to use. */
+ memset (&si, 0, sizeof (si));
+ si.cb = sizeof (si);
+ si.dwFlags = STARTF_USESTDHANDLES;
+ si.hStdInput = stdin_handle;
+ si.hStdOutput = stdout_handle;
+ si.hStdError = stderr_handle;
+ /* Create the child process. */
+ pid = win32_spawn (executable, (flags & PEX_SEARCH) != 0,
+ argv, dwCreationFlags, &si, &pi);
if (pid == -1)
- pid = spawn_script (executable, newargv);
-
+ pid = spawn_script (executable, argv, dwCreationFlags, &si, &pi);
if (pid == -1)
{
- *err = errno;
- *errmsg = ((flags & PEX_SEARCH) != 0) ? "_spawnvp" : "_spawnv";
+ *err = ENOENT;
+ *errmsg = "CreateProcess";
}
- if (in != STDIN_FILE_NO)
- {
- if (_dup2 (org_in, STDIN_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (_close (org_in) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
+ /* Close the standard output and standard error handles in the
+ parent. */
+ if (out != STDOUT_FILENO)
+ obj->funcs->close (obj, out);
+ if (errdes != STDERR_FILENO)
+ obj->funcs->close (obj, errdes);
- if (out != STDOUT_FILE_NO)
- {
- if (_dup2 (org_out, STDOUT_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (_close (org_out) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
-
- if (errdes != STDERR_FILE_NO
- || (flags & PEX_STDERR_TO_STDOUT) != 0)
- {
- if (_dup2 (org_errdes, STDERR_FILE_NO) < 0)
- {
- *err = errno;
- *errmsg = "_dup2";
- return -1;
- }
- if (_close (org_errdes) < 0)
- {
- *err = errno;
- *errmsg = "_close";
- return -1;
- }
- }
-
return pid;
}
@@ -656,30 +718,34 @@
int *status, struct pex_time *time, int done ATTRIBUTE_UNUSED,
const char **errmsg, int *err)
{
- int termstat;
+ DWORD termstat;
+ HANDLE h;
if (time != NULL)
memset (time, 0, sizeof *time);
+ h = (HANDLE) pid;
+
/* FIXME: If done is non-zero, we should probably try to kill the
process. */
-
- if (_cwait (&termstat, pid, WAIT_CHILD) < 0)
+ if (WaitForSingleObject (h, INFINITE) != WAIT_OBJECT_0)
{
- *err = errno;
- *errmsg = "_cwait";
+ CloseHandle (h);
+ *err = ECHILD;
+ *errmsg = "WaitForSingleObject";
return -1;
}
- /* cwait returns the child process exit code in termstat. A value
- of 3 indicates that the child caught a signal, but not which one.
- Since only SIGABRT, SIGFPE and SIGINT do anything, we report
- SIGABRT. */
-
+ GetExitCodeProcess (h, &termstat);
+ CloseHandle (h);
+
+ /* A value of 3 indicates that the child caught a signal, but not
+ which one. Since only SIGABRT, SIGFPE and SIGINT do anything, we
+ report SIGABRT. */
if (termstat == 3)
*status = SIGABRT;
else
- *status = ((termstat & 0xff) << 8);
+ *status = (termstat & 0xff) << 8;
return 0;
}
@@ -702,6 +768,18 @@
return fdopen (fd, binary ? "rb" : "r");
}
+static FILE *
+pex_win32_fdopenw (struct pex_obj *obj ATTRIBUTE_UNUSED, int fd,
+ int binary)
+{
+ HANDLE h = (HANDLE) _get_osfhandle (fd);
+ if (h == INVALID_HANDLE_VALUE)
+ return NULL;
+ if (! SetHandleInformation (h, HANDLE_FLAG_INHERIT, 0))
+ return NULL;
+ return fdopen (fd, binary ? "wb" : "w");
+}
+
#ifdef MAIN
#include <stdio.h>
Modified: branches/binutils/package/libiberty/pexecute.c
===================================================================
--- branches/binutils/package/libiberty/pexecute.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pexecute.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -101,7 +101,10 @@
vector = XNEWVEC (int, idx);
if (!pex_get_status (pex, idx, vector))
- return -1;
+ {
+ free (vector);
+ return -1;
+ }
*status = vector[pid];
free (vector);
}
Modified: branches/binutils/package/libiberty/pexecute.txh
===================================================================
--- branches/binutils/package/libiberty/pexecute.txh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/pexecute.txh 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,3 +1,4 @@
+ at c -*- mode: texinfo -*-
@deftypefn Extension {struct pex_obj *} pex_init (int @var{flags}, const char *@var{pname}, const char *@var{tempbase})
Prepare to execute one or more programs, with standard output of each
@@ -129,6 +130,67 @@
@end deftypefn
+ at deftypefn Extension {FILE *} pex_input_file (struct pex_obj *@var{obj}, int @var{flags}, const char *@var{in_name})
+
+Return a stream for a temporary file to pass to the first program in
+the pipeline as input.
+
+The name of the input file is chosen according to the same rules
+ at code{pex_run} uses to choose output file names, based on
+ at var{in_name}, @var{obj} and the @code{PEX_SUFFIX} bit in @var{flags}.
+
+Don't call @code{fclose} on the returned stream; the first call to
+ at code{pex_run} closes it automatically.
+
+If @var{flags} includes @code{PEX_BINARY_OUTPUT}, open the stream in
+binary mode; otherwise, open it in the default mode. Including
+ at code{PEX_BINARY_OUTPUT} in @var{flags} has no effect on Unix.
+ at end deftypefn
+
+ at deftypefn Extension {FILE *} pex_input_pipe (struct pex_obj *@var{obj}, int @var{binary})
+
+Return a stream @var{fp} for a pipe connected to the standard input of
+the first program in the pipeline; @var{fp} is opened for writing.
+You must have passed @code{PEX_USE_PIPES} to the @code{pex_init} call
+that returned @var{obj}.
+
+You must close @var{fp} using @code{fclose} yourself when you have
+finished writing data to the pipeline.
+
+The file descriptor underlying @var{fp} is marked not to be inherited
+by child processes.
+
+On systems that do not support pipes, this function returns
+ at code{NULL}, and sets @code{errno} to @code{EINVAL}. If you would
+like to write code that is portable to all systems the @code{pex}
+functions support, consider using @code{pex_input_file} instead.
+
+There are two opportunities for deadlock using
+ at code{pex_input_pipe}:
+
+ at itemize @bullet
+ at item
+Most systems' pipes can buffer only a fixed amount of data; a process
+that writes to a full pipe blocks. Thus, if you write to @file{fp}
+before starting the first process, you run the risk of blocking when
+there is no child process yet to read the data and allow you to
+continue. @code{pex_input_pipe} makes no promises about the
+size of the pipe's buffer, so if you need to write any data at all
+before starting the first process in the pipeline, consider using
+ at code{pex_input_file} instead.
+
+ at item
+Using @code{pex_input_pipe} and @code{pex_read_output} together
+may also cause deadlock. If the output pipe fills up, so that each
+program in the pipeline is waiting for the next to read more data, and
+you fill the input pipe by writing more data to @var{fp}, then there
+is no way to make progress: the only process that could read data from
+the output pipe is you, but you are blocked on the input pipe.
+
+ at end itemize
+
+ at end deftypefn
+
@deftypefn Extension {FILE *} pex_read_output (struct pex_obj *@var{obj}, int @var{binary})
Returns a @code{FILE} pointer which may be used to read the standard
Modified: branches/binutils/package/libiberty/testsuite/Makefile.in
===================================================================
--- branches/binutils/package/libiberty/testsuite/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/testsuite/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
#
# Makefile
-# Copyright (C) 1999, 2002
+# Copyright (C) 1999, 2002, 2006
# Free Software Foundation
#
# This file is part of the libiberty library.
@@ -45,7 +45,7 @@
# CHECK is set to "really_check" or the empty string by configure.
check: @CHECK@
-really-check: check-cplus-dem check-pexecute
+really-check: check-cplus-dem check-pexecute check-expandargv
# Run some tests of the demangler.
check-cplus-dem: test-demangle $(srcdir)/demangle-expected
@@ -55,6 +55,10 @@
check-pexecute: test-pexecute
./test-pexecute
+# Check the expandargv functionality
+check-expandargv: test-expandargv
+ ./test-expandargv
+
TEST_COMPILE = $(CC) @DEFS@ $(LIBCFLAGS) -I.. -I$(INCDIR) $(HDEFINES)
test-demangle: $(srcdir)/test-demangle.c ../libiberty.a
$(TEST_COMPILE) -o test-demangle \
@@ -63,13 +67,19 @@
test-pexecute: $(srcdir)/test-pexecute.c ../libiberty.a
$(TEST_COMPILE) -DHAVE_CONFIG_H -I.. -o test-pexecute \
$(srcdir)/test-pexecute.c ../libiberty.a
+
+test-expandargv: $(srcdir)/test-expandargv.c ../libiberty.a
+ $(TEST_COMPILE) -DHAVE_CONFIG_H -I.. -o test-expandargv \
+ $(srcdir)/test-expandargv.c ../libiberty.a
# Standard (either GNU or Cygnus) rules we don't use.
-info install-info clean-info dvi install etags tags installcheck:
+html install-html info install-info clean-info dvi install etags tags installcheck:
# The standard clean rules.
mostlyclean:
rm -f test-demangle
+ rm -f test-pexecute
+ rm -f test-expandargv
clean: mostlyclean
distclean: clean
rm -f Makefile
Added: branches/binutils/package/libiberty/testsuite/test-expandargv.c
===================================================================
--- branches/binutils/package/libiberty/testsuite/test-expandargv.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libiberty/testsuite/test-expandargv.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,296 @@
+/* expandargv test program,
+ Copyright (C) 2006 Free Software Foundation, Inc.
+ Written by Carlos O'Donell <carlos at codesourcery.com>
+
+ This file is part of the libiberty library, which is part of GCC.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ In addition to the permissions in the GNU General Public License, the
+ Free Software Foundation gives you unlimited permission to link the
+ compiled version of this file into combinations with other programs,
+ and to distribute those combinations without any restriction coming
+ from the use of this file. (The General Public License restrictions
+ do apply in other respects; for example, they cover modification of
+ the file, and distribution when not linked into a combined
+ executable.)
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+#include "libiberty.h"
+#include <stdio.h>
+#include <errno.h>
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_STRING_H
+#include <string.h>
+#endif
+
+#ifndef EXIT_SUCCESS
+#define EXIT_SUCCESS 0
+#endif
+
+#ifndef EXIT_FAILURE
+#define EXIT_FAILURE 1
+#endif
+
+static void fatal_error (int, const char *, int) ATTRIBUTE_NORETURN;
+void writeout_test (int, const char *);
+void run_replaces (char *);
+void hook_char_replace (char *, size_t, char, char);
+int run_tests (const char **);
+void erase_test (int);
+
+/* Test input data, argv before, and argv after:
+
+ The \n is an important part of test_data since expandargv
+ may have to work in environments where \n is translated
+ as \r\n. Thus \n is included in the test data for the file.
+
+ We use \b to indicate that the test data is the null character.
+ This is because we use \0 normally to represent the end of the
+ file data, so we need something else for this. */
+
+#define FILENAME_PATTERN "test-expandargv-%d.lst"
+#define ARGV0 "test-expandargv"
+
+const char *test_data[] = {
+ /* Test 0 - Check for expansion with \r\n */
+ "a\r\nb", /* Test 0 data */
+ ARGV0,
+ "@test-expandargv-0.lst",
+ 0, /* End of argv[] before expansion */
+ ARGV0,
+ "a",
+ "b",
+ 0, /* End of argv[] after expansion */
+
+ /* Test 1 - Check for expansion with \n */
+ "a\nb", /* Test 1 data */
+ ARGV0,
+ "@test-expandargv-1.lst",
+ 0,
+ ARGV0,
+ "a",
+ "b",
+ 0,
+
+ /* Test 2 - Check for expansion with \0 */
+ "a\bb", /* Test 2 data */
+ ARGV0,
+ "@test-expandargv-2.lst",
+ 0,
+ ARGV0,
+ "a",
+ 0,
+
+ /* Test 3 - Check for expansion with only \0 */
+ "\b", /* Test 3 data */
+ ARGV0,
+ "@test-expandargv-3.lst",
+ 0,
+ ARGV0,
+ 0,
+
+ 0 /* Test done marker, don't remove. */
+};
+
+/* Print a fatal error and exit. LINE is the line number where we
+ detected the error, ERRMSG is the error message to print, and ERR
+ is 0 or an errno value to print. */
+
+static void
+fatal_error (int line, const char *errmsg, int err)
+{
+ fprintf (stderr, "test-expandargv:%d: %s", line, errmsg);
+ if (errno != 0)
+ fprintf (stderr, ": %s", xstrerror (err));
+ fprintf (stderr, "\n");
+ exit (EXIT_FAILURE);
+}
+
+/* hook_char_replace:
+ Replace 'replacethis' with 'withthis' */
+
+void
+hook_char_replace (char *string, size_t len, char replacethis, char withthis)
+{
+ int i = 0;
+ for (i = 0; i < len; i++)
+ if (string[i] == replacethis)
+ string[i] = withthis;
+}
+
+/* run_replaces:
+ Hook here all the character for character replaces.
+ Be warned that expanding the string or contracting the string
+ should be handled with care. */
+
+void
+run_replaces (char * string)
+{
+ /* Store original string size */
+ size_t len = strlen (string);
+ hook_char_replace (string, len, '\b', '\0');
+}
+
+/* write_test:
+ Write test datafile */
+
+void
+writeout_test (int test, const char * test_data)
+{
+ char filename[256];
+ FILE *fd;
+ size_t len;
+ char * parse;
+
+ /* Unique filename per test */
+ sprintf (filename, FILENAME_PATTERN, test);
+ fd = fopen (filename, "w");
+ if (fd == NULL)
+ fatal_error (__LINE__, "Failed to create test file.", errno);
+
+ /* Generate RW copy of data for replaces */
+ len = strlen (test_data);
+ parse = malloc (sizeof (char) * (len + 1));
+ if (parse == NULL)
+ fatal_error (__LINE__, "Failed to malloc parse.", errno);
+
+ memcpy (parse, test_data, sizeof (char) * len);
+ /* Run all possible replaces */
+ run_replaces (parse);
+
+ fwrite (parse, len, sizeof (char), fd);
+ free (parse);
+ fclose (fd);
+}
+
+/* erase_test:
+ Erase the test file */
+
+void
+erase_test (int test)
+{
+ char filename[256];
+ sprintf (filename, FILENAME_PATTERN, test);
+ if (unlink (filename) != 0)
+ fatal_error (__LINE__, "Failed to erase test file.", errno);
+}
+
+
+/* run_tests:
+ Run expandargv
+ Compare argv before and after.
+ Return number of fails */
+
+int
+run_tests (const char **test_data)
+{
+ int argc_after, argc_before;
+ char ** argv_before, ** argv_after;
+ int i, j, k, fails, failed;
+
+ i = j = fails = 0;
+ /* Loop over all the tests */
+ while (test_data[j])
+ {
+ /* Write test data */
+ writeout_test (i, test_data[j++]);
+ /* Copy argv before */
+ argv_before = dupargv ((char **) &test_data[j]);
+
+ /* Count argc before/after */
+ argc_before = 0;
+ argc_after = 0;
+ while (test_data[j + argc_before])
+ argc_before++;
+ j += argc_before + 1; /* Skip null */
+ while (test_data[j + argc_after])
+ argc_after++;
+
+ /* Copy argv after */
+ argv_after = dupargv ((char **) &test_data[j]);
+
+ /* Run all possible replaces */
+ for (k = 0; k < argc_before; k++)
+ run_replaces (argv_before[k]);
+ for (k = 0; k < argc_after; k++)
+ run_replaces (argv_after[k]);
+
+ /* Run test: Expand arguments */
+ expandargv (&argc_before, &argv_before);
+
+ failed = 0;
+ /* Compare size first */
+ if (argc_before != argc_after)
+ {
+ printf ("FAIL: test-expandargv-%d. Number of arguments don't match.\n", i);
+ failed++;
+ }
+ /* Compare each of the argv's ... */
+ else
+ for (k = 0; k < argc_after; k++)
+ if (strncmp (argv_before[k], argv_after[k], strlen(argv_after[k])) != 0)
+ {
+ printf ("FAIL: test-expandargv-%d. Arguments don't match.\n", i);
+ failed++;
+ }
+
+ if (!failed)
+ printf ("PASS: test-expandargv-%d.\n", i);
+ else
+ fails++;
+
+ freeargv (argv_before);
+ freeargv (argv_after);
+ /* Advance to next test */
+ j += argc_after + 1;
+ /* Erase test file */
+ erase_test (i);
+ i++;
+ }
+ return fails;
+}
+
+/* main:
+ Run tests.
+ Check result and exit with appropriate code. */
+
+int
+main(int argc, char **argv)
+{
+ int fails;
+ /* Repeat for all the tests:
+ - Parse data array and write into file.
+ - Run replace hooks before writing to file.
+ - Parse data array and build argv before/after.
+ - Run replace hooks on argv before/after
+ - Run expandargv.
+ - Compare output of expandargv argv to after argv.
+ - If they compare the same then test passes
+ else the test fails.
+ - Erase test file. */
+
+ fails = run_tests (test_data);
+ if (!fails)
+ exit (EXIT_SUCCESS);
+ else
+ exit (EXIT_FAILURE);
+}
+
Modified: branches/binutils/package/libtool.m4
===================================================================
--- branches/binutils/package/libtool.m4 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/libtool.m4 2006-04-19 08:33:31 UTC (rev 12)
@@ -103,6 +103,8 @@
AC_REQUIRE([AC_EXEEXT])dnl
dnl
+AC_LIBTOOL_SYS_MAX_CMD_LEN
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -189,6 +191,48 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if AC_TRY_EVAL(ac_compile); then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -237,6 +281,65 @@
esac
])
+
+# AC_LIBTOOL_SYS_MAX_CMD_LEN
+# --------------------------
+AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN],
+[# find the maximum length of command line arguments
+AC_MSG_CHECKING([the maximum length of command line arguments])
+AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [dnl
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+])
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ AC_MSG_RESULT($lt_cv_sys_max_cmd_len)
+else
+ AC_MSG_RESULT(none)
+fi
+])# AC_LIBTOOL_SYS_MAX_CMD_LEN
+
+
# AC_LIBTOOL_DLOPEN - enable checks for dlopen support
AC_DEFUN([AC_LIBTOOL_DLOPEN], [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])])
@@ -565,6 +668,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -575,6 +679,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -635,14 +740,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method=['file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )'] ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -738,8 +836,9 @@
[AC_REQUIRE([AC_CANONICAL_HOST])dnl
LIBM=
case $host in
-*-*-beos* | *-*-cygwin* | *-*-pw32*)
+*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
# These system don't have libm
+ # on darwin the libm is a symbolic link to libSystem.dylib
;;
*-ncr-sysv4.3*)
AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw")
Modified: branches/binutils/package/ltmain.sh
===================================================================
--- branches/binutils/package/ltmain.sh 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/ltmain.sh 2006-04-19 08:33:31 UTC (rev 12)
@@ -3550,7 +3550,7 @@
# Now hardcode the library paths
rpath=
hardcode_libdirs=
- for libdir in $compile_rpath $finalize_rpath; do
+ for libdir in $compile_rpath; do
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
Modified: branches/binutils/package/opcodes/ChangeLog
===================================================================
--- branches/binutils/package/opcodes/ChangeLog 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ChangeLog 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,1940 +1,258 @@
-2005-12-13 DJ Delorie <dj at redhat.com>
+2006-04-12 Hochstein <hochstein at algo.informatik.tu-darmstadt.de>
- * m32c-desc.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
+ PR binutils/2454
+ * avr-dis.c (avr_operand): Arrange for a comment to appear before
+ the symolic form of an address, so that the output of objdump -d
+ can be reassembled.
-2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+2006-04-10 DJ Delorie <dj at redhat.com>
- * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
- * Makefile.in: Rebuilt.
- * configure.in: Replace ms1 files with mt files.
- * configure: Rebuilt.
-
-2005-12-08 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (MAXLEN): Reduce to architectural limit.
- (fetch_data): Check for sufficient buffer size.
-
-2005-12-08 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (OP_ST): Remove prefix in Intel mode.
-
-2005-12-08 Daniel Jacobowitz <dan at codesourcery.com>
-
- * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
-
-2005-12-07 Hans-Peter Nilsson <hp at axis.com>
-
- * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
- MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
-
-2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
-
- PR gas/1874
- * i386-dis.c (address_mode): New enum type.
- (address_mode): New variable.
- (mode_64bit): Removed.
- (ckprefix): Updated to check address_mode instead of mode_64bit.
- (prefix_name): Likewise.
- (print_insn): Likewise.
- (putop): Likewise.
- (print_operand_value): Likewise.
- (intel_operand_size): Likewise.
- (OP_E): Likewise.
- (OP_G): Likewise.
- (set_op): Likewise.
- (OP_REG): Likewise.
- (OP_I): Likewise.
- (OP_I64): Likewise.
- (OP_OFF): Likewise.
- (OP_OFF64): Likewise.
- (ptr_reg): Likewise.
- (OP_C): Likewise.
- (SVME_Fixup): Likewise.
- (print_insn): Set address_mode.
- (PNI_Fixup): Add 64bit and address size override support for
- monitor and mwait.
-
-2005-12-06 Hans-Peter Nilsson <hp at axis.com>
-
- * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
- (print_with_operands): Check for prefix when [PC+] is seen.
-
-2005-12-02 Dave Brolley <brolley at redhat.com>
-
- * configure.in (cgen_files): Add cgen-bitset.lo.
- (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
- * Makefile.am (CFILES): Add cgen-bitset.c.
- (ALL_MACHINES): Add cgen-bitset.lo.
- (cgen-bitset.lo): New target.
- * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
- (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
- (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
- (cgen_bitset_union): Moved from here ...
- * cgen-bitset.c: ... to here. New file.
- * Makefile.in: Regenerated.
- * configure: Regenerated.
-
-2005-11-22 James E Wilson <wilson at specifix.com>
-
- * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
- opcode_fprintf_vma): New.
- (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
-
-2005-11-16 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
- frsqrtes.
-
-2005-11-14 David Ung <davidu at mips.com>
-
- * mips16-opc.c: Add MIPS16e save/restore opcodes.
- * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
- codes for save/restore.
-
-2005-11-10 Andreas Schwab <schwab at suse.de>
-
- * m68k-dis.c (print_insn_m68k): Only match FPU insns with
- coprocessor ID 1.
-
-2005-11-08 H.J. Lu <hongjiu.lu at intel.com>
-
- * m32c-desc.c: Regenerated.
-
-2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
-
- Add ms2.
- * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
- ms1-opc.c, ms1-opc.h: Regenerated.
-
-2005-11-07 Steve Ellcey <sje at cup.hp.com>
-
- * configure: Regenerate after modifying bfd/warning.m4.
-
-2005-11-07 Alan Modra <amodra at bigpond.net.au>
-
- * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
- ignored rex prefixes here.
- (print_insn): Instead, handle them similarly to fwait followed
- by non-fp insns.
-
-2005-11-02 H.J. Lu <hongjiu.lu at intel.com>
-
- * iq2000-desc.c: Regenerated.
- * iq2000-desc.h: Likewise.
- * iq2000-dis.c: Likewise.
- * iq2000-opc.c: Likewise.
-
-2005-11-02 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (print_insn_thumb32): Word align blx target address.
-
-2005-10-31 Alan Modra <amodra at bigpond.net.au>
-
- * arm-dis.c (print_insn): Warning fix.
-
-2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * dep-in.sed: Replace " ./" with " ".
-
-2005-10-28 Dave Brolley <brolley at redhat.com>
-
- * All CGEN-generated sources: Regenerate.
-
- Contribute the following changes:
- 2005-09-19 Dave Brolley <brolley at redhat.com>
-
- * disassemble.c (disassemble_init_for_target): Add 'break' to case for
- bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
- bfd_arch_m32c case.
-
- 2005-02-16 Dave Brolley <brolley at redhat.com>
-
- * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
- cgen_isa_mask_* to cgen_bitset_*.
- * cgen-opc.c: Likewise.
-
- 2003-11-28 Richard Sandiford <rsandifo at redhat.com>
-
- * cgen-dis.in (print_insn_ at arch@): Fix comparison with cached isas.
- * *-dis.c: Regenerate.
-
- 2003-06-05 DJ Delorie <dj at redhat.com>
-
- * cgen-dis.in (print_insn_ at arch@): Copy prev_isas, don't assign
- it, as it may point to a reused buffer. Set prev_isas when we
- change cpus.
-
- 2002-12-13 Dave Brolley <brolley at redhat.com>
-
- * cgen-opc.c (cgen_isa_mask_create): New support function for
- CGEN_ISA_MASK.
- (cgen_isa_mask_init): Ditto.
- (cgen_isa_mask_clear): Ditto.
- (cgen_isa_mask_add): Ditto.
- (cgen_isa_mask_set): Ditto.
- (cgen_isa_supported): Ditto.
- (cgen_isa_mask_compare): Ditto.
- (cgen_isa_mask_intersection): Ditto.
- (cgen_isa_mask_copy): Ditto.
- (cgen_isa_mask_combine): Ditto.
- * cgen-dis.in (libiberty.h): #include it.
- (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
- (print_insn_ at arch@): Use CGEN_ISA_MASK and support functions.
- * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
- * Makefile.in: Regenerated.
-
-2005-10-27 DJ Delorie <dj at redhat.com>
-
* m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
-2005-10-26 DJ Delorie <dj at redhat.com>
+2006-04-06 Carlos O'Donell <carlos at codesourcery.com>
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
-
-2005-10-26 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (arm_opcodes): Correct "sel" entry.
-
-2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * m32r-asm.c: Regenerate.
-
-2005-10-25 DJ Delorie <dj at redhat.com>
-
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
-
-2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
-
- * configure.in: Add target architecture bfd_arch_z80.
- * configure: Regenerated.
- * disassemble.c (disassembler)<ARCH_z80>: Add case
- bfd_arch_z80.
- * z80-dis.c: New file.
-
-2005-10-25 Alan Modra <amodra at bigpond.net.au>
-
- * po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
-
-2005-10-24 Jan Beulich <jbeulich at novell.com>
-
- * ia64-asmtab.c: Regenerate.
-
-2005-10-21 DJ Delorie <dj at redhat.com>
-
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
-
-2005-10-21 Nick Clifton <nickc at redhat.com>
-
- * bfin-dis.c: Tidy up code, removing redundant constructs.
-
-2005-10-19 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
- instructions.
-
-2005-10-18 Nick Clifton <nickc at redhat.com>
-
- * m32r-asm.c: Regenerate after updating m32r.opc.
-
-2005-10-18 Jie Zhang <jie.zhang at analog.com>
-
- * bfin-dis.c (print_insn_bfin): Do proper endian transform when
- reading instruction from memory.
-
-2005-10-18 Nick Clifton <nickc at redhat.com>
-
- * m32r-asm.c: Regenerate after updating m32r.opc.
-
-2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * m32r-asm.c: Regenerate after updating m32r.opc.
-
-2005-10-08 James Lemke <jim at wasabisystems.com>
-
- * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
- operations.
-
-2005-10-06 Daniel Jacobowitz <dan at codesourcery.com>
-
- * ppc-dis.c (struct dis_private): Remove.
- (powerpc_dialect): Avoid aliasing warnings.
- (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
-
-2005-09-30 Nick Clifton <nickc at redhat.com>
-
- * po/ga.po: New Irish translation.
- * configure.in (ALL_LINGUAS): Add "ga".
- * configure: Regenerate.
-
-2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerated.
- * aclocal.m4: Likewise.
- * configure: Likewise.
-
-2005-09-30 Catherine Moore <clm at cm00re.com>
-
- * Makefile.am: Bfin support.
- * Makefile.in: Regenerated.
- * aclocal.m4: Regenerated.
- * bfin-dis.c: New file.
- * configure.in: Bfin support.
- * configure: Regenerated.
- * disassemble.c (ARCH_bfin): Define.
- (disassembler): Add case for bfd_arch_bfin.
-
-2005-09-28 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
- (indirEv): Use it.
- (stackEv): New.
- (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
- (dis386): Document and use new 'V' meta character. Use it for
- single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
- opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
- (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
- data prefix as used whenever DFLAG was examined. Handle 'V'.
- (intel_operand_size): Use stack_v_mode.
- (OP_E): Use stack_v_mode, but handle only the special case of
- 64-bit mode without operand size override here; fall through to
- v_mode case otherwise.
- (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
- and no operand size override is present.
- (OP_J): Use get32s for obtaining the displacement also when rex64
- is present.
-
-2005-09-08 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
-
-2005-09-06 Chao-ying Fu <fu at mips.com>
-
- * mips-opc.c (MT32): New define.
- (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
- bottom to avoid opcode collision with "mftr" and "mttr".
- Add MT instructions.
- * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
- (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
- formats.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): Add null terminator.
-
-2005-09-02 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): New.
- (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
- (print_insn_coprocessor): New function.
- (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
- format characters.
- (print_insn_thumb32): Use print_insn_coprocessor.
-
-2005-08-30 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
-
-2005-08-26 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (intel_operand_size): New, broken out from OP_E for
- re-use.
- (OP_E): Call intel_operand_size, move call site out of mode
- dependent code.
- (OP_OFF): Call intel_operand_size if suffix_always. Remove
- ATTRIBUTE_UNUSED from parameters.
- (OP_OFF64): Likewise.
- (OP_ESreg): Call intel_operand_size.
- (OP_DSreg): Likewise.
- (OP_DIR): Use colon rather than semicolon as separator of far
- jump/call operands.
-
-2005-08-25 Chao-ying Fu <fu at mips.com>
-
- * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
- (mips_builtin_opcodes): Add DSP instructions.
- * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
- mips64, mips64r2.
- (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
- operand formats.
-
-2005-08-23 David Ung <davidu at mips.com>
-
- * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
- instructions to the table.
-
-2005-08-18 Alan Modra <amodra at bigpond.net.au>
-
- * a29k-dis.c: Delete.
- * Makefile.am: Remove a29k support.
- * configure.in: Likewise.
- * disassemble.c: Likewise.
+ * Makefile.am: Add install-html target.
* Makefile.in: Regenerate.
- * configure: Regenerate.
- * po/POTFILES.in: Regenerate.
-2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
+2006-04-06 Nick Clifton <nickc at redhat.com>
- * ppc-dis.c (powerpc_dialect): Handle e300.
- (print_ppc_disassembler_options): Likewise.
- * ppc-opc.c (PPCE300): Define.
- (powerpc_opcodes): Mark icbt as available for the e300.
+ * po/vi/po: Updated Vietnamese translation.
-2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+2006-03-31 Paul Koning <ni1d at arrl.net>
- * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
- Use "rp" instead of "%r2" in "b,l" insns.
+ * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
-2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
+2006-03-16 Bernd Schmidt <bernd.schmidt at analog.com>
- * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
- * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
- (main): Likewise.
- * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
- and 4 bit optional masks.
- (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
- INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
- (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
- MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
- (s390_opformats): Likewise.
- * s390-opc.txt: Add new instructions for cpu type z9-109.
+ * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
+ logic to identify halfword shifts.
-2005-08-05 John David Anglin <dave.anglin at nrc-crnc.gc.ca>
+2006-03-16 Paul Brook <paul at codesourcery.com>
- * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
+ * arm-dis.c (arm_opcodes): Rename swi to svc.
+ (thumb_opcodes): Ditto.
-2005-07-29 Paul Brook <paul at codesourcery.com>
+2006-03-13 DJ Delorie <dj at redhat.com>
- * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
-
-2005-07-29 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
- (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
-
-2005-07-25 DJ Delorie <dj at redhat.com>
-
- * m32c-asm.c Regenerate.
- * m32c-dis.c Regenerate.
-
-2005-07-20 DJ Delorie <dj at redhat.com>
-
- * disassemble.c (disassemble_init_for_target): M32C ISAs are
- enums, so convert them to bit masks, which attributes are.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
- * configure.in: Restore alpha ordering to list of arches.
- * configure: Regenerate.
- * disassemble.c: Restore alpha ordering to list of arches.
-
-2005-07-18 Nick Clifton <nickc at redhat.com>
-
* m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-ibld.h: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
+ * m32c-desc.c: Likewise.
+ * m32c-desc.h: Likewise.
+ * m32c-dis.c: Likewise.
+ * m32c-ibld.c: Likewise.
+ * m32c-opc.c: Likewise.
+ * m32c-opc.h: Likewise.
-2005-07-18 H.J. Lu <hongjiu.lu at intel.com>
+2006-03-10 DJ Delorie <dj at redhat.com>
- * i386-dis.c (PNI_Fixup): Update comment.
- (VMX_Fixup): Properly handle the suffix check.
+ * m32c-desc.c: Regenerate with mul.l, mulu.l.
+ * m32c-opc.c: Likewise.
+ * m32c-opc.h: Likewise.
-2005-07-16 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
- * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
- mfctl disassembly.
+2006-03-09 Nick Clifton <nickc at redhat.com>
-2005-07-16 Alan Modra <amodra at bigpond.net.au>
+ * po/sv.po: Updated Swedish translation.
- * Makefile.am: Run "make dep-am".
- (stamp-m32c): Fix cpu dependencies.
- * Makefile.in: Regenerate.
- * ip2k-dis.c: Regenerate.
+2006-03-07 H.J. Lu <hongjiu.lu at intel.com>
-2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
+ PR binutils/2428
+ * i386-dis.c (REP_Fixup): New function.
+ (AL): Remove duplicate.
+ (Xbr): New.
+ (Xvr): Likewise.
+ (Ybr): Likewise.
+ (Yvr): Likewise.
+ (indirDXr): Likewise.
+ (ALr): Likewise.
+ (eAXr): Likewise.
+ (dis386): Updated entries of ins, outs, movs, lods and stos.
- * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
- (VMX_Fixup): New. Fix up Intel VMX Instructions.
- (Em): New.
- (Gm): New.
- (VM): New.
- (dis386_twobyte): Updated entries 0x78 and 0x79.
- (twobyte_has_modrm): Likewise.
- (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
- (OP_G): Handle m_mode.
+2006-03-05 Nick Clifton <nickc at redhat.com>
-2005-07-14 Jim Blandy <jimb at redhat.com>
-
- Add support for the Renesas M32C and M16C.
- * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
- * m32c-desc.h, m32c-opc.h: New.
- * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
- (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
- m32c-opc.c.
- (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
- m32c-ibld.lo, m32c-opc.lo.
- (CLEANFILES): List stamp-m32c.
- (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
- (CGEN_CPUS): Add m32c.
- (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
- (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
- (m32c_opc_h): New variable.
- (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
- (m32c-opc.lo): New rules.
- * Makefile.in: Regenerated.
- * configure.in: Add case for bfd_m32c_arch.
- * configure: Regenerated.
- * disassemble.c (ARCH_m32c): New.
- [ARCH_m32c]: #include "m32c-desc.h".
- (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
- (disassemble_init_for_target) [ARCH_m32c]: Same.
-
- * cgen-ops.h, cgen-types.h: New files.
- * Makefile.am (HFILES): List them.
- * Makefile.in: Regenerated.
-
-2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
-
- * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
- d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
- ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
- m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
- ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
- v850-dis.c: Fix format bugs.
- * ia64-gen.c (fail, warn): Add format attribute.
- * or32-opc.c (debug): Likewise.
-
-2005-07-07 Khem Raj <kraj at mvista.com>
-
- * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
- disassembly pattern.
-
-2005-07-06 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (stamp-m32r): Fix path to cpu files.
- (stamp-m32r, stamp-iq2000): Likewise.
- * Makefile.in: Regenerate.
- * m32r-asm.c: Regenerate.
- * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
- ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
-
-2005-07-05 Nick Clifton <nickc at redhat.com>
-
+ * cgen-ibld.in (insert_normal): Cope with attempts to insert a
+ signed 32-bit value into an unsigned 32-bit field when the host is
+ a 64-bit machine.
+ * fr30-ibld.c: Regenerate.
+ * frv-ibld.c: Regenerate.
+ * ip2k-ibld.c: Regenerate.
* iq2000-asm.c: Regenerate.
- * ms1-asm.c: Regenerate.
+ * iq2000-ibld.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * openrisc-ibld.c: Regenerate.
+ * xc16x-ibld.c: Regenerate.
+ * xstormy16-ibld.c: Regenerate.
-2005-07-05 Jan Beulich <jbeulich at novell.com>
+2006-03-03 Shrirang Khisti <shrirangk at kpitcummins.com)
- * i386-dis.c (SVME_Fixup): New.
- (grps): Use it for the lidt entry.
- (PNI_Fixup): Call OP_M rather than OP_E.
- (INVLPG_Fixup): Likewise.
+ * xc16x-asm.c: Regenerate.
+ * xc16x-dis.c: Regenerate.
-2005-07-04 H.J. Lu <hongjiu.lu at intel.com>
+2006-02-27 Carlos O'Donell <carlos at codesourcery.com>
- * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
+ * po/Make-in: Add html target.
-2005-07-01 Nick Clifton <nickc at redhat.com>
+2006-02-27 H.J. Lu <hongjiu.lu at intel.com>
- * a29k-dis.c: Update to ISO C90 style function declarations and
- fix formatting.
- * alpha-opc.c: Likewise.
- * arc-dis.c: Likewise.
- * arc-opc.c: Likewise.
- * avr-dis.c: Likewise.
- * cgen-asm.in: Likewise.
- * cgen-dis.in: Likewise.
- * cgen-ibld.in: Likewise.
- * cgen-opc.c: Likewise.
- * cris-dis.c: Likewise.
- * d10v-dis.c: Likewise.
- * d30v-dis.c: Likewise.
- * d30v-opc.c: Likewise.
- * dis-buf.c: Likewise.
- * dlx-dis.c: Likewise.
- * h8300-dis.c: Likewise.
- * h8500-dis.c: Likewise.
- * hppa-dis.c: Likewise.
- * i370-dis.c: Likewise.
- * i370-opc.c: Likewise.
- * m10200-dis.c: Likewise.
- * m10300-dis.c: Likewise.
- * m68k-dis.c: Likewise.
- * m88k-dis.c: Likewise.
- * mips-dis.c: Likewise.
- * mmix-dis.c: Likewise.
- * msp430-dis.c: Likewise.
- * ns32k-dis.c: Likewise.
- * or32-dis.c: Likewise.
- * or32-opc.c: Likewise.
- * pdp11-dis.c: Likewise.
- * pj-dis.c: Likewise.
- * s390-dis.c: Likewise.
- * sh-dis.c: Likewise.
- * sh64-dis.c: Likewise.
- * sparc-dis.c: Likewise.
- * sparc-opc.c: Likewise.
- * sysdep.h: Likewise.
- * tic30-dis.c: Likewise.
- * tic4x-dis.c: Likewise.
- * tic80-dis.c: Likewise.
- * v850-dis.c: Likewise.
- * v850-opc.c: Likewise.
- * vax-dis.c: Likewise.
- * w65-dis.c: Likewise.
- * z8kgen.c: Likewise.
+ * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
+ Intel Merom New Instructions.
+ (THREE_BYTE_0): Likewise.
+ (THREE_BYTE_1): Likewise.
+ (three_byte_table): Likewise.
+ (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
+ THREE_BYTE_1 for entry 0x3a.
+ (twobyte_has_modrm): Updated.
+ (twobyte_uses_SSE_prefix): Likewise.
+ (print_insn): Handle 3-byte opcodes used by Intel Merom New
+ Instructions.
- * fr30-*: Regenerate.
- * frv-*: Regenerate.
- * ip2k-*: Regenerate.
- * iq2000-*: Regenerate.
- * m32r-*: Regenerate.
- * ms1-*: Regenerate.
- * openrisc-*: Regenerate.
- * xstormy16-*: Regenerate.
+2006-02-24 David S. Miller <davem at sunset.davemloft.net>
-2005-06-23 Ben Elliston <bje at gnu.org>
+ * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
+ (v9_hpriv_reg_names): New table.
+ (print_insn_sparc): Allow values up to 16 for '?' and '!'.
+ New cases '$' and '%' for read/write hyperprivileged register.
+ * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
+ window handling and rdhpr/wrhpr instructions.
+
+2006-02-24 DJ Delorie <dj at redhat.com>
- * m68k-dis.c: Use ISC C90.
- * m68k-opc.c: Formatting fixes.
+ * m32c-desc.c: Regenerate with linker relaxation attributes.
+ * m32c-desc.h: Likewise.
+ * m32c-dis.c: Likewise.
+ * m32c-opc.c: Likewise.
-2005-06-16 David Ung <davidu at mips.com>
+2006-02-24 Paul Brook <paul at codesourcery.com>
- * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
- instructions to the table; seb/seh/sew/zeb/zeh/zew.
+ * arm-dis.c (arm_opcodes): Add V7 instructions.
+ (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
+ (print_arm_address): New function.
+ (print_insn_arm): Use it. Add 'P' and 'U' cases.
+ (psr_name): New function.
+ (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
-2005-06-15 Dave Brolley <brolley at redhat.com>
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
- Contribute Morpho ms1 on behalf of Red Hat
- * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
- ms1-opc.h: New files, Morpho ms1 target.
+ * ia64-opc-i.c (bXc): New.
+ (mXc): Likewise.
+ (OpX2TaTbYaXcC): Likewise.
+ (TF). Likewise.
+ (TFCM). Likewise.
+ (ia64_opcodes_i): Add instructions for tf.
- 2004-05-14 Stan Cox <scox at redhat.com>
+ * ia64-opc.h (IMMU5b): New.
- * disassemble.c (ARCH_ms1): Define.
- (disassembler): Handle bfd_arch_ms1
+ * ia64-asmtab.c: Regenerated.
- 2004-05-13 Michael Snyder <msnyder at redhat.com>
+2006-02-23 H.J. Lu <hongjiu.lu at intel.com>
- * Makefile.am, Makefile.in: Add ms1 target.
- * configure.in: Ditto.
+ * ia64-gen.c: Update copyright years.
+ * ia64-opc-b.c: Likewise.
-2005-06-08 Zack Weinberg <zack at codesourcery.com>
+2006-02-22 H.J. Lu <hongjiu.lu at intel.com>
- * arm-opc.h: Delete; fold contents into ...
- * arm-dis.c: ... here. Move includes of internal COFF headers
- next to includes of internal ELF headers.
- (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
- (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
- (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
- (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
- (iwmmxt_wwnames, iwmmxt_wwssnames):
- Make const.
- (regnames): Remove iWMMXt coprocessor register sets.
- (iwmmxt_regnames, iwmmxt_cregnames): New statics.
- (get_arm_regnames): Adjust fourth argument to match above changes.
- (set_iwmmxt_regnames): Delete.
- (print_insn_arm): Constify 'c'. Use ISO syntax for function
- pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
- and iwmmxt_cregnames, not set_iwmmxt_regnames.
- (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
- ISO syntax for function pointer calls.
+ * ia64-gen.c (lookup_regindex): Handle ".vm".
+ (print_dependency_table): Handle '\"'.
-2005-06-07 Zack Weinberg <zack at codesourcery.com>
+ * ia64-ic.tbl: Updated from SDM 2.2.
+ * ia64-raw.tbl: Likewise.
+ * ia64-waw.tbl: Likewise.
+ * ia64-asmtab.c: Regenerated.
- * arm-dis.c: Split up the comments describing the format codes, so
- that the ARM and 16-bit Thumb opcode tables each have comments
- preceding them that describe all the codes, and only the codes,
- valid in those tables. (32-bit Thumb table is already like this.)
- Reorder the lists in all three comments to match the order in
- which the codes are implemented.
- Remove all forward declarations of static functions. Convert all
- function definitions to ISO C format.
- (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
- Return nothing.
- (print_insn_thumb16): Remove unused case 'I'.
- (print_insn): Update for changed calling convention of subroutines.
+ * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
-2005-05-25 Jan Beulich <jbeulich at novell.com>
+2006-02-17 Shrirang Khisti <shrirangk at kpitcummins.com>
+ Anil Paranjape <anilp1 at kpitcummins.com>
+ Shilin Shakti <shilins at kpitcummins.com>
- * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
- hex (but retain it being displayed as signed). Remove redundant
- checks. Add handling of displacements for 16-bit addressing in Intel
- mode.
-
-2005-05-25 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
- (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
- masking of 'rm' in 16-bit memory address handling.
-
-2005-05-19 Anton Blanchard <anton at samba.org>
-
- * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
- (print_ppc_disassembler_options): Document it.
- * ppc-opc.c (SVC_LEV): Define.
- (LEV): Allow optional operand.
- (POWER5): Define.
- (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
- "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
-
-2005-05-19 Kelley Cook <kcook at gcc.gnu.org>
-
- * Makefile.in: Regenerate.
-
-2005-05-17 Zack Weinberg <zack at codesourcery.com>
-
- * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
- instructions. Adjust disassembly of some opcodes to match
- unified syntax.
- (thumb32_opcodes): New table.
- (print_insn_thumb): Rename print_insn_thumb16; don't handle
- two-halfword branches here.
- (print_insn_thumb32): New function.
- (print_insn): Choose among print_insn_arm, print_insn_thumb16,
- and print_insn_thumb32. Be consistent about order of
- halfwords when printing 32-bit instructions.
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- PR 843
- * i386-dis.c (branch_v_mode): New.
- (indirEv): Use branch_v_mode instead of v_mode.
- (OP_E): Handle branch_v_mode.
-
-2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
-
- * d10v-dis.c (dis_2_short): Support 64bit host.
-
-2005-05-07 Nick Clifton <nickc at redhat.com>
-
- * po/nl.po: Updated translation.
-
-2005-05-07 Nick Clifton <nickc at redhat.com>
-
- * Update the address and phone number of the FSF organization in
- the GPL notices in the following files:
- a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
- arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
- avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
- cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
- crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
- d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
- fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
- fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
- frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
- h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
- i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
- ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
- ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
- ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
- ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
- iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
- iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
- m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
- m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
- m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
- maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
- mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
- openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
- openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
- or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
- pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
- s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
- sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
- tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
- v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
- xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
- xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
- xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
-
-2005-05-05 James E Wilson <wilson at specifixinc.com>
-
- * ia64-opc.c: Include sysdep.h before libiberty.h.
-
-2005-05-05 Nick Clifton <nickc at redhat.com>
-
- * configure.in (ALL_LINGUAS): Add vi.
+ * xc16x-desc.h: New file
+ * xc16x-desc.c: New file
+ * xc16x-opc.h: New file
+ * xc16x-opc.c: New file
+ * xc16x-ibld.c: New file
+ * xc16x-asm.c: New file
+ * xc16x-dis.c: New file
+ * Makefile.am: Entries for xc16x
+ * Makefile.in: Regenerate
+ * cofigure.in: Add xc16x target information.
* configure: Regenerate.
- * po/vi.po: New.
+ * disassemble.c: Add xc16x target information.
-2005-04-26 Jerome Guitton <guitton at gnat.com>
+2006-02-11 H.J. Lu <hongjiu.lu at intel.com>
- * configure.in: Fix the check for basename declaration.
- * configure: Regenerate.
+ * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
+ moves.
-2005-04-19 Alan Modra <amodra at bigpond.net.au>
+2006-02-11 H.J. Lu <hongjiu.lu at intel.com>
- * ppc-opc.c (RTO): Define.
- (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
- entries to suit PPC440.
+ * i386-dis.c ('Z'): Add a new macro.
+ (dis386_twobyte): Use "movZ" for control register moves.
-2005-04-18 Mark Kettenis <kettenis at gnu.org>
+2006-02-10 Nick Clifton <nickc at redhat.com>
- * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
- Add xcrypt-ctr.
-
-2005-04-14 Nick Clifton <nickc at redhat.com>
-
- * po/fi.po: New translation: Finnish.
- * configure.in (ALL_LINGUAS): Add fi.
- * configure: Regenerate.
-
-2005-04-14 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am (NO_WERROR): Define.
- * configure.in: Invoke AM_BINUTILS_WARNINGS.
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
-
-2005-04-04 Nick Clifton <nickc at redhat.com>
-
- * fr30-asm.c: Regenerate.
- * frv-asm.c: Regenerate.
* iq2000-asm.c: Regenerate.
- * m32r-asm.c: Regenerate.
- * openrisc-asm.c: Regenerate.
-2005-04-01 Jan Beulich <jbeulich at novell.com>
+2006-02-07 Nathan Sidwell <nathan at codesourcery.com>
- * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
- visible operands in Intel mode. The first operand of monitor is
- %rax in 64-bit mode.
+ * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
-2005-04-01 Jan Beulich <jbeulich at novell.com>
+2006-01-26 David Ung <davidu at mips.com>
- * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
- easier future additions.
+ * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
+ ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
+ floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
+ nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
+ rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
-2005-03-31 Jerome Guitton <guitton at gnat.com>
+2006-01-18 Arnold Metselaar <arnoldm at sourceware.org>
- * configure.in: Check for basename.
- * configure: Regenerate.
- * config.in: Ditto.
+ * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
+ ld_d_r, pref_xd_cb): Use signed char to hold data to be
+ disassembled.
+ * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
+ buffer overflows when disassembling instructions like
+ ld (ix+123),0x23
+ * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
+ operand, if the offset is negative.
-2005-03-29 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-17 Arnold Metselaar <arnoldm at sourceware.org>
- * i386-dis.c (SEG_Fixup): New.
- (Sv): New.
- (dis386): Use "Sv" for 0x8c and 0x8e.
+ * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
+ unsigned char to hold data to be disassembled.
-2005-03-21 Jan-Benedict Glaw <jbglaw at lug-owl.de>
- Nick Clifton <nickc at redhat.com>
+2006-01-17 Andreas Schwab <schwab at suse.de>
- * vax-dis.c: (entry_addr): New varible: An array of user supplied
- function entry mask addresses.
- (entry_addr_occupied_slots): New variable: The number of occupied
- elements in entry_addr.
- (entry_addr_total_slots): New variable: The total number of
- elements in entry_addr.
- (parse_disassembler_options): New function. Fills in the entry_addr
- array.
- (free_entry_array): New function. Release the memory used by the
- entry addr array. Suppressed because there is no way to call it.
- (is_function_entry): Check if a given address is a function's
- start address by looking at supplied entry mask addresses and
- symbol information, if available.
- (print_insn_vax): Use parse_disassembler_options and is_function_entry.
+ PR binutils/1486
+ * disassemble.c (disassemble_init_for_target): Set
+ disassembler_needs_relocs for bfd_arch_arm.
-2005-03-23 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-16 Paul Brook <paul at codesourcery.com>
- * cris-dis.c (print_with_operands): Use ~31L for long instead
- of ~31.
+ * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
+ f?add?, and f?sub? instructions.
-2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
+2006-01-16 Nick Clifton <nickc at redhat.com>
- * mmix-opc.c (O): Revert the last change.
- (Z): Likewise.
-
-2005-03-19 H.J. Lu <hongjiu.lu at intel.com>
-
- * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
- (Z): Likewise.
-
-2005-03-19 Hans-Peter Nilsson <hp at bitrange.com>
-
- * mmix-opc.c (O, Z): Force expression as unsigned long.
-
-2005-03-18 Nick Clifton <nickc at redhat.com>
-
- * ip2k-asm.c: Regenerate.
- * op/opcodes.pot: Regenerate.
-
-2005-03-16 Nick Clifton <nickc at redhat.com>
- Ben Elliston <bje at au.ibm.com>
-
- * configure.in (werror): New switch: Add -Werror to the
- compiler command line. Enabled by default. Disable via
- --disable-werror.
+ * po/zh_CN.po: New Chinese (simplified) translation.
+ * configure.in (ALL_LINGUAS): Add "zh_CH".
* configure: Regenerate.
-2005-03-16 Alan Modra <amodra at bigpond.net.au>
+2006-01-05 Paul Brook <paul at codesourcery.com>
- * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
- BOOKE.
+ * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
-2005-03-15 Alan Modra <amodra at bigpond.net.au>
+2006-01-06 DJ Delorie <dj at redhat.com>
- * po/es.po: Commit new Spanish translation.
+ * m32c-desc.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
- * po/fr.po: Commit new French translation.
+2006-01-03 DJ Delorie <dj at redhat.com>
-2005-03-14 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+ * cgen-ibld.in (extract_normal): Avoid memory range errors.
+ * m32c-ibld.c: Regenerated.
- * vax-dis.c: Fix spelling error
- (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
- of just "Entry mask: < r1 ... >"
-
-2005-03-12 Zack Weinberg <zack at codesourcery.com>
-
- * arm-dis.c (arm_opcodes): Document %E and %V.
- Add entries for v6T2 ARM instructions:
- bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
- (print_insn_arm): Add support for %E and %V.
- (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
-
-2005-03-10 Jeff Baker <jbaker at qnx.com>
- Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
- (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
- (SPRG_MASK): Delete.
- (XSPRG_MASK): Mask off extra bits now part of sprg field.
- (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
- mfsprg4..7 after msprg and consolidate.
-
-2005-03-09 Jan-Benedict Glaw <jbglaw at lug-owl.de>
-
- * vax-dis.c (entry_mask_bit): New array.
- (print_insn_vax): Decode function entry mask.
-
-2005-03-07 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
-
-2005-03-05 Alan Modra <amodra at bigpond.net.au>
-
- * po/opcodes.pot: Regenerate.
-
-2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
-
- * arc-dis.c (a4_decoding_class): New enum.
- (dsmOneArcInst): Use the enum values for the decoding class.
- Remove redundant case in the switch for decodingClass value 11.
-
-2005-03-02 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
- accesses.
- (OP_C): Consider lock prefix in non-64-bit modes.
-
-2005-02-24 Alan Modra <amodra at bigpond.net.au>
-
- * cris-dis.c (format_hex): Remove ineffective warning fix.
- * crx-dis.c (make_instruction): Warning fix.
- * frv-asm.c: Regenerate.
-
-2005-02-23 Nick Clifton <nickc at redhat.com>
-
- * cgen-dis.in: Use bfd_byte for buffers that are passed to
- read_memory.
-
- * ia64-opc.c (locate_opcode_ent): Initialise opval array.
-
- * crx-dis.c (make_instruction): Move argument structure into inner
- scope and ensure that all of its fields are initialised before
- they are used.
-
- * fr30-asm.c: Regenerate.
- * fr30-dis.c: Regenerate.
- * frv-asm.c: Regenerate.
- * frv-dis.c: Regenerate.
- * ip2k-asm.c: Regenerate.
- * ip2k-dis.c: Regenerate.
- * iq2000-asm.c: Regenerate.
- * iq2000-dis.c: Regenerate.
- * m32r-asm.c: Regenerate.
- * m32r-dis.c: Regenerate.
- * openrisc-asm.c: Regenerate.
- * openrisc-dis.c: Regenerate.
- * xstormy16-asm.c: Regenerate.
- * xstormy16-dis.c: Regenerate.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * arc-ext.c: Warning fixes.
- * arc-ext.h: Likewise.
- * cgen-opc.c: Likewise.
- * ia64-gen.c: Likewise.
- * maxq-dis.c: Likewise.
- * ns32k-dis.c: Likewise.
- * w65-dis.c: Likewise.
- * ia64-asmtab.c: Regenerate.
-
-2005-02-22 Alan Modra <amodra at bigpond.net.au>
-
- * fr30-desc.c: Regenerate.
- * fr30-desc.h: Regenerate.
- * fr30-opc.c: Regenerate.
- * fr30-opc.h: Regenerate.
- * frv-desc.c: Regenerate.
- * frv-desc.h: Regenerate.
- * frv-opc.c: Regenerate.
- * frv-opc.h: Regenerate.
- * ip2k-desc.c: Regenerate.
- * ip2k-desc.h: Regenerate.
- * ip2k-opc.c: Regenerate.
- * ip2k-opc.h: Regenerate.
- * iq2000-desc.c: Regenerate.
- * iq2000-desc.h: Regenerate.
- * iq2000-opc.c: Regenerate.
- * iq2000-opc.h: Regenerate.
- * m32r-desc.c: Regenerate.
- * m32r-desc.h: Regenerate.
- * m32r-opc.c: Regenerate.
- * m32r-opc.h: Regenerate.
- * m32r-opinst.c: Regenerate.
- * openrisc-desc.c: Regenerate.
- * openrisc-desc.h: Regenerate.
- * openrisc-opc.c: Regenerate.
- * openrisc-opc.h: Regenerate.
- * xstormy16-desc.c: Regenerate.
- * xstormy16-desc.h: Regenerate.
- * xstormy16-opc.c: Regenerate.
- * xstormy16-opc.h: Regenerate.
-
-2005-02-21 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am"
- * Makefile.in: Regenerate.
-
-2005-02-15 Nick Clifton <nickc at redhat.com>
-
- * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
- compile time warnings.
- (print_keyword): Likewise.
- (default_print_insn): Likewise.
-
- * fr30-desc.c: Regenerated.
- * fr30-desc.h: Regenerated.
- * fr30-dis.c: Regenerated.
- * fr30-opc.c: Regenerated.
- * fr30-opc.h: Regenerated.
- * frv-desc.c: Regenerated.
- * frv-dis.c: Regenerated.
- * frv-opc.c: Regenerated.
- * ip2k-asm.c: Regenerated.
- * ip2k-desc.c: Regenerated.
- * ip2k-desc.h: Regenerated.
- * ip2k-dis.c: Regenerated.
- * ip2k-opc.c: Regenerated.
- * ip2k-opc.h: Regenerated.
- * iq2000-desc.c: Regenerated.
- * iq2000-dis.c: Regenerated.
- * iq2000-opc.c: Regenerated.
- * m32r-asm.c: Regenerated.
- * m32r-desc.c: Regenerated.
- * m32r-desc.h: Regenerated.
- * m32r-dis.c: Regenerated.
- * m32r-opc.c: Regenerated.
- * m32r-opc.h: Regenerated.
- * m32r-opinst.c: Regenerated.
- * openrisc-desc.c: Regenerated.
- * openrisc-desc.h: Regenerated.
- * openrisc-dis.c: Regenerated.
- * openrisc-opc.c: Regenerated.
- * openrisc-opc.h: Regenerated.
- * xstormy16-desc.c: Regenerated.
- * xstormy16-desc.h: Regenerated.
- * xstormy16-dis.c: Regenerated.
- * xstormy16-opc.c: Regenerated.
- * xstormy16-opc.h: Regenerated.
-
-2005-02-14 H.J. Lu <hongjiu.lu at intel.com>
-
- * dis-buf.c (perror_memory): Use sprintf_vma to print out
- address.
-
-2005-02-11 Nick Clifton <nickc at redhat.com>
-
- * iq2000-asm.c: Regenerate.
-
- * frv-dis.c: Regenerate.
-
-2005-02-07 Jim Blandy <jimb at redhat.com>
-
- * Makefile.am (CGEN): Load guile.scm before calling the main
- application script.
- * Makefile.in: Regenerated.
- * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
- Simply pass the cgen-opc.scm path to ${cgen} as its first
- argument; ${cgen} itself now contains the '-s', or whatever is
- appropriate for the Scheme being used.
-
-2005-01-31 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4.
-
-2005-01-31 Jan Beulich <jbeulich at novell.com>
-
- * ia64-gen.c (NELEMS): Define.
- (shrink): Generate alias with missing second predicate register when
- opcode has two outputs and these are both predicates.
- * ia64-opc-i.c (FULL17): Define.
- (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
- here to generate output template.
- (TBITCM, TNATCM): Undefine after use.
- * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
- first input. Add ld16 aliases without ar.csd as second output. Add
- st16 aliases without ar.csd as second input. Add cmpxchg aliases
- without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
- ar.ccv as third/fourth inputs. Consolidate through...
- (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
- CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
- * ia64-asmtab.c: Regenerate.
-
-2005-01-27 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate to track ../gettext.m4 change.
-
-2005-01-25 Alexandre Oliva <aoliva at redhat.com>
-
- 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
- * frv-asm.c: Rebuilt.
- * frv-desc.c: Rebuilt.
- * frv-desc.h: Rebuilt.
- * frv-dis.c: Rebuilt.
- * frv-ibld.c: Rebuilt.
- * frv-opc.c: Rebuilt.
- * frv-opc.h: Rebuilt.
-
-2005-01-24 Andrew Cagney <cagney at gnu.org>
-
- * configure: Regenerate, ../gettext.m4 was updated.
-
-2005-01-21 Fred Fish <fnf at specifixinc.com>
-
- * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
- Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
- Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
- * mips-dis.c: Ditto.
-
-2005-01-20 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
-
-2005-01-19 Fred Fish <fnf at specifixinc.com>
-
- * mips-dis.c (no_aliases): New disassembly option flag.
- (set_default_mips_dis_options): Init no_aliases to zero.
- (parse_mips_dis_option): Handle no-aliases option.
- (print_insn_mips): Ignore table entries that are aliases
- if no_aliases is set.
- (print_insn_mips16): Ditto.
- * mips-opc.c (mips_builtin_opcodes): Add initializer column for
- new pinfo2 member and add INSN_ALIAS initializers as needed. Also
- move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
- * mips16-opc.c (mips16_opcodes): Ditto.
-
-2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
-
- * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
- (inheritance diagram): Add missing edge.
- (arch_sh1_up): Rename arch_sh_up to match external name to make life
- easier for the testsuite.
- (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
- (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
- (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
- arch_sh2a_or_sh4_up child.
- (sh_table): Do renaming as above.
- Correct comment for ldc.l for gas testsuite to read.
- Remove rogue mul.l from sh1 (duplicate of the one for sh2).
- Correct comments for movy.w and movy.l for gas testsuite to read.
- Correct comments for fmov.d and fmov.s for gas testsuite to read.
-
-2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
-
- * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
-
-2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
-
- * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
-
-2005-01-10 Andreas Schwab <schwab at suse.de>
-
- * disassemble.c (disassemble_init_for_target) <case
- bfd_arch_ia64>: Set skip_zeroes to 16.
- <case bfd_arch_tic4x>: Set skip_zeroes to 32.
-
-2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
-
-2004-12-14 Svein E. Seldal <Svein.Seldal at solidas.com>
-
- * avr-dis.c: Prettyprint. Added printing of symbol names in all
- memory references. Convert avr_operand() to C90 formatting.
-
-2004-12-05 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
-
-2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
- (no_op_insn): Initialize array with instructions that have no
- operands.
- * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
-
-2004-11-29 Richard Earnshaw <rearnsha at arm.com>
-
- * arm-dis.c: Correct top-level comment.
-
-2004-11-27 Richard Earnshaw <rearnsha at arm.com>
-
- * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
- architecuture defining the insn.
- (arm_opcodes, thumb_opcodes): Delete. Move to ...
- * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
- field.
- Also include opcode/arm.h.
- * Makefile.am (arm-dis.lo): Update dependency list.
- * Makefile.in: Regenerate.
-
-2004-11-22 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
-
- * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
- reflect the change to the short immediate syntax.
-
-2004-11-19 Alan Modra <amodra at bigpond.net.au>
-
- * or32-opc.c (debug): Warning fix.
- * po/POTFILES.in: Regenerate.
-
- * maxq-dis.c: Formatting.
- (print_insn): Warning fix.
-
-2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
-
- * arm-dis.c (WORD_ADDRESS): Define.
- (print_insn): Use it. Correct big-endian end-of-section handling.
-
-2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
- Vineet Sharma <vineets at noida.hcltech.com>
-
- * maxq-dis.c: New file.
- * disassemble.c (ARCH_maxq): Define.
- (disassembler): Add 'print_insn_maxq_little' for handling maxq
- instructions..
- * configure.in: Add case for bfd_maxq_arch.
- * configure: Regenerate.
- * Makefile.am: Add support for maxq-dis.c
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
-
-2004-11-05 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
- mode.
- * crx-dis.c: Likewise.
-
-2004-11-04 Hans-Peter Nilsson <hp at axis.com>
-
- Generally, handle CRISv32.
- * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
- (struct cris_disasm_data): New type.
- (format_reg, format_hex, cris_constraint, print_flags)
- (get_opcode_entry): Add struct cris_disasm_data * parameter. All
- callers changed.
- (format_sup_reg, print_insn_crisv32_with_register_prefix)
- (print_insn_crisv32_without_register_prefix)
- (print_insn_crisv10_v32_with_register_prefix)
- (print_insn_crisv10_v32_without_register_prefix)
- (cris_parse_disassembler_options): New functions.
- (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
- parameter. All callers changed.
- (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
- failure.
- (cris_constraint) <case 'Y', 'U'>: New cases.
- (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
- for constraint 'n'.
- (print_with_operands) <case 'Y'>: New case.
- (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
- <case 'N', 'Y', 'Q'>: New cases.
- (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
- (print_insn_cris_with_register_prefix)
- (print_insn_cris_without_register_prefix): Call
- cris_parse_disassembler_options.
- * cris-opc.c (cris_spec_regs): Mention that this table isn't used
- for CRISv32 and the size of immediate operands. New v32-only
- entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
- spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
- ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
- Change brp to be v3..v10.
- (cris_support_regs): New vector.
- (cris_opcodes): Update head comment. New format characters '[',
- ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
- Add new opcodes for v32 and adjust existing opcodes to accommodate
- differences to earlier variants.
- (cris_cond15s): New vector.
-
-2004-11-04 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
- (indirEb): Remove.
- (Mp): Use f_mode rather than none at all.
- (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
- replaces what previously was x_mode; x_mode now means 128-bit SSE
- operands.
- (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
- mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
- pinsrw's second operand is Edqw.
- (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
- operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
- fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
- mode when an operand size override is present or always suffixing.
- More instructions will need to be added to this group.
- (putop): Handle new macro chars 'C' (short/long suffix selector),
- 'I' (Intel mode override for following macro char), and 'J' (for
- adding the 'l' prefix to far branches in AT&T mode). When an
- alternative was specified in the template, honor macro character when
- specified for Intel mode.
- (OP_E): Handle new *_mode values. Correct pointer specifications for
- memory operands. Consolidate output of index register.
- (OP_G): Handle new *_mode values.
- (OP_I): Handle const_1_mode.
- (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
- respective opcode prefix bits have been consumed.
- (OP_EM, OP_EX): Provide some default handling for generating pointer
- specifications.
-
-2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
- COP_INST macro.
-
-2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
- (getregliststring): Support HI/LO and user registers.
- * crx-opc.c (crx_instruction): Update data structure according to the
- rearrangement done in CRX opcode header file.
- (crx_regtab): Likewise.
- (crx_optab): Likewise.
- (crx_instruction): Reorder load/stor instructions, remove unsupported
- formats.
- support new Co-Processor instruction 'cpi'.
-
-2004-10-27 Nick Clifton <nickc at redhat.com>
-
- * opcodes/iq2000-asm.c: Regenerate.
- * opcodes/iq2000-desc.c: Regenerate.
- * opcodes/iq2000-desc.h: Regenerate.
- * opcodes/iq2000-dis.c: Regenerate.
- * opcodes/iq2000-ibld.c: Regenerate.
- * opcodes/iq2000-opc.c: Regenerate.
- * opcodes/iq2000-opc.h: Regenerate.
-
-2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
- us4, us5 (respectively).
- Remove unsupported 'popa' instruction.
- Reverse operands order in store co-processor instructions.
-
-2004-10-15 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am"
- * Makefile.in: Regenerate.
-
-2004-10-12 Bob Wilson <bob.wilson at acm.org>
-
- * xtensa-dis.c: Use ISO C90 formatting.
-
-2004-10-09 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c: Revert 2004-09-09 change.
-
-2004-10-07 Bob Wilson <bob.wilson at acm.org>
-
- * xtensa-dis.c (state_names): Delete.
- (fetch_data): Use xtensa_isa_maxlength.
- (print_xtensa_operand): Replace operand parameter with opcode/operand
- pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
- (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
- instruction bundles. Use xmalloc instead of malloc.
-
-2004-10-07 David Gibson <david at gibson.dropbear.id.au>
-
- * ppc-opc.c: Replace literal "0"s with NULLs in pointer
- initializers.
-
-2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c (crx_instruction): Support Co-processor insns.
- * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
- (getregliststring): Change function to use the above enum.
- (print_arg): Handle CO-Processor insns.
- (crx_cinvs): Add 'b' option to invalidate the branch-target
- cache.
-
-2004-10-06 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
- efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
- efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
- efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
- efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
-
-2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
-
- * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
- rather than add it.
-
-2004-09-30 Paul Brook <paul at codesourcery.com>
-
- * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
- * arm-opc.h: Document %e. Add ARMv6ZK instructions.
-
-2004-09-17 H.J. Lu <hongjiu.lu at intel.com>
-
- * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
- (CONFIG_STATUS_DEPENDENCIES): New.
- (Makefile): Removed.
- (config.status): Likewise.
- * Makefile.in: Regenerated.
-
-2004-09-17 Alan Modra <amodra at bigpond.net.au>
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * configure: Regenerate.
- * po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
-
-2004-09-11 Andreas Schwab <schwab at suse.de>
-
- * configure: Rebuild.
-
-2004-09-09 Segher Boessenkool <segher at kernel.crashing.org>
-
- * ppc-opc.c (L): Make this field not optional.
-
-2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
-
- * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
- Fix parameter to 'm[t|f]csr' insns.
-
-2004-08-30 Nathanael Nerode <neroden at gcc.gnu.org>
-
- * configure.in: Autoupdate to autoconf 2.59.
- * aclocal.m4: Rebuild with aclocal 1.4p6.
- * configure: Rebuild with autoconf 2.59.
- * Makefile.in: Rebuild with automake 1.4p6 (picking up
- bfd changes for autoconf 2.59 on the way).
- * config.in: Rebuild with autoheader 2.59.
-
-2004-08-27 Richard Sandiford <rsandifo at redhat.com>
-
- * frv-desc.[ch], frv-opc.[ch]: Regenerated.
-
-2004-07-30 Michal Ludvig <mludvig at suse.cz>
-
- * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
- (GRPPADLCK2): New define.
- (twobyte_has_modrm): True for 0xA6.
- (grps): GRPPADLCK2 for opcode 0xA6.
-
-2004-07-29 Alexandre Oliva <aoliva at redhat.com>
-
- Introduce SH2a support.
- * sh-opc.h (arch_sh2a_base): Renumber.
- (arch_sh2a_nofpu_base): Remove.
- (arch_sh_base_mask): Adjust.
- (arch_opann_mask): New.
- (arch_sh2a, arch_sh2a_nofpu): Adjust.
- (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
- (sh_table): Adjust whitespace.
- 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
- * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
- instruction list throughout.
- (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
- of arch_sh2a in instruction list throughout.
- (arch_sh2e_up): Accomodate above changes.
- (arch_sh2_up): Ditto.
- 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
- * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
- 2004-02-18 Corinna Vinschen <vinschen at redhat.com>
- * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
- * sh-opc.h (arch_sh2a_nofpu): New.
- (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
- (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
- instruction.
- 2004-01-20 DJ Delorie <dj at redhat.com>
- * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
- 2003-12-29 DJ Delorie <dj at redhat.com>
- * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
- sh_opcode_info, sh_table): Add sh2a support.
- (arch_op32): New, to tag 32-bit opcodes.
- * sh-dis.c (print_insn_sh): Support sh2a opcodes.
- 2003-12-02 Michael Snyder <msnyder at redhat.com>
- * sh-opc.h (arch_sh2a): Add.
- * sh-dis.c (arch_sh2a): Handle.
- * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
-
-2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
-
- * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
-
-2004-07-22 Nick Clifton <nickc at redhat.com>
-
- PR/280
- * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
- insns - this is done by objdump itself.
- * h8500-dis.c (print_insn_h8500): Likewise.
-
-2004-07-21 Jan Beulich <jbeulich at novell.com>
-
- * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
- regardless of address size prefix in effect.
- (ptr_reg): Size or address registers does not depend on rex64, but
- on the presence of an address size override.
- (OP_MMX): Use rex.x only for xmm registers.
- (OP_EM): Use rex.z only for xmm registers.
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
- move/branch operations to the bottom so that VR5400 multimedia
- instructions take precedence in disassembly.
-
-2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
-
- * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
- ISA-specific "break" encoding.
-
-2004-07-13 Elvis Chiang <elvisfb at gmail.com>
-
- * arm-opc.h: Fix typo in comment.
-
-2004-07-11 Andreas Schwab <schwab at suse.de>
-
- * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
-
-2004-07-09 Andreas Schwab <schwab at suse.de>
-
- * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
-
-2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
-
- * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
- (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
- (crx-dis.lo): New target.
- (crx-opc.lo): Likewise.
- * Makefile.in: Regenerate.
- * configure.in: Handle bfd_crx_arch.
- * configure: Regenerate.
- * crx-dis.c: New file.
- * crx-opc.c: New file.
- * disassemble.c (ARCH_crx): Define.
- (disassembler): Handle ARCH_crx.
-
-2004-06-29 James E Wilson <wilson at specifixinc.com>
-
- * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
- * ia64-asmtab.c: Regnerate.
-
-2004-06-28 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
- (extract_fxm): Don't test dialect.
- (XFXFXM_MASK): Include the power4 bit.
- (XFXM): Add p4 param.
- (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
-
-2004-06-27 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-07-21 Richard Sandiford <rsandifo at redhat.com>
- * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
-
-2004-06-26 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (BH, XLBH_MASK): Define.
- (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
-
-2004-06-24 Alan Modra <amodra at bigpond.net.au>
-
- * i386-dis.c (x_mode): Comment.
- (two_source_ops): File scope.
- (float_mem): Correct fisttpll and fistpll.
- (float_mem_mode): New table.
- (dofloat): Use it.
- (OP_E): Correct intel mode PTR output.
- (ptr_reg): Use open_char and close_char.
- (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
- operands. Set two_source_ops.
-
-2004-06-15 Alan Modra <amodra at bigpond.net.au>
-
- * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
- instead of _raw_size.
-
-2004-06-08 Jakub Jelinek <jakub at redhat.com>
-
- * ia64-gen.c (in_iclass): Handle more postinc st
- and ld variants.
- * ia64-asmtab.c: Rebuilt.
-
-2004-06-01 Martin Schwidefsky <schwidefsky at de.ibm.com>
-
- * s390-opc.txt: Correct architecture mask for some opcodes.
- lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
- in the esa mode as well.
-
-2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * sh-dis.c (target_arch): Make unsigned.
- (print_insn_sh): Replace (most of) switch with a call to
- sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
- * sh-opc.h: Redefine architecture flags values.
- Add sh3-nommu architecture.
- Reorganise <arch>_up macros so they make more visual sense.
- (SH_MERGE_ARCH_SET): Define new macro.
- (SH_VALID_BASE_ARCH_SET): Likewise.
- (SH_VALID_MMU_ARCH_SET): Likewise.
- (SH_VALID_CO_ARCH_SET): Likewise.
- (SH_VALID_ARCH_SET): Likewise.
- (SH_MERGE_ARCH_SET_VALID): Likewise.
- (SH_ARCH_SET_HAS_FPU): Likewise.
- (SH_ARCH_SET_HAS_DSP): Likewise.
- (SH_ARCH_UNKNOWN_ARCH): Likewise.
- (sh_get_arch_from_bfd_mach): Add prototype.
- (sh_get_arch_up_from_bfd_mach): Likewise.
- (sh_get_bfd_mach_from_arch_set): Likewise.
- (sh_merge_bfd_arc): Likewise.
-
-2004-05-24 Peter Barada <peter at the-baradas.com>
-
- * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
- into new match_insn_m68k function. Loop over canidate
- matches and select first that completely matches.
- * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
- * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
- to verify addressing for MAC/EMAC.
- * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
- reigster halves since 'fpu' and 'spl' look misleading.
- * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
- * m68k-opc.c: Rearragne mac/emac cases to use longest for
- first, tighten up match masks.
- * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
- 'size' from special case code in print_insn_m68k to
- determine decode size of insns.
-
-2004-05-19 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
- well as when -mpower4.
-
-2004-05-13 Nick Clifton <nickc at redhat.com>
-
- * po/fr.po: Updated French translation.
-
-2004-05-05 Peter Barada <peter at the-baradas.com>
-
- * m68k-dis.c(print_insn_m68k): Add new chips, use core
- variants in arch_mask. Only set m68881/68851 for 68k chips.
- * m68k-op.c: Switch from ColdFire chips to core variants.
-
-2004-05-05 Alan Modra <amodra at bigpond.net.au>
-
- PR 147.
- * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
-
-2004-04-29 Ben Elliston <bje at au.ibm.com>
-
- * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
- (powerpc_opcodes): Add "dbczl" instruction for PPC970.
-
-2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
-
- * sh-dis.c (print_insn_sh): Print the value in constant pool
- as a symbol if it looks like a symbol.
-
-2004-04-22 Peter Barada <peter at the-baradas.com>
-
- * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
- appropriate ColdFire architectures.
- (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
- mask addressing.
- Add EMAC instructions, fix MAC instructions. Remove
- macmw/macml/msacmw/msacml instructions since mask addressing now
- supported.
-
-2004-04-20 Jakub Jelinek <jakub at redhat.com>
-
- * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
- (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
- suffix. Use fmov*x macros, create all 3 fpsize variants in one
- macro. Adjust all users.
-
-2004-04-15 Anil Paranjpe <anilp1 at kpitcummins.com>
-
- * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
- separately.
-
-2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
-
- * m32r-asm.c: Regenerate.
-
-2004-03-29 Stan Shebs <shebs at apple.com>
-
- * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
- used.
-
-2004-03-19 Alan Modra <amodra at bigpond.net.au>
-
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * configure: Regenerate.
- * po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
-
-2004-03-16 Alan Modra <amodra at bigpond.net.au>
-
- * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
- PPC_OPERANDS_GPR_0.
- * ppc-opc.c (RA0): Define.
- (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
- (RAOPT): Rename from RAO. Update all uses.
- (powerpc_opcodes): Use RA0 as appropriate.
-
-2004-03-15 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
-
-2004-03-15 Alan Modra <amodra at bigpond.net.au>
-
- * sparc-dis.c (print_insn_sparc): Update getword prototype.
-
-2004-03-12 Michal Ludvig <mludvig at suse.cz>
-
- * i386-dis.c (GRPPLOCK): Delete.
- (grps): Delete GRPPLOCK entry.
-
-2004-03-12 Alan Modra <amodra at bigpond.net.au>
-
- * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
- (M, Mp): Use OP_M.
- (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
- (GRPPADLCK): Define.
- (dis386): Use NOP_Fixup on "nop".
- (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
- (twobyte_has_modrm): Set for 0xa7.
- (padlock_table): Delete. Move to..
- (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
- and clflush.
- (print_insn): Revert PADLOCK_SPECIAL code.
- (OP_E): Delete sfence, lfence, mfence checks.
-
-2004-03-12 Jakub Jelinek <jakub at redhat.com>
-
- * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
- (INVLPG_Fixup): New function.
- (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
-
-2004-03-12 Michal Ludvig <mludvig at suse.cz>
-
- * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
- (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
- (padlock_table): New struct with PadLock instructions.
- (print_insn): Handle PADLOCK_SPECIAL.
-
-2004-03-12 Alan Modra <amodra at bigpond.net.au>
-
- * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
- (OP_E): Twiddle clflush to sfence here.
-
-2004-03-08 Nick Clifton <nickc at redhat.com>
-
- * po/de.po: Updated German translation.
-
-2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
- nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
- * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
- accordingly.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * frv-asm.c: Regenerate.
- * frv-desc.c: Regenerate.
- * frv-desc.h: Regenerate.
- * frv-dis.c: Regenerate.
- * frv-ibld.c: Regenerate.
- * frv-opc.c: Regenerate.
- * frv-opc.h: Regenerate.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * frv-desc.c, frv-opc.c: Regenerate.
-
-2004-03-01 Richard Sandiford <rsandifo at redhat.com>
-
- * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
-
-2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
- Also correct mistake in the comment.
-
-2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
-
- * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
- ensure that double registers have even numbers.
- Add REG_N_B01 for nn01 (binary 01) nibble to ensure
- that reserved instruction 0xfffd does not decode the same
- as 0xfdfd (ftrv).
- * sh-opc.h: Add REG_N_D nibble type and use it whereever
- REG_N refers to a double register.
- Add REG_N_B01 nibble type and use it instead of REG_NM
- in ftrv.
- Adjust the bit patterns in a few comments.
-
-2004-02-25 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
-
-2004-02-20 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
-
-2004-02-20 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
-
-2004-02-20 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
- mtivor32, mtivor33, mtivor34.
-
-2004-02-19 Aldy Hernandez <aldyh at redhat.com>
-
- * ppc-opc.c (powerpc_opcodes): Add mfmcar.
-
-2004-02-10 Petko Manolov <petkan at nucleusys.com>
-
- * arm-opc.h Maverick accumulator register opcode fixes.
-
-2004-02-13 Ben Elliston <bje at wasabisystems.com>
-
- * m32r-dis.c: Regenerate.
-
-2004-01-27 Michael Snyder <msnyder at redhat.com>
-
- * sh-opc.h (sh_table): "fsrra", not "fssra".
-
-2004-01-23 Andrew Over <andrew.over at cs.anu.edu.au>
-
- * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
- contraints.
-
-2004-01-19 Andrew Over <andrew.over at cs.anu.edu.au>
-
- * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
-
-2004-01-19 Alan Modra <amodra at bigpond.net.au>
-
- * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
- 1. Don't print scale factor on AT&T mode when index missing.
-
-2004-01-16 Alexandre Oliva <aoliva at redhat.com>
-
- * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
- when loaded into XR registers.
-
-2004-01-14 Richard Sandiford <rsandifo at redhat.com>
-
- * frv-desc.h: Regenerate.
- * frv-desc.c: Regenerate.
- * frv-opc.c: Regenerate.
-
-2004-01-13 Michael Snyder <msnyder at redhat.com>
-
- * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
-
-2004-01-09 Paul Brook <paul at codesourcery.com>
-
- * arm-opc.h (arm_opcodes): Move generic mcrr after known
- specific opcodes.
-
-2004-01-07 Daniel Jacobowitz <drow at mvista.com>
-
- * Makefile.am (libopcodes_la_DEPENDENCIES)
- (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
- comment about the problem.
- * Makefile.in: Regenerate.
-
-2004-01-06 Alexandre Oliva <aoliva at redhat.com>
-
- 2003-12-19 Alexandre Oliva <aoliva at redhat.com>
- * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
- cut&paste errors in shifting/truncating numerical operands.
- 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
- * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
- (parse_uslo16): Likewise.
- (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
- (parse_d12): Parse gotoff12 and gotofffuncdesc12.
- (parse_s12): Likewise.
- 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
- * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
- (parse_uslo16): Likewise.
- (parse_uhi16): Parse gothi and gotfuncdeschi.
- (parse_d12): Parse got12 and gotfuncdesc12.
- (parse_s12): Likewise.
-
-2004-01-02 Albert Bartoszko <albar at nt.kegel.com.pl>
-
- * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
- instruction which looks similar to an 'rla' instruction.
-
-For older changes see ChangeLog-0203
+For older changes see ChangeLog-2005
Local Variables:
mode: change-log
Added: branches/binutils/package/opcodes/ChangeLog-2004
===================================================================
--- branches/binutils/package/opcodes/ChangeLog-2004 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ChangeLog-2004 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,741 @@
+2004-12-23 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
+
+2004-12-14 Svein E. Seldal <Svein.Seldal at solidas.com>
+
+ * avr-dis.c: Prettyprint. Added printing of symbol names in all
+ memory references. Convert avr_operand() to C90 formatting.
+
+2004-12-05 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
+
+2004-11-29 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
+ (no_op_insn): Initialize array with instructions that have no
+ operands.
+ * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
+
+2004-11-29 Richard Earnshaw <rearnsha at arm.com>
+
+ * arm-dis.c: Correct top-level comment.
+
+2004-11-27 Richard Earnshaw <rearnsha at arm.com>
+
+ * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
+ architecuture defining the insn.
+ (arm_opcodes, thumb_opcodes): Delete. Move to ...
+ * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
+ field.
+ Also include opcode/arm.h.
+ * Makefile.am (arm-dis.lo): Update dependency list.
+ * Makefile.in: Regenerate.
+
+2004-11-22 Ravi Ramaseshan <ravi.ramaseshan at codito.com>
+
+ * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
+ reflect the change to the short immediate syntax.
+
+2004-11-19 Alan Modra <amodra at bigpond.net.au>
+
+ * or32-opc.c (debug): Warning fix.
+ * po/POTFILES.in: Regenerate.
+
+ * maxq-dis.c: Formatting.
+ (print_insn): Warning fix.
+
+2004-11-17 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * arm-dis.c (WORD_ADDRESS): Define.
+ (print_insn): Use it. Correct big-endian end-of-section handling.
+
+2004-11-08 Inderpreet Singh <inderpreetb at nioda.hcltech.com>
+ Vineet Sharma <vineets at noida.hcltech.com>
+
+ * maxq-dis.c: New file.
+ * disassemble.c (ARCH_maxq): Define.
+ (disassembler): Add 'print_insn_maxq_little' for handling maxq
+ instructions..
+ * configure.in: Add case for bfd_maxq_arch.
+ * configure: Regenerate.
+ * Makefile.am: Add support for maxq-dis.c
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+
+2004-11-05 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
+ mode.
+ * crx-dis.c: Likewise.
+
+2004-11-04 Hans-Peter Nilsson <hp at axis.com>
+
+ Generally, handle CRISv32.
+ * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
+ (struct cris_disasm_data): New type.
+ (format_reg, format_hex, cris_constraint, print_flags)
+ (get_opcode_entry): Add struct cris_disasm_data * parameter. All
+ callers changed.
+ (format_sup_reg, print_insn_crisv32_with_register_prefix)
+ (print_insn_crisv32_without_register_prefix)
+ (print_insn_crisv10_v32_with_register_prefix)
+ (print_insn_crisv10_v32_without_register_prefix)
+ (cris_parse_disassembler_options): New functions.
+ (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
+ parameter. All callers changed.
+ (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
+ failure.
+ (cris_constraint) <case 'Y', 'U'>: New cases.
+ (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
+ for constraint 'n'.
+ (print_with_operands) <case 'Y'>: New case.
+ (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
+ <case 'N', 'Y', 'Q'>: New cases.
+ (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
+ (print_insn_cris_with_register_prefix)
+ (print_insn_cris_without_register_prefix): Call
+ cris_parse_disassembler_options.
+ * cris-opc.c (cris_spec_regs): Mention that this table isn't used
+ for CRISv32 and the size of immediate operands. New v32-only
+ entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
+ spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
+ ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
+ Change brp to be v3..v10.
+ (cris_support_regs): New vector.
+ (cris_opcodes): Update head comment. New format characters '[',
+ ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
+ Add new opcodes for v32 and adjust existing opcodes to accommodate
+ differences to earlier variants.
+ (cris_cond15s): New vector.
+
+2004-11-04 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
+ (indirEb): Remove.
+ (Mp): Use f_mode rather than none at all.
+ (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
+ replaces what previously was x_mode; x_mode now means 128-bit SSE
+ operands.
+ (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
+ mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
+ pinsrw's second operand is Edqw.
+ (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
+ operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
+ fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
+ mode when an operand size override is present or always suffixing.
+ More instructions will need to be added to this group.
+ (putop): Handle new macro chars 'C' (short/long suffix selector),
+ 'I' (Intel mode override for following macro char), and 'J' (for
+ adding the 'l' prefix to far branches in AT&T mode). When an
+ alternative was specified in the template, honor macro character when
+ specified for Intel mode.
+ (OP_E): Handle new *_mode values. Correct pointer specifications for
+ memory operands. Consolidate output of index register.
+ (OP_G): Handle new *_mode values.
+ (OP_I): Handle const_1_mode.
+ (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
+ respective opcode prefix bits have been consumed.
+ (OP_EM, OP_EX): Provide some default handling for generating pointer
+ specifications.
+
+2004-10-28 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
+ COP_INST macro.
+
+2004-10-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
+ (getregliststring): Support HI/LO and user registers.
+ * crx-opc.c (crx_instruction): Update data structure according to the
+ rearrangement done in CRX opcode header file.
+ (crx_regtab): Likewise.
+ (crx_optab): Likewise.
+ (crx_instruction): Reorder load/stor instructions, remove unsupported
+ formats.
+ support new Co-Processor instruction 'cpi'.
+
+2004-10-27 Nick Clifton <nickc at redhat.com>
+
+ * opcodes/iq2000-asm.c: Regenerate.
+ * opcodes/iq2000-desc.c: Regenerate.
+ * opcodes/iq2000-desc.h: Regenerate.
+ * opcodes/iq2000-dis.c: Regenerate.
+ * opcodes/iq2000-ibld.c: Regenerate.
+ * opcodes/iq2000-opc.c: Regenerate.
+ * opcodes/iq2000-opc.h: Regenerate.
+
+2004-10-21 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
+ us4, us5 (respectively).
+ Remove unsupported 'popa' instruction.
+ Reverse operands order in store co-processor instructions.
+
+2004-10-15 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2004-10-12 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-dis.c: Use ISO C90 formatting.
+
+2004-10-09 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c: Revert 2004-09-09 change.
+
+2004-10-07 Bob Wilson <bob.wilson at acm.org>
+
+ * xtensa-dis.c (state_names): Delete.
+ (fetch_data): Use xtensa_isa_maxlength.
+ (print_xtensa_operand): Replace operand parameter with opcode/operand
+ pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
+ (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
+ instruction bundles. Use xmalloc instead of malloc.
+
+2004-10-07 David Gibson <david at gibson.dropbear.id.au>
+
+ * ppc-opc.c: Replace literal "0"s with NULLs in pointer
+ initializers.
+
+2004-10-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c (crx_instruction): Support Co-processor insns.
+ * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
+ (getregliststring): Change function to use the above enum.
+ (print_arg): Handle CO-Processor insns.
+ (crx_cinvs): Add 'b' option to invalidate the branch-target
+ cache.
+
+2004-10-06 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
+ efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
+ efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
+ efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
+ efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
+
+2004-10-01 Bill Farmer <Bill at the-farmers.freeserve.co.uk>
+
+ * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
+ rather than add it.
+
+2004-09-30 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
+ * arm-opc.h: Document %e. Add ARMv6ZK instructions.
+
+2004-09-17 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
+ (CONFIG_STATUS_DEPENDENCIES): New.
+ (Makefile): Removed.
+ (config.status): Likewise.
+ * Makefile.in: Regenerated.
+
+2004-09-17 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2004-09-11 Andreas Schwab <schwab at suse.de>
+
+ * configure: Rebuild.
+
+2004-09-09 Segher Boessenkool <segher at kernel.crashing.org>
+
+ * ppc-opc.c (L): Make this field not optional.
+
+2004-09-03 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
+ Fix parameter to 'm[t|f]csr' insns.
+
+2004-08-30 Nathanael Nerode <neroden at gcc.gnu.org>
+
+ * configure.in: Autoupdate to autoconf 2.59.
+ * aclocal.m4: Rebuild with aclocal 1.4p6.
+ * configure: Rebuild with autoconf 2.59.
+ * Makefile.in: Rebuild with automake 1.4p6 (picking up
+ bfd changes for autoconf 2.59 on the way).
+ * config.in: Rebuild with autoheader 2.59.
+
+2004-08-27 Richard Sandiford <rsandifo at redhat.com>
+
+ * frv-desc.[ch], frv-opc.[ch]: Regenerated.
+
+2004-07-30 Michal Ludvig <mludvig at suse.cz>
+
+ * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
+ (GRPPADLCK2): New define.
+ (twobyte_has_modrm): True for 0xA6.
+ (grps): GRPPADLCK2 for opcode 0xA6.
+
+2004-07-29 Alexandre Oliva <aoliva at redhat.com>
+
+ Introduce SH2a support.
+ * sh-opc.h (arch_sh2a_base): Renumber.
+ (arch_sh2a_nofpu_base): Remove.
+ (arch_sh_base_mask): Adjust.
+ (arch_opann_mask): New.
+ (arch_sh2a, arch_sh2a_nofpu): Adjust.
+ (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
+ (sh_table): Adjust whitespace.
+ 2004-02-24 Corinna Vinschen <vinschen at redhat.com>
+ * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
+ instruction list throughout.
+ (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
+ of arch_sh2a in instruction list throughout.
+ (arch_sh2e_up): Accomodate above changes.
+ (arch_sh2_up): Ditto.
+ 2004-02-20 Corinna Vinschen <vinschen at redhat.com>
+ * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
+ 2004-02-18 Corinna Vinschen <vinschen at redhat.com>
+ * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
+ * sh-opc.h (arch_sh2a_nofpu): New.
+ (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
+ (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
+ instruction.
+ 2004-01-20 DJ Delorie <dj at redhat.com>
+ * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
+ 2003-12-29 DJ Delorie <dj at redhat.com>
+ * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
+ sh_opcode_info, sh_table): Add sh2a support.
+ (arch_op32): New, to tag 32-bit opcodes.
+ * sh-dis.c (print_insn_sh): Support sh2a opcodes.
+ 2003-12-02 Michael Snyder <msnyder at redhat.com>
+ * sh-opc.h (arch_sh2a): Add.
+ * sh-dis.c (arch_sh2a): Handle.
+ * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
+
+2004-07-27 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
+
+2004-07-22 Nick Clifton <nickc at redhat.com>
+
+ PR/280
+ * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
+ insns - this is done by objdump itself.
+ * h8500-dis.c (print_insn_h8500): Likewise.
+
+2004-07-21 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
+ regardless of address size prefix in effect.
+ (ptr_reg): Size or address registers does not depend on rex64, but
+ on the presence of an address size override.
+ (OP_MMX): Use rex.x only for xmm registers.
+ (OP_EM): Use rex.z only for xmm registers.
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
+ move/branch operations to the bottom so that VR5400 multimedia
+ instructions take precedence in disassembly.
+
+2004-07-20 Maciej W. Rozycki <macro at linux-mips.org>
+
+ * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
+ ISA-specific "break" encoding.
+
+2004-07-13 Elvis Chiang <elvisfb at gmail.com>
+
+ * arm-opc.h: Fix typo in comment.
+
+2004-07-11 Andreas Schwab <schwab at suse.de>
+
+ * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
+
+2004-07-09 Andreas Schwab <schwab at suse.de>
+
+ * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
+
+2004-07-07 Tomer Levi <Tomer.Levi at nsc.com>
+
+ * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
+ (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
+ (crx-dis.lo): New target.
+ (crx-opc.lo): Likewise.
+ * Makefile.in: Regenerate.
+ * configure.in: Handle bfd_crx_arch.
+ * configure: Regenerate.
+ * crx-dis.c: New file.
+ * crx-opc.c: New file.
+ * disassemble.c (ARCH_crx): Define.
+ (disassembler): Handle ARCH_crx.
+
+2004-06-29 James E Wilson <wilson at specifixinc.com>
+
+ * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
+ * ia64-asmtab.c: Regnerate.
+
+2004-06-28 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
+ (extract_fxm): Don't test dialect.
+ (XFXFXM_MASK): Include the power4 bit.
+ (XFXM): Add p4 param.
+ (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
+
+2004-06-27 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-07-21 Richard Sandiford <rsandifo at redhat.com>
+ * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
+
+2004-06-26 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (BH, XLBH_MASK): Define.
+ (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
+
+2004-06-24 Alan Modra <amodra at bigpond.net.au>
+
+ * i386-dis.c (x_mode): Comment.
+ (two_source_ops): File scope.
+ (float_mem): Correct fisttpll and fistpll.
+ (float_mem_mode): New table.
+ (dofloat): Use it.
+ (OP_E): Correct intel mode PTR output.
+ (ptr_reg): Use open_char and close_char.
+ (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
+ operands. Set two_source_ops.
+
+2004-06-15 Alan Modra <amodra at bigpond.net.au>
+
+ * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
+ instead of _raw_size.
+
+2004-06-08 Jakub Jelinek <jakub at redhat.com>
+
+ * ia64-gen.c (in_iclass): Handle more postinc st
+ and ld variants.
+ * ia64-asmtab.c: Rebuilt.
+
+2004-06-01 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * s390-opc.txt: Correct architecture mask for some opcodes.
+ lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
+ in the esa mode as well.
+
+2004-05-28 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * sh-dis.c (target_arch): Make unsigned.
+ (print_insn_sh): Replace (most of) switch with a call to
+ sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
+ * sh-opc.h: Redefine architecture flags values.
+ Add sh3-nommu architecture.
+ Reorganise <arch>_up macros so they make more visual sense.
+ (SH_MERGE_ARCH_SET): Define new macro.
+ (SH_VALID_BASE_ARCH_SET): Likewise.
+ (SH_VALID_MMU_ARCH_SET): Likewise.
+ (SH_VALID_CO_ARCH_SET): Likewise.
+ (SH_VALID_ARCH_SET): Likewise.
+ (SH_MERGE_ARCH_SET_VALID): Likewise.
+ (SH_ARCH_SET_HAS_FPU): Likewise.
+ (SH_ARCH_SET_HAS_DSP): Likewise.
+ (SH_ARCH_UNKNOWN_ARCH): Likewise.
+ (sh_get_arch_from_bfd_mach): Add prototype.
+ (sh_get_arch_up_from_bfd_mach): Likewise.
+ (sh_get_bfd_mach_from_arch_set): Likewise.
+ (sh_merge_bfd_arc): Likewise.
+
+2004-05-24 Peter Barada <peter at the-baradas.com>
+
+ * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
+ into new match_insn_m68k function. Loop over canidate
+ matches and select first that completely matches.
+ * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
+ * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
+ to verify addressing for MAC/EMAC.
+ * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
+ reigster halves since 'fpu' and 'spl' look misleading.
+ * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
+ * m68k-opc.c: Rearragne mac/emac cases to use longest for
+ first, tighten up match masks.
+ * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
+ 'size' from special case code in print_insn_m68k to
+ determine decode size of insns.
+
+2004-05-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
+ well as when -mpower4.
+
+2004-05-13 Nick Clifton <nickc at redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2004-05-05 Peter Barada <peter at the-baradas.com>
+
+ * m68k-dis.c(print_insn_m68k): Add new chips, use core
+ variants in arch_mask. Only set m68881/68851 for 68k chips.
+ * m68k-op.c: Switch from ColdFire chips to core variants.
+
+2004-05-05 Alan Modra <amodra at bigpond.net.au>
+
+ PR 147.
+ * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
+
+2004-04-29 Ben Elliston <bje at au.ibm.com>
+
+ * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
+ (powerpc_opcodes): Add "dbczl" instruction for PPC970.
+
+2004-04-22 Kaz Kojima <kkojima at rr.iij4u.or.jp>
+
+ * sh-dis.c (print_insn_sh): Print the value in constant pool
+ as a symbol if it looks like a symbol.
+
+2004-04-22 Peter Barada <peter at the-baradas.com>
+
+ * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
+ appropriate ColdFire architectures.
+ (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
+ mask addressing.
+ Add EMAC instructions, fix MAC instructions. Remove
+ macmw/macml/msacmw/msacml instructions since mask addressing now
+ supported.
+
+2004-04-20 Jakub Jelinek <jakub at redhat.com>
+
+ * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
+ (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
+ suffix. Use fmov*x macros, create all 3 fpsize variants in one
+ macro. Adjust all users.
+
+2004-04-15 Anil Paranjpe <anilp1 at kpitcummins.com>
+
+ * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
+ separately.
+
+2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * m32r-asm.c: Regenerate.
+
+2004-03-29 Stan Shebs <shebs at apple.com>
+
+ * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
+ used.
+
+2004-03-19 Alan Modra <amodra at bigpond.net.au>
+
+ * aclocal.m4: Regenerate.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2004-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
+ PPC_OPERANDS_GPR_0.
+ * ppc-opc.c (RA0): Define.
+ (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
+ (RAOPT): Rename from RAO. Update all uses.
+ (powerpc_opcodes): Use RA0 as appropriate.
+
+2004-03-15 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
+
+2004-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * sparc-dis.c (print_insn_sparc): Update getword prototype.
+
+2004-03-12 Michal Ludvig <mludvig at suse.cz>
+
+ * i386-dis.c (GRPPLOCK): Delete.
+ (grps): Delete GRPPLOCK entry.
+
+2004-03-12 Alan Modra <amodra at bigpond.net.au>
+
+ * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
+ (M, Mp): Use OP_M.
+ (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
+ (GRPPADLCK): Define.
+ (dis386): Use NOP_Fixup on "nop".
+ (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
+ (twobyte_has_modrm): Set for 0xa7.
+ (padlock_table): Delete. Move to..
+ (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
+ and clflush.
+ (print_insn): Revert PADLOCK_SPECIAL code.
+ (OP_E): Delete sfence, lfence, mfence checks.
+
+2004-03-12 Jakub Jelinek <jakub at redhat.com>
+
+ * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
+ (INVLPG_Fixup): New function.
+ (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
+
+2004-03-12 Michal Ludvig <mludvig at suse.cz>
+
+ * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
+ (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
+ (padlock_table): New struct with PadLock instructions.
+ (print_insn): Handle PADLOCK_SPECIAL.
+
+2004-03-12 Alan Modra <amodra at bigpond.net.au>
+
+ * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
+ (OP_E): Twiddle clflush to sfence here.
+
+2004-03-08 Nick Clifton <nickc at redhat.com>
+
+ * po/de.po: Updated German translation.
+
+2003-03-03 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
+ nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
+ * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
+ accordingly.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * frv-asm.c: Regenerate.
+ * frv-desc.c: Regenerate.
+ * frv-desc.h: Regenerate.
+ * frv-dis.c: Regenerate.
+ * frv-ibld.c: Regenerate.
+ * frv-opc.c: Regenerate.
+ * frv-opc.h: Regenerate.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * frv-desc.c, frv-opc.c: Regenerate.
+
+2004-03-01 Richard Sandiford <rsandifo at redhat.com>
+
+ * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
+
+2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
+ Also correct mistake in the comment.
+
+2004-02-26 Andrew Stubbs <andrew.stubbs at superh.com>
+
+ * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
+ ensure that double registers have even numbers.
+ Add REG_N_B01 for nn01 (binary 01) nibble to ensure
+ that reserved instruction 0xfffd does not decode the same
+ as 0xfdfd (ftrv).
+ * sh-opc.h: Add REG_N_D nibble type and use it whereever
+ REG_N refers to a double register.
+ Add REG_N_B01 nibble type and use it instead of REG_NM
+ in ftrv.
+ Adjust the bit patterns in a few comments.
+
+2004-02-25 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
+
+2004-02-20 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
+
+2004-02-20 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
+
+2004-02-20 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
+ mtivor32, mtivor33, mtivor34.
+
+2004-02-19 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add mfmcar.
+
+2004-02-10 Petko Manolov <petkan at nucleusys.com>
+
+ * arm-opc.h Maverick accumulator register opcode fixes.
+
+2004-02-13 Ben Elliston <bje at wasabisystems.com>
+
+ * m32r-dis.c: Regenerate.
+
+2004-01-27 Michael Snyder <msnyder at redhat.com>
+
+ * sh-opc.h (sh_table): "fsrra", not "fssra".
+
+2004-01-23 Andrew Over <andrew.over at cs.anu.edu.au>
+
+ * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
+ contraints.
+
+2004-01-19 Andrew Over <andrew.over at cs.anu.edu.au>
+
+ * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
+
+2004-01-19 Alan Modra <amodra at bigpond.net.au>
+
+ * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
+ 1. Don't print scale factor on AT&T mode when index missing.
+
+2004-01-16 Alexandre Oliva <aoliva at redhat.com>
+
+ * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
+ when loaded into XR registers.
+
+2004-01-14 Richard Sandiford <rsandifo at redhat.com>
+
+ * frv-desc.h: Regenerate.
+ * frv-desc.c: Regenerate.
+ * frv-opc.c: Regenerate.
+
+2004-01-13 Michael Snyder <msnyder at redhat.com>
+
+ * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
+
+2004-01-09 Paul Brook <paul at codesourcery.com>
+
+ * arm-opc.h (arm_opcodes): Move generic mcrr after known
+ specific opcodes.
+
+2004-01-07 Daniel Jacobowitz <drow at mvista.com>
+
+ * Makefile.am (libopcodes_la_DEPENDENCIES)
+ (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
+ comment about the problem.
+ * Makefile.in: Regenerate.
+
+2004-01-06 Alexandre Oliva <aoliva at redhat.com>
+
+ 2003-12-19 Alexandre Oliva <aoliva at redhat.com>
+ * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
+ cut&paste errors in shifting/truncating numerical operands.
+ 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
+ * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
+ (parse_uslo16): Likewise.
+ (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
+ (parse_d12): Parse gotoff12 and gotofffuncdesc12.
+ (parse_s12): Likewise.
+ 2003-08-04 Alexandre Oliva <aoliva at redhat.com>
+ * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
+ (parse_uslo16): Likewise.
+ (parse_uhi16): Parse gothi and gotfuncdeschi.
+ (parse_d12): Parse got12 and gotfuncdesc12.
+ (parse_s12): Likewise.
+
+2004-01-02 Albert Bartoszko <albar at nt.kegel.com.pl>
+
+ * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
+ instruction which looks similar to an 'rla' instruction.
+
+For older changes see ChangeLog-0203
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Added: branches/binutils/package/opcodes/ChangeLog-2005
===================================================================
--- branches/binutils/package/opcodes/ChangeLog-2005 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ChangeLog-2005 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1253 @@
+2005-12-27 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-12-22 Laurent Menten <laurent.menten at teledisnet.be>
+
+ * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
+ invokevirtual, invokespecial, invokestatic, invokeinterface,
+ goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
+ getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
+ getstatic_quick, putstatic_quick, getstatic2_quick,
+ putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
+ invokesuper_quick, invokestatic_quick, invokeinterface_quick,
+ aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
+ checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
+ getfield_quick_w, putfield_quick_w, nonnull_quick,
+ agetfield_quick, aputfield_quick, agetstatic_quick,
+ aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
+ opcodes.
+
+2005-12-16 Nathan Sidwell <nathan at codesourcery.com>
+
+ Second part of ms1 to mt renaming.
+ * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
+ (stamp-mt): Adjust rule.
+ (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
+ adjust.
+ * Makefile.in: Rebuilt.
+ * configure: Rebuilt.
+ * configure.in (bfd_mt_arch): Rename & adjust.
+ * disassemble.c (ARCH_mt): Renamed.
+ (disassembler): Adjust.
+ * mt-asm.c: Renamed, rebuilt.
+ * mt-desc.c: Renamed, rebuilt.
+ * mt-desc.h: Renamed, rebuilt.
+ * mt-dis.c: Renamed, rebuilt.
+ * mt-ibld.c: Renamed, rebuilt.
+ * mt-opc.c: Renamed, rebuilt.
+ * mt-opc.h: Renamed, rebuilt.
+
+2005-12-13 DJ Delorie <dj at redhat.com>
+
+ * m32c-desc.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-12-12 Nathan Sidwell <nathan at codesourcery.com>
+
+ * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
+ * Makefile.in: Rebuilt.
+ * configure.in: Replace ms1 files with mt files.
+ * configure: Rebuilt.
+
+2005-12-08 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (MAXLEN): Reduce to architectural limit.
+ (fetch_data): Check for sufficient buffer size.
+
+2005-12-08 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (OP_ST): Remove prefix in Intel mode.
+
+2005-12-08 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
+
+2005-12-07 Hans-Peter Nilsson <hp at axis.com>
+
+ * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
+ MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
+
+2005-12-06 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR gas/1874
+ * i386-dis.c (address_mode): New enum type.
+ (address_mode): New variable.
+ (mode_64bit): Removed.
+ (ckprefix): Updated to check address_mode instead of mode_64bit.
+ (prefix_name): Likewise.
+ (print_insn): Likewise.
+ (putop): Likewise.
+ (print_operand_value): Likewise.
+ (intel_operand_size): Likewise.
+ (OP_E): Likewise.
+ (OP_G): Likewise.
+ (set_op): Likewise.
+ (OP_REG): Likewise.
+ (OP_I): Likewise.
+ (OP_I64): Likewise.
+ (OP_OFF): Likewise.
+ (OP_OFF64): Likewise.
+ (ptr_reg): Likewise.
+ (OP_C): Likewise.
+ (SVME_Fixup): Likewise.
+ (print_insn): Set address_mode.
+ (PNI_Fixup): Add 64bit and address size override support for
+ monitor and mwait.
+
+2005-12-06 Hans-Peter Nilsson <hp at axis.com>
+
+ * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
+ (print_with_operands): Check for prefix when [PC+] is seen.
+
+2005-12-02 Dave Brolley <brolley at redhat.com>
+
+ * configure.in (cgen_files): Add cgen-bitset.lo.
+ (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
+ * Makefile.am (CFILES): Add cgen-bitset.c.
+ (ALL_MACHINES): Add cgen-bitset.lo.
+ (cgen-bitset.lo): New target.
+ * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
+ (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
+ (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
+ (cgen_bitset_union): Moved from here ...
+ * cgen-bitset.c: ... to here. New file.
+ * Makefile.in: Regenerated.
+ * configure: Regenerated.
+
+2005-11-22 James E Wilson <wilson at specifix.com>
+
+ * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
+ opcode_fprintf_vma): New.
+ (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
+
+2005-11-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
+ frsqrtes.
+
+2005-11-14 David Ung <davidu at mips.com>
+
+ * mips16-opc.c: Add MIPS16e save/restore opcodes.
+ * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
+ codes for save/restore.
+
+2005-11-10 Andreas Schwab <schwab at suse.de>
+
+ * m68k-dis.c (print_insn_m68k): Only match FPU insns with
+ coprocessor ID 1.
+
+2005-11-08 H.J. Lu <hongjiu.lu at intel.com>
+
+ * m32c-desc.c: Regenerated.
+
+2005-11-08 Nathan Sidwell <nathan at codesourcery.com>
+
+ Add ms2.
+ * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
+ ms1-opc.c, ms1-opc.h: Regenerated.
+
+2005-11-07 Steve Ellcey <sje at cup.hp.com>
+
+ * configure: Regenerate after modifying bfd/warning.m4.
+
+2005-11-07 Alan Modra <amodra at bigpond.net.au>
+
+ * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
+ ignored rex prefixes here.
+ (print_insn): Instead, handle them similarly to fwait followed
+ by non-fp insns.
+
+2005-11-02 H.J. Lu <hongjiu.lu at intel.com>
+
+ * iq2000-desc.c: Regenerated.
+ * iq2000-desc.h: Likewise.
+ * iq2000-dis.c: Likewise.
+ * iq2000-opc.c: Likewise.
+
+2005-11-02 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (print_insn_thumb32): Word align blx target address.
+
+2005-10-31 Alan Modra <amodra at bigpond.net.au>
+
+ * arm-dis.c (print_insn): Warning fix.
+
+2005-10-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+
+ * dep-in.sed: Replace " ./" with " ".
+
+2005-10-28 Dave Brolley <brolley at redhat.com>
+
+ * All CGEN-generated sources: Regenerate.
+
+ Contribute the following changes:
+ 2005-09-19 Dave Brolley <brolley at redhat.com>
+
+ * disassemble.c (disassemble_init_for_target): Add 'break' to case for
+ bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
+ bfd_arch_m32c case.
+
+ 2005-02-16 Dave Brolley <brolley at redhat.com>
+
+ * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
+ cgen_isa_mask_* to cgen_bitset_*.
+ * cgen-opc.c: Likewise.
+
+ 2003-11-28 Richard Sandiford <rsandifo at redhat.com>
+
+ * cgen-dis.in (print_insn_ at arch@): Fix comparison with cached isas.
+ * *-dis.c: Regenerate.
+
+ 2003-06-05 DJ Delorie <dj at redhat.com>
+
+ * cgen-dis.in (print_insn_ at arch@): Copy prev_isas, don't assign
+ it, as it may point to a reused buffer. Set prev_isas when we
+ change cpus.
+
+ 2002-12-13 Dave Brolley <brolley at redhat.com>
+
+ * cgen-opc.c (cgen_isa_mask_create): New support function for
+ CGEN_ISA_MASK.
+ (cgen_isa_mask_init): Ditto.
+ (cgen_isa_mask_clear): Ditto.
+ (cgen_isa_mask_add): Ditto.
+ (cgen_isa_mask_set): Ditto.
+ (cgen_isa_supported): Ditto.
+ (cgen_isa_mask_compare): Ditto.
+ (cgen_isa_mask_intersection): Ditto.
+ (cgen_isa_mask_copy): Ditto.
+ (cgen_isa_mask_combine): Ditto.
+ * cgen-dis.in (libiberty.h): #include it.
+ (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
+ (print_insn_ at arch@): Use CGEN_ISA_MASK and support functions.
+ * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
+ * Makefile.in: Regenerated.
+
+2005-10-27 DJ Delorie <dj at redhat.com>
+
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-10-26 DJ Delorie <dj at redhat.com>
+
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-10-26 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (arm_opcodes): Correct "sel" entry.
+
+2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * m32r-asm.c: Regenerate.
+
+2005-10-25 DJ Delorie <dj at redhat.com>
+
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-10-25 Arnold Metselaar <arnold.metselaar at planet.nl>
+
+ * configure.in: Add target architecture bfd_arch_z80.
+ * configure: Regenerated.
+ * disassemble.c (disassembler)<ARCH_z80>: Add case
+ bfd_arch_z80.
+ * z80-dis.c: New file.
+
+2005-10-25 Alan Modra <amodra at bigpond.net.au>
+
+ * po/POTFILES.in: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2005-10-24 Jan Beulich <jbeulich at novell.com>
+
+ * ia64-asmtab.c: Regenerate.
+
+2005-10-21 DJ Delorie <dj at redhat.com>
+
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-10-21 Nick Clifton <nickc at redhat.com>
+
+ * bfin-dis.c: Tidy up code, removing redundant constructs.
+
+2005-10-19 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
+ instructions.
+
+2005-10-18 Nick Clifton <nickc at redhat.com>
+
+ * m32r-asm.c: Regenerate after updating m32r.opc.
+
+2005-10-18 Jie Zhang <jie.zhang at analog.com>
+
+ * bfin-dis.c (print_insn_bfin): Do proper endian transform when
+ reading instruction from memory.
+
+2005-10-18 Nick Clifton <nickc at redhat.com>
+
+ * m32r-asm.c: Regenerate after updating m32r.opc.
+
+2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro at renesas.com>
+
+ * m32r-asm.c: Regenerate after updating m32r.opc.
+
+2005-10-08 James Lemke <jim at wasabisystems.com>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
+ operations.
+
+2005-10-06 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ppc-dis.c (struct dis_private): Remove.
+ (powerpc_dialect): Avoid aliasing warnings.
+ (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
+
+2005-09-30 Nick Clifton <nickc at redhat.com>
+
+ * po/ga.po: New Irish translation.
+ * configure.in (ALL_LINGUAS): Add "ga".
+ * configure: Regenerate.
+
+2005-09-30 H.J. Lu <hongjiu.lu at intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+
+2005-09-30 Catherine Moore <clm at cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * bfin-dis.c: New file.
+ * configure.in: Bfin support.
+ * configure: Regenerated.
+ * disassemble.c (ARCH_bfin): Define.
+ (disassembler): Add case for bfd_arch_bfin.
+
+2005-09-28 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
+ (indirEv): Use it.
+ (stackEv): New.
+ (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
+ (dis386): Document and use new 'V' meta character. Use it for
+ single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
+ opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
+ (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
+ data prefix as used whenever DFLAG was examined. Handle 'V'.
+ (intel_operand_size): Use stack_v_mode.
+ (OP_E): Use stack_v_mode, but handle only the special case of
+ 64-bit mode without operand size override here; fall through to
+ v_mode case otherwise.
+ (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
+ and no operand size override is present.
+ (OP_J): Use get32s for obtaining the displacement also when rex64
+ is present.
+
+2005-09-08 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
+
+2005-09-06 Chao-ying Fu <fu at mips.com>
+
+ * mips-opc.c (MT32): New define.
+ (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
+ bottom to avoid opcode collision with "mftr" and "mttr".
+ Add MT instructions.
+ * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
+ (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
+ formats.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (coprocessor_opcodes): Add null terminator.
+
+2005-09-02 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (coprocessor_opcodes): New.
+ (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
+ (print_insn_coprocessor): New function.
+ (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
+ format characters.
+ (print_insn_thumb32): Use print_insn_coprocessor.
+
+2005-08-30 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
+
+2005-08-26 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (intel_operand_size): New, broken out from OP_E for
+ re-use.
+ (OP_E): Call intel_operand_size, move call site out of mode
+ dependent code.
+ (OP_OFF): Call intel_operand_size if suffix_always. Remove
+ ATTRIBUTE_UNUSED from parameters.
+ (OP_OFF64): Likewise.
+ (OP_ESreg): Call intel_operand_size.
+ (OP_DSreg): Likewise.
+ (OP_DIR): Use colon rather than semicolon as separator of far
+ jump/call operands.
+
+2005-08-25 Chao-ying Fu <fu at mips.com>
+
+ * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
+ (mips_builtin_opcodes): Add DSP instructions.
+ * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
+ mips64, mips64r2.
+ (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
+ operand formats.
+
+2005-08-23 David Ung <davidu at mips.com>
+
+ * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
+ instructions to the table.
+
+2005-08-18 Alan Modra <amodra at bigpond.net.au>
+
+ * a29k-dis.c: Delete.
+ * Makefile.am: Remove a29k support.
+ * configure.in: Likewise.
+ * disassemble.c: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2005-08-15 Daniel Jacobowitz <dan at codesourcery.com>
+
+ * ppc-dis.c (powerpc_dialect): Handle e300.
+ (print_ppc_disassembler_options): Likewise.
+ * ppc-opc.c (PPCE300): Define.
+ (powerpc_opcodes): Mark icbt as available for the e300.
+
+2005-08-13 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
+ Use "rp" instead of "%r2" in "b,l" insns.
+
+2005-08-12 Martin Schwidefsky <schwidefsky at de.ibm.com>
+
+ * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
+ * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
+ (main): Likewise.
+ * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
+ and 4 bit optional masks.
+ (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
+ INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
+ (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
+ MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
+ (s390_opformats): Likewise.
+ * s390-opc.txt: Add new instructions for cpu type z9-109.
+
+2005-08-05 John David Anglin <dave.anglin at nrc-crnc.gc.ca>
+
+ * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
+
+2005-07-29 Paul Brook <paul at codesourcery.com>
+
+ * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
+ (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
+
+2005-07-25 DJ Delorie <dj at redhat.com>
+
+ * m32c-asm.c Regenerate.
+ * m32c-dis.c Regenerate.
+
+2005-07-20 DJ Delorie <dj at redhat.com>
+
+ * disassemble.c (disassemble_init_for_target): M32C ISAs are
+ enums, so convert them to bit masks, which attributes are.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * configure.in: Restore alpha ordering to list of arches.
+ * configure: Regenerate.
+ * disassemble.c: Restore alpha ordering to list of arches.
+
+2005-07-18 Nick Clifton <nickc at redhat.com>
+
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.h: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+
+2005-07-18 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386-dis.c (PNI_Fixup): Update comment.
+ (VMX_Fixup): Properly handle the suffix check.
+
+2005-07-16 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
+
+ * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
+ mfctl disassembly.
+
+2005-07-16 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ (stamp-m32c): Fix cpu dependencies.
+ * Makefile.in: Regenerate.
+ * ip2k-dis.c: Regenerate.
+
+2007-07-15 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
+ (VMX_Fixup): New. Fix up Intel VMX Instructions.
+ (Em): New.
+ (Gm): New.
+ (VM): New.
+ (dis386_twobyte): Updated entries 0x78 and 0x79.
+ (twobyte_has_modrm): Likewise.
+ (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
+ (OP_G): Handle m_mode.
+
+2005-07-14 Jim Blandy <jimb at redhat.com>
+
+ Add support for the Renesas M32C and M16C.
+ * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
+ * m32c-desc.h, m32c-opc.h: New.
+ * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
+ (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
+ m32c-opc.c.
+ (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
+ m32c-ibld.lo, m32c-opc.lo.
+ (CLEANFILES): List stamp-m32c.
+ (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
+ (CGEN_CPUS): Add m32c.
+ (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
+ (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
+ (m32c_opc_h): New variable.
+ (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
+ (m32c-opc.lo): New rules.
+ * Makefile.in: Regenerated.
+ * configure.in: Add case for bfd_m32c_arch.
+ * configure: Regenerated.
+ * disassemble.c (ARCH_m32c): New.
+ [ARCH_m32c]: #include "m32c-desc.h".
+ (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
+ (disassemble_init_for_target) [ARCH_m32c]: Same.
+
+ * cgen-ops.h, cgen-types.h: New files.
+ * Makefile.am (HFILES): List them.
+ * Makefile.in: Regenerated.
+
+2005-07-07 Kaveh R. Ghazi <ghazi at caip.rutgers.edu>
+
+ * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
+ d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
+ ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
+ m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
+ ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
+ v850-dis.c: Fix format bugs.
+ * ia64-gen.c (fail, warn): Add format attribute.
+ * or32-opc.c (debug): Likewise.
+
+2005-07-07 Khem Raj <kraj at mvista.com>
+
+ * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
+ disassembly pattern.
+
+2005-07-06 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (stamp-m32r): Fix path to cpu files.
+ (stamp-m32r, stamp-iq2000): Likewise.
+ * Makefile.in: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
+ ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
+
+2005-07-05 Nick Clifton <nickc at redhat.com>
+
+ * iq2000-asm.c: Regenerate.
+ * ms1-asm.c: Regenerate.
+
+2005-07-05 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (SVME_Fixup): New.
+ (grps): Use it for the lidt entry.
+ (PNI_Fixup): Call OP_M rather than OP_E.
+ (INVLPG_Fixup): Likewise.
+
+2005-07-04 H.J. Lu <hongjiu.lu at intel.com>
+
+ * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
+
+2005-07-01 Nick Clifton <nickc at redhat.com>
+
+ * a29k-dis.c: Update to ISO C90 style function declarations and
+ fix formatting.
+ * alpha-opc.c: Likewise.
+ * arc-dis.c: Likewise.
+ * arc-opc.c: Likewise.
+ * avr-dis.c: Likewise.
+ * cgen-asm.in: Likewise.
+ * cgen-dis.in: Likewise.
+ * cgen-ibld.in: Likewise.
+ * cgen-opc.c: Likewise.
+ * cris-dis.c: Likewise.
+ * d10v-dis.c: Likewise.
+ * d30v-dis.c: Likewise.
+ * d30v-opc.c: Likewise.
+ * dis-buf.c: Likewise.
+ * dlx-dis.c: Likewise.
+ * h8300-dis.c: Likewise.
+ * h8500-dis.c: Likewise.
+ * hppa-dis.c: Likewise.
+ * i370-dis.c: Likewise.
+ * i370-opc.c: Likewise.
+ * m10200-dis.c: Likewise.
+ * m10300-dis.c: Likewise.
+ * m68k-dis.c: Likewise.
+ * m88k-dis.c: Likewise.
+ * mips-dis.c: Likewise.
+ * mmix-dis.c: Likewise.
+ * msp430-dis.c: Likewise.
+ * ns32k-dis.c: Likewise.
+ * or32-dis.c: Likewise.
+ * or32-opc.c: Likewise.
+ * pdp11-dis.c: Likewise.
+ * pj-dis.c: Likewise.
+ * s390-dis.c: Likewise.
+ * sh-dis.c: Likewise.
+ * sh64-dis.c: Likewise.
+ * sparc-dis.c: Likewise.
+ * sparc-opc.c: Likewise.
+ * sysdep.h: Likewise.
+ * tic30-dis.c: Likewise.
+ * tic4x-dis.c: Likewise.
+ * tic80-dis.c: Likewise.
+ * v850-dis.c: Likewise.
+ * v850-opc.c: Likewise.
+ * vax-dis.c: Likewise.
+ * w65-dis.c: Likewise.
+ * z8kgen.c: Likewise.
+
+ * fr30-*: Regenerate.
+ * frv-*: Regenerate.
+ * ip2k-*: Regenerate.
+ * iq2000-*: Regenerate.
+ * m32r-*: Regenerate.
+ * ms1-*: Regenerate.
+ * openrisc-*: Regenerate.
+ * xstormy16-*: Regenerate.
+
+2005-06-23 Ben Elliston <bje at gnu.org>
+
+ * m68k-dis.c: Use ISC C90.
+ * m68k-opc.c: Formatting fixes.
+
+2005-06-16 David Ung <davidu at mips.com>
+
+ * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
+ instructions to the table; seb/seh/sew/zeb/zeh/zew.
+
+2005-06-15 Dave Brolley <brolley at redhat.com>
+
+ Contribute Morpho ms1 on behalf of Red Hat
+ * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
+ ms1-opc.h: New files, Morpho ms1 target.
+
+ 2004-05-14 Stan Cox <scox at redhat.com>
+
+ * disassemble.c (ARCH_ms1): Define.
+ (disassembler): Handle bfd_arch_ms1
+
+ 2004-05-13 Michael Snyder <msnyder at redhat.com>
+
+ * Makefile.am, Makefile.in: Add ms1 target.
+ * configure.in: Ditto.
+
+2005-06-08 Zack Weinberg <zack at codesourcery.com>
+
+ * arm-opc.h: Delete; fold contents into ...
+ * arm-dis.c: ... here. Move includes of internal COFF headers
+ next to includes of internal ELF headers.
+ (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
+ (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
+ (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
+ (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
+ (iwmmxt_wwnames, iwmmxt_wwssnames):
+ Make const.
+ (regnames): Remove iWMMXt coprocessor register sets.
+ (iwmmxt_regnames, iwmmxt_cregnames): New statics.
+ (get_arm_regnames): Adjust fourth argument to match above changes.
+ (set_iwmmxt_regnames): Delete.
+ (print_insn_arm): Constify 'c'. Use ISO syntax for function
+ pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
+ and iwmmxt_cregnames, not set_iwmmxt_regnames.
+ (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
+ ISO syntax for function pointer calls.
+
+2005-06-07 Zack Weinberg <zack at codesourcery.com>
+
+ * arm-dis.c: Split up the comments describing the format codes, so
+ that the ARM and 16-bit Thumb opcode tables each have comments
+ preceding them that describe all the codes, and only the codes,
+ valid in those tables. (32-bit Thumb table is already like this.)
+ Reorder the lists in all three comments to match the order in
+ which the codes are implemented.
+ Remove all forward declarations of static functions. Convert all
+ function definitions to ISO C format.
+ (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
+ Return nothing.
+ (print_insn_thumb16): Remove unused case 'I'.
+ (print_insn): Update for changed calling convention of subroutines.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
+ hex (but retain it being displayed as signed). Remove redundant
+ checks. Add handling of displacements for 16-bit addressing in Intel
+ mode.
+
+2005-05-25 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
+ (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
+ masking of 'rm' in 16-bit memory address handling.
+
+2005-05-19 Anton Blanchard <anton at samba.org>
+
+ * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
+ (print_ppc_disassembler_options): Document it.
+ * ppc-opc.c (SVC_LEV): Define.
+ (LEV): Allow optional operand.
+ (POWER5): Define.
+ (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
+ "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
+
+2005-05-19 Kelley Cook <kcook at gcc.gnu.org>
+
+ * Makefile.in: Regenerate.
+
+2005-05-17 Zack Weinberg <zack at codesourcery.com>
+
+ * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
+ instructions. Adjust disassembly of some opcodes to match
+ unified syntax.
+ (thumb32_opcodes): New table.
+ (print_insn_thumb): Rename print_insn_thumb16; don't handle
+ two-halfword branches here.
+ (print_insn_thumb32): New function.
+ (print_insn): Choose among print_insn_arm, print_insn_thumb16,
+ and print_insn_thumb32. Be consistent about order of
+ halfwords when printing 32-bit instructions.
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ PR 843
+ * i386-dis.c (branch_v_mode): New.
+ (indirEv): Use branch_v_mode instead of v_mode.
+ (OP_E): Handle branch_v_mode.
+
+2005-05-07 H.J. Lu <hongjiu.lu at intel.com>
+
+ * d10v-dis.c (dis_2_short): Support 64bit host.
+
+2005-05-07 Nick Clifton <nickc at redhat.com>
+
+ * po/nl.po: Updated translation.
+
+2005-05-07 Nick Clifton <nickc at redhat.com>
+
+ * Update the address and phone number of the FSF organization in
+ the GPL notices in the following files:
+ a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
+ arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
+ avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
+ cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
+ crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
+ d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
+ fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
+ fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
+ frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
+ h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
+ i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
+ ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
+ ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
+ ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
+ ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
+ iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
+ iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
+ m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
+ m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
+ m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
+ maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
+ mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
+ openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
+ openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
+ or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
+ pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
+ s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
+ sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
+ tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
+ v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
+ xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
+ xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
+ xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
+
+2005-05-05 James E Wilson <wilson at specifixinc.com>
+
+ * ia64-opc.c: Include sysdep.h before libiberty.h.
+
+2005-05-05 Nick Clifton <nickc at redhat.com>
+
+ * configure.in (ALL_LINGUAS): Add vi.
+ * configure: Regenerate.
+ * po/vi.po: New.
+
+2005-04-26 Jerome Guitton <guitton at gnat.com>
+
+ * configure.in: Fix the check for basename declaration.
+ * configure: Regenerate.
+
+2005-04-19 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (RTO): Define.
+ (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
+ entries to suit PPC440.
+
+2005-04-18 Mark Kettenis <kettenis at gnu.org>
+
+ * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
+ Add xcrypt-ctr.
+
+2005-04-14 Nick Clifton <nickc at redhat.com>
+
+ * po/fi.po: New translation: Finnish.
+ * configure.in (ALL_LINGUAS): Add fi.
+ * configure: Regenerate.
+
+2005-04-14 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am (NO_WERROR): Define.
+ * configure.in: Invoke AM_BINUTILS_WARNINGS.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2005-04-04 Nick Clifton <nickc at redhat.com>
+
+ * fr30-asm.c: Regenerate.
+ * frv-asm.c: Regenerate.
+ * iq2000-asm.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
+ visible operands in Intel mode. The first operand of monitor is
+ %rax in 64-bit mode.
+
+2005-04-01 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
+ easier future additions.
+
+2005-03-31 Jerome Guitton <guitton at gnat.com>
+
+ * configure.in: Check for basename.
+ * configure: Regenerate.
+ * config.in: Ditto.
+
+2005-03-29 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386-dis.c (SEG_Fixup): New.
+ (Sv): New.
+ (dis386): Use "Sv" for 0x8c and 0x8e.
+
+2005-03-21 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+ Nick Clifton <nickc at redhat.com>
+
+ * vax-dis.c: (entry_addr): New varible: An array of user supplied
+ function entry mask addresses.
+ (entry_addr_occupied_slots): New variable: The number of occupied
+ elements in entry_addr.
+ (entry_addr_total_slots): New variable: The total number of
+ elements in entry_addr.
+ (parse_disassembler_options): New function. Fills in the entry_addr
+ array.
+ (free_entry_array): New function. Release the memory used by the
+ entry addr array. Suppressed because there is no way to call it.
+ (is_function_entry): Check if a given address is a function's
+ start address by looking at supplied entry mask addresses and
+ symbol information, if available.
+ (print_insn_vax): Use parse_disassembler_options and is_function_entry.
+
+2005-03-23 H.J. Lu <hongjiu.lu at intel.com>
+
+ * cris-dis.c (print_with_operands): Use ~31L for long instead
+ of ~31.
+
+2005-03-20 H.J. Lu <hongjiu.lu at intel.com>
+
+ * mmix-opc.c (O): Revert the last change.
+ (Z): Likewise.
+
+2005-03-19 H.J. Lu <hongjiu.lu at intel.com>
+
+ * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
+ (Z): Likewise.
+
+2005-03-19 Hans-Peter Nilsson <hp at bitrange.com>
+
+ * mmix-opc.c (O, Z): Force expression as unsigned long.
+
+2005-03-18 Nick Clifton <nickc at redhat.com>
+
+ * ip2k-asm.c: Regenerate.
+ * op/opcodes.pot: Regenerate.
+
+2005-03-16 Nick Clifton <nickc at redhat.com>
+ Ben Elliston <bje at au.ibm.com>
+
+ * configure.in (werror): New switch: Add -Werror to the
+ compiler command line. Enabled by default. Disable via
+ --disable-werror.
+ * configure: Regenerate.
+
+2005-03-16 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
+ BOOKE.
+
+2005-03-15 Alan Modra <amodra at bigpond.net.au>
+
+ * po/es.po: Commit new Spanish translation.
+
+ * po/fr.po: Commit new French translation.
+
+2005-03-14 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * vax-dis.c: Fix spelling error
+ (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
+ of just "Entry mask: < r1 ... >"
+
+2005-03-12 Zack Weinberg <zack at codesourcery.com>
+
+ * arm-dis.c (arm_opcodes): Document %E and %V.
+ Add entries for v6T2 ARM instructions:
+ bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
+ (print_insn_arm): Add support for %E and %V.
+ (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
+
+2005-03-10 Jeff Baker <jbaker at qnx.com>
+ Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
+ (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
+ (SPRG_MASK): Delete.
+ (XSPRG_MASK): Mask off extra bits now part of sprg field.
+ (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
+ mfsprg4..7 after msprg and consolidate.
+
+2005-03-09 Jan-Benedict Glaw <jbglaw at lug-owl.de>
+
+ * vax-dis.c (entry_mask_bit): New array.
+ (print_insn_vax): Decode function entry mask.
+
+2005-03-07 Aldy Hernandez <aldyh at redhat.com>
+
+ * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
+
+2005-03-05 Alan Modra <amodra at bigpond.net.au>
+
+ * po/opcodes.pot: Regenerate.
+
+2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan at codito.com>
+
+ * arc-dis.c (a4_decoding_class): New enum.
+ (dsmOneArcInst): Use the enum values for the decoding class.
+ Remove redundant case in the switch for decodingClass value 11.
+
+2005-03-02 Jan Beulich <jbeulich at novell.com>
+
+ * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
+ accesses.
+ (OP_C): Consider lock prefix in non-64-bit modes.
+
+2005-02-24 Alan Modra <amodra at bigpond.net.au>
+
+ * cris-dis.c (format_hex): Remove ineffective warning fix.
+ * crx-dis.c (make_instruction): Warning fix.
+ * frv-asm.c: Regenerate.
+
+2005-02-23 Nick Clifton <nickc at redhat.com>
+
+ * cgen-dis.in: Use bfd_byte for buffers that are passed to
+ read_memory.
+
+ * ia64-opc.c (locate_opcode_ent): Initialise opval array.
+
+ * crx-dis.c (make_instruction): Move argument structure into inner
+ scope and ensure that all of its fields are initialised before
+ they are used.
+
+ * fr30-asm.c: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * frv-asm.c: Regenerate.
+ * frv-dis.c: Regenerate.
+ * ip2k-asm.c: Regenerate.
+ * ip2k-dis.c: Regenerate.
+ * iq2000-asm.c: Regenerate.
+ * iq2000-dis.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+ * openrisc-dis.c: Regenerate.
+ * xstormy16-asm.c: Regenerate.
+ * xstormy16-dis.c: Regenerate.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * arc-ext.c: Warning fixes.
+ * arc-ext.h: Likewise.
+ * cgen-opc.c: Likewise.
+ * ia64-gen.c: Likewise.
+ * maxq-dis.c: Likewise.
+ * ns32k-dis.c: Likewise.
+ * w65-dis.c: Likewise.
+ * ia64-asmtab.c: Regenerate.
+
+2005-02-22 Alan Modra <amodra at bigpond.net.au>
+
+ * fr30-desc.c: Regenerate.
+ * fr30-desc.h: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+ * frv-desc.c: Regenerate.
+ * frv-desc.h: Regenerate.
+ * frv-opc.c: Regenerate.
+ * frv-opc.h: Regenerate.
+ * ip2k-desc.c: Regenerate.
+ * ip2k-desc.h: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * ip2k-opc.h: Regenerate.
+ * iq2000-desc.c: Regenerate.
+ * iq2000-desc.h: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * iq2000-opc.h: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opc.h: Regenerate.
+ * m32r-opinst.c: Regenerate.
+ * openrisc-desc.c: Regenerate.
+ * openrisc-desc.h: Regenerate.
+ * openrisc-opc.c: Regenerate.
+ * openrisc-opc.h: Regenerate.
+ * xstormy16-desc.c: Regenerate.
+ * xstormy16-desc.h: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * xstormy16-opc.h: Regenerate.
+
+2005-02-21 Alan Modra <amodra at bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am"
+ * Makefile.in: Regenerate.
+
+2005-02-15 Nick Clifton <nickc at redhat.com>
+
+ * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
+ compile time warnings.
+ (print_keyword): Likewise.
+ (default_print_insn): Likewise.
+
+ * fr30-desc.c: Regenerated.
+ * fr30-desc.h: Regenerated.
+ * fr30-dis.c: Regenerated.
+ * fr30-opc.c: Regenerated.
+ * fr30-opc.h: Regenerated.
+ * frv-desc.c: Regenerated.
+ * frv-dis.c: Regenerated.
+ * frv-opc.c: Regenerated.
+ * ip2k-asm.c: Regenerated.
+ * ip2k-desc.c: Regenerated.
+ * ip2k-desc.h: Regenerated.
+ * ip2k-dis.c: Regenerated.
+ * ip2k-opc.c: Regenerated.
+ * ip2k-opc.h: Regenerated.
+ * iq2000-desc.c: Regenerated.
+ * iq2000-dis.c: Regenerated.
+ * iq2000-opc.c: Regenerated.
+ * m32r-asm.c: Regenerated.
+ * m32r-desc.c: Regenerated.
+ * m32r-desc.h: Regenerated.
+ * m32r-dis.c: Regenerated.
+ * m32r-opc.c: Regenerated.
+ * m32r-opc.h: Regenerated.
+ * m32r-opinst.c: Regenerated.
+ * openrisc-desc.c: Regenerated.
+ * openrisc-desc.h: Regenerated.
+ * openrisc-dis.c: Regenerated.
+ * openrisc-opc.c: Regenerated.
+ * openrisc-opc.h: Regenerated.
+ * xstormy16-desc.c: Regenerated.
+ * xstormy16-desc.h: Regenerated.
+ * xstormy16-dis.c: Regenerated.
+ * xstormy16-opc.c: Regenerated.
+ * xstormy16-opc.h: Regenerated.
+
+2005-02-14 H.J. Lu <hongjiu.lu at intel.com>
+
+ * dis-buf.c (perror_memory): Use sprintf_vma to print out
+ address.
+
+2005-02-11 Nick Clifton <nickc at redhat.com>
+
+ * iq2000-asm.c: Regenerate.
+
+ * frv-dis.c: Regenerate.
+
+2005-02-07 Jim Blandy <jimb at redhat.com>
+
+ * Makefile.am (CGEN): Load guile.scm before calling the main
+ application script.
+ * Makefile.in: Regenerated.
+ * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
+ Simply pass the cgen-opc.scm path to ${cgen} as its first
+ argument; ${cgen} itself now contains the '-s', or whatever is
+ appropriate for the Scheme being used.
+
+2005-01-31 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Jan Beulich <jbeulich at novell.com>
+
+ * ia64-gen.c (NELEMS): Define.
+ (shrink): Generate alias with missing second predicate register when
+ opcode has two outputs and these are both predicates.
+ * ia64-opc-i.c (FULL17): Define.
+ (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
+ here to generate output template.
+ (TBITCM, TNATCM): Undefine after use.
+ * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
+ first input. Add ld16 aliases without ar.csd as second output. Add
+ st16 aliases without ar.csd as second input. Add cmpxchg aliases
+ without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
+ ar.ccv as third/fourth inputs. Consolidate through...
+ (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
+ CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
+ * ia64-asmtab.c: Regenerate.
+
+2005-01-27 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-25 Alexandre Oliva <aoliva at redhat.com>
+
+ 2004-11-10 Alexandre Oliva <aoliva at redhat.com>
+ * frv-asm.c: Rebuilt.
+ * frv-desc.c: Rebuilt.
+ * frv-desc.h: Rebuilt.
+ * frv-dis.c: Rebuilt.
+ * frv-ibld.c: Rebuilt.
+ * frv-opc.c: Rebuilt.
+ * frv-opc.h: Rebuilt.
+
+2005-01-24 Andrew Cagney <cagney at gnu.org>
+
+ * configure: Regenerate, ../gettext.m4 was updated.
+
+2005-01-21 Fred Fish <fnf at specifixinc.com>
+
+ * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
+ Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
+ Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
+ * mips-dis.c: Ditto.
+
+2005-01-20 Alan Modra <amodra at bigpond.net.au>
+
+ * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
+
+2005-01-19 Fred Fish <fnf at specifixinc.com>
+
+ * mips-dis.c (no_aliases): New disassembly option flag.
+ (set_default_mips_dis_options): Init no_aliases to zero.
+ (parse_mips_dis_option): Handle no-aliases option.
+ (print_insn_mips): Ignore table entries that are aliases
+ if no_aliases is set.
+ (print_insn_mips16): Ditto.
+ * mips-opc.c (mips_builtin_opcodes): Add initializer column for
+ new pinfo2 member and add INSN_ALIAS initializers as needed. Also
+ move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
+ * mips16-opc.c (mips16_opcodes): Ditto.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs at st.com>
+
+ * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
+ (inheritance diagram): Add missing edge.
+ (arch_sh1_up): Rename arch_sh_up to match external name to make life
+ easier for the testsuite.
+ (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
+ (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
+ (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
+ arch_sh2a_or_sh4_up child.
+ (sh_table): Do renaming as above.
+ Correct comment for ldc.l for gas testsuite to read.
+ Remove rogue mul.l from sh1 (duplicate of the one for sh2).
+ Correct comments for movy.w and movy.l for gas testsuite to read.
+ Correct comments for fmov.d and fmov.s for gas testsuite to read.
+
+2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
+
+2005-01-12 H.J. Lu <hongjiu.lu at intel.com>
+
+ * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
+
+2005-01-10 Andreas Schwab <schwab at suse.de>
+
+ * disassemble.c (disassemble_init_for_target) <case
+ bfd_arch_ia64>: Set skip_zeroes to 16.
+ <case bfd_arch_tic4x>: Set skip_zeroes to 32.
+
+For older changes see ChangeLog-2004
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
Modified: branches/binutils/package/opcodes/Makefile.am
===================================================================
--- branches/binutils/package/opcodes/Makefile.am 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/Makefile.am 2006-04-19 08:33:31 UTC (rev 12)
@@ -15,6 +15,9 @@
bfdlibdir = @bfdlibdir@
bfdincludedir = @bfdincludedir@
+.PHONY: install-html
+install-html:
+
bfdlib_LTLIBRARIES = libopcodes.la
# This is where bfd.h lives.
@@ -36,12 +39,13 @@
m32c-desc.h m32c-opc.h \
m32r-desc.h m32r-opc.h \
mcore-opc.h \
- ms1-desc.h ms1-opc.h \
+ mt-desc.h mt-opc.h \
openrisc-desc.h openrisc-opc.h \
sh-opc.h \
sh64-opc.h \
sysdep.h \
w65-opc.h \
+ xc16x-desc.h xc16x-opc.h \
xstormy16-desc.h xstormy16-opc.h \
z8k-opc.h
@@ -136,11 +140,11 @@
m10300-opc.c \
mmix-dis.c \
mmix-opc.c \
- ms1-asm.c \
- ms1-desc.c \
- ms1-dis.c \
- ms1-ibld.c \
- ms1-opc.c \
+ mt-asm.c \
+ mt-desc.c \
+ mt-dis.c \
+ mt-ibld.c \
+ mt-opc.c \
ns32k-dis.c \
openrisc-asm.c \
openrisc-desc.c \
@@ -173,6 +177,11 @@
v850-opc.c \
vax-dis.c \
w65-dis.c \
+ xc16x-asm.c \
+ xc16x-desc.c \
+ xc16x-dis.c \
+ xc16x-ibld.c \
+ xc16x-opc.c \
xstormy16-asm.c \
xstormy16-desc.c \
xstormy16-dis.c \
@@ -262,12 +271,12 @@
mips16-opc.lo \
mmix-dis.lo \
mmix-opc.lo \
- ms1-asm.lo \
- ms1-desc.lo \
- ms1-dis.lo \
- ms1-ibld.lo \
- ms1-opc.lo \
msp430-dis.lo \
+ mt-asm.lo \
+ mt-desc.lo \
+ mt-dis.lo \
+ mt-ibld.lo \
+ mt-opc.lo \
ns32k-dis.lo \
openrisc-asm.lo \
openrisc-desc.lo \
@@ -299,6 +308,11 @@
v850-opc.lo \
vax-dis.lo \
w65-dis.lo \
+ xc16x-asm.lo \
+ xc16x-desc.lo \
+ xc16x-dis.lo \
+ xc16x-ibld.lo \
+ xc16x-opc.lo \
xstormy16-asm.lo \
xstormy16-desc.lo \
xstormy16-dis.lo \
@@ -378,7 +392,7 @@
CLEANFILES = \
stamp-ip2k stamp-m32c stamp-m32r stamp-fr30 stamp-frv \
- stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 \
+ stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 stamp-xc16x\
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
@@ -394,7 +408,7 @@
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xc16x xstormy16
if CGEN_MAINT
IP2K_DEPS = stamp-ip2k
@@ -405,6 +419,7 @@
MT_DEPS = stamp-mt
OPENRISC_DEPS = stamp-openrisc
IQ2000_DEPS = stamp-iq2000
+XC16X_DEPS = stamp-xc16x
XSTORMY16_DEPS = stamp-xstormy16
else
IP2K_DEPS =
@@ -415,6 +430,7 @@
MT_DEPS =
OPENRISC_DEPS =
IQ2000_DEPS =
+XC16X_DEPS =
XSTORMY16_DEPS =
endif
@@ -484,10 +500,10 @@
$(MAKE) run-cgen arch=frv prefix=frv options= \
archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
-$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MT_DEPS)
+$(srcdir)/mt-desc.h $(srcdir)/mt-desc.c $(srcdir)/mt-opc.h $(srcdir)/mt-opc.c $(srcdir)/mt-ibld.c $(srcdir)/mt-asm.c $(srcdir)/mt-dis.c: $(MT_DEPS)
@true
stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc
- $(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
+ $(MAKE) run-cgen arch=mt prefix=mt options= \
archfile=$(srcdir)/../cpu/mt.cpu \
opcfile=$(srcdir)/../cpu/mt.opc extrafiles=
@@ -512,6 +528,12 @@
$(MAKE) run-cgen arch=xstormy16 prefix=xstormy16 options= \
archfile=$(CPUDIR)/xstormy16.cpu opcfile=$(CPUDIR)/xstormy16.opc extrafiles=
+$(srcdir)/xc16x-desc.h $(srcdir)/xc16x-desc.c $(srcdir)/xc16x-opc.h $(srcdir)/xc16x-opc.c $(srcdir)/xc16x-ibld.c $(srcdir)/xc16x-asm.c $(srcdir)/xc16x-dis.c: $(XC16X_DEPS)
+ @true
+stamp-xc16x: $(CGENDEPS) $(CPUDIR)/xc16x.cpu $(CPUDIR)/xc16x.opc
+ $(MAKE) run-cgen arch=xc16x prefix=xc16x options= \
+ archfile=$(CPUDIR)/xc16x.cpu opcfile=$(CPUDIR)/xc16x.opc extrafiles=
+
ia64-gen: ia64-gen.o
$(LINK) ia64-gen.o $(LIBIBERTY)
@@ -579,166 +601,131 @@
# DO NOT DELETE THIS LINE -- mkdep uses it.
# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/alpha.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/alpha.h
alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/symcat.h \
+ opintl.h
arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h $(BFDDIR)/elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \
- opintl.h arc-dis.h arc-ext.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \
+ $(INCDIR)/elf/reloc-macros.h opintl.h arc-dis.h arc-ext.h
arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
+ $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
opintl.h
arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(BFD_H) $(INCDIR)/symcat.h arc-ext.h $(INCDIR)/libiberty.h
arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arm.h \
+ opintl.h $(INCDIR)/safe-ctype.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h
avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/avr.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h
bfin-dis.lo: bfin-dis.c $(INCDIR)/opcode/bfin.h $(INCDIR)/dis-asm.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
opintl.h
-cgen-bitset.lo: cgen-bitset.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+cgen-bitset.lo: cgen-bitset.c $(INCDIR)/libiberty.h \
+ $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cgen-bitset.h
cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+ $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h \
+ $(INCDIR)/opcode/cgen-bitset.h
cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h
cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
crx-dis.lo: crx-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/opcode/crx.h
+ $(INCDIR)/opcode/crx.h
crx-opc.lo: crx-opc.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/opcode/crx.h
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
d10v-opc.lo: d10v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h
d30v-dis.lo: d30v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d30v.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/symcat.h opintl.h
d30v-opc.lo: d30v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d30v.h
dlx-dis.lo: dlx-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/dlx.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/dlx.h
dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- opintl.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h
dis-init.lo: dis-init.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H)
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
disassemble.lo: disassemble.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h
+ fr30-opc.h opintl.h
fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h
fr30-opc.lo: fr30-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h $(INCDIR)/libiberty.h
frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h
+ frv-opc.h opintl.h
frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
frv-opc.h opintl.h $(INCDIR)/safe-ctype.h
frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/elf/frv.h \
- $(INCDIR)/elf/reloc-macros.h
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h opintl.h
+ h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ opintl.h
hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(BFDDIR)/libhppa.h \
+ $(INCDIR)/opcode/hppa.h
i370-dis.lo: i370-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/i370.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/i370.h
i370-opc.lo: i370-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/i370.h
i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h opintl.h
+ opintl.h
i860-dis.lo: i860-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/i860.h
i960-dis.lo: i960-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
ia64-dis.lo: ia64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h \
- $(BFD_H)
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h
ia64-opc-a.lo: ia64-opc-a.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
ia64-opc-b.lo: ia64-opc-b.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
@@ -751,351 +738,288 @@
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
ia64-opc-d.lo: ia64-opc-d.c
ia64-opc.lo: ia64-opc.c $(INCDIR)/ansidecl.h sysdep.h \
- config.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- ia64-asmtab.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h ia64-asmtab.c
+ config.h $(INCDIR)/libiberty.h ia64-asmtab.h $(INCDIR)/opcode/ia64.h \
+ $(BFD_H) $(INCDIR)/symcat.h ia64-asmtab.c
ia64-gen.lo: ia64-gen.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h sysdep.h \
- config.h $(INCDIR)/getopt.h ia64-opc.h $(INCDIR)/opcode/ia64.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h ia64-opc-a.c \
- ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c ia64-opc-f.c \
- ia64-opc-x.c ia64-opc-d.c
+ $(INCDIR)/safe-ctype.h sysdep.h config.h $(INCDIR)/getopt.h \
+ ia64-opc.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/symcat.h \
+ ia64-opc-a.c ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c \
+ ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c
ia64-asmtab.lo: ia64-asmtab.c
ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
ip2k-desc.lo: ip2k-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
ip2k-dis.lo: ip2k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h
+ ip2k-opc.h opintl.h
ip2k-ibld.lo: ip2k-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
ip2k-opc.h opintl.h $(INCDIR)/safe-ctype.h
ip2k-opc.lo: ip2k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/safe-ctype.h
iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- iq2000-desc.h $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h \
- $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- iq2000-desc.h $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/xregex.h \
- $(INCDIR)/xregex2.h
+ $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
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+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h $(INCDIR)/libiberty.h \
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+ $(INCDIR)/opcode/cgen.h iq2000-opc.h $(INCDIR)/libiberty.h
m32c-asm.lo: m32c-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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+ $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
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$(INCDIR)/safe-ctype.h
m32c-desc.lo: m32c-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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+ $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
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m32c-dis.lo: m32c-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
m32c-ibld.lo: m32c-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32c-opc.h cgen-types.h cgen-ops.h opintl.h $(INCDIR)/safe-ctype.h
m32c-opc.lo: m32c-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32r-asm.lo: m32r-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32r-desc.lo: m32r-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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m32r-ibld.lo: m32r-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32r-opc.h opintl.h $(INCDIR)/safe-ctype.h
m32r-opc.lo: m32r-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32r-opinst.lo: m32r-opinst.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m68hc11-dis.lo: m68hc11-dis.c $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68hc11.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
m68hc11-opc.lo: m68hc11-opc.c $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68hc11.h
m68k-dis.lo: m68k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m68k-opc.lo: m68k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68k.h
m88k-dis.lo: m88k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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maxq-dis.lo: maxq-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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mcore-dis.lo: mcore-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h
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mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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mips-opc.lo: mips-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mips.h
mips16-opc.lo: mips16-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mips.h
m10200-dis.lo: m10200-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10200.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
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m10200-opc.lo: m10200-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10200.h
m10300-dis.lo: m10300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10300.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
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m10300-opc.lo: m10300-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10300.h
mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode/mmix.h $(INCDIR)/dis-asm.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
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mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
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$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
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-ms1-ibld.lo: ms1-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
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openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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openrisc-desc.lo: openrisc-desc.c sysdep.h config.h \
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$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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+ openrisc-opc.h opintl.h
openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- opintl.h $(INCDIR)/safe-ctype.h
-openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ openrisc-opc.h opintl.h $(INCDIR)/safe-ctype.h
+openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h openrisc-opc.h $(INCDIR)/libiberty.h
or32-dis.lo: or32-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/or32.h \
$(INCDIR)/safe-ctype.h
or32-opc.lo: or32-opc.c $(INCDIR)/safe-ctype.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/or32.h
pdp11-dis.lo: pdp11-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/pdp11.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/pdp11.h
pdp11-opc.lo: pdp11-opc.c $(INCDIR)/opcode/pdp11.h
pj-dis.lo: pj-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
pj-opc.lo: pj-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/pj.h
ppc-dis.lo: ppc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/ppc.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/ppc.h
ppc-opc.lo: ppc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/ppc.h opintl.h
s390-mkopc.lo: s390-mkopc.c
s390-opc.lo: s390-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/s390.h \
s390-opc.tab
s390-dis.lo: s390-dis.c $(INCDIR)/ansidecl.h sysdep.h \
- config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/s390.h
+ config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ $(INCDIR)/opcode/s390.h
sh-dis.lo: sh-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- sh-opc.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/dis-asm.h $(BFD_H)
+ sh-opc.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/dis-asm.h
sh64-dis.lo: sh64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h sh64-opc.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf32-sh64.h
+ sh64-opc.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
+ $(BFDDIR)/elf32-sh64.h
sh64-opc.lo: sh64-opc.c sh64-opc.h
sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h opintl.h
+ $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h opintl.h
sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h
+ $(INCDIR)/opcode/sparc.h
tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic30.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h
tic4x-dis.lo: tic4x-dis.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic4x.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic4x.h
tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic54x.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \
+ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
tic54x-opc.lo: tic54x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic54x.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h
tic80-dis.lo: tic80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/tic80.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
tic80-opc.lo: tic80-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/tic80.h
v850-dis.lo: v850-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/v850.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/symcat.h opintl.h
v850-opc.lo: v850-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/v850.h opintl.h
vax-dis.lo: vax-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/vax.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
-w65-dis.lo: w65-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h
+w65-dis.lo: w65-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
xstormy16-asm.lo: xstormy16-asm.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ xstormy16-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
xstormy16-desc.lo: xstormy16-desc.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+ xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h
xstormy16-dis.lo: xstormy16-dis.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
- xstormy16-opc.h opintl.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ $(INCDIR)/libiberty.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h
xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ xstormy16-opc.h opintl.h $(INCDIR)/safe-ctype.h
xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ xstormy16-opc.h $(INCDIR)/libiberty.h
+xc16x-asm.lo: xc16x-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+xc16x-desc.lo: xc16x-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h
+xc16x-dis.lo: xc16x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ xc16x-desc.h $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h
+xc16x-ibld.lo: xc16x-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h \
+ $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h $(INCDIR)/safe-ctype.h
+xc16x-opc.lo: xc16x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h $(INCDIR)/libiberty.h
xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h sysdep.h \
+ config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- z8k-opc.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h
z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(INCDIR)/libiberty.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
Modified: branches/binutils/package/opcodes/Makefile.in
===================================================================
--- branches/binutils/package/opcodes/Makefile.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/Makefile.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -257,12 +257,13 @@
m32c-desc.h m32c-opc.h \
m32r-desc.h m32r-opc.h \
mcore-opc.h \
- ms1-desc.h ms1-opc.h \
+ mt-desc.h mt-opc.h \
openrisc-desc.h openrisc-opc.h \
sh-opc.h \
sh64-opc.h \
sysdep.h \
w65-opc.h \
+ xc16x-desc.h xc16x-opc.h \
xstormy16-desc.h xstormy16-opc.h \
z8k-opc.h
@@ -358,11 +359,11 @@
m10300-opc.c \
mmix-dis.c \
mmix-opc.c \
- ms1-asm.c \
- ms1-desc.c \
- ms1-dis.c \
- ms1-ibld.c \
- ms1-opc.c \
+ mt-asm.c \
+ mt-desc.c \
+ mt-dis.c \
+ mt-ibld.c \
+ mt-opc.c \
ns32k-dis.c \
openrisc-asm.c \
openrisc-desc.c \
@@ -395,6 +396,11 @@
v850-opc.c \
vax-dis.c \
w65-dis.c \
+ xc16x-asm.c \
+ xc16x-desc.c \
+ xc16x-dis.c \
+ xc16x-ibld.c \
+ xc16x-opc.c \
xstormy16-asm.c \
xstormy16-desc.c \
xstormy16-dis.c \
@@ -484,12 +490,12 @@
mips16-opc.lo \
mmix-dis.lo \
mmix-opc.lo \
- ms1-asm.lo \
- ms1-desc.lo \
- ms1-dis.lo \
- ms1-ibld.lo \
- ms1-opc.lo \
msp430-dis.lo \
+ mt-asm.lo \
+ mt-desc.lo \
+ mt-dis.lo \
+ mt-ibld.lo \
+ mt-opc.lo \
ns32k-dis.lo \
openrisc-asm.lo \
openrisc-desc.lo \
@@ -521,6 +527,11 @@
v850-opc.lo \
vax-dis.lo \
w65-dis.lo \
+ xc16x-asm.lo \
+ xc16x-desc.lo \
+ xc16x-dis.lo \
+ xc16x-ibld.lo \
+ xc16x-opc.lo \
xstormy16-asm.lo \
xstormy16-desc.lo \
xstormy16-dis.lo \
@@ -554,7 +565,7 @@
POTFILES = $(HFILES) $(CFILES)
CLEANFILES = \
stamp-ip2k stamp-m32c stamp-m32r stamp-fr30 stamp-frv \
- stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 \
+ stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 stamp-xc16x\
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
CGENDIR = @cgendir@
@@ -568,7 +579,7 @@
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xc16x xstormy16
@CGEN_MAINT_FALSE at IP2K_DEPS =
@CGEN_MAINT_TRUE at IP2K_DEPS = stamp-ip2k
@CGEN_MAINT_FALSE at M32C_DEPS =
@@ -585,6 +596,8 @@
@CGEN_MAINT_TRUE at OPENRISC_DEPS = stamp-openrisc
@CGEN_MAINT_FALSE at IQ2000_DEPS =
@CGEN_MAINT_TRUE at IQ2000_DEPS = stamp-iq2000
+ at CGEN_MAINT_FALSE@XC16X_DEPS =
+ at CGEN_MAINT_TRUE@XC16X_DEPS = stamp-xc16x
@CGEN_MAINT_FALSE at XSTORMY16_DEPS =
@CGEN_MAINT_TRUE at XSTORMY16_DEPS = stamp-xstormy16
m32c_opc_h = m32c-opc.h cgen-types.h cgen-ops.h
@@ -920,6 +933,9 @@
uninstall-bfdlibLTLIBRARIES uninstall-info-am
+.PHONY: install-html
+install-html:
+
disassemble.lo: disassemble.c $(INCDIR)/dis-asm.h
$(LIBTOOL) --mode=compile $(COMPILE) -c @archdefs@ $(srcdir)/disassemble.c
@@ -1026,10 +1042,10 @@
$(MAKE) run-cgen arch=frv prefix=frv options= \
archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
-$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MT_DEPS)
+$(srcdir)/mt-desc.h $(srcdir)/mt-desc.c $(srcdir)/mt-opc.h $(srcdir)/mt-opc.c $(srcdir)/mt-ibld.c $(srcdir)/mt-asm.c $(srcdir)/mt-dis.c: $(MT_DEPS)
@true
stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc
- $(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
+ $(MAKE) run-cgen arch=mt prefix=mt options= \
archfile=$(srcdir)/../cpu/mt.cpu \
opcfile=$(srcdir)/../cpu/mt.opc extrafiles=
@@ -1054,6 +1070,12 @@
$(MAKE) run-cgen arch=xstormy16 prefix=xstormy16 options= \
archfile=$(CPUDIR)/xstormy16.cpu opcfile=$(CPUDIR)/xstormy16.opc extrafiles=
+$(srcdir)/xc16x-desc.h $(srcdir)/xc16x-desc.c $(srcdir)/xc16x-opc.h $(srcdir)/xc16x-opc.c $(srcdir)/xc16x-ibld.c $(srcdir)/xc16x-asm.c $(srcdir)/xc16x-dis.c: $(XC16X_DEPS)
+ @true
+stamp-xc16x: $(CGENDEPS) $(CPUDIR)/xc16x.cpu $(CPUDIR)/xc16x.opc
+ $(MAKE) run-cgen arch=xc16x prefix=xc16x options= \
+ archfile=$(CPUDIR)/xc16x.cpu opcfile=$(CPUDIR)/xc16x.opc extrafiles=
+
ia64-gen: ia64-gen.o
$(LINK) ia64-gen.o $(LIBIBERTY)
@@ -1121,166 +1143,131 @@
# DO NOT DELETE THIS LINE -- mkdep uses it.
# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/alpha.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/alpha.h
alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/symcat.h \
+ opintl.h
arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h $(BFDDIR)/elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
- $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \
- opintl.h arc-dis.h arc-ext.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \
+ $(INCDIR)/elf/reloc-macros.h opintl.h arc-dis.h arc-ext.h
arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
+ $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
opintl.h
arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(BFD_H) $(INCDIR)/symcat.h arc-ext.h $(INCDIR)/libiberty.h
arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \
- $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
- $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/arm.h \
- $(INCDIR)/elf/reloc-macros.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arm.h \
+ opintl.h $(INCDIR)/safe-ctype.h $(INCDIR)/coff/internal.h \
+ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h
avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/avr.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h
bfin-dis.lo: bfin-dis.c $(INCDIR)/opcode/bfin.h $(INCDIR)/dis-asm.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
opintl.h
-cgen-bitset.lo: cgen-bitset.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+cgen-bitset.lo: cgen-bitset.c $(INCDIR)/libiberty.h \
+ $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cgen-bitset.h
cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+ $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h \
+ $(INCDIR)/opcode/cgen-bitset.h
cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h
cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
crx-dis.lo: crx-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/opcode/crx.h
+ $(INCDIR)/opcode/crx.h
crx-opc.lo: crx-opc.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h $(INCDIR)/opcode/crx.h
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
d10v-opc.lo: d10v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h
d30v-dis.lo: d30v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d30v.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/symcat.h opintl.h
d30v-opc.lo: d30v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d30v.h
dlx-dis.lo: dlx-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/dlx.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/dlx.h
dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- opintl.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h
dis-init.lo: dis-init.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H)
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
disassemble.lo: disassemble.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- opintl.h
+ fr30-opc.h opintl.h
fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h
fr30-opc.lo: fr30-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h fr30-opc.h $(INCDIR)/libiberty.h
frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- opintl.h
+ frv-opc.h opintl.h
frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
frv-opc.h opintl.h $(INCDIR)/safe-ctype.h
frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/elf/frv.h \
- $(INCDIR)/elf/reloc-macros.h
+ $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h
+ $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h opintl.h
+ h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ opintl.h
hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(BFDDIR)/libhppa.h \
+ $(INCDIR)/opcode/hppa.h
i370-dis.lo: i370-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/i370.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/i370.h
i370-opc.lo: i370-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/i370.h
i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h opintl.h
+ opintl.h
i860-dis.lo: i860-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/i860.h
i960-dis.lo: i960-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
ia64-dis.lo: ia64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h \
- $(BFD_H)
+ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h
ia64-opc-a.lo: ia64-opc-a.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
ia64-opc-b.lo: ia64-opc-b.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
@@ -1293,353 +1280,290 @@
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
ia64-opc-d.lo: ia64-opc-d.c
ia64-opc.lo: ia64-opc.c $(INCDIR)/ansidecl.h sysdep.h \
- config.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- ia64-asmtab.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h ia64-asmtab.c
+ config.h $(INCDIR)/libiberty.h ia64-asmtab.h $(INCDIR)/opcode/ia64.h \
+ $(BFD_H) $(INCDIR)/symcat.h ia64-asmtab.c
ia64-gen.lo: ia64-gen.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h sysdep.h \
- config.h $(INCDIR)/getopt.h ia64-opc.h $(INCDIR)/opcode/ia64.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h ia64-opc-a.c \
- ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c ia64-opc-f.c \
- ia64-opc-x.c ia64-opc-d.c
+ $(INCDIR)/safe-ctype.h sysdep.h config.h $(INCDIR)/getopt.h \
+ ia64-opc.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/symcat.h \
+ ia64-opc-a.c ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c \
+ ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c
ia64-asmtab.lo: ia64-asmtab.c
ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
ip2k-desc.lo: ip2k-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/libiberty.h \
$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
ip2k-dis.lo: ip2k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- opintl.h
+ ip2k-opc.h opintl.h
ip2k-ibld.lo: ip2k-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
ip2k-opc.h opintl.h $(INCDIR)/safe-ctype.h
ip2k-opc.lo: ip2k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h ip2k-opc.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/safe-ctype.h
iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- iq2000-desc.h $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h \
- $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/xregex.h \
- $(INCDIR)/xregex2.h
+ $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- iq2000-desc.h $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h opintl.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ iq2000-opc.h opintl.h
iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
- opintl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h $(INCDIR)/libiberty.h \
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+ $(INCDIR)/opcode/cgen.h iq2000-opc.h $(INCDIR)/libiberty.h
m32c-asm.lo: m32c-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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+ $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
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$(INCDIR)/safe-ctype.h
m32c-desc.lo: m32c-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- cgen-types.h cgen-ops.h opintl.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
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+ $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
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m32c-dis.lo: m32c-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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- cgen-types.h cgen-ops.h opintl.h $(INCDIR)/elf/m32c.h \
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$(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
m32c-ibld.lo: m32c-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
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m32c-opc.h cgen-types.h cgen-ops.h opintl.h $(INCDIR)/safe-ctype.h
m32c-opc.lo: m32c-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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- cgen-types.h cgen-ops.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
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m32r-asm.lo: m32r-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
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m32r-desc.lo: m32r-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
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m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
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m32r-ibld.lo: m32r-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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m32r-opc.h opintl.h $(INCDIR)/safe-ctype.h
m32r-opc.lo: m32r-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
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m32r-opinst.lo: m32r-opinst.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
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m68hc11-dis.lo: m68hc11-dis.c $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68hc11.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
m68hc11-opc.lo: m68hc11-opc.c $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68hc11.h
m68k-dis.lo: m68k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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m68k-opc.lo: m68k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/m68k.h
m88k-dis.lo: m88k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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maxq-dis.lo: maxq-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/maxq.h
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mcore-dis.lo: mcore-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h
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mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
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- $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
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mips-opc.lo: mips-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mips.h
mips16-opc.lo: mips16-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mips.h
m10200-dis.lo: m10200-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10200.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
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m10200-opc.lo: m10200-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10200.h
m10300-dis.lo: m10300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10300.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
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m10300-opc.lo: m10300-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/mn10300.h
mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode/mmix.h $(INCDIR)/dis-asm.h \
$(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
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mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
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$(INCDIR)/xregex.h $(INCDIR)/xregex2.h
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- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- ms1-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ms1-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+mt-dis.lo: mt-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ mt-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ mt-opc.h opintl.h
+mt-ibld.lo: mt-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h mt-desc.h \
+ $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ mt-opc.h opintl.h $(INCDIR)/safe-ctype.h
+mt-opc.lo: mt-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h mt-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h mt-opc.h $(INCDIR)/libiberty.h \
+ $(INCDIR)/safe-ctype.h
ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ns32k.h \
- opintl.h
+ $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
+ $(INCDIR)/opcode/ns32k.h opintl.h
openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
- openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
openrisc-desc.lo: openrisc-desc.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h openrisc-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+ openrisc-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h
openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- opintl.h
+ openrisc-opc.h opintl.h
openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- opintl.h $(INCDIR)/safe-ctype.h
-openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ openrisc-opc.h opintl.h $(INCDIR)/safe-ctype.h
+openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h openrisc-opc.h $(INCDIR)/libiberty.h
or32-dis.lo: or32-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/or32.h \
$(INCDIR)/safe-ctype.h
or32-opc.lo: or32-opc.c $(INCDIR)/safe-ctype.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/or32.h
pdp11-dis.lo: pdp11-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/pdp11.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/pdp11.h
pdp11-opc.lo: pdp11-opc.c $(INCDIR)/opcode/pdp11.h
pj-dis.lo: pj-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
pj-opc.lo: pj-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/pj.h
ppc-dis.lo: ppc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/ppc.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/ppc.h
ppc-opc.lo: ppc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/ppc.h opintl.h
s390-mkopc.lo: s390-mkopc.c
s390-opc.lo: s390-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/s390.h \
s390-opc.tab
s390-dis.lo: s390-dis.c $(INCDIR)/ansidecl.h sysdep.h \
- config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/s390.h
+ config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ $(INCDIR)/opcode/s390.h
sh-dis.lo: sh-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- sh-opc.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/dis-asm.h $(BFD_H)
+ sh-opc.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/dis-asm.h
sh64-dis.lo: sh64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
- $(INCDIR)/ansidecl.h sh64-opc.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
- $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf32-sh64.h
+ sh64-opc.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
+ $(BFDDIR)/elf32-sh64.h
sh64-opc.lo: sh64-opc.c sh64-opc.h
sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h \
- $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h opintl.h
+ $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h $(BFD_H) \
+ $(INCDIR)/symcat.h $(INCDIR)/libiberty.h opintl.h
sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h
+ $(INCDIR)/opcode/sparc.h
tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic30.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h
tic4x-dis.lo: tic4x-dis.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic4x.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic4x.h
tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic54x.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \
+ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
tic54x-opc.lo: tic54x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/opcode/tic54x.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h
tic80-dis.lo: tic80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/tic80.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/symcat.h
tic80-opc.lo: tic80-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/tic80.h
v850-dis.lo: v850-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/v850.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
+ $(INCDIR)/symcat.h opintl.h
v850-opc.lo: v850-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/v850.h opintl.h
vax-dis.lo: vax-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/vax.h $(INCDIR)/dis-asm.h $(BFD_H) \
- $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
-w65-dis.lo: w65-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
$(INCDIR)/symcat.h
+w65-dis.lo: w65-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
xstormy16-asm.lo: xstormy16-asm.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
+ xstormy16-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
xstormy16-desc.lo: xstormy16-desc.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+ xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h
xstormy16-dis.lo: xstormy16-dis.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
- $(INCDIR)/ansidecl.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
- $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
- xstormy16-opc.h opintl.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ $(INCDIR)/libiberty.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+ $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h
xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
- $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- opintl.h $(INCDIR)/safe-ctype.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+ xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+ xstormy16-opc.h opintl.h $(INCDIR)/safe-ctype.h
xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \
- $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
+ $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
$(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
- $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ xstormy16-opc.h $(INCDIR)/libiberty.h
+xc16x-asm.lo: xc16x-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+xc16x-desc.lo: xc16x-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+ $(INCDIR)/xregex2.h
+xc16x-dis.lo: xc16x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ xc16x-desc.h $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h
+xc16x-ibld.lo: xc16x-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h \
+ $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h $(INCDIR)/safe-ctype.h
+xc16x-opc.lo: xc16x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen.h \
+ xc16x-opc.h $(INCDIR)/libiberty.h
xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \
- $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
- sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
- $(INCDIR)/symcat.h
+ $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h sysdep.h \
+ config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- z8k-opc.h
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h
z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \
- $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
+ $(INCDIR)/libiberty.h
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
Modified: branches/binutils/package/opcodes/arm-dis.c
===================================================================
--- branches/binutils/package/opcodes/arm-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/arm-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -402,6 +402,8 @@
%t print 't' iff bit 21 set and bit 24 clear
%B print arm BLX(1) destination
%C print the PSR sub type.
+ %U print barrier type.
+ %P print address for pli instruction.
%<bitfield>r print as an ARM register
%<bitfield>d print the bitfield in decimal
@@ -428,6 +430,13 @@
{ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%c%20's\t%12-15r, %16-19r, %0-3r, %8-11r"},
{ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%c%20's\t%12-15r, %16-19r, %0-3r, %8-11r"},
+ /* V7 instructions. */
+ {ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"},
+ {ARM_EXT_V7, 0x0320f0f0, 0x0ffffff0, "dbg%c\t#%0-3d"},
+ {ARM_EXT_V7, 0xf57ff050, 0xfffffff0, "dmb\t%U"},
+ {ARM_EXT_V7, 0xf57ff040, 0xfffffff0, "dsb\t%U"},
+ {ARM_EXT_V7, 0xf57ff060, 0xfffffff0, "isb\t%U"},
+
/* ARM V6T2 instructions. */
{ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15r, %E"},
{ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15r, %0-3r, %E"},
@@ -650,7 +659,7 @@
{ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
- {ARM_EXT_V1, 0x0f000000, 0x0f000000, "swi%c\t%0-23x"},
+ {ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
/* The rest. */
{ARM_EXT_V1, 0x00000000, 0x00000000, "undefined instruction %0-31x"},
@@ -789,7 +798,7 @@
{ARM_EXT_V4T, 0xC000, 0xF800, "stmia\t%8-10r!, %M"},
{ARM_EXT_V4T, 0xC800, 0xF800, "ldmia\t%8-10r!, %M"},
/* format 17 */
- {ARM_EXT_V4T, 0xDF00, 0xFF00, "swi\t%0-7d"},
+ {ARM_EXT_V4T, 0xDF00, 0xFF00, "svc\t%0-7d"},
/* format 16 */
{ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B"},
/* format 18 */
@@ -827,6 +836,8 @@
%B print an unconditional branch offset
%s print the shift field of an SSAT instruction
%R print the rotation field of an SXT instruction
+ %U print barrier type.
+ %P print address for pli instruction.
%<bitfield>d print bitfield in decimal
%<bitfield>W print bitfield*4 in decimal
@@ -847,6 +858,15 @@
makes heavy use of special-case bit patterns. */
static const struct opcode32 thumb32_opcodes[] =
{
+ /* V7 instructions. */
+ {ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli\t%a"},
+ {ARM_EXT_V7, 0xf3af80f0, 0xfffffff0, "dbg\t#%0-3d"},
+ {ARM_EXT_V7, 0xf3bf8f50, 0xfffffff0, "dmb\t%U"},
+ {ARM_EXT_V7, 0xf3bf8f40, 0xfffffff0, "dsb\t%U"},
+ {ARM_EXT_V7, 0xf3bf8f60, 0xfffffff0, "isb\t%U"},
+ {ARM_EXT_DIV, 0xfb90f0f0, 0xfff0f0f0, "sdiv\t%8-11r, %16-19r, %0-3r"},
+ {ARM_EXT_DIV, 0xfbb0f0f0, 0xfff0f0f0, "udiv\t%8-11r, %16-19r, %0-3r"},
+
/* Instructions defined in the basic V6T2 set. */
{ARM_EXT_V6T2, 0xf3af8000, 0xffffffff, "nop.w"},
{ARM_EXT_V6T2, 0xf3af8001, 0xffffffff, "yield.w"},
@@ -861,14 +881,14 @@
{ARM_EXT_V6T2, 0xf3c08f00, 0xfff0ffff, "bxj\t%16-19r"},
{ARM_EXT_V6T2, 0xe810c000, 0xffd0ffff, "rfedb\t%16-19r%21'!"},
{ARM_EXT_V6T2, 0xe990c000, 0xffd0ffff, "rfeia\t%16-19r%21'!"},
- {ARM_EXT_V6T2, 0xf3ef8000, 0xffeff0ff, "mrs\t%8-11r, %20?CSPSR"},
+ {ARM_EXT_V6T2, 0xf3ef8000, 0xffeff000, "mrs\t%8-11r, %D"},
{ARM_EXT_V6T2, 0xf3af8100, 0xffffffe0, "cps\t#%0-4d"},
{ARM_EXT_V6T2, 0xe8d0f000, 0xfff0fff0, "tbb\t[%16-19r, %0-3r]"},
{ARM_EXT_V6T2, 0xe8d0f010, 0xfff0fff0, "tbh\t[%16-19r, %0-3r, lsl #1]"},
{ARM_EXT_V6T2, 0xf3af8500, 0xffffff00, "cpsie\t%7'a%6'i%5'f, #%0-4d"},
{ARM_EXT_V6T2, 0xf3af8700, 0xffffff00, "cpsid\t%7'a%6'i%5'f, #%0-4d"},
{ARM_EXT_V6T2, 0xf3de8f00, 0xffffff00, "subs\tpc, lr, #%0-7d"},
- {ARM_EXT_V6T2, 0xf3808000, 0xffe0f0ff, "msr\t%20?CSPSR_%8'c%9'x%10's%11'f, %16-19r"},
+ {ARM_EXT_V6T2, 0xf3808000, 0xffe0f000, "msr\t%C, %16-19r"},
{ARM_EXT_V6T2, 0xe8500f00, 0xfff00fff, "ldrex\t%12-15r, [%16-19r]"},
{ARM_EXT_V6T2, 0xe8d00f4f, 0xfff00fef, "ldrex%4?hb\t%12-15r, [%16-19r]"},
{ARM_EXT_V6T2, 0xe800c000, 0xffd0ffe0, "srsdb\t#%0-4d%21'!"},
@@ -1602,6 +1622,96 @@
return FALSE;
}
+static void
+print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
+{
+ void *stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
+
+ if (((given & 0x000f0000) == 0x000f0000)
+ && ((given & 0x02000000) == 0))
+ {
+ int offset = given & 0xfff;
+
+ func (stream, "[pc");
+
+ if (given & 0x01000000)
+ {
+ if ((given & 0x00800000) == 0)
+ offset = - offset;
+
+ /* Pre-indexed. */
+ func (stream, ", #%d]", offset);
+
+ offset += pc + 8;
+
+ /* Cope with the possibility of write-back
+ being used. Probably a very dangerous thing
+ for the programmer to do, but who are we to
+ argue ? */
+ if (given & 0x00200000)
+ func (stream, "!");
+ }
+ else
+ {
+ /* Post indexed. */
+ func (stream, "], #%d", offset);
+
+ /* ie ignore the offset. */
+ offset = pc + 8;
+ }
+
+ func (stream, "\t; ");
+ info->print_address_func (offset, info);
+ }
+ else
+ {
+ func (stream, "[%s",
+ arm_regnames[(given >> 16) & 0xf]);
+ if ((given & 0x01000000) != 0)
+ {
+ if ((given & 0x02000000) == 0)
+ {
+ int offset = given & 0xfff;
+ if (offset)
+ func (stream, ", #%s%d",
+ (((given & 0x00800000) == 0)
+ ? "-" : ""), offset);
+ }
+ else
+ {
+ func (stream, ", %s",
+ (((given & 0x00800000) == 0)
+ ? "-" : ""));
+ arm_decode_shift (given, func, stream);
+ }
+
+ func (stream, "]%s",
+ ((given & 0x00200000) != 0) ? "!" : "");
+ }
+ else
+ {
+ if ((given & 0x02000000) == 0)
+ {
+ int offset = given & 0xfff;
+ if (offset)
+ func (stream, "], #%s%d",
+ (((given & 0x00800000) == 0)
+ ? "-" : ""), offset);
+ else
+ func (stream, "]");
+ }
+ else
+ {
+ func (stream, "], %s",
+ (((given & 0x00800000) == 0)
+ ? "-" : ""));
+ arm_decode_shift (given, func, stream);
+ }
+ }
+ }
+}
+
/* Print one ARM instruction from PC on INFO->STREAM. */
static void
@@ -1642,88 +1752,13 @@
break;
case 'a':
- if (((given & 0x000f0000) == 0x000f0000)
- && ((given & 0x02000000) == 0))
- {
- int offset = given & 0xfff;
+ print_arm_address (pc, info, given);
+ break;
- func (stream, "[pc");
-
- if (given & 0x01000000)
- {
- if ((given & 0x00800000) == 0)
- offset = - offset;
-
- /* Pre-indexed. */
- func (stream, ", #%d]", offset);
-
- offset += pc + 8;
-
- /* Cope with the possibility of write-back
- being used. Probably a very dangerous thing
- for the programmer to do, but who are we to
- argue ? */
- if (given & 0x00200000)
- func (stream, "!");
- }
- else
- {
- /* Post indexed. */
- func (stream, "], #%d", offset);
-
- /* ie ignore the offset. */
- offset = pc + 8;
- }
-
- func (stream, "\t; ");
- info->print_address_func (offset, info);
- }
- else
- {
- func (stream, "[%s",
- arm_regnames[(given >> 16) & 0xf]);
- if ((given & 0x01000000) != 0)
- {
- if ((given & 0x02000000) == 0)
- {
- int offset = given & 0xfff;
- if (offset)
- func (stream, ", #%s%d",
- (((given & 0x00800000) == 0)
- ? "-" : ""), offset);
- }
- else
- {
- func (stream, ", %s",
- (((given & 0x00800000) == 0)
- ? "-" : ""));
- arm_decode_shift (given, func, stream);
- }
-
- func (stream, "]%s",
- ((given & 0x00200000) != 0) ? "!" : "");
- }
- else
- {
- if ((given & 0x02000000) == 0)
- {
- int offset = given & 0xfff;
- if (offset)
- func (stream, "], #%s%d",
- (((given & 0x00800000) == 0)
- ? "-" : ""), offset);
- else
- func (stream, "]");
- }
- else
- {
- func (stream, "], %s",
- (((given & 0x00800000) == 0)
- ? "-" : ""));
- arm_decode_shift (given, func, stream);
- }
- }
- }
+ case 'P':
+ /* Set P address bit and use normal address
+ printing routine. */
+ print_arm_address (pc, info, given | (1 << 24));
break;
case 's':
@@ -1913,6 +1948,19 @@
func (stream, "c");
break;
+ case 'U':
+ switch (given & 0xf)
+ {
+ case 0xf: func(stream, "sy"); break;
+ case 0x7: func(stream, "un"); break;
+ case 0xe: func(stream, "st"); break;
+ case 0x6: func(stream, "unst"); break;
+ default:
+ func(stream, "#%d", (int)given & 0xf);
+ break;
+ }
+ break;
+
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
{
@@ -2292,6 +2340,30 @@
abort ();
}
+/* Return the name of an V7M special register. */
+static const char *
+psr_name (int regno)
+{
+ switch (regno)
+ {
+ case 0: return "APSR";
+ case 1: return "IAPSR";
+ case 2: return "EAPSR";
+ case 3: return "PSR";
+ case 5: return "IPSR";
+ case 6: return "EPSR";
+ case 7: return "IEPSR";
+ case 8: return "MSP";
+ case 9: return "PSP";
+ case 16: return "PRIMASK";
+ case 17: return "BASEPRI";
+ case 18: return "BASEPRI_MASK";
+ case 19: return "FAULTMASK";
+ case 20: return "CONTROL";
+ default: return "<unknown>";
+ }
+}
+
/* Print one 32-bit Thumb instruction from PC on INFO->STREAM. */
static void
@@ -2638,6 +2710,45 @@
}
break;
+ case 'U':
+ switch (given & 0xf)
+ {
+ case 0xf: func(stream, "sy"); break;
+ case 0x7: func(stream, "un"); break;
+ case 0xe: func(stream, "st"); break;
+ case 0x6: func(stream, "unst"); break;
+ default:
+ func(stream, "#%d", (int)given & 0xf);
+ break;
+ }
+ break;
+
+ case 'C':
+ if ((given & 0xff) == 0)
+ {
+ func (stream, "%cPSR_", (given & 0x100000) ? 'S' : 'C');
+ if (given & 0x800)
+ func (stream, "f");
+ if (given & 0x400)
+ func (stream, "s");
+ if (given & 0x200)
+ func (stream, "x");
+ if (given & 0x100)
+ func (stream, "c");
+ }
+ else
+ {
+ func (stream, psr_name (given & 0xff));
+ }
+ break;
+
+ case 'D':
+ if ((given & 0xff) == 0)
+ func (stream, "%cPSR", (given & 0x100000) ? 'S' : 'C');
+ else
+ func (stream, psr_name (given & 0xff));
+ break;
+
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
{
Modified: branches/binutils/package/opcodes/avr-dis.c
===================================================================
--- branches/binutils/package/opcodes/avr-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/avr-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -139,7 +139,12 @@
case 'h':
*sym = 1;
*sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
- sprintf (buf, "0x");
+ /* See PR binutils/2545. Ideally we would like to display the hex
+ value of the address only once, but this would mean recoding
+ objdump_print_address() which would affect many targets. */
+ sprintf (buf, "%#lx", * sym_addr);
+ sprintf (comment, "0x");
+
break;
case 'L':
Modified: branches/binutils/package/opcodes/bfin-dis.c
===================================================================
--- branches/binutils/package/opcodes/bfin-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/bfin-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -4034,130 +4034,48 @@
int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask);
- if (HLs == 0 && sop == 0 && sopcde == 0)
+ if (sop == 0 && sopcde == 0)
{
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, ">>>");
+ OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
+ OUTS (outf, " = ");
+ OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1));
+ OUTS (outf, " >>> ");
OUTS (outf, uimm4 (newimmag));
}
- else if (HLs == 1 && sop == 0 && sopcde == 0)
+ else if (sop == 1 && sopcde == 0 && bit8 == 0)
{
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, ">>>");
- OUTS (outf, uimm4 (newimmag));
- }
- else if (HLs == 2 && sop == 0 && sopcde == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, ">>>");
- OUTS (outf, uimm4 (newimmag));
- }
- else if (HLs == 3 && sop == 0 && sopcde == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, ">>>");
- OUTS (outf, uimm4 (newimmag));
- }
- else if (HLs == 0 && sop == 1 && sopcde == 0)
- {
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, "<<");
+ OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
+ OUTS (outf, " = ");
+ OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1));
+ OUTS (outf, " << ");
OUTS (outf, uimm4 (immag));
- OUTS (outf, "(S)");
+ OUTS (outf, " (S)");
}
- else if (HLs == 1 && sop == 1 && sopcde == 0)
+ else if (sop == 1 && sopcde == 0 && bit8 == 1)
{
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, "<<");
- OUTS (outf, uimm4 (immag));
- OUTS (outf, "(S)");
- }
- else if (HLs == 2 && sop == 1 && sopcde == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, "<<");
- OUTS (outf, uimm4 (immag));
- OUTS (outf, "(S)");
- }
- else if (HLs == 3 && sop == 1 && sopcde == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, "<<");
- OUTS (outf, uimm4 (immag));
- OUTS (outf, "(S)");
- }
- else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0)
- {
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, "<<");
- OUTS (outf, uimm4 (immag));
- }
- else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1)
- {
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, ">>");
+ OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
+ OUTS (outf, " = ");
+ OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1));
+ OUTS (outf, " >>> ");
OUTS (outf, uimm4 (newimmag));
+ OUTS (outf, " (S)");
}
- else if (HLs == 1 && sop == 2 && sopcde == 0)
+ else if (sop == 2 && sopcde == 0 && bit8 == 0)
{
- OUTS (outf, dregs_lo (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, ">>");
- OUTS (outf, uimm4 (newimmag));
- }
- else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, ">>");
- OUTS (outf, uimm4 (newimmag));
- }
- else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_lo (src1));
- OUTS (outf, "<<");
+ OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
+ OUTS (outf, " = ");
+ OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1));
+ OUTS (outf, " << ");
OUTS (outf, uimm4 (immag));
}
- else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1)
+ else if (sop == 2 && sopcde == 0 && bit8 == 1)
{
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, ">>");
+ OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
+ OUTS (outf, " = ");
+ OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1));
+ OUTS (outf, " >> ");
OUTS (outf, uimm4 (newimmag));
}
- else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0)
- {
- OUTS (outf, dregs_hi (dst0));
- OUTS (outf, "=");
- OUTS (outf, dregs_hi (src1));
- OUTS (outf, "<<");
- OUTS (outf, uimm4 (immag));
- }
else if (sop == 2 && sopcde == 3 && HLs == 1)
{
OUTS (outf, "A1= ROT A1 BY ");
Modified: branches/binutils/package/opcodes/cgen-ibld.in
===================================================================
--- branches/binutils/package/opcodes/cgen-ibld.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/cgen-ibld.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/configure
===================================================================
--- branches/binutils/package/opcodes/configure 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/configure 2006-04-19 08:33:31 UTC (rev 12)
@@ -3508,6 +3508,7 @@
;;
darwin* | rhapsody*)
+ # this will be overwritten by pass_all, but leave it in just in case
lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
lt_cv_file_magic_cmd='/usr/bin/file -L'
case "$host_os" in
@@ -3518,6 +3519,7 @@
lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
;;
esac
+ lt_cv_deplibs_check_method=pass_all
;;
freebsd* | kfreebsd*-gnu)
@@ -3578,14 +3580,7 @@
# This must be Linux ELF.
linux-gnu*)
- case $host_cpu in
- alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
- lt_cv_deplibs_check_method=pass_all ;;
- *)
- # glibc up to 2.1.1 does not perform some relocations on ARM
- lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;;
- esac
- lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+ lt_cv_deplibs_check_method=pass_all
;;
netbsd* | knetbsd*-gnu)
@@ -3646,6 +3641,67 @@
# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+# find the maximum length of command line arguments
+echo "$as_me:$LINENO: checking the maximum length of command line arguments" >&5
+echo $ECHO_N "checking the maximum length of command line arguments... $ECHO_C" >&6
+if test "${lt_cv_sys_max_cmd_len+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ i=0
+ teststring="ABCD"
+
+ case $build_os in
+ msdosdjgpp*)
+ # On DJGPP, this test can blow up pretty badly due to problems in libc
+ # (any single argument exceeding 2000 bytes causes a buffer overrun
+ # during glob expansion). Even if it were fixed, the result of this
+ # check would be larger than it should be.
+ lt_cv_sys_max_cmd_len=12288; # 12K is about right
+ ;;
+
+ cygwin* | mingw*)
+ # On Win9x/ME, this test blows up -- it succeeds, but takes
+ # about 5 minutes as the teststring grows exponentially.
+ # Worse, since 9x/ME are not pre-emptively multitasking,
+ # you end up with a "frozen" computer, even though with patience
+ # the test eventually succeeds (with a max line length of 256k).
+ # Instead, let's just punt: use the minimum linelength reported by
+ # all of the supported platforms: 8192 (on NT/2K/XP).
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ amigaos*)
+ # On AmigaOS with pdksh, this test takes hours, literally.
+ # So we just punt and use a minimum line length of 8192.
+ lt_cv_sys_max_cmd_len=8192;
+ ;;
+
+ netbsd* | freebsd* | openbsd* | darwin* | dragonfly*)
+ # This has been around since 386BSD, at least. Likely further.
+ if test -x /sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax`
+ elif test -x /usr/sbin/sysctl; then
+ lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax`
+ else
+ lt_cv_sys_max_cmd_len=65536 # usable default for *BSD
+ fi
+ # And add a safety zone
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
+ lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
+ ;;
+ esac
+
+fi
+
+if test -n "$lt_cv_sys_max_cmd_len" ; then
+ echo "$as_me:$LINENO: result: $lt_cv_sys_max_cmd_len" >&5
+echo "${ECHO_T}$lt_cv_sys_max_cmd_len" >&6
+else
+ echo "$as_me:$LINENO: result: none" >&5
+echo "${ECHO_T}none" >&6
+fi
+
+
# Only perform the check for file, if the check method requires it
case $deplibs_check_method in
file_magic*)
@@ -3979,7 +4035,7 @@
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 3982 "configure"' > conftest.$ac_ext
+ echo '#line 4038 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -4034,6 +4090,52 @@
rm -rf conftest*
;;
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+ # Find out which ABI we are using.
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case "`/usr/bin/file conftest.o`" in
+ *32-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_i386"
+ ;;
+ ppc64-*linux*|powerpc64-*linux*)
+ LD="${LD-ld} -m elf32ppclinux"
+ ;;
+ s390x-*linux*)
+ LD="${LD-ld} -m elf_s390"
+ ;;
+ sparc64-*linux*)
+ LD="${LD-ld} -m elf32_sparc"
+ ;;
+ esac
+ ;;
+ *64-bit*)
+ case $host in
+ x86_64-*linux*)
+ LD="${LD-ld} -m elf_x86_64"
+ ;;
+ ppc*-*linux*|powerpc*-*linux*)
+ LD="${LD-ld} -m elf64ppc"
+ ;;
+ s390*-*linux*)
+ LD="${LD-ld} -m elf64_s390"
+ ;;
+ sparc*-*linux*)
+ LD="${LD-ld} -m elf64_sparc"
+ ;;
+ esac
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+
*-*-sco3.2v5*)
# On SCO OpenServer 5, we need -belf to get full-featured binaries.
SAVE_CFLAGS="$CFLAGS"
@@ -5119,7 +5221,7 @@
ac_compiler_gnu=$ac_cv_c_compiler_gnu
-ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl fi vi ga"
+ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl fi vi ga zh_CN"
if test -n "$ac_tool_prefix"; then
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
@@ -8733,7 +8835,7 @@
bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;;
bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
- bfd_ms1_arch) ta="$ta ms1-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
+ bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
@@ -8773,6 +8875,7 @@
bfd_vax_arch) ta="$ta vax-dis.lo" ;;
bfd_w65_arch) ta="$ta w65-dis.lo" ;;
bfd_we32k_arch) ;;
+ bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;;
bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;;
bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;;
bfd_z80_arch) ta="$ta z80-dis.lo" ;;
Modified: branches/binutils/package/opcodes/configure.in
===================================================================
--- branches/binutils/package/opcodes/configure.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/configure.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -60,7 +60,7 @@
AC_PROG_CC
-ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl fi vi ga"
+ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl fi vi ga zh_CN"
CY_GNU_GETTEXT
. ${srcdir}/../bfd/configure.host
@@ -187,7 +187,7 @@
bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;;
bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
- bfd_ms1_arch) ta="$ta mt-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
+ bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
@@ -227,6 +227,7 @@
bfd_vax_arch) ta="$ta vax-dis.lo" ;;
bfd_w65_arch) ta="$ta w65-dis.lo" ;;
bfd_we32k_arch) ;;
+ bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;;
bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;;
bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;;
bfd_z80_arch) ta="$ta z80-dis.lo" ;;
Modified: branches/binutils/package/opcodes/disassemble.c
===================================================================
--- branches/binutils/package/opcodes/disassemble.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/disassemble.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -54,7 +54,7 @@
#define ARCH_mmix
#define ARCH_mn10200
#define ARCH_mn10300
-#define ARCH_ms1
+#define ARCH_mt
#define ARCH_msp430
#define ARCH_ns32k
#define ARCH_openrisc
@@ -74,6 +74,7 @@
#define ARCH_vax
#define ARCH_w65
#define ARCH_xstormy16
+#define ARCH_xc16x
#define ARCH_xtensa
#define ARCH_z80
#define ARCH_z8k
@@ -238,9 +239,9 @@
disassemble = print_insn_maxq_little;
break;
#endif
-#ifdef ARCH_ms1
- case bfd_arch_ms1:
- disassemble = print_insn_ms1;
+#ifdef ARCH_mt
+ case bfd_arch_mt:
+ disassemble = print_insn_mt;
break;
#endif
#ifdef ARCH_msp430
@@ -370,6 +371,11 @@
disassemble = print_insn_xstormy16;
break;
#endif
+#ifdef ARCH_xc16x
+ case bfd_arch_xc16x:
+ disassemble = print_insn_xc16x;
+ break;
+#endif
#ifdef ARCH_xtensa
case bfd_arch_xtensa:
disassemble = print_insn_xtensa;
@@ -442,6 +448,7 @@
#ifdef ARCH_arm
case bfd_arch_arm:
info->symbol_is_valid = arm_symbol_is_valid;
+ info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_ia64
Modified: branches/binutils/package/opcodes/fr30-ibld.c
===================================================================
--- branches/binutils/package/opcodes/fr30-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/fr30-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/frv-ibld.c
===================================================================
--- branches/binutils/package/opcodes/frv-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/frv-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/i386-dis.c
===================================================================
--- branches/binutils/package/opcodes/i386-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/i386-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -101,6 +101,7 @@
static void BadOp (void);
static void SEG_Fixup (int, int);
static void VMX_Fixup (int, int);
+static void REP_Fixup (int, int);
struct dis_private {
/* Points to first byte not fetched. */
@@ -276,7 +277,6 @@
#define eSI OP_IMREG, eSI_reg
#define eDI OP_IMREG, eDI_reg
#define AL OP_IMREG, al_reg
-#define AL OP_IMREG, al_reg
#define CL OP_IMREG, cl_reg
#define DL OP_IMREG, dl_reg
#define BL OP_IMREG, bl_reg
@@ -315,6 +315,15 @@
#define OPSUF OP_3DNowSuffix, 0
#define OPSIMD OP_SIMD_Suffix, 0
+/* Used handle "rep" prefix for string instructions. */
+#define Xbr REP_Fixup, eSI_reg
+#define Xvr REP_Fixup, eSI_reg
+#define Ybr REP_Fixup, eDI_reg
+#define Yvr REP_Fixup, eDI_reg
+#define indirDXr REP_Fixup, indir_dx_reg
+#define ALr REP_Fixup, al_reg
+#define eAXr REP_Fixup, eAX_reg
+
#define cond_jump_flag NULL, cond_jump_mode
#define loop_jcxz_flag NULL, loop_jcxz_mode
@@ -388,6 +397,7 @@
#define USE_GROUPS 2
#define USE_PREFIX_USER_TABLE 3
#define X86_64_SPECIAL 4
+#define IS_3BYTE_OPCODE 5
#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
@@ -453,6 +463,9 @@
#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
+#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0
+#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0
+
typedef void (*op_rtn) (int bytemode, int sizeflag);
struct dis386 {
@@ -491,6 +504,7 @@
'W' => print 'b' or 'w' ("w" or "de" in intel mode)
'X' => print 's', 'd' depending on data16 prefix (for XMM)
'Y' => 'q' if instruction has an REX 64bit overwrite prefix
+ 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
Many of the above letters print nothing in Intel mode. See "putop"
for the details.
@@ -624,10 +638,10 @@
{ "imulS", Gv, Ev, Iv },
{ "pushT", sIb, XX, XX },
{ "imulS", Gv, Ev, sIb },
- { "ins{b||b|}", Yb, indirDX, XX },
- { "ins{R||R|}", Yv, indirDX, XX },
- { "outs{b||b|}", indirDX, Xb, XX },
- { "outs{R||R|}", indirDX, Xv, XX },
+ { "ins{b||b|}", Ybr, indirDX, XX },
+ { "ins{R||R|}", Yvr, indirDX, XX },
+ { "outs{b||b|}", indirDXr, Xb, XX },
+ { "outs{R||R|}", indirDXr, Xv, XX },
/* 70 */
{ "joH", Jb, XX, cond_jump_flag },
{ "jnoH", Jb, XX, cond_jump_flag },
@@ -687,17 +701,17 @@
{ "movS", eAX, Ov, XX },
{ "movB", Ob, AL, XX },
{ "movS", Ov, eAX, XX },
- { "movs{b||b|}", Yb, Xb, XX },
- { "movs{R||R|}", Yv, Xv, XX },
+ { "movs{b||b|}", Ybr, Xb, XX },
+ { "movs{R||R|}", Yvr, Xv, XX },
{ "cmps{b||b|}", Xb, Yb, XX },
{ "cmps{R||R|}", Xv, Yv, XX },
/* a8 */
{ "testB", AL, Ib, XX },
{ "testS", eAX, Iv, XX },
- { "stosB", Yb, AL, XX },
- { "stosS", Yv, eAX, XX },
- { "lodsB", AL, Xb, XX },
- { "lodsS", eAX, Xv, XX },
+ { "stosB", Ybr, AL, XX },
+ { "stosS", Yvr, eAX, XX },
+ { "lodsB", ALr, Xb, XX },
+ { "lodsS", eAXr, Xv, XX },
{ "scasB", AL, Yb, XX },
{ "scasS", eAX, Yv, XX },
/* b0 */
@@ -830,10 +844,10 @@
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
/* 20 */
- { "movL", Rm, Cm, XX },
- { "movL", Rm, Dm, XX },
- { "movL", Cm, Rm, XX },
- { "movL", Dm, Rm, XX },
+ { "movZ", Rm, Cm, XX },
+ { "movZ", Rm, Dm, XX },
+ { "movZ", Cm, Rm, XX },
+ { "movZ", Dm, Rm, XX },
{ "movL", Rd, Td, XX },
{ "(bad)", XX, XX, XX },
{ "movL", Td, Rd, XX },
@@ -857,14 +871,14 @@
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
/* 38 */
+ { THREE_BYTE_0 },
{ "(bad)", XX, XX, XX },
+ { THREE_BYTE_1 },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
/* 40 */
{ "cmovo", Gv, Ev, XX },
{ "cmovno", Gv, Ev, XX },
@@ -1112,7 +1126,7 @@
/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
/* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
/* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
- /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
+ /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
/* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
/* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
/* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
@@ -1135,7 +1149,7 @@
/* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
/* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
/* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
- /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
+ /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
/* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
/* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
/* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
@@ -1748,6 +1762,79 @@
},
};
+static const struct dis386 three_byte_table[][32] = {
+ /* THREE_BYTE_0 */
+ {
+ { "pshufb", MX, EM, XX },
+ { "phaddw", MX, EM, XX },
+ { "phaddd", MX, EM, XX },
+ { "phaddsw", MX, EM, XX },
+ { "pmaddubsw", MX, EM, XX },
+ { "phsubw", MX, EM, XX },
+ { "phsubd", MX, EM, XX },
+ { "phsubsw", MX, EM, XX },
+ { "psignb", MX, EM, XX },
+ { "psignw", MX, EM, XX },
+ { "psignd", MX, EM, XX },
+ { "pmulhrsw", MX, EM, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "pabsb", MX, EM, XX },
+ { "pabsw", MX, EM, XX },
+ { "pabsd", MX, EM, XX },
+ { "(bad)", XX, XX, XX }
+ },
+ /* THREE_BYTE_1 */
+ {
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "palignr", MX, EM, Ib },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX },
+ { "(bad)", XX, XX, XX }
+ },
+};
+
#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
static void
@@ -2205,8 +2292,16 @@
}
}
- if (need_modrm)
+ if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
{
+ FETCH_DATA (info, codep + 2);
+ dp = &three_byte_table[dp->bytemode2][*codep++];
+ mod = (*codep >> 6) & 3;
+ reg = (*codep >> 3) & 7;
+ rm = *codep & 7;
+ }
+ else if (need_modrm)
+ {
FETCH_DATA (info, codep + 1);
mod = (*codep >> 6) & 3;
reg = (*codep >> 3) & 7;
@@ -2856,6 +2951,15 @@
break;
*obufp++ = 'l';
break;
+ case 'Z':
+ if (intel_syntax)
+ break;
+ if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
+ {
+ *obufp++ = 'q';
+ break;
+ }
+ /* Fall through. */
case 'L':
if (intel_syntax)
break;
@@ -4682,3 +4786,76 @@
strcpy (obuf, "vmptrld");
OP_E (bytemode, sizeflag);
}
+
+static void
+REP_Fixup (int bytemode, int sizeflag)
+{
+ /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
+ lods and stos. */
+ size_t ilen = 0;
+
+ if (prefixes & PREFIX_REPZ)
+ switch (*insn_codep)
+ {
+ case 0x6e: /* outsb */
+ case 0x6f: /* outsw/outsl */
+ case 0xa4: /* movsb */
+ case 0xa5: /* movsw/movsl/movsq */
+ if (!intel_syntax)
+ ilen = 5;
+ else
+ ilen = 4;
+ break;
+ case 0xaa: /* stosb */
+ case 0xab: /* stosw/stosl/stosq */
+ case 0xac: /* lodsb */
+ case 0xad: /* lodsw/lodsl/lodsq */
+ if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ ilen = 5;
+ else
+ ilen = 4;
+ break;
+ case 0x6c: /* insb */
+ case 0x6d: /* insl/insw */
+ if (!intel_syntax)
+ ilen = 4;
+ else
+ ilen = 3;
+ break;
+ default:
+ abort ();
+ break;
+ }
+
+ if (ilen != 0)
+ {
+ size_t olen;
+ char *p;
+
+ olen = strlen (obuf);
+ p = obuf + olen - ilen - 1 - 4;
+ /* Handle "repz [addr16|addr32]". */
+ if ((prefixes & PREFIX_ADDR))
+ p -= 1 + 6;
+
+ memmove (p + 3, p + 4, olen - (p + 3 - obuf));
+ }
+
+ switch (bytemode)
+ {
+ case al_reg:
+ case eAX_reg:
+ case indir_dx_reg:
+ OP_IMREG (bytemode, sizeflag);
+ break;
+ case eDI_reg:
+ OP_ESreg (bytemode, sizeflag);
+ break;
+ case eSI_reg:
+ OP_DSreg (bytemode, sizeflag);
+ break;
+ default:
+ abort ();
+ break;
+ }
+}
Modified: branches/binutils/package/opcodes/ia64-asmtab.c
===================================================================
--- branches/binutils/package/opcodes/ia64-asmtab.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-asmtab.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -28,10 +28,11 @@
"sa", "se", "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "sig",
"spill", "spnt", "sptk", "srlz", "ssm", "sss", "st1", "st16", "st2",
"st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1",
- "sxt2", "sxt4", "sync", "tak", "tbit", "thash", "tnat", "tpa", "trunc",
- "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4", "uss",
- "uus", "uuu", "w", "wexit", "wtop", "x", "xchg1", "xchg2", "xchg4",
- "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2", "zxt4",
+ "sxt2", "sxt4", "sync", "tak", "tbit", "tf", "thash", "tnat", "tpa",
+ "trunc", "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4",
+ "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", "x", "xchg1", "xchg2",
+ "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2",
+ "zxt4",
};
static const struct ia64_dependency
@@ -39,8 +40,8 @@
{ "ALAT", 0, 0, 0, -1, NULL, },
{ "AR[BSP]", 26, 0, 2, 17, NULL, },
{ "AR[BSPSTORE]", 26, 0, 2, 18, NULL, },
+ { "AR[CCV]", 26, 0, 2, 32, NULL, },
{ "AR[CFLG]", 26, 0, 2, 27, NULL, },
- { "AR[CCV]", 26, 0, 2, 32, NULL, },
{ "AR[CSD]", 26, 0, 2, 25, NULL, },
{ "AR[EC]", 26, 0, 2, 66, NULL, },
{ "AR[EFLAG]", 26, 0, 2, 24, NULL, },
@@ -81,7 +82,7 @@
{ "CPUID#", 7, 0, 5, -1, NULL, },
{ "CR[CMCV]", 27, 0, 3, 74, NULL, },
{ "CR[DCR]", 27, 0, 3, 0, NULL, },
- { "CR[EOI]", 27, 0, 7, 67, "SC Section 10.8.3.4", },
+ { "CR[EOI]", 27, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
{ "CR[GPTA]", 27, 0, 3, 9, NULL, },
{ "CR[IFA]", 27, 0, 1, 20, NULL, },
{ "CR[IFA]", 27, 0, 3, 20, NULL, },
@@ -102,13 +103,14 @@
{ "CR[ITM]", 27, 0, 3, 1, NULL, },
{ "CR[ITV]", 27, 0, 3, 72, NULL, },
{ "CR[IVA]", 27, 0, 4, 2, NULL, },
- { "CR[IVR]", 27, 0, 7, 65, "SC Section 10.8.3.2", },
- { "CR[LID]", 27, 0, 7, 64, "SC Section 10.8.3.1", },
+ { "CR[IVR]", 27, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", },
+ { "CR[LID]", 27, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", },
{ "CR[LRR%], % in 0 - 1", 9, 0, 3, -1, NULL, },
{ "CR[PMV]", 27, 0, 3, 73, NULL, },
{ "CR[PTA]", 27, 0, 3, 8, NULL, },
{ "CR[TPR]", 27, 0, 3, 66, NULL, },
- { "CR[TPR]", 27, 0, 7, 66, "SC Section 10.8.3.3", },
+ { "CR[TPR]", 27, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", },
+ { "CR[TPR]", 27, 0, 1, 66, NULL, },
{ "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 0, 0, -1, NULL, },
{ "DBR#", 11, 0, 2, -1, NULL, },
{ "DBR#", 11, 0, 3, -1, NULL, },
@@ -151,7 +153,7 @@
{ "PKR#", 19, 0, 2, -1, NULL, },
{ "PKR#", 19, 0, 2, -1, NULL, },
{ "PMC#", 20, 0, 2, -1, NULL, },
- { "PMC#", 20, 0, 7, -1, "SC+3 Section 12.1.1", },
+ { "PMC#", 20, 0, 7, -1, "SC Section 7.2.1, \"Generic Performance Counter Registers\" for PMC[0].fr on page 2:150", },
{ "PMD#", 21, 0, 2, -1, NULL, },
{ "PR0", 0, 0, 0, -1, NULL, },
{ "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, },
@@ -166,54 +168,67 @@
{ "PSR.ac", 28, 0, 1, 3, NULL, },
{ "PSR.ac", 28, 0, 3, 3, NULL, },
{ "PSR.ac", 28, 0, 2, 3, NULL, },
+ { "PSR.ac", 28, 0, 2, 3, NULL, },
{ "PSR.be", 28, 0, 1, 1, NULL, },
{ "PSR.be", 28, 0, 3, 1, NULL, },
{ "PSR.be", 28, 0, 2, 1, NULL, },
+ { "PSR.be", 28, 0, 2, 1, NULL, },
{ "PSR.bn", 28, 0, 2, 44, NULL, },
{ "PSR.cpl", 28, 0, 1, 32, NULL, },
- { "PSR.da", 28, 0, 3, 38, NULL, },
+ { "PSR.cpl", 28, 0, 2, 32, NULL, },
+ { "PSR.da", 28, 0, 2, 38, NULL, },
{ "PSR.db", 28, 0, 3, 24, NULL, },
{ "PSR.db", 28, 0, 2, 24, NULL, },
- { "PSR.db", 28, 0, 3, 24, NULL, },
- { "PSR.dd", 28, 0, 3, 39, NULL, },
+ { "PSR.db", 28, 0, 2, 24, NULL, },
+ { "PSR.dd", 28, 0, 2, 39, NULL, },
{ "PSR.dfh", 28, 0, 3, 19, NULL, },
{ "PSR.dfh", 28, 0, 2, 19, NULL, },
+ { "PSR.dfh", 28, 0, 2, 19, NULL, },
{ "PSR.dfl", 28, 0, 3, 18, NULL, },
{ "PSR.dfl", 28, 0, 2, 18, NULL, },
+ { "PSR.dfl", 28, 0, 2, 18, NULL, },
{ "PSR.di", 28, 0, 3, 22, NULL, },
{ "PSR.di", 28, 0, 2, 22, NULL, },
+ { "PSR.di", 28, 0, 2, 22, NULL, },
{ "PSR.dt", 28, 0, 3, 17, NULL, },
{ "PSR.dt", 28, 0, 2, 17, NULL, },
- { "PSR.ed", 28, 0, 3, 43, NULL, },
+ { "PSR.dt", 28, 0, 2, 17, NULL, },
+ { "PSR.ed", 28, 0, 2, 43, NULL, },
{ "PSR.i", 28, 0, 2, 14, NULL, },
- { "PSR.i", 28, 0, 3, 14, NULL, },
{ "PSR.ia", 28, 0, 0, 14, NULL, },
{ "PSR.ic", 28, 0, 2, 13, NULL, },
{ "PSR.ic", 28, 0, 3, 13, NULL, },
+ { "PSR.ic", 28, 0, 2, 13, NULL, },
{ "PSR.id", 28, 0, 0, 14, NULL, },
{ "PSR.is", 28, 0, 0, 14, NULL, },
- { "PSR.it", 28, 0, 3, 14, NULL, },
+ { "PSR.it", 28, 0, 2, 14, NULL, },
{ "PSR.lp", 28, 0, 2, 25, NULL, },
{ "PSR.lp", 28, 0, 3, 25, NULL, },
- { "PSR.lp", 28, 0, 3, 25, NULL, },
- { "PSR.mc", 28, 0, 0, 35, NULL, },
+ { "PSR.lp", 28, 0, 2, 25, NULL, },
+ { "PSR.mc", 28, 0, 2, 35, NULL, },
{ "PSR.mfh", 28, 0, 2, 5, NULL, },
{ "PSR.mfl", 28, 0, 2, 4, NULL, },
{ "PSR.pk", 28, 0, 3, 15, NULL, },
{ "PSR.pk", 28, 0, 2, 15, NULL, },
+ { "PSR.pk", 28, 0, 2, 15, NULL, },
{ "PSR.pp", 28, 0, 2, 21, NULL, },
{ "PSR.ri", 28, 0, 0, 41, NULL, },
{ "PSR.rt", 28, 0, 2, 27, NULL, },
{ "PSR.rt", 28, 0, 3, 27, NULL, },
- { "PSR.rt", 28, 0, 3, 27, NULL, },
+ { "PSR.rt", 28, 0, 2, 27, NULL, },
{ "PSR.si", 28, 0, 2, 23, NULL, },
{ "PSR.si", 28, 0, 3, 23, NULL, },
+ { "PSR.si", 28, 0, 2, 23, NULL, },
{ "PSR.sp", 28, 0, 2, 20, NULL, },
{ "PSR.sp", 28, 0, 3, 20, NULL, },
- { "PSR.ss", 28, 0, 3, 40, NULL, },
+ { "PSR.sp", 28, 0, 2, 20, NULL, },
+ { "PSR.ss", 28, 0, 2, 40, NULL, },
{ "PSR.tb", 28, 0, 3, 26, NULL, },
{ "PSR.tb", 28, 0, 2, 26, NULL, },
+ { "PSR.tb", 28, 0, 2, 26, NULL, },
{ "PSR.up", 28, 0, 2, 2, NULL, },
+ { "PSR.vm", 28, 0, 1, 46, NULL, },
+ { "PSR.vm", 28, 0, 2, 46, NULL, },
{ "RR#", 25, 0, 3, -1, NULL, },
{ "RR#", 25, 0, 2, -1, NULL, },
{ "RSE", 29, 0, 2, -1, NULL, },
@@ -255,6 +270,7 @@
{ "AR[PFS]", 26, 1, 2, 64, NULL, },
{ "AR[RNAT]", 26, 1, 2, 19, NULL, },
{ "AR[RSC]", 26, 1, 2, 16, NULL, },
+ { "AR[SSD]", 26, 1, 2, 26, NULL, },
{ "AR[UNAT]{%}, % in 0 - 63", 2, 1, 2, -1, NULL, },
{ "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 1, 0, -1, NULL, },
{ "AR%, % in 48 - 63, 112-127", 4, 1, 2, -1, NULL, },
@@ -266,7 +282,7 @@
{ "CPUID#", 7, 1, 0, -1, NULL, },
{ "CR[CMCV]", 27, 1, 2, 74, NULL, },
{ "CR[DCR]", 27, 1, 2, 0, NULL, },
- { "CR[EOI]", 27, 1, 7, 67, "SC Section 10.8.3.4", },
+ { "CR[EOI]", 27, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
{ "CR[GPTA]", 27, 1, 2, 9, NULL, },
{ "CR[IFA]", 27, 1, 2, 20, NULL, },
{ "CR[IFS]", 27, 1, 2, 23, NULL, },
@@ -365,1277 +381,1366 @@
{ "PSR.ss", 28, 1, 2, 40, NULL, },
{ "PSR.tb", 28, 1, 2, 26, NULL, },
{ "PSR.up", 28, 1, 2, 2, NULL, },
+ { "PSR.vm", 28, 1, 2, 46, NULL, },
{ "RR#", 25, 1, 2, -1, NULL, },
{ "RSE", 29, 1, 2, -1, NULL, },
{ "PR63", 24, 2, 6, -1, NULL, },
};
static const unsigned short dep0[] = {
- 96, 267, 2139, 2312,
+ 97, 282, 2140, 2327,
};
static const unsigned short dep1[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312, 4135,
- 20613,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2327, 4135, 20616,
};
static const unsigned short dep2[] = {
- 96, 267, 2165, 2166, 2168, 2169, 2171, 2172, 2174, 2329, 2332, 2333, 2336,
- 2337, 2340, 2341,
+ 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2347, 2348, 2351,
+ 2352, 2355, 2356,
};
static const unsigned short dep3[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 20616,
};
static const unsigned short dep4[] = {
- 96, 267, 22645, 22646, 22648, 22649, 22651, 22652, 22654, 22809, 22812, 22813,
- 22816, 22817, 22820, 22821,
+ 97, 282, 22646, 22647, 22649, 22650, 22652, 22653, 22655, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep5[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
- 22809, 22812, 22813, 22816, 22817, 22820, 22821,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 4135, 20616, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep6[] = {
- 96, 267, 2165, 2166, 2168, 2169, 2171, 2172, 2174, 2329, 2330, 2332, 2334,
- 2336, 2338, 2340,
+ 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2347, 2349,
+ 2351, 2353, 2355,
};
static const unsigned short dep7[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2329, 2330,
- 2333, 2334, 2337, 2338, 2341, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2344, 2345, 2348, 2349, 2352, 2353, 2356, 4135, 20616,
};
static const unsigned short dep8[] = {
- 96, 267, 2165, 2166, 2168, 2169, 2171, 2172, 2174, 2329, 2331, 2333, 2335,
- 2337, 2339, 2341,
+ 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2346, 2348, 2350,
+ 2352, 2354, 2356,
};
static const unsigned short dep9[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2329, 2331,
- 2332, 2335, 2336, 2339, 2340, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2344, 2346, 2347, 2350, 2351, 2354, 2355, 4135, 20616,
};
static const unsigned short dep10[] = {
- 96, 267, 2165, 2166, 2168, 2169, 2171, 2172, 2174, 2329, 2330, 2331, 2332,
- 2333, 2334, 2335, 2336, 2337, 2338, 2339, 2340, 2341,
+ 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2346, 2347,
+ 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356,
};
static const unsigned short dep11[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2329, 2330,
- 2331, 2332, 2333, 2334, 2335, 2336, 2337, 2338, 2339, 2340, 2341, 4135, 20613,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2344, 2345, 2346, 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356,
+ 4135, 20616,
};
static const unsigned short dep12[] = {
- 96, 267, 2379,
+ 97, 282, 2395,
};
static const unsigned short dep13[] = {
- 40, 41, 96, 156, 174, 175, 267, 2082, 2083, 2165, 2167, 2168, 2170, 2171,
- 2173, 2174, 4135,
+ 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2082, 2083, 2166, 2168,
+ 2169, 2171, 2172, 2174, 2175, 4135,
};
static const unsigned short dep14[] = {
- 96, 155, 267, 310, 2379, 28852, 29002,
+ 97, 163, 282, 325, 2395, 28866, 29018,
};
static const unsigned short dep15[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
- 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 40, 41, 96, 144, 156, 174, 175,
- 267, 310, 2082, 2083, 2165, 2167, 2168, 2170, 2171, 2173, 2174, 4135, 28852,
- 29002,
+ 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 40, 41, 97, 150, 152, 158, 162,
+ 164, 175, 185, 186, 188, 282, 325, 2082, 2083, 2166, 2168, 2169, 2171, 2172,
+ 2174, 2175, 4135, 28866, 29018,
};
static const unsigned short dep16[] = {
- 1, 6, 40, 96, 134, 182, 187, 226, 267, 297, 2379, 28852, 29002,
+ 1, 6, 40, 97, 137, 196, 201, 241, 282, 312, 2395, 28866, 29018,
};
static const unsigned short dep17[] = {
- 1, 25, 27, 38, 40, 41, 96, 156, 158, 159, 174, 175, 182, 187, 226, 267, 297,
- 2082, 2083, 2165, 2167, 2168, 2170, 2171, 2173, 2174, 4135, 28852, 29002,
-
+ 1, 25, 27, 38, 40, 41, 97, 158, 162, 164, 166, 167, 175, 185, 186, 188, 196,
+ 201, 241, 282, 312, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175,
+ 4135, 28866, 29018,
};
static const unsigned short dep18[] = {
- 1, 40, 51, 96, 182, 226, 233, 267, 28852, 29002,
+ 1, 40, 51, 97, 196, 241, 248, 282, 28866, 29018,
};
static const unsigned short dep19[] = {
- 1, 38, 40, 41, 96, 153, 174, 182, 226, 233, 267, 4135, 28852, 29002,
+ 1, 38, 40, 41, 97, 158, 160, 161, 162, 175, 185, 190, 191, 196, 241, 248,
+ 282, 4135, 28866, 29018,
};
static const unsigned short dep20[] = {
- 40, 96, 226, 267,
+ 40, 97, 241, 282,
};
static const unsigned short dep21[] = {
- 96, 174, 226, 267,
+ 97, 158, 162, 175, 185, 241, 282,
};
static const unsigned short dep22[] = {
- 1, 40, 96, 128, 129, 131, 132, 133, 134, 135, 138, 139, 140, 141, 142, 143,
- 144, 145, 146, 147, 148, 150, 151, 152, 153, 154, 155, 156, 159, 160, 161,
- 162, 163, 164, 165, 166, 169, 170, 171, 172, 173, 174, 175, 176, 177, 182,
- 226, 267, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306,
- 307, 308, 309, 310, 311, 312, 313, 315, 316, 318, 319, 320, 321, 322, 323,
- 324, 325, 326, 327, 328, 28852, 29002,
+ 1, 40, 97, 131, 135, 136, 138, 139, 142, 143, 146, 149, 152, 155, 156, 157,
+ 158, 161, 162, 163, 164, 167, 168, 169, 170, 173, 174, 175, 178, 181, 184,
+ 185, 188, 189, 191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316,
+ 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333,
+ 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 28866, 29018,
};
static const unsigned short dep23[] = {
- 1, 38, 40, 41, 50, 51, 55, 58, 72, 96, 134, 174, 182, 226, 267, 294, 295,
- 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310,
- 311, 312, 313, 315, 316, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327,
- 328, 4135, 28852, 29002,
+ 1, 38, 40, 41, 50, 51, 55, 58, 73, 97, 137, 138, 158, 162, 175, 185, 190,
+ 191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319,
+ 320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333, 334, 335, 336,
+ 337, 338, 339, 340, 341, 342, 343, 344, 4135, 28866, 29018,
};
static const unsigned short dep24[] = {
- 96, 133, 267, 296,
+ 97, 136, 282, 311,
};
static const unsigned short dep25[] = {
- 96, 134, 174, 267, 296,
+ 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 311,
};
static const unsigned short dep26[] = {
- 96, 134, 267, 297,
+ 97, 137, 282, 312,
};
static const unsigned short dep27[] = {
- 25, 26, 96, 97, 100, 104, 107, 134, 156, 174, 267, 297,
+ 25, 26, 97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 312,
+
};
static const unsigned short dep28[] = {
- 40, 41, 96, 174, 267, 2165, 2167, 2168, 2170, 2171, 2173, 2174, 4135,
+ 97, 190, 282, 344,
};
static const unsigned short dep29[] = {
- 1, 25, 40, 96, 182, 214, 215, 226, 267, 2082, 2270, 2273, 2379, 28852, 29002,
-
+ 97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 344,
};
static const unsigned short dep30[] = {
- 1, 6, 38, 40, 41, 96, 134, 156, 174, 175, 182, 214, 216, 226, 267, 2082, 2083,
- 2165, 2167, 2168, 2170, 2171, 2173, 2174, 2271, 2273, 4135, 28852, 29002,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175,
+ 4135,
};
static const unsigned short dep31[] = {
- 96, 267,
+ 1, 25, 40, 97, 196, 228, 229, 241, 282, 2082, 2285, 2288, 2395, 28866, 29018,
+
};
static const unsigned short dep32[] = {
- 96, 174, 267, 2082, 2084,
+ 1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228,
+ 230, 241, 282, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286,
+ 2288, 4135, 28866, 29018,
};
static const unsigned short dep33[] = {
- 40, 41, 96, 156, 174, 175, 267, 2165, 2167, 2168, 2170, 2171, 2173, 2174,
- 4135,
+ 97, 282,
};
static const unsigned short dep34[] = {
- 6, 37, 38, 39, 96, 124, 125, 187, 226, 267, 292, 293, 2379,
+ 97, 158, 162, 175, 185, 282, 2082, 2084,
};
static const unsigned short dep35[] = {
- 6, 37, 40, 41, 96, 156, 174, 175, 187, 226, 267, 292, 293, 331, 2165, 2167,
- 2168, 2170, 2171, 2173, 2174, 4135,
+ 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2168, 2169, 2171,
+ 2172, 2174, 2175, 4135,
};
static const unsigned short dep36[] = {
- 24, 96, 213, 267, 2379,
+ 6, 37, 38, 39, 97, 125, 126, 201, 241, 282, 307, 308, 2395,
};
static const unsigned short dep37[] = {
- 24, 40, 41, 96, 156, 174, 175, 213, 267, 2165, 2167, 2168, 2170, 2171, 2173,
- 2174, 4135,
+ 6, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 241, 282, 307,
+ 308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135,
};
static const unsigned short dep38[] = {
- 6, 24, 37, 38, 39, 96, 124, 125, 187, 213, 226, 267, 292, 293, 2379,
+ 24, 97, 227, 282, 2395,
};
static const unsigned short dep39[] = {
- 6, 24, 37, 40, 41, 96, 156, 174, 175, 187, 213, 226, 267, 292, 293, 331, 2165,
- 2167, 2168, 2170, 2171, 2173, 2174, 4135,
+ 24, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 227, 282, 2166, 2168, 2169,
+ 2171, 2172, 2174, 2175, 4135,
};
static const unsigned short dep40[] = {
- 1, 6, 38, 40, 41, 96, 134, 156, 174, 175, 182, 214, 216, 226, 267, 2165, 2167,
- 2168, 2170, 2171, 2173, 2174, 2271, 2273, 4135, 28852, 29002,
+ 6, 24, 37, 38, 39, 97, 125, 126, 201, 227, 241, 282, 307, 308, 2395,
};
static const unsigned short dep41[] = {
- 96, 174, 267,
+ 6, 24, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 227, 241, 282,
+ 307, 308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135,
};
static const unsigned short dep42[] = {
- 15, 96, 196, 197, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
- 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813, 22816,
- 22817, 22820, 22821,
+ 1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228,
+ 230, 241, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286, 2288, 4135,
+ 28866, 29018,
};
static const unsigned short dep43[] = {
- 11, 19, 20, 40, 41, 96, 174, 196, 198, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 22809, 22812,
- 22813, 22816, 22817, 22820, 22821,
+ 97, 158, 162, 175, 185, 282,
};
static const unsigned short dep44[] = {
- 15, 16, 17, 18, 96, 196, 197, 199, 200, 202, 203, 205, 206, 267, 2135, 2310,
- 18593, 18594, 18746, 18747, 18749, 18750, 22645, 22646, 22647, 22649, 22650,
- 22652, 22653, 22809, 22812, 22813, 22816, 22817, 22820, 22821,
+ 15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+ 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
+ 22832, 22835, 22836,
};
static const unsigned short dep45[] = {
- 11, 12, 13, 14, 19, 20, 40, 41, 96, 174, 196, 198, 199, 201, 202, 204, 205,
- 207, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2310, 4135, 16524, 16526,
- 18746, 18748, 18749, 18751, 22809, 22812, 22813, 22816, 22817, 22820, 22821,
-
+ 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep46[] = {
- 16, 96, 199, 200, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
- 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813, 22816,
- 22817, 22820, 22821,
+ 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325,
+ 18601, 18602, 18761, 18762, 18764, 18765, 22646, 22647, 22648, 22650, 22651,
+ 22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep47[] = {
- 12, 19, 20, 40, 41, 96, 174, 199, 201, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 22809, 22812,
- 22813, 22816, 22817, 22820, 22821,
+ 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
+ 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135,
+ 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep48[] = {
- 17, 96, 202, 203, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
- 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813, 22816,
- 22817, 22820, 22821,
+ 16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+ 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
+ 22832, 22835, 22836,
};
static const unsigned short dep49[] = {
- 13, 19, 20, 40, 41, 96, 174, 202, 204, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 22809, 22812,
- 22813, 22816, 22817, 22820, 22821,
+ 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep50[] = {
- 18, 96, 205, 206, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
- 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813, 22816,
- 22817, 22820, 22821,
+ 17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+ 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
+ 22832, 22835, 22836,
};
static const unsigned short dep51[] = {
- 14, 19, 20, 40, 41, 96, 174, 205, 207, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 22809, 22812,
- 22813, 22816, 22817, 22820, 22821,
+ 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep52[] = {
- 15, 96, 196, 197, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
-
+ 18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+ 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831,
+ 22832, 22835, 22836,
};
static const unsigned short dep53[] = {
- 11, 19, 20, 40, 41, 96, 174, 196, 198, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751,
+ 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep54[] = {
- 15, 16, 17, 18, 96, 196, 197, 199, 200, 202, 203, 205, 206, 267, 2135, 2310,
- 18593, 18594, 18746, 18747, 18749, 18750,
+ 15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+
};
static const unsigned short dep55[] = {
- 11, 12, 13, 14, 19, 20, 40, 41, 96, 174, 196, 198, 199, 201, 202, 204, 205,
- 207, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2310, 4135, 16524, 16526,
- 18746, 18748, 18749, 18751,
+ 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766,
};
static const unsigned short dep56[] = {
- 16, 96, 199, 200, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
-
+ 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325,
+ 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep57[] = {
- 12, 19, 20, 40, 41, 96, 174, 199, 201, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751,
+ 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
+ 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135,
+ 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
};
static const unsigned short dep58[] = {
- 17, 96, 202, 203, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
+ 16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep59[] = {
- 13, 19, 20, 40, 41, 96, 174, 202, 204, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751,
+ 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766,
};
static const unsigned short dep60[] = {
- 18, 96, 205, 206, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
+ 17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep61[] = {
- 14, 19, 20, 40, 41, 96, 174, 205, 207, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751,
+ 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766,
};
static const unsigned short dep62[] = {
- 96, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
+ 18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
+
};
static const unsigned short dep63[] = {
- 40, 41, 96, 174, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2310, 4135,
- 16524, 16526, 18746, 18748, 18749, 18751,
+ 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763,
+ 18764, 18766,
};
static const unsigned short dep64[] = {
- 11, 96, 192, 267,
+ 97, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep65[] = {
- 11, 40, 41, 96, 174, 192, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
+ 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
};
static const unsigned short dep66[] = {
- 11, 40, 41, 96, 174, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 97, 206, 282,
};
static const unsigned short dep67[] = {
- 12, 96, 193, 267,
+ 11, 40, 41, 97, 158, 162, 175, 185, 206, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep68[] = {
- 11, 40, 41, 96, 174, 193, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135,
};
static const unsigned short dep69[] = {
- 13, 96, 194, 267,
+ 12, 97, 207, 282,
};
static const unsigned short dep70[] = {
- 11, 40, 41, 96, 174, 194, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 40, 41, 97, 158, 162, 175, 185, 207, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep71[] = {
- 14, 96, 195, 267,
+ 13, 97, 208, 282,
};
static const unsigned short dep72[] = {
- 11, 40, 41, 96, 174, 195, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 40, 41, 97, 158, 162, 175, 185, 208, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep73[] = {
- 15, 96, 197, 198, 267,
+ 14, 97, 209, 282,
};
static const unsigned short dep74[] = {
- 40, 41, 96, 174, 197, 198, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 40, 41, 97, 158, 162, 175, 185, 209, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep75[] = {
- 40, 41, 96, 174, 267, 2165, 2166, 2169, 2172, 4135,
+ 15, 97, 211, 212, 282,
};
static const unsigned short dep76[] = {
- 16, 96, 200, 201, 267,
+ 40, 41, 97, 158, 162, 175, 185, 211, 212, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep77[] = {
- 40, 41, 96, 174, 200, 201, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135,
};
static const unsigned short dep78[] = {
- 17, 96, 203, 204, 267,
+ 16, 97, 214, 215, 282,
};
static const unsigned short dep79[] = {
- 40, 41, 96, 174, 203, 204, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 214, 215, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep80[] = {
- 18, 96, 206, 207, 267,
+ 17, 97, 217, 218, 282,
};
static const unsigned short dep81[] = {
- 40, 41, 96, 174, 206, 207, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 217, 218, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep82[] = {
- 15, 19, 20, 40, 41, 96, 156, 174, 175, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 18, 97, 220, 221, 282,
};
static const unsigned short dep83[] = {
- 15, 16, 19, 20, 40, 41, 96, 156, 174, 175, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 220, 221, 282, 2166, 2167, 2170, 2173, 4135,
};
static const unsigned short dep84[] = {
- 15, 17, 19, 20, 40, 41, 96, 156, 174, 175, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 15, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167,
+ 2170, 2173, 4135,
};
static const unsigned short dep85[] = {
- 15, 18, 19, 20, 40, 41, 96, 156, 174, 175, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 15, 16, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
+ 2167, 2170, 2173, 4135,
};
static const unsigned short dep86[] = {
- 15, 96, 196, 197, 267,
+ 15, 17, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
+ 2167, 2170, 2173, 4135,
};
static const unsigned short dep87[] = {
- 11, 19, 20, 40, 41, 96, 174, 196, 198, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 15, 18, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166,
+ 2167, 2170, 2173, 4135,
};
static const unsigned short dep88[] = {
- 15, 16, 17, 18, 96, 196, 197, 199, 200, 202, 203, 205, 206, 267,
+ 15, 97, 210, 211, 282,
};
static const unsigned short dep89[] = {
- 11, 12, 13, 14, 19, 20, 40, 41, 96, 174, 196, 198, 199, 201, 202, 204, 205,
- 207, 267, 2165, 2166, 2169, 2172, 4135,
+ 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2166, 2167, 2170,
+ 2173, 4135,
};
static const unsigned short dep90[] = {
- 16, 96, 199, 200, 267,
+ 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282,
};
static const unsigned short dep91[] = {
- 12, 19, 20, 40, 41, 96, 174, 199, 201, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
+ 216, 218, 219, 221, 282, 2166, 2167, 2170, 2173, 4135,
};
static const unsigned short dep92[] = {
- 17, 96, 202, 203, 267,
+ 16, 97, 213, 214, 282,
};
static const unsigned short dep93[] = {
- 13, 19, 20, 40, 41, 96, 174, 202, 204, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2166, 2167, 2170,
+ 2173, 4135,
};
static const unsigned short dep94[] = {
- 18, 96, 205, 206, 267,
+ 17, 97, 216, 217, 282,
};
static const unsigned short dep95[] = {
- 14, 19, 20, 40, 41, 96, 174, 205, 207, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2166, 2167, 2170,
+ 2173, 4135,
};
static const unsigned short dep96[] = {
- 15, 96, 196, 197, 267, 2165, 2166, 2167, 2169, 2170, 2172, 2173, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341,
+ 18, 97, 219, 220, 282,
};
static const unsigned short dep97[] = {
- 11, 19, 20, 40, 41, 96, 174, 196, 198, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2329, 2332, 2333, 2336, 2337, 2340, 2341, 4135, 16524, 16526,
-
+ 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2166, 2167, 2170,
+ 2173, 4135,
};
static const unsigned short dep98[] = {
- 15, 16, 17, 18, 96, 196, 197, 199, 200, 202, 203, 205, 206, 267, 2165, 2166,
- 2167, 2169, 2170, 2172, 2173, 2329, 2332, 2333, 2336, 2337, 2340, 2341,
+ 15, 97, 210, 211, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
+ 2348, 2351, 2352, 2355, 2356,
};
static const unsigned short dep99[] = {
- 11, 12, 13, 14, 19, 20, 40, 41, 96, 174, 196, 198, 199, 201, 202, 204, 205,
- 207, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2329, 2332, 2333, 2336,
- 2337, 2340, 2341, 4135, 16524, 16526,
+ 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
+ 16530, 16531, 16533,
};
static const unsigned short dep100[] = {
- 16, 96, 199, 200, 267, 2165, 2166, 2167, 2169, 2170, 2172, 2173, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341,
+ 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2166, 2167,
+ 2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351, 2352, 2355, 2356,
};
static const unsigned short dep101[] = {
- 12, 19, 20, 40, 41, 96, 174, 199, 201, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2329, 2332, 2333, 2336, 2337, 2340, 2341, 4135, 16524, 16526,
-
+ 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
+ 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2344, 2347,
+ 2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533,
};
static const unsigned short dep102[] = {
- 17, 96, 202, 203, 267, 2165, 2166, 2167, 2169, 2170, 2172, 2173, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341,
+ 16, 97, 213, 214, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
+ 2348, 2351, 2352, 2355, 2356,
};
static const unsigned short dep103[] = {
- 13, 19, 20, 40, 41, 96, 174, 202, 204, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2329, 2332, 2333, 2336, 2337, 2340, 2341, 4135, 16524, 16526,
-
+ 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
+ 16530, 16531, 16533,
};
static const unsigned short dep104[] = {
- 18, 96, 205, 206, 267, 2165, 2166, 2167, 2169, 2170, 2172, 2173, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341,
+ 17, 97, 216, 217, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
+ 2348, 2351, 2352, 2355, 2356,
};
static const unsigned short dep105[] = {
- 14, 19, 20, 40, 41, 96, 174, 205, 207, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 2329, 2332, 2333, 2336, 2337, 2340, 2341, 4135, 16524, 16526,
-
+ 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
+ 16530, 16531, 16533,
};
static const unsigned short dep106[] = {
- 15, 96, 196, 197, 267, 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809,
- 22812, 22813, 22816, 22817, 22820, 22821,
+ 18, 97, 219, 220, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347,
+ 2348, 2351, 2352, 2355, 2356,
};
static const unsigned short dep107[] = {
- 11, 19, 20, 40, 41, 96, 174, 196, 198, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 4135, 16524, 16526, 22809, 22812, 22813, 22816, 22817, 22820,
- 22821,
+ 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528,
+ 16530, 16531, 16533,
};
static const unsigned short dep108[] = {
- 15, 16, 17, 18, 96, 196, 197, 199, 200, 202, 203, 205, 206, 267, 22645, 22646,
- 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813, 22816, 22817, 22820,
- 22821,
+ 15, 97, 210, 211, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
+ 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep109[] = {
- 11, 12, 13, 14, 19, 20, 40, 41, 96, 174, 196, 198, 199, 201, 202, 204, 205,
- 207, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 4135, 16524, 16526, 22809,
- 22812, 22813, 22816, 22817, 22820, 22821,
+ 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep110[] = {
- 16, 96, 199, 200, 267, 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809,
- 22812, 22813, 22816, 22817, 22820, 22821,
+ 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 22646, 22647,
+ 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835,
+ 22836,
};
static const unsigned short dep111[] = {
- 12, 19, 20, 40, 41, 96, 174, 199, 201, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 4135, 16524, 16526, 22809, 22812, 22813, 22816, 22817, 22820,
- 22821,
+ 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215,
+ 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 4135, 16528,
+ 16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep112[] = {
- 17, 96, 202, 203, 267, 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809,
- 22812, 22813, 22816, 22817, 22820, 22821,
+ 16, 97, 213, 214, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
+ 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep113[] = {
- 13, 19, 20, 40, 41, 96, 174, 202, 204, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 4135, 16524, 16526, 22809, 22812, 22813, 22816, 22817, 22820,
- 22821,
+ 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep114[] = {
- 18, 96, 205, 206, 267, 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809,
- 22812, 22813, 22816, 22817, 22820, 22821,
+ 17, 97, 216, 217, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
+ 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep115[] = {
- 14, 19, 20, 40, 41, 96, 174, 205, 207, 267, 2134, 2135, 2136, 2165, 2166,
- 2169, 2172, 4135, 16524, 16526, 22809, 22812, 22813, 22816, 22817, 22820,
- 22821,
+ 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep116[] = {
- 96, 267, 2165, 2166, 2167, 2169, 2170, 2172, 2173, 2329, 2332, 2333, 2336,
- 2337, 2340, 2341,
+ 18, 97, 219, 220, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824,
+ 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep117[] = {
- 40, 41, 96, 174, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2329, 2332,
- 2333, 2336, 2337, 2340, 2341, 4135, 16524, 16526,
+ 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137,
+ 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep118[] = {
- 96, 267, 22645, 22646, 22647, 22649, 22650, 22652, 22653, 22809, 22812, 22813,
- 22816, 22817, 22820, 22821,
+ 97, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351,
+ 2352, 2355, 2356,
};
static const unsigned short dep119[] = {
- 40, 41, 96, 174, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 4135, 16524,
- 16526, 22809, 22812, 22813, 22816, 22817, 22820, 22821,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
+ 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533,
+
};
static const unsigned short dep120[] = {
- 19, 20, 40, 41, 96, 174, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2310,
- 4135, 16524, 16526, 18746, 18748, 18749, 18751,
+ 97, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828,
+ 22831, 22832, 22835, 22836,
};
static const unsigned short dep121[] = {
- 40, 41, 96, 156, 174, 175, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
+ 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835,
+ 22836,
};
static const unsigned short dep122[] = {
- 96, 267, 2083, 2084, 2271, 2272,
+ 19, 20, 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167,
+ 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766,
+
};
static const unsigned short dep123[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2270, 2272,
- 4135, 20613,
+ 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep124[] = {
- 40, 41, 96, 174, 267, 2082, 2084, 2165, 2166, 2169, 2172, 2312, 4135, 20613,
-
+ 97, 282, 2083, 2084, 2286, 2287,
};
static const unsigned short dep125[] = {
- 96, 267, 14454, 14456, 14457, 14459, 14460, 14462, 14620, 14621, 14624, 14625,
- 14628, 14629,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2285, 2287, 4135, 20616,
};
static const unsigned short dep126[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 4135, 14620, 14621, 14624, 14625,
- 14628, 14629, 20613, 24693, 24694, 24697, 24700,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2082, 2084, 2166, 2167, 2170, 2173, 2327,
+ 4135, 20616,
};
static const unsigned short dep127[] = {
- 96, 121, 123, 124, 126, 267, 288, 289, 292, 293,
+ 97, 282, 14455, 14457, 14458, 14460, 14461, 14463, 14635, 14636, 14639, 14640,
+ 14643, 14644,
};
static const unsigned short dep128[] = {
- 40, 41, 96, 174, 267, 288, 289, 292, 293, 4135, 24693, 24694, 24697, 24700,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 4135, 14635, 14636,
+ 14639, 14640, 14643, 14644, 20616, 24694, 24695, 24698, 24701,
};
static const unsigned short dep129[] = {
- 40, 41, 96, 174, 267, 2165, 2166, 2169, 2172, 2312, 4135, 20613,
+ 97, 122, 124, 125, 127, 282, 303, 304, 307, 308,
};
static const unsigned short dep130[] = {
- 40, 41, 96, 118, 121, 124, 174, 267, 2312, 4135, 20613, 24693,
+ 40, 41, 97, 158, 162, 175, 185, 282, 303, 304, 307, 308, 4135, 24694, 24695,
+ 24698, 24701,
};
static const unsigned short dep131[] = {
- 6, 24, 26, 27, 96, 187, 213, 216, 267, 2081, 2269,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
+
};
static const unsigned short dep132[] = {
- 40, 41, 96, 174, 187, 213, 215, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2269, 4135, 20613,
+ 40, 41, 97, 119, 122, 125, 158, 162, 175, 185, 282, 2327, 4135, 20616, 24694,
+
};
static const unsigned short dep133[] = {
- 6, 24, 25, 26, 40, 41, 96, 174, 267, 2081, 2165, 2166, 2169, 2172, 2312, 4135,
- 20613,
+ 6, 24, 26, 27, 97, 201, 227, 230, 282, 2081, 2284,
};
static const unsigned short dep134[] = {
- 0, 40, 41, 96, 156, 174, 175, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 201, 227, 229, 282, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 2284, 4135, 20616,
};
static const unsigned short dep135[] = {
- 0, 96, 181, 267,
+ 6, 24, 25, 26, 40, 41, 97, 158, 162, 175, 185, 282, 2081, 2166, 2167, 2170,
+ 2173, 2327, 4135, 20616,
};
static const unsigned short dep136[] = {
- 0, 40, 41, 96, 156, 174, 175, 181, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2347, 2348,
+ 2351, 2352, 2355, 2356, 4135,
};
static const unsigned short dep137[] = {
- 40, 41, 96, 174, 181, 267, 2165, 2166, 2169, 2172, 4135,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135, 22824,
+ 22827, 22828, 22831, 22832, 22835, 22836,
};
static const unsigned short dep138[] = {
- 2, 28, 96, 183, 217, 267, 28852, 29002,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2348,
+ 2349, 2352, 2353, 2356, 4135,
};
static const unsigned short dep139[] = {
- 1, 2, 28, 29, 96, 168, 169, 174, 183, 217, 267, 28852, 29002,
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2346, 2347,
+ 2350, 2351, 2354, 2355, 4135,
};
static const unsigned short dep140[] = {
- 1, 28, 29, 38, 40, 41, 96, 168, 169, 174, 183, 217, 267, 4135, 28852, 29002,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2346,
+ 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 4135,
};
static const unsigned short dep141[] = {
- 0, 40, 41, 96, 174, 181, 267, 2165, 2166, 2169, 2172, 4135,
+ 0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167, 2170, 2173,
+ 4135,
};
static const unsigned short dep142[] = {
- 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
- 28, 29, 30, 31, 96, 182, 183, 184, 185, 186, 188, 189, 190, 191, 192, 193,
- 194, 195, 197, 198, 200, 201, 203, 204, 206, 207, 208, 209, 210, 211, 217,
- 218, 219, 267, 2071, 2081, 2260, 2269, 28852, 29002,
+ 0, 97, 195, 282,
};
static const unsigned short dep143[] = {
- 29, 40, 41, 96, 134, 174, 182, 183, 184, 185, 186, 188, 189, 190, 191, 192,
- 193, 194, 195, 197, 198, 200, 201, 203, 204, 206, 207, 208, 209, 210, 211,
- 217, 218, 219, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2260, 2269,
- 4135, 20613, 28852, 29002,
+ 0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 195, 282, 2166, 2167, 2170,
+ 2173, 4135,
};
static const unsigned short dep144[] = {
- 96, 267, 14463, 14465, 14466, 14468, 14497, 14498, 14513, 14630, 14631, 14651,
- 14652, 14654, 14655, 14664,
+ 40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135,
};
static const unsigned short dep145[] = {
- 40, 41, 96, 173, 174, 267, 2165, 2166, 2169, 2172, 4135, 14630, 14631, 14651,
- 14652, 14654, 14655, 14664,
+ 2, 28, 97, 197, 231, 282, 28866, 29018,
};
static const unsigned short dep146[] = {
- 14463, 14465, 14466, 14468, 14497, 14498, 14513, 14630, 14631, 14651, 14652,
- 14654, 14655, 14664,
+ 1, 2, 28, 29, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 28866, 29018,
+
};
static const unsigned short dep147[] = {
- 173, 14630, 14631, 14651, 14652, 14654, 14655, 14664,
+ 1, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 4135,
+ 28866, 29018,
};
static const unsigned short dep148[] = {
- 96, 267, 14464, 14465, 14467, 14468, 14476, 14477, 14478, 14479, 14480, 14481,
- 14482, 14483, 14485, 14488, 14489, 14497, 14498, 14499, 14500, 14501, 14506,
- 14507, 14508, 14509, 14513, 14630, 14631, 14637, 14638, 14639, 14640, 14642,
- 14644, 14651, 14652, 14654, 14655, 14656, 14657, 14660, 14661, 14664,
+ 0, 40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135,
+
};
static const unsigned short dep149[] = {
- 40, 41, 72, 96, 134, 174, 267, 2165, 2166, 2169, 2172, 4135, 14630, 14631,
- 14637, 14638, 14639, 14640, 14642, 14644, 14651, 14652, 14654, 14655, 14656,
- 14657, 14660, 14661, 14664,
+ 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
+ 28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 202, 203, 204, 205, 206, 207,
+ 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225, 231,
+ 232, 233, 234, 282, 2071, 2081, 2274, 2284, 28866, 29018,
};
static const unsigned short dep150[] = {
- 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
- 28, 29, 30, 31, 40, 41, 96, 134, 171, 174, 267, 2071, 2081, 2165, 2166, 2169,
- 2172, 2312, 4135, 20613, 28852,
+ 29, 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 196, 197, 198, 199,
+ 200, 202, 203, 204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218,
+ 220, 221, 222, 223, 224, 225, 231, 232, 233, 234, 282, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 2274, 2284, 4135, 20616, 28866, 29018,
};
static const unsigned short dep151[] = {
- 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 56, 57, 58, 60, 61, 62, 63,
- 64, 65, 67, 69, 70, 71, 72, 93, 95, 96, 228, 229, 230, 231, 232, 233, 234,
- 235, 236, 237, 238, 240, 241, 242, 243, 244, 246, 248, 249, 250, 266, 267,
- 2116, 2295,
+ 97, 282, 14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666,
+ 14667, 14669, 14670, 14679,
};
static const unsigned short dep152[] = {
- 40, 41, 95, 96, 134, 153, 174, 228, 229, 230, 231, 232, 233, 234, 235, 236,
- 237, 238, 240, 241, 242, 243, 244, 246, 248, 249, 250, 266, 267, 2137, 2138,
- 2139, 2165, 2166, 2169, 2172, 2295, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 2166, 2167, 2170, 2173, 4135,
+ 14645, 14646, 14666, 14667, 14669, 14670, 14679,
};
static const unsigned short dep153[] = {
- 59, 94, 96, 239, 266, 267, 2139, 2312,
+ 14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666, 14667,
+ 14669, 14670, 14679,
};
static const unsigned short dep154[] = {
- 40, 41, 43, 44, 46, 48, 49, 51, 52, 53, 54, 56, 57, 60, 61, 63, 64, 65, 66,
- 67, 69, 70, 71, 93, 94, 96, 134, 153, 174, 239, 266, 267, 2107, 2116, 2165,
- 2166, 2169, 2172, 2312, 4135, 20613,
+ 183, 184, 14645, 14646, 14666, 14667, 14669, 14670, 14679,
};
static const unsigned short dep155[] = {
- 2, 28, 41, 96, 183, 217, 226, 267, 2139, 2312, 28852, 29002,
+ 97, 282, 14465, 14466, 14469, 14470, 14480, 14481, 14483, 14484, 14486, 14487,
+ 14489, 14490, 14493, 14495, 14496, 14505, 14506, 14507, 14508, 14510, 14515,
+ 14516, 14518, 14519, 14525, 14645, 14646, 14652, 14653, 14654, 14655, 14657,
+ 14659, 14666, 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679,
};
static const unsigned short dep156[] = {
- 2, 25, 26, 28, 29, 38, 40, 41, 96, 168, 169, 174, 183, 217, 226, 267, 2312,
- 4135, 20613, 28852, 29002,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170,
+ 2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666,
+ 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679, 34888,
};
static const unsigned short dep157[] = {
- 96, 128, 129, 131, 132, 136, 137, 140, 141, 142, 143, 144, 145, 146, 147,
- 149, 152, 153, 157, 158, 161, 162, 163, 164, 165, 167, 168, 170, 171, 172,
- 173, 175, 176, 177, 267, 294, 295, 299, 301, 302, 303, 304, 306, 308, 312,
- 315, 316, 318, 319, 320, 321, 323, 324, 325, 327, 328,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170,
+ 2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666,
+ 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679,
};
static const unsigned short dep158[] = {
- 40, 41, 72, 96, 134, 174, 267, 294, 295, 299, 301, 302, 303, 304, 306, 308,
- 312, 315, 316, 318, 319, 320, 321, 323, 324, 325, 327, 328, 2137, 2138, 2139,
- 2165, 2166, 2169, 2172, 4135, 20613,
+ 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
+ 28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180, 181, 185, 190, 191,
+ 282, 2071, 2081, 2166, 2167, 2170, 2173, 2327, 4135, 20616, 28866,
};
static const unsigned short dep159[] = {
- 96, 127, 129, 130, 132, 161, 162, 177, 267, 294, 295, 315, 316, 318, 319,
- 328,
+ 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 56, 57, 58, 60, 61, 62, 63,
+ 64, 65, 67, 69, 70, 71, 72, 73, 94, 96, 97, 243, 244, 245, 246, 247, 248,
+ 249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261, 263, 264, 265, 281,
+ 282, 2116, 2310,
};
static const unsigned short dep160[] = {
- 40, 41, 96, 173, 174, 267, 294, 295, 315, 316, 318, 319, 328, 2137, 2138,
- 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 96, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191, 243, 244,
+ 245, 246, 247, 248, 249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261,
+ 263, 264, 265, 281, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2310, 4135,
+ 20616,
};
static const unsigned short dep161[] = {
- 40, 41, 96, 129, 132, 134, 137, 138, 141, 143, 145, 147, 149, 150, 152, 156,
- 157, 159, 160, 161, 162, 164, 165, 167, 169, 170, 172, 174, 176, 177, 267,
- 2165, 2166, 2169, 2172, 2312, 4135, 20613,
+ 59, 95, 97, 254, 281, 282, 2140, 2327,
};
static const unsigned short dep162[] = {
- 40, 41, 96, 129, 132, 161, 162, 174, 177, 267, 2165, 2166, 2169, 2172, 2312,
- 4135, 20613,
+ 40, 41, 43, 44, 46, 48, 49, 51, 52, 53, 54, 56, 57, 60, 61, 63, 64, 65, 66,
+ 67, 69, 70, 71, 94, 95, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191,
+ 254, 281, 282, 2107, 2116, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep163[] = {
- 40, 41, 75, 76, 81, 83, 96, 110, 134, 163, 174, 178, 267, 2137, 2138, 2139,
- 2165, 2166, 2169, 2172, 2312, 4135, 20613,
+ 2, 28, 41, 97, 197, 231, 241, 282, 2140, 2327, 28866, 29018,
};
static const unsigned short dep164[] = {
- 40, 41, 75, 76, 81, 83, 96, 110, 134, 135, 136, 138, 139, 163, 174, 178, 267,
- 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 2, 25, 26, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231,
+ 241, 282, 2327, 4135, 20616, 28866, 29018,
};
static const unsigned short dep165[] = {
- 76, 77, 96, 100, 101, 254, 255, 267, 269, 270,
+ 97, 129, 130, 133, 134, 140, 141, 144, 145, 147, 148, 150, 151, 153, 154,
+ 157, 159, 160, 165, 166, 169, 170, 171, 172, 174, 176, 177, 179, 180, 182,
+ 183, 186, 187, 189, 282, 309, 310, 314, 316, 317, 318, 319, 321, 323, 327,
+ 330, 331, 333, 334, 335, 336, 338, 339, 340, 342, 343,
};
static const unsigned short dep166[] = {
- 40, 41, 47, 62, 77, 79, 85, 96, 98, 101, 134, 153, 174, 178, 254, 255, 267,
- 269, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 309, 310, 314, 316,
+ 317, 318, 319, 321, 323, 327, 330, 331, 333, 334, 335, 336, 338, 339, 340,
+ 342, 343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, 34888,
};
static const unsigned short dep167[] = {
- 40, 41, 47, 62, 77, 79, 96, 98, 101, 103, 105, 134, 153, 174, 178, 254, 255,
- 267, 269, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 97, 128, 130, 132, 134, 169, 170, 189, 282, 309, 310, 330, 331, 333, 334,
+ 343,
};
static const unsigned short dep168[] = {
- 96, 267, 12466, 12467, 12617,
+ 40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 309, 310, 330, 331, 333, 334,
+ 343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep169[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 12617, 20613,
+ 40, 41, 97, 130, 131, 134, 135, 137, 138, 141, 142, 145, 146, 148, 149, 151,
+ 152, 154, 155, 157, 158, 159, 161, 162, 164, 165, 167, 168, 169, 170, 172,
+ 173, 174, 175, 176, 178, 179, 181, 182, 184, 185, 187, 188, 189, 190, 191,
+ 282, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep170[] = {
- 96, 267, 6218, 6219, 6396,
+ 40, 41, 97, 130, 131, 134, 135, 158, 162, 169, 170, 175, 185, 189, 282, 2166,
+ 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep171[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 6396, 20613,
+ 40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 153, 155, 158, 162, 171, 173,
+ 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep172[] = {
- 96, 267, 6236, 6409,
+ 40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 139, 140, 142, 143, 153, 155,
+ 158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 4135, 20616,
};
static const unsigned short dep173[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 6409, 20613,
+ 77, 78, 97, 101, 102, 269, 270, 282, 284, 285,
};
static const unsigned short dep174[] = {
- 96, 267, 6254, 6255, 6256, 6257, 6420, 6422, 8469,
+ 40, 41, 47, 62, 78, 80, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162, 175,
+ 185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166, 2167,
+ 2170, 2173, 4135, 20616,
};
static const unsigned short dep175[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 6257, 6421, 6422, 8303, 8468, 20613,
+ 40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162,
+ 175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep176[] = {
- 96, 267, 6258, 6259, 6423,
+ 97, 282, 12480, 12481, 12633,
};
static const unsigned short dep177[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 6423, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 12633, 20616,
};
static const unsigned short dep178[] = {
- 96, 267, 6260, 6424,
+ 97, 282, 6219, 6220, 6411,
};
static const unsigned short dep179[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 6424, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 6411, 20616,
};
static const unsigned short dep180[] = {
- 96, 267, 10349, 10515,
+ 97, 282, 6237, 6424,
};
static const unsigned short dep181[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135,
- 10515, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 6424, 20616,
};
static const unsigned short dep182[] = {
- 76, 77, 81, 82, 96, 100, 101, 254, 255, 257, 258, 267, 269, 270,
+ 97, 282, 6255, 6256, 6257, 6258, 6435, 6437, 8484,
};
static const unsigned short dep183[] = {
- 40, 41, 47, 62, 77, 79, 82, 85, 96, 98, 101, 134, 153, 174, 178, 254, 255,
- 257, 259, 267, 269, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
-
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 6258, 6436, 6437, 8304, 8483, 20616,
};
static const unsigned short dep184[] = {
- 76, 77, 96, 100, 101, 103, 104, 254, 255, 267, 269, 270, 271, 272,
+ 97, 282, 6259, 6260, 6438,
};
static const unsigned short dep185[] = {
- 40, 41, 47, 62, 77, 79, 96, 98, 101, 103, 105, 134, 153, 174, 178, 254, 255,
- 267, 269, 270, 271, 272, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
-
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 6438, 20616,
};
static const unsigned short dep186[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 12467, 20613,
+ 97, 282, 6261, 6439,
};
static const unsigned short dep187[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 6218, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 6439, 20616,
};
static const unsigned short dep188[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 6236, 20613,
+ 97, 282, 10350, 10530,
};
static const unsigned short dep189[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 6256, 8302, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 10530, 20616,
};
static const unsigned short dep190[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 6258, 20613,
+ 77, 78, 82, 83, 97, 101, 102, 269, 270, 272, 273, 282, 284, 285,
};
static const unsigned short dep191[] = {
- 40, 41, 96, 134, 173, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2312, 4135, 6259, 6260, 20613,
+ 40, 41, 47, 62, 78, 80, 83, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162,
+ 175, 185, 190, 191, 192, 269, 270, 272, 274, 282, 284, 285, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep192[] = {
- 40, 41, 96, 134, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 10349, 20613,
+ 77, 78, 97, 101, 102, 104, 105, 269, 270, 282, 284, 285, 286, 287,
};
static const unsigned short dep193[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312, 4135,
- 6186, 20613,
+ 40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162,
+ 175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 286, 287, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep194[] = {
- 76, 78, 79, 96, 97, 98, 99, 253, 254, 267, 268, 269,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 12481, 20616,
};
static const unsigned short dep195[] = {
- 40, 41, 77, 78, 82, 84, 96, 99, 101, 103, 106, 134, 174, 178, 253, 255, 267,
- 268, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 6219, 20616,
};
static const unsigned short dep196[] = {
- 76, 78, 79, 80, 96, 97, 98, 99, 102, 253, 254, 256, 267, 268, 269,
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 6237, 20616,
};
static const unsigned short dep197[] = {
- 40, 41, 77, 78, 80, 82, 84, 96, 99, 101, 102, 103, 106, 134, 174, 178, 253,
- 255, 256, 267, 268, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
-
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 6257, 8303, 20616,
};
static const unsigned short dep198[] = {
- 76, 78, 79, 83, 84, 85, 96, 97, 98, 99, 253, 254, 259, 260, 267, 268, 269,
-
+ 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 6259, 20616,
};
static const unsigned short dep199[] = {
- 40, 41, 77, 78, 82, 84, 96, 99, 101, 134, 174, 178, 253, 255, 258, 260, 267,
- 268, 270, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 97, 137, 138, 158, 162, 175, 183, 184, 185, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 6260, 6261, 20616,
};
static const unsigned short dep200[] = {
- 76, 78, 79, 96, 97, 98, 99, 105, 106, 107, 253, 254, 267, 268, 269, 272, 273,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2327, 4135, 10350, 20616,
};
static const unsigned short dep201[] = {
- 40, 41, 77, 78, 96, 99, 101, 103, 106, 134, 174, 178, 253, 255, 267, 268,
- 270, 271, 273, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, 2166, 2167,
+ 2170, 2173, 2327, 4135, 6186, 20616,
};
static const unsigned short dep202[] = {
- 40, 41, 46, 70, 96, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2312, 4135, 20613,
+ 77, 79, 80, 97, 98, 99, 100, 268, 269, 282, 283, 284,
};
static const unsigned short dep203[] = {
- 40, 41, 96, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 20613,
+ 40, 41, 78, 79, 83, 85, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185,
+ 190, 191, 192, 268, 270, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 4135, 20616,
};
static const unsigned short dep204[] = {
- 40, 41, 76, 81, 83, 96, 134, 174, 178, 267, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 2312, 4135, 20613,
+ 77, 79, 80, 81, 97, 98, 99, 100, 103, 268, 269, 271, 282, 283, 284,
};
static const unsigned short dep205[] = {
- 40, 41, 96, 156, 174, 175, 267, 2134, 2135, 2136, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 4135, 16524, 16526, 20613,
+ 40, 41, 78, 79, 81, 83, 85, 97, 100, 102, 103, 104, 107, 137, 138, 158, 162,
+ 175, 185, 190, 191, 192, 268, 270, 271, 282, 283, 285, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep206[] = {
- 40, 41, 76, 81, 83, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 4135, 20613,
+ 77, 79, 80, 84, 85, 86, 97, 98, 99, 100, 268, 269, 274, 275, 282, 283, 284,
+
};
static const unsigned short dep207[] = {
- 40, 41, 77, 78, 96, 99, 134, 174, 253, 255, 267, 268, 270, 2137, 2138, 2139,
- 2165, 2166, 2169, 2172, 4135, 20613,
+ 40, 41, 78, 79, 83, 85, 97, 100, 102, 137, 138, 158, 162, 175, 185, 190, 191,
+ 192, 268, 270, 273, 275, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 4135, 20616,
};
static const unsigned short dep208[] = {
- 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312,
- 4135, 20613,
+ 77, 79, 80, 97, 98, 99, 100, 106, 107, 108, 268, 269, 282, 283, 284, 287,
+ 288,
};
static const unsigned short dep209[] = {
- 5, 96, 186, 267, 2139, 2312,
+ 40, 41, 78, 79, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185, 190,
+ 191, 192, 268, 270, 282, 283, 285, 286, 288, 2138, 2139, 2140, 2166, 2167,
+ 2170, 2173, 4135, 20616,
};
static const unsigned short dep210[] = {
- 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 186, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2312, 4135, 20613,
+ 40, 41, 46, 70, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140,
+ 2166, 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep211[] = {
- 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 148, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2312, 4135, 20613,
+ 40, 41, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140, 2166,
+ 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep212[] = {
- 0, 96, 181, 267, 2139, 2312,
+ 40, 41, 70, 77, 82, 84, 97, 137, 138, 153, 155, 158, 162, 175, 185, 190, 191,
+ 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep213[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2312, 4135, 20613,
+ 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2135, 2136, 2137, 2138,
+ 2139, 2140, 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 20616,
+
};
static const unsigned short dep214[] = {
- 0, 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135,
- 136, 138, 139, 146, 148, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 2312, 4135, 20613,
+ 40, 41, 70, 77, 82, 84, 97, 153, 155, 158, 162, 175, 185, 192, 282, 2138,
+ 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep215[] = {
- 31, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2312, 4135, 20613,
+ 40, 41, 78, 79, 97, 100, 137, 138, 158, 162, 175, 185, 190, 191, 268, 270,
+ 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
};
static const unsigned short dep216[] = {
- 0, 96, 181, 267, 2312, 26714,
+ 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
};
static const unsigned short dep217[] = {
- 0, 96, 108, 181, 267, 274,
+ 5, 97, 200, 282, 2140, 2327,
};
static const unsigned short dep218[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 4135, 20613,
+ 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 200, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
+
};
static const unsigned short dep219[] = {
- 0, 5, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 4135, 20613,
+ 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
+ 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep220[] = {
- 0, 31, 96, 108, 181, 219, 267, 274,
+ 0, 97, 195, 282, 2140, 2327,
};
static const unsigned short dep221[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 219, 267, 274, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 4135, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep222[] = {
- 0, 96, 108, 181, 267, 274, 2139, 2312,
+ 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
+ 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
+ 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327,
+ 4135, 20616,
};
static const unsigned short dep223[] = {
- 0, 4, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135,
- 136, 138, 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 2312, 4135, 20613,
+ 31, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616,
+
};
static const unsigned short dep224[] = {
- 0, 4, 5, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135,
- 136, 138, 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 2312, 4135, 20613,
+ 0, 97, 195, 282, 2327, 26715,
};
static const unsigned short dep225[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 2312, 4135, 20613,
+ 0, 97, 109, 195, 282, 289,
};
static const unsigned short dep226[] = {
- 40, 41, 96, 174, 267, 2134, 2135, 2136, 2165, 2166, 2169, 2172, 2312, 4135,
- 16524, 16526, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
+
};
static const unsigned short dep227[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 267, 274, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2312, 4135, 20613,
+ 0, 5, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
+
};
static const unsigned short dep228[] = {
- 0, 31, 96, 108, 181, 219, 267, 274, 2139, 2312,
+ 0, 31, 97, 109, 195, 234, 282, 289,
};
static const unsigned short dep229[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 219, 267, 274, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 2312, 4135, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616,
+
};
static const unsigned short dep230[] = {
- 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2310,
- 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 97, 109, 195, 282, 289, 2140, 2327,
};
static const unsigned short dep231[] = {
- 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 148, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 3, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep232[] = {
- 0, 96, 181, 267, 2135, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
+ 0, 3, 5, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
+ 135, 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185,
+ 190, 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327,
+ 4135, 20616,
};
static const unsigned short dep233[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep234[] = {
- 0, 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135,
- 136, 138, 139, 146, 148, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
-
+ 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173,
+ 2327, 4135, 16528, 16530, 16531, 16533, 20616,
};
static const unsigned short dep235[] = {
- 0, 96, 181, 267, 2136, 2310, 18593, 18594, 18746, 18747, 18749, 18750,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep236[] = {
- 96, 267, 2135, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749, 18750,
-
+ 0, 31, 97, 109, 195, 234, 282, 289, 2140, 2327,
};
static const unsigned short dep237[] = {
- 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2310,
- 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135,
+ 20616,
};
static const unsigned short dep238[] = {
- 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 148, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530,
+ 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep239[] = {
- 0, 96, 181, 267, 2135, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749,
- 18750,
+ 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
+ 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135,
+ 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep240[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136,
- 138, 139, 146, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165, 2166, 2169,
- 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 97, 195, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep241[] = {
- 0, 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135,
- 136, 138, 139, 146, 148, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165,
- 2166, 2169, 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751,
- 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135,
+ 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep242[] = {
- 0, 96, 181, 267, 2136, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749,
- 18750,
+ 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
+ 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
+ 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325,
+ 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep243[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 267, 274, 2134, 2135, 2136, 2137, 2138, 2139,
- 2165, 2166, 2169, 2172, 4135, 16524, 16526, 20613,
+ 0, 97, 195, 282, 2137, 2325, 18601, 18602, 18761, 18762, 18764, 18765,
};
static const unsigned short dep244[] = {
- 40, 41, 75, 96, 134, 148, 174, 267, 2165, 2166, 2169, 2172, 4135,
+ 97, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764, 18765,
+
};
static const unsigned short dep245[] = {
- 40, 41, 75, 96, 134, 135, 139, 148, 174, 267, 2165, 2166, 2169, 2172, 4135,
-
+ 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327, 4135, 16528,
+ 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep246[] = {
- 40, 41, 75, 96, 134, 148, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172,
- 2312, 4135, 20613,
+ 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185,
+ 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327,
+ 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep247[] = {
- 40, 41, 75, 96, 134, 135, 139, 148, 174, 267, 2137, 2138, 2139, 2165, 2166,
- 2169, 2172, 2312, 4135, 20613,
+ 0, 97, 195, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764,
+ 18765,
};
static const unsigned short dep248[] = {
- 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2310, 4135,
- 16524, 16526, 18746, 18748, 18749, 18751, 20613,
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135,
+ 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190,
+ 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327,
+ 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
};
static const unsigned short dep249[] = {
- 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138,
- 139, 146, 163, 174, 178, 181, 267, 274, 2134, 2135, 2136, 2137, 2138, 2139,
- 2165, 2166, 2169, 2172, 2312, 4135, 16524, 16526, 20613,
+ 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133,
+ 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175,
+ 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325,
+ 2327, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
+
};
static const unsigned short dep250[] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
- 22, 24, 26, 27, 28, 29, 30, 31, 96, 182, 183, 184, 185, 186, 187, 188, 189,
- 190, 191, 192, 193, 194, 195, 197, 198, 200, 201, 203, 204, 206, 207, 208,
- 209, 210, 211, 213, 216, 217, 218, 219, 267, 2071, 2081, 2139, 2260, 2269,
- 2312, 28852, 29002,
+ 0, 97, 195, 282, 2137, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764,
+ 18765,
};
static const unsigned short dep251[] = {
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 4135, 16528, 16530, 16531, 16533, 20616,
+};
+
+static const unsigned short dep252[] = {
+ 40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156,
+ 158, 162, 171, 173, 175, 185, 192, 282, 2166, 2167, 2170, 2173, 4135,
+};
+
+static const unsigned short dep253[] = {
+ 40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156,
+ 158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 2327, 4135, 20616,
+};
+
+static const unsigned short dep254[] = {
+ 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173,
+ 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616,
+
+};
+
+static const unsigned short dep255[] = {
+ 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137,
+ 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191,
+ 192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170,
+ 2173, 2327, 4135, 16528, 16530, 16531, 16533, 20616,
+};
+
+static const unsigned short dep256[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
- 22, 24, 25, 26, 28, 29, 30, 31, 40, 41, 96, 134, 171, 174, 182, 183, 184,
- 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 197, 198, 200, 201,
- 203, 204, 206, 207, 208, 209, 210, 211, 213, 215, 217, 218, 219, 267, 2071,
- 2081, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2260, 2269, 2312, 4135, 20613,
- 28852, 29002,
+ 22, 24, 26, 27, 28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 201, 202, 203,
+ 204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222,
+ 223, 224, 225, 227, 230, 231, 232, 233, 234, 282, 2071, 2081, 2140, 2274,
+ 2284, 2327, 28866, 29018,
};
+static const unsigned short dep257[] = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+ 22, 24, 25, 26, 28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180,
+ 181, 185, 190, 191, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206,
+ 207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225,
+ 227, 229, 231, 232, 233, 234, 282, 2071, 2081, 2138, 2139, 2140, 2166, 2167,
+ 2170, 2173, 2274, 2284, 2327, 4135, 20616, 28866, 29018,
+};
+
#define NELS(X) (sizeof(X)/sizeof(X[0]))
static const struct ia64_opcode_dependency
op_dependencies[] = {
@@ -1653,16 +1758,16 @@
{ NELS(dep23), dep23, NELS(dep22), dep22, },
{ NELS(dep25), dep25, NELS(dep24), dep24, },
{ NELS(dep27), dep27, NELS(dep26), dep26, },
- { NELS(dep28), dep28, NELS(dep12), dep12, },
- { NELS(dep30), dep30, NELS(dep29), dep29, },
+ { NELS(dep29), dep29, NELS(dep28), dep28, },
+ { NELS(dep30), dep30, NELS(dep12), dep12, },
{ NELS(dep32), dep32, NELS(dep31), dep31, },
- { NELS(dep33), dep33, NELS(dep12), dep12, },
- { NELS(dep35), dep35, NELS(dep34), dep34, },
+ { NELS(dep34), dep34, NELS(dep33), dep33, },
+ { NELS(dep35), dep35, NELS(dep12), dep12, },
{ NELS(dep37), dep37, NELS(dep36), dep36, },
{ NELS(dep39), dep39, NELS(dep38), dep38, },
- { NELS(dep40), dep40, NELS(dep29), dep29, },
- { NELS(dep41), dep41, NELS(dep31), dep31, },
- { NELS(dep43), dep43, NELS(dep42), dep42, },
+ { NELS(dep41), dep41, NELS(dep40), dep40, },
+ { NELS(dep42), dep42, NELS(dep31), dep31, },
+ { NELS(dep43), dep43, NELS(dep33), dep33, },
{ NELS(dep45), dep45, NELS(dep44), dep44, },
{ NELS(dep47), dep47, NELS(dep46), dep46, },
{ NELS(dep49), dep49, NELS(dep48), dep48, },
@@ -1674,20 +1779,20 @@
{ NELS(dep61), dep61, NELS(dep60), dep60, },
{ NELS(dep63), dep63, NELS(dep62), dep62, },
{ NELS(dep65), dep65, NELS(dep64), dep64, },
- { NELS(dep66), dep66, NELS(dep31), dep31, },
- { NELS(dep68), dep68, NELS(dep67), dep67, },
+ { NELS(dep67), dep67, NELS(dep66), dep66, },
+ { NELS(dep68), dep68, NELS(dep33), dep33, },
{ NELS(dep70), dep70, NELS(dep69), dep69, },
{ NELS(dep72), dep72, NELS(dep71), dep71, },
{ NELS(dep74), dep74, NELS(dep73), dep73, },
- { NELS(dep75), dep75, NELS(dep31), dep31, },
- { NELS(dep77), dep77, NELS(dep76), dep76, },
+ { NELS(dep76), dep76, NELS(dep75), dep75, },
+ { NELS(dep77), dep77, NELS(dep33), dep33, },
{ NELS(dep79), dep79, NELS(dep78), dep78, },
{ NELS(dep81), dep81, NELS(dep80), dep80, },
- { NELS(dep82), dep82, NELS(dep31), dep31, },
- { NELS(dep83), dep83, NELS(dep31), dep31, },
- { NELS(dep84), dep84, NELS(dep31), dep31, },
- { NELS(dep85), dep85, NELS(dep31), dep31, },
- { NELS(dep87), dep87, NELS(dep86), dep86, },
+ { NELS(dep83), dep83, NELS(dep82), dep82, },
+ { NELS(dep84), dep84, NELS(dep33), dep33, },
+ { NELS(dep85), dep85, NELS(dep33), dep33, },
+ { NELS(dep86), dep86, NELS(dep33), dep33, },
+ { NELS(dep87), dep87, NELS(dep33), dep33, },
{ NELS(dep89), dep89, NELS(dep88), dep88, },
{ NELS(dep91), dep91, NELS(dep90), dep90, },
{ NELS(dep93), dep93, NELS(dep92), dep92, },
@@ -1704,100 +1809,105 @@
{ NELS(dep115), dep115, NELS(dep114), dep114, },
{ NELS(dep117), dep117, NELS(dep116), dep116, },
{ NELS(dep119), dep119, NELS(dep118), dep118, },
- { NELS(dep120), dep120, NELS(dep62), dep62, },
- { NELS(dep121), dep121, NELS(dep31), dep31, },
- { NELS(dep123), dep123, NELS(dep122), dep122, },
- { NELS(dep124), dep124, NELS(dep0), dep0, },
- { NELS(dep126), dep126, NELS(dep125), dep125, },
+ { NELS(dep121), dep121, NELS(dep120), dep120, },
+ { NELS(dep122), dep122, NELS(dep64), dep64, },
+ { NELS(dep123), dep123, NELS(dep33), dep33, },
+ { NELS(dep125), dep125, NELS(dep124), dep124, },
+ { NELS(dep126), dep126, NELS(dep0), dep0, },
{ NELS(dep128), dep128, NELS(dep127), dep127, },
- { NELS(dep129), dep129, NELS(dep0), dep0, },
- { NELS(dep130), dep130, NELS(dep0), dep0, },
- { NELS(dep132), dep132, NELS(dep131), dep131, },
- { NELS(dep133), dep133, NELS(dep0), dep0, },
- { NELS(dep134), dep134, NELS(dep31), dep31, },
- { NELS(dep136), dep136, NELS(dep135), dep135, },
- { NELS(dep137), dep137, NELS(dep135), dep135, },
- { NELS(dep139), dep139, NELS(dep138), dep138, },
- { NELS(dep140), dep140, NELS(dep138), dep138, },
- { NELS(dep141), dep141, NELS(dep135), dep135, },
+ { NELS(dep130), dep130, NELS(dep129), dep129, },
+ { NELS(dep131), dep131, NELS(dep0), dep0, },
+ { NELS(dep132), dep132, NELS(dep0), dep0, },
+ { NELS(dep134), dep134, NELS(dep133), dep133, },
+ { NELS(dep135), dep135, NELS(dep0), dep0, },
+ { NELS(dep136), dep136, NELS(dep2), dep2, },
+ { NELS(dep137), dep137, NELS(dep4), dep4, },
+ { NELS(dep138), dep138, NELS(dep6), dep6, },
+ { NELS(dep139), dep139, NELS(dep8), dep8, },
+ { NELS(dep140), dep140, NELS(dep10), dep10, },
+ { NELS(dep141), dep141, NELS(dep33), dep33, },
{ NELS(dep143), dep143, NELS(dep142), dep142, },
- { NELS(dep145), dep145, NELS(dep144), dep144, },
- { NELS(dep147), dep147, NELS(dep146), dep146, },
- { NELS(dep149), dep149, NELS(dep148), dep148, },
- { NELS(dep150), dep150, NELS(dep0), dep0, },
+ { NELS(dep144), dep144, NELS(dep142), dep142, },
+ { NELS(dep146), dep146, NELS(dep145), dep145, },
+ { NELS(dep147), dep147, NELS(dep145), dep145, },
+ { NELS(dep148), dep148, NELS(dep142), dep142, },
+ { NELS(dep150), dep150, NELS(dep149), dep149, },
{ NELS(dep152), dep152, NELS(dep151), dep151, },
{ NELS(dep154), dep154, NELS(dep153), dep153, },
{ NELS(dep156), dep156, NELS(dep155), dep155, },
- { NELS(dep158), dep158, NELS(dep157), dep157, },
+ { NELS(dep157), dep157, NELS(dep155), dep155, },
+ { NELS(dep158), dep158, NELS(dep0), dep0, },
{ NELS(dep160), dep160, NELS(dep159), dep159, },
- { NELS(dep161), dep161, NELS(dep0), dep0, },
- { NELS(dep162), dep162, NELS(dep0), dep0, },
- { NELS(dep163), dep163, NELS(dep0), dep0, },
- { NELS(dep164), dep164, NELS(dep31), dep31, },
+ { NELS(dep162), dep162, NELS(dep161), dep161, },
+ { NELS(dep164), dep164, NELS(dep163), dep163, },
{ NELS(dep166), dep166, NELS(dep165), dep165, },
- { NELS(dep167), dep167, NELS(dep165), dep165, },
- { NELS(dep169), dep169, NELS(dep168), dep168, },
- { NELS(dep171), dep171, NELS(dep170), dep170, },
- { NELS(dep173), dep173, NELS(dep172), dep172, },
- { NELS(dep175), dep175, NELS(dep174), dep174, },
+ { NELS(dep168), dep168, NELS(dep167), dep167, },
+ { NELS(dep169), dep169, NELS(dep0), dep0, },
+ { NELS(dep170), dep170, NELS(dep0), dep0, },
+ { NELS(dep171), dep171, NELS(dep0), dep0, },
+ { NELS(dep172), dep172, NELS(dep33), dep33, },
+ { NELS(dep174), dep174, NELS(dep173), dep173, },
+ { NELS(dep175), dep175, NELS(dep173), dep173, },
{ NELS(dep177), dep177, NELS(dep176), dep176, },
{ NELS(dep179), dep179, NELS(dep178), dep178, },
{ NELS(dep181), dep181, NELS(dep180), dep180, },
{ NELS(dep183), dep183, NELS(dep182), dep182, },
{ NELS(dep185), dep185, NELS(dep184), dep184, },
- { NELS(dep186), dep186, NELS(dep0), dep0, },
- { NELS(dep187), dep187, NELS(dep0), dep0, },
- { NELS(dep188), dep188, NELS(dep0), dep0, },
- { NELS(dep189), dep189, NELS(dep0), dep0, },
- { NELS(dep190), dep190, NELS(dep0), dep0, },
- { NELS(dep191), dep191, NELS(dep0), dep0, },
- { NELS(dep192), dep192, NELS(dep0), dep0, },
- { NELS(dep193), dep193, NELS(dep0), dep0, },
- { NELS(dep195), dep195, NELS(dep194), dep194, },
- { NELS(dep197), dep197, NELS(dep196), dep196, },
- { NELS(dep199), dep199, NELS(dep198), dep198, },
- { NELS(dep201), dep201, NELS(dep200), dep200, },
- { NELS(dep202), dep202, NELS(dep0), dep0, },
- { NELS(dep203), dep203, NELS(dep0), dep0, },
- { NELS(dep204), dep204, NELS(dep0), dep0, },
- { NELS(dep205), dep205, NELS(dep31), dep31, },
- { NELS(dep206), dep206, NELS(dep31), dep31, },
- { NELS(dep207), dep207, NELS(dep194), dep194, },
- { NELS(dep208), dep208, NELS(dep0), dep0, },
- { NELS(dep210), dep210, NELS(dep209), dep209, },
+ { NELS(dep187), dep187, NELS(dep186), dep186, },
+ { NELS(dep189), dep189, NELS(dep188), dep188, },
+ { NELS(dep191), dep191, NELS(dep190), dep190, },
+ { NELS(dep193), dep193, NELS(dep192), dep192, },
+ { NELS(dep194), dep194, NELS(dep0), dep0, },
+ { NELS(dep195), dep195, NELS(dep0), dep0, },
+ { NELS(dep196), dep196, NELS(dep0), dep0, },
+ { NELS(dep197), dep197, NELS(dep0), dep0, },
+ { NELS(dep198), dep198, NELS(dep0), dep0, },
+ { NELS(dep199), dep199, NELS(dep0), dep0, },
+ { NELS(dep200), dep200, NELS(dep0), dep0, },
+ { NELS(dep201), dep201, NELS(dep0), dep0, },
+ { NELS(dep203), dep203, NELS(dep202), dep202, },
+ { NELS(dep205), dep205, NELS(dep204), dep204, },
+ { NELS(dep207), dep207, NELS(dep206), dep206, },
+ { NELS(dep209), dep209, NELS(dep208), dep208, },
+ { NELS(dep210), dep210, NELS(dep0), dep0, },
{ NELS(dep211), dep211, NELS(dep0), dep0, },
- { NELS(dep213), dep213, NELS(dep212), dep212, },
- { NELS(dep214), dep214, NELS(dep212), dep212, },
- { NELS(dep215), dep215, NELS(dep0), dep0, },
- { NELS(dep213), dep213, NELS(dep216), dep216, },
+ { NELS(dep212), dep212, NELS(dep0), dep0, },
+ { NELS(dep213), dep213, NELS(dep33), dep33, },
+ { NELS(dep214), dep214, NELS(dep33), dep33, },
+ { NELS(dep215), dep215, NELS(dep202), dep202, },
+ { NELS(dep216), dep216, NELS(dep0), dep0, },
{ NELS(dep218), dep218, NELS(dep217), dep217, },
- { NELS(dep219), dep219, NELS(dep217), dep217, },
+ { NELS(dep219), dep219, NELS(dep0), dep0, },
{ NELS(dep221), dep221, NELS(dep220), dep220, },
- { NELS(dep223), dep223, NELS(dep222), dep222, },
- { NELS(dep224), dep224, NELS(dep222), dep222, },
- { NELS(dep225), dep225, NELS(dep222), dep222, },
- { NELS(dep226), dep226, NELS(dep0), dep0, },
- { NELS(dep227), dep227, NELS(dep222), dep222, },
+ { NELS(dep222), dep222, NELS(dep220), dep220, },
+ { NELS(dep223), dep223, NELS(dep0), dep0, },
+ { NELS(dep221), dep221, NELS(dep224), dep224, },
+ { NELS(dep226), dep226, NELS(dep225), dep225, },
+ { NELS(dep227), dep227, NELS(dep225), dep225, },
{ NELS(dep229), dep229, NELS(dep228), dep228, },
- { NELS(dep230), dep230, NELS(dep62), dep62, },
- { NELS(dep231), dep231, NELS(dep62), dep62, },
- { NELS(dep233), dep233, NELS(dep232), dep232, },
- { NELS(dep234), dep234, NELS(dep232), dep232, },
- { NELS(dep233), dep233, NELS(dep235), dep235, },
+ { NELS(dep231), dep231, NELS(dep230), dep230, },
+ { NELS(dep232), dep232, NELS(dep230), dep230, },
+ { NELS(dep233), dep233, NELS(dep230), dep230, },
+ { NELS(dep234), dep234, NELS(dep0), dep0, },
+ { NELS(dep235), dep235, NELS(dep230), dep230, },
{ NELS(dep237), dep237, NELS(dep236), dep236, },
- { NELS(dep238), dep238, NELS(dep236), dep236, },
- { NELS(dep240), dep240, NELS(dep239), dep239, },
- { NELS(dep241), dep241, NELS(dep239), dep239, },
- { NELS(dep240), dep240, NELS(dep242), dep242, },
- { NELS(dep243), dep243, NELS(dep217), dep217, },
- { NELS(dep244), dep244, NELS(dep31), dep31, },
- { NELS(dep245), dep245, NELS(dep31), dep31, },
- { NELS(dep246), dep246, NELS(dep0), dep0, },
- { NELS(dep247), dep247, NELS(dep0), dep0, },
- { NELS(dep248), dep248, NELS(dep62), dep62, },
- { NELS(dep249), dep249, NELS(dep222), dep222, },
+ { NELS(dep238), dep238, NELS(dep64), dep64, },
+ { NELS(dep239), dep239, NELS(dep64), dep64, },
+ { NELS(dep241), dep241, NELS(dep240), dep240, },
+ { NELS(dep242), dep242, NELS(dep240), dep240, },
+ { NELS(dep241), dep241, NELS(dep243), dep243, },
+ { NELS(dep245), dep245, NELS(dep244), dep244, },
+ { NELS(dep246), dep246, NELS(dep244), dep244, },
+ { NELS(dep248), dep248, NELS(dep247), dep247, },
+ { NELS(dep249), dep249, NELS(dep247), dep247, },
+ { NELS(dep248), dep248, NELS(dep250), dep250, },
+ { NELS(dep251), dep251, NELS(dep225), dep225, },
+ { NELS(dep252), dep252, NELS(dep33), dep33, },
+ { NELS(dep253), dep253, NELS(dep0), dep0, },
+ { NELS(dep254), dep254, NELS(dep64), dep64, },
+ { NELS(dep255), dep255, NELS(dep230), dep230, },
{ 0, NULL, 0, NULL, },
- { NELS(dep251), dep251, NELS(dep250), dep250, },
+ { NELS(dep257), dep257, NELS(dep256), dep256, },
};
static const struct ia64_completer_table
@@ -1810,156 +1920,156 @@
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 88 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 88 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 95 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 95 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 576, -1, 0, 1, 6 },
- { 0x0, 0x0, 0, 639, -1, 0, 1, 17 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 157 },
- { 0x0, 0x0, 0, 738, -1, 0, 1, 17 },
- { 0x0, 0x0, 0, 2164, -1, 0, 1, 10 },
+ { 0x0, 0x0, 0, 594, -1, 0, 1, 6 },
+ { 0x0, 0x0, 0, 657, -1, 0, 1, 18 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 162 },
+ { 0x0, 0x0, 0, 756, -1, 0, 1, 18 },
+ { 0x0, 0x0, 0, 2198, -1, 0, 1, 10 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 9 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 13 },
{ 0x1, 0x1, 0, -1, -1, 13, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, 2372, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, 1122, -1, 0, 1, 122 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 44 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 40 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 78 },
- { 0x0, 0x0, 0, 2212, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2439, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2216, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, 2218, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2448, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2451, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2473, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 2476, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 35 },
- { 0x0, 0x0, 0, 2484, -1, 0, 1, 29 },
- { 0x0, 0x0, 0, 1391, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 40 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 157 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 77 },
- { 0x0, 0x0, 0, 1439, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1448, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1457, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1459, -1, 0, 1, 125 },
- { 0x0, 0x0, 0, 1461, -1, 0, 1, 125 },
- { 0x0, 0x0, 0, 1470, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1479, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1488, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1497, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1506, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1515, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1525, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1535, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1545, -1, 0, 1, 124 },
- { 0x0, 0x0, 0, 1554, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1560, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1566, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1572, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1578, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1584, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1590, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1596, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1602, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1608, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1614, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1620, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1626, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1632, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1638, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1644, -1, 0, 1, 140 },
- { 0x0, 0x0, 0, 1650, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1656, -1, 0, 1, 145 },
- { 0x0, 0x0, 0, 1660, -1, 0, 1, 151 },
- { 0x0, 0x0, 0, 1664, -1, 0, 1, 153 },
- { 0x0, 0x0, 0, 1668, -1, 0, 1, 153 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 79 },
- { 0x0, 0x0, 0, 256, -1, 0, 1, 40 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, 2406, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, 1140, -1, 0, 1, 129 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 45 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 41 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 84 },
+ { 0x0, 0x0, 0, 2246, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2473, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2250, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, 2252, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2482, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2485, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2507, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 2510, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 25 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 25 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 25 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 25 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 36 },
+ { 0x0, 0x0, 0, 2518, -1, 0, 1, 30 },
+ { 0x0, 0x0, 0, 1409, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 41 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 162 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 83 },
+ { 0x0, 0x0, 0, 1457, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1466, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1475, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1477, -1, 0, 1, 132 },
+ { 0x0, 0x0, 0, 1479, -1, 0, 1, 132 },
+ { 0x0, 0x0, 0, 1488, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1497, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1506, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1515, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1524, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1533, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1543, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1553, -1, 0, 1, 131 },
+ { 0x0, 0x0, 0, 1563, -1, 0, 1, 131 },
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+ { 0x0, 0x0, 0, 1578, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1584, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1590, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1596, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1602, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1608, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1614, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1620, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1626, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1632, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1638, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1644, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1650, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1656, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1662, -1, 0, 1, 147 },
+ { 0x0, 0x0, 0, 1668, -1, 0, 1, 152 },
+ { 0x0, 0x0, 0, 1674, -1, 0, 1, 152 },
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+ { 0x0, 0x0, 0, 1682, -1, 0, 1, 159 },
+ { 0x0, 0x0, 0, 1686, -1, 0, 1, 159 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 85 },
+ { 0x0, 0x0, 0, 258, -1, 0, 1, 41 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
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- { 0x0, 0x0, 0, -1, -1, 0, 1, 67 },
- { 0x1, 0x1, 0, 1148, -1, 20, 1, 67 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 34 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 68 },
+ { 0x1, 0x1, 0, 1166, -1, 20, 1, 68 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 69 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 69 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 70 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 70 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 71 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 72 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 86 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 87 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 89 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 90 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 91 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 92 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 73 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 93 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 94 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 96 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 97 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 98 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 99 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 100 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 101 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 102 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 103 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 104 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 105 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 106 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 107 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 108 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 109 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 110 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 111 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 112 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 113 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 158 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 158 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 158 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 71 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 114 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 115 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 116 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 117 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 118 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 119 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 120 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 163 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 163 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 163 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 72 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 157 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 162 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2824, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2825, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2858, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2859, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2176, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2177, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2210, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2211, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2839, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2873, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
@@ -1967,393 +2077,393 @@
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2840, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2841, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2842, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2843, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2874, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2875, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2876, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2877, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2826, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, 2827, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2860, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2861, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 11 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 84 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 83 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 91 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 89 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x1, 0x1, 0, -1, -1, 13, 1, 0 },
- { 0x0, 0x0, 0, 2845, -1, 0, 1, 0 },
+ { 0x0, 0x0, 0, 2879, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 84 },
- { 0x0, 0x0, 0, 1948, -1, 0, 1, 131 },
- { 0x0, 0x0, 0, 1950, -1, 0, 1, 138 },
- { 0x0, 0x0, 0, 1952, -1, 0, 1, 132 },
- { 0x0, 0x0, 0, 1954, -1, 0, 1, 132 },
- { 0x0, 0x0, 0, 1956, -1, 0, 1, 131 },
- { 0x0, 0x0, 0, 1958, -1, 0, 1, 138 },
- { 0x0, 0x0, 0, 1960, -1, 0, 1, 131 },
- { 0x0, 0x0, 0, 1962, -1, 0, 1, 138 },
- { 0x0, 0x0, 0, 1965, -1, 0, 1, 131 },
- { 0x0, 0x0, 0, 1968, -1, 0, 1, 138 },
- { 0x0, 0x0, 0, 1971, -1, 0, 1, 150 },
- { 0x0, 0x0, 0, 1972, -1, 0, 1, 156 },
- { 0x0, 0x0, 0, 1973, -1, 0, 1, 150 },
- { 0x0, 0x0, 0, 1974, -1, 0, 1, 156 },
- { 0x0, 0x0, 0, 1975, -1, 0, 1, 150 },
- { 0x0, 0x0, 0, 1976, -1, 0, 1, 156 },
- { 0x0, 0x0, 0, 1977, -1, 0, 1, 150 },
- { 0x0, 0x0, 0, 1978, -1, 0, 1, 156 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 90 },
+ { 0x0, 0x0, 0, 1966, -1, 0, 1, 138 },
+ { 0x0, 0x0, 0, 1968, -1, 0, 1, 145 },
+ { 0x0, 0x0, 0, 1970, -1, 0, 1, 139 },
+ { 0x0, 0x0, 0, 1972, -1, 0, 1, 139 },
+ { 0x0, 0x0, 0, 1974, -1, 0, 1, 138 },
+ { 0x0, 0x0, 0, 1976, -1, 0, 1, 145 },
+ { 0x0, 0x0, 0, 1978, -1, 0, 1, 138 },
+ { 0x0, 0x0, 0, 1980, -1, 0, 1, 145 },
+ { 0x0, 0x0, 0, 1983, -1, 0, 1, 138 },
+ { 0x0, 0x0, 0, 1986, -1, 0, 1, 145 },
+ { 0x0, 0x0, 0, 1989, -1, 0, 1, 157 },
+ { 0x0, 0x0, 0, 1990, -1, 0, 1, 161 },
+ { 0x0, 0x0, 0, 1991, -1, 0, 1, 157 },
+ { 0x0, 0x0, 0, 1992, -1, 0, 1, 161 },
+ { 0x0, 0x0, 0, 1993, -1, 0, 1, 157 },
+ { 0x0, 0x0, 0, 1994, -1, 0, 1, 161 },
+ { 0x0, 0x0, 0, 1995, -1, 0, 1, 157 },
+ { 0x0, 0x0, 0, 1996, -1, 0, 1, 161 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 82 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 88 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 120 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 118 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 120 },
- { 0x0, 0x0, 0, -1, -1, 0, 1, 119 },
- { 0x0, 0x0, 0, 1669, -1, 0, 1, 136 },
- { 0x0, 0x0, 0, 1670, -1, 0, 1, 136 },
- { 0x0, 0x0, 0, 1671, -1, 0, 1, 136 },
- { 0x0, 0x0, 0, 1672, -1, 0, 1, 136 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 127 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 125 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 127 },
+ { 0x0, 0x0, 0, -1, -1, 0, 1, 126 },
+ { 0x0, 0x0, 0, 1687, -1, 0, 1, 143 },
+ { 0x0, 0x0, 0, 1688, -1, 0, 1, 143 },
+ { 0x0, 0x0, 0, 1689, -1, 0, 1, 143 },
+ { 0x0, 0x0, 0, 1690, -1, 0, 1, 143 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
{ 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 1, 223, -1, 0, 1, 12 },
+ { 0x0, 0x0, 1, 224, -1, 0, 1, 12 },
+ { 0x0, 0x0, 1, 225, -1, 0, 1, 14 },
{ 0x1, 0x1, 2, -1, -1, 27, 1, 12 },
- { 0x0, 0x0, 3, -1, 1322, 0, 0, -1 },
- { 0x0, 0x0, 3, -1, 1323, 0, 0, -1 },
- { 0x1, 0x1, 3, 2715, 1432, 33, 1, 127 },
- { 0x1, 0x1, 3, 2716, 1441, 33, 1, 127 },
- { 0x1, 0x1, 3, 2717, 1450, 33, 1, 127 },
- { 0x1, 0x1, 3, 2718, 1463, 33, 1, 127 },
- { 0x1, 0x1, 3, 2719, 1472, 33, 1, 127 },
- { 0x1, 0x1, 3, 2720, 1481, 33, 1, 127 },
- { 0x1, 0x1, 3, 2721, 1490, 33, 1, 127 },
- { 0x1, 0x1, 3, 2722, 1499, 33, 1, 127 },
- { 0x1, 0x1, 3, 2723, 1508, 33, 1, 127 },
- { 0x1, 0x1, 3, 2724, 1517, 33, 1, 127 },
- { 0x1, 0x1, 3, 2725, 1527, 33, 1, 127 },
- { 0x1, 0x1, 3, 2726, 1537, 33, 1, 127 },
- { 0x1, 0x1, 3, 2727, 1550, 33, 1, 142 },
- { 0x1, 0x1, 3, 2728, 1556, 33, 1, 147 },
- { 0x1, 0x1, 3, 2729, 1562, 33, 1, 147 },
- { 0x1, 0x1, 3, 2730, 1568, 33, 1, 142 },
- { 0x1, 0x1, 3, 2731, 1574, 33, 1, 147 },
- { 0x1, 0x1, 3, 2732, 1580, 33, 1, 147 },
- { 0x1, 0x1, 3, 2733, 1586, 33, 1, 142 },
- { 0x1, 0x1, 3, 2734, 1592, 33, 1, 147 },
- { 0x1, 0x1, 3, 2735, 1598, 33, 1, 147 },
- { 0x1, 0x1, 3, 2736, 1604, 33, 1, 142 },
- { 0x1, 0x1, 3, 2737, 1610, 33, 1, 147 },
- { 0x1, 0x1, 3, 2738, 1616, 33, 1, 142 },
- { 0x1, 0x1, 3, 2739, 1622, 33, 1, 147 },
- { 0x1, 0x1, 3, 2740, 1628, 33, 1, 142 },
- { 0x1, 0x1, 3, 2741, 1634, 33, 1, 147 },
- { 0x1, 0x1, 3, 2742, 1640, 33, 1, 142 },
- { 0x1, 0x1, 3, 2743, 1646, 33, 1, 147 },
- { 0x1, 0x1, 3, 2744, 1652, 33, 1, 147 },
- { 0x1, 0x1, 3, -1, -1, 27, 1, 40 },
- { 0x0, 0x0, 4, 2178, 1407, 0, 1, 135 },
- { 0x0, 0x0, 4, 2179, 1409, 0, 1, 135 },
- { 0x0, 0x0, 4, 2180, 1411, 0, 1, 134 },
- { 0x0, 0x0, 4, 2181, 1413, 0, 1, 134 },
- { 0x0, 0x0, 4, 2182, 1415, 0, 1, 134 },
- { 0x0, 0x0, 4, 2183, 1417, 0, 1, 134 },
- { 0x0, 0x0, 4, 2184, 1419, 0, 1, 134 },
- { 0x0, 0x0, 4, 2185, 1421, 0, 1, 134 },
- { 0x0, 0x0, 4, 2186, 1423, 0, 1, 134 },
- { 0x0, 0x0, 4, 2187, 1425, 0, 1, 134 },
- { 0x0, 0x0, 4, 2188, 1427, 0, 1, 136 },
- { 0x0, 0x0, 4, 2189, 1429, 0, 1, 136 },
- { 0x1, 0x1, 4, -1, 1436, 33, 1, 130 },
- { 0x5, 0x5, 4, 534, 1435, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1445, 33, 1, 130 },
- { 0x5, 0x5, 4, 535, 1444, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1454, 33, 1, 130 },
- { 0x5, 0x5, 4, 536, 1453, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1458, 32, 1, 125 },
- { 0x1, 0x1, 4, -1, 1460, 32, 1, 125 },
- { 0x1, 0x1, 4, -1, 1467, 33, 1, 130 },
- { 0x5, 0x5, 4, 537, 1466, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1476, 33, 1, 130 },
- { 0x5, 0x5, 4, 538, 1475, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1485, 33, 1, 130 },
- { 0x5, 0x5, 4, 539, 1484, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1494, 33, 1, 130 },
- { 0x5, 0x5, 4, 540, 1493, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1503, 33, 1, 130 },
- { 0x5, 0x5, 4, 541, 1502, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1512, 33, 1, 130 },
- { 0x5, 0x5, 4, 542, 1511, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1522, 33, 1, 130 },
- { 0x5, 0x5, 4, 1018, 1520, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1532, 33, 1, 130 },
- { 0x5, 0x5, 4, 1019, 1530, 32, 1, 124 },
- { 0x1, 0x1, 4, -1, 1542, 33, 1, 130 },
- { 0x5, 0x5, 4, 1020, 1540, 32, 1, 124 },
- { 0x1, 0x21, 10, 1991, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 1992, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 410, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2048, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, -1, 2049, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2050, 0, 0, -1 },
- { 0x0, 0x0, 10, 1995, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 1996, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 1997, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 1998, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 420, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2054, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 424, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2056, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 428, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2058, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 432, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2060, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 436, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2062, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 440, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2064, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 2011, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2012, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 450, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2070, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, -1, 2071, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2072, 0, 0, -1 },
+ { 0x1, 0x1, 2, -1, -1, 27, 1, 14 },
+ { 0x0, 0x0, 3, -1, 1340, 0, 0, -1 },
+ { 0x0, 0x0, 3, -1, 1341, 0, 0, -1 },
+ { 0x1, 0x1, 3, 2749, 1450, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2750, 1459, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2751, 1468, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2752, 1481, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2753, 1490, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2754, 1499, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2755, 1508, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2756, 1517, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2757, 1526, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2758, 1535, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2759, 1545, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2760, 1555, 33, 1, 134 },
+ { 0x1, 0x1, 3, 2761, 1568, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2762, 1574, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2763, 1580, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2764, 1586, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2765, 1592, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2766, 1598, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2767, 1604, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2768, 1610, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2769, 1616, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2770, 1622, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2771, 1628, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2772, 1634, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2773, 1640, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2774, 1646, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2775, 1652, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2776, 1658, 33, 1, 149 },
+ { 0x1, 0x1, 3, 2777, 1664, 33, 1, 154 },
+ { 0x1, 0x1, 3, 2778, 1670, 33, 1, 154 },
+ { 0x1, 0x1, 3, -1, -1, 27, 1, 41 },
+ { 0x0, 0x0, 4, 2212, 1425, 0, 1, 142 },
+ { 0x0, 0x0, 4, 2213, 1427, 0, 1, 142 },
+ { 0x0, 0x0, 4, 2214, 1429, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2215, 1431, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2216, 1433, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2217, 1435, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2218, 1437, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2219, 1439, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2220, 1441, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2221, 1443, 0, 1, 141 },
+ { 0x0, 0x0, 4, 2222, 1445, 0, 1, 143 },
+ { 0x0, 0x0, 4, 2223, 1447, 0, 1, 143 },
+ { 0x1, 0x1, 4, -1, 1454, 33, 1, 137 },
+ { 0x5, 0x5, 4, 552, 1453, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1463, 33, 1, 137 },
+ { 0x5, 0x5, 4, 553, 1462, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1472, 33, 1, 137 },
+ { 0x5, 0x5, 4, 554, 1471, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1476, 32, 1, 132 },
+ { 0x1, 0x1, 4, -1, 1478, 32, 1, 132 },
+ { 0x1, 0x1, 4, -1, 1485, 33, 1, 137 },
+ { 0x5, 0x5, 4, 555, 1484, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1494, 33, 1, 137 },
+ { 0x5, 0x5, 4, 556, 1493, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1503, 33, 1, 137 },
+ { 0x5, 0x5, 4, 557, 1502, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1512, 33, 1, 137 },
+ { 0x5, 0x5, 4, 558, 1511, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1521, 33, 1, 137 },
+ { 0x5, 0x5, 4, 559, 1520, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1530, 33, 1, 137 },
+ { 0x5, 0x5, 4, 560, 1529, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1540, 33, 1, 137 },
+ { 0x5, 0x5, 4, 1036, 1538, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1550, 33, 1, 137 },
+ { 0x5, 0x5, 4, 1037, 1548, 32, 1, 131 },
+ { 0x1, 0x1, 4, -1, 1560, 33, 1, 137 },
+ { 0x5, 0x5, 4, 1038, 1558, 32, 1, 131 },
+ { 0x1, 0x21, 10, 2013, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2014, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 420, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2074, -1, 12, 1, 3 },
{ 0x0, 0x0, 10, -1, 2075, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2076, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2077, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2078, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2079, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2080, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2081, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2082, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2083, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2084, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2085, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2086, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2087, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2088, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2089, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2090, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2091, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2092, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2093, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2094, 0, 0, -1 },
- { 0x1, 0x21, 10, 2015, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2016, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 458, -1, 33, 1, 3 },
+ { 0x0, 0x0, 10, 2017, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2018, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 2019, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2020, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 430, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2080, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 434, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2082, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 438, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2084, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 442, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2086, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 446, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2088, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 450, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2090, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 2033, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2034, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 460, -1, 33, 1, 3 },
{ 0x200001, 0x200001, 10, 2096, -1, 12, 1, 3 },
{ 0x0, 0x0, 10, -1, 2097, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2098, 0, 0, -1 },
- { 0x0, 0x0, 10, 2019, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2020, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 2021, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2022, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 468, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2102, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 472, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2104, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 476, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2106, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 480, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2108, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, 484, -1, 0, 1, 3 },
- { 0x1, 0x1, 10, 2110, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 488, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2112, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 2035, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2036, -1, 12, 1, 3 },
- { 0x1, 0x21, 10, 498, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 10, 2118, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, -1, 2101, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2102, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2103, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2104, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2105, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2106, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2107, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2108, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2109, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2110, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2111, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2112, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2113, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2114, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2115, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2116, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2117, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2118, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2119, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2120, 0, 0, -1 },
+ { 0x1, 0x21, 10, 2037, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2038, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 468, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2122, -1, 12, 1, 3 },
{ 0x0, 0x0, 10, -1, 2123, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2124, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2125, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2126, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2127, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2128, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2129, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2130, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2131, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2132, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2133, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2134, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2135, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2136, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2137, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2138, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2139, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2140, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2141, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2142, 0, 0, -1 },
- { 0x1, 0x1, 10, 2039, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 10, 2040, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 2041, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 10, 2042, -1, 12, 1, 3 },
- { 0x0, 0x0, 10, -1, 2143, 0, 0, -1 },
+ { 0x0, 0x0, 10, 2041, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2042, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 2043, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2044, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 478, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2128, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 482, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2130, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 486, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2132, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 490, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2134, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, 494, -1, 0, 1, 3 },
+ { 0x1, 0x1, 10, 2136, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 498, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2138, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 2057, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2058, -1, 12, 1, 3 },
+ { 0x1, 0x21, 10, 508, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 10, 2144, -1, 12, 1, 3 },
{ 0x0, 0x0, 10, -1, 2145, 0, 0, -1 },
- { 0x0, 0x0, 10, -1, 2147, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2146, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2149, 0, 0, -1 },
- { 0x1, 0x1, 10, 2043, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 10, 2044, -1, 12, 1, 3 },
- { 0x1, 0x1, 10, 2045, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 10, 2046, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, -1, 2150, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2151, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2152, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2153, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2154, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2155, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2156, 0, 0, -1 },
{ 0x0, 0x0, 10, -1, 2157, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2158, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2159, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2160, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2161, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2162, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2163, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2164, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2165, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2166, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2167, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2168, 0, 0, -1 },
+ { 0x1, 0x1, 10, 2061, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 10, 2062, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 2063, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 10, 2064, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, -1, 2169, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2171, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2173, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2175, 0, 0, -1 },
+ { 0x1, 0x1, 10, 2065, -1, 36, 1, 78 },
+ { 0x1000001, 0x1000001, 10, 2066, -1, 12, 1, 78 },
+ { 0x1, 0x1, 10, 2067, -1, 36, 1, 78 },
+ { 0x1000001, 0x1000001, 10, 2068, -1, 12, 1, 78 },
+ { 0x0, 0x0, 10, -1, 2177, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2179, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2181, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2183, 0, 0, -1 },
+ { 0x1, 0x1, 10, 2069, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 10, 2070, -1, 12, 1, 3 },
+ { 0x1, 0x1, 10, 2071, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 10, 2072, -1, 12, 1, 3 },
+ { 0x0, 0x0, 10, -1, 2185, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2187, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2189, 0, 0, -1 },
+ { 0x0, 0x0, 10, -1, 2191, 0, 0, -1 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x4200001, 11, 1993, -1, 12, 1, 3 },
+ { 0x200001, 0x4200001, 11, 2015, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 298, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2051, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2052, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 300, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2077, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2078, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 1999, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2021, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 306, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 308, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2001, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2023, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 308, -1, 33, 1, 3 },
+ { 0x1, 0x1, 11, 310, -1, 33, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 2003, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2025, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 310, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 312, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2005, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2027, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 312, -1, 33, 1, 3 },
+ { 0x1, 0x1, 11, 314, -1, 33, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 2007, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2029, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 314, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 316, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2009, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2031, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 316, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2065, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2066, -1, 12, 1, 3 },
- { 0x1, 0x1, 11, 2067, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 11, 2068, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 318, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2091, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2092, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2093, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 11, 2094, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x4200001, 11, 2013, -1, 12, 1, 3 },
+ { 0x200001, 0x4200001, 11, 2035, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 320, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2073, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2074, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 322, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2099, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2100, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x4200001, 11, 2017, -1, 12, 1, 3 },
+ { 0x200001, 0x4200001, 11, 2039, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 346, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2099, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2100, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 348, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2125, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2126, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 2023, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2045, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 354, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 356, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2025, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2047, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 356, -1, 33, 1, 3 },
+ { 0x1, 0x1, 11, 358, -1, 33, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 2027, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2049, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 358, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 360, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2029, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2051, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 360, -1, 33, 1, 3 },
+ { 0x1, 0x1, 11, 362, -1, 33, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 2031, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2053, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x0, 0x0, 11, 362, -1, 0, 1, 3 },
+ { 0x0, 0x0, 11, 364, -1, 0, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x200001, 11, 2033, -1, 12, 1, 3 },
+ { 0x200001, 0x200001, 11, 2055, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 364, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2113, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2114, -1, 12, 1, 3 },
- { 0x1, 0x1, 11, 2115, -1, 33, 1, 3 },
- { 0x200001, 0x200001, 11, 2116, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 366, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2139, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2140, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2141, -1, 33, 1, 3 },
+ { 0x200001, 0x200001, 11, 2142, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x200001, 0x4200001, 11, 2037, -1, 12, 1, 3 },
+ { 0x200001, 0x4200001, 11, 2059, -1, 12, 1, 3 },
{ 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
- { 0x1, 0x1, 11, 368, -1, 33, 1, 3 },
- { 0x0, 0x0, 11, 2121, -1, 0, 1, 3 },
- { 0x1, 0x1, 11, 2122, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 370, -1, 33, 1, 3 },
+ { 0x0, 0x0, 11, 2147, -1, 0, 1, 3 },
+ { 0x1, 0x1, 11, 2148, -1, 12, 1, 3 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
- { 0x1, 0x1, 11, 2144, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 11, 2146, -1, 12, 1, 3 },
- { 0x1, 0x1, 11, 2148, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 11, 2150, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2170, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 11, 2172, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2174, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 11, 2176, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, -1, -1, 36, 1, 80 },
+ { 0x1, 0x1, 11, -1, -1, 36, 1, 80 },
+ { 0x1, 0x1, 11, -1, -1, 36, 1, 80 },
+ { 0x1, 0x1, 11, -1, -1, 36, 1, 80 },
+ { 0x1, 0x1, 11, 2178, -1, 36, 1, 78 },
+ { 0x1000001, 0x1000001, 11, 2180, -1, 12, 1, 78 },
+ { 0x1, 0x1, 11, 2182, -1, 36, 1, 78 },
+ { 0x1000001, 0x1000001, 11, 2184, -1, 12, 1, 78 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
{ 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
- { 0x1, 0x1, 11, 2152, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 11, 2154, -1, 12, 1, 3 },
- { 0x1, 0x1, 11, 2156, -1, 36, 1, 3 },
- { 0x1000001, 0x1000001, 11, 2158, -1, 12, 1, 3 },
- { 0x0, 0x0, 12, -1, -1, 0, 1, 14 },
- { 0x0, 0x0, 12, -1, -1, 0, 1, 14 },
- { 0x0, 0x0, 12, -1, -1, 0, 1, 14 },
- { 0x1, 0x1, 13, 270, 1434, 34, 1, 124 },
- { 0x1, 0x1, 13, 272, 1443, 34, 1, 124 },
- { 0x1, 0x1, 13, 274, 1452, 34, 1, 124 },
- { 0x1, 0x1, 13, 278, 1465, 34, 1, 124 },
- { 0x1, 0x1, 13, 280, 1474, 34, 1, 124 },
- { 0x1, 0x1, 13, 282, 1483, 34, 1, 124 },
- { 0x1, 0x1, 13, 284, 1492, 34, 1, 124 },
- { 0x1, 0x1, 13, 286, 1501, 34, 1, 124 },
- { 0x1, 0x1, 13, 288, 1510, 34, 1, 124 },
- { 0x1, 0x1, 13, 290, 1519, 34, 1, 124 },
- { 0x1, 0x1, 13, 292, 1529, 34, 1, 124 },
- { 0x1, 0x1, 13, 294, 1539, 34, 1, 124 },
- { 0x0, 0x0, 19, -1, 777, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 778, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 779, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 780, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 781, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 782, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 783, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 784, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 785, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 786, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 787, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 788, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 789, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 790, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 791, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 792, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 793, 0, 0, -1 },
- { 0x0, 0x0, 19, -1, 794, 0, 0, -1 },
+ { 0x1, 0x1, 11, 2186, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 11, 2188, -1, 12, 1, 3 },
+ { 0x1, 0x1, 11, 2190, -1, 36, 1, 3 },
+ { 0x1000001, 0x1000001, 11, 2192, -1, 12, 1, 3 },
+ { 0x0, 0x0, 12, -1, -1, 0, 1, 15 },
+ { 0x0, 0x0, 12, -1, -1, 0, 1, 15 },
+ { 0x0, 0x0, 12, -1, -1, 0, 1, 15 },
+ { 0x1, 0x1, 13, 272, 1452, 34, 1, 131 },
+ { 0x1, 0x1, 13, 274, 1461, 34, 1, 131 },
+ { 0x1, 0x1, 13, 276, 1470, 34, 1, 131 },
+ { 0x1, 0x1, 13, 280, 1483, 34, 1, 131 },
+ { 0x1, 0x1, 13, 282, 1492, 34, 1, 131 },
+ { 0x1, 0x1, 13, 284, 1501, 34, 1, 131 },
+ { 0x1, 0x1, 13, 286, 1510, 34, 1, 131 },
+ { 0x1, 0x1, 13, 288, 1519, 34, 1, 131 },
+ { 0x1, 0x1, 13, 290, 1528, 34, 1, 131 },
+ { 0x1, 0x1, 13, 292, 1537, 34, 1, 131 },
+ { 0x1, 0x1, 13, 294, 1547, 34, 1, 131 },
+ { 0x1, 0x1, 13, 296, 1557, 34, 1, 131 },
{ 0x0, 0x0, 19, -1, 795, 0, 0, -1 },
{ 0x0, 0x0, 19, -1, 796, 0, 0, -1 },
{ 0x0, 0x0, 19, -1, 797, 0, 0, -1 },
@@ -2366,19 +2476,37 @@
{ 0x0, 0x0, 19, -1, 804, 0, 0, -1 },
{ 0x0, 0x0, 19, -1, 805, 0, 0, -1 },
{ 0x0, 0x0, 19, -1, 806, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2793, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2794, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2809, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2810, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2815, 0, 0, -1 },
- { 0x0, 0x0, 20, -1, 2816, 0, 0, -1 },
- { 0x0, 0x0, 21, 813, 2805, 0, 0, -1 },
- { 0x0, 0x0, 21, 814, 2807, 0, 0, -1 },
- { 0x0, 0x0, 23, -1, 2803, 0, 0, -1 },
- { 0x0, 0x0, 23, -1, 2804, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 807, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 808, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 809, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 810, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 811, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 812, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 813, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 814, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 815, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 816, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 817, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 818, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 819, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 820, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 821, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 822, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 823, 0, 0, -1 },
+ { 0x0, 0x0, 19, -1, 824, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2827, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2828, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2843, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2844, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2849, 0, 0, -1 },
+ { 0x0, 0x0, 20, -1, 2850, 0, 0, -1 },
+ { 0x0, 0x0, 21, 831, 2839, 0, 0, -1 },
+ { 0x0, 0x0, 21, 832, 2841, 0, 0, -1 },
+ { 0x0, 0x0, 23, -1, 2837, 0, 0, -1 },
+ { 0x0, 0x0, 23, -1, 2838, 0, 0, -1 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
- { 0x1, 0x1, 24, 1254, -1, 35, 1, 6 },
+ { 0x1, 0x1, 24, 1272, -1, 35, 1, 6 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
@@ -2427,47 +2555,21 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, 1275, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 16 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, 1293, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
@@ -2490,6 +2592,8 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
@@ -2502,6 +2606,18 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
@@ -2514,18 +2630,6 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
@@ -2538,33 +2642,6 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, 1308, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
- { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
@@ -2577,1302 +2654,1361 @@
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
{ 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
- { 0x1, 0x1, 24, -1, -1, 33, 1, 76 },
- { 0x1, 0x1, 24, -1, -1, 33, 1, 76 },
- { 0x1, 0x1, 24, 1324, 1437, 35, 1, 130 },
- { 0x1, 0x1, 24, 1325, 1446, 35, 1, 130 },
- { 0x1, 0x1, 24, 1326, 1455, 35, 1, 130 },
- { 0x1, 0x1, 24, 1327, 1468, 35, 1, 130 },
- { 0x1, 0x1, 24, 1328, 1477, 35, 1, 130 },
- { 0x1, 0x1, 24, 1329, 1486, 35, 1, 130 },
- { 0x1, 0x1, 24, 1330, 1495, 35, 1, 130 },
- { 0x1, 0x1, 24, 1331, 1504, 35, 1, 130 },
- { 0x1, 0x1, 24, 1332, 1513, 35, 1, 130 },
- { 0x1, 0x1, 24, 1333, 1523, 35, 1, 130 },
- { 0x1, 0x1, 24, 1334, 1533, 35, 1, 130 },
- { 0x1, 0x1, 24, 1335, 1543, 35, 1, 130 },
- { 0x1, 0x1, 24, 1336, 1552, 35, 1, 144 },
- { 0x1, 0x1, 24, 1337, 1558, 35, 1, 149 },
- { 0x1, 0x1, 24, 1338, 1564, 35, 1, 149 },
- { 0x1, 0x1, 24, 1339, 1570, 35, 1, 144 },
- { 0x1, 0x1, 24, 1340, 1576, 35, 1, 149 },
- { 0x1, 0x1, 24, 1341, 1582, 35, 1, 149 },
- { 0x1, 0x1, 24, 1342, 1588, 35, 1, 144 },
- { 0x1, 0x1, 24, 1343, 1594, 35, 1, 149 },
- { 0x1, 0x1, 24, 1344, 1600, 35, 1, 149 },
- { 0x1, 0x1, 24, 1345, 1606, 35, 1, 144 },
- { 0x1, 0x1, 24, 1346, 1612, 35, 1, 149 },
- { 0x1, 0x1, 24, 1347, 1618, 35, 1, 144 },
- { 0x1, 0x1, 24, 1348, 1624, 35, 1, 149 },
- { 0x1, 0x1, 24, 1349, 1630, 35, 1, 144 },
- { 0x1, 0x1, 24, 1350, 1636, 35, 1, 149 },
- { 0x1, 0x1, 24, 1351, 1642, 35, 1, 144 },
- { 0x1, 0x1, 24, 1352, 1648, 35, 1, 149 },
- { 0x1, 0x1, 24, 1353, 1654, 35, 1, 149 },
- { 0x0, 0x0, 33, 2787, 2785, 0, 0, -1 },
- { 0x0, 0x0, 33, 2790, 2788, 0, 0, -1 },
- { 0x0, 0x0, 33, 2796, 2795, 0, 0, -1 },
- { 0x0, 0x0, 33, 2798, 2797, 0, 0, -1 },
- { 0x0, 0x0, 33, 2812, 2811, 0, 0, -1 },
- { 0x0, 0x0, 33, 2814, 2813, 0, 0, -1 },
- { 0x0, 0x0, 35, -1, 2806, 0, 0, -1 },
- { 0x0, 0x0, 35, -1, 2808, 0, 0, -1 },
- { 0x1, 0x1, 38, -1, 2256, 37, 1, 29 },
- { 0x1, 0x1, 38, -1, 2315, 37, 1, 29 },
- { 0x0, 0x0, 38, -1, 2318, 0, 0, -1 },
- { 0x1, 0x1, 38, -1, -1, 37, 1, 29 },
- { 0x1, 0x1, 38, -1, 2323, 37, 1, 29 },
- { 0x0, 0x0, 38, -1, 2326, 0, 0, -1 },
- { 0x1, 0x1, 38, -1, -1, 37, 1, 29 },
- { 0x0, 0x0, 38, -1, 2329, 0, 0, -1 },
- { 0x1, 0x1, 38, -1, -1, 37, 1, 29 },
- { 0x1, 0x1, 38, -1, 2332, 37, 1, 29 },
- { 0x1, 0x1, 38, -1, 2335, 37, 1, 29 },
- { 0x1, 0x1, 38, -1, 2368, 37, 1, 29 },
- { 0x3, 0x3, 38, -1, -1, 30, 1, 137 },
- { 0x0, 0x0, 38, 1124, -1, 0, 1, 95 },
- { 0x0, 0x0, 38, -1, -1, 0, 1, 104 },
- { 0x0, 0x0, 38, 1130, -1, 0, 1, 116 },
- { 0x3, 0x3, 38, -1, -1, 30, 1, 155 },
- { 0x0, 0x0, 38, 1131, -1, 0, 1, 40 },
- { 0x0, 0x0, 40, -1, 955, 0, 0, -1 },
- { 0x0, 0x0, 40, -1, 963, 0, 0, -1 },
- { 0x0, 0x0, 40, 1133, 959, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 604, 33, 1, 6 },
- { 0x18000001, 0x18000001, 40, -1, 612, 6, 1, 7 },
- { 0x3, 0x3, 40, 1134, 608, 33, 1, 6 },
- { 0x0, 0x0, 40, -1, 967, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 624, 33, 1, 8 },
- { 0x0, 0x0, 40, -1, 971, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 636, 33, 1, 15 },
- { 0x0, 0x0, 40, -1, 976, 0, 0, -1 },
- { 0x0, 0x0, 40, -1, 980, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 659, 33, 1, 17 },
- { 0x3, 0x3, 40, -1, 663, 33, 1, 17 },
- { 0x0, 0x0, 40, -1, 984, 0, 0, -1 },
- { 0x0, 0x0, 40, -1, 988, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 683, 33, 1, 18 },
- { 0x18000001, 0x18000001, 40, -1, 687, 6, 1, 18 },
- { 0x0, 0x0, 40, -1, 992, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 699, 33, 1, 19 },
- { 0x0, 0x0, 40, -1, 996, 0, 0, -1 },
- { 0x0, 0x0, 40, -1, 1000, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 719, 33, 1, 20 },
- { 0x18000001, 0x18000001, 40, -1, 723, 6, 1, 20 },
- { 0x0, 0x0, 40, -1, 1004, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 735, 33, 1, 21 },
- { 0x0, 0x0, 40, -1, 1009, 0, 0, -1 },
- { 0x0, 0x0, 40, -1, 1013, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 758, 33, 1, 17 },
- { 0x3, 0x3, 40, -1, 762, 33, 1, 17 },
- { 0x0, 0x0, 40, -1, 1017, 0, 0, -1 },
- { 0x3, 0x3, 40, -1, 774, 33, 1, 21 },
- { 0x0, 0x0, 41, 833, 954, 0, 0, -1 },
- { 0x0, 0x0, 41, 834, 962, 0, 0, -1 },
- { 0x0, 0x0, 41, 835, 958, 0, 0, -1 },
- { 0x1, 0x1, 41, 836, 603, 34, 1, 6 },
- { 0x10000001, 0x10000001, 41, 837, 611, 6, 1, 7 },
- { 0x1, 0x1, 41, 838, 607, 34, 1, 6 },
- { 0x0, 0x0, 41, 839, 966, 0, 0, -1 },
- { 0x1, 0x1, 41, 840, 623, 34, 1, 8 },
- { 0x0, 0x0, 41, 841, 970, 0, 0, -1 },
- { 0x1, 0x1, 41, 842, 635, 34, 1, 15 },
- { 0x0, 0x0, 41, 843, 975, 0, 0, -1 },
- { 0x0, 0x0, 41, 844, 979, 0, 0, -1 },
- { 0x1, 0x1, 41, 845, 658, 34, 1, 17 },
- { 0x1, 0x1, 41, 846, 662, 34, 1, 17 },
- { 0x0, 0x0, 41, 847, 983, 0, 0, -1 },
- { 0x0, 0x0, 41, 848, 987, 0, 0, -1 },
- { 0x1, 0x1, 41, 849, 682, 34, 1, 18 },
- { 0x10000001, 0x10000001, 41, 850, 686, 6, 1, 18 },
- { 0x0, 0x0, 41, 851, 991, 0, 0, -1 },
- { 0x1, 0x1, 41, 852, 698, 34, 1, 19 },
- { 0x0, 0x0, 41, 853, 995, 0, 0, -1 },
- { 0x0, 0x0, 41, 854, 999, 0, 0, -1 },
- { 0x1, 0x1, 41, 855, 718, 34, 1, 20 },
- { 0x10000001, 0x10000001, 41, 856, 722, 6, 1, 20 },
- { 0x0, 0x0, 41, 857, 1003, 0, 0, -1 },
- { 0x1, 0x1, 41, 858, 734, 34, 1, 21 },
- { 0x0, 0x0, 41, 859, 1008, 0, 0, -1 },
- { 0x0, 0x0, 41, 860, 1012, 0, 0, -1 },
- { 0x1, 0x1, 41, 861, 757, 34, 1, 17 },
- { 0x1, 0x1, 41, 862, 761, 34, 1, 17 },
- { 0x0, 0x0, 41, 863, 1016, 0, 0, -1 },
- { 0x1, 0x1, 41, 864, 773, 34, 1, 21 },
- { 0x800001, 0x800001, 41, -1, 1138, 4, 1, 16 },
- { 0x1, 0x1, 41, 2202, 1136, 4, 1, 16 },
- { 0x1, 0x1, 41, 939, 1141, 4, 1, 22 },
- { 0x2, 0x3, 41, -1, 1146, 20, 1, 67 },
- { 0x1, 0x1, 41, 2203, 1144, 21, 1, 67 },
- { 0x0, 0x0, 42, -1, -1, 0, 1, 80 },
- { 0x0, 0x0, 42, -1, -1, 0, 1, 80 },
- { 0x0, 0x0, 42, -1, -1, 0, 1, 123 },
- { 0x1, 0x1, 44, 1354, 295, 38, 1, 1 },
- { 0x1, 0x1, 44, 1355, 297, 38, 1, 1 },
- { 0x0, 0x0, 44, -1, 300, 0, 0, -1 },
- { 0x0, 0x0, 44, -1, 414, 0, 0, -1 },
- { 0x1, 0x1, 44, 1359, 317, 38, 1, 1 },
- { 0x1, 0x1, 44, 1360, 319, 38, 1, 1 },
- { 0x0, 0x0, 44, -1, 322, 0, 0, -1 },
- { 0x0, 0x0, 44, -1, 454, 0, 0, -1 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, 1326, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 35, 1, 22 },
+ { 0x1, 0x1, 24, -1, -1, 33, 1, 82 },
+ { 0x1, 0x1, 24, -1, -1, 33, 1, 82 },
+ { 0x1, 0x1, 24, 1342, 1455, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1343, 1464, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1344, 1473, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1345, 1486, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1346, 1495, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1347, 1504, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1348, 1513, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1349, 1522, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1350, 1531, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1351, 1541, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1352, 1551, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1353, 1561, 35, 1, 137 },
+ { 0x1, 0x1, 24, 1354, 1570, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1355, 1576, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1356, 1582, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1357, 1588, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1358, 1594, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1359, 1600, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1360, 1606, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1361, 1612, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1362, 1618, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1363, 1624, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1364, 1630, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1365, 1636, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1366, 1642, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1367, 1648, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1368, 1654, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1369, 1660, 35, 1, 151 },
+ { 0x1, 0x1, 24, 1370, 1666, 35, 1, 156 },
+ { 0x1, 0x1, 24, 1371, 1672, 35, 1, 156 },
+ { 0x0, 0x0, 33, 2821, 2819, 0, 0, -1 },
+ { 0x0, 0x0, 33, 2824, 2822, 0, 0, -1 },
+ { 0x0, 0x0, 33, 2830, 2829, 0, 0, -1 },
+ { 0x0, 0x0, 33, 2832, 2831, 0, 0, -1 },
+ { 0x0, 0x0, 33, 2846, 2845, 0, 0, -1 },
+ { 0x0, 0x0, 33, 2848, 2847, 0, 0, -1 },
+ { 0x0, 0x0, 35, -1, 2840, 0, 0, -1 },
+ { 0x0, 0x0, 35, -1, 2842, 0, 0, -1 },
+ { 0x1, 0x1, 38, -1, 2290, 37, 1, 30 },
+ { 0x1, 0x1, 38, -1, 2349, 37, 1, 30 },
+ { 0x0, 0x0, 38, -1, 2352, 0, 0, -1 },
+ { 0x1, 0x1, 38, -1, -1, 37, 1, 30 },
+ { 0x1, 0x1, 38, -1, 2357, 37, 1, 30 },
+ { 0x0, 0x0, 38, -1, 2360, 0, 0, -1 },
+ { 0x1, 0x1, 38, -1, -1, 37, 1, 30 },
+ { 0x0, 0x0, 38, -1, 2363, 0, 0, -1 },
+ { 0x1, 0x1, 38, -1, -1, 37, 1, 30 },
+ { 0x1, 0x1, 38, -1, 2366, 37, 1, 30 },
+ { 0x1, 0x1, 38, -1, 2369, 37, 1, 30 },
+ { 0x1, 0x1, 38, -1, 2402, 37, 1, 30 },
+ { 0x3, 0x3, 38, -1, -1, 30, 1, 144 },
+ { 0x0, 0x0, 38, 1142, -1, 0, 1, 102 },
+ { 0x0, 0x0, 38, -1, -1, 0, 1, 111 },
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- { 0x11, 0x11, 175, -1, 417, 33, 1, 4 },
+ { 0x0, 0x0, 174, -1, 404, 0, 0, -1 },
+ { 0x0, 0x0, 174, 3046, 3006, 0, 1, 76 },
+ { 0x0, 0x0, 174, 3047, 3007, 0, 1, 76 },
+ { 0x0, 0x0, 174, -1, 410, 0, 0, -1 },
+ { 0x0, 0x0, 174, -1, 412, 0, 0, -1 },
+ { 0x0, 0x0, 174, 3050, 3010, 0, 1, 1 },
+ { 0x0, 0x0, 174, 3051, 3011, 0, 1, 1 },
+ { 0x11, 0x31, 175, 2881, 417, 33, 1, 4 },
{ 0x2200001, 0x2200001, 175, -1, 418, 12, 1, 4 },
- { 0x1, 0x1, 175, 2053, 419, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 421, 12, 1, 4 },
- { 0x11, 0x11, 175, 2055, 423, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 425, 12, 1, 4 },
- { 0x1, 0x1, 175, 2057, 427, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 429, 12, 1, 4 },
- { 0x11, 0x11, 175, 2059, 431, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 433, 12, 1, 4 },
- { 0x1, 0x1, 175, 2061, 435, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 437, 12, 1, 4 },
- { 0x11, 0x11, 175, 2063, 439, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 441, 12, 1, 4 },
- { 0x11, 0x31, 175, 2867, 447, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 448, 12, 1, 4 },
- { 0x11, 0x31, 175, 2069, 449, 33, 1, 4 },
+ { 0x11, 0x31, 175, 2073, 419, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 421, 12, 1, 4 },
+ { 0x1, 0x1, 175, -1, 425, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 426, 12, 1, 4 },
+ { 0x11, 0x11, 175, -1, 427, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 428, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2079, 429, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 431, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2081, 433, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 435, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2083, 437, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 439, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2085, 441, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 443, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2087, 445, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 447, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2089, 449, 33, 1, 4 },
{ 0x2200001, 0x2200001, 175, -1, 451, 12, 1, 4 },
- { 0x11, 0x31, 175, 2887, 455, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 456, 12, 1, 4 },
- { 0x11, 0x31, 175, 2095, 457, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 459, 12, 1, 4 },
- { 0x1, 0x1, 175, -1, 463, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 464, 12, 1, 4 },
- { 0x11, 0x11, 175, -1, 465, 33, 1, 4 },
+ { 0x11, 0x31, 175, 2901, 457, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 458, 12, 1, 4 },
+ { 0x11, 0x31, 175, 2095, 459, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 461, 12, 1, 4 },
+ { 0x11, 0x31, 175, 2921, 465, 33, 1, 4 },
{ 0x2200001, 0x2200001, 175, -1, 466, 12, 1, 4 },
- { 0x1, 0x1, 175, 2101, 467, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 469, 12, 1, 4 },
- { 0x11, 0x11, 175, 2103, 471, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 473, 12, 1, 4 },
- { 0x1, 0x1, 175, 2105, 475, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 477, 12, 1, 4 },
- { 0x11, 0x11, 175, 2107, 479, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 481, 12, 1, 4 },
- { 0x1, 0x1, 175, 2109, 483, 37, 1, 4 },
- { 0x2000001, 0x2000001, 175, -1, 485, 12, 1, 4 },
- { 0x11, 0x11, 175, 2111, 487, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 489, 12, 1, 4 },
- { 0x11, 0x31, 175, 2907, 495, 33, 1, 4 },
- { 0x2200001, 0x2200001, 175, -1, 496, 12, 1, 4 },
- { 0x11, 0x31, 175, 2117, 497, 33, 1, 4 },
+ { 0x11, 0x31, 175, 2121, 467, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 469, 12, 1, 4 },
+ { 0x1, 0x1, 175, -1, 473, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 474, 12, 1, 4 },
+ { 0x11, 0x11, 175, -1, 475, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 476, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2127, 477, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 479, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2129, 481, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 483, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2131, 485, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 487, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2133, 489, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 491, 12, 1, 4 },
+ { 0x1, 0x1, 175, 2135, 493, 37, 1, 4 },
+ { 0x2000001, 0x2000001, 175, -1, 495, 12, 1, 4 },
+ { 0x11, 0x11, 175, 2137, 497, 33, 1, 4 },
{ 0x2200001, 0x2200001, 175, -1, 499, 12, 1, 4 },
- { 0x1, 0x1, 175, -1, 503, 33, 1, 4 },
- { 0x200001, 0x200001, 175, -1, 504, 12, 1, 4 },
- { 0x1, 0x1, 175, -1, 505, 33, 1, 4 },
- { 0x200001, 0x200001, 175, -1, 506, 12, 1, 4 },
- { 0x1, 0x1, 175, -1, 511, 33, 1, 4 },
- { 0x200001, 0x200001, 175, -1, 512, 12, 1, 4 },
+ { 0x11, 0x31, 175, 2941, 505, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 506, 12, 1, 4 },
+ { 0x11, 0x31, 175, 2143, 507, 33, 1, 4 },
+ { 0x2200001, 0x2200001, 175, -1, 509, 12, 1, 4 },
{ 0x1, 0x1, 175, -1, 513, 33, 1, 4 },
{ 0x200001, 0x200001, 175, -1, 514, 12, 1, 4 },
- { 0x2200001, 0x6200001, 176, 2850, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 1994, -1, 33, 1, 4 },
+ { 0x1, 0x1, 175, -1, 515, 33, 1, 4 },
+ { 0x200001, 0x200001, 175, -1, 516, 12, 1, 4 },
+ { 0x1, 0x1, 175, -1, 521, 33, 1, 79 },
+ { 0x200001, 0x200001, 175, -1, 522, 12, 1, 79 },
+ { 0x1, 0x1, 175, -1, 523, 33, 1, 79 },
+ { 0x200001, 0x200001, 175, -1, 524, 12, 1, 79 },
+ { 0x1, 0x1, 175, -1, 529, 33, 1, 4 },
+ { 0x200001, 0x200001, 175, -1, 530, 12, 1, 4 },
+ { 0x1, 0x1, 175, -1, 531, 33, 1, 4 },
+ { 0x200001, 0x200001, 175, -1, 532, 12, 1, 4 },
+ { 0x2200001, 0x6200001, 176, 2884, -1, 12, 1, 4 },
+ { 0x11, 0x11, 176, 2016, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
{ 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2000, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2022, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2002, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2024, -1, 33, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2004, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2026, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2006, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2028, -1, 33, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2008, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2030, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2010, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2032, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
{ 0x11, 0x11, 176, -1, -1, 33, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x2200001, 0x6200001, 176, 2870, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2014, -1, 33, 1, 4 },
+ { 0x2200001, 0x6200001, 176, 2904, -1, 12, 1, 4 },
+ { 0x11, 0x11, 176, 2036, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
{ 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
@@ -3897,30 +4033,30 @@
{ 0x200001, 0x200001, 176, -1, -1, 12, 1, 5 },
{ 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
- { 0x2200001, 0x6200001, 176, 2890, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2018, -1, 33, 1, 4 },
+ { 0x2200001, 0x6200001, 176, 2924, -1, 12, 1, 4 },
+ { 0x11, 0x11, 176, 2040, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
{ 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2024, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2046, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2026, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2048, -1, 33, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2028, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2050, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2030, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2052, -1, 33, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
- { 0x1, 0x1, 176, 2032, -1, 37, 1, 4 },
+ { 0x1, 0x1, 176, 2054, -1, 37, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2034, -1, 33, 1, 4 },
+ { 0x11, 0x11, 176, 2056, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
{ 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 },
{ 0x11, 0x11, 176, -1, -1, 33, 1, 4 },
{ 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 },
- { 0x2200001, 0x6200001, 176, 2909, -1, 12, 1, 4 },
- { 0x11, 0x11, 176, 2038, -1, 33, 1, 4 },
+ { 0x2200001, 0x6200001, 176, 2943, -1, 12, 1, 4 },
+ { 0x11, 0x11, 176, 2060, -1, 33, 1, 4 },
{ 0x1, 0x1, 176, -1, -1, 33, 1, 5 },
{ 0x4200001, 0x4200001, 176, -1, -1, 12, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 37, 1, 4 },
@@ -3946,1154 +4082,1170 @@
{ 0x0, 0x0, 176, -1, -1, 0, 1, 5 },
{ 0x1, 0x1, 176, -1, -1, 12, 1, 5 },
{ 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
- { 0x1, 0x1, 176, 395, -1, 33, 1, 4 },
- { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
- { 0x200001, 0x200001, 176, 396, -1, 12, 1, 4 },
- { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
{ 0x1, 0x1, 176, 397, -1, 33, 1, 4 },
{ 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
{ 0x200001, 0x200001, 176, 398, -1, 12, 1, 4 },
{ 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
- { 0x1, 0x1, 176, 403, -1, 33, 1, 4 },
+ { 0x1, 0x1, 176, 399, -1, 33, 1, 4 },
{ 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
- { 0x200001, 0x200001, 176, 404, -1, 12, 1, 4 },
+ { 0x200001, 0x200001, 176, 400, -1, 12, 1, 4 },
+ { 0x9, 0x9, 176, -1, -1, 33, 1, 80 },
+ { 0x1, 0x1, 176, 405, -1, 33, 1, 79 },
+ { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 80 },
+ { 0x200001, 0x200001, 176, 406, -1, 12, 1, 79 },
+ { 0x9, 0x9, 176, -1, -1, 33, 1, 80 },
+ { 0x1, 0x1, 176, 407, -1, 33, 1, 79 },
+ { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 80 },
+ { 0x200001, 0x200001, 176, 408, -1, 12, 1, 79 },
{ 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
- { 0x1, 0x1, 176, 405, -1, 33, 1, 4 },
+ { 0x1, 0x1, 176, 413, -1, 33, 1, 4 },
{ 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
- { 0x200001, 0x200001, 176, 406, -1, 12, 1, 4 },
- { 0x0, 0x0, 177, -1, 2293, 0, 0, -1 },
- { 0x9, 0x9, 177, -1, 2301, 33, 1, 49 },
- { 0x9, 0x9, 177, -1, 2959, 33, 1, 49 },
- { 0x0, 0x0, 177, -1, 2346, 0, 0, -1 },
- { 0x7, 0x7, 177, -1, -1, 27, 1, 49 },
+ { 0x200001, 0x200001, 176, 414, -1, 12, 1, 4 },
+ { 0x9, 0x9, 176, -1, -1, 33, 1, 5 },
+ { 0x1, 0x1, 176, 415, -1, 33, 1, 4 },
+ { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 },
+ { 0x200001, 0x200001, 176, 416, -1, 12, 1, 4 },
+ { 0x0, 0x0, 177, -1, 2327, 0, 0, -1 },
+ { 0x9, 0x9, 177, -1, 2335, 33, 1, 50 },
+ { 0x9, 0x9, 177, -1, 2993, 33, 1, 50 },
+ { 0x0, 0x0, 177, -1, 2380, 0, 0, -1 },
+ { 0x7, 0x7, 177, -1, -1, 27, 1, 50 },
{ 0x1, 0x1, 197, -1, -1, 27, 1, 10 },
{ 0x1, 0x1, 211, -1, -1, 29, 1, 0 },
{ 0x1, 0x1, 211, -1, -1, 29, 1, 0 },
- { 0x2, 0x3, 211, 1151, -1, 27, 1, 33 },
- { 0x0, 0x0, 211, 1152, -1, 0, 1, 33 },
- { 0x0, 0x0, 211, 1153, -1, 0, 1, 0 },
- { 0x0, 0x0, 211, 1154, -1, 0, 1, 0 },
- { 0x0, 0x0, 211, 1155, -1, 0, 1, 0 },
- { 0x0, 0x0, 211, 1156, -1, 0, 1, 0 },
- { 0x0, 0x0, 211, 2988, -1, 0, 1, 93 },
- { 0x0, 0x0, 211, 2989, -1, 0, 1, 93 },
- { 0x0, 0x0, 211, 2990, 949, 0, 0, -1 },
+ { 0x2, 0x3, 211, 1169, -1, 27, 1, 34 },
+ { 0x0, 0x0, 211, 1170, -1, 0, 1, 34 },
+ { 0x0, 0x0, 211, 1171, -1, 0, 1, 0 },
+ { 0x0, 0x0, 211, 1172, -1, 0, 1, 0 },
+ { 0x0, 0x0, 211, 1173, -1, 0, 1, 0 },
+ { 0x0, 0x0, 211, 1174, -1, 0, 1, 0 },
+ { 0x0, 0x0, 211, 3026, -1, 0, 1, 100 },
+ { 0x0, 0x0, 211, 3027, -1, 0, 1, 100 },
+ { 0x0, 0x0, 211, 3028, 967, 0, 0, -1 },
{ 0x1, 0x1, 212, -1, -1, 27, 1, 0 },
{ 0x1, 0x1, 212, -1, -1, 27, 1, 0 },
- { 0x1, 0x1, 213, -1, 1408, 32, 1, 135 },
- { 0x1, 0x1, 213, -1, 1410, 32, 1, 135 },
- { 0x1, 0x1, 213, -1, 1412, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1414, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1416, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1418, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1420, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1422, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1424, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1426, 32, 1, 134 },
- { 0x1, 0x1, 213, -1, 1428, 32, 1, 136 },
- { 0x1, 0x1, 213, -1, 1430, 32, 1, 136 },
- { 0x1, 0x1, 213, -1, 1947, 32, 1, 131 },
- { 0x1, 0x1, 213, -1, 1949, 32, 1, 138 },
- { 0x1, 0x1, 213, -1, 1951, 32, 1, 132 },
- { 0x1, 0x1, 213, -1, 1953, 32, 1, 132 },
- { 0x1, 0x1, 213, -1, 1955, 32, 1, 131 },
- { 0x1, 0x1, 213, -1, 1957, 32, 1, 138 },
- { 0x1, 0x1, 213, -1, 1959, 32, 1, 131 },
- { 0x1, 0x1, 213, -1, 1961, 32, 1, 138 },
- { 0x1, 0x1, 213, 2749, 1963, 32, 1, 131 },
- { 0x1, 0x1, 213, 2750, 1966, 32, 1, 138 },
- { 0x0, 0x0, 214, -1, 2791, 0, 0, -1 },
- { 0x0, 0x0, 214, -1, 2792, 0, 0, -1 },
- { 0x0, 0x0, 214, -1, 2817, 0, 0, -1 },
- { 0x5, 0x5, 214, -1, 2820, 20, 1, 67 },
- { 0x0, 0x0, 218, 2175, 948, 0, 0, -1 },
- { 0x0, 0x0, 219, -1, 1121, 0, 0, -1 },
- { 0x0, 0x0, 219, -1, 1246, 0, 0, -1 },
- { 0x0, 0x0, 219, -1, -1, 0, 1, 121 },
- { 0x0, 0x0, 219, -1, -1, 0, 1, 66 },
- { 0x1, 0x1, 219, 815, 2255, 36, 1, 65 },
- { 0x1, 0x1, 219, 816, 2314, 36, 1, 65 },
- { 0x0, 0x0, 219, 817, 2317, 0, 0, -1 },
- { 0x1, 0x1, 219, 818, -1, 36, 1, 65 },
- { 0x0, 0x0, 219, 1405, -1, 0, 1, 33 },
- { 0x1, 0x1, 219, 819, 2322, 36, 1, 65 },
- { 0x0, 0x0, 219, 820, 2325, 0, 0, -1 },
- { 0x1, 0x1, 219, 821, -1, 36, 1, 65 },
- { 0x0, 0x0, 219, 822, 2328, 0, 0, -1 },
- { 0x1, 0x1, 219, 823, -1, 36, 1, 65 },
- { 0x1, 0x1, 219, 824, 2331, 36, 1, 65 },
- { 0x1, 0x1, 219, 825, 2334, 36, 1, 65 },
- { 0x0, 0x0, 219, 1406, -1, 0, 1, 33 },
- { 0x1, 0x1, 219, 826, 2367, 36, 1, 65 },
- { 0x1, 0x1, 219, 827, -1, 31, 1, 137 },
- { 0x1, 0x1, 219, 226, 1431, 32, 1, 126 },
- { 0x1, 0x1, 219, 227, 1440, 32, 1, 126 },
- { 0x1, 0x1, 219, 228, 1449, 32, 1, 126 },
- { 0x1, 0x1, 219, 229, 1462, 32, 1, 126 },
- { 0x1, 0x1, 219, 230, 1471, 32, 1, 126 },
- { 0x1, 0x1, 219, 231, 1480, 32, 1, 126 },
- { 0x1, 0x1, 219, 232, 1489, 32, 1, 126 },
- { 0x1, 0x1, 219, 233, 1498, 32, 1, 126 },
- { 0x1, 0x1, 219, 234, 1507, 32, 1, 126 },
- { 0x1, 0x1, 219, 235, 1516, 32, 1, 126 },
- { 0x1, 0x1, 219, 236, 1526, 32, 1, 126 },
- { 0x1, 0x1, 219, 237, 1536, 32, 1, 126 },
- { 0x1, 0x1, 219, 238, 1549, 32, 1, 141 },
- { 0x1, 0x1, 219, 239, 1555, 32, 1, 146 },
- { 0x1, 0x1, 219, 240, 1561, 32, 1, 146 },
- { 0x1, 0x1, 219, 241, 1567, 32, 1, 141 },
- { 0x1, 0x1, 219, 242, 1573, 32, 1, 146 },
- { 0x1, 0x1, 219, 243, 1579, 32, 1, 146 },
- { 0x1, 0x1, 219, 244, 1585, 32, 1, 141 },
- { 0x1, 0x1, 219, 245, 1591, 32, 1, 146 },
- { 0x1, 0x1, 219, 246, 1597, 32, 1, 146 },
- { 0x1, 0x1, 219, 247, 1603, 32, 1, 141 },
- { 0x1, 0x1, 219, 248, 1609, 32, 1, 146 },
- { 0x1, 0x1, 219, 249, 1615, 32, 1, 141 },
- { 0x1, 0x1, 219, 250, 1621, 32, 1, 146 },
- { 0x1, 0x1, 219, 251, 1627, 32, 1, 141 },
- { 0x1, 0x1, 219, 252, 1633, 32, 1, 146 },
- { 0x1, 0x1, 219, 253, 1639, 32, 1, 141 },
- { 0x1, 0x1, 219, 254, 1645, 32, 1, 146 },
- { 0x1, 0x1, 219, 255, 1651, 32, 1, 146 },
- { 0x1, 0x1, 219, 831, -1, 31, 1, 155 },
- { 0x0, 0x0, 220, 2370, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2371, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 25, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2373, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2374, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2375, -1, 0, 1, 44 },
- { 0x0, 0x0, 220, 2376, -1, 0, 1, 39 },
- { 0x1, 0x1, 220, 2377, -1, 12, 1, 58 },
- { 0x0, 0x0, 220, 2378, -1, 0, 1, 53 },
- { 0x1000001, 0x1000001, 220, 2379, -1, 12, 1, 58 },
- { 0x1, 0x1, 220, 2380, -1, 36, 1, 53 },
- { 0x200001, 0x200001, 220, 2381, -1, 12, 1, 58 },
- { 0x1, 0x1, 220, 2382, -1, 33, 1, 53 },
- { 0x1200001, 0x1200001, 220, 2383, -1, 12, 1, 48 },
- { 0x9, 0x9, 220, 2384, -1, 33, 1, 48 },
- { 0x0, 0x0, 220, 2385, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2386, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2387, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2388, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2389, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2390, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2391, -1, 0, 1, 48 },
- { 0x0, 0x0, 220, 2392, -1, 0, 1, 48 },
- { 0x1, 0x1, 220, 2393, -1, 12, 1, 58 },
- { 0x0, 0x0, 220, 2394, -1, 0, 1, 53 },
- { 0x200001, 0x1200001, 220, 2395, -1, 12, 1, 58 },
- { 0x1, 0x9, 220, 2396, -1, 33, 1, 53 },
- { 0x0, 0x0, 220, 2397, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2398, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2399, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2400, -1, 0, 1, 53 },
- { 0x1, 0x1, 220, 2401, -1, 12, 1, 58 },
- { 0x0, 0x0, 220, 2402, -1, 0, 1, 53 },
- { 0x1000001, 0x1000001, 220, 2403, -1, 12, 1, 58 },
- { 0x1, 0x1, 220, 2404, -1, 36, 1, 53 },
- { 0x200001, 0x200001, 220, 2405, -1, 12, 1, 58 },
- { 0x1, 0x1, 220, 2406, -1, 33, 1, 53 },
- { 0x1200001, 0x1200001, 220, 2407, -1, 12, 1, 48 },
- { 0x9, 0x9, 220, 2408, -1, 33, 1, 48 },
- { 0x0, 0x0, 220, 2409, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2410, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2411, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2412, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2413, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2414, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2415, -1, 0, 1, 48 },
- { 0x0, 0x0, 220, 2416, -1, 0, 1, 48 },
- { 0x1, 0x1, 220, 2417, -1, 12, 1, 58 },
- { 0x0, 0x0, 220, 2418, -1, 0, 1, 53 },
- { 0x200001, 0x1200001, 220, 2419, -1, 12, 1, 58 },
- { 0x1, 0x9, 220, 2420, -1, 33, 1, 53 },
- { 0x0, 0x0, 220, 2421, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2422, -1, 0, 1, 53 },
- { 0x0, 0x0, 220, 2423, -1, 0, 1, 58 },
- { 0x0, 0x0, 220, 2424, -1, 0, 1, 53 },
- { 0x1, 0x1, 220, 2425, -1, 28, 1, 28 },
- { 0x0, 0x0, 220, 2426, -1, 0, 1, 28 },
- { 0x3, 0x3, 220, 2427, -1, 27, 1, 28 },
- { 0x1, 0x1, 220, 2428, -1, 27, 1, 28 },
- { 0x0, 0x0, 220, 2429, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2430, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2431, -1, 0, 1, 28 },
- { 0x1, 0x1, 220, 2432, -1, 36, 1, 65 },
- { 0x1, 0x1, 220, 2433, -1, 37, 1, 28 },
- { 0x0, 0x0, 220, 2434, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2435, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2436, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2437, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2438, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 37, -1, 0, 1, 28 },
- { 0x1, 0x1, 220, 2440, -1, 36, 1, 65 },
- { 0x1, 0x1, 220, 2441, -1, 37, 1, 28 },
- { 0x0, 0x0, 220, 2442, -1, 0, 1, 28 },
- { 0x1, 0x1, 220, 2443, -1, 36, 1, 65 },
- { 0x1, 0x1, 220, 2444, -1, 37, 1, 28 },
- { 0x0, 0x0, 220, 2445, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2446, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2447, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 42, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2449, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2450, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 43, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2452, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2453, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2454, -1, 0, 1, 48 },
- { 0x1, 0x1, 220, 2455, -1, 27, 1, 48 },
- { 0x1, 0x1, 220, 2456, -1, 28, 1, 48 },
- { 0x3, 0x3, 220, 2457, -1, 27, 1, 48 },
- { 0x1, 0x1, 220, 2458, -1, 29, 1, 48 },
- { 0x5, 0x5, 220, 2459, -1, 27, 1, 48 },
- { 0x3, 0x3, 220, 2460, -1, 28, 1, 48 },
- { 0x7, 0x7, 220, 2461, -1, 27, 1, 48 },
- { 0x0, 0x0, 220, 2462, -1, 0, 1, 48 },
- { 0x0, 0x0, 220, 2463, -1, 0, 1, 48 },
- { 0x0, 0x0, 220, 2464, -1, 0, 1, 48 },
- { 0x0, 0x0, 220, 2465, -1, 0, 1, 48 },
- { 0x1, 0x1, 220, 2466, -1, 28, 1, 28 },
- { 0x0, 0x0, 220, 2467, -1, 0, 1, 28 },
- { 0x3, 0x3, 220, 2468, -1, 27, 1, 28 },
- { 0x1, 0x1, 220, 2469, -1, 27, 1, 28 },
- { 0x0, 0x0, 220, 2470, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2471, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2472, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 52, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2474, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2475, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 57, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 2477, -1, 0, 1, 23 },
- { 0x0, 0x0, 220, 2478, -1, 0, 1, 23 },
- { 0x0, 0x0, 220, 2479, -1, 0, 1, 23 },
- { 0x0, 0x0, 220, 2480, -1, 0, 1, 23 },
- { 0x0, 0x0, 220, 2481, -1, 0, 1, 34 },
- { 0x0, 0x0, 220, 2482, -1, 0, 1, 65 },
- { 0x0, 0x0, 220, 2483, -1, 0, 1, 28 },
- { 0x0, 0x0, 220, 64, -1, 0, 1, 28 },
- { 0x1, 0x1, 221, 2485, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2486, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2487, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2488, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2489, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2490, -1, 34, 1, 45 },
- { 0x1, 0x1, 221, 2491, -1, 34, 1, 41 },
- { 0x400001, 0x400001, 221, 2492, -1, 12, 1, 60 },
- { 0x1, 0x1, 221, 2493, -1, 34, 1, 55 },
- { 0x1400001, 0x1400001, 221, 2494, -1, 12, 1, 60 },
- { 0x5, 0x5, 221, 2495, -1, 34, 1, 55 },
- { 0x600001, 0x600001, 221, 2496, -1, 12, 1, 60 },
- { 0x3, 0x3, 221, 2497, -1, 33, 1, 55 },
- { 0x1600001, 0x1600001, 221, 2498, -1, 12, 1, 50 },
- { 0xb, 0xb, 221, 2499, -1, 33, 1, 50 },
- { 0x1, 0x1, 221, 2500, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2501, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2502, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2503, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2504, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2505, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2506, -1, 34, 1, 50 },
- { 0x1, 0x1, 221, 2507, -1, 34, 1, 50 },
- { 0x400001, 0x400001, 221, 2508, -1, 12, 1, 60 },
- { 0x1, 0x1, 221, 2509, -1, 34, 1, 55 },
- { 0x600001, 0x1600001, 221, 2510, -1, 12, 1, 60 },
- { 0x3, 0xb, 221, 2511, -1, 33, 1, 55 },
- { 0x1, 0x1, 221, 2512, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2513, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2514, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2515, -1, 34, 1, 55 },
- { 0x400001, 0x400001, 221, 2516, -1, 12, 1, 60 },
- { 0x1, 0x1, 221, 2517, -1, 34, 1, 55 },
- { 0x1400001, 0x1400001, 221, 2518, -1, 12, 1, 60 },
- { 0x5, 0x5, 221, 2519, -1, 34, 1, 55 },
- { 0x600001, 0x600001, 221, 2520, -1, 12, 1, 60 },
- { 0x3, 0x3, 221, 2521, -1, 33, 1, 55 },
- { 0x1600001, 0x1600001, 221, 2522, -1, 12, 1, 50 },
- { 0xb, 0xb, 221, 2523, -1, 33, 1, 50 },
- { 0x1, 0x1, 221, 2524, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2525, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2526, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2527, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2528, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2529, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2530, -1, 34, 1, 50 },
- { 0x1, 0x1, 221, 2531, -1, 34, 1, 50 },
- { 0x400001, 0x400001, 221, 2532, -1, 12, 1, 60 },
- { 0x1, 0x1, 221, 2533, -1, 34, 1, 55 },
- { 0x600001, 0x1600001, 221, 2534, -1, 12, 1, 60 },
- { 0x3, 0xb, 221, 2535, -1, 33, 1, 55 },
- { 0x1, 0x1, 221, 2536, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2537, -1, 34, 1, 55 },
- { 0x1, 0x1, 221, 2538, -1, 34, 1, 60 },
- { 0x1, 0x1, 221, 2539, -1, 34, 1, 55 },
- { 0x41, 0x41, 221, 2540, -1, 28, 1, 30 },
- { 0x1, 0x1, 221, 2541, -1, 34, 1, 30 },
- { 0x83, 0x83, 221, 2542, -1, 27, 1, 30 },
- { 0x81, 0x81, 221, 2543, -1, 27, 1, 30 },
- { 0x1, 0x1, 221, 2544, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2545, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2546, -1, 34, 1, 30 },
- { 0x5, 0x5, 221, 2547, -1, 34, 1, 65 },
- { 0x9, 0x9, 221, 2548, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2549, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2550, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2551, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2552, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2553, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2554, -1, 34, 1, 30 },
- { 0x5, 0x5, 221, 2555, -1, 34, 1, 65 },
- { 0x9, 0x9, 221, 2556, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2557, -1, 34, 1, 30 },
- { 0x5, 0x5, 221, 2558, -1, 34, 1, 65 },
- { 0x9, 0x9, 221, 2559, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2560, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2561, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2562, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2563, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2564, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2565, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2566, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2567, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2568, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2569, -1, 34, 1, 50 },
- { 0x81, 0x81, 221, 2570, -1, 27, 1, 50 },
- { 0x41, 0x41, 221, 2571, -1, 28, 1, 50 },
- { 0x83, 0x83, 221, 2572, -1, 27, 1, 50 },
- { 0x21, 0x21, 221, 2573, -1, 29, 1, 50 },
- { 0x85, 0x85, 221, 2574, -1, 27, 1, 50 },
- { 0x43, 0x43, 221, 2575, -1, 28, 1, 50 },
- { 0x87, 0x87, 221, 2576, -1, 27, 1, 50 },
- { 0x1, 0x1, 221, 2577, -1, 34, 1, 50 },
- { 0x1, 0x1, 221, 2578, -1, 34, 1, 50 },
- { 0x1, 0x1, 221, 2579, -1, 34, 1, 50 },
- { 0x1, 0x1, 221, 2580, -1, 34, 1, 50 },
- { 0x41, 0x41, 221, 2581, -1, 28, 1, 30 },
- { 0x1, 0x1, 221, 2582, -1, 34, 1, 30 },
- { 0x83, 0x83, 221, 2583, -1, 27, 1, 30 },
- { 0x81, 0x81, 221, 2584, -1, 27, 1, 30 },
- { 0x1, 0x1, 221, 2585, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2586, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2587, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2588, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2589, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2590, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2591, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2592, -1, 34, 1, 25 },
- { 0x1, 0x1, 221, 2593, -1, 34, 1, 25 },
- { 0x1, 0x1, 221, 2594, -1, 34, 1, 25 },
- { 0x1, 0x1, 221, 2595, -1, 34, 1, 25 },
- { 0x1, 0x1, 221, 2596, -1, 34, 1, 36 },
- { 0x1, 0x1, 221, 2597, -1, 34, 1, 65 },
- { 0x1, 0x1, 221, 2598, -1, 34, 1, 30 },
- { 0x1, 0x1, 221, 2599, -1, 34, 1, 30 },
- { 0x1, 0x1, 222, 2600, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2601, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2602, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2603, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2604, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2605, -1, 35, 1, 46 },
- { 0x1, 0x1, 222, 2606, -1, 35, 1, 42 },
- { 0x800001, 0x800001, 222, 2607, -1, 12, 1, 61 },
- { 0x1, 0x1, 222, 2608, -1, 35, 1, 56 },
- { 0x1800001, 0x1800001, 222, 2609, -1, 12, 1, 61 },
- { 0x3, 0x3, 222, 2610, -1, 35, 1, 56 },
- { 0xa00001, 0xa00001, 222, 2611, -1, 12, 1, 61 },
- { 0x5, 0x5, 222, 2612, -1, 33, 1, 56 },
- { 0x1a00001, 0x1a00001, 222, 2613, -1, 12, 1, 51 },
- { 0xd, 0xd, 222, 2614, -1, 33, 1, 51 },
- { 0x1, 0x1, 222, 2615, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2616, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2617, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2618, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2619, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2620, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2621, -1, 35, 1, 51 },
- { 0x1, 0x1, 222, 2622, -1, 35, 1, 51 },
- { 0x800001, 0x800001, 222, 2623, -1, 12, 1, 61 },
- { 0x1, 0x1, 222, 2624, -1, 35, 1, 56 },
- { 0xa00001, 0x1a00001, 222, 2625, -1, 12, 1, 61 },
- { 0x5, 0xd, 222, 2626, -1, 33, 1, 56 },
- { 0x1, 0x1, 222, 2627, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2628, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2629, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2630, -1, 35, 1, 56 },
- { 0x800001, 0x800001, 222, 2631, -1, 12, 1, 61 },
- { 0x1, 0x1, 222, 2632, -1, 35, 1, 56 },
- { 0x1800001, 0x1800001, 222, 2633, -1, 12, 1, 61 },
- { 0x3, 0x3, 222, 2634, -1, 35, 1, 56 },
- { 0xa00001, 0xa00001, 222, 2635, -1, 12, 1, 61 },
- { 0x5, 0x5, 222, 2636, -1, 33, 1, 56 },
- { 0x1a00001, 0x1a00001, 222, 2637, -1, 12, 1, 51 },
- { 0xd, 0xd, 222, 2638, -1, 33, 1, 51 },
- { 0x1, 0x1, 222, 2639, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2640, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2641, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2642, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2643, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2644, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2645, -1, 35, 1, 51 },
- { 0x1, 0x1, 222, 2646, -1, 35, 1, 51 },
- { 0x800001, 0x800001, 222, 2647, -1, 12, 1, 61 },
- { 0x1, 0x1, 222, 2648, -1, 35, 1, 56 },
- { 0xa00001, 0x1a00001, 222, 2649, -1, 12, 1, 61 },
- { 0x5, 0xd, 222, 2650, -1, 33, 1, 56 },
- { 0x1, 0x1, 222, 2651, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2652, -1, 35, 1, 56 },
- { 0x1, 0x1, 222, 2653, -1, 35, 1, 61 },
- { 0x1, 0x1, 222, 2654, -1, 35, 1, 56 },
- { 0x81, 0x81, 222, 2655, -1, 28, 1, 31 },
- { 0x1, 0x1, 222, 2656, -1, 35, 1, 31 },
- { 0x103, 0x103, 222, 2657, -1, 27, 1, 31 },
- { 0x101, 0x101, 222, 2658, -1, 27, 1, 31 },
- { 0x1, 0x1, 222, 2659, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2660, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2661, -1, 35, 1, 31 },
- { 0x3, 0x3, 222, 2662, -1, 35, 1, 65 },
- { 0x5, 0x5, 222, 2663, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2664, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2665, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2666, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2667, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2668, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2669, -1, 35, 1, 31 },
- { 0x3, 0x3, 222, 2670, -1, 35, 1, 65 },
- { 0x5, 0x5, 222, 2671, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2672, -1, 35, 1, 31 },
- { 0x3, 0x3, 222, 2673, -1, 35, 1, 65 },
- { 0x5, 0x5, 222, 2674, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2675, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2676, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2677, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2678, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2679, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2680, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2681, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2682, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2683, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2684, -1, 35, 1, 51 },
- { 0x101, 0x101, 222, 2685, -1, 27, 1, 51 },
- { 0x81, 0x81, 222, 2686, -1, 28, 1, 51 },
- { 0x103, 0x103, 222, 2687, -1, 27, 1, 51 },
- { 0x41, 0x41, 222, 2688, -1, 29, 1, 51 },
- { 0x105, 0x105, 222, 2689, -1, 27, 1, 51 },
- { 0x83, 0x83, 222, 2690, -1, 28, 1, 51 },
- { 0x107, 0x107, 222, 2691, -1, 27, 1, 51 },
- { 0x1, 0x1, 222, 2692, -1, 35, 1, 51 },
- { 0x1, 0x1, 222, 2693, -1, 35, 1, 51 },
- { 0x1, 0x1, 222, 2694, -1, 35, 1, 51 },
- { 0x1, 0x1, 222, 2695, -1, 35, 1, 51 },
- { 0x81, 0x81, 222, 2696, -1, 28, 1, 31 },
- { 0x1, 0x1, 222, 2697, -1, 35, 1, 31 },
- { 0x103, 0x103, 222, 2698, -1, 27, 1, 31 },
- { 0x101, 0x101, 222, 2699, -1, 27, 1, 31 },
- { 0x1, 0x1, 222, 2700, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2701, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2702, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2703, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2704, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2705, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2706, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2707, -1, 35, 1, 26 },
- { 0x1, 0x1, 222, 2708, -1, 35, 1, 26 },
- { 0x1, 0x1, 222, 2709, -1, 35, 1, 26 },
- { 0x1, 0x1, 222, 2710, -1, 35, 1, 26 },
- { 0x1, 0x1, 222, 2711, -1, 35, 1, 37 },
- { 0x1, 0x1, 222, 2712, -1, 35, 1, 65 },
- { 0x1, 0x1, 222, 2713, -1, 35, 1, 31 },
- { 0x1, 0x1, 222, 2714, -1, 35, 1, 31 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2209, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 47 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 43 },
- { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 },
- { 0x3, 0x3, 223, 2930, -1, 34, 1, 57 },
- { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0x7, 223, 2931, -1, 34, 1, 57 },
- { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0x7, 223, 2932, -1, 33, 1, 57 },
- { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 52 },
- { 0xf, 0xf, 223, 2933, -1, 33, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2934, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2935, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2936, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x3, 0x3, 223, 2937, -1, 34, 1, 52 },
- { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 },
- { 0x3, 0x3, 223, 2942, -1, 34, 1, 57 },
- { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0xf, 223, 2943, -1, 33, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2944, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2945, -1, 34, 1, 57 },
- { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 },
- { 0x3, 0x3, 223, 2948, -1, 34, 1, 57 },
- { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0x7, 223, 2949, -1, 34, 1, 57 },
- { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0x7, 223, 2950, -1, 33, 1, 57 },
- { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 52 },
- { 0xf, 0xf, 223, 2951, -1, 33, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2952, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2953, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2954, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x3, 0x3, 223, 2955, -1, 34, 1, 52 },
- { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 },
- { 0x3, 0x3, 223, 2960, -1, 34, 1, 57 },
- { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 62 },
- { 0x7, 0xf, 223, 2961, -1, 33, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2962, -1, 34, 1, 57 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 62 },
- { 0x3, 0x3, 223, 2963, -1, 34, 1, 57 },
- { 0xc1, 0xc1, 223, -1, -1, 28, 1, 32 },
- { 0x3, 0x3, 223, 2828, -1, 34, 1, 32 },
- { 0x183, 0x183, 223, -1, -1, 27, 1, 32 },
- { 0x181, 0x181, 223, 2829, -1, 27, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2210, -1, 34, 1, 32 },
- { 0x7, 0x7, 223, -1, -1, 34, 1, 65 },
- { 0xb, 0xb, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2211, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2214, -1, 34, 1, 32 },
- { 0x7, 0x7, 223, -1, -1, 34, 1, 65 },
- { 0xb, 0xb, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2215, -1, 34, 1, 32 },
- { 0x7, 0x7, 223, -1, -1, 34, 1, 65 },
- { 0xb, 0xb, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2217, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2219, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2220, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x181, 0x181, 223, -1, -1, 27, 1, 52 },
- { 0xc1, 0xc1, 223, -1, -1, 28, 1, 52 },
- { 0x183, 0x183, 223, -1, -1, 27, 1, 52 },
- { 0x61, 0x61, 223, -1, -1, 29, 1, 52 },
- { 0x185, 0x185, 223, -1, -1, 27, 1, 52 },
- { 0xc3, 0xc3, 223, -1, -1, 28, 1, 52 },
- { 0x187, 0x187, 223, -1, -1, 27, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 52 },
- { 0xc1, 0xc1, 223, -1, -1, 28, 1, 32 },
- { 0x3, 0x3, 223, 2832, -1, 34, 1, 32 },
- { 0x183, 0x183, 223, -1, -1, 27, 1, 32 },
- { 0x181, 0x181, 223, 2833, -1, 27, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 27 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 27 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 27 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 27 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 38 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 65 },
- { 0x3, 0x3, 223, -1, -1, 34, 1, 32 },
- { 0x3, 0x3, 223, 2222, -1, 34, 1, 32 },
- { 0x3, 0x3, 224, 522, 1433, 32, 1, 128 },
- { 0x3, 0x3, 224, 523, 1442, 32, 1, 128 },
- { 0x3, 0x3, 224, 524, 1451, 32, 1, 128 },
- { 0x3, 0x3, 224, 525, 1464, 32, 1, 128 },
- { 0x3, 0x3, 224, 526, 1473, 32, 1, 128 },
- { 0x3, 0x3, 224, 527, 1482, 32, 1, 128 },
- { 0x3, 0x3, 224, 528, 1491, 32, 1, 128 },
- { 0x3, 0x3, 224, 529, 1500, 32, 1, 128 },
- { 0x3, 0x3, 224, 530, 1509, 32, 1, 128 },
- { 0x3, 0x3, 224, 531, 1518, 32, 1, 128 },
- { 0x3, 0x3, 224, 532, 1528, 32, 1, 128 },
- { 0x3, 0x3, 224, 533, 1538, 32, 1, 128 },
- { 0x3, 0x3, 224, 546, 1551, 32, 1, 143 },
- { 0x3, 0x3, 224, 547, 1557, 32, 1, 148 },
- { 0x3, 0x3, 224, 548, 1563, 32, 1, 148 },
- { 0x3, 0x3, 224, 549, 1569, 32, 1, 143 },
- { 0x3, 0x3, 224, 550, 1575, 32, 1, 148 },
- { 0x3, 0x3, 224, 551, 1581, 32, 1, 148 },
- { 0x3, 0x3, 224, 552, 1587, 32, 1, 143 },
- { 0x3, 0x3, 224, 553, 1593, 32, 1, 148 },
- { 0x3, 0x3, 224, 554, 1599, 32, 1, 148 },
- { 0x3, 0x3, 224, 555, 1605, 32, 1, 143 },
- { 0x3, 0x3, 224, 556, 1611, 32, 1, 148 },
- { 0x3, 0x3, 224, 557, 1617, 32, 1, 143 },
- { 0x3, 0x3, 224, 558, 1623, 32, 1, 148 },
- { 0x3, 0x3, 224, 559, 1629, 32, 1, 143 },
- { 0x3, 0x3, 224, 560, 1635, 32, 1, 148 },
- { 0x3, 0x3, 224, 561, 1641, 32, 1, 143 },
- { 0x3, 0x3, 224, 562, 1647, 32, 1, 148 },
- { 0x3, 0x3, 224, 563, 1653, 32, 1, 148 },
- { 0x1, 0x1, 225, -1, -1, 28, 1, 33 },
- { 0x1, 0x1, 225, -1, -1, 28, 1, 33 },
- { 0x0, 0x0, 232, 940, -1, 0, 1, 137 },
- { 0x0, 0x0, 232, 941, -1, 0, 1, 155 },
- { 0x1, 0x1, 233, -1, 1964, 33, 1, 133 },
- { 0x1, 0x1, 233, -1, 1967, 33, 1, 139 },
- { 0x0, 0x0, 233, -1, 1969, 0, 1, 150 },
- { 0x0, 0x0, 233, -1, 1970, 0, 1, 156 },
- { 0x0, 0x0, 234, 865, 953, 0, 0, -1 },
- { 0x0, 0x0, 234, 866, 961, 0, 0, -1 },
- { 0x0, 0x0, 234, 867, 957, 0, 0, -1 },
- { 0x1, 0x1, 234, 868, 602, 33, 1, 6 },
- { 0x8000001, 0x8000001, 234, 869, 610, 6, 1, 7 },
- { 0x1, 0x1, 234, 870, 606, 33, 1, 6 },
- { 0x0, 0x0, 234, 871, 965, 0, 0, -1 },
- { 0x1, 0x1, 234, 872, 622, 33, 1, 8 },
- { 0x0, 0x0, 234, 873, 969, 0, 0, -1 },
- { 0x1, 0x1, 234, 874, 634, 33, 1, 15 },
- { 0x0, 0x0, 234, 875, 974, 0, 0, -1 },
- { 0x0, 0x0, 234, 876, 978, 0, 0, -1 },
- { 0x1, 0x1, 234, 877, 657, 33, 1, 17 },
- { 0x1, 0x1, 234, 878, 661, 33, 1, 17 },
- { 0x0, 0x0, 234, 879, 982, 0, 0, -1 },
- { 0x0, 0x0, 234, 880, 986, 0, 0, -1 },
- { 0x1, 0x1, 234, 881, 681, 33, 1, 18 },
- { 0x8000001, 0x8000001, 234, 882, 685, 6, 1, 18 },
- { 0x0, 0x0, 234, 883, 990, 0, 0, -1 },
- { 0x1, 0x1, 234, 884, 697, 33, 1, 19 },
- { 0x0, 0x0, 234, 885, 994, 0, 0, -1 },
- { 0x0, 0x0, 234, 886, 998, 0, 0, -1 },
- { 0x1, 0x1, 234, 887, 717, 33, 1, 20 },
- { 0x8000001, 0x8000001, 234, 888, 721, 6, 1, 20 },
- { 0x0, 0x0, 234, 889, 1002, 0, 0, -1 },
- { 0x1, 0x1, 234, 890, 733, 33, 1, 21 },
- { 0x0, 0x0, 234, 891, 1007, 0, 0, -1 },
- { 0x0, 0x0, 234, 892, 1011, 0, 0, -1 },
- { 0x1, 0x1, 234, 893, 756, 33, 1, 17 },
- { 0x1, 0x1, 234, 894, 760, 33, 1, 17 },
- { 0x0, 0x0, 234, 895, 1015, 0, 0, -1 },
- { 0x1, 0x1, 234, 896, 772, 33, 1, 21 },
- { 0x0, 0x0, 235, 2753, 952, 0, 0, -1 },
- { 0x0, 0x0, 235, 2754, 960, 0, 0, -1 },
- { 0x0, 0x0, 235, 2755, 956, 0, 0, -1 },
- { 0x0, 0x0, 235, 2756, 601, 0, 1, 6 },
- { 0x1, 0x1, 235, 2757, 609, 6, 1, 7 },
- { 0x0, 0x0, 235, 2758, 605, 0, 1, 6 },
- { 0x0, 0x0, 235, 2759, 964, 0, 0, -1 },
- { 0x0, 0x0, 235, 2760, 621, 0, 1, 8 },
- { 0x0, 0x0, 235, 2761, 968, 0, 0, -1 },
- { 0x0, 0x0, 235, 2762, 633, 0, 1, 15 },
- { 0x0, 0x0, 235, 2763, 973, 0, 0, -1 },
- { 0x0, 0x0, 235, 2764, 977, 0, 0, -1 },
- { 0x0, 0x0, 235, 2765, 656, 0, 1, 17 },
- { 0x0, 0x0, 235, 2766, 660, 0, 1, 17 },
- { 0x0, 0x0, 235, 2767, 981, 0, 0, -1 },
- { 0x0, 0x0, 235, 2768, 985, 0, 0, -1 },
- { 0x0, 0x0, 235, 2769, 680, 0, 1, 18 },
- { 0x1, 0x1, 235, 2770, 684, 6, 1, 18 },
- { 0x0, 0x0, 235, 2771, 989, 0, 0, -1 },
- { 0x0, 0x0, 235, 2772, 696, 0, 1, 19 },
- { 0x0, 0x0, 235, 2773, 993, 0, 0, -1 },
- { 0x0, 0x0, 235, 2774, 997, 0, 0, -1 },
- { 0x0, 0x0, 235, 2775, 716, 0, 1, 20 },
- { 0x1, 0x1, 235, 2776, 720, 6, 1, 20 },
- { 0x0, 0x0, 235, 2777, 1001, 0, 0, -1 },
- { 0x0, 0x0, 235, 2778, 732, 0, 1, 21 },
- { 0x0, 0x0, 235, 2779, 1006, 0, 0, -1 },
- { 0x0, 0x0, 235, 2780, 1010, 0, 0, -1 },
- { 0x0, 0x0, 235, 2781, 755, 0, 1, 17 },
- { 0x0, 0x0, 235, 2782, 759, 0, 1, 17 },
- { 0x0, 0x0, 235, 2783, 1014, 0, 0, -1 },
- { 0x0, 0x0, 235, 2784, 771, 0, 1, 21 },
- { 0x1, 0x1, 235, 897, 1137, 27, 1, 16 },
- { 0x0, 0x0, 235, 898, 1135, 0, 1, 16 },
- { 0x0, 0x0, 235, 1202, 1139, 0, 1, 22 },
- { 0x0, 0x1, 235, 1147, 1145, 20, 1, 67 },
- { 0x0, 0x0, 235, 111, 1143, 0, 1, 67 },
+ { 0x1, 0x1, 213, -1, 1426, 32, 1, 142 },
+ { 0x1, 0x1, 213, -1, 1428, 32, 1, 142 },
+ { 0x1, 0x1, 213, -1, 1430, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1432, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1434, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1436, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1438, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1440, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1442, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1444, 32, 1, 141 },
+ { 0x1, 0x1, 213, -1, 1446, 32, 1, 143 },
+ { 0x1, 0x1, 213, -1, 1448, 32, 1, 143 },
+ { 0x1, 0x1, 213, -1, 1965, 32, 1, 138 },
+ { 0x1, 0x1, 213, -1, 1967, 32, 1, 145 },
+ { 0x1, 0x1, 213, -1, 1969, 32, 1, 139 },
+ { 0x1, 0x1, 213, -1, 1971, 32, 1, 139 },
+ { 0x1, 0x1, 213, -1, 1973, 32, 1, 138 },
+ { 0x1, 0x1, 213, -1, 1975, 32, 1, 145 },
+ { 0x1, 0x1, 213, -1, 1977, 32, 1, 138 },
+ { 0x1, 0x1, 213, -1, 1979, 32, 1, 145 },
+ { 0x1, 0x1, 213, 2783, 1981, 32, 1, 138 },
+ { 0x1, 0x1, 213, 2784, 1984, 32, 1, 145 },
+ { 0x0, 0x0, 214, -1, 2825, 0, 0, -1 },
+ { 0x0, 0x0, 214, -1, 2826, 0, 0, -1 },
+ { 0x0, 0x0, 214, -1, 2851, 0, 0, -1 },
+ { 0x5, 0x5, 214, -1, 2854, 20, 1, 68 },
+ { 0x0, 0x0, 218, 2209, 966, 0, 0, -1 },
+ { 0x0, 0x0, 219, -1, 1139, 0, 0, -1 },
+ { 0x0, 0x0, 219, -1, 1264, 0, 0, -1 },
+ { 0x0, 0x0, 219, -1, -1, 0, 1, 128 },
+ { 0x0, 0x0, 219, -1, -1, 0, 1, 67 },
+ { 0x1, 0x1, 219, 833, 2289, 36, 1, 66 },
+ { 0x1, 0x1, 219, 834, 2348, 36, 1, 66 },
+ { 0x0, 0x0, 219, 835, 2351, 0, 0, -1 },
+ { 0x1, 0x1, 219, 836, -1, 36, 1, 66 },
+ { 0x0, 0x0, 219, 1423, -1, 0, 1, 34 },
+ { 0x1, 0x1, 219, 837, 2356, 36, 1, 66 },
+ { 0x0, 0x0, 219, 838, 2359, 0, 0, -1 },
+ { 0x1, 0x1, 219, 839, -1, 36, 1, 66 },
+ { 0x0, 0x0, 219, 840, 2362, 0, 0, -1 },
+ { 0x1, 0x1, 219, 841, -1, 36, 1, 66 },
+ { 0x1, 0x1, 219, 842, 2365, 36, 1, 66 },
+ { 0x1, 0x1, 219, 843, 2368, 36, 1, 66 },
+ { 0x0, 0x0, 219, 1424, -1, 0, 1, 34 },
+ { 0x1, 0x1, 219, 844, 2401, 36, 1, 66 },
+ { 0x1, 0x1, 219, 845, -1, 31, 1, 144 },
+ { 0x1, 0x1, 219, 228, 1449, 32, 1, 133 },
+ { 0x1, 0x1, 219, 229, 1458, 32, 1, 133 },
+ { 0x1, 0x1, 219, 230, 1467, 32, 1, 133 },
+ { 0x1, 0x1, 219, 231, 1480, 32, 1, 133 },
+ { 0x1, 0x1, 219, 232, 1489, 32, 1, 133 },
+ { 0x1, 0x1, 219, 233, 1498, 32, 1, 133 },
+ { 0x1, 0x1, 219, 234, 1507, 32, 1, 133 },
+ { 0x1, 0x1, 219, 235, 1516, 32, 1, 133 },
+ { 0x1, 0x1, 219, 236, 1525, 32, 1, 133 },
+ { 0x1, 0x1, 219, 237, 1534, 32, 1, 133 },
+ { 0x1, 0x1, 219, 238, 1544, 32, 1, 133 },
+ { 0x1, 0x1, 219, 239, 1554, 32, 1, 133 },
+ { 0x1, 0x1, 219, 240, 1567, 32, 1, 148 },
+ { 0x1, 0x1, 219, 241, 1573, 32, 1, 153 },
+ { 0x1, 0x1, 219, 242, 1579, 32, 1, 153 },
+ { 0x1, 0x1, 219, 243, 1585, 32, 1, 148 },
+ { 0x1, 0x1, 219, 244, 1591, 32, 1, 153 },
+ { 0x1, 0x1, 219, 245, 1597, 32, 1, 153 },
+ { 0x1, 0x1, 219, 246, 1603, 32, 1, 148 },
+ { 0x1, 0x1, 219, 247, 1609, 32, 1, 153 },
+ { 0x1, 0x1, 219, 248, 1615, 32, 1, 153 },
+ { 0x1, 0x1, 219, 249, 1621, 32, 1, 148 },
+ { 0x1, 0x1, 219, 250, 1627, 32, 1, 153 },
+ { 0x1, 0x1, 219, 251, 1633, 32, 1, 148 },
+ { 0x1, 0x1, 219, 252, 1639, 32, 1, 153 },
+ { 0x1, 0x1, 219, 253, 1645, 32, 1, 148 },
+ { 0x1, 0x1, 219, 254, 1651, 32, 1, 153 },
+ { 0x1, 0x1, 219, 255, 1657, 32, 1, 148 },
+ { 0x1, 0x1, 219, 256, 1663, 32, 1, 153 },
+ { 0x1, 0x1, 219, 257, 1669, 32, 1, 153 },
+ { 0x1, 0x1, 219, 849, -1, 31, 1, 160 },
+ { 0x0, 0x0, 220, 2404, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2405, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 25, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2407, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2408, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2409, -1, 0, 1, 45 },
+ { 0x0, 0x0, 220, 2410, -1, 0, 1, 40 },
+ { 0x1, 0x1, 220, 2411, -1, 12, 1, 59 },
+ { 0x0, 0x0, 220, 2412, -1, 0, 1, 54 },
+ { 0x1000001, 0x1000001, 220, 2413, -1, 12, 1, 59 },
+ { 0x1, 0x1, 220, 2414, -1, 36, 1, 54 },
+ { 0x200001, 0x200001, 220, 2415, -1, 12, 1, 59 },
+ { 0x1, 0x1, 220, 2416, -1, 33, 1, 54 },
+ { 0x1200001, 0x1200001, 220, 2417, -1, 12, 1, 49 },
+ { 0x9, 0x9, 220, 2418, -1, 33, 1, 49 },
+ { 0x0, 0x0, 220, 2419, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2420, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2421, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2422, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2423, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2424, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2425, -1, 0, 1, 49 },
+ { 0x0, 0x0, 220, 2426, -1, 0, 1, 49 },
+ { 0x1, 0x1, 220, 2427, -1, 12, 1, 59 },
+ { 0x0, 0x0, 220, 2428, -1, 0, 1, 54 },
+ { 0x200001, 0x1200001, 220, 2429, -1, 12, 1, 59 },
+ { 0x1, 0x9, 220, 2430, -1, 33, 1, 54 },
+ { 0x0, 0x0, 220, 2431, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2432, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2433, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2434, -1, 0, 1, 54 },
+ { 0x1, 0x1, 220, 2435, -1, 12, 1, 59 },
+ { 0x0, 0x0, 220, 2436, -1, 0, 1, 54 },
+ { 0x1000001, 0x1000001, 220, 2437, -1, 12, 1, 59 },
+ { 0x1, 0x1, 220, 2438, -1, 36, 1, 54 },
+ { 0x200001, 0x200001, 220, 2439, -1, 12, 1, 59 },
+ { 0x1, 0x1, 220, 2440, -1, 33, 1, 54 },
+ { 0x1200001, 0x1200001, 220, 2441, -1, 12, 1, 49 },
+ { 0x9, 0x9, 220, 2442, -1, 33, 1, 49 },
+ { 0x0, 0x0, 220, 2443, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2444, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2445, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2446, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2447, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2448, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2449, -1, 0, 1, 49 },
+ { 0x0, 0x0, 220, 2450, -1, 0, 1, 49 },
+ { 0x1, 0x1, 220, 2451, -1, 12, 1, 59 },
+ { 0x0, 0x0, 220, 2452, -1, 0, 1, 54 },
+ { 0x200001, 0x1200001, 220, 2453, -1, 12, 1, 59 },
+ { 0x1, 0x9, 220, 2454, -1, 33, 1, 54 },
+ { 0x0, 0x0, 220, 2455, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2456, -1, 0, 1, 54 },
+ { 0x0, 0x0, 220, 2457, -1, 0, 1, 59 },
+ { 0x0, 0x0, 220, 2458, -1, 0, 1, 54 },
+ { 0x1, 0x1, 220, 2459, -1, 28, 1, 29 },
+ { 0x0, 0x0, 220, 2460, -1, 0, 1, 29 },
+ { 0x3, 0x3, 220, 2461, -1, 27, 1, 29 },
+ { 0x1, 0x1, 220, 2462, -1, 27, 1, 29 },
+ { 0x0, 0x0, 220, 2463, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2464, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2465, -1, 0, 1, 29 },
+ { 0x1, 0x1, 220, 2466, -1, 36, 1, 66 },
+ { 0x1, 0x1, 220, 2467, -1, 37, 1, 29 },
+ { 0x0, 0x0, 220, 2468, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2469, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2470, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2471, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2472, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 37, -1, 0, 1, 29 },
+ { 0x1, 0x1, 220, 2474, -1, 36, 1, 66 },
+ { 0x1, 0x1, 220, 2475, -1, 37, 1, 29 },
+ { 0x0, 0x0, 220, 2476, -1, 0, 1, 29 },
+ { 0x1, 0x1, 220, 2477, -1, 36, 1, 66 },
+ { 0x1, 0x1, 220, 2478, -1, 37, 1, 29 },
+ { 0x0, 0x0, 220, 2479, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2480, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2481, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 42, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2483, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2484, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 43, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2486, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2487, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2488, -1, 0, 1, 49 },
+ { 0x1, 0x1, 220, 2489, -1, 27, 1, 49 },
+ { 0x1, 0x1, 220, 2490, -1, 28, 1, 49 },
+ { 0x3, 0x3, 220, 2491, -1, 27, 1, 49 },
+ { 0x1, 0x1, 220, 2492, -1, 29, 1, 49 },
+ { 0x5, 0x5, 220, 2493, -1, 27, 1, 49 },
+ { 0x3, 0x3, 220, 2494, -1, 28, 1, 49 },
+ { 0x7, 0x7, 220, 2495, -1, 27, 1, 49 },
+ { 0x0, 0x0, 220, 2496, -1, 0, 1, 49 },
+ { 0x0, 0x0, 220, 2497, -1, 0, 1, 49 },
+ { 0x0, 0x0, 220, 2498, -1, 0, 1, 49 },
+ { 0x0, 0x0, 220, 2499, -1, 0, 1, 49 },
+ { 0x1, 0x1, 220, 2500, -1, 28, 1, 29 },
+ { 0x0, 0x0, 220, 2501, -1, 0, 1, 29 },
+ { 0x3, 0x3, 220, 2502, -1, 27, 1, 29 },
+ { 0x1, 0x1, 220, 2503, -1, 27, 1, 29 },
+ { 0x0, 0x0, 220, 2504, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2505, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2506, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 52, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2508, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2509, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 57, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 2511, -1, 0, 1, 24 },
+ { 0x0, 0x0, 220, 2512, -1, 0, 1, 24 },
+ { 0x0, 0x0, 220, 2513, -1, 0, 1, 24 },
+ { 0x0, 0x0, 220, 2514, -1, 0, 1, 24 },
+ { 0x0, 0x0, 220, 2515, -1, 0, 1, 35 },
+ { 0x0, 0x0, 220, 2516, -1, 0, 1, 66 },
+ { 0x0, 0x0, 220, 2517, -1, 0, 1, 29 },
+ { 0x0, 0x0, 220, 64, -1, 0, 1, 29 },
+ { 0x1, 0x1, 221, 2519, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2520, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2521, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2522, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2523, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2524, -1, 34, 1, 46 },
+ { 0x1, 0x1, 221, 2525, -1, 34, 1, 42 },
+ { 0x400001, 0x400001, 221, 2526, -1, 12, 1, 61 },
+ { 0x1, 0x1, 221, 2527, -1, 34, 1, 56 },
+ { 0x1400001, 0x1400001, 221, 2528, -1, 12, 1, 61 },
+ { 0x5, 0x5, 221, 2529, -1, 34, 1, 56 },
+ { 0x600001, 0x600001, 221, 2530, -1, 12, 1, 61 },
+ { 0x3, 0x3, 221, 2531, -1, 33, 1, 56 },
+ { 0x1600001, 0x1600001, 221, 2532, -1, 12, 1, 51 },
+ { 0xb, 0xb, 221, 2533, -1, 33, 1, 51 },
+ { 0x1, 0x1, 221, 2534, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2535, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2536, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2537, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2538, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2539, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2540, -1, 34, 1, 51 },
+ { 0x1, 0x1, 221, 2541, -1, 34, 1, 51 },
+ { 0x400001, 0x400001, 221, 2542, -1, 12, 1, 61 },
+ { 0x1, 0x1, 221, 2543, -1, 34, 1, 56 },
+ { 0x600001, 0x1600001, 221, 2544, -1, 12, 1, 61 },
+ { 0x3, 0xb, 221, 2545, -1, 33, 1, 56 },
+ { 0x1, 0x1, 221, 2546, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2547, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2548, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2549, -1, 34, 1, 56 },
+ { 0x400001, 0x400001, 221, 2550, -1, 12, 1, 61 },
+ { 0x1, 0x1, 221, 2551, -1, 34, 1, 56 },
+ { 0x1400001, 0x1400001, 221, 2552, -1, 12, 1, 61 },
+ { 0x5, 0x5, 221, 2553, -1, 34, 1, 56 },
+ { 0x600001, 0x600001, 221, 2554, -1, 12, 1, 61 },
+ { 0x3, 0x3, 221, 2555, -1, 33, 1, 56 },
+ { 0x1600001, 0x1600001, 221, 2556, -1, 12, 1, 51 },
+ { 0xb, 0xb, 221, 2557, -1, 33, 1, 51 },
+ { 0x1, 0x1, 221, 2558, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2559, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2560, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2561, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2562, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2563, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2564, -1, 34, 1, 51 },
+ { 0x1, 0x1, 221, 2565, -1, 34, 1, 51 },
+ { 0x400001, 0x400001, 221, 2566, -1, 12, 1, 61 },
+ { 0x1, 0x1, 221, 2567, -1, 34, 1, 56 },
+ { 0x600001, 0x1600001, 221, 2568, -1, 12, 1, 61 },
+ { 0x3, 0xb, 221, 2569, -1, 33, 1, 56 },
+ { 0x1, 0x1, 221, 2570, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2571, -1, 34, 1, 56 },
+ { 0x1, 0x1, 221, 2572, -1, 34, 1, 61 },
+ { 0x1, 0x1, 221, 2573, -1, 34, 1, 56 },
+ { 0x41, 0x41, 221, 2574, -1, 28, 1, 31 },
+ { 0x1, 0x1, 221, 2575, -1, 34, 1, 31 },
+ { 0x83, 0x83, 221, 2576, -1, 27, 1, 31 },
+ { 0x81, 0x81, 221, 2577, -1, 27, 1, 31 },
+ { 0x1, 0x1, 221, 2578, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2579, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2580, -1, 34, 1, 31 },
+ { 0x5, 0x5, 221, 2581, -1, 34, 1, 66 },
+ { 0x9, 0x9, 221, 2582, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2583, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2584, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2585, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2586, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2587, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2588, -1, 34, 1, 31 },
+ { 0x5, 0x5, 221, 2589, -1, 34, 1, 66 },
+ { 0x9, 0x9, 221, 2590, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2591, -1, 34, 1, 31 },
+ { 0x5, 0x5, 221, 2592, -1, 34, 1, 66 },
+ { 0x9, 0x9, 221, 2593, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2594, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2595, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2596, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2597, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2598, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2599, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2600, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2601, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2602, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2603, -1, 34, 1, 51 },
+ { 0x81, 0x81, 221, 2604, -1, 27, 1, 51 },
+ { 0x41, 0x41, 221, 2605, -1, 28, 1, 51 },
+ { 0x83, 0x83, 221, 2606, -1, 27, 1, 51 },
+ { 0x21, 0x21, 221, 2607, -1, 29, 1, 51 },
+ { 0x85, 0x85, 221, 2608, -1, 27, 1, 51 },
+ { 0x43, 0x43, 221, 2609, -1, 28, 1, 51 },
+ { 0x87, 0x87, 221, 2610, -1, 27, 1, 51 },
+ { 0x1, 0x1, 221, 2611, -1, 34, 1, 51 },
+ { 0x1, 0x1, 221, 2612, -1, 34, 1, 51 },
+ { 0x1, 0x1, 221, 2613, -1, 34, 1, 51 },
+ { 0x1, 0x1, 221, 2614, -1, 34, 1, 51 },
+ { 0x41, 0x41, 221, 2615, -1, 28, 1, 31 },
+ { 0x1, 0x1, 221, 2616, -1, 34, 1, 31 },
+ { 0x83, 0x83, 221, 2617, -1, 27, 1, 31 },
+ { 0x81, 0x81, 221, 2618, -1, 27, 1, 31 },
+ { 0x1, 0x1, 221, 2619, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2620, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2621, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2622, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2623, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2624, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2625, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2626, -1, 34, 1, 26 },
+ { 0x1, 0x1, 221, 2627, -1, 34, 1, 26 },
+ { 0x1, 0x1, 221, 2628, -1, 34, 1, 26 },
+ { 0x1, 0x1, 221, 2629, -1, 34, 1, 26 },
+ { 0x1, 0x1, 221, 2630, -1, 34, 1, 37 },
+ { 0x1, 0x1, 221, 2631, -1, 34, 1, 66 },
+ { 0x1, 0x1, 221, 2632, -1, 34, 1, 31 },
+ { 0x1, 0x1, 221, 2633, -1, 34, 1, 31 },
+ { 0x1, 0x1, 222, 2634, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2635, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2636, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2637, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2638, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2639, -1, 35, 1, 47 },
+ { 0x1, 0x1, 222, 2640, -1, 35, 1, 43 },
+ { 0x800001, 0x800001, 222, 2641, -1, 12, 1, 62 },
+ { 0x1, 0x1, 222, 2642, -1, 35, 1, 57 },
+ { 0x1800001, 0x1800001, 222, 2643, -1, 12, 1, 62 },
+ { 0x3, 0x3, 222, 2644, -1, 35, 1, 57 },
+ { 0xa00001, 0xa00001, 222, 2645, -1, 12, 1, 62 },
+ { 0x5, 0x5, 222, 2646, -1, 33, 1, 57 },
+ { 0x1a00001, 0x1a00001, 222, 2647, -1, 12, 1, 52 },
+ { 0xd, 0xd, 222, 2648, -1, 33, 1, 52 },
+ { 0x1, 0x1, 222, 2649, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2650, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2651, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2652, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2653, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2654, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2655, -1, 35, 1, 52 },
+ { 0x1, 0x1, 222, 2656, -1, 35, 1, 52 },
+ { 0x800001, 0x800001, 222, 2657, -1, 12, 1, 62 },
+ { 0x1, 0x1, 222, 2658, -1, 35, 1, 57 },
+ { 0xa00001, 0x1a00001, 222, 2659, -1, 12, 1, 62 },
+ { 0x5, 0xd, 222, 2660, -1, 33, 1, 57 },
+ { 0x1, 0x1, 222, 2661, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2662, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2663, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2664, -1, 35, 1, 57 },
+ { 0x800001, 0x800001, 222, 2665, -1, 12, 1, 62 },
+ { 0x1, 0x1, 222, 2666, -1, 35, 1, 57 },
+ { 0x1800001, 0x1800001, 222, 2667, -1, 12, 1, 62 },
+ { 0x3, 0x3, 222, 2668, -1, 35, 1, 57 },
+ { 0xa00001, 0xa00001, 222, 2669, -1, 12, 1, 62 },
+ { 0x5, 0x5, 222, 2670, -1, 33, 1, 57 },
+ { 0x1a00001, 0x1a00001, 222, 2671, -1, 12, 1, 52 },
+ { 0xd, 0xd, 222, 2672, -1, 33, 1, 52 },
+ { 0x1, 0x1, 222, 2673, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2674, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2675, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2676, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2677, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2678, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2679, -1, 35, 1, 52 },
+ { 0x1, 0x1, 222, 2680, -1, 35, 1, 52 },
+ { 0x800001, 0x800001, 222, 2681, -1, 12, 1, 62 },
+ { 0x1, 0x1, 222, 2682, -1, 35, 1, 57 },
+ { 0xa00001, 0x1a00001, 222, 2683, -1, 12, 1, 62 },
+ { 0x5, 0xd, 222, 2684, -1, 33, 1, 57 },
+ { 0x1, 0x1, 222, 2685, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2686, -1, 35, 1, 57 },
+ { 0x1, 0x1, 222, 2687, -1, 35, 1, 62 },
+ { 0x1, 0x1, 222, 2688, -1, 35, 1, 57 },
+ { 0x81, 0x81, 222, 2689, -1, 28, 1, 32 },
+ { 0x1, 0x1, 222, 2690, -1, 35, 1, 32 },
+ { 0x103, 0x103, 222, 2691, -1, 27, 1, 32 },
+ { 0x101, 0x101, 222, 2692, -1, 27, 1, 32 },
+ { 0x1, 0x1, 222, 2693, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2694, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2695, -1, 35, 1, 32 },
+ { 0x3, 0x3, 222, 2696, -1, 35, 1, 66 },
+ { 0x5, 0x5, 222, 2697, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2698, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2699, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2700, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2701, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2702, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2703, -1, 35, 1, 32 },
+ { 0x3, 0x3, 222, 2704, -1, 35, 1, 66 },
+ { 0x5, 0x5, 222, 2705, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2706, -1, 35, 1, 32 },
+ { 0x3, 0x3, 222, 2707, -1, 35, 1, 66 },
+ { 0x5, 0x5, 222, 2708, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2709, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2710, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2711, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2712, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2713, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2714, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2715, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2716, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2717, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2718, -1, 35, 1, 52 },
+ { 0x101, 0x101, 222, 2719, -1, 27, 1, 52 },
+ { 0x81, 0x81, 222, 2720, -1, 28, 1, 52 },
+ { 0x103, 0x103, 222, 2721, -1, 27, 1, 52 },
+ { 0x41, 0x41, 222, 2722, -1, 29, 1, 52 },
+ { 0x105, 0x105, 222, 2723, -1, 27, 1, 52 },
+ { 0x83, 0x83, 222, 2724, -1, 28, 1, 52 },
+ { 0x107, 0x107, 222, 2725, -1, 27, 1, 52 },
+ { 0x1, 0x1, 222, 2726, -1, 35, 1, 52 },
+ { 0x1, 0x1, 222, 2727, -1, 35, 1, 52 },
+ { 0x1, 0x1, 222, 2728, -1, 35, 1, 52 },
+ { 0x1, 0x1, 222, 2729, -1, 35, 1, 52 },
+ { 0x81, 0x81, 222, 2730, -1, 28, 1, 32 },
+ { 0x1, 0x1, 222, 2731, -1, 35, 1, 32 },
+ { 0x103, 0x103, 222, 2732, -1, 27, 1, 32 },
+ { 0x101, 0x101, 222, 2733, -1, 27, 1, 32 },
+ { 0x1, 0x1, 222, 2734, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2735, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2736, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2737, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2738, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2739, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2740, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2741, -1, 35, 1, 27 },
+ { 0x1, 0x1, 222, 2742, -1, 35, 1, 27 },
+ { 0x1, 0x1, 222, 2743, -1, 35, 1, 27 },
+ { 0x1, 0x1, 222, 2744, -1, 35, 1, 27 },
+ { 0x1, 0x1, 222, 2745, -1, 35, 1, 38 },
+ { 0x1, 0x1, 222, 2746, -1, 35, 1, 66 },
+ { 0x1, 0x1, 222, 2747, -1, 35, 1, 32 },
+ { 0x1, 0x1, 222, 2748, -1, 35, 1, 32 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2243, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 48 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 44 },
+ { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
+ { 0x3, 0x3, 223, 2964, -1, 34, 1, 58 },
+ { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0x7, 223, 2965, -1, 34, 1, 58 },
+ { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0x7, 223, 2966, -1, 33, 1, 58 },
+ { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 53 },
+ { 0xf, 0xf, 223, 2967, -1, 33, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2968, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2969, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2970, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x3, 0x3, 223, 2971, -1, 34, 1, 53 },
+ { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
+ { 0x3, 0x3, 223, 2976, -1, 34, 1, 58 },
+ { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0xf, 223, 2977, -1, 33, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2978, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2979, -1, 34, 1, 58 },
+ { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
+ { 0x3, 0x3, 223, 2982, -1, 34, 1, 58 },
+ { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0x7, 223, 2983, -1, 34, 1, 58 },
+ { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0x7, 223, 2984, -1, 33, 1, 58 },
+ { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 53 },
+ { 0xf, 0xf, 223, 2985, -1, 33, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2986, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2987, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2988, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x3, 0x3, 223, 2989, -1, 34, 1, 53 },
+ { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 63 },
+ { 0x3, 0x3, 223, 2994, -1, 34, 1, 58 },
+ { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 63 },
+ { 0x7, 0xf, 223, 2995, -1, 33, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2996, -1, 34, 1, 58 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 63 },
+ { 0x3, 0x3, 223, 2997, -1, 34, 1, 58 },
+ { 0xc1, 0xc1, 223, -1, -1, 28, 1, 33 },
+ { 0x3, 0x3, 223, 2862, -1, 34, 1, 33 },
+ { 0x183, 0x183, 223, -1, -1, 27, 1, 33 },
+ { 0x181, 0x181, 223, 2863, -1, 27, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2244, -1, 34, 1, 33 },
+ { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
+ { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2245, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2248, -1, 34, 1, 33 },
+ { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
+ { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2249, -1, 34, 1, 33 },
+ { 0x7, 0x7, 223, -1, -1, 34, 1, 66 },
+ { 0xb, 0xb, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2251, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2253, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2254, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x181, 0x181, 223, -1, -1, 27, 1, 53 },
+ { 0xc1, 0xc1, 223, -1, -1, 28, 1, 53 },
+ { 0x183, 0x183, 223, -1, -1, 27, 1, 53 },
+ { 0x61, 0x61, 223, -1, -1, 29, 1, 53 },
+ { 0x185, 0x185, 223, -1, -1, 27, 1, 53 },
+ { 0xc3, 0xc3, 223, -1, -1, 28, 1, 53 },
+ { 0x187, 0x187, 223, -1, -1, 27, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 53 },
+ { 0xc1, 0xc1, 223, -1, -1, 28, 1, 33 },
+ { 0x3, 0x3, 223, 2866, -1, 34, 1, 33 },
+ { 0x183, 0x183, 223, -1, -1, 27, 1, 33 },
+ { 0x181, 0x181, 223, 2867, -1, 27, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 28 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 28 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 28 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 28 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 39 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 66 },
+ { 0x3, 0x3, 223, -1, -1, 34, 1, 33 },
+ { 0x3, 0x3, 223, 2256, -1, 34, 1, 33 },
+ { 0x3, 0x3, 224, 540, 1451, 32, 1, 135 },
+ { 0x3, 0x3, 224, 541, 1460, 32, 1, 135 },
+ { 0x3, 0x3, 224, 542, 1469, 32, 1, 135 },
+ { 0x3, 0x3, 224, 543, 1482, 32, 1, 135 },
+ { 0x3, 0x3, 224, 544, 1491, 32, 1, 135 },
+ { 0x3, 0x3, 224, 545, 1500, 32, 1, 135 },
+ { 0x3, 0x3, 224, 546, 1509, 32, 1, 135 },
+ { 0x3, 0x3, 224, 547, 1518, 32, 1, 135 },
+ { 0x3, 0x3, 224, 548, 1527, 32, 1, 135 },
+ { 0x3, 0x3, 224, 549, 1536, 32, 1, 135 },
+ { 0x3, 0x3, 224, 550, 1546, 32, 1, 135 },
+ { 0x3, 0x3, 224, 551, 1556, 32, 1, 135 },
+ { 0x3, 0x3, 224, 564, 1569, 32, 1, 150 },
+ { 0x3, 0x3, 224, 565, 1575, 32, 1, 155 },
+ { 0x3, 0x3, 224, 566, 1581, 32, 1, 155 },
+ { 0x3, 0x3, 224, 567, 1587, 32, 1, 150 },
+ { 0x3, 0x3, 224, 568, 1593, 32, 1, 155 },
+ { 0x3, 0x3, 224, 569, 1599, 32, 1, 155 },
+ { 0x3, 0x3, 224, 570, 1605, 32, 1, 150 },
+ { 0x3, 0x3, 224, 571, 1611, 32, 1, 155 },
+ { 0x3, 0x3, 224, 572, 1617, 32, 1, 155 },
+ { 0x3, 0x3, 224, 573, 1623, 32, 1, 150 },
+ { 0x3, 0x3, 224, 574, 1629, 32, 1, 155 },
+ { 0x3, 0x3, 224, 575, 1635, 32, 1, 150 },
+ { 0x3, 0x3, 224, 576, 1641, 32, 1, 155 },
+ { 0x3, 0x3, 224, 577, 1647, 32, 1, 150 },
+ { 0x3, 0x3, 224, 578, 1653, 32, 1, 155 },
+ { 0x3, 0x3, 224, 579, 1659, 32, 1, 150 },
+ { 0x3, 0x3, 224, 580, 1665, 32, 1, 155 },
+ { 0x3, 0x3, 224, 581, 1671, 32, 1, 155 },
+ { 0x1, 0x1, 225, -1, -1, 28, 1, 34 },
+ { 0x1, 0x1, 225, -1, -1, 28, 1, 34 },
+ { 0x0, 0x0, 232, 958, -1, 0, 1, 144 },
+ { 0x0, 0x0, 232, 959, -1, 0, 1, 160 },
+ { 0x1, 0x1, 233, -1, 1982, 33, 1, 140 },
+ { 0x1, 0x1, 233, -1, 1985, 33, 1, 146 },
+ { 0x0, 0x0, 233, -1, 1987, 0, 1, 157 },
+ { 0x0, 0x0, 233, -1, 1988, 0, 1, 161 },
+ { 0x0, 0x0, 234, 883, 971, 0, 0, -1 },
+ { 0x0, 0x0, 234, 884, 979, 0, 0, -1 },
+ { 0x0, 0x0, 234, 885, 975, 0, 0, -1 },
+ { 0x1, 0x1, 234, 886, 620, 33, 1, 6 },
+ { 0x8000001, 0x8000001, 234, 887, 628, 6, 1, 7 },
+ { 0x1, 0x1, 234, 888, 624, 33, 1, 6 },
+ { 0x0, 0x0, 234, 889, 983, 0, 0, -1 },
+ { 0x1, 0x1, 234, 890, 640, 33, 1, 8 },
+ { 0x0, 0x0, 234, 891, 987, 0, 0, -1 },
+ { 0x1, 0x1, 234, 892, 652, 33, 1, 16 },
+ { 0x0, 0x0, 234, 893, 992, 0, 0, -1 },
+ { 0x0, 0x0, 234, 894, 996, 0, 0, -1 },
+ { 0x1, 0x1, 234, 895, 675, 33, 1, 18 },
+ { 0x1, 0x1, 234, 896, 679, 33, 1, 18 },
+ { 0x0, 0x0, 234, 897, 1000, 0, 0, -1 },
+ { 0x0, 0x0, 234, 898, 1004, 0, 0, -1 },
+ { 0x1, 0x1, 234, 899, 699, 33, 1, 19 },
+ { 0x8000001, 0x8000001, 234, 900, 703, 6, 1, 19 },
+ { 0x0, 0x0, 234, 901, 1008, 0, 0, -1 },
+ { 0x1, 0x1, 234, 902, 715, 33, 1, 20 },
+ { 0x0, 0x0, 234, 903, 1012, 0, 0, -1 },
+ { 0x0, 0x0, 234, 904, 1016, 0, 0, -1 },
+ { 0x1, 0x1, 234, 905, 735, 33, 1, 21 },
+ { 0x8000001, 0x8000001, 234, 906, 739, 6, 1, 21 },
+ { 0x0, 0x0, 234, 907, 1020, 0, 0, -1 },
+ { 0x1, 0x1, 234, 908, 751, 33, 1, 22 },
+ { 0x0, 0x0, 234, 909, 1025, 0, 0, -1 },
+ { 0x0, 0x0, 234, 910, 1029, 0, 0, -1 },
+ { 0x1, 0x1, 234, 911, 774, 33, 1, 18 },
+ { 0x1, 0x1, 234, 912, 778, 33, 1, 18 },
+ { 0x0, 0x0, 234, 913, 1033, 0, 0, -1 },
+ { 0x1, 0x1, 234, 914, 790, 33, 1, 22 },
+ { 0x0, 0x0, 235, 2787, 970, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2788, 978, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2789, 974, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2790, 619, 0, 1, 6 },
+ { 0x1, 0x1, 235, 2791, 627, 6, 1, 7 },
+ { 0x0, 0x0, 235, 2792, 623, 0, 1, 6 },
+ { 0x0, 0x0, 235, 2793, 982, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2794, 639, 0, 1, 8 },
+ { 0x0, 0x0, 235, 2795, 986, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2796, 651, 0, 1, 16 },
+ { 0x0, 0x0, 235, 2797, 991, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2798, 995, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2799, 674, 0, 1, 18 },
+ { 0x0, 0x0, 235, 2800, 678, 0, 1, 18 },
+ { 0x0, 0x0, 235, 2801, 999, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2802, 1003, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2803, 698, 0, 1, 19 },
+ { 0x1, 0x1, 235, 2804, 702, 6, 1, 19 },
+ { 0x0, 0x0, 235, 2805, 1007, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2806, 714, 0, 1, 20 },
+ { 0x0, 0x0, 235, 2807, 1011, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2808, 1015, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2809, 734, 0, 1, 21 },
+ { 0x1, 0x1, 235, 2810, 738, 6, 1, 21 },
+ { 0x0, 0x0, 235, 2811, 1019, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2812, 750, 0, 1, 22 },
+ { 0x0, 0x0, 235, 2813, 1024, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2814, 1028, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2815, 773, 0, 1, 18 },
+ { 0x0, 0x0, 235, 2816, 777, 0, 1, 18 },
+ { 0x0, 0x0, 235, 2817, 1032, 0, 0, -1 },
+ { 0x0, 0x0, 235, 2818, 789, 0, 1, 22 },
+ { 0x1, 0x1, 235, 915, 1155, 27, 1, 17 },
+ { 0x0, 0x0, 235, 916, 1153, 0, 1, 17 },
+ { 0x0, 0x0, 235, 1220, 1157, 0, 1, 23 },
+ { 0x0, 0x1, 235, 1165, 1163, 20, 1, 68 },
+ { 0x0, 0x0, 235, 111, 1161, 0, 1, 68 },
{ 0x1, 0x1, 238, -1, -1, 29, 1, 0 },
{ 0x0, 0x0, 238, -1, -1, 0, 1, 0 },
- { 0x1, 0x1, 238, 2984, -1, 27, 1, 0 },
- { 0x1, 0x1, 238, 2985, -1, 27, 1, 0 },
- { 0x1, 0x1, 238, 2986, -1, 27, 1, 0 },
- { 0x1, 0x1, 238, 2987, -1, 27, 1, 0 },
- { 0x0, 0x0, 260, -1, 2310, 0, 0, -1 },
- { 0x0, 0x0, 260, -1, 2312, 0, 0, -1 },
- { 0x1, 0x1, 260, -1, -1, 28, 1, 29 },
- { 0x1, 0x1, 260, -1, -1, 28, 1, 29 },
- { 0x0, 0x0, 260, -1, 2351, 0, 0, -1 },
- { 0x0, 0x0, 260, -1, 2353, 0, 0, -1 },
- { 0x1, 0x1, 260, -1, -1, 28, 1, 29 },
- { 0x1, 0x1, 260, -1, -1, 28, 1, 29 },
- { 0x0, 0x0, 262, 23, -1, 0, 1, 0 },
- { 0x0, 0x0, 262, -1, -1, 0, 1, 0 },
- { 0x0, 0x0, 262, -1, -1, 0, 1, 0 },
- { 0x0, 0x1, 262, -1, -1, 29, 1, 0 },
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+ { 0x1, 0x1, 264, 393, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 395, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 517, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 519, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 401, -1, 12, 1, 77 },
+ { 0x1, 0x1, 264, 403, -1, 12, 1, 77 },
+ { 0x1, 0x1, 264, 525, -1, 12, 1, 77 },
+ { 0x1, 0x1, 264, 527, -1, 12, 1, 77 },
+ { 0x1, 0x1, 264, 409, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 411, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 533, -1, 12, 1, 2 },
+ { 0x1, 0x1, 264, 535, -1, 12, 1, 2 },
+ { 0x0, 0x0, 265, -1, 2303, 0, 0, -1 },
+ { 0x9, 0x9, 265, -1, 2311, 33, 1, 50 },
+ { 0x9, 0x9, 265, -1, 2975, 33, 1, 50 },
+ { 0x0, 0x0, 265, 1399, 2376, 0, 0, -1 },
+ { 0x3, 0x3, 265, 1400, -1, 27, 1, 50 },
+ { 0x0, 0x0, 269, 2856, -1, 0, 1, 0 },
+ { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
+ { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
+ { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
+ { 0x3, 0x3, 270, -1, -1, 27, 1, 0 },
+ { 0x1, 0x1, 271, 3018, -1, 28, 1, 0 },
+ { 0x1, 0x1, 271, 3019, -1, 28, 1, 0 },
+ { 0x1, 0x1, 271, 3020, -1, 28, 1, 0 },
+ { 0x1, 0x1, 271, 3021, -1, 28, 1, 0 },
+ { 0x1, 0x1, 273, -1, -1, 27, 1, 100 },
+ { 0x1, 0x1, 273, -1, -1, 27, 1, 100 },
+ { 0x0, 0x0, 273, -1, 968, 0, 0, -1 },
+ { 0x0, 0x0, 274, 3031, 2833, 0, 0, -1 },
+ { 0x0, 0x0, 274, 3032, 2835, 0, 0, -1 },
+ { 0x0, 0x0, 275, -1, 2834, 0, 0, -1 },
+ { 0x0, 0x0, 275, -1, 2836, 0, 0, -1 },
+ { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
+ { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
+ { 0x0, 0x0, 276, -1, -1, 0, 1, 41 },
+ { 0x0, 0x0, 281, -1, -1, 0, 1, 34 },
+ { 0x0, 0x0, 285, -1, 2350, 0, 1, 30 },
+ { 0x0, 0x0, 286, -1, -1, 0, 1, 0 },
+ { 0x0, 0x0, 286, -1, -1, 0, 1, 72 },
+ { 0x0, 0x0, 286, 2001, 3000, 0, 1, 1 },
+ { 0x0, 0x0, 286, 2002, 3001, 0, 1, 1 },
+ { 0x0, 0x0, 286, -1, 518, 0, 0, -1 },
+ { 0x0, 0x0, 286, -1, 520, 0, 0, -1 },
+ { 0x0, 0x0, 286, 2005, 3004, 0, 1, 76 },
+ { 0x0, 0x0, 286, 2006, 3005, 0, 1, 76 },
+ { 0x0, 0x0, 286, -1, 526, 0, 0, -1 },
+ { 0x0, 0x0, 286, -1, 528, 0, 0, -1 },
+ { 0x0, 0x0, 286, 2009, 3008, 0, 1, 1 },
+ { 0x0, 0x0, 286, 2010, 3009, 0, 1, 1 },
+ { 0x0, 0x0, 286, -1, 534, 0, 0, -1 },
+ { 0x0, 0x0, 286, -1, 536, 0, 0, -1 },
};
static const struct ia64_main_table
main_table[] = {
{ 5, 1, 1, 0x0000010000000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 0, },
{ 5, 1, 1, 0x0000010008000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 1, },
- { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 66, 27, 0, 0 }, 0x0, 2, },
- { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 63, 26, 0, 0 }, 0x0, 3, },
- { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 66, 27, 0, 0 }, 0x0, 4, },
+ { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 2, },
+ { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 64, 26, 0, 0 }, 0x0, 3, },
+ { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 4, },
{ 7, 1, 1, 0x0000010040000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 5, },
- { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 63, 26, 0, 0 }, 0x0, 6, },
- { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 63, 26, 0, 0 }, 0x0, 7, },
- { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 52, 53, 54 }, 0x221, 8, },
- { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 52, 53, 54, 0 }, 0x261, 9, },
+ { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 6, },
+ { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 7, },
+ { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 53, 54, 55 }, 0x221, 8, },
+ { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 53, 54, 55, 0 }, 0x261, 9, },
{ 10, 1, 1, 0x0000010060000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 10, },
- { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 11, },
+ { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 11, },
{ 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 12, },
- { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 13, },
- { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 951, },
- { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 807, },
- { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 808, },
- { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 2200, },
- { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 2201, },
- { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 564, },
- { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 565, },
- { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 81, 0, 0, 0, 0 }, 0x40, 972, },
- { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x0, 809, },
- { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x40, 810, },
- { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x210, 2991, },
- { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x250, 2992, },
- { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x30, 572, },
- { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x70, 573, },
- { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x230, 570, },
- { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x270, 571, },
- { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x0, 566, },
- { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x40, 567, },
- { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 519, },
- { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 942, },
- { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x2, 1120, },
- { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1245, },
- { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2995, },
- { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 16, },
- { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 1005, },
- { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 811, },
- { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 812, },
- { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 568, },
- { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 569, },
- { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 77, 0, 0, 0 }, 0x20, 2818, },
- { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 81, 77, 0, 0, 0 }, 0x20, 2819, },
+ { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 13, },
+ { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 969, },
+ { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 825, },
+ { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 826, },
+ { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 2234, },
+ { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 2235, },
+ { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 582, },
+ { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 583, },
+ { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 990, },
+ { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 827, },
+ { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 828, },
+ { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x210, 3029, },
+ { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x250, 3030, },
+ { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x30, 590, },
+ { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x70, 591, },
+ { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x230, 588, },
+ { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x270, 589, },
+ { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 584, },
+ { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 585, },
+ { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 537, },
+ { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 960, },
+ { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1138, },
+ { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1263, },
+ { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3033, },
+ { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 16, },
+ { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 83, 0, 0, 0, 0 }, 0x40, 1023, },
+ { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x0, 829, },
+ { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x40, 830, },
+ { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x0, 586, },
+ { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x40, 587, },
+ { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 78, 0, 0, 0 }, 0x20, 2852, },
+ { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 82, 78, 0, 0, 0 }, 0x20, 2853, },
{ 18, 4, 0, 0x0000000060000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 222, },
- { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 2205, },
- { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 24, 81, 0, 0, 0 }, 0x0, 224, },
- { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 18, 81, 0, 0, 0 }, 0x0, 225, },
- { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 2206, },
- { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 19, 80, 0, 0, 0 }, 0x0, 2207, },
- { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 25, 80, 0, 0, 0 }, 0x0, 2208, },
+ { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2239, },
+ { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 24, 82, 0, 0, 0 }, 0x0, 226, },
+ { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 18, 82, 0, 0, 0 }, 0x0, 227, },
+ { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2240, },
+ { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 19, 81, 0, 0, 0 }, 0x0, 2241, },
+ { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 25, 81, 0, 0, 0 }, 0x0, 2242, },
{ 25, 4, 0, 0x0000000020000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 18, },
- { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1204, },
- { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 25, 26, 0, 0 }, 0x40, 1205, },
- { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 1163, },
- { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 26, 25, 0, 0 }, 0x40, 1164, },
- { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 1072, },
- { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 26, 25, 0, 0 }, 0x40, 1073, },
- { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 1034, },
- { 26, 1, 1, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 25, 26, 0, 0 }, 0x40, 1035, },
- { 26, 1, 2, 0x0000018200000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1358, },
- { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 1074, },
- { 26, 1, 1, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 7, 26, 0, 0 }, 0x40, 1075, },
- { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1208, },
- { 26, 1, 1, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 26, 7, 0, 0 }, 0x40, 1209, },
- { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1169, },
- { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x0, 1211, },
- { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 55, 26, 0, 0 }, 0x40, 1212, },
- { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1170, },
- { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 57, 26, 0, 0 }, 0x40, 1171, },
- { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 1079, },
- { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 57, 26, 0, 0 }, 0x40, 1080, },
- { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x0, 1041, },
- { 26, 1, 1, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 55, 26, 0, 0 }, 0x40, 1042, },
- { 26, 1, 2, 0x0000018a00000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x40, 1363, },
- { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 23, 59, 26, 0 }, 0x0, 1196, },
- { 26, 1, 1, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 59, 26, 0, 0 }, 0x40, 1197, },
- { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 23, 22, 59, 26, 0 }, 0x0, 1107, },
- { 26, 1, 1, 0x000001a800000000ull, 0x000001ee00001000ull, { 23, 59, 26, 0, 0 }, 0x40, 1108, },
- { 26, 1, 2, 0x000001c200000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x40, 1364, },
- { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 7, 26, 0 }, 0x40, 1172, },
- { 26, 1, 1, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 7, 26, 0, 0 }, 0x40, 1173, },
- { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 7, 0 }, 0x40, 1045, },
- { 26, 1, 1, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 26, 7, 0, 0 }, 0x40, 1046, },
- { 26, 1, 2, 0x000001ca00000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x40, 1365, },
- { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1217, },
- { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 25, 26, 0, 0 }, 0x40, 1218, },
- { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 1176, },
- { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 26, 25, 0, 0 }, 0x40, 1177, },
- { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 1085, },
- { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 26, 25, 0, 0 }, 0x40, 1086, },
- { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 1047, },
- { 27, 1, 1, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 25, 26, 0, 0 }, 0x40, 1048, },
- { 27, 1, 2, 0x0000018600000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1370, },
- { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 1087, },
- { 27, 1, 1, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 7, 26, 0, 0 }, 0x40, 1088, },
- { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1221, },
- { 27, 1, 1, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 26, 7, 0, 0 }, 0x40, 1222, },
- { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1182, },
- { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x0, 1224, },
- { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 55, 26, 0, 0 }, 0x40, 1225, },
- { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1183, },
- { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 57, 26, 0, 0 }, 0x40, 1184, },
- { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 1092, },
- { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 57, 26, 0, 0 }, 0x40, 1093, },
- { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x0, 1054, },
- { 27, 1, 1, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 55, 26, 0, 0 }, 0x40, 1055, },
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+ { 63, 3, 1, 0x0000008488000000ull, 0x000001fff8000000ull, { 24, 28, 72, 0, 0 }, 0x0, 269, },
+ { 64, 3, 1, 0x00000084c8000000ull, 0x000001fff8000000ull, { 24, 28, 72, 0, 0 }, 0x0, 270, },
{ 67, 3, 0, 0x0000000060000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 33, },
- { 68, 5, 1, 0x0000010000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2319, },
+ { 68, 5, 1, 0x0000010000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2353, },
{ 68, 5, 1, 0x0000010000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 34, },
- { 69, 5, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2320, },
+ { 69, 5, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2354, },
{ 69, 5, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 35, },
- { 70, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2213, },
- { 71, 5, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2321, },
+ { 70, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2247, },
+ { 71, 5, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2355, },
{ 71, 5, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 36, },
- { 72, 5, 1, 0x00000001c8000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 1203, },
- { 73, 5, 1, 0x0000010000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2324, },
- { 74, 5, 1, 0x0000014000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2327, },
+ { 72, 5, 1, 0x00000001c8000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 1221, },
+ { 73, 5, 1, 0x0000010000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2358, },
+ { 74, 5, 1, 0x0000014000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2361, },
{ 74, 5, 1, 0x0000014000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 38, },
{ 75, 5, 1, 0x0000000088000000ull, 0x000001e3f8000000ull, { 18, 20, 0, 0, 0 }, 0xc0, 39, },
{ 76, 5, 1, 0x0000000088000000ull, 0x000001e3f80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 40, },
- { 77, 5, 1, 0x0000018000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2330, },
+ { 77, 5, 1, 0x0000018000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2364, },
{ 77, 5, 1, 0x0000018000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 41, },
- { 78, 5, 1, 0x0000018000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2333, },
- { 79, 5, 1, 0x0000010008000000ull, 0x000001fff80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 2336, },
+ { 78, 5, 1, 0x0000018000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2367, },
+ { 79, 5, 1, 0x0000010008000000ull, 0x000001fff80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 2370, },
{ 80, 5, 1, 0x0000000170000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 44, },
{ 81, 5, 1, 0x0000002080000000ull, 0x000001e3f80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 45, },
{ 82, 5, 1, 0x0000000140000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 46, },
- { 83, 5, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2337, },
+ { 83, 5, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2371, },
{ 83, 5, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 47, },
- { 84, 5, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2338, },
+ { 84, 5, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2372, },
{ 84, 5, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 48, },
- { 85, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 928, },
- { 85, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 929, },
- { 85, 5, 1, 0x0000002188000000ull, 0x000001eff8000000ull, { 18, 20, 19, 0, 0 }, 0x40, 1101, },
- { 86, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 18, 19, 0, 0, 0 }, 0x0, 1026, },
- { 86, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 18, 19, 0, 0, 0 }, 0x40, 1027, },
- { 87, 5, 1, 0x0000013000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2355, },
+ { 85, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 946, },
+ { 85, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 947, },
+ { 85, 5, 1, 0x0000002188000000ull, 0x000001eff8000000ull, { 18, 20, 19, 0, 0 }, 0x40, 1119, },
+ { 86, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 18, 19, 0, 0, 0 }, 0x0, 1044, },
+ { 86, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 18, 19, 0, 0, 0 }, 0x40, 1045, },
+ { 87, 5, 1, 0x0000013000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2389, },
{ 87, 5, 1, 0x0000013000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 49, },
- { 88, 5, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2356, },
+ { 88, 5, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2390, },
{ 88, 5, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 50, },
- { 89, 5, 1, 0x0000002080000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2221, },
- { 90, 5, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2357, },
+ { 89, 5, 1, 0x0000002080000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2255, },
+ { 90, 5, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2391, },
{ 90, 5, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 18, 19, 20, 0, 0 }, 0x40, 51, },
- { 91, 5, 1, 0x0000013000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2358, },
- { 92, 5, 1, 0x0000017000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2359, },
+ { 91, 5, 1, 0x0000013000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2392, },
+ { 92, 5, 1, 0x0000017000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2393, },
{ 92, 5, 1, 0x0000017000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 53, },
{ 93, 5, 1, 0x0000002088000000ull, 0x000001e3f8000000ull, { 18, 20, 0, 0, 0 }, 0xc0, 54, },
{ 94, 5, 1, 0x0000002088000000ull, 0x000001e3f80fe000ull, { 18, 20, 0, 0, 0 }, 0x40, 55, },
- { 95, 5, 1, 0x000001b000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2360, },
+ { 95, 5, 1, 0x000001b000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 2394, },
{ 95, 5, 1, 0x000001b000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 56, },
- { 96, 5, 1, 0x000001b000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2361, },
- { 97, 5, 2, 0x0000002200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x0, 2362, },
+ { 96, 5, 1, 0x000001b000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 2395, },
+ { 97, 5, 2, 0x0000002200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x0, 2396, },
{ 97, 5, 2, 0x0000002200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x40, 58, },
- { 98, 5, 2, 0x0000003200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x0, 2363, },
+ { 98, 5, 2, 0x0000003200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x0, 2397, },
{ 98, 5, 2, 0x0000003200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x40, 59, },
- { 99, 5, 2, 0x0000000200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x0, 2364, },
+ { 99, 5, 2, 0x0000000200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x0, 2398, },
{ 99, 5, 2, 0x0000000200000000ull, 0x000001fe00000000ull, { 18, 23, 19, 20, 0 }, 0x40, 60, },
- { 100, 5, 2, 0x0000001200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x0, 2365, },
+ { 100, 5, 2, 0x0000001200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x0, 2399, },
{ 100, 5, 2, 0x0000001200000000ull, 0x000001fe00000000ull, { 18, 23, 20, 0, 0 }, 0x40, 61, },
{ 101, 5, 1, 0x000001c000000000ull, 0x000001f000000000ull, { 18, 20, 21, 19, 0 }, 0x0, 62, },
- { 102, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 50, 51, 0, 0, 0 }, 0x0, 2366, },
- { 102, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 50, 51, 0, 0, 0 }, 0x40, 63, },
- { 103, 5, 1, 0x0000014008000000ull, 0x000001fff8000000ull, { 18, 20, 19, 0, 0 }, 0x40, 2369, },
+ { 102, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 51, 52, 0, 0, 0 }, 0x0, 2400, },
+ { 102, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 51, 52, 0, 0, 0 }, 0x40, 63, },
+ { 103, 5, 1, 0x0000014008000000ull, 0x000001fff8000000ull, { 18, 20, 19, 0, 0 }, 0x40, 2403, },
{ 104, 5, 1, 0x00000001a0000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 65, },
- { 105, 5, 1, 0x00000001e0000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2168, },
+ { 105, 5, 1, 0x00000001e0000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 2202, },
{ 106, 3, 0, 0x0000000100000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 66, },
{ 108, 5, 1, 0x0000000178000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 67, },
- { 113, 3, 1, 0x0000008708000000ull, 0x000001ffc8000000ull, { 24, 19, 0, 0, 0 }, 0x0, 2747, },
- { 118, 4, 0, 0x0000004008000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 520, },
- { 118, 5, 0, 0x000000000c000000ull, 0x000001e3fc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 943, },
- { 118, 2, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x2, 1123, },
- { 118, 3, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1249, },
- { 118, 6, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2996, },
- { 118, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 68, },
+ { 113, 3, 1, 0x0000008708000000ull, 0x000001ffc8000000ull, { 24, 19, 0, 0, 0 }, 0x0, 2781, },
+ { 118, 4, 0, 0x0000004008000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 538, },
+ { 118, 5, 0, 0x000000000c000000ull, 0x000001e3fc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 961, },
+ { 118, 2, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1141, },
+ { 118, 3, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1267, },
+ { 118, 6, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3034, },
+ { 118, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 68, },
{ 123, 3, 0, 0x0000000080000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 69, },
- { 123, 3, 0, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 0, 0, 0, 0 }, 0x0, 902, },
- { 123, 3, 0, 0x0000000098000000ull, 0x000001eff8000000ull, { 18, 0, 0, 0, 0 }, 0x0, 903, },
- { 124, 3, 0, 0x0000002170000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0xc, 828, },
- { 125, 3, 1, 0x0000002070000000ull, 0x000001eff8000000ull, { 31, 25, 0, 0, 0 }, 0x8, 829, },
- { 125, 3, 1, 0x0000002078000000ull, 0x000001eff8000000ull, { 32, 25, 0, 0, 0 }, 0x8, 1125, },
+ { 123, 3, 0, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 0, 0, 0, 0 }, 0x0, 920, },
+ { 123, 3, 0, 0x0000000098000000ull, 0x000001eff8000000ull, { 18, 0, 0, 0, 0 }, 0x0, 921, },
+ { 124, 3, 0, 0x0000002170000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0xc, 846, },
+ { 125, 3, 1, 0x0000002070000000ull, 0x000001eff8000000ull, { 31, 25, 0, 0, 0 }, 0x8, 847, },
+ { 125, 3, 1, 0x0000002078000000ull, 0x000001eff8000000ull, { 32, 25, 0, 0, 0 }, 0x8, 1143, },
{ 127, 3, 1, 0x0000008000000000ull, 0x000001fff8000000ull, { 24, 28, 0, 0, 0 }, 0x0, 70, },
{ 127, 3, 1, 0x0000009000000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x400, 71, },
- { 127, 3, 1, 0x000000a000000000ull, 0x000001eff0000000ull, { 24, 28, 62, 0, 0 }, 0x400, 72, },
+ { 127, 3, 1, 0x000000a000000000ull, 0x000001eff0000000ull, { 24, 28, 63, 0, 0 }, 0x400, 72, },
{ 128, 3, 2, 0x0000008a08000000ull, 0x000001fff8000000ull, { 24, 1, 28, 0, 0 }, 0x0, 73, },
{ 128, 3, 1, 0x0000008a08000000ull, 0x000001fff8000000ull, { 24, 28, 0, 0, 0 }, 0x40, 74, },
{ 129, 3, 1, 0x0000008040000000ull, 0x000001fff8000000ull, { 24, 28, 0, 0, 0 }, 0x0, 75, },
{ 129, 3, 1, 0x0000009040000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x400, 76, },
- { 129, 3, 1, 0x000000a040000000ull, 0x000001eff0000000ull, { 24, 28, 62, 0, 0 }, 0x400, 77, },
+ { 129, 3, 1, 0x000000a040000000ull, 0x000001eff0000000ull, { 24, 28, 63, 0, 0 }, 0x400, 77, },
{ 130, 3, 1, 0x0000008080000000ull, 0x000001fff8000000ull, { 24, 28, 0, 0, 0 }, 0x0, 78, },
{ 130, 3, 1, 0x0000009080000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x400, 79, },
- { 130, 3, 1, 0x000000a080000000ull, 0x000001eff0000000ull, { 24, 28, 62, 0, 0 }, 0x400, 80, },
+ { 130, 3, 1, 0x000000a080000000ull, 0x000001eff0000000ull, { 24, 28, 63, 0, 0 }, 0x400, 80, },
{ 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 28, 0, 0, 0 }, 0x0, 81, },
- { 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 28, 83, 0, 0 }, 0x0, 1321, },
+ { 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 28, 84, 0, 0 }, 0x0, 1339, },
{ 131, 3, 1, 0x00000090c0000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x400, 82, },
- { 131, 3, 1, 0x000000a0c0000000ull, 0x000001eff0000000ull, { 24, 28, 62, 0, 0 }, 0x400, 83, },
- { 132, 3, 1, 0x000000c6c0000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 1021, },
- { 132, 3, 1, 0x000000d6c0000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 1022, },
- { 132, 3, 1, 0x000000e6c0000000ull, 0x000001eff0000000ull, { 18, 28, 62, 0, 0 }, 0x400, 1023, },
+ { 131, 3, 1, 0x000000a0c0000000ull, 0x000001eff0000000ull, { 24, 28, 63, 0, 0 }, 0x400, 83, },
+ { 132, 3, 1, 0x000000c6c0000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 1039, },
+ { 132, 3, 1, 0x000000d6c0000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 1040, },
+ { 132, 3, 1, 0x000000e6c0000000ull, 0x000001eff0000000ull, { 18, 28, 63, 0, 0 }, 0x400, 1041, },
{ 133, 3, 1, 0x000000c040000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 84, },
{ 133, 3, 1, 0x000000d040000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 85, },
- { 133, 3, 1, 0x000000e040000000ull, 0x000001eff0000000ull, { 18, 28, 62, 0, 0 }, 0x400, 86, },
+ { 133, 3, 1, 0x000000e040000000ull, 0x000001eff0000000ull, { 18, 28, 63, 0, 0 }, 0x400, 86, },
{ 134, 3, 1, 0x000000c0c0000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 87, },
{ 134, 3, 1, 0x000000d0c0000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 88, },
- { 134, 3, 1, 0x000000e0c0000000ull, 0x000001eff0000000ull, { 18, 28, 62, 0, 0 }, 0x400, 89, },
+ { 134, 3, 1, 0x000000e0c0000000ull, 0x000001eff0000000ull, { 18, 28, 63, 0, 0 }, 0x400, 89, },
{ 135, 3, 1, 0x000000c000000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 90, },
{ 135, 3, 1, 0x000000d000000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 91, },
- { 135, 3, 1, 0x000000e000000000ull, 0x000001eff0000000ull, { 18, 28, 62, 0, 0 }, 0x400, 92, },
+ { 135, 3, 1, 0x000000e000000000ull, 0x000001eff0000000ull, { 18, 28, 63, 0, 0 }, 0x400, 92, },
{ 136, 3, 2, 0x000000c048000000ull, 0x000001fff8000000ull, { 18, 19, 28, 0, 0 }, 0x0, 93, },
{ 136, 3, 2, 0x000000d048000000ull, 0x000001fff8000000ull, { 18, 19, 28, 6, 0 }, 0x400, 94, },
{ 137, 3, 2, 0x000000c0c8000000ull, 0x000001fff8000000ull, { 18, 19, 28, 0, 0 }, 0x0, 95, },
@@ -5102,32 +5254,32 @@
{ 138, 3, 2, 0x000000d088000000ull, 0x000001fff8000000ull, { 18, 19, 28, 5, 0 }, 0x400, 98, },
{ 139, 3, 1, 0x000000c080000000ull, 0x000001fff8000000ull, { 18, 28, 0, 0, 0 }, 0x0, 99, },
{ 139, 3, 1, 0x000000d080000000ull, 0x000001fff8000000ull, { 18, 28, 25, 0, 0 }, 0x400, 100, },
- { 139, 3, 1, 0x000000e080000000ull, 0x000001eff0000000ull, { 18, 28, 62, 0, 0 }, 0x400, 101, },
+ { 139, 3, 1, 0x000000e080000000ull, 0x000001eff0000000ull, { 18, 28, 63, 0, 0 }, 0x400, 101, },
{ 142, 3, 0, 0x000000cb00000000ull, 0x000001fff8000000ull, { 28, 0, 0, 0, 0 }, 0x0, 102, },
{ 142, 3, 0, 0x000000db00000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x400, 103, },
- { 142, 3, 0, 0x000000eb00000000ull, 0x000001eff0000000ull, { 28, 62, 0, 0, 0 }, 0x400, 104, },
+ { 142, 3, 0, 0x000000eb00000000ull, 0x000001eff0000000ull, { 28, 63, 0, 0, 0 }, 0x400, 104, },
{ 143, 3, 0, 0x0000000050000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 105, },
{ 151, 3, 0, 0x0000000110000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 106, },
- { 152, 2, 1, 0x000000e880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2169, },
- { 153, 2, 1, 0x000000ea80000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2170, },
- { 154, 2, 1, 0x000000f880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2171, },
+ { 152, 2, 1, 0x000000e880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2203, },
+ { 153, 2, 1, 0x000000ea80000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2204, },
+ { 154, 2, 1, 0x000000f880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2205, },
{ 155, 1, 1, 0x0000010800000000ull, 0x000001fff80fe000ull, { 24, 26, 0, 0, 0 }, 0x0, 107, },
- { 155, 1, 1, 0x0000012000000000ull, 0x000001e000300000ull, { 24, 66, 0, 0, 0 }, 0x40, 108, },
+ { 155, 1, 1, 0x0000012000000000ull, 0x000001e000300000ull, { 24, 67, 0, 0, 0 }, 0x40, 108, },
{ 155, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 18, 20, 0, 0, 0 }, 0xc0, 109, },
{ 155, 2, 1, 0x0000000e00100000ull, 0x000001ee00f00000ull, { 15, 25, 0, 0, 0 }, 0x40, 110, },
- { 155, 2, 1, 0x0000000e00000000ull, 0x000001ee00f00000ull, { 15, 25, 78, 0, 0 }, 0x0, 2821, },
+ { 155, 2, 1, 0x0000000e00000000ull, 0x000001ee00f00000ull, { 15, 25, 79, 0, 0 }, 0x0, 2855, },
{ 155, 2, 1, 0x0000000188000000ull, 0x000001eff8000000ull, { 24, 16, 0, 0, 0 }, 0x0, 112, },
- { 155, 2, 1, 0x0000000600000000ull, 0x000001ee00000000ull, { 9, 25, 64, 0, 0 }, 0x0, 113, },
+ { 155, 2, 1, 0x0000000600000000ull, 0x000001ee00000000ull, { 9, 25, 65, 0, 0 }, 0x0, 113, },
{ 155, 2, 1, 0x00000016ff001fc0ull, 0x000001feff001fc0ull, { 9, 25, 0, 0, 0 }, 0x40, 114, },
- { 155, 2, 1, 0x0000000400000000ull, 0x000001ee00000000ull, { 10, 68, 0, 0, 0 }, 0x0, 115, },
+ { 155, 2, 1, 0x0000000400000000ull, 0x000001ee00000000ull, { 10, 69, 0, 0, 0 }, 0x0, 115, },
{ 155, 2, 1, 0x0000000180000000ull, 0x000001eff8000000ull, { 24, 8, 0, 0, 0 }, 0x0, 116, },
{ 155, 2, 1, 0x0000000198000000ull, 0x000001eff8000000ull, { 24, 9, 0, 0, 0 }, 0x0, 117, },
- { 155, 2, 1, 0x0000000150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 1126, },
- { 155, 2, 1, 0x0000000050000000ull, 0x000001eff8000000ull, { 14, 55, 0, 0, 0 }, 0x0, 1127, },
- { 155, 2, 1, 0x0000000190000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 1128, },
- { 155, 3, 1, 0x0000000140000000ull, 0x000001eff8000000ull, { 14, 55, 0, 0, 0 }, 0x0, 1250, },
- { 155, 3, 1, 0x0000002150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 1251, },
- { 155, 3, 1, 0x0000002110000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 1252, },
+ { 155, 2, 1, 0x0000000150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 1144, },
+ { 155, 2, 1, 0x0000000050000000ull, 0x000001eff8000000ull, { 14, 56, 0, 0, 0 }, 0x0, 1145, },
+ { 155, 2, 1, 0x0000000190000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 1146, },
+ { 155, 3, 1, 0x0000000140000000ull, 0x000001eff8000000ull, { 14, 56, 0, 0, 0 }, 0x0, 1268, },
+ { 155, 3, 1, 0x0000002150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 1269, },
+ { 155, 3, 1, 0x0000002110000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 1270, },
{ 155, 3, 1, 0x0000002160000000ull, 0x000001eff8000000ull, { 17, 25, 0, 0, 0 }, 0x8, 118, },
{ 155, 3, 1, 0x0000002120000000ull, 0x000001eff8000000ull, { 24, 17, 0, 0, 0 }, 0x8, 119, },
{ 155, 3, 1, 0x0000002168000000ull, 0x000001eff8000000ull, { 12, 25, 0, 0, 0 }, 0x8, 120, },
@@ -5150,21 +5302,21 @@
{ 155, 3, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 24, 34, 0, 0, 0 }, 0x8, 137, },
{ 155, 3, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 24, 29, 0, 0, 0 }, 0x0, 138, },
{ 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 14, 0, 0, 0 }, 0x0, 139, },
- { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 55, 0, 0, 0 }, 0x0, 140, },
+ { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 56, 0, 0, 0 }, 0x0, 140, },
{ 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 25, 0, 0, 0 }, 0x0, 141, },
- { 156, 6, 1, 0x000000c000000000ull, 0x000001e000100000ull, { 24, 70, 0, 0, 0 }, 0x0, 142, },
- { 157, 2, 1, 0x000000eca0000000ull, 0x000001fff0000000ull, { 24, 25, 74, 0, 0 }, 0x0, 143, },
- { 158, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 24, 25, 75, 0, 0 }, 0x0, 144, },
- { 168, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 521, },
- { 168, 5, 0, 0x0000000008000000ull, 0x000001e3fc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 944, },
- { 168, 2, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x2, 1129, },
- { 168, 3, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1253, },
- { 168, 6, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2997, },
- { 168, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 145, },
+ { 156, 6, 1, 0x000000c000000000ull, 0x000001e000100000ull, { 24, 71, 0, 0, 0 }, 0x0, 142, },
+ { 157, 2, 1, 0x000000eca0000000ull, 0x000001fff0000000ull, { 24, 25, 75, 0, 0 }, 0x0, 143, },
+ { 158, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 24, 25, 76, 0, 0 }, 0x0, 144, },
+ { 168, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 539, },
+ { 168, 5, 0, 0x0000000008000000ull, 0x000001e3fc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 962, },
+ { 168, 2, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1147, },
+ { 168, 3, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1271, },
+ { 168, 6, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3035, },
+ { 168, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 145, },
{ 175, 1, 1, 0x0000010070000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 146, },
- { 175, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 147, },
- { 178, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2979, },
- { 179, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2823, },
+ { 175, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 147, },
+ { 178, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 3017, },
+ { 179, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2857, },
{ 180, 1, 1, 0x0000010400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 148, },
{ 181, 1, 1, 0x0000010600000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 149, },
{ 182, 1, 1, 0x0000011400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 150, },
@@ -5172,19 +5324,19 @@
{ 184, 1, 1, 0x0000010650000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 152, },
{ 185, 1, 1, 0x0000010470000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 153, },
{ 186, 1, 1, 0x0000010670000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 154, },
- { 187, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 930, },
- { 188, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 931, },
- { 189, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 932, },
- { 190, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2837, },
+ { 187, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 948, },
+ { 188, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 949, },
+ { 189, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 950, },
+ { 190, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2871, },
{ 191, 2, 1, 0x000000ea70000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 155, },
- { 192, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2838, },
+ { 192, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2872, },
{ 193, 2, 1, 0x000000ea30000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 156, },
- { 194, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2172, },
+ { 194, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2206, },
{ 195, 2, 1, 0x000000e230000000ull, 0x000001ff30000000ull, { 24, 25, 26, 42, 0 }, 0x0, 157, },
{ 196, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 24, 26, 0, 0, 0 }, 0x0, 158, },
- { 198, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 24, 26, 25, 0, 0 }, 0x0, 2173, },
- { 198, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 24, 26, 49, 0, 0 }, 0x0, 2174, },
- { 198, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 26, 49, 0, 0, 0 }, 0x0, 2204, },
+ { 198, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 24, 26, 25, 0, 0 }, 0x0, 2207, },
+ { 198, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 24, 26, 49, 0, 0 }, 0x0, 2208, },
+ { 198, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 26, 49, 0, 0, 0 }, 0x0, 2238, },
{ 199, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 159, },
{ 200, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 160, },
{ 200, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 161, },
@@ -5199,386 +5351,396 @@
{ 206, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 170, },
{ 207, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 171, },
{ 208, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 172, },
- { 209, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 1157, },
- { 209, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0xc, 1032, },
- { 209, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 26, 0, 0, 0, 0 }, 0x8, 904, },
- { 210, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 830, },
+ { 209, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 1175, },
+ { 209, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0xc, 1050, },
+ { 209, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 26, 0, 0, 0, 0 }, 0x8, 922, },
+ { 210, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 848, },
{ 215, 4, 0, 0x0000000040000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x22c, 173, },
- { 216, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 67, 0, 0, 0, 0 }, 0x8, 174, },
- { 217, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 67, 0, 0, 0, 0 }, 0x0, 175, },
- { 226, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 18, 25, 0, 0, 0 }, 0x0, 2748, },
+ { 216, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 174, },
+ { 217, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 175, },
+ { 226, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 18, 25, 0, 0, 0 }, 0x0, 2782, },
{ 227, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 24, 25, 45, 0, 0 }, 0x140, 176, },
{ 227, 2, 1, 0x000000f240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 177, },
{ 228, 1, 1, 0x0000010080000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 178, },
{ 229, 1, 1, 0x00000100c0000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 179, },
- { 230, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 24, 26, 76, 0, 0 }, 0x140, 2844, },
+ { 230, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 24, 26, 77, 0, 0 }, 0x140, 2878, },
{ 230, 2, 1, 0x000000f220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 181, },
{ 231, 2, 1, 0x000000ac00000000ull, 0x000001ee00000000ull, { 24, 25, 26, 44, 0 }, 0x0, 182, },
- { 236, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 832, },
- { 237, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 67, 0, 0, 0, 0 }, 0x8, 183, },
+ { 236, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 850, },
+ { 237, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 183, },
{ 239, 3, 1, 0x0000008c00000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 184, },
- { 239, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 28, 25, 61, 0, 0 }, 0x400, 185, },
+ { 239, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 185, },
{ 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 1, 0, 0 }, 0x0, 186, },
{ 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x40, 187, },
{ 241, 3, 1, 0x0000008c40000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 188, },
- { 241, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 28, 25, 61, 0, 0 }, 0x400, 189, },
+ { 241, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 189, },
{ 242, 3, 1, 0x0000008c80000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 190, },
- { 242, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 28, 25, 61, 0, 0 }, 0x400, 191, },
+ { 242, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 191, },
{ 243, 3, 1, 0x0000008cc0000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 192, },
- { 243, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 28, 25, 61, 0, 0 }, 0x400, 193, },
- { 244, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 2751, },
- { 244, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 28, 19, 61, 0, 0 }, 0x400, 2752, },
+ { 243, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 193, },
+ { 244, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 2785, },
+ { 244, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 2786, },
{ 245, 3, 1, 0x000000cc40000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 194, },
- { 245, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 28, 19, 61, 0, 0 }, 0x400, 195, },
+ { 245, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 195, },
{ 246, 3, 1, 0x000000ccc0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 196, },
- { 246, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 28, 19, 61, 0, 0 }, 0x400, 197, },
+ { 246, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 197, },
{ 247, 3, 1, 0x000000cc00000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 198, },
- { 247, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 28, 19, 61, 0, 0 }, 0x400, 199, },
+ { 247, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 199, },
{ 248, 3, 1, 0x000000cc80000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 200, },
- { 248, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 28, 19, 61, 0, 0 }, 0x400, 201, },
+ { 248, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 201, },
{ 249, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 202, },
{ 249, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 203, },
- { 249, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 204, },
- { 250, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 67, 0, 0, 0, 0 }, 0x0, 205, },
+ { 249, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 204, },
+ { 250, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 205, },
{ 251, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 206, },
{ 252, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 207, },
{ 253, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 208, },
- { 254, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1132, },
+ { 254, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1150, },
{ 255, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 209, },
- { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 76, 0 }, 0x0, 3002, },
- { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 26, 76, 0, 0 }, 0x40, 3003, },
- { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 76, 0 }, 0x40, 1985, },
- { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 26, 76, 0, 0 }, 0x40, 1986, },
- { 257, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 210, },
- { 258, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 3006, },
- { 258, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 26, 0, 0, 0 }, 0x40, 3007, },
- { 258, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 1989, },
- { 258, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 26, 0, 0, 0 }, 0x40, 1990, },
- { 259, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 211, },
- { 261, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 212, },
- { 265, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1113, },
- { 266, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1114, },
- { 267, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1115, },
- { 275, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 213, },
- { 276, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 214, },
- { 277, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 215, },
- { 278, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 216, },
- { 280, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 1161, },
- { 280, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 1243, },
- { 281, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 1162, },
- { 282, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 217, },
- { 282, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 218, },
- { 285, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 219, },
- { 286, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 220, },
- { 287, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 221, },
+ { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 77, 0 }, 0x0, 3040, },
+ { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 26, 77, 0, 0 }, 0x40, 3041, },
+ { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 77, 0 }, 0x40, 2003, },
+ { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 26, 77, 0, 0 }, 0x40, 2004, },
+ { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 23, 50, 0, 0 }, 0x0, 3044, },
+ { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 50, 0, 0, 0 }, 0x40, 3045, },
+ { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 22, 50, 0, 0 }, 0x40, 2007, },
+ { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 50, 0, 0, 0 }, 0x40, 2008, },
+ { 258, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 210, },
+ { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 3048, },
+ { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 26, 0, 0, 0 }, 0x40, 3049, },
+ { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 2011, },
+ { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 26, 0, 0, 0 }, 0x40, 2012, },
+ { 260, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 211, },
+ { 262, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 212, },
+ { 266, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1131, },
+ { 267, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1132, },
+ { 268, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1133, },
+ { 272, 4, 0, 0x00000000c0000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x28, 223, },
+ { 277, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 213, },
+ { 278, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 214, },
+ { 279, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 215, },
+ { 280, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 216, },
+ { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 1179, },
+ { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 1261, },
+ { 283, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 1180, },
+ { 284, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 217, },
+ { 284, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 218, },
+ { 287, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 219, },
+ { 288, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 220, },
+ { 289, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 221, },
};
static const char dis_table[] = {
-0xa0, 0xc5, 0xe8, 0xa0, 0x2e, 0x98, 0xa0, 0x2c, 0x80, 0xa0, 0x1b, 0xc0,
-0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x38, 0x28, 0x24,
-0x38, 0x20, 0x90, 0x28, 0x24, 0x38, 0x18, 0x24, 0x38, 0x10, 0x91, 0x60,
-0x90, 0x28, 0x24, 0x38, 0x00, 0x10, 0x10, 0x58, 0x41, 0x61, 0xbf, 0xc0,
+0xa0, 0xc7, 0xc8, 0xa0, 0x2e, 0xd8, 0xa0, 0x2c, 0xc0, 0xa0, 0x1c, 0x00,
+0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x39, 0x28, 0x24,
+0x39, 0x20, 0x90, 0x28, 0x24, 0x39, 0x18, 0x24, 0x39, 0x10, 0x91, 0x60,
+0x90, 0x28, 0x24, 0x39, 0x00, 0x10, 0x10, 0x58, 0x41, 0x61, 0xc7, 0xc0,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x52, 0xc0, 0xc0, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
-0x10, 0x10, 0x10, 0x24, 0x23, 0x70, 0x90, 0x28, 0x24, 0x37, 0xf0, 0x24,
-0x37, 0xe8, 0xa8, 0x0b, 0x48, 0x15, 0x20, 0x97, 0x20, 0x95, 0xc8, 0x9a,
+0x10, 0x10, 0x10, 0x24, 0x24, 0x70, 0x90, 0x28, 0x24, 0x38, 0xf0, 0x24,
+0x38, 0xe8, 0xa8, 0x0b, 0x48, 0x15, 0x20, 0x97, 0x20, 0x95, 0xc8, 0x9a,
0xb8, 0x05, 0x38, 0x91, 0x18, 0x90, 0xa0, 0x90, 0x60, 0x80, 0x90, 0x20,
-0x34, 0x86, 0xa4, 0x24, 0x00, 0x34, 0x83, 0x80, 0xa4, 0x35, 0xa0, 0x36,
-0xb9, 0x90, 0x50, 0x90, 0x28, 0x80, 0x36, 0xaf, 0x80, 0x34, 0x66, 0x81,
-0x33, 0xe2, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x23, 0x10, 0x34,
-0x63, 0xa4, 0x1f, 0x08, 0x34, 0x60, 0x90, 0x38, 0xa4, 0x37, 0xa0, 0x36,
-0xfa, 0xa4, 0x37, 0x48, 0x36, 0xee, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x36,
-0x20, 0x36, 0xcf, 0xa4, 0x35, 0xf8, 0x36, 0xca, 0x80, 0xa4, 0x22, 0xf0,
-0x34, 0x5f, 0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb,
-0x84, 0x60, 0xf9, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x58, 0x8c, 0x42,
-0xb8, 0x84, 0x38, 0x61, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x48, 0x8c, 0x42,
-0x98, 0x84, 0x38, 0x5f, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
-0x13, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x11, 0xa4, 0x1f, 0x18, 0x33, 0xe4,
-0x80, 0x90, 0x28, 0x80, 0x33, 0xe0, 0x80, 0x34, 0x68, 0x81, 0x90, 0x38,
-0xa4, 0x23, 0x80, 0x34, 0x6b, 0xa4, 0x23, 0x48, 0x34, 0x65, 0xc0, 0x40,
+0x34, 0xa6, 0xa4, 0x25, 0x00, 0x34, 0xa3, 0x80, 0xa4, 0x36, 0xa0, 0x36,
+0xd9, 0x90, 0x50, 0x90, 0x28, 0x80, 0x36, 0xcf, 0x80, 0x34, 0x86, 0x81,
+0x33, 0xe2, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x24, 0x10, 0x34,
+0x83, 0xa4, 0x1f, 0x08, 0x34, 0x80, 0x90, 0x38, 0xa4, 0x38, 0xa0, 0x37,
+0x1a, 0xa4, 0x38, 0x48, 0x37, 0x0e, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x37,
+0x20, 0x36, 0xef, 0xa4, 0x36, 0xf8, 0x36, 0xea, 0x80, 0xa4, 0x23, 0xf0,
+0x34, 0x7f, 0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb,
+0x84, 0x60, 0xf9, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x68, 0x8c, 0x43,
+0xc8, 0x84, 0x38, 0x83, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x58, 0x8c, 0x43,
+0xa8, 0x84, 0x38, 0x81, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
+0x35, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x33, 0xa4, 0x1f, 0x18, 0x33, 0xe4,
+0x80, 0x90, 0x28, 0x80, 0x33, 0xe0, 0x80, 0x34, 0x88, 0x81, 0x90, 0x38,
+0xa4, 0x24, 0x80, 0x34, 0x8b, 0xa4, 0x24, 0x48, 0x34, 0x85, 0xc0, 0x40,
0x10, 0x10, 0x90, 0x38, 0xa4, 0x1e, 0xf0, 0x33, 0xdf, 0xa4, 0x1e, 0xe0,
-0x33, 0xdd, 0x18, 0x24, 0x23, 0xf8, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0,
-0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x28, 0x38, 0x4b, 0xc0, 0xc0, 0x80, 0xa4,
-0x41, 0x18, 0x38, 0x47, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
-0x0d, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x0b, 0x92, 0xb8, 0x99, 0x84, 0x23,
-0x68, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x35, 0x98, 0x36,
-0xb8, 0x82, 0x36, 0xae, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x37,
-0x98, 0x36, 0xf9, 0xa4, 0x37, 0x40, 0x36, 0xed, 0x80, 0x90, 0x38, 0xa4,
-0x36, 0x18, 0x36, 0xce, 0xa4, 0x35, 0xf0, 0x36, 0xc9, 0x83, 0x90, 0xa8,
-0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x40, 0xf8, 0x38, 0x3f, 0xc0,
-0xc0, 0x80, 0xa4, 0x40, 0xe8, 0x38, 0x3b, 0xd3, 0x82, 0x40, 0x50, 0xc0,
-0xc0, 0x81, 0x38, 0x07, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x05, 0x18, 0x24,
-0x23, 0x78, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4,
-0x40, 0xc8, 0x38, 0x33, 0xc0, 0xc0, 0x80, 0xa4, 0x40, 0xb8, 0x38, 0x2f,
-0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x01, 0x50, 0xc0, 0xc0,
-0x81, 0x37, 0xff, 0x94, 0x50, 0x92, 0xf8, 0x99, 0x84, 0x1f, 0x48, 0x90,
-0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x35, 0x90, 0x36, 0xb7, 0x82,
-0x36, 0xad, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x37, 0x90, 0x36,
-0xf8, 0xa4, 0x37, 0x38, 0x36, 0xec, 0x80, 0x90, 0x38, 0xa4, 0x36, 0x10,
-0x36, 0xcd, 0xa4, 0x35, 0xe8, 0x36, 0xc8, 0x83, 0x90, 0xe8, 0xd3, 0x83,
-0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x68, 0x8c, 0x42, 0xd8, 0x84, 0x38,
-0x63, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x50, 0x8c, 0x42, 0xa8, 0x84, 0x38,
-0x60, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x15, 0x50, 0xc0,
-0xc0, 0x81, 0x38, 0x12, 0x18, 0x24, 0x1f, 0x40, 0x83, 0x90, 0xa8, 0xd3,
-0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x38, 0x38, 0x4f, 0xc0, 0xc0,
-0x80, 0xa4, 0x41, 0x20, 0x38, 0x49, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0,
-0x81, 0x38, 0x0f, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x0c, 0x92, 0xb8, 0x99,
-0x84, 0x1f, 0x38, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x35,
-0x88, 0x36, 0xb6, 0x82, 0x36, 0xac, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38,
-0xa4, 0x37, 0x88, 0x36, 0xf7, 0xa4, 0x37, 0x30, 0x36, 0xeb, 0x80, 0x90,
-0x38, 0xa4, 0x36, 0x08, 0x36, 0xcc, 0xa4, 0x35, 0xe0, 0x36, 0xc7, 0x83,
-0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0x08, 0x38,
-0x43, 0xc0, 0xc0, 0x80, 0xa4, 0x40, 0xf0, 0x38, 0x3d, 0xd3, 0x82, 0x40,
-0x50, 0xc0, 0xc0, 0x81, 0x38, 0x09, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x06,
+0x33, 0xdd, 0x18, 0x24, 0x24, 0xf8, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0,
+0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x38, 0x38, 0x6d, 0xc0, 0xc0, 0x80, 0xa4,
+0x42, 0x28, 0x38, 0x69, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38,
+0x2f, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2d, 0x92, 0xb8, 0x99, 0x84, 0x24,
+0x68, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x98, 0x36,
+0xd8, 0x82, 0x36, 0xce, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38,
+0x98, 0x37, 0x19, 0xa4, 0x38, 0x40, 0x37, 0x0d, 0x80, 0x90, 0x38, 0xa4,
+0x37, 0x18, 0x36, 0xee, 0xa4, 0x36, 0xf0, 0x36, 0xe9, 0x83, 0x90, 0xa8,
+0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x08, 0x38, 0x61, 0xc0,
+0xc0, 0x80, 0xa4, 0x41, 0xf8, 0x38, 0x5d, 0xd3, 0x82, 0x40, 0x50, 0xc0,
+0xc0, 0x81, 0x38, 0x29, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x27, 0x18, 0x24,
+0x24, 0x78, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4,
+0x41, 0xd8, 0x38, 0x55, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0xc8, 0x38, 0x51,
+0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x23, 0x50, 0xc0, 0xc0,
+0x81, 0x38, 0x21, 0x94, 0x50, 0x92, 0xf8, 0x99, 0x84, 0x1f, 0x48, 0x90,
+0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x90, 0x36, 0xd7, 0x82,
+0x36, 0xcd, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38, 0x90, 0x37,
+0x18, 0xa4, 0x38, 0x38, 0x37, 0x0c, 0x80, 0x90, 0x38, 0xa4, 0x37, 0x10,
+0x36, 0xed, 0xa4, 0x36, 0xe8, 0x36, 0xe8, 0x83, 0x90, 0xe8, 0xd3, 0x83,
+0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x78, 0x8c, 0x43, 0xe8, 0x84, 0x38,
+0x85, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x60, 0x8c, 0x43, 0xb8, 0x84, 0x38,
+0x82, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x37, 0x50, 0xc0,
+0xc0, 0x81, 0x38, 0x34, 0x18, 0x24, 0x1f, 0x40, 0x83, 0x90, 0xa8, 0xd3,
+0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x48, 0x38, 0x71, 0xc0, 0xc0,
+0x80, 0xa4, 0x42, 0x30, 0x38, 0x6b, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0,
+0x81, 0x38, 0x31, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2e, 0x92, 0xb8, 0x99,
+0x84, 0x1f, 0x38, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36,
+0x88, 0x36, 0xd6, 0x82, 0x36, 0xcc, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38,
+0xa4, 0x38, 0x88, 0x37, 0x17, 0xa4, 0x38, 0x30, 0x37, 0x0b, 0x80, 0x90,
+0x38, 0xa4, 0x37, 0x08, 0x36, 0xec, 0xa4, 0x36, 0xe0, 0x36, 0xe7, 0x83,
+0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x18, 0x38,
+0x65, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x00, 0x38, 0x5f, 0xd3, 0x82, 0x40,
+0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2b, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x28,
0x18, 0x20, 0x01, 0x48, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0,
-0x80, 0xa4, 0x40, 0xd8, 0x38, 0x37, 0xc0, 0xc0, 0x80, 0xa4, 0x40, 0xc0,
-0x38, 0x31, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x03, 0x50,
-0xc0, 0xc0, 0x81, 0x38, 0x00, 0xda, 0x06, 0xe0, 0xf9, 0x80, 0x90, 0x60,
-0x90, 0x38, 0xa4, 0x23, 0xe8, 0x34, 0x7b, 0x80, 0x34, 0x78, 0x90, 0x38,
-0xa4, 0x23, 0x90, 0x34, 0x76, 0x80, 0x34, 0x73, 0x90, 0x60, 0x90, 0x38,
-0xa4, 0x23, 0xd0, 0x34, 0x7c, 0x80, 0x34, 0x79, 0x90, 0x38, 0xa4, 0x23,
-0xa8, 0x34, 0x77, 0x80, 0x34, 0x74, 0xc8, 0x40, 0x19, 0x00, 0x91, 0x58,
-0x90, 0x60, 0x82, 0x90, 0x20, 0x36, 0xab, 0xa4, 0x35, 0x48, 0x36, 0xaa,
-0x90, 0xc0, 0x80, 0x90, 0x90, 0x90, 0x48, 0xc9, 0xe1, 0xb9, 0x00, 0x85,
-0x36, 0xe3, 0xc9, 0xe1, 0xb8, 0x40, 0x85, 0x36, 0xe0, 0x80, 0x36, 0xdf,
-0x10, 0x10, 0x81, 0x36, 0xbb, 0x90, 0xa8, 0x10, 0x10, 0x90, 0x28, 0x81,
-0x36, 0xd9, 0x90, 0x38, 0xa4, 0x36, 0xa0, 0x36, 0xd5, 0xa4, 0x36, 0x90,
-0x36, 0xd3, 0x90, 0x70, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x36, 0xb8, 0x36,
-0xd8, 0x80, 0x36, 0xd6, 0x90, 0x60, 0x90, 0x28, 0x24, 0x36, 0xf0, 0xa4,
-0x36, 0xe0, 0x36, 0xdd, 0x80, 0xa4, 0x36, 0xd0, 0x36, 0xdb, 0x80, 0x90,
-0xf8, 0x90, 0x90, 0x90, 0x50, 0x90, 0x28, 0x80, 0x37, 0xf7, 0x80, 0x37,
-0xfe, 0x80, 0xa4, 0x3f, 0xe0, 0x37, 0xfd, 0x90, 0x28, 0x81, 0x37, 0xfb,
-0x80, 0xa4, 0x3f, 0xc8, 0x37, 0xfa, 0x83, 0x37, 0xf8, 0x98, 0xe8, 0x01,
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+0xd5, 0x06, 0x80, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x37, 0xc7, 0xa4,
+0x3c, 0x98, 0x37, 0xab, 0x90, 0x28, 0x24, 0x3b, 0xd8, 0xa4, 0x3a, 0x58,
+0x37, 0x63, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x37, 0xc1, 0xa4, 0x3c,
+0x80, 0x37, 0xa8, 0x90, 0x28, 0x24, 0x3b, 0xc0, 0xa4, 0x3a, 0x40, 0x37,
+0x60, 0x99, 0xd8, 0x03, 0x90, 0x81, 0x90, 0xe0, 0x5b, 0x41, 0x40, 0x03,
+0x40, 0x51, 0x40, 0xc0, 0xa4, 0x23, 0x80, 0x34, 0x60, 0xd1, 0x42, 0x00,
+0xa4, 0x22, 0x80, 0x34, 0x40, 0xa4, 0x21, 0x80, 0x34, 0x20, 0x5b, 0x41,
+0x40, 0x03, 0x40, 0x51, 0x40, 0xc0, 0xa4, 0x22, 0xa0, 0x34, 0x64, 0xd1,
+0x42, 0x00, 0xa4, 0x21, 0xa0, 0x34, 0x44, 0xa4, 0x20, 0xa0, 0x34, 0x24,
+0x81, 0x90, 0xe0, 0x5b, 0x41, 0x40, 0x03, 0x40, 0x51, 0x40, 0xc0, 0xa4,
+0x22, 0xe0, 0x34, 0x6c, 0xd1, 0x42, 0x00, 0xa4, 0x21, 0xe0, 0x34, 0x4c,
+0xa4, 0x20, 0xe0, 0x34, 0x2c, 0x5b, 0x41, 0x40, 0x03, 0x40, 0x51, 0x40,
+0xc0, 0xa4, 0x22, 0xc0, 0x34, 0x68, 0xd1, 0x42, 0x00, 0xa4, 0x21, 0xc0,
0x34, 0x48, 0xa4, 0x20, 0xc0, 0x34, 0x28, 0xa8, 0x0b, 0x18, 0x13, 0xa8,
0x96, 0x80, 0x93, 0x40, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 0x60,
0x90, 0x38, 0xa4, 0x12, 0xb8, 0x32, 0x58, 0x24, 0x12, 0xb0, 0x90, 0x38,
@@ -5588,7 +5750,7 @@
0xa4, 0x12, 0xa8, 0x32, 0x53, 0x24, 0x12, 0xa0, 0x90, 0x38, 0xa4, 0x11,
0xd0, 0x32, 0x38, 0x24, 0x11, 0xc8, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10,
0xf8, 0x32, 0x1d, 0x24, 0x10, 0xf0, 0x90, 0x38, 0xa4, 0x10, 0x20, 0x32,
-0x02, 0x24, 0x10, 0x18, 0xe4, 0xe1, 0xc8, 0x40, 0x37, 0x23, 0x99, 0x90,
+0x02, 0x24, 0x10, 0x18, 0xe4, 0xe1, 0xd0, 0x40, 0x37, 0x43, 0x99, 0x90,
0x03, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x90, 0x32,
0x50, 0x24, 0x12, 0x88, 0x90, 0x38, 0xa4, 0x11, 0xb8, 0x32, 0x35, 0x24,
0x11, 0xb0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0xe0, 0x32, 0x1a, 0x24,
@@ -5597,7 +5759,7 @@
0x12, 0x70, 0x90, 0x38, 0xa4, 0x11, 0xa0, 0x32, 0x32, 0x24, 0x11, 0x98,
0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0xc8, 0x32, 0x17, 0x24, 0x10, 0xc0,
0x90, 0x38, 0xa4, 0x0f, 0xf0, 0x31, 0xfc, 0x24, 0x0f, 0xe8, 0xe4, 0xe1,
-0xc6, 0xc0, 0x37, 0x1d, 0x93, 0x78, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0,
+0xce, 0xc0, 0x37, 0x3d, 0x93, 0x78, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0,
0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x60, 0x32, 0x4a, 0x24, 0x12, 0x58,
0x90, 0x38, 0xa4, 0x11, 0x88, 0x32, 0x2f, 0x24, 0x11, 0x80, 0x90, 0x60,
0x90, 0x38, 0xa4, 0x10, 0xb0, 0x32, 0x14, 0x24, 0x10, 0xa8, 0x90, 0x38,
@@ -5605,11 +5767,11 @@
0x90, 0x38, 0xa4, 0x12, 0x48, 0x32, 0x47, 0x24, 0x12, 0x40, 0x90, 0x38,
0xa4, 0x11, 0x70, 0x32, 0x2c, 0x24, 0x11, 0x68, 0x90, 0x60, 0x90, 0x38,
0xa4, 0x10, 0x98, 0x32, 0x11, 0x24, 0x10, 0x90, 0x90, 0x38, 0xa4, 0x0f,
-0xc0, 0x31, 0xf6, 0x24, 0x0f, 0xb8, 0xec, 0xa1, 0x16, 0x00, 0x02, 0x00,
-0x34, 0x5a, 0xa4, 0x38, 0xa8, 0x37, 0x17, 0x88, 0x00, 0x88, 0x10, 0x10,
+0xc0, 0x31, 0xf6, 0x24, 0x0f, 0xb8, 0xec, 0xa1, 0x1e, 0x00, 0x02, 0x00,
+0x34, 0x7a, 0xa4, 0x39, 0xa8, 0x37, 0x37, 0x88, 0x00, 0x88, 0x10, 0x10,
0x10, 0x10, 0x90, 0x38, 0xa4, 0x0f, 0xa8, 0x31, 0xf3, 0x24, 0x0f, 0xa0,
-0xe9, 0x61, 0x15, 0x40, 0x02, 0x00, 0x34, 0x56, 0xe3, 0x61, 0xc3, 0xc0,
-0x37, 0x11, 0x95, 0x08, 0x93, 0x40, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0,
+0xe9, 0x61, 0x1d, 0x40, 0x02, 0x00, 0x34, 0x76, 0xe3, 0x61, 0xcb, 0xc0,
+0x37, 0x31, 0x95, 0x08, 0x93, 0x40, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0,
0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x30, 0x32, 0x41, 0x24, 0x12, 0x28,
0x90, 0x38, 0xa4, 0x11, 0x58, 0x32, 0x26, 0x24, 0x11, 0x50, 0x90, 0x60,
0x90, 0x38, 0xa4, 0x10, 0x80, 0x32, 0x0b, 0x24, 0x10, 0x78, 0x90, 0x38,
@@ -5617,22 +5779,22 @@
0x90, 0x38, 0xa4, 0x12, 0x00, 0x32, 0x3e, 0x24, 0x11, 0xf8, 0x90, 0x38,
0xa4, 0x11, 0x28, 0x32, 0x23, 0x24, 0x11, 0x20, 0x90, 0x60, 0x90, 0x38,
0xa4, 0x10, 0x50, 0x32, 0x08, 0x24, 0x10, 0x48, 0x90, 0x38, 0xa4, 0x0f,
-0x60, 0x31, 0xea, 0x24, 0x0f, 0x58, 0xe4, 0xe1, 0xc8, 0x80, 0x37, 0x25,
+0x60, 0x31, 0xea, 0x24, 0x0f, 0x58, 0xe4, 0xe1, 0xd0, 0x80, 0x37, 0x45,
0x88, 0x01, 0x88, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x20,
0x32, 0x42, 0x24, 0x12, 0x18, 0x90, 0x38, 0xa4, 0x11, 0x48, 0x32, 0x27,
0x24, 0x11, 0x40, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0x70, 0x32, 0x0c,
0x24, 0x10, 0x68, 0x90, 0x38, 0xa4, 0x0f, 0x80, 0x31, 0xee, 0x24, 0x0f,
-0x78, 0xe4, 0xe1, 0xc7, 0x00, 0x37, 0x1f, 0x92, 0xd0, 0x99, 0x50, 0x02,
+0x78, 0xe4, 0xe1, 0xcf, 0x00, 0x37, 0x3f, 0x92, 0xd0, 0x99, 0x50, 0x02,
0x80, 0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0xe9, 0x24, 0x0f,
0x40, 0x90, 0x28, 0x80, 0x31, 0xe5, 0x24, 0x0f, 0x20, 0x90, 0x50, 0x90,
0x28, 0x80, 0x31, 0xe1, 0x24, 0x0f, 0x00, 0x90, 0x28, 0x80, 0x31, 0xdd,
0x24, 0x0e, 0xe0, 0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0xe6,
0x24, 0x0f, 0x38, 0x90, 0x28, 0x80, 0x31, 0xe2, 0x24, 0x0f, 0x18, 0x90,
0x50, 0x90, 0x28, 0x80, 0x31, 0xde, 0x24, 0x0e, 0xf8, 0x90, 0x28, 0x80,
-0x31, 0xda, 0x24, 0x0e, 0xd8, 0xec, 0xe1, 0xc5, 0xa1, 0x17, 0x00, 0x37,
-0x19, 0x88, 0x00, 0x78, 0x10, 0x10, 0x10, 0x10, 0x90, 0x28, 0x80, 0x31,
-0xd8, 0x24, 0x0e, 0xc8, 0xec, 0xe1, 0xc4, 0x21, 0x15, 0x00, 0x37, 0x13,
-0xe5, 0xa1, 0x4d, 0x40, 0x35, 0x31, 0xa0, 0x2a, 0x10, 0xa8, 0x16, 0x60,
+0x31, 0xda, 0x24, 0x0e, 0xd8, 0xec, 0xe1, 0xcd, 0xa1, 0x1f, 0x00, 0x37,
+0x39, 0x88, 0x00, 0x78, 0x10, 0x10, 0x10, 0x10, 0x90, 0x28, 0x80, 0x31,
+0xd8, 0x24, 0x0e, 0xc8, 0xec, 0xe1, 0xcc, 0x21, 0x1d, 0x00, 0x37, 0x33,
+0xe5, 0xa1, 0x55, 0x40, 0x35, 0x51, 0xa0, 0x2a, 0x10, 0xa8, 0x16, 0x60,
0x29, 0xd8, 0xa0, 0x0c, 0x48, 0xa0, 0x0a, 0xc8, 0x95, 0x60, 0x92, 0xb0,
0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0xa1, 0x80,
0x31, 0xa0, 0x10, 0x10, 0x80, 0x31, 0x9f, 0x90, 0x70, 0x90, 0x38, 0xa4,
@@ -5782,8 +5944,8 @@
0x90, 0x38, 0xa4, 0x04, 0xf0, 0x30, 0x9c, 0x24, 0x04, 0xe8, 0x90, 0x38,
0xa4, 0x04, 0x60, 0x30, 0x8a, 0x24, 0x04, 0x58, 0x10, 0x10, 0x80, 0x10,
0x10, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x02, 0xf8, 0x30, 0x5d, 0x24, 0x02,
-0xf0, 0xd7, 0x42, 0x00, 0xa4, 0x38, 0x58, 0x37, 0x0d, 0xa4, 0x38, 0x38,
-0x37, 0x09, 0x9c, 0xe0, 0x06, 0x90, 0x93, 0x00, 0x91, 0x80, 0x90, 0xc0,
+0xf0, 0xd7, 0x42, 0x00, 0xa4, 0x39, 0x58, 0x37, 0x2d, 0xa4, 0x39, 0x38,
+0x37, 0x29, 0x9c, 0xe0, 0x06, 0x90, 0x93, 0x00, 0x91, 0x80, 0x90, 0xc0,
0x90, 0x60, 0x90, 0x38, 0xa4, 0x03, 0x28, 0x30, 0x63, 0x24, 0x03, 0x20,
0x90, 0x38, 0xa4, 0x03, 0xb8, 0x30, 0x75, 0x24, 0x03, 0xb0, 0x90, 0x60,
0x90, 0x38, 0xa4, 0x04, 0xd8, 0x30, 0x99, 0x24, 0x04, 0xd0, 0x90, 0x38,
@@ -5801,113 +5963,113 @@
0xb8, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0x5c, 0x24, 0x02, 0xd8, 0x90,
0x28, 0x80, 0x30, 0x5a, 0x24, 0x02, 0xc8, 0x80, 0x10, 0x10, 0x10, 0x10,
0x90, 0x28, 0x80, 0x30, 0x53, 0x24, 0x02, 0xa0, 0xd7, 0x42, 0x00, 0xa4,
-0x38, 0x60, 0x37, 0x0e, 0xa4, 0x38, 0x40, 0x37, 0x0a, 0xa0, 0x14, 0x68,
+0x39, 0x60, 0x37, 0x2e, 0xa4, 0x39, 0x40, 0x37, 0x2a, 0xa0, 0x14, 0x68,
0xa0, 0x10, 0x90, 0xa0, 0x0c, 0x60, 0x9e, 0x88, 0x09, 0xd0, 0x94, 0xf0,
-0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x44, 0x40,
-0x85, 0x35, 0x2d, 0xcb, 0x61, 0x3d, 0x00, 0x85, 0x35, 0x03, 0x9a, 0x00,
+0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4c, 0x40,
+0x85, 0x35, 0x4d, 0xcb, 0x61, 0x45, 0x00, 0x85, 0x35, 0x23, 0x9a, 0x00,
0x03, 0xf8, 0x91, 0x98, 0x80, 0x91, 0x10, 0x90, 0xa0, 0x90, 0x68, 0x90,
-0x20, 0x3a, 0x53, 0xc9, 0xe2, 0x94, 0x40, 0x85, 0x35, 0x2b, 0xa4, 0x52,
-0x78, 0x3a, 0x50, 0x90, 0x38, 0xa4, 0x52, 0x40, 0x3a, 0x49, 0xa4, 0x52,
-0x30, 0x3a, 0x47, 0x90, 0x48, 0x10, 0x10, 0xa4, 0x51, 0xf8, 0x3a, 0x40,
-0x10, 0x10, 0x80, 0x3a, 0x3c, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x51, 0xc8,
-0x3a, 0x3a, 0x91, 0xb0, 0x91, 0x60, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38,
-0xa4, 0x52, 0x68, 0x3a, 0x4e, 0xa4, 0x52, 0x58, 0x3a, 0x4c, 0x90, 0x38,
-0xa4, 0x52, 0x20, 0x3a, 0x45, 0xa4, 0x52, 0x10, 0x3a, 0x43, 0x90, 0x48,
-0x10, 0x10, 0xa4, 0x51, 0xe8, 0x3a, 0x3e, 0x10, 0x10, 0x80, 0x3a, 0x3b,
-0x90, 0x28, 0x80, 0x3a, 0x34, 0x80, 0x3a, 0x33, 0x81, 0x10, 0x10, 0x80,
-0xa4, 0x51, 0xb8, 0x3a, 0x38, 0xcb, 0x61, 0x3c, 0xc0, 0x85, 0x35, 0x02,
+0x20, 0x3a, 0x75, 0xc9, 0xe2, 0x9c, 0xc0, 0x85, 0x35, 0x4b, 0xa4, 0x53,
+0x88, 0x3a, 0x72, 0x90, 0x38, 0xa4, 0x53, 0x50, 0x3a, 0x6b, 0xa4, 0x53,
+0x40, 0x3a, 0x69, 0x90, 0x48, 0x10, 0x10, 0xa4, 0x53, 0x08, 0x3a, 0x62,
+0x10, 0x10, 0x80, 0x3a, 0x5e, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x52, 0xd8,
+0x3a, 0x5c, 0x91, 0xb0, 0x91, 0x60, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38,
+0xa4, 0x53, 0x78, 0x3a, 0x70, 0xa4, 0x53, 0x68, 0x3a, 0x6e, 0x90, 0x38,
+0xa4, 0x53, 0x30, 0x3a, 0x67, 0xa4, 0x53, 0x20, 0x3a, 0x65, 0x90, 0x48,
+0x10, 0x10, 0xa4, 0x52, 0xf8, 0x3a, 0x60, 0x10, 0x10, 0x80, 0x3a, 0x5d,
+0x90, 0x28, 0x80, 0x3a, 0x56, 0x80, 0x3a, 0x55, 0x81, 0x10, 0x10, 0x80,
+0xa4, 0x52, 0xc8, 0x3a, 0x5a, 0xcb, 0x61, 0x44, 0xc0, 0x85, 0x35, 0x22,
0x90, 0xd8, 0x88, 0x00, 0x90, 0x84, 0x90, 0x38, 0xc1, 0xc0, 0x85, 0x3a,
-0x56, 0xc9, 0xe1, 0x44, 0x00, 0x85, 0x35, 0x29, 0xcb, 0x61, 0x3c, 0x80,
-0x85, 0x35, 0x01, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x43,
-0xc0, 0x85, 0x35, 0x27, 0xcb, 0x61, 0x3c, 0x40, 0x85, 0x35, 0x00, 0x91,
-0xf8, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x43,
-0x40, 0x85, 0x35, 0x23, 0xcb, 0x61, 0x3b, 0xc0, 0x85, 0x34, 0xfe, 0x88,
-0x01, 0x00, 0x90, 0xa0, 0x81, 0x90, 0x70, 0x80, 0x90, 0x20, 0x3a, 0x4a,
-0xc9, 0xe1, 0x43, 0x00, 0x85, 0x35, 0x21, 0x81, 0x3a, 0x41, 0x81, 0x10,
-0x10, 0x80, 0xa4, 0x51, 0xa8, 0x3a, 0x36, 0xcb, 0x61, 0x3b, 0x80, 0x85,
-0x34, 0xfd, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1,
-0x42, 0xc0, 0x85, 0x35, 0x1f, 0xcb, 0x61, 0x3b, 0x40, 0x85, 0x34, 0xfc,
-0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x42, 0x80, 0x85, 0x35,
-0x1d, 0xcb, 0x61, 0x3b, 0x00, 0x85, 0x34, 0xfb, 0x92, 0x38, 0x81, 0x91,
-0x68, 0x91, 0x18, 0x90, 0x80, 0x90, 0x40, 0x80, 0xa4, 0x53, 0x28, 0x3a,
-0x66, 0x80, 0xa4, 0x53, 0x20, 0x3a, 0x63, 0x90, 0x28, 0x81, 0x3a, 0x62,
-0x90, 0x38, 0xa4, 0x53, 0x00, 0x3a, 0x61, 0xa4, 0x52, 0xf0, 0x3a, 0x5f,
-0x90, 0x28, 0x80, 0x3a, 0x5d, 0x80, 0x3a, 0x5c, 0x80, 0x90, 0x40, 0x10,
-0x10, 0x80, 0x24, 0x52, 0xd8, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x52, 0xc8,
-0x3a, 0x5a, 0xa4, 0x52, 0xb8, 0x3a, 0x58, 0x90, 0x28, 0x80, 0x3a, 0x55,
-0x80, 0x3a, 0x54, 0x9a, 0xd0, 0x03, 0xe0, 0x91, 0x60, 0x90, 0xb0, 0x88,
-0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x42, 0x00, 0x85, 0x35, 0x19,
-0xcb, 0x61, 0x3a, 0x80, 0x85, 0x34, 0xf9, 0x88, 0x00, 0x68, 0x84, 0x10,
-0x10, 0xc9, 0xe1, 0x41, 0xc0, 0x85, 0x35, 0x17, 0xcb, 0x61, 0x3a, 0x40,
-0x85, 0x34, 0xf8, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9,
-0xe1, 0x41, 0x80, 0x85, 0x35, 0x15, 0xcb, 0x61, 0x3a, 0x00, 0x85, 0x34,
-0xf7, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x41, 0x40, 0x85,
-0x35, 0x13, 0xcb, 0x61, 0x39, 0xc0, 0x85, 0x34, 0xf6, 0x90, 0x90, 0x90,
-0x48, 0xcb, 0xa1, 0x38, 0x00, 0x85, 0x34, 0xe5, 0xcb, 0xa1, 0x37, 0xc0,
-0x85, 0x34, 0xe4, 0x90, 0x48, 0xcb, 0xa1, 0x37, 0x80, 0x85, 0x34, 0xe3,
-0xcb, 0xa1, 0x37, 0x40, 0x85, 0x34, 0xe2, 0xcb, 0xa2, 0x8c, 0x40, 0x80,
-0x3a, 0x32, 0x92, 0x40, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x26,
-0x60, 0x84, 0x24, 0x26, 0xd8, 0x8c, 0x26, 0x58, 0x84, 0x24, 0x26, 0xd0,
-0x90, 0x48, 0x8c, 0x26, 0x50, 0x84, 0x24, 0x26, 0xc8, 0x8c, 0x26, 0x48,
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-0x24, 0x26, 0xb0, 0x8c, 0x26, 0x30, 0x84, 0x24, 0x26, 0xa8, 0x90, 0x48,
-0x8c, 0x26, 0x28, 0x84, 0x24, 0x26, 0xa0, 0x8c, 0x26, 0x20, 0x84, 0x24,
-0x26, 0x98, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x26, 0x10, 0x84,
-0x24, 0x26, 0x88, 0x8c, 0x26, 0x08, 0x84, 0x24, 0x26, 0x80, 0x90, 0x48,
-0x8c, 0x26, 0x00, 0x84, 0x24, 0x26, 0x78, 0x8c, 0x25, 0xf8, 0x84, 0x24,
-0x26, 0x70, 0x90, 0x38, 0xa4, 0x25, 0xe0, 0x34, 0xbd, 0xa4, 0x25, 0xd0,
-0x34, 0xbb, 0xa0, 0x0f, 0x50, 0xa0, 0x09, 0x08, 0x9a, 0x30, 0x04, 0x40,
-0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x8a, 0x40,
-0x3a, 0x21, 0xe5, 0x22, 0x82, 0x40, 0x3a, 0x1d, 0xcb, 0x61, 0x2a, 0x40,
-0x85, 0x34, 0xb8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x7a, 0x40, 0x39,
-0xe1, 0xe5, 0x22, 0x72, 0x40, 0x39, 0xdd, 0xcb, 0x61, 0x2a, 0x00, 0x85,
-0x34, 0xb7, 0x90, 0x48, 0xcb, 0xa1, 0x29, 0xc0, 0x85, 0x34, 0xb6, 0xcb,
-0xa1, 0x29, 0x80, 0x85, 0x34, 0xb5, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50,
-0x00, 0x80, 0xe5, 0x22, 0x64, 0x40, 0x39, 0xa9, 0xe5, 0x22, 0x58, 0x40,
-0x39, 0x79, 0xcb, 0x61, 0x29, 0x00, 0x85, 0x34, 0xb3, 0x98, 0x50, 0x00,
-0x80, 0xe5, 0x22, 0x4c, 0x40, 0x39, 0x49, 0xe5, 0x22, 0x40, 0x40, 0x39,
-0x19, 0xcb, 0x61, 0x28, 0xc0, 0x85, 0x34, 0xb2, 0x90, 0x48, 0xcb, 0xa1,
-0x28, 0x80, 0x85, 0x34, 0xb1, 0xcb, 0xa1, 0x28, 0x40, 0x85, 0x34, 0xb0,
+0x78, 0xc9, 0xe1, 0x4c, 0x00, 0x85, 0x35, 0x49, 0xcb, 0x61, 0x44, 0x80,
+0x85, 0x35, 0x21, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4b,
+0xc0, 0x85, 0x35, 0x47, 0xcb, 0x61, 0x44, 0x40, 0x85, 0x35, 0x20, 0x91,
+0xf8, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4b,
+0x40, 0x85, 0x35, 0x43, 0xcb, 0x61, 0x43, 0xc0, 0x85, 0x35, 0x1e, 0x88,
+0x01, 0x00, 0x90, 0xa0, 0x81, 0x90, 0x70, 0x80, 0x90, 0x20, 0x3a, 0x6c,
+0xc9, 0xe1, 0x4b, 0x00, 0x85, 0x35, 0x41, 0x81, 0x3a, 0x63, 0x81, 0x10,
+0x10, 0x80, 0xa4, 0x52, 0xb8, 0x3a, 0x58, 0xcb, 0x61, 0x43, 0x80, 0x85,
+0x35, 0x1d, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1,
+0x4a, 0xc0, 0x85, 0x35, 0x3f, 0xcb, 0x61, 0x43, 0x40, 0x85, 0x35, 0x1c,
+0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4a, 0x80, 0x85, 0x35,
+0x3d, 0xcb, 0x61, 0x43, 0x00, 0x85, 0x35, 0x1b, 0x92, 0x38, 0x81, 0x91,
+0x68, 0x91, 0x18, 0x90, 0x80, 0x90, 0x40, 0x80, 0xa4, 0x54, 0x38, 0x3a,
+0x88, 0x80, 0xa4, 0x54, 0x30, 0x3a, 0x85, 0x90, 0x28, 0x81, 0x3a, 0x84,
+0x90, 0x38, 0xa4, 0x54, 0x10, 0x3a, 0x83, 0xa4, 0x54, 0x00, 0x3a, 0x81,
+0x90, 0x28, 0x80, 0x3a, 0x7f, 0x80, 0x3a, 0x7e, 0x80, 0x90, 0x40, 0x10,
+0x10, 0x80, 0x24, 0x53, 0xe8, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x53, 0xd8,
+0x3a, 0x7c, 0xa4, 0x53, 0xc8, 0x3a, 0x7a, 0x90, 0x28, 0x80, 0x3a, 0x77,
+0x80, 0x3a, 0x76, 0x9a, 0xd0, 0x03, 0xe0, 0x91, 0x60, 0x90, 0xb0, 0x88,
+0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x4a, 0x00, 0x85, 0x35, 0x39,
+0xcb, 0x61, 0x42, 0x80, 0x85, 0x35, 0x19, 0x88, 0x00, 0x68, 0x84, 0x10,
+0x10, 0xc9, 0xe1, 0x49, 0xc0, 0x85, 0x35, 0x37, 0xcb, 0x61, 0x42, 0x40,
+0x85, 0x35, 0x18, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9,
+0xe1, 0x49, 0x80, 0x85, 0x35, 0x35, 0xcb, 0x61, 0x42, 0x00, 0x85, 0x35,
+0x17, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x49, 0x40, 0x85,
+0x35, 0x33, 0xcb, 0x61, 0x41, 0xc0, 0x85, 0x35, 0x16, 0x90, 0x90, 0x90,
+0x48, 0xcb, 0xa1, 0x40, 0x00, 0x85, 0x35, 0x05, 0xcb, 0xa1, 0x3f, 0xc0,
+0x85, 0x35, 0x04, 0x90, 0x48, 0xcb, 0xa1, 0x3f, 0x80, 0x85, 0x35, 0x03,
+0xcb, 0xa1, 0x3f, 0x40, 0x85, 0x35, 0x02, 0xcb, 0xa2, 0x94, 0xc0, 0x80,
+0x3a, 0x54, 0x92, 0x40, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27,
+0x60, 0x84, 0x24, 0x27, 0xd8, 0x8c, 0x27, 0x58, 0x84, 0x24, 0x27, 0xd0,
+0x90, 0x48, 0x8c, 0x27, 0x50, 0x84, 0x24, 0x27, 0xc8, 0x8c, 0x27, 0x48,
+0x84, 0x24, 0x27, 0xc0, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27, 0x38, 0x84,
+0x24, 0x27, 0xb0, 0x8c, 0x27, 0x30, 0x84, 0x24, 0x27, 0xa8, 0x90, 0x48,
+0x8c, 0x27, 0x28, 0x84, 0x24, 0x27, 0xa0, 0x8c, 0x27, 0x20, 0x84, 0x24,
+0x27, 0x98, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x27, 0x10, 0x84,
+0x24, 0x27, 0x88, 0x8c, 0x27, 0x08, 0x84, 0x24, 0x27, 0x80, 0x90, 0x48,
+0x8c, 0x27, 0x00, 0x84, 0x24, 0x27, 0x78, 0x8c, 0x26, 0xf8, 0x84, 0x24,
+0x27, 0x70, 0x90, 0x38, 0xa4, 0x26, 0xe0, 0x34, 0xdd, 0xa4, 0x26, 0xd0,
+0x34, 0xdb, 0xa0, 0x0f, 0x50, 0xa0, 0x09, 0x08, 0x9a, 0x30, 0x04, 0x40,
+0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x92, 0xc0,
+0x3a, 0x43, 0xe5, 0x22, 0x8a, 0xc0, 0x3a, 0x3f, 0xcb, 0x61, 0x32, 0x40,
+0x85, 0x34, 0xd8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x82, 0xc0, 0x3a,
+0x03, 0xe5, 0x22, 0x7a, 0xc0, 0x39, 0xff, 0xcb, 0x61, 0x32, 0x00, 0x85,
+0x34, 0xd7, 0x90, 0x48, 0xcb, 0xa1, 0x31, 0xc0, 0x85, 0x34, 0xd6, 0xcb,
+0xa1, 0x31, 0x80, 0x85, 0x34, 0xd5, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50,
+0x00, 0x80, 0xe5, 0x22, 0x6c, 0xc0, 0x39, 0xcb, 0xe5, 0x22, 0x60, 0xc0,
+0x39, 0x9b, 0xcb, 0x61, 0x31, 0x00, 0x85, 0x34, 0xd3, 0x98, 0x50, 0x00,
+0x80, 0xe5, 0x22, 0x54, 0xc0, 0x39, 0x6b, 0xe5, 0x22, 0x48, 0xc0, 0x39,
+0x3b, 0xcb, 0x61, 0x30, 0xc0, 0x85, 0x34, 0xd2, 0x90, 0x48, 0xcb, 0xa1,
+0x30, 0x80, 0x85, 0x34, 0xd1, 0xcb, 0xa1, 0x30, 0x40, 0x85, 0x34, 0xd0,
0x92, 0x20, 0x91, 0x30, 0x90, 0xb8, 0xd5, 0x03, 0x00, 0xc0, 0xc0, 0x81,
0x8c, 0x01, 0xa0, 0x84, 0x30, 0x3e, 0xc0, 0xc0, 0x81, 0x8c, 0x01, 0x80,
0x84, 0x30, 0x3c, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x28, 0xc0,
0xc0, 0x81, 0x30, 0x24, 0x90, 0x78, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81,
0x30, 0x1c, 0xc0, 0xc0, 0x81, 0x30, 0x18, 0xd5, 0x02, 0x00, 0xc0, 0xc0,
0x81, 0x30, 0x10, 0xc0, 0xc0, 0x81, 0x30, 0x0c, 0x91, 0x70, 0x90, 0xd8,
-0xd5, 0x03, 0x80, 0xc8, 0xe2, 0x38, 0x40, 0x81, 0x8c, 0x01, 0xc0, 0x84,
-0x30, 0x40, 0xc8, 0xe2, 0x3a, 0x40, 0x81, 0x8c, 0x01, 0x90, 0x84, 0x30,
-0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x37, 0x40, 0x81, 0x30, 0x2c, 0xc8,
-0xe2, 0x31, 0xc0, 0x81, 0x30, 0x26, 0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8,
-0xe2, 0x26, 0xc0, 0x81, 0x30, 0x20, 0xc8, 0xe2, 0x28, 0xc0, 0x81, 0x30,
-0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x25, 0xc0, 0x81, 0x30, 0x14, 0xc8,
-0xe2, 0x20, 0x40, 0x81, 0x30, 0x0e, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x90,
-0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x7e, 0x40, 0x39, 0xf1,
-0xe5, 0x22, 0x80, 0x40, 0x3a, 0x15, 0xcb, 0x61, 0x27, 0xc0, 0x85, 0x34,
-0xae, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x6e, 0x40, 0x39, 0xb1, 0xe5,
-0x22, 0x70, 0x40, 0x39, 0xd5, 0xcb, 0x61, 0x27, 0x80, 0x85, 0x34, 0xad,
-0x90, 0x48, 0xcb, 0xa1, 0x27, 0x40, 0x85, 0x34, 0xac, 0xcb, 0xa1, 0x27,
-0x00, 0x85, 0x34, 0xab, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80,
-0xe5, 0x22, 0x60, 0x40, 0x39, 0x99, 0xe5, 0x22, 0x54, 0x40, 0x39, 0x69,
-0xcb, 0x61, 0x25, 0x40, 0x85, 0x34, 0x9a, 0x98, 0x50, 0x00, 0x80, 0xe5,
-0x22, 0x48, 0x40, 0x39, 0x39, 0xe5, 0x22, 0x3c, 0x40, 0x39, 0x09, 0xcb,
-0x61, 0x25, 0x00, 0x85, 0x34, 0x99, 0x90, 0x48, 0xcb, 0xa1, 0x24, 0xc0,
-0x85, 0x34, 0x98, 0xcb, 0xa1, 0x24, 0x80, 0x85, 0x34, 0x97, 0x91, 0x00,
+0xd5, 0x03, 0x80, 0xc8, 0xe2, 0x40, 0xc0, 0x81, 0x8c, 0x01, 0xc0, 0x84,
+0x30, 0x40, 0xc8, 0xe2, 0x42, 0xc0, 0x81, 0x8c, 0x01, 0x90, 0x84, 0x30,
+0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x3f, 0xc0, 0x81, 0x30, 0x2c, 0xc8,
+0xe2, 0x3a, 0x40, 0x81, 0x30, 0x26, 0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8,
+0xe2, 0x2f, 0x40, 0x81, 0x30, 0x20, 0xc8, 0xe2, 0x31, 0x40, 0x81, 0x30,
+0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x2e, 0x40, 0x81, 0x30, 0x14, 0xc8,
+0xe2, 0x28, 0xc0, 0x81, 0x30, 0x0e, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x90,
+0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x86, 0xc0, 0x3a, 0x13,
+0xe5, 0x22, 0x88, 0xc0, 0x3a, 0x37, 0xcb, 0x61, 0x2f, 0xc0, 0x85, 0x34,
+0xce, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x76, 0xc0, 0x39, 0xd3, 0xe5,
+0x22, 0x78, 0xc0, 0x39, 0xf7, 0xcb, 0x61, 0x2f, 0x80, 0x85, 0x34, 0xcd,
+0x90, 0x48, 0xcb, 0xa1, 0x2f, 0x40, 0x85, 0x34, 0xcc, 0xcb, 0xa1, 0x2f,
+0x00, 0x85, 0x34, 0xcb, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80,
+0xe5, 0x22, 0x68, 0xc0, 0x39, 0xbb, 0xe5, 0x22, 0x5c, 0xc0, 0x39, 0x8b,
+0xcb, 0x61, 0x2d, 0x40, 0x85, 0x34, 0xba, 0x98, 0x50, 0x00, 0x80, 0xe5,
+0x22, 0x50, 0xc0, 0x39, 0x5b, 0xe5, 0x22, 0x44, 0xc0, 0x39, 0x2b, 0xcb,
+0x61, 0x2d, 0x00, 0x85, 0x34, 0xb9, 0x90, 0x48, 0xcb, 0xa1, 0x2c, 0xc0,
+0x85, 0x34, 0xb8, 0xcb, 0xa1, 0x2c, 0x80, 0x85, 0x34, 0xb7, 0x91, 0x00,
0x90, 0x80, 0x90, 0x40, 0xe5, 0x20, 0x02, 0x40, 0x30, 0x0a, 0xe5, 0x20,
0x01, 0x80, 0x30, 0x07, 0x90, 0x40, 0xe5, 0x20, 0x00, 0xc0, 0x30, 0x04,
0xe5, 0x20, 0x00, 0x00, 0x30, 0x01, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22,
-0x2d, 0x40, 0x38, 0xab, 0xe5, 0x22, 0x2f, 0x80, 0x38, 0xd3, 0x90, 0x40,
-0xe5, 0x22, 0x1b, 0xc0, 0x38, 0x65, 0xe5, 0x22, 0x1e, 0x00, 0x38, 0x8d,
-0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, 0x24, 0x48, 0x90, 0x80, 0x90, 0x40,
-0xe5, 0x22, 0x84, 0x40, 0x3a, 0x0d, 0xe5, 0x22, 0x81, 0x40, 0x3a, 0x19,
-0x90, 0x40, 0xe5, 0x22, 0x74, 0x40, 0x39, 0xcd, 0xe5, 0x22, 0x71, 0x40,
-0x39, 0xd9, 0x91, 0x48, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22,
-0x62, 0x40, 0x39, 0xa1, 0xe5, 0x22, 0x56, 0x40, 0x39, 0x71, 0xcb, 0x61,
-0x23, 0x00, 0x85, 0x34, 0x90, 0x90, 0x40, 0xe5, 0x22, 0x4a, 0x40, 0x39,
-0x41, 0xe5, 0x22, 0x3e, 0x40, 0x39, 0x11, 0x90, 0x48, 0xcb, 0xa1, 0x22,
-0x80, 0x85, 0x34, 0x8e, 0xcb, 0xa1, 0x22, 0xc0, 0x85, 0x34, 0x8f, 0x10,
-0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, 0x33, 0xc0, 0x38, 0xcb, 0xe5,
-0x22, 0x30, 0xc0, 0x38, 0xd9, 0x90, 0x40, 0xe5, 0x22, 0x22, 0x40, 0x38,
-0x85, 0xe5, 0x22, 0x1f, 0x40, 0x38, 0x93,
+0x35, 0xc0, 0x38, 0xcd, 0xe5, 0x22, 0x38, 0x00, 0x38, 0xf5, 0x90, 0x40,
+0xe5, 0x22, 0x24, 0x40, 0x38, 0x87, 0xe5, 0x22, 0x26, 0x80, 0x38, 0xaf,
+0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, 0x25, 0x48, 0x90, 0x80, 0x90, 0x40,
+0xe5, 0x22, 0x8c, 0xc0, 0x3a, 0x2f, 0xe5, 0x22, 0x89, 0xc0, 0x3a, 0x3b,
+0x90, 0x40, 0xe5, 0x22, 0x7c, 0xc0, 0x39, 0xef, 0xe5, 0x22, 0x79, 0xc0,
+0x39, 0xfb, 0x91, 0x48, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22,
+0x6a, 0xc0, 0x39, 0xc3, 0xe5, 0x22, 0x5e, 0xc0, 0x39, 0x93, 0xcb, 0x61,
+0x2b, 0x00, 0x85, 0x34, 0xb0, 0x90, 0x40, 0xe5, 0x22, 0x52, 0xc0, 0x39,
+0x63, 0xe5, 0x22, 0x46, 0xc0, 0x39, 0x33, 0x90, 0x48, 0xcb, 0xa1, 0x2a,
+0x80, 0x85, 0x34, 0xae, 0xcb, 0xa1, 0x2a, 0xc0, 0x85, 0x34, 0xaf, 0x10,
+0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, 0x3c, 0x40, 0x38, 0xed, 0xe5,
+0x22, 0x39, 0x40, 0x38, 0xfb, 0x90, 0x40, 0xe5, 0x22, 0x2a, 0xc0, 0x38,
+0xa7, 0xe5, 0x22, 0x27, 0xc0, 0x38, 0xb5,
};
static const struct ia64_dis_names ia64_dis_names[] = {
@@ -6528,18 +6690,18 @@
{ 0x1, 175, 0, 640 },
{ 0x5, 175, 0, 638 },
{ 0x3, 175, 0, 639 },
-{ 0x4, 446, 0, 641 },
-{ 0x2, 446, 0, 642 },
-{ 0x1, 446, 0, 643 },
-{ 0x4, 445, 0, 644 },
-{ 0x2, 445, 0, 645 },
-{ 0x1, 445, 0, 646 },
-{ 0x4, 444, 0, 647 },
-{ 0x2, 444, 0, 648 },
-{ 0x1, 444, 0, 649 },
-{ 0x4, 443, 0, 650 },
-{ 0x2, 443, 0, 651 },
-{ 0x1, 443, 0, 652 },
+{ 0x4, 451, 0, 641 },
+{ 0x2, 451, 0, 642 },
+{ 0x1, 451, 0, 643 },
+{ 0x4, 450, 0, 644 },
+{ 0x2, 450, 0, 645 },
+{ 0x1, 450, 0, 646 },
+{ 0x4, 449, 0, 647 },
+{ 0x2, 449, 0, 648 },
+{ 0x1, 449, 0, 649 },
+{ 0x4, 448, 0, 650 },
+{ 0x2, 448, 0, 651 },
+{ 0x1, 448, 0, 652 },
{ 0x2, 123, 1, 658 },
{ 0x2, 124, 0, 657 },
{ 0xa, 123, 1, 654 },
@@ -6866,7 +7028,7 @@
{ 0x1, 50, 0, 977 },
{ 0x3, 49, 0, 978 },
{ 0x1, 428, 0, 979 },
-{ 0x1, 438, 0, 980 },
+{ 0x1, 442, 0, 980 },
{ 0x2, 386, 0, 983 },
{ 0x1, 386, 0, 984 },
{ 0x2, 384, 0, 985 },
@@ -6936,12 +7098,12 @@
{ 0x1, 362, 0, 1067 },
{ 0x1, 359, 0, 1068 },
{ 0x1, 361, 0, 1069 },
-{ 0x2, 442, 0, 1070 },
-{ 0x1, 442, 0, 1073 },
-{ 0x2, 441, 0, 1071 },
-{ 0x1, 441, 0, 1074 },
-{ 0x2, 440, 0, 1072 },
-{ 0x1, 440, 0, 1075 },
+{ 0x2, 446, 0, 1070 },
+{ 0x1, 446, 0, 1073 },
+{ 0x2, 445, 0, 1071 },
+{ 0x1, 445, 0, 1074 },
+{ 0x2, 444, 0, 1072 },
+{ 0x1, 444, 0, 1075 },
{ 0x1, 348, 0, 1076 },
{ 0x2, 347, 0, 1077 },
{ 0x1, 347, 0, 1078 },
@@ -6955,38 +7117,38 @@
{ 0x1, 363, 0, 1086 },
{ 0x2, 364, 0, 1087 },
{ 0x1, 364, 0, 1088 },
-{ 0xa, 434, 1, 1100 },
-{ 0xa, 435, 1, 1099 },
-{ 0xa, 436, 1, 1098 },
-{ 0xa, 437, 0, 1097 },
-{ 0x1a, 434, 1, 1092 },
-{ 0x1a, 435, 1, 1091 },
-{ 0x32, 436, 1, 1090 },
-{ 0x32, 437, 0, 1089 },
-{ 0x6, 434, 1, 1108 },
-{ 0x6, 435, 1, 1107 },
-{ 0x6, 436, 1, 1106 },
-{ 0x6, 437, 0, 1105 },
-{ 0x1, 434, 1, 1120 },
-{ 0x1, 435, 1, 1119 },
-{ 0x1, 436, 1, 1118 },
-{ 0x1, 437, 0, 1117 },
-{ 0x9, 434, 1, 1104 },
-{ 0x9, 435, 1, 1103 },
-{ 0x9, 436, 1, 1102 },
-{ 0x9, 437, 0, 1101 },
-{ 0x19, 434, 1, 1096 },
-{ 0x19, 435, 1, 1095 },
-{ 0x31, 436, 1, 1094 },
-{ 0x31, 437, 0, 1093 },
-{ 0x5, 434, 1, 1112 },
-{ 0x5, 435, 1, 1111 },
-{ 0x5, 436, 1, 1110 },
-{ 0x5, 437, 0, 1109 },
-{ 0x3, 434, 1, 1116 },
-{ 0x3, 435, 1, 1115 },
-{ 0x3, 436, 1, 1114 },
-{ 0x3, 437, 0, 1113 },
+{ 0xa, 438, 1, 1100 },
+{ 0xa, 439, 1, 1099 },
+{ 0xa, 440, 1, 1098 },
+{ 0xa, 441, 0, 1097 },
+{ 0x1a, 438, 1, 1092 },
+{ 0x1a, 439, 1, 1091 },
+{ 0x32, 440, 1, 1090 },
+{ 0x32, 441, 0, 1089 },
+{ 0x6, 438, 1, 1108 },
+{ 0x6, 439, 1, 1107 },
+{ 0x6, 440, 1, 1106 },
+{ 0x6, 441, 0, 1105 },
+{ 0x1, 438, 1, 1120 },
+{ 0x1, 439, 1, 1119 },
+{ 0x1, 440, 1, 1118 },
+{ 0x1, 441, 0, 1117 },
+{ 0x9, 438, 1, 1104 },
+{ 0x9, 439, 1, 1103 },
+{ 0x9, 440, 1, 1102 },
+{ 0x9, 441, 0, 1101 },
+{ 0x19, 438, 1, 1096 },
+{ 0x19, 439, 1, 1095 },
+{ 0x31, 440, 1, 1094 },
+{ 0x31, 441, 0, 1093 },
+{ 0x5, 438, 1, 1112 },
+{ 0x5, 439, 1, 1111 },
+{ 0x5, 440, 1, 1110 },
+{ 0x5, 441, 0, 1109 },
+{ 0x3, 438, 1, 1116 },
+{ 0x3, 439, 1, 1115 },
+{ 0x3, 440, 1, 1114 },
+{ 0x3, 441, 0, 1113 },
{ 0xa, 429, 1, 1132 },
{ 0xa, 430, 1, 1131 },
{ 0xa, 431, 1, 1130 },
@@ -7019,1560 +7181,1594 @@
{ 0x3, 430, 1, 1147 },
{ 0x3, 431, 1, 1146 },
{ 0x3, 432, 0, 1145 },
-{ 0x1, 139, 0, 1153 },
-{ 0x1, 138, 0, 1154 },
-{ 0x1, 391, 1, 1156 },
-{ 0x1, 137, 0, 1155 },
-{ 0x2, 395, 1, 1158 },
-{ 0x2, 141, 0, 1157 },
-{ 0x1, 395, 1, 1160 },
-{ 0x1, 141, 0, 1159 },
-{ 0x1, 397, 0, 1161 },
-{ 0x1, 136, 0, 1162 },
-{ 0x2, 135, 0, 1163 },
-{ 0x2, 134, 0, 1164 },
-{ 0x1, 454, 1, 1170 },
+{ 0xa, 433, 1, 1164 },
+{ 0xa, 434, 1, 1163 },
+{ 0xa, 435, 1, 1162 },
+{ 0xa, 436, 0, 1161 },
+{ 0x1a, 433, 1, 1156 },
+{ 0x1a, 434, 1, 1155 },
+{ 0x32, 435, 1, 1154 },
+{ 0x32, 436, 0, 1153 },
+{ 0x6, 433, 1, 1172 },
+{ 0x6, 434, 1, 1171 },
+{ 0x6, 435, 1, 1170 },
+{ 0x6, 436, 0, 1169 },
+{ 0x1, 433, 1, 1184 },
+{ 0x1, 434, 1, 1183 },
+{ 0x1, 435, 1, 1182 },
+{ 0x1, 436, 0, 1181 },
+{ 0x9, 433, 1, 1168 },
+{ 0x9, 434, 1, 1167 },
+{ 0x9, 435, 1, 1166 },
+{ 0x9, 436, 0, 1165 },
+{ 0x19, 433, 1, 1160 },
+{ 0x19, 434, 1, 1159 },
+{ 0x31, 435, 1, 1158 },
+{ 0x31, 436, 0, 1157 },
+{ 0x5, 433, 1, 1176 },
+{ 0x5, 434, 1, 1175 },
+{ 0x5, 435, 1, 1174 },
+{ 0x5, 436, 0, 1173 },
+{ 0x3, 433, 1, 1180 },
+{ 0x3, 434, 1, 1179 },
+{ 0x3, 435, 1, 1178 },
+{ 0x3, 436, 0, 1177 },
+{ 0x1, 139, 0, 1185 },
+{ 0x1, 138, 0, 1186 },
+{ 0x1, 391, 1, 1188 },
+{ 0x1, 137, 0, 1187 },
+{ 0x2, 395, 1, 1190 },
+{ 0x2, 141, 0, 1189 },
+{ 0x1, 395, 1, 1192 },
+{ 0x1, 141, 0, 1191 },
+{ 0x1, 397, 0, 1193 },
+{ 0x1, 136, 0, 1194 },
+{ 0x2, 135, 0, 1195 },
+{ 0x2, 134, 0, 1196 },
+{ 0x1, 459, 1, 1202 },
{ 0x1, 246, 0, 1033 },
-{ 0x1, 453, 0, 1171 },
-{ 0x1, 452, 1, 1172 },
+{ 0x1, 458, 0, 1203 },
+{ 0x1, 457, 1, 1204 },
{ 0x1, 245, 0, 1042 },
-{ 0x1, 308, 0, 1173 },
-{ 0x1, 307, 1, 1174 },
+{ 0x1, 308, 0, 1205 },
+{ 0x1, 307, 1, 1206 },
{ 0x1, 290, 0, 1034 },
-{ 0x1, 306, 0, 1175 },
-{ 0x1, 305, 1, 1176 },
+{ 0x1, 306, 0, 1207 },
+{ 0x1, 305, 1, 1208 },
{ 0x1, 427, 0, 1036 },
-{ 0x1, 304, 1, 1177 },
+{ 0x1, 304, 1, 1209 },
{ 0x1, 398, 0, 1038 },
-{ 0x1, 303, 0, 1178 },
-{ 0x1, 302, 0, 1179 },
-{ 0x1, 301, 0, 1180 },
-{ 0x1, 300, 1, 1181 },
+{ 0x1, 303, 0, 1210 },
+{ 0x1, 302, 0, 1211 },
+{ 0x1, 301, 0, 1212 },
+{ 0x1, 300, 1, 1213 },
{ 0x2, 398, 0, 1037 },
-{ 0x10, 299, 0, 1185 },
-{ 0x90, 299, 0, 1183 },
-{ 0x190, 299, 0, 1182 },
-{ 0x50, 299, 0, 1184 },
-{ 0x30, 299, 0, 1187 },
-{ 0x70, 299, 0, 1186 },
-{ 0x8, 299, 0, 1189 },
-{ 0x18, 299, 0, 1188 },
-{ 0x4, 299, 0, 1190 },
-{ 0x1, 299, 0, 1193 },
-{ 0x3, 299, 0, 1192 },
-{ 0x1, 298, 1, 1194 },
-{ 0x2, 299, 0, 1191 },
-{ 0x3, 46, 0, 1195 },
-{ 0x1, 241, 1, 1196 },
+{ 0x10, 299, 0, 1217 },
+{ 0x90, 299, 0, 1215 },
+{ 0x190, 299, 0, 1214 },
+{ 0x50, 299, 0, 1216 },
+{ 0x30, 299, 0, 1219 },
+{ 0x70, 299, 0, 1218 },
+{ 0x8, 299, 0, 1221 },
+{ 0x18, 299, 0, 1220 },
+{ 0x4, 299, 0, 1222 },
+{ 0x1, 299, 0, 1225 },
+{ 0x3, 299, 0, 1224 },
+{ 0x1, 298, 1, 1226 },
+{ 0x2, 299, 0, 1223 },
+{ 0x3, 46, 0, 1227 },
+{ 0x1, 241, 1, 1228 },
{ 0x1, 242, 1, 1028 },
{ 0x1, 243, 0, 88 },
-{ 0x1, 341, 1, 1197 },
+{ 0x1, 341, 1, 1229 },
{ 0x1, 342, 1, 1029 },
{ 0x1, 343, 0, 89 },
-{ 0x1, 34, 1, 1198 },
+{ 0x1, 34, 1, 1230 },
{ 0x1, 35, 1, 1030 },
{ 0x1, 36, 0, 90 },
-{ 0x1, 230, 0, 1199 },
-{ 0x4, 447, 0, 1200 },
-{ 0x2, 447, 0, 1201 },
-{ 0x1, 447, 1, 1203 },
-{ 0x1, 448, 0, 1202 },
-{ 0x8, 449, 0, 1204 },
-{ 0x4, 449, 0, 1205 },
-{ 0x1, 449, 1, 1207 },
-{ 0x2, 449, 0, 1206 },
-{ 0x8, 219, 0, 1208 },
-{ 0x4, 219, 0, 1209 },
-{ 0x2, 219, 0, 1210 },
-{ 0x1, 219, 1, 1212 },
-{ 0x1, 220, 0, 1211 },
-{ 0x10, 221, 0, 1213 },
-{ 0x8, 221, 0, 1214 },
-{ 0x4, 221, 0, 1215 },
-{ 0x1, 221, 1, 1217 },
-{ 0x2, 221, 0, 1216 },
-{ 0x220, 191, 0, 1218 },
-{ 0x120, 191, 0, 1219 },
-{ 0xa0, 191, 0, 1220 },
-{ 0x60, 191, 1, 1222 },
-{ 0x4, 192, 0, 1221 },
-{ 0x110, 191, 0, 1228 },
-{ 0x90, 191, 0, 1229 },
-{ 0x50, 191, 0, 1230 },
-{ 0x30, 191, 1, 1232 },
-{ 0x2, 192, 0, 1231 },
-{ 0x8, 191, 0, 1233 },
-{ 0x4, 191, 0, 1234 },
-{ 0x2, 191, 0, 1235 },
-{ 0x1, 191, 1, 1237 },
-{ 0x1, 192, 0, 1236 },
-{ 0x440, 193, 0, 1223 },
-{ 0x240, 193, 0, 1224 },
-{ 0x140, 193, 0, 1225 },
-{ 0xc0, 193, 1, 1227 },
-{ 0x40, 193, 0, 1226 },
-{ 0x220, 193, 0, 1238 },
-{ 0x120, 193, 0, 1239 },
-{ 0xa0, 193, 0, 1240 },
-{ 0x60, 193, 1, 1242 },
-{ 0x20, 193, 0, 1241 },
-{ 0x10, 193, 0, 1243 },
-{ 0x8, 193, 0, 1244 },
-{ 0x4, 193, 0, 1245 },
-{ 0x1, 193, 1, 1247 },
-{ 0x2, 193, 0, 1246 },
-{ 0x8, 215, 0, 1248 },
-{ 0x4, 215, 0, 1249 },
-{ 0x2, 215, 0, 1250 },
-{ 0x1, 215, 1, 1252 },
-{ 0x1, 216, 0, 1251 },
-{ 0x220, 187, 0, 1253 },
-{ 0x120, 187, 0, 1254 },
-{ 0xa0, 187, 0, 1255 },
-{ 0x60, 187, 1, 1257 },
-{ 0x4, 188, 0, 1256 },
-{ 0x110, 187, 0, 1263 },
-{ 0x90, 187, 0, 1264 },
-{ 0x50, 187, 0, 1265 },
-{ 0x30, 187, 1, 1267 },
-{ 0x2, 188, 0, 1266 },
-{ 0x8, 187, 0, 1268 },
-{ 0x4, 187, 0, 1269 },
-{ 0x2, 187, 0, 1270 },
-{ 0x1, 187, 1, 1272 },
-{ 0x1, 188, 0, 1271 },
-{ 0x440, 233, 0, 1258 },
-{ 0x240, 233, 0, 1259 },
-{ 0x140, 233, 0, 1260 },
-{ 0xc0, 233, 1, 1262 },
-{ 0x40, 233, 0, 1261 },
-{ 0x220, 233, 0, 1273 },
-{ 0x120, 233, 0, 1274 },
-{ 0xa0, 233, 0, 1275 },
-{ 0x60, 233, 1, 1277 },
-{ 0x20, 233, 0, 1276 },
-{ 0x10, 233, 0, 1278 },
-{ 0x8, 233, 0, 1279 },
-{ 0x4, 233, 0, 1280 },
-{ 0x1, 233, 1, 1282 },
-{ 0x2, 233, 0, 1281 },
-{ 0x8, 207, 0, 1283 },
-{ 0x4, 207, 0, 1284 },
-{ 0x2, 207, 0, 1285 },
-{ 0x1, 207, 1, 1287 },
-{ 0x1, 208, 0, 1286 },
-{ 0x10, 214, 0, 1288 },
-{ 0x8, 214, 0, 1289 },
-{ 0x4, 214, 0, 1290 },
-{ 0x1, 214, 1, 1292 },
-{ 0x2, 214, 0, 1291 },
-{ 0x220, 178, 0, 1293 },
-{ 0x120, 178, 0, 1294 },
-{ 0xa0, 178, 0, 1295 },
-{ 0x60, 178, 1, 1297 },
-{ 0x4, 179, 0, 1296 },
-{ 0x110, 178, 0, 1318 },
-{ 0x90, 178, 0, 1319 },
-{ 0x50, 178, 0, 1320 },
-{ 0x30, 178, 1, 1322 },
-{ 0x2, 179, 0, 1321 },
-{ 0x8, 178, 0, 1323 },
-{ 0x4, 178, 0, 1324 },
-{ 0x2, 178, 0, 1325 },
-{ 0x1, 178, 1, 1327 },
-{ 0x1, 179, 0, 1326 },
-{ 0x440, 186, 0, 1298 },
-{ 0x240, 186, 0, 1299 },
-{ 0x140, 186, 0, 1300 },
-{ 0xc0, 186, 1, 1302 },
-{ 0x40, 186, 0, 1301 },
-{ 0x220, 186, 0, 1328 },
-{ 0x120, 186, 0, 1329 },
-{ 0xa0, 186, 0, 1330 },
-{ 0x60, 186, 1, 1332 },
-{ 0x20, 186, 0, 1331 },
-{ 0x10, 186, 0, 1333 },
-{ 0x8, 186, 0, 1334 },
-{ 0x4, 186, 0, 1335 },
-{ 0x1, 186, 1, 1337 },
-{ 0x2, 186, 0, 1336 },
-{ 0x440, 143, 0, 1303 },
-{ 0x240, 143, 0, 1304 },
-{ 0x140, 143, 0, 1305 },
-{ 0xc0, 143, 1, 1307 },
-{ 0x40, 143, 0, 1306 },
-{ 0x220, 143, 0, 1338 },
-{ 0x120, 143, 0, 1339 },
-{ 0xa0, 143, 0, 1340 },
-{ 0x60, 143, 1, 1342 },
-{ 0x20, 143, 0, 1341 },
-{ 0x10, 143, 0, 1343 },
-{ 0x8, 143, 0, 1344 },
-{ 0x1, 143, 1, 1347 },
-{ 0x2, 143, 0, 1346 },
-{ 0x440, 194, 1, 1313 },
-{ 0x441, 174, 0, 1308 },
-{ 0x240, 194, 1, 1314 },
-{ 0x241, 174, 0, 1309 },
-{ 0x140, 194, 1, 1315 },
-{ 0x141, 174, 0, 1310 },
-{ 0xc0, 194, 1, 1317 },
-{ 0x40, 194, 1, 1316 },
-{ 0xc1, 174, 1, 1312 },
-{ 0x41, 174, 0, 1311 },
-{ 0x220, 194, 1, 1358 },
-{ 0x221, 174, 0, 1348 },
-{ 0x120, 194, 1, 1359 },
-{ 0x121, 174, 0, 1349 },
-{ 0xa0, 194, 1, 1360 },
-{ 0xa1, 174, 0, 1350 },
-{ 0x60, 194, 1, 1362 },
-{ 0x20, 194, 1, 1361 },
-{ 0x61, 174, 1, 1352 },
-{ 0x21, 174, 0, 1351 },
-{ 0x10, 194, 1, 1363 },
-{ 0x11, 174, 0, 1353 },
-{ 0x8, 194, 1, 1364 },
-{ 0x9, 174, 0, 1354 },
-{ 0x4, 194, 1, 1365 },
-{ 0x5, 174, 0, 1355 },
-{ 0x1, 194, 1, 1367 },
-{ 0x2, 194, 1, 1366 },
-{ 0x3, 174, 1, 1357 },
-{ 0x1, 174, 0, 1356 },
-{ 0x1, 153, 1, 1375 },
-{ 0x1, 154, 1, 1374 },
-{ 0x1, 155, 1, 1373 },
-{ 0x1, 156, 0, 1372 },
-{ 0x3, 153, 1, 1371 },
-{ 0x3, 154, 1, 1370 },
-{ 0x3, 155, 1, 1369 },
-{ 0x3, 156, 0, 1368 },
-{ 0x1108, 159, 1, 1537 },
-{ 0x1108, 160, 1, 1536 },
-{ 0x1108, 165, 1, 1377 },
-{ 0x1108, 166, 0, 1376 },
-{ 0x908, 159, 1, 1539 },
-{ 0x908, 160, 1, 1538 },
-{ 0x908, 165, 1, 1379 },
-{ 0x908, 166, 0, 1378 },
-{ 0x508, 159, 1, 1541 },
-{ 0x508, 160, 1, 1540 },
-{ 0x508, 165, 1, 1381 },
-{ 0x508, 166, 0, 1380 },
-{ 0x308, 159, 1, 1545 },
-{ 0x308, 160, 1, 1544 },
-{ 0x108, 160, 1, 1542 },
-{ 0x18, 161, 1, 1543 },
-{ 0x308, 165, 1, 1385 },
-{ 0x308, 166, 1, 1384 },
-{ 0x108, 166, 1, 1382 },
-{ 0x18, 167, 0, 1383 },
-{ 0x88, 159, 1, 1577 },
-{ 0x88, 160, 1, 1576 },
-{ 0x88, 165, 1, 1457 },
-{ 0x88, 166, 0, 1456 },
-{ 0x48, 159, 1, 1579 },
-{ 0x48, 160, 1, 1578 },
-{ 0x48, 165, 1, 1459 },
-{ 0x48, 166, 0, 1458 },
-{ 0x28, 159, 1, 1581 },
-{ 0x28, 160, 1, 1580 },
-{ 0x28, 165, 1, 1461 },
-{ 0x28, 166, 0, 1460 },
-{ 0x18, 159, 1, 1585 },
-{ 0x18, 160, 1, 1584 },
-{ 0x8, 160, 1, 1582 },
-{ 0x8, 161, 1, 1583 },
-{ 0x18, 165, 1, 1465 },
-{ 0x18, 166, 1, 1464 },
-{ 0x8, 166, 1, 1462 },
-{ 0x8, 167, 0, 1463 },
-{ 0x884, 159, 1, 1547 },
-{ 0x884, 160, 1, 1546 },
-{ 0x442, 162, 1, 1437 },
-{ 0x442, 163, 1, 1436 },
-{ 0x884, 165, 1, 1407 },
-{ 0x884, 166, 1, 1406 },
-{ 0x442, 168, 1, 1387 },
-{ 0x442, 169, 0, 1386 },
-{ 0x484, 159, 1, 1549 },
-{ 0x484, 160, 1, 1548 },
-{ 0x242, 162, 1, 1439 },
-{ 0x242, 163, 1, 1438 },
-{ 0x484, 165, 1, 1409 },
-{ 0x484, 166, 1, 1408 },
-{ 0x242, 168, 1, 1389 },
-{ 0x242, 169, 0, 1388 },
-{ 0x284, 159, 1, 1551 },
-{ 0x284, 160, 1, 1550 },
-{ 0x142, 162, 1, 1441 },
-{ 0x142, 163, 1, 1440 },
-{ 0x284, 165, 1, 1411 },
-{ 0x284, 166, 1, 1410 },
-{ 0x142, 168, 1, 1391 },
-{ 0x142, 169, 0, 1390 },
-{ 0x184, 159, 1, 1555 },
-{ 0x184, 160, 1, 1554 },
-{ 0x84, 160, 1, 1552 },
-{ 0xc, 161, 1, 1553 },
-{ 0xc2, 162, 1, 1445 },
-{ 0xc2, 163, 1, 1444 },
-{ 0x42, 163, 1, 1442 },
-{ 0x6, 164, 1, 1443 },
-{ 0x184, 165, 1, 1415 },
-{ 0x184, 166, 1, 1414 },
-{ 0x84, 166, 1, 1412 },
-{ 0xc, 167, 1, 1413 },
-{ 0xc2, 168, 1, 1395 },
-{ 0xc2, 169, 1, 1394 },
-{ 0x42, 169, 1, 1392 },
-{ 0x6, 170, 0, 1393 },
-{ 0x44, 159, 1, 1587 },
-{ 0x44, 160, 1, 1586 },
-{ 0x22, 162, 1, 1517 },
-{ 0x22, 163, 1, 1516 },
-{ 0x44, 165, 1, 1487 },
-{ 0x44, 166, 1, 1486 },
-{ 0x22, 168, 1, 1467 },
-{ 0x22, 169, 0, 1466 },
-{ 0x24, 159, 1, 1589 },
-{ 0x24, 160, 1, 1588 },
-{ 0x12, 162, 1, 1519 },
-{ 0x12, 163, 1, 1518 },
-{ 0x24, 165, 1, 1489 },
-{ 0x24, 166, 1, 1488 },
-{ 0x12, 168, 1, 1469 },
-{ 0x12, 169, 0, 1468 },
-{ 0x14, 159, 1, 1591 },
-{ 0x14, 160, 1, 1590 },
-{ 0xa, 162, 1, 1521 },
-{ 0xa, 163, 1, 1520 },
-{ 0x14, 165, 1, 1491 },
-{ 0x14, 166, 1, 1490 },
-{ 0xa, 168, 1, 1471 },
-{ 0xa, 169, 0, 1470 },
-{ 0xc, 159, 1, 1595 },
-{ 0xc, 160, 1, 1594 },
-{ 0x4, 160, 1, 1592 },
-{ 0x4, 161, 1, 1593 },
-{ 0x6, 162, 1, 1525 },
-{ 0x6, 163, 1, 1524 },
-{ 0x2, 163, 1, 1522 },
-{ 0x2, 164, 1, 1523 },
-{ 0xc, 165, 1, 1495 },
-{ 0xc, 166, 1, 1494 },
-{ 0x4, 166, 1, 1492 },
-{ 0x4, 167, 1, 1493 },
-{ 0x6, 168, 1, 1475 },
-{ 0x6, 169, 1, 1474 },
-{ 0x2, 169, 1, 1472 },
-{ 0x2, 170, 0, 1473 },
-{ 0x442, 159, 1, 1557 },
-{ 0x442, 160, 1, 1556 },
-{ 0x221, 162, 1, 1447 },
-{ 0x221, 163, 1, 1446 },
-{ 0x442, 165, 1, 1417 },
-{ 0x442, 166, 1, 1416 },
-{ 0x221, 168, 1, 1397 },
-{ 0x221, 169, 0, 1396 },
-{ 0x242, 159, 1, 1559 },
-{ 0x242, 160, 1, 1558 },
-{ 0x121, 162, 1, 1449 },
-{ 0x121, 163, 1, 1448 },
-{ 0x242, 165, 1, 1419 },
-{ 0x242, 166, 1, 1418 },
-{ 0x121, 168, 1, 1399 },
-{ 0x121, 169, 0, 1398 },
-{ 0x142, 159, 1, 1561 },
-{ 0x142, 160, 1, 1560 },
-{ 0xa1, 162, 1, 1451 },
-{ 0xa1, 163, 1, 1450 },
-{ 0x142, 165, 1, 1421 },
-{ 0x142, 166, 1, 1420 },
-{ 0xa1, 168, 1, 1401 },
-{ 0xa1, 169, 0, 1400 },
-{ 0xc2, 159, 1, 1565 },
-{ 0xc2, 160, 1, 1564 },
-{ 0x42, 160, 1, 1562 },
-{ 0x6, 161, 1, 1563 },
-{ 0x61, 162, 1, 1455 },
-{ 0x61, 163, 1, 1454 },
-{ 0x21, 163, 1, 1452 },
-{ 0x3, 164, 1, 1453 },
-{ 0xc2, 165, 1, 1425 },
-{ 0xc2, 166, 1, 1424 },
-{ 0x42, 166, 1, 1422 },
-{ 0x6, 167, 1, 1423 },
-{ 0x61, 168, 1, 1405 },
-{ 0x61, 169, 1, 1404 },
-{ 0x21, 169, 1, 1402 },
-{ 0x3, 170, 0, 1403 },
-{ 0x22, 159, 1, 1597 },
-{ 0x22, 160, 1, 1596 },
-{ 0x11, 162, 1, 1527 },
-{ 0x11, 163, 1, 1526 },
-{ 0x22, 165, 1, 1497 },
-{ 0x22, 166, 1, 1496 },
-{ 0x11, 168, 1, 1477 },
-{ 0x11, 169, 0, 1476 },
-{ 0x12, 159, 1, 1599 },
-{ 0x12, 160, 1, 1598 },
-{ 0x9, 162, 1, 1529 },
-{ 0x9, 163, 1, 1528 },
-{ 0x12, 165, 1, 1499 },
-{ 0x12, 166, 1, 1498 },
-{ 0x9, 168, 1, 1479 },
-{ 0x9, 169, 0, 1478 },
-{ 0xa, 159, 1, 1601 },
-{ 0xa, 160, 1, 1600 },
-{ 0x5, 162, 1, 1531 },
-{ 0x5, 163, 1, 1530 },
-{ 0xa, 165, 1, 1501 },
-{ 0xa, 166, 1, 1500 },
-{ 0x5, 168, 1, 1481 },
-{ 0x5, 169, 0, 1480 },
-{ 0x6, 159, 1, 1605 },
-{ 0x6, 160, 1, 1604 },
-{ 0x2, 160, 1, 1602 },
-{ 0x2, 161, 1, 1603 },
-{ 0x3, 162, 1, 1535 },
-{ 0x3, 163, 1, 1534 },
-{ 0x1, 163, 1, 1532 },
-{ 0x1, 164, 1, 1533 },
-{ 0x6, 165, 1, 1505 },
-{ 0x6, 166, 1, 1504 },
-{ 0x2, 166, 1, 1502 },
-{ 0x2, 167, 1, 1503 },
-{ 0x3, 168, 1, 1485 },
-{ 0x3, 169, 1, 1484 },
-{ 0x1, 169, 1, 1482 },
-{ 0x1, 170, 0, 1483 },
-{ 0x221, 159, 1, 1567 },
-{ 0x221, 160, 1, 1566 },
-{ 0x221, 165, 1, 1427 },
-{ 0x221, 166, 0, 1426 },
-{ 0x121, 159, 1, 1569 },
-{ 0x121, 160, 1, 1568 },
-{ 0x121, 165, 1, 1429 },
-{ 0x121, 166, 0, 1428 },
-{ 0xa1, 159, 1, 1571 },
-{ 0xa1, 160, 1, 1570 },
-{ 0xa1, 165, 1, 1431 },
-{ 0xa1, 166, 0, 1430 },
-{ 0x61, 159, 1, 1575 },
-{ 0x61, 160, 1, 1574 },
-{ 0x21, 160, 1, 1572 },
-{ 0x3, 161, 1, 1573 },
-{ 0x61, 165, 1, 1435 },
-{ 0x61, 166, 1, 1434 },
-{ 0x21, 166, 1, 1432 },
-{ 0x3, 167, 0, 1433 },
-{ 0x11, 159, 1, 1607 },
-{ 0x11, 160, 1, 1606 },
-{ 0x11, 165, 1, 1507 },
-{ 0x11, 166, 0, 1506 },
-{ 0x9, 159, 1, 1609 },
-{ 0x9, 160, 1, 1608 },
-{ 0x9, 165, 1, 1509 },
-{ 0x9, 166, 0, 1508 },
-{ 0x5, 159, 1, 1611 },
-{ 0x5, 160, 1, 1610 },
-{ 0x5, 165, 1, 1511 },
-{ 0x5, 166, 0, 1510 },
-{ 0x3, 159, 1, 1615 },
-{ 0x3, 160, 1, 1614 },
-{ 0x1, 160, 1, 1612 },
-{ 0x1, 161, 1, 1613 },
-{ 0x3, 165, 1, 1515 },
-{ 0x3, 166, 1, 1514 },
-{ 0x1, 166, 1, 1512 },
-{ 0x1, 167, 0, 1513 },
-{ 0x442, 205, 0, 1616 },
-{ 0x242, 205, 0, 1617 },
-{ 0x142, 205, 0, 1618 },
-{ 0xc2, 205, 1, 1620 },
-{ 0x6, 206, 1, 1619 },
-{ 0x1, 439, 0, 981 },
-{ 0x22, 205, 0, 1626 },
-{ 0x12, 205, 0, 1627 },
-{ 0xa, 205, 0, 1628 },
-{ 0x6, 205, 1, 1630 },
-{ 0x2, 206, 1, 1629 },
+{ 0x1, 230, 0, 1231 },
+{ 0x4, 452, 0, 1232 },
+{ 0x2, 452, 0, 1233 },
+{ 0x1, 452, 1, 1235 },
+{ 0x1, 453, 0, 1234 },
+{ 0x8, 454, 0, 1236 },
+{ 0x4, 454, 0, 1237 },
+{ 0x1, 454, 1, 1239 },
+{ 0x2, 454, 0, 1238 },
+{ 0x8, 219, 0, 1240 },
+{ 0x4, 219, 0, 1241 },
+{ 0x2, 219, 0, 1242 },
+{ 0x1, 219, 1, 1244 },
+{ 0x1, 220, 0, 1243 },
+{ 0x10, 221, 0, 1245 },
+{ 0x8, 221, 0, 1246 },
+{ 0x4, 221, 0, 1247 },
+{ 0x1, 221, 1, 1249 },
+{ 0x2, 221, 0, 1248 },
+{ 0x220, 191, 0, 1250 },
+{ 0x120, 191, 0, 1251 },
+{ 0xa0, 191, 0, 1252 },
+{ 0x60, 191, 1, 1254 },
+{ 0x4, 192, 0, 1253 },
+{ 0x110, 191, 0, 1260 },
+{ 0x90, 191, 0, 1261 },
+{ 0x50, 191, 0, 1262 },
+{ 0x30, 191, 1, 1264 },
+{ 0x2, 192, 0, 1263 },
+{ 0x8, 191, 0, 1265 },
+{ 0x4, 191, 0, 1266 },
+{ 0x2, 191, 0, 1267 },
+{ 0x1, 191, 1, 1269 },
+{ 0x1, 192, 0, 1268 },
+{ 0x440, 193, 0, 1255 },
+{ 0x240, 193, 0, 1256 },
+{ 0x140, 193, 0, 1257 },
+{ 0xc0, 193, 1, 1259 },
+{ 0x40, 193, 0, 1258 },
+{ 0x220, 193, 0, 1270 },
+{ 0x120, 193, 0, 1271 },
+{ 0xa0, 193, 0, 1272 },
+{ 0x60, 193, 1, 1274 },
+{ 0x20, 193, 0, 1273 },
+{ 0x10, 193, 0, 1275 },
+{ 0x8, 193, 0, 1276 },
+{ 0x4, 193, 0, 1277 },
+{ 0x1, 193, 1, 1279 },
+{ 0x2, 193, 0, 1278 },
+{ 0x8, 215, 0, 1280 },
+{ 0x4, 215, 0, 1281 },
+{ 0x2, 215, 0, 1282 },
+{ 0x1, 215, 1, 1284 },
+{ 0x1, 216, 0, 1283 },
+{ 0x220, 187, 0, 1285 },
+{ 0x120, 187, 0, 1286 },
+{ 0xa0, 187, 0, 1287 },
+{ 0x60, 187, 1, 1289 },
+{ 0x4, 188, 0, 1288 },
+{ 0x110, 187, 0, 1295 },
+{ 0x90, 187, 0, 1296 },
+{ 0x50, 187, 0, 1297 },
+{ 0x30, 187, 1, 1299 },
+{ 0x2, 188, 0, 1298 },
+{ 0x8, 187, 0, 1300 },
+{ 0x4, 187, 0, 1301 },
+{ 0x2, 187, 0, 1302 },
+{ 0x1, 187, 1, 1304 },
+{ 0x1, 188, 0, 1303 },
+{ 0x440, 233, 0, 1290 },
+{ 0x240, 233, 0, 1291 },
+{ 0x140, 233, 0, 1292 },
+{ 0xc0, 233, 1, 1294 },
+{ 0x40, 233, 0, 1293 },
+{ 0x220, 233, 0, 1305 },
+{ 0x120, 233, 0, 1306 },
+{ 0xa0, 233, 0, 1307 },
+{ 0x60, 233, 1, 1309 },
+{ 0x20, 233, 0, 1308 },
+{ 0x10, 233, 0, 1310 },
+{ 0x8, 233, 0, 1311 },
+{ 0x4, 233, 0, 1312 },
+{ 0x1, 233, 1, 1314 },
+{ 0x2, 233, 0, 1313 },
+{ 0x8, 207, 0, 1315 },
+{ 0x4, 207, 0, 1316 },
+{ 0x2, 207, 0, 1317 },
+{ 0x1, 207, 1, 1319 },
+{ 0x1, 208, 0, 1318 },
+{ 0x10, 214, 0, 1320 },
+{ 0x8, 214, 0, 1321 },
+{ 0x4, 214, 0, 1322 },
+{ 0x1, 214, 1, 1324 },
+{ 0x2, 214, 0, 1323 },
+{ 0x220, 178, 0, 1325 },
+{ 0x120, 178, 0, 1326 },
+{ 0xa0, 178, 0, 1327 },
+{ 0x60, 178, 1, 1329 },
+{ 0x4, 179, 0, 1328 },
+{ 0x110, 178, 0, 1350 },
+{ 0x90, 178, 0, 1351 },
+{ 0x50, 178, 0, 1352 },
+{ 0x30, 178, 1, 1354 },
+{ 0x2, 179, 0, 1353 },
+{ 0x8, 178, 0, 1355 },
+{ 0x4, 178, 0, 1356 },
+{ 0x2, 178, 0, 1357 },
+{ 0x1, 178, 1, 1359 },
+{ 0x1, 179, 0, 1358 },
+{ 0x440, 186, 0, 1330 },
+{ 0x240, 186, 0, 1331 },
+{ 0x140, 186, 0, 1332 },
+{ 0xc0, 186, 1, 1334 },
+{ 0x40, 186, 0, 1333 },
+{ 0x220, 186, 0, 1360 },
+{ 0x120, 186, 0, 1361 },
+{ 0xa0, 186, 0, 1362 },
+{ 0x60, 186, 1, 1364 },
+{ 0x20, 186, 0, 1363 },
+{ 0x10, 186, 0, 1365 },
+{ 0x8, 186, 0, 1366 },
+{ 0x4, 186, 0, 1367 },
+{ 0x1, 186, 1, 1369 },
+{ 0x2, 186, 0, 1368 },
+{ 0x440, 143, 0, 1335 },
+{ 0x240, 143, 0, 1336 },
+{ 0x140, 143, 0, 1337 },
+{ 0xc0, 143, 1, 1339 },
+{ 0x40, 143, 0, 1338 },
+{ 0x220, 143, 0, 1370 },
+{ 0x120, 143, 0, 1371 },
+{ 0xa0, 143, 0, 1372 },
+{ 0x60, 143, 1, 1374 },
+{ 0x20, 143, 0, 1373 },
+{ 0x10, 143, 0, 1375 },
+{ 0x8, 143, 0, 1376 },
+{ 0x1, 143, 1, 1379 },
+{ 0x2, 143, 0, 1378 },
+{ 0x440, 194, 1, 1345 },
+{ 0x441, 174, 0, 1340 },
+{ 0x240, 194, 1, 1346 },
+{ 0x241, 174, 0, 1341 },
+{ 0x140, 194, 1, 1347 },
+{ 0x141, 174, 0, 1342 },
+{ 0xc0, 194, 1, 1349 },
+{ 0x40, 194, 1, 1348 },
+{ 0xc1, 174, 1, 1344 },
+{ 0x41, 174, 0, 1343 },
+{ 0x220, 194, 1, 1390 },
+{ 0x221, 174, 0, 1380 },
+{ 0x120, 194, 1, 1391 },
+{ 0x121, 174, 0, 1381 },
+{ 0xa0, 194, 1, 1392 },
+{ 0xa1, 174, 0, 1382 },
+{ 0x60, 194, 1, 1394 },
+{ 0x20, 194, 1, 1393 },
+{ 0x61, 174, 1, 1384 },
+{ 0x21, 174, 0, 1383 },
+{ 0x10, 194, 1, 1395 },
+{ 0x11, 174, 0, 1385 },
+{ 0x8, 194, 1, 1396 },
+{ 0x9, 174, 0, 1386 },
+{ 0x4, 194, 1, 1397 },
+{ 0x5, 174, 0, 1387 },
+{ 0x1, 194, 1, 1399 },
+{ 0x2, 194, 1, 1398 },
+{ 0x3, 174, 1, 1389 },
+{ 0x1, 174, 0, 1388 },
+{ 0x1, 153, 1, 1407 },
+{ 0x1, 154, 1, 1406 },
+{ 0x1, 155, 1, 1405 },
+{ 0x1, 156, 0, 1404 },
+{ 0x3, 153, 1, 1403 },
+{ 0x3, 154, 1, 1402 },
+{ 0x3, 155, 1, 1401 },
+{ 0x3, 156, 0, 1400 },
+{ 0x1108, 159, 1, 1569 },
+{ 0x1108, 160, 1, 1568 },
+{ 0x1108, 165, 1, 1409 },
+{ 0x1108, 166, 0, 1408 },
+{ 0x908, 159, 1, 1571 },
+{ 0x908, 160, 1, 1570 },
+{ 0x908, 165, 1, 1411 },
+{ 0x908, 166, 0, 1410 },
+{ 0x508, 159, 1, 1573 },
+{ 0x508, 160, 1, 1572 },
+{ 0x508, 165, 1, 1413 },
+{ 0x508, 166, 0, 1412 },
+{ 0x308, 159, 1, 1577 },
+{ 0x308, 160, 1, 1576 },
+{ 0x108, 160, 1, 1574 },
+{ 0x18, 161, 1, 1575 },
+{ 0x308, 165, 1, 1417 },
+{ 0x308, 166, 1, 1416 },
+{ 0x108, 166, 1, 1414 },
+{ 0x18, 167, 0, 1415 },
+{ 0x88, 159, 1, 1609 },
+{ 0x88, 160, 1, 1608 },
+{ 0x88, 165, 1, 1489 },
+{ 0x88, 166, 0, 1488 },
+{ 0x48, 159, 1, 1611 },
+{ 0x48, 160, 1, 1610 },
+{ 0x48, 165, 1, 1491 },
+{ 0x48, 166, 0, 1490 },
+{ 0x28, 159, 1, 1613 },
+{ 0x28, 160, 1, 1612 },
+{ 0x28, 165, 1, 1493 },
+{ 0x28, 166, 0, 1492 },
+{ 0x18, 159, 1, 1617 },
+{ 0x18, 160, 1, 1616 },
+{ 0x8, 160, 1, 1614 },
+{ 0x8, 161, 1, 1615 },
+{ 0x18, 165, 1, 1497 },
+{ 0x18, 166, 1, 1496 },
+{ 0x8, 166, 1, 1494 },
+{ 0x8, 167, 0, 1495 },
+{ 0x884, 159, 1, 1579 },
+{ 0x884, 160, 1, 1578 },
+{ 0x442, 162, 1, 1469 },
+{ 0x442, 163, 1, 1468 },
+{ 0x884, 165, 1, 1439 },
+{ 0x884, 166, 1, 1438 },
+{ 0x442, 168, 1, 1419 },
+{ 0x442, 169, 0, 1418 },
+{ 0x484, 159, 1, 1581 },
+{ 0x484, 160, 1, 1580 },
+{ 0x242, 162, 1, 1471 },
+{ 0x242, 163, 1, 1470 },
+{ 0x484, 165, 1, 1441 },
+{ 0x484, 166, 1, 1440 },
+{ 0x242, 168, 1, 1421 },
+{ 0x242, 169, 0, 1420 },
+{ 0x284, 159, 1, 1583 },
+{ 0x284, 160, 1, 1582 },
+{ 0x142, 162, 1, 1473 },
+{ 0x142, 163, 1, 1472 },
+{ 0x284, 165, 1, 1443 },
+{ 0x284, 166, 1, 1442 },
+{ 0x142, 168, 1, 1423 },
+{ 0x142, 169, 0, 1422 },
+{ 0x184, 159, 1, 1587 },
+{ 0x184, 160, 1, 1586 },
+{ 0x84, 160, 1, 1584 },
+{ 0xc, 161, 1, 1585 },
+{ 0xc2, 162, 1, 1477 },
+{ 0xc2, 163, 1, 1476 },
+{ 0x42, 163, 1, 1474 },
+{ 0x6, 164, 1, 1475 },
+{ 0x184, 165, 1, 1447 },
+{ 0x184, 166, 1, 1446 },
+{ 0x84, 166, 1, 1444 },
+{ 0xc, 167, 1, 1445 },
+{ 0xc2, 168, 1, 1427 },
+{ 0xc2, 169, 1, 1426 },
+{ 0x42, 169, 1, 1424 },
+{ 0x6, 170, 0, 1425 },
+{ 0x44, 159, 1, 1619 },
+{ 0x44, 160, 1, 1618 },
+{ 0x22, 162, 1, 1549 },
+{ 0x22, 163, 1, 1548 },
+{ 0x44, 165, 1, 1519 },
+{ 0x44, 166, 1, 1518 },
+{ 0x22, 168, 1, 1499 },
+{ 0x22, 169, 0, 1498 },
+{ 0x24, 159, 1, 1621 },
+{ 0x24, 160, 1, 1620 },
+{ 0x12, 162, 1, 1551 },
+{ 0x12, 163, 1, 1550 },
+{ 0x24, 165, 1, 1521 },
+{ 0x24, 166, 1, 1520 },
+{ 0x12, 168, 1, 1501 },
+{ 0x12, 169, 0, 1500 },
+{ 0x14, 159, 1, 1623 },
+{ 0x14, 160, 1, 1622 },
+{ 0xa, 162, 1, 1553 },
+{ 0xa, 163, 1, 1552 },
+{ 0x14, 165, 1, 1523 },
+{ 0x14, 166, 1, 1522 },
+{ 0xa, 168, 1, 1503 },
+{ 0xa, 169, 0, 1502 },
+{ 0xc, 159, 1, 1627 },
+{ 0xc, 160, 1, 1626 },
+{ 0x4, 160, 1, 1624 },
+{ 0x4, 161, 1, 1625 },
+{ 0x6, 162, 1, 1557 },
+{ 0x6, 163, 1, 1556 },
+{ 0x2, 163, 1, 1554 },
+{ 0x2, 164, 1, 1555 },
+{ 0xc, 165, 1, 1527 },
+{ 0xc, 166, 1, 1526 },
+{ 0x4, 166, 1, 1524 },
+{ 0x4, 167, 1, 1525 },
+{ 0x6, 168, 1, 1507 },
+{ 0x6, 169, 1, 1506 },
+{ 0x2, 169, 1, 1504 },
+{ 0x2, 170, 0, 1505 },
+{ 0x442, 159, 1, 1589 },
+{ 0x442, 160, 1, 1588 },
+{ 0x221, 162, 1, 1479 },
+{ 0x221, 163, 1, 1478 },
+{ 0x442, 165, 1, 1449 },
+{ 0x442, 166, 1, 1448 },
+{ 0x221, 168, 1, 1429 },
+{ 0x221, 169, 0, 1428 },
+{ 0x242, 159, 1, 1591 },
+{ 0x242, 160, 1, 1590 },
+{ 0x121, 162, 1, 1481 },
+{ 0x121, 163, 1, 1480 },
+{ 0x242, 165, 1, 1451 },
+{ 0x242, 166, 1, 1450 },
+{ 0x121, 168, 1, 1431 },
+{ 0x121, 169, 0, 1430 },
+{ 0x142, 159, 1, 1593 },
+{ 0x142, 160, 1, 1592 },
+{ 0xa1, 162, 1, 1483 },
+{ 0xa1, 163, 1, 1482 },
+{ 0x142, 165, 1, 1453 },
+{ 0x142, 166, 1, 1452 },
+{ 0xa1, 168, 1, 1433 },
+{ 0xa1, 169, 0, 1432 },
+{ 0xc2, 159, 1, 1597 },
+{ 0xc2, 160, 1, 1596 },
+{ 0x42, 160, 1, 1594 },
+{ 0x6, 161, 1, 1595 },
+{ 0x61, 162, 1, 1487 },
+{ 0x61, 163, 1, 1486 },
+{ 0x21, 163, 1, 1484 },
+{ 0x3, 164, 1, 1485 },
+{ 0xc2, 165, 1, 1457 },
+{ 0xc2, 166, 1, 1456 },
+{ 0x42, 166, 1, 1454 },
+{ 0x6, 167, 1, 1455 },
+{ 0x61, 168, 1, 1437 },
+{ 0x61, 169, 1, 1436 },
+{ 0x21, 169, 1, 1434 },
+{ 0x3, 170, 0, 1435 },
+{ 0x22, 159, 1, 1629 },
+{ 0x22, 160, 1, 1628 },
+{ 0x11, 162, 1, 1559 },
+{ 0x11, 163, 1, 1558 },
+{ 0x22, 165, 1, 1529 },
+{ 0x22, 166, 1, 1528 },
+{ 0x11, 168, 1, 1509 },
+{ 0x11, 169, 0, 1508 },
+{ 0x12, 159, 1, 1631 },
+{ 0x12, 160, 1, 1630 },
+{ 0x9, 162, 1, 1561 },
+{ 0x9, 163, 1, 1560 },
+{ 0x12, 165, 1, 1531 },
+{ 0x12, 166, 1, 1530 },
+{ 0x9, 168, 1, 1511 },
+{ 0x9, 169, 0, 1510 },
+{ 0xa, 159, 1, 1633 },
+{ 0xa, 160, 1, 1632 },
+{ 0x5, 162, 1, 1563 },
+{ 0x5, 163, 1, 1562 },
+{ 0xa, 165, 1, 1533 },
+{ 0xa, 166, 1, 1532 },
+{ 0x5, 168, 1, 1513 },
+{ 0x5, 169, 0, 1512 },
+{ 0x6, 159, 1, 1637 },
+{ 0x6, 160, 1, 1636 },
+{ 0x2, 160, 1, 1634 },
+{ 0x2, 161, 1, 1635 },
+{ 0x3, 162, 1, 1567 },
+{ 0x3, 163, 1, 1566 },
+{ 0x1, 163, 1, 1564 },
+{ 0x1, 164, 1, 1565 },
+{ 0x6, 165, 1, 1537 },
+{ 0x6, 166, 1, 1536 },
+{ 0x2, 166, 1, 1534 },
+{ 0x2, 167, 1, 1535 },
+{ 0x3, 168, 1, 1517 },
+{ 0x3, 169, 1, 1516 },
+{ 0x1, 169, 1, 1514 },
+{ 0x1, 170, 0, 1515 },
+{ 0x221, 159, 1, 1599 },
+{ 0x221, 160, 1, 1598 },
+{ 0x221, 165, 1, 1459 },
+{ 0x221, 166, 0, 1458 },
+{ 0x121, 159, 1, 1601 },
+{ 0x121, 160, 1, 1600 },
+{ 0x121, 165, 1, 1461 },
+{ 0x121, 166, 0, 1460 },
+{ 0xa1, 159, 1, 1603 },
+{ 0xa1, 160, 1, 1602 },
+{ 0xa1, 165, 1, 1463 },
+{ 0xa1, 166, 0, 1462 },
+{ 0x61, 159, 1, 1607 },
+{ 0x61, 160, 1, 1606 },
+{ 0x21, 160, 1, 1604 },
+{ 0x3, 161, 1, 1605 },
+{ 0x61, 165, 1, 1467 },
+{ 0x61, 166, 1, 1466 },
+{ 0x21, 166, 1, 1464 },
+{ 0x3, 167, 0, 1465 },
+{ 0x11, 159, 1, 1639 },
+{ 0x11, 160, 1, 1638 },
+{ 0x11, 165, 1, 1539 },
+{ 0x11, 166, 0, 1538 },
+{ 0x9, 159, 1, 1641 },
+{ 0x9, 160, 1, 1640 },
+{ 0x9, 165, 1, 1541 },
+{ 0x9, 166, 0, 1540 },
+{ 0x5, 159, 1, 1643 },
+{ 0x5, 160, 1, 1642 },
+{ 0x5, 165, 1, 1543 },
+{ 0x5, 166, 0, 1542 },
+{ 0x3, 159, 1, 1647 },
+{ 0x3, 160, 1, 1646 },
+{ 0x1, 160, 1, 1644 },
+{ 0x1, 161, 1, 1645 },
+{ 0x3, 165, 1, 1547 },
+{ 0x3, 166, 1, 1546 },
+{ 0x1, 166, 1, 1544 },
+{ 0x1, 167, 0, 1545 },
+{ 0x442, 205, 0, 1648 },
+{ 0x242, 205, 0, 1649 },
+{ 0x142, 205, 0, 1650 },
+{ 0xc2, 205, 1, 1652 },
+{ 0x6, 206, 1, 1651 },
+{ 0x1, 443, 0, 981 },
+{ 0x22, 205, 0, 1658 },
+{ 0x12, 205, 0, 1659 },
+{ 0xa, 205, 0, 1660 },
+{ 0x6, 205, 1, 1662 },
+{ 0x2, 206, 1, 1661 },
{ 0x2, 367, 0, 1010 },
-{ 0x221, 205, 0, 1621 },
-{ 0x121, 205, 0, 1622 },
-{ 0xa1, 205, 0, 1623 },
-{ 0x61, 205, 1, 1625 },
-{ 0x3, 206, 1, 1624 },
-{ 0x1, 433, 0, 982 },
-{ 0x11, 205, 0, 1631 },
-{ 0x9, 205, 0, 1632 },
-{ 0x5, 205, 0, 1633 },
-{ 0x3, 205, 1, 1635 },
-{ 0x1, 206, 1, 1634 },
+{ 0x221, 205, 0, 1653 },
+{ 0x121, 205, 0, 1654 },
+{ 0xa1, 205, 0, 1655 },
+{ 0x61, 205, 1, 1657 },
+{ 0x3, 206, 1, 1656 },
+{ 0x1, 437, 0, 982 },
+{ 0x11, 205, 0, 1663 },
+{ 0x9, 205, 0, 1664 },
+{ 0x5, 205, 0, 1665 },
+{ 0x3, 205, 1, 1667 },
+{ 0x1, 206, 1, 1666 },
{ 0x1, 367, 0, 1011 },
-{ 0x4, 211, 0, 1636 },
-{ 0x1, 211, 0, 1638 },
-{ 0x1, 218, 0, 1639 },
-{ 0x1, 217, 1, 1640 },
-{ 0x2, 211, 0, 1637 },
-{ 0x1, 196, 0, 1641 },
-{ 0x880, 202, 0, 1642 },
-{ 0x480, 202, 0, 1643 },
-{ 0x280, 202, 0, 1644 },
-{ 0x180, 202, 1, 1646 },
-{ 0x80, 203, 0, 1645 },
-{ 0x440, 202, 1, 1657 },
-{ 0x88, 204, 0, 1647 },
-{ 0x240, 202, 1, 1658 },
-{ 0x48, 204, 0, 1648 },
-{ 0x140, 202, 1, 1659 },
-{ 0x28, 204, 0, 1649 },
-{ 0xc0, 202, 1, 1661 },
-{ 0x40, 203, 1, 1660 },
-{ 0x18, 204, 1, 1651 },
-{ 0x8, 204, 0, 1650 },
-{ 0x220, 202, 1, 1662 },
-{ 0x44, 204, 0, 1652 },
-{ 0x120, 202, 1, 1663 },
-{ 0x24, 204, 0, 1653 },
-{ 0xa0, 202, 1, 1664 },
-{ 0x14, 204, 0, 1654 },
-{ 0x60, 202, 1, 1666 },
-{ 0x20, 203, 1, 1665 },
-{ 0xc, 204, 1, 1656 },
-{ 0x4, 204, 0, 1655 },
-{ 0x110, 202, 0, 1667 },
-{ 0x90, 202, 0, 1668 },
-{ 0x50, 202, 0, 1669 },
-{ 0x30, 202, 1, 1671 },
-{ 0x10, 203, 1, 1670 },
+{ 0x4, 211, 0, 1668 },
+{ 0x1, 211, 0, 1670 },
+{ 0x1, 218, 0, 1671 },
+{ 0x1, 217, 1, 1672 },
+{ 0x2, 211, 0, 1669 },
+{ 0x1, 196, 0, 1673 },
+{ 0x880, 202, 0, 1674 },
+{ 0x480, 202, 0, 1675 },
+{ 0x280, 202, 0, 1676 },
+{ 0x180, 202, 1, 1678 },
+{ 0x80, 203, 0, 1677 },
+{ 0x440, 202, 1, 1689 },
+{ 0x88, 204, 0, 1679 },
+{ 0x240, 202, 1, 1690 },
+{ 0x48, 204, 0, 1680 },
+{ 0x140, 202, 1, 1691 },
+{ 0x28, 204, 0, 1681 },
+{ 0xc0, 202, 1, 1693 },
+{ 0x40, 203, 1, 1692 },
+{ 0x18, 204, 1, 1683 },
+{ 0x8, 204, 0, 1682 },
+{ 0x220, 202, 1, 1694 },
+{ 0x44, 204, 0, 1684 },
+{ 0x120, 202, 1, 1695 },
+{ 0x24, 204, 0, 1685 },
+{ 0xa0, 202, 1, 1696 },
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{ 0x1, 385, 0, 974 },
-{ 0x88, 202, 0, 1672 },
-{ 0x48, 202, 0, 1673 },
-{ 0x28, 202, 0, 1674 },
-{ 0x18, 202, 1, 1676 },
-{ 0x8, 203, 1, 1675 },
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+{ 0x28, 202, 0, 1706 },
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{ 0xc, 368, 0, 1007 },
-{ 0x44, 202, 1, 1687 },
-{ 0x22, 204, 0, 1677 },
-{ 0x24, 202, 1, 1688 },
-{ 0x12, 204, 0, 1678 },
-{ 0x14, 202, 1, 1689 },
-{ 0xa, 204, 0, 1679 },
-{ 0xc, 202, 1, 1691 },
-{ 0x4, 203, 1, 1690 },
-{ 0x6, 204, 1, 1681 },
-{ 0x2, 204, 1, 1680 },
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+{ 0x4, 203, 1, 1722 },
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{ 0x6, 368, 0, 1008 },
-{ 0x22, 202, 1, 1692 },
-{ 0x11, 204, 0, 1682 },
-{ 0x12, 202, 1, 1693 },
-{ 0x9, 204, 0, 1683 },
-{ 0xa, 202, 1, 1694 },
-{ 0x5, 204, 0, 1684 },
-{ 0x6, 202, 1, 1696 },
-{ 0x2, 203, 1, 1695 },
-{ 0x3, 204, 1, 1686 },
-{ 0x1, 204, 1, 1685 },
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{ 0x3, 368, 0, 1009 },
-{ 0x11, 202, 0, 1697 },
-{ 0x9, 202, 0, 1698 },
-{ 0x5, 202, 0, 1699 },
-{ 0x3, 202, 1, 1701 },
-{ 0x1, 203, 0, 1700 },
-{ 0x8, 198, 0, 1702 },
-{ 0x4, 198, 0, 1703 },
-{ 0x2, 198, 0, 1704 },
-{ 0x1, 198, 1, 1706 },
-{ 0x1, 199, 1, 1705 },
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{ 0x1, 332, 0, 988 },
-{ 0x8, 200, 0, 1707 },
-{ 0x4, 200, 0, 1708 },
-{ 0x2, 200, 0, 1709 },
-{ 0x1, 200, 1, 1711 },
-{ 0x1, 201, 1, 1710 },
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{ 0x1, 331, 0, 989 },
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-{ 0x4, 209, 0, 1713 },
-{ 0x2, 209, 0, 1714 },
-{ 0x1, 209, 1, 1716 },
-{ 0x1, 210, 1, 1715 },
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{ 0x1, 330, 0, 990 },
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-{ 0x4, 212, 0, 1718 },
-{ 0x2, 212, 0, 1719 },
-{ 0x1, 212, 1, 1721 },
-{ 0x1, 213, 1, 1720 },
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+{ 0x1, 213, 1, 1752 },
{ 0x1, 329, 0, 991 },
-{ 0x8, 224, 0, 1722 },
-{ 0x4, 224, 0, 1723 },
-{ 0x2, 224, 0, 1724 },
-{ 0x1, 224, 1, 1726 },
-{ 0x1, 225, 0, 1725 },
-{ 0x8, 222, 0, 1727 },
-{ 0x4, 222, 0, 1728 },
-{ 0x2, 222, 0, 1729 },
-{ 0x1, 222, 1, 1731 },
-{ 0x1, 223, 0, 1730 },
-{ 0x1, 240, 0, 1732 },
-{ 0x1, 340, 0, 1733 },
-{ 0x1, 33, 0, 1734 },
-{ 0x8, 151, 0, 1735 },
-{ 0x4, 151, 0, 1736 },
-{ 0x2, 151, 0, 1737 },
-{ 0x1, 151, 1, 1739 },
-{ 0x1, 152, 0, 1738 },
-{ 0x8, 157, 0, 1740 },
-{ 0x4, 157, 0, 1741 },
-{ 0x2, 157, 0, 1742 },
-{ 0x1, 157, 1, 1744 },
-{ 0x1, 158, 0, 1743 },
-{ 0x8, 231, 0, 1745 },
-{ 0x4, 231, 0, 1746 },
-{ 0x2, 231, 0, 1747 },
-{ 0x1, 231, 1, 1749 },
-{ 0x1, 232, 0, 1748 },
-{ 0x1, 173, 0, 1750 },
-{ 0x442, 171, 0, 1751 },
-{ 0x242, 171, 0, 1752 },
-{ 0x142, 171, 0, 1753 },
-{ 0xc2, 171, 1, 1755 },
-{ 0x6, 172, 0, 1754 },
-{ 0x22, 171, 0, 1761 },
-{ 0x12, 171, 0, 1762 },
-{ 0xa, 171, 0, 1763 },
-{ 0x6, 171, 1, 1765 },
-{ 0x2, 172, 1, 1764 },
-{ 0x1, 135, 0, 1165 },
-{ 0x221, 171, 0, 1756 },
-{ 0x121, 171, 0, 1757 },
-{ 0xa1, 171, 0, 1758 },
-{ 0x61, 171, 1, 1760 },
-{ 0x3, 172, 0, 1759 },
-{ 0x11, 171, 0, 1766 },
-{ 0x9, 171, 0, 1767 },
-{ 0x5, 171, 0, 1768 },
-{ 0x3, 171, 1, 1770 },
-{ 0x1, 172, 1, 1769 },
-{ 0x1, 134, 0, 1166 },
-{ 0x1, 237, 0, 1771 },
-{ 0x1, 195, 0, 1772 },
-{ 0x1, 149, 0, 1773 },
-{ 0x1, 148, 0, 1774 },
-{ 0x4, 234, 0, 1775 },
-{ 0x2, 234, 0, 1776 },
-{ 0x1, 234, 0, 1777 },
-{ 0x1, 197, 0, 1778 },
-{ 0x2, 235, 0, 1779 },
-{ 0x1, 235, 0, 1780 },
-{ 0x4, 185, 0, 1781 },
-{ 0x2, 185, 0, 1782 },
-{ 0x1, 185, 0, 1783 },
-{ 0x4, 182, 0, 1784 },
-{ 0x1, 190, 0, 1787 },
-{ 0x1, 189, 1, 1788 },
-{ 0x2, 182, 0, 1785 },
-{ 0x1, 142, 0, 1789 },
-{ 0x1, 297, 1, 1790 },
-{ 0x1, 182, 0, 1786 },
-{ 0x8, 144, 0, 1791 },
-{ 0x4, 144, 0, 1792 },
-{ 0x2, 144, 0, 1793 },
-{ 0x1, 144, 1, 1795 },
-{ 0x1, 145, 0, 1794 },
-{ 0x8, 146, 0, 1796 },
-{ 0x4, 146, 0, 1797 },
-{ 0x2, 146, 0, 1798 },
-{ 0x1, 146, 1, 1800 },
-{ 0x1, 147, 1, 1799 },
-{ 0x1, 426, 0, 1167 },
-{ 0x8, 180, 0, 1801 },
-{ 0x4, 180, 0, 1802 },
-{ 0x2, 180, 0, 1803 },
-{ 0x1, 180, 1, 1805 },
-{ 0x1, 181, 1, 1804 },
-{ 0x1, 425, 0, 1168 },
-{ 0x8, 183, 0, 1806 },
-{ 0x4, 183, 0, 1807 },
-{ 0x2, 183, 0, 1808 },
-{ 0x1, 183, 1, 1810 },
-{ 0x1, 184, 1, 1809 },
-{ 0x1, 424, 0, 1169 },
-{ 0x8, 228, 0, 1811 },
-{ 0x4, 228, 0, 1812 },
-{ 0x2, 228, 0, 1813 },
-{ 0x1, 228, 1, 1815 },
-{ 0x1, 229, 0, 1814 },
-{ 0x8, 226, 0, 1816 },
-{ 0x4, 226, 0, 1817 },
-{ 0x2, 226, 0, 1818 },
-{ 0x1, 226, 1, 1820 },
-{ 0x1, 227, 0, 1819 },
-{ 0x8, 44, 0, 1825 },
-{ 0x18, 44, 0, 1821 },
-{ 0x4, 44, 0, 1826 },
-{ 0xc, 44, 0, 1822 },
-{ 0x2, 44, 0, 1827 },
-{ 0x6, 44, 0, 1823 },
-{ 0x1, 44, 0, 1828 },
-{ 0x3, 44, 0, 1824 },
-{ 0x51, 30, 0, 1830 },
-{ 0xd1, 30, 0, 1829 },
-{ 0x31, 30, 1, 1840 },
-{ 0x11, 31, 0, 1839 },
-{ 0x71, 30, 1, 1838 },
-{ 0x31, 31, 0, 1837 },
-{ 0x29, 30, 0, 1832 },
-{ 0x69, 30, 0, 1831 },
-{ 0x19, 30, 1, 1844 },
-{ 0x9, 31, 0, 1843 },
-{ 0x39, 30, 1, 1842 },
-{ 0x19, 31, 0, 1841 },
-{ 0x15, 30, 0, 1834 },
-{ 0x35, 30, 0, 1833 },
-{ 0xd, 30, 1, 1848 },
-{ 0x5, 31, 0, 1847 },
-{ 0x1d, 30, 1, 1846 },
-{ 0xd, 31, 0, 1845 },
-{ 0xb, 30, 0, 1836 },
-{ 0x1b, 30, 0, 1835 },
-{ 0x7, 30, 1, 1852 },
-{ 0x3, 31, 0, 1851 },
-{ 0xf, 30, 1, 1850 },
-{ 0x7, 31, 0, 1849 },
-{ 0xa2, 28, 0, 1854 },
-{ 0x1a2, 28, 0, 1853 },
-{ 0x62, 28, 1, 1864 },
-{ 0x22, 29, 0, 1863 },
-{ 0xe2, 28, 1, 1862 },
-{ 0x62, 29, 0, 1861 },
-{ 0x52, 28, 0, 1856 },
-{ 0xd2, 28, 0, 1855 },
-{ 0x32, 28, 1, 1868 },
-{ 0x12, 29, 0, 1867 },
-{ 0x72, 28, 1, 1866 },
-{ 0x32, 29, 0, 1865 },
-{ 0x2a, 28, 0, 1858 },
-{ 0x6a, 28, 0, 1857 },
-{ 0x1a, 28, 1, 1872 },
-{ 0xa, 29, 0, 1871 },
-{ 0x3a, 28, 1, 1870 },
-{ 0x1a, 29, 0, 1869 },
-{ 0x16, 28, 0, 1860 },
-{ 0x36, 28, 0, 1859 },
-{ 0xe, 28, 1, 1876 },
-{ 0x6, 29, 0, 1875 },
-{ 0x1e, 28, 1, 1874 },
-{ 0xe, 29, 0, 1873 },
-{ 0x51, 28, 0, 1878 },
-{ 0xd1, 28, 0, 1877 },
-{ 0x31, 28, 1, 1888 },
-{ 0x11, 29, 0, 1887 },
-{ 0x71, 28, 1, 1886 },
-{ 0x31, 29, 0, 1885 },
-{ 0x29, 28, 0, 1880 },
-{ 0x69, 28, 0, 1879 },
-{ 0x19, 28, 1, 1892 },
-{ 0x9, 29, 0, 1891 },
-{ 0x39, 28, 1, 1890 },
-{ 0x19, 29, 0, 1889 },
-{ 0x15, 28, 0, 1882 },
-{ 0x35, 28, 0, 1881 },
-{ 0xd, 28, 1, 1896 },
-{ 0x5, 29, 0, 1895 },
-{ 0x1d, 28, 1, 1894 },
-{ 0xd, 29, 0, 1893 },
-{ 0xb, 28, 0, 1884 },
-{ 0x1b, 28, 0, 1883 },
-{ 0x7, 28, 1, 1900 },
-{ 0x3, 29, 0, 1899 },
-{ 0xf, 28, 1, 1898 },
-{ 0x7, 29, 0, 1897 },
-{ 0x51, 26, 0, 1902 },
-{ 0xd1, 26, 0, 1901 },
-{ 0x31, 26, 1, 1912 },
-{ 0x11, 27, 0, 1911 },
-{ 0x71, 26, 1, 1910 },
-{ 0x31, 27, 0, 1909 },
-{ 0x29, 26, 0, 1904 },
-{ 0x69, 26, 0, 1903 },
-{ 0x19, 26, 1, 1916 },
-{ 0x9, 27, 0, 1915 },
-{ 0x39, 26, 1, 1914 },
-{ 0x19, 27, 0, 1913 },
-{ 0x15, 26, 0, 1906 },
-{ 0x35, 26, 0, 1905 },
-{ 0xd, 26, 1, 1920 },
-{ 0x5, 27, 0, 1919 },
-{ 0x1d, 26, 1, 1918 },
-{ 0xd, 27, 0, 1917 },
-{ 0xb, 26, 0, 1908 },
-{ 0x1b, 26, 0, 1907 },
-{ 0x7, 26, 1, 1924 },
-{ 0x3, 27, 0, 1923 },
-{ 0xf, 26, 1, 1922 },
-{ 0x7, 27, 0, 1921 },
-{ 0xa2, 24, 0, 1926 },
-{ 0x1a2, 24, 0, 1925 },
-{ 0x62, 24, 1, 1936 },
-{ 0x22, 25, 0, 1935 },
-{ 0xe2, 24, 1, 1934 },
-{ 0x62, 25, 0, 1933 },
-{ 0x52, 24, 0, 1928 },
-{ 0xd2, 24, 0, 1927 },
-{ 0x32, 24, 1, 1940 },
-{ 0x12, 25, 0, 1939 },
-{ 0x72, 24, 1, 1938 },
-{ 0x32, 25, 0, 1937 },
-{ 0x2a, 24, 0, 1930 },
-{ 0x6a, 24, 0, 1929 },
-{ 0x1a, 24, 1, 1944 },
-{ 0xa, 25, 0, 1943 },
-{ 0x3a, 24, 1, 1942 },
-{ 0x1a, 25, 0, 1941 },
-{ 0x16, 24, 0, 1932 },
-{ 0x36, 24, 0, 1931 },
-{ 0xe, 24, 1, 1948 },
-{ 0x6, 25, 0, 1947 },
-{ 0x1e, 24, 1, 1946 },
-{ 0xe, 25, 0, 1945 },
-{ 0x51, 24, 0, 1950 },
-{ 0xd1, 24, 0, 1949 },
-{ 0x31, 24, 1, 1960 },
-{ 0x11, 25, 0, 1959 },
-{ 0x71, 24, 1, 1958 },
-{ 0x31, 25, 0, 1957 },
-{ 0x29, 24, 0, 1952 },
-{ 0x69, 24, 0, 1951 },
-{ 0x19, 24, 1, 1964 },
-{ 0x9, 25, 0, 1963 },
-{ 0x39, 24, 1, 1962 },
-{ 0x19, 25, 0, 1961 },
-{ 0x15, 24, 0, 1954 },
-{ 0x35, 24, 0, 1953 },
-{ 0xd, 24, 1, 1968 },
-{ 0x5, 25, 0, 1967 },
-{ 0x1d, 24, 1, 1966 },
-{ 0xd, 25, 0, 1965 },
-{ 0xb, 24, 0, 1956 },
-{ 0x1b, 24, 0, 1955 },
-{ 0x7, 24, 1, 1972 },
-{ 0x3, 25, 0, 1971 },
-{ 0xf, 24, 1, 1970 },
-{ 0x7, 25, 0, 1969 },
-{ 0x51, 22, 1, 1998 },
-{ 0x50, 22, 0, 1974 },
-{ 0xd1, 22, 1, 1997 },
-{ 0xd0, 22, 0, 1973 },
-{ 0x31, 22, 1, 2008 },
-{ 0x30, 22, 1, 1984 },
-{ 0x11, 23, 1, 2007 },
-{ 0x10, 23, 0, 1983 },
-{ 0x71, 22, 1, 2006 },
-{ 0x70, 22, 1, 1982 },
-{ 0x31, 23, 1, 2005 },
-{ 0x30, 23, 0, 1981 },
-{ 0x29, 22, 1, 2000 },
-{ 0x28, 22, 0, 1976 },
-{ 0x69, 22, 1, 1999 },
-{ 0x68, 22, 0, 1975 },
-{ 0x19, 22, 1, 2012 },
-{ 0x18, 22, 1, 1988 },
-{ 0x9, 23, 1, 2011 },
-{ 0x8, 23, 0, 1987 },
-{ 0x39, 22, 1, 2010 },
-{ 0x38, 22, 1, 1986 },
-{ 0x19, 23, 1, 2009 },
-{ 0x18, 23, 0, 1985 },
-{ 0x15, 22, 1, 2002 },
-{ 0x14, 22, 0, 1978 },
-{ 0x35, 22, 1, 2001 },
-{ 0x34, 22, 0, 1977 },
-{ 0xd, 22, 1, 2016 },
-{ 0xc, 22, 1, 1992 },
-{ 0x5, 23, 1, 2015 },
-{ 0x4, 23, 0, 1991 },
-{ 0x1d, 22, 1, 2014 },
-{ 0x1c, 22, 1, 1990 },
-{ 0xd, 23, 1, 2013 },
-{ 0xc, 23, 0, 1989 },
-{ 0xb, 22, 1, 2004 },
-{ 0xa, 22, 0, 1980 },
-{ 0x1b, 22, 1, 2003 },
-{ 0x1a, 22, 0, 1979 },
-{ 0x7, 22, 1, 2020 },
-{ 0x6, 22, 1, 1996 },
-{ 0x3, 23, 1, 2019 },
-{ 0x2, 23, 0, 1995 },
-{ 0xf, 22, 1, 2018 },
-{ 0xe, 22, 1, 1994 },
-{ 0x7, 23, 1, 2017 },
-{ 0x6, 23, 0, 1993 },
-{ 0x8, 21, 0, 2022 },
-{ 0x18, 21, 0, 2021 },
-{ 0x1, 21, 1, 2026 },
-{ 0x2, 21, 0, 2025 },
-{ 0x3, 21, 1, 2024 },
-{ 0x4, 21, 0, 2023 },
-{ 0x1, 239, 0, 2027 },
-{ 0x1, 339, 0, 2028 },
-{ 0x14, 43, 0, 2031 },
-{ 0x34, 43, 0, 2029 },
-{ 0xc, 43, 0, 2032 },
-{ 0x1c, 43, 0, 2030 },
-{ 0x2, 43, 0, 2035 },
-{ 0x6, 43, 0, 2033 },
-{ 0x1, 43, 0, 2036 },
-{ 0x3, 43, 0, 2034 },
-{ 0x51, 19, 0, 2038 },
-{ 0xd1, 19, 0, 2037 },
-{ 0x31, 19, 1, 2048 },
-{ 0x11, 20, 0, 2047 },
-{ 0x71, 19, 1, 2046 },
-{ 0x31, 20, 0, 2045 },
-{ 0x29, 19, 0, 2040 },
-{ 0x69, 19, 0, 2039 },
-{ 0x19, 19, 1, 2052 },
-{ 0x9, 20, 0, 2051 },
-{ 0x39, 19, 1, 2050 },
-{ 0x19, 20, 0, 2049 },
-{ 0x15, 19, 0, 2042 },
-{ 0x35, 19, 0, 2041 },
-{ 0xd, 19, 1, 2056 },
-{ 0x5, 20, 0, 2055 },
-{ 0x1d, 19, 1, 2054 },
-{ 0xd, 20, 0, 2053 },
-{ 0xb, 19, 0, 2044 },
-{ 0x1b, 19, 0, 2043 },
-{ 0x7, 19, 1, 2060 },
-{ 0x3, 20, 0, 2059 },
-{ 0xf, 19, 1, 2058 },
-{ 0x7, 20, 0, 2057 },
-{ 0x1, 32, 0, 2061 },
-{ 0x1, 140, 0, 2062 },
-{ 0x2, 45, 0, 2063 },
-{ 0x1, 45, 0, 2064 },
-{ 0x1, 387, 0, 2065 },
-{ 0x2, 52, 0, 2066 },
-{ 0x1, 52, 0, 2067 },
-{ 0x1, 133, 0, 2068 },
-{ 0x51, 17, 0, 2070 },
-{ 0xd1, 17, 0, 2069 },
-{ 0x31, 17, 1, 2080 },
-{ 0x11, 18, 0, 2079 },
-{ 0x71, 17, 1, 2078 },
-{ 0x31, 18, 0, 2077 },
-{ 0x29, 17, 0, 2072 },
-{ 0x69, 17, 0, 2071 },
-{ 0x19, 17, 1, 2084 },
-{ 0x9, 18, 0, 2083 },
-{ 0x39, 17, 1, 2082 },
-{ 0x19, 18, 0, 2081 },
-{ 0x15, 17, 0, 2074 },
-{ 0x35, 17, 0, 2073 },
-{ 0xd, 17, 1, 2088 },
-{ 0x5, 18, 0, 2087 },
-{ 0x1d, 17, 1, 2086 },
-{ 0xd, 18, 0, 2085 },
-{ 0xb, 17, 0, 2076 },
-{ 0x1b, 17, 0, 2075 },
-{ 0x7, 17, 1, 2092 },
-{ 0x3, 18, 0, 2091 },
-{ 0xf, 17, 1, 2090 },
-{ 0x7, 18, 0, 2089 },
-{ 0xa20, 15, 0, 2094 },
-{ 0x1a20, 15, 0, 2093 },
-{ 0x620, 15, 1, 2104 },
-{ 0x220, 16, 0, 2103 },
-{ 0xe20, 15, 1, 2102 },
-{ 0x620, 16, 0, 2101 },
-{ 0x520, 15, 0, 2096 },
-{ 0xd20, 15, 0, 2095 },
-{ 0x320, 15, 1, 2108 },
-{ 0x120, 16, 0, 2107 },
-{ 0x720, 15, 1, 2106 },
-{ 0x320, 16, 0, 2105 },
-{ 0x2a0, 15, 0, 2098 },
-{ 0x6a0, 15, 0, 2097 },
-{ 0x1a0, 15, 1, 2112 },
-{ 0xa0, 16, 0, 2111 },
-{ 0x3a0, 15, 1, 2110 },
-{ 0x1a0, 16, 0, 2109 },
-{ 0x160, 15, 0, 2100 },
-{ 0x360, 15, 0, 2099 },
-{ 0xe0, 15, 1, 2116 },
-{ 0x60, 16, 0, 2115 },
-{ 0x1e0, 15, 1, 2114 },
-{ 0xe0, 16, 0, 2113 },
-{ 0x51, 15, 1, 2142 },
-{ 0x50, 15, 0, 2118 },
-{ 0xd1, 15, 1, 2141 },
-{ 0xd0, 15, 0, 2117 },
-{ 0x31, 15, 1, 2152 },
-{ 0x30, 15, 1, 2128 },
-{ 0x11, 16, 1, 2151 },
-{ 0x10, 16, 0, 2127 },
-{ 0x71, 15, 1, 2150 },
-{ 0x70, 15, 1, 2126 },
-{ 0x31, 16, 1, 2149 },
-{ 0x30, 16, 0, 2125 },
-{ 0x29, 15, 1, 2144 },
-{ 0x28, 15, 0, 2120 },
-{ 0x69, 15, 1, 2143 },
-{ 0x68, 15, 0, 2119 },
-{ 0x19, 15, 1, 2156 },
-{ 0x18, 15, 1, 2132 },
-{ 0x9, 16, 1, 2155 },
-{ 0x8, 16, 0, 2131 },
-{ 0x39, 15, 1, 2154 },
-{ 0x38, 15, 1, 2130 },
-{ 0x19, 16, 1, 2153 },
-{ 0x18, 16, 0, 2129 },
-{ 0x15, 15, 1, 2146 },
-{ 0x14, 15, 0, 2122 },
-{ 0x35, 15, 1, 2145 },
-{ 0x34, 15, 0, 2121 },
-{ 0xd, 15, 1, 2160 },
-{ 0xc, 15, 1, 2136 },
-{ 0x5, 16, 1, 2159 },
-{ 0x4, 16, 0, 2135 },
-{ 0x1d, 15, 1, 2158 },
-{ 0x1c, 15, 1, 2134 },
-{ 0xd, 16, 1, 2157 },
-{ 0xc, 16, 0, 2133 },
-{ 0xb, 15, 1, 2148 },
-{ 0xa, 15, 0, 2124 },
-{ 0x1b, 15, 1, 2147 },
-{ 0x1a, 15, 0, 2123 },
-{ 0x7, 15, 1, 2164 },
-{ 0x6, 15, 1, 2140 },
-{ 0x3, 16, 1, 2163 },
-{ 0x2, 16, 0, 2139 },
-{ 0xf, 15, 1, 2162 },
-{ 0xe, 15, 1, 2138 },
-{ 0x7, 16, 1, 2161 },
-{ 0x6, 16, 0, 2137 },
-{ 0x8, 14, 0, 2166 },
-{ 0x18, 14, 0, 2165 },
-{ 0x1, 14, 1, 2170 },
-{ 0x2, 14, 0, 2169 },
-{ 0x3, 14, 1, 2168 },
-{ 0x4, 14, 0, 2167 },
-{ 0x1, 109, 1, 2322 },
-{ 0x1, 110, 1, 2321 },
-{ 0x1, 111, 1, 2320 },
-{ 0x1, 112, 1, 2319 },
-{ 0x1, 113, 1, 2318 },
-{ 0x1, 114, 1, 2317 },
-{ 0x1, 115, 1, 2316 },
-{ 0x1, 116, 1, 2315 },
+{ 0x8, 224, 0, 1754 },
+{ 0x4, 224, 0, 1755 },
+{ 0x2, 224, 0, 1756 },
+{ 0x1, 224, 1, 1758 },
+{ 0x1, 225, 0, 1757 },
+{ 0x8, 222, 0, 1759 },
+{ 0x4, 222, 0, 1760 },
+{ 0x2, 222, 0, 1761 },
+{ 0x1, 222, 1, 1763 },
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+{ 0x2, 146, 0, 1830 },
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+{ 0x4, 228, 0, 1844 },
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+{ 0x1, 228, 1, 1847 },
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+{ 0x4, 226, 0, 1849 },
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+{ 0x1, 227, 0, 1851 },
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+{ 0x4, 44, 0, 1858 },
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+{ 0x2, 44, 0, 1859 },
+{ 0x6, 44, 0, 1855 },
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+{ 0x3, 44, 0, 1856 },
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+{ 0xd1, 30, 0, 1861 },
+{ 0x31, 30, 1, 1872 },
+{ 0x11, 31, 0, 1871 },
+{ 0x71, 30, 1, 1870 },
+{ 0x31, 31, 0, 1869 },
+{ 0x29, 30, 0, 1864 },
+{ 0x69, 30, 0, 1863 },
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+{ 0x9, 31, 0, 1875 },
+{ 0x39, 30, 1, 1874 },
+{ 0x19, 31, 0, 1873 },
+{ 0x15, 30, 0, 1866 },
+{ 0x35, 30, 0, 1865 },
+{ 0xd, 30, 1, 1880 },
+{ 0x5, 31, 0, 1879 },
+{ 0x1d, 30, 1, 1878 },
+{ 0xd, 31, 0, 1877 },
+{ 0xb, 30, 0, 1868 },
+{ 0x1b, 30, 0, 1867 },
+{ 0x7, 30, 1, 1884 },
+{ 0x3, 31, 0, 1883 },
+{ 0xf, 30, 1, 1882 },
+{ 0x7, 31, 0, 1881 },
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+{ 0x1a2, 28, 0, 1885 },
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+{ 0x22, 29, 0, 1895 },
+{ 0xe2, 28, 1, 1894 },
+{ 0x62, 29, 0, 1893 },
+{ 0x52, 28, 0, 1888 },
+{ 0xd2, 28, 0, 1887 },
+{ 0x32, 28, 1, 1900 },
+{ 0x12, 29, 0, 1899 },
+{ 0x72, 28, 1, 1898 },
+{ 0x32, 29, 0, 1897 },
+{ 0x2a, 28, 0, 1890 },
+{ 0x6a, 28, 0, 1889 },
+{ 0x1a, 28, 1, 1904 },
+{ 0xa, 29, 0, 1903 },
+{ 0x3a, 28, 1, 1902 },
+{ 0x1a, 29, 0, 1901 },
+{ 0x16, 28, 0, 1892 },
+{ 0x36, 28, 0, 1891 },
+{ 0xe, 28, 1, 1908 },
+{ 0x6, 29, 0, 1907 },
+{ 0x1e, 28, 1, 1906 },
+{ 0xe, 29, 0, 1905 },
+{ 0x51, 28, 0, 1910 },
+{ 0xd1, 28, 0, 1909 },
+{ 0x31, 28, 1, 1920 },
+{ 0x11, 29, 0, 1919 },
+{ 0x71, 28, 1, 1918 },
+{ 0x31, 29, 0, 1917 },
+{ 0x29, 28, 0, 1912 },
+{ 0x69, 28, 0, 1911 },
+{ 0x19, 28, 1, 1924 },
+{ 0x9, 29, 0, 1923 },
+{ 0x39, 28, 1, 1922 },
+{ 0x19, 29, 0, 1921 },
+{ 0x15, 28, 0, 1914 },
+{ 0x35, 28, 0, 1913 },
+{ 0xd, 28, 1, 1928 },
+{ 0x5, 29, 0, 1927 },
+{ 0x1d, 28, 1, 1926 },
+{ 0xd, 29, 0, 1925 },
+{ 0xb, 28, 0, 1916 },
+{ 0x1b, 28, 0, 1915 },
+{ 0x7, 28, 1, 1932 },
+{ 0x3, 29, 0, 1931 },
+{ 0xf, 28, 1, 1930 },
+{ 0x7, 29, 0, 1929 },
+{ 0x51, 26, 0, 1934 },
+{ 0xd1, 26, 0, 1933 },
+{ 0x31, 26, 1, 1944 },
+{ 0x11, 27, 0, 1943 },
+{ 0x71, 26, 1, 1942 },
+{ 0x31, 27, 0, 1941 },
+{ 0x29, 26, 0, 1936 },
+{ 0x69, 26, 0, 1935 },
+{ 0x19, 26, 1, 1948 },
+{ 0x9, 27, 0, 1947 },
+{ 0x39, 26, 1, 1946 },
+{ 0x19, 27, 0, 1945 },
+{ 0x15, 26, 0, 1938 },
+{ 0x35, 26, 0, 1937 },
+{ 0xd, 26, 1, 1952 },
+{ 0x5, 27, 0, 1951 },
+{ 0x1d, 26, 1, 1950 },
+{ 0xd, 27, 0, 1949 },
+{ 0xb, 26, 0, 1940 },
+{ 0x1b, 26, 0, 1939 },
+{ 0x7, 26, 1, 1956 },
+{ 0x3, 27, 0, 1955 },
+{ 0xf, 26, 1, 1954 },
+{ 0x7, 27, 0, 1953 },
+{ 0xa2, 24, 0, 1958 },
+{ 0x1a2, 24, 0, 1957 },
+{ 0x62, 24, 1, 1968 },
+{ 0x22, 25, 0, 1967 },
+{ 0xe2, 24, 1, 1966 },
+{ 0x62, 25, 0, 1965 },
+{ 0x52, 24, 0, 1960 },
+{ 0xd2, 24, 0, 1959 },
+{ 0x32, 24, 1, 1972 },
+{ 0x12, 25, 0, 1971 },
+{ 0x72, 24, 1, 1970 },
+{ 0x32, 25, 0, 1969 },
+{ 0x2a, 24, 0, 1962 },
+{ 0x6a, 24, 0, 1961 },
+{ 0x1a, 24, 1, 1976 },
+{ 0xa, 25, 0, 1975 },
+{ 0x3a, 24, 1, 1974 },
+{ 0x1a, 25, 0, 1973 },
+{ 0x16, 24, 0, 1964 },
+{ 0x36, 24, 0, 1963 },
+{ 0xe, 24, 1, 1980 },
+{ 0x6, 25, 0, 1979 },
+{ 0x1e, 24, 1, 1978 },
+{ 0xe, 25, 0, 1977 },
+{ 0x51, 24, 0, 1982 },
+{ 0xd1, 24, 0, 1981 },
+{ 0x31, 24, 1, 1992 },
+{ 0x11, 25, 0, 1991 },
+{ 0x71, 24, 1, 1990 },
+{ 0x31, 25, 0, 1989 },
+{ 0x29, 24, 0, 1984 },
+{ 0x69, 24, 0, 1983 },
+{ 0x19, 24, 1, 1996 },
+{ 0x9, 25, 0, 1995 },
+{ 0x39, 24, 1, 1994 },
+{ 0x19, 25, 0, 1993 },
+{ 0x15, 24, 0, 1986 },
+{ 0x35, 24, 0, 1985 },
+{ 0xd, 24, 1, 2000 },
+{ 0x5, 25, 0, 1999 },
+{ 0x1d, 24, 1, 1998 },
+{ 0xd, 25, 0, 1997 },
+{ 0xb, 24, 0, 1988 },
+{ 0x1b, 24, 0, 1987 },
+{ 0x7, 24, 1, 2004 },
+{ 0x3, 25, 0, 2003 },
+{ 0xf, 24, 1, 2002 },
+{ 0x7, 25, 0, 2001 },
+{ 0x51, 22, 1, 2030 },
+{ 0x50, 22, 0, 2006 },
+{ 0xd1, 22, 1, 2029 },
+{ 0xd0, 22, 0, 2005 },
+{ 0x31, 22, 1, 2040 },
+{ 0x30, 22, 1, 2016 },
+{ 0x11, 23, 1, 2039 },
+{ 0x10, 23, 0, 2015 },
+{ 0x71, 22, 1, 2038 },
+{ 0x70, 22, 1, 2014 },
+{ 0x31, 23, 1, 2037 },
+{ 0x30, 23, 0, 2013 },
+{ 0x29, 22, 1, 2032 },
+{ 0x28, 22, 0, 2008 },
+{ 0x69, 22, 1, 2031 },
+{ 0x68, 22, 0, 2007 },
+{ 0x19, 22, 1, 2044 },
+{ 0x18, 22, 1, 2020 },
+{ 0x9, 23, 1, 2043 },
+{ 0x8, 23, 0, 2019 },
+{ 0x39, 22, 1, 2042 },
+{ 0x38, 22, 1, 2018 },
+{ 0x19, 23, 1, 2041 },
+{ 0x18, 23, 0, 2017 },
+{ 0x15, 22, 1, 2034 },
+{ 0x14, 22, 0, 2010 },
+{ 0x35, 22, 1, 2033 },
+{ 0x34, 22, 0, 2009 },
+{ 0xd, 22, 1, 2048 },
+{ 0xc, 22, 1, 2024 },
+{ 0x5, 23, 1, 2047 },
+{ 0x4, 23, 0, 2023 },
+{ 0x1d, 22, 1, 2046 },
+{ 0x1c, 22, 1, 2022 },
+{ 0xd, 23, 1, 2045 },
+{ 0xc, 23, 0, 2021 },
+{ 0xb, 22, 1, 2036 },
+{ 0xa, 22, 0, 2012 },
+{ 0x1b, 22, 1, 2035 },
+{ 0x1a, 22, 0, 2011 },
+{ 0x7, 22, 1, 2052 },
+{ 0x6, 22, 1, 2028 },
+{ 0x3, 23, 1, 2051 },
+{ 0x2, 23, 0, 2027 },
+{ 0xf, 22, 1, 2050 },
+{ 0xe, 22, 1, 2026 },
+{ 0x7, 23, 1, 2049 },
+{ 0x6, 23, 0, 2025 },
+{ 0x8, 21, 0, 2054 },
+{ 0x18, 21, 0, 2053 },
+{ 0x1, 21, 1, 2058 },
+{ 0x2, 21, 0, 2057 },
+{ 0x3, 21, 1, 2056 },
+{ 0x4, 21, 0, 2055 },
+{ 0x1, 239, 0, 2059 },
+{ 0x1, 339, 0, 2060 },
+{ 0x14, 43, 0, 2063 },
+{ 0x34, 43, 0, 2061 },
+{ 0xc, 43, 0, 2064 },
+{ 0x1c, 43, 0, 2062 },
+{ 0x2, 43, 0, 2067 },
+{ 0x6, 43, 0, 2065 },
+{ 0x1, 43, 0, 2068 },
+{ 0x3, 43, 0, 2066 },
+{ 0x51, 19, 0, 2070 },
+{ 0xd1, 19, 0, 2069 },
+{ 0x31, 19, 1, 2080 },
+{ 0x11, 20, 0, 2079 },
+{ 0x71, 19, 1, 2078 },
+{ 0x31, 20, 0, 2077 },
+{ 0x29, 19, 0, 2072 },
+{ 0x69, 19, 0, 2071 },
+{ 0x19, 19, 1, 2084 },
+{ 0x9, 20, 0, 2083 },
+{ 0x39, 19, 1, 2082 },
+{ 0x19, 20, 0, 2081 },
+{ 0x15, 19, 0, 2074 },
+{ 0x35, 19, 0, 2073 },
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+{ 0x5, 20, 0, 2087 },
+{ 0x1d, 19, 1, 2086 },
+{ 0xd, 20, 0, 2085 },
+{ 0xb, 19, 0, 2076 },
+{ 0x1b, 19, 0, 2075 },
+{ 0x7, 19, 1, 2092 },
+{ 0x3, 20, 0, 2091 },
+{ 0xf, 19, 1, 2090 },
+{ 0x7, 20, 0, 2089 },
+{ 0x1, 32, 0, 2093 },
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+{ 0x1, 447, 0, 2095 },
+{ 0x1, 140, 0, 2096 },
+{ 0x2, 45, 0, 2097 },
+{ 0x1, 45, 0, 2098 },
+{ 0x1, 387, 0, 2099 },
+{ 0x2, 52, 0, 2100 },
+{ 0x1, 52, 0, 2101 },
+{ 0x1, 133, 0, 2102 },
+{ 0x51, 17, 0, 2104 },
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+{ 0x11, 18, 0, 2113 },
+{ 0x71, 17, 1, 2112 },
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+{ 0x69, 17, 0, 2105 },
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+{ 0x9, 18, 0, 2117 },
+{ 0x39, 17, 1, 2116 },
+{ 0x19, 18, 0, 2115 },
+{ 0x15, 17, 0, 2108 },
+{ 0x35, 17, 0, 2107 },
+{ 0xd, 17, 1, 2122 },
+{ 0x5, 18, 0, 2121 },
+{ 0x1d, 17, 1, 2120 },
+{ 0xd, 18, 0, 2119 },
+{ 0xb, 17, 0, 2110 },
+{ 0x1b, 17, 0, 2109 },
+{ 0x7, 17, 1, 2126 },
+{ 0x3, 18, 0, 2125 },
+{ 0xf, 17, 1, 2124 },
+{ 0x7, 18, 0, 2123 },
+{ 0xa20, 15, 0, 2128 },
+{ 0x1a20, 15, 0, 2127 },
+{ 0x620, 15, 1, 2138 },
+{ 0x220, 16, 0, 2137 },
+{ 0xe20, 15, 1, 2136 },
+{ 0x620, 16, 0, 2135 },
+{ 0x520, 15, 0, 2130 },
+{ 0xd20, 15, 0, 2129 },
+{ 0x320, 15, 1, 2142 },
+{ 0x120, 16, 0, 2141 },
+{ 0x720, 15, 1, 2140 },
+{ 0x320, 16, 0, 2139 },
+{ 0x2a0, 15, 0, 2132 },
+{ 0x6a0, 15, 0, 2131 },
+{ 0x1a0, 15, 1, 2146 },
+{ 0xa0, 16, 0, 2145 },
+{ 0x3a0, 15, 1, 2144 },
+{ 0x1a0, 16, 0, 2143 },
+{ 0x160, 15, 0, 2134 },
+{ 0x360, 15, 0, 2133 },
+{ 0xe0, 15, 1, 2150 },
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+{ 0x1e0, 15, 1, 2148 },
+{ 0xe0, 16, 0, 2147 },
+{ 0x51, 15, 1, 2176 },
+{ 0x50, 15, 0, 2152 },
+{ 0xd1, 15, 1, 2175 },
+{ 0xd0, 15, 0, 2151 },
+{ 0x31, 15, 1, 2186 },
+{ 0x30, 15, 1, 2162 },
+{ 0x11, 16, 1, 2185 },
+{ 0x10, 16, 0, 2161 },
+{ 0x71, 15, 1, 2184 },
+{ 0x70, 15, 1, 2160 },
+{ 0x31, 16, 1, 2183 },
+{ 0x30, 16, 0, 2159 },
+{ 0x29, 15, 1, 2178 },
+{ 0x28, 15, 0, 2154 },
+{ 0x69, 15, 1, 2177 },
+{ 0x68, 15, 0, 2153 },
+{ 0x19, 15, 1, 2190 },
+{ 0x18, 15, 1, 2166 },
+{ 0x9, 16, 1, 2189 },
+{ 0x8, 16, 0, 2165 },
+{ 0x39, 15, 1, 2188 },
+{ 0x38, 15, 1, 2164 },
+{ 0x19, 16, 1, 2187 },
+{ 0x18, 16, 0, 2163 },
+{ 0x15, 15, 1, 2180 },
+{ 0x14, 15, 0, 2156 },
+{ 0x35, 15, 1, 2179 },
+{ 0x34, 15, 0, 2155 },
+{ 0xd, 15, 1, 2194 },
+{ 0xc, 15, 1, 2170 },
+{ 0x5, 16, 1, 2193 },
+{ 0x4, 16, 0, 2169 },
+{ 0x1d, 15, 1, 2192 },
+{ 0x1c, 15, 1, 2168 },
+{ 0xd, 16, 1, 2191 },
+{ 0xc, 16, 0, 2167 },
+{ 0xb, 15, 1, 2182 },
+{ 0xa, 15, 0, 2158 },
+{ 0x1b, 15, 1, 2181 },
+{ 0x1a, 15, 0, 2157 },
+{ 0x7, 15, 1, 2198 },
+{ 0x6, 15, 1, 2174 },
+{ 0x3, 16, 1, 2197 },
+{ 0x2, 16, 0, 2173 },
+{ 0xf, 15, 1, 2196 },
+{ 0xe, 15, 1, 2172 },
+{ 0x7, 16, 1, 2195 },
+{ 0x6, 16, 0, 2171 },
+{ 0x8, 14, 0, 2200 },
+{ 0x18, 14, 0, 2199 },
+{ 0x1, 14, 1, 2204 },
+{ 0x2, 14, 0, 2203 },
+{ 0x3, 14, 1, 2202 },
+{ 0x4, 14, 0, 2201 },
+{ 0x1, 109, 1, 2356 },
+{ 0x1, 110, 1, 2355 },
+{ 0x1, 111, 1, 2354 },
+{ 0x1, 112, 1, 2353 },
+{ 0x1, 113, 1, 2352 },
+{ 0x1, 114, 1, 2351 },
+{ 0x1, 115, 1, 2350 },
+{ 0x1, 116, 1, 2349 },
{ 0x39, 41, 1, 22 },
{ 0x19, 42, 0, 21 },
-{ 0x3, 109, 1, 2314 },
-{ 0x3, 110, 1, 2313 },
-{ 0x3, 111, 1, 2312 },
-{ 0x3, 112, 1, 2311 },
-{ 0x3, 113, 1, 2310 },
-{ 0x3, 114, 1, 2309 },
-{ 0x3, 115, 1, 2308 },
-{ 0x3, 116, 1, 2307 },
+{ 0x3, 109, 1, 2348 },
+{ 0x3, 110, 1, 2347 },
+{ 0x3, 111, 1, 2346 },
+{ 0x3, 112, 1, 2345 },
+{ 0x3, 113, 1, 2344 },
+{ 0x3, 114, 1, 2343 },
+{ 0x3, 115, 1, 2342 },
+{ 0x3, 116, 1, 2341 },
{ 0x69, 41, 0, 11 },
-{ 0x14, 100, 1, 2302 },
-{ 0x22, 101, 1, 2299 },
-{ 0x44, 101, 1, 2301 },
-{ 0xa, 108, 1, 2300 },
+{ 0x14, 100, 1, 2336 },
+{ 0x22, 101, 1, 2333 },
+{ 0x44, 101, 1, 2335 },
+{ 0xa, 108, 1, 2334 },
{ 0xd1, 41, 0, 9 },
-{ 0x34, 100, 1, 2174 },
-{ 0xc4, 101, 1, 2173 },
-{ 0x1c, 107, 1, 2171 },
-{ 0xe, 122, 0, 2172 },
-{ 0xc, 100, 1, 2462 },
-{ 0xa, 101, 1, 2459 },
-{ 0x14, 101, 1, 2461 },
-{ 0x6, 108, 0, 2460 },
-{ 0x2, 100, 1, 2186 },
-{ 0x2, 101, 1, 2185 },
-{ 0x2, 106, 1, 2184 },
-{ 0x2, 107, 0, 2183 },
-{ 0x12, 100, 1, 2182 },
-{ 0x42, 101, 1, 2181 },
-{ 0x6, 106, 1, 2180 },
-{ 0x6, 107, 0, 2179 },
-{ 0xa, 100, 1, 2306 },
-{ 0x12, 101, 1, 2305 },
-{ 0x24, 101, 1, 2303 },
-{ 0x5, 108, 1, 2304 },
+{ 0x34, 100, 1, 2208 },
+{ 0xc4, 101, 1, 2207 },
+{ 0x1c, 107, 1, 2205 },
+{ 0xe, 122, 0, 2206 },
+{ 0xc, 100, 1, 2496 },
+{ 0xa, 101, 1, 2493 },
+{ 0x14, 101, 1, 2495 },
+{ 0x6, 108, 0, 2494 },
+{ 0x2, 100, 1, 2220 },
+{ 0x2, 101, 1, 2219 },
+{ 0x2, 106, 1, 2218 },
+{ 0x2, 107, 0, 2217 },
+{ 0x12, 100, 1, 2216 },
+{ 0x42, 101, 1, 2215 },
+{ 0x6, 106, 1, 2214 },
+{ 0x6, 107, 0, 2213 },
+{ 0xa, 100, 1, 2340 },
+{ 0x12, 101, 1, 2339 },
+{ 0x24, 101, 1, 2337 },
+{ 0x5, 108, 1, 2338 },
{ 0x71, 41, 1, 18 },
{ 0x31, 42, 0, 17 },
-{ 0x1a, 100, 1, 2178 },
-{ 0x32, 101, 1, 2177 },
-{ 0x1a, 107, 1, 2175 },
-{ 0x7, 122, 0, 2176 },
-{ 0x6, 100, 1, 2466 },
-{ 0x6, 101, 1, 2465 },
-{ 0xc, 101, 1, 2463 },
-{ 0x3, 108, 0, 2464 },
-{ 0x1, 100, 1, 2482 },
-{ 0x1, 101, 1, 2481 },
-{ 0x1, 102, 1, 2480 },
-{ 0x1, 103, 1, 2479 },
-{ 0x1, 104, 1, 2478 },
-{ 0x1, 105, 1, 2477 },
-{ 0x1, 106, 1, 2476 },
-{ 0x1, 107, 0, 2475 },
-{ 0x3, 100, 1, 2474 },
-{ 0x3, 101, 1, 2473 },
-{ 0x3, 102, 1, 2472 },
-{ 0x3, 103, 1, 2471 },
-{ 0x3, 104, 1, 2470 },
-{ 0x3, 105, 1, 2469 },
-{ 0x3, 106, 1, 2468 },
-{ 0x3, 107, 0, 2467 },
-{ 0x8, 67, 1, 2346 },
-{ 0x8, 68, 1, 2345 },
-{ 0x2, 73, 1, 2340 },
-{ 0x2, 74, 1, 2339 },
-{ 0x1, 76, 1, 2344 },
-{ 0x1, 77, 1, 2343 },
-{ 0x1, 78, 1, 2342 },
-{ 0x1, 79, 1, 2341 },
+{ 0x1a, 100, 1, 2212 },
+{ 0x32, 101, 1, 2211 },
+{ 0x1a, 107, 1, 2209 },
+{ 0x7, 122, 0, 2210 },
+{ 0x6, 100, 1, 2500 },
+{ 0x6, 101, 1, 2499 },
+{ 0xc, 101, 1, 2497 },
+{ 0x3, 108, 0, 2498 },
+{ 0x1, 100, 1, 2516 },
+{ 0x1, 101, 1, 2515 },
+{ 0x1, 102, 1, 2514 },
+{ 0x1, 103, 1, 2513 },
+{ 0x1, 104, 1, 2512 },
+{ 0x1, 105, 1, 2511 },
+{ 0x1, 106, 1, 2510 },
+{ 0x1, 107, 0, 2509 },
+{ 0x3, 100, 1, 2508 },
+{ 0x3, 101, 1, 2507 },
+{ 0x3, 102, 1, 2506 },
+{ 0x3, 103, 1, 2505 },
+{ 0x3, 104, 1, 2504 },
+{ 0x3, 105, 1, 2503 },
+{ 0x3, 106, 1, 2502 },
+{ 0x3, 107, 0, 2501 },
+{ 0x8, 67, 1, 2380 },
+{ 0x8, 68, 1, 2379 },
+{ 0x2, 73, 1, 2374 },
+{ 0x2, 74, 1, 2373 },
+{ 0x1, 76, 1, 2378 },
+{ 0x1, 77, 1, 2377 },
+{ 0x1, 78, 1, 2376 },
+{ 0x1, 79, 1, 2375 },
{ 0xf, 41, 1, 30 },
{ 0x7, 42, 0, 29 },
-{ 0x18, 67, 1, 2338 },
-{ 0x18, 68, 1, 2337 },
-{ 0x6, 73, 1, 2332 },
-{ 0x6, 74, 1, 2331 },
-{ 0x3, 76, 1, 2336 },
-{ 0x3, 77, 1, 2335 },
-{ 0x3, 78, 1, 2334 },
-{ 0x3, 79, 1, 2333 },
+{ 0x18, 67, 1, 2372 },
+{ 0x18, 68, 1, 2371 },
+{ 0x6, 73, 1, 2366 },
+{ 0x6, 74, 1, 2365 },
+{ 0x3, 76, 1, 2370 },
+{ 0x3, 77, 1, 2369 },
+{ 0x3, 78, 1, 2368 },
+{ 0x3, 79, 1, 2367 },
{ 0x1b, 41, 0, 15 },
-{ 0x14, 67, 1, 2326 },
-{ 0x22, 68, 1, 2323 },
-{ 0x44, 68, 1, 2325 },
-{ 0xa, 75, 1, 2324 },
+{ 0x14, 67, 1, 2360 },
+{ 0x22, 68, 1, 2357 },
+{ 0x44, 68, 1, 2359 },
+{ 0xa, 75, 1, 2358 },
{ 0x35, 41, 0, 13 },
-{ 0x34, 67, 1, 2190 },
-{ 0xc4, 68, 1, 2189 },
-{ 0x38, 74, 1, 2187 },
-{ 0xe, 85, 0, 2188 },
-{ 0xc, 67, 1, 2486 },
-{ 0xa, 68, 1, 2483 },
-{ 0x14, 68, 1, 2485 },
-{ 0x6, 75, 0, 2484 },
-{ 0x2, 67, 1, 2202 },
-{ 0x2, 68, 1, 2201 },
-{ 0x4, 73, 1, 2200 },
-{ 0x4, 74, 0, 2199 },
-{ 0x12, 67, 1, 2198 },
-{ 0x42, 68, 1, 2197 },
-{ 0xc, 73, 1, 2196 },
-{ 0xc, 74, 0, 2195 },
-{ 0xa, 67, 1, 2330 },
-{ 0x12, 68, 1, 2329 },
-{ 0x24, 68, 1, 2327 },
-{ 0x5, 75, 1, 2328 },
+{ 0x34, 67, 1, 2224 },
+{ 0xc4, 68, 1, 2223 },
+{ 0x38, 74, 1, 2221 },
+{ 0xe, 85, 0, 2222 },
+{ 0xc, 67, 1, 2520 },
+{ 0xa, 68, 1, 2517 },
+{ 0x14, 68, 1, 2519 },
+{ 0x6, 75, 0, 2518 },
+{ 0x2, 67, 1, 2236 },
+{ 0x2, 68, 1, 2235 },
+{ 0x4, 73, 1, 2234 },
+{ 0x4, 74, 0, 2233 },
+{ 0x12, 67, 1, 2232 },
+{ 0x42, 68, 1, 2231 },
+{ 0xc, 73, 1, 2230 },
+{ 0xc, 74, 0, 2229 },
+{ 0xa, 67, 1, 2364 },
+{ 0x12, 68, 1, 2363 },
+{ 0x24, 68, 1, 2361 },
+{ 0x5, 75, 1, 2362 },
{ 0x1d, 41, 1, 26 },
{ 0xd, 42, 0, 25 },
-{ 0x1a, 67, 1, 2194 },
-{ 0x32, 68, 1, 2193 },
-{ 0x34, 74, 1, 2191 },
-{ 0x7, 85, 0, 2192 },
-{ 0x6, 67, 1, 2490 },
-{ 0x6, 68, 1, 2489 },
-{ 0xc, 68, 1, 2487 },
-{ 0x3, 75, 0, 2488 },
-{ 0x1, 67, 1, 2506 },
-{ 0x1, 68, 1, 2505 },
-{ 0x1, 69, 1, 2504 },
-{ 0x1, 70, 1, 2503 },
-{ 0x1, 71, 1, 2502 },
-{ 0x1, 72, 1, 2501 },
-{ 0x1, 73, 1, 2500 },
-{ 0x1, 74, 0, 2499 },
-{ 0x3, 67, 1, 2498 },
-{ 0x3, 68, 1, 2497 },
-{ 0x3, 69, 1, 2496 },
-{ 0x3, 70, 1, 2495 },
-{ 0x3, 71, 1, 2494 },
-{ 0x3, 72, 1, 2493 },
-{ 0x3, 73, 1, 2492 },
-{ 0x3, 74, 0, 2491 },
-{ 0x28, 95, 1, 2354 },
-{ 0x44, 96, 1, 2349 },
-{ 0x88, 96, 1, 2353 },
-{ 0x44, 97, 1, 2348 },
-{ 0x88, 97, 1, 2352 },
-{ 0x44, 98, 1, 2347 },
-{ 0x88, 98, 1, 2351 },
-{ 0x28, 99, 0, 2350 },
-{ 0x68, 95, 1, 2210 },
-{ 0x188, 96, 1, 2209 },
-{ 0x188, 97, 1, 2208 },
-{ 0x188, 98, 1, 2207 },
-{ 0x38, 118, 1, 2206 },
-{ 0x38, 119, 1, 2205 },
-{ 0x38, 120, 1, 2204 },
-{ 0x38, 121, 0, 2203 },
-{ 0x18, 95, 1, 2514 },
-{ 0x14, 96, 1, 2509 },
-{ 0x28, 96, 1, 2513 },
-{ 0x14, 97, 1, 2508 },
-{ 0x28, 97, 1, 2512 },
-{ 0x14, 98, 1, 2507 },
-{ 0x28, 98, 1, 2511 },
-{ 0x18, 99, 0, 2510 },
-{ 0x14, 95, 1, 2362 },
-{ 0x24, 96, 1, 2361 },
-{ 0x48, 96, 1, 2357 },
-{ 0x24, 97, 1, 2360 },
-{ 0x48, 97, 1, 2356 },
-{ 0x24, 98, 1, 2359 },
-{ 0x48, 98, 1, 2355 },
-{ 0x14, 99, 0, 2358 },
-{ 0x34, 95, 1, 2218 },
-{ 0x64, 96, 1, 2217 },
-{ 0x64, 97, 1, 2216 },
-{ 0x64, 98, 1, 2215 },
-{ 0x1c, 118, 1, 2214 },
-{ 0x1c, 119, 1, 2213 },
-{ 0x1c, 120, 1, 2212 },
-{ 0x1c, 121, 0, 2211 },
-{ 0xc, 95, 1, 2522 },
-{ 0xc, 96, 1, 2521 },
-{ 0x18, 96, 1, 2517 },
-{ 0xc, 97, 1, 2520 },
-{ 0x18, 97, 1, 2516 },
-{ 0xc, 98, 1, 2519 },
-{ 0x18, 98, 1, 2515 },
-{ 0xc, 99, 0, 2518 },
-{ 0xa, 95, 1, 2370 },
-{ 0x11, 96, 1, 2365 },
-{ 0x22, 96, 1, 2369 },
-{ 0x11, 97, 1, 2364 },
-{ 0x22, 97, 1, 2368 },
-{ 0x11, 98, 1, 2363 },
-{ 0x22, 98, 1, 2367 },
-{ 0xa, 99, 0, 2366 },
-{ 0x1a, 95, 1, 2226 },
-{ 0x62, 96, 1, 2225 },
-{ 0x62, 97, 1, 2224 },
-{ 0x62, 98, 1, 2223 },
-{ 0xe, 118, 1, 2222 },
-{ 0xe, 119, 1, 2221 },
-{ 0xe, 120, 1, 2220 },
-{ 0xe, 121, 0, 2219 },
-{ 0x6, 95, 1, 2530 },
-{ 0x5, 96, 1, 2525 },
-{ 0xa, 96, 1, 2529 },
-{ 0x5, 97, 1, 2524 },
-{ 0xa, 97, 1, 2528 },
-{ 0x5, 98, 1, 2523 },
-{ 0xa, 98, 1, 2527 },
-{ 0x6, 99, 0, 2526 },
-{ 0x5, 95, 1, 2378 },
-{ 0x9, 96, 1, 2377 },
-{ 0x12, 96, 1, 2373 },
-{ 0x9, 97, 1, 2376 },
-{ 0x12, 97, 1, 2372 },
-{ 0x9, 98, 1, 2375 },
-{ 0x12, 98, 1, 2371 },
-{ 0x5, 99, 0, 2374 },
-{ 0xd, 95, 1, 2234 },
-{ 0x19, 96, 1, 2233 },
-{ 0x19, 97, 1, 2232 },
-{ 0x19, 98, 1, 2231 },
-{ 0x7, 118, 1, 2230 },
-{ 0x7, 119, 1, 2229 },
-{ 0x7, 120, 1, 2228 },
-{ 0x7, 121, 0, 2227 },
-{ 0x3, 95, 1, 2538 },
-{ 0x3, 96, 1, 2537 },
-{ 0x6, 96, 1, 2533 },
-{ 0x3, 97, 1, 2536 },
-{ 0x6, 97, 1, 2532 },
-{ 0x3, 98, 1, 2535 },
-{ 0x6, 98, 1, 2531 },
-{ 0x3, 99, 0, 2534 },
-{ 0x28, 62, 1, 2386 },
-{ 0x44, 63, 1, 2381 },
-{ 0x88, 63, 1, 2385 },
-{ 0x44, 64, 1, 2380 },
-{ 0x88, 64, 1, 2384 },
-{ 0x44, 65, 1, 2379 },
-{ 0x88, 65, 1, 2383 },
-{ 0x28, 66, 0, 2382 },
-{ 0x68, 62, 1, 2242 },
-{ 0x188, 63, 1, 2241 },
-{ 0x188, 64, 1, 2240 },
-{ 0x188, 65, 1, 2239 },
-{ 0x38, 81, 1, 2238 },
-{ 0x38, 82, 1, 2237 },
-{ 0x38, 83, 1, 2236 },
-{ 0x38, 84, 0, 2235 },
-{ 0x18, 62, 1, 2546 },
-{ 0x14, 63, 1, 2541 },
-{ 0x28, 63, 1, 2545 },
-{ 0x14, 64, 1, 2540 },
-{ 0x28, 64, 1, 2544 },
-{ 0x14, 65, 1, 2539 },
-{ 0x28, 65, 1, 2543 },
-{ 0x18, 66, 0, 2542 },
-{ 0x14, 62, 1, 2394 },
-{ 0x24, 63, 1, 2393 },
-{ 0x48, 63, 1, 2389 },
-{ 0x24, 64, 1, 2392 },
-{ 0x48, 64, 1, 2388 },
-{ 0x24, 65, 1, 2391 },
-{ 0x48, 65, 1, 2387 },
-{ 0x14, 66, 0, 2390 },
-{ 0x34, 62, 1, 2250 },
-{ 0x64, 63, 1, 2249 },
-{ 0x64, 64, 1, 2248 },
-{ 0x64, 65, 1, 2247 },
-{ 0x1c, 81, 1, 2246 },
-{ 0x1c, 82, 1, 2245 },
-{ 0x1c, 83, 1, 2244 },
-{ 0x1c, 84, 0, 2243 },
-{ 0xc, 62, 1, 2554 },
-{ 0xc, 63, 1, 2553 },
-{ 0x18, 63, 1, 2549 },
-{ 0xc, 64, 1, 2552 },
-{ 0x18, 64, 1, 2548 },
-{ 0xc, 65, 1, 2551 },
-{ 0x18, 65, 1, 2547 },
-{ 0xc, 66, 0, 2550 },
-{ 0xa, 62, 1, 2402 },
-{ 0x11, 63, 1, 2397 },
-{ 0x22, 63, 1, 2401 },
-{ 0x11, 64, 1, 2396 },
-{ 0x22, 64, 1, 2400 },
-{ 0x11, 65, 1, 2395 },
-{ 0x22, 65, 1, 2399 },
-{ 0xa, 66, 0, 2398 },
-{ 0x1a, 62, 1, 2258 },
-{ 0x62, 63, 1, 2257 },
-{ 0x62, 64, 1, 2256 },
-{ 0x62, 65, 1, 2255 },
-{ 0xe, 81, 1, 2254 },
-{ 0xe, 82, 1, 2253 },
-{ 0xe, 83, 1, 2252 },
-{ 0xe, 84, 0, 2251 },
-{ 0x6, 62, 1, 2562 },
-{ 0x5, 63, 1, 2557 },
-{ 0xa, 63, 1, 2561 },
-{ 0x5, 64, 1, 2556 },
-{ 0xa, 64, 1, 2560 },
-{ 0x5, 65, 1, 2555 },
-{ 0xa, 65, 1, 2559 },
-{ 0x6, 66, 0, 2558 },
-{ 0x5, 62, 1, 2410 },
-{ 0x9, 63, 1, 2409 },
-{ 0x12, 63, 1, 2405 },
-{ 0x9, 64, 1, 2408 },
-{ 0x12, 64, 1, 2404 },
-{ 0x9, 65, 1, 2407 },
-{ 0x12, 65, 1, 2403 },
-{ 0x5, 66, 0, 2406 },
-{ 0xd, 62, 1, 2266 },
-{ 0x19, 63, 1, 2265 },
-{ 0x19, 64, 1, 2264 },
-{ 0x19, 65, 1, 2263 },
-{ 0x7, 81, 1, 2262 },
-{ 0x7, 82, 1, 2261 },
-{ 0x7, 83, 1, 2260 },
-{ 0x7, 84, 0, 2259 },
-{ 0x3, 62, 1, 2570 },
-{ 0x3, 63, 1, 2569 },
-{ 0x6, 63, 1, 2565 },
-{ 0x3, 64, 1, 2568 },
-{ 0x6, 64, 1, 2564 },
-{ 0x3, 65, 1, 2567 },
-{ 0x6, 65, 1, 2563 },
-{ 0x3, 66, 0, 2566 },
-{ 0x8, 86, 1, 2434 },
-{ 0x8, 87, 1, 2433 },
-{ 0x2, 88, 1, 2432 },
-{ 0x2, 89, 1, 2431 },
-{ 0x2, 90, 1, 2430 },
-{ 0x2, 91, 1, 2429 },
-{ 0x2, 92, 1, 2428 },
-{ 0x2, 93, 0, 2427 },
-{ 0x18, 86, 1, 2426 },
-{ 0x18, 87, 1, 2425 },
-{ 0x6, 88, 1, 2424 },
-{ 0x6, 89, 1, 2423 },
-{ 0x6, 90, 1, 2422 },
-{ 0x6, 91, 1, 2421 },
-{ 0x6, 92, 1, 2420 },
-{ 0x6, 93, 0, 2419 },
-{ 0x14, 86, 1, 2414 },
-{ 0x22, 87, 1, 2411 },
-{ 0x44, 87, 1, 2413 },
-{ 0xa, 94, 0, 2412 },
-{ 0x34, 86, 1, 2270 },
-{ 0xc4, 87, 1, 2269 },
-{ 0x38, 93, 1, 2267 },
-{ 0xe, 117, 0, 2268 },
-{ 0xc, 86, 1, 2574 },
-{ 0xa, 87, 1, 2571 },
-{ 0x14, 87, 1, 2573 },
-{ 0x6, 94, 0, 2572 },
-{ 0x2, 86, 1, 2282 },
-{ 0x2, 87, 1, 2281 },
-{ 0x4, 92, 1, 2280 },
-{ 0x4, 93, 0, 2279 },
-{ 0x12, 86, 1, 2278 },
-{ 0x42, 87, 1, 2277 },
-{ 0xc, 92, 1, 2276 },
-{ 0xc, 93, 0, 2275 },
-{ 0xa, 86, 1, 2418 },
-{ 0x12, 87, 1, 2417 },
-{ 0x24, 87, 1, 2415 },
-{ 0x5, 94, 0, 2416 },
-{ 0x1a, 86, 1, 2274 },
-{ 0x32, 87, 1, 2273 },
-{ 0x34, 93, 1, 2271 },
-{ 0x7, 117, 0, 2272 },
-{ 0x6, 86, 1, 2578 },
-{ 0x6, 87, 1, 2577 },
-{ 0xc, 87, 1, 2575 },
-{ 0x3, 94, 0, 2576 },
-{ 0x1, 86, 1, 2594 },
-{ 0x1, 87, 1, 2593 },
-{ 0x1, 88, 1, 2592 },
-{ 0x1, 89, 1, 2591 },
-{ 0x1, 90, 1, 2590 },
-{ 0x1, 91, 1, 2589 },
-{ 0x1, 92, 1, 2588 },
-{ 0x1, 93, 0, 2587 },
-{ 0x3, 86, 1, 2586 },
-{ 0x3, 87, 1, 2585 },
-{ 0x3, 88, 1, 2584 },
-{ 0x3, 89, 1, 2583 },
-{ 0x3, 90, 1, 2582 },
-{ 0x3, 91, 1, 2581 },
-{ 0x3, 92, 1, 2580 },
-{ 0x3, 93, 0, 2579 },
-{ 0x8, 53, 1, 2458 },
-{ 0x8, 54, 1, 2457 },
-{ 0x2, 55, 1, 2456 },
-{ 0x2, 56, 1, 2455 },
-{ 0x2, 57, 1, 2454 },
-{ 0x2, 58, 1, 2453 },
-{ 0x2, 59, 1, 2452 },
-{ 0x2, 60, 0, 2451 },
-{ 0x18, 53, 1, 2450 },
-{ 0x18, 54, 1, 2449 },
-{ 0x6, 55, 1, 2448 },
-{ 0x6, 56, 1, 2447 },
-{ 0x6, 57, 1, 2446 },
-{ 0x6, 58, 1, 2445 },
-{ 0x6, 59, 1, 2444 },
-{ 0x6, 60, 0, 2443 },
-{ 0x14, 53, 1, 2438 },
-{ 0x22, 54, 1, 2435 },
-{ 0x44, 54, 1, 2437 },
-{ 0xa, 61, 0, 2436 },
-{ 0x34, 53, 1, 2286 },
-{ 0xc4, 54, 1, 2285 },
-{ 0x38, 60, 1, 2283 },
-{ 0xe, 80, 0, 2284 },
-{ 0xc, 53, 1, 2598 },
-{ 0xa, 54, 1, 2595 },
-{ 0x14, 54, 1, 2597 },
-{ 0x6, 61, 0, 2596 },
-{ 0x2, 53, 1, 2298 },
-{ 0x2, 54, 1, 2297 },
-{ 0x4, 59, 1, 2296 },
-{ 0x4, 60, 0, 2295 },
-{ 0x12, 53, 1, 2294 },
-{ 0x42, 54, 1, 2293 },
-{ 0xc, 59, 1, 2292 },
-{ 0xc, 60, 0, 2291 },
-{ 0xa, 53, 1, 2442 },
-{ 0x12, 54, 1, 2441 },
-{ 0x24, 54, 1, 2439 },
-{ 0x5, 61, 0, 2440 },
-{ 0x1a, 53, 1, 2290 },
-{ 0x32, 54, 1, 2289 },
-{ 0x34, 60, 1, 2287 },
-{ 0x7, 80, 0, 2288 },
-{ 0x6, 53, 1, 2602 },
-{ 0x6, 54, 1, 2601 },
-{ 0xc, 54, 1, 2599 },
-{ 0x3, 61, 0, 2600 },
-{ 0x1, 53, 1, 2618 },
-{ 0x1, 54, 1, 2617 },
-{ 0x1, 55, 1, 2616 },
-{ 0x1, 56, 1, 2615 },
-{ 0x1, 57, 1, 2614 },
-{ 0x1, 58, 1, 2613 },
-{ 0x1, 59, 1, 2612 },
-{ 0x1, 60, 0, 2611 },
-{ 0x3, 53, 1, 2610 },
-{ 0x3, 54, 1, 2609 },
-{ 0x3, 55, 1, 2608 },
-{ 0x3, 56, 1, 2607 },
-{ 0x3, 57, 1, 2606 },
-{ 0x3, 58, 1, 2605 },
-{ 0x3, 59, 1, 2604 },
-{ 0x3, 60, 0, 2603 },
-{ 0x1, 4, 0, 2619 },
-{ 0x1, 296, 0, 2620 },
-{ 0x1, 379, 0, 2621 },
-{ 0x1, 374, 0, 2622 },
-{ 0x2, 358, 0, 2623 },
-{ 0x1, 358, 0, 2626 },
-{ 0x2, 357, 0, 2624 },
-{ 0x1, 357, 0, 2627 },
-{ 0x2, 356, 0, 2625 },
-{ 0x1, 356, 0, 2628 },
-{ 0x1, 355, 0, 2629 },
-{ 0x1, 354, 0, 2630 },
-{ 0x2, 353, 0, 2631 },
-{ 0x1, 353, 0, 2633 },
-{ 0x2, 352, 0, 2632 },
-{ 0x1, 352, 0, 2634 },
-{ 0x1, 382, 0, 2641 },
-{ 0x8, 381, 0, 2635 },
-{ 0x4, 381, 0, 2637 },
-{ 0x2, 381, 0, 2639 },
-{ 0x1, 381, 0, 2642 },
-{ 0x8, 380, 0, 2636 },
-{ 0x4, 380, 0, 2638 },
-{ 0x2, 380, 0, 2640 },
-{ 0x1, 380, 0, 2643 },
-{ 0x1, 351, 0, 2650 },
-{ 0x8, 350, 0, 2644 },
-{ 0x4, 350, 0, 2646 },
-{ 0x2, 350, 0, 2648 },
-{ 0x1, 350, 0, 2651 },
-{ 0x8, 349, 0, 2645 },
-{ 0x4, 349, 0, 2647 },
-{ 0x2, 349, 1, 2649 },
-{ 0x4, 143, 0, 1345 },
-{ 0x1, 349, 0, 2652 },
-{ 0x1, 6, 0, 2653 },
-{ 0x1, 7, 0, 2654 },
-{ 0x1, 295, 0, 2655 },
-{ 0x1, 451, 0, 2656 },
-{ 0x1, 346, 0, 2657 },
-{ 0x1, 13, 0, 2658 },
-{ 0x1, 11, 0, 2659 },
-{ 0x1, 422, 0, 2660 },
-{ 0x1, 394, 0, 2661 },
-{ 0x1, 393, 0, 2662 },
-{ 0x1, 450, 0, 2663 },
-{ 0x1, 345, 0, 2664 },
-{ 0x1, 12, 0, 2665 },
-{ 0x1, 10, 0, 2666 },
-{ 0x1, 5, 0, 2667 },
-{ 0x1, 421, 0, 2668 },
-{ 0x1, 420, 0, 2669 },
-{ 0x1, 1, 0, 2670 },
-{ 0x1, 0, 0, 2671 },
+{ 0x1a, 67, 1, 2228 },
+{ 0x32, 68, 1, 2227 },
+{ 0x34, 74, 1, 2225 },
+{ 0x7, 85, 0, 2226 },
+{ 0x6, 67, 1, 2524 },
+{ 0x6, 68, 1, 2523 },
+{ 0xc, 68, 1, 2521 },
+{ 0x3, 75, 0, 2522 },
+{ 0x1, 67, 1, 2540 },
+{ 0x1, 68, 1, 2539 },
+{ 0x1, 69, 1, 2538 },
+{ 0x1, 70, 1, 2537 },
+{ 0x1, 71, 1, 2536 },
+{ 0x1, 72, 1, 2535 },
+{ 0x1, 73, 1, 2534 },
+{ 0x1, 74, 0, 2533 },
+{ 0x3, 67, 1, 2532 },
+{ 0x3, 68, 1, 2531 },
+{ 0x3, 69, 1, 2530 },
+{ 0x3, 70, 1, 2529 },
+{ 0x3, 71, 1, 2528 },
+{ 0x3, 72, 1, 2527 },
+{ 0x3, 73, 1, 2526 },
+{ 0x3, 74, 0, 2525 },
+{ 0x28, 95, 1, 2388 },
+{ 0x44, 96, 1, 2383 },
+{ 0x88, 96, 1, 2387 },
+{ 0x44, 97, 1, 2382 },
+{ 0x88, 97, 1, 2386 },
+{ 0x44, 98, 1, 2381 },
+{ 0x88, 98, 1, 2385 },
+{ 0x28, 99, 0, 2384 },
+{ 0x68, 95, 1, 2244 },
+{ 0x188, 96, 1, 2243 },
+{ 0x188, 97, 1, 2242 },
+{ 0x188, 98, 1, 2241 },
+{ 0x38, 118, 1, 2240 },
+{ 0x38, 119, 1, 2239 },
+{ 0x38, 120, 1, 2238 },
+{ 0x38, 121, 0, 2237 },
+{ 0x18, 95, 1, 2548 },
+{ 0x14, 96, 1, 2543 },
+{ 0x28, 96, 1, 2547 },
+{ 0x14, 97, 1, 2542 },
+{ 0x28, 97, 1, 2546 },
+{ 0x14, 98, 1, 2541 },
+{ 0x28, 98, 1, 2545 },
+{ 0x18, 99, 0, 2544 },
+{ 0x14, 95, 1, 2396 },
+{ 0x24, 96, 1, 2395 },
+{ 0x48, 96, 1, 2391 },
+{ 0x24, 97, 1, 2394 },
+{ 0x48, 97, 1, 2390 },
+{ 0x24, 98, 1, 2393 },
+{ 0x48, 98, 1, 2389 },
+{ 0x14, 99, 0, 2392 },
+{ 0x34, 95, 1, 2252 },
+{ 0x64, 96, 1, 2251 },
+{ 0x64, 97, 1, 2250 },
+{ 0x64, 98, 1, 2249 },
+{ 0x1c, 118, 1, 2248 },
+{ 0x1c, 119, 1, 2247 },
+{ 0x1c, 120, 1, 2246 },
+{ 0x1c, 121, 0, 2245 },
+{ 0xc, 95, 1, 2556 },
+{ 0xc, 96, 1, 2555 },
+{ 0x18, 96, 1, 2551 },
+{ 0xc, 97, 1, 2554 },
+{ 0x18, 97, 1, 2550 },
+{ 0xc, 98, 1, 2553 },
+{ 0x18, 98, 1, 2549 },
+{ 0xc, 99, 0, 2552 },
+{ 0xa, 95, 1, 2404 },
+{ 0x11, 96, 1, 2399 },
+{ 0x22, 96, 1, 2403 },
+{ 0x11, 97, 1, 2398 },
+{ 0x22, 97, 1, 2402 },
+{ 0x11, 98, 1, 2397 },
+{ 0x22, 98, 1, 2401 },
+{ 0xa, 99, 0, 2400 },
+{ 0x1a, 95, 1, 2260 },
+{ 0x62, 96, 1, 2259 },
+{ 0x62, 97, 1, 2258 },
+{ 0x62, 98, 1, 2257 },
+{ 0xe, 118, 1, 2256 },
+{ 0xe, 119, 1, 2255 },
+{ 0xe, 120, 1, 2254 },
+{ 0xe, 121, 0, 2253 },
+{ 0x6, 95, 1, 2564 },
+{ 0x5, 96, 1, 2559 },
+{ 0xa, 96, 1, 2563 },
+{ 0x5, 97, 1, 2558 },
+{ 0xa, 97, 1, 2562 },
+{ 0x5, 98, 1, 2557 },
+{ 0xa, 98, 1, 2561 },
+{ 0x6, 99, 0, 2560 },
+{ 0x5, 95, 1, 2412 },
+{ 0x9, 96, 1, 2411 },
+{ 0x12, 96, 1, 2407 },
+{ 0x9, 97, 1, 2410 },
+{ 0x12, 97, 1, 2406 },
+{ 0x9, 98, 1, 2409 },
+{ 0x12, 98, 1, 2405 },
+{ 0x5, 99, 0, 2408 },
+{ 0xd, 95, 1, 2268 },
+{ 0x19, 96, 1, 2267 },
+{ 0x19, 97, 1, 2266 },
+{ 0x19, 98, 1, 2265 },
+{ 0x7, 118, 1, 2264 },
+{ 0x7, 119, 1, 2263 },
+{ 0x7, 120, 1, 2262 },
+{ 0x7, 121, 0, 2261 },
+{ 0x3, 95, 1, 2572 },
+{ 0x3, 96, 1, 2571 },
+{ 0x6, 96, 1, 2567 },
+{ 0x3, 97, 1, 2570 },
+{ 0x6, 97, 1, 2566 },
+{ 0x3, 98, 1, 2569 },
+{ 0x6, 98, 1, 2565 },
+{ 0x3, 99, 0, 2568 },
+{ 0x28, 62, 1, 2420 },
+{ 0x44, 63, 1, 2415 },
+{ 0x88, 63, 1, 2419 },
+{ 0x44, 64, 1, 2414 },
+{ 0x88, 64, 1, 2418 },
+{ 0x44, 65, 1, 2413 },
+{ 0x88, 65, 1, 2417 },
+{ 0x28, 66, 0, 2416 },
+{ 0x68, 62, 1, 2276 },
+{ 0x188, 63, 1, 2275 },
+{ 0x188, 64, 1, 2274 },
+{ 0x188, 65, 1, 2273 },
+{ 0x38, 81, 1, 2272 },
+{ 0x38, 82, 1, 2271 },
+{ 0x38, 83, 1, 2270 },
+{ 0x38, 84, 0, 2269 },
+{ 0x18, 62, 1, 2580 },
+{ 0x14, 63, 1, 2575 },
+{ 0x28, 63, 1, 2579 },
+{ 0x14, 64, 1, 2574 },
+{ 0x28, 64, 1, 2578 },
+{ 0x14, 65, 1, 2573 },
+{ 0x28, 65, 1, 2577 },
+{ 0x18, 66, 0, 2576 },
+{ 0x14, 62, 1, 2428 },
+{ 0x24, 63, 1, 2427 },
+{ 0x48, 63, 1, 2423 },
+{ 0x24, 64, 1, 2426 },
+{ 0x48, 64, 1, 2422 },
+{ 0x24, 65, 1, 2425 },
+{ 0x48, 65, 1, 2421 },
+{ 0x14, 66, 0, 2424 },
+{ 0x34, 62, 1, 2284 },
+{ 0x64, 63, 1, 2283 },
+{ 0x64, 64, 1, 2282 },
+{ 0x64, 65, 1, 2281 },
+{ 0x1c, 81, 1, 2280 },
+{ 0x1c, 82, 1, 2279 },
+{ 0x1c, 83, 1, 2278 },
+{ 0x1c, 84, 0, 2277 },
+{ 0xc, 62, 1, 2588 },
+{ 0xc, 63, 1, 2587 },
+{ 0x18, 63, 1, 2583 },
+{ 0xc, 64, 1, 2586 },
+{ 0x18, 64, 1, 2582 },
+{ 0xc, 65, 1, 2585 },
+{ 0x18, 65, 1, 2581 },
+{ 0xc, 66, 0, 2584 },
+{ 0xa, 62, 1, 2436 },
+{ 0x11, 63, 1, 2431 },
+{ 0x22, 63, 1, 2435 },
+{ 0x11, 64, 1, 2430 },
+{ 0x22, 64, 1, 2434 },
+{ 0x11, 65, 1, 2429 },
+{ 0x22, 65, 1, 2433 },
+{ 0xa, 66, 0, 2432 },
+{ 0x1a, 62, 1, 2292 },
+{ 0x62, 63, 1, 2291 },
+{ 0x62, 64, 1, 2290 },
+{ 0x62, 65, 1, 2289 },
+{ 0xe, 81, 1, 2288 },
+{ 0xe, 82, 1, 2287 },
+{ 0xe, 83, 1, 2286 },
+{ 0xe, 84, 0, 2285 },
+{ 0x6, 62, 1, 2596 },
+{ 0x5, 63, 1, 2591 },
+{ 0xa, 63, 1, 2595 },
+{ 0x5, 64, 1, 2590 },
+{ 0xa, 64, 1, 2594 },
+{ 0x5, 65, 1, 2589 },
+{ 0xa, 65, 1, 2593 },
+{ 0x6, 66, 0, 2592 },
+{ 0x5, 62, 1, 2444 },
+{ 0x9, 63, 1, 2443 },
+{ 0x12, 63, 1, 2439 },
+{ 0x9, 64, 1, 2442 },
+{ 0x12, 64, 1, 2438 },
+{ 0x9, 65, 1, 2441 },
+{ 0x12, 65, 1, 2437 },
+{ 0x5, 66, 0, 2440 },
+{ 0xd, 62, 1, 2300 },
+{ 0x19, 63, 1, 2299 },
+{ 0x19, 64, 1, 2298 },
+{ 0x19, 65, 1, 2297 },
+{ 0x7, 81, 1, 2296 },
+{ 0x7, 82, 1, 2295 },
+{ 0x7, 83, 1, 2294 },
+{ 0x7, 84, 0, 2293 },
+{ 0x3, 62, 1, 2604 },
+{ 0x3, 63, 1, 2603 },
+{ 0x6, 63, 1, 2599 },
+{ 0x3, 64, 1, 2602 },
+{ 0x6, 64, 1, 2598 },
+{ 0x3, 65, 1, 2601 },
+{ 0x6, 65, 1, 2597 },
+{ 0x3, 66, 0, 2600 },
+{ 0x8, 86, 1, 2468 },
+{ 0x8, 87, 1, 2467 },
+{ 0x2, 88, 1, 2466 },
+{ 0x2, 89, 1, 2465 },
+{ 0x2, 90, 1, 2464 },
+{ 0x2, 91, 1, 2463 },
+{ 0x2, 92, 1, 2462 },
+{ 0x2, 93, 0, 2461 },
+{ 0x18, 86, 1, 2460 },
+{ 0x18, 87, 1, 2459 },
+{ 0x6, 88, 1, 2458 },
+{ 0x6, 89, 1, 2457 },
+{ 0x6, 90, 1, 2456 },
+{ 0x6, 91, 1, 2455 },
+{ 0x6, 92, 1, 2454 },
+{ 0x6, 93, 0, 2453 },
+{ 0x14, 86, 1, 2448 },
+{ 0x22, 87, 1, 2445 },
+{ 0x44, 87, 1, 2447 },
+{ 0xa, 94, 0, 2446 },
+{ 0x34, 86, 1, 2304 },
+{ 0xc4, 87, 1, 2303 },
+{ 0x38, 93, 1, 2301 },
+{ 0xe, 117, 0, 2302 },
+{ 0xc, 86, 1, 2608 },
+{ 0xa, 87, 1, 2605 },
+{ 0x14, 87, 1, 2607 },
+{ 0x6, 94, 0, 2606 },
+{ 0x2, 86, 1, 2316 },
+{ 0x2, 87, 1, 2315 },
+{ 0x4, 92, 1, 2314 },
+{ 0x4, 93, 0, 2313 },
+{ 0x12, 86, 1, 2312 },
+{ 0x42, 87, 1, 2311 },
+{ 0xc, 92, 1, 2310 },
+{ 0xc, 93, 0, 2309 },
+{ 0xa, 86, 1, 2452 },
+{ 0x12, 87, 1, 2451 },
+{ 0x24, 87, 1, 2449 },
+{ 0x5, 94, 0, 2450 },
+{ 0x1a, 86, 1, 2308 },
+{ 0x32, 87, 1, 2307 },
+{ 0x34, 93, 1, 2305 },
+{ 0x7, 117, 0, 2306 },
+{ 0x6, 86, 1, 2612 },
+{ 0x6, 87, 1, 2611 },
+{ 0xc, 87, 1, 2609 },
+{ 0x3, 94, 0, 2610 },
+{ 0x1, 86, 1, 2628 },
+{ 0x1, 87, 1, 2627 },
+{ 0x1, 88, 1, 2626 },
+{ 0x1, 89, 1, 2625 },
+{ 0x1, 90, 1, 2624 },
+{ 0x1, 91, 1, 2623 },
+{ 0x1, 92, 1, 2622 },
+{ 0x1, 93, 0, 2621 },
+{ 0x3, 86, 1, 2620 },
+{ 0x3, 87, 1, 2619 },
+{ 0x3, 88, 1, 2618 },
+{ 0x3, 89, 1, 2617 },
+{ 0x3, 90, 1, 2616 },
+{ 0x3, 91, 1, 2615 },
+{ 0x3, 92, 1, 2614 },
+{ 0x3, 93, 0, 2613 },
+{ 0x8, 53, 1, 2492 },
+{ 0x8, 54, 1, 2491 },
+{ 0x2, 55, 1, 2490 },
+{ 0x2, 56, 1, 2489 },
+{ 0x2, 57, 1, 2488 },
+{ 0x2, 58, 1, 2487 },
+{ 0x2, 59, 1, 2486 },
+{ 0x2, 60, 0, 2485 },
+{ 0x18, 53, 1, 2484 },
+{ 0x18, 54, 1, 2483 },
+{ 0x6, 55, 1, 2482 },
+{ 0x6, 56, 1, 2481 },
+{ 0x6, 57, 1, 2480 },
+{ 0x6, 58, 1, 2479 },
+{ 0x6, 59, 1, 2478 },
+{ 0x6, 60, 0, 2477 },
+{ 0x14, 53, 1, 2472 },
+{ 0x22, 54, 1, 2469 },
+{ 0x44, 54, 1, 2471 },
+{ 0xa, 61, 0, 2470 },
+{ 0x34, 53, 1, 2320 },
+{ 0xc4, 54, 1, 2319 },
+{ 0x38, 60, 1, 2317 },
+{ 0xe, 80, 0, 2318 },
+{ 0xc, 53, 1, 2632 },
+{ 0xa, 54, 1, 2629 },
+{ 0x14, 54, 1, 2631 },
+{ 0x6, 61, 0, 2630 },
+{ 0x2, 53, 1, 2332 },
+{ 0x2, 54, 1, 2331 },
+{ 0x4, 59, 1, 2330 },
+{ 0x4, 60, 0, 2329 },
+{ 0x12, 53, 1, 2328 },
+{ 0x42, 54, 1, 2327 },
+{ 0xc, 59, 1, 2326 },
+{ 0xc, 60, 0, 2325 },
+{ 0xa, 53, 1, 2476 },
+{ 0x12, 54, 1, 2475 },
+{ 0x24, 54, 1, 2473 },
+{ 0x5, 61, 0, 2474 },
+{ 0x1a, 53, 1, 2324 },
+{ 0x32, 54, 1, 2323 },
+{ 0x34, 60, 1, 2321 },
+{ 0x7, 80, 0, 2322 },
+{ 0x6, 53, 1, 2636 },
+{ 0x6, 54, 1, 2635 },
+{ 0xc, 54, 1, 2633 },
+{ 0x3, 61, 0, 2634 },
+{ 0x1, 53, 1, 2652 },
+{ 0x1, 54, 1, 2651 },
+{ 0x1, 55, 1, 2650 },
+{ 0x1, 56, 1, 2649 },
+{ 0x1, 57, 1, 2648 },
+{ 0x1, 58, 1, 2647 },
+{ 0x1, 59, 1, 2646 },
+{ 0x1, 60, 0, 2645 },
+{ 0x3, 53, 1, 2644 },
+{ 0x3, 54, 1, 2643 },
+{ 0x3, 55, 1, 2642 },
+{ 0x3, 56, 1, 2641 },
+{ 0x3, 57, 1, 2640 },
+{ 0x3, 58, 1, 2639 },
+{ 0x3, 59, 1, 2638 },
+{ 0x3, 60, 0, 2637 },
+{ 0x1, 4, 0, 2653 },
+{ 0x1, 296, 0, 2654 },
+{ 0x1, 379, 0, 2655 },
+{ 0x1, 374, 0, 2656 },
+{ 0x2, 358, 0, 2657 },
+{ 0x1, 358, 0, 2660 },
+{ 0x2, 357, 0, 2658 },
+{ 0x1, 357, 0, 2661 },
+{ 0x2, 356, 0, 2659 },
+{ 0x1, 356, 0, 2662 },
+{ 0x1, 355, 0, 2663 },
+{ 0x1, 354, 0, 2664 },
+{ 0x2, 353, 0, 2665 },
+{ 0x1, 353, 0, 2667 },
+{ 0x2, 352, 0, 2666 },
+{ 0x1, 352, 0, 2668 },
+{ 0x1, 382, 0, 2675 },
+{ 0x8, 381, 0, 2669 },
+{ 0x4, 381, 0, 2671 },
+{ 0x2, 381, 0, 2673 },
+{ 0x1, 381, 0, 2676 },
+{ 0x8, 380, 0, 2670 },
+{ 0x4, 380, 0, 2672 },
+{ 0x2, 380, 0, 2674 },
+{ 0x1, 380, 0, 2677 },
+{ 0x1, 351, 0, 2684 },
+{ 0x8, 350, 0, 2678 },
+{ 0x4, 350, 0, 2680 },
+{ 0x2, 350, 0, 2682 },
+{ 0x1, 350, 0, 2685 },
+{ 0x8, 349, 0, 2679 },
+{ 0x4, 349, 0, 2681 },
+{ 0x2, 349, 1, 2683 },
+{ 0x4, 143, 0, 1377 },
+{ 0x1, 349, 0, 2686 },
+{ 0x1, 6, 0, 2687 },
+{ 0x1, 7, 0, 2688 },
+{ 0x1, 295, 0, 2689 },
+{ 0x1, 456, 0, 2690 },
+{ 0x1, 346, 0, 2691 },
+{ 0x1, 13, 0, 2692 },
+{ 0x1, 11, 0, 2693 },
+{ 0x1, 422, 0, 2694 },
+{ 0x1, 394, 0, 2695 },
+{ 0x1, 393, 0, 2696 },
+{ 0x1, 455, 0, 2697 },
+{ 0x1, 345, 0, 2698 },
+{ 0x1, 12, 0, 2699 },
+{ 0x1, 10, 0, 2700 },
+{ 0x1, 5, 0, 2701 },
+{ 0x1, 421, 0, 2702 },
+{ 0x1, 420, 0, 2703 },
+{ 0x1, 1, 0, 2704 },
+{ 0x1, 0, 0, 2705 },
};
Modified: branches/binutils/package/opcodes/ia64-gen.c
===================================================================
--- branches/binutils/package/opcodes/ia64-gen.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-gen.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* ia64-gen.c -- Generate a shrunk set of opcode tables
- Copyright 1999, 2000, 2001, 2002, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
Free Software Foundation, Inc.
Written by Bob Manson, Cygnus Solutions, <manson at cygnus.com>
@@ -1409,6 +1409,8 @@
return 44;
else if (strstr (name, ".ia"))
return 45;
+ else if (strstr (name, ".vm"))
+ return 46;
else
abort ();
default:
@@ -1569,7 +1571,20 @@
rdeps[i]->name, specifier,
(int)rdeps[i]->mode, (int)rdeps[i]->semantics, regindex);
if (rdeps[i]->semantics == IA64_DVS_OTHER)
- printf ("\"%s\", ", rdeps[i]->extra);
+ {
+ const char *quote, *rest;
+
+ putchar ('\"');
+ rest = rdeps[i]->extra;
+ quote = strchr (rest, '\"');
+ while (quote != NULL)
+ {
+ printf ("%.*s\\\"", (int) (quote - rest), rest);
+ rest = quote + 1;
+ quote = strchr (rest, '\"');
+ }
+ printf ("%s\", ", rest);
+ }
else
printf ("NULL, ");
printf("},\n");
Modified: branches/binutils/package/opcodes/ia64-ic.tbl
===================================================================
--- branches/binutils/package/opcodes/ia64-ic.tbl 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-ic.tbl 2006-04-19 08:33:31 UTC (rev 12)
@@ -20,10 +20,10 @@
fpcmp-s1; fpcmp[Field(sf)==s1]
fpcmp-s2; fpcmp[Field(sf)==s2]
fpcmp-s3; fpcmp[Field(sf)==s3]
-fr-readers; IC:fp-arith, IC:fp-non-arith, IC:pr-writers-fp, chk.s[Format in {M21}], getf, IC:mem-writers-fp
+fr-readers; IC:fp-arith, IC:fp-non-arith, IC:mem-writers-fp, IC:pr-writers-fp, chk.s[Format in {M21}], getf
fr-writers; IC:fp-arith, IC:fp-non-arith\fclass, IC:mem-readers-fp, setf
gr-readers; IC:gr-readers-writers, IC:mem-readers, IC:mem-writers, chk.s, cmp, cmp4, fc, itc.i, itc.d, itr.i, itr.d, IC:mov-to-AR-gr, IC:mov-to-BR, IC:mov-to-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-to-PR-allreg, IC:mov-to-PSR-l, IC:mov-to-PSR-um, IC:probe-all, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, setf, tbit, tnat
-gr-readers-writers; IC:mov-from-IND, add, addl, addp4, adds, and, andcm, IC:czx, dep\dep[Format in {I13}], extr, IC:mem-readers-int, IC:ld-all-postinc, IC:lfetch-postinc, IC:mix, IC:mux, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-nofault, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, shl, shladd, shladdp4, shr, shrp, IC:st-postinc, sub, IC:sxt, tak, thash, tpa, ttag, IC:unpack, xor, IC:zxt
+gr-readers-writers; IC:mov-from-IND, add, addl, addp4, adds, and, andcm, clz, IC:czx, dep\dep[Format in {I13}], extr, IC:mem-readers-int, IC:ld-all-postinc, IC:lfetch-postinc, IC:mix, IC:mux, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-nofault, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, shl, shladd, shladdp4, shr, shrp, shrp4, IC:st-postinc, sub, IC:sxt, tak, thash, tpa, ttag, IC:unpack, xor, IC:zxt
gr-writers; alloc, dep, getf, IC:gr-readers-writers, IC:mem-readers-int, IC:mov-from-AR, IC:mov-from-BR, IC:mov-from-CR, IC:mov-from-PR, IC:mov-from-PSR, IC:mov-from-PSR-um, IC:mov-ip, movl
indirect-brp; brp[Format in {B7}]
indirect-brs; br.call[Format in {B5}], br.cond[Format in {B4}], br.ia, br.ret
@@ -127,8 +127,9 @@
mov-from-IND-PKR; IC:mov-from-IND[Field(ireg) == pkr]
mov-from-IND-PMC; IC:mov-from-IND[Field(ireg) == pmc]
mov-from-IND-PMD; IC:mov-from-IND[Field(ireg) == pmd]
-mov-from-IND-priv; IC:mov-from-IND[Field(ireg) in {dbr ibr msr pkr pmc rr}]
+mov-from-IND-priv; IC:mov-from-IND[Field(ireg) in {dbr ibr pkr pmc rr}]
mov-from-IND-RR; IC:mov-from-IND[Field(ireg) == rr]
+mov-from-interruption-CR; IC:mov-from-CR-ITIR, IC:mov-from-CR-IFS, IC:mov-from-CR-IIM, IC:mov-from-CR-IIP, IC:mov-from-CR-IPSR, IC:mov-from-CR-ISR, IC:mov-from-CR-IFA, IC:mov-from-CR-IHA, IC:mov-from-CR-IIPA
mov-from-PR; mov_pr[Format in {I25}]
mov-from-PSR; mov_psr[Format in {M36}]
mov-from-PSR-um; mov_um[Format in {M36}]
@@ -194,12 +195,14 @@
mov-to-IND-PMD; IC:mov-to-IND[Field(ireg) == pmd]
mov-to-IND-priv; IC:mov-to-IND
mov-to-IND-RR; IC:mov-to-IND[Field(ireg) == rr]
+mov-to-interruption-CR; IC:mov-to-CR-ITIR, IC:mov-to-CR-IFS, IC:mov-to-CR-IIM, IC:mov-to-CR-IIP, IC:mov-to-CR-IPSR, IC:mov-to-CR-ISR, IC:mov-to-CR-IFA, IC:mov-to-CR-IHA, IC:mov-to-CR-IIPA
mov-to-PR; IC:mov-to-PR-allreg, IC:mov-to-PR-rotreg
mov-to-PR-allreg; mov_pr[Format in {I23}]
mov-to-PR-rotreg; mov_pr[Format in {I24}]
mov-to-PSR-l; mov_psr[Format in {M35}]
mov-to-PSR-um; mov_um[Format in {M35}]
mux; mux1, mux2
+non-access; fc, lfetch, IC:probe-all, tpa, tak
none; -
pack; pack2, pack4
padd; padd1, padd2, padd4
@@ -212,19 +215,19 @@
pmpyshr; pmpyshr2
pr-and-writers; IC:pr-gen-writers-int[Field(ctype) in {and andcm}], IC:pr-gen-writers-int[Field(ctype) in {or.andcm and.orcm}]
pr-gen-writers-fp; fclass, fcmp
-pr-gen-writers-int; cmp, cmp4, tbit, tnat
+pr-gen-writers-int; cmp, cmp4, tbit, tf, tnat
pr-norm-writers-fp; IC:pr-gen-writers-fp[Field(ctype)==]
pr-norm-writers-int; IC:pr-gen-writers-int[Field(ctype)==]
pr-or-writers; IC:pr-gen-writers-int[Field(ctype) in {or orcm}], IC:pr-gen-writers-int[Field(ctype) in {or.andcm and.orcm}]
pr-readers-br; br.call, br.cond, brl.call, brl.cond, br.ret, br.wexit, br.wtop, break.b, hint.b, nop.b, IC:ReservedBQP
-pr-readers-nobr-nomovpr; add, addl, addp4, adds, and, andcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, IC:czx, dep, extr, IC:fp-arith, IC:fp-non-arith, fc, fchkf, fclrf, fcmp, IC:fetchadd, fpcmp, fsetc, fwb, getf, hint.f, hint.i, hint.m, hint.x, IC:invala-all, itc.i, itc.d, itr.i, itr.d, IC:ld, IC:ldf, IC:ldfp, IC:lfetch-all, mf, IC:mix, IC:mov-from-AR-M, IC:mov-from-AR-IM, IC:mov-from-AR-I, IC:mov-to-AR-M, IC:mov-to-AR-I, IC:mov-to-AR-IM, IC:mov-to-BR, IC:mov-from-BR, IC:mov-to-CR, IC:mov-from-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-ip, IC:mov-to-PSR-l, IC:mov-to-PSR-um, IC:mov-from-PSR, IC:mov-from-PSR-um, movl, IC:mux, nop.f, nop.i, nop.m, nop.x, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-all, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.d, ptr.i, IC:ReservedQP, rsm, setf, shl, shladd, shladdp4, shr, shrp, srlz.i, srlz.d, ssm, IC:st, IC:stf, sub, sum, IC:sxt, sync, tak, tbit, thash, tnat, tpa, ttag, IC:unpack, IC:xchg, xma, xmpy, xor, IC:zxt
+pr-readers-nobr-nomovpr; add, addl, addp4, adds, and, andcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, clz, IC:czx, dep, extr, IC:fp-arith, IC:fp-non-arith, fc, fchkf, fclrf, fcmp, IC:fetchadd, fpcmp, fsetc, fwb, getf, hint.f, hint.i, hint.m, hint.x, IC:invala-all, itc.i, itc.d, itr.i, itr.d, IC:ld, IC:ldf, IC:ldfp, IC:lfetch-all, mf, IC:mix, IC:mov-from-AR-M, IC:mov-from-AR-IM, IC:mov-from-AR-I, IC:mov-to-AR-M, IC:mov-to-AR-I, IC:mov-to-AR-IM, IC:mov-to-BR, IC:mov-from-BR, IC:mov-to-CR, IC:mov-from-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-ip, IC:mov-to-PSR-l, IC:mov-to-PSR-um, IC:mov-from-PSR, IC:mov-from-PSR-um, movl, IC:mux, nop.f, nop.i, nop.m, nop.x, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-all, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.d, ptr.i, IC:ReservedQP, rsm, setf, shl, shladd, shladdp4, shr, shrp, shrp4, srlz.i, srlz.d, ssm, IC:st, IC:stf, sub, sum, IC:sxt, sync, tak, tbit, tf, thash, tnat, tpa, ttag, IC:unpack, IC:xchg, xma, xmpy, xor, IC:zxt
pr-unc-writers-fp; IC:pr-gen-writers-fp[Field(ctype)==unc]+11, fprcpa+11, fprsqrta+11, frcpa+11, frsqrta+11
pr-unc-writers-int; IC:pr-gen-writers-int[Field(ctype)==unc]+11
pr-writers; IC:pr-writers-int, IC:pr-writers-fp
pr-writers-fp; IC:pr-norm-writers-fp, IC:pr-unc-writers-fp
pr-writers-int; IC:pr-norm-writers-int, IC:pr-unc-writers-int, IC:pr-and-writers, IC:pr-or-writers
predicatable-instructions; IC:mov-from-PR, IC:mov-to-PR, IC:pr-readers-br, IC:pr-readers-nobr-nomovpr
-priv-ops; IC:mov-to-IND-priv, bsw, itc.i, itc.d, itr.i, itr.d, IC:mov-to-CR, IC:mov-from-CR, IC:mov-to-PSR-l, IC:mov-from-PSR, IC:mov-from-IND-priv, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, rfi, rsm, ssm, tak, tpa
+priv-ops; IC:mov-to-IND-priv, bsw, itc.i, itc.d, itr.i, itr.d, IC:mov-to-CR, IC:mov-from-CR, IC:mov-to-PSR-l, IC:mov-from-PSR, IC:mov-from-IND-priv, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, rfi, rsm, ssm, tak, tpa, vmsw
probe-all; IC:probe-fault, IC:probe-nofault
probe-fault; probe[Format in {M40}]
probe-nofault; probe[Format in {M38 M39}]
@@ -244,7 +247,7 @@
sxt; sxt1, sxt2, sxt4
sys-mask-writers-partial; rsm, ssm
unpack; unpack1, unpack2, unpack4
-unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, br.ia, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi
+unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, br.ia, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi, vmsw
user-mask-writers-partial; rum, sum
xchg; xchg1, xchg2, xchg4, xchg8
zxt; zxt1, zxt2, zxt4
Modified: branches/binutils/package/opcodes/ia64-opc-b.c
===================================================================
--- branches/binutils/package/opcodes/ia64-opc-b.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-opc-b.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* ia64-opc-b.c -- IA-64 `B' opcode table.
- Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
This file is part of GDB, GAS, and the GNU binutils.
@@ -197,6 +198,8 @@
{"bsw.0", B0, OpX6 (0, 0x0c), {0, }, NO_PRED | LAST | PRIV, 0, NULL},
{"bsw.1", B0, OpX6 (0, 0x0d), {0, }, NO_PRED | LAST | PRIV, 0, NULL},
{"epc", B0, OpX6 (0, 0x10), {0, }, NO_PRED, 0, NULL},
+ {"vmsw.0", B0, OpX6 (0, 0x18), {0, }, NO_PRED | PRIV, 0, NULL},
+ {"vmsw.1", B0, OpX6 (0, 0x19), {0, }, NO_PRED | PRIV, 0, NULL},
{"break.b", B0, OpX6 (0, 0x00), {IMMU21}, EMPTY},
Modified: branches/binutils/package/opcodes/ia64-opc-i.c
===================================================================
--- branches/binutils/package/opcodes/ia64-opc-i.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-opc-i.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* ia64-opc-i.c -- IA-64 `I' opcode table.
- Copyright 1998, 1999, 2000, 2002, 2005 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
This file is part of GDB, GAS, and the GNU binutils.
@@ -36,6 +37,7 @@
#define bWh(x) (((ia64_insn) ((x) & 0x3)) << 20)
#define bX(x) (((ia64_insn) ((x) & 0x1)) << 33)
#define bXb(x) (((ia64_insn) ((x) & 0x1)) << 22)
+#define bXc(x) (((ia64_insn) ((x) & 0x1)) << 19)
#define bX2(x) (((ia64_insn) ((x) & 0x3)) << 34)
#define bX2a(x) (((ia64_insn) ((x) & 0x3)) << 34)
#define bX2b(x) (((ia64_insn) ((x) & 0x3)) << 28)
@@ -58,6 +60,7 @@
#define mWh bWh (-1)
#define mX bX (-1)
#define mXb bXb (-1)
+#define mXc bXc (-1)
#define mX2 bX2 (-1)
#define mX2a bX2a (-1)
#define mX2b bX2b (-1)
@@ -83,6 +86,9 @@
#define OpX2TaTbYaC(a,b,c,d,e,f) \
(bOp (a) | bX2 (b) | bTa (c) | bTb (d) | bYa (e) | bC (f)), \
(mOp | mX2 | mTa | mTb | mYa | mC)
+#define OpX2TaTbYaXcC(a,b,c,d,e,f,g) \
+ (bOp (a) | bX2 (b) | bTa (c) | bTb (d) | bYa (e) | bXc (f) | bC (g)), \
+ (mOp | mX2 | mTa | mTb | mYa | mXc | mC)
#define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3)
#define OpX3X6(a,b,c) (bOp (a) | bX3 (b) | bX6(c)), \
(mOp | mX3 | mX6)
@@ -164,6 +170,28 @@
{"dep.z", I, OpX2XYb (5, 1, 1, 0), {R1, R2, CPOS6a, LEN6}, EMPTY},
{"dep.z", I, OpX2XYb (5, 1, 1, 1), {R1, IMM8, CPOS6a, LEN6}, EMPTY},
{"dep", I, OpX2X (5, 3, 1), {R1, IMM1, R3, CPOS6b, LEN6}, EMPTY},
+#define TF(a,b,c) \
+ I2, OpX2TaTbYaXcC (5, 0, a, b, 1, 1, c), {P1, P2, IMMU5b}, EMPTY
+#define TFCM(a,b,c) \
+ I2, OpX2TaTbYaXcC (5, 0, a, b, 1, 1, c), {P2, P1, IMMU5b}, PSEUDO, 0, NULL
+ {"tf.z", TF (0, 0, 0)},
+ {"tf.nz", TFCM (0, 0, 0)},
+ {"tf.z.unc", TF (0, 0, 1)},
+ {"tf.nz.unc", TFCM (0, 0, 1)},
+ {"tf.z.and", TF (0, 1, 0)},
+ {"tf.nz.andcm", TFCM (0, 1, 0)},
+ {"tf.nz.and", TF (0, 1, 1)},
+ {"tf.z.andcm", TFCM (0, 1, 1)},
+ {"tf.z.or", TF (1, 0, 0)},
+ {"tf.nz.orcm", TFCM (1, 0, 0)},
+ {"tf.nz.or", TF (1, 0, 1)},
+ {"tf.z.orcm", TFCM (1, 0, 1)},
+ {"tf.z.or.andcm", TF (1, 1, 0)},
+ {"tf.nz.and.orcm", TFCM (1, 1, 0)},
+ {"tf.nz.or.andcm", TF (1, 1, 1)},
+ {"tf.z.and.orcm", TFCM (1, 1, 1)},
+#undef TF
+#undef TFCM
#define TBIT(a,b,c,d) \
I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P1, P2, R3, POS6}, EMPTY
#define TBITCM(a,b,c,d) \
Modified: branches/binutils/package/opcodes/ia64-opc.h
===================================================================
--- branches/binutils/package/opcodes/ia64-opc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-opc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,6 @@
/* ia64-opc.h -- IA-64 opcode table.
- Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2005, 2006
+ Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm at hpl.hp.com>
This file is part of GDB, GAS, and the GNU binutils.
@@ -112,6 +113,7 @@
#define IMMU24 IA64_OPND_IMMU24
#define IMMU62 IA64_OPND_IMMU62
#define IMMU64 IA64_OPND_IMMU64
+#define IMMU5b IA64_OPND_IMMU5b
#define IMMU7a IA64_OPND_IMMU7a
#define IMMU7b IA64_OPND_IMMU7b
#define IMMU9 IA64_OPND_IMMU9
Modified: branches/binutils/package/opcodes/ia64-raw.tbl
===================================================================
--- branches/binutils/package/opcodes/ia64-raw.tbl 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-raw.tbl 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,8 +2,8 @@
ALAT; chk.a.clr, IC:mem-readers-alat, IC:mem-writers, IC:invala-all; IC:mem-readers-alat, IC:mem-writers, IC:chk-a, invala.e; none
AR[BSP]; br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; br.call, brl.call, br.ia, br.ret, cover, flushrs, loadrs, IC:mov-from-AR-BSP, rfi; impliedF
AR[BSPSTORE]; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; alloc, br.ia, flushrs, IC:mov-from-AR-BSPSTORE; impliedF
+AR[CCV]; IC:mov-to-AR-CCV; br.ia, IC:cmpxchg, IC:mov-from-AR-CCV; impliedF
AR[CFLG]; IC:mov-to-AR-CFLG; br.ia, IC:mov-from-AR-CFLG; impliedF
-AR[CCV]; IC:mov-to-AR-CCV; br.ia, IC:cmpxchg, IC:mov-from-AR-CCV; impliedF
AR[CSD]; ld16, IC:mov-to-AR-CSD; br.ia, cmp8xchg16, IC:mov-from-AR-CSD, st16; impliedF
AR[EC]; IC:mod-sched-brs, br.ret, IC:mov-to-AR-EC; br.call, brl.call, br.ia, IC:mod-sched-brs, IC:mov-from-AR-EC; impliedF
AR[EFLAG]; IC:mov-to-AR-EFLAG; br.ia, IC:mov-from-AR-EFLAG; impliedF
@@ -44,7 +44,7 @@
CPUID#; IC:none; IC:mov-from-IND-CPUID+3; specific
CR[CMCV]; IC:mov-to-CR-CMCV; IC:mov-from-CR-CMCV; data
CR[DCR]; IC:mov-to-CR-DCR; IC:mov-from-CR-DCR, IC:mem-readers-spec; data
-CR[EOI]; IC:mov-to-CR-EOI; IC:none; SC Section 10.8.3.4
+CR[EOI]; IC:mov-to-CR-EOI; IC:none; SC Section 5.8.3.4, "End of External Interrupt Register (EOI Ð CR67)" on page 2:119
CR[GPTA]; IC:mov-to-CR-GPTA; IC:mov-from-CR-GPTA, thash; data
CR[IFA]; IC:mov-to-CR-IFA; itc.i, itc.d, itr.i, itr.d; implied
CR[IFA]; IC:mov-to-CR-IFA; IC:mov-from-CR-IFA; data
@@ -65,24 +65,25 @@
CR[ITM]; IC:mov-to-CR-ITM; IC:mov-from-CR-ITM; data
CR[ITV]; IC:mov-to-CR-ITV; IC:mov-from-CR-ITV; data
CR[IVA]; IC:mov-to-CR-IVA; IC:mov-from-CR-IVA; instr
-CR[IVR]; IC:none; IC:mov-from-CR-IVR; SC Section 10.8.3.2
-CR[LID]; IC:mov-to-CR-LID; IC:mov-from-CR-LID; SC Section 10.8.3.1
+CR[IVR]; IC:none; IC:mov-from-CR-IVR; SC Section 5.8.3.2, "External Interrupt Vector Register (IVR Ð CR65)" on page 2:118
+CR[LID]; IC:mov-to-CR-LID; IC:mov-from-CR-LID; SC Section 5.8.3.1, "Local ID (LID Ð CR64)" on page 2:117
CR[LRR%], % in 0 - 1; IC:mov-to-CR-LRR+1; IC:mov-from-CR-LRR+1; data
CR[PMV]; IC:mov-to-CR-PMV; IC:mov-from-CR-PMV; data
-CR[PTA]; IC:mov-to-CR-PTA; IC:mov-from-CR-PTA, thash; data
+CR[PTA]; IC:mov-to-CR-PTA; IC:mov-from-CR-PTA, IC:mem-readers, IC:mem-writers, IC:non-access, thash; data
CR[TPR]; IC:mov-to-CR-TPR; IC:mov-from-CR-TPR, IC:mov-from-CR-IVR; data
-CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-PSR-l, rfi, rsm, ssm; SC Section 10.8.3.3
+CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-PSR-l+17, ssm+17; SC Section 5.8.3.3, "Task Priority Register (TPR Ð CR66)" on page 2:119
+CR[TPR]; IC:mov-to-CR-TPR; rfi; implied
CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127; IC:none; IC:mov-from-CR-rv+1; none
DBR#; IC:mov-to-IND-DBR+3; IC:mov-from-IND-DBR+3; impliedF
DBR#; IC:mov-to-IND-DBR+3; IC:probe-all, IC:lfetch-all, IC:mem-readers, IC:mem-writers; data
-DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; IC:mem-readers, IC:mem-writers, fc, IC:probe-all, tak, tpa; data
+DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
DTC; itc.i, itc.d, itr.i, itr.d; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; impliedF
DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; none
DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; itc.i, itc.d, itr.i, itr.d; impliedF
DTC_LIMIT*; ptc.g, ptc.ga; ptc.g, ptc.ga; impliedF
-DTR; itr.d; IC:mem-readers, IC:mem-writers, fc, IC:probe-all, tak, tpa; data
+DTR; itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
DTR; itr.d; ptc.g, ptc.ga, ptc.l, ptr.d, itr.d; impliedF
-DTR; ptr.d; IC:mem-readers, IC:mem-writers, fc, IC:probe-all, tak, tpa; data
+DTR; ptr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
DTR; ptr.d; ptc.g, ptc.ga, ptc.l, ptr.d; none
DTR; ptr.d; itr.d, itc.d; impliedF
FR%, % in 0 - 1; IC:none; IC:fr-readers+1; none
@@ -96,17 +97,17 @@
InService*; IC:mov-from-CR-IVR; IC:mov-from-CR-IVR; impliedF
InService*; IC:mov-to-CR-EOI; IC:mov-to-CR-EOI; impliedF
IP; IC:all; IC:all; none
-ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; epc; instr
+ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; epc, vmsw; instr
ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; itc.i, itc.d, itr.i, itr.d; impliedF
ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; ptr.i, ptr.d, ptc.e, ptc.g, ptc.ga, ptc.l; none
-ITC; itc.i, itc.d, itr.i, itr.d; epc; instr
+ITC; itc.i, itc.d, itr.i, itr.d; epc, vmsw; instr
ITC; itc.i, itc.d, itr.i, itr.d; itc.d, itc.i, itr.d, itr.i, ptr.d, ptr.i, ptc.g, ptc.ga, ptc.l; impliedF
ITC_LIMIT*; ptc.g, ptc.ga; ptc.g, ptc.ga; impliedF
ITR; itr.i; itr.i, itc.i, ptc.g, ptc.ga, ptc.l, ptr.i; impliedF
-ITR; itr.i; epc; instr
+ITR; itr.i; epc, vmsw; instr
ITR; ptr.i; itc.i, itr.i; impliedF
ITR; ptr.i; ptc.g, ptc.ga, ptc.l, ptr.i; none
-ITR; ptr.i; epc; instr
+ITR; ptr.i; epc, vmsw; instr
memory; IC:mem-writers; IC:mem-readers; none
MSR#; IC:mov-to-IND-MSR+5; IC:mov-from-IND-MSR+5; specific
PKR#; IC:mov-to-IND-PKR+3; IC:mem-readers, IC:mem-writers, IC:mov-from-IND-PKR+4, IC:probe-all; data
@@ -114,7 +115,7 @@
PKR#; IC:mov-to-IND-PKR+3; IC:mov-from-IND-PKR+3; impliedF
PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMC+3; impliedF
-PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMD+3; SC+3 Section 12.1.1
+PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMD+3; SC Section 7.2.1, "Generic Performance Counter Registers" for PMC[0].fr on page 2:150
PMD#; IC:mov-to-IND-PMD+3; IC:mov-from-IND-PMD+3; impliedF
PR0; IC:pr-writers+1; IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR+12, IC:mov-to-PR+12; none
PR%, % in 1 - 15; IC:pr-writers+1, IC:mov-to-PR-allreg+7; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
@@ -127,56 +128,69 @@
PR63; IC:pr-writers-fp+1, IC:mod-sched-brs; IC:pr-readers-br+1; impliedF
PR63; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um; IC:mem-readers, IC:mem-writers; implied
-PSR.ac; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mem-readers, IC:mem-writers; data
-PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
+PSR.ac; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers; data
+PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
+PSR.ac; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um; IC:mem-readers, IC:mem-writers; implied
-PSR.be; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mem-readers, IC:mem-writers; data
-PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
+PSR.be; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers; data
+PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
+PSR.be; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
PSR.bn; bsw, rfi; IC:gr-readers+10, IC:gr-writers+10; impliedF
-PSR.cpl; epc, br.ret, rfi; IC:priv-ops, br.call, brl.call, epc, IC:mov-from-AR-ITC, IC:mov-to-AR-ITC, IC:mov-to-AR-RSC, IC:mov-to-AR-K, IC:mov-from-IND-PMD, IC:probe-all, IC:mem-readers, IC:mem-writers, IC:lfetch-all; implied
-PSR.da; rfi; IC:mem-readers, IC:lfetch-fault, IC:mem-writers, IC:probe-fault; data
-PSR.db; IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers, IC:probe-fault; data
+PSR.cpl; epc, br.ret; IC:priv-ops, br.call, brl.call, epc, IC:mov-from-AR-ITC, IC:mov-to-AR-ITC, IC:mov-to-AR-RSC, IC:mov-to-AR-K, IC:mov-from-IND-PMD, IC:probe-all, IC:mem-readers, IC:mem-writers, IC:lfetch-all; implied
+PSR.cpl; rfi; IC:priv-ops, br.call, brl.call, epc, IC:mov-from-AR-ITC, IC:mov-to-AR-ITC, IC:mov-to-AR-RSC, IC:mov-to-AR-K, IC:mov-from-IND-PMD, IC:probe-all, IC:mem-readers, IC:mem-writers, IC:lfetch-all; impliedF
+PSR.da; rfi; IC:mem-readers, IC:lfetch-all, IC:mem-writers, IC:probe-fault; impliedF
+PSR.db; IC:mov-to-PSR-l; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:probe-fault; data
PSR.db; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
-PSR.db; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:probe-fault; data
-PSR.dd; rfi; IC:mem-readers, IC:probe-fault, IC:mem-writers, IC:lfetch-fault; data
-PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:fr-readers+8, IC:fr-writers+8; data
-PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:fr-writers+8, IC:fr-readers+8; data
-PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; br.ia; data
-PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mem-readers, IC:mem-writers; data
-PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.ed; rfi; IC:lfetch-all, IC:mem-readers-spec; data
-PSR.i; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
-PSR.i; rfi; IC:mov-from-PSR; data
-PSR.ia; rfi; IC:none; none
-PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; cover, itc.i, itc.d, itr.i, itr.d, IC:mov-from-CR-ITIR, IC:mov-from-CR-IFS, IC:mov-from-CR-IIM, IC:mov-from-CR-IIP, IC:mov-from-CR-IPSR, IC:mov-from-CR-ISR, IC:mov-from-CR-IFA, IC:mov-from-CR-IHA, IC:mov-from-CR-IIPA, IC:mov-to-CR-ITIR, IC:mov-to-CR-IFS, IC:mov-to-CR-IIM, IC:mov-to-CR-IIP, IC:mov-to-CR-IPSR, IC:mov-to-CR-ISR, IC:mov-to-CR-IFA, IC:mov-to-CR-IHA, IC:mov-to-CR-IIPA; data
-PSR.id; rfi; IC:none; none
+PSR.db; rfi; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:probe-fault; impliedF
+PSR.dd; rfi; IC:lfetch-all, IC:mem-readers, IC:probe-fault, IC:mem-writers; impliedF
+PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:fr-readers+8, IC:fr-writers+8; data
+PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.dfh; rfi; IC:fr-readers+8, IC:fr-writers+8, IC:mov-from-PSR; impliedF
+PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:fr-writers+8, IC:fr-readers+8; data
+PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.dfl; rfi; IC:fr-writers+8, IC:fr-readers+8, IC:mov-from-PSR; impliedF
+PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; br.ia; data
+PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.di; rfi; br.ia, IC:mov-from-PSR; impliedF
+PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers, IC:non-access; data
+PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.dt; rfi; IC:mem-readers, IC:mem-writers, IC:non-access, IC:mov-from-PSR; impliedF
+PSR.ed; rfi; IC:lfetch-all, IC:mem-readers-spec; impliedF
+PSR.i; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
+PSR.ia; rfi; IC:all; none
+PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; cover, itc.i, itc.d, itr.i, itr.d, IC:mov-from-interruption-CR, IC:mov-to-interruption-CR; data
+PSR.ic; rfi; IC:mov-from-PSR, cover, itc.i, itc.d, itr.i, itr.d, IC:mov-from-interruption-CR, IC:mov-to-interruption-CR; impliedF
+PSR.id; rfi; IC:all; none
PSR.is; br.ia, rfi; IC:none; none
-PSR.it; rfi; IC:branches, IC:mov-from-PSR, chk, epc, fchkf; data
+PSR.it; rfi; IC:branches, IC:mov-from-PSR, chk, epc, fchkf, vmsw; impliedF
PSR.lp; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.lp; IC:mov-to-PSR-l; br.ret; data
-PSR.lp; rfi; IC:mov-from-PSR, br.ret; data
-PSR.mc; rfi; IC:mov-from-PSR; none
+PSR.lp; rfi; IC:mov-from-PSR, br.ret; impliedF
+PSR.mc; rfi; IC:mov-from-PSR; impliedF
PSR.mfh; IC:fr-writers+9, IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
PSR.mfl; IC:fr-writers+9, IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
-PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mem-readers, IC:mem-writers, IC:probe-all; data
-PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
+PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:probe-all; data
+PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.pk; rfi; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:probe-all; impliedF
PSR.pp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.ri; rfi; IC:none; none
+PSR.ri; rfi; IC:all; none
PSR.rt; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.rt; IC:mov-to-PSR-l; alloc, flushrs, loadrs; data
-PSR.rt; rfi; IC:mov-from-PSR, alloc, flushrs, loadrs; data
-PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-AR-ITC; data
-PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
-PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-IND-PMD, IC:mov-to-PSR-um, rum, sum; data
-PSR.ss; rfi; IC:all; data
-PSR.tb; IC:mov-to-PSR-l, rfi; IC:branches, chk, fchkf; data
-PSR.tb; IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
+PSR.rt; rfi; IC:mov-from-PSR, alloc, flushrs, loadrs; impliedF
+PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-AR-ITC; data
+PSR.si; rfi; IC:mov-from-AR-ITC, IC:mov-from-PSR; impliedF
+PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-IND-PMD, IC:mov-to-PSR-um, rum, sum; data
+PSR.sp; rfi; IC:mov-from-IND-PMD, IC:mov-from-PSR, IC:mov-to-PSR-um, rum, sum; impliedF
+PSR.ss; rfi; IC:all; impliedF
+PSR.tb; IC:mov-to-PSR-l; IC:branches, chk, fchkf; data
+PSR.tb; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
+PSR.tb; rfi; IC:branches, chk, fchkf, IC:mov-from-PSR; impliedF
PSR.up; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
-RR#; IC:mov-to-IND-RR+6; IC:mem-readers, IC:mem-writers, itc.i, itc.d, itr.i, itr.d, IC:probe-all, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, tak, thash, tpa, ttag; data
+PSR.vm; vmsw; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-IND-CPUID, IC:mov-to-AR-ITC, IC:priv-ops\vmsw, cover, thash, ttag; implied
+PSR.vm; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-IND-CPUID, IC:mov-to-AR-ITC, IC:priv-ops\vmsw, cover, thash, ttag; impliedF
+RR#; IC:mov-to-IND-RR+6; IC:mem-readers, IC:mem-writers, itc.i, itc.d, itr.i, itr.d, IC:non-access, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, thash, ttag; data
RR#; IC:mov-to-IND-RR+6; IC:mov-from-IND-RR+6; impliedF
RSE; IC:rse-writers+14; IC:rse-readers+14; impliedF
Modified: branches/binutils/package/opcodes/ia64-waw.tbl
===================================================================
--- branches/binutils/package/opcodes/ia64-waw.tbl 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ia64-waw.tbl 2006-04-19 08:33:31 UTC (rev 12)
@@ -6,10 +6,10 @@
AR[CFLG]; IC:mov-to-AR-CFLG; IC:mov-to-AR-CFLG; impliedF
AR[CSD]; ld16, IC:mov-to-AR-CSD; ld16, IC:mov-to-AR-CSD; impliedF
AR[EC]; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; impliedF
-AR[EFLAG]; mov-to-AR-EFLAG; mov-to-AR-EFLAG; impliedF
-AR[FCR]; mov-to-AR-FCR; mov-to-AR-FCR; impliedF
-AR[FDR]; mov-to-AR-FDR; mov-to-AR-FDR; impliedF
-AR[FIR]; mov-to-AR-FIR; mov-to-AR-FIR; impliedF
+AR[EFLAG]; IC:mov-to-AR-EFLAG; IC:mov-to-AR-EFLAG; impliedF
+AR[FCR]; IC:mov-to-AR-FCR; IC:mov-to-AR-FCR; impliedF
+AR[FDR]; IC:mov-to-AR-FDR; IC:mov-to-AR-FDR; impliedF
+AR[FIR]; IC:mov-to-AR-FIR; IC:mov-to-AR-FIR; impliedF
AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0; IC:mov-to-AR-FPSR, fsetc.s0; impliedF
AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1; IC:mov-to-AR-FPSR, fsetc.s1; impliedF
AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2; IC:mov-to-AR-FPSR, fsetc.s2; impliedF
@@ -32,6 +32,7 @@
AR[PFS]; br.call, brl.call; IC:mov-to-AR-PFS; impliedF
AR[RNAT]; alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE; alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE; impliedF
AR[RSC]; IC:mov-to-AR-RSC; IC:mov-to-AR-RSC; impliedF
+AR[SSD]; IC:mov-to-AR-SSD; IC:mov-to-AR-SSD; impliedF
AR[UNAT]{%}, % in 0 - 63; IC:mov-to-AR-UNAT, st8.spill; IC:mov-to-AR-UNAT, st8.spill; impliedF
AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111; IC:none; IC:none; none
AR%, % in 48 - 63, 112-127; IC:mov-to-AR-ig+1; IC:mov-to-AR-ig+1; impliedF
@@ -42,7 +43,7 @@
CPUID#; IC:none; IC:none; none
CR[CMCV]; IC:mov-to-CR-CMCV; IC:mov-to-CR-CMCV; impliedF
CR[DCR]; IC:mov-to-CR-DCR; IC:mov-to-CR-DCR; impliedF
-CR[EOI]; IC:mov-to-CR-EOI; IC:mov-to-CR-EOI; SC Section 10.8.3.4
+CR[EOI]; IC:mov-to-CR-EOI; IC:mov-to-CR-EOI; SC Section 5.8.3.4, "End of External Interrupt Register (EOI Ð CR67)" on page 2:119
CR[GPTA]; IC:mov-to-CR-GPTA; IC:mov-to-CR-GPTA; impliedF
CR[IFA]; IC:mov-to-CR-IFA; IC:mov-to-CR-IFA; impliedF
CR[IFS]; IC:mov-to-CR-IFS, cover; IC:mov-to-CR-IFS, cover; impliedF
@@ -131,5 +132,6 @@
PSR.ss; rfi; rfi; impliedF
PSR.tb; IC:mov-to-PSR-l, rfi; IC:mov-to-PSR-l, rfi; impliedF
PSR.up; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; impliedF
+PSR.vm; rfi, vmsw; rfi, vmsw; impliedF
RR#; IC:mov-to-IND-RR+6; IC:mov-to-IND-RR+6; impliedF
RSE; IC:rse-writers+14; IC:rse-writers+14; impliedF
Modified: branches/binutils/package/opcodes/ip2k-ibld.c
===================================================================
--- branches/binutils/package/opcodes/ip2k-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/ip2k-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/iq2000-asm.c
===================================================================
--- branches/binutils/package/opcodes/iq2000-asm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/iq2000-asm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -214,6 +214,7 @@
if (value & 0x8000)
value += 0x10000;
value >>= 16;
+ value &= 0xffff;
}
*valuep = value;
@@ -239,6 +240,7 @@
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
value >>= 16;
+ value &= 0xffff;
*valuep = value;
return errmsg;
Modified: branches/binutils/package/opcodes/iq2000-ibld.c
===================================================================
--- branches/binutils/package/opcodes/iq2000-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/iq2000-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/m32c-asm.c
===================================================================
--- branches/binutils/package/opcodes/m32c-asm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-asm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -504,6 +504,24 @@
}
static const char *
+parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
+ int opindex, signed long *valuep)
+{
+ const char *errmsg = 0;
+ signed long value;
+
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
+ if (errmsg)
+ return errmsg;
+
+ if (value < 0 || value > 7)
+ return _("immediate is out of range 0-7");
+
+ *valuep = value;
+ return 0;
+}
+
+static const char *
parse_lab_5_3 (CGEN_CPU_DESC cd,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
@@ -560,13 +578,14 @@
static const char *
parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep,
- unsigned bits)
+ unsigned bits, int allow_syms)
{
const char *errmsg = 0;
unsigned long bit;
unsigned long base;
const char *newp = *strp;
unsigned long long bitbase;
+ long have_zero = 0;
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
@@ -576,6 +595,11 @@
return "Missing base for bit,base:8";
++newp;
+
+ if (strncmp (newp, "0x0", 3) == 0
+ || (newp[0] == '0' && newp[1] != 'x'))
+ have_zero = 1;
+
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
if (errmsg)
return errmsg;
@@ -585,6 +609,21 @@
if (bitbase >= (1ull << bits))
return _("bit,base is out of range");
+ /* If this field may require a relocation then use larger displacement. */
+ if (! have_zero && base == 0)
+ {
+ switch (allow_syms) {
+ case 0:
+ return _("bit,base out of range for symbol");
+ case 1:
+ break;
+ case 2:
+ if (strncmp (newp, "[sb]", 4) != 0)
+ return _("bit,base out of range for symbol");
+ break;
+ }
+ }
+
*valuep = bitbase;
*strp = newp;
return 0;
@@ -593,7 +632,7 @@
static const char *
parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep,
- unsigned bits)
+ unsigned bits, int allow_syms)
{
const char *errmsg = 0;
unsigned long bit;
@@ -601,6 +640,7 @@
const char *newp = *strp;
long long bitbase;
long long limit;
+ long have_zero = 0;
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
@@ -610,6 +650,11 @@
return "Missing base for bit,base:8";
++newp;
+
+ if (strncmp (newp, "0x0", 3) == 0
+ || (newp[0] == '0' && newp[1] != 'x'))
+ have_zero = 1;
+
errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
if (errmsg)
return errmsg;
@@ -620,6 +665,10 @@
if (bitbase < -limit || bitbase >= limit)
return _("bit,base is out of range");
+ /* If this field may require a relocation then use larger displacement. */
+ if (! have_zero && base == 0 && ! allow_syms)
+ return _("bit,base out of range for symbol");
+
*valuep = bitbase;
*strp = newp;
return 0;
@@ -629,56 +678,56 @@
parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0);
}
static const char *
parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0);
}
static const char *
parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1);
}
static const char *
parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2);
}
static const char *
parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
- return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1);
}
static const char *
parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1);
}
static const char *
parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0);
}
static const char *
parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
int opindex, signed long *valuep)
{
- return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
+ return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1);
}
/* Parse the suffix as :<char> or as nothing followed by a whitespace. */
@@ -933,6 +982,9 @@
case M32C_OPERAND_BIT16RN :
errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
break;
+ case M32C_OPERAND_BIT3_S :
+ errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S));
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
break;
Modified: branches/binutils/package/opcodes/m32c-desc.c
===================================================================
--- branches/binutils/package/opcodes/m32c-desc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-desc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -60,10 +60,20 @@
{ 0, 0 }
};
+static const CGEN_ATTR_ENTRY RL_TYPE_attr[] ATTRIBUTE_UNUSED =
+{
+ { "NONE", RL_TYPE_NONE },
+ { "JUMP", RL_TYPE_JUMP },
+ { "1ADDR", RL_TYPE_1ADDR },
+ { "2ADDR", RL_TYPE_2ADDR },
+ { 0, 0 }
+};
+
const CGEN_ATTR_TABLE m32c_cgen_ifield_attr_table[] =
{
{ "MACH", & MACH_attr[0], & MACH_attr[0] },
{ "ISA", & ISA_attr[0], & ISA_attr[0] },
+ { "RL_TYPE", & RL_TYPE_attr[0], & RL_TYPE_attr[0] },
{ "VIRTUAL", &bool_attr[0], &bool_attr[0] },
{ "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
{ "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
@@ -77,6 +87,7 @@
{
{ "MACH", & MACH_attr[0], & MACH_attr[0] },
{ "ISA", & ISA_attr[0], & ISA_attr[0] },
+ { "RL_TYPE", & RL_TYPE_attr[0], & RL_TYPE_attr[0] },
{ "VIRTUAL", &bool_attr[0], &bool_attr[0] },
{ "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
{ "PC", &bool_attr[0], &bool_attr[0] },
@@ -88,6 +99,7 @@
{
{ "MACH", & MACH_attr[0], & MACH_attr[0] },
{ "ISA", & ISA_attr[0], & ISA_attr[0] },
+ { "RL_TYPE", & RL_TYPE_attr[0], & RL_TYPE_attr[0] },
{ "VIRTUAL", &bool_attr[0], &bool_attr[0] },
{ "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
{ "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
@@ -103,6 +115,7 @@
{
{ "MACH", & MACH_attr[0], & MACH_attr[0] },
{ "ISA", & ISA_attr[0], & ISA_attr[0] },
+ { "RL_TYPE", & RL_TYPE_attr[0], & RL_TYPE_attr[0] },
{ "ALIAS", &bool_attr[0], &bool_attr[0] },
{ "VIRTUAL", &bool_attr[0], &bool_attr[0] },
{ "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
@@ -692,82 +705,82 @@
const CGEN_HW_ENTRY m32c_cgen_hw_table[] =
{
- { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr, { 0|A(CACHE_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr-QI", HW_H_GR_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr-HI", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr-SI", HW_H_GR_SI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_SI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr-ext-QI", HW_H_GR_EXT_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_ext_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-gr-ext-HI", HW_H_GR_EXT_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_ext_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r0l", HW_H_R0L, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0l, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r0h", HW_H_R0H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r1l", HW_H_R1L, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1l, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r1h", HW_H_R1H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r0", HW_H_R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r1", HW_H_R1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r2", HW_H_R2, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r3", HW_H_R3, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r3, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r0l-r0h", HW_H_R0L_R0H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0l_r0h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r2r0", HW_H_R2R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r2r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r3r1", HW_H_R3R1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r3r1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-r1r2r0", HW_H_R1R2R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1r2r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ar", HW_H_AR, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ar-QI", HW_H_AR_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ar-HI", HW_H_AR_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ar-SI", HW_H_AR_SI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_SI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-a0", HW_H_A0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_a0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-a1", HW_H_A1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_a1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-sb", HW_H_SB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-fb", HW_H_FB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-sp", HW_H_SP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-zbit", HW_H_ZBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-obit", HW_H_OBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-cbit", HW_H_CBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ubit", HW_H_UBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-ibit", HW_H_IBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-bbit", HW_H_BBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dbit", HW_H_DBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dct0", HW_H_DCT0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dct1", HW_H_DCT1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-svf", HW_H_SVF, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-drc0", HW_H_DRC0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-drc1", HW_H_DRC1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dmd0", HW_H_DMD0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dmd1", HW_H_DMD1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-intb", HW_H_INTB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-svp", HW_H_SVP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-vct", HW_H_VCT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-isp", HW_H_ISP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dma0", HW_H_DMA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dma1", HW_H_DMA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dra0", HW_H_DRA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dra1", HW_H_DRA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dsa0", HW_H_DSA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dsa1", HW_H_DSA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-cond16", HW_H_COND16, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { "h-cond16c", HW_H_COND16C, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16c, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { "h-cond16j", HW_H_COND16J, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16j, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { "h-cond16j-5", HW_H_COND16J_5, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16j_5, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { "h-cond32", HW_H_COND32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-cr1-32", HW_H_CR1_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr1_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-cr2-32", HW_H_CR2_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr2_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-cr3-32", HW_H_CR3_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr3_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-cr-16", HW_H_CR_16, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr_16, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { "h-flags", HW_H_FLAGS, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_flags, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-shimm", HW_H_SHIMM, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_shimm, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-bit-index", HW_H_BIT_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-src-index", HW_H_SRC_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-dst-index", HW_H_DST_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { "h-src-indirect", HW_H_SRC_INDIRECT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-dst-indirect", HW_H_DST_INDIRECT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { "h-none", HW_H_NONE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
+ { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr, { 0|A(CACHE_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr-QI", HW_H_GR_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr-HI", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr-SI", HW_H_GR_SI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_SI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr-ext-QI", HW_H_GR_EXT_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_ext_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-gr-ext-HI", HW_H_GR_EXT_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_gr_ext_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r0l", HW_H_R0L, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0l, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r0h", HW_H_R0H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r1l", HW_H_R1L, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1l, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r1h", HW_H_R1H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r0", HW_H_R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r1", HW_H_R1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r2", HW_H_R2, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r3", HW_H_R3, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r3, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r0l-r0h", HW_H_R0L_R0H, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r0l_r0h, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r2r0", HW_H_R2R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r2r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r3r1", HW_H_R3R1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r3r1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-r1r2r0", HW_H_R1R2R0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_r1r2r0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ar", HW_H_AR, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ar-QI", HW_H_AR_QI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_QI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ar-HI", HW_H_AR_HI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_HI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ar-SI", HW_H_AR_SI, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_ar_SI, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-a0", HW_H_A0, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_a0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-a1", HW_H_A1, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_a1, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-sb", HW_H_SB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-fb", HW_H_FB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-sp", HW_H_SP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-zbit", HW_H_ZBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-obit", HW_H_OBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cbit", HW_H_CBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ubit", HW_H_UBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-ibit", HW_H_IBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-bbit", HW_H_BBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dbit", HW_H_DBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dct0", HW_H_DCT0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dct1", HW_H_DCT1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-svf", HW_H_SVF, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-drc0", HW_H_DRC0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-drc1", HW_H_DRC1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dmd0", HW_H_DMD0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dmd1", HW_H_DMD1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-intb", HW_H_INTB, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-svp", HW_H_SVP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-vct", HW_H_VCT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-isp", HW_H_ISP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dma0", HW_H_DMA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dma1", HW_H_DMA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dra0", HW_H_DRA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dra1", HW_H_DRA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dsa0", HW_H_DSA0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dsa1", HW_H_DSA1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cond16", HW_H_COND16, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cond16c", HW_H_COND16C, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16c, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cond16j", HW_H_COND16J, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16j, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cond16j-5", HW_H_COND16J_5, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond16j_5, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cond32", HW_H_COND32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cr1-32", HW_H_CR1_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr1_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cr2-32", HW_H_CR2_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr2_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cr3-32", HW_H_CR3_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr3_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-cr-16", HW_H_CR_16, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr_16, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-flags", HW_H_FLAGS, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_flags, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-shimm", HW_H_SHIMM, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_shimm, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-bit-index", HW_H_BIT_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-src-index", HW_H_SRC_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dst-index", HW_H_DST_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-src-indirect", HW_H_SRC_INDIRECT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-dst-indirect", HW_H_DST_INDIRECT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { "h-none", HW_H_NONE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } }
};
#undef A
@@ -783,164 +796,164 @@
const CGEN_IFLD m32c_cgen_ifld_table[] =
{
- { M32C_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_0_1, "f-0-1", 0, 32, 0, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_0_2, "f-0-2", 0, 32, 0, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_0_3, "f-0-3", 0, 32, 0, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_0_4, "f-0-4", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_1_3, "f-1-3", 0, 32, 1, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_2_2, "f-2-2", 0, 32, 2, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_3_4, "f-3-4", 0, 32, 3, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_3_1, "f-3-1", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_4_1, "f-4-1", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_4_3, "f-4-3", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_4_4, "f-4-4", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_4_6, "f-4-6", 0, 32, 4, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_5_1, "f-5-1", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_5_3, "f-5-3", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_6_2, "f-6-2", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_7_1, "f-7-1", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_8_1, "f-8-1", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_8_2, "f-8-2", 0, 32, 8, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_8_3, "f-8-3", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_8_4, "f-8-4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_8_8, "f-8-8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_9_3, "f-9-3", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_9_1, "f-9-1", 0, 32, 9, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_10_1, "f-10-1", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_10_2, "f-10-2", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_10_3, "f-10-3", 0, 32, 10, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_11_1, "f-11-1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_12_1, "f-12-1", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_12_2, "f-12-2", 0, 32, 12, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_12_3, "f-12-3", 0, 32, 12, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_12_4, "f-12-4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_12_6, "f-12-6", 0, 32, 12, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_13_3, "f-13-3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_14_1, "f-14-1", 0, 32, 14, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_14_2, "f-14-2", 0, 32, 14, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_15_1, "f-15-1", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_16_1, "f-16-1", 0, 32, 16, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_16_2, "f-16-2", 0, 32, 16, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_16_4, "f-16-4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_16_8, "f-16-8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_18_1, "f-18-1", 0, 32, 18, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_18_2, "f-18-2", 0, 32, 18, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_18_3, "f-18-3", 0, 32, 18, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_20_1, "f-20-1", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_20_3, "f-20-3", 0, 32, 20, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_20_2, "f-20-2", 0, 32, 20, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_20_4, "f-20-4", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_21_3, "f-21-3", 0, 32, 21, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_24_2, "f-24-2", 0, 32, 24, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_24_8, "f-24-8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_32_16, "f-32-16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_SRC16_RN, "f-src16-rn", 0, 32, 10, 2, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_SRC16_AN, "f-src16-an", 0, 32, 11, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_SRC32_AN_UNPREFIXED, "f-src32-an-unprefixed", 0, 32, 11, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_AN_PREFIXED, "f-src32-an-prefixed", 0, 32, 19, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_UNPREFIXED_QI, "f-src32-rn-unprefixed-QI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_PREFIXED_QI, "f-src32-rn-prefixed-QI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_UNPREFIXED_HI, "f-src32-rn-unprefixed-HI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_PREFIXED_HI, "f-src32-rn-prefixed-HI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_UNPREFIXED_SI, "f-src32-rn-unprefixed-SI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_SRC32_RN_PREFIXED_SI, "f-src32-rn-prefixed-SI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_EXT_UNPREFIXED, "f-dst32-rn-ext-unprefixed", 0, 32, 9, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST16_RN, "f-dst16-rn", 0, 32, 14, 2, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_DST16_RN_EXT, "f-dst16-rn-ext", 0, 32, 14, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_DST16_RN_QI_S, "f-dst16-rn-QI-s", 0, 32, 5, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_DST16_AN, "f-dst16-an", 0, 32, 15, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_DST16_AN_S, "f-dst16-an-s", 0, 32, 4, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_DST32_AN_UNPREFIXED, "f-dst32-an-unprefixed", 0, 32, 9, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_AN_PREFIXED, "f-dst32-an-prefixed", 0, 32, 17, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_UNPREFIXED_QI, "f-dst32-rn-unprefixed-QI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_PREFIXED_QI, "f-dst32-rn-prefixed-QI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_UNPREFIXED_HI, "f-dst32-rn-unprefixed-HI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_PREFIXED_HI, "f-dst32-rn-prefixed-HI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_UNPREFIXED_SI, "f-dst32-rn-unprefixed-SI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST32_RN_PREFIXED_SI, "f-dst32-rn-prefixed-SI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_DST16_1_S, "f-dst16-1-S", 0, 32, 5, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
- { M32C_F_IMM_8_S4, "f-imm-8-s4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_IMM_12_S4, "f-imm-12-s4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_IMM_13_U3, "f-imm-13-u3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_IMM_20_S4, "f-imm-20-s4", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_IMM1_S, "f-imm1-S", 0, 32, 2, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
- { M32C_F_IMM3_S, "f-imm3-S", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_U6, "f-dsp-8-u6", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_U8, "f-dsp-8-u8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_S8, "f-dsp-8-s8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_10_U6, "f-dsp-10-u6", 0, 32, 10, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_U8, "f-dsp-16-u8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_S8, "f-dsp-16-s8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_U8, "f-dsp-24-u8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_S8, "f-dsp-24-s8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_U8, "f-dsp-32-u8", 32, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_S8, "f-dsp-32-s8", 32, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_U8, "f-dsp-40-u8", 32, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_S8, "f-dsp-40-s8", 32, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_U8, "f-dsp-48-u8", 32, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_S8, "f-dsp-48-s8", 32, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_56_U8, "f-dsp-56-u8", 32, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_56_S8, "f-dsp-56-s8", 32, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_64_U8, "f-dsp-64-u8", 64, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_64_S8, "f-dsp-64-s8", 64, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_U16, "f-dsp-8-u16", 0, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_S16, "f-dsp-8-s16", 0, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_U16, "f-dsp-16-u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_S16, "f-dsp-16-s16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_U16, "f-dsp-24-u16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_S16, "f-dsp-24-s16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_U16, "f-dsp-32-u16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_S16, "f-dsp-32-s16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_U16, "f-dsp-40-u16", 32, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_S16, "f-dsp-40-s16", 32, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_U16, "f-dsp-48-u16", 32, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_S16, "f-dsp-48-s16", 32, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_64_U16, "f-dsp-64-u16", 64, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_S24, "f-dsp-8-s24", 0, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_8_U24, "f-dsp-8-u24", 0, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_U24, "f-dsp-16-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_U24, "f-dsp-24-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_U24, "f-dsp-32-u24", 32, 32, 0, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_U24, "f-dsp-40-u24", 32, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_40_S32, "f-dsp-40-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_U24, "f-dsp-48-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_16_S32, "f-dsp-16-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_24_S32, "f-dsp-24-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_32_S32, "f-dsp-32-s32", 32, 32, 0, 32, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_U32, "f-dsp-48-u32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_48_S32, "f-dsp-48-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_56_S16, "f-dsp-56-s16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_DSP_64_S16, "f-dsp-64-s16", 64, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITNO16_S, "f-bitno16-S", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITNO32_PREFIXED, "f-bitno32-prefixed", 0, 32, 21, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITNO32_UNPREFIXED, "f-bitno32-unprefixed", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE16_U11_S, "f-bitbase16-u11-S", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_16_U11_UNPREFIXED, "f-bitbase32-16-u11-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_16_S11_UNPREFIXED, "f-bitbase32-16-s11-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_16_U19_UNPREFIXED, "f-bitbase32-16-u19-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_16_S19_UNPREFIXED, "f-bitbase32-16-s19-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_16_U27_UNPREFIXED, "f-bitbase32-16-u27-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_24_U11_PREFIXED, "f-bitbase32-24-u11-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_24_S11_PREFIXED, "f-bitbase32-24-s11-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_24_U19_PREFIXED, "f-bitbase32-24-u19-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_24_S19_PREFIXED, "f-bitbase32-24-s19-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_BITBASE32_24_U27_PREFIXED, "f-bitbase32-24-u27-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_5_3, "f-lab-5-3", 0, 32, 5, 3, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB32_JMP_S, "f-lab32-jmp-s", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_8_8, "f-lab-8-8", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_8_16, "f-lab-8-16", 0, 32, 8, 16, { 0|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_8_24, "f-lab-8-24", 0, 32, 8, 24, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_16_8, "f-lab-16-8", 0, 32, 16, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_24_8, "f-lab-24-8", 0, 32, 24, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_32_8, "f-lab-32-8", 32, 32, 0, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_LAB_40_8, "f-lab-40-8", 32, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_COND16, "f-cond16", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_COND16J_5, "f-cond16j-5", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_COND32, "f-cond32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { M32C_F_COND32J, "f-cond32j", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
- { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
+ { M32C_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_0_1, "f-0-1", 0, 32, 0, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_0_2, "f-0-2", 0, 32, 0, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_0_3, "f-0-3", 0, 32, 0, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_0_4, "f-0-4", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_1_3, "f-1-3", 0, 32, 1, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_2_2, "f-2-2", 0, 32, 2, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_3_4, "f-3-4", 0, 32, 3, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_3_1, "f-3-1", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_4_1, "f-4-1", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_4_3, "f-4-3", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_4_4, "f-4-4", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_4_6, "f-4-6", 0, 32, 4, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_5_1, "f-5-1", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_5_3, "f-5-3", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_6_2, "f-6-2", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_7_1, "f-7-1", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_8_1, "f-8-1", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_8_2, "f-8-2", 0, 32, 8, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_8_3, "f-8-3", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_8_4, "f-8-4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_8_8, "f-8-8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_9_3, "f-9-3", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_9_1, "f-9-1", 0, 32, 9, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_10_1, "f-10-1", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_10_2, "f-10-2", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_10_3, "f-10-3", 0, 32, 10, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_11_1, "f-11-1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_12_1, "f-12-1", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_12_2, "f-12-2", 0, 32, 12, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_12_3, "f-12-3", 0, 32, 12, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_12_4, "f-12-4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_12_6, "f-12-6", 0, 32, 12, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_13_3, "f-13-3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_14_1, "f-14-1", 0, 32, 14, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_14_2, "f-14-2", 0, 32, 14, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_15_1, "f-15-1", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_16_1, "f-16-1", 0, 32, 16, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_16_2, "f-16-2", 0, 32, 16, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_16_4, "f-16-4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_16_8, "f-16-8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_18_1, "f-18-1", 0, 32, 18, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_18_2, "f-18-2", 0, 32, 18, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_18_3, "f-18-3", 0, 32, 18, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_20_1, "f-20-1", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_20_3, "f-20-3", 0, 32, 20, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_20_2, "f-20-2", 0, 32, 20, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_20_4, "f-20-4", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_21_3, "f-21-3", 0, 32, 21, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_24_2, "f-24-2", 0, 32, 24, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_24_8, "f-24-8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_32_16, "f-32-16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC16_RN, "f-src16-rn", 0, 32, 10, 2, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC16_AN, "f-src16-an", 0, 32, 11, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_AN_UNPREFIXED, "f-src32-an-unprefixed", 0, 32, 11, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_AN_PREFIXED, "f-src32-an-prefixed", 0, 32, 19, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_UNPREFIXED_QI, "f-src32-rn-unprefixed-QI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_PREFIXED_QI, "f-src32-rn-prefixed-QI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_UNPREFIXED_HI, "f-src32-rn-unprefixed-HI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_PREFIXED_HI, "f-src32-rn-prefixed-HI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_UNPREFIXED_SI, "f-src32-rn-unprefixed-SI", 0, 32, 10, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_SRC32_RN_PREFIXED_SI, "f-src32-rn-prefixed-SI", 0, 32, 18, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_EXT_UNPREFIXED, "f-dst32-rn-ext-unprefixed", 0, 32, 9, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_RN, "f-dst16-rn", 0, 32, 14, 2, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_RN_EXT, "f-dst16-rn-ext", 0, 32, 14, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_RN_QI_S, "f-dst16-rn-QI-s", 0, 32, 5, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_AN, "f-dst16-an", 0, 32, 15, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_AN_S, "f-dst16-an-s", 0, 32, 4, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_AN_UNPREFIXED, "f-dst32-an-unprefixed", 0, 32, 9, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_AN_PREFIXED, "f-dst32-an-prefixed", 0, 32, 17, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_UNPREFIXED_QI, "f-dst32-rn-unprefixed-QI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_PREFIXED_QI, "f-dst32-rn-prefixed-QI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_UNPREFIXED_HI, "f-dst32-rn-unprefixed-HI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_PREFIXED_HI, "f-dst32-rn-prefixed-HI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_UNPREFIXED_SI, "f-dst32-rn-unprefixed-SI", 0, 32, 8, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST32_RN_PREFIXED_SI, "f-dst32-rn-prefixed-SI", 0, 32, 16, 2, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DST16_1_S, "f-dst16-1-S", 0, 32, 5, 1, { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM_8_S4, "f-imm-8-s4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM_12_S4, "f-imm-12-s4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM_13_U3, "f-imm-13-u3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM_20_S4, "f-imm-20-s4", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM1_S, "f-imm1-S", 0, 32, 2, 1, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_IMM3_S, "f-imm3-S", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_U6, "f-dsp-8-u6", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_U8, "f-dsp-8-u8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_S8, "f-dsp-8-s8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_10_U6, "f-dsp-10-u6", 0, 32, 10, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_U8, "f-dsp-16-u8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_S8, "f-dsp-16-s8", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_U8, "f-dsp-24-u8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_S8, "f-dsp-24-s8", 0, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_U8, "f-dsp-32-u8", 32, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_S8, "f-dsp-32-s8", 32, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_U8, "f-dsp-40-u8", 32, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_S8, "f-dsp-40-s8", 32, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_U8, "f-dsp-48-u8", 32, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_S8, "f-dsp-48-s8", 32, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_56_U8, "f-dsp-56-u8", 32, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_56_S8, "f-dsp-56-s8", 32, 32, 24, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_64_U8, "f-dsp-64-u8", 64, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_64_S8, "f-dsp-64-s8", 64, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_U16, "f-dsp-8-u16", 0, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_S16, "f-dsp-8-s16", 0, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_U16, "f-dsp-16-u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_S16, "f-dsp-16-s16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_U16, "f-dsp-24-u16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_S16, "f-dsp-24-s16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_U16, "f-dsp-32-u16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_S16, "f-dsp-32-s16", 32, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_U16, "f-dsp-40-u16", 32, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_S16, "f-dsp-40-s16", 32, 32, 8, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_U16, "f-dsp-48-u16", 32, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_S16, "f-dsp-48-s16", 32, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_64_U16, "f-dsp-64-u16", 64, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_S24, "f-dsp-8-s24", 0, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_8_U24, "f-dsp-8-u24", 0, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_U24, "f-dsp-16-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_U24, "f-dsp-24-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_U24, "f-dsp-32-u24", 32, 32, 0, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_U24, "f-dsp-40-u24", 32, 32, 8, 24, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_40_S32, "f-dsp-40-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_U24, "f-dsp-48-u24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_16_S32, "f-dsp-16-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_24_S32, "f-dsp-24-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_32_S32, "f-dsp-32-s32", 32, 32, 0, 32, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_U32, "f-dsp-48-u32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_48_S32, "f-dsp-48-s32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_56_S16, "f-dsp-56-s16", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_DSP_64_S16, "f-dsp-64-s16", 64, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITNO16_S, "f-bitno16-S", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITNO32_PREFIXED, "f-bitno32-prefixed", 0, 32, 21, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITNO32_UNPREFIXED, "f-bitno32-unprefixed", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE16_U11_S, "f-bitbase16-u11-S", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_16_U11_UNPREFIXED, "f-bitbase32-16-u11-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_16_S11_UNPREFIXED, "f-bitbase32-16-s11-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_16_U19_UNPREFIXED, "f-bitbase32-16-u19-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_16_S19_UNPREFIXED, "f-bitbase32-16-s19-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_16_U27_UNPREFIXED, "f-bitbase32-16-u27-unprefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_24_U11_PREFIXED, "f-bitbase32-24-u11-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_24_S11_PREFIXED, "f-bitbase32-24-s11-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_24_U19_PREFIXED, "f-bitbase32-24-u19-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_24_S19_PREFIXED, "f-bitbase32-24-s19-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_BITBASE32_24_U27_PREFIXED, "f-bitbase32-24-u27-prefixed", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_5_3, "f-lab-5-3", 0, 32, 5, 3, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB32_JMP_S, "f-lab32-jmp-s", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_8_8, "f-lab-8-8", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_8_16, "f-lab-8-16", 0, 32, 8, 16, { 0|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_8_24, "f-lab-8-24", 0, 32, 8, 24, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_16_8, "f-lab-16-8", 0, 32, 16, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_24_8, "f-lab-24-8", 0, 32, 24, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_32_8, "f-lab-32-8", 32, 32, 0, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_LAB_40_8, "f-lab-40-8", 32, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_COND16, "f-cond16", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_COND16J_5, "f-cond16j-5", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_COND32, "f-cond32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { M32C_F_COND32J, "f-cond32j", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
+ { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } }
};
#undef A
@@ -1158,827 +1171,831 @@
/* pc: program counter */
{ "pc", M32C_OPERAND_PC, HW_H_PC, 0, 0,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_NIL] } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src16RnQI: general register QI view */
{ "Src16RnQI", M32C_OPERAND_SRC16RNQI, HW_H_GR_QI, 10, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src16RnHI: general register QH view */
{ "Src16RnHI", M32C_OPERAND_SRC16RNHI, HW_H_GR_HI, 10, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnUnprefixedQI: general register QI view */
{ "Src32RnUnprefixedQI", M32C_OPERAND_SRC32RNUNPREFIXEDQI, HW_H_GR_QI, 10, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_UNPREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnUnprefixedHI: general register HI view */
{ "Src32RnUnprefixedHI", M32C_OPERAND_SRC32RNUNPREFIXEDHI, HW_H_GR_HI, 10, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_UNPREFIXED_HI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnUnprefixedSI: general register SI view */
{ "Src32RnUnprefixedSI", M32C_OPERAND_SRC32RNUNPREFIXEDSI, HW_H_GR_SI, 10, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_UNPREFIXED_SI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnPrefixedQI: general register QI view */
{ "Src32RnPrefixedQI", M32C_OPERAND_SRC32RNPREFIXEDQI, HW_H_GR_QI, 18, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_PREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnPrefixedHI: general register HI view */
{ "Src32RnPrefixedHI", M32C_OPERAND_SRC32RNPREFIXEDHI, HW_H_GR_HI, 18, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_PREFIXED_HI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32RnPrefixedSI: general register SI view */
{ "Src32RnPrefixedSI", M32C_OPERAND_SRC32RNPREFIXEDSI, HW_H_GR_SI, 18, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_RN_PREFIXED_SI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src16An: address register */
{ "Src16An", M32C_OPERAND_SRC16AN, HW_H_AR, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src16AnQI: address register QI view */
{ "Src16AnQI", M32C_OPERAND_SRC16ANQI, HW_H_AR_QI, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src16AnHI: address register HI view */
{ "Src16AnHI", M32C_OPERAND_SRC16ANHI, HW_H_AR_HI, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnUnprefixed: address register */
{ "Src32AnUnprefixed", M32C_OPERAND_SRC32ANUNPREFIXED, HW_H_AR, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnUnprefixedQI: address register QI view */
{ "Src32AnUnprefixedQI", M32C_OPERAND_SRC32ANUNPREFIXEDQI, HW_H_AR_QI, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnUnprefixedHI: address register HI view */
{ "Src32AnUnprefixedHI", M32C_OPERAND_SRC32ANUNPREFIXEDHI, HW_H_AR_HI, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnUnprefixedSI: address register SI view */
{ "Src32AnUnprefixedSI", M32C_OPERAND_SRC32ANUNPREFIXEDSI, HW_H_AR, 11, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnPrefixed: address register */
{ "Src32AnPrefixed", M32C_OPERAND_SRC32ANPREFIXED, HW_H_AR, 19, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnPrefixedQI: address register QI view */
{ "Src32AnPrefixedQI", M32C_OPERAND_SRC32ANPREFIXEDQI, HW_H_AR_QI, 19, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnPrefixedHI: address register HI view */
{ "Src32AnPrefixedHI", M32C_OPERAND_SRC32ANPREFIXEDHI, HW_H_AR_HI, 19, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Src32AnPrefixedSI: address register SI view */
{ "Src32AnPrefixedSI", M32C_OPERAND_SRC32ANPREFIXEDSI, HW_H_AR, 19, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_SRC32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16RnQI: general register QI view */
{ "Dst16RnQI", M32C_OPERAND_DST16RNQI, HW_H_GR_QI, 14, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16RnHI: general register HI view */
{ "Dst16RnHI", M32C_OPERAND_DST16RNHI, HW_H_GR_HI, 14, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16RnSI: general register SI view */
{ "Dst16RnSI", M32C_OPERAND_DST16RNSI, HW_H_GR_SI, 14, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16RnExtQI: general register QI/HI view for 'ext' insns */
{ "Dst16RnExtQI", M32C_OPERAND_DST16RNEXTQI, HW_H_GR_EXT_QI, 14, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN_EXT] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32R0QI-S: general register QI view */
{ "Dst32R0QI-S", M32C_OPERAND_DST32R0QI_S, HW_H_R0L, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32R0HI-S: general register HI view */
{ "Dst32R0HI-S", M32C_OPERAND_DST32R0HI_S, HW_H_R0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnUnprefixedQI: general register QI view */
{ "Dst32RnUnprefixedQI", M32C_OPERAND_DST32RNUNPREFIXEDQI, HW_H_GR_QI, 8, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_UNPREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnUnprefixedHI: general register HI view */
{ "Dst32RnUnprefixedHI", M32C_OPERAND_DST32RNUNPREFIXEDHI, HW_H_GR_HI, 8, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_UNPREFIXED_HI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnUnprefixedSI: general register SI view */
{ "Dst32RnUnprefixedSI", M32C_OPERAND_DST32RNUNPREFIXEDSI, HW_H_GR_SI, 8, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_UNPREFIXED_SI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnExtUnprefixedQI: general register QI view */
{ "Dst32RnExtUnprefixedQI", M32C_OPERAND_DST32RNEXTUNPREFIXEDQI, HW_H_GR_EXT_QI, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_EXT_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnExtUnprefixedHI: general register HI view */
{ "Dst32RnExtUnprefixedHI", M32C_OPERAND_DST32RNEXTUNPREFIXEDHI, HW_H_GR_EXT_HI, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_EXT_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnPrefixedQI: general register QI view */
{ "Dst32RnPrefixedQI", M32C_OPERAND_DST32RNPREFIXEDQI, HW_H_GR_QI, 16, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_PREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnPrefixedHI: general register HI view */
{ "Dst32RnPrefixedHI", M32C_OPERAND_DST32RNPREFIXEDHI, HW_H_GR_HI, 16, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_PREFIXED_HI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32RnPrefixedSI: general register SI view */
{ "Dst32RnPrefixedSI", M32C_OPERAND_DST32RNPREFIXEDSI, HW_H_GR_SI, 16, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_PREFIXED_SI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16RnQI-S: general register QI view */
{ "Dst16RnQI-S", M32C_OPERAND_DST16RNQI_S, HW_H_R0L_R0H, 5, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN_QI_S] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16AnQI-S: address register QI view */
{ "Dst16AnQI-S", M32C_OPERAND_DST16ANQI_S, HW_H_AR_QI, 5, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN_QI_S] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit16Rn: general register bit view */
{ "Bit16Rn", M32C_OPERAND_BIT16RN, HW_H_GR_HI, 14, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_RN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit32RnPrefixed: general register bit view */
{ "Bit32RnPrefixed", M32C_OPERAND_BIT32RNPREFIXED, HW_H_GR_QI, 16, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_PREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit32RnUnprefixed: general register bit view */
{ "Bit32RnUnprefixed", M32C_OPERAND_BIT32RNUNPREFIXED, HW_H_GR_QI, 8, 2,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_RN_UNPREFIXED_QI] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R0: r0 */
{ "R0", M32C_OPERAND_R0, HW_H_R0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R1: r1 */
{ "R1", M32C_OPERAND_R1, HW_H_R1, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R2: r2 */
{ "R2", M32C_OPERAND_R2, HW_H_R2, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R3: r3 */
{ "R3", M32C_OPERAND_R3, HW_H_R3, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R0l: r0l */
{ "R0l", M32C_OPERAND_R0L, HW_H_R0L, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R0h: r0h */
{ "R0h", M32C_OPERAND_R0H, HW_H_R0H, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R2R0: r2r0 */
{ "R2R0", M32C_OPERAND_R2R0, HW_H_R2R0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R3R1: r3r1 */
{ "R3R1", M32C_OPERAND_R3R1, HW_H_R3R1, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* R1R2R0: r1r2r0 */
{ "R1R2R0", M32C_OPERAND_R1R2R0, HW_H_R1R2R0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16An: address register */
{ "Dst16An", M32C_OPERAND_DST16AN, HW_H_AR, 15, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16AnQI: address register QI view */
{ "Dst16AnQI", M32C_OPERAND_DST16ANQI, HW_H_AR_QI, 15, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16AnHI: address register HI view */
{ "Dst16AnHI", M32C_OPERAND_DST16ANHI, HW_H_AR_HI, 15, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16AnSI: address register SI view */
{ "Dst16AnSI", M32C_OPERAND_DST16ANSI, HW_H_AR_SI, 15, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst16An-S: address register HI view */
{ "Dst16An-S", M32C_OPERAND_DST16AN_S, HW_H_AR_HI, 4, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN_S] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnUnprefixed: address register */
{ "Dst32AnUnprefixed", M32C_OPERAND_DST32ANUNPREFIXED, HW_H_AR, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnUnprefixedQI: address register QI view */
{ "Dst32AnUnprefixedQI", M32C_OPERAND_DST32ANUNPREFIXEDQI, HW_H_AR_QI, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnUnprefixedHI: address register HI view */
{ "Dst32AnUnprefixedHI", M32C_OPERAND_DST32ANUNPREFIXEDHI, HW_H_AR_HI, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnUnprefixedSI: address register SI view */
{ "Dst32AnUnprefixedSI", M32C_OPERAND_DST32ANUNPREFIXEDSI, HW_H_AR, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnExtUnprefixed: address register */
{ "Dst32AnExtUnprefixed", M32C_OPERAND_DST32ANEXTUNPREFIXED, HW_H_AR, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnPrefixed: address register */
{ "Dst32AnPrefixed", M32C_OPERAND_DST32ANPREFIXED, HW_H_AR, 17, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnPrefixedQI: address register QI view */
{ "Dst32AnPrefixedQI", M32C_OPERAND_DST32ANPREFIXEDQI, HW_H_AR_QI, 17, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnPrefixedHI: address register HI view */
{ "Dst32AnPrefixedHI", M32C_OPERAND_DST32ANPREFIXEDHI, HW_H_AR_HI, 17, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dst32AnPrefixedSI: address register SI view */
{ "Dst32AnPrefixedSI", M32C_OPERAND_DST32ANPREFIXEDSI, HW_H_AR, 17, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit16An: address register bit view */
{ "Bit16An", M32C_OPERAND_BIT16AN, HW_H_AR, 15, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST16_AN] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit32AnPrefixed: address register bit */
{ "Bit32AnPrefixed", M32C_OPERAND_BIT32ANPREFIXED, HW_H_AR, 17, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_PREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bit32AnUnprefixed: address register bit */
{ "Bit32AnUnprefixed", M32C_OPERAND_BIT32ANUNPREFIXED, HW_H_AR, 9, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DST32_AN_UNPREFIXED] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* A0: a0 */
{ "A0", M32C_OPERAND_A0, HW_H_A0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* A1: a1 */
{ "A1", M32C_OPERAND_A1, HW_H_A1, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* sb: SB register */
{ "sb", M32C_OPERAND_SB, HW_H_SB, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* fb: FB register */
{ "fb", M32C_OPERAND_FB, HW_H_FB, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* sp: SP register */
{ "sp", M32C_OPERAND_SP, HW_H_SP, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* SrcDst16-r0l-r0h-S-normal: r0l/r0h pair */
{ "SrcDst16-r0l-r0h-S-normal", M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, HW_H_SINT, 5, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_5_1] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Regsetpop: popm regset */
{ "Regsetpop", M32C_OPERAND_REGSETPOP, HW_H_UINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_8_8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Regsetpush: pushm regset */
{ "Regsetpush", M32C_OPERAND_REGSETPUSH, HW_H_UINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_8_8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Rn16-push-S: r0[lh] */
{ "Rn16-push-S", M32C_OPERAND_RN16_PUSH_S, HW_H_GR_QI, 4, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_4_1] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* An16-push-S: a[01] */
{ "An16-push-S", M32C_OPERAND_AN16_PUSH_S, HW_H_AR_HI, 4, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_4_1] } },
- { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_M16C), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-u6: unsigned 6 bit displacement at offset 8 bits */
{ "Dsp-8-u6", M32C_OPERAND_DSP_8_U6, HW_H_UINT, 8, 6,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_U6] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-u8: unsigned 8 bit displacement at offset 8 bits */
{ "Dsp-8-u8", M32C_OPERAND_DSP_8_U8, HW_H_UINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-u16: unsigned 16 bit displacement at offset 8 bits */
{ "Dsp-8-u16", M32C_OPERAND_DSP_8_U16, HW_H_UINT, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-s8: signed 8 bit displacement at offset 8 bits */
{ "Dsp-8-s8", M32C_OPERAND_DSP_8_S8, HW_H_SINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-s24: signed 24 bit displacement at offset 8 bits */
{ "Dsp-8-s24", M32C_OPERAND_DSP_8_S24, HW_H_SINT, 8, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_S24] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-8-u24: unsigned 24 bit displacement at offset 8 bits */
{ "Dsp-8-u24", M32C_OPERAND_DSP_8_U24, HW_H_UINT, 8, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_U24] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-10-u6: unsigned 6 bit displacement at offset 10 bits */
{ "Dsp-10-u6", M32C_OPERAND_DSP_10_U6, HW_H_UINT, 10, 6,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_10_U6] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-u8: unsigned 8 bit displacement at offset 16 bits */
{ "Dsp-16-u8", M32C_OPERAND_DSP_16_U8, HW_H_UINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-u16: unsigned 16 bit displacement at offset 16 bits */
{ "Dsp-16-u16", M32C_OPERAND_DSP_16_U16, HW_H_UINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-u20: unsigned 20 bit displacement at offset 16 bits */
{ "Dsp-16-u20", M32C_OPERAND_DSP_16_U20, HW_H_UINT, 0, 24,
{ 2, { (const PTR) &M32C_F_DSP_16_U24_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-u24: unsigned 24 bit displacement at offset 16 bits */
{ "Dsp-16-u24", M32C_OPERAND_DSP_16_U24, HW_H_UINT, 0, 24,
{ 2, { (const PTR) &M32C_F_DSP_16_U24_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-s8: signed 8 bit displacement at offset 16 bits */
{ "Dsp-16-s8", M32C_OPERAND_DSP_16_S8, HW_H_SINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-16-s16: signed 16 bit displacement at offset 16 bits */
{ "Dsp-16-s16", M32C_OPERAND_DSP_16_S16, HW_H_SINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-u8: unsigned 8 bit displacement at offset 24 bits */
{ "Dsp-24-u8", M32C_OPERAND_DSP_24_U8, HW_H_UINT, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_24_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-u16: unsigned 16 bit displacement at offset 24 bits */
{ "Dsp-24-u16", M32C_OPERAND_DSP_24_U16, HW_H_UINT, 0, 16,
{ 2, { (const PTR) &M32C_F_DSP_24_U16_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-u20: unsigned 20 bit displacement at offset 24 bits */
{ "Dsp-24-u20", M32C_OPERAND_DSP_24_U20, HW_H_UINT, 0, 24,
{ 2, { (const PTR) &M32C_F_DSP_24_U24_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-u24: unsigned 24 bit displacement at offset 24 bits */
{ "Dsp-24-u24", M32C_OPERAND_DSP_24_U24, HW_H_UINT, 0, 24,
{ 2, { (const PTR) &M32C_F_DSP_24_U24_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-s8: signed 8 bit displacement at offset 24 bits */
{ "Dsp-24-s8", M32C_OPERAND_DSP_24_S8, HW_H_SINT, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_24_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-24-s16: signed 16 bit displacement at offset 24 bits */
{ "Dsp-24-s16", M32C_OPERAND_DSP_24_S16, HW_H_SINT, 0, 16,
{ 2, { (const PTR) &M32C_F_DSP_24_S16_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-u8: unsigned 8 bit displacement at offset 32 bits */
{ "Dsp-32-u8", M32C_OPERAND_DSP_32_U8, HW_H_UINT, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-u16: unsigned 16 bit displacement at offset 32 bits */
{ "Dsp-32-u16", M32C_OPERAND_DSP_32_U16, HW_H_UINT, 0, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-u24: unsigned 24 bit displacement at offset 32 bits */
{ "Dsp-32-u24", M32C_OPERAND_DSP_32_U24, HW_H_UINT, 0, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U24] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-u20: unsigned 20 bit displacement at offset 32 bits */
{ "Dsp-32-u20", M32C_OPERAND_DSP_32_U20, HW_H_UINT, 0, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U24] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-s8: signed 8 bit displacement at offset 32 bits */
{ "Dsp-32-s8", M32C_OPERAND_DSP_32_S8, HW_H_SINT, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-32-s16: signed 16 bit displacement at offset 32 bits */
{ "Dsp-32-s16", M32C_OPERAND_DSP_32_S16, HW_H_SINT, 0, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-40-u8: unsigned 8 bit displacement at offset 40 bits */
{ "Dsp-40-u8", M32C_OPERAND_DSP_40_U8, HW_H_UINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-40-s8: signed 8 bit displacement at offset 40 bits */
{ "Dsp-40-s8", M32C_OPERAND_DSP_40_S8, HW_H_SINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-40-u16: unsigned 16 bit displacement at offset 40 bits */
{ "Dsp-40-u16", M32C_OPERAND_DSP_40_U16, HW_H_UINT, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-40-s16: signed 16 bit displacement at offset 40 bits */
{ "Dsp-40-s16", M32C_OPERAND_DSP_40_S16, HW_H_SINT, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-40-u24: unsigned 24 bit displacement at offset 40 bits */
{ "Dsp-40-u24", M32C_OPERAND_DSP_40_U24, HW_H_UINT, 8, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_U24] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-48-u8: unsigned 8 bit displacement at offset 48 bits */
{ "Dsp-48-u8", M32C_OPERAND_DSP_48_U8, HW_H_UINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-48-s8: signed 8 bit displacement at offset 48 bits */
{ "Dsp-48-s8", M32C_OPERAND_DSP_48_S8, HW_H_SINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-48-u16: unsigned 16 bit displacement at offset 48 bits */
{ "Dsp-48-u16", M32C_OPERAND_DSP_48_U16, HW_H_UINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-48-s16: signed 16 bit displacement at offset 48 bits */
{ "Dsp-48-s16", M32C_OPERAND_DSP_48_S16, HW_H_SINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Dsp-48-u24: unsigned 24 bit displacement at offset 48 bits */
{ "Dsp-48-u24", M32C_OPERAND_DSP_48_U24, HW_H_UINT, 0, 24,
{ 2, { (const PTR) &M32C_F_DSP_48_U24_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-8-s4: signed 4 bit immediate at offset 8 bits */
{ "Imm-8-s4", M32C_OPERAND_IMM_8_S4, HW_H_SINT, 8, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_8_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-8-s4n: negated 4 bit immediate at offset 8 bits */
{ "Imm-8-s4n", M32C_OPERAND_IMM_8_S4N, HW_H_SINT, 8, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_8_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-sh-8-s4: signed 4 bit shift immediate at offset 8 bits */
{ "Imm-sh-8-s4", M32C_OPERAND_IMM_SH_8_S4, HW_H_SHIMM, 8, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_8_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-8-QI: signed 8 bit immediate at offset 8 bits */
{ "Imm-8-QI", M32C_OPERAND_IMM_8_QI, HW_H_SINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-8-HI: signed 16 bit immediate at offset 8 bits */
{ "Imm-8-HI", M32C_OPERAND_IMM_8_HI, HW_H_SINT, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_8_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-12-s4: signed 4 bit immediate at offset 12 bits */
{ "Imm-12-s4", M32C_OPERAND_IMM_12_S4, HW_H_SINT, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_12_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-12-s4n: negated 4 bit immediate at offset 12 bits */
{ "Imm-12-s4n", M32C_OPERAND_IMM_12_S4N, HW_H_SINT, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_12_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-sh-12-s4: signed 4 bit shift immediate at offset 12 bits */
{ "Imm-sh-12-s4", M32C_OPERAND_IMM_SH_12_S4, HW_H_SHIMM, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_12_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-13-u3: signed 3 bit immediate at offset 13 bits */
{ "Imm-13-u3", M32C_OPERAND_IMM_13_U3, HW_H_SINT, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_13_U3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-20-s4: signed 4 bit immediate at offset 20 bits */
{ "Imm-20-s4", M32C_OPERAND_IMM_20_S4, HW_H_SINT, 20, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_20_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-sh-20-s4: signed 4 bit shift immediate at offset 12 bits */
{ "Imm-sh-20-s4", M32C_OPERAND_IMM_SH_20_S4, HW_H_SHIMM, 20, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM_20_S4] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-16-QI: signed 8 bit immediate at offset 16 bits */
{ "Imm-16-QI", M32C_OPERAND_IMM_16_QI, HW_H_SINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-16-HI: signed 16 bit immediate at offset 16 bits */
{ "Imm-16-HI", M32C_OPERAND_IMM_16_HI, HW_H_SINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-16-SI: signed 32 bit immediate at offset 16 bits */
{ "Imm-16-SI", M32C_OPERAND_IMM_16_SI, HW_H_SINT, 0, 32,
{ 2, { (const PTR) &M32C_F_DSP_16_S32_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-24-QI: signed 8 bit immediate at offset 24 bits */
{ "Imm-24-QI", M32C_OPERAND_IMM_24_QI, HW_H_SINT, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_24_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-24-HI: signed 16 bit immediate at offset 24 bits */
{ "Imm-24-HI", M32C_OPERAND_IMM_24_HI, HW_H_SINT, 0, 16,
{ 2, { (const PTR) &M32C_F_DSP_24_S16_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-24-SI: signed 32 bit immediate at offset 24 bits */
{ "Imm-24-SI", M32C_OPERAND_IMM_24_SI, HW_H_SINT, 0, 32,
{ 2, { (const PTR) &M32C_F_DSP_24_S32_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-32-QI: signed 8 bit immediate at offset 32 bits */
{ "Imm-32-QI", M32C_OPERAND_IMM_32_QI, HW_H_SINT, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-32-SI: signed 32 bit immediate at offset 32 bits */
{ "Imm-32-SI", M32C_OPERAND_IMM_32_SI, HW_H_SINT, 0, 32,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_S32] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-32-HI: signed 16 bit immediate at offset 32 bits */
{ "Imm-32-HI", M32C_OPERAND_IMM_32_HI, HW_H_SINT, 0, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-40-QI: signed 8 bit immediate at offset 40 bits */
{ "Imm-40-QI", M32C_OPERAND_IMM_40_QI, HW_H_SINT, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-40-HI: signed 16 bit immediate at offset 40 bits */
{ "Imm-40-HI", M32C_OPERAND_IMM_40_HI, HW_H_SINT, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-40-SI: signed 32 bit immediate at offset 40 bits */
{ "Imm-40-SI", M32C_OPERAND_IMM_40_SI, HW_H_SINT, 0, 32,
{ 2, { (const PTR) &M32C_F_DSP_40_S32_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-48-QI: signed 8 bit immediate at offset 48 bits */
{ "Imm-48-QI", M32C_OPERAND_IMM_48_QI, HW_H_SINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-48-HI: signed 16 bit immediate at offset 48 bits */
{ "Imm-48-HI", M32C_OPERAND_IMM_48_HI, HW_H_SINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_48_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-48-SI: signed 32 bit immediate at offset 48 bits */
{ "Imm-48-SI", M32C_OPERAND_IMM_48_SI, HW_H_SINT, 0, 32,
{ 2, { (const PTR) &M32C_F_DSP_48_S32_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-56-QI: signed 8 bit immediate at offset 56 bits */
{ "Imm-56-QI", M32C_OPERAND_IMM_56_QI, HW_H_SINT, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_56_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-56-HI: signed 16 bit immediate at offset 56 bits */
{ "Imm-56-HI", M32C_OPERAND_IMM_56_HI, HW_H_SINT, 0, 16,
{ 2, { (const PTR) &M32C_F_DSP_56_S16_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm-64-HI: signed 16 bit immediate at offset 64 bits */
{ "Imm-64-HI", M32C_OPERAND_IMM_64_HI, HW_H_SINT, 0, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_64_S16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm1-S: signed 1 bit immediate for short format binary insns */
{ "Imm1-S", M32C_OPERAND_IMM1_S, HW_H_SINT, 2, 1,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_IMM1_S] } },
- { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Imm3-S: signed 3 bit immediate for short format binary insns */
{ "Imm3-S", M32C_OPERAND_IMM3_S, HW_H_SINT, 2, 3,
{ 2, { (const PTR) &M32C_F_IMM3_S_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
+/* Bit3-S: 3 bit bit number */
+ { "Bit3-S", M32C_OPERAND_BIT3_S, HW_H_SINT, 2, 3,
+ { 2, { (const PTR) &M32C_F_IMM3_S_MULTI_IFIELD[0] } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bitno16R: bit number for indexing registers */
{ "Bitno16R", M32C_OPERAND_BITNO16R, HW_H_UINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bitno32Prefixed: bit number for indexing objects */
{ "Bitno32Prefixed", M32C_OPERAND_BITNO32PREFIXED, HW_H_UINT, 21, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_BITNO32_PREFIXED] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Bitno32Unprefixed: bit number for indexing objects */
{ "Bitno32Unprefixed", M32C_OPERAND_BITNO32UNPREFIXED, HW_H_UINT, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_BITNO32_UNPREFIXED] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase16-16-u8: unsigned bit,base:8 at offset 16for m16c */
{ "BitBase16-16-u8", M32C_OPERAND_BITBASE16_16_U8, HW_H_UINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase16-16-s8: signed bit,base:8 at offset 16for m16c */
{ "BitBase16-16-s8", M32C_OPERAND_BITBASE16_16_S8, HW_H_SINT, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_S8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase16-16-u16: unsigned bit,base:16 at offset 16 for m16c */
{ "BitBase16-16-u16", M32C_OPERAND_BITBASE16_16_U16, HW_H_UINT, 16, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase16-8-u11-S: signed bit,base:11 at offset 16 for m16c */
{ "BitBase16-8-u11-S", M32C_OPERAND_BITBASE16_8_U11_S, HW_H_UINT, 5, 11,
{ 2, { (const PTR) &M32C_F_BITBASE16_U11_S_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-16-u11-Unprefixed: unsigned bit,base:11 at offset 16 for m32c */
{ "BitBase32-16-u11-Unprefixed", M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, HW_H_UINT, 13, 11,
{ 2, { (const PTR) &M32C_F_BITBASE32_16_U11_UNPREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-16-s11-Unprefixed: signed bit,base:11 at offset 16 for m32c */
{ "BitBase32-16-s11-Unprefixed", M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, HW_H_SINT, 13, 11,
{ 2, { (const PTR) &M32C_F_BITBASE32_16_S11_UNPREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-16-u19-Unprefixed: unsigned bit,base:19 at offset 16 for m32c */
{ "BitBase32-16-u19-Unprefixed", M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, HW_H_UINT, 13, 19,
{ 2, { (const PTR) &M32C_F_BITBASE32_16_U19_UNPREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-16-s19-Unprefixed: signed bit,base:19 at offset 16 for m32c */
{ "BitBase32-16-s19-Unprefixed", M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, HW_H_SINT, 13, 19,
{ 2, { (const PTR) &M32C_F_BITBASE32_16_S19_UNPREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-16-u27-Unprefixed: unsigned bit,base:27 at offset 16 for m32c */
{ "BitBase32-16-u27-Unprefixed", M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, HW_H_UINT, 0, 27,
{ 3, { (const PTR) &M32C_F_BITBASE32_16_U27_UNPREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-24-u11-Prefixed: unsigned bit,base:11 at offset 24 for m32c */
{ "BitBase32-24-u11-Prefixed", M32C_OPERAND_BITBASE32_24_U11_PREFIXED, HW_H_UINT, 21, 11,
{ 2, { (const PTR) &M32C_F_BITBASE32_24_U11_PREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-24-s11-Prefixed: signed bit,base:11 at offset 24 for m32c */
{ "BitBase32-24-s11-Prefixed", M32C_OPERAND_BITBASE32_24_S11_PREFIXED, HW_H_SINT, 21, 11,
{ 2, { (const PTR) &M32C_F_BITBASE32_24_S11_PREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-24-u19-Prefixed: unsigned bit,base:19 at offset 24 for m32c */
{ "BitBase32-24-u19-Prefixed", M32C_OPERAND_BITBASE32_24_U19_PREFIXED, HW_H_UINT, 0, 19,
{ 3, { (const PTR) &M32C_F_BITBASE32_24_U19_PREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-24-s19-Prefixed: signed bit,base:19 at offset 24 for m32c */
{ "BitBase32-24-s19-Prefixed", M32C_OPERAND_BITBASE32_24_S19_PREFIXED, HW_H_SINT, 0, 19,
{ 3, { (const PTR) &M32C_F_BITBASE32_24_S19_PREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitBase32-24-u27-Prefixed: unsigned bit,base:27 at offset 24 for m32c */
{ "BitBase32-24-u27-Prefixed", M32C_OPERAND_BITBASE32_24_U27_PREFIXED, HW_H_UINT, 0, 27,
{ 3, { (const PTR) &M32C_F_BITBASE32_24_U27_PREFIXED_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-5-3: 3 bit label */
{ "Lab-5-3", M32C_OPERAND_LAB_5_3, HW_H_IADDR, 5, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_5_3] } },
- { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab32-jmp-s: 3 bit label */
{ "Lab32-jmp-s", M32C_OPERAND_LAB32_JMP_S, HW_H_IADDR, 2, 3,
{ 2, { (const PTR) &M32C_F_LAB32_JMP_S_MULTI_IFIELD[0] } },
- { 0|A(RELAX)|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-8-8: 8 bit label */
{ "Lab-8-8", M32C_OPERAND_LAB_8_8, HW_H_IADDR, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_8_8] } },
- { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-8-16: 16 bit label */
{ "Lab-8-16", M32C_OPERAND_LAB_8_16, HW_H_IADDR, 8, 16,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_8_16] } },
- { 0|A(RELAX)|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-8-24: 24 bit label */
{ "Lab-8-24", M32C_OPERAND_LAB_8_24, HW_H_IADDR, 8, 24,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_8_24] } },
- { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-16-8: 8 bit label */
{ "Lab-16-8", M32C_OPERAND_LAB_16_8, HW_H_IADDR, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_16_8] } },
- { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-24-8: 8 bit label */
{ "Lab-24-8", M32C_OPERAND_LAB_24_8, HW_H_IADDR, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_24_8] } },
- { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-32-8: 8 bit label */
{ "Lab-32-8", M32C_OPERAND_LAB_32_8, HW_H_IADDR, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_32_8] } },
- { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Lab-40-8: 8 bit label */
{ "Lab-40-8", M32C_OPERAND_LAB_40_8, HW_H_IADDR, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_LAB_40_8] } },
- { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* sbit: negative bit */
{ "sbit", M32C_OPERAND_SBIT, HW_H_SBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* obit: overflow bit */
{ "obit", M32C_OPERAND_OBIT, HW_H_OBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* zbit: zero bit */
{ "zbit", M32C_OPERAND_ZBIT, HW_H_ZBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cbit: carry bit */
{ "cbit", M32C_OPERAND_CBIT, HW_H_CBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* ubit: stack ptr select bit */
{ "ubit", M32C_OPERAND_UBIT, HW_H_UBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* ibit: interrupt enable bit */
{ "ibit", M32C_OPERAND_IBIT, HW_H_IBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* bbit: reg bank select bit */
{ "bbit", M32C_OPERAND_BBIT, HW_H_BBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* dbit: debug bit */
{ "dbit", M32C_OPERAND_DBIT, HW_H_DBIT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16-16: condition */
{ "cond16-16", M32C_OPERAND_COND16_16, HW_H_COND16, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16-24: condition */
{ "cond16-24", M32C_OPERAND_COND16_24, HW_H_COND16, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_24_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16-32: condition */
{ "cond16-32", M32C_OPERAND_COND16_32, HW_H_COND16, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32-16: condition */
{ "cond32-16", M32C_OPERAND_COND32_16, HW_H_COND32, 16, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_16_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32-24: condition */
{ "cond32-24", M32C_OPERAND_COND32_24, HW_H_COND32, 24, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_24_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32-32: condition */
{ "cond32-32", M32C_OPERAND_COND32_32, HW_H_COND32, 0, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_32_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32-40: condition */
{ "cond32-40", M32C_OPERAND_COND32_40, HW_H_COND32, 8, 8,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_DSP_40_U8] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16c: condition */
{ "cond16c", M32C_OPERAND_COND16C, HW_H_COND16C, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_COND16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16j: condition */
{ "cond16j", M32C_OPERAND_COND16J, HW_H_COND16J, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_COND16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond16j5: condition */
{ "cond16j5", M32C_OPERAND_COND16J5, HW_H_COND16J_5, 5, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_COND16J_5] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32: condition */
{ "cond32", M32C_OPERAND_COND32, HW_H_COND32, 9, 4,
{ 2, { (const PTR) &M32C_F_COND32_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cond32j: condition */
{ "cond32j", M32C_OPERAND_COND32J, HW_H_COND32, 1, 4,
{ 2, { (const PTR) &M32C_F_COND32J_MULTI_IFIELD[0] } },
- { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* sccond32: scCND condition */
{ "sccond32", M32C_OPERAND_SCCOND32, HW_H_COND32, 12, 4,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_COND16] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* flags16: flags */
{ "flags16", M32C_OPERAND_FLAGS16, HW_H_FLAGS, 9, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_9_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* flags32: flags */
{ "flags32", M32C_OPERAND_FLAGS32, HW_H_FLAGS, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_13_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr16: control */
{ "cr16", M32C_OPERAND_CR16, HW_H_CR_16, 9, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_9_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr1-Unprefixed-32: control */
{ "cr1-Unprefixed-32", M32C_OPERAND_CR1_UNPREFIXED_32, HW_H_CR1_32, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_13_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr1-Prefixed-32: control */
{ "cr1-Prefixed-32", M32C_OPERAND_CR1_PREFIXED_32, HW_H_CR1_32, 21, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_21_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr2-32: control */
{ "cr2-32", M32C_OPERAND_CR2_32, HW_H_CR2_32, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_13_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr3-Unprefixed-32: control */
{ "cr3-Unprefixed-32", M32C_OPERAND_CR3_UNPREFIXED_32, HW_H_CR3_32, 13, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_13_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* cr3-Prefixed-32: control */
{ "cr3-Prefixed-32", M32C_OPERAND_CR3_PREFIXED_32, HW_H_CR3_32, 21, 3,
{ 0, { (const PTR) &m32c_cgen_ifld_table[M32C_F_21_3] } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Z: Suffix for zero format insns */
{ "Z", M32C_OPERAND_Z, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* S: Suffix for short format insns */
{ "S", M32C_OPERAND_S, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* Q: Suffix for quick format insns */
{ "Q", M32C_OPERAND_Q, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* G: Suffix for general format insns */
{ "G", M32C_OPERAND_G, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* X: Empty suffix */
{ "X", M32C_OPERAND_X, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* size: any size specifier */
{ "size", M32C_OPERAND_SIZE, HW_H_SINT, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { RL_TYPE_NONE, 0 } } } } },
/* BitIndex: Bit Index for the next insn */
{ "BitIndex", M32C_OPERAND_BITINDEX, HW_H_BIT_INDEX, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* SrcIndex: Source Index for the next insn */
{ "SrcIndex", M32C_OPERAND_SRCINDEX, HW_H_SRC_INDEX, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* DstIndex: Destination Index for the next insn */
{ "DstIndex", M32C_OPERAND_DSTINDEX, HW_H_DST_INDEX, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* NoRemainder: Place holder for when the remainder is not kept */
{ "NoRemainder", M32C_OPERAND_NOREMAINDER, HW_H_NONE, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } } } } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } },
/* src16-Rn-direct-QI: m16c Rn direct source QI */
/* src16-Rn-direct-HI: m16c Rn direct source HI */
/* src32-Rn-direct-Unprefixed-QI: m32c Rn direct source QI */
@@ -2649,7 +2666,7 @@
/* sentinel */
{ 0, 0, 0, 0, 0,
{ 0, { (const PTR) 0 } },
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } }
};
#undef A
@@ -2669,60001 +2686,60146 @@
/* Special null first entry.
A `num' value of zero is thus invalid.
Also, the special `invalid' insn resides here. */
- { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
+ { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } } },
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_EXTZ32_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "extz32-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_EXTZ32_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "extz32-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-HI", "extz", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-HI", "extz", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-HI", "extz", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-HI", "extz", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-HI", "extz", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_EXTZ32_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "extz32-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-HI", "extz", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "extz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-HI", "extz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-HI", "extz", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* extz [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_EXTZ32_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "extz32-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-HI", "extz", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_EXTS32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_EXTS32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-HI", "exts.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-HI", "exts.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-HI", "exts.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-HI", "exts.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-HI", "exts.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_EXTS32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "exts32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-HI", "exts.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-HI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-HI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-HI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_EXTS32_B_BASIC_EXTPREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "exts32.b-basic-ExtPrefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-HI", "exts.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w $Dst32RnExtUnprefixedHI */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_RN_DIRECT_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-Rn-direct-ExtUnprefixed-HI", "exts.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w $Dst32AnUnprefixedSI */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "exts32.w-16-ExtUnprefixed-dst32-An-direct-Unprefixed-SI", "exts.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w [$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_AN_INDIRECT_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-An-indirect-ExtUnprefixed-HI", "exts.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-8-An-relative-ExtUnprefixed-HI", "exts.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-16-An-relative-ExtUnprefixed-HI", "exts.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-24-An-relative-ExtUnprefixed-HI", "exts.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-8-SB-relative-ExtUnprefixed-HI", "exts.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-16-SB-relative-ExtUnprefixed-HI", "exts.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-8-FB-relative-ExtUnprefixed-HI", "exts.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-16-FB-relative-ExtUnprefixed-HI", "exts.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u16} */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-16-absolute-ExtUnprefixed-HI", "exts.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w ${Dsp-16-u24} */
{
M32C_INSN_EXTS32_W_16_EXTUNPREFIXED_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, "exts32.w-16-ExtUnprefixed-dst32-16-24-absolute-ExtUnprefixed-HI", "exts.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Dst32RnExtUnprefixedQI */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_RN_DIRECT_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-Rn-direct-ExtUnprefixed-QI", "exts.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Dst32AnUnprefixedHI */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "exts32.b-16-ExtUnprefixed-dst32-An-direct-Unprefixed-HI", "exts.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-An-indirect-ExtUnprefixed-QI", "exts.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-8-An-relative-ExtUnprefixed-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-16-An-relative-ExtUnprefixed-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-24-An-relative-ExtUnprefixed-QI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-8-SB-relative-ExtUnprefixed-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-16-SB-relative-ExtUnprefixed-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-8-FB-relative-ExtUnprefixed-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-16-FB-relative-ExtUnprefixed-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16} */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-16-absolute-ExtUnprefixed-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u24} */
{
M32C_INSN_EXTS32_B_16_EXTUNPREFIXED_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI, "exts32.b-16-ExtUnprefixed-dst32-16-24-absolute-ExtUnprefixed-QI", "exts.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b $Dst16RnExtQI */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_RN_DIRECT_EXT_QI, "exts16.b-16-Ext-dst16-Rn-direct-Ext-QI", "exts.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b [$Dst16An] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_AN_INDIRECT_EXT_QI, "exts16.b-16-Ext-dst16-An-indirect-Ext-QI", "exts.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_8_AN_RELATIVE_EXT_QI, "exts16.b-16-Ext-dst16-16-8-An-relative-Ext-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_16_AN_RELATIVE_EXT_QI, "exts16.b-16-Ext-dst16-16-16-An-relative-Ext-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_8_SB_RELATIVE_EXT_QI, "exts16.b-16-Ext-dst16-16-8-SB-relative-Ext-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_16_SB_RELATIVE_EXT_QI, "exts16.b-16-Ext-dst16-16-16-SB-relative-Ext-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_8_FB_RELATIVE_EXT_QI, "exts16.b-16-Ext-dst16-16-8-FB-relative-Ext-QI", "exts.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.b ${Dsp-16-u16} */
{
M32C_INSN_EXTS16_B_16_EXT_DST16_16_16_ABSOLUTE_EXT_QI, "exts16.b-16-Ext-dst16-16-16-absolute-Ext-QI", "exts.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_XOR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_XOR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "xor.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "xor.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "xor.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_XOR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "xor.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_XOR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_XOR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_XOR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "xor.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "xor.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "xor.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "xor.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_XOR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "xor.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_XOR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "xor16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "xor16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_XOR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "xor16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "xor16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "xor16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_XOR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "xor16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "xor.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "xor.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "xor16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "xor16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_XOR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "xor16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "xor16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "xor16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_XOR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "xor16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "xor16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "xor16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_XOR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "xor16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "xor.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "xor16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "xor16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_XOR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "xor16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_XOR32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "xor32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_XOR32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "xor32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "xor32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_XOR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xor32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xor32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_XOR32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xor32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "xor.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_XOR32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "xor32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_XOR32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "xor32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "xor32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_XOR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_XOR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xor32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XOR32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xor32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_XOR32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xor32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "xor.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_XOR16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "xor16.w-imm-G-basic-dst16-Rn-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_XOR16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "xor16.w-imm-G-basic-dst16-An-direct-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_XOR16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "xor16.w-imm-G-basic-dst16-An-indirect-HI", "xor.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "xor16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "xor16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "xor16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "xor.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "xor16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "xor16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_XOR16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "xor16.w-imm-G-16-16-dst16-16-16-absolute-HI", "xor.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_XOR16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "xor16.b-imm-G-basic-dst16-Rn-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_XOR16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "xor16.b-imm-G-basic-dst16-An-direct-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_XOR16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "xor16.b-imm-G-basic-dst16-An-indirect-QI", "xor.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XOR16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "xor16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_XOR16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "xor16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_XOR16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "xor16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "xor.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XOR16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "xor16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_XOR16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "xor16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_XOR16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "xor16.b-imm-G-16-16-dst16-16-16-absolute-QI", "xor.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* xchg.w r3,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_R3_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-r3-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_R3_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-r3-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R3_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-r3-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R3_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R3_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R3_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_R3_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_R3_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_R3_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_R3_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_R3_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_R3_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r3-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_R2_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-r2-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_R2_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-r2-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R2_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-r2-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R2_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R2_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R2_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_R2_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_R2_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_R2_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_R2_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_R2_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_R2_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r2-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_A1_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-a1-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_A1_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-a1-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A1_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-a1-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A1_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A1_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A1_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_A1_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_A1_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_A1_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_A1_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_A1_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a1,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_A1_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-a1-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_A0_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-a0-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_A0_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-a0-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A0_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-a0-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A0_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A0_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_A0_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_A0_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_A0_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_A0_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_A0_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_A0_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w a0,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_A0_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-a0-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_R1_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-r1-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_R1_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-r1-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R1_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-r1-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R1_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R1_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R1_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_R1_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_R1_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_R1_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_R1_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_R1_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_R1_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r1-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,$Dst32RnUnprefixedHI */
{
M32C_INSN_XCHG32W_R0_DST32_RN_DIRECT_UNPREFIXED_HI, "xchg32w-r0-dst32-Rn-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,$Dst32AnUnprefixedHI */
{
M32C_INSN_XCHG32W_R0_DST32_AN_DIRECT_UNPREFIXED_HI, "xchg32w-r0-dst32-An-direct-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R0_DST32_AN_INDIRECT_UNPREFIXED_HI, "xchg32w-r0-dst32-An-indirect-Unprefixed-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R0_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-8-An-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R0_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-16-An-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32W_R0_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-24-An-relative-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32W_R0_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-8-SB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32W_R0_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-16-SB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32W_R0_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-8-FB-relative-Unprefixed-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32W_R0_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-16-FB-relative-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16} */
{
M32C_INSN_XCHG32W_R0_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-16-absolute-Unprefixed-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u24} */
{
M32C_INSN_XCHG32W_R0_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "xchg32w-r0-dst32-16-24-absolute-Unprefixed-HI", "xchg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_R1H_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-r1h-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_R1H_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-r1h-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1H_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-r1h-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_R1H_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_R1H_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_R1H_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r1h-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_R0H_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-r0h-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_R0H_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-r0h-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0H_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-r0h-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_R0H_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_R0H_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_R0H_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r0h-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_A1_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-a1-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_A1_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-a1-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A1_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-a1-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A1_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A1_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A1_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_A1_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_A1_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_A1_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_A1_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_A1_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a1,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_A1_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-a1-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_A0_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-a0-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_A0_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-a0-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A0_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-a0-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A0_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A0_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_A0_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_A0_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_A0_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_A0_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_A0_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_A0_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b a0,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_A0_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-a0-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_R1L_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-r1l-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_R1L_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-r1l-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1L_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-r1l-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_R1L_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_R1L_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_R1L_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r1l-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,$Dst32RnUnprefixedQI */
{
M32C_INSN_XCHG32B_R0L_DST32_RN_DIRECT_UNPREFIXED_QI, "xchg32b-r0l-dst32-Rn-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,$Dst32AnUnprefixedQI */
{
M32C_INSN_XCHG32B_R0L_DST32_AN_DIRECT_UNPREFIXED_QI, "xchg32b-r0l-dst32-An-direct-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0L_DST32_AN_INDIRECT_UNPREFIXED_QI, "xchg32b-r0l-dst32-An-indirect-Unprefixed-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-8-An-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-16-An-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-24-An-relative-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-8-SB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-16-SB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-8-FB-relative-Unprefixed-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-s16}[fb] */
{
M32C_INSN_XCHG32B_R0L_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-16-FB-relative-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16} */
{
M32C_INSN_XCHG32B_R0L_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-16-absolute-Unprefixed-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u24} */
{
M32C_INSN_XCHG32B_R0L_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "xchg32b-r0l-dst32-16-24-absolute-Unprefixed-QI", "xchg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,$Dst16RnHI */
{
M32C_INSN_XCHG16W_R3_DST16_RN_DIRECT_HI, "xchg16w-r3-dst16-Rn-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,$Dst16AnHI */
{
M32C_INSN_XCHG16W_R3_DST16_AN_DIRECT_HI, "xchg16w-r3-dst16-An-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,[$Dst16An] */
{
M32C_INSN_XCHG16W_R3_DST16_AN_INDIRECT_HI, "xchg16w-r3-dst16-An-indirect-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16W_R3_DST16_16_8_AN_RELATIVE_HI, "xchg16w-r3-dst16-16-8-An-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16W_R3_DST16_16_16_AN_RELATIVE_HI, "xchg16w-r3-dst16-16-16-An-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16W_R3_DST16_16_8_SB_RELATIVE_HI, "xchg16w-r3-dst16-16-8-SB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16W_R3_DST16_16_16_SB_RELATIVE_HI, "xchg16w-r3-dst16-16-16-SB-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16W_R3_DST16_16_8_FB_RELATIVE_HI, "xchg16w-r3-dst16-16-8-FB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r3,${Dsp-16-u16} */
{
M32C_INSN_XCHG16W_R3_DST16_16_16_ABSOLUTE_HI, "xchg16w-r3-dst16-16-16-absolute-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,$Dst16RnHI */
{
M32C_INSN_XCHG16W_R2_DST16_RN_DIRECT_HI, "xchg16w-r2-dst16-Rn-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,$Dst16AnHI */
{
M32C_INSN_XCHG16W_R2_DST16_AN_DIRECT_HI, "xchg16w-r2-dst16-An-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,[$Dst16An] */
{
M32C_INSN_XCHG16W_R2_DST16_AN_INDIRECT_HI, "xchg16w-r2-dst16-An-indirect-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16W_R2_DST16_16_8_AN_RELATIVE_HI, "xchg16w-r2-dst16-16-8-An-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16W_R2_DST16_16_16_AN_RELATIVE_HI, "xchg16w-r2-dst16-16-16-An-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16W_R2_DST16_16_8_SB_RELATIVE_HI, "xchg16w-r2-dst16-16-8-SB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16W_R2_DST16_16_16_SB_RELATIVE_HI, "xchg16w-r2-dst16-16-16-SB-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16W_R2_DST16_16_8_FB_RELATIVE_HI, "xchg16w-r2-dst16-16-8-FB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r2,${Dsp-16-u16} */
{
M32C_INSN_XCHG16W_R2_DST16_16_16_ABSOLUTE_HI, "xchg16w-r2-dst16-16-16-absolute-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,$Dst16RnHI */
{
M32C_INSN_XCHG16W_R1_DST16_RN_DIRECT_HI, "xchg16w-r1-dst16-Rn-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,$Dst16AnHI */
{
M32C_INSN_XCHG16W_R1_DST16_AN_DIRECT_HI, "xchg16w-r1-dst16-An-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,[$Dst16An] */
{
M32C_INSN_XCHG16W_R1_DST16_AN_INDIRECT_HI, "xchg16w-r1-dst16-An-indirect-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16W_R1_DST16_16_8_AN_RELATIVE_HI, "xchg16w-r1-dst16-16-8-An-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16W_R1_DST16_16_16_AN_RELATIVE_HI, "xchg16w-r1-dst16-16-16-An-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16W_R1_DST16_16_8_SB_RELATIVE_HI, "xchg16w-r1-dst16-16-8-SB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16W_R1_DST16_16_16_SB_RELATIVE_HI, "xchg16w-r1-dst16-16-16-SB-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16W_R1_DST16_16_8_FB_RELATIVE_HI, "xchg16w-r1-dst16-16-8-FB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r1,${Dsp-16-u16} */
{
M32C_INSN_XCHG16W_R1_DST16_16_16_ABSOLUTE_HI, "xchg16w-r1-dst16-16-16-absolute-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,$Dst16RnHI */
{
M32C_INSN_XCHG16W_R0_DST16_RN_DIRECT_HI, "xchg16w-r0-dst16-Rn-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,$Dst16AnHI */
{
M32C_INSN_XCHG16W_R0_DST16_AN_DIRECT_HI, "xchg16w-r0-dst16-An-direct-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,[$Dst16An] */
{
M32C_INSN_XCHG16W_R0_DST16_AN_INDIRECT_HI, "xchg16w-r0-dst16-An-indirect-HI", "xchg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16W_R0_DST16_16_8_AN_RELATIVE_HI, "xchg16w-r0-dst16-16-8-An-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16W_R0_DST16_16_16_AN_RELATIVE_HI, "xchg16w-r0-dst16-16-16-An-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16W_R0_DST16_16_8_SB_RELATIVE_HI, "xchg16w-r0-dst16-16-8-SB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16W_R0_DST16_16_16_SB_RELATIVE_HI, "xchg16w-r0-dst16-16-16-SB-relative-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16W_R0_DST16_16_8_FB_RELATIVE_HI, "xchg16w-r0-dst16-16-8-FB-relative-HI", "xchg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.w r0,${Dsp-16-u16} */
{
M32C_INSN_XCHG16W_R0_DST16_16_16_ABSOLUTE_HI, "xchg16w-r0-dst16-16-16-absolute-HI", "xchg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,$Dst16RnQI */
{
M32C_INSN_XCHG16B_R1H_DST16_RN_DIRECT_QI, "xchg16b-r1h-dst16-Rn-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,$Dst16AnQI */
{
M32C_INSN_XCHG16B_R1H_DST16_AN_DIRECT_QI, "xchg16b-r1h-dst16-An-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,[$Dst16An] */
{
M32C_INSN_XCHG16B_R1H_DST16_AN_INDIRECT_QI, "xchg16b-r1h-dst16-An-indirect-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16B_R1H_DST16_16_8_AN_RELATIVE_QI, "xchg16b-r1h-dst16-16-8-An-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16B_R1H_DST16_16_16_AN_RELATIVE_QI, "xchg16b-r1h-dst16-16-16-An-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16B_R1H_DST16_16_8_SB_RELATIVE_QI, "xchg16b-r1h-dst16-16-8-SB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16B_R1H_DST16_16_16_SB_RELATIVE_QI, "xchg16b-r1h-dst16-16-16-SB-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16B_R1H_DST16_16_8_FB_RELATIVE_QI, "xchg16b-r1h-dst16-16-8-FB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1h,${Dsp-16-u16} */
{
M32C_INSN_XCHG16B_R1H_DST16_16_16_ABSOLUTE_QI, "xchg16b-r1h-dst16-16-16-absolute-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,$Dst16RnQI */
{
M32C_INSN_XCHG16B_R1L_DST16_RN_DIRECT_QI, "xchg16b-r1l-dst16-Rn-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,$Dst16AnQI */
{
M32C_INSN_XCHG16B_R1L_DST16_AN_DIRECT_QI, "xchg16b-r1l-dst16-An-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,[$Dst16An] */
{
M32C_INSN_XCHG16B_R1L_DST16_AN_INDIRECT_QI, "xchg16b-r1l-dst16-An-indirect-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16B_R1L_DST16_16_8_AN_RELATIVE_QI, "xchg16b-r1l-dst16-16-8-An-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16B_R1L_DST16_16_16_AN_RELATIVE_QI, "xchg16b-r1l-dst16-16-16-An-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16B_R1L_DST16_16_8_SB_RELATIVE_QI, "xchg16b-r1l-dst16-16-8-SB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16B_R1L_DST16_16_16_SB_RELATIVE_QI, "xchg16b-r1l-dst16-16-16-SB-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16B_R1L_DST16_16_8_FB_RELATIVE_QI, "xchg16b-r1l-dst16-16-8-FB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r1l,${Dsp-16-u16} */
{
M32C_INSN_XCHG16B_R1L_DST16_16_16_ABSOLUTE_QI, "xchg16b-r1l-dst16-16-16-absolute-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,$Dst16RnQI */
{
M32C_INSN_XCHG16B_R0H_DST16_RN_DIRECT_QI, "xchg16b-r0h-dst16-Rn-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,$Dst16AnQI */
{
M32C_INSN_XCHG16B_R0H_DST16_AN_DIRECT_QI, "xchg16b-r0h-dst16-An-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,[$Dst16An] */
{
M32C_INSN_XCHG16B_R0H_DST16_AN_INDIRECT_QI, "xchg16b-r0h-dst16-An-indirect-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16B_R0H_DST16_16_8_AN_RELATIVE_QI, "xchg16b-r0h-dst16-16-8-An-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16B_R0H_DST16_16_16_AN_RELATIVE_QI, "xchg16b-r0h-dst16-16-16-An-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16B_R0H_DST16_16_8_SB_RELATIVE_QI, "xchg16b-r0h-dst16-16-8-SB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16B_R0H_DST16_16_16_SB_RELATIVE_QI, "xchg16b-r0h-dst16-16-16-SB-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16B_R0H_DST16_16_8_FB_RELATIVE_QI, "xchg16b-r0h-dst16-16-8-FB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0h,${Dsp-16-u16} */
{
M32C_INSN_XCHG16B_R0H_DST16_16_16_ABSOLUTE_QI, "xchg16b-r0h-dst16-16-16-absolute-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,$Dst16RnQI */
{
M32C_INSN_XCHG16B_R0L_DST16_RN_DIRECT_QI, "xchg16b-r0l-dst16-Rn-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,$Dst16AnQI */
{
M32C_INSN_XCHG16B_R0L_DST16_AN_DIRECT_QI, "xchg16b-r0l-dst16-An-direct-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,[$Dst16An] */
{
M32C_INSN_XCHG16B_R0L_DST16_AN_INDIRECT_QI, "xchg16b-r0l-dst16-An-indirect-QI", "xchg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_XCHG16B_R0L_DST16_16_8_AN_RELATIVE_QI, "xchg16b-r0l-dst16-16-8-An-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_XCHG16B_R0L_DST16_16_16_AN_RELATIVE_QI, "xchg16b-r0l-dst16-16-16-An-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_XCHG16B_R0L_DST16_16_8_SB_RELATIVE_QI, "xchg16b-r0l-dst16-16-8-SB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_XCHG16B_R0L_DST16_16_16_SB_RELATIVE_QI, "xchg16b-r0l-dst16-16-16-SB-relative-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_XCHG16B_R0L_DST16_16_8_FB_RELATIVE_QI, "xchg16b-r0l-dst16-16-8-FB-relative-QI", "xchg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* xchg.b r0l,${Dsp-16-u16} */
{
M32C_INSN_XCHG16B_R0L_DST16_16_16_ABSOLUTE_QI, "xchg16b-r0l-dst16-16-16-absolute-QI", "xchg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_TST32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "tst32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_TST32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "tst32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_TST32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "tst32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_TST32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "tst32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_TST32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "tst32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_TST32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "tst32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_TST32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "tst32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_TST32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "tst32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_TST32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_TST32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "tst.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "tst.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "tst.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "tst.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_TST32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "tst32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "tst.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_TST32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "tst32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_TST32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_TST32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "tst.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "tst.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "tst.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "tst.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "tst.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_TST32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "tst32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "tst.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_TST32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "tst32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "tst16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "tst16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_TST16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "tst16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "tst16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "tst16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_TST16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "tst16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],$Dst16RnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],$Dst16AnHI */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "tst.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "tst.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "tst16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "tst16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_TST16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "tst16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "tst16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "tst16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_TST16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "tst16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "tst16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "tst16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_TST16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "tst16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],$Dst16RnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],$Dst16AnQI */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "tst.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "tst16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "tst16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.b${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_TST16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "tst16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_TST32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "tst32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_TST32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "tst32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "tst32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_TST32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_TST32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_TST32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_TST32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_TST32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "tst32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "tst32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_TST32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "tst32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "tst.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_TST32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "tst32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_TST32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "tst32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "tst32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_TST32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_TST32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_TST32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_TST32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_TST32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "tst32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_TST32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "tst32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_TST32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "tst32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "tst.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_TST16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "tst16.w-imm-G-basic-dst16-Rn-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_TST16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "tst16.w-imm-G-basic-dst16-An-direct-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_TST16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "tst16.w-imm-G-basic-dst16-An-indirect-HI", "tst.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "tst16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "tst16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "tst16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "tst.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "tst16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "tst16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_TST16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "tst16.w-imm-G-16-16-dst16-16-16-absolute-HI", "tst.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_TST16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "tst16.b-imm-G-basic-dst16-Rn-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_TST16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "tst16.b-imm-G-basic-dst16-An-direct-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_TST16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "tst16.b-imm-G-basic-dst16-An-indirect-QI", "tst.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_TST16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "tst16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_TST16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "tst16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_TST16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "tst16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "tst.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_TST16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "tst16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_TST16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "tst16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_TST16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "tst16.b-imm-G-16-16-dst16-16-16-absolute-QI", "tst.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_SUBX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_SUBX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-SI", "subx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-SI", "subx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-SI", "subx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-SI", "subx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_SUBX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "subx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-SI", "subx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "subx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_SUBX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "subx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* subx${G} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUBX32_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "subx32-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUBX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "subx32-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "subx32-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "subx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUBX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUBX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "subx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUBX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SUBX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SUBX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "subx32-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "subx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUBX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "subx32-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* subx${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SUBX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "subx32-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "subx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_STZX32_W_IMM_16_HI_IMM_32_HI_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "stzx32.w-Imm-16-HI-Imm-32-HI-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "stzx.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_STZX32_W_IMM_16_HI_IMM_32_HI_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "stzx32.w-Imm-16-HI-Imm-32-HI-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "stzx.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-16-HI},#${Imm-32-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_W_IMM_16_HI_IMM_32_HI_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "stzx32.w-Imm-16-HI-Imm-32-HI-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "stzx.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_W_IMM_24_HI_IMM_40_HI_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-24-HI-Imm-40-HI-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "stzx.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZX32_W_IMM_24_HI_IMM_40_HI_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-24-HI-Imm-40-HI-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "stzx.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZX32_W_IMM_24_HI_IMM_40_HI_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-24-HI-Imm-40-HI-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "stzx.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_W_IMM_32_HI_IMM_48_HI_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-32-HI-Imm-48-HI-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "stzx.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STZX32_W_IMM_32_HI_IMM_48_HI_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-32-HI-Imm-48-HI-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "stzx.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STZX32_W_IMM_32_HI_IMM_48_HI_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-32-HI-Imm-48-HI-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "stzx.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16} */
{
M32C_INSN_STZX32_W_IMM_32_HI_IMM_48_HI_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "stzx32.w-Imm-32-HI-Imm-48-HI-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "stzx.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_W_IMM_40_HI_IMM_56_HI_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "stzx32.w-Imm-40-HI-Imm-56-HI-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "stzx.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24} */
{
M32C_INSN_STZX32_W_IMM_40_HI_IMM_56_HI_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "stzx32.w-Imm-40-HI-Imm-56-HI-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "stzx.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_STZX32_B_IMM_16_QI_IMM_24_QI_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "stzx32.b-Imm-16-QI-Imm-24-QI-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "stzx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_STZX32_B_IMM_16_QI_IMM_24_QI_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "stzx32.b-Imm-16-QI-Imm-24-QI-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "stzx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-16-QI},#${Imm-24-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_B_IMM_16_QI_IMM_24_QI_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "stzx32.b-Imm-16-QI-Imm-24-QI-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "stzx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_B_IMM_24_QI_IMM_32_QI_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-24-QI-Imm-32-QI-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "stzx.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZX32_B_IMM_24_QI_IMM_32_QI_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-24-QI-Imm-32-QI-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "stzx.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZX32_B_IMM_24_QI_IMM_32_QI_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-24-QI-Imm-32-QI-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "stzx.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_B_IMM_32_QI_IMM_40_QI_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-32-QI-Imm-40-QI-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "stzx.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STZX32_B_IMM_32_QI_IMM_40_QI_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-32-QI-Imm-40-QI-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "stzx.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STZX32_B_IMM_32_QI_IMM_40_QI_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-32-QI-Imm-40-QI-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "stzx.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16} */
{
M32C_INSN_STZX32_B_IMM_32_QI_IMM_40_QI_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "stzx32.b-Imm-32-QI-Imm-40-QI-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "stzx.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZX32_B_IMM_40_QI_IMM_48_QI_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "stzx32.b-Imm-40-QI-Imm-48-QI-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "stzx.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24} */
{
M32C_INSN_STZX32_B_IMM_40_QI_IMM_48_QI_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "stzx32.b-Imm-40-QI-Imm-48-QI-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "stzx.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_STZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "stz32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "stz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_STZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "stz32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "stz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "stz32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "stz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "stz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "stz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "stz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "stz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "stz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "stz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_STZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "stz32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "stz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "stz32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "stz.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_STZ32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "stz32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "stz.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_STZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "stz32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "stz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_STZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "stz32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "stz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "stz32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "stz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "stz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "stz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "stz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "stz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "stz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "stz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_STZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "stz32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "stz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STZ32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "stz32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "stz.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_STZ32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "stz32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "stz.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stz${S} #${Imm-8-QI},r0l */
{
M32C_INSN_STZ16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "stz16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "stz", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stz${S} #${Imm-8-QI},r0h */
{
M32C_INSN_STZ16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "stz16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "stz", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZ16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "stz16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "stz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZ16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "stz16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "stz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stz${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_STZ16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "stz16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "stz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stnz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_STNZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "stnz32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "stnz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_STNZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "stnz32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "stnz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "stnz32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "stnz.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "stnz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STNZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "stnz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STNZ32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "stnz.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "stnz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STNZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "stnz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STNZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "stnz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_STNZ32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "stnz32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "stnz.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "stnz32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "stnz.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_STNZ32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "stnz32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "stnz.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_STNZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "stnz32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "stnz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_STNZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "stnz32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "stnz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "stnz32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "stnz.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "stnz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STNZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "stnz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STNZ32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "stnz.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "stnz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_STNZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "stnz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_STNZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "stnz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_STNZ32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "stnz32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "stnz.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STNZ32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "stnz32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "stnz.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_STNZ32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "stnz32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "stnz.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* stnz${S} #${Imm-8-QI},r0l */
{
M32C_INSN_STNZ16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "stnz16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "stnz", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stnz${S} #${Imm-8-QI},r0h */
{
M32C_INSN_STNZ16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "stnz16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "stnz", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stnz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STNZ16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "stnz16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "stnz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stnz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STNZ16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "stnz16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "stnz", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stnz${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_STNZ16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "stnz16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "stnz", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shlnc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SHLNC32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "shlnc32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "shlnc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SHLNC32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "shlnc32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "shlnc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHLNC32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "shlnc32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "shlnc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "shlnc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "shlnc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "shlnc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "shlnc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "shlnc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "shlnc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SHLNC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "shlnc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHLNC32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "shlnc.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SHLNC32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "shlnc32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "shlnc.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l r1h,$Dst32RnUnprefixedSI */
{
M32C_INSN_SHL32_L_DST_DST32_RN_DIRECT_UNPREFIXED_SI, "shl32.l-dst-dst32-Rn-direct-Unprefixed-SI", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,$Dst32AnUnprefixedSI */
{
M32C_INSN_SHL32_L_DST_DST32_AN_DIRECT_UNPREFIXED_SI, "shl32.l-dst-dst32-An-direct-Unprefixed-SI", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_DST_DST32_AN_INDIRECT_UNPREFIXED_SI, "shl32.l-dst-dst32-An-indirect-Unprefixed-SI", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-8-An-relative-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-16-An-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-24-An-relative-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_L_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-8-SB-relative-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_L_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-16-SB-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_L_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-8-FB-relative-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_L_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-16-FB-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u16} */
{
M32C_INSN_SHL32_L_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-16-absolute-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,${Dsp-16-u24} */
{
M32C_INSN_SHL32_L_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "shl32.l-dst-dst32-16-24-absolute-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SHL32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "shl32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SHL32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "shl32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "shl32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "shl.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "shl.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SHL32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "shl32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "shl.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "shl32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "shl.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.l${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SHL32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "shl32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "shl.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w r1h,$Dst32RnUnprefixedHI */
{
M32C_INSN_SHL32_W_DST_DST32_RN_DIRECT_UNPREFIXED_HI, "shl32.w-dst-dst32-Rn-direct-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,$Dst32AnUnprefixedHI */
{
M32C_INSN_SHL32_W_DST_DST32_AN_DIRECT_UNPREFIXED_HI, "shl32.w-dst-dst32-An-direct-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_DST_DST32_AN_INDIRECT_UNPREFIXED_HI, "shl32.w-dst-dst32-An-indirect-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-8-An-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-16-An-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-24-An-relative-Unprefixed-HI", "shl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_W_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-8-SB-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_W_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-16-SB-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_W_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-8-FB-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_W_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-16-FB-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16} */
{
M32C_INSN_SHL32_W_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-16-absolute-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u24} */
{
M32C_INSN_SHL32_W_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "shl32.w-dst-dst32-16-24-absolute-Unprefixed-HI", "shl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,$Dst32RnUnprefixedQI */
{
M32C_INSN_SHL32_B_DST_DST32_RN_DIRECT_UNPREFIXED_QI, "shl32.b-dst-dst32-Rn-direct-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,$Dst32AnUnprefixedQI */
{
M32C_INSN_SHL32_B_DST_DST32_AN_DIRECT_UNPREFIXED_QI, "shl32.b-dst-dst32-An-direct-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_DST_DST32_AN_INDIRECT_UNPREFIXED_QI, "shl32.b-dst-dst32-An-indirect-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-8-An-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-16-An-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-24-An-relative-Unprefixed-QI", "shl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_B_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-8-SB-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_B_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-16-SB-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_B_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-8-FB-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_B_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-16-FB-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16} */
{
M32C_INSN_SHL32_B_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-16-absolute-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u24} */
{
M32C_INSN_SHL32_B_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "shl32.b-dst-dst32-16-24-absolute-Unprefixed-QI", "shl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,$Dst16RnHI */
{
M32C_INSN_SHL16_W_DST_DST16_RN_DIRECT_HI, "shl16.w-dst-dst16-Rn-direct-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,$Dst16AnHI */
{
M32C_INSN_SHL16_W_DST_DST16_AN_DIRECT_HI, "shl16.w-dst-dst16-An-direct-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,[$Dst16An] */
{
M32C_INSN_SHL16_W_DST_DST16_AN_INDIRECT_HI, "shl16.w-dst-dst16-An-indirect-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHL16_W_DST_DST16_16_8_AN_RELATIVE_HI, "shl16.w-dst-dst16-16-8-An-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHL16_W_DST_DST16_16_16_AN_RELATIVE_HI, "shl16.w-dst-dst16-16-16-An-relative-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL16_W_DST_DST16_16_8_SB_RELATIVE_HI, "shl16.w-dst-dst16-16-8-SB-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL16_W_DST_DST16_16_16_SB_RELATIVE_HI, "shl16.w-dst-dst16-16-16-SB-relative-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL16_W_DST_DST16_16_8_FB_RELATIVE_HI, "shl16.w-dst-dst16-16-8-FB-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w r1h,${Dsp-16-u16} */
{
M32C_INSN_SHL16_W_DST_DST16_16_16_ABSOLUTE_HI, "shl16.w-dst-dst16-16-16-absolute-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,$Dst16RnQI */
{
M32C_INSN_SHL16_B_DST_DST16_RN_DIRECT_QI, "shl16.b-dst-dst16-Rn-direct-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,$Dst16AnQI */
{
M32C_INSN_SHL16_B_DST_DST16_AN_DIRECT_QI, "shl16.b-dst-dst16-An-direct-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,[$Dst16An] */
{
M32C_INSN_SHL16_B_DST_DST16_AN_INDIRECT_QI, "shl16.b-dst-dst16-An-indirect-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHL16_B_DST_DST16_16_8_AN_RELATIVE_QI, "shl16.b-dst-dst16-16-8-An-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHL16_B_DST_DST16_16_16_AN_RELATIVE_QI, "shl16.b-dst-dst16-16-16-An-relative-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL16_B_DST_DST16_16_8_SB_RELATIVE_QI, "shl16.b-dst-dst16-16-8-SB-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL16_B_DST_DST16_16_16_SB_RELATIVE_QI, "shl16.b-dst-dst16-16-16-SB-relative-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL16_B_DST_DST16_16_8_FB_RELATIVE_QI, "shl16.b-dst-dst16-16-8-FB-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.b r1h,${Dsp-16-u16} */
{
M32C_INSN_SHL16_B_DST_DST16_16_16_ABSOLUTE_QI, "shl16.b-dst-dst16-16-16-absolute-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "shl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_SHL32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "shl32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "shl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "shl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_SHL32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "shl32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "shl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "shl16.w-imm4-Q-16-dst16-Rn-direct-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "shl16.w-imm4-Q-16-dst16-An-direct-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "shl16.w-imm4-Q-16-dst16-An-indirect-HI", "shl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "shl16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "shl16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "shl16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "shl16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "shl16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "shl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_SHL16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "shl16.w-imm4-Q-16-dst16-16-16-absolute-HI", "shl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "shl16.b-imm4-Q-16-dst16-Rn-direct-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "shl16.b-imm4-Q-16-dst16-An-direct-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "shl16.b-imm4-Q-16-dst16-An-indirect-QI", "shl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "shl16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "shl16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "shl16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "shl16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "shl16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "shl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_SHL16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "shl16.b-imm4-Q-16-dst16-16-16-absolute-QI", "shl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SHANC32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "shanc32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "shanc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SHANC32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "shanc32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "shanc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHANC32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "shanc32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "shanc.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHANC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "shanc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHANC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "shanc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHANC32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "shanc.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHANC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "shanc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHANC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "shanc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHANC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "shanc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SHANC32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "shanc32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "shanc.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHANC32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "shanc32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "shanc.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SHANC32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "shanc32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "shanc.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l r1h,$Dst32RnUnprefixedSI */
{
M32C_INSN_SHA32_L_DST_DST32_RN_DIRECT_UNPREFIXED_SI, "sha32.l-dst-dst32-Rn-direct-Unprefixed-SI", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,$Dst32AnUnprefixedSI */
{
M32C_INSN_SHA32_L_DST_DST32_AN_DIRECT_UNPREFIXED_SI, "sha32.l-dst-dst32-An-direct-Unprefixed-SI", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_DST_DST32_AN_INDIRECT_UNPREFIXED_SI, "sha32.l-dst-dst32-An-indirect-Unprefixed-SI", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-8-An-relative-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-16-An-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-24-An-relative-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_L_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-8-SB-relative-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_L_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-16-SB-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_L_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-8-FB-relative-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_L_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-16-FB-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u16} */
{
M32C_INSN_SHA32_L_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-16-absolute-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,${Dsp-16-u24} */
{
M32C_INSN_SHA32_L_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sha32.l-dst-dst32-16-24-absolute-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SHA32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "sha32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SHA32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "sha32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "sha32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "sha.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "sha.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SHA32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sha32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "sha.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sha32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "sha.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.l${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SHA32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sha32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "sha.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w r1h,$Dst32RnUnprefixedHI */
{
M32C_INSN_SHA32_W_DST_DST32_RN_DIRECT_UNPREFIXED_HI, "sha32.w-dst-dst32-Rn-direct-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,$Dst32AnUnprefixedHI */
{
M32C_INSN_SHA32_W_DST_DST32_AN_DIRECT_UNPREFIXED_HI, "sha32.w-dst-dst32-An-direct-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_DST_DST32_AN_INDIRECT_UNPREFIXED_HI, "sha32.w-dst-dst32-An-indirect-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-8-An-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-16-An-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-24-An-relative-Unprefixed-HI", "sha.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_W_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-8-SB-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_W_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-16-SB-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_W_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-8-FB-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_W_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-16-FB-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16} */
{
M32C_INSN_SHA32_W_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-16-absolute-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u24} */
{
M32C_INSN_SHA32_W_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sha32.w-dst-dst32-16-24-absolute-Unprefixed-HI", "sha.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,$Dst32RnUnprefixedQI */
{
M32C_INSN_SHA32_B_DST_DST32_RN_DIRECT_UNPREFIXED_QI, "sha32.b-dst-dst32-Rn-direct-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,$Dst32AnUnprefixedQI */
{
M32C_INSN_SHA32_B_DST_DST32_AN_DIRECT_UNPREFIXED_QI, "sha32.b-dst-dst32-An-direct-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_DST_DST32_AN_INDIRECT_UNPREFIXED_QI, "sha32.b-dst-dst32-An-indirect-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-8-An-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-16-An-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-24-An-relative-Unprefixed-QI", "sha.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_B_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-8-SB-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_B_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-16-SB-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_B_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-8-FB-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_B_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-16-FB-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16} */
{
M32C_INSN_SHA32_B_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-16-absolute-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u24} */
{
M32C_INSN_SHA32_B_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sha32.b-dst-dst32-16-24-absolute-Unprefixed-QI", "sha.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,$Dst16RnHI */
{
M32C_INSN_SHA16_W_DST_DST16_RN_DIRECT_HI, "sha16.w-dst-dst16-Rn-direct-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,$Dst16AnHI */
{
M32C_INSN_SHA16_W_DST_DST16_AN_DIRECT_HI, "sha16.w-dst-dst16-An-direct-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,[$Dst16An] */
{
M32C_INSN_SHA16_W_DST_DST16_AN_INDIRECT_HI, "sha16.w-dst-dst16-An-indirect-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHA16_W_DST_DST16_16_8_AN_RELATIVE_HI, "sha16.w-dst-dst16-16-8-An-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHA16_W_DST_DST16_16_16_AN_RELATIVE_HI, "sha16.w-dst-dst16-16-16-An-relative-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA16_W_DST_DST16_16_8_SB_RELATIVE_HI, "sha16.w-dst-dst16-16-8-SB-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA16_W_DST_DST16_16_16_SB_RELATIVE_HI, "sha16.w-dst-dst16-16-16-SB-relative-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA16_W_DST_DST16_16_8_FB_RELATIVE_HI, "sha16.w-dst-dst16-16-8-FB-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w r1h,${Dsp-16-u16} */
{
M32C_INSN_SHA16_W_DST_DST16_16_16_ABSOLUTE_HI, "sha16.w-dst-dst16-16-16-absolute-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,$Dst16RnQI */
{
M32C_INSN_SHA16_B_DST_DST16_RN_DIRECT_QI, "sha16.b-dst-dst16-Rn-direct-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,$Dst16AnQI */
{
M32C_INSN_SHA16_B_DST_DST16_AN_DIRECT_QI, "sha16.b-dst-dst16-An-direct-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,[$Dst16An] */
{
M32C_INSN_SHA16_B_DST_DST16_AN_INDIRECT_QI, "sha16.b-dst-dst16-An-indirect-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHA16_B_DST_DST16_16_8_AN_RELATIVE_QI, "sha16.b-dst-dst16-16-8-An-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHA16_B_DST_DST16_16_16_AN_RELATIVE_QI, "sha16.b-dst-dst16-16-16-An-relative-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA16_B_DST_DST16_16_8_SB_RELATIVE_QI, "sha16.b-dst-dst16-16-8-SB-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA16_B_DST_DST16_16_16_SB_RELATIVE_QI, "sha16.b-dst-dst16-16-16-SB-relative-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA16_B_DST_DST16_16_8_FB_RELATIVE_QI, "sha16.b-dst-dst16-16-8-FB-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.b r1h,${Dsp-16-u16} */
{
M32C_INSN_SHA16_B_DST_DST16_16_16_ABSOLUTE_QI, "sha16.b-dst-dst16-16-16-absolute-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "sha.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_SHA32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sha32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "sha.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "sha.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_SHA32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sha32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "sha.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "sha16.w-imm4-Q-16-dst16-Rn-direct-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "sha16.w-imm4-Q-16-dst16-An-direct-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "sha16.w-imm4-Q-16-dst16-An-indirect-HI", "sha.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "sha16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "sha16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "sha16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "sha16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "sha16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "sha.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_SHA16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "sha16.w-imm4-Q-16-dst16-16-16-absolute-HI", "sha.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "sha16.b-imm4-Q-16-dst16-Rn-direct-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "sha16.b-imm4-Q-16-dst16-An-direct-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "sha16.b-imm4-Q-16-dst16-An-indirect-QI", "sha.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "sha16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "sha16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "sha16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "sha16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "sha16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "sha.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_SHA16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "sha16.b-imm4-Q-16-dst16-16-16-absolute-QI", "sha.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sc${sccond32} $Dst32RnUnprefixedHI */
{
M32C_INSN_SCCND_DST32_RN_DIRECT_UNPREFIXED_HI, "sccnd-dst32-Rn-direct-Unprefixed-HI", "sc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} $Dst32AnUnprefixedHI */
{
M32C_INSN_SCCND_DST32_AN_DIRECT_UNPREFIXED_HI, "sccnd-dst32-An-direct-Unprefixed-HI", "sc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} [$Dst32AnUnprefixed] */
{
M32C_INSN_SCCND_DST32_AN_INDIRECT_UNPREFIXED_HI, "sccnd-dst32-An-indirect-Unprefixed-HI", "sc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SCCND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-8-An-relative-Unprefixed-HI", "sc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SCCND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-16-An-relative-Unprefixed-HI", "sc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SCCND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-24-An-relative-Unprefixed-HI", "sc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u8}[sb] */
{
M32C_INSN_SCCND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-8-SB-relative-Unprefixed-HI", "sc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u16}[sb] */
{
M32C_INSN_SCCND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-16-SB-relative-Unprefixed-HI", "sc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-s8}[fb] */
{
M32C_INSN_SCCND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-8-FB-relative-Unprefixed-HI", "sc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-s16}[fb] */
{
M32C_INSN_SCCND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sccnd-dst32-16-16-FB-relative-Unprefixed-HI", "sc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u16} */
{
M32C_INSN_SCCND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sccnd-dst32-16-16-absolute-Unprefixed-HI", "sc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sc${sccond32} ${Dsp-16-u24} */
{
M32C_INSN_SCCND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sccnd-dst32-16-24-absolute-Unprefixed-HI", "sc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "sbjnz.w", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sbjnz32.w-imm4-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "sbjnz.w", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},$Dst32RnUnprefixedHI,${Lab-16-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "sbjnz32.w-imm4-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},$Dst32AnUnprefixedHI,${Lab-16-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "sbjnz32.w-imm4-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
{
M32C_INSN_SBJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "sbjnz32.w-imm4-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "sbjnz.b", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sbjnz32.b-imm4-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "sbjnz.b", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},$Dst32RnUnprefixedQI,${Lab-16-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "sbjnz32.b-imm4-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},$Dst32AnUnprefixedQI,${Lab-16-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "sbjnz32.b-imm4-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
{
M32C_INSN_SBJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "sbjnz32.b-imm4-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_8_DST16_16_8_AN_RELATIVE_HI, "sbjnz16.w-imm4-16-8-dst16-16-8-An-relative-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_8_DST16_16_8_SB_RELATIVE_HI, "sbjnz16.w-imm4-16-8-dst16-16-8-SB-relative-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_8_DST16_16_8_FB_RELATIVE_HI, "sbjnz16.w-imm4-16-8-dst16-16-8-FB-relative-HI", "sbjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_16_DST16_16_16_AN_RELATIVE_HI, "sbjnz16.w-imm4-16-16-dst16-16-16-An-relative-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_16_DST16_16_16_SB_RELATIVE_HI, "sbjnz16.w-imm4-16-16-dst16-16-16-SB-relative-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_16_16_DST16_16_16_ABSOLUTE_HI, "sbjnz16.w-imm4-16-16-dst16-16-16-absolute-HI", "sbjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},$Dst16RnHI,${Lab-16-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_BASIC_DST16_RN_DIRECT_HI, "sbjnz16.w-imm4-basic-dst16-Rn-direct-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},$Dst16AnHI,${Lab-16-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_BASIC_DST16_AN_DIRECT_HI, "sbjnz16.w-imm4-basic-dst16-An-direct-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.w #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
{
M32C_INSN_SBJNZ16_W_IMM4_BASIC_DST16_AN_INDIRECT_HI, "sbjnz16.w-imm4-basic-dst16-An-indirect-HI", "sbjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_8_DST16_16_8_AN_RELATIVE_QI, "sbjnz16.b-imm4-16-8-dst16-16-8-An-relative-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_8_DST16_16_8_SB_RELATIVE_QI, "sbjnz16.b-imm4-16-8-dst16-16-8-SB-relative-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_8_DST16_16_8_FB_RELATIVE_QI, "sbjnz16.b-imm4-16-8-dst16-16-8-FB-relative-QI", "sbjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_16_DST16_16_16_AN_RELATIVE_QI, "sbjnz16.b-imm4-16-16-dst16-16-16-An-relative-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_16_DST16_16_16_SB_RELATIVE_QI, "sbjnz16.b-imm4-16-16-dst16-16-16-SB-relative-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_16_16_DST16_16_16_ABSOLUTE_QI, "sbjnz16.b-imm4-16-16-dst16-16-16-absolute-QI", "sbjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},$Dst16RnQI,${Lab-16-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_BASIC_DST16_RN_DIRECT_QI, "sbjnz16.b-imm4-basic-dst16-Rn-direct-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},$Dst16AnQI,${Lab-16-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_BASIC_DST16_AN_DIRECT_QI, "sbjnz16.b-imm4-basic-dst16-An-direct-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbjnz.b #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
{
M32C_INSN_SBJNZ16_B_IMM4_BASIC_DST16_AN_INDIRECT_QI, "sbjnz16.b-imm4-basic-dst16-An-indirect-QI", "sbjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_SBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_SBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "sbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "sbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "sbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_SBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "sbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_SBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_SBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_SBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "sbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "sbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "sbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "sbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_SBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "sbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_SBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sbb16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sbb16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SBB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sbb16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "sbb16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "sbb16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SBB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "sbb16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],$Dst16RnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],$Dst16AnHI */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "sbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "sbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sbb16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sbb16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_SBB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sbb16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sbb16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sbb16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SBB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sbb16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "sbb16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "sbb16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SBB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "sbb16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],$Dst16RnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],$Dst16AnQI */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "sbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sbb16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sbb16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.b${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_SBB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sbb16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_SBB32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "sbb32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_SBB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "sbb32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "sbb32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_SBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "sbb32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "sbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "sbb32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_SBB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "sbb32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "sbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_SBB32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "sbb32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_SBB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "sbb32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "sbb32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_SBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_SBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_SBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_SBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_SBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "sbb32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "sbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_SBB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "sbb32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_SBB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "sbb32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "sbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_SBB16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "sbb16.w-imm-G-basic-dst16-Rn-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_SBB16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "sbb16.w-imm-G-basic-dst16-An-direct-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_SBB16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "sbb16.w-imm-G-basic-dst16-An-indirect-HI", "sbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "sbb16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "sbb16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "sbb16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "sbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "sbb16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "sbb16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_SBB16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "sbb16.w-imm-G-16-16-dst16-16-16-absolute-HI", "sbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_SBB16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "sbb16.b-imm-G-basic-dst16-Rn-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_SBB16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "sbb16.b-imm-G-basic-dst16-An-direct-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_SBB16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "sbb16.b-imm-G-basic-dst16-An-indirect-QI", "sbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SBB16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "sbb16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SBB16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "sbb16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SBB16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "sbb16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "sbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SBB16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "sbb16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SBB16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "sbb16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SBB16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "sbb16.b-imm-G-16-16-dst16-16-16-absolute-QI", "sbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w r1h,$Dst32RnUnprefixedHI */
{
M32C_INSN_ROT32_W_DST_DST32_RN_DIRECT_UNPREFIXED_HI, "rot32.w-dst-dst32-Rn-direct-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,$Dst32AnUnprefixedHI */
{
M32C_INSN_ROT32_W_DST_DST32_AN_DIRECT_UNPREFIXED_HI, "rot32.w-dst-dst32-An-direct-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_DST_DST32_AN_INDIRECT_UNPREFIXED_HI, "rot32.w-dst-dst32-An-indirect-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-8-An-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-16-An-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-24-An-relative-Unprefixed-HI", "rot.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT32_W_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-8-SB-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT32_W_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-16-SB-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT32_W_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-8-FB-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_ROT32_W_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-16-FB-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16} */
{
M32C_INSN_ROT32_W_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-16-absolute-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u24} */
{
M32C_INSN_ROT32_W_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "rot32.w-dst-dst32-16-24-absolute-Unprefixed-HI", "rot.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,$Dst32RnUnprefixedQI */
{
M32C_INSN_ROT32_B_DST_DST32_RN_DIRECT_UNPREFIXED_QI, "rot32.b-dst-dst32-Rn-direct-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,$Dst32AnUnprefixedQI */
{
M32C_INSN_ROT32_B_DST_DST32_AN_DIRECT_UNPREFIXED_QI, "rot32.b-dst-dst32-An-direct-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_DST_DST32_AN_INDIRECT_UNPREFIXED_QI, "rot32.b-dst-dst32-An-indirect-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_DST_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-8-An-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_DST_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-16-An-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_DST_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-24-An-relative-Unprefixed-QI", "rot.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT32_B_DST_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-8-SB-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT32_B_DST_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-16-SB-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT32_B_DST_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-8-FB-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-s16}[fb] */
{
M32C_INSN_ROT32_B_DST_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-16-FB-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16} */
{
M32C_INSN_ROT32_B_DST_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-16-absolute-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u24} */
{
M32C_INSN_ROT32_B_DST_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "rot32.b-dst-dst32-16-24-absolute-Unprefixed-QI", "rot.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,$Dst16RnHI */
{
M32C_INSN_ROT16_W_DST_DST16_RN_DIRECT_HI, "rot16.w-dst-dst16-Rn-direct-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,$Dst16AnHI */
{
M32C_INSN_ROT16_W_DST_DST16_AN_DIRECT_HI, "rot16.w-dst-dst16-An-direct-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,[$Dst16An] */
{
M32C_INSN_ROT16_W_DST_DST16_AN_INDIRECT_HI, "rot16.w-dst-dst16-An-indirect-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROT16_W_DST_DST16_16_8_AN_RELATIVE_HI, "rot16.w-dst-dst16-16-8-An-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROT16_W_DST_DST16_16_16_AN_RELATIVE_HI, "rot16.w-dst-dst16-16-16-An-relative-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT16_W_DST_DST16_16_8_SB_RELATIVE_HI, "rot16.w-dst-dst16-16-8-SB-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT16_W_DST_DST16_16_16_SB_RELATIVE_HI, "rot16.w-dst-dst16-16-16-SB-relative-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT16_W_DST_DST16_16_8_FB_RELATIVE_HI, "rot16.w-dst-dst16-16-8-FB-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w r1h,${Dsp-16-u16} */
{
M32C_INSN_ROT16_W_DST_DST16_16_16_ABSOLUTE_HI, "rot16.w-dst-dst16-16-16-absolute-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,$Dst16RnQI */
{
M32C_INSN_ROT16_B_DST_DST16_RN_DIRECT_QI, "rot16.b-dst-dst16-Rn-direct-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,$Dst16AnQI */
{
M32C_INSN_ROT16_B_DST_DST16_AN_DIRECT_QI, "rot16.b-dst-dst16-An-direct-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,[$Dst16An] */
{
M32C_INSN_ROT16_B_DST_DST16_AN_INDIRECT_QI, "rot16.b-dst-dst16-An-indirect-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROT16_B_DST_DST16_16_8_AN_RELATIVE_QI, "rot16.b-dst-dst16-16-8-An-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROT16_B_DST_DST16_16_16_AN_RELATIVE_QI, "rot16.b-dst-dst16-16-16-An-relative-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT16_B_DST_DST16_16_8_SB_RELATIVE_QI, "rot16.b-dst-dst16-16-8-SB-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT16_B_DST_DST16_16_16_SB_RELATIVE_QI, "rot16.b-dst-dst16-16-16-SB-relative-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT16_B_DST_DST16_16_8_FB_RELATIVE_QI, "rot16.b-dst-dst16-16-8-FB-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.b r1h,${Dsp-16-u16} */
{
M32C_INSN_ROT16_B_DST_DST16_16_16_ABSOLUTE_QI, "rot16.b-dst-dst16-16-16-absolute-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "rot.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_ROT32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "rot32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "rot.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "rot.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
{
M32C_INSN_ROT32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "rot32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "rot.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "rot16.w-imm4-Q-16-dst16-Rn-direct-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "rot16.w-imm4-Q-16-dst16-An-direct-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "rot16.w-imm4-Q-16-dst16-An-indirect-HI", "rot.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "rot16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "rot16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "rot16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "rot16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "rot16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "rot.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_ROT16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "rot16.w-imm4-Q-16-dst16-16-16-absolute-HI", "rot.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "rot16.b-imm4-Q-16-dst16-Rn-direct-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "rot16.b-imm4-Q-16-dst16-An-direct-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "rot16.b-imm4-Q-16-dst16-An-indirect-QI", "rot.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "rot16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "rot16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "rot16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "rot16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "rot16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "rot.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
{
M32C_INSN_ROT16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "rot16.b-imm4-Q-16-dst16-16-16-absolute-QI", "rot.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w $Dst32RnUnprefixedHI */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w $Dst32AnUnprefixedHI */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w [$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "rorc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16} */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u24} */
{
M32C_INSN_RORC32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "rorc32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "rorc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b $Dst32RnUnprefixedQI */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b $Dst32AnUnprefixedQI */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b [$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "rorc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16} */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u24} */
{
M32C_INSN_RORC32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "rorc32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "rorc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w $Dst16RnHI */
{
M32C_INSN_RORC16_W_16_DST16_RN_DIRECT_HI, "rorc16.w-16-dst16-Rn-direct-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w $Dst16AnHI */
{
M32C_INSN_RORC16_W_16_DST16_AN_DIRECT_HI, "rorc16.w-16-dst16-An-direct-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w [$Dst16An] */
{
M32C_INSN_RORC16_W_16_DST16_AN_INDIRECT_HI, "rorc16.w-16-dst16-An-indirect-HI", "rorc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_RORC16_W_16_DST16_16_8_AN_RELATIVE_HI, "rorc16.w-16-dst16-16-8-An-relative-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_RORC16_W_16_DST16_16_16_AN_RELATIVE_HI, "rorc16.w-16-dst16-16-16-An-relative-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_RORC16_W_16_DST16_16_8_SB_RELATIVE_HI, "rorc16.w-16-dst16-16-8-SB-relative-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_RORC16_W_16_DST16_16_16_SB_RELATIVE_HI, "rorc16.w-16-dst16-16-16-SB-relative-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_RORC16_W_16_DST16_16_8_FB_RELATIVE_HI, "rorc16.w-16-dst16-16-8-FB-relative-HI", "rorc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.w ${Dsp-16-u16} */
{
M32C_INSN_RORC16_W_16_DST16_16_16_ABSOLUTE_HI, "rorc16.w-16-dst16-16-16-absolute-HI", "rorc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b $Dst16RnQI */
{
M32C_INSN_RORC16_B_16_DST16_RN_DIRECT_QI, "rorc16.b-16-dst16-Rn-direct-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b $Dst16AnQI */
{
M32C_INSN_RORC16_B_16_DST16_AN_DIRECT_QI, "rorc16.b-16-dst16-An-direct-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b [$Dst16An] */
{
M32C_INSN_RORC16_B_16_DST16_AN_INDIRECT_QI, "rorc16.b-16-dst16-An-indirect-QI", "rorc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_RORC16_B_16_DST16_16_8_AN_RELATIVE_QI, "rorc16.b-16-dst16-16-8-An-relative-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_RORC16_B_16_DST16_16_16_AN_RELATIVE_QI, "rorc16.b-16-dst16-16-16-An-relative-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_RORC16_B_16_DST16_16_8_SB_RELATIVE_QI, "rorc16.b-16-dst16-16-8-SB-relative-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_RORC16_B_16_DST16_16_16_SB_RELATIVE_QI, "rorc16.b-16-dst16-16-16-SB-relative-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_RORC16_B_16_DST16_16_8_FB_RELATIVE_QI, "rorc16.b-16-dst16-16-8-FB-relative-QI", "rorc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rorc.b ${Dsp-16-u16} */
{
M32C_INSN_RORC16_B_16_DST16_16_16_ABSOLUTE_QI, "rorc16.b-16-dst16-16-16-absolute-QI", "rorc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w $Dst32RnUnprefixedHI */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w $Dst32AnUnprefixedHI */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w [$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "rolc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16} */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u24} */
{
M32C_INSN_ROLC32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "rolc32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "rolc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b $Dst32RnUnprefixedQI */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b $Dst32AnUnprefixedQI */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b [$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "rolc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16} */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u24} */
{
M32C_INSN_ROLC32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "rolc32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "rolc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w $Dst16RnHI */
{
M32C_INSN_ROLC16_W_16_DST16_RN_DIRECT_HI, "rolc16.w-16-dst16-Rn-direct-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w $Dst16AnHI */
{
M32C_INSN_ROLC16_W_16_DST16_AN_DIRECT_HI, "rolc16.w-16-dst16-An-direct-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w [$Dst16An] */
{
M32C_INSN_ROLC16_W_16_DST16_AN_INDIRECT_HI, "rolc16.w-16-dst16-An-indirect-HI", "rolc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROLC16_W_16_DST16_16_8_AN_RELATIVE_HI, "rolc16.w-16-dst16-16-8-An-relative-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROLC16_W_16_DST16_16_16_AN_RELATIVE_HI, "rolc16.w-16-dst16-16-16-An-relative-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ROLC16_W_16_DST16_16_8_SB_RELATIVE_HI, "rolc16.w-16-dst16-16-8-SB-relative-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ROLC16_W_16_DST16_16_16_SB_RELATIVE_HI, "rolc16.w-16-dst16-16-16-SB-relative-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ROLC16_W_16_DST16_16_8_FB_RELATIVE_HI, "rolc16.w-16-dst16-16-8-FB-relative-HI", "rolc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.w ${Dsp-16-u16} */
{
M32C_INSN_ROLC16_W_16_DST16_16_16_ABSOLUTE_HI, "rolc16.w-16-dst16-16-16-absolute-HI", "rolc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b $Dst16RnQI */
{
M32C_INSN_ROLC16_B_16_DST16_RN_DIRECT_QI, "rolc16.b-16-dst16-Rn-direct-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b $Dst16AnQI */
{
M32C_INSN_ROLC16_B_16_DST16_AN_DIRECT_QI, "rolc16.b-16-dst16-An-direct-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b [$Dst16An] */
{
M32C_INSN_ROLC16_B_16_DST16_AN_INDIRECT_QI, "rolc16.b-16-dst16-An-indirect-QI", "rolc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ROLC16_B_16_DST16_16_8_AN_RELATIVE_QI, "rolc16.b-16-dst16-16-8-An-relative-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ROLC16_B_16_DST16_16_16_AN_RELATIVE_QI, "rolc16.b-16-dst16-16-16-An-relative-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ROLC16_B_16_DST16_16_8_SB_RELATIVE_QI, "rolc16.b-16-dst16-16-8-SB-relative-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ROLC16_B_16_DST16_16_16_SB_RELATIVE_QI, "rolc16.b-16-dst16-16-16-SB-relative-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ROLC16_B_16_DST16_16_8_FB_RELATIVE_QI, "rolc16.b-16-dst16-16-8-FB-relative-QI", "rolc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* rolc.b ${Dsp-16-u16} */
{
M32C_INSN_ROLC16_B_16_DST16_16_16_ABSOLUTE_QI, "rolc16.b-16-dst16-16-16-absolute-QI", "rolc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha [$Dst32AnUnprefixed] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-An-indirect-Unprefixed-Mova-SI", "pusha", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-8-An-relative-Unprefixed-Mova-SI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-16-An-relative-Unprefixed-Mova-SI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-24-An-relative-Unprefixed-Mova-SI", "pusha", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-8-SB-relative-Unprefixed-Mova-SI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-16-SB-relative-Unprefixed-Mova-SI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-8-FB-relative-Unprefixed-Mova-SI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-s16}[fb] */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-16-FB-relative-Unprefixed-Mova-SI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16} */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-16-absolute-Unprefixed-Mova-SI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u24} */
{
M32C_INSN_PUSHA32_16_UNPREFIXED_MOVA_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, "pusha32-16-Unprefixed-Mova-dst32-16-24-absolute-Unprefixed-Mova-SI", "pusha", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha [$Dst16An] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_AN_INDIRECT_MOVA_HI, "pusha16-16-Mova-dst16-An-indirect-Mova-HI", "pusha", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_8_AN_RELATIVE_MOVA_HI, "pusha16-16-Mova-dst16-16-8-An-relative-Mova-HI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_16_AN_RELATIVE_MOVA_HI, "pusha16-16-Mova-dst16-16-16-An-relative-Mova-HI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_8_SB_RELATIVE_MOVA_HI, "pusha16-16-Mova-dst16-16-8-SB-relative-Mova-HI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_16_SB_RELATIVE_MOVA_HI, "pusha16-16-Mova-dst16-16-16-SB-relative-Mova-HI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_8_FB_RELATIVE_MOVA_HI, "pusha16-16-Mova-dst16-16-8-FB-relative-Mova-HI", "pusha", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pusha ${Dsp-16-u16} */
{
M32C_INSN_PUSHA16_16_MOVA_DST16_16_16_ABSOLUTE_MOVA_HI, "pusha16-16-Mova-dst16-16-16-absolute-Mova-HI", "pusha", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l $Dst32RnUnprefixedSI */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "push.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l $Dst32AnUnprefixedSI */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-An-direct-Unprefixed-SI", "push.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l [$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-An-indirect-Unprefixed-SI", "push.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "push.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "push.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "push.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "push.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "push.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "push.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-s16}[fb] */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "push.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u16} */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "push.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.l ${Dsp-16-u24} */
{
M32C_INSN_PUSH32_L_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "push32.l-16-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "push.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${S} ${An16-push-S} */
{
M32C_INSN_PUSH16_B_S_AN_AN16_PUSH_S_DERIVED, "push16.b-s-an-An16-push-S-derived", "push.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.b${S} ${Rn16-push-S} */
{
M32C_INSN_PUSH16_B_S_RN_RN16_PUSH_S_DERIVED, "push16.b-s-rn-Rn16-push-S-derived", "push.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.w $Dst32RnUnprefixedHI */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w $Dst32AnUnprefixedHI */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w [$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "push.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u16} */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w ${Dsp-16-u24} */
{
M32C_INSN_PUSH32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "push32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "push.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b $Dst32RnUnprefixedQI */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b $Dst32AnUnprefixedQI */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b [$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "push.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u16} */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b ${Dsp-16-u24} */
{
M32C_INSN_PUSH32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "push32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "push.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} $Dst16RnHI */
{
M32C_INSN_PUSH16_W_16_DST16_RN_DIRECT_HI, "push16.w-16-dst16-Rn-direct-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} $Dst16AnHI */
{
M32C_INSN_PUSH16_W_16_DST16_AN_DIRECT_HI, "push16.w-16-dst16-An-direct-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} [$Dst16An] */
{
M32C_INSN_PUSH16_W_16_DST16_AN_INDIRECT_HI, "push16.w-16-dst16-An-indirect-HI", "push.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_PUSH16_W_16_DST16_16_8_AN_RELATIVE_HI, "push16.w-16-dst16-16-8-An-relative-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_PUSH16_W_16_DST16_16_16_AN_RELATIVE_HI, "push16.w-16-dst16-16-16-An-relative-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSH16_W_16_DST16_16_8_SB_RELATIVE_HI, "push16.w-16-dst16-16-8-SB-relative-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSH16_W_16_DST16_16_16_SB_RELATIVE_HI, "push16.w-16-dst16-16-16-SB-relative-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSH16_W_16_DST16_16_8_FB_RELATIVE_HI, "push16.w-16-dst16-16-8-FB-relative-HI", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.w${G} ${Dsp-16-u16} */
{
M32C_INSN_PUSH16_W_16_DST16_16_16_ABSOLUTE_HI, "push16.w-16-dst16-16-16-absolute-HI", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} $Dst16RnQI */
{
M32C_INSN_PUSH16_B_16_DST16_RN_DIRECT_QI, "push16.b-16-dst16-Rn-direct-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} $Dst16AnQI */
{
M32C_INSN_PUSH16_B_16_DST16_AN_DIRECT_QI, "push16.b-16-dst16-An-direct-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} [$Dst16An] */
{
M32C_INSN_PUSH16_B_16_DST16_AN_INDIRECT_QI, "push16.b-16-dst16-An-indirect-QI", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_PUSH16_B_16_DST16_16_8_AN_RELATIVE_QI, "push16.b-16-dst16-16-8-An-relative-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_PUSH16_B_16_DST16_16_16_AN_RELATIVE_QI, "push16.b-16-dst16-16-16-An-relative-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_PUSH16_B_16_DST16_16_8_SB_RELATIVE_QI, "push16.b-16-dst16-16-8-SB-relative-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_PUSH16_B_16_DST16_16_16_SB_RELATIVE_QI, "push16.b-16-dst16-16-16-SB-relative-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_PUSH16_B_16_DST16_16_8_FB_RELATIVE_QI, "push16.b-16-dst16-16-8-FB-relative-QI", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* push.b${G} ${Dsp-16-u16} */
{
M32C_INSN_PUSH16_B_16_DST16_16_16_ABSOLUTE_QI, "push16.b-16-dst16-16-16-absolute-QI", "push.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w${S} ${An16-push-S} */
{
M32C_INSN_POP16_B_S_AN_AN16_PUSH_S_DERIVED, "pop16.b-s-an-An16-push-S-derived", "pop.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pop.b${S} ${Rn16-push-S} */
{
M32C_INSN_POP16_B_S_RN_RN16_PUSH_S_DERIVED, "pop16.b-s-rn-Rn16-push-S-derived", "pop.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pop.w $Dst32RnUnprefixedHI */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w $Dst32AnUnprefixedHI */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w [$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "pop.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u16} */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.w ${Dsp-16-u24} */
{
M32C_INSN_POP32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "pop32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "pop.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b $Dst32RnUnprefixedQI */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b $Dst32AnUnprefixedQI */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b [$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "pop.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u16} */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* pop.b ${Dsp-16-u24} */
{
M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "pop.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w $Dst16RnHI */
+/* pop.w${G} $Dst16RnHI */
{
M32C_INSN_POP16_W_16_DST16_RN_DIRECT_HI, "pop16.w-16-dst16-Rn-direct-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w $Dst16AnHI */
+/* pop.w${G} $Dst16AnHI */
{
M32C_INSN_POP16_W_16_DST16_AN_DIRECT_HI, "pop16.w-16-dst16-An-direct-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w [$Dst16An] */
+/* pop.w${G} [$Dst16An] */
{
M32C_INSN_POP16_W_16_DST16_AN_INDIRECT_HI, "pop16.w-16-dst16-An-indirect-HI", "pop.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-u8}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_POP16_W_16_DST16_16_8_AN_RELATIVE_HI, "pop16.w-16-dst16-16-8-An-relative-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-u16}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_POP16_W_16_DST16_16_16_AN_RELATIVE_HI, "pop16.w-16-dst16-16-16-An-relative-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-u8}[sb] */
+/* pop.w${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_POP16_W_16_DST16_16_8_SB_RELATIVE_HI, "pop16.w-16-dst16-16-8-SB-relative-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-u16}[sb] */
+/* pop.w${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_POP16_W_16_DST16_16_16_SB_RELATIVE_HI, "pop16.w-16-dst16-16-16-SB-relative-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-s8}[fb] */
+/* pop.w${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_POP16_W_16_DST16_16_8_FB_RELATIVE_HI, "pop16.w-16-dst16-16-8-FB-relative-HI", "pop.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.w ${Dsp-16-u16} */
+/* pop.w${G} ${Dsp-16-u16} */
{
M32C_INSN_POP16_W_16_DST16_16_16_ABSOLUTE_HI, "pop16.w-16-dst16-16-16-absolute-HI", "pop.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b $Dst16RnQI */
+/* pop.b${G} $Dst16RnQI */
{
M32C_INSN_POP16_B_16_DST16_RN_DIRECT_QI, "pop16.b-16-dst16-Rn-direct-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b $Dst16AnQI */
+/* pop.b${G} $Dst16AnQI */
{
M32C_INSN_POP16_B_16_DST16_AN_DIRECT_QI, "pop16.b-16-dst16-An-direct-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b [$Dst16An] */
+/* pop.b${G} [$Dst16An] */
{
M32C_INSN_POP16_B_16_DST16_AN_INDIRECT_QI, "pop16.b-16-dst16-An-indirect-QI", "pop.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-u8}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_POP16_B_16_DST16_16_8_AN_RELATIVE_QI, "pop16.b-16-dst16-16-8-An-relative-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-u16}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_POP16_B_16_DST16_16_16_AN_RELATIVE_QI, "pop16.b-16-dst16-16-16-An-relative-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-u8}[sb] */
+/* pop.b${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_POP16_B_16_DST16_16_8_SB_RELATIVE_QI, "pop16.b-16-dst16-16-8-SB-relative-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-u16}[sb] */
+/* pop.b${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_POP16_B_16_DST16_16_16_SB_RELATIVE_QI, "pop16.b-16-dst16-16-16-SB-relative-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-s8}[fb] */
+/* pop.b${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_POP16_B_16_DST16_16_8_FB_RELATIVE_QI, "pop16.b-16-dst16-16-8-FB-relative-QI", "pop.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* pop.b ${Dsp-16-u16} */
+/* pop.b${G} ${Dsp-16-u16} */
{
M32C_INSN_POP16_B_16_DST16_16_16_ABSOLUTE_QI, "pop16.b-16-dst16-16-16-absolute-QI", "pop.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
+/* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
+ {
+ M32C_INSN_OR16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "or16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "or.b", 8,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
+ {
+ M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "or16.b.S-src2-src16-2-S-8-SB-relative-QI", "or.b", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
+ {
+ M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "or16.b.S-src2-src16-2-S-8-FB-relative-QI", "or.b", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
+ {
+ M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "or16.b.S-src2-src16-2-S-16-absolute-QI", "or.b", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_OR32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "or.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "or.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "or.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_OR32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "or.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_OR32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_OR32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_OR32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "or.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "or.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "or.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "or.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_OR32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "or.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_OR32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "or16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "or16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_OR16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "or16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "or16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "or16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_OR16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "or16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "or.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "or16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "or16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_OR16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "or16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "or16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "or16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_OR16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "or16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "or16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "or16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_OR16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "or16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "or16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "or16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_OR16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "or16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* or.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_OR32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "or32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_OR32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "or32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_OR32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "or32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_OR32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "or32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "or.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_OR32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "or32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_OR32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "or32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_OR32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "or32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_OR32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "or32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_OR16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "or16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_OR16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "or16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "or.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "or16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "or16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_OR16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "or16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_OR32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_OR32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "or32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "or32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_OR32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "or32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "or32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_OR32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "or32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "or.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_OR32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "or32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_OR32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "or32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "or32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_OR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_OR32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_OR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_OR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_OR32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "or32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_OR32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "or32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_OR32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "or32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "or.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_OR16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "or16.w-imm-G-basic-dst16-Rn-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_OR16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "or16.w-imm-G-basic-dst16-An-direct-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_OR16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "or16.w-imm-G-basic-dst16-An-indirect-HI", "or.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "or16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "or16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "or16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "or.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "or16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "or16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_OR16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "or16.w-imm-G-16-16-dst16-16-16-absolute-HI", "or.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_OR16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "or16.b-imm-G-basic-dst16-Rn-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_OR16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "or16.b-imm-G-basic-dst16-An-direct-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_OR16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "or16.b-imm-G-basic-dst16-An-indirect-QI", "or.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_OR16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "or16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_OR16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "or16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_OR16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "or16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "or.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_OR16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "or16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_OR16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "or16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_OR16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "or16.b-imm-G-16-16-dst16-16-16-absolute-QI", "or.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b:s r0l */
{
M32C_INSN_NOT16_B_S_DST16_3_S_R0L_DIRECT_QI, "not16.b.s-dst16-3-S-R0l-direct-QI", "not.b:s", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* not.b:s r0h */
{
M32C_INSN_NOT16_B_S_DST16_3_S_R0H_DIRECT_QI, "not16.b.s-dst16-3-S-R0h-direct-QI", "not.b:s", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* not.b:s ${Dsp-8-u8}[sb] */
{
M32C_INSN_NOT16_B_S_DST16_3_S_8_8_SB_RELATIVE_QI, "not16.b.s-dst16-3-S-8-8-SB-relative-QI", "not.b:s", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* not.b:s ${Dsp-8-s8}[fb] */
{
M32C_INSN_NOT16_B_S_DST16_3_S_8_8_FB_RELATIVE_QI, "not16.b.s-dst16-3-S-8-8-FB-relative-QI", "not.b:s", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* not.b:s ${Dsp-8-u16} */
{
M32C_INSN_NOT16_B_S_DST16_3_S_8_16_ABSOLUTE_QI, "not16.b.s-dst16-3-S-8-16-absolute-QI", "not.b:s", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* not.w${G} $Dst32RnUnprefixedHI */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} $Dst32AnUnprefixedHI */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} [$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "not.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-s16}[fb] */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16} */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u24} */
{
M32C_INSN_NOT32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "not32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "not.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} $Dst32RnUnprefixedQI */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} $Dst32AnUnprefixedQI */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} [$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "not.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-s16}[fb] */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16} */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u24} */
{
M32C_INSN_NOT32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "not32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "not.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} $Dst16RnHI */
{
M32C_INSN_NOT16_W_16_DST16_RN_DIRECT_HI, "not16.w-16-dst16-Rn-direct-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} $Dst16AnHI */
{
M32C_INSN_NOT16_W_16_DST16_AN_DIRECT_HI, "not16.w-16-dst16-An-direct-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} [$Dst16An] */
{
M32C_INSN_NOT16_W_16_DST16_AN_INDIRECT_HI, "not16.w-16-dst16-An-indirect-HI", "not.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_NOT16_W_16_DST16_16_8_AN_RELATIVE_HI, "not16.w-16-dst16-16-8-An-relative-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_NOT16_W_16_DST16_16_16_AN_RELATIVE_HI, "not16.w-16-dst16-16-16-An-relative-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_NOT16_W_16_DST16_16_8_SB_RELATIVE_HI, "not16.w-16-dst16-16-8-SB-relative-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_NOT16_W_16_DST16_16_16_SB_RELATIVE_HI, "not16.w-16-dst16-16-16-SB-relative-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_NOT16_W_16_DST16_16_8_FB_RELATIVE_HI, "not16.w-16-dst16-16-8-FB-relative-HI", "not.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.w${G} ${Dsp-16-u16} */
{
M32C_INSN_NOT16_W_16_DST16_16_16_ABSOLUTE_HI, "not16.w-16-dst16-16-16-absolute-HI", "not.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} $Dst16RnQI */
{
M32C_INSN_NOT16_B_16_DST16_RN_DIRECT_QI, "not16.b-16-dst16-Rn-direct-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} $Dst16AnQI */
{
M32C_INSN_NOT16_B_16_DST16_AN_DIRECT_QI, "not16.b-16-dst16-An-direct-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} [$Dst16An] */
{
M32C_INSN_NOT16_B_16_DST16_AN_INDIRECT_QI, "not16.b-16-dst16-An-indirect-QI", "not.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_NOT16_B_16_DST16_16_8_AN_RELATIVE_QI, "not16.b-16-dst16-16-8-An-relative-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_NOT16_B_16_DST16_16_16_AN_RELATIVE_QI, "not16.b-16-dst16-16-16-An-relative-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u8}[sb] */
{
M32C_INSN_NOT16_B_16_DST16_16_8_SB_RELATIVE_QI, "not16.b-16-dst16-16-8-SB-relative-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16}[sb] */
{
M32C_INSN_NOT16_B_16_DST16_16_16_SB_RELATIVE_QI, "not16.b-16-dst16-16-16-SB-relative-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-s8}[fb] */
{
M32C_INSN_NOT16_B_16_DST16_16_8_FB_RELATIVE_QI, "not16.b-16-dst16-16-8-FB-relative-QI", "not.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* not.b${G} ${Dsp-16-u16} */
{
M32C_INSN_NOT16_B_16_DST16_16_16_ABSOLUTE_QI, "not16.b-16-dst16-16-16-absolute-QI", "not.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w $Dst32RnUnprefixedHI */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w $Dst32AnUnprefixedHI */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w [$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "neg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16} */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u24} */
{
M32C_INSN_NEG32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "neg32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "neg.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b $Dst32RnUnprefixedQI */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b $Dst32AnUnprefixedQI */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b [$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "neg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16} */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u24} */
{
M32C_INSN_NEG32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "neg32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "neg.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w $Dst16RnHI */
{
M32C_INSN_NEG16_W_16_DST16_RN_DIRECT_HI, "neg16.w-16-dst16-Rn-direct-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w $Dst16AnHI */
{
M32C_INSN_NEG16_W_16_DST16_AN_DIRECT_HI, "neg16.w-16-dst16-An-direct-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w [$Dst16An] */
{
M32C_INSN_NEG16_W_16_DST16_AN_INDIRECT_HI, "neg16.w-16-dst16-An-indirect-HI", "neg.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_NEG16_W_16_DST16_16_8_AN_RELATIVE_HI, "neg16.w-16-dst16-16-8-An-relative-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_NEG16_W_16_DST16_16_16_AN_RELATIVE_HI, "neg16.w-16-dst16-16-16-An-relative-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_NEG16_W_16_DST16_16_8_SB_RELATIVE_HI, "neg16.w-16-dst16-16-8-SB-relative-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_NEG16_W_16_DST16_16_16_SB_RELATIVE_HI, "neg16.w-16-dst16-16-16-SB-relative-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_NEG16_W_16_DST16_16_8_FB_RELATIVE_HI, "neg16.w-16-dst16-16-8-FB-relative-HI", "neg.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.w ${Dsp-16-u16} */
{
M32C_INSN_NEG16_W_16_DST16_16_16_ABSOLUTE_HI, "neg16.w-16-dst16-16-16-absolute-HI", "neg.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b $Dst16RnQI */
{
M32C_INSN_NEG16_B_16_DST16_RN_DIRECT_QI, "neg16.b-16-dst16-Rn-direct-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b $Dst16AnQI */
{
M32C_INSN_NEG16_B_16_DST16_AN_DIRECT_QI, "neg16.b-16-dst16-An-direct-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b [$Dst16An] */
{
M32C_INSN_NEG16_B_16_DST16_AN_INDIRECT_QI, "neg16.b-16-dst16-An-indirect-QI", "neg.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_NEG16_B_16_DST16_16_8_AN_RELATIVE_QI, "neg16.b-16-dst16-16-8-An-relative-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_NEG16_B_16_DST16_16_16_AN_RELATIVE_QI, "neg16.b-16-dst16-16-16-An-relative-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_NEG16_B_16_DST16_16_8_SB_RELATIVE_QI, "neg16.b-16-dst16-16-8-SB-relative-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_NEG16_B_16_DST16_16_16_SB_RELATIVE_QI, "neg16.b-16-dst16-16-16-SB-relative-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_NEG16_B_16_DST16_16_8_FB_RELATIVE_QI, "neg16.b-16-dst16-16-8-FB-relative-QI", "neg.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* neg.b ${Dsp-16-u16} */
{
M32C_INSN_NEG16_B_16_DST16_16_16_ABSOLUTE_QI, "neg16.b-16-dst16-16-16-absolute-QI", "neg.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MULU32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MULU32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mulu.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mulu.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mulu.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MULU32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mulu.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MULU32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MULU32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MULU32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mulu.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mulu.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mulu.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mulu.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MULU32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mulu.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MULU32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mulu16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mulu16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MULU16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mulu16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mulu16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mulu16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MULU16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "mulu16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "mulu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "mulu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mulu16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mulu16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MULU16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mulu16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mulu16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mulu16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MULU16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mulu16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mulu16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mulu16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MULU16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "mulu16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "mulu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mulu16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mulu16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MULU16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mulu16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_MULU32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mulu32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_MULU32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mulu32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulu32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MULU32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mulu32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_MULU32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mulu32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mulu.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_MULU32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mulu32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_MULU32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mulu32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mulu32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MULU32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MULU32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULU32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mulu32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_MULU32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mulu32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mulu.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_MULU16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "mulu16.w-imm-G-basic-dst16-Rn-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_MULU16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "mulu16.w-imm-G-basic-dst16-An-direct-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_MULU16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "mulu16.w-imm-G-basic-dst16-An-indirect-HI", "mulu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "mulu16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "mulu16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "mulu16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "mulu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "mulu16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "mulu16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MULU16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "mulu16.w-imm-G-16-16-dst16-16-16-absolute-HI", "mulu.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_MULU16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "mulu16.b-imm-G-basic-dst16-Rn-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_MULU16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "mulu16.b-imm-G-basic-dst16-An-direct-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_MULU16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "mulu16.b-imm-G-basic-dst16-An-indirect-QI", "mulu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MULU16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "mulu16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MULU16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "mulu16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MULU16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "mulu16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "mulu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MULU16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "mulu16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MULU16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "mulu16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MULU16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "mulu16.b-imm-G-16-16-dst16-16-16-absolute-QI", "mulu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mulex $R3 */
{
M32C_INSN_MULEX_DST32_R3_DIRECT_UNPREFIXED_HI, "mulex-dst32-R3-direct-Unprefixed-HI", "mulex", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex $Dst32AnUnprefixedHI */
{
M32C_INSN_MULEX_DST32_AN_DIRECT_UNPREFIXED_HI, "mulex-dst32-An-direct-Unprefixed-HI", "mulex", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex [$Dst32AnUnprefixed] */
{
M32C_INSN_MULEX_DST32_AN_INDIRECT_UNPREFIXED_HI, "mulex-dst32-An-indirect-Unprefixed-HI", "mulex", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULEX_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-8-An-relative-Unprefixed-HI", "mulex", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULEX_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-16-An-relative-Unprefixed-HI", "mulex", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MULEX_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-24-An-relative-Unprefixed-HI", "mulex", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u8}[sb] */
{
M32C_INSN_MULEX_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-8-SB-relative-Unprefixed-HI", "mulex", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u16}[sb] */
{
M32C_INSN_MULEX_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-16-SB-relative-Unprefixed-HI", "mulex", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-s8}[fb] */
{
M32C_INSN_MULEX_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-8-FB-relative-Unprefixed-HI", "mulex", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-s16}[fb] */
{
M32C_INSN_MULEX_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mulex-dst32-16-16-FB-relative-Unprefixed-HI", "mulex", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u16} */
{
M32C_INSN_MULEX_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mulex-dst32-16-16-absolute-Unprefixed-HI", "mulex", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mulex ${Dsp-16-u24} */
{
M32C_INSN_MULEX_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mulex-dst32-16-24-absolute-Unprefixed-HI", "mulex", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
+/* mulu.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_RN_DIRECT_PREFIXED_SI, "mulu_l-dst32-Rn-direct-Prefixed-SI", "mulu.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_AN_DIRECT_PREFIXED_SI, "mulu_l-dst32-An-direct-Prefixed-SI", "mulu.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l [$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_AN_INDIRECT_PREFIXED_SI, "mulu_l-dst32-An-indirect-Prefixed-SI", "mulu.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-8-An-relative-Prefixed-SI", "mulu.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-16-An-relative-Prefixed-SI", "mulu.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-24-An-relative-Prefixed-SI", "mulu.l", 48,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-8-SB-relative-Prefixed-SI", "mulu.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-16-SB-relative-Prefixed-SI", "mulu.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-8-FB-relative-Prefixed-SI", "mulu.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "mulu_l-dst32-24-16-FB-relative-Prefixed-SI", "mulu.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u16},r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_16_ABSOLUTE_PREFIXED_SI, "mulu_l-dst32-24-16-absolute-Prefixed-SI", "mulu.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mulu.l ${Dsp-24-u24},r2r0 */
+ {
+ M32C_INSN_MULU_L_DST32_24_24_ABSOLUTE_PREFIXED_SI, "mulu_l-dst32-24-24-absolute-Prefixed-SI", "mulu.l", 48,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_RN_DIRECT_PREFIXED_SI, "mul_l-dst32-Rn-direct-Prefixed-SI", "mul.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_AN_DIRECT_PREFIXED_SI, "mul_l-dst32-An-direct-Prefixed-SI", "mul.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l [$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_AN_INDIRECT_PREFIXED_SI, "mul_l-dst32-An-indirect-Prefixed-SI", "mul.l", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-8-An-relative-Prefixed-SI", "mul.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-16-An-relative-Prefixed-SI", "mul.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-24-An-relative-Prefixed-SI", "mul.l", 48,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-8-SB-relative-Prefixed-SI", "mul.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-16-SB-relative-Prefixed-SI", "mul.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-8-FB-relative-Prefixed-SI", "mul.l", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "mul_l-dst32-24-16-FB-relative-Prefixed-SI", "mul.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u16},r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_16_ABSOLUTE_PREFIXED_SI, "mul_l-dst32-24-16-absolute-Prefixed-SI", "mul.l", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
+/* mul.l ${Dsp-24-u24},r2r0 */
+ {
+ M32C_INSN_MUL_L_DST32_24_24_ABSOLUTE_PREFIXED_SI, "mul_l-dst32-24-24-absolute-Prefixed-SI", "mul.l", 48,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MUL32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mul.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mul.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mul.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MUL32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mul.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MUL32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MUL32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MUL32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mul.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mul.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mul.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mul.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MUL32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mul.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MUL32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mul16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mul16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MUL16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mul16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mul16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mul16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MUL16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "mul16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "mul.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "mul.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mul16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mul16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MUL16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mul16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mul16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mul16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MUL16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mul16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mul16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mul16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MUL16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "mul16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "mul.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mul16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mul16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MUL16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mul16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_MUL32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mul32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_MUL32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mul32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mul32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MUL32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mul32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mul32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_MUL32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mul32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mul.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_MUL32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mul32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_MUL32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mul32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mul32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MUL32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MUL32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mul32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MUL32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mul32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_MUL32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mul32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mul.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_MUL16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "mul16.w-imm-G-basic-dst16-Rn-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_MUL16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "mul16.w-imm-G-basic-dst16-An-direct-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_MUL16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "mul16.w-imm-G-basic-dst16-An-indirect-HI", "mul.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "mul16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "mul16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "mul16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "mul.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "mul16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "mul16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MUL16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "mul16.w-imm-G-16-16-dst16-16-16-absolute-HI", "mul.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_MUL16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "mul16.b-imm-G-basic-dst16-Rn-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_MUL16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "mul16.b-imm-G-basic-dst16-An-direct-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_MUL16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "mul16.b-imm-G-basic-dst16-An-indirect-QI", "mul.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MUL16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "mul16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MUL16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "mul16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MUL16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "mul16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "mul.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MUL16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "mul16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MUL16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "mul16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MUL16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "mul16.b-imm-G-16-16-dst16-16-16-absolute-QI", "mul.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_MOVX32_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "movx32-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "movx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_MOVX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "movx32-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "movx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOVX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "movx32-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "movx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOVX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "movx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOVX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "movx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOVX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "movx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOVX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "movx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOVX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "movx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOVX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "movx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MOVX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "movx32-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "movx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOVX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "movx32-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "movx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movx${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_MOVX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "movx32-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "movx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* movhh $Dst32RnPrefixedQI,r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_RN_DIRECT_PREFIXED_QI, "movhh32.src-r0l-dst32-Rn-direct-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh $Dst32AnPrefixedQI,r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_AN_DIRECT_PREFIXED_QI, "movhh32.src-r0l-dst32-An-direct-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh [$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_AN_INDIRECT_PREFIXED_QI, "movhh32.src-r0l-dst32-An-indirect-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-8-An-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-16-An-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-24-An-relative-Prefixed-QI", "movhh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u8}[sb],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-8-SB-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u16}[sb],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-16-SB-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-s8}[fb],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-8-FB-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-s16}[fb],r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-16-FB-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u16},r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-16-absolute-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-24-u24},r0l */
{
M32C_INSN_MOVHH32_SRC_R0L_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movhh32.src-r0l-dst32-24-24-absolute-Prefixed-QI", "movhh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl $Dst32RnPrefixedQI,r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_RN_DIRECT_PREFIXED_QI, "movhl32.src-r0l-dst32-Rn-direct-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl $Dst32AnPrefixedQI,r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_AN_DIRECT_PREFIXED_QI, "movhl32.src-r0l-dst32-An-direct-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl [$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_AN_INDIRECT_PREFIXED_QI, "movhl32.src-r0l-dst32-An-indirect-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-8-An-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-16-An-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-24-An-relative-Prefixed-QI", "movhl", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u8}[sb],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-8-SB-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u16}[sb],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-16-SB-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-s8}[fb],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-8-FB-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-s16}[fb],r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-16-FB-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u16},r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-16-absolute-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-24-u24},r0l */
{
M32C_INSN_MOVHL32_SRC_R0L_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movhl32.src-r0l-dst32-24-24-absolute-Prefixed-QI", "movhl", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh $Dst32RnPrefixedQI,r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_RN_DIRECT_PREFIXED_QI, "movlh32.src-r0l-dst32-Rn-direct-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh $Dst32AnPrefixedQI,r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_AN_DIRECT_PREFIXED_QI, "movlh32.src-r0l-dst32-An-direct-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh [$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_AN_INDIRECT_PREFIXED_QI, "movlh32.src-r0l-dst32-An-indirect-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-8-An-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-16-An-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-24-An-relative-Prefixed-QI", "movlh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u8}[sb],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-8-SB-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u16}[sb],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-16-SB-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-s8}[fb],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-8-FB-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-s16}[fb],r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-16-FB-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u16},r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-16-absolute-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-24-u24},r0l */
{
M32C_INSN_MOVLH32_SRC_R0L_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movlh32.src-r0l-dst32-24-24-absolute-Prefixed-QI", "movlh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll $Dst32RnPrefixedQI,r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_RN_DIRECT_PREFIXED_QI, "movll32.src-r0l-dst32-Rn-direct-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll $Dst32AnPrefixedQI,r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_AN_DIRECT_PREFIXED_QI, "movll32.src-r0l-dst32-An-direct-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll [$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_AN_INDIRECT_PREFIXED_QI, "movll32.src-r0l-dst32-An-indirect-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-8-An-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-16-An-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-24-An-relative-Prefixed-QI", "movll", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u8}[sb],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-8-SB-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u16}[sb],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-16-SB-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-s8}[fb],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-8-FB-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-s16}[fb],r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movll32.src-r0l-dst32-24-16-FB-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u16},r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movll32.src-r0l-dst32-24-16-absolute-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-24-u24},r0l */
{
M32C_INSN_MOVLL32_SRC_R0L_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movll32.src-r0l-dst32-24-24-absolute-Prefixed-QI", "movll", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,$Dst32RnPrefixedQI */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_RN_DIRECT_PREFIXED_QI, "movhh32.r0l-dst-dst32-Rn-direct-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,$Dst32AnPrefixedQI */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_AN_DIRECT_PREFIXED_QI, "movhh32.r0l-dst-dst32-An-direct-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_AN_INDIRECT_PREFIXED_QI, "movhh32.r0l-dst-dst32-An-indirect-Prefixed-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-8-An-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-16-An-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-24-An-relative-Prefixed-QI", "movhh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u8}[sb] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-8-SB-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u16}[sb] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-16-SB-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-s8}[fb] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-8-FB-relative-Prefixed-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-s16}[fb] */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-16-FB-relative-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u16} */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-16-absolute-Prefixed-QI", "movhh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-24-u24} */
{
M32C_INSN_MOVHH32_R0L_DST_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movhh32.r0l-dst-dst32-24-24-absolute-Prefixed-QI", "movhh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,$Dst32RnPrefixedQI */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_RN_DIRECT_PREFIXED_QI, "movhl32.r0l-dst-dst32-Rn-direct-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,$Dst32AnPrefixedQI */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_AN_DIRECT_PREFIXED_QI, "movhl32.r0l-dst-dst32-An-direct-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_AN_INDIRECT_PREFIXED_QI, "movhl32.r0l-dst-dst32-An-indirect-Prefixed-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-8-An-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-16-An-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-24-An-relative-Prefixed-QI", "movhl", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u8}[sb] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-8-SB-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u16}[sb] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-16-SB-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-s8}[fb] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-8-FB-relative-Prefixed-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-s16}[fb] */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-16-FB-relative-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u16} */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-16-absolute-Prefixed-QI", "movhl", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-24-u24} */
{
M32C_INSN_MOVHL32_R0L_DST_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movhl32.r0l-dst-dst32-24-24-absolute-Prefixed-QI", "movhl", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,$Dst32RnPrefixedQI */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_RN_DIRECT_PREFIXED_QI, "movlh32.r0l-dst-dst32-Rn-direct-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,$Dst32AnPrefixedQI */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_AN_DIRECT_PREFIXED_QI, "movlh32.r0l-dst-dst32-An-direct-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_AN_INDIRECT_PREFIXED_QI, "movlh32.r0l-dst-dst32-An-indirect-Prefixed-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-8-An-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-16-An-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-24-An-relative-Prefixed-QI", "movlh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u8}[sb] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-8-SB-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u16}[sb] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-16-SB-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-s8}[fb] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-8-FB-relative-Prefixed-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-s16}[fb] */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-16-FB-relative-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u16} */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-16-absolute-Prefixed-QI", "movlh", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-24-u24} */
{
M32C_INSN_MOVLH32_R0L_DST_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movlh32.r0l-dst-dst32-24-24-absolute-Prefixed-QI", "movlh", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,$Dst32RnPrefixedQI */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_RN_DIRECT_PREFIXED_QI, "movll32.r0l-dst-dst32-Rn-direct-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,$Dst32AnPrefixedQI */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_AN_DIRECT_PREFIXED_QI, "movll32.r0l-dst-dst32-An-direct-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_AN_INDIRECT_PREFIXED_QI, "movll32.r0l-dst-dst32-An-indirect-Prefixed-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-8-An-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-16-An-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-24-An-relative-Prefixed-QI", "movll", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u8}[sb] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-8-SB-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u16}[sb] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-16-SB-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-s8}[fb] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-8-FB-relative-Prefixed-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-s16}[fb] */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-16-FB-relative-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u16} */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_16_ABSOLUTE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-16-absolute-Prefixed-QI", "movll", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-24-u24} */
{
M32C_INSN_MOVLL32_R0L_DST_DST32_24_24_ABSOLUTE_PREFIXED_QI, "movll32.r0l-dst-dst32-24-24-absolute-Prefixed-QI", "movll", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh $Dst16RnQI,r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_RN_DIRECT_QI, "movhh16.src-r0l-dst16-Rn-direct-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh $Dst16AnQI,r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_AN_DIRECT_QI, "movhh16.src-r0l-dst16-An-direct-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh [$Dst16An],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_AN_INDIRECT_QI, "movhh16.src-r0l-dst16-An-indirect-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-u8}[$Dst16An],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_8_AN_RELATIVE_QI, "movhh16.src-r0l-dst16-16-8-An-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-u16}[$Dst16An],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_16_AN_RELATIVE_QI, "movhh16.src-r0l-dst16-16-16-An-relative-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-u8}[sb],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_8_SB_RELATIVE_QI, "movhh16.src-r0l-dst16-16-8-SB-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-u16}[sb],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_16_SB_RELATIVE_QI, "movhh16.src-r0l-dst16-16-16-SB-relative-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-s8}[fb],r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_8_FB_RELATIVE_QI, "movhh16.src-r0l-dst16-16-8-FB-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh ${Dsp-16-u16},r0l */
{
M32C_INSN_MOVHH16_SRC_R0L_DST16_16_16_ABSOLUTE_QI, "movhh16.src-r0l-dst16-16-16-absolute-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl $Dst16RnQI,r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_RN_DIRECT_QI, "movhl16.src-r0l-dst16-Rn-direct-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl $Dst16AnQI,r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_AN_DIRECT_QI, "movhl16.src-r0l-dst16-An-direct-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl [$Dst16An],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_AN_INDIRECT_QI, "movhl16.src-r0l-dst16-An-indirect-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-u8}[$Dst16An],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_8_AN_RELATIVE_QI, "movhl16.src-r0l-dst16-16-8-An-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-u16}[$Dst16An],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_16_AN_RELATIVE_QI, "movhl16.src-r0l-dst16-16-16-An-relative-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-u8}[sb],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_8_SB_RELATIVE_QI, "movhl16.src-r0l-dst16-16-8-SB-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-u16}[sb],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_16_SB_RELATIVE_QI, "movhl16.src-r0l-dst16-16-16-SB-relative-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-s8}[fb],r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_8_FB_RELATIVE_QI, "movhl16.src-r0l-dst16-16-8-FB-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl ${Dsp-16-u16},r0l */
{
M32C_INSN_MOVHL16_SRC_R0L_DST16_16_16_ABSOLUTE_QI, "movhl16.src-r0l-dst16-16-16-absolute-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh $Dst16RnQI,r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_RN_DIRECT_QI, "movlh16.src-r0l-dst16-Rn-direct-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh $Dst16AnQI,r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_AN_DIRECT_QI, "movlh16.src-r0l-dst16-An-direct-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh [$Dst16An],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_AN_INDIRECT_QI, "movlh16.src-r0l-dst16-An-indirect-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-u8}[$Dst16An],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_8_AN_RELATIVE_QI, "movlh16.src-r0l-dst16-16-8-An-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-u16}[$Dst16An],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_16_AN_RELATIVE_QI, "movlh16.src-r0l-dst16-16-16-An-relative-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-u8}[sb],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_8_SB_RELATIVE_QI, "movlh16.src-r0l-dst16-16-8-SB-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-u16}[sb],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_16_SB_RELATIVE_QI, "movlh16.src-r0l-dst16-16-16-SB-relative-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-s8}[fb],r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_8_FB_RELATIVE_QI, "movlh16.src-r0l-dst16-16-8-FB-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh ${Dsp-16-u16},r0l */
{
M32C_INSN_MOVLH16_SRC_R0L_DST16_16_16_ABSOLUTE_QI, "movlh16.src-r0l-dst16-16-16-absolute-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll $Dst16RnQI,r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_RN_DIRECT_QI, "movll16.src-r0l-dst16-Rn-direct-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll $Dst16AnQI,r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_AN_DIRECT_QI, "movll16.src-r0l-dst16-An-direct-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll [$Dst16An],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_AN_INDIRECT_QI, "movll16.src-r0l-dst16-An-indirect-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-u8}[$Dst16An],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_8_AN_RELATIVE_QI, "movll16.src-r0l-dst16-16-8-An-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-u16}[$Dst16An],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_16_AN_RELATIVE_QI, "movll16.src-r0l-dst16-16-16-An-relative-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-u8}[sb],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_8_SB_RELATIVE_QI, "movll16.src-r0l-dst16-16-8-SB-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-u16}[sb],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_16_SB_RELATIVE_QI, "movll16.src-r0l-dst16-16-16-SB-relative-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-s8}[fb],r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_8_FB_RELATIVE_QI, "movll16.src-r0l-dst16-16-8-FB-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll ${Dsp-16-u16},r0l */
{
M32C_INSN_MOVLL16_SRC_R0L_DST16_16_16_ABSOLUTE_QI, "movll16.src-r0l-dst16-16-16-absolute-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,$Dst16RnQI */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_RN_DIRECT_QI, "movhh16.r0l-dst-dst16-Rn-direct-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,$Dst16AnQI */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_AN_DIRECT_QI, "movhh16.r0l-dst-dst16-An-direct-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,[$Dst16An] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_AN_INDIRECT_QI, "movhh16.r0l-dst-dst16-An-indirect-QI", "movhh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_8_AN_RELATIVE_QI, "movhh16.r0l-dst-dst16-16-8-An-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_16_AN_RELATIVE_QI, "movhh16.r0l-dst-dst16-16-16-An-relative-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_8_SB_RELATIVE_QI, "movhh16.r0l-dst-dst16-16-8-SB-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_16_SB_RELATIVE_QI, "movhh16.r0l-dst-dst16-16-16-SB-relative-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_8_FB_RELATIVE_QI, "movhh16.r0l-dst-dst16-16-8-FB-relative-QI", "movhh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhh r0l,${Dsp-16-u16} */
{
M32C_INSN_MOVHH16_R0L_DST_DST16_16_16_ABSOLUTE_QI, "movhh16.r0l-dst-dst16-16-16-absolute-QI", "movhh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,$Dst16RnQI */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_RN_DIRECT_QI, "movhl16.r0l-dst-dst16-Rn-direct-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,$Dst16AnQI */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_AN_DIRECT_QI, "movhl16.r0l-dst-dst16-An-direct-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,[$Dst16An] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_AN_INDIRECT_QI, "movhl16.r0l-dst-dst16-An-indirect-QI", "movhl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_8_AN_RELATIVE_QI, "movhl16.r0l-dst-dst16-16-8-An-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_16_AN_RELATIVE_QI, "movhl16.r0l-dst-dst16-16-16-An-relative-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_8_SB_RELATIVE_QI, "movhl16.r0l-dst-dst16-16-8-SB-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_16_SB_RELATIVE_QI, "movhl16.r0l-dst-dst16-16-16-SB-relative-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_8_FB_RELATIVE_QI, "movhl16.r0l-dst-dst16-16-8-FB-relative-QI", "movhl", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movhl r0l,${Dsp-16-u16} */
{
M32C_INSN_MOVHL16_R0L_DST_DST16_16_16_ABSOLUTE_QI, "movhl16.r0l-dst-dst16-16-16-absolute-QI", "movhl", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,$Dst16RnQI */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_RN_DIRECT_QI, "movlh16.r0l-dst-dst16-Rn-direct-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,$Dst16AnQI */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_AN_DIRECT_QI, "movlh16.r0l-dst-dst16-An-direct-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,[$Dst16An] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_AN_INDIRECT_QI, "movlh16.r0l-dst-dst16-An-indirect-QI", "movlh", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_8_AN_RELATIVE_QI, "movlh16.r0l-dst-dst16-16-8-An-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_16_AN_RELATIVE_QI, "movlh16.r0l-dst-dst16-16-16-An-relative-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_8_SB_RELATIVE_QI, "movlh16.r0l-dst-dst16-16-8-SB-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_16_SB_RELATIVE_QI, "movlh16.r0l-dst-dst16-16-16-SB-relative-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_8_FB_RELATIVE_QI, "movlh16.r0l-dst-dst16-16-8-FB-relative-QI", "movlh", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movlh r0l,${Dsp-16-u16} */
{
M32C_INSN_MOVLH16_R0L_DST_DST16_16_16_ABSOLUTE_QI, "movlh16.r0l-dst-dst16-16-16-absolute-QI", "movlh", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,$Dst16RnQI */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_RN_DIRECT_QI, "movll16.r0l-dst-dst16-Rn-direct-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,$Dst16AnQI */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_AN_DIRECT_QI, "movll16.r0l-dst-dst16-An-direct-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,[$Dst16An] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_AN_INDIRECT_QI, "movll16.r0l-dst-dst16-An-indirect-QI", "movll", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_8_AN_RELATIVE_QI, "movll16.r0l-dst-dst16-16-8-An-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_16_AN_RELATIVE_QI, "movll16.r0l-dst-dst16-16-16-An-relative-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_8_SB_RELATIVE_QI, "movll16.r0l-dst-dst16-16-8-SB-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_16_SB_RELATIVE_QI, "movll16.r0l-dst-dst16-16-16-SB-relative-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_8_FB_RELATIVE_QI, "movll16.r0l-dst-dst16-16-8-FB-relative-QI", "movll", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* movll r0l,${Dsp-16-u16} */
{
M32C_INSN_MOVLL16_R0L_DST_DST16_16_16_ABSOLUTE_QI, "movll16.r0l-dst-dst16-16-16-absolute-QI", "movll", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst32AnUnprefixed],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-An-indirect-Unprefixed-Mova-SI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-8-An-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-16-An-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-24-An-relative-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-8-SB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-16-SB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-8-FB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s16}[fb],a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-16-FB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-16-absolute-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24},a1 */
{
M32C_INSN_MOVA32_SRC_A1_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-a1-dst32-16-24-absolute-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst32AnUnprefixed],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-An-indirect-Unprefixed-Mova-SI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-8-An-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-16-An-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-24-An-relative-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-8-SB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-16-SB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-8-FB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s16}[fb],a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-16-FB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-16-absolute-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24},a0 */
{
M32C_INSN_MOVA32_SRC_A0_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-a0-dst32-16-24-absolute-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst32AnUnprefixed],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-An-indirect-Unprefixed-Mova-SI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-8-An-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-16-An-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-24-An-relative-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-8-SB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-16-SB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-8-FB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s16}[fb],r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-16-FB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-16-absolute-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24},r3r1 */
{
M32C_INSN_MOVA32_SRC_R3R1_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-r3r1-dst32-16-24-absolute-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst32AnUnprefixed],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-An-indirect-Unprefixed-Mova-SI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-8-An-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-16-An-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-24-An-relative-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-8-SB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-16-SB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-8-FB-relative-Unprefixed-Mova-SI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s16}[fb],r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-16-FB-relative-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-16-absolute-Unprefixed-Mova-SI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u24},r2r0 */
{
M32C_INSN_MOVA32_SRC_R2R0_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, "mova32.src-r2r0-dst32-16-24-absolute-Unprefixed-Mova-SI", "mova", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-a1-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-a1-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-a1-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-a1-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-a1-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-a1-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},a1 */
{
M32C_INSN_MOVA16_SRC_A1_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-a1-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-a0-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-a0-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-a0-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-a0-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-a0-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-a0-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},a0 */
{
M32C_INSN_MOVA16_SRC_A0_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-a0-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-r3-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-r3-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-r3-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-r3-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-r3-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-r3-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r3 */
{
M32C_INSN_MOVA16_SRC_R3_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-r3-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-r2-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-r2-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-r2-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-r2-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-r2-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-r2-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r2 */
{
M32C_INSN_MOVA16_SRC_R2_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-r2-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-r1-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-r1-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-r1-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-r1-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-r1-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-r1-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r1 */
{
M32C_INSN_MOVA16_SRC_R1_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-r1-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova [$Dst16An],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_AN_INDIRECT_MOVA_HI, "mova16.src-r0-dst16-An-indirect-Mova-HI", "mova", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[$Dst16An],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_8_AN_RELATIVE_MOVA_HI, "mova16.src-r0-dst16-16-8-An-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[$Dst16An],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_16_AN_RELATIVE_MOVA_HI, "mova16.src-r0-dst16-16-16-An-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u8}[sb],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_8_SB_RELATIVE_MOVA_HI, "mova16.src-r0-dst16-16-8-SB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16}[sb],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_16_SB_RELATIVE_MOVA_HI, "mova16.src-r0-dst16-16-16-SB-relative-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-s8}[fb],r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_8_FB_RELATIVE_MOVA_HI, "mova16.src-r0-dst16-16-8-FB-relative-Mova-HI", "mova", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mova ${Dsp-16-u16},r0 */
{
M32C_INSN_MOVA16_SRC_R0_DST16_16_16_ABSOLUTE_MOVA_HI, "mova16.src-r0-dst16-16-16-absolute-Mova-HI", "mova", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-dst-dspsp-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} $Dst32RnUnprefixedHI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-dst-dspsp-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} $Dst32AnUnprefixedHI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-dst-dspsp-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_W_DST_DSPSP_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-dst-dspsp-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-dst-dspsp-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} $Dst32RnUnprefixedQI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-dst-dspsp-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} $Dst32AnUnprefixedQI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-dst-dspsp-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV32_B_DST_DSPSP_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-dst-dspsp-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_8_DST16_16_8_AN_RELATIVE_HI, "mov16.w-dst-dspsp-16-8-dst16-16-8-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_8_DST16_16_8_SB_RELATIVE_HI, "mov16.w-dst-dspsp-16-8-dst16-16-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_8_DST16_16_8_FB_RELATIVE_HI, "mov16.w-dst-dspsp-16-8-dst16-16-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_16_DST16_16_16_AN_RELATIVE_HI, "mov16.w-dst-dspsp-16-16-dst16-16-16-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_16_DST16_16_16_SB_RELATIVE_HI, "mov16.w-dst-dspsp-16-16-dst16-16-16-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_16_16_DST16_16_16_ABSOLUTE_HI, "mov16.w-dst-dspsp-16-16-dst16-16-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} $Dst16RnHI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_BASIC_DST16_RN_DIRECT_HI, "mov16.w-dst-dspsp-basic-dst16-Rn-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} $Dst16AnHI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_BASIC_DST16_AN_DIRECT_HI, "mov16.w-dst-dspsp-basic-dst16-An-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} [$Dst16An],${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_W_DST_DSPSP_BASIC_DST16_AN_INDIRECT_HI, "mov16.w-dst-dspsp-basic-dst16-An-indirect-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_8_DST16_16_8_AN_RELATIVE_QI, "mov16.b-dst-dspsp-16-8-dst16-16-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_8_DST16_16_8_SB_RELATIVE_QI, "mov16.b-dst-dspsp-16-8-dst16-16-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_8_DST16_16_8_FB_RELATIVE_QI, "mov16.b-dst-dspsp-16-8-dst16-16-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_16_DST16_16_16_AN_RELATIVE_QI, "mov16.b-dst-dspsp-16-16-dst16-16-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_16_DST16_16_16_SB_RELATIVE_QI, "mov16.b-dst-dspsp-16-16-dst16-16-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_16_16_DST16_16_16_ABSOLUTE_QI, "mov16.b-dst-dspsp-16-16-dst16-16-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} $Dst16RnQI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_BASIC_DST16_RN_DIRECT_QI, "mov16.b-dst-dspsp-basic-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} $Dst16AnQI,${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_BASIC_DST16_AN_DIRECT_QI, "mov16.b-dst-dspsp-basic-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} [$Dst16An],${Dsp-16-s8}[sp] */
{
M32C_INSN_MOV16_B_DST_DSPSP_BASIC_DST16_AN_INDIRECT_QI, "mov16.b-dst-dspsp-basic-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_DSPSP_DST_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-dspsp-dst-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_DSPSP_DST_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-dspsp-dst-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_DSPSP_DST_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-dspsp-dst-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_DSPSP_DST_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-dspsp-dst-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_DSPSP_DST_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-dspsp-dst-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_DSPSP_DST_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-dspsp-dst-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_DSPSP_DST_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-dspsp-dst-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_DSPSP_DST_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-dspsp-dst-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_8_DST16_16_8_AN_RELATIVE_HI, "mov16.w-dspsp-dst-16-8-dst16-16-8-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_8_DST16_16_8_SB_RELATIVE_HI, "mov16.w-dspsp-dst-16-8-dst16-16-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_8_DST16_16_8_FB_RELATIVE_HI, "mov16.w-dspsp-dst-16-8-dst16-16-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_16_DST16_16_16_AN_RELATIVE_HI, "mov16.w-dspsp-dst-16-16-dst16-16-16-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_16_DST16_16_16_SB_RELATIVE_HI, "mov16.w-dspsp-dst-16-16-dst16-16-16-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
{
M32C_INSN_MOV16_W_DSPSP_DST_16_16_DST16_16_16_ABSOLUTE_HI, "mov16.w-dspsp-dst-16-16-dst16-16-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],$Dst16RnHI */
{
M32C_INSN_MOV16_W_DSPSP_DST_BASIC_DST16_RN_DIRECT_HI, "mov16.w-dspsp-dst-basic-dst16-Rn-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],$Dst16AnHI */
{
M32C_INSN_MOV16_W_DSPSP_DST_BASIC_DST16_AN_DIRECT_HI, "mov16.w-dspsp-dst-basic-dst16-An-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[sp],[$Dst16An] */
{
M32C_INSN_MOV16_W_DSPSP_DST_BASIC_DST16_AN_INDIRECT_HI, "mov16.w-dspsp-dst-basic-dst16-An-indirect-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_8_DST16_16_8_AN_RELATIVE_QI, "mov16.b-dspsp-dst-16-8-dst16-16-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_8_DST16_16_8_SB_RELATIVE_QI, "mov16.b-dspsp-dst-16-8-dst16-16-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_8_DST16_16_8_FB_RELATIVE_QI, "mov16.b-dspsp-dst-16-8-dst16-16-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_16_DST16_16_16_AN_RELATIVE_QI, "mov16.b-dspsp-dst-16-16-dst16-16-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_16_DST16_16_16_SB_RELATIVE_QI, "mov16.b-dspsp-dst-16-16-dst16-16-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_DSPSP_DST_16_16_DST16_16_16_ABSOLUTE_QI, "mov16.b-dspsp-dst-16-16-dst16-16-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],$Dst16RnQI */
{
M32C_INSN_MOV16_B_DSPSP_DST_BASIC_DST16_RN_DIRECT_QI, "mov16.b-dspsp-dst-basic-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],$Dst16AnQI */
{
M32C_INSN_MOV16_B_DSPSP_DST_BASIC_DST16_AN_DIRECT_QI, "mov16.b-dspsp-dst-basic-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[sp],[$Dst16An] */
{
M32C_INSN_MOV16_B_DSPSP_DST_BASIC_DST16_AN_INDIRECT_QI, "mov16.b-dspsp-dst-basic-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-u8}[sb],a1 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_8_A1_DST32_2_S_8_SB_RELATIVE_SI, "mov32.sz-dst32-2-S-8-a1-dst32-2-S-8-SB-relative-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-s8}[fb],a1 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_8_A1_DST32_2_S_8_FB_RELATIVE_SI, "mov32.sz-dst32-2-S-8-a1-dst32-2-S-8-FB-relative-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-u8}[sb],a0 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_8_A0_DST32_2_S_8_SB_RELATIVE_SI, "mov32.sz-dst32-2-S-8-a0-dst32-2-S-8-SB-relative-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-s8}[fb],a0 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_8_A0_DST32_2_S_8_FB_RELATIVE_SI, "mov32.sz-dst32-2-S-8-a0-dst32-2-S-8-FB-relative-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-u16},a1 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_16_A1_DST32_2_S_16_ABSOLUTE_SI, "mov32.sz-dst32-2-S-16-a1-dst32-2-S-16-absolute-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${S} ${Dsp-8-u16},a0 */
{
M32C_INSN_MOV32_SZ_DST32_2_S_16_A0_DST32_2_S_16_ABSOLUTE_SI, "mov32.sz-dst32-2-S-16-a0-dst32-2-S-16-absolute-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} r0,${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_W_R0_DST32_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "mov32.w-r0-dst32-2-S-8-dst32-2-S-8-SB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} r0,${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_W_R0_DST32_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "mov32.w-r0-dst32-2-S-8-dst32-2-S-8-FB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} r0l,${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_B_R0L_DST32_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "mov32.b-r0l-dst32-2-S-8-dst32-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} r0l,${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_B_R0L_DST32_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "mov32.b-r0l-dst32-2-S-8-dst32-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} r0,${Dsp-8-u16} */
{
M32C_INSN_MOV32_W_R0_DST32_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "mov32.w-r0-dst32-2-S-16-dst32-2-S-16-absolute-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} r0l,${Dsp-8-u16} */
{
M32C_INSN_MOV32_B_R0L_DST32_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "mov32.b-r0l-dst32-2-S-16-dst32-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-u8}[sb],r1 */
{
M32C_INSN_MOV32_W_DST32_2_S_8_R1_DST32_2_S_8_SB_RELATIVE_HI, "mov32.w-dst32-2-S-8-r1-dst32-2-S-8-SB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-s8}[fb],r1 */
{
M32C_INSN_MOV32_W_DST32_2_S_8_R1_DST32_2_S_8_FB_RELATIVE_HI, "mov32.w-dst32-2-S-8-r1-dst32-2-S-8-FB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u8}[sb],r1l */
{
M32C_INSN_MOV32_B_DST32_2_S_8_R1L_DST32_2_S_8_SB_RELATIVE_QI, "mov32.b-dst32-2-S-8-r1l-dst32-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-s8}[fb],r1l */
{
M32C_INSN_MOV32_B_DST32_2_S_8_R1L_DST32_2_S_8_FB_RELATIVE_QI, "mov32.b-dst32-2-S-8-r1l-dst32-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-u16},r1 */
{
M32C_INSN_MOV32_W_DST32_2_S_16_R1_DST32_2_S_16_ABSOLUTE_HI, "mov32.w-dst32-2-S-16-r1-dst32-2-S-16-absolute-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u16},r1l */
{
M32C_INSN_MOV32_B_DST32_2_S_16_R1L_DST32_2_S_16_ABSOLUTE_QI, "mov32.b-dst32-2-S-16-r1l-dst32-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} r0,r1 */
{
M32C_INSN_MOV32_W_DST32_2_S_BASIC_R1_DST32_2_S_R0_DIRECT_HI, "mov32.w-dst32-2-S-basic-r1-dst32-2-S-R0-direct-HI", "mov.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} r0l,r1l */
{
M32C_INSN_MOV32_B_DST32_2_S_BASIC_R1L_DST32_2_S_R0L_DIRECT_QI, "mov32.b-dst32-2-S-basic-r1l-dst32-2-S-R0l-direct-QI", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-u8}[sb],r0 */
{
M32C_INSN_MOV32_W_DST32_2_S_8_R0_DST32_2_S_8_SB_RELATIVE_HI, "mov32.w-dst32-2-S-8-r0-dst32-2-S-8-SB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-s8}[fb],r0 */
{
M32C_INSN_MOV32_W_DST32_2_S_8_R0_DST32_2_S_8_FB_RELATIVE_HI, "mov32.w-dst32-2-S-8-r0-dst32-2-S-8-FB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u8}[sb],r0l */
{
M32C_INSN_MOV32_B_DST32_2_S_8_R0L_DST32_2_S_8_SB_RELATIVE_QI, "mov32.b-dst32-2-S-8-r0l-dst32-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-s8}[fb],r0l */
{
M32C_INSN_MOV32_B_DST32_2_S_8_R0L_DST32_2_S_8_FB_RELATIVE_QI, "mov32.b-dst32-2-S-8-r0l-dst32-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} ${Dsp-8-u16},r0 */
{
M32C_INSN_MOV32_W_DST32_2_S_16_R0_DST32_2_S_16_ABSOLUTE_HI, "mov32.w-dst32-2-S-16-r0-dst32-2-S-16-absolute-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u16},r0l */
{
M32C_INSN_MOV32_B_DST32_2_S_16_R0L_DST32_2_S_16_ABSOLUTE_QI, "mov32.b-dst32-2-S-16-r0l-dst32-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${SrcDst16-r0l-r0h-S-normal} */
{
M32C_INSN_MOV16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "mov16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
M32C_INSN_MOV16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "mov16.b.S-src2-src16-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
M32C_INSN_MOV16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "mov16.b.S-src2-src16-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
M32C_INSN_MOV16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "mov16.b.S-src2-src16-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV16_B_S_RN_AN_SRC16_2_S_8_SB_RELATIVE_QI, "mov16.b.S-Rn-An-src16-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV16_B_S_RN_AN_SRC16_2_S_8_FB_RELATIVE_QI, "mov16.b.S-Rn-An-src16-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u16} */
{
M32C_INSN_MOV16_B_S_RN_AN_SRC16_2_S_16_ABSOLUTE_QI, "mov16.b.S-Rn-An-src16-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MOV32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MOV32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "mov.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "mov.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MOV32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "mov.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u8}[sb],${Dst16AnQI-S} */
{
M32C_INSN_MOV16_B_S_AN_SRC16_2_S_8_SB_RELATIVE_QI, "mov16.b.S-An-src16-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-s8}[fb],${Dst16AnQI-S} */
{
M32C_INSN_MOV16_B_S_AN_SRC16_2_S_8_FB_RELATIVE_QI, "mov16.b.S-An-src16-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} ${Dsp-8-u16},${Dst16AnQI-S} */
{
M32C_INSN_MOV16_B_S_AN_SRC16_2_S_16_ABSOLUTE_QI, "mov16.b.S-An-src16-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MOV32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mov.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "mov.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mov.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MOV32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "mov.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_MOV32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_MOV32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mov.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "mov.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "mov.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mov.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_MOV32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "mov.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mov16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mov16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MOV16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "mov16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mov16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "mov16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MOV16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "mov16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mov16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mov16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MOV16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "mov16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mov16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mov16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_MOV16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "mov16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mov16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "mov16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_MOV16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "mov16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mov16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mov16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "mov16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* mov.w${Z} #0,${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_W_IMM_Z_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "mov32.w-imm-Z-2-S-8-dst32-2-S-8-SB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${Z} #0,${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_W_IMM_Z_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "mov32.w-imm-Z-2-S-8-dst32-2-S-8-FB-relative-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${Z} #0,${Dsp-8-u16} */
{
M32C_INSN_MOV32_W_IMM_Z_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "mov32.w-imm-Z-2-S-16-dst32-2-S-16-absolute-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${Z} #0,r0 */
{
M32C_INSN_MOV32_W_IMM_Z_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "mov32.w-imm-Z-2-S-basic-dst32-2-S-R0-direct-HI", "mov.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_B_IMM_Z_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "mov32.b-imm-Z-2-S-8-dst32-2-S-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_B_IMM_Z_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "mov32.b-imm-Z-2-S-8-dst32-2-S-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-u16} */
{
M32C_INSN_MOV32_B_IMM_Z_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "mov32.b-imm-Z-2-S-16-dst32-2-S-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,r0l */
{
M32C_INSN_MOV32_B_IMM_Z_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "mov32.b-imm-Z-2-S-basic-dst32-2-S-R0l-direct-QI", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,r0l */
{
M32C_INSN_MOV16_B_Z_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "mov16.b-Z-imm8-dst3-dst16-3-S-R0l-direct-QI", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,r0h */
{
M32C_INSN_MOV16_B_Z_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "mov16.b-Z-imm8-dst3-dst16-3-S-R0h-direct-QI", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV16_B_Z_IMM8_DST3_DST16_3_S_8_8_SB_RELATIVE_QI, "mov16.b-Z-imm8-dst3-dst16-3-S-8-8-SB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV16_B_Z_IMM8_DST3_DST16_3_S_8_8_FB_RELATIVE_QI, "mov16.b-Z-imm8-dst3-dst16-3-S-8-8-FB-relative-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${Z} #0,${Dsp-8-u16} */
{
M32C_INSN_MOV16_B_Z_IMM8_DST3_DST16_3_S_8_16_ABSOLUTE_QI, "mov16.b-Z-imm8-dst3-dst16-3-S-8-16-absolute-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* mov.w${Q} #${Imm-8-s4},$Dst16RnQI */
+/* mov.w${Q} #${Imm-8-s4},$Dst16RnHI */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_RN_DIRECT_QI, "mov16.w-imm4-Q-16-dst16-Rn-direct-QI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "mov16.w-imm4-Q-16-dst16-Rn-direct-HI", "mov.w", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
-/* mov.w${Q} #${Imm-8-s4},$Dst16AnQI */
+/* mov.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_DIRECT_QI, "mov16.w-imm4-Q-16-dst16-An-direct-QI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "mov16.w-imm4-Q-16-dst16-An-direct-HI", "mov.w", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},[$Dst16An] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_INDIRECT_QI, "mov16.w-imm4-Q-16-dst16-An-indirect-QI", "mov.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "mov16.w-imm4-Q-16-dst16-An-indirect-HI", "mov.w", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "mov16.w-imm4-Q-16-dst16-16-8-An-relative-QI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "mov16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "mov.w", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "mov16.w-imm4-Q-16-dst16-16-16-An-relative-QI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "mov16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "mov.w", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "mov16.w-imm4-Q-16-dst16-16-8-SB-relative-QI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "mov16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "mov.w", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "mov16.w-imm4-Q-16-dst16-16-16-SB-relative-QI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "mov16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "mov.w", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "mov16.w-imm4-Q-16-dst16-16-8-FB-relative-QI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "mov16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "mov.w", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
- M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "mov16.w-imm4-Q-16-dst16-16-16-absolute-QI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "mov16.w-imm4-Q-16-dst16-16-16-absolute-HI", "mov.w", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "mov16.b-imm4-Q-16-dst16-Rn-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "mov16.b-imm4-Q-16-dst16-An-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "mov16.b-imm4-Q-16-dst16-An-indirect-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "mov16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "mov16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "mov16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "mov16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "mov16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "mov16.b-imm4-Q-16-dst16-16-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "mov16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "mov16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "mov16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "mov16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "mov16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "mov32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "mov32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_MOV32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "mov32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_MOV32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "mov32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_MOV32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "mov32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_MOV32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "mov32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_MOV32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "mov32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_MOV32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "mov32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
{
M32C_INSN_MOV32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "mov32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
{
M32C_INSN_MOV32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "mov32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "mov32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "mov.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "mov.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-32-SI},${Dsp-16-u16} */
{
M32C_INSN_MOV32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "mov32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "mov.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "mov32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "mov.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.l${G} #${Imm-40-SI},${Dsp-16-u24} */
{
M32C_INSN_MOV32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "mov32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "mov.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_MOV32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "mov32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_MOV32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "mov32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "mov32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MOV32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "mov32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "mov32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_MOV32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "mov32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "mov.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_MOV32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "mov32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_MOV32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "mov32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "mov32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_MOV32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MOV32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "mov32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_MOV32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "mov32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_MOV32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "mov32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "mov.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_MOV16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "mov16.w-imm-G-basic-dst16-Rn-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_MOV16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "mov16.w-imm-G-basic-dst16-An-direct-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_MOV16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "mov16.w-imm-G-basic-dst16-An-indirect-HI", "mov.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "mov16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "mov16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "mov16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "mov.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "mov16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "mov16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_MOV16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "mov16.w-imm-G-16-16-dst16-16-16-absolute-HI", "mov.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_MOV16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "mov16.b-imm-G-basic-dst16-Rn-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_MOV16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "mov16.b-imm-G-basic-dst16-An-direct-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "mov16.b-imm-G-basic-dst16-An-indirect-QI", "mov.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "mov16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_MOV16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "mov16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_MOV16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "mov16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "mov.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_MOV16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "mov16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_MOV16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "mov16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_MOV16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "mov16.b-imm-G-16-16-dst16-16-16-absolute-QI", "mov.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_MIN32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_MIN32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "min.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "min.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "min.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_MIN32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "min32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "min.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "min.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "min.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_MIN32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "min32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_MIN32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_MIN32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "min.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "min.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "min.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "min.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_MIN32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "min32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "min.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "min.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_MIN32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "min32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* min.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_MIN32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "min32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_MIN32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "min32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "min32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "min.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "min.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_MIN32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "min32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "min.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "min32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_MIN32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "min32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "min.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_MIN32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "min32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_MIN32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "min32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "min32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "min.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_MIN32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_MIN32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "min.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_MIN32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_MIN32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_MIN32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "min32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "min.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MIN32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "min32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* min.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_MIN32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "min32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "min.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_MAX32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_MAX32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "max.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "max.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "max.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_MAX32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "max32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "max.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "max.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "max.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_MAX32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "max32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_MAX32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_MAX32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "max.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "max.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "max.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "max.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_MAX32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "max32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "max.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "max.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_MAX32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "max32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* max.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_MAX32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "max32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_MAX32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "max32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "max32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "max.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "max.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_MAX32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "max32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "max.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "max32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_MAX32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "max32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "max.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_MAX32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "max32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_MAX32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "max32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "max32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "max.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_MAX32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_MAX32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "max.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_MAX32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_MAX32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_MAX32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "max32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "max.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_MAX32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "max32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* max.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_MAX32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "max32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "max.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[$Dst16An],[a1a0] */
{
M32C_INSN_STE_W_16_16_A1A0_DST16_16_16_AN_RELATIVE_HI, "ste.w-16-16-a1a0-dst16-16-16-An-relative-HI", "ste.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[sb],[a1a0] */
{
M32C_INSN_STE_W_16_16_A1A0_DST16_16_16_SB_RELATIVE_HI, "ste.w-16-16-a1a0-dst16-16-16-SB-relative-HI", "ste.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16},[a1a0] */
{
M32C_INSN_STE_W_16_16_A1A0_DST16_16_16_ABSOLUTE_HI, "ste.w-16-16-a1a0-dst16-16-16-absolute-HI", "ste.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_W_16_16_U20A0_DST16_16_16_AN_RELATIVE_HI, "ste.w-16-16-u20a0-dst16-16-16-An-relative-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_W_16_16_U20A0_DST16_16_16_SB_RELATIVE_HI, "ste.w-16-16-u20a0-dst16-16-16-SB-relative-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16},${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_W_16_16_U20A0_DST16_16_16_ABSOLUTE_HI, "ste.w-16-16-u20a0-dst16-16-16-absolute-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
{
M32C_INSN_STE_W_16_16_U20_DST16_16_16_AN_RELATIVE_HI, "ste.w-16-16-u20-dst16-16-16-An-relative-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20} */
{
M32C_INSN_STE_W_16_16_U20_DST16_16_16_SB_RELATIVE_HI, "ste.w-16-16-u20-dst16-16-16-SB-relative-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u16},${Dsp-32-u20} */
{
M32C_INSN_STE_W_16_16_U20_DST16_16_16_ABSOLUTE_HI, "ste.w-16-16-u20-dst16-16-16-absolute-HI", "ste.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[$Dst16An],[a1a0] */
{
M32C_INSN_STE_W_16_8_A1A0_DST16_16_8_AN_RELATIVE_HI, "ste.w-16-8-a1a0-dst16-16-8-An-relative-HI", "ste.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[sb],[a1a0] */
{
M32C_INSN_STE_W_16_8_A1A0_DST16_16_8_SB_RELATIVE_HI, "ste.w-16-8-a1a0-dst16-16-8-SB-relative-HI", "ste.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-s8}[fb],[a1a0] */
{
M32C_INSN_STE_W_16_8_A1A0_DST16_16_8_FB_RELATIVE_HI, "ste.w-16-8-a1a0-dst16-16-8-FB-relative-HI", "ste.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_W_16_8_U20A0_DST16_16_8_AN_RELATIVE_HI, "ste.w-16-8-u20a0-dst16-16-8-An-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_W_16_8_U20A0_DST16_16_8_SB_RELATIVE_HI, "ste.w-16-8-u20a0-dst16-16-8-SB-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_W_16_8_U20A0_DST16_16_8_FB_RELATIVE_HI, "ste.w-16-8-u20a0-dst16-16-8-FB-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
{
M32C_INSN_STE_W_16_8_U20_DST16_16_8_AN_RELATIVE_HI, "ste.w-16-8-u20-dst16-16-8-An-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */
{
M32C_INSN_STE_W_16_8_U20_DST16_16_8_SB_RELATIVE_HI, "ste.w-16-8-u20-dst16-16-8-SB-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */
{
M32C_INSN_STE_W_16_8_U20_DST16_16_8_FB_RELATIVE_HI, "ste.w-16-8-u20-dst16-16-8-FB-relative-HI", "ste.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16RnHI,[a1a0] */
{
M32C_INSN_STE_W_BASIC_A1A0_DST16_RN_DIRECT_HI, "ste.w-basic-a1a0-dst16-Rn-direct-HI", "ste.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16AnHI,[a1a0] */
{
M32C_INSN_STE_W_BASIC_A1A0_DST16_AN_DIRECT_HI, "ste.w-basic-a1a0-dst16-An-direct-HI", "ste.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w [$Dst16An],[a1a0] */
{
M32C_INSN_STE_W_BASIC_A1A0_DST16_AN_INDIRECT_HI, "ste.w-basic-a1a0-dst16-An-indirect-HI", "ste.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16RnHI,${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_W_BASIC_U20A0_DST16_RN_DIRECT_HI, "ste.w-basic-u20a0-dst16-Rn-direct-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16AnHI,${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_W_BASIC_U20A0_DST16_AN_DIRECT_HI, "ste.w-basic-u20a0-dst16-An-direct-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w [$Dst16An],${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_W_BASIC_U20A0_DST16_AN_INDIRECT_HI, "ste.w-basic-u20a0-dst16-An-indirect-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16RnHI,${Dsp-16-u20} */
{
M32C_INSN_STE_W_BASIC_U20_DST16_RN_DIRECT_HI, "ste.w-basic-u20-dst16-Rn-direct-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w $Dst16AnHI,${Dsp-16-u20} */
{
M32C_INSN_STE_W_BASIC_U20_DST16_AN_DIRECT_HI, "ste.w-basic-u20-dst16-An-direct-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.w [$Dst16An],${Dsp-16-u20} */
{
M32C_INSN_STE_W_BASIC_U20_DST16_AN_INDIRECT_HI, "ste.w-basic-u20-dst16-An-indirect-HI", "ste.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[$Dst16An],[a1a0] */
{
M32C_INSN_STE_B_16_16_A1A0_DST16_16_16_AN_RELATIVE_QI, "ste.b-16-16-a1a0-dst16-16-16-An-relative-QI", "ste.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[sb],[a1a0] */
{
M32C_INSN_STE_B_16_16_A1A0_DST16_16_16_SB_RELATIVE_QI, "ste.b-16-16-a1a0-dst16-16-16-SB-relative-QI", "ste.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16},[a1a0] */
{
M32C_INSN_STE_B_16_16_A1A0_DST16_16_16_ABSOLUTE_QI, "ste.b-16-16-a1a0-dst16-16-16-absolute-QI", "ste.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_B_16_16_U20A0_DST16_16_16_AN_RELATIVE_QI, "ste.b-16-16-u20a0-dst16-16-16-An-relative-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_B_16_16_U20A0_DST16_16_16_SB_RELATIVE_QI, "ste.b-16-16-u20a0-dst16-16-16-SB-relative-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16},${Dsp-32-u20}[a0] */
{
M32C_INSN_STE_B_16_16_U20A0_DST16_16_16_ABSOLUTE_QI, "ste.b-16-16-u20a0-dst16-16-16-absolute-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
{
M32C_INSN_STE_B_16_16_U20_DST16_16_16_AN_RELATIVE_QI, "ste.b-16-16-u20-dst16-16-16-An-relative-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20} */
{
M32C_INSN_STE_B_16_16_U20_DST16_16_16_SB_RELATIVE_QI, "ste.b-16-16-u20-dst16-16-16-SB-relative-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u16},${Dsp-32-u20} */
{
M32C_INSN_STE_B_16_16_U20_DST16_16_16_ABSOLUTE_QI, "ste.b-16-16-u20-dst16-16-16-absolute-QI", "ste.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[$Dst16An],[a1a0] */
{
M32C_INSN_STE_B_16_8_A1A0_DST16_16_8_AN_RELATIVE_QI, "ste.b-16-8-a1a0-dst16-16-8-An-relative-QI", "ste.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[sb],[a1a0] */
{
M32C_INSN_STE_B_16_8_A1A0_DST16_16_8_SB_RELATIVE_QI, "ste.b-16-8-a1a0-dst16-16-8-SB-relative-QI", "ste.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-s8}[fb],[a1a0] */
{
M32C_INSN_STE_B_16_8_A1A0_DST16_16_8_FB_RELATIVE_QI, "ste.b-16-8-a1a0-dst16-16-8-FB-relative-QI", "ste.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_B_16_8_U20A0_DST16_16_8_AN_RELATIVE_QI, "ste.b-16-8-u20a0-dst16-16-8-An-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_B_16_8_U20A0_DST16_16_8_SB_RELATIVE_QI, "ste.b-16-8-u20a0-dst16-16-8-SB-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
{
M32C_INSN_STE_B_16_8_U20A0_DST16_16_8_FB_RELATIVE_QI, "ste.b-16-8-u20a0-dst16-16-8-FB-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
{
M32C_INSN_STE_B_16_8_U20_DST16_16_8_AN_RELATIVE_QI, "ste.b-16-8-u20-dst16-16-8-An-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */
{
M32C_INSN_STE_B_16_8_U20_DST16_16_8_SB_RELATIVE_QI, "ste.b-16-8-u20-dst16-16-8-SB-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */
{
M32C_INSN_STE_B_16_8_U20_DST16_16_8_FB_RELATIVE_QI, "ste.b-16-8-u20-dst16-16-8-FB-relative-QI", "ste.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16RnQI,[a1a0] */
{
M32C_INSN_STE_B_BASIC_A1A0_DST16_RN_DIRECT_QI, "ste.b-basic-a1a0-dst16-Rn-direct-QI", "ste.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16AnQI,[a1a0] */
{
M32C_INSN_STE_B_BASIC_A1A0_DST16_AN_DIRECT_QI, "ste.b-basic-a1a0-dst16-An-direct-QI", "ste.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b [$Dst16An],[a1a0] */
{
M32C_INSN_STE_B_BASIC_A1A0_DST16_AN_INDIRECT_QI, "ste.b-basic-a1a0-dst16-An-indirect-QI", "ste.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16RnQI,${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_B_BASIC_U20A0_DST16_RN_DIRECT_QI, "ste.b-basic-u20a0-dst16-Rn-direct-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16AnQI,${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_B_BASIC_U20A0_DST16_AN_DIRECT_QI, "ste.b-basic-u20a0-dst16-An-direct-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b [$Dst16An],${Dsp-16-u20}[a0] */
{
M32C_INSN_STE_B_BASIC_U20A0_DST16_AN_INDIRECT_QI, "ste.b-basic-u20a0-dst16-An-indirect-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16RnQI,${Dsp-16-u20} */
{
M32C_INSN_STE_B_BASIC_U20_DST16_RN_DIRECT_QI, "ste.b-basic-u20-dst16-Rn-direct-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b $Dst16AnQI,${Dsp-16-u20} */
{
M32C_INSN_STE_B_BASIC_U20_DST16_AN_DIRECT_QI, "ste.b-basic-u20-dst16-An-direct-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ste.b [$Dst16An],${Dsp-16-u20} */
{
M32C_INSN_STE_B_BASIC_U20_DST16_AN_INDIRECT_QI, "ste.b-basic-u20-dst16-An-indirect-QI", "ste.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_W_16_16_A1A0_DST16_16_16_AN_RELATIVE_HI, "lde.w-16-16-a1a0-dst16-16-16-An-relative-HI", "lde.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_W_16_16_A1A0_DST16_16_16_SB_RELATIVE_HI, "lde.w-16-16-a1a0-dst16-16-16-SB-relative-HI", "lde.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-u16} */
{
M32C_INSN_LDE_W_16_16_A1A0_DST16_16_16_ABSOLUTE_HI, "lde.w-16-16-a1a0-dst16-16-16-absolute-HI", "lde.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_W_16_16_U20A0_DST16_16_16_AN_RELATIVE_HI, "lde.w-16-16-u20a0-dst16-16-16-An-relative-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_W_16_16_U20A0_DST16_16_16_SB_RELATIVE_HI, "lde.w-16-16-u20a0-dst16-16-16-SB-relative-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16} */
{
M32C_INSN_LDE_W_16_16_U20A0_DST16_16_16_ABSOLUTE_HI, "lde.w-16-16-u20a0-dst16-16-16-absolute-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_W_16_16_U20_DST16_16_16_AN_RELATIVE_HI, "lde.w-16-16-u20-dst16-16-16-An-relative-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20},${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_W_16_16_U20_DST16_16_16_SB_RELATIVE_HI, "lde.w-16-16-u20-dst16-16-16-SB-relative-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-32-u20},${Dsp-16-u16} */
{
M32C_INSN_LDE_W_16_16_U20_DST16_16_16_ABSOLUTE_HI, "lde.w-16-16-u20-dst16-16-16-absolute-HI", "lde.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_W_16_8_A1A0_DST16_16_8_AN_RELATIVE_HI, "lde.w-16-8-a1a0-dst16-16-8-An-relative-HI", "lde.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_W_16_8_A1A0_DST16_16_8_SB_RELATIVE_HI, "lde.w-16-8-a1a0-dst16-16-8-SB-relative-HI", "lde.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_W_16_8_A1A0_DST16_16_8_FB_RELATIVE_HI, "lde.w-16-8-a1a0-dst16-16-8-FB-relative-HI", "lde.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_W_16_8_U20A0_DST16_16_8_AN_RELATIVE_HI, "lde.w-16-8-u20a0-dst16-16-8-An-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_W_16_8_U20A0_DST16_16_8_SB_RELATIVE_HI, "lde.w-16-8-u20a0-dst16-16-8-SB-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_W_16_8_U20A0_DST16_16_8_FB_RELATIVE_HI, "lde.w-16-8-u20a0-dst16-16-8-FB-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_W_16_8_U20_DST16_16_8_AN_RELATIVE_HI, "lde.w-16-8-u20-dst16-16-8-An-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_W_16_8_U20_DST16_16_8_SB_RELATIVE_HI, "lde.w-16-8-u20-dst16-16-8-SB-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_W_16_8_U20_DST16_16_8_FB_RELATIVE_HI, "lde.w-16-8-u20-dst16-16-8-FB-relative-HI", "lde.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],$Dst16RnHI */
{
M32C_INSN_LDE_W_BASIC_A1A0_DST16_RN_DIRECT_HI, "lde.w-basic-a1a0-dst16-Rn-direct-HI", "lde.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],$Dst16AnHI */
{
M32C_INSN_LDE_W_BASIC_A1A0_DST16_AN_DIRECT_HI, "lde.w-basic-a1a0-dst16-An-direct-HI", "lde.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w [a1a0],[$Dst16An] */
{
M32C_INSN_LDE_W_BASIC_A1A0_DST16_AN_INDIRECT_HI, "lde.w-basic-a1a0-dst16-An-indirect-HI", "lde.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20}[a0],$Dst16RnHI */
{
M32C_INSN_LDE_W_BASIC_U20A0_DST16_RN_DIRECT_HI, "lde.w-basic-u20a0-dst16-Rn-direct-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20}[a0],$Dst16AnHI */
{
M32C_INSN_LDE_W_BASIC_U20A0_DST16_AN_DIRECT_HI, "lde.w-basic-u20a0-dst16-An-direct-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20}[a0],[$Dst16An] */
{
M32C_INSN_LDE_W_BASIC_U20A0_DST16_AN_INDIRECT_HI, "lde.w-basic-u20a0-dst16-An-indirect-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20},$Dst16RnHI */
{
M32C_INSN_LDE_W_BASIC_U20_DST16_RN_DIRECT_HI, "lde.w-basic-u20-dst16-Rn-direct-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20},$Dst16AnHI */
{
M32C_INSN_LDE_W_BASIC_U20_DST16_AN_DIRECT_HI, "lde.w-basic-u20-dst16-An-direct-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.w ${Dsp-16-u20},[$Dst16An] */
{
M32C_INSN_LDE_W_BASIC_U20_DST16_AN_INDIRECT_HI, "lde.w-basic-u20-dst16-An-indirect-HI", "lde.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_B_16_16_A1A0_DST16_16_16_AN_RELATIVE_QI, "lde.b-16-16-a1a0-dst16-16-16-An-relative-QI", "lde.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_B_16_16_A1A0_DST16_16_16_SB_RELATIVE_QI, "lde.b-16-16-a1a0-dst16-16-16-SB-relative-QI", "lde.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-u16} */
{
M32C_INSN_LDE_B_16_16_A1A0_DST16_16_16_ABSOLUTE_QI, "lde.b-16-16-a1a0-dst16-16-16-absolute-QI", "lde.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_B_16_16_U20A0_DST16_16_16_AN_RELATIVE_QI, "lde.b-16-16-u20a0-dst16-16-16-An-relative-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_B_16_16_U20A0_DST16_16_16_SB_RELATIVE_QI, "lde.b-16-16-u20a0-dst16-16-16-SB-relative-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16} */
{
M32C_INSN_LDE_B_16_16_U20A0_DST16_16_16_ABSOLUTE_QI, "lde.b-16-16-u20a0-dst16-16-16-absolute-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_LDE_B_16_16_U20_DST16_16_16_AN_RELATIVE_QI, "lde.b-16-16-u20-dst16-16-16-An-relative-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20},${Dsp-16-u16}[sb] */
{
M32C_INSN_LDE_B_16_16_U20_DST16_16_16_SB_RELATIVE_QI, "lde.b-16-16-u20-dst16-16-16-SB-relative-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-32-u20},${Dsp-16-u16} */
{
M32C_INSN_LDE_B_16_16_U20_DST16_16_16_ABSOLUTE_QI, "lde.b-16-16-u20-dst16-16-16-absolute-QI", "lde.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_B_16_8_A1A0_DST16_16_8_AN_RELATIVE_QI, "lde.b-16-8-a1a0-dst16-16-8-An-relative-QI", "lde.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_B_16_8_A1A0_DST16_16_8_SB_RELATIVE_QI, "lde.b-16-8-a1a0-dst16-16-8-SB-relative-QI", "lde.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_B_16_8_A1A0_DST16_16_8_FB_RELATIVE_QI, "lde.b-16-8-a1a0-dst16-16-8-FB-relative-QI", "lde.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_B_16_8_U20A0_DST16_16_8_AN_RELATIVE_QI, "lde.b-16-8-u20a0-dst16-16-8-An-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_B_16_8_U20A0_DST16_16_8_SB_RELATIVE_QI, "lde.b-16-8-u20a0-dst16-16-8-SB-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_B_16_8_U20A0_DST16_16_8_FB_RELATIVE_QI, "lde.b-16-8-u20a0-dst16-16-8-FB-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_LDE_B_16_8_U20_DST16_16_8_AN_RELATIVE_QI, "lde.b-16-8-u20-dst16-16-8-An-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */
{
M32C_INSN_LDE_B_16_8_U20_DST16_16_8_SB_RELATIVE_QI, "lde.b-16-8-u20-dst16-16-8-SB-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */
{
M32C_INSN_LDE_B_16_8_U20_DST16_16_8_FB_RELATIVE_QI, "lde.b-16-8-u20-dst16-16-8-FB-relative-QI", "lde.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],$Dst16RnQI */
{
M32C_INSN_LDE_B_BASIC_A1A0_DST16_RN_DIRECT_QI, "lde.b-basic-a1a0-dst16-Rn-direct-QI", "lde.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],$Dst16AnQI */
{
M32C_INSN_LDE_B_BASIC_A1A0_DST16_AN_DIRECT_QI, "lde.b-basic-a1a0-dst16-An-direct-QI", "lde.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b [a1a0],[$Dst16An] */
{
M32C_INSN_LDE_B_BASIC_A1A0_DST16_AN_INDIRECT_QI, "lde.b-basic-a1a0-dst16-An-indirect-QI", "lde.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20}[a0],$Dst16RnQI */
{
M32C_INSN_LDE_B_BASIC_U20A0_DST16_RN_DIRECT_QI, "lde.b-basic-u20a0-dst16-Rn-direct-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20}[a0],$Dst16AnQI */
{
M32C_INSN_LDE_B_BASIC_U20A0_DST16_AN_DIRECT_QI, "lde.b-basic-u20a0-dst16-An-direct-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20}[a0],[$Dst16An] */
{
M32C_INSN_LDE_B_BASIC_U20A0_DST16_AN_INDIRECT_QI, "lde.b-basic-u20a0-dst16-An-indirect-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20},$Dst16RnQI */
{
M32C_INSN_LDE_B_BASIC_U20_DST16_RN_DIRECT_QI, "lde.b-basic-u20-dst16-Rn-direct-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20},$Dst16AnQI */
{
M32C_INSN_LDE_B_BASIC_U20_DST16_AN_DIRECT_QI, "lde.b-basic-u20-dst16-An-direct-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* lde.b ${Dsp-16-u20},[$Dst16An] */
{
M32C_INSN_LDE_B_BASIC_U20_DST16_AN_INDIRECT_QI, "lde.b-basic-u20-dst16-An-indirect-QI", "lde.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},$Dst32RnPrefixedSI */
{
M32C_INSN_STC32_SRC_CR3_DST32_RN_DIRECT_PREFIXED_SI, "stc32.src-cr3-dst32-Rn-direct-Prefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},$Dst32AnPrefixedSI */
{
M32C_INSN_STC32_SRC_CR3_DST32_AN_DIRECT_PREFIXED_SI, "stc32.src-cr3-dst32-An-direct-Prefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR3_DST32_AN_INDIRECT_PREFIXED_SI, "stc32.src-cr3-dst32-An-indirect-Prefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-8-An-relative-Prefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-16-An-relative-Prefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-24-An-relative-Prefixed-SI", "stc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u8}[sb] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-8-SB-relative-Prefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u16}[sb] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-16-SB-relative-Prefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-s8}[fb] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-8-FB-relative-Prefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-s16}[fb] */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "stc32.src-cr3-dst32-24-16-FB-relative-Prefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u16} */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_16_ABSOLUTE_PREFIXED_SI, "stc32.src-cr3-dst32-24-16-absolute-Prefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr3-Prefixed-32},${Dsp-24-u24} */
{
M32C_INSN_STC32_SRC_CR3_DST32_24_24_ABSOLUTE_PREFIXED_SI, "stc32.src-cr3-dst32-24-24-absolute-Prefixed-SI", "stc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},$Dst32RnUnprefixedSI */
{
M32C_INSN_STC32_SRC_CR2_DST32_RN_DIRECT_UNPREFIXED_SI, "stc32.src-cr2-dst32-Rn-direct-Unprefixed-SI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},$Dst32AnUnprefixedSI */
{
M32C_INSN_STC32_SRC_CR2_DST32_AN_DIRECT_UNPREFIXED_SI, "stc32.src-cr2-dst32-An-direct-Unprefixed-SI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},[$Dst32AnUnprefixed] */
{
M32C_INSN_STC32_SRC_CR2_DST32_AN_INDIRECT_UNPREFIXED_SI, "stc32.src-cr2-dst32-An-indirect-Unprefixed-SI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-8-An-relative-Unprefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-16-An-relative-Unprefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-24-An-relative-Unprefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u8}[sb] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-8-SB-relative-Unprefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u16}[sb] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-16-SB-relative-Unprefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-s8}[fb] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-8-FB-relative-Unprefixed-SI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-s16}[fb] */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-16-FB-relative-Unprefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u16} */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-16-absolute-Unprefixed-SI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr2-32},${Dsp-16-u24} */
{
M32C_INSN_STC32_SRC_CR2_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "stc32.src-cr2-dst32-16-24-absolute-Unprefixed-SI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},$Dst32RnPrefixedHI */
{
M32C_INSN_STC32_SRC_CR1_DST32_RN_DIRECT_PREFIXED_HI, "stc32.src-cr1-dst32-Rn-direct-Prefixed-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},$Dst32AnPrefixedHI */
{
M32C_INSN_STC32_SRC_CR1_DST32_AN_DIRECT_PREFIXED_HI, "stc32.src-cr1-dst32-An-direct-Prefixed-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR1_DST32_AN_INDIRECT_PREFIXED_HI, "stc32.src-cr1-dst32-An-indirect-Prefixed-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-8-An-relative-Prefixed-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-16-An-relative-Prefixed-HI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-24-An-relative-Prefixed-HI", "stc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u8}[sb] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-8-SB-relative-Prefixed-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u16}[sb] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-16-SB-relative-Prefixed-HI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-s8}[fb] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-8-FB-relative-Prefixed-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-s16}[fb] */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "stc32.src-cr1-dst32-24-16-FB-relative-Prefixed-HI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u16} */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_16_ABSOLUTE_PREFIXED_HI, "stc32.src-cr1-dst32-24-16-absolute-Prefixed-HI", "stc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr1-Prefixed-32},${Dsp-24-u24} */
{
M32C_INSN_STC32_SRC_CR1_DST32_24_24_ABSOLUTE_PREFIXED_HI, "stc32.src-cr1-dst32-24-24-absolute-Prefixed-HI", "stc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,$Dst16RnHI */
{
M32C_INSN_STC16_PC_DST16_RN_DIRECT_HI, "stc16.pc-dst16-Rn-direct-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,$Dst16AnHI */
{
M32C_INSN_STC16_PC_DST16_AN_DIRECT_HI, "stc16.pc-dst16-An-direct-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,[$Dst16An] */
{
M32C_INSN_STC16_PC_DST16_AN_INDIRECT_HI, "stc16.pc-dst16-An-indirect-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_STC16_PC_DST16_16_8_AN_RELATIVE_HI, "stc16.pc-dst16-16-8-An-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_STC16_PC_DST16_16_16_AN_RELATIVE_HI, "stc16.pc-dst16-16-16-An-relative-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-u8}[sb] */
{
M32C_INSN_STC16_PC_DST16_16_8_SB_RELATIVE_HI, "stc16.pc-dst16-16-8-SB-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-u16}[sb] */
{
M32C_INSN_STC16_PC_DST16_16_16_SB_RELATIVE_HI, "stc16.pc-dst16-16-16-SB-relative-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-s8}[fb] */
{
M32C_INSN_STC16_PC_DST16_16_8_FB_RELATIVE_HI, "stc16.pc-dst16-16-8-FB-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc pc,${Dsp-16-u16} */
{
M32C_INSN_STC16_PC_DST16_16_16_ABSOLUTE_HI, "stc16.pc-dst16-16-16-absolute-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},$Dst16RnHI */
{
M32C_INSN_STC16_SRC_DST16_RN_DIRECT_HI, "stc16.src-dst16-Rn-direct-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},$Dst16AnHI */
{
M32C_INSN_STC16_SRC_DST16_AN_DIRECT_HI, "stc16.src-dst16-An-direct-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},[$Dst16An] */
{
M32C_INSN_STC16_SRC_DST16_AN_INDIRECT_HI, "stc16.src-dst16-An-indirect-HI", "stc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_STC16_SRC_DST16_16_8_AN_RELATIVE_HI, "stc16.src-dst16-16-8-An-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_STC16_SRC_DST16_16_16_AN_RELATIVE_HI, "stc16.src-dst16-16-16-An-relative-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-u8}[sb] */
{
M32C_INSN_STC16_SRC_DST16_16_8_SB_RELATIVE_HI, "stc16.src-dst16-16-8-SB-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-u16}[sb] */
{
M32C_INSN_STC16_SRC_DST16_16_16_SB_RELATIVE_HI, "stc16.src-dst16-16-16-SB-relative-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-s8}[fb] */
{
M32C_INSN_STC16_SRC_DST16_16_8_FB_RELATIVE_HI, "stc16.src-dst16-16-8-FB-relative-HI", "stc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stc ${cr16},${Dsp-16-u16} */
{
M32C_INSN_STC16_SRC_DST16_16_16_ABSOLUTE_HI, "stc16.src-dst16-16-16-absolute-HI", "stc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32RnPrefixedSI,${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_RN_DIRECT_PREFIXED_SI, "ldc32.src-cr3-dst32-Rn-direct-Prefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32AnPrefixedSI,${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_AN_DIRECT_PREFIXED_SI, "ldc32.src-cr3-dst32-An-direct-Prefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc [$Dst32AnPrefixed],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_AN_INDIRECT_PREFIXED_SI, "ldc32.src-cr3-dst32-An-indirect-Prefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-8-An-relative-Prefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-16-An-relative-Prefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-24-An-relative-Prefixed-SI", "ldc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u8}[sb],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-8-SB-relative-Prefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16}[sb],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-16-SB-relative-Prefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-s8}[fb],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-8-FB-relative-Prefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-s16}[fb],${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-16-FB-relative-Prefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16},${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_16_ABSOLUTE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-16-absolute-Prefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u24},${cr3-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR3_DST32_24_24_ABSOLUTE_PREFIXED_SI, "ldc32.src-cr3-dst32-24-24-absolute-Prefixed-SI", "ldc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32RnUnprefixedSI,${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_RN_DIRECT_UNPREFIXED_SI, "ldc32.src-cr2-dst32-Rn-direct-Unprefixed-SI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32AnUnprefixedSI,${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_AN_DIRECT_UNPREFIXED_SI, "ldc32.src-cr2-dst32-An-direct-Unprefixed-SI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc [$Dst32AnUnprefixed],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_AN_INDIRECT_UNPREFIXED_SI, "ldc32.src-cr2-dst32-An-indirect-Unprefixed-SI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u8}[$Dst32AnUnprefixed],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-8-An-relative-Unprefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16}[$Dst32AnUnprefixed],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-16-An-relative-Unprefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u24}[$Dst32AnUnprefixed],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-24-An-relative-Unprefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u8}[sb],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-8-SB-relative-Unprefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16}[sb],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-16-SB-relative-Unprefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-s8}[fb],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-8-FB-relative-Unprefixed-SI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-s16}[fb],${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-16-FB-relative-Unprefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16},${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-16-absolute-Unprefixed-SI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u24},${cr2-32} */
{
M32C_INSN_LDC32_SRC_CR2_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "ldc32.src-cr2-dst32-16-24-absolute-Unprefixed-SI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32RnPrefixedHI,${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_RN_DIRECT_PREFIXED_HI, "ldc32.src-cr1-dst32-Rn-direct-Prefixed-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst32AnPrefixedHI,${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_AN_DIRECT_PREFIXED_HI, "ldc32.src-cr1-dst32-An-direct-Prefixed-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc [$Dst32AnPrefixed],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_AN_INDIRECT_PREFIXED_HI, "ldc32.src-cr1-dst32-An-indirect-Prefixed-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-8-An-relative-Prefixed-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-16-An-relative-Prefixed-HI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-24-An-relative-Prefixed-HI", "ldc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u8}[sb],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-8-SB-relative-Prefixed-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16}[sb],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-16-SB-relative-Prefixed-HI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-s8}[fb],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-8-FB-relative-Prefixed-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-s16}[fb],${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-16-FB-relative-Prefixed-HI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u16},${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_16_ABSOLUTE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-16-absolute-Prefixed-HI", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-24-u24},${cr1-Prefixed-32} */
{
M32C_INSN_LDC32_SRC_CR1_DST32_24_24_ABSOLUTE_PREFIXED_HI, "ldc32.src-cr1-dst32-24-24-absolute-Prefixed-HI", "ldc", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst16RnHI,${cr16} */
{
M32C_INSN_LDC16_DST_DST16_RN_DIRECT_HI, "ldc16.dst-dst16-Rn-direct-HI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc $Dst16AnHI,${cr16} */
{
M32C_INSN_LDC16_DST_DST16_AN_DIRECT_HI, "ldc16.dst-dst16-An-direct-HI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc [$Dst16An],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_AN_INDIRECT_HI, "ldc16.dst-dst16-An-indirect-HI", "ldc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u8}[$Dst16An],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_8_AN_RELATIVE_HI, "ldc16.dst-dst16-16-8-An-relative-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16}[$Dst16An],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_16_AN_RELATIVE_HI, "ldc16.dst-dst16-16-16-An-relative-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u8}[sb],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_8_SB_RELATIVE_HI, "ldc16.dst-dst16-16-8-SB-relative-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16}[sb],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_16_SB_RELATIVE_HI, "ldc16.dst-dst16-16-16-SB-relative-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-s8}[fb],${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_8_FB_RELATIVE_HI, "ldc16.dst-dst16-16-8-FB-relative-HI", "ldc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc ${Dsp-16-u16},${cr16} */
{
M32C_INSN_LDC16_DST_DST16_16_16_ABSOLUTE_HI, "ldc16.dst-dst16-16-16-absolute-HI", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32_A_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "jsri32.a-dst32-16-24-An-relative-Unprefixed-SI", "jsri.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u24} */
{
M32C_INSN_JSRI32_A_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "jsri32.a-dst32-16-24-absolute-Unprefixed-SI", "jsri.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a $Dst32RnUnprefixedSI */
{
M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "jsri32a-dst32-basic-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a $Dst32AnUnprefixedSI */
{
M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "jsri32a-dst32-basic-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a [$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "jsri32a-dst32-basic-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a $Dst16RnSI */
{
M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_RN_DIRECT_SI, "jsri16a-dst16-basic-SI-dst16-Rn-direct-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a $Dst16AnSI */
{
M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_AN_DIRECT_SI, "jsri16a-dst16-basic-SI-dst16-An-direct-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a [$Dst16An] */
{
M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_AN_INDIRECT_SI, "jsri16a-dst16-basic-SI-dst16-An-indirect-SI", "jsri.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-16-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16}[sb] */
{
M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-16-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-s16}[fb] */
{
M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-16-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16} */
{
M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "jsri32a-dst32-16-16-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_AN_RELATIVE_SI, "jsri16a-dst16-16-16-SI-dst16-16-16-An-relative-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16}[sb] */
{
M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_SB_RELATIVE_SI, "jsri16a-dst16-16-16-SI-dst16-16-16-SB-relative-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u16} */
{
M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_ABSOLUTE_SI, "jsri16a-dst16-16-16-SI-dst16-16-16-absolute-SI", "jsri.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-8-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u8}[sb] */
{
M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-8-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-s8}[fb] */
{
M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "jsri32a-dst32-16-8-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_AN_RELATIVE_SI, "jsri16a-dst16-16-8-SI-dst16-16-8-An-relative-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-u8}[sb] */
{
M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_SB_RELATIVE_SI, "jsri16a-dst16-16-8-SI-dst16-16-8-SB-relative-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.a ${Dsp-16-s8}[fb] */
{
M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_FB_RELATIVE_SI, "jsri16a-dst16-16-8-SI-dst16-16-8-FB-relative-SI", "jsri.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32_W_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "jsri32.w-dst32-16-24-An-relative-Unprefixed-HI", "jsri.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u24} */
{
M32C_INSN_JSRI32_W_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "jsri32.w-dst32-16-24-absolute-Unprefixed-HI", "jsri.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w $Dst32RnUnprefixedHI */
{
M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "jsri32w-dst32-basic-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w $Dst32AnUnprefixedHI */
{
M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "jsri32w-dst32-basic-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w [$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "jsri32w-dst32-basic-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w $Dst16RnHI */
{
M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_RN_DIRECT_HI, "jsri16w-dst16-basic-HI-dst16-Rn-direct-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w $Dst16AnHI */
{
M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_DIRECT_HI, "jsri16w-dst16-basic-HI-dst16-An-direct-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w [$Dst16An] */
{
M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_INDIRECT_HI, "jsri16w-dst16-basic-HI-dst16-An-indirect-HI", "jsri.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-16-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-16-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-16-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16} */
{
M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "jsri32w-dst32-16-16-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_AN_RELATIVE_HI, "jsri16w-dst16-16-16-HI-dst16-16-16-An-relative-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_SB_RELATIVE_HI, "jsri16w-dst16-16-16-HI-dst16-16-16-SB-relative-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u16} */
{
M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_ABSOLUTE_HI, "jsri16w-dst16-16-16-HI-dst16-16-16-absolute-HI", "jsri.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-8-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-8-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "jsri32w-dst32-16-8-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_AN_RELATIVE_HI, "jsri16w-dst16-16-8-HI-dst16-16-8-An-relative-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_SB_RELATIVE_HI, "jsri16w-dst16-16-8-HI-dst16-16-8-SB-relative-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jsri.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_FB_RELATIVE_HI, "jsri16w-dst16-16-8-HI-dst16-16-8-FB-relative-HI", "jsri.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a $Dst32RnUnprefixedSI */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a $Dst32AnUnprefixedSI */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-An-direct-Unprefixed-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a [$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-An-indirect-Unprefixed-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "jmpi.a", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u8}[sb] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16}[sb] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-s8}[fb] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-s16}[fb] */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16} */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u24} */
{
M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "jmpi32.a-16-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "jmpi.a", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a $Dst16RnSI */
{
M32C_INSN_JMPI16_A_16_DST16_RN_DIRECT_SI, "jmpi16.a-16-dst16-Rn-direct-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a $Dst16AnSI */
{
M32C_INSN_JMPI16_A_16_DST16_AN_DIRECT_SI, "jmpi16.a-16-dst16-An-direct-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a [$Dst16An] */
{
M32C_INSN_JMPI16_A_16_DST16_AN_INDIRECT_SI, "jmpi16.a-16-dst16-An-indirect-SI", "jmpi.a", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_JMPI16_A_16_DST16_16_8_AN_RELATIVE_SI, "jmpi16.a-16-dst16-16-8-An-relative-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_JMPI16_A_16_DST16_16_16_AN_RELATIVE_SI, "jmpi16.a-16-dst16-16-16-An-relative-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u8}[sb] */
{
M32C_INSN_JMPI16_A_16_DST16_16_8_SB_RELATIVE_SI, "jmpi16.a-16-dst16-16-8-SB-relative-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16}[sb] */
{
M32C_INSN_JMPI16_A_16_DST16_16_16_SB_RELATIVE_SI, "jmpi16.a-16-dst16-16-16-SB-relative-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-s8}[fb] */
{
M32C_INSN_JMPI16_A_16_DST16_16_8_FB_RELATIVE_SI, "jmpi16.a-16-dst16-16-8-FB-relative-SI", "jmpi.a", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.a ${Dsp-16-u16} */
{
M32C_INSN_JMPI16_A_16_DST16_16_16_ABSOLUTE_SI, "jmpi16.a-16-dst16-16-16-absolute-SI", "jmpi.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w $Dst32RnUnprefixedHI */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w $Dst32AnUnprefixedHI */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w [$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "jmpi.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16} */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u24} */
{
M32C_INSN_JMPI32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "jmpi32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "jmpi.w", 40,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w $Dst16RnHI */
{
M32C_INSN_JMPI16_W_16_DST16_RN_DIRECT_HI, "jmpi16.w-16-dst16-Rn-direct-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w $Dst16AnHI */
{
M32C_INSN_JMPI16_W_16_DST16_AN_DIRECT_HI, "jmpi16.w-16-dst16-An-direct-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w [$Dst16An] */
{
M32C_INSN_JMPI16_W_16_DST16_AN_INDIRECT_HI, "jmpi16.w-16-dst16-An-indirect-HI", "jmpi.w", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_JMPI16_W_16_DST16_16_8_AN_RELATIVE_HI, "jmpi16.w-16-dst16-16-8-An-relative-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_JMPI16_W_16_DST16_16_16_AN_RELATIVE_HI, "jmpi16.w-16-dst16-16-16-An-relative-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_JMPI16_W_16_DST16_16_8_SB_RELATIVE_HI, "jmpi16.w-16-dst16-16-8-SB-relative-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_JMPI16_W_16_DST16_16_16_SB_RELATIVE_HI, "jmpi16.w-16-dst16-16-16-SB-relative-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_JMPI16_W_16_DST16_16_8_FB_RELATIVE_HI, "jmpi16.w-16-dst16-16-8-FB-relative-HI", "jmpi.w", 24,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* jmpi.w ${Dsp-16-u16} */
{
M32C_INSN_JMPI16_W_16_DST16_16_16_ABSOLUTE_HI, "jmpi16.w-16-dst16-16-16-absolute-HI", "jmpi.w", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexws.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexws.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexws.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexws.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexws.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexws.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexws.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexws.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexws.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexws.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexws.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXWS32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexws32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexws.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexws.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexws.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexws.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexws.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexws.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexws.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexws.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexws.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexws.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexws.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexws.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexws.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXWS32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexws32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexws.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexwd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexwd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexwd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexwd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexwd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexwd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexwd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexwd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexwd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexwd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexwd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXWD32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexwd32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexwd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexwd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexwd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexwd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexwd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexwd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexwd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexwd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexwd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexwd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexwd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexwd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexwd.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXWD32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexwd32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexwd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexw.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexw.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexw.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexw.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexw.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexw.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexw.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexw.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexw.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexw.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexw.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXW32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexw32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexw.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexw.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexw.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexw.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexw.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexw.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexw.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexw.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexw.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexw.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexw.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexw.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexw.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXW32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexw32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexw.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexls.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexls.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexls.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexls.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexls.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexls.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexls.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexls.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexls.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexls.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexls.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXLS32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexls32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexls.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexls.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexls.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexls.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexls.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexls.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexls.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexls.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexls.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexls.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexls.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexls.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexls.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXLS32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexls32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexls.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexld.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexld.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexld.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexld.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexld.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexld.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexld.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexld.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexld.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexld.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexld.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXLD32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexld32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexld.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexld.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexld.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexld.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexld.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexld.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexld.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexld.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexld.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexld.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexld.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexld.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexld.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXLD32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexld32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexld.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexl.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexl.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexl.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXL32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexl32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexl.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexl.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexl.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexl.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexl.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXL32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexl32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexl.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexbs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexbs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexbs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexbs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexbs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexbs.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexbs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexbs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexbs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexbs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexbs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXBS32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexbs32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexbs.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexbs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexbs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexbs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexbs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexbs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexbs.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexbs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexbs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexbs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexbs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexbs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbs.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXBS32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexbs32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexbs.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexbd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexbd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexbd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexbd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexbd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexbd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexbd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexbd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexbd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexbd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexbd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXBD32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexbd32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexbd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexbd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexbd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexbd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexbd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexbd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexbd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexbd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexbd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexbd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexbd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexbd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexbd.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXBD32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexbd32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexbd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "indexb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "indexb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "indexb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "indexb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "indexb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "indexb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "indexb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "indexb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "indexb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "indexb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u16} */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "indexb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.w ${Dsp-16-u24} */
{
M32C_INSN_INDEXB32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "indexb32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "indexb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "indexb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "indexb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "indexb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "indexb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "indexb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "indexb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "indexb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "indexb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "indexb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "indexb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u16} */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "indexb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* indexb.b ${Dsp-16-u24} */
{
M32C_INSN_INDEXB32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "indexb32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "indexb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w $Dst32RnUnprefixedHI */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "inc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w $Dst32AnUnprefixedHI */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "inc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w [$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "inc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "inc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "inc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "inc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "inc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "inc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "inc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "inc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u16} */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "inc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.w ${Dsp-16-u24} */
{
M32C_INSN_INC32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "inc32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "inc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b $Dst32RnUnprefixedQI */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "inc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b $Dst32AnUnprefixedQI */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "inc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b [$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "inc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "inc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "inc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "inc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "inc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "inc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "inc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "inc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u16} */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "inc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b ${Dsp-16-u24} */
{
M32C_INSN_INC32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "inc32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "inc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* inc.b r0l */
{
M32C_INSN_INC16_B_DST16_3_S_R0L_DIRECT_QI, "inc16.b-dst16-3-S-R0l-direct-QI", "inc.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* inc.b r0h */
{
M32C_INSN_INC16_B_DST16_3_S_R0H_DIRECT_QI, "inc16.b-dst16-3-S-R0h-direct-QI", "inc.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* inc.b ${Dsp-8-u8}[sb] */
{
M32C_INSN_INC16_B_DST16_3_S_8_8_SB_RELATIVE_QI, "inc16.b-dst16-3-S-8-8-SB-relative-QI", "inc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* inc.b ${Dsp-8-s8}[fb] */
{
M32C_INSN_INC16_B_DST16_3_S_8_8_FB_RELATIVE_QI, "inc16.b-dst16-3-S-8-8-FB-relative-QI", "inc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* inc.b ${Dsp-8-u16} */
{
M32C_INSN_INC16_B_DST16_3_S_8_16_ABSOLUTE_QI, "inc16.b-dst16-3-S-8-16-absolute-QI", "inc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_SUB32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_SUB32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "sub.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "sub.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "sub.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_SUB32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "sub.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_SUB32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "sub32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_SUB32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "sub32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_SUB32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "sub32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_SUB32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "sub32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_SUB32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "sub32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_SUB32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "sub32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_SUB32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "sub32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_SUB32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "sub32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
{
M32C_INSN_SUB32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "sub32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
{
M32C_INSN_SUB32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "sub32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "sub32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "sub.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "sub.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-32-SI},${Dsp-16-u16} */
{
M32C_INSN_SUB32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "sub32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "sub.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "sub32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "sub.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.l${G} #${Imm-40-SI},${Dsp-16-u24} */
{
M32C_INSN_SUB32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "sub32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "sub.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${S} ${SrcDst16-r0l-r0h-S-normal} */
{
M32C_INSN_SUB16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "sub16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "sub.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
M32C_INSN_SUB16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "sub16.b.S-src2-src16-2-S-8-SB-relative-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
M32C_INSN_SUB16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "sub16.b.S-src2-src16-2-S-8-FB-relative-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
M32C_INSN_SUB16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "sub16.b.S-src2-src16-2-S-16-absolute-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_SUB32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "sub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "sub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "sub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_SUB32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "sub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_SUB32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_SUB32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_SUB32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "sub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "sub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "sub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "sub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_SUB32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "sub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_SUB32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sub16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sub16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUB16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "sub16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "sub16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "sub16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUB16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "sub16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "sub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "sub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sub16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sub16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_SUB16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "sub16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sub16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sub16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_SUB16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "sub16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "sub16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "sub16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_SUB16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "sub16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sub16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sub16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_SUB16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "sub16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_SUB16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "sub16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_SUB16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "sub16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "sub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "sub16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "sub16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_SUB16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "sub16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_SUB32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "sub32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_SUB32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "sub32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "sub32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_SUB32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "sub32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "sub32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_SUB32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "sub32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "sub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_SUB32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "sub32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_SUB32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "sub32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "sub32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_SUB32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SUB32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "sub32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_SUB32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "sub32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_SUB32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "sub32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "sub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_SUB16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "sub16.w-imm-G-basic-dst16-Rn-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_SUB16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "sub16.w-imm-G-basic-dst16-An-direct-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_SUB16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "sub16.w-imm-G-basic-dst16-An-indirect-HI", "sub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "sub16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "sub16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "sub16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "sub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "sub16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "sub16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_SUB16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "sub16.w-imm-G-16-16-dst16-16-16-absolute-HI", "sub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_SUB16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "sub16.b-imm-G-basic-dst16-Rn-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_SUB16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "sub16.b-imm-G-basic-dst16-An-direct-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_SUB16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "sub16.b-imm-G-basic-dst16-An-indirect-QI", "sub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_SUB16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "sub16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_SUB16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "sub16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_SUB16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "sub16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "sub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_SUB16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "sub16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_SUB16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "sub16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_SUB16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "sub16.b-imm-G-16-16-dst16-16-16-absolute-QI", "sub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DSUB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dsub.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dsub.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dsub.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DSUB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dsub.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsub.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DSUB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DSUB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DSUB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dsub.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dsub.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dsub.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dsub.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DSUB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dsub.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DSUB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_DSUB32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "dsub32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_DSUB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "dsub32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "dsub32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "dsub.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "dsub.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_DSUB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsub32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "dsub.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsub32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_DSUB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsub32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "dsub.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_DSUB32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "dsub32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_DSUB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "dsub32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "dsub32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "dsub.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DSUB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DSUB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "dsub.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DSUB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DSUB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_DSUB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsub32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "dsub.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSUB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsub32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_DSUB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsub32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "dsub.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DSBB32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dsbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dsbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dsbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DSBB32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dsbb.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dsbb.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DSBB32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DSBB32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DSBB32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dsbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dsbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dsbb.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dsbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DSBB32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dsbb.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DSBB32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_DSBB32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "dsbb32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_DSBB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "dsbb32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "dsbb32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "dsbb.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "dsbb.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_DSBB32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dsbb32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "dsbb.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dsbb32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_DSBB32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dsbb32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "dsbb.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_DSBB32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "dsbb32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_DSBB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "dsbb32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "dsbb32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "dsbb.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DSBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DSBB32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "dsbb.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DSBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DSBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_DSBB32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dsbb32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "dsbb.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DSBB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dsbb32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_DSBB32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dsbb32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "dsbb.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* divx.l $Dst32RnPrefixedSI */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_RN_DIRECT_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-Rn-direct-Prefixed-SI", "divx.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l $Dst32AnPrefixedSI */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_AN_DIRECT_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-An-direct-Prefixed-SI", "divx.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l [$Dst32AnPrefixed] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_AN_INDIRECT_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-An-indirect-Prefixed-SI", "divx.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-8-An-relative-Prefixed-SI", "divx.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-16-An-relative-Prefixed-SI", "divx.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-24-An-relative-Prefixed-SI", "divx.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u8}[sb] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-8-SB-relative-Prefixed-SI", "divx.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u16}[sb] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-16-SB-relative-Prefixed-SI", "divx.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-s8}[fb] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-8-FB-relative-Prefixed-SI", "divx.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-s16}[fb] */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-16-FB-relative-Prefixed-SI", "divx.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u16} */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_16_ABSOLUTE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-16-absolute-Prefixed-SI", "divx.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.l ${Dsp-24-u24} */
{
M32C_INSN_DIVX32_L_DST32_24_PREFIXED_SI_DST32_24_24_ABSOLUTE_PREFIXED_SI, "divx32.l-dst32-24-Prefixed-SI-dst32-24-24-absolute-Prefixed-SI", "divx.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l $Dst32RnPrefixedSI */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_RN_DIRECT_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-Rn-direct-Prefixed-SI", "divu.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l $Dst32AnPrefixedSI */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_AN_DIRECT_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-An-direct-Prefixed-SI", "divu.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l [$Dst32AnPrefixed] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_AN_INDIRECT_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-An-indirect-Prefixed-SI", "divu.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-8-An-relative-Prefixed-SI", "divu.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-16-An-relative-Prefixed-SI", "divu.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-24-An-relative-Prefixed-SI", "divu.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u8}[sb] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-8-SB-relative-Prefixed-SI", "divu.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u16}[sb] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-16-SB-relative-Prefixed-SI", "divu.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-s8}[fb] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-8-FB-relative-Prefixed-SI", "divu.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-s16}[fb] */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-16-FB-relative-Prefixed-SI", "divu.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u16} */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_16_ABSOLUTE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-16-absolute-Prefixed-SI", "divu.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.l ${Dsp-24-u24} */
{
M32C_INSN_DIVU32_L_DST32_24_PREFIXED_SI_DST32_24_24_ABSOLUTE_PREFIXED_SI, "divu32.l-dst32-24-Prefixed-SI-dst32-24-24-absolute-Prefixed-SI", "divu.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l $Dst32RnPrefixedSI */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_RN_DIRECT_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-Rn-direct-Prefixed-SI", "div.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l $Dst32AnPrefixedSI */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_AN_DIRECT_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-An-direct-Prefixed-SI", "div.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l [$Dst32AnPrefixed] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_AN_INDIRECT_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-An-indirect-Prefixed-SI", "div.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_8_AN_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-8-An-relative-Prefixed-SI", "div.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_16_AN_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-16-An-relative-Prefixed-SI", "div.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_24_AN_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-24-An-relative-Prefixed-SI", "div.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u8}[sb] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_8_SB_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-8-SB-relative-Prefixed-SI", "div.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u16}[sb] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_16_SB_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-16-SB-relative-Prefixed-SI", "div.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-s8}[fb] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_8_FB_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-8-FB-relative-Prefixed-SI", "div.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-s16}[fb] */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_16_FB_RELATIVE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-16-FB-relative-Prefixed-SI", "div.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u16} */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_16_ABSOLUTE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-16-absolute-Prefixed-SI", "div.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.l ${Dsp-24-u24} */
{
M32C_INSN_DIV32_L_DST32_24_PREFIXED_SI_DST32_24_24_ABSOLUTE_PREFIXED_SI, "div32.l-dst32-24-Prefixed-SI-dst32-24-24-absolute-Prefixed-SI", "div.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w $Dst32RnUnprefixedHI */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w $Dst32AnUnprefixedHI */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w [$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "divx.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16} */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u24} */
{
M32C_INSN_DIVX32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "divx32.w-dst32-16-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "divx.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b $Dst32RnUnprefixedQI */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b $Dst32AnUnprefixedQI */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b [$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "divx.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16} */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u24} */
{
M32C_INSN_DIVX32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "divx32.b-dst32-16-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "divx.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w $Dst16RnHI */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_RN_DIRECT_HI, "divx16.w-dst16-16-HI-dst16-Rn-direct-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w $Dst16AnHI */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_AN_DIRECT_HI, "divx16.w-dst16-16-HI-dst16-An-direct-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w [$Dst16An] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_AN_INDIRECT_HI, "divx16.w-dst16-16-HI-dst16-An-indirect-HI", "divx.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_8_AN_RELATIVE_HI, "divx16.w-dst16-16-HI-dst16-16-8-An-relative-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_16_AN_RELATIVE_HI, "divx16.w-dst16-16-HI-dst16-16-16-An-relative-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_8_SB_RELATIVE_HI, "divx16.w-dst16-16-HI-dst16-16-8-SB-relative-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_16_SB_RELATIVE_HI, "divx16.w-dst16-16-HI-dst16-16-16-SB-relative-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_8_FB_RELATIVE_HI, "divx16.w-dst16-16-HI-dst16-16-8-FB-relative-HI", "divx.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w ${Dsp-16-u16} */
{
M32C_INSN_DIVX16_W_DST16_16_HI_DST16_16_16_ABSOLUTE_HI, "divx16.w-dst16-16-HI-dst16-16-16-absolute-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b $Dst16RnQI */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_RN_DIRECT_QI, "divx16.b-dst16-16-QI-dst16-Rn-direct-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b $Dst16AnQI */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_AN_DIRECT_QI, "divx16.b-dst16-16-QI-dst16-An-direct-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b [$Dst16An] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_AN_INDIRECT_QI, "divx16.b-dst16-16-QI-dst16-An-indirect-QI", "divx.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_8_AN_RELATIVE_QI, "divx16.b-dst16-16-QI-dst16-16-8-An-relative-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_16_AN_RELATIVE_QI, "divx16.b-dst16-16-QI-dst16-16-16-An-relative-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_8_SB_RELATIVE_QI, "divx16.b-dst16-16-QI-dst16-16-8-SB-relative-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_16_SB_RELATIVE_QI, "divx16.b-dst16-16-QI-dst16-16-16-SB-relative-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_8_FB_RELATIVE_QI, "divx16.b-dst16-16-QI-dst16-16-8-FB-relative-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b ${Dsp-16-u16} */
{
M32C_INSN_DIVX16_B_DST16_16_QI_DST16_16_16_ABSOLUTE_QI, "divx16.b-dst16-16-QI-dst16-16-16-absolute-QI", "divx.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w $Dst32RnUnprefixedHI */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w $Dst32AnUnprefixedHI */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w [$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "divu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16} */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u24} */
{
M32C_INSN_DIVU32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "divu32.w-dst32-16-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "divu.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b $Dst32RnUnprefixedQI */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b $Dst32AnUnprefixedQI */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b [$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "divu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16} */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u24} */
{
M32C_INSN_DIVU32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "divu32.b-dst32-16-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "divu.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w $Dst16RnHI */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_RN_DIRECT_HI, "divu16.w-dst16-16-HI-dst16-Rn-direct-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w $Dst16AnHI */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_AN_DIRECT_HI, "divu16.w-dst16-16-HI-dst16-An-direct-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w [$Dst16An] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_AN_INDIRECT_HI, "divu16.w-dst16-16-HI-dst16-An-indirect-HI", "divu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_8_AN_RELATIVE_HI, "divu16.w-dst16-16-HI-dst16-16-8-An-relative-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_16_AN_RELATIVE_HI, "divu16.w-dst16-16-HI-dst16-16-16-An-relative-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_8_SB_RELATIVE_HI, "divu16.w-dst16-16-HI-dst16-16-8-SB-relative-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_16_SB_RELATIVE_HI, "divu16.w-dst16-16-HI-dst16-16-16-SB-relative-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_8_FB_RELATIVE_HI, "divu16.w-dst16-16-HI-dst16-16-8-FB-relative-HI", "divu.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w ${Dsp-16-u16} */
{
M32C_INSN_DIVU16_W_DST16_16_HI_DST16_16_16_ABSOLUTE_HI, "divu16.w-dst16-16-HI-dst16-16-16-absolute-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b $Dst16RnQI */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_RN_DIRECT_QI, "divu16.b-dst16-16-QI-dst16-Rn-direct-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b $Dst16AnQI */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_AN_DIRECT_QI, "divu16.b-dst16-16-QI-dst16-An-direct-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b [$Dst16An] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_AN_INDIRECT_QI, "divu16.b-dst16-16-QI-dst16-An-indirect-QI", "divu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_8_AN_RELATIVE_QI, "divu16.b-dst16-16-QI-dst16-16-8-An-relative-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_16_AN_RELATIVE_QI, "divu16.b-dst16-16-QI-dst16-16-16-An-relative-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_8_SB_RELATIVE_QI, "divu16.b-dst16-16-QI-dst16-16-8-SB-relative-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_16_SB_RELATIVE_QI, "divu16.b-dst16-16-QI-dst16-16-16-SB-relative-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_8_FB_RELATIVE_QI, "divu16.b-dst16-16-QI-dst16-16-8-FB-relative-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b ${Dsp-16-u16} */
{
M32C_INSN_DIVU16_B_DST16_16_QI_DST16_16_16_ABSOLUTE_QI, "divu16.b-dst16-16-QI-dst16-16-16-absolute-QI", "divu.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w $Dst32RnUnprefixedHI */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w $Dst32AnUnprefixedHI */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w [$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "div.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16} */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u24} */
{
M32C_INSN_DIV32_W_DST32_16_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "div32.w-dst32-16-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "div.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b $Dst32RnUnprefixedQI */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b $Dst32AnUnprefixedQI */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b [$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "div.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16} */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u24} */
{
M32C_INSN_DIV32_B_DST32_16_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "div32.b-dst32-16-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "div.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w $Dst16RnHI */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_RN_DIRECT_HI, "div16.w-dst16-16-HI-dst16-Rn-direct-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w $Dst16AnHI */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_AN_DIRECT_HI, "div16.w-dst16-16-HI-dst16-An-direct-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w [$Dst16An] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_AN_INDIRECT_HI, "div16.w-dst16-16-HI-dst16-An-indirect-HI", "div.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_8_AN_RELATIVE_HI, "div16.w-dst16-16-HI-dst16-16-8-An-relative-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_16_AN_RELATIVE_HI, "div16.w-dst16-16-HI-dst16-16-16-An-relative-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_8_SB_RELATIVE_HI, "div16.w-dst16-16-HI-dst16-16-8-SB-relative-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_16_SB_RELATIVE_HI, "div16.w-dst16-16-HI-dst16-16-16-SB-relative-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_8_FB_RELATIVE_HI, "div16.w-dst16-16-HI-dst16-16-8-FB-relative-HI", "div.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w ${Dsp-16-u16} */
{
M32C_INSN_DIV16_W_DST16_16_HI_DST16_16_16_ABSOLUTE_HI, "div16.w-dst16-16-HI-dst16-16-16-absolute-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b $Dst16RnQI */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_RN_DIRECT_QI, "div16.b-dst16-16-QI-dst16-Rn-direct-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b $Dst16AnQI */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_AN_DIRECT_QI, "div16.b-dst16-16-QI-dst16-An-direct-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b [$Dst16An] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_AN_INDIRECT_QI, "div16.b-dst16-16-QI-dst16-An-indirect-QI", "div.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_8_AN_RELATIVE_QI, "div16.b-dst16-16-QI-dst16-16-8-An-relative-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_16_AN_RELATIVE_QI, "div16.b-dst16-16-QI-dst16-16-16-An-relative-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_8_SB_RELATIVE_QI, "div16.b-dst16-16-QI-dst16-16-8-SB-relative-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_16_SB_RELATIVE_QI, "div16.b-dst16-16-QI-dst16-16-16-SB-relative-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_8_FB_RELATIVE_QI, "div16.b-dst16-16-QI-dst16-16-8-FB-relative-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b ${Dsp-16-u16} */
{
M32C_INSN_DIV16_B_DST16_16_QI_DST16_16_16_ABSOLUTE_QI, "div16.b-dst16-16-QI-dst16-16-16-absolute-QI", "div.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dec.w $Dst32RnUnprefixedHI */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "dec.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w $Dst32AnUnprefixedHI */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "dec.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w [$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "dec.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "dec.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "dec.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "dec.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "dec.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "dec.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "dec.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "dec.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u16} */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "dec.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.w ${Dsp-16-u24} */
{
M32C_INSN_DEC32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "dec32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "dec.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b $Dst32RnUnprefixedQI */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "dec.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b $Dst32AnUnprefixedQI */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "dec.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b [$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "dec.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "dec.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "dec.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "dec.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "dec.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "dec.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "dec.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "dec.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u16} */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "dec.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b ${Dsp-16-u24} */
{
M32C_INSN_DEC32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "dec32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "dec.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dec.b r0l */
{
M32C_INSN_DEC16_B_DST16_3_S_R0L_DIRECT_QI, "dec16.b-dst16-3-S-R0l-direct-QI", "dec.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dec.b r0h */
{
M32C_INSN_DEC16_B_DST16_3_S_R0H_DIRECT_QI, "dec16.b-dst16-3-S-R0h-direct-QI", "dec.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dec.b ${Dsp-8-u8}[sb] */
{
M32C_INSN_DEC16_B_DST16_3_S_8_8_SB_RELATIVE_QI, "dec16.b-dst16-3-S-8-8-SB-relative-QI", "dec.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dec.b ${Dsp-8-s8}[fb] */
{
M32C_INSN_DEC16_B_DST16_3_S_8_8_FB_RELATIVE_QI, "dec16.b-dst16-3-S-8-8-FB-relative-QI", "dec.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dec.b ${Dsp-8-u16} */
{
M32C_INSN_DEC16_B_DST16_3_S_8_16_ABSOLUTE_QI, "dec16.b-dst16-3-S-8-16-absolute-QI", "dec.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmpx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_CMPX32_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "cmpx32-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "cmpx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_CMPX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "cmpx32-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "cmpx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMPX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmpx32-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "cmpx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMPX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "cmpx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMPX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "cmpx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMPX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "cmpx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMPX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "cmpx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMPX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "cmpx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMPX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "cmpx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_CMPX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "cmpx32-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "cmpx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMPX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "cmpx32-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "cmpx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmpx${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_CMPX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "cmpx32-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "cmpx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${S} ${Dsp-8-u8}[sb],${Dst32R0HI-S} */
{
M32C_INSN_CMP32_W_S_SRC2_R0_HI_SRC32_2_S_8_SB_RELATIVE_HI, "cmp32.w.S-src2-r0-HI-src32-2-S-8-SB-relative-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} ${Dsp-8-s8}[fb],${Dst32R0HI-S} */
{
M32C_INSN_CMP32_W_S_SRC2_R0_HI_SRC32_2_S_8_FB_RELATIVE_HI, "cmp32.w.S-src2-r0-HI-src32-2-S-8-FB-relative-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} ${Dsp-8-u16},${Dst32R0HI-S} */
{
M32C_INSN_CMP32_W_S_SRC2_R0_HI_SRC32_2_S_16_ABSOLUTE_HI, "cmp32.w.S-src2-r0-HI-src32-2-S-16-absolute-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-u8}[sb],${Dst32R0QI-S} */
{
M32C_INSN_CMP32_B_S_SRC2_R0_QI_SRC32_2_S_8_SB_RELATIVE_QI, "cmp32.b.S-src2-r0-QI-src32-2-S-8-SB-relative-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-s8}[fb],${Dst32R0QI-S} */
{
M32C_INSN_CMP32_B_S_SRC2_R0_QI_SRC32_2_S_8_FB_RELATIVE_QI, "cmp32.b.S-src2-r0-QI-src32-2-S-8-FB-relative-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-u16},${Dst32R0QI-S} */
{
M32C_INSN_CMP32_B_S_SRC2_R0_QI_SRC32_2_S_16_ABSOLUTE_QI, "cmp32.b.S-src2-r0-QI-src32-2-S-16-absolute-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_CMP32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "cmp32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_CMP32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "cmp32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_CMP32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "cmp32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_CMP32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "cmp32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_CMP32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "cmp32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_CMP32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "cmp32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_CMP32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "cmp32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_CMP32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "cmp32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_CMP32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_CMP32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "cmp.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "cmp.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "cmp.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_CMP32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "cmp.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${S} ${SrcDst16-r0l-r0h-S-normal} */
{
M32C_INSN_CMP16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "cmp16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "cmp.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
M32C_INSN_CMP16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "cmp16.b.S-src2-src16-2-S-8-SB-relative-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
M32C_INSN_CMP16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "cmp16.b.S-src2-src16-2-S-8-FB-relative-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
M32C_INSN_CMP16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "cmp16.b.S-src2-src16-2-S-16-absolute-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_CMP32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "cmp.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "cmp.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "cmp.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_CMP32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "cmp.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_CMP32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_CMP32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_CMP32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "cmp.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "cmp.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "cmp.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "cmp.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_CMP32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "cmp.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_CMP32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "cmp16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "cmp16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_CMP16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "cmp16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "cmp16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "cmp16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_CMP16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "cmp16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "cmp16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "cmp16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_CMP16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "cmp16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "cmp16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "cmp16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_CMP16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "cmp16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "cmp16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "cmp16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_CMP16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "cmp16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "cmp16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "cmp16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "cmp16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_CMP16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "cmp16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_CMP16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "cmp16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "cmp16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "cmp16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "cmp16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_CMP32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_CMP32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},$Dst16RnHI */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "cmp16.w-imm4-Q-16-dst16-Rn-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "cmp16.w-imm4-Q-16-dst16-An-direct-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "cmp16.w-imm4-Q-16-dst16-An-indirect-HI", "cmp.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "cmp16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "cmp16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "cmp16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "cmp16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "cmp16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "cmp.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
M32C_INSN_CMP16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "cmp16.w-imm4-Q-16-dst16-16-16-absolute-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "cmp16.b-imm4-Q-16-dst16-Rn-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "cmp16.b-imm4-Q-16-dst16-An-direct-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "cmp16.b-imm4-Q-16-dst16-An-indirect-QI", "cmp.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "cmp16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "cmp16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "cmp16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "cmp16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "cmp16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "cmp16.b-imm4-Q-16-dst16-16-16-absolute-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_CMP32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "cmp32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_CMP32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "cmp32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "cmp32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_CMP32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "cmp32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_CMP32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "cmp32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "cmp.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_CMP32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "cmp32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_CMP32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "cmp32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "cmp32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_CMP32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "cmp32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_CMP32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "cmp32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "cmp.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_CMP16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "cmp16.w-imm-G-basic-dst16-Rn-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_CMP16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "cmp16.w-imm-G-basic-dst16-An-direct-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "cmp16.w-imm-G-basic-dst16-An-indirect-HI", "cmp.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "cmp16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "cmp16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "cmp16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "cmp.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "cmp16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "cmp16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_CMP16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "cmp16.w-imm-G-16-16-dst16-16-16-absolute-HI", "cmp.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_CMP16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "cmp16.b-imm-G-basic-dst16-Rn-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_CMP16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "cmp16.b-imm-G-basic-dst16-An-direct-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "cmp16.b-imm-G-basic-dst16-An-indirect-QI", "cmp.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "cmp16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "cmp16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "cmp16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "cmp.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_CMP16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "cmp16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "cmp16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_CMP16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "cmp16.b-imm-G-16-16-dst16-16-16-absolute-QI", "cmp.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
{
M32C_INSN_CMP32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "cmp32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
{
M32C_INSN_CMP32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "cmp32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "cmp32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "cmp.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
{
M32C_INSN_CMP32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
{
M32C_INSN_CMP32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "cmp.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
{
M32C_INSN_CMP32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
{
M32C_INSN_CMP32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16} */
{
M32C_INSN_CMP32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "cmp.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_CMP32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "cmp32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "cmp.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24} */
{
M32C_INSN_CMP32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "cmp32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "cmp.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_CLIP32_W_IMM_24_HI_IMM_40_HI_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "clip32.w-Imm-24-HI-Imm-40-HI-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "clip.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_CLIP32_W_IMM_24_HI_IMM_40_HI_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "clip32.w-Imm-24-HI-Imm-40-HI-basic-Prefixed-dst32-An-direct-Prefixed-HI", "clip.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-24-HI},#${Imm-40-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_W_IMM_24_HI_IMM_40_HI_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "clip32.w-Imm-24-HI-Imm-40-HI-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "clip.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_W_IMM_32_HI_IMM_48_HI_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "clip32.w-Imm-32-HI-Imm-48-HI-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "clip.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_CLIP32_W_IMM_32_HI_IMM_48_HI_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "clip32.w-Imm-32-HI-Imm-48-HI-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "clip.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_CLIP32_W_IMM_32_HI_IMM_48_HI_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "clip32.w-Imm-32-HI-Imm-48-HI-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "clip.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_W_IMM_40_HI_IMM_56_HI_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "clip32.w-Imm-40-HI-Imm-56-HI-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "clip.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_CLIP32_W_IMM_40_HI_IMM_56_HI_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "clip32.w-Imm-40-HI-Imm-56-HI-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "clip.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_CLIP32_W_IMM_40_HI_IMM_56_HI_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "clip32.w-Imm-40-HI-Imm-56-HI-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "clip.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16} */
{
M32C_INSN_CLIP32_W_IMM_40_HI_IMM_56_HI_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "clip32.w-Imm-40-HI-Imm-56-HI-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "clip.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_W_IMM_48_HI_IMM_64_HI_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "clip32.w-Imm-48-HI-Imm-64-HI-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "clip.w", 80,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24} */
{
M32C_INSN_CLIP32_W_IMM_48_HI_IMM_64_HI_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "clip32.w-Imm-48-HI-Imm-64-HI-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "clip.w", 80,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_CLIP32_B_IMM_24_QI_IMM_32_QI_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "clip32.b-Imm-24-QI-Imm-32-QI-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "clip.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_CLIP32_B_IMM_24_QI_IMM_32_QI_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "clip32.b-Imm-24-QI-Imm-32-QI-basic-Prefixed-dst32-An-direct-Prefixed-QI", "clip.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-24-QI},#${Imm-32-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_B_IMM_24_QI_IMM_32_QI_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "clip32.b-Imm-24-QI-Imm-32-QI-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "clip.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_B_IMM_32_QI_IMM_40_QI_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "clip32.b-Imm-32-QI-Imm-40-QI-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "clip.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_CLIP32_B_IMM_32_QI_IMM_40_QI_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "clip32.b-Imm-32-QI-Imm-40-QI-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "clip.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_CLIP32_B_IMM_32_QI_IMM_40_QI_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "clip32.b-Imm-32-QI-Imm-40-QI-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "clip.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_B_IMM_40_QI_IMM_48_QI_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "clip32.b-Imm-40-QI-Imm-48-QI-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "clip.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_CLIP32_B_IMM_40_QI_IMM_48_QI_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "clip32.b-Imm-40-QI-Imm-48-QI-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "clip.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_CLIP32_B_IMM_40_QI_IMM_48_QI_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "clip32.b-Imm-40-QI-Imm-48-QI-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "clip.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16} */
{
M32C_INSN_CLIP32_B_IMM_40_QI_IMM_48_QI_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "clip32.b-Imm-40-QI-Imm-48-QI-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "clip.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_CLIP32_B_IMM_48_QI_IMM_56_QI_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "clip32.b-Imm-48-QI-Imm-56-QI-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "clip.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24} */
{
M32C_INSN_CLIP32_B_IMM_48_QI_IMM_56_QI_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "clip32.b-Imm-48-QI-Imm-56-QI-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "clip.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bxor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BXOR32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bxor32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bxor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_RN_DIRECT, "bxor16-X-bit16-16-bit16-Rn-direct", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_AN_DIRECT, "bxor16-X-bit16-16-bit16-An-direct", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} [$Bit16An] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_AN_INDIRECT, "bxor16-X-bit16-16-bit16-An-indirect", "bxor", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bxor16-X-bit16-16-bit16-16-8-An-relative", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bxor16-X-bit16-16-bit16-16-16-An-relative", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bxor16-X-bit16-16-bit16-16-8-SB-relative", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bxor16-X-bit16-16-bit16-16-16-SB-relative", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bxor16-X-bit16-16-bit16-16-8-FB-relative", "bxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bxor${X} ${BitBase16-16-u16} */
{
M32C_INSN_BXOR16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bxor16-X-bit16-16-bit16-16-16-absolute", "bxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btsts", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btsts", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btsts", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btsts", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BTSTS32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btsts32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btsts", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_RN_DIRECT, "btsts16-X-bit16-16-bit16-Rn-direct", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_AN_DIRECT, "btsts16-X-bit16-16-bit16-An-direct", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} [$Bit16An] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_AN_INDIRECT, "btsts16-X-bit16-16-bit16-An-indirect", "btsts", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "btsts16-X-bit16-16-bit16-16-8-An-relative", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "btsts16-X-bit16-16-bit16-16-16-An-relative", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "btsts16-X-bit16-16-bit16-16-8-SB-relative", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "btsts16-X-bit16-16-bit16-16-16-SB-relative", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "btsts16-X-bit16-16-bit16-16-8-FB-relative", "btsts", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btsts${X} ${BitBase16-16-u16} */
{
M32C_INSN_BTSTS16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "btsts16-X-bit16-16-bit16-16-16-absolute", "btsts", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btstc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btstc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btstc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btstc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btstc32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btstc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_RN_DIRECT, "btstc16-X-bit16-16-bit16-Rn-direct", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_AN_DIRECT, "btstc16-X-bit16-16-bit16-An-direct", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} [$Bit16An] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_AN_INDIRECT, "btstc16-X-bit16-16-bit16-An-indirect", "btstc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "btstc16-X-bit16-16-bit16-16-8-An-relative", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "btstc16-X-bit16-16-bit16-16-16-An-relative", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "btstc16-X-bit16-16-bit16-16-8-SB-relative", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "btstc16-X-bit16-16-bit16-16-16-SB-relative", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "btstc16-X-bit16-16-bit16-16-8-FB-relative", "btstc", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btstc${X} ${BitBase16-16-u16} */
{
M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "btstc16-X-bit16-16-bit16-16-16-absolute", "btstc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btst", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btst", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
+/* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btst", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btst", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btst", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btst", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btst", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btst", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-s11-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btst", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-s19-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btst", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed} */
+/* btst${G} ${BitBase32-16-u19-Unprefixed} */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btst", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* btst${X} ${BitBase32-16-u27-Unprefixed} */
+/* btst${G} ${BitBase32-16-u27-Unprefixed} */
{
- M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btst", 40,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BTST16_G_BIT16_16_8_BIT16_RN_DIRECT, "btst16-G-bit16-16-8-bit16-Rn-direct", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} $Bitno16R,$Bit16An */
{
M32C_INSN_BTST16_G_BIT16_16_8_BIT16_AN_DIRECT, "btst16-G-bit16-16-8-bit16-An-direct", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_AN_RELATIVE, "btst16-G-bit16-16-8-bit16-16-8-An-relative", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_SB_RELATIVE, "btst16-G-bit16-16-8-bit16-16-8-SB-relative", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_FB_RELATIVE, "btst16-G-bit16-16-8-bit16-16-8-FB-relative", "btst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${S} ${BitBase16-8-u11-S}[sb] */
{
M32C_INSN_BTST16_S_BIT16_11_S_BIT16_11_SB_RELATIVE_S, "btst16-S-bit16-11-S-bit16-11-SB-relative-S", "btst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_AN_RELATIVE, "btst16-G-bit16-16-16-bit16-16-16-An-relative", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_SB_RELATIVE, "btst16-G-bit16-16-16-bit16-16-16-SB-relative", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} ${BitBase16-16-u16} */
{
M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_ABSOLUTE, "btst16-G-bit16-16-16-bit16-16-16-absolute", "btst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* btst${G} [$Bit16An] */
{
M32C_INSN_BTST16_G_BIT16_16_BASIC_BIT16_AN_INDIRECT, "btst16-G-bit16-16-basic-bit16-An-indirect", "btst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "bset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "bset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "bset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "bset", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${X} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "bset32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "bset", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BSET16_G_BIT16_16_8_BIT16_RN_DIRECT, "bset16-G-bit16-16-8-bit16-Rn-direct", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} $Bitno16R,$Bit16An */
{
M32C_INSN_BSET16_G_BIT16_16_8_BIT16_AN_DIRECT, "bset16-G-bit16-16-8-bit16-An-direct", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BSET16_G_BIT16_16_8_BIT16_16_8_AN_RELATIVE, "bset16-G-bit16-16-8-bit16-16-8-An-relative", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BSET16_G_BIT16_16_8_BIT16_16_8_SB_RELATIVE, "bset16-G-bit16-16-8-bit16-16-8-SB-relative", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BSET16_G_BIT16_16_8_BIT16_16_8_FB_RELATIVE, "bset16-G-bit16-16-8-bit16-16-8-FB-relative", "bset", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${S} ${BitBase16-8-u11-S}[sb] */
{
M32C_INSN_BSET16_S_BIT16_11_S_BIT16_11_SB_RELATIVE_S, "bset16-S-bit16-11-S-bit16-11-SB-relative-S", "bset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BSET16_G_BIT16_16_16_BIT16_16_16_AN_RELATIVE, "bset16-G-bit16-16-16-bit16-16-16-An-relative", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BSET16_G_BIT16_16_16_BIT16_16_16_SB_RELATIVE, "bset16-G-bit16-16-16-bit16-16-16-SB-relative", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} ${BitBase16-16-u16} */
{
M32C_INSN_BSET16_G_BIT16_16_16_BIT16_16_16_ABSOLUTE, "bset16-G-bit16-16-16-bit16-16-16-absolute", "bset", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bset${G} [$Bit16An] */
{
M32C_INSN_BSET16_G_BIT16_16_BASIC_BIT16_AN_INDIRECT, "bset16-G-bit16-16-basic-bit16-An-indirect", "bset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BOR32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bor32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_RN_DIRECT, "bor16-X-bit16-16-bit16-Rn-direct", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_AN_DIRECT, "bor16-X-bit16-16-bit16-An-direct", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} [$Bit16An] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_AN_INDIRECT, "bor16-X-bit16-16-bit16-An-indirect", "bor", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bor16-X-bit16-16-bit16-16-8-An-relative", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bor16-X-bit16-16-bit16-16-16-An-relative", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bor16-X-bit16-16-bit16-16-8-SB-relative", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bor16-X-bit16-16-bit16-16-16-SB-relative", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bor16-X-bit16-16-bit16-16-8-FB-relative", "bor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bor${X} ${BitBase16-16-u16} */
{
M32C_INSN_BOR16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bor16-X-bit16-16-bit16-16-16-absolute", "bor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bnxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bnxor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bnxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bnxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bnxor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BNXOR32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bnxor32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bnxor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_RN_DIRECT, "bnxor16-X-bit16-16-bit16-Rn-direct", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_AN_DIRECT, "bnxor16-X-bit16-16-bit16-An-direct", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} [$Bit16An] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_AN_INDIRECT, "bnxor16-X-bit16-16-bit16-An-indirect", "bnxor", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bnxor16-X-bit16-16-bit16-16-8-An-relative", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bnxor16-X-bit16-16-bit16-16-16-An-relative", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bnxor16-X-bit16-16-bit16-16-8-SB-relative", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bnxor16-X-bit16-16-bit16-16-16-SB-relative", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bnxor16-X-bit16-16-bit16-16-8-FB-relative", "bnxor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnxor${X} ${BitBase16-16-u16} */
{
M32C_INSN_BNXOR16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bnxor16-X-bit16-16-bit16-16-16-absolute", "bnxor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bntst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bntst", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bntst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bntst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bntst", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BNTST32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bntst32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bntst", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_RN_DIRECT, "bntst16-X-bit16-16-bit16-Rn-direct", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_AN_DIRECT, "bntst16-X-bit16-16-bit16-An-direct", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} [$Bit16An] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_AN_INDIRECT, "bntst16-X-bit16-16-bit16-An-indirect", "bntst", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bntst16-X-bit16-16-bit16-16-8-An-relative", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bntst16-X-bit16-16-bit16-16-16-An-relative", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bntst16-X-bit16-16-bit16-16-8-SB-relative", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bntst16-X-bit16-16-bit16-16-16-SB-relative", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bntst16-X-bit16-16-bit16-16-8-FB-relative", "bntst", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bntst${X} ${BitBase16-16-u16} */
{
M32C_INSN_BNTST16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bntst16-X-bit16-16-bit16-16-16-absolute", "bntst", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "bnot", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "bnot", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "bnot", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "bnot", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${X} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BNOT32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "bnot32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "bnot", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BNOT16_G_BIT16_16_8_BIT16_RN_DIRECT, "bnot16-G-bit16-16-8-bit16-Rn-direct", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} $Bitno16R,$Bit16An */
{
M32C_INSN_BNOT16_G_BIT16_16_8_BIT16_AN_DIRECT, "bnot16-G-bit16-16-8-bit16-An-direct", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BNOT16_G_BIT16_16_8_BIT16_16_8_AN_RELATIVE, "bnot16-G-bit16-16-8-bit16-16-8-An-relative", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BNOT16_G_BIT16_16_8_BIT16_16_8_SB_RELATIVE, "bnot16-G-bit16-16-8-bit16-16-8-SB-relative", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BNOT16_G_BIT16_16_8_BIT16_16_8_FB_RELATIVE, "bnot16-G-bit16-16-8-bit16-16-8-FB-relative", "bnot", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${S} ${BitBase16-8-u11-S}[sb] */
{
M32C_INSN_BNOT16_S_BIT16_11_S_BIT16_11_SB_RELATIVE_S, "bnot16-S-bit16-11-S-bit16-11-SB-relative-S", "bnot", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BNOT16_G_BIT16_16_16_BIT16_16_16_AN_RELATIVE, "bnot16-G-bit16-16-16-bit16-16-16-An-relative", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BNOT16_G_BIT16_16_16_BIT16_16_16_SB_RELATIVE, "bnot16-G-bit16-16-16-bit16-16-16-SB-relative", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} ${BitBase16-16-u16} */
{
M32C_INSN_BNOT16_G_BIT16_16_16_BIT16_16_16_ABSOLUTE, "bnot16-G-bit16-16-16-bit16-16-16-absolute", "bnot", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnot${G} [$Bit16An] */
{
M32C_INSN_BNOT16_G_BIT16_16_BASIC_BIT16_AN_INDIRECT, "bnot16-G-bit16-16-basic-bit16-An-indirect", "bnot", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bnor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bnor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bnor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bnor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bnor", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BNOR32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bnor32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bnor", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_RN_DIRECT, "bnor16-X-bit16-16-bit16-Rn-direct", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_AN_DIRECT, "bnor16-X-bit16-16-bit16-An-direct", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} [$Bit16An] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_AN_INDIRECT, "bnor16-X-bit16-16-bit16-An-indirect", "bnor", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bnor16-X-bit16-16-bit16-16-8-An-relative", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bnor16-X-bit16-16-bit16-16-16-An-relative", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bnor16-X-bit16-16-bit16-16-8-SB-relative", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bnor16-X-bit16-16-bit16-16-16-SB-relative", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bnor16-X-bit16-16-bit16-16-8-FB-relative", "bnor", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnor${X} ${BitBase16-16-u16} */
{
M32C_INSN_BNOR16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bnor16-X-bit16-16-bit16-16-16-absolute", "bnor", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "bnand", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "bnand", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "bnand", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "bnand", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "bnand", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BNAND32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "bnand32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "bnand", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_RN_DIRECT, "bnand16-X-bit16-16-bit16-Rn-direct", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_AN_DIRECT, "bnand16-X-bit16-16-bit16-An-direct", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} [$Bit16An] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_AN_INDIRECT, "bnand16-X-bit16-16-bit16-An-indirect", "bnand", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "bnand16-X-bit16-16-bit16-16-8-An-relative", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "bnand16-X-bit16-16-bit16-16-16-An-relative", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "bnand16-X-bit16-16-bit16-16-8-SB-relative", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "bnand16-X-bit16-16-bit16-16-16-SB-relative", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "bnand16-X-bit16-16-bit16-16-8-FB-relative", "bnand", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bnand${X} ${BitBase16-16-u16} */
{
M32C_INSN_BNAND16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "bnand16-X-bit16-16-bit16-16-16-absolute", "bnand", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-16} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BM32_BIT32_BASIC_UNPREFIXED_COND32_16_BIT32_RN_DIRECT_UNPREFIXED, "bm32-bit32-basic-Unprefixed-cond32-16-bit32-Rn-direct-Unprefixed", "bm", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-16} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BM32_BIT32_BASIC_UNPREFIXED_COND32_16_BIT32_AN_DIRECT_UNPREFIXED, "bm32-bit32-basic-Unprefixed-cond32-16-bit32-An-direct-Unprefixed", "bm", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-16} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BM32_BIT32_BASIC_UNPREFIXED_COND32_16_BIT32_AN_INDIRECT_UNPREFIXED, "bm32-bit32-basic-Unprefixed-cond32-16-bit32-An-indirect-Unprefixed", "bm", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BM32_BIT32_16_8_UNPREFIXED_COND32_24_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "bm32-bit32-16-8-Unprefixed-cond32-24-bit32-16-11-An-relative-Unprefixed", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BM32_BIT32_16_8_UNPREFIXED_COND32_24_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "bm32-bit32-16-8-Unprefixed-cond32-24-bit32-16-11-SB-relative-Unprefixed", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-24} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BM32_BIT32_16_8_UNPREFIXED_COND32_24_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "bm32-bit32-16-8-Unprefixed-cond32-24-bit32-16-11-FB-relative-Unprefixed", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BM32_BIT32_16_16_UNPREFIXED_COND32_32_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "bm32-bit32-16-16-Unprefixed-cond32-32-bit32-16-19-An-relative-Unprefixed", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BM32_BIT32_16_16_UNPREFIXED_COND32_32_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "bm32-bit32-16-16-Unprefixed-cond32-32-bit32-16-19-SB-relative-Unprefixed", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-32} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BM32_BIT32_16_16_UNPREFIXED_COND32_32_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "bm32-bit32-16-16-Unprefixed-cond32-32-bit32-16-19-FB-relative-Unprefixed", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-32} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BM32_BIT32_16_16_UNPREFIXED_COND32_32_BIT32_16_19_ABSOLUTE_UNPREFIXED, "bm32-bit32-16-16-Unprefixed-cond32-32-bit32-16-19-absolute-Unprefixed", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-40} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BM32_BIT32_16_24_UNPREFIXED_COND32_40_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "bm32-bit32-16-24-Unprefixed-cond32-40-bit32-16-27-An-relative-Unprefixed", "bm", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond32-40} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BM32_BIT32_16_24_UNPREFIXED_COND32_40_BIT32_16_27_ABSOLUTE_UNPREFIXED, "bm32-bit32-16-24-Unprefixed-cond32-40-bit32-16-27-absolute-Unprefixed", "bm", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-24} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BM16_BIT16_16_8_COND16_24_BIT16_RN_DIRECT, "bm16-bit16-16-8-cond16-24-bit16-Rn-direct", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-24} $Bitno16R,$Bit16An */
{
M32C_INSN_BM16_BIT16_16_8_COND16_24_BIT16_AN_DIRECT, "bm16-bit16-16-8-cond16-24-bit16-An-direct", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-24} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BM16_BIT16_16_8_COND16_24_BIT16_16_8_AN_RELATIVE, "bm16-bit16-16-8-cond16-24-bit16-16-8-An-relative", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-24} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BM16_BIT16_16_8_COND16_24_BIT16_16_8_SB_RELATIVE, "bm16-bit16-16-8-cond16-24-bit16-16-8-SB-relative", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-24} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BM16_BIT16_16_8_COND16_24_BIT16_16_8_FB_RELATIVE, "bm16-bit16-16-8-cond16-24-bit16-16-8-FB-relative", "bm", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-32} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BM16_BIT16_16_16_COND16_32_BIT16_16_16_AN_RELATIVE, "bm16-bit16-16-16-cond16-32-bit16-16-16-An-relative", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-32} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BM16_BIT16_16_16_COND16_32_BIT16_16_16_SB_RELATIVE, "bm16-bit16-16-16-cond16-32-bit16-16-16-SB-relative", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-32} ${BitBase16-16-u16} */
{
M32C_INSN_BM16_BIT16_16_16_COND16_32_BIT16_16_16_ABSOLUTE, "bm16-bit16-16-16-cond16-32-bit16-16-16-absolute", "bm", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm${cond16-16} [$Bit16An] */
{
M32C_INSN_BM16_BIT16_16_BASIC_COND16_16_BIT16_AN_INDIRECT, "bm16-bit16-16-basic-cond16-16-bit16-An-indirect", "bm", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bitindex.w $Dst32RnUnprefixedHI */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "bitindex.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w $Dst32AnUnprefixedHI */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "bitindex.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w [$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "bitindex.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "bitindex.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "bitindex.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "bitindex.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "bitindex.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "bitindex.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "bitindex.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "bitindex.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u16} */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "bitindex.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.w ${Dsp-16-u24} */
{
M32C_INSN_BITINDEX32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "bitindex32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "bitindex.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b $Dst32RnUnprefixedQI */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "bitindex.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b $Dst32AnUnprefixedQI */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "bitindex.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b [$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "bitindex.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "bitindex.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "bitindex.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "bitindex.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "bitindex.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "bitindex.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "bitindex.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "bitindex.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u16} */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "bitindex.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bitindex.b ${Dsp-16-u24} */
{
M32C_INSN_BITINDEX32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "bitindex32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "bitindex.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* bclr${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "bclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "bclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "bclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "bclr", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u11-Unprefixed}[sb] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u19-Unprefixed}[sb] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-s11-Unprefixed}[fb] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-s19-Unprefixed}[fb] */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u19-Unprefixed} */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${X} ${BitBase32-16-u27-Unprefixed} */
{
M32C_INSN_BCLR32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "bclr32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "bclr", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BCLR16_G_BIT16_16_8_BIT16_RN_DIRECT, "bclr16-G-bit16-16-8-bit16-Rn-direct", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} $Bitno16R,$Bit16An */
{
M32C_INSN_BCLR16_G_BIT16_16_8_BIT16_AN_DIRECT, "bclr16-G-bit16-16-8-bit16-An-direct", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BCLR16_G_BIT16_16_8_BIT16_16_8_AN_RELATIVE, "bclr16-G-bit16-16-8-bit16-16-8-An-relative", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BCLR16_G_BIT16_16_8_BIT16_16_8_SB_RELATIVE, "bclr16-G-bit16-16-8-bit16-16-8-SB-relative", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BCLR16_G_BIT16_16_8_BIT16_16_8_FB_RELATIVE, "bclr16-G-bit16-16-8-bit16-16-8-FB-relative", "bclr", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${S} ${BitBase16-8-u11-S}[sb] */
{
M32C_INSN_BCLR16_S_BIT16_11_S_BIT16_11_SB_RELATIVE_S, "bclr16-S-bit16-11-S-bit16-11-SB-relative-S", "bclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BCLR16_G_BIT16_16_16_BIT16_16_16_AN_RELATIVE, "bclr16-G-bit16-16-16-bit16-16-16-An-relative", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BCLR16_G_BIT16_16_16_BIT16_16_16_SB_RELATIVE, "bclr16-G-bit16-16-16-bit16-16-16-SB-relative", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} ${BitBase16-16-u16} */
{
M32C_INSN_BCLR16_G_BIT16_16_16_BIT16_16_16_ABSOLUTE, "bclr16-G-bit16-16-16-bit16-16-16-absolute", "bclr", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bclr${G} [$Bit16An] */
{
M32C_INSN_BCLR16_G_BIT16_16_BASIC_BIT16_AN_INDIRECT, "bclr16-G-bit16-16-basic-bit16-An-indirect", "bclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} $Bitno32Prefixed,$Bit32RnPrefixed */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_RN_DIRECT_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-Rn-direct-Prefixed", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} $Bitno32Prefixed,$Bit32AnPrefixed */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_AN_DIRECT_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-An-direct-Prefixed", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_AN_INDIRECT_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-An-indirect-Prefixed", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_11_AN_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-11-An-relative-Prefixed", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_19_AN_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-19-An-relative-Prefixed", "band", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_27_AN_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-27-An-relative-Prefixed", "band", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u11-Prefixed}[sb] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_11_SB_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-11-SB-relative-Prefixed", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u19-Prefixed}[sb] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_19_SB_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-19-SB-relative-Prefixed", "band", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-s11-Prefixed}[fb] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_11_FB_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-11-FB-relative-Prefixed", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-s19-Prefixed}[fb] */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_19_FB_RELATIVE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-19-FB-relative-Prefixed", "band", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u19-Prefixed} */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_19_ABSOLUTE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-19-absolute-Prefixed", "band", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase32-24-u27-Prefixed} */
{
M32C_INSN_BAND32_X_BIT32_24_PREFIXED_BIT32_24_27_ABSOLUTE_PREFIXED, "band32-X-bit32-24-Prefixed-bit32-24-27-absolute-Prefixed", "band", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} $Bitno16R,$Bit16Rn */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_RN_DIRECT, "band16-X-bit16-16-bit16-Rn-direct", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} $Bitno16R,$Bit16An */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_AN_DIRECT, "band16-X-bit16-16-bit16-An-direct", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} [$Bit16An] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_AN_INDIRECT, "band16-X-bit16-16-bit16-An-indirect", "band", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${Dsp-16-u8}[$Bit16An] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, "band16-X-bit16-16-bit16-16-8-An-relative", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${Dsp-16-u16}[$Bit16An] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, "band16-X-bit16-16-bit16-16-16-An-relative", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase16-16-u8}[sb] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, "band16-X-bit16-16-bit16-16-8-SB-relative", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase16-16-u16}[sb] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_16_SB_RELATIVE, "band16-X-bit16-16-bit16-16-16-SB-relative", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase16-16-s8}[fb] */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, "band16-X-bit16-16-bit16-16-8-FB-relative", "band", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* band${X} ${BitBase16-16-u16} */
{
M32C_INSN_BAND16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "band16-X-bit16-16-bit16-16-16-absolute", "band", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_AND32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "and32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_AND32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "and32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_AND32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "and32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_AND32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "and32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_AND32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "and32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_AND32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "and32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_AND32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "and32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_AND32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "and32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} ${SrcDst16-r0l-r0h-S-normal} */
{
M32C_INSN_AND16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "and16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "and.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
M32C_INSN_AND16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "and16.b.S-src2-src16-2-S-8-SB-relative-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
M32C_INSN_AND16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "and16.b.S-src2-src16-2-S-8-FB-relative-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
M32C_INSN_AND16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "and16.b.S-src2-src16-2-S-16-absolute-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_AND32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_AND32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "and.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "and.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "and.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_AND32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "and.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_AND32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_AND32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_AND32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "and.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "and.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "and.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "and.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_AND32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "and.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_AND32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "and16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "and16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_AND16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "and16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "and16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "and16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_AND16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "and16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "and.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "and.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "and16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "and16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_AND16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "and16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "and16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "and16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_AND16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "and16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "and16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "and16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_AND16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "and16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "and16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "and16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_AND16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "and16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_AND16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "and16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_AND16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "and16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "and.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "and16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "and16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_AND16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "and16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_AND32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "and32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_AND32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "and32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "and32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_AND32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "and32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "and32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_AND32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "and32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "and.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_AND32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "and32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_AND32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "and32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "and32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_AND32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_AND32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_AND32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_AND32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_AND32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "and32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_AND32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "and32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_AND32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "and32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "and.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_AND16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "and16.w-imm-G-basic-dst16-Rn-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_AND16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "and16.w-imm-G-basic-dst16-An-direct-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_AND16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "and16.w-imm-G-basic-dst16-An-indirect-HI", "and.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "and16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "and16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "and16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "and.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "and16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "and16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_AND16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "and16.w-imm-G-16-16-dst16-16-16-absolute-HI", "and.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_AND16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "and16.b-imm-G-basic-dst16-Rn-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_AND16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "and16.b-imm-G-basic-dst16-An-direct-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_AND16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "and16.b-imm-G-basic-dst16-An-indirect-QI", "and.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_AND16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "and16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_AND16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "and16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_AND16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "and16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "and.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_AND16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "and16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_AND16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "and16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_AND16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "and16.b-imm-G-16-16-dst16-16-16-absolute-QI", "and.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "adjnz32.w-imm4-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "adjnz32.w-imm4-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "adjnz.w", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "adjnz32.w-imm4-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "adjnz.w", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "adjnz32.w-imm4-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "adjnz32.w-imm4-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
{
M32C_INSN_ADJNZ32_W_IMM4_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "adjnz32.w-imm4-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "adjnz32.b-imm4-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "adjnz32.b-imm4-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "adjnz.b", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "adjnz32.b-imm4-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "adjnz.b", 48,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "adjnz32.b-imm4-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "adjnz32.b-imm4-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
{
M32C_INSN_ADJNZ32_B_IMM4_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "adjnz32.b-imm4-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_8_DST16_16_8_AN_RELATIVE_HI, "adjnz16.w-imm4-16-8-dst16-16-8-An-relative-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_8_DST16_16_8_SB_RELATIVE_HI, "adjnz16.w-imm4-16-8-dst16-16-8-SB-relative-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_8_DST16_16_8_FB_RELATIVE_HI, "adjnz16.w-imm4-16-8-dst16-16-8-FB-relative-HI", "adjnz.w", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_16_DST16_16_16_AN_RELATIVE_HI, "adjnz16.w-imm4-16-16-dst16-16-16-An-relative-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_16_DST16_16_16_SB_RELATIVE_HI, "adjnz16.w-imm4-16-16-dst16-16-16-SB-relative-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_16_16_DST16_16_16_ABSOLUTE_HI, "adjnz16.w-imm4-16-16-dst16-16-16-absolute-HI", "adjnz.w", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_BASIC_DST16_RN_DIRECT_HI, "adjnz16.w-imm4-basic-dst16-Rn-direct-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_BASIC_DST16_AN_DIRECT_HI, "adjnz16.w-imm4-basic-dst16-An-direct-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
{
M32C_INSN_ADJNZ16_W_IMM4_BASIC_DST16_AN_INDIRECT_HI, "adjnz16.w-imm4-basic-dst16-An-indirect-HI", "adjnz.w", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_8_DST16_16_8_AN_RELATIVE_QI, "adjnz16.b-imm4-16-8-dst16-16-8-An-relative-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_8_DST16_16_8_SB_RELATIVE_QI, "adjnz16.b-imm4-16-8-dst16-16-8-SB-relative-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_8_DST16_16_8_FB_RELATIVE_QI, "adjnz16.b-imm4-16-8-dst16-16-8-FB-relative-QI", "adjnz.b", 32,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_16_DST16_16_16_AN_RELATIVE_QI, "adjnz16.b-imm4-16-16-dst16-16-16-An-relative-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_16_DST16_16_16_SB_RELATIVE_QI, "adjnz16.b-imm4-16-16-dst16-16-16-SB-relative-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_16_16_DST16_16_16_ABSOLUTE_QI, "adjnz16.b-imm4-16-16-dst16-16-16-absolute-QI", "adjnz.b", 40,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_BASIC_DST16_RN_DIRECT_QI, "adjnz16.b-imm4-basic-dst16-Rn-direct-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_BASIC_DST16_AN_DIRECT_QI, "adjnz16.b-imm4-basic-dst16-An-direct-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* adjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
{
M32C_INSN_ADJNZ16_B_IMM4_BASIC_DST16_AN_INDIRECT_QI, "adjnz16.b-imm4-basic-dst16-An-indirect-QI", "adjnz.b", 24,
- { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_ADDX32_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_ADDX32_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-SI", "addx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-SI", "addx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-SI", "addx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-SI", "addx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_ADDX32_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "addx32-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-SI", "addx", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-SI", "addx", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_ADDX32_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "addx32-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* addx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADDX32_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "addx32-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADDX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "addx32-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "addx32-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "addx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADDX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADDX32_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "addx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADDX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADDX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_ADDX32_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "addx32-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "addx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADDX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "addx32-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* addx${X} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_ADDX32_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "addx32-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "addx", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DADD32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DADD32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dadd.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dadd.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dadd.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DADD32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dadd.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadd.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DADD32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DADD32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DADD32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dadd.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dadd.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dadd.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dadd.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DADD32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dadd.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DADD32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_DADD32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "dadd32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_DADD32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "dadd32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "dadd32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "dadd.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "dadd.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_DADD32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadd32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "dadd.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadd32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_DADD32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadd32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "dadd.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_DADD32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "dadd32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_DADD32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "dadd32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "dadd32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "dadd.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DADD32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DADD32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "dadd.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DADD32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DADD32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_DADD32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadd32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "dadd.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADD32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadd32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_DADD32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadd32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "dadd.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dadc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "dadc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dadc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "dadc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "dadc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_DADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_DADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dadc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "dadc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "dadc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dadc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_DADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "dadc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_DADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_DADC32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "dadc32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_DADC32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "dadc32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "dadc32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "dadc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "dadc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_DADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "dadc32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "dadc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "dadc32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_DADC32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "dadc32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "dadc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_DADC32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "dadc32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_DADC32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "dadc32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "dadc32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "dadc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_DADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_DADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "dadc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_DADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_DADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_DADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "dadc32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "dadc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_DADC32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "dadc32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_DADC32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "dadc32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "dadc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-8-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-16-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADC32_W_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_HI_DST32_32_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-HI-dst32-32-24-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-8-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-16-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_ADC32_W_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_HI_DST32_40_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-HI-dst32-40-24-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "adc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-An-relative-Prefixed-HI", "adc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-SB-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-8-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-FB-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_16_ABSOLUTE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-16-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "adc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_ADC32_W_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_HI_DST32_48_24_ABSOLUTE_PREFIXED_HI, "adc32.w-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-HI-dst32-48-24-absolute-Prefixed-HI", "adc.w", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-Rn-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-direct-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-An-indirect-Prefixed-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-An-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-An-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-SB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-SB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-8-FB-relative-Prefixed-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-FB-relative-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_16_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-16-absolute-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_ADC32_W_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_HI_DST32_24_24_ABSOLUTE_PREFIXED_HI, "adc32.w-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-HI-dst32-24-24-absolute-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-8-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-16-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_AN_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-An-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_SB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-SB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADC32_B_24_8_PREFIXED_32_PREFIXED_SRC32_24_8_FB_RELATIVE_PREFIXED_QI_DST32_32_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-8-Prefixed-32-Prefixed-src32-24-8-FB-relative-Prefixed-QI-dst32-32-24-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-8-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-16-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_AN_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-An-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_SB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-SB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_FB_RELATIVE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-FB-relative-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
{
M32C_INSN_ADC32_B_24_16_PREFIXED_40_PREFIXED_SRC32_24_16_ABSOLUTE_PREFIXED_QI_DST32_40_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-16-Prefixed-40-Prefixed-src32-24-16-absolute-Prefixed-QI-dst32-40-24-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-An-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "adc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-An-relative-Prefixed-QI", "adc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-SB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-SB-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-8-FB-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-FB-relative-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_16_ABSOLUTE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-16-absolute-Prefixed-QI", "adc.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_AN_RELATIVE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-An-relative-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "adc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
{
M32C_INSN_ADC32_B_24_24_PREFIXED_48_PREFIXED_SRC32_24_24_ABSOLUTE_PREFIXED_QI_DST32_48_24_ABSOLUTE_PREFIXED_QI, "adc32.b-24-24-Prefixed-48-Prefixed-src32-24-24-absolute-Prefixed-QI-dst32-48-24-absolute-Prefixed-QI", "adc.b", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-Rn-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-direct-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-An-indirect-Prefixed-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-An-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-SB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-8-FB-relative-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_16_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-16-absolute-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_RN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-Rn-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_DIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-direct-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
{
M32C_INSN_ADC32_B_BASIC_PREFIXED_24_PREFIXED_SRC32_AN_INDIRECT_PREFIXED_QI_DST32_24_24_ABSOLUTE_PREFIXED_QI, "adc32.b-basic-Prefixed-24-Prefixed-src32-An-indirect-Prefixed-QI-dst32-24-24-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "adc16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "adc16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADC16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "adc16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "adc16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "adc16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADC16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "adc16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],$Dst16RnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],$Dst16AnHI */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "adc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "adc.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "adc16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "adc16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_ADC16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "adc16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "adc16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "adc16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADC16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "adc16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "adc16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "adc16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADC16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "adc16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],$Dst16RnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],$Dst16AnQI */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "adc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "adc16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "adc16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.b${X} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_ADC16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "adc16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
{
M32C_INSN_ADC32_W_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_HI, "adc32.w-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
{
M32C_INSN_ADC32_W_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_HI, "adc32.w-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_HI, "adc32.w-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_W_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
{
M32C_INSN_ADC32_W_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_HI, "adc32.w-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-HI", "adc.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_W_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_HI, "adc32.w-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
{
M32C_INSN_ADC32_W_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_HI, "adc32.w-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-HI", "adc.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
{
M32C_INSN_ADC32_B_IMM_G_BASIC_PREFIXED_DST32_RN_DIRECT_PREFIXED_QI, "adc32.b-imm-G-basic-Prefixed-dst32-Rn-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
{
M32C_INSN_ADC32_B_IMM_G_BASIC_PREFIXED_DST32_AN_DIRECT_PREFIXED_QI, "adc32.b-imm-G-basic-Prefixed-dst32-An-direct-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_IMM_G_BASIC_PREFIXED_DST32_AN_INDIRECT_PREFIXED_QI, "adc32.b-imm-G-basic-Prefixed-dst32-An-indirect-Prefixed-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_AN_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-8-Prefixed-dst32-24-8-An-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
{
M32C_INSN_ADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_SB_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-8-Prefixed-dst32-24-8-SB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
{
M32C_INSN_ADC32_B_IMM_G_24_8_PREFIXED_DST32_24_8_FB_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-8-Prefixed-dst32-24-8-FB-relative-Prefixed-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_AN_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-16-Prefixed-dst32-24-16-An-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
{
M32C_INSN_ADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_SB_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-16-Prefixed-dst32-24-16-SB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
{
M32C_INSN_ADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_FB_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-16-Prefixed-dst32-24-16-FB-relative-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
{
M32C_INSN_ADC32_B_IMM_G_24_16_PREFIXED_DST32_24_16_ABSOLUTE_PREFIXED_QI, "adc32.b-imm-G-24-16-Prefixed-dst32-24-16-absolute-Prefixed-QI", "adc.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
{
M32C_INSN_ADC32_B_IMM_G_24_24_PREFIXED_DST32_24_24_AN_RELATIVE_PREFIXED_QI, "adc32.b-imm-G-24-24-Prefixed-dst32-24-24-An-relative-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
{
M32C_INSN_ADC32_B_IMM_G_24_24_PREFIXED_DST32_24_24_ABSOLUTE_PREFIXED_QI, "adc32.b-imm-G-24-24-Prefixed-dst32-24-24-absolute-Prefixed-QI", "adc.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_ADC16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "adc16.w-imm-G-basic-dst16-Rn-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_ADC16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "adc16.w-imm-G-basic-dst16-An-direct-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_ADC16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "adc16.w-imm-G-basic-dst16-An-indirect-HI", "adc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "adc16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "adc16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "adc16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "adc.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "adc16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "adc16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.w${X} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_ADC16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "adc16.w-imm-G-16-16-dst16-16-16-absolute-HI", "adc.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_ADC16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "adc16.b-imm-G-basic-dst16-Rn-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_ADC16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "adc16.b-imm-G-basic-dst16-An-direct-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_ADC16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "adc16.b-imm-G-basic-dst16-An-indirect-QI", "adc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADC16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "adc16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADC16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "adc16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADC16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "adc16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "adc.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADC16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "adc16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADC16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "adc16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adc.b${X} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_ADC16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "adc16.b-imm-G-16-16-dst16-16-16-absolute-QI", "adc.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
{
M32C_INSN_ADD32_W_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_HI, "add32.w-imm-S-2-S-8-dst32-2-S-8-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
{
M32C_INSN_ADD32_W_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_HI, "add32.w-imm-S-2-S-8-dst32-2-S-8-FB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.w${S} #${Imm-24-HI},${Dsp-8-u16} */
{
M32C_INSN_ADD32_W_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_HI, "add32.w-imm-S-2-S-16-dst32-2-S-16-absolute-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.w${S} #${Imm-8-HI},r0 */
{
M32C_INSN_ADD32_W_IMM_S_2_S_BASIC_DST32_2_S_R0_DIRECT_HI, "add32.w-imm-S-2-S-basic-dst32-2-S-R0-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
{
M32C_INSN_ADD32_B_IMM_S_2_S_8_DST32_2_S_8_SB_RELATIVE_QI, "add32.b-imm-S-2-S-8-dst32-2-S-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
{
M32C_INSN_ADD32_B_IMM_S_2_S_8_DST32_2_S_8_FB_RELATIVE_QI, "add32.b-imm-S-2-S-8-dst32-2-S-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-24-QI},${Dsp-8-u16} */
{
M32C_INSN_ADD32_B_IMM_S_2_S_16_DST32_2_S_16_ABSOLUTE_QI, "add32.b-imm-S-2-S-16-dst32-2-S-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_ADD32_B_IMM_S_2_S_BASIC_DST32_2_S_R0L_DIRECT_QI, "add32.b-imm-S-2-S-basic-dst32-2-S-R0l-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l${S} #${Imm1-S},a0 */
{
M32C_INSN_ADD32_L_S_IMM1_S_AN_DST32_1_S_A0_DIRECT_HI, "add32.l-s-imm1-S-an-dst32-1-S-A0-direct-HI", "add.l", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l${S} #${Imm1-S},a1 */
{
M32C_INSN_ADD32_L_S_IMM1_S_AN_DST32_1_S_A1_DIRECT_HI, "add32.l-s-imm1-S-an-dst32-1-S-A1-direct-HI", "add.l", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-8-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-16-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_L_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-SI-dst32-24-24-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-SB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-8-FB-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-16-absolute-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_ADD32_L_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-SI-dst32-32-24-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-An-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-An-relative-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-SB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-SB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-8-FB-relative-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-FB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-16-absolute-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_ADD32_L_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-SI-dst32-40-24-absolute-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-Rn-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-An-indirect-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-An-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-SB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-8-FB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-16-absolute-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_ADD32_L_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-SI-dst32-16-24-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${S} ${SrcDst16-r0l-r0h-S-normal} */
{
M32C_INSN_ADD16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "add16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "add.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
M32C_INSN_ADD16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "add16.b.S-src2-src16-2-S-8-SB-relative-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
M32C_INSN_ADD16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "add16.b.S-src2-src16-2-S-8-FB-relative-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
M32C_INSN_ADD16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "add16.b.S-src2-src16-2-S-16-absolute-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-8-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-16-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-HI-dst32-24-24-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-8-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-16-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_ADD32_W_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-HI-dst32-32-24-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "add.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-An-relative-Unprefixed-HI", "add.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-SB-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-8-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-FB-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-16-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "add.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_ADD32_W_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-HI-dst32-40-24-absolute-Unprefixed-HI", "add.w", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-An-indirect-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-An-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-SB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-8-FB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-16-absolute-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_ADD32_W_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-HI-dst32-16-24-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-8-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-16-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-SB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
{
M32C_INSN_ADD32_B_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-8-Unprefixed-24-Unprefixed-src32-16-8-FB-relative-Unprefixed-QI-dst32-24-24-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-8-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-16-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-An-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-SB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-FB-relative-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_ADD32_B_16_16_UNPREFIXED_32_UNPREFIXED_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-16-Unprefixed-32-Unprefixed-src32-16-16-absolute-Unprefixed-QI-dst32-32-24-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-An-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "add.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-An-relative-Unprefixed-QI", "add.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-SB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-SB-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-8-FB-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-FB-relative-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-16-absolute-Unprefixed-QI", "add.b", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-An-relative-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "add.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
{
M32C_INSN_ADD32_B_16_24_UNPREFIXED_40_UNPREFIXED_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-16-24-Unprefixed-40-Unprefixed-src32-16-24-absolute-Unprefixed-QI-dst32-40-24-absolute-Unprefixed-QI", "add.b", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-Rn-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-An-indirect-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-An-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-SB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-8-FB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-16-absolute-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_RN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-Rn-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_DIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-direct-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
{
M32C_INSN_ADD32_B_BASIC_UNPREFIXED_16_UNPREFIXED_SRC32_AN_INDIRECT_UNPREFIXED_QI_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-basic-Unprefixed-16-Unprefixed-src32-An-indirect-Unprefixed-QI-dst32-16-24-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-Rn-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-Rn-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_RN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-Rn-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_DIRECT_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-direct-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-An-indirect-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-An-indirect-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-An-indirect-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_AN_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_SB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-8-FB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-8-FB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_8_FB_RELATIVE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-8-FB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_AN_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "add16.w-16-8-24-src16-16-8-An-relative-HI-dst16-24-16-absolute-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_SB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "add16.w-16-8-24-src16-16-8-SB-relative-HI-dst16-24-16-absolute-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADD16_W_16_8_24_SRC16_16_8_FB_RELATIVE_HI_DST16_24_16_ABSOLUTE_HI, "add16.w-16-8-24-src16-16-8-FB-relative-HI-dst16-24-16-absolute-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_RN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-Rn-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_RN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-Rn-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},$Dst16RnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_RN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-Rn-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},$Dst16AnHI */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_DIRECT_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-An-indirect-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-An-indirect-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_AN_INDIRECT_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-An-indirect-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-An-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-An-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_AN_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-An-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-SB-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-SB-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_SB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-SB-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-8-FB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_8_FB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-8-FB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_8_FB_RELATIVE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-8-FB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_AN_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "add16.w-16-16-32-src16-16-16-An-relative-HI-dst16-32-16-absolute-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_SB_RELATIVE_HI_DST16_32_16_ABSOLUTE_HI, "add16.w-16-16-32-src16-16-16-SB-relative-HI-dst16-32-16-absolute-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADD16_W_16_16_32_SRC16_16_16_ABSOLUTE_HI_DST16_32_16_ABSOLUTE_HI, "add16.w-16-16-32-src16-16-16-absolute-HI-dst16-32-16-absolute-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,$Dst16RnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_RN_DIRECT_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-Rn-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,$Dst16RnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_RN_DIRECT_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-Rn-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],$Dst16RnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_RN_DIRECT_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-Rn-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,$Dst16AnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_DIRECT_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-An-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,$Dst16AnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_DIRECT_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-An-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],$Dst16AnHI */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_DIRECT_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-An-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_AN_INDIRECT_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-An-indirect-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_AN_INDIRECT_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-An-indirect-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_AN_INDIRECT_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-An-indirect-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-An-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-8-An-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_AN_RELATIVE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-8-An-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-16-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_AN_RELATIVE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-16-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-SB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-8-SB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_SB_RELATIVE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-8-SB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-16-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_SB_RELATIVE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-16-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-8-FB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-8-FB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_8_FB_RELATIVE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-8-FB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16RnHI,${Dsp-16-u16} */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_RN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "add16.w-basic-16-src16-Rn-direct-HI-dst16-16-16-absolute-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} $Src16AnHI,${Dsp-16-u16} */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_DIRECT_HI_DST16_16_16_ABSOLUTE_HI, "add16.w-basic-16-src16-An-direct-HI-dst16-16-16-absolute-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.w${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_ADD16_W_BASIC_16_SRC16_AN_INDIRECT_HI_DST16_16_16_ABSOLUTE_HI, "add16.w-basic-16-src16-An-indirect-HI-dst16-16-16-absolute-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-Rn-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-Rn-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_RN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-Rn-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_DIRECT_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-An-indirect-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-An-indirect-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-An-indirect-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_AN_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_SB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-8-FB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-8-FB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_8_FB_RELATIVE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-8-FB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_AN_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "add16.b-16-8-24-src16-16-8-An-relative-QI-dst16-24-16-absolute-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_SB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "add16.b-16-8-24-src16-16-8-SB-relative-QI-dst16-24-16-absolute-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
{
M32C_INSN_ADD16_B_16_8_24_SRC16_16_8_FB_RELATIVE_QI_DST16_24_16_ABSOLUTE_QI, "add16.b-16-8-24-src16-16-8-FB-relative-QI-dst16-24-16-absolute-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_RN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-Rn-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_RN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-Rn-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},$Dst16RnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_RN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-Rn-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},$Dst16AnQI */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_DIRECT_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-direct-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-An-indirect-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-An-indirect-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_AN_INDIRECT_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-An-indirect-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-An-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-An-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_AN_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-An-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-SB-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-SB-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_SB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-SB-relative-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-8-FB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_8_FB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-8-FB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_8_FB_RELATIVE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-8-FB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_AN_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "add16.b-16-16-32-src16-16-16-An-relative-QI-dst16-32-16-absolute-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_SB_RELATIVE_QI_DST16_32_16_ABSOLUTE_QI, "add16.b-16-16-32-src16-16-16-SB-relative-QI-dst16-32-16-absolute-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
{
M32C_INSN_ADD16_B_16_16_32_SRC16_16_16_ABSOLUTE_QI_DST16_32_16_ABSOLUTE_QI, "add16.b-16-16-32-src16-16-16-absolute-QI-dst16-32-16-absolute-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,$Dst16RnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_RN_DIRECT_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-Rn-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,$Dst16RnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_RN_DIRECT_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-Rn-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],$Dst16RnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_RN_DIRECT_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-Rn-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,$Dst16AnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_DIRECT_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-An-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,$Dst16AnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_DIRECT_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-An-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],$Dst16AnQI */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_DIRECT_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-An-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_AN_INDIRECT_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-An-indirect-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_AN_INDIRECT_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-An-indirect-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_AN_INDIRECT_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-An-indirect-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-An-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-8-An-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_AN_RELATIVE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-8-An-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-16-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_AN_RELATIVE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-16-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_SB_RELATIVE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-16-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_SB_RELATIVE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-16-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_8_FB_RELATIVE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16RnQI,${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_RN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "add16.b-basic-16-src16-Rn-direct-QI-dst16-16-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} $Src16AnQI,${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_DIRECT_QI_DST16_16_16_ABSOLUTE_QI, "add16.b-basic-16-src16-An-direct-QI-dst16-16-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${G} [$Src16An],${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_BASIC_16_SRC16_AN_INDIRECT_QI_DST16_16_16_ABSOLUTE_QI, "add16.b-basic-16-src16-An-indirect-QI-dst16-16-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_2ADDR, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},r0l */
{
M32C_INSN_ADD16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI, "add16.b.S-imm8-dst3-dst16-3-S-R0l-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},r0h */
{
M32C_INSN_ADD16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, "add16.b.S-imm8-dst3-dst16-3-S-R0h-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, "add16.b.S-imm8-dst3-dst16-3-S-16-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, "add16.b.S-imm8-dst3-dst16-3-S-16-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b${S} #${Imm-8-QI},${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI, "add16.b.S-imm8-dst3-dst16-3-S-16-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-SI", "add.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_ADD32_L_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "add.l", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_ADD32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
{
M32C_INSN_ADD32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-imm4-Q-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},$Dst16RnHI */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, "add16.w-imm4-Q-16-dst16-Rn-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, "add16.w-imm4-Q-16-dst16-An-direct-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI, "add16.w-imm4-Q-16-dst16-An-indirect-HI", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, "add16.w-imm4-Q-16-dst16-16-8-An-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, "add16.w-imm4-Q-16-dst16-16-16-An-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, "add16.w-imm4-Q-16-dst16-16-8-SB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI, "add16.w-imm4-Q-16-dst16-16-16-SB-relative-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, "add16.w-imm4-Q-16-dst16-16-8-FB-relative-HI", "add.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
M32C_INSN_ADD16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, "add16.w-imm4-Q-16-dst16-16-16-absolute-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, "add16.b-imm4-Q-16-dst16-Rn-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_AN_DIRECT_QI, "add16.b-imm4-Q-16-dst16-An-direct-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, "add16.b-imm4-Q-16-dst16-An-indirect-QI", "add.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, "add16.b-imm4-Q-16-dst16-16-8-An-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, "add16.b-imm4-Q-16-dst16-16-16-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, "add16.b-imm4-Q-16-dst16-16-8-SB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, "add16.b-imm4-Q-16-dst16-16-16-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, "add16.b-imm4-Q-16-dst16-16-8-FB-relative-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, "add16.b-imm4-Q-16-dst16-16-16-absolute-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
M32C_INSN_ADD32_W_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "add32.w-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
{
M32C_INSN_ADD32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "add32.w-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "add32.w-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_W_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_ADD32_W_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "add32.w-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "add32.w-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-40-HI},${Dsp-16-u24} */
{
M32C_INSN_ADD32_W_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "add32.w-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "add.w", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
{
M32C_INSN_ADD32_B_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "add32.b-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
{
M32C_INSN_ADD32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "add32.b-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "add32.b-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_B_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_ADD32_B_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "add32.b-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "add32.b-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-40-QI},${Dsp-16-u24} */
{
M32C_INSN_ADD32_B_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "add32.b-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "add.b", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},$Dst16RnHI */
{
M32C_INSN_ADD16_W_IMM_G_BASIC_DST16_RN_DIRECT_HI, "add16.w-imm-G-basic-dst16-Rn-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},$Dst16AnHI */
{
M32C_INSN_ADD16_W_IMM_G_BASIC_DST16_AN_DIRECT_HI, "add16.w-imm-G-basic-dst16-An-direct-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-16-HI},[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM_G_BASIC_DST16_AN_INDIRECT_HI, "add16.w-imm-G-basic-dst16-An-indirect-HI", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM_G_16_8_DST16_16_8_AN_RELATIVE_HI, "add16.w-imm-G-16-8-dst16-16-8-An-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_W_IMM_G_16_8_DST16_16_8_SB_RELATIVE_HI, "add16.w-imm-G-16-8-dst16-16-8-SB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_W_IMM_G_16_8_DST16_16_8_FB_RELATIVE_HI, "add16.w-imm-G-16-8-dst16-16-8-FB-relative-HI", "add.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_W_IMM_G_16_16_DST16_16_16_AN_RELATIVE_HI, "add16.w-imm-G-16-16-dst16-16-16-An-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_W_IMM_G_16_16_DST16_16_16_SB_RELATIVE_HI, "add16.w-imm-G-16-16-dst16-16-16-SB-relative-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
{
M32C_INSN_ADD16_W_IMM_G_16_16_DST16_16_16_ABSOLUTE_HI, "add16.w-imm-G-16-16-dst16-16-16-absolute-HI", "add.w", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},$Dst16RnQI */
{
M32C_INSN_ADD16_B_IMM_G_BASIC_DST16_RN_DIRECT_QI, "add16.b-imm-G-basic-dst16-Rn-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},$Dst16AnQI */
{
M32C_INSN_ADD16_B_IMM_G_BASIC_DST16_AN_DIRECT_QI, "add16.b-imm-G-basic-dst16-An-direct-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-16-QI},[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM_G_BASIC_DST16_AN_INDIRECT_QI, "add16.b-imm-G-basic-dst16-An-indirect-QI", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM_G_16_8_DST16_16_8_AN_RELATIVE_QI, "add16.b-imm-G-16-8-dst16-16-8-An-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD16_B_IMM_G_16_8_DST16_16_8_SB_RELATIVE_QI, "add16.b-imm-G-16-8-dst16-16-8-SB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD16_B_IMM_G_16_8_DST16_16_8_FB_RELATIVE_QI, "add16.b-imm-G-16-8-dst16-16-8-FB-relative-QI", "add.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADD16_B_IMM_G_16_16_DST16_16_16_AN_RELATIVE_QI, "add16.b-imm-G-16-16-dst16-16-16-An-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD16_B_IMM_G_16_16_DST16_16_16_SB_RELATIVE_QI, "add16.b-imm-G-16-16-dst16-16-16-SB-relative-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_ADD16_B_IMM_G_16_16_DST16_16_16_ABSOLUTE_QI, "add16.b-imm-G-16-16-dst16-16-16-absolute-QI", "add.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
{
M32C_INSN_ADD32_L_IMM_G_BASIC_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI, "add32.l-imm-G-basic-Unprefixed-dst32-Rn-direct-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
{
M32C_INSN_ADD32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, "add32.l-imm-G-basic-Unprefixed-dst32-An-direct-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM_G_BASIC_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, "add32.l-imm-G-basic-Unprefixed-dst32-An-indirect-Unprefixed-SI", "add.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-8-Unprefixed-dst32-16-8-An-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
{
M32C_INSN_ADD32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-8-Unprefixed-dst32-16-8-SB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
{
M32C_INSN_ADD32_L_IMM_G_16_8_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-8-Unprefixed-dst32-16-8-FB-relative-Unprefixed-SI", "add.l", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
{
M32C_INSN_ADD32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
{
M32C_INSN_ADD32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-32-SI},${Dsp-16-u16} */
{
M32C_INSN_ADD32_L_IMM_G_16_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, "add32.l-imm-G-16-16-Unprefixed-dst32-16-16-absolute-Unprefixed-SI", "add.l", 64,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADD32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, "add32.l-imm-G-16-24-Unprefixed-dst32-16-24-An-relative-Unprefixed-SI", "add.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.l${G} #${Imm-40-SI},${Dsp-16-u24} */
{
M32C_INSN_ADD32_L_IMM_G_16_24_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, "add32.l-imm-G-16-24-Unprefixed-dst32-16-24-absolute-Unprefixed-SI", "add.l", 72,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w $Dst32RnUnprefixedHI */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w $Dst32AnUnprefixedHI */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w [$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "adcf.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16} */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u24} */
{
M32C_INSN_ADCF32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "adcf32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "adcf.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b $Dst32RnUnprefixedQI */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b $Dst32AnUnprefixedQI */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b [$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "adcf.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16} */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u24} */
{
M32C_INSN_ADCF32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "adcf32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "adcf.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w $Dst16RnHI */
{
M32C_INSN_ADCF16_W_16_DST16_RN_DIRECT_HI, "adcf16.w-16-dst16-Rn-direct-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w $Dst16AnHI */
{
M32C_INSN_ADCF16_W_16_DST16_AN_DIRECT_HI, "adcf16.w-16-dst16-An-direct-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w [$Dst16An] */
{
M32C_INSN_ADCF16_W_16_DST16_AN_INDIRECT_HI, "adcf16.w-16-dst16-An-indirect-HI", "adcf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADCF16_W_16_DST16_16_8_AN_RELATIVE_HI, "adcf16.w-16-dst16-16-8-An-relative-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADCF16_W_16_DST16_16_16_AN_RELATIVE_HI, "adcf16.w-16-dst16-16-16-An-relative-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ADCF16_W_16_DST16_16_8_SB_RELATIVE_HI, "adcf16.w-16-dst16-16-8-SB-relative-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ADCF16_W_16_DST16_16_16_SB_RELATIVE_HI, "adcf16.w-16-dst16-16-16-SB-relative-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ADCF16_W_16_DST16_16_8_FB_RELATIVE_HI, "adcf16.w-16-dst16-16-8-FB-relative-HI", "adcf.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.w ${Dsp-16-u16} */
{
M32C_INSN_ADCF16_W_16_DST16_16_16_ABSOLUTE_HI, "adcf16.w-16-dst16-16-16-absolute-HI", "adcf.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b $Dst16RnQI */
{
M32C_INSN_ADCF16_B_16_DST16_RN_DIRECT_QI, "adcf16.b-16-dst16-Rn-direct-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b $Dst16AnQI */
{
M32C_INSN_ADCF16_B_16_DST16_AN_DIRECT_QI, "adcf16.b-16-dst16-An-direct-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b [$Dst16An] */
{
M32C_INSN_ADCF16_B_16_DST16_AN_INDIRECT_QI, "adcf16.b-16-dst16-An-indirect-QI", "adcf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ADCF16_B_16_DST16_16_8_AN_RELATIVE_QI, "adcf16.b-16-dst16-16-8-An-relative-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ADCF16_B_16_DST16_16_16_AN_RELATIVE_QI, "adcf16.b-16-dst16-16-16-An-relative-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ADCF16_B_16_DST16_16_8_SB_RELATIVE_QI, "adcf16.b-16-dst16-16-8-SB-relative-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ADCF16_B_16_DST16_16_16_SB_RELATIVE_QI, "adcf16.b-16-dst16-16-16-SB-relative-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ADCF16_B_16_DST16_16_8_FB_RELATIVE_QI, "adcf16.b-16-dst16-16-8-FB-relative-QI", "adcf.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* adcf.b ${Dsp-16-u16} */
{
M32C_INSN_ADCF16_B_16_DST16_16_16_ABSOLUTE_QI, "adcf16.b-16-dst16-16-16-absolute-QI", "adcf.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w $Dst32RnUnprefixedHI */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-Rn-direct-Unprefixed-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w $Dst32AnUnprefixedHI */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-An-direct-Unprefixed-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w [$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-An-indirect-Unprefixed-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-HI", "abs.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-s16}[fb] */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16} */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-16-absolute-Unprefixed-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u24} */
{
M32C_INSN_ABS32_W_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, "abs32.w-16-Unprefixed-dst32-16-24-absolute-Unprefixed-HI", "abs.w", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b $Dst32RnUnprefixedQI */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-Rn-direct-Unprefixed-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b $Dst32AnUnprefixedQI */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-An-direct-Unprefixed-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b [$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-An-indirect-Unprefixed-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-8-An-relative-Unprefixed-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-16-An-relative-Unprefixed-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-24-An-relative-Unprefixed-QI", "abs.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-8-SB-relative-Unprefixed-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-16-SB-relative-Unprefixed-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-8-FB-relative-Unprefixed-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-s16}[fb] */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-16-FB-relative-Unprefixed-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16} */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-16-absolute-Unprefixed-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u24} */
{
M32C_INSN_ABS32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "abs32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "abs.b", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w $Dst16RnHI */
{
M32C_INSN_ABS16_W_16_DST16_RN_DIRECT_HI, "abs16.w-16-dst16-Rn-direct-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w $Dst16AnHI */
{
M32C_INSN_ABS16_W_16_DST16_AN_DIRECT_HI, "abs16.w-16-dst16-An-direct-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w [$Dst16An] */
{
M32C_INSN_ABS16_W_16_DST16_AN_INDIRECT_HI, "abs16.w-16-dst16-An-indirect-HI", "abs.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ABS16_W_16_DST16_16_8_AN_RELATIVE_HI, "abs16.w-16-dst16-16-8-An-relative-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ABS16_W_16_DST16_16_16_AN_RELATIVE_HI, "abs16.w-16-dst16-16-16-An-relative-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u8}[sb] */
{
M32C_INSN_ABS16_W_16_DST16_16_8_SB_RELATIVE_HI, "abs16.w-16-dst16-16-8-SB-relative-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16}[sb] */
{
M32C_INSN_ABS16_W_16_DST16_16_16_SB_RELATIVE_HI, "abs16.w-16-dst16-16-16-SB-relative-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-s8}[fb] */
{
M32C_INSN_ABS16_W_16_DST16_16_8_FB_RELATIVE_HI, "abs16.w-16-dst16-16-8-FB-relative-HI", "abs.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.w ${Dsp-16-u16} */
{
M32C_INSN_ABS16_W_16_DST16_16_16_ABSOLUTE_HI, "abs16.w-16-dst16-16-16-absolute-HI", "abs.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b $Dst16RnQI */
{
M32C_INSN_ABS16_B_16_DST16_RN_DIRECT_QI, "abs16.b-16-dst16-Rn-direct-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b $Dst16AnQI */
{
M32C_INSN_ABS16_B_16_DST16_AN_DIRECT_QI, "abs16.b-16-dst16-An-direct-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b [$Dst16An] */
{
M32C_INSN_ABS16_B_16_DST16_AN_INDIRECT_QI, "abs16.b-16-dst16-An-indirect-QI", "abs.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u8}[$Dst16An] */
{
M32C_INSN_ABS16_B_16_DST16_16_8_AN_RELATIVE_QI, "abs16.b-16-dst16-16-8-An-relative-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16}[$Dst16An] */
{
M32C_INSN_ABS16_B_16_DST16_16_16_AN_RELATIVE_QI, "abs16.b-16-dst16-16-16-An-relative-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u8}[sb] */
{
M32C_INSN_ABS16_B_16_DST16_16_8_SB_RELATIVE_QI, "abs16.b-16-dst16-16-8-SB-relative-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16}[sb] */
{
M32C_INSN_ABS16_B_16_DST16_16_16_SB_RELATIVE_QI, "abs16.b-16-dst16-16-16-SB-relative-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-s8}[fb] */
{
M32C_INSN_ABS16_B_16_DST16_16_8_FB_RELATIVE_QI, "abs16.b-16-dst16-16-8-FB-relative-QI", "abs.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* abs.b ${Dsp-16-u16} */
{
M32C_INSN_ABS16_B_16_DST16_16_16_ABSOLUTE_QI, "abs16.b-16-dst16-16-16-absolute-QI", "abs.b", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
},
/* add.w$Q #${Imm-12-s4},sp */
{
M32C_INSN_ADD16_WQ_SP, "add16-wQ-sp", "add.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.b$G #${Imm-16-QI},sp */
{
M32C_INSN_ADD16_B_G_SP, "add16.b-G-sp", "add.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.w$G #${Imm-16-HI},sp */
{
M32C_INSN_ADD16_W_G_SP, "add16.w-G-sp", "add.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l$Q #${Imm3-S},sp */
{
M32C_INSN_ADD32_L_IMM3_Q, "add32.l-imm3-Q", "add.l", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l$S #${Imm-16-QI},sp */
{
M32C_INSN_ADD32_L_IMM8_S, "add32.l-imm8-S", "add.l", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* add.l$G #${Imm-16-HI},sp */
{
M32C_INSN_ADD32_L_IMM16_G, "add32.l-imm16-G", "add.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dadc.b #${Imm-16-QI} */
+/* dadc.b #${Imm-16-QI},r0l */
{
M32C_INSN_DADC16_B_IMM8, "dadc16.b-imm8", "dadc.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dadc.w #${Imm-16-HI} */
+/* dadc.w #${Imm-16-HI},r0 */
{
M32C_INSN_DADC16_W_IMM16, "dadc16.w-imm16", "dadc.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dadc.b r0h,r0l */
{
M32C_INSN_DADC16_B_R0H_R0L, "dadc16.b-r0h-r0l", "dadc.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dadc.w r1,r0 */
{
M32C_INSN_DADC16_W_R1_R0, "dadc16.w-r1-r0", "dadc.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dadd.b #${Imm-16-QI} */
+/* dadd.b #${Imm-16-QI},r0l */
{
M32C_INSN_DADD16_B_IMM8, "dadd16.b-imm8", "dadd.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dadd.w #${Imm-16-HI} */
+/* dadd.w #${Imm-16-HI},r0 */
{
M32C_INSN_DADD16_W_IMM16, "dadd16.w-imm16", "dadd.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dadd.b r0h,r0l */
{
M32C_INSN_DADD16_B_R0H_R0L, "dadd16.b-r0h-r0l", "dadd.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dadd.w r1,r0 */
{
M32C_INSN_DADD16_W_R1_R0, "dadd16.w-r1-r0", "dadd.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm$cond16c c */
{
M32C_INSN_BM16_C, "bm16-c", "bm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* bm$cond32 c */
{
M32C_INSN_BM32_C, "bm32-c", "bm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* brk */
{
M32C_INSN_BRK16, "brk16", "brk", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* brk */
{
M32C_INSN_BRK32, "brk32", "brk", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* brk2 */
{
M32C_INSN_BRK232, "brk232", "brk2", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
+/* btst:s ${Bit3-S},${Dsp-8-u16} */
+ {
+ M32C_INSN_BTST_S, "btst.s", "btst:s", 24,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
+ },
/* dec.w ${Dst16An-S} */
{
M32C_INSN_DEC16_W, "dec16.w", "dec.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b #${Imm-16-QI} */
{
M32C_INSN_DIV16_B_IMM_16_QI, "div16.b-Imm-16-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w #${Imm-16-HI} */
{
M32C_INSN_DIV16_W_IMM_16_HI, "div16.w-Imm-16-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.b #${Imm-16-QI} */
{
M32C_INSN_DIV32_B_IMM_16_QI, "div32.b-Imm-16-QI", "div.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* div.w #${Imm-16-HI} */
{
M32C_INSN_DIV32_W_IMM_16_HI, "div32.w-Imm-16-HI", "div.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b #${Imm-16-QI} */
{
M32C_INSN_DIVU16_B_IMM_16_QI, "divu16.b-Imm-16-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w #${Imm-16-HI} */
{
M32C_INSN_DIVU16_W_IMM_16_HI, "divu16.w-Imm-16-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.b #${Imm-16-QI} */
{
M32C_INSN_DIVU32_B_IMM_16_QI, "divu32.b-Imm-16-QI", "divu.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divu.w #${Imm-16-HI} */
{
M32C_INSN_DIVU32_W_IMM_16_HI, "divu32.w-Imm-16-HI", "divu.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b #${Imm-16-QI} */
{
M32C_INSN_DIVX16_B_IMM_16_QI, "divx16.b-Imm-16-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w #${Imm-16-HI} */
{
M32C_INSN_DIVX16_W_IMM_16_HI, "divx16.w-Imm-16-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.b #${Imm-16-QI} */
{
M32C_INSN_DIVX32_B_IMM_16_QI, "divx32.b-Imm-16-QI", "divx.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* divx.w #${Imm-16-HI} */
{
M32C_INSN_DIVX32_W_IMM_16_HI, "divx32.w-Imm-16-HI", "divx.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dsbb.b #${Imm-16-QI} */
+/* dsbb.b #${Imm-16-QI},r0l */
{
M32C_INSN_DSBB16_B_IMM8, "dsbb16.b-imm8", "dsbb.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dsbb.w #${Imm-16-HI} */
+/* dsbb.w #${Imm-16-HI},r0 */
{
M32C_INSN_DSBB16_W_IMM16, "dsbb16.w-imm16", "dsbb.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dsbb.b r0h,r0l */
{
M32C_INSN_DSBB16_B_R0H_R0L, "dsbb16.b-r0h-r0l", "dsbb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dsbb.w r1,r0 */
{
M32C_INSN_DSBB16_W_R1_R0, "dsbb16.w-r1-r0", "dsbb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dsub.b #${Imm-16-QI} */
+/* dsub.b #${Imm-16-QI},r0l */
{
M32C_INSN_DSUB16_B_IMM8, "dsub16.b-imm8", "dsub.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* dsub.w #${Imm-16-HI} */
+/* dsub.w #${Imm-16-HI},r0 */
{
M32C_INSN_DSUB16_W_IMM16, "dsub16.w-imm16", "dsub.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dsub.b r0h,r0l */
{
M32C_INSN_DSUB16_B_R0H_R0L, "dsub16.b-r0h-r0l", "dsub.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dsub.w r1,r0 */
{
M32C_INSN_DSUB16_W_R1_R0, "dsub16.w-r1-r0", "dsub.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* enter #${Dsp-16-u8} */
{
M32C_INSN_ENTER16, "enter16", "enter", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exitd */
{
M32C_INSN_EXITD16, "exitd16", "exitd", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* enter #${Dsp-8-u8} */
{
M32C_INSN_ENTER32, "enter32", "enter", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exitd */
{
M32C_INSN_EXITD32, "exitd32", "exitd", 8,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* fclr ${flags16} */
{
M32C_INSN_FCLR16, "fclr16", "fclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* fset ${flags16} */
{
M32C_INSN_FSET16, "fset16", "fset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* fclr ${flags32} */
{
M32C_INSN_FCLR, "fclr", "fclr", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* fset ${flags32} */
{
M32C_INSN_FSET, "fset", "fset", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* inc.w ${Dst16An-S} */
{
M32C_INSN_INC16_W, "inc16.w", "inc.w", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* freit */
{
M32C_INSN_FREIT32, "freit32", "freit", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* int #${Dsp-10-u6} */
{
M32C_INSN_INT16, "int16", "int", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* into */
{
M32C_INSN_INTO16, "into16", "into", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* int #${Dsp-8-u6} */
{
M32C_INSN_INT32, "int32", "int", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* into */
{
M32C_INSN_INTO32, "into32", "into", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* j$cond16j5 ${Lab-8-8} */
{
M32C_INSN_JCND16_5, "jcnd16-5", "j", 16,
- { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* j$cond16j ${Lab-16-8} */
{
M32C_INSN_JCND16, "jcnd16", "j", 24,
- { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* j$cond32j ${Lab-8-8} */
{
M32C_INSN_JCND32, "jcnd32", "j", 16,
- { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.s ${Lab-5-3} */
{
M32C_INSN_JMP16_S, "jmp16.s", "jmp.s", 8,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.b ${Lab-8-8} */
{
M32C_INSN_JMP16_B, "jmp16.b", "jmp.b", 16,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.w ${Lab-8-16} */
{
M32C_INSN_JMP16_W, "jmp16.w", "jmp.w", 24,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.a ${Lab-8-24} */
{
M32C_INSN_JMP16_A, "jmp16.a", "jmp.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmps #${Imm-8-QI} */
{
M32C_INSN_JMPS16, "jmps16", "jmps", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* jmp.s ${Lab32-jmp-s} */
{
M32C_INSN_JMP32_S, "jmp32.s", "jmp.s", 8,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.b ${Lab-8-8} */
{
M32C_INSN_JMP32_B, "jmp32.b", "jmp.b", 16,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.w ${Lab-8-16} */
{
M32C_INSN_JMP32_W, "jmp32.w", "jmp.w", 24,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmp.a ${Lab-8-24} */
{
M32C_INSN_JMP32_A, "jmp32.a", "jmp.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jmps #${Imm-8-QI} */
{
M32C_INSN_JMPS32, "jmps32", "jmps", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jsr.w ${Lab-8-16} */
{
M32C_INSN_JSR16_W, "jsr16.w", "jsr.w", 24,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jsr.a ${Lab-8-24} */
{
M32C_INSN_JSR16_A, "jsr16.a", "jsr.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jsr.w ${Lab-8-16} */
{
M32C_INSN_JSR32_W, "jsr32.w", "jsr.w", 24,
- { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(RELAXABLE)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jsr.a ${Lab-8-24} */
{
M32C_INSN_JSR32_A, "jsr32.a", "jsr.a", 32,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_JUMP, 0 } } } }
},
/* jsrs #${Imm-8-QI} */
{
M32C_INSN_JSRS16, "jsrs16", "jsrs", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* jsrs #${Imm-8-QI} */
{
M32C_INSN_JSRS, "jsrs", "jsrs", 16,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc #${Imm-16-HI},${cr16} */
{
M32C_INSN_LDC16_IMM16, "ldc16.imm16", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc #${Imm-16-HI},${cr1-Unprefixed-32} */
{
M32C_INSN_LDC32_IMM16_CR1, "ldc32.imm16-cr1", "ldc", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc #${Dsp-16-u24},${cr2-32} */
{
M32C_INSN_LDC32_IMM16_CR2, "ldc32.imm16-cr2", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldc #${Dsp-16-u24},${cr3-Unprefixed-32} */
{
M32C_INSN_LDC32_IMM16_CR3, "ldc32.imm16-cr3", "ldc", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_LDCTX16, "ldctx16", "ldctx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_LDCTX32, "ldctx32", "ldctx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stctx ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_STCTX16, "stctx16", "stctx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stctx ${Dsp-16-u16},${Dsp-32-u24} */
{
M32C_INSN_STCTX32, "stctx32", "stctx", 56,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldipl #${Imm-13-u3} */
{
M32C_INSN_LDIPL16_IMM, "ldipl16.imm", "ldipl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* ldipl #${Imm-13-u3} */
{
M32C_INSN_LDIPL32_IMM, "ldipl32.imm", "ldipl", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b$S #${Imm-8-QI},a0 */
{
M32C_INSN_MOV16_B_S_IMM_A0, "mov16.b.S-imm-a0", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b$S #${Imm-8-QI},a1 */
{
M32C_INSN_MOV16_B_S_IMM_A1, "mov16.b.S-imm-a1", "mov.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w$S #${Imm-8-HI},a0 */
{
M32C_INSN_MOV16_W_S_IMM_A0, "mov16.w.S-imm-a0", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w$S #${Imm-8-HI},a1 */
{
M32C_INSN_MOV16_W_S_IMM_A1, "mov16.w.S-imm-a1", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w$S #${Imm-8-HI},a0 */
{
M32C_INSN_MOV32_W_A0, "mov32-w-a0", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.w$S #${Imm-8-HI},a1 */
{
M32C_INSN_MOV32_W_A1, "mov32-w-a1", "mov.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l$S #${Dsp-8-s24},a0 */
{
M32C_INSN_MOV32_L_A0, "mov32-l-a0", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.l$S #${Dsp-8-s24},a1 */
{
M32C_INSN_MOV32_L_A1, "mov32-l-a1", "mov.l", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b$S r0l,a1 */
{
M32C_INSN_MOV16_B_S_R0L_A1, "mov16.b.S-r0l-a1", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* mov.b$S r0h,a0 */
{
M32C_INSN_MOV16_B_S_R0H_A0, "mov16.b.S-r0h-a0", "mov.b", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* nop */
{
M32C_INSN_NOP16, "nop16", "nop", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* nop */
{
M32C_INSN_NOP32, "nop32", "nop", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* popc ${cr16} */
{
M32C_INSN_POPC16_IMM16, "popc16.imm16", "popc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* popc ${cr1-Unprefixed-32} */
{
M32C_INSN_POPC32_IMM16_CR1, "popc32.imm16-cr1", "popc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* popc ${cr2-32} */
{
M32C_INSN_POPC32_IMM16_CR2, "popc32.imm16-cr2", "popc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pushc ${cr16} */
{
M32C_INSN_PUSHC16_IMM16, "pushc16.imm16", "pushc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pushc ${cr1-Unprefixed-32} */
{
M32C_INSN_PUSHC32_IMM16_CR1, "pushc32.imm16-cr1", "pushc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pushc ${cr2-32} */
{
M32C_INSN_PUSHC32_IMM16_CR2, "pushc32.imm16-cr2", "pushc", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* popm ${Regsetpop} */
{
M32C_INSN_POPM16, "popm16", "popm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pushm ${Regsetpush} */
{
M32C_INSN_PUSHM16, "pushm16", "pushm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* popm ${Regsetpop} */
{
M32C_INSN_POPM, "popm", "popm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* pushm ${Regsetpush} */
{
M32C_INSN_PUSHM, "pushm", "pushm", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.b$G #${Imm-16-QI} */
{
M32C_INSN_PUSH16_B_G_IMM, "push16.b.G-imm", "push.b", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.w$G #${Imm-16-HI} */
{
M32C_INSN_PUSH16_W_G_IMM, "push16.w.G-imm", "push.w", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
-/* push.b #Imm-8-QI */
+/* push.b #${Imm-8-QI} */
{
M32C_INSN_PUSH32_B_IMM, "push32.b.imm", "push.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.w #${Imm-8-HI} */
{
M32C_INSN_PUSH32_W_IMM, "push32.w.imm", "push.w", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* push.l #${Imm-16-SI} */
{
M32C_INSN_PUSH32_L_IMM, "push32.l.imm", "push.l", 48,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* reit */
{
M32C_INSN_REIT16, "reit16", "reit", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* reit */
{
M32C_INSN_REIT32, "reit32", "reit", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rmpa.b */
{
M32C_INSN_RMPA16_B, "rmpa16.b", "rmpa.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rmpa.w */
{
M32C_INSN_RMPA16_W, "rmpa16.w", "rmpa.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rmpa.b */
{
M32C_INSN_RMPA32_B, "rmpa32.b", "rmpa.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rmpa.w */
{
M32C_INSN_RMPA32_W, "rmpa32.w", "rmpa.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rts */
{
M32C_INSN_RTS16, "rts16", "rts", 8,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* rts */
{
M32C_INSN_RTS32, "rts32", "rts", 8,
- { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* scmpu.b */
{
M32C_INSN_SCMPU_B, "scmpu.b", "scmpu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* scmpu.w */
{
M32C_INSN_SCMPU_W, "scmpu.w", "scmpu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l #${Imm-sh-12-s4},r2r0 */
{
M32C_INSN_SHA16_L_IMM_R2R0, "sha16-L-imm-r2r0", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l #${Imm-sh-12-s4},r3r1 */
{
M32C_INSN_SHA16_L_IMM_R3R1, "sha16-L-imm-r3r1", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,r2r0 */
{
M32C_INSN_SHA16_L_R1H_R2R0, "sha16-L-r1h-r2r0", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sha.l r1h,r3r1 */
{
M32C_INSN_SHA16_L_R1H_R3R1, "sha16-L-r1h-r3r1", "sha.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l #${Imm-sh-12-s4},r2r0 */
{
M32C_INSN_SHL16_L_IMM_R2R0, "shl16-L-imm-r2r0", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l #${Imm-sh-12-s4},r3r1 */
{
M32C_INSN_SHL16_L_IMM_R3R1, "shl16-L-imm-r3r1", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,r2r0 */
{
M32C_INSN_SHL16_L_R1H_R2R0, "shl16-L-r1h-r2r0", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* shl.l r1h,r3r1 */
{
M32C_INSN_SHL16_L_R1H_R3R1, "shl16-L-r1h-r3r1", "shl.l", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sin.b */
{
M32C_INSN_SIN32_B, "sin32.b", "sin.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sin.w */
{
M32C_INSN_SIN32_W, "sin32.w", "sin.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovb.b */
{
M32C_INSN_SMOVB16_B, "smovb16.b", "smovb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovb.w */
{
M32C_INSN_SMOVB16_W, "smovb16.w", "smovb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovb.b */
{
M32C_INSN_SMOVB32_B, "smovb32.b", "smovb.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovb.w */
{
M32C_INSN_SMOVB32_W, "smovb32.w", "smovb.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovf.b */
{
M32C_INSN_SMOVF16_B, "smovf16.b", "smovf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovf.w */
{
M32C_INSN_SMOVF16_W, "smovf16.w", "smovf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovf.b */
{
M32C_INSN_SMOVF32_B, "smovf32.b", "smovf.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovf.w */
{
M32C_INSN_SMOVF32_W, "smovf32.w", "smovf.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovu.b */
{
M32C_INSN_SMOVU_B, "smovu.b", "smovu.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* smovu.w */
{
M32C_INSN_SMOVU_W, "smovu.w", "smovu.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sout.b */
{
M32C_INSN_SOUT_B, "sout.b", "sout.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sout.w */
{
M32C_INSN_SOUT_W, "sout.w", "sout.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sstr.b */
{
M32C_INSN_SSTR16_B, "sstr16.b", "sstr.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sstr.w */
{
M32C_INSN_SSTR16_W, "sstr16.w", "sstr.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sstr.b */
{
M32C_INSN_SSTR_B, "sstr.b", "sstr.b", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* sstr.w */
{
M32C_INSN_SSTR_W, "sstr.w", "sstr.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx #${Imm-8-QI},#${Imm-16-QI},r0h */
{
M32C_INSN_STZX16_IMM8_IMM8_R0H, "stzx16-imm8-imm8-r0h", "stzx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx #${Imm-8-QI},#${Imm-16-QI},r0l */
{
M32C_INSN_STZX16_IMM8_IMM8_R0L, "stzx16-imm8-imm8-r0l", "stzx", 24,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb] */
{
M32C_INSN_STZX16_IMM8_IMM8_DSP8SB, "stzx16-imm8-imm8-dsp8sb", "stzx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb] */
{
M32C_INSN_STZX16_IMM8_IMM8_DSP8FB, "stzx16-imm8-imm8-dsp8fb", "stzx", 32,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16} */
{
M32C_INSN_STZX16_IMM8_IMM8_ABS16, "stzx16-imm8-imm8-abs16", "stzx", 40,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* und */
{
M32C_INSN_UND16, "und16", "und", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* und */
{
M32C_INSN_UND32, "und32", "und", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* wait */
{
M32C_INSN_WAIT16, "wait16", "wait", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* wait */
{
M32C_INSN_WAIT, "wait", "wait", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* exts.w r0 */
{
M32C_INSN_EXTS16_W_R0, "exts16.w-r0", "exts.w", 16,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* src-indirect */
{
M32C_INSN_SRCIND, "srcind", "src-indirect", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* dest-indirect */
{
M32C_INSN_DESTIND, "destind", "dest-indirect", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
/* src-dest-indirect */
{
M32C_INSN_SRCDESTIND, "srcdestind", "src-dest-indirect", 8,
- { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
},
};
Modified: branches/binutils/package/opcodes/m32c-desc.h
===================================================================
--- branches/binutils/package/opcodes/m32c-desc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-desc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -76,6 +76,11 @@
ISA_M16C, ISA_M32C, ISA_MAX
} ISA_ATTR;
+/* Enum declaration for . */
+typedef enum rl_type_attr {
+ RL_TYPE_NONE, RL_TYPE_JUMP, RL_TYPE_1ADDR, RL_TYPE_2ADDR
+} RL_TYPE_ATTR;
+
/* Number of architecture variants. */
#define MAX_ISAS ((int) ISA_MAX)
#define MAX_MACHS ((int) MACH_MAX)
@@ -88,7 +93,7 @@
typedef enum cgen_ifld_attr {
CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
, CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
- , CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_END_NBOOLS
+ , CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_RL_TYPE, CGEN_IFLD_END_NBOOLS
} CGEN_IFLD_ATTR;
/* Number of non-boolean elements in cgen_ifld_attr. */
@@ -97,6 +102,7 @@
/* cgen_ifld attribute accessor macros. */
#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_IFLD_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_ISA-CGEN_IFLD_START_NBOOLS-1].bitset)
+#define CGEN_ATTR_CGEN_IFLD_RL_TYPE_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_RL_TYPE-CGEN_IFLD_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
@@ -156,7 +162,7 @@
typedef enum cgen_hw_attr {
CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
, CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_ISA
- , CGEN_HW_END_NBOOLS
+ , CGEN_HW_RL_TYPE, CGEN_HW_END_NBOOLS
} CGEN_HW_ATTR;
/* Number of non-boolean elements in cgen_hw_attr. */
@@ -165,6 +171,7 @@
/* cgen_hw attribute accessor macros. */
#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_HW_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_ISA-CGEN_HW_START_NBOOLS-1].bitset)
+#define CGEN_ATTR_CGEN_HW_RL_TYPE_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_RL_TYPE-CGEN_HW_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
@@ -202,7 +209,7 @@
CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
, CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_ISA
- , CGEN_OPERAND_END_NBOOLS
+ , CGEN_OPERAND_RL_TYPE, CGEN_OPERAND_END_NBOOLS
} CGEN_OPERAND_ATTR;
/* Number of non-boolean elements in cgen_operand_attr. */
@@ -211,6 +218,7 @@
/* cgen_operand attribute accessor macros. */
#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_OPERAND_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_ISA-CGEN_OPERAND_START_NBOOLS-1].bitset)
+#define CGEN_ATTR_CGEN_OPERAND_RL_TYPE_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_RL_TYPE-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
@@ -257,194 +265,194 @@
, M32C_OPERAND_IMM_32_SI, M32C_OPERAND_IMM_32_HI, M32C_OPERAND_IMM_40_QI, M32C_OPERAND_IMM_40_HI
, M32C_OPERAND_IMM_40_SI, M32C_OPERAND_IMM_48_QI, M32C_OPERAND_IMM_48_HI, M32C_OPERAND_IMM_48_SI
, M32C_OPERAND_IMM_56_QI, M32C_OPERAND_IMM_56_HI, M32C_OPERAND_IMM_64_HI, M32C_OPERAND_IMM1_S
- , M32C_OPERAND_IMM3_S, M32C_OPERAND_BITNO16R, M32C_OPERAND_BITNO32PREFIXED, M32C_OPERAND_BITNO32UNPREFIXED
- , M32C_OPERAND_BITBASE16_16_U8, M32C_OPERAND_BITBASE16_16_S8, M32C_OPERAND_BITBASE16_16_U16, M32C_OPERAND_BITBASE16_8_U11_S
- , M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED
- , M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, M32C_OPERAND_BITBASE32_24_U19_PREFIXED
- , M32C_OPERAND_BITBASE32_24_S19_PREFIXED, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, M32C_OPERAND_LAB_5_3, M32C_OPERAND_LAB32_JMP_S
- , M32C_OPERAND_LAB_8_8, M32C_OPERAND_LAB_8_16, M32C_OPERAND_LAB_8_24, M32C_OPERAND_LAB_16_8
- , M32C_OPERAND_LAB_24_8, M32C_OPERAND_LAB_32_8, M32C_OPERAND_LAB_40_8, M32C_OPERAND_SBIT
- , M32C_OPERAND_OBIT, M32C_OPERAND_ZBIT, M32C_OPERAND_CBIT, M32C_OPERAND_UBIT
- , M32C_OPERAND_IBIT, M32C_OPERAND_BBIT, M32C_OPERAND_DBIT, M32C_OPERAND_COND16_16
- , M32C_OPERAND_COND16_24, M32C_OPERAND_COND16_32, M32C_OPERAND_COND32_16, M32C_OPERAND_COND32_24
- , M32C_OPERAND_COND32_32, M32C_OPERAND_COND32_40, M32C_OPERAND_COND16C, M32C_OPERAND_COND16J
- , M32C_OPERAND_COND16J5, M32C_OPERAND_COND32, M32C_OPERAND_COND32J, M32C_OPERAND_SCCOND32
- , M32C_OPERAND_FLAGS16, M32C_OPERAND_FLAGS32, M32C_OPERAND_CR16, M32C_OPERAND_CR1_UNPREFIXED_32
- , M32C_OPERAND_CR1_PREFIXED_32, M32C_OPERAND_CR2_32, M32C_OPERAND_CR3_UNPREFIXED_32, M32C_OPERAND_CR3_PREFIXED_32
- , M32C_OPERAND_Z, M32C_OPERAND_S, M32C_OPERAND_Q, M32C_OPERAND_G
- , M32C_OPERAND_X, M32C_OPERAND_SIZE, M32C_OPERAND_BITINDEX, M32C_OPERAND_SRCINDEX
- , M32C_OPERAND_DSTINDEX, M32C_OPERAND_NOREMAINDER, M32C_OPERAND_SRC16_RN_DIRECT_QI, M32C_OPERAND_SRC16_RN_DIRECT_HI
- , M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_HI
- , M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_DIRECT_QI, M32C_OPERAND_SRC16_AN_DIRECT_HI
- , M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_QI
- , M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_INDIRECT_QI, M32C_OPERAND_SRC16_AN_INDIRECT_HI
- , M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_QI
- , M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_QI
- , M32C_OPERAND_SRC16_16_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_HI
- , M32C_OPERAND_SRC16_16_16_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_HI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_HI
- , M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_QI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_HI
- , M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI
- , M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_QI
- , M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_SI
- , M32C_OPERAND_SRC16_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_QI
- , M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_HI
- , M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST16_RN_DIRECT_QI, M32C_OPERAND_DST16_RN_DIRECT_HI, M32C_OPERAND_DST16_RN_DIRECT_SI
- , M32C_OPERAND_DST16_RN_DIRECT_EXT_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_HI
- , M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_QI
- , M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST16_AN_DIRECT_QI, M32C_OPERAND_DST16_AN_DIRECT_HI
- , M32C_OPERAND_DST16_AN_DIRECT_SI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_HI
- , M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_DST16_AN_INDIRECT_QI
- , M32C_OPERAND_DST16_AN_INDIRECT_HI, M32C_OPERAND_DST16_AN_INDIRECT_SI, M32C_OPERAND_DST16_AN_INDIRECT_EXT_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_QI
- , M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_SI
- , M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_QI
- , M32C_OPERAND_DST16_16_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_QI
- , M32C_OPERAND_DST16_24_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_QI
- , M32C_OPERAND_DST16_24_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_QI
- , M32C_OPERAND_DST16_32_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_QI
- , M32C_OPERAND_DST16_40_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_QI
- , M32C_OPERAND_DST16_48_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_QI
- , M32C_OPERAND_DST16_16_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_HI
- , M32C_OPERAND_DST16_16_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_HI
- , M32C_OPERAND_DST16_24_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_HI
- , M32C_OPERAND_DST16_32_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_HI
- , M32C_OPERAND_DST16_40_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_HI
- , M32C_OPERAND_DST16_48_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_HI
- , M32C_OPERAND_DST16_48_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_SI
- , M32C_OPERAND_DST16_16_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_SI
- , M32C_OPERAND_DST16_24_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_SI
- , M32C_OPERAND_DST16_32_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_SI
- , M32C_OPERAND_DST16_40_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_SI
- , M32C_OPERAND_DST16_40_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_SI
- , M32C_OPERAND_DST16_48_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_EXT_QI
- , M32C_OPERAND_DST16_16_8_FB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_QI
- , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_HI
- , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_SI
- , M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI
- , M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI
- , M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI
- , M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI
- , M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_QI, M32C_OPERAND_DST16_24_16_ABSOLUTE_QI, M32C_OPERAND_DST16_32_16_ABSOLUTE_QI
- , M32C_OPERAND_DST16_40_16_ABSOLUTE_QI, M32C_OPERAND_DST16_48_16_ABSOLUTE_QI, M32C_OPERAND_DST16_16_16_ABSOLUTE_HI, M32C_OPERAND_DST16_24_16_ABSOLUTE_HI
- , M32C_OPERAND_DST16_32_16_ABSOLUTE_HI, M32C_OPERAND_DST16_40_16_ABSOLUTE_HI, M32C_OPERAND_DST16_48_16_ABSOLUTE_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_SI
- , M32C_OPERAND_DST16_24_16_ABSOLUTE_SI, M32C_OPERAND_DST16_32_16_ABSOLUTE_SI, M32C_OPERAND_DST16_40_16_ABSOLUTE_SI, M32C_OPERAND_DST16_48_16_ABSOLUTE_SI
- , M32C_OPERAND_DST16_16_16_ABSOLUTE_EXT_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_QI
- , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_HI
- , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_SI
- , M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_QI
- , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_QI
- , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_HI
- , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_HI
- , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_SI
- , M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_SI
- , M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI
- , M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_BIT16_RN_DIRECT, M32C_OPERAND_BIT32_RN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_RN_DIRECT_PREFIXED
- , M32C_OPERAND_BIT16_AN_DIRECT, M32C_OPERAND_BIT32_AN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_DIRECT_PREFIXED, M32C_OPERAND_BIT16_AN_INDIRECT
- , M32C_OPERAND_BIT32_AN_INDIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_INDIRECT_PREFIXED, M32C_OPERAND_BIT16_16_8_SB_RELATIVE, M32C_OPERAND_BIT16_16_16_SB_RELATIVE
- , M32C_OPERAND_BIT16_16_8_FB_RELATIVE, M32C_OPERAND_BIT16_16_8_AN_RELATIVE, M32C_OPERAND_BIT16_16_16_AN_RELATIVE, M32C_OPERAND_BIT32_16_11_SB_RELATIVE_UNPREFIXED
- , M32C_OPERAND_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_AN_RELATIVE_UNPREFIXED
- , M32C_OPERAND_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_24_11_SB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_SB_RELATIVE_PREFIXED
- , M32C_OPERAND_BIT32_24_11_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_AN_RELATIVE_PREFIXED
- , M32C_OPERAND_BIT32_24_27_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT16_11_SB_RELATIVE_S, M32C_OPERAND_RN16_PUSH_S_DERIVED, M32C_OPERAND_AN16_PUSH_S_DERIVED
- , M32C_OPERAND_BIT16_16_16_ABSOLUTE, M32C_OPERAND_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_24_19_ABSOLUTE_PREFIXED
- , M32C_OPERAND_BIT32_24_27_ABSOLUTE_PREFIXED, M32C_OPERAND_DST16_3_S_R0L_DIRECT_QI, M32C_OPERAND_DST16_3_S_R0H_DIRECT_QI, M32C_OPERAND_DST16_3_S_8_8_SB_RELATIVE_QI
- , M32C_OPERAND_DST16_3_S_8_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_16_ABSOLUTE_QI, M32C_OPERAND_DST16_3_S_16_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_16_8_FB_RELATIVE_QI
- , M32C_OPERAND_DST16_3_S_16_16_ABSOLUTE_QI, M32C_OPERAND_SRCDST16_R0L_R0H_S_DERIVED, M32C_OPERAND_DST32_2_S_R0L_DIRECT_QI, M32C_OPERAND_DST32_2_S_R0_DIRECT_HI
- , M32C_OPERAND_DST32_1_S_A0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A1_DIRECT_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_QI
- , M32C_OPERAND_DST32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_HI
- , M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_SI, M32C_OPERAND_SRC16_BASIC_QI
- , M32C_OPERAND_SRC16_BASIC_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_QI, M32C_OPERAND_SRC32_BASIC_PREFIXED_QI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_HI
- , M32C_OPERAND_SRC32_BASIC_PREFIXED_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_SI, M32C_OPERAND_SRC32_BASIC_PREFIXED_SI, M32C_OPERAND_SRC32_BASIC_EXTPREFIXED_QI
- , M32C_OPERAND_SRC16_16_8_QI, M32C_OPERAND_SRC16_16_16_QI, M32C_OPERAND_SRC16_16_8_HI, M32C_OPERAND_SRC16_16_16_HI
- , M32C_OPERAND_SRC32_16_8_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_HI
- , M32C_OPERAND_SRC32_16_16_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_SI
- , M32C_OPERAND_SRC32_16_24_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_PREFIXED_QI, M32C_OPERAND_SRC32_24_24_PREFIXED_QI
- , M32C_OPERAND_SRC32_24_8_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_PREFIXED_SI
- , M32C_OPERAND_SRC32_24_16_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_BASIC_QI, M32C_OPERAND_DST16_BASIC_HI
- , M32C_OPERAND_DST16_BASIC_SI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_QI, M32C_OPERAND_DST32_BASIC_PREFIXED_QI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_HI
- , M32C_OPERAND_DST32_BASIC_PREFIXED_HI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_SI, M32C_OPERAND_DST32_BASIC_PREFIXED_SI, M32C_OPERAND_DST16_16_QI
- , M32C_OPERAND_DST16_16_8_QI, M32C_OPERAND_DST16_16_16_QI, M32C_OPERAND_DST16_16_HI, M32C_OPERAND_DST16_16_8_HI
- , M32C_OPERAND_DST16_16_16_HI, M32C_OPERAND_DST16_16_SI, M32C_OPERAND_DST16_16_8_SI, M32C_OPERAND_DST16_16_16_SI
- , M32C_OPERAND_DST16_16_EXT_QI, M32C_OPERAND_DST16_AN_INDIRECT_MOVA_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_MOVA_HI
- , M32C_OPERAND_DST16_16_8_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_MOVA_HI
- , M32C_OPERAND_DST16_16_MOVA_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI
- , M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI
- , M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_UNPREFIXED_MOVA_SI
- , M32C_OPERAND_DST32_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_UNPREFIXED_QI
- , M32C_OPERAND_DST32_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_UNPREFIXED_HI
- , M32C_OPERAND_DST32_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_UNPREFIXED_SI
- , M32C_OPERAND_DST32_16_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_MULEX_HI, M32C_OPERAND_DST16_24_QI
- , M32C_OPERAND_DST16_24_HI, M32C_OPERAND_DST32_24_UNPREFIXED_QI, M32C_OPERAND_DST32_24_PREFIXED_QI, M32C_OPERAND_DST32_24_8_PREFIXED_QI
- , M32C_OPERAND_DST32_24_16_PREFIXED_QI, M32C_OPERAND_DST32_24_24_PREFIXED_QI, M32C_OPERAND_DST32_24_UNPREFIXED_HI, M32C_OPERAND_DST32_24_PREFIXED_HI
- , M32C_OPERAND_DST32_24_8_PREFIXED_HI, M32C_OPERAND_DST32_24_16_PREFIXED_HI, M32C_OPERAND_DST32_24_24_PREFIXED_HI, M32C_OPERAND_DST32_24_UNPREFIXED_SI
- , M32C_OPERAND_DST32_24_PREFIXED_SI, M32C_OPERAND_DST32_24_8_PREFIXED_SI, M32C_OPERAND_DST32_24_16_PREFIXED_SI, M32C_OPERAND_DST32_24_24_PREFIXED_SI
- , M32C_OPERAND_DST16_32_QI, M32C_OPERAND_DST16_32_HI, M32C_OPERAND_DST32_32_UNPREFIXED_QI, M32C_OPERAND_DST32_32_PREFIXED_QI
- , M32C_OPERAND_DST32_32_UNPREFIXED_HI, M32C_OPERAND_DST32_32_PREFIXED_HI, M32C_OPERAND_DST32_32_UNPREFIXED_SI, M32C_OPERAND_DST32_32_PREFIXED_SI
- , M32C_OPERAND_DST32_40_UNPREFIXED_QI, M32C_OPERAND_DST32_40_PREFIXED_QI, M32C_OPERAND_DST32_40_UNPREFIXED_HI, M32C_OPERAND_DST32_40_PREFIXED_HI
- , M32C_OPERAND_DST32_40_UNPREFIXED_SI, M32C_OPERAND_DST32_40_PREFIXED_SI, M32C_OPERAND_DST32_48_PREFIXED_QI, M32C_OPERAND_DST32_48_PREFIXED_HI
- , M32C_OPERAND_DST32_48_PREFIXED_SI, M32C_OPERAND_BIT16_16, M32C_OPERAND_BIT16_16_BASIC, M32C_OPERAND_BIT16_16_8
- , M32C_OPERAND_BIT16_16_16, M32C_OPERAND_BIT32_16_UNPREFIXED, M32C_OPERAND_BIT32_24_PREFIXED, M32C_OPERAND_BIT32_BASIC_UNPREFIXED
- , M32C_OPERAND_BIT32_16_8_UNPREFIXED, M32C_OPERAND_BIT32_16_16_UNPREFIXED, M32C_OPERAND_BIT32_16_24_UNPREFIXED, M32C_OPERAND_SRC16_2_S
- , M32C_OPERAND_SRC32_2_S_QI, M32C_OPERAND_SRC32_2_S_HI, M32C_OPERAND_DST16_3_S_8, M32C_OPERAND_DST16_3_S_16
- , M32C_OPERAND_SRCDST16_R0L_R0H_S, M32C_OPERAND_DST32_2_S_BASIC_QI, M32C_OPERAND_DST32_2_S_BASIC_HI, M32C_OPERAND_DST32_2_S_8_QI
- , M32C_OPERAND_DST32_2_S_16_QI, M32C_OPERAND_DST32_2_S_8_HI, M32C_OPERAND_DST32_2_S_16_HI, M32C_OPERAND_DST32_2_S_8_SI
- , M32C_OPERAND_DST32_2_S_16_SI, M32C_OPERAND_DST32_AN_S, M32C_OPERAND_BIT16_11_S, M32C_OPERAND_RN16_PUSH_S_ANYOF
- , M32C_OPERAND_AN16_PUSH_S_ANYOF, M32C_OPERAND_MAX
+ , M32C_OPERAND_IMM3_S, M32C_OPERAND_BIT3_S, M32C_OPERAND_BITNO16R, M32C_OPERAND_BITNO32PREFIXED
+ , M32C_OPERAND_BITNO32UNPREFIXED, M32C_OPERAND_BITBASE16_16_U8, M32C_OPERAND_BITBASE16_16_S8, M32C_OPERAND_BITBASE16_16_U16
+ , M32C_OPERAND_BITBASE16_8_U11_S, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED
+ , M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, M32C_OPERAND_BITBASE32_24_S11_PREFIXED
+ , M32C_OPERAND_BITBASE32_24_U19_PREFIXED, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, M32C_OPERAND_LAB_5_3
+ , M32C_OPERAND_LAB32_JMP_S, M32C_OPERAND_LAB_8_8, M32C_OPERAND_LAB_8_16, M32C_OPERAND_LAB_8_24
+ , M32C_OPERAND_LAB_16_8, M32C_OPERAND_LAB_24_8, M32C_OPERAND_LAB_32_8, M32C_OPERAND_LAB_40_8
+ , M32C_OPERAND_SBIT, M32C_OPERAND_OBIT, M32C_OPERAND_ZBIT, M32C_OPERAND_CBIT
+ , M32C_OPERAND_UBIT, M32C_OPERAND_IBIT, M32C_OPERAND_BBIT, M32C_OPERAND_DBIT
+ , M32C_OPERAND_COND16_16, M32C_OPERAND_COND16_24, M32C_OPERAND_COND16_32, M32C_OPERAND_COND32_16
+ , M32C_OPERAND_COND32_24, M32C_OPERAND_COND32_32, M32C_OPERAND_COND32_40, M32C_OPERAND_COND16C
+ , M32C_OPERAND_COND16J, M32C_OPERAND_COND16J5, M32C_OPERAND_COND32, M32C_OPERAND_COND32J
+ , M32C_OPERAND_SCCOND32, M32C_OPERAND_FLAGS16, M32C_OPERAND_FLAGS32, M32C_OPERAND_CR16
+ , M32C_OPERAND_CR1_UNPREFIXED_32, M32C_OPERAND_CR1_PREFIXED_32, M32C_OPERAND_CR2_32, M32C_OPERAND_CR3_UNPREFIXED_32
+ , M32C_OPERAND_CR3_PREFIXED_32, M32C_OPERAND_Z, M32C_OPERAND_S, M32C_OPERAND_Q
+ , M32C_OPERAND_G, M32C_OPERAND_X, M32C_OPERAND_SIZE, M32C_OPERAND_BITINDEX
+ , M32C_OPERAND_SRCINDEX, M32C_OPERAND_DSTINDEX, M32C_OPERAND_NOREMAINDER, M32C_OPERAND_SRC16_RN_DIRECT_QI
+ , M32C_OPERAND_SRC16_RN_DIRECT_HI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_HI
+ , M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_SRC32_RN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_DIRECT_QI
+ , M32C_OPERAND_SRC16_AN_DIRECT_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_UNPREFIXED_SI
+ , M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_DIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_AN_INDIRECT_QI
+ , M32C_OPERAND_SRC16_AN_INDIRECT_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_UNPREFIXED_SI
+ , M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_HI, M32C_OPERAND_SRC32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_SRC16_16_8_SB_RELATIVE_QI
+ , M32C_OPERAND_SRC16_16_16_SB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_QI, M32C_OPERAND_SRC16_16_16_AN_RELATIVE_QI
+ , M32C_OPERAND_SRC16_16_8_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_16_SB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_FB_RELATIVE_HI, M32C_OPERAND_SRC16_16_8_AN_RELATIVE_HI
+ , M32C_OPERAND_SRC16_16_16_AN_RELATIVE_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_SB_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_SRC32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_8_AN_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_SRC32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_SRC32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_FB_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_SRC32_24_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_SRC16_16_16_ABSOLUTE_QI
+ , M32C_OPERAND_SRC16_16_16_ABSOLUTE_HI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_HI
+ , M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_QI
+ , M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_ABSOLUTE_PREFIXED_SI
+ , M32C_OPERAND_SRC32_24_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_SRC16_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC16_2_S_16_ABSOLUTE_QI
+ , M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_SRC32_2_S_8_SB_RELATIVE_HI
+ , M32C_OPERAND_SRC32_2_S_8_FB_RELATIVE_HI, M32C_OPERAND_SRC32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST16_RN_DIRECT_QI, M32C_OPERAND_DST16_RN_DIRECT_HI
+ , M32C_OPERAND_DST16_RN_DIRECT_SI, M32C_OPERAND_DST16_RN_DIRECT_EXT_QI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_QI
+ , M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_RN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_RN_DIRECT_PREFIXED_SI
+ , M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_RN_DIRECT_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST16_AN_DIRECT_QI
+ , M32C_OPERAND_DST16_AN_DIRECT_HI, M32C_OPERAND_DST16_AN_DIRECT_SI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_QI
+ , M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_HI, M32C_OPERAND_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_DIRECT_PREFIXED_SI
+ , M32C_OPERAND_DST16_AN_INDIRECT_QI, M32C_OPERAND_DST16_AN_INDIRECT_HI, M32C_OPERAND_DST16_AN_INDIRECT_SI, M32C_OPERAND_DST16_AN_INDIRECT_EXT_QI
+ , M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_HI
+ , M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_PREFIXED_SI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_AN_INDIRECT_EXTUNPREFIXED_HI
+ , M32C_OPERAND_DST16_16_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_QI
+ , M32C_OPERAND_DST16_16_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_QI
+ , M32C_OPERAND_DST16_24_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_QI
+ , M32C_OPERAND_DST16_32_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_QI
+ , M32C_OPERAND_DST16_40_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_QI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_QI
+ , M32C_OPERAND_DST16_48_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_QI
+ , M32C_OPERAND_DST16_48_16_AN_RELATIVE_QI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_HI
+ , M32C_OPERAND_DST16_16_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_24_16_SB_RELATIVE_HI
+ , M32C_OPERAND_DST16_24_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_8_SB_RELATIVE_HI
+ , M32C_OPERAND_DST16_32_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_32_16_AN_RELATIVE_HI
+ , M32C_OPERAND_DST16_40_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_HI, M32C_OPERAND_DST16_40_8_AN_RELATIVE_HI
+ , M32C_OPERAND_DST16_40_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_HI, M32C_OPERAND_DST16_48_8_FB_RELATIVE_HI
+ , M32C_OPERAND_DST16_48_8_AN_RELATIVE_HI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_SI
+ , M32C_OPERAND_DST16_16_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_8_SB_RELATIVE_SI
+ , M32C_OPERAND_DST16_24_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_24_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_24_16_AN_RELATIVE_SI
+ , M32C_OPERAND_DST16_32_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_32_8_AN_RELATIVE_SI
+ , M32C_OPERAND_DST16_32_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_40_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_16_SB_RELATIVE_SI, M32C_OPERAND_DST16_40_8_FB_RELATIVE_SI
+ , M32C_OPERAND_DST16_40_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_40_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_8_SB_RELATIVE_SI, M32C_OPERAND_DST16_48_16_SB_RELATIVE_SI
+ , M32C_OPERAND_DST16_48_8_FB_RELATIVE_SI, M32C_OPERAND_DST16_48_8_AN_RELATIVE_SI, M32C_OPERAND_DST16_48_16_AN_RELATIVE_SI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_EXT_QI
+ , M32C_OPERAND_DST16_16_16_SB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_EXT_QI, M32C_OPERAND_DST16_16_16_AN_RELATIVE_EXT_QI
+ , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_SB_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_24_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_8_AN_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_24_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_SB_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_32_8_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_AN_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_32_24_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_FB_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_40_16_FB_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_AN_RELATIVE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_QI
+ , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_HI
+ , M32C_OPERAND_DST32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_FB_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_24_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_SB_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_32_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_8_AN_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_32_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_32_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_SB_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_40_8_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_AN_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_40_24_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_SB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_FB_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_48_16_FB_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_8_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_16_AN_RELATIVE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_AN_RELATIVE_PREFIXED_SI
+ , M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_QI
+ , M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_EXTUNPREFIXED_HI
+ , M32C_OPERAND_DST32_16_16_SB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_EXTUNPREFIXED_HI
+ , M32C_OPERAND_DST32_16_16_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_EXTUNPREFIXED_HI, M32C_OPERAND_DST16_16_16_ABSOLUTE_QI, M32C_OPERAND_DST16_24_16_ABSOLUTE_QI
+ , M32C_OPERAND_DST16_32_16_ABSOLUTE_QI, M32C_OPERAND_DST16_40_16_ABSOLUTE_QI, M32C_OPERAND_DST16_48_16_ABSOLUTE_QI, M32C_OPERAND_DST16_16_16_ABSOLUTE_HI
+ , M32C_OPERAND_DST16_24_16_ABSOLUTE_HI, M32C_OPERAND_DST16_32_16_ABSOLUTE_HI, M32C_OPERAND_DST16_40_16_ABSOLUTE_HI, M32C_OPERAND_DST16_48_16_ABSOLUTE_HI
+ , M32C_OPERAND_DST16_16_16_ABSOLUTE_SI, M32C_OPERAND_DST16_24_16_ABSOLUTE_SI, M32C_OPERAND_DST16_32_16_ABSOLUTE_SI, M32C_OPERAND_DST16_40_16_ABSOLUTE_SI
+ , M32C_OPERAND_DST16_48_16_ABSOLUTE_SI, M32C_OPERAND_DST16_16_16_ABSOLUTE_EXT_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_24_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_40_16_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_UNPREFIXED_SI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_QI
+ , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_QI
+ , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_QI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_HI
+ , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_HI
+ , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_HI, M32C_OPERAND_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_24_24_ABSOLUTE_PREFIXED_SI
+ , M32C_OPERAND_DST32_32_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_32_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_40_24_ABSOLUTE_PREFIXED_SI
+ , M32C_OPERAND_DST32_48_16_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_48_24_ABSOLUTE_PREFIXED_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_QI
+ , M32C_OPERAND_DST32_16_16_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_24_ABSOLUTE_EXTUNPREFIXED_HI, M32C_OPERAND_BIT16_RN_DIRECT, M32C_OPERAND_BIT32_RN_DIRECT_UNPREFIXED
+ , M32C_OPERAND_BIT32_RN_DIRECT_PREFIXED, M32C_OPERAND_BIT16_AN_DIRECT, M32C_OPERAND_BIT32_AN_DIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_DIRECT_PREFIXED
+ , M32C_OPERAND_BIT16_AN_INDIRECT, M32C_OPERAND_BIT32_AN_INDIRECT_UNPREFIXED, M32C_OPERAND_BIT32_AN_INDIRECT_PREFIXED, M32C_OPERAND_BIT16_16_8_SB_RELATIVE
+ , M32C_OPERAND_BIT16_16_16_SB_RELATIVE, M32C_OPERAND_BIT16_16_8_FB_RELATIVE, M32C_OPERAND_BIT16_16_8_AN_RELATIVE, M32C_OPERAND_BIT16_16_16_AN_RELATIVE
+ , M32C_OPERAND_BIT32_16_11_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_FB_RELATIVE_UNPREFIXED
+ , M32C_OPERAND_BIT32_16_11_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_AN_RELATIVE_UNPREFIXED, M32C_OPERAND_BIT32_24_11_SB_RELATIVE_PREFIXED
+ , M32C_OPERAND_BIT32_24_19_SB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_19_FB_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_11_AN_RELATIVE_PREFIXED
+ , M32C_OPERAND_BIT32_24_19_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT32_24_27_AN_RELATIVE_PREFIXED, M32C_OPERAND_BIT16_11_SB_RELATIVE_S, M32C_OPERAND_RN16_PUSH_S_DERIVED
+ , M32C_OPERAND_AN16_PUSH_S_DERIVED, M32C_OPERAND_BIT16_16_16_ABSOLUTE, M32C_OPERAND_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_OPERAND_BIT32_16_27_ABSOLUTE_UNPREFIXED
+ , M32C_OPERAND_BIT32_24_19_ABSOLUTE_PREFIXED, M32C_OPERAND_BIT32_24_27_ABSOLUTE_PREFIXED, M32C_OPERAND_DST16_3_S_R0L_DIRECT_QI, M32C_OPERAND_DST16_3_S_R0H_DIRECT_QI
+ , M32C_OPERAND_DST16_3_S_8_8_SB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_8_16_ABSOLUTE_QI, M32C_OPERAND_DST16_3_S_16_8_SB_RELATIVE_QI
+ , M32C_OPERAND_DST16_3_S_16_8_FB_RELATIVE_QI, M32C_OPERAND_DST16_3_S_16_16_ABSOLUTE_QI, M32C_OPERAND_SRCDST16_R0L_R0H_S_DERIVED, M32C_OPERAND_DST32_2_S_R0L_DIRECT_QI
+ , M32C_OPERAND_DST32_2_S_R0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A0_DIRECT_HI, M32C_OPERAND_DST32_1_S_A1_DIRECT_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_QI
+ , M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_QI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_QI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_HI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_HI
+ , M32C_OPERAND_DST32_2_S_16_ABSOLUTE_HI, M32C_OPERAND_DST32_2_S_8_SB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_8_FB_RELATIVE_SI, M32C_OPERAND_DST32_2_S_16_ABSOLUTE_SI
+ , M32C_OPERAND_SRC16_BASIC_QI, M32C_OPERAND_SRC16_BASIC_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_QI, M32C_OPERAND_SRC32_BASIC_PREFIXED_QI
+ , M32C_OPERAND_SRC32_BASIC_UNPREFIXED_HI, M32C_OPERAND_SRC32_BASIC_PREFIXED_HI, M32C_OPERAND_SRC32_BASIC_UNPREFIXED_SI, M32C_OPERAND_SRC32_BASIC_PREFIXED_SI
+ , M32C_OPERAND_SRC32_BASIC_EXTPREFIXED_QI, M32C_OPERAND_SRC16_16_8_QI, M32C_OPERAND_SRC16_16_16_QI, M32C_OPERAND_SRC16_16_8_HI
+ , M32C_OPERAND_SRC16_16_16_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_QI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_QI
+ , M32C_OPERAND_SRC32_16_8_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_16_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_HI, M32C_OPERAND_SRC32_16_8_UNPREFIXED_SI
+ , M32C_OPERAND_SRC32_16_16_UNPREFIXED_SI, M32C_OPERAND_SRC32_16_24_UNPREFIXED_SI, M32C_OPERAND_SRC32_24_8_PREFIXED_QI, M32C_OPERAND_SRC32_24_16_PREFIXED_QI
+ , M32C_OPERAND_SRC32_24_24_PREFIXED_QI, M32C_OPERAND_SRC32_24_8_PREFIXED_HI, M32C_OPERAND_SRC32_24_16_PREFIXED_HI, M32C_OPERAND_SRC32_24_24_PREFIXED_HI
+ , M32C_OPERAND_SRC32_24_8_PREFIXED_SI, M32C_OPERAND_SRC32_24_16_PREFIXED_SI, M32C_OPERAND_SRC32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_BASIC_QI
+ , M32C_OPERAND_DST16_BASIC_HI, M32C_OPERAND_DST16_BASIC_SI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_QI, M32C_OPERAND_DST32_BASIC_PREFIXED_QI
+ , M32C_OPERAND_DST32_BASIC_UNPREFIXED_HI, M32C_OPERAND_DST32_BASIC_PREFIXED_HI, M32C_OPERAND_DST32_BASIC_UNPREFIXED_SI, M32C_OPERAND_DST32_BASIC_PREFIXED_SI
+ , M32C_OPERAND_DST16_16_QI, M32C_OPERAND_DST16_16_8_QI, M32C_OPERAND_DST16_16_16_QI, M32C_OPERAND_DST16_16_HI
+ , M32C_OPERAND_DST16_16_8_HI, M32C_OPERAND_DST16_16_16_HI, M32C_OPERAND_DST16_16_SI, M32C_OPERAND_DST16_16_8_SI
+ , M32C_OPERAND_DST16_16_16_SI, M32C_OPERAND_DST16_16_EXT_QI, M32C_OPERAND_DST16_AN_INDIRECT_MOVA_HI, M32C_OPERAND_DST16_16_8_AN_RELATIVE_MOVA_HI
+ , M32C_OPERAND_DST16_16_16_AN_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_16_SB_RELATIVE_MOVA_HI, M32C_OPERAND_DST16_16_8_FB_RELATIVE_MOVA_HI
+ , M32C_OPERAND_DST16_16_16_ABSOLUTE_MOVA_HI, M32C_OPERAND_DST16_16_MOVA_HI, M32C_OPERAND_DST32_AN_INDIRECT_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_AN_RELATIVE_UNPREFIXED_MOVA_SI
+ , M32C_OPERAND_DST32_16_16_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_AN_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_8_SB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_SB_RELATIVE_UNPREFIXED_MOVA_SI
+ , M32C_OPERAND_DST32_16_8_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_FB_RELATIVE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_16_ABSOLUTE_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_24_ABSOLUTE_UNPREFIXED_MOVA_SI
+ , M32C_OPERAND_DST32_16_UNPREFIXED_MOVA_SI, M32C_OPERAND_DST32_16_UNPREFIXED_QI, M32C_OPERAND_DST32_16_8_UNPREFIXED_QI, M32C_OPERAND_DST32_16_16_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_16_24_UNPREFIXED_QI, M32C_OPERAND_DST32_16_UNPREFIXED_HI, M32C_OPERAND_DST32_16_8_UNPREFIXED_HI, M32C_OPERAND_DST32_16_16_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_16_24_UNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_SI, M32C_OPERAND_DST32_16_8_UNPREFIXED_SI, M32C_OPERAND_DST32_16_16_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_16_24_UNPREFIXED_SI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_QI, M32C_OPERAND_DST32_16_EXTUNPREFIXED_HI, M32C_OPERAND_DST32_16_UNPREFIXED_MULEX_HI
+ , M32C_OPERAND_DST16_24_QI, M32C_OPERAND_DST16_24_HI, M32C_OPERAND_DST32_24_UNPREFIXED_QI, M32C_OPERAND_DST32_24_PREFIXED_QI
+ , M32C_OPERAND_DST32_24_8_PREFIXED_QI, M32C_OPERAND_DST32_24_16_PREFIXED_QI, M32C_OPERAND_DST32_24_24_PREFIXED_QI, M32C_OPERAND_DST32_24_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_24_PREFIXED_HI, M32C_OPERAND_DST32_24_8_PREFIXED_HI, M32C_OPERAND_DST32_24_16_PREFIXED_HI, M32C_OPERAND_DST32_24_24_PREFIXED_HI
+ , M32C_OPERAND_DST32_24_UNPREFIXED_SI, M32C_OPERAND_DST32_24_PREFIXED_SI, M32C_OPERAND_DST32_24_8_PREFIXED_SI, M32C_OPERAND_DST32_24_16_PREFIXED_SI
+ , M32C_OPERAND_DST32_24_24_PREFIXED_SI, M32C_OPERAND_DST16_32_QI, M32C_OPERAND_DST16_32_HI, M32C_OPERAND_DST32_32_UNPREFIXED_QI
+ , M32C_OPERAND_DST32_32_PREFIXED_QI, M32C_OPERAND_DST32_32_UNPREFIXED_HI, M32C_OPERAND_DST32_32_PREFIXED_HI, M32C_OPERAND_DST32_32_UNPREFIXED_SI
+ , M32C_OPERAND_DST32_32_PREFIXED_SI, M32C_OPERAND_DST32_40_UNPREFIXED_QI, M32C_OPERAND_DST32_40_PREFIXED_QI, M32C_OPERAND_DST32_40_UNPREFIXED_HI
+ , M32C_OPERAND_DST32_40_PREFIXED_HI, M32C_OPERAND_DST32_40_UNPREFIXED_SI, M32C_OPERAND_DST32_40_PREFIXED_SI, M32C_OPERAND_DST32_48_PREFIXED_QI
+ , M32C_OPERAND_DST32_48_PREFIXED_HI, M32C_OPERAND_DST32_48_PREFIXED_SI, M32C_OPERAND_BIT16_16, M32C_OPERAND_BIT16_16_BASIC
+ , M32C_OPERAND_BIT16_16_8, M32C_OPERAND_BIT16_16_16, M32C_OPERAND_BIT32_16_UNPREFIXED, M32C_OPERAND_BIT32_24_PREFIXED
+ , M32C_OPERAND_BIT32_BASIC_UNPREFIXED, M32C_OPERAND_BIT32_16_8_UNPREFIXED, M32C_OPERAND_BIT32_16_16_UNPREFIXED, M32C_OPERAND_BIT32_16_24_UNPREFIXED
+ , M32C_OPERAND_SRC16_2_S, M32C_OPERAND_SRC32_2_S_QI, M32C_OPERAND_SRC32_2_S_HI, M32C_OPERAND_DST16_3_S_8
+ , M32C_OPERAND_DST16_3_S_16, M32C_OPERAND_SRCDST16_R0L_R0H_S, M32C_OPERAND_DST32_2_S_BASIC_QI, M32C_OPERAND_DST32_2_S_BASIC_HI
+ , M32C_OPERAND_DST32_2_S_8_QI, M32C_OPERAND_DST32_2_S_16_QI, M32C_OPERAND_DST32_2_S_8_HI, M32C_OPERAND_DST32_2_S_16_HI
+ , M32C_OPERAND_DST32_2_S_8_SI, M32C_OPERAND_DST32_2_S_16_SI, M32C_OPERAND_DST32_AN_S, M32C_OPERAND_BIT16_11_S
+ , M32C_OPERAND_RN16_PUSH_S_ANYOF, M32C_OPERAND_AN16_PUSH_S_ANYOF, M32C_OPERAND_MAX
} CGEN_OPERAND_TYPE;
/* Number of operands types. */
-#define MAX_OPERANDS 873
+#define MAX_OPERANDS 874
/* Maximum number of operands referenced by any insn. */
#define MAX_OPERAND_INSTANCES 8
@@ -456,7 +464,7 @@
CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
, CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
- , CGEN_INSN_MACH, CGEN_INSN_ISA, CGEN_INSN_END_NBOOLS
+ , CGEN_INSN_MACH, CGEN_INSN_ISA, CGEN_INSN_RL_TYPE, CGEN_INSN_END_NBOOLS
} CGEN_INSN_ATTR;
/* Number of non-boolean elements in cgen_insn_attr. */
@@ -465,6 +473,7 @@
/* cgen_insn attribute accessor macros. */
#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_INSN_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_ISA-CGEN_INSN_START_NBOOLS-1].bitset)
+#define CGEN_ATTR_CGEN_INSN_RL_TYPE_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_RL_TYPE-CGEN_INSN_START_NBOOLS-1].nonbitset)
#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
Modified: branches/binutils/package/opcodes/m32c-dis.c
===================================================================
--- branches/binutils/package/opcodes/m32c-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -321,6 +321,9 @@
case M32C_OPERAND_BIT16RN :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
break;
+ case M32C_OPERAND_BIT3_S :
+ print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
break;
@@ -694,7 +697,7 @@
print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_8_24 :
- print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
+ print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_8_8 :
print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
Modified: branches/binutils/package/opcodes/m32c-ibld.c
===================================================================
--- branches/binutils/package/opcodes/m32c-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
@@ -571,6 +578,20 @@
case M32C_OPERAND_BIT16RN :
errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
break;
+ case M32C_OPERAND_BIT3_S :
+ {
+{
+ FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
+ FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
+}
+ errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
+ if (errmsg)
+ break;
+ errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
+ if (errmsg)
+ break;
+ }
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
break;
@@ -1731,6 +1752,17 @@
case M32C_OPERAND_BIT16RN :
length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
break;
+ case M32C_OPERAND_BIT3_S :
+ {
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
+ if (length <= 0) break;
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
+ if (length <= 0) break;
+{
+ FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
+}
+ }
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
break;
@@ -2854,6 +2886,9 @@
case M32C_OPERAND_BIT16RN :
value = fields->f_dst16_rn;
break;
+ case M32C_OPERAND_BIT3_S :
+ value = fields->f_imm3_S;
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
value = fields->f_dst32_an_prefixed;
break;
@@ -3444,6 +3479,9 @@
case M32C_OPERAND_BIT16RN :
value = fields->f_dst16_rn;
break;
+ case M32C_OPERAND_BIT3_S :
+ value = fields->f_imm3_S;
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
value = fields->f_dst32_an_prefixed;
break;
@@ -4039,6 +4077,9 @@
case M32C_OPERAND_BIT16RN :
fields->f_dst16_rn = value;
break;
+ case M32C_OPERAND_BIT3_S :
+ fields->f_imm3_S = value;
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
fields->f_dst32_an_prefixed = value;
break;
@@ -4607,6 +4648,9 @@
case M32C_OPERAND_BIT16RN :
fields->f_dst16_rn = value;
break;
+ case M32C_OPERAND_BIT3_S :
+ fields->f_imm3_S = value;
+ break;
case M32C_OPERAND_BIT32ANPREFIXED :
fields->f_dst32_an_prefixed = value;
break;
Modified: branches/binutils/package/opcodes/m32c-opc.c
===================================================================
--- branches/binutils/package/opcodes/m32c-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -5625,6 +5625,22 @@
8, 8, 0xf7, { { F (F_0_4) }, { F (F_4_1) }, { F (F_5_3) }, { 0 } }
};
+static const CGEN_IFMT ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived ATTRIBUTE_UNUSED = {
+ 8, 8, 0xfb, { { F (F_0_4) }, { F (F_6_2) }, { F (F_5_1) }, { F (F_4_1) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED = {
+ 16, 16, 0xfb00, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_U8) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED = {
+ 16, 16, 0xfb00, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_S8) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xfb0000, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_U16) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
+};
+
static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED = {
8, 8, 0xff, { { F (F_0_4) }, { F (F_5_3) }, { F (F_4_1) }, { 0 } }
};
@@ -5649,6 +5665,54 @@
16, 16, 0xffff, { { F (F_0_4) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } }
};
+static const CGEN_IFMT ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xffff3f, { { F (F_0_4) }, { F (F_12_3) }, { F (F_DST32_RN_PREFIXED_SI) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xffffbf, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xffffbf, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U8) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 40, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U16) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 48, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U24) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U8) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_S8) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_S16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED = {
+ 32, 48, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U24) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
+};
+
static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED = {
24, 24, 0xffff3f, { { F (F_0_4) }, { F (F_12_3) }, { F (F_DST32_RN_PREFIXED_QI) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
};
@@ -5949,22 +6013,6 @@
8, 8, 0xff, { { F (F_0_2) }, { F (F_2_2) }, { F (F_4_3) }, { F (F_7_1) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived ATTRIBUTE_UNUSED = {
- 8, 8, 0xfb, { { F (F_0_4) }, { F (F_6_2) }, { F (F_5_1) }, { F (F_4_1) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED = {
- 16, 16, 0xfb00, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_U8) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED = {
- 16, 16, 0xfb00, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_S8) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED = {
- 24, 24, 0xfb0000, { { F (F_0_4) }, { F (F_6_2) }, { F (F_DSP_8_U16) }, { F (F_4_1) }, { F (F_DST16_RN_QI_S) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED = {
24, 24, 0xff2f00, { { F (F_0_1) }, { F (F_1_3) }, { F (F_10_1) }, { F (F_DSP_16_U8) }, { F (F_SRC32_AN_UNPREFIXED) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_SI) }, { F (F_7_1) }, { F (F_12_4) }, { 0 } }
};
@@ -6649,42 +6697,78 @@
32, 40, 0xfff00000, { { F (F_0_3) }, { F (F_4_3) }, { F (F_8_2) }, { F (F_DSP_16_U24) }, { F (F_3_1) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_IMM_12_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = {
16, 16, 0xff0c, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED = {
16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED = {
16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = {
24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = {
32, 32, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = {
24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = {
32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = {
24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = {
+static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = {
32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
};
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff0c, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED = {
+ 24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
+};
+
static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED = {
32, 48, 0xff3f0000, { { F (F_0_4) }, { F (F_DSP_16_S32) }, { F (F_4_3) }, { F (F_DST32_RN_UNPREFIXED_SI) }, { F (F_7_1) }, { F (F_10_2) }, { F (F_12_4) }, { 0 } }
};
@@ -7021,54 +7105,6 @@
24, 24, 0xffff00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_4) }, { F (F_8_4) }, { 0 } }
};
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED = {
- 24, 24, 0xffff3f, { { F (F_0_4) }, { F (F_12_3) }, { F (F_DST32_RN_PREFIXED_SI) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED = {
- 24, 24, 0xffffbf, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED = {
- 24, 24, 0xffffbf, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 32, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U8) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 40, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U16) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 48, 0xffffbf00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_1) }, { F (F_DSP_24_U24) }, { F (F_DST32_AN_PREFIXED) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 32, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U8) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 32, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_S8) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_S16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 40, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U16) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED = {
- 32, 48, 0xffffff00, { { F (F_0_4) }, { F (F_12_3) }, { F (F_16_2) }, { F (F_DSP_24_U24) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED = {
16, 16, 0xff00, { { F (F_0_2) }, { F (F_2_2) }, { F (F_DSP_8_U8) }, { F (F_4_3) }, { F (F_7_1) }, { 0 } }
};
@@ -7093,42 +7129,6 @@
24, 24, 0xff0000, { { F (F_0_2) }, { F (F_2_2) }, { F (F_DSP_8_U16) }, { F (F_4_3) }, { F (F_7_1) }, { 0 } }
};
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED = {
- 16, 16, 0xff0c, { { F (F_0_4) }, { F (F_12_2) }, { F (F_DST16_RN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED = {
- 16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED = {
- 16, 16, 0xff0e, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED = {
- 24, 24, 0xff0e00, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U8) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED = {
- 32, 32, 0xff0e0000, { { F (F_0_4) }, { F (F_12_2) }, { F (F_14_1) }, { F (F_DSP_16_U16) }, { F (F_DST16_AN) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED = {
- 24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED = {
- 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED = {
- 24, 24, 0xff0f00, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_S8) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_cmp16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED = {
- 32, 32, 0xff0f0000, { { F (F_0_4) }, { F (F_12_4) }, { F (F_DSP_16_U16) }, { F (F_4_3) }, { F (F_7_1) }, { F (F_IMM_8_S4) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED = {
32, 56, 0xffff3f00, { { F (F_0_4) }, { F (F_DSP_24_S16) }, { F (F_12_3) }, { F (F_DST32_RN_PREFIXED_HI) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_DSP_40_S16) }, { F (F_15_1) }, { F (F_18_2) }, { F (F_20_4) }, { 0 } }
};
@@ -7709,6 +7709,10 @@
8, 8, 0xff, { { F (F_0_4) }, { F (F_4_4) }, { 0 } }
};
+static const CGEN_IFMT ifmt_btst_s ATTRIBUTE_UNUSED = {
+ 24, 24, 0xce0000, { { F (F_0_2) }, { F (F_IMM3_S) }, { F (F_4_3) }, { F (F_DSP_8_U16) }, { 0 } }
+};
+
static const CGEN_IFMT ifmt_dec16_w ATTRIBUTE_UNUSED = {
8, 8, 0xf7, { { F (F_0_4) }, { F (F_DST16_AN_S) }, { F (F_5_3) }, { 0 } }
};
@@ -24650,114 +24654,138 @@
{ { MNEM, ' ', OP (DSP_16_U24), 0 } },
& ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI, { 0xb6af0000 }
},
-/* pop.w $Dst16RnHI */
+/* pop.w${G} $Dst16RnHI */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DST16RNHI), 0 } },
+ { { MNEM, OP (G), ' ', OP (DST16RNHI), 0 } },
& ifmt_rorc16_w_16_dst16_Rn_direct_HI, { 0x75d0 }
},
-/* pop.w $Dst16AnHI */
+/* pop.w${G} $Dst16AnHI */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DST16ANHI), 0 } },
+ { { MNEM, OP (G), ' ', OP (DST16ANHI), 0 } },
& ifmt_rorc16_w_16_dst16_An_direct_HI, { 0x75d4 }
},
-/* pop.w [$Dst16An] */
+/* pop.w${G} [$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_w_16_dst16_An_indirect_HI, { 0x75d6 }
},
-/* pop.w ${Dsp-16-u8}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_w_16_dst16_16_8_An_relative_HI, { 0x75d800 }
},
-/* pop.w ${Dsp-16-u16}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_w_16_dst16_16_16_An_relative_HI, { 0x75dc0000 }
},
-/* pop.w ${Dsp-16-u8}[sb] */
+/* pop.w${G} ${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
& ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI, { 0x75da00 }
},
-/* pop.w ${Dsp-16-u16}[sb] */
+/* pop.w${G} ${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
& ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI, { 0x75de0000 }
},
-/* pop.w ${Dsp-16-s8}[fb] */
+/* pop.w${G} ${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
& ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI, { 0x75db00 }
},
-/* pop.w ${Dsp-16-u16} */
+/* pop.w${G} ${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } },
& ifmt_rorc16_w_16_dst16_16_16_absolute_HI, { 0x75df0000 }
},
-/* pop.b $Dst16RnQI */
+/* pop.b${G} $Dst16RnQI */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DST16RNQI), 0 } },
+ { { MNEM, OP (G), ' ', OP (DST16RNQI), 0 } },
& ifmt_rorc16_b_16_dst16_Rn_direct_QI, { 0x74d0 }
},
-/* pop.b $Dst16AnQI */
+/* pop.b${G} $Dst16AnQI */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DST16ANQI), 0 } },
+ { { MNEM, OP (G), ' ', OP (DST16ANQI), 0 } },
& ifmt_rorc16_b_16_dst16_An_direct_QI, { 0x74d4 }
},
-/* pop.b [$Dst16An] */
+/* pop.b${G} [$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_b_16_dst16_An_indirect_QI, { 0x74d6 }
},
-/* pop.b ${Dsp-16-u8}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_b_16_dst16_16_8_An_relative_QI, { 0x74d800 }
},
-/* pop.b ${Dsp-16-u16}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
& ifmt_rorc16_b_16_dst16_16_16_An_relative_QI, { 0x74dc0000 }
},
-/* pop.b ${Dsp-16-u8}[sb] */
+/* pop.b${G} ${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
& ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI, { 0x74da00 }
},
-/* pop.b ${Dsp-16-u16}[sb] */
+/* pop.b${G} ${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
& ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI, { 0x74de0000 }
},
-/* pop.b ${Dsp-16-s8}[fb] */
+/* pop.b${G} ${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
& ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI, { 0x74db00 }
},
-/* pop.b ${Dsp-16-u16} */
+/* pop.b${G} ${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', OP (DSP_16_U16), 0 } },
+ { { MNEM, OP (G), ' ', OP (DSP_16_U16), 0 } },
& ifmt_rorc16_b_16_dst16_16_16_absolute_QI, { 0x74df0000 }
},
+/* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x18 }
+ },
+/* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x1900 }
+ },
+/* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x1a00 }
+ },
+/* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x1b0000 }
+ },
/* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
{ 0, 0, 0, 0 },
@@ -31346,6 +31374,150 @@
{ { MNEM, ' ', OP (DSP_16_U24), 0 } },
& ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI, { 0xc7be0000 }
},
+/* mulu.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32RNPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1890f }
+ },
+/* mulu.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32ANPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1818f }
+ },
+/* mulu.l [$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1810f }
+ },
+/* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1830f00 }
+ },
+/* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1850f00 }
+ },
+/* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1870f00 }
+ },
+/* mulu.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1838f00 }
+ },
+/* mulu.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1858f00 }
+ },
+/* mulu.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x183cf00 }
+ },
+/* mulu.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x185cf00 }
+ },
+/* mulu.l ${Dsp-24-u16},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x187cf00 }
+ },
+/* mulu.l ${Dsp-24-u24},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1878f00 }
+ },
+/* mul.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32RNPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1891f }
+ },
+/* mul.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32ANPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1819f }
+ },
+/* mul.l [$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1811f }
+ },
+/* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1831f00 }
+ },
+/* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1851f00 }
+ },
+/* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1871f00 }
+ },
+/* mul.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1839f00 }
+ },
+/* mul.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1859f00 }
+ },
+/* mul.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x183df00 }
+ },
+/* mul.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x185df00 }
+ },
+/* mul.l ${Dsp-24-u16},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x187df00 }
+ },
+/* mul.l ${Dsp-24-u24},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1879f00 }
+ },
/* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
{ 0, 0, 0, 0 },
@@ -36534,43 +36706,43 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
- & ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x8 }
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x8 }
},
/* mov.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x900 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x900 }
},
/* mov.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0xa00 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0xa00 }
},
/* mov.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0xb0000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0xb0000 }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DST16RNQI_S), ',', OP (DSP_8_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x100 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x100 }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DST16RNQI_S), ',', OP (DSP_8_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x200 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x200 }
},
/* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DST16RNQI_S), ',', OP (DSP_8_U16), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0x30000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x30000 }
},
/* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
{
@@ -40376,113 +40548,113 @@
{ { MNEM, OP (Q), ' ', '#', OP (IMM_12_S4), ',', OP (DSP_16_U24), 0 } },
& ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI, { 0xf6a00000 }
},
-/* mov.w${Q} #${Imm-8-s4},$Dst16RnQI */
+/* mov.w${Q} #${Imm-8-s4},$Dst16RnHI */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_QI, { 0xd900 }
+ { { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNHI), 0 } },
+ & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI, { 0xd900 }
},
-/* mov.w${Q} #${Imm-8-s4},$Dst16AnQI */
+/* mov.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_QI, { 0xd904 }
+ { { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANHI), 0 } },
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI, { 0xd904 }
},
/* mov.w${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_QI, { 0xd906 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI, { 0xd906 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xd90800 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI, { 0xd90800 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xd90c0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI, { 0xd90c0000 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xd90a00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI, { 0xd90a00 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xd90e0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI, { 0xd90e0000 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xd90b00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI, { 0xd90b00 }
},
/* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_QI, { 0xd90f0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI, { 0xd90f0000 }
},
/* mov.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_QI, { 0xd800 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI, { 0xd800 }
},
/* mov.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_QI, { 0xd804 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI, { 0xd804 }
},
/* mov.b${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_QI, { 0xd806 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI, { 0xd806 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xd80800 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xd80800 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xd80c0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xd80c0000 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xd80a00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xd80a00 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xd80e0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xd80e0000 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xd80b00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xd80b00 }
},
/* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_QI, { 0xd80f0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI, { 0xd80f0000 }
},
/* mov.b${S} #${Imm-8-QI},r0l */
{
@@ -48834,25 +49006,25 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
- & ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x28 }
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x28 }
},
/* sub.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x2900 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x2900 }
},
/* sub.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x2a00 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x2a00 }
},
/* sub.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0x2b0000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x2b0000 }
},
/* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
@@ -55584,217 +55756,217 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32RNPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_Rn_direct_Prefixed_SI, { 0x1a92f }
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1a92f }
},
/* divx.l $Dst32AnPrefixedSI */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32ANPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_direct_Prefixed_SI, { 0x1a1af }
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1a1af }
},
/* divx.l [$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_indirect_Prefixed_SI, { 0x1a12f }
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1a12f }
},
/* divx.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_An_relative_Prefixed_SI, { 0x1a32f00 }
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1a32f00 }
},
/* divx.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_An_relative_Prefixed_SI, { 0x1a52f00 }
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1a52f00 }
},
/* divx.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_An_relative_Prefixed_SI, { 0x1a72f00 }
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1a72f00 }
},
/* divx.l ${Dsp-24-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a3af00 }
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a3af00 }
},
/* divx.l ${Dsp-24-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a5af00 }
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a5af00 }
},
/* divx.l ${Dsp-24-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3ef00 }
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3ef00 }
},
/* divx.l ${Dsp-24-s16}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5ef00 }
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5ef00 }
},
/* divx.l ${Dsp-24-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_absolute_Prefixed_SI, { 0x1a7ef00 }
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x1a7ef00 }
},
/* divx.l ${Dsp-24-u24} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_absolute_Prefixed_SI, { 0x1a7af00 }
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1a7af00 }
},
/* divu.l $Dst32RnPrefixedSI */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32RNPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_Rn_direct_Prefixed_SI, { 0x1a90f }
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1a90f }
},
/* divu.l $Dst32AnPrefixedSI */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32ANPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_direct_Prefixed_SI, { 0x1a18f }
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1a18f }
},
/* divu.l [$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_indirect_Prefixed_SI, { 0x1a10f }
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1a10f }
},
/* divu.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_An_relative_Prefixed_SI, { 0x1a30f00 }
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1a30f00 }
},
/* divu.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_An_relative_Prefixed_SI, { 0x1a50f00 }
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1a50f00 }
},
/* divu.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_An_relative_Prefixed_SI, { 0x1a70f00 }
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1a70f00 }
},
/* divu.l ${Dsp-24-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a38f00 }
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a38f00 }
},
/* divu.l ${Dsp-24-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a58f00 }
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a58f00 }
},
/* divu.l ${Dsp-24-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3cf00 }
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3cf00 }
},
/* divu.l ${Dsp-24-s16}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5cf00 }
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5cf00 }
},
/* divu.l ${Dsp-24-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_absolute_Prefixed_SI, { 0x1a7cf00 }
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x1a7cf00 }
},
/* divu.l ${Dsp-24-u24} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_absolute_Prefixed_SI, { 0x1a78f00 }
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1a78f00 }
},
/* div.l $Dst32RnPrefixedSI */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32RNPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_Rn_direct_Prefixed_SI, { 0x1a91f }
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1a91f }
},
/* div.l $Dst32AnPrefixedSI */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DST32ANPREFIXEDSI), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_direct_Prefixed_SI, { 0x1a19f }
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1a19f }
},
/* div.l [$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_An_indirect_Prefixed_SI, { 0x1a11f }
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1a11f }
},
/* div.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_An_relative_Prefixed_SI, { 0x1a31f00 }
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1a31f00 }
},
/* div.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_An_relative_Prefixed_SI, { 0x1a51f00 }
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1a51f00 }
},
/* div.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_An_relative_Prefixed_SI, { 0x1a71f00 }
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1a71f00 }
},
/* div.l ${Dsp-24-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a39f00 }
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1a39f00 }
},
/* div.l ${Dsp-24-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a59f00 }
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1a59f00 }
},
/* div.l ${Dsp-24-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3df00 }
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x1a3df00 }
},
/* div.l ${Dsp-24-s16}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5df00 }
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x1a5df00 }
},
/* div.l ${Dsp-24-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U16), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_16_absolute_Prefixed_SI, { 0x1a7df00 }
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x1a7df00 }
},
/* div.l ${Dsp-24-u24} */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (DSP_24_U24), 0 } },
- & ifmt_divx32_l_dst32_24_Prefixed_SI_dst32_24_24_absolute_Prefixed_SI, { 0x1a79f00 }
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1a79f00 }
},
/* divx.w $Dst32RnUnprefixedHI */
{
@@ -57750,25 +57922,25 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
- & ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x38 }
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x38 }
},
/* cmp.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x3900 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x3900 }
},
/* cmp.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x3a00 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x3a00 }
},
/* cmp.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0x3b0000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x3b0000 }
},
/* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
@@ -60648,109 +60820,109 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNHI), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_Rn_direct_HI, { 0xd100 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI, { 0xd100 }
},
/* cmp.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANHI), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_An_direct_HI, { 0xd104 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI, { 0xd104 }
},
/* cmp.w${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_An_indirect_HI, { 0xd106 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI, { 0xd106 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_An_relative_HI, { 0xd10800 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI, { 0xd10800 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_An_relative_HI, { 0xd10c0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI, { 0xd10c0000 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_SB_relative_HI, { 0xd10a00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI, { 0xd10a00 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_SB_relative_HI, { 0xd10e0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI, { 0xd10e0000 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_FB_relative_HI, { 0xd10b00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI, { 0xd10b00 }
},
/* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_absolute_HI, { 0xd10f0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI, { 0xd10f0000 }
},
/* cmp.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_QI, { 0xd000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI, { 0xd000 }
},
/* cmp.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_QI, { 0xd004 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI, { 0xd004 }
},
/* cmp.b${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_QI, { 0xd006 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI, { 0xd006 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xd00800 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xd00800 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xd00c0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xd00c0000 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xd00a00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xd00a00 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xd00e0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xd00e0000 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xd00b00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xd00b00 }
},
/* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_QI, { 0xd00f0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI, { 0xd00f0000 }
},
/* cmp.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
@@ -61598,76 +61770,76 @@
{ { MNEM, OP (X), ' ', OP (BITBASE16_16_U16), 0 } },
& ifmt_bxor16_X_bit16_16_bit16_16_16_absolute, { 0x7e0f0000 }
},
-/* btst${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITNO32UNPREFIXED), ',', OP (BIT32RNUNPREFIXED), 0 } },
+ { { MNEM, OP (G), ' ', OP (BITNO32UNPREFIXED), ',', OP (BIT32RNUNPREFIXED), 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed, { 0xd800 }
},
-/* btst${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITNO32UNPREFIXED), ',', OP (BIT32ANUNPREFIXED), 0 } },
+ { { MNEM, OP (G), ' ', OP (BITNO32UNPREFIXED), ',', OP (BIT32ANUNPREFIXED), 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed, { 0xd080 }
},
-/* btst${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
+/* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITNO32UNPREFIXED), ',', '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITNO32UNPREFIXED), ',', '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed, { 0xd000 }
},
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U11_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U11_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed, { 0xd20000 }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U19_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U19_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed, { 0xd4000000 }
},
-/* btst${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U27_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U27_UNPREFIXED), '[', OP (BIT32ANUNPREFIXED), ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed, { 0xd6000000 }
},
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U11_UNPREFIXED), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U11_UNPREFIXED), '[', 's', 'b', ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed, { 0xd28000 }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U19_UNPREFIXED), '[', 's', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U19_UNPREFIXED), '[', 's', 'b', ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed, { 0xd4800000 }
},
-/* btst${X} ${BitBase32-16-s11-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_S11_UNPREFIXED), '[', 'f', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_S11_UNPREFIXED), '[', 'f', 'b', ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed, { 0xd2c000 }
},
-/* btst${X} ${BitBase32-16-s19-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_S19_UNPREFIXED), '[', 'f', 'b', ']', 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_S19_UNPREFIXED), '[', 'f', 'b', ']', 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed, { 0xd4c00000 }
},
-/* btst${X} ${BitBase32-16-u19-Unprefixed} */
+/* btst${G} ${BitBase32-16-u19-Unprefixed} */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U19_UNPREFIXED), 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U19_UNPREFIXED), 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed, { 0xd6c00000 }
},
-/* btst${X} ${BitBase32-16-u27-Unprefixed} */
+/* btst${G} ${BitBase32-16-u27-Unprefixed} */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (X), ' ', OP (BITBASE32_16_U27_UNPREFIXED), 0 } },
+ { { MNEM, OP (G), ' ', OP (BITBASE32_16_U27_UNPREFIXED), 0 } },
& ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed, { 0xd6800000 }
},
/* btst${G} $Bitno16R,$Bit16Rn */
@@ -63204,25 +63376,25 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
- & ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x10 }
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x10 }
},
/* and.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x1100 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x1100 }
},
/* and.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x1200 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x1200 }
},
/* and.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0x130000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x130000 }
},
/* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
@@ -75018,25 +75190,25 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL), 0 } },
- & ifmt_mov16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x20 }
+ & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived, { 0x20 }
},
/* add.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U8), '[', 's', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x2100 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI, { 0x2100 }
},
/* add.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_S8), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x2200 }
+ & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI, { 0x2200 }
},
/* add.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (S), ' ', OP (DSP_8_U16), ',', OP (DST16RNQI_S), 0 } },
- & ifmt_mov16_b_S_src2_src16_2_S_16_absolute_QI, { 0x230000 }
+ & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI, { 0x230000 }
},
/* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
{
@@ -77988,109 +78160,109 @@
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNHI), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_Rn_direct_HI, { 0xc900 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI, { 0xc900 }
},
/* add.w${Q} #${Imm-8-s4},$Dst16AnHI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANHI), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_An_direct_HI, { 0xc904 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI, { 0xc904 }
},
/* add.w${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_An_indirect_HI, { 0xc906 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI, { 0xc906 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_An_relative_HI, { 0xc90800 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI, { 0xc90800 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_An_relative_HI, { 0xc90c0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI, { 0xc90c0000 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_SB_relative_HI, { 0xc90a00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI, { 0xc90a00 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_SB_relative_HI, { 0xc90e0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI, { 0xc90e0000 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_8_FB_relative_HI, { 0xc90b00 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI, { 0xc90b00 }
},
/* add.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_cmp16_w_imm4_Q_16_dst16_16_16_absolute_HI, { 0xc90f0000 }
+ & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI, { 0xc90f0000 }
},
/* add.b${Q} #${Imm-8-s4},$Dst16RnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16RNQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_QI, { 0xc800 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI, { 0xc800 }
},
/* add.b${Q} #${Imm-8-s4},$Dst16AnQI */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DST16ANQI), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_QI, { 0xc804 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI, { 0xc804 }
},
/* add.b${Q} #${Imm-8-s4},[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_QI, { 0xc806 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI, { 0xc806 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xc80800 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI, { 0xc80800 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', OP (DST16AN), ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xc80c0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI, { 0xc80c0000 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U8), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xc80a00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI, { 0xc80a00 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), '[', 's', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xc80e0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI, { 0xc80e0000 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_S8), '[', 'f', 'b', ']', 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xc80b00 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI, { 0xc80b00 }
},
/* add.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (Q), ' ', '#', OP (IMM_8_S4), ',', OP (DSP_16_U16), 0 } },
- & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_QI, { 0xc80f0000 }
+ & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI, { 0xc80f0000 }
},
/* add.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
{
@@ -78956,16 +79128,16 @@
{ { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), ',', 's', 'p', 0 } },
& ifmt_add32_l_imm16_G, { 0xb6130000 }
},
-/* dadc.b #${Imm-16-QI} */
+/* dadc.b #${Imm-16-QI},r0l */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_QI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_QI), ',', 'r', '0', 'l', 0 } },
& ifmt_add32_l_imm8_S, { 0x7cee00 }
},
-/* dadc.w #${Imm-16-HI} */
+/* dadc.w #${Imm-16-HI},r0 */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_HI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_HI), ',', 'r', '0', 0 } },
& ifmt_add32_l_imm16_G, { 0x7dee0000 }
},
/* dadc.b r0h,r0l */
@@ -78980,16 +79152,16 @@
{ { MNEM, ' ', 'r', '1', ',', 'r', '0', 0 } },
& ifmt_dadc16_b_r0h_r0l, { 0x7de6 }
},
-/* dadd.b #${Imm-16-QI} */
+/* dadd.b #${Imm-16-QI},r0l */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_QI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_QI), ',', 'r', '0', 'l', 0 } },
& ifmt_add32_l_imm8_S, { 0x7cec00 }
},
-/* dadd.w #${Imm-16-HI} */
+/* dadd.w #${Imm-16-HI},r0 */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_HI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_HI), ',', 'r', '0', 0 } },
& ifmt_add32_l_imm16_G, { 0x7dec0000 }
},
/* dadd.b r0h,r0l */
@@ -79034,6 +79206,12 @@
{ { MNEM, 0 } },
& ifmt_brk16, { 0x8 }
},
+/* btst:s ${Bit3-S},${Dsp-8-u16} */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (BIT3_S), ',', OP (DSP_8_U16), 0 } },
+ & ifmt_btst_s, { 0xa0000 }
+ },
/* dec.w ${Dst16An-S} */
{
{ 0, 0, 0, 0 },
@@ -79112,16 +79290,16 @@
{ { MNEM, ' ', '#', OP (IMM_16_HI), 0 } },
& ifmt_div32_w_Imm_16_HI, { 0xb2530000 }
},
-/* dsbb.b #${Imm-16-QI} */
+/* dsbb.b #${Imm-16-QI},r0l */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_QI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_QI), ',', 'r', '0', 'l', 0 } },
& ifmt_add32_l_imm8_S, { 0x7cef00 }
},
-/* dsbb.w #${Imm-16-HI} */
+/* dsbb.w #${Imm-16-HI},r0 */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_HI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_HI), ',', 'r', '0', 0 } },
& ifmt_add32_l_imm16_G, { 0x7def0000 }
},
/* dsbb.b r0h,r0l */
@@ -79136,16 +79314,16 @@
{ { MNEM, ' ', 'r', '1', ',', 'r', '0', 0 } },
& ifmt_dadc16_b_r0h_r0l, { 0x7de7 }
},
-/* dsub.b #${Imm-16-QI} */
+/* dsub.b #${Imm-16-QI},r0l */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_QI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_QI), ',', 'r', '0', 'l', 0 } },
& ifmt_add32_l_imm8_S, { 0x7ced00 }
},
-/* dsub.w #${Imm-16-HI} */
+/* dsub.w #${Imm-16-HI},r0 */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', OP (IMM_16_HI), 0 } },
+ { { MNEM, ' ', '#', OP (IMM_16_HI), ',', 'r', '0', 0 } },
& ifmt_add32_l_imm16_G, { 0x7ded0000 }
},
/* dsub.b r0h,r0l */
@@ -79562,10 +79740,10 @@
{ { MNEM, OP (G), ' ', '#', OP (IMM_16_HI), 0 } },
& ifmt_add32_l_imm16_G, { 0x7de20000 }
},
-/* push.b #Imm-8-QI */
+/* push.b #${Imm-8-QI} */
{
{ 0, 0, 0, 0 },
- { { MNEM, ' ', '#', 'I', 'm', 'm', '-', '8', '-', 'Q', 'I', 0 } },
+ { { MNEM, ' ', '#', OP (IMM_8_QI), 0 } },
& ifmt_jmps16, { 0xae00 }
},
/* push.w #${Imm-8-HI} */
@@ -79916,7 +80094,7 @@
/* add.b:q #${Imm-12-s4},sp */
{
-1, "add16-bQ-sp", "add.b:q", 16,
- { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
+ { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
},
};
Modified: branches/binutils/package/opcodes/m32c-opc.h
===================================================================
--- branches/binutils/package/opcodes/m32c-opc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32c-opc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -749,7 +749,8 @@
, M32C_INSN_POP16_W_16_DST16_16_16_AN_RELATIVE_HI, M32C_INSN_POP16_W_16_DST16_16_8_SB_RELATIVE_HI, M32C_INSN_POP16_W_16_DST16_16_16_SB_RELATIVE_HI, M32C_INSN_POP16_W_16_DST16_16_8_FB_RELATIVE_HI
, M32C_INSN_POP16_W_16_DST16_16_16_ABSOLUTE_HI, M32C_INSN_POP16_B_16_DST16_RN_DIRECT_QI, M32C_INSN_POP16_B_16_DST16_AN_DIRECT_QI, M32C_INSN_POP16_B_16_DST16_AN_INDIRECT_QI
, M32C_INSN_POP16_B_16_DST16_16_8_AN_RELATIVE_QI, M32C_INSN_POP16_B_16_DST16_16_16_AN_RELATIVE_QI, M32C_INSN_POP16_B_16_DST16_16_8_SB_RELATIVE_QI, M32C_INSN_POP16_B_16_DST16_16_16_SB_RELATIVE_QI
- , M32C_INSN_POP16_B_16_DST16_16_8_FB_RELATIVE_QI, M32C_INSN_POP16_B_16_DST16_16_16_ABSOLUTE_QI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI
+ , M32C_INSN_POP16_B_16_DST16_16_8_FB_RELATIVE_QI, M32C_INSN_POP16_B_16_DST16_16_16_ABSOLUTE_QI, M32C_INSN_OR16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI
+ , M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI
, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI
, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI
, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_16_AN_RELATIVE_UNPREFIXED_HI
@@ -1024,6 +1025,12 @@
, M32C_INSN_MULEX_DST32_R3_DIRECT_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI
, M32C_INSN_MULEX_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI
, M32C_INSN_MULEX_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_INSN_MULEX_DST32_16_24_ABSOLUTE_UNPREFIXED_HI
+ , M32C_INSN_MULU_L_DST32_RN_DIRECT_PREFIXED_SI, M32C_INSN_MULU_L_DST32_AN_DIRECT_PREFIXED_SI, M32C_INSN_MULU_L_DST32_AN_INDIRECT_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_8_AN_RELATIVE_PREFIXED_SI
+ , M32C_INSN_MULU_L_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_16_SB_RELATIVE_PREFIXED_SI
+ , M32C_INSN_MULU_L_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_INSN_MULU_L_DST32_24_24_ABSOLUTE_PREFIXED_SI
+ , M32C_INSN_MUL_L_DST32_RN_DIRECT_PREFIXED_SI, M32C_INSN_MUL_L_DST32_AN_DIRECT_PREFIXED_SI, M32C_INSN_MUL_L_DST32_AN_INDIRECT_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_8_AN_RELATIVE_PREFIXED_SI
+ , M32C_INSN_MUL_L_DST32_24_16_AN_RELATIVE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_24_AN_RELATIVE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_8_SB_RELATIVE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_16_SB_RELATIVE_PREFIXED_SI
+ , M32C_INSN_MUL_L_DST32_24_8_FB_RELATIVE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_16_FB_RELATIVE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_16_ABSOLUTE_PREFIXED_SI, M32C_INSN_MUL_L_DST32_24_24_ABSOLUTE_PREFIXED_SI
, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI
, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI
, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_SB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_MUL32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_FB_RELATIVE_UNPREFIXED_HI_DST32_24_8_AN_RELATIVE_UNPREFIXED_HI
@@ -1400,9 +1407,9 @@
, M32C_INSN_MOV32_W_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_QI
, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_QI
, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_QI, M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_QI
- , M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_RN_DIRECT_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_DIRECT_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_INDIRECT_QI
- , M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI
- , M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_AN_DIRECT_QI
+ , M32C_INSN_MOV32_B_IMM4_Q_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_RN_DIRECT_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_DIRECT_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_AN_INDIRECT_HI
+ , M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_AN_RELATIVE_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_AN_RELATIVE_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_SB_RELATIVE_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_SB_RELATIVE_HI
+ , M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_8_FB_RELATIVE_HI, M32C_INSN_MOV16_W_IMM4_Q_16_DST16_16_16_ABSOLUTE_HI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_RN_DIRECT_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_AN_DIRECT_QI
, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_AN_INDIRECT_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_AN_RELATIVE_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_AN_RELATIVE_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_SB_RELATIVE_QI
, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_SB_RELATIVE_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_8_FB_RELATIVE_QI, M32C_INSN_MOV16_B_IMM4_Q_16_DST16_16_16_ABSOLUTE_QI, M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_R0L_DIRECT_QI
, M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_R0H_DIRECT_QI, M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_8_SB_RELATIVE_QI, M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_8_FB_RELATIVE_QI, M32C_INSN_MOV16_B_S_IMM8_DST3_DST16_3_S_16_16_ABSOLUTE_QI
@@ -2284,10 +2291,10 @@
, M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED
, M32C_INSN_BTSTC32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_RN_DIRECT, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_AN_DIRECT, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_AN_INDIRECT
, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_AN_RELATIVE, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_AN_RELATIVE, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_SB_RELATIVE, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_SB_RELATIVE
- , M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_ABSOLUTE, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED
- , M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED
- , M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED
- , M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_RN_DIRECT, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_AN_DIRECT
+ , M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_8_FB_RELATIVE, M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_ABSOLUTE, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED
+ , M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED
+ , M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED
+ , M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_RN_DIRECT, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_AN_DIRECT
, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_AN_RELATIVE, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_SB_RELATIVE, M32C_INSN_BTST16_G_BIT16_16_8_BIT16_16_8_FB_RELATIVE, M32C_INSN_BTST16_S_BIT16_11_S_BIT16_11_SB_RELATIVE_S
, M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_AN_RELATIVE, M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_SB_RELATIVE, M32C_INSN_BTST16_G_BIT16_16_16_BIT16_16_16_ABSOLUTE, M32C_INSN_BTST16_G_BIT16_16_BASIC_BIT16_AN_INDIRECT
, M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, M32C_INSN_BSET32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED
@@ -3011,41 +3018,42 @@
, M32C_INSN_DADC16_W_IMM16, M32C_INSN_DADC16_B_R0H_R0L, M32C_INSN_DADC16_W_R1_R0, M32C_INSN_DADD16_B_IMM8
, M32C_INSN_DADD16_W_IMM16, M32C_INSN_DADD16_B_R0H_R0L, M32C_INSN_DADD16_W_R1_R0, M32C_INSN_BM16_C
, M32C_INSN_BM32_C, M32C_INSN_BRK16, M32C_INSN_BRK32, M32C_INSN_BRK232
- , M32C_INSN_DEC16_W, M32C_INSN_DIV16_B_IMM_16_QI, M32C_INSN_DIV16_W_IMM_16_HI, M32C_INSN_DIV32_B_IMM_16_QI
- , M32C_INSN_DIV32_W_IMM_16_HI, M32C_INSN_DIVU16_B_IMM_16_QI, M32C_INSN_DIVU16_W_IMM_16_HI, M32C_INSN_DIVU32_B_IMM_16_QI
- , M32C_INSN_DIVU32_W_IMM_16_HI, M32C_INSN_DIVX16_B_IMM_16_QI, M32C_INSN_DIVX16_W_IMM_16_HI, M32C_INSN_DIVX32_B_IMM_16_QI
- , M32C_INSN_DIVX32_W_IMM_16_HI, M32C_INSN_DSBB16_B_IMM8, M32C_INSN_DSBB16_W_IMM16, M32C_INSN_DSBB16_B_R0H_R0L
- , M32C_INSN_DSBB16_W_R1_R0, M32C_INSN_DSUB16_B_IMM8, M32C_INSN_DSUB16_W_IMM16, M32C_INSN_DSUB16_B_R0H_R0L
- , M32C_INSN_DSUB16_W_R1_R0, M32C_INSN_ENTER16, M32C_INSN_EXITD16, M32C_INSN_ENTER32
- , M32C_INSN_EXITD32, M32C_INSN_FCLR16, M32C_INSN_FSET16, M32C_INSN_FCLR
- , M32C_INSN_FSET, M32C_INSN_INC16_W, M32C_INSN_FREIT32, M32C_INSN_INT16
- , M32C_INSN_INTO16, M32C_INSN_INT32, M32C_INSN_INTO32, M32C_INSN_JCND16_5
- , M32C_INSN_JCND16, M32C_INSN_JCND32, M32C_INSN_JMP16_S, M32C_INSN_JMP16_B
- , M32C_INSN_JMP16_W, M32C_INSN_JMP16_A, M32C_INSN_JMPS16, M32C_INSN_JMP32_S
- , M32C_INSN_JMP32_B, M32C_INSN_JMP32_W, M32C_INSN_JMP32_A, M32C_INSN_JMPS32
- , M32C_INSN_JSR16_W, M32C_INSN_JSR16_A, M32C_INSN_JSR32_W, M32C_INSN_JSR32_A
- , M32C_INSN_JSRS16, M32C_INSN_JSRS, M32C_INSN_LDC16_IMM16, M32C_INSN_LDC32_IMM16_CR1
- , M32C_INSN_LDC32_IMM16_CR2, M32C_INSN_LDC32_IMM16_CR3, M32C_INSN_LDCTX16, M32C_INSN_LDCTX32
- , M32C_INSN_STCTX16, M32C_INSN_STCTX32, M32C_INSN_LDIPL16_IMM, M32C_INSN_LDIPL32_IMM
- , M32C_INSN_MOV16_B_S_IMM_A0, M32C_INSN_MOV16_B_S_IMM_A1, M32C_INSN_MOV16_W_S_IMM_A0, M32C_INSN_MOV16_W_S_IMM_A1
- , M32C_INSN_MOV32_W_A0, M32C_INSN_MOV32_W_A1, M32C_INSN_MOV32_L_A0, M32C_INSN_MOV32_L_A1
- , M32C_INSN_MOV16_B_S_R0L_A1, M32C_INSN_MOV16_B_S_R0H_A0, M32C_INSN_NOP16, M32C_INSN_NOP32
- , M32C_INSN_POPC16_IMM16, M32C_INSN_POPC32_IMM16_CR1, M32C_INSN_POPC32_IMM16_CR2, M32C_INSN_PUSHC16_IMM16
- , M32C_INSN_PUSHC32_IMM16_CR1, M32C_INSN_PUSHC32_IMM16_CR2, M32C_INSN_POPM16, M32C_INSN_PUSHM16
- , M32C_INSN_POPM, M32C_INSN_PUSHM, M32C_INSN_PUSH16_B_G_IMM, M32C_INSN_PUSH16_W_G_IMM
- , M32C_INSN_PUSH32_B_IMM, M32C_INSN_PUSH32_W_IMM, M32C_INSN_PUSH32_L_IMM, M32C_INSN_REIT16
- , M32C_INSN_REIT32, M32C_INSN_RMPA16_B, M32C_INSN_RMPA16_W, M32C_INSN_RMPA32_B
- , M32C_INSN_RMPA32_W, M32C_INSN_RTS16, M32C_INSN_RTS32, M32C_INSN_SCMPU_B
- , M32C_INSN_SCMPU_W, M32C_INSN_SHA16_L_IMM_R2R0, M32C_INSN_SHA16_L_IMM_R3R1, M32C_INSN_SHA16_L_R1H_R2R0
- , M32C_INSN_SHA16_L_R1H_R3R1, M32C_INSN_SHL16_L_IMM_R2R0, M32C_INSN_SHL16_L_IMM_R3R1, M32C_INSN_SHL16_L_R1H_R2R0
- , M32C_INSN_SHL16_L_R1H_R3R1, M32C_INSN_SIN32_B, M32C_INSN_SIN32_W, M32C_INSN_SMOVB16_B
- , M32C_INSN_SMOVB16_W, M32C_INSN_SMOVB32_B, M32C_INSN_SMOVB32_W, M32C_INSN_SMOVF16_B
- , M32C_INSN_SMOVF16_W, M32C_INSN_SMOVF32_B, M32C_INSN_SMOVF32_W, M32C_INSN_SMOVU_B
- , M32C_INSN_SMOVU_W, M32C_INSN_SOUT_B, M32C_INSN_SOUT_W, M32C_INSN_SSTR16_B
- , M32C_INSN_SSTR16_W, M32C_INSN_SSTR_B, M32C_INSN_SSTR_W, M32C_INSN_STZX16_IMM8_IMM8_R0H
- , M32C_INSN_STZX16_IMM8_IMM8_R0L, M32C_INSN_STZX16_IMM8_IMM8_DSP8SB, M32C_INSN_STZX16_IMM8_IMM8_DSP8FB, M32C_INSN_STZX16_IMM8_IMM8_ABS16
- , M32C_INSN_UND16, M32C_INSN_UND32, M32C_INSN_WAIT16, M32C_INSN_WAIT
- , M32C_INSN_EXTS16_W_R0, M32C_INSN_SRCIND, M32C_INSN_DESTIND, M32C_INSN_SRCDESTIND
+ , M32C_INSN_BTST_S, M32C_INSN_DEC16_W, M32C_INSN_DIV16_B_IMM_16_QI, M32C_INSN_DIV16_W_IMM_16_HI
+ , M32C_INSN_DIV32_B_IMM_16_QI, M32C_INSN_DIV32_W_IMM_16_HI, M32C_INSN_DIVU16_B_IMM_16_QI, M32C_INSN_DIVU16_W_IMM_16_HI
+ , M32C_INSN_DIVU32_B_IMM_16_QI, M32C_INSN_DIVU32_W_IMM_16_HI, M32C_INSN_DIVX16_B_IMM_16_QI, M32C_INSN_DIVX16_W_IMM_16_HI
+ , M32C_INSN_DIVX32_B_IMM_16_QI, M32C_INSN_DIVX32_W_IMM_16_HI, M32C_INSN_DSBB16_B_IMM8, M32C_INSN_DSBB16_W_IMM16
+ , M32C_INSN_DSBB16_B_R0H_R0L, M32C_INSN_DSBB16_W_R1_R0, M32C_INSN_DSUB16_B_IMM8, M32C_INSN_DSUB16_W_IMM16
+ , M32C_INSN_DSUB16_B_R0H_R0L, M32C_INSN_DSUB16_W_R1_R0, M32C_INSN_ENTER16, M32C_INSN_EXITD16
+ , M32C_INSN_ENTER32, M32C_INSN_EXITD32, M32C_INSN_FCLR16, M32C_INSN_FSET16
+ , M32C_INSN_FCLR, M32C_INSN_FSET, M32C_INSN_INC16_W, M32C_INSN_FREIT32
+ , M32C_INSN_INT16, M32C_INSN_INTO16, M32C_INSN_INT32, M32C_INSN_INTO32
+ , M32C_INSN_JCND16_5, M32C_INSN_JCND16, M32C_INSN_JCND32, M32C_INSN_JMP16_S
+ , M32C_INSN_JMP16_B, M32C_INSN_JMP16_W, M32C_INSN_JMP16_A, M32C_INSN_JMPS16
+ , M32C_INSN_JMP32_S, M32C_INSN_JMP32_B, M32C_INSN_JMP32_W, M32C_INSN_JMP32_A
+ , M32C_INSN_JMPS32, M32C_INSN_JSR16_W, M32C_INSN_JSR16_A, M32C_INSN_JSR32_W
+ , M32C_INSN_JSR32_A, M32C_INSN_JSRS16, M32C_INSN_JSRS, M32C_INSN_LDC16_IMM16
+ , M32C_INSN_LDC32_IMM16_CR1, M32C_INSN_LDC32_IMM16_CR2, M32C_INSN_LDC32_IMM16_CR3, M32C_INSN_LDCTX16
+ , M32C_INSN_LDCTX32, M32C_INSN_STCTX16, M32C_INSN_STCTX32, M32C_INSN_LDIPL16_IMM
+ , M32C_INSN_LDIPL32_IMM, M32C_INSN_MOV16_B_S_IMM_A0, M32C_INSN_MOV16_B_S_IMM_A1, M32C_INSN_MOV16_W_S_IMM_A0
+ , M32C_INSN_MOV16_W_S_IMM_A1, M32C_INSN_MOV32_W_A0, M32C_INSN_MOV32_W_A1, M32C_INSN_MOV32_L_A0
+ , M32C_INSN_MOV32_L_A1, M32C_INSN_MOV16_B_S_R0L_A1, M32C_INSN_MOV16_B_S_R0H_A0, M32C_INSN_NOP16
+ , M32C_INSN_NOP32, M32C_INSN_POPC16_IMM16, M32C_INSN_POPC32_IMM16_CR1, M32C_INSN_POPC32_IMM16_CR2
+ , M32C_INSN_PUSHC16_IMM16, M32C_INSN_PUSHC32_IMM16_CR1, M32C_INSN_PUSHC32_IMM16_CR2, M32C_INSN_POPM16
+ , M32C_INSN_PUSHM16, M32C_INSN_POPM, M32C_INSN_PUSHM, M32C_INSN_PUSH16_B_G_IMM
+ , M32C_INSN_PUSH16_W_G_IMM, M32C_INSN_PUSH32_B_IMM, M32C_INSN_PUSH32_W_IMM, M32C_INSN_PUSH32_L_IMM
+ , M32C_INSN_REIT16, M32C_INSN_REIT32, M32C_INSN_RMPA16_B, M32C_INSN_RMPA16_W
+ , M32C_INSN_RMPA32_B, M32C_INSN_RMPA32_W, M32C_INSN_RTS16, M32C_INSN_RTS32
+ , M32C_INSN_SCMPU_B, M32C_INSN_SCMPU_W, M32C_INSN_SHA16_L_IMM_R2R0, M32C_INSN_SHA16_L_IMM_R3R1
+ , M32C_INSN_SHA16_L_R1H_R2R0, M32C_INSN_SHA16_L_R1H_R3R1, M32C_INSN_SHL16_L_IMM_R2R0, M32C_INSN_SHL16_L_IMM_R3R1
+ , M32C_INSN_SHL16_L_R1H_R2R0, M32C_INSN_SHL16_L_R1H_R3R1, M32C_INSN_SIN32_B, M32C_INSN_SIN32_W
+ , M32C_INSN_SMOVB16_B, M32C_INSN_SMOVB16_W, M32C_INSN_SMOVB32_B, M32C_INSN_SMOVB32_W
+ , M32C_INSN_SMOVF16_B, M32C_INSN_SMOVF16_W, M32C_INSN_SMOVF32_B, M32C_INSN_SMOVF32_W
+ , M32C_INSN_SMOVU_B, M32C_INSN_SMOVU_W, M32C_INSN_SOUT_B, M32C_INSN_SOUT_W
+ , M32C_INSN_SSTR16_B, M32C_INSN_SSTR16_W, M32C_INSN_SSTR_B, M32C_INSN_SSTR_W
+ , M32C_INSN_STZX16_IMM8_IMM8_R0H, M32C_INSN_STZX16_IMM8_IMM8_R0L, M32C_INSN_STZX16_IMM8_IMM8_DSP8SB, M32C_INSN_STZX16_IMM8_IMM8_DSP8FB
+ , M32C_INSN_STZX16_IMM8_IMM8_ABS16, M32C_INSN_UND16, M32C_INSN_UND32, M32C_INSN_WAIT16
+ , M32C_INSN_WAIT, M32C_INSN_EXTS16_W_R0, M32C_INSN_SRCIND, M32C_INSN_DESTIND
+ , M32C_INSN_SRCDESTIND
} CGEN_INSN_TYPE;
/* Index of `invalid' insn place holder. */
Modified: branches/binutils/package/opcodes/m32r-ibld.c
===================================================================
--- branches/binutils/package/opcodes/m32r-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m32r-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/m68k-dis.c
===================================================================
--- branches/binutils/package/opcodes/m68k-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m68k-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Print Motorola 68k instructions.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify
@@ -1396,58 +1396,9 @@
/* Error return. */
return -1;
- switch (info->mach)
- {
- default:
- case 0:
- arch_mask = (unsigned int) -1;
- break;
- case bfd_mach_m68000:
- arch_mask = m68000|m68881|m68851;
- break;
- case bfd_mach_m68008:
- arch_mask = m68008|m68881|m68851;
- break;
- case bfd_mach_m68010:
- arch_mask = m68010|m68881|m68851;
- break;
- case bfd_mach_m68020:
- arch_mask = m68020|m68881|m68851;
- break;
- case bfd_mach_m68030:
- arch_mask = m68030|m68881|m68851;
- break;
- case bfd_mach_m68040:
- arch_mask = m68040|m68881|m68851;
- break;
- case bfd_mach_m68060:
- arch_mask = m68060|m68881|m68851;
- break;
- case bfd_mach_mcf5200:
- arch_mask = mcfisa_a;
- break;
- case bfd_mach_mcf521x:
- case bfd_mach_mcf528x:
- arch_mask = mcfisa_a|mcfhwdiv|mcfisa_aa|mcfusp|mcfemac;
- break;
- case bfd_mach_mcf5206e:
- arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
- break;
- case bfd_mach_mcf5249:
- arch_mask = mcfisa_a|mcfhwdiv|mcfemac;
- break;
- case bfd_mach_mcf5307:
- arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
- break;
- case bfd_mach_mcf5407:
- arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac;
- break;
- case bfd_mach_mcf547x:
- case bfd_mach_mcf548x:
- case bfd_mach_mcfv4e:
- arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfemac;
- break;
- }
+ arch_mask = bfd_m68k_mach_to_features (info->mach);
+ if (!arch_mask)
+ arch_mask = ~(unsigned int)0;
FETCH_DATA (info, buffer + 2);
major_opcode = (buffer[0] >> 4) & 15;
Modified: branches/binutils/package/opcodes/m68k-opc.c
===================================================================
--- branches/binutils/package/opcodes/m68k-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/m68k-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
/* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2003, 2004, 2005
+ 2000, 2001, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This file is part of GDB, GAS, and the GNU binutils.
@@ -390,7 +390,7 @@
{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabsp", 4, two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
-{"fsabss", 4, two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
@@ -407,7 +407,7 @@
{"fdabsl", 4, two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsl", 4, two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
{"fdabsp", 4, two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
-{"fdabss", 4, two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdabss", 4, two(0xF000, 0x445C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabss", 4, two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
{"fdabsw", 4, two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsw", 4, two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
@@ -443,30 +443,30 @@
{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
-{"fsaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fsaddd", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddp", 4, two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fsadds", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddx", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsaddx", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
-{"fdaddb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fdaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
-{"fdaddd", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
-{"fdaddl", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdaddp", 4, two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fdadds", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
-{"fdaddw", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdaddx", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdaddx", 4, two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
@@ -1206,6 +1206,7 @@
{"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fdsqrtd", 4, two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdsqrtd", 4, two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsqrtp", 4, two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
@@ -1233,7 +1234,7 @@
{"fsubx", 4, two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat },
-{"fssubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fssubd", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
@@ -1249,17 +1250,17 @@
{"fssubx", 4, two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up },
-{"fdsubb", 4, two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
-{"fdsubd", 4, two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
-{"fdsubd", 4, two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fdsubd", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
-{"fdsubl", 4, two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdsubp", 4, two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
-{"fdsubs", 4, two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fdsubw", 4, two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdsubx", 4, two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
Modified: branches/binutils/package/opcodes/mips-opc.c
===================================================================
--- branches/binutils/package/opcodes/mips-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mips-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -169,7 +169,7 @@
instruction name anyhow. */
/* name, args, match, mask, pinfo, pinfo2, membership */
{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, 0, I4|I32|G3 },
-{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, 0, I4 },
+{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, 0, I4|I33 },
{"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */
{"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS, I32|N55 }, /* sll */
{"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS, I33 }, /* sll */
@@ -460,9 +460,9 @@
{"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, 0, M3D },
{"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, 0, M3D },
{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, 0, I3|I32|T3},
-{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
-{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 },
+{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
+{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 },
{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, 0, I1 },
{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, 0, I1 },
@@ -482,20 +482,20 @@
{"cttc1", "t,g", 0x41800023, 0xffe007ff, TRAP|COD|RD_t|WR_CC|FP_S, 0, MT32 },
{"cttc1", "t,S", 0x41800023, 0xffe007ff, TRAP|COD|RD_t|WR_CC|FP_S, 0, MT32 },
{"cttc2", "t,g", 0x41800025, 0xffe007ff, TRAP|COD|RD_t|WR_CC, 0, MT32 },
-{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, 0, I1 },
-{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, 0, I1 },
-{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
-{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
+{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I1 },
+{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I1 },
+{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S|FP_S, 0, I3|I33 },
+{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S|FP_S, 0, I3|I33 },
{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I1 },
{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, 0, I1 },
{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I5 },
{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I5 },
-{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, 0, I1 },
+{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I1 },
{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, 0, I1 },
{"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, M3D },
-{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, 0, I5 },
+{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_S|FP_D, 0, I5 },
{"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, M3D },
{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3 },
{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 },
@@ -567,10 +567,10 @@
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, 0, I3 },
{"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 },
{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 },
-{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I3 },
-{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I3 },
-{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I3 },
-{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I3 },
+{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_D, 0, I3 },
+{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_D, 0, I3 },
+{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_D, 0, I3 },
+{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_D, 0, I3 },
/* dmfc2 is at the bottom of the table. */
/* dmtc2 is at the bottom of the table. */
{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, 0, I3 },
@@ -638,9 +638,9 @@
{"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
{"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33 },
-{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
-{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 },
+{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S|FP_S, 0, I3|I33 },
+{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 },
{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
{"flushi", "", 0xbc010000, 0xffffffff, 0, 0, L1 },
{"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1 },
@@ -695,7 +695,7 @@
{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3 },
{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, 0, I3 },
{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3 },
-{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, 0, I4 },
+{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b|FP_D, 0, I4|I33 },
{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1 },
{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, 0, I1 },
{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1 },
@@ -736,7 +736,7 @@
{"fork", "d,s,t", 0x7c000008, 0xfc0007ff, TRAP|WR_d|RD_s|RD_t, 0, MT32 },
{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, 0, I3 },
{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3 },
-{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, 0, I4 },
+{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b|FP_D, 0, I4|I33 },
{"macc", "d,s,t", 0x00000028, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N412 },
{"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N5 },
{"maccs", "d,s,t", 0x00000428, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N412 },
@@ -751,8 +751,8 @@
{"maccus", "d,s,t", 0x00000468, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N412 },
{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, P3 },
{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, P3 },
-{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4 },
-{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4 },
+{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4|I33 },
+{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 },
{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5 },
{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 },
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55},
@@ -793,8 +793,8 @@
{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I32 },
{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I1 },
{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I1 },
-{"mfhc1", "t,S", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I33 },
-{"mfhc1", "t,G", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, 0, I33 },
+{"mfhc1", "t,S", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_D, 0, I33 },
+{"mfhc1", "t,G", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_D, 0, I33 },
/* mfc2 is at the bottom of the table. */
/* mfhc2 is at the bottom of the table. */
{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, 0, I1 },
@@ -812,7 +812,7 @@
{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, 0, I1 },
{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, 0, I1 },
{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, 0, I5 },
-{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, 0, I4|I32},
+{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_S|FP_D, 0, I4|I32 },
{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, I4|I32 },
{"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 },
{"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 },
@@ -825,7 +825,7 @@
{"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, MX|SB1 },
{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, 0, I4|I32 },
{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, I5 },
-{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, 0, I4|I32 },
+{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_S|FP_D, 0, I4|I32 },
{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, I4|I32 },
{"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 },
{"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 },
@@ -844,8 +844,8 @@
{"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N5 },
/* move is at the top of the table. */
{"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX },
-{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4 },
-{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4 },
+{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4|I33 },
+{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 },
{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5 },
{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 },
{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55 },
@@ -858,8 +858,8 @@
{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I32 },
{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I1 },
{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I1 },
-{"mthc1", "t,S", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I33 },
-{"mthc1", "t,G", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, 0, I33 },
+{"mthc1", "t,S", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_D, 0, I33 },
+{"mthc1", "t,G", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_D, 0, I33 },
/* mtc2 is at the bottom of the table. */
/* mthc2 is at the bottom of the table. */
{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, 0, I1 },
@@ -940,11 +940,11 @@
{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, 0, I1 },
{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, 0, I1 },
{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D, 0, I5 },
-{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4 },
-{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4 },
+{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4|I33 },
+{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 },
{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5 },
-{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4 },
-{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4 },
+{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4|I33 },
+{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 },
{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5 },
/* nop is at the start of the table. */
{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 },
@@ -990,9 +990,9 @@
{"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_D|FP_D, RD_MACC, MX|SB1 },
{"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D, 0, N54 },
{"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_D|FP_D, RD_MACC, MX },
-{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, 0, I4 },
+{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, 0, I4|I33 },
{"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D|RD_S|FP_D, 0, SB1 },
-{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, 0, I4 },
+{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, 0, I4|I33 },
{"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D|RD_S|FP_D, 0, M3D },
{"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D|RD_S|FP_S, 0, M3D },
{"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D|RD_S|FP_S, 0, M3D },
@@ -1025,13 +1025,13 @@
{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I33 },
{"rotr", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I33 },
{"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I33 },
-{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
-{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 },
+{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3 },
+{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 },
{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
-{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, 0, I4 },
+{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, 0, I4|I33 },
{"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D|RD_S|FP_D, 0, SB1 },
-{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, 0, I4 },
+{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, 0, I4|I33 },
{"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D|RD_S|FP_D, 0, M3D },
{"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D|RD_S|FP_S, 0, M3D },
{"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D|RD_S|FP_S, 0, M3D },
@@ -1071,7 +1071,7 @@
{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3 },
{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 },
{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3 },
-{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, 0, I4 },
+{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_D, 0, I4|I33 },
{"seb", "d,w", 0x7c000420, 0xffe007ff, WR_d|RD_t, 0, I33 },
{"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d|RD_t, 0, I33 },
{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, 0, L1 },
@@ -1177,7 +1177,7 @@
{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1 },
{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, 0, I2 }, /* same */
{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, 0, I2 }, /* as swr */
-{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, 0, I4 },
+{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_S, 0, I4|I33 },
{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2|G1 },
{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 },
{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2 },
@@ -1218,10 +1218,10 @@
{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, 0, I2 },
{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, 0, I2 }, /* tnei */
{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, 0, I2 },
-{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, 0, I3 },
-{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, 0, I3 },
-{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 },
-{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 },
+{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
+{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
+{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 },
+{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 },
{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, 0, I1 },
{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
Added: branches/binutils/package/opcodes/mt-asm.c
===================================================================
--- branches/binutils/package/opcodes/mt-asm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-asm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,989 @@
+/* Assembler interface for targets using CGEN. -*- C -*-
+ CGEN: Cpu tools GENerator
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-asm.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "mt-desc.h"
+#include "mt-opc.h"
+#include "opintl.h"
+#include "xregex.h"
+#include "libiberty.h"
+#include "safe-ctype.h"
+
+#undef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#undef max
+#define max(a,b) ((a) > (b) ? (a) : (b))
+
+static const char * parse_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
+
+/* -- assembler routines inserted here. */
+
+/* -- asm.c */
+/* Range checking for signed numbers. Returns 0 if acceptable
+ and 1 if the value is out of bounds for a signed quantity. */
+
+static int
+signed_out_of_bounds (long val)
+{
+ if ((val < -32768) || (val > 32767))
+ return 1;
+ return 0;
+}
+
+static const char *
+parse_loopsize (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ void *arg)
+{
+ signed long * valuep = (signed long *) arg;
+ const char *errmsg;
+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
+ enum cgen_parse_operand_result result_type;
+ bfd_vma value;
+
+ /* Is it a control transfer instructions? */
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_LOOPSIZE)
+ {
+ code = BFD_RELOC_MT_PCINSN8;
+ errmsg = cgen_parse_address (cd, strp, opindex, code,
+ & result_type, & value);
+ *valuep = value;
+ return errmsg;
+ }
+
+ abort ();
+}
+
+static const char *
+parse_imm16 (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ void *arg)
+{
+ signed long * valuep = (signed long *) arg;
+ const char *errmsg;
+ enum cgen_parse_operand_result result_type;
+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
+ bfd_vma value;
+
+ /* Is it a control transfer instructions? */
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16O)
+ {
+ code = BFD_RELOC_16_PCREL;
+ errmsg = cgen_parse_address (cd, strp, opindex, code,
+ & result_type, & value);
+ if (errmsg == NULL)
+ {
+ if (signed_out_of_bounds (value))
+ errmsg = _("Operand out of range. Must be between -32768 and 32767.");
+ }
+ *valuep = value;
+ return errmsg;
+ }
+
+ /* If it's not a control transfer instruction, then
+ we have to check for %OP relocating operators. */
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16L)
+ ;
+ else if (strncmp (*strp, "%hi16", 5) == 0)
+ {
+ *strp += 5;
+ code = BFD_RELOC_HI16;
+ }
+ else if (strncmp (*strp, "%lo16", 5) == 0)
+ {
+ *strp += 5;
+ code = BFD_RELOC_LO16;
+ }
+
+ /* If we found a %OP relocating operator, then parse it as an address.
+ If not, we need to parse it as an integer, either signed or unsigned
+ depending on which operand type we have. */
+ if (code != BFD_RELOC_NONE)
+ {
+ /* %OP relocating operator found. */
+ errmsg = cgen_parse_address (cd, strp, opindex, code,
+ & result_type, & value);
+ if (errmsg == NULL)
+ {
+ switch (result_type)
+ {
+ case (CGEN_PARSE_OPERAND_RESULT_NUMBER):
+ if (code == BFD_RELOC_HI16)
+ value = (value >> 16) & 0xFFFF;
+ else if (code == BFD_RELOC_LO16)
+ value = value & 0xFFFF;
+ else
+ errmsg = _("Biiiig Trouble in parse_imm16!");
+ break;
+
+ case (CGEN_PARSE_OPERAND_RESULT_QUEUED):
+ /* No special processing for this case. */
+ break;
+
+ default:
+ errmsg = _("%operator operand is not a symbol");
+ break;
+ }
+ }
+ *valuep = value;
+ }
+ else
+ {
+ /* Parse hex values like 0xffff as unsigned, and sign extend
+ them manually. */
+ int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MT_OPERAND_IMM16);
+
+ if ((*strp)[0] == '0'
+ && ((*strp)[1] == 'x' || (*strp)[1] == 'X'))
+ parse_signed = 0;
+
+ /* No relocating operator. Parse as an number. */
+ if (parse_signed)
+ {
+ /* Parse as as signed integer. */
+
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep);
+
+ if (errmsg == NULL)
+ {
+#if 0
+ /* Manual range checking is needed for the signed case. */
+ if (*valuep & 0x8000)
+ value = 0xffff0000 | *valuep;
+ else
+ value = *valuep;
+
+ if (signed_out_of_bounds (value))
+ errmsg = _("Operand out of range. Must be between -32768 and 32767.");
+ /* Truncate to 16 bits. This is necessary
+ because cgen will have sign extended *valuep. */
+ *valuep &= 0xFFFF;
+#endif
+ }
+ }
+ else
+ {
+ /* MT_OPERAND_IMM16Z. Parse as an unsigned integer. */
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep);
+
+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16
+ && *valuep >= 0x8000
+ && *valuep <= 0xffff)
+ *valuep -= 0x10000;
+ }
+ }
+
+ return errmsg;
+}
+
+
+static const char *
+parse_dup (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "dup", 3) == 0 || strncmp (*strp, "DUP", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "xx", 2) == 0 || strncmp (*strp, "XX", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 0;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+
+static const char *
+parse_ball (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "all", 3) == 0 || strncmp (*strp, "ALL", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "one", 3) == 0 || strncmp (*strp, "ONE", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 0;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+static const char *
+parse_xmode (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "pm", 2) == 0 || strncmp (*strp, "PM", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "xm", 2) == 0 || strncmp (*strp, "XM", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 0;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+static const char *
+parse_rc (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "r", 1) == 0 || strncmp (*strp, "R", 1) == 0)
+ {
+ *strp += 1;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "c", 1) == 0 || strncmp (*strp, "C", 1) == 0)
+ {
+ *strp += 1;
+ *valuep = 0;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+static const char *
+parse_cbrb (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "rb", 2) == 0 || strncmp (*strp, "RB", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "cb", 2) == 0 || strncmp (*strp, "CB", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 0;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+static const char *
+parse_rbbc (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "rt", 2) == 0 || strncmp (*strp, "RT", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 0;
+ }
+ else if (strncmp (*strp, "br1", 3) == 0 || strncmp (*strp, "BR1", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "br2", 3) == 0 || strncmp (*strp, "BR2", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 2;
+ }
+ else if (strncmp (*strp, "cs", 2) == 0 || strncmp (*strp, "CS", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 3;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ return errmsg;
+}
+
+static const char *
+parse_type (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex,
+ unsigned long *valuep)
+{
+ const char *errmsg = NULL;
+
+ if (strncmp (*strp, "odd", 3) == 0 || strncmp (*strp, "ODD", 3) == 0)
+ {
+ *strp += 3;
+ *valuep = 0;
+ }
+ else if (strncmp (*strp, "even", 4) == 0 || strncmp (*strp, "EVEN", 4) == 0)
+ {
+ *strp += 4;
+ *valuep = 1;
+ }
+ else if (strncmp (*strp, "oe", 2) == 0 || strncmp (*strp, "OE", 2) == 0)
+ {
+ *strp += 2;
+ *valuep = 2;
+ }
+ else
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
+
+ if ((errmsg == NULL) && (*valuep == 3))
+ errmsg = _("invalid operand. type may have values 0,1,2 only.");
+
+ return errmsg;
+}
+
+/* -- dis.c */
+
+const char * mt_cgen_parse_operand
+ (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
+
+/* Main entry point for operand parsing.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `parse_insn_normal', but keeping it
+ separate makes clear the interface between `parse_insn_normal' and each of
+ the handlers. */
+
+const char *
+mt_cgen_parse_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ const char ** strp,
+ CGEN_FIELDS * fields)
+{
+ const char * errmsg = NULL;
+ /* Used by scalar operands that still need to be parsed. */
+ long junk ATTRIBUTE_UNUSED;
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_A23, (unsigned long *) (& fields->f_a23));
+ break;
+ case MT_OPERAND_BALL :
+ errmsg = parse_ball (cd, strp, MT_OPERAND_BALL, (unsigned long *) (& fields->f_ball));
+ break;
+ case MT_OPERAND_BALL2 :
+ errmsg = parse_ball (cd, strp, MT_OPERAND_BALL2, (unsigned long *) (& fields->f_ball2));
+ break;
+ case MT_OPERAND_BANKADDR :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_BANKADDR, (unsigned long *) (& fields->f_bankaddr));
+ break;
+ case MT_OPERAND_BRC :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_BRC, (unsigned long *) (& fields->f_brc));
+ break;
+ case MT_OPERAND_BRC2 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_BRC2, (unsigned long *) (& fields->f_brc2));
+ break;
+ case MT_OPERAND_CB1INCR :
+ errmsg = cgen_parse_signed_integer (cd, strp, MT_OPERAND_CB1INCR, (long *) (& fields->f_cb1incr));
+ break;
+ case MT_OPERAND_CB1SEL :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CB1SEL, (unsigned long *) (& fields->f_cb1sel));
+ break;
+ case MT_OPERAND_CB2INCR :
+ errmsg = cgen_parse_signed_integer (cd, strp, MT_OPERAND_CB2INCR, (long *) (& fields->f_cb2incr));
+ break;
+ case MT_OPERAND_CB2SEL :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CB2SEL, (unsigned long *) (& fields->f_cb2sel));
+ break;
+ case MT_OPERAND_CBRB :
+ errmsg = parse_cbrb (cd, strp, MT_OPERAND_CBRB, (unsigned long *) (& fields->f_cbrb));
+ break;
+ case MT_OPERAND_CBS :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CBS, (unsigned long *) (& fields->f_cbs));
+ break;
+ case MT_OPERAND_CBX :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CBX, (unsigned long *) (& fields->f_cbx));
+ break;
+ case MT_OPERAND_CCB :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CCB, (unsigned long *) (& fields->f_ccb));
+ break;
+ case MT_OPERAND_CDB :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CDB, (unsigned long *) (& fields->f_cdb));
+ break;
+ case MT_OPERAND_CELL :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CELL, (unsigned long *) (& fields->f_cell));
+ break;
+ case MT_OPERAND_COLNUM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_COLNUM, (unsigned long *) (& fields->f_colnum));
+ break;
+ case MT_OPERAND_CONTNUM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CONTNUM, (unsigned long *) (& fields->f_contnum));
+ break;
+ case MT_OPERAND_CR :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CR, (unsigned long *) (& fields->f_cr));
+ break;
+ case MT_OPERAND_CTXDISP :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_CTXDISP, (unsigned long *) (& fields->f_ctxdisp));
+ break;
+ case MT_OPERAND_DUP :
+ errmsg = parse_dup (cd, strp, MT_OPERAND_DUP, (unsigned long *) (& fields->f_dup));
+ break;
+ case MT_OPERAND_FBDISP :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_FBDISP, (unsigned long *) (& fields->f_fbdisp));
+ break;
+ case MT_OPERAND_FBINCR :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_FBINCR, (unsigned long *) (& fields->f_fbincr));
+ break;
+ case MT_OPERAND_FRDR :
+ errmsg = cgen_parse_keyword (cd, strp, & mt_cgen_opval_h_spr, & fields->f_dr);
+ break;
+ case MT_OPERAND_FRDRRR :
+ errmsg = cgen_parse_keyword (cd, strp, & mt_cgen_opval_h_spr, & fields->f_drrr);
+ break;
+ case MT_OPERAND_FRSR1 :
+ errmsg = cgen_parse_keyword (cd, strp, & mt_cgen_opval_h_spr, & fields->f_sr1);
+ break;
+ case MT_OPERAND_FRSR2 :
+ errmsg = cgen_parse_keyword (cd, strp, & mt_cgen_opval_h_spr, & fields->f_sr2);
+ break;
+ case MT_OPERAND_ID :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_ID, (unsigned long *) (& fields->f_id));
+ break;
+ case MT_OPERAND_IMM16 :
+ errmsg = parse_imm16 (cd, strp, MT_OPERAND_IMM16, (long *) (& fields->f_imm16s));
+ break;
+ case MT_OPERAND_IMM16L :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_IMM16L, (unsigned long *) (& fields->f_imm16l));
+ break;
+ case MT_OPERAND_IMM16O :
+ errmsg = parse_imm16 (cd, strp, MT_OPERAND_IMM16O, (unsigned long *) (& fields->f_imm16s));
+ break;
+ case MT_OPERAND_IMM16Z :
+ errmsg = parse_imm16 (cd, strp, MT_OPERAND_IMM16Z, (unsigned long *) (& fields->f_imm16u));
+ break;
+ case MT_OPERAND_INCAMT :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_INCAMT, (unsigned long *) (& fields->f_incamt));
+ break;
+ case MT_OPERAND_INCR :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_INCR, (unsigned long *) (& fields->f_incr));
+ break;
+ case MT_OPERAND_LENGTH :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_LENGTH, (unsigned long *) (& fields->f_length));
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ errmsg = parse_loopsize (cd, strp, MT_OPERAND_LOOPSIZE, (unsigned long *) (& fields->f_loopo));
+ break;
+ case MT_OPERAND_MASK :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_MASK, (unsigned long *) (& fields->f_mask));
+ break;
+ case MT_OPERAND_MASK1 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_MASK1, (unsigned long *) (& fields->f_mask1));
+ break;
+ case MT_OPERAND_MODE :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_MODE, (unsigned long *) (& fields->f_mode));
+ break;
+ case MT_OPERAND_PERM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_PERM, (unsigned long *) (& fields->f_perm));
+ break;
+ case MT_OPERAND_RBBC :
+ errmsg = parse_rbbc (cd, strp, MT_OPERAND_RBBC, (unsigned long *) (& fields->f_rbbc));
+ break;
+ case MT_OPERAND_RC :
+ errmsg = parse_rc (cd, strp, MT_OPERAND_RC, (unsigned long *) (& fields->f_rc));
+ break;
+ case MT_OPERAND_RC1 :
+ errmsg = parse_rc (cd, strp, MT_OPERAND_RC1, (unsigned long *) (& fields->f_rc1));
+ break;
+ case MT_OPERAND_RC2 :
+ errmsg = parse_rc (cd, strp, MT_OPERAND_RC2, (unsigned long *) (& fields->f_rc2));
+ break;
+ case MT_OPERAND_RC3 :
+ errmsg = parse_rc (cd, strp, MT_OPERAND_RC3, (unsigned long *) (& fields->f_rc3));
+ break;
+ case MT_OPERAND_RCNUM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_RCNUM, (unsigned long *) (& fields->f_rcnum));
+ break;
+ case MT_OPERAND_RDA :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_RDA, (unsigned long *) (& fields->f_rda));
+ break;
+ case MT_OPERAND_ROWNUM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_ROWNUM, (unsigned long *) (& fields->f_rownum));
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_ROWNUM1, (unsigned long *) (& fields->f_rownum1));
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_ROWNUM2, (unsigned long *) (& fields->f_rownum2));
+ break;
+ case MT_OPERAND_SIZE :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_SIZE, (unsigned long *) (& fields->f_size));
+ break;
+ case MT_OPERAND_TYPE :
+ errmsg = parse_type (cd, strp, MT_OPERAND_TYPE, (unsigned long *) (& fields->f_type));
+ break;
+ case MT_OPERAND_WR :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, MT_OPERAND_WR, (unsigned long *) (& fields->f_wr));
+ break;
+ case MT_OPERAND_XMODE :
+ errmsg = parse_xmode (cd, strp, MT_OPERAND_XMODE, (unsigned long *) (& fields->f_xmode));
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
+ abort ();
+ }
+
+ return errmsg;
+}
+
+cgen_parse_fn * const mt_cgen_parse_handlers[] =
+{
+ parse_insn_normal,
+};
+
+void
+mt_cgen_init_asm (CGEN_CPU_DESC cd)
+{
+ mt_cgen_init_opcode_table (cd);
+ mt_cgen_init_ibld_table (cd);
+ cd->parse_handlers = & mt_cgen_parse_handlers[0];
+ cd->parse_operand = mt_cgen_parse_operand;
+}
+
+
+
+/* Regex construction routine.
+
+ This translates an opcode syntax string into a regex string,
+ by replacing any non-character syntax element (such as an
+ opcode) with the pattern '.*'
+
+ It then compiles the regex and stores it in the opcode, for
+ later use by mt_cgen_assemble_insn
+
+ Returns NULL for success, an error message for failure. */
+
+char *
+mt_cgen_build_insn_regex (CGEN_INSN *insn)
+{
+ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
+ const char *mnem = CGEN_INSN_MNEMONIC (insn);
+ char rxbuf[CGEN_MAX_RX_ELEMENTS];
+ char *rx = rxbuf;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+ int reg_err;
+
+ syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
+
+ /* Mnemonics come first in the syntax string. */
+ if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
+ return _("missing mnemonic in syntax string");
+ ++syn;
+
+ /* Generate a case sensitive regular expression that emulates case
+ insensitive matching in the "C" locale. We cannot generate a case
+ insensitive regular expression because in Turkish locales, 'i' and 'I'
+ are not equal modulo case conversion. */
+
+ /* Copy the literal mnemonic out of the insn. */
+ for (; *mnem; mnem++)
+ {
+ char c = *mnem;
+
+ if (ISALPHA (c))
+ {
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
+ }
+ else
+ *rx++ = c;
+ }
+
+ /* Copy any remaining literals from the syntax string into the rx. */
+ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
+ {
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ {
+ char c = CGEN_SYNTAX_CHAR (* syn);
+
+ switch (c)
+ {
+ /* Escape any regex metacharacters in the syntax. */
+ case '.': case '[': case '\\':
+ case '*': case '^': case '$':
+
+#ifdef CGEN_ESCAPE_EXTENDED_REGEX
+ case '?': case '{': case '}':
+ case '(': case ')': case '*':
+ case '|': case '+': case ']':
+#endif
+ *rx++ = '\\';
+ *rx++ = c;
+ break;
+
+ default:
+ if (ISALPHA (c))
+ {
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
+ }
+ else
+ *rx++ = c;
+ break;
+ }
+ }
+ else
+ {
+ /* Replace non-syntax fields with globs. */
+ *rx++ = '.';
+ *rx++ = '*';
+ }
+ }
+
+ /* Trailing whitespace ok. */
+ * rx++ = '[';
+ * rx++ = ' ';
+ * rx++ = '\t';
+ * rx++ = ']';
+ * rx++ = '*';
+
+ /* But anchor it after that. */
+ * rx++ = '$';
+ * rx = '\0';
+
+ CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
+ reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
+
+ if (reg_err == 0)
+ return NULL;
+ else
+ {
+ static char msg[80];
+
+ regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
+ regfree ((regex_t *) CGEN_INSN_RX (insn));
+ free (CGEN_INSN_RX (insn));
+ (CGEN_INSN_RX (insn)) = NULL;
+ return msg;
+ }
+}
+
+
+/* Default insn parser.
+
+ The syntax string is scanned and operands are parsed and stored in FIELDS.
+ Relocs are queued as we go via other callbacks.
+
+ ??? Note that this is currently an all-or-nothing parser. If we fail to
+ parse the instruction, we return 0 and the caller will start over from
+ the beginning. Backtracking will be necessary in parsing subexpressions,
+ but that can be handled there. Not handling backtracking here may get
+ expensive in the case of the m68k. Deal with later.
+
+ Returns NULL for success, an error message for failure. */
+
+static const char *
+parse_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn,
+ const char **strp,
+ CGEN_FIELDS *fields)
+{
+ /* ??? Runtime added insns not handled yet. */
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const char *str = *strp;
+ const char *errmsg;
+ const char *p;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
+#ifdef CGEN_MNEMONIC_OPERANDS
+ /* FIXME: wip */
+ int past_opcode_p;
+#endif
+
+ /* For now we assume the mnemonic is first (there are no leading operands).
+ We can parse it without needing to set up operand parsing.
+ GAS's input scrubber will ensure mnemonics are lowercase, but we may
+ not be called from GAS. */
+ p = CGEN_INSN_MNEMONIC (insn);
+ while (*p && TOLOWER (*p) == TOLOWER (*str))
+ ++p, ++str;
+
+ if (* p)
+ return _("unrecognized instruction");
+
+#ifndef CGEN_MNEMONIC_OPERANDS
+ if (* str && ! ISSPACE (* str))
+ return _("unrecognized instruction");
+#endif
+
+ CGEN_INIT_PARSE (cd);
+ cgen_init_parse_operand (cd);
+#ifdef CGEN_MNEMONIC_OPERANDS
+ past_opcode_p = 0;
+#endif
+
+ /* We don't check for (*str != '\0') here because we want to parse
+ any trailing fake arguments in the syntax string. */
+ syn = CGEN_SYNTAX_STRING (syntax);
+
+ /* Mnemonics come first for now, ensure valid string. */
+ if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
+ abort ();
+
+ ++syn;
+
+ while (* syn != 0)
+ {
+ /* Non operand chars must match exactly. */
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ {
+ /* FIXME: While we allow for non-GAS callers above, we assume the
+ first char after the mnemonic part is a space. */
+ /* FIXME: We also take inappropriate advantage of the fact that
+ GAS's input scrubber will remove extraneous blanks. */
+ if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
+ {
+#ifdef CGEN_MNEMONIC_OPERANDS
+ if (CGEN_SYNTAX_CHAR(* syn) == ' ')
+ past_opcode_p = 1;
+#endif
+ ++ syn;
+ ++ str;
+ }
+ else if (*str)
+ {
+ /* Syntax char didn't match. Can't be this insn. */
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
+ CGEN_SYNTAX_CHAR(*syn), *str);
+ return msg;
+ }
+ else
+ {
+ /* Ran out of input. */
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
+ CGEN_SYNTAX_CHAR(*syn));
+ return msg;
+ }
+ continue;
+ }
+
+ /* We have an operand of some sort. */
+ errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
+ &str, fields);
+ if (errmsg)
+ return errmsg;
+
+ /* Done with this operand, continue with next one. */
+ ++ syn;
+ }
+
+ /* If we're at the end of the syntax string, we're done. */
+ if (* syn == 0)
+ {
+ /* FIXME: For the moment we assume a valid `str' can only contain
+ blanks now. IE: We needn't try again with a longer version of
+ the insn and it is assumed that longer versions of insns appear
+ before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
+ while (ISSPACE (* str))
+ ++ str;
+
+ if (* str != '\0')
+ return _("junk at end of line"); /* FIXME: would like to include `str' */
+
+ return NULL;
+ }
+
+ /* We couldn't parse it. */
+ return _("unrecognized instruction");
+}
+
+/* Main entry point.
+ This routine is called for each instruction to be assembled.
+ STR points to the insn to be assembled.
+ We assume all necessary tables have been initialized.
+ The assembled instruction, less any fixups, is stored in BUF.
+ Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
+ still needs to be converted to target byte order, otherwise BUF is an array
+ of bytes in target byte order.
+ The result is a pointer to the insn's entry in the opcode table,
+ or NULL if an error occured (an error message will have already been
+ printed).
+
+ Note that when processing (non-alias) macro-insns,
+ this function recurses.
+
+ ??? It's possible to make this cpu-independent.
+ One would have to deal with a few minor things.
+ At this point in time doing so would be more of a curiosity than useful
+ [for example this file isn't _that_ big], but keeping the possibility in
+ mind helps keep the design clean. */
+
+const CGEN_INSN *
+mt_cgen_assemble_insn (CGEN_CPU_DESC cd,
+ const char *str,
+ CGEN_FIELDS *fields,
+ CGEN_INSN_BYTES_PTR buf,
+ char **errmsg)
+{
+ const char *start;
+ CGEN_INSN_LIST *ilist;
+ const char *parse_errmsg = NULL;
+ const char *insert_errmsg = NULL;
+ int recognized_mnemonic = 0;
+
+ /* Skip leading white space. */
+ while (ISSPACE (* str))
+ ++ str;
+
+ /* The instructions are stored in hashed lists.
+ Get the first in the list. */
+ ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
+
+ /* Keep looking until we find a match. */
+ start = str;
+ for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
+ {
+ const CGEN_INSN *insn = ilist->insn;
+ recognized_mnemonic = 1;
+
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* Not usually needed as unsupported opcodes
+ shouldn't be in the hash lists. */
+ /* Is this insn supported by the selected cpu? */
+ if (! mt_cgen_insn_supported (cd, insn))
+ continue;
+#endif
+ /* If the RELAXED attribute is set, this is an insn that shouldn't be
+ chosen immediately. Instead, it is used during assembler/linker
+ relaxation if possible. */
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
+ continue;
+
+ str = start;
+
+ /* Skip this insn if str doesn't look right lexically. */
+ if (CGEN_INSN_RX (insn) != NULL &&
+ regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
+ continue;
+
+ /* Allow parse/insert handlers to obtain length of insn. */
+ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
+
+ parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
+ if (parse_errmsg != NULL)
+ continue;
+
+ /* ??? 0 is passed for `pc'. */
+ insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
+ (bfd_vma) 0);
+ if (insert_errmsg != NULL)
+ continue;
+
+ /* It is up to the caller to actually output the insn and any
+ queued relocs. */
+ return insn;
+ }
+
+ {
+ static char errbuf[150];
+#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
+ const char *tmp_errmsg;
+
+ /* If requesting verbose error messages, use insert_errmsg.
+ Failing that, use parse_errmsg. */
+ tmp_errmsg = (insert_errmsg ? insert_errmsg :
+ parse_errmsg ? parse_errmsg :
+ recognized_mnemonic ?
+ _("unrecognized form of instruction") :
+ _("unrecognized instruction"));
+
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
+#else
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, _("bad instruction `%.50s...'"), start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, _("bad instruction `%.50s'"), start);
+#endif
+
+ *errmsg = errbuf;
+ return NULL;
+ }
+}
Added: branches/binutils/package/opcodes/mt-desc.c
===================================================================
--- branches/binutils/package/opcodes/mt-desc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-desc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1332 @@
+/* CPU data for mt.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sysdep.h"
+#include <stdio.h>
+#include <stdarg.h>
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "mt-desc.h"
+#include "mt-opc.h"
+#include "opintl.h"
+#include "libiberty.h"
+#include "xregex.h"
+
+/* Attributes. */
+
+static const CGEN_ATTR_ENTRY bool_attr[] =
+{
+ { "#f", 0 },
+ { "#t", 1 },
+ { 0, 0 }
+};
+
+static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
+{
+ { "base", MACH_BASE },
+ { "ms1", MACH_MS1 },
+ { "ms1_003", MACH_MS1_003 },
+ { "ms2", MACH_MS2 },
+ { "max", MACH_MAX },
+ { 0, 0 }
+};
+
+static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
+{
+ { "mt", ISA_MT },
+ { "max", ISA_MAX },
+ { 0, 0 }
+};
+
+const CGEN_ATTR_TABLE mt_cgen_ifield_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "RESERVED", &bool_attr[0], &bool_attr[0] },
+ { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
+ { "SIGNED", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE mt_cgen_hardware_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "PC", &bool_attr[0], &bool_attr[0] },
+ { "PROFILE", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE mt_cgen_operand_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
+ { "SIGNED", &bool_attr[0], &bool_attr[0] },
+ { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
+ { "RELAX", &bool_attr[0], &bool_attr[0] },
+ { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE mt_cgen_insn_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "ALIAS", &bool_attr[0], &bool_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
+ { "COND-CTI", &bool_attr[0], &bool_attr[0] },
+ { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
+ { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
+ { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
+ { "RELAXED", &bool_attr[0], &bool_attr[0] },
+ { "NO-DIS", &bool_attr[0], &bool_attr[0] },
+ { "PBB", &bool_attr[0], &bool_attr[0] },
+ { "LOAD-DELAY", &bool_attr[0], &bool_attr[0] },
+ { "MEMORY-ACCESS", &bool_attr[0], &bool_attr[0] },
+ { "AL-INSN", &bool_attr[0], &bool_attr[0] },
+ { "IO-INSN", &bool_attr[0], &bool_attr[0] },
+ { "BR-INSN", &bool_attr[0], &bool_attr[0] },
+ { "JAL-HAZARD", &bool_attr[0], &bool_attr[0] },
+ { "USES-FRDR", &bool_attr[0], &bool_attr[0] },
+ { "USES-FRDRRR", &bool_attr[0], &bool_attr[0] },
+ { "USES-FRSR1", &bool_attr[0], &bool_attr[0] },
+ { "USES-FRSR2", &bool_attr[0], &bool_attr[0] },
+ { "SKIPA", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+/* Instruction set variants. */
+
+static const CGEN_ISA mt_cgen_isa_table[] = {
+ { "mt", 32, 32, 32, 32 },
+ { 0, 0, 0, 0, 0 }
+};
+
+/* Machine variants. */
+
+static const CGEN_MACH mt_cgen_mach_table[] = {
+ { "ms1", "ms1", MACH_MS1, 0 },
+ { "ms1-003", "ms1-003", MACH_MS1_003, 0 },
+ { "ms2", "ms2", MACH_MS2, 0 },
+ { 0, 0, 0, 0 }
+};
+
+static CGEN_KEYWORD_ENTRY mt_cgen_opval_msys_syms_entries[] =
+{
+ { "DUP", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "XX", 0, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD mt_cgen_opval_msys_syms =
+{
+ & mt_cgen_opval_msys_syms_entries[0],
+ 2,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY mt_cgen_opval_h_spr_entries[] =
+{
+ { "R0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "R1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "R2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "R3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "R4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "R5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "R6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "R7", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "R8", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "R9", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "R10", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "R11", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "R12", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "fp", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "R13", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "R14", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "ra", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "R15", 15, {0, {{{0, 0}}}}, 0, 0 },
+ { "ira", 15, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD mt_cgen_opval_h_spr =
+{
+ & mt_cgen_opval_h_spr_entries[0],
+ 20,
+ 0, 0, 0, 0, ""
+};
+
+
+/* The hardware table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_HW_##a)
+#else
+#define A(a) (1 << CGEN_HW_/**/a)
+#endif
+
+const CGEN_HW_ENTRY mt_cgen_hw_table[] =
+{
+ { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & mt_cgen_opval_h_spr, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
+ { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+/* The instruction field table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_IFLD_##a)
+#else
+#define A(a) (1 << CGEN_IFLD_/**/a)
+#endif
+
+const CGEN_IFLD mt_cgen_ifld_table[] =
+{
+ { MT_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MSYS, "f-msys", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_OPC, "f-opc", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_IMM, "f-imm", 0, 32, 24, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU24, "f-uu24", 0, 32, 23, 24, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_SR1, "f-sr1", 0, 32, 23, 4, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_SR2, "f-sr2", 0, 32, 19, 4, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_DR, "f-dr", 0, 32, 19, 4, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_DRRR, "f-drrr", 0, 32, 15, 4, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_IMM16U, "f-imm16u", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_IMM16S, "f-imm16s", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_IMM16A, "f-imm16a", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU4A, "f-uu4a", 0, 32, 19, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU4B, "f-uu4b", 0, 32, 23, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU12, "f-uu12", 0, 32, 11, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU8, "f-uu8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU16, "f-uu16", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU1, "f-uu1", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MSOPC, "f-msopc", 0, 32, 30, 5, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_26_25, "f-uu-26-25", 0, 32, 25, 26, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MASK, "f-mask", 0, 32, 25, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_BANKADDR, "f-bankaddr", 0, 32, 25, 13, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RDA, "f-rda", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_2_25, "f-uu-2-25", 0, 32, 25, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RBBC, "f-rbbc", 0, 32, 25, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_PERM, "f-perm", 0, 32, 25, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MODE, "f-mode", 0, 32, 25, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_1_24, "f-uu-1-24", 0, 32, 24, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_WR, "f-wr", 0, 32, 24, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_FBINCR, "f-fbincr", 0, 32, 23, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_2_23, "f-uu-2-23", 0, 32, 23, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_XMODE, "f-xmode", 0, 32, 23, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_A23, "f-a23", 0, 32, 23, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MASK1, "f-mask1", 0, 32, 22, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CR, "f-cr", 0, 32, 22, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_TYPE, "f-type", 0, 32, 21, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_INCAMT, "f-incamt", 0, 32, 19, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CBS, "f-cbs", 0, 32, 19, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_1_19, "f-uu-1-19", 0, 32, 19, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_BALL, "f-ball", 0, 32, 19, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_COLNUM, "f-colnum", 0, 32, 18, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_BRC, "f-brc", 0, 32, 18, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_INCR, "f-incr", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_FBDISP, "f-fbdisp", 0, 32, 15, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_4_15, "f-uu-4-15", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_LENGTH, "f-length", 0, 32, 15, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_1_15, "f-uu-1-15", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RC, "f-rc", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RCNUM, "f-rcnum", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_ROWNUM, "f-rownum", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CBX, "f-cbx", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_ID, "f-id", 0, 32, 14, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_SIZE, "f-size", 0, 32, 13, 14, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_ROWNUM1, "f-rownum1", 0, 32, 12, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_3_11, "f-uu-3-11", 0, 32, 11, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RC1, "f-rc1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CCB, "f-ccb", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CBRB, "f-cbrb", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CDB, "f-cdb", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_ROWNUM2, "f-rownum2", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CELL, "f-cell", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_3_9, "f-uu-3-9", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CONTNUM, "f-contnum", 0, 32, 8, 9, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_UU_1_6, "f-uu-1-6", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_DUP, "f-dup", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RC2, "f-rc2", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CTXDISP, "f-ctxdisp", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_IMM16L, "f-imm16l", 0, 32, 23, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_LOOPO, "f-loopo", 0, 32, 7, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CB1SEL, "f-cb1sel", 0, 32, 25, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CB2SEL, "f-cb2sel", 0, 32, 22, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CB1INCR, "f-cb1incr", 0, 32, 19, 6, { 0|A(SIGNED), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_CB2INCR, "f-cb2incr", 0, 32, 13, 6, { 0|A(SIGNED), { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_RC3, "f-rc3", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_MSYSFRSR2, "f-msysfrsr2", 0, 32, 19, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_BRC2, "f-brc2", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { MT_F_BALL2, "f-ball2", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+
+/* multi ifield declarations */
+
+
+
+/* multi ifield definitions */
+
+
+/* The operand table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_OPERAND_##a)
+#else
+#define A(a) (1 << CGEN_OPERAND_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) MT_OPERAND_##op
+#else
+#define OPERAND(op) MT_OPERAND_/**/op
+#endif
+
+const CGEN_OPERAND mt_cgen_operand_table[] =
+{
+/* pc: program counter */
+ { "pc", MT_OPERAND_PC, HW_H_PC, 0, 0,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_NIL] } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
+/* frsr1: register */
+ { "frsr1", MT_OPERAND_FRSR1, HW_H_SPR, 23, 4,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_SR1] } },
+ { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* frsr2: register */
+ { "frsr2", MT_OPERAND_FRSR2, HW_H_SPR, 19, 4,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_SR2] } },
+ { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* frdr: register */
+ { "frdr", MT_OPERAND_FRDR, HW_H_SPR, 19, 4,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_DR] } },
+ { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* frdrrr: register */
+ { "frdrrr", MT_OPERAND_FRDRRR, HW_H_SPR, 15, 4,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_DRRR] } },
+ { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* imm16: immediate value - sign extd */
+ { "imm16", MT_OPERAND_IMM16, HW_H_SINT, 15, 16,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_IMM16S] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* imm16z: immediate value - zero extd */
+ { "imm16z", MT_OPERAND_IMM16Z, HW_H_UINT, 15, 16,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_IMM16U] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* imm16o: immediate value */
+ { "imm16o", MT_OPERAND_IMM16O, HW_H_UINT, 15, 16,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_IMM16S] } },
+ { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* rc: rc */
+ { "rc", MT_OPERAND_RC, HW_H_UINT, 15, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RC] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rcnum: rcnum */
+ { "rcnum", MT_OPERAND_RCNUM, HW_H_UINT, 14, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RCNUM] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* contnum: context number */
+ { "contnum", MT_OPERAND_CONTNUM, HW_H_UINT, 8, 9,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CONTNUM] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rbbc: omega network configuration */
+ { "rbbc", MT_OPERAND_RBBC, HW_H_UINT, 25, 2,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RBBC] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* colnum: column number */
+ { "colnum", MT_OPERAND_COLNUM, HW_H_UINT, 18, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_COLNUM] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rownum: row number */
+ { "rownum", MT_OPERAND_ROWNUM, HW_H_UINT, 14, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_ROWNUM] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rownum1: row number */
+ { "rownum1", MT_OPERAND_ROWNUM1, HW_H_UINT, 12, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_ROWNUM1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rownum2: row number */
+ { "rownum2", MT_OPERAND_ROWNUM2, HW_H_UINT, 9, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_ROWNUM2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rc1: rc1 */
+ { "rc1", MT_OPERAND_RC1, HW_H_UINT, 11, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RC1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rc2: rc2 */
+ { "rc2", MT_OPERAND_RC2, HW_H_UINT, 6, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RC2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cbrb: data-bus orientation */
+ { "cbrb", MT_OPERAND_CBRB, HW_H_UINT, 10, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CBRB] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cell: cell */
+ { "cell", MT_OPERAND_CELL, HW_H_UINT, 9, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CELL] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* dup: dup */
+ { "dup", MT_OPERAND_DUP, HW_H_UINT, 6, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_DUP] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* ctxdisp: context displacement */
+ { "ctxdisp", MT_OPERAND_CTXDISP, HW_H_UINT, 5, 6,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CTXDISP] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* fbdisp: frame buffer displacement */
+ { "fbdisp", MT_OPERAND_FBDISP, HW_H_UINT, 15, 6,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_FBDISP] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* type: type */
+ { "type", MT_OPERAND_TYPE, HW_H_UINT, 21, 2,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_TYPE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* mask: mask */
+ { "mask", MT_OPERAND_MASK, HW_H_UINT, 25, 16,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_MASK] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bankaddr: bank address */
+ { "bankaddr", MT_OPERAND_BANKADDR, HW_H_UINT, 25, 13,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_BANKADDR] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* incamt: increment amount */
+ { "incamt", MT_OPERAND_INCAMT, HW_H_UINT, 19, 8,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_INCAMT] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* xmode: xmode */
+ { "xmode", MT_OPERAND_XMODE, HW_H_UINT, 23, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_XMODE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* mask1: mask1 */
+ { "mask1", MT_OPERAND_MASK1, HW_H_UINT, 22, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_MASK1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* ball: b_all */
+ { "ball", MT_OPERAND_BALL, HW_H_UINT, 19, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_BALL] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* brc: b_r_c */
+ { "brc", MT_OPERAND_BRC, HW_H_UINT, 18, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_BRC] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* rda: rd */
+ { "rda", MT_OPERAND_RDA, HW_H_UINT, 25, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RDA] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* wr: wr */
+ { "wr", MT_OPERAND_WR, HW_H_UINT, 24, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_WR] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* ball2: b_all2 */
+ { "ball2", MT_OPERAND_BALL2, HW_H_UINT, 15, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_BALL2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* brc2: b_r_c2 */
+ { "brc2", MT_OPERAND_BRC2, HW_H_UINT, 14, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_BRC2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* perm: perm */
+ { "perm", MT_OPERAND_PERM, HW_H_UINT, 25, 2,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_PERM] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* a23: a23 */
+ { "a23", MT_OPERAND_A23, HW_H_UINT, 23, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_A23] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cr: c-r */
+ { "cr", MT_OPERAND_CR, HW_H_UINT, 22, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CR] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cbs: cbs */
+ { "cbs", MT_OPERAND_CBS, HW_H_UINT, 19, 2,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CBS] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* incr: incr */
+ { "incr", MT_OPERAND_INCR, HW_H_UINT, 17, 6,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_INCR] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* length: length */
+ { "length", MT_OPERAND_LENGTH, HW_H_UINT, 15, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_LENGTH] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cbx: cbx */
+ { "cbx", MT_OPERAND_CBX, HW_H_UINT, 14, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CBX] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* ccb: ccb */
+ { "ccb", MT_OPERAND_CCB, HW_H_UINT, 11, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CCB] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cdb: cdb */
+ { "cdb", MT_OPERAND_CDB, HW_H_UINT, 10, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CDB] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* mode: mode */
+ { "mode", MT_OPERAND_MODE, HW_H_UINT, 25, 2,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_MODE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* id: i/d */
+ { "id", MT_OPERAND_ID, HW_H_UINT, 14, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_ID] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* size: size */
+ { "size", MT_OPERAND_SIZE, HW_H_UINT, 13, 14,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_SIZE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* fbincr: fb incr */
+ { "fbincr", MT_OPERAND_FBINCR, HW_H_UINT, 23, 4,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_FBINCR] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* loopsize: immediate value */
+ { "loopsize", MT_OPERAND_LOOPSIZE, HW_H_UINT, 7, 8,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_LOOPO] } },
+ { 0|A(PCREL_ADDR), { { { (1<<MACH_MS2), 0 } } } } },
+/* imm16l: immediate value */
+ { "imm16l", MT_OPERAND_IMM16L, HW_H_UINT, 23, 16,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_IMM16L] } },
+ { 0, { { { (1<<MACH_MS2), 0 } } } } },
+/* rc3: rc3 */
+ { "rc3", MT_OPERAND_RC3, HW_H_UINT, 7, 1,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_RC3] } },
+ { 0, { { { (1<<MACH_MS2), 0 } } } } },
+/* cb1sel: cb1sel */
+ { "cb1sel", MT_OPERAND_CB1SEL, HW_H_UINT, 25, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CB1SEL] } },
+ { 0, { { { (1<<MACH_MS2), 0 } } } } },
+/* cb2sel: cb2sel */
+ { "cb2sel", MT_OPERAND_CB2SEL, HW_H_UINT, 22, 3,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CB2SEL] } },
+ { 0, { { { (1<<MACH_MS2), 0 } } } } },
+/* cb1incr: cb1incr */
+ { "cb1incr", MT_OPERAND_CB1INCR, HW_H_SINT, 19, 6,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CB1INCR] } },
+ { 0|A(SIGNED), { { { (1<<MACH_MS2), 0 } } } } },
+/* cb2incr: cb2incr */
+ { "cb2incr", MT_OPERAND_CB2INCR, HW_H_SINT, 13, 6,
+ { 0, { (const PTR) &mt_cgen_ifld_table[MT_F_CB2INCR] } },
+ { 0|A(SIGNED), { { { (1<<MACH_MS2), 0 } } } } },
+/* sentinel */
+ { 0, 0, 0, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+/* The instruction table. */
+
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+
+static const CGEN_IBASE mt_cgen_insn_table[MAX_INSNS] =
+{
+ /* Special null first entry.
+ A `num' value of zero is thus invalid.
+ Also, the special `invalid' insn resides here. */
+ { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* add $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_ADD, "add", "add", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* addu $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_ADDU, "addu", "addu", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* addi $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_ADDI, "addi", "addi", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* addui $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_ADDUI, "addui", "addui", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* sub $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_SUB, "sub", "sub", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* subu $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_SUBU, "subu", "subu", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* subi $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_SUBI, "subi", "subi", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* subui $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_SUBUI, "subui", "subui", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mul $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_MUL, "mul", "mul", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* muli $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_MULI, "muli", "muli", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* and $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_AND, "and", "and", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* andi $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_ANDI, "andi", "andi", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* or $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_OR, "or", "or", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* nop */
+ {
+ MT_INSN_NOP, "nop", "nop", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* ori $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_ORI, "ori", "ori", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* xor $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_XOR, "xor", "xor", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* xori $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_XORI, "xori", "xori", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* nand $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_NAND, "nand", "nand", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* nandi $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_NANDI, "nandi", "nandi", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* nor $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_NOR, "nor", "nor", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* nori $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_NORI, "nori", "nori", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* xnor $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_XNOR, "xnor", "xnor", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* xnori $frdr,$frsr1,#$imm16z */
+ {
+ MT_INSN_XNORI, "xnori", "xnori", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* ldui $frdr,#$imm16z */
+ {
+ MT_INSN_LDUI, "ldui", "ldui", 32,
+ { 0|A(USES_FRDR)|A(AL_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* lsl $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_LSL, "lsl", "lsl", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* lsli $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_LSLI, "lsli", "lsli", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* lsr $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_LSR, "lsr", "lsr", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* lsri $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_LSRI, "lsri", "lsri", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* asr $frdrrr,$frsr1,$frsr2 */
+ {
+ MT_INSN_ASR, "asr", "asr", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* asri $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_ASRI, "asri", "asri", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* brlt $frsr1,$frsr2,$imm16o */
+ {
+ MT_INSN_BRLT, "brlt", "brlt", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(USES_FRDRRR)|A(DELAY_SLOT)|A(BR_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* brle $frsr1,$frsr2,$imm16o */
+ {
+ MT_INSN_BRLE, "brle", "brle", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(DELAY_SLOT)|A(BR_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* breq $frsr1,$frsr2,$imm16o */
+ {
+ MT_INSN_BREQ, "breq", "breq", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(DELAY_SLOT)|A(BR_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* brne $frsr1,$frsr2,$imm16o */
+ {
+ MT_INSN_BRNE, "brne", "brne", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(DELAY_SLOT)|A(BR_INSN), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* jmp $imm16o */
+ {
+ MT_INSN_JMP, "jmp", "jmp", 32,
+ { 0|A(BR_INSN)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* jal $frdrrr,$frsr1 */
+ {
+ MT_INSN_JAL, "jal", "jal", 32,
+ { 0|A(JAL_HAZARD)|A(USES_FRSR1)|A(USES_FRDR)|A(BR_INSN)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* dbnz $frsr1,$imm16o */
+ {
+ MT_INSN_DBNZ, "dbnz", "dbnz", 32,
+ { 0|A(USES_FRSR1)|A(DELAY_SLOT)|A(BR_INSN), { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* ei */
+ {
+ MT_INSN_EI, "ei", "ei", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* di */
+ {
+ MT_INSN_DI, "di", "di", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* si $frdrrr */
+ {
+ MT_INSN_SI, "si", "si", 32,
+ { 0|A(USES_FRDR)|A(BR_INSN)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* reti $frsr1 */
+ {
+ MT_INSN_RETI, "reti", "reti", 32,
+ { 0|A(JAL_HAZARD)|A(USES_FRSR1)|A(BR_INSN)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* ldw $frdr,$frsr1,#$imm16 */
+ {
+ MT_INSN_LDW, "ldw", "ldw", 32,
+ { 0|A(USES_FRSR1)|A(USES_FRDR)|A(MEMORY_ACCESS)|A(LOAD_DELAY), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* stw $frsr2,$frsr1,#$imm16 */
+ {
+ MT_INSN_STW, "stw", "stw", 32,
+ { 0|A(USES_FRSR2)|A(USES_FRSR1)|A(MEMORY_ACCESS), { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* break */
+ {
+ MT_INSN_BREAK, "break", "break", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* iflush */
+ {
+ MT_INSN_IFLUSH, "iflush", "iflush", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum */
+ {
+ MT_INSN_LDCTXT, "ldctxt", "ldctxt", 32,
+ { 0, { { { (1<<MACH_MS1), 0 } } } }
+ },
+/* ldfb $frsr1,$frsr2,#$imm16z */
+ {
+ MT_INSN_LDFB, "ldfb", "ldfb", 32,
+ { 0, { { { (1<<MACH_MS1), 0 } } } }
+ },
+/* stfb $frsr1,$frsr2,#$imm16z */
+ {
+ MT_INSN_STFB, "stfb", "stfb", 32,
+ { 0, { { { (1<<MACH_MS1), 0 } } } }
+ },
+/* fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCB, "fbcb", "fbcb", 32,
+ { 0, { { { (1<<MACH_MS1)|(1<<MACH_MS1_003), 0 } } } }
+ },
+/* mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBCB, "mfbcb", "mfbcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCCI, "fbcci", "fbcci", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBRCI, "fbrci", "fbrci", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCRI, "fbcri", "fbcri", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBRRI, "fbrri", "fbrri", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBCCI, "mfbcci", "mfbcci", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBRCI, "mfbrci", "mfbrci", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBCRI, "mfbcri", "mfbcri", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBRRI, "mfbrri", "mfbrri", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCBDR, "fbcbdr", "fbcbdr", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_RCFBCB, "rcfbcb", "rcfbcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MRCFBCB, "mrcfbcb", "mrcfbcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* cbcast #$mask,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_CBCAST, "cbcast", "cbcast", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_DUPCBCAST, "dupcbcast", "dupcbcast", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_WFBI, "wfbi", "wfbi", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp */
+ {
+ MT_INSN_WFB, "wfb", "wfb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_RCRISC, "rcrisc", "rcrisc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCBINC, "fbcbinc", "fbcbinc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_RCXMODE, "rcxmode", "rcxmode", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* intlvr $frsr1,#$mode,$frsr2,#$id,#$size */
+ {
+ MT_INSN_INTERLEAVER, "interleaver", "intlvr", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } } } }
+ },
+/* wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_WFBINC, "wfbinc", "wfbinc", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MWFBINC, "mwfbinc", "mwfbinc", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_WFBINCR, "wfbincr", "wfbincr", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MWFBINCR, "mwfbincr", "mwfbincr", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCBINCS, "fbcbincs", "fbcbincs", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBCBINCS, "mfbcbincs", "mfbcbincs", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_FBCBINCRS, "fbcbincrs", "fbcbincrs", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ MT_INSN_MFBCBINCRS, "mfbcbincrs", "mfbcbincrs", 32,
+ { 0, { { { (1<<MACH_MS1_003)|(1<<MACH_MS2), 0 } } } }
+ },
+/* loop $frsr1,$loopsize */
+ {
+ MT_INSN_LOOP, "loop", "loop", 32,
+ { 0|A(USES_FRSR1)|A(DELAY_SLOT), { { { (1<<MACH_MS2), 0 } } } }
+ },
+/* loopi #$imm16l,$loopsize */
+ {
+ MT_INSN_LOOPI, "loopi", "loopi", 32,
+ { 0|A(DELAY_SLOT), { { { (1<<MACH_MS2), 0 } } } }
+ },
+/* dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_DFBC, "dfbc", "dfbc", 32,
+ { 0, { { { (1<<MACH_MS2), 0 } } } }
+ },
+/* dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_DWFB, "dwfb", "dwfb", 32,
+ { 0, { { { (1<<MACH_MS2), 0 } } } }
+ },
+/* fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_FBWFB, "fbwfb", "fbwfb", 32,
+ { 0, { { { (1<<MACH_MS2), 0 } } } }
+ },
+/* dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp */
+ {
+ MT_INSN_DFBR, "dfbr", "dfbr", 32,
+ { 0|A(USES_FRSR2), { { { (1<<MACH_MS2), 0 } } } }
+ },
+};
+
+#undef OP
+#undef A
+
+/* Initialize anything needed to be done once, before any cpu_open call. */
+
+static void
+init_tables (void)
+{
+}
+
+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
+static void build_hw_table (CGEN_CPU_TABLE *);
+static void build_ifield_table (CGEN_CPU_TABLE *);
+static void build_operand_table (CGEN_CPU_TABLE *);
+static void build_insn_table (CGEN_CPU_TABLE *);
+static void mt_cgen_rebuild_tables (CGEN_CPU_TABLE *);
+
+/* Subroutine of mt_cgen_cpu_open to look up a mach via its bfd name. */
+
+static const CGEN_MACH *
+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
+{
+ while (table->name)
+ {
+ if (strcmp (name, table->bfd_name) == 0)
+ return table;
+ ++table;
+ }
+ abort ();
+}
+
+/* Subroutine of mt_cgen_cpu_open to build the hardware table. */
+
+static void
+build_hw_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ int machs = cd->machs;
+ const CGEN_HW_ENTRY *init = & mt_cgen_hw_table[0];
+ /* MAX_HW is only an upper bound on the number of selected entries.
+ However each entry is indexed by it's enum so there can be holes in
+ the table. */
+ const CGEN_HW_ENTRY **selected =
+ (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
+
+ cd->hw_table.init_entries = init;
+ cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
+ memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
+ /* ??? For now we just use machs to determine which ones we want. */
+ for (i = 0; init[i].name != NULL; ++i)
+ if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
+ & machs)
+ selected[init[i].type] = &init[i];
+ cd->hw_table.entries = selected;
+ cd->hw_table.num_entries = MAX_HW;
+}
+
+/* Subroutine of mt_cgen_cpu_open to build the hardware table. */
+
+static void
+build_ifield_table (CGEN_CPU_TABLE *cd)
+{
+ cd->ifld_table = & mt_cgen_ifld_table[0];
+}
+
+/* Subroutine of mt_cgen_cpu_open to build the hardware table. */
+
+static void
+build_operand_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ int machs = cd->machs;
+ const CGEN_OPERAND *init = & mt_cgen_operand_table[0];
+ /* MAX_OPERANDS is only an upper bound on the number of selected entries.
+ However each entry is indexed by it's enum so there can be holes in
+ the table. */
+ const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
+
+ cd->operand_table.init_entries = init;
+ cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
+ memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
+ /* ??? For now we just use mach to determine which ones we want. */
+ for (i = 0; init[i].name != NULL; ++i)
+ if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
+ & machs)
+ selected[init[i].type] = &init[i];
+ cd->operand_table.entries = selected;
+ cd->operand_table.num_entries = MAX_OPERANDS;
+}
+
+/* Subroutine of mt_cgen_cpu_open to build the hardware table.
+ ??? This could leave out insns not supported by the specified mach/isa,
+ but that would cause errors like "foo only supported by bar" to become
+ "unknown insn", so for now we include all insns and require the app to
+ do the checking later.
+ ??? On the other hand, parsing of such insns may require their hardware or
+ operand elements to be in the table [which they mightn't be]. */
+
+static void
+build_insn_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ const CGEN_IBASE *ib = & mt_cgen_insn_table[0];
+ CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
+
+ memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
+ for (i = 0; i < MAX_INSNS; ++i)
+ insns[i].base = &ib[i];
+ cd->insn_table.init_entries = insns;
+ cd->insn_table.entry_size = sizeof (CGEN_IBASE);
+ cd->insn_table.num_init_entries = MAX_INSNS;
+}
+
+/* Subroutine of mt_cgen_cpu_open to rebuild the tables. */
+
+static void
+mt_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ CGEN_BITSET *isas = cd->isas;
+ unsigned int machs = cd->machs;
+
+ cd->int_insn_p = CGEN_INT_INSN_P;
+
+ /* Data derived from the isa spec. */
+#define UNSET (CGEN_SIZE_UNKNOWN + 1)
+ cd->default_insn_bitsize = UNSET;
+ cd->base_insn_bitsize = UNSET;
+ cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
+ cd->max_insn_bitsize = 0;
+ for (i = 0; i < MAX_ISAS; ++i)
+ if (cgen_bitset_contains (isas, i))
+ {
+ const CGEN_ISA *isa = & mt_cgen_isa_table[i];
+
+ /* Default insn sizes of all selected isas must be
+ equal or we set the result to 0, meaning "unknown". */
+ if (cd->default_insn_bitsize == UNSET)
+ cd->default_insn_bitsize = isa->default_insn_bitsize;
+ else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
+ ; /* This is ok. */
+ else
+ cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
+
+ /* Base insn sizes of all selected isas must be equal
+ or we set the result to 0, meaning "unknown". */
+ if (cd->base_insn_bitsize == UNSET)
+ cd->base_insn_bitsize = isa->base_insn_bitsize;
+ else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
+ ; /* This is ok. */
+ else
+ cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
+
+ /* Set min,max insn sizes. */
+ if (isa->min_insn_bitsize < cd->min_insn_bitsize)
+ cd->min_insn_bitsize = isa->min_insn_bitsize;
+ if (isa->max_insn_bitsize > cd->max_insn_bitsize)
+ cd->max_insn_bitsize = isa->max_insn_bitsize;
+ }
+
+ /* Data derived from the mach spec. */
+ for (i = 0; i < MAX_MACHS; ++i)
+ if (((1 << i) & machs) != 0)
+ {
+ const CGEN_MACH *mach = & mt_cgen_mach_table[i];
+
+ if (mach->insn_chunk_bitsize != 0)
+ {
+ if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
+ {
+ fprintf (stderr, "mt_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
+ cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
+ abort ();
+ }
+
+ cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
+ }
+ }
+
+ /* Determine which hw elements are used by MACH. */
+ build_hw_table (cd);
+
+ /* Build the ifield table. */
+ build_ifield_table (cd);
+
+ /* Determine which operands are used by MACH/ISA. */
+ build_operand_table (cd);
+
+ /* Build the instruction table. */
+ build_insn_table (cd);
+}
+
+/* Initialize a cpu table and return a descriptor.
+ It's much like opening a file, and must be the first function called.
+ The arguments are a set of (type/value) pairs, terminated with
+ CGEN_CPU_OPEN_END.
+
+ Currently supported values:
+ CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
+ CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
+ CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
+ CGEN_CPU_OPEN_ENDIAN: specify endian choice
+ CGEN_CPU_OPEN_END: terminates arguments
+
+ ??? Simultaneous multiple isas might not make sense, but it's not (yet)
+ precluded.
+
+ ??? We only support ISO C stdargs here, not K&R.
+ Laziness, plus experiment to see if anything requires K&R - eventually
+ K&R will no longer be supported - e.g. GDB is currently trying this. */
+
+CGEN_CPU_DESC
+mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
+{
+ CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
+ static int init_p;
+ CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
+ unsigned int machs = 0; /* 0 = "unspecified" */
+ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
+ va_list ap;
+
+ if (! init_p)
+ {
+ init_tables ();
+ init_p = 1;
+ }
+
+ memset (cd, 0, sizeof (*cd));
+
+ va_start (ap, arg_type);
+ while (arg_type != CGEN_CPU_OPEN_END)
+ {
+ switch (arg_type)
+ {
+ case CGEN_CPU_OPEN_ISAS :
+ isas = va_arg (ap, CGEN_BITSET *);
+ break;
+ case CGEN_CPU_OPEN_MACHS :
+ machs = va_arg (ap, unsigned int);
+ break;
+ case CGEN_CPU_OPEN_BFDMACH :
+ {
+ const char *name = va_arg (ap, const char *);
+ const CGEN_MACH *mach =
+ lookup_mach_via_bfd_name (mt_cgen_mach_table, name);
+
+ machs |= 1 << mach->num;
+ break;
+ }
+ case CGEN_CPU_OPEN_ENDIAN :
+ endian = va_arg (ap, enum cgen_endian);
+ break;
+ default :
+ fprintf (stderr, "mt_cgen_cpu_open: unsupported argument `%d'\n",
+ arg_type);
+ abort (); /* ??? return NULL? */
+ }
+ arg_type = va_arg (ap, enum cgen_cpu_open_arg);
+ }
+ va_end (ap);
+
+ /* Mach unspecified means "all". */
+ if (machs == 0)
+ machs = (1 << MAX_MACHS) - 1;
+ /* Base mach is always selected. */
+ machs |= 1;
+ if (endian == CGEN_ENDIAN_UNKNOWN)
+ {
+ /* ??? If target has only one, could have a default. */
+ fprintf (stderr, "mt_cgen_cpu_open: no endianness specified\n");
+ abort ();
+ }
+
+ cd->isas = cgen_bitset_copy (isas);
+ cd->machs = machs;
+ cd->endian = endian;
+ /* FIXME: for the sparc case we can determine insn-endianness statically.
+ The worry here is where both data and insn endian can be independently
+ chosen, in which case this function will need another argument.
+ Actually, will want to allow for more arguments in the future anyway. */
+ cd->insn_endian = endian;
+
+ /* Table (re)builder. */
+ cd->rebuild_tables = mt_cgen_rebuild_tables;
+ mt_cgen_rebuild_tables (cd);
+
+ /* Default to not allowing signed overflow. */
+ cd->signed_overflow_ok_p = 0;
+
+ return (CGEN_CPU_DESC) cd;
+}
+
+/* Cover fn to mt_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
+ MACH_NAME is the bfd name of the mach. */
+
+CGEN_CPU_DESC
+mt_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
+{
+ return mt_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
+ CGEN_CPU_OPEN_ENDIAN, endian,
+ CGEN_CPU_OPEN_END);
+}
+
+/* Close a cpu table.
+ ??? This can live in a machine independent file, but there's currently
+ no place to put this file (there's no libcgen). libopcodes is the wrong
+ place as some simulator ports use this but they don't use libopcodes. */
+
+void
+mt_cgen_cpu_close (CGEN_CPU_DESC cd)
+{
+ unsigned int i;
+ const CGEN_INSN *insns;
+
+ if (cd->macro_insn_table.init_entries)
+ {
+ insns = cd->macro_insn_table.init_entries;
+ for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
+ if (CGEN_INSN_RX ((insns)))
+ regfree (CGEN_INSN_RX (insns));
+ }
+
+ if (cd->insn_table.init_entries)
+ {
+ insns = cd->insn_table.init_entries;
+ for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
+ if (CGEN_INSN_RX (insns))
+ regfree (CGEN_INSN_RX (insns));
+ }
+
+ if (cd->macro_insn_table.init_entries)
+ free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
+
+ if (cd->insn_table.init_entries)
+ free ((CGEN_INSN *) cd->insn_table.init_entries);
+
+ if (cd->hw_table.entries)
+ free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
+
+ if (cd->operand_table.entries)
+ free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
+
+ free (cd);
+}
+
Added: branches/binutils/package/opcodes/mt-desc.h
===================================================================
--- branches/binutils/package/opcodes/mt-desc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-desc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,305 @@
+/* CPU data header for mt.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef MT_CPU_H
+#define MT_CPU_H
+
+#include "opcode/cgen-bitset.h"
+
+#define CGEN_ARCH mt
+
+/* Given symbol S, return mt_cgen_<S>. */
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define CGEN_SYM(s) mt##_cgen_##s
+#else
+#define CGEN_SYM(s) mt/**/_cgen_/**/s
+#endif
+
+
+/* Selected cpu families. */
+#define HAVE_CPU_MS1BF
+#define HAVE_CPU_MS1_003BF
+#define HAVE_CPU_MS2BF
+
+#define CGEN_INSN_LSB0_P 1
+
+/* Minimum size of any insn (in bytes). */
+#define CGEN_MIN_INSN_SIZE 4
+
+/* Maximum size of any insn (in bytes). */
+#define CGEN_MAX_INSN_SIZE 4
+
+#define CGEN_INT_INSN_P 1
+
+/* Maximum number of syntax elements in an instruction. */
+#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 40
+
+/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
+ e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
+ we can't hash on everything up to the space. */
+#define CGEN_MNEMONIC_OPERANDS
+
+/* Maximum number of fields in an instruction. */
+#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 14
+
+/* Enums. */
+
+/* Enum declaration for msys enums. */
+typedef enum insn_msys {
+ MSYS_NO, MSYS_YES
+} INSN_MSYS;
+
+/* Enum declaration for opc enums. */
+typedef enum insn_opc {
+ OPC_ADD = 0, OPC_ADDU = 1, OPC_SUB = 2, OPC_SUBU = 3
+ , OPC_MUL = 4, OPC_AND = 8, OPC_OR = 9, OPC_XOR = 10
+ , OPC_NAND = 11, OPC_NOR = 12, OPC_XNOR = 13, OPC_LDUI = 14
+ , OPC_LSL = 16, OPC_LSR = 17, OPC_ASR = 18, OPC_BRLT = 24
+ , OPC_BRLE = 25, OPC_BREQ = 26, OPC_JMP = 27, OPC_JAL = 28
+ , OPC_BRNEQ = 29, OPC_DBNZ = 30, OPC_LOOP = 31, OPC_LDW = 32
+ , OPC_STW = 33, OPC_EI = 48, OPC_DI = 49, OPC_SI = 50
+ , OPC_RETI = 51, OPC_BREAK = 52, OPC_IFLUSH = 53
+} INSN_OPC;
+
+/* Enum declaration for msopc enums. */
+typedef enum insn_msopc {
+ MSOPC_LDCTXT, MSOPC_LDFB, MSOPC_STFB, MSOPC_FBCB
+ , MSOPC_MFBCB, MSOPC_FBCCI, MSOPC_FBRCI, MSOPC_FBCRI
+ , MSOPC_FBRRI, MSOPC_MFBCCI, MSOPC_MFBRCI, MSOPC_MFBCRI
+ , MSOPC_MFBRRI, MSOPC_FBCBDR, MSOPC_RCFBCB, MSOPC_MRCFBCB
+ , MSOPC_CBCAST, MSOPC_DUPCBCAST, MSOPC_WFBI, MSOPC_WFB
+ , MSOPC_RCRISC, MSOPC_FBCBINC, MSOPC_RCXMODE, MSOPC_INTLVR
+ , MSOPC_WFBINC, MSOPC_MWFBINC, MSOPC_WFBINCR, MSOPC_MWFBINCR
+ , MSOPC_FBCBINCS, MSOPC_MFBCBINCS, MSOPC_FBCBINCRS, MSOPC_MFBCBINCRS
+} INSN_MSOPC;
+
+/* Enum declaration for imm enums. */
+typedef enum insn_imm {
+ IMM_NO, IMM_YES
+} INSN_IMM;
+
+/* Enum declaration for . */
+typedef enum msys_syms {
+ H_NIL_DUP = 1, H_NIL_XX = 0
+} MSYS_SYMS;
+
+/* Attributes. */
+
+/* Enum declaration for machine type selection. */
+typedef enum mach_attr {
+ MACH_BASE, MACH_MS1, MACH_MS1_003, MACH_MS2
+ , MACH_MAX
+} MACH_ATTR;
+
+/* Enum declaration for instruction set selection. */
+typedef enum isa_attr {
+ ISA_MT, ISA_MAX
+} ISA_ATTR;
+
+/* Number of architecture variants. */
+#define MAX_ISAS 1
+#define MAX_MACHS ((int) MACH_MAX)
+
+/* Ifield support. */
+
+/* Ifield attribute indices. */
+
+/* Enum declaration for cgen_ifld attrs. */
+typedef enum cgen_ifld_attr {
+ CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
+ , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
+ , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
+} CGEN_IFLD_ATTR;
+
+/* Number of non-boolean elements in cgen_ifld_attr. */
+#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
+
+/* cgen_ifld attribute accessor macros. */
+#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0)
+
+/* Enum declaration for mt ifield types. */
+typedef enum ifield_type {
+ MT_F_NIL, MT_F_ANYOF, MT_F_MSYS, MT_F_OPC
+ , MT_F_IMM, MT_F_UU24, MT_F_SR1, MT_F_SR2
+ , MT_F_DR, MT_F_DRRR, MT_F_IMM16U, MT_F_IMM16S
+ , MT_F_IMM16A, MT_F_UU4A, MT_F_UU4B, MT_F_UU12
+ , MT_F_UU8, MT_F_UU16, MT_F_UU1, MT_F_MSOPC
+ , MT_F_UU_26_25, MT_F_MASK, MT_F_BANKADDR, MT_F_RDA
+ , MT_F_UU_2_25, MT_F_RBBC, MT_F_PERM, MT_F_MODE
+ , MT_F_UU_1_24, MT_F_WR, MT_F_FBINCR, MT_F_UU_2_23
+ , MT_F_XMODE, MT_F_A23, MT_F_MASK1, MT_F_CR
+ , MT_F_TYPE, MT_F_INCAMT, MT_F_CBS, MT_F_UU_1_19
+ , MT_F_BALL, MT_F_COLNUM, MT_F_BRC, MT_F_INCR
+ , MT_F_FBDISP, MT_F_UU_4_15, MT_F_LENGTH, MT_F_UU_1_15
+ , MT_F_RC, MT_F_RCNUM, MT_F_ROWNUM, MT_F_CBX
+ , MT_F_ID, MT_F_SIZE, MT_F_ROWNUM1, MT_F_UU_3_11
+ , MT_F_RC1, MT_F_CCB, MT_F_CBRB, MT_F_CDB
+ , MT_F_ROWNUM2, MT_F_CELL, MT_F_UU_3_9, MT_F_CONTNUM
+ , MT_F_UU_1_6, MT_F_DUP, MT_F_RC2, MT_F_CTXDISP
+ , MT_F_IMM16L, MT_F_LOOPO, MT_F_CB1SEL, MT_F_CB2SEL
+ , MT_F_CB1INCR, MT_F_CB2INCR, MT_F_RC3, MT_F_MSYSFRSR2
+ , MT_F_BRC2, MT_F_BALL2, MT_F_MAX
+} IFIELD_TYPE;
+
+#define MAX_IFLD ((int) MT_F_MAX)
+
+/* Hardware attribute indices. */
+
+/* Enum declaration for cgen_hw attrs. */
+typedef enum cgen_hw_attr {
+ CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
+ , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
+} CGEN_HW_ATTR;
+
+/* Number of non-boolean elements in cgen_hw_attr. */
+#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
+
+/* cgen_hw attribute accessor macros. */
+#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
+#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0)
+
+/* Enum declaration for mt hardware types. */
+typedef enum cgen_hw_type {
+ HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
+ , HW_H_IADDR, HW_H_SPR, HW_H_PC, HW_MAX
+} CGEN_HW_TYPE;
+
+#define MAX_HW ((int) HW_MAX)
+
+/* Operand attribute indices. */
+
+/* Enum declaration for cgen_operand attrs. */
+typedef enum cgen_operand_attr {
+ CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
+ , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
+ , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
+} CGEN_OPERAND_ATTR;
+
+/* Number of non-boolean elements in cgen_operand_attr. */
+#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
+
+/* cgen_operand attribute accessor macros. */
+#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
+
+/* Enum declaration for mt operand types. */
+typedef enum cgen_operand_type {
+ MT_OPERAND_PC, MT_OPERAND_FRSR1, MT_OPERAND_FRSR2, MT_OPERAND_FRDR
+ , MT_OPERAND_FRDRRR, MT_OPERAND_IMM16, MT_OPERAND_IMM16Z, MT_OPERAND_IMM16O
+ , MT_OPERAND_RC, MT_OPERAND_RCNUM, MT_OPERAND_CONTNUM, MT_OPERAND_RBBC
+ , MT_OPERAND_COLNUM, MT_OPERAND_ROWNUM, MT_OPERAND_ROWNUM1, MT_OPERAND_ROWNUM2
+ , MT_OPERAND_RC1, MT_OPERAND_RC2, MT_OPERAND_CBRB, MT_OPERAND_CELL
+ , MT_OPERAND_DUP, MT_OPERAND_CTXDISP, MT_OPERAND_FBDISP, MT_OPERAND_TYPE
+ , MT_OPERAND_MASK, MT_OPERAND_BANKADDR, MT_OPERAND_INCAMT, MT_OPERAND_XMODE
+ , MT_OPERAND_MASK1, MT_OPERAND_BALL, MT_OPERAND_BRC, MT_OPERAND_RDA
+ , MT_OPERAND_WR, MT_OPERAND_BALL2, MT_OPERAND_BRC2, MT_OPERAND_PERM
+ , MT_OPERAND_A23, MT_OPERAND_CR, MT_OPERAND_CBS, MT_OPERAND_INCR
+ , MT_OPERAND_LENGTH, MT_OPERAND_CBX, MT_OPERAND_CCB, MT_OPERAND_CDB
+ , MT_OPERAND_MODE, MT_OPERAND_ID, MT_OPERAND_SIZE, MT_OPERAND_FBINCR
+ , MT_OPERAND_LOOPSIZE, MT_OPERAND_IMM16L, MT_OPERAND_RC3, MT_OPERAND_CB1SEL
+ , MT_OPERAND_CB2SEL, MT_OPERAND_CB1INCR, MT_OPERAND_CB2INCR, MT_OPERAND_MAX
+} CGEN_OPERAND_TYPE;
+
+/* Number of operands types. */
+#define MAX_OPERANDS 55
+
+/* Maximum number of operands referenced by any insn. */
+#define MAX_OPERAND_INSTANCES 8
+
+/* Insn attribute indices. */
+
+/* Enum declaration for cgen_insn attrs. */
+typedef enum cgen_insn_attr {
+ CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
+ , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_LOAD_DELAY, CGEN_INSN_MEMORY_ACCESS
+ , CGEN_INSN_AL_INSN, CGEN_INSN_IO_INSN, CGEN_INSN_BR_INSN, CGEN_INSN_JAL_HAZARD
+ , CGEN_INSN_USES_FRDR, CGEN_INSN_USES_FRDRRR, CGEN_INSN_USES_FRSR1, CGEN_INSN_USES_FRSR2
+ , CGEN_INSN_SKIPA, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH
+ , CGEN_INSN_END_NBOOLS
+} CGEN_INSN_ATTR;
+
+/* Number of non-boolean elements in cgen_insn_attr. */
+#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
+
+/* cgen_insn attribute accessor macros. */
+#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0)
+#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0)
+#define CGEN_ATTR_CGEN_INSN_LOAD_DELAY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_LOAD_DELAY)) != 0)
+#define CGEN_ATTR_CGEN_INSN_MEMORY_ACCESS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_MEMORY_ACCESS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_AL_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_AL_INSN)) != 0)
+#define CGEN_ATTR_CGEN_INSN_IO_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_IO_INSN)) != 0)
+#define CGEN_ATTR_CGEN_INSN_BR_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_BR_INSN)) != 0)
+#define CGEN_ATTR_CGEN_INSN_JAL_HAZARD_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_JAL_HAZARD)) != 0)
+#define CGEN_ATTR_CGEN_INSN_USES_FRDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRDR)) != 0)
+#define CGEN_ATTR_CGEN_INSN_USES_FRDRRR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRDRRR)) != 0)
+#define CGEN_ATTR_CGEN_INSN_USES_FRSR1_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRSR1)) != 0)
+#define CGEN_ATTR_CGEN_INSN_USES_FRSR2_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_FRSR2)) != 0)
+#define CGEN_ATTR_CGEN_INSN_SKIPA_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIPA)) != 0)
+
+/* cgen.h uses things we just defined. */
+#include "opcode/cgen.h"
+
+extern const struct cgen_ifld mt_cgen_ifld_table[];
+
+/* Attributes. */
+extern const CGEN_ATTR_TABLE mt_cgen_hardware_attr_table[];
+extern const CGEN_ATTR_TABLE mt_cgen_ifield_attr_table[];
+extern const CGEN_ATTR_TABLE mt_cgen_operand_attr_table[];
+extern const CGEN_ATTR_TABLE mt_cgen_insn_attr_table[];
+
+/* Hardware decls. */
+
+extern CGEN_KEYWORD mt_cgen_opval_h_spr;
+
+extern const CGEN_HW_ENTRY mt_cgen_hw_table[];
+
+
+
+#endif /* MT_CPU_H */
Added: branches/binutils/package/opcodes/mt-dis.c
===================================================================
--- branches/binutils/package/opcodes/mt-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,719 @@
+/* Disassembler interface for targets using CGEN. -*- C -*-
+ CGEN: Cpu tools GENerator
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-dis.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "dis-asm.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "libiberty.h"
+#include "mt-desc.h"
+#include "mt-opc.h"
+#include "opintl.h"
+
+/* Default text to print if an instruction isn't recognized. */
+#define UNKNOWN_INSN_MSG _("*unknown*")
+
+static void print_normal
+ (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
+static void print_address
+ (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
+static void print_keyword
+ (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
+static void print_insn_normal
+ (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
+static int print_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
+static int default_print_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
+static int read_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
+ unsigned long *);
+
+/* -- disassembler routines inserted here. */
+
+/* -- dis.c */
+static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
+static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
+
+static void
+print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "$%lx", value);
+
+ if (0)
+ print_normal (cd, dis_info, value, attrs, pc, length);
+}
+
+static void
+print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ print_address (cd, dis_info, value + pc, attrs, pc, length);
+}
+
+/* -- */
+
+void mt_cgen_print_operand
+ (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
+
+/* Main entry point for printing operands.
+ XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
+ of dis-asm.h on cgen.h.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `print_insn_normal', but keeping it
+ separate makes clear the interface between `print_insn_normal' and each of
+ the handlers. */
+
+void
+mt_cgen_print_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ void * xinfo,
+ CGEN_FIELDS *fields,
+ void const *attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ int length)
+{
+ disassemble_info *info = (disassemble_info *) xinfo;
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ print_dollarhex (cd, info, fields->f_a23, 0, pc, length);
+ break;
+ case MT_OPERAND_BALL :
+ print_dollarhex (cd, info, fields->f_ball, 0, pc, length);
+ break;
+ case MT_OPERAND_BALL2 :
+ print_dollarhex (cd, info, fields->f_ball2, 0, pc, length);
+ break;
+ case MT_OPERAND_BANKADDR :
+ print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length);
+ break;
+ case MT_OPERAND_BRC :
+ print_dollarhex (cd, info, fields->f_brc, 0, pc, length);
+ break;
+ case MT_OPERAND_BRC2 :
+ print_dollarhex (cd, info, fields->f_brc2, 0, pc, length);
+ break;
+ case MT_OPERAND_CB1INCR :
+ print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case MT_OPERAND_CB1SEL :
+ print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length);
+ break;
+ case MT_OPERAND_CB2INCR :
+ print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case MT_OPERAND_CB2SEL :
+ print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length);
+ break;
+ case MT_OPERAND_CBRB :
+ print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length);
+ break;
+ case MT_OPERAND_CBS :
+ print_dollarhex (cd, info, fields->f_cbs, 0, pc, length);
+ break;
+ case MT_OPERAND_CBX :
+ print_dollarhex (cd, info, fields->f_cbx, 0, pc, length);
+ break;
+ case MT_OPERAND_CCB :
+ print_dollarhex (cd, info, fields->f_ccb, 0, pc, length);
+ break;
+ case MT_OPERAND_CDB :
+ print_dollarhex (cd, info, fields->f_cdb, 0, pc, length);
+ break;
+ case MT_OPERAND_CELL :
+ print_dollarhex (cd, info, fields->f_cell, 0, pc, length);
+ break;
+ case MT_OPERAND_COLNUM :
+ print_dollarhex (cd, info, fields->f_colnum, 0, pc, length);
+ break;
+ case MT_OPERAND_CONTNUM :
+ print_dollarhex (cd, info, fields->f_contnum, 0, pc, length);
+ break;
+ case MT_OPERAND_CR :
+ print_dollarhex (cd, info, fields->f_cr, 0, pc, length);
+ break;
+ case MT_OPERAND_CTXDISP :
+ print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length);
+ break;
+ case MT_OPERAND_DUP :
+ print_dollarhex (cd, info, fields->f_dup, 0, pc, length);
+ break;
+ case MT_OPERAND_FBDISP :
+ print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length);
+ break;
+ case MT_OPERAND_FBINCR :
+ print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length);
+ break;
+ case MT_OPERAND_FRDR :
+ print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
+ break;
+ case MT_OPERAND_FRDRRR :
+ print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
+ break;
+ case MT_OPERAND_FRSR1 :
+ print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR));
+ break;
+ case MT_OPERAND_FRSR2 :
+ print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR));
+ break;
+ case MT_OPERAND_ID :
+ print_dollarhex (cd, info, fields->f_id, 0, pc, length);
+ break;
+ case MT_OPERAND_IMM16 :
+ print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case MT_OPERAND_IMM16L :
+ print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length);
+ break;
+ case MT_OPERAND_IMM16O :
+ print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+ break;
+ case MT_OPERAND_IMM16Z :
+ print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length);
+ break;
+ case MT_OPERAND_INCAMT :
+ print_dollarhex (cd, info, fields->f_incamt, 0, pc, length);
+ break;
+ case MT_OPERAND_INCR :
+ print_dollarhex (cd, info, fields->f_incr, 0, pc, length);
+ break;
+ case MT_OPERAND_LENGTH :
+ print_dollarhex (cd, info, fields->f_length, 0, pc, length);
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+ break;
+ case MT_OPERAND_MASK :
+ print_dollarhex (cd, info, fields->f_mask, 0, pc, length);
+ break;
+ case MT_OPERAND_MASK1 :
+ print_dollarhex (cd, info, fields->f_mask1, 0, pc, length);
+ break;
+ case MT_OPERAND_MODE :
+ print_dollarhex (cd, info, fields->f_mode, 0, pc, length);
+ break;
+ case MT_OPERAND_PERM :
+ print_dollarhex (cd, info, fields->f_perm, 0, pc, length);
+ break;
+ case MT_OPERAND_RBBC :
+ print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length);
+ break;
+ case MT_OPERAND_RC :
+ print_dollarhex (cd, info, fields->f_rc, 0, pc, length);
+ break;
+ case MT_OPERAND_RC1 :
+ print_dollarhex (cd, info, fields->f_rc1, 0, pc, length);
+ break;
+ case MT_OPERAND_RC2 :
+ print_dollarhex (cd, info, fields->f_rc2, 0, pc, length);
+ break;
+ case MT_OPERAND_RC3 :
+ print_dollarhex (cd, info, fields->f_rc3, 0, pc, length);
+ break;
+ case MT_OPERAND_RCNUM :
+ print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length);
+ break;
+ case MT_OPERAND_RDA :
+ print_dollarhex (cd, info, fields->f_rda, 0, pc, length);
+ break;
+ case MT_OPERAND_ROWNUM :
+ print_dollarhex (cd, info, fields->f_rownum, 0, pc, length);
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length);
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length);
+ break;
+ case MT_OPERAND_SIZE :
+ print_dollarhex (cd, info, fields->f_size, 0, pc, length);
+ break;
+ case MT_OPERAND_TYPE :
+ print_dollarhex (cd, info, fields->f_type, 0, pc, length);
+ break;
+ case MT_OPERAND_WR :
+ print_dollarhex (cd, info, fields->f_wr, 0, pc, length);
+ break;
+ case MT_OPERAND_XMODE :
+ print_dollarhex (cd, info, fields->f_xmode, 0, pc, length);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+cgen_print_fn * const mt_cgen_print_handlers[] =
+{
+ print_insn_normal,
+};
+
+
+void
+mt_cgen_init_dis (CGEN_CPU_DESC cd)
+{
+ mt_cgen_init_opcode_table (cd);
+ mt_cgen_init_ibld_table (cd);
+ cd->print_handlers = & mt_cgen_print_handlers[0];
+ cd->print_operand = mt_cgen_print_operand;
+}
+
+
+/* Default print handler. */
+
+static void
+print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ long value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+#ifdef CGEN_PRINT_NORMAL
+ CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
+#endif
+
+ /* Print the operand as directed by the attributes. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
+ ; /* nothing to do */
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
+ (*info->fprintf_func) (info->stream, "%ld", value);
+ else
+ (*info->fprintf_func) (info->stream, "0x%lx", value);
+}
+
+/* Default address handler. */
+
+static void
+print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ bfd_vma value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+#ifdef CGEN_PRINT_ADDRESS
+ CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
+#endif
+
+ /* Print the operand as directed by the attributes. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
+ ; /* Nothing to do. */
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
+ (*info->print_address_func) (value, info);
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
+ (*info->print_address_func) (value, info);
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
+ (*info->fprintf_func) (info->stream, "%ld", (long) value);
+ else
+ (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
+}
+
+/* Keyword print handler. */
+
+static void
+print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ CGEN_KEYWORD *keyword_table,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+ const CGEN_KEYWORD_ENTRY *ke;
+
+ ke = cgen_keyword_lookup_value (keyword_table, value);
+ if (ke != NULL)
+ (*info->fprintf_func) (info->stream, "%s", ke->name);
+ else
+ (*info->fprintf_func) (info->stream, "???");
+}
+
+/* Default insn printer.
+
+ DIS_INFO is defined as `void *' so the disassembler needn't know anything
+ about disassemble_info. */
+
+static void
+print_insn_normal (CGEN_CPU_DESC cd,
+ void *dis_info,
+ const CGEN_INSN *insn,
+ CGEN_FIELDS *fields,
+ bfd_vma pc,
+ int length)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ disassemble_info *info = (disassemble_info *) dis_info;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+
+ CGEN_INIT_PRINT (cd);
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
+ {
+ if (CGEN_SYNTAX_MNEMONIC_P (*syn))
+ {
+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
+ continue;
+ }
+ if (CGEN_SYNTAX_CHAR_P (*syn))
+ {
+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
+ continue;
+ }
+
+ /* We have an operand. */
+ mt_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
+ fields, CGEN_INSN_ATTRS (insn), pc, length);
+ }
+}
+
+/* Subroutine of print_insn. Reads an insn into the given buffers and updates
+ the extract info.
+ Returns 0 if all is well, non-zero otherwise. */
+
+static int
+read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ int buflen,
+ CGEN_EXTRACT_INFO *ex_info,
+ unsigned long *insn_value)
+{
+ int status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return -1;
+ }
+
+ ex_info->dis_info = info;
+ ex_info->valid = (1 << buflen) - 1;
+ ex_info->insn_bytes = buf;
+
+ *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
+ return 0;
+}
+
+/* Utility to print an insn.
+ BUF is the base part of the insn, target byte order, BUFLEN bytes long.
+ The result is the size of the insn in bytes or zero for an unknown insn
+ or -1 if an error occurs fetching data (memory_error_func will have
+ been called). */
+
+static int
+print_insn (CGEN_CPU_DESC cd,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ unsigned int buflen)
+{
+ CGEN_INSN_INT insn_value;
+ const CGEN_INSN_LIST *insn_list;
+ CGEN_EXTRACT_INFO ex_info;
+ int basesize;
+
+ /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
+ basesize = cd->base_insn_bitsize < buflen * 8 ?
+ cd->base_insn_bitsize : buflen * 8;
+ insn_value = cgen_get_insn_value (cd, buf, basesize);
+
+
+ /* Fill in ex_info fields like read_insn would. Don't actually call
+ read_insn, since the incoming buffer is already read (and possibly
+ modified a la m32r). */
+ ex_info.valid = (1 << buflen) - 1;
+ ex_info.dis_info = info;
+ ex_info.insn_bytes = buf;
+
+ /* The instructions are stored in hash lists.
+ Pick the first one and keep trying until we find the right one. */
+
+ insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
+ while (insn_list != NULL)
+ {
+ const CGEN_INSN *insn = insn_list->insn;
+ CGEN_FIELDS fields;
+ int length;
+ unsigned long insn_value_cropped;
+
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* Not needed as insn shouldn't be in hash lists if not supported. */
+ /* Supported by this cpu? */
+ if (! mt_cgen_insn_supported (cd, insn))
+ {
+ insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+ continue;
+ }
+#endif
+
+ /* Basic bit mask must be correct. */
+ /* ??? May wish to allow target to defer this check until the extract
+ handler. */
+
+ /* Base size may exceed this instruction's size. Extract the
+ relevant part from the buffer. */
+ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
+ info->endian == BFD_ENDIAN_BIG);
+ else
+ insn_value_cropped = insn_value;
+
+ if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
+ == CGEN_INSN_BASE_VALUE (insn))
+ {
+ /* Printing is handled in two passes. The first pass parses the
+ machine insn and extracts the fields. The second pass prints
+ them. */
+
+ /* Make sure the entire insn is loaded into insn_value, if it
+ can fit. */
+ if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ {
+ unsigned long full_insn_value;
+ int rc = read_insn (cd, pc, info, buf,
+ CGEN_INSN_BITSIZE (insn) / 8,
+ & ex_info, & full_insn_value);
+ if (rc != 0)
+ return rc;
+ length = CGEN_EXTRACT_FN (cd, insn)
+ (cd, insn, &ex_info, full_insn_value, &fields, pc);
+ }
+ else
+ length = CGEN_EXTRACT_FN (cd, insn)
+ (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
+
+ /* Length < 0 -> error. */
+ if (length < 0)
+ return length;
+ if (length > 0)
+ {
+ CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
+ /* Length is in bits, result is in bytes. */
+ return length / 8;
+ }
+ }
+
+ insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+ }
+
+ return 0;
+}
+
+/* Default value for CGEN_PRINT_INSN.
+ The result is the size of the insn in bytes or zero for an unknown insn
+ or -1 if an error occured fetching bytes. */
+
+#ifndef CGEN_PRINT_INSN
+#define CGEN_PRINT_INSN default_print_insn
+#endif
+
+static int
+default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
+{
+ bfd_byte buf[CGEN_MAX_INSN_SIZE];
+ int buflen;
+ int status;
+
+ /* Attempt to read the base part of the insn. */
+ buflen = cd->base_insn_bitsize / 8;
+ status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+ /* Try again with the minimum part, if min < base. */
+ if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
+ {
+ buflen = cd->min_insn_bitsize / 8;
+ status = (*info->read_memory_func) (pc, buf, buflen, info);
+ }
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return -1;
+ }
+
+ return print_insn (cd, pc, info, buf, buflen);
+}
+
+/* Main entry point.
+ Print one instruction from PC on INFO->STREAM.
+ Return the size of the instruction (in bytes). */
+
+typedef struct cpu_desc_list
+{
+ struct cpu_desc_list *next;
+ CGEN_BITSET *isa;
+ int mach;
+ int endian;
+ CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
+int
+print_insn_mt (bfd_vma pc, disassemble_info *info)
+{
+ static cpu_desc_list *cd_list = 0;
+ cpu_desc_list *cl = 0;
+ static CGEN_CPU_DESC cd = 0;
+ static CGEN_BITSET *prev_isa;
+ static int prev_mach;
+ static int prev_endian;
+ int length;
+ CGEN_BITSET *isa;
+ int mach;
+ int endian = (info->endian == BFD_ENDIAN_BIG
+ ? CGEN_ENDIAN_BIG
+ : CGEN_ENDIAN_LITTLE);
+ enum bfd_architecture arch;
+
+ /* ??? gdb will set mach but leave the architecture as "unknown" */
+#ifndef CGEN_BFD_ARCH
+#define CGEN_BFD_ARCH bfd_arch_mt
+#endif
+ arch = info->arch;
+ if (arch == bfd_arch_unknown)
+ arch = CGEN_BFD_ARCH;
+
+ /* There's no standard way to compute the machine or isa number
+ so we leave it to the target. */
+#ifdef CGEN_COMPUTE_MACH
+ mach = CGEN_COMPUTE_MACH (info);
+#else
+ mach = info->mach;
+#endif
+
+#ifdef CGEN_COMPUTE_ISA
+ {
+ static CGEN_BITSET *permanent_isa;
+
+ if (!permanent_isa)
+ permanent_isa = cgen_bitset_create (MAX_ISAS);
+ isa = permanent_isa;
+ cgen_bitset_clear (isa);
+ cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
+ }
+#else
+ isa = info->insn_sets;
+#endif
+
+ /* If we've switched cpu's, try to find a handle we've used before */
+ if (cd
+ && (cgen_bitset_compare (isa, prev_isa) != 0
+ || mach != prev_mach
+ || endian != prev_endian))
+ {
+ cd = 0;
+ for (cl = cd_list; cl; cl = cl->next)
+ {
+ if (cgen_bitset_compare (cl->isa, isa) == 0 &&
+ cl->mach == mach &&
+ cl->endian == endian)
+ {
+ cd = cl->cd;
+ prev_isa = cd->isas;
+ break;
+ }
+ }
+ }
+
+ /* If we haven't initialized yet, initialize the opcode table. */
+ if (! cd)
+ {
+ const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
+ const char *mach_name;
+
+ if (!arch_type)
+ abort ();
+ mach_name = arch_type->printable_name;
+
+ prev_isa = cgen_bitset_copy (isa);
+ prev_mach = mach;
+ prev_endian = endian;
+ cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
+ CGEN_CPU_OPEN_BFDMACH, mach_name,
+ CGEN_CPU_OPEN_ENDIAN, prev_endian,
+ CGEN_CPU_OPEN_END);
+ if (!cd)
+ abort ();
+
+ /* Save this away for future reference. */
+ cl = xmalloc (sizeof (struct cpu_desc_list));
+ cl->cd = cd;
+ cl->isa = prev_isa;
+ cl->mach = mach;
+ cl->endian = endian;
+ cl->next = cd_list;
+ cd_list = cl;
+
+ mt_cgen_init_dis (cd);
+ }
+
+ /* We try to have as much common code as possible.
+ But at this point some targets need to take over. */
+ /* ??? Some targets may need a hook elsewhere. Try to avoid this,
+ but if not possible try to move this hook elsewhere rather than
+ have two hooks. */
+ length = CGEN_PRINT_INSN (cd, pc, info);
+ if (length > 0)
+ return length;
+ if (length < 0)
+ return -1;
+
+ (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
+ return cd->default_insn_bitsize / 8;
+}
Added: branches/binutils/package/opcodes/mt-ibld.c
===================================================================
--- branches/binutils/package/opcodes/mt-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1729 @@
+/* Instruction building/extraction support for mt. -*- C -*-
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
+ - the resultant file is machine generated, cgen-ibld.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "dis-asm.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "mt-desc.h"
+#include "mt-opc.h"
+#include "opintl.h"
+#include "safe-ctype.h"
+
+#undef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#undef max
+#define max(a,b) ((a) > (b) ? (a) : (b))
+
+/* Used by the ifield rtx function. */
+#define FLD(f) (fields->f)
+
+static const char * insert_normal
+ (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
+ unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
+static const char * insert_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *,
+ CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
+static int extract_normal
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
+ unsigned int, unsigned int, unsigned int, unsigned int,
+ unsigned int, unsigned int, bfd_vma, long *);
+static int extract_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
+ CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
+#if CGEN_INT_INSN_P
+static void put_insn_int_value
+ (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
+#endif
+#if ! CGEN_INT_INSN_P
+static CGEN_INLINE void insert_1
+ (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
+static CGEN_INLINE int fill_cache
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
+static CGEN_INLINE long extract_1
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
+#endif
+
+/* Operand insertion. */
+
+#if ! CGEN_INT_INSN_P
+
+/* Subroutine of insert_normal. */
+
+static CGEN_INLINE void
+insert_1 (CGEN_CPU_DESC cd,
+ unsigned long value,
+ int start,
+ int length,
+ int word_length,
+ unsigned char *bufp)
+{
+ unsigned long x,mask;
+ int shift;
+
+ x = cgen_get_insn_value (cd, bufp, word_length);
+
+ /* Written this way to avoid undefined behaviour. */
+ mask = (((1L << (length - 1)) - 1) << 1) | 1;
+ if (CGEN_INSN_LSB0_P)
+ shift = (start + 1) - length;
+ else
+ shift = (word_length - (start + length));
+ x = (x & ~(mask << shift)) | ((value & mask) << shift);
+
+ cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+}
+
+#endif /* ! CGEN_INT_INSN_P */
+
+/* Default insertion routine.
+
+ ATTRS is a mask of the boolean attributes.
+ WORD_OFFSET is the offset in bits from the start of the insn of the value.
+ WORD_LENGTH is the length of the word in bits in which the value resides.
+ START is the starting bit number in the word, architecture origin.
+ LENGTH is the length of VALUE in bits.
+ TOTAL_LENGTH is the total length of the insn in bits.
+
+ The result is an error message or NULL if success. */
+
+/* ??? This duplicates functionality with bfd's howto table and
+ bfd_install_relocation. */
+/* ??? This doesn't handle bfd_vma's. Create another function when
+ necessary. */
+
+static const char *
+insert_normal (CGEN_CPU_DESC cd,
+ long value,
+ unsigned int attrs,
+ unsigned int word_offset,
+ unsigned int start,
+ unsigned int length,
+ unsigned int word_length,
+ unsigned int total_length,
+ CGEN_INSN_BYTES_PTR buffer)
+{
+ static char errbuf[100];
+ /* Written this way to avoid undefined behaviour. */
+ unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ /* If LENGTH is zero, this operand doesn't contribute to the value. */
+ if (length == 0)
+ return NULL;
+
+ if (word_length > 32)
+ abort ();
+
+ /* For architectures with insns smaller than the base-insn-bitsize,
+ word_length may be too big. */
+ if (cd->min_insn_bitsize < cd->base_insn_bitsize)
+ {
+ if (word_offset == 0
+ && word_length > total_length)
+ word_length = total_length;
+ }
+
+ /* Ensure VALUE will fit. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
+ {
+ long minval = - (1L << (length - 1));
+ unsigned long maxval = mask;
+
+ if ((value > 0 && (unsigned long) value > maxval)
+ || value < minval)
+ {
+ /* xgettext:c-format */
+ sprintf (errbuf,
+ _("operand out of range (%ld not between %ld and %lu)"),
+ value, minval, maxval);
+ return errbuf;
+ }
+ }
+ else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
+ {
+ unsigned long maxval = mask;
+
+ if ((unsigned long) value > maxval)
+ {
+ /* xgettext:c-format */
+ sprintf (errbuf,
+ _("operand out of range (%lu not between 0 and %lu)"),
+ value, maxval);
+ return errbuf;
+ }
+ }
+ else
+ {
+ if (! cgen_signed_overflow_ok_p (cd))
+ {
+ long minval = - (1L << (length - 1));
+ long maxval = (1L << (length - 1)) - 1;
+
+ if (value < minval || value > maxval)
+ {
+ sprintf
+ /* xgettext:c-format */
+ (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
+ value, minval, maxval);
+ return errbuf;
+ }
+ }
+ }
+
+#if CGEN_INT_INSN_P
+
+ {
+ int shift;
+
+ if (CGEN_INSN_LSB0_P)
+ shift = (word_offset + start + 1) - length;
+ else
+ shift = total_length - (word_offset + start + length);
+ *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
+ }
+
+#else /* ! CGEN_INT_INSN_P */
+
+ {
+ unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
+
+ insert_1 (cd, value, start, length, word_length, bufp);
+ }
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ return NULL;
+}
+
+/* Default insn builder (insert handler).
+ The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
+ that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
+ recorded in host byte order, otherwise BUFFER is an array of bytes
+ and the value is recorded in target byte order).
+ The result is an error message or NULL if success. */
+
+static const char *
+insert_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN * insn,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ unsigned long value;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
+
+ CGEN_INIT_INSERT (cd);
+ value = CGEN_INSN_BASE_VALUE (insn);
+
+ /* If we're recording insns as numbers (rather than a string of bytes),
+ target byte order handling is deferred until later. */
+
+#if CGEN_INT_INSN_P
+
+ put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
+ CGEN_FIELDS_BITSIZE (fields), value);
+
+#else
+
+ cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
+ (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+ value);
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ /* ??? It would be better to scan the format's fields.
+ Still need to be able to insert a value based on the operand though;
+ e.g. storing a branch displacement that got resolved later.
+ Needs more thought first. */
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
+ {
+ const char *errmsg;
+
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ continue;
+
+ errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
+ fields, buffer, pc);
+ if (errmsg)
+ return errmsg;
+ }
+
+ return NULL;
+}
+
+#if CGEN_INT_INSN_P
+/* Cover function to store an insn value into an integral insn. Must go here
+ because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
+
+static void
+put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ CGEN_INSN_BYTES_PTR buf,
+ int length,
+ int insn_length,
+ CGEN_INSN_INT value)
+{
+ /* For architectures with insns smaller than the base-insn-bitsize,
+ length may be too big. */
+ if (length > insn_length)
+ *buf = value;
+ else
+ {
+ int shift = insn_length - length;
+ /* Written this way to avoid undefined behaviour. */
+ CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
+ }
+}
+#endif
+
+/* Operand extraction. */
+
+#if ! CGEN_INT_INSN_P
+
+/* Subroutine of extract_normal.
+ Ensure sufficient bytes are cached in EX_INFO.
+ OFFSET is the offset in bytes from the start of the insn of the value.
+ BYTES is the length of the needed value.
+ Returns 1 for success, 0 for failure. */
+
+static CGEN_INLINE int
+fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ CGEN_EXTRACT_INFO *ex_info,
+ int offset,
+ int bytes,
+ bfd_vma pc)
+{
+ /* It's doubtful that the middle part has already been fetched so
+ we don't optimize that case. kiss. */
+ unsigned int mask;
+ disassemble_info *info = (disassemble_info *) ex_info->dis_info;
+
+ /* First do a quick check. */
+ mask = (1 << bytes) - 1;
+ if (((ex_info->valid >> offset) & mask) == mask)
+ return 1;
+
+ /* Search for the first byte we need to read. */
+ for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
+ if (! (mask & ex_info->valid))
+ break;
+
+ if (bytes)
+ {
+ int status;
+
+ pc += offset;
+ status = (*info->read_memory_func)
+ (pc, ex_info->insn_bytes + offset, bytes, info);
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return 0;
+ }
+
+ ex_info->valid |= ((1 << bytes) - 1) << offset;
+ }
+
+ return 1;
+}
+
+/* Subroutine of extract_normal. */
+
+static CGEN_INLINE long
+extract_1 (CGEN_CPU_DESC cd,
+ CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
+ int start,
+ int length,
+ int word_length,
+ unsigned char *bufp,
+ bfd_vma pc ATTRIBUTE_UNUSED)
+{
+ unsigned long x;
+ int shift;
+
+ x = cgen_get_insn_value (cd, bufp, word_length);
+
+ if (CGEN_INSN_LSB0_P)
+ shift = (start + 1) - length;
+ else
+ shift = (word_length - (start + length));
+ return x >> shift;
+}
+
+#endif /* ! CGEN_INT_INSN_P */
+
+/* Default extraction routine.
+
+ INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
+ or sometimes less for cases like the m32r where the base insn size is 32
+ but some insns are 16 bits.
+ ATTRS is a mask of the boolean attributes. We only need `SIGNED',
+ but for generality we take a bitmask of all of them.
+ WORD_OFFSET is the offset in bits from the start of the insn of the value.
+ WORD_LENGTH is the length of the word in bits in which the value resides.
+ START is the starting bit number in the word, architecture origin.
+ LENGTH is the length of VALUE in bits.
+ TOTAL_LENGTH is the total length of the insn in bits.
+
+ Returns 1 for success, 0 for failure. */
+
+/* ??? The return code isn't properly used. wip. */
+
+/* ??? This doesn't handle bfd_vma's. Create another function when
+ necessary. */
+
+static int
+extract_normal (CGEN_CPU_DESC cd,
+#if ! CGEN_INT_INSN_P
+ CGEN_EXTRACT_INFO *ex_info,
+#else
+ CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
+#endif
+ CGEN_INSN_INT insn_value,
+ unsigned int attrs,
+ unsigned int word_offset,
+ unsigned int start,
+ unsigned int length,
+ unsigned int word_length,
+ unsigned int total_length,
+#if ! CGEN_INT_INSN_P
+ bfd_vma pc,
+#else
+ bfd_vma pc ATTRIBUTE_UNUSED,
+#endif
+ long *valuep)
+{
+ long value, mask;
+
+ /* If LENGTH is zero, this operand doesn't contribute to the value
+ so give it a standard value of zero. */
+ if (length == 0)
+ {
+ *valuep = 0;
+ return 1;
+ }
+
+ if (word_length > 32)
+ abort ();
+
+ /* For architectures with insns smaller than the insn-base-bitsize,
+ word_length may be too big. */
+ if (cd->min_insn_bitsize < cd->base_insn_bitsize)
+ {
+ if (word_offset == 0
+ && word_length > total_length)
+ word_length = total_length;
+ }
+
+ /* Does the value reside in INSN_VALUE, and at the right alignment? */
+
+ if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
+ {
+ if (CGEN_INSN_LSB0_P)
+ value = insn_value >> ((word_offset + start + 1) - length);
+ else
+ value = insn_value >> (total_length - ( word_offset + start + length));
+ }
+
+#if ! CGEN_INT_INSN_P
+
+ else
+ {
+ unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
+
+ if (word_length > 32)
+ abort ();
+
+ if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
+ return 0;
+
+ value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
+ }
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ /* Written this way to avoid undefined behaviour. */
+ mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ value &= mask;
+ /* sign extend? */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
+ && (value & (1L << (length - 1))))
+ value |= ~mask;
+
+ *valuep = value;
+
+ return 1;
+}
+
+/* Default insn extractor.
+
+ INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
+ The extracted fields are stored in FIELDS.
+ EX_INFO is used to handle reading variable length insns.
+ Return the length of the insn in bits, or 0 if no match,
+ or -1 if an error occurs fetching data (memory_error_func will have
+ been called). */
+
+static int
+extract_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS *fields,
+ bfd_vma pc)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+
+ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
+
+ CGEN_INIT_EXTRACT (cd);
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
+ {
+ int length;
+
+ if (CGEN_SYNTAX_CHAR_P (*syn))
+ continue;
+
+ length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
+ ex_info, insn_value, fields, pc);
+ if (length <= 0)
+ return length;
+ }
+
+ /* We recognized and successfully extracted this insn. */
+ return CGEN_INSN_BITSIZE (insn);
+}
+
+/* Machine generated code added here. */
+
+const char * mt_cgen_insert_operand
+ (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
+
+/* Main entry point for operand insertion.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `parse_insn_normal', but keeping it
+ separate makes clear the interface between `parse_insn_normal' and each of
+ the handlers. It's also needed by GAS to insert operands that couldn't be
+ resolved during parsing. */
+
+const char *
+mt_cgen_insert_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc ATTRIBUTE_UNUSED)
+{
+ const char * errmsg = NULL;
+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ errmsg = insert_normal (cd, fields->f_a23, 0, 0, 23, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_BALL :
+ errmsg = insert_normal (cd, fields->f_ball, 0, 0, 19, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_BALL2 :
+ errmsg = insert_normal (cd, fields->f_ball2, 0, 0, 15, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_BANKADDR :
+ errmsg = insert_normal (cd, fields->f_bankaddr, 0, 0, 25, 13, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_BRC :
+ errmsg = insert_normal (cd, fields->f_brc, 0, 0, 18, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_BRC2 :
+ errmsg = insert_normal (cd, fields->f_brc2, 0, 0, 14, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CB1INCR :
+ errmsg = insert_normal (cd, fields->f_cb1incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CB1SEL :
+ errmsg = insert_normal (cd, fields->f_cb1sel, 0, 0, 25, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CB2INCR :
+ errmsg = insert_normal (cd, fields->f_cb2incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CB2SEL :
+ errmsg = insert_normal (cd, fields->f_cb2sel, 0, 0, 22, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CBRB :
+ errmsg = insert_normal (cd, fields->f_cbrb, 0, 0, 10, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CBS :
+ errmsg = insert_normal (cd, fields->f_cbs, 0, 0, 19, 2, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CBX :
+ errmsg = insert_normal (cd, fields->f_cbx, 0, 0, 14, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CCB :
+ errmsg = insert_normal (cd, fields->f_ccb, 0, 0, 11, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CDB :
+ errmsg = insert_normal (cd, fields->f_cdb, 0, 0, 10, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CELL :
+ errmsg = insert_normal (cd, fields->f_cell, 0, 0, 9, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_COLNUM :
+ errmsg = insert_normal (cd, fields->f_colnum, 0, 0, 18, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CONTNUM :
+ errmsg = insert_normal (cd, fields->f_contnum, 0, 0, 8, 9, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CR :
+ errmsg = insert_normal (cd, fields->f_cr, 0, 0, 22, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_CTXDISP :
+ errmsg = insert_normal (cd, fields->f_ctxdisp, 0, 0, 5, 6, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_DUP :
+ errmsg = insert_normal (cd, fields->f_dup, 0, 0, 6, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FBDISP :
+ errmsg = insert_normal (cd, fields->f_fbdisp, 0, 0, 15, 6, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FBINCR :
+ errmsg = insert_normal (cd, fields->f_fbincr, 0, 0, 23, 4, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FRDR :
+ errmsg = insert_normal (cd, fields->f_dr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FRDRRR :
+ errmsg = insert_normal (cd, fields->f_drrr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FRSR1 :
+ errmsg = insert_normal (cd, fields->f_sr1, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_FRSR2 :
+ errmsg = insert_normal (cd, fields->f_sr2, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_ID :
+ errmsg = insert_normal (cd, fields->f_id, 0, 0, 14, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_IMM16 :
+ {
+ long value = fields->f_imm16s;
+ value = ((value) + (0));
+ errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
+ }
+ break;
+ case MT_OPERAND_IMM16L :
+ errmsg = insert_normal (cd, fields->f_imm16l, 0, 0, 23, 16, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_IMM16O :
+ {
+ long value = fields->f_imm16s;
+ value = ((value) + (0));
+ errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
+ }
+ break;
+ case MT_OPERAND_IMM16Z :
+ errmsg = insert_normal (cd, fields->f_imm16u, 0, 0, 15, 16, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_INCAMT :
+ errmsg = insert_normal (cd, fields->f_incamt, 0, 0, 19, 8, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_INCR :
+ errmsg = insert_normal (cd, fields->f_incr, 0, 0, 17, 6, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_LENGTH :
+ errmsg = insert_normal (cd, fields->f_length, 0, 0, 15, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ {
+ long value = fields->f_loopo;
+ value = ((unsigned int) (value) >> (2));
+ errmsg = insert_normal (cd, value, 0, 0, 7, 8, 32, total_length, buffer);
+ }
+ break;
+ case MT_OPERAND_MASK :
+ errmsg = insert_normal (cd, fields->f_mask, 0, 0, 25, 16, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_MASK1 :
+ errmsg = insert_normal (cd, fields->f_mask1, 0, 0, 22, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_MODE :
+ errmsg = insert_normal (cd, fields->f_mode, 0, 0, 25, 2, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_PERM :
+ errmsg = insert_normal (cd, fields->f_perm, 0, 0, 25, 2, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RBBC :
+ errmsg = insert_normal (cd, fields->f_rbbc, 0, 0, 25, 2, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RC :
+ errmsg = insert_normal (cd, fields->f_rc, 0, 0, 15, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RC1 :
+ errmsg = insert_normal (cd, fields->f_rc1, 0, 0, 11, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RC2 :
+ errmsg = insert_normal (cd, fields->f_rc2, 0, 0, 6, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RC3 :
+ errmsg = insert_normal (cd, fields->f_rc3, 0, 0, 7, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RCNUM :
+ errmsg = insert_normal (cd, fields->f_rcnum, 0, 0, 14, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_RDA :
+ errmsg = insert_normal (cd, fields->f_rda, 0, 0, 25, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_ROWNUM :
+ errmsg = insert_normal (cd, fields->f_rownum, 0, 0, 14, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ errmsg = insert_normal (cd, fields->f_rownum1, 0, 0, 12, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ errmsg = insert_normal (cd, fields->f_rownum2, 0, 0, 9, 3, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_SIZE :
+ errmsg = insert_normal (cd, fields->f_size, 0, 0, 13, 14, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_TYPE :
+ errmsg = insert_normal (cd, fields->f_type, 0, 0, 21, 2, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_WR :
+ errmsg = insert_normal (cd, fields->f_wr, 0, 0, 24, 1, 32, total_length, buffer);
+ break;
+ case MT_OPERAND_XMODE :
+ errmsg = insert_normal (cd, fields->f_xmode, 0, 0, 23, 1, 32, total_length, buffer);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
+ opindex);
+ abort ();
+ }
+
+ return errmsg;
+}
+
+int mt_cgen_extract_operand
+ (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
+
+/* Main entry point for operand extraction.
+ The result is <= 0 for error, >0 for success.
+ ??? Actual values aren't well defined right now.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `print_insn_normal', but keeping it
+ separate makes clear the interface between `print_insn_normal' and each of
+ the handlers. */
+
+int
+mt_cgen_extract_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS * fields,
+ bfd_vma pc)
+{
+ /* Assume success (for those operands that are nops). */
+ int length = 1;
+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_a23);
+ break;
+ case MT_OPERAND_BALL :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_ball);
+ break;
+ case MT_OPERAND_BALL2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_ball2);
+ break;
+ case MT_OPERAND_BANKADDR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 13, 32, total_length, pc, & fields->f_bankaddr);
+ break;
+ case MT_OPERAND_BRC :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_brc);
+ break;
+ case MT_OPERAND_BRC2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_brc2);
+ break;
+ case MT_OPERAND_CB1INCR :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, pc, & fields->f_cb1incr);
+ break;
+ case MT_OPERAND_CB1SEL :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_cb1sel);
+ break;
+ case MT_OPERAND_CB2INCR :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, pc, & fields->f_cb2incr);
+ break;
+ case MT_OPERAND_CB2SEL :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cb2sel);
+ break;
+ case MT_OPERAND_CBRB :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cbrb);
+ break;
+ case MT_OPERAND_CBS :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 2, 32, total_length, pc, & fields->f_cbs);
+ break;
+ case MT_OPERAND_CBX :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_cbx);
+ break;
+ case MT_OPERAND_CCB :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_ccb);
+ break;
+ case MT_OPERAND_CDB :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cdb);
+ break;
+ case MT_OPERAND_CELL :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_cell);
+ break;
+ case MT_OPERAND_COLNUM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_colnum);
+ break;
+ case MT_OPERAND_CONTNUM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_contnum);
+ break;
+ case MT_OPERAND_CR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cr);
+ break;
+ case MT_OPERAND_CTXDISP :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_ctxdisp);
+ break;
+ case MT_OPERAND_DUP :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_dup);
+ break;
+ case MT_OPERAND_FBDISP :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 6, 32, total_length, pc, & fields->f_fbdisp);
+ break;
+ case MT_OPERAND_FBINCR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 4, 32, total_length, pc, & fields->f_fbincr);
+ break;
+ case MT_OPERAND_FRDR :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_dr);
+ break;
+ case MT_OPERAND_FRDRRR :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, pc, & fields->f_drrr);
+ break;
+ case MT_OPERAND_FRSR1 :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, pc, & fields->f_sr1);
+ break;
+ case MT_OPERAND_FRSR2 :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_sr2);
+ break;
+ case MT_OPERAND_ID :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_id);
+ break;
+ case MT_OPERAND_IMM16 :
+ {
+ long value;
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value);
+ value = ((value) + (0));
+ fields->f_imm16s = value;
+ }
+ break;
+ case MT_OPERAND_IMM16L :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 16, 32, total_length, pc, & fields->f_imm16l);
+ break;
+ case MT_OPERAND_IMM16O :
+ {
+ long value;
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value);
+ value = ((value) + (0));
+ fields->f_imm16s = value;
+ }
+ break;
+ case MT_OPERAND_IMM16Z :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm16u);
+ break;
+ case MT_OPERAND_INCAMT :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 8, 32, total_length, pc, & fields->f_incamt);
+ break;
+ case MT_OPERAND_INCR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 6, 32, total_length, pc, & fields->f_incr);
+ break;
+ case MT_OPERAND_LENGTH :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_length);
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ {
+ long value;
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & value);
+ value = ((((value) << (2))) + (8));
+ fields->f_loopo = value;
+ }
+ break;
+ case MT_OPERAND_MASK :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 16, 32, total_length, pc, & fields->f_mask);
+ break;
+ case MT_OPERAND_MASK1 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_mask1);
+ break;
+ case MT_OPERAND_MODE :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_mode);
+ break;
+ case MT_OPERAND_PERM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_perm);
+ break;
+ case MT_OPERAND_RBBC :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_rbbc);
+ break;
+ case MT_OPERAND_RC :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_rc);
+ break;
+ case MT_OPERAND_RC1 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_rc1);
+ break;
+ case MT_OPERAND_RC2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_rc2);
+ break;
+ case MT_OPERAND_RC3 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_rc3);
+ break;
+ case MT_OPERAND_RCNUM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rcnum);
+ break;
+ case MT_OPERAND_RDA :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_rda);
+ break;
+ case MT_OPERAND_ROWNUM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rownum);
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rownum1);
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rownum2);
+ break;
+ case MT_OPERAND_SIZE :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 14, 32, total_length, pc, & fields->f_size);
+ break;
+ case MT_OPERAND_TYPE :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 2, 32, total_length, pc, & fields->f_type);
+ break;
+ case MT_OPERAND_WR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 1, 32, total_length, pc, & fields->f_wr);
+ break;
+ case MT_OPERAND_XMODE :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_xmode);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
+ opindex);
+ abort ();
+ }
+
+ return length;
+}
+
+cgen_insert_fn * const mt_cgen_insert_handlers[] =
+{
+ insert_insn_normal,
+};
+
+cgen_extract_fn * const mt_cgen_extract_handlers[] =
+{
+ extract_insn_normal,
+};
+
+int mt_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+bfd_vma mt_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+
+/* Getting values from cgen_fields is handled by a collection of functions.
+ They are distinguished by the type of the VALUE argument they return.
+ TODO: floating point, inlining support, remove cases where result type
+ not appropriate. */
+
+int
+mt_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
+{
+ int value;
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ value = fields->f_a23;
+ break;
+ case MT_OPERAND_BALL :
+ value = fields->f_ball;
+ break;
+ case MT_OPERAND_BALL2 :
+ value = fields->f_ball2;
+ break;
+ case MT_OPERAND_BANKADDR :
+ value = fields->f_bankaddr;
+ break;
+ case MT_OPERAND_BRC :
+ value = fields->f_brc;
+ break;
+ case MT_OPERAND_BRC2 :
+ value = fields->f_brc2;
+ break;
+ case MT_OPERAND_CB1INCR :
+ value = fields->f_cb1incr;
+ break;
+ case MT_OPERAND_CB1SEL :
+ value = fields->f_cb1sel;
+ break;
+ case MT_OPERAND_CB2INCR :
+ value = fields->f_cb2incr;
+ break;
+ case MT_OPERAND_CB2SEL :
+ value = fields->f_cb2sel;
+ break;
+ case MT_OPERAND_CBRB :
+ value = fields->f_cbrb;
+ break;
+ case MT_OPERAND_CBS :
+ value = fields->f_cbs;
+ break;
+ case MT_OPERAND_CBX :
+ value = fields->f_cbx;
+ break;
+ case MT_OPERAND_CCB :
+ value = fields->f_ccb;
+ break;
+ case MT_OPERAND_CDB :
+ value = fields->f_cdb;
+ break;
+ case MT_OPERAND_CELL :
+ value = fields->f_cell;
+ break;
+ case MT_OPERAND_COLNUM :
+ value = fields->f_colnum;
+ break;
+ case MT_OPERAND_CONTNUM :
+ value = fields->f_contnum;
+ break;
+ case MT_OPERAND_CR :
+ value = fields->f_cr;
+ break;
+ case MT_OPERAND_CTXDISP :
+ value = fields->f_ctxdisp;
+ break;
+ case MT_OPERAND_DUP :
+ value = fields->f_dup;
+ break;
+ case MT_OPERAND_FBDISP :
+ value = fields->f_fbdisp;
+ break;
+ case MT_OPERAND_FBINCR :
+ value = fields->f_fbincr;
+ break;
+ case MT_OPERAND_FRDR :
+ value = fields->f_dr;
+ break;
+ case MT_OPERAND_FRDRRR :
+ value = fields->f_drrr;
+ break;
+ case MT_OPERAND_FRSR1 :
+ value = fields->f_sr1;
+ break;
+ case MT_OPERAND_FRSR2 :
+ value = fields->f_sr2;
+ break;
+ case MT_OPERAND_ID :
+ value = fields->f_id;
+ break;
+ case MT_OPERAND_IMM16 :
+ value = fields->f_imm16s;
+ break;
+ case MT_OPERAND_IMM16L :
+ value = fields->f_imm16l;
+ break;
+ case MT_OPERAND_IMM16O :
+ value = fields->f_imm16s;
+ break;
+ case MT_OPERAND_IMM16Z :
+ value = fields->f_imm16u;
+ break;
+ case MT_OPERAND_INCAMT :
+ value = fields->f_incamt;
+ break;
+ case MT_OPERAND_INCR :
+ value = fields->f_incr;
+ break;
+ case MT_OPERAND_LENGTH :
+ value = fields->f_length;
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ value = fields->f_loopo;
+ break;
+ case MT_OPERAND_MASK :
+ value = fields->f_mask;
+ break;
+ case MT_OPERAND_MASK1 :
+ value = fields->f_mask1;
+ break;
+ case MT_OPERAND_MODE :
+ value = fields->f_mode;
+ break;
+ case MT_OPERAND_PERM :
+ value = fields->f_perm;
+ break;
+ case MT_OPERAND_RBBC :
+ value = fields->f_rbbc;
+ break;
+ case MT_OPERAND_RC :
+ value = fields->f_rc;
+ break;
+ case MT_OPERAND_RC1 :
+ value = fields->f_rc1;
+ break;
+ case MT_OPERAND_RC2 :
+ value = fields->f_rc2;
+ break;
+ case MT_OPERAND_RC3 :
+ value = fields->f_rc3;
+ break;
+ case MT_OPERAND_RCNUM :
+ value = fields->f_rcnum;
+ break;
+ case MT_OPERAND_RDA :
+ value = fields->f_rda;
+ break;
+ case MT_OPERAND_ROWNUM :
+ value = fields->f_rownum;
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ value = fields->f_rownum1;
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ value = fields->f_rownum2;
+ break;
+ case MT_OPERAND_SIZE :
+ value = fields->f_size;
+ break;
+ case MT_OPERAND_TYPE :
+ value = fields->f_type;
+ break;
+ case MT_OPERAND_WR :
+ value = fields->f_wr;
+ break;
+ case MT_OPERAND_XMODE :
+ value = fields->f_xmode;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
+ opindex);
+ abort ();
+ }
+
+ return value;
+}
+
+bfd_vma
+mt_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
+{
+ bfd_vma value;
+
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ value = fields->f_a23;
+ break;
+ case MT_OPERAND_BALL :
+ value = fields->f_ball;
+ break;
+ case MT_OPERAND_BALL2 :
+ value = fields->f_ball2;
+ break;
+ case MT_OPERAND_BANKADDR :
+ value = fields->f_bankaddr;
+ break;
+ case MT_OPERAND_BRC :
+ value = fields->f_brc;
+ break;
+ case MT_OPERAND_BRC2 :
+ value = fields->f_brc2;
+ break;
+ case MT_OPERAND_CB1INCR :
+ value = fields->f_cb1incr;
+ break;
+ case MT_OPERAND_CB1SEL :
+ value = fields->f_cb1sel;
+ break;
+ case MT_OPERAND_CB2INCR :
+ value = fields->f_cb2incr;
+ break;
+ case MT_OPERAND_CB2SEL :
+ value = fields->f_cb2sel;
+ break;
+ case MT_OPERAND_CBRB :
+ value = fields->f_cbrb;
+ break;
+ case MT_OPERAND_CBS :
+ value = fields->f_cbs;
+ break;
+ case MT_OPERAND_CBX :
+ value = fields->f_cbx;
+ break;
+ case MT_OPERAND_CCB :
+ value = fields->f_ccb;
+ break;
+ case MT_OPERAND_CDB :
+ value = fields->f_cdb;
+ break;
+ case MT_OPERAND_CELL :
+ value = fields->f_cell;
+ break;
+ case MT_OPERAND_COLNUM :
+ value = fields->f_colnum;
+ break;
+ case MT_OPERAND_CONTNUM :
+ value = fields->f_contnum;
+ break;
+ case MT_OPERAND_CR :
+ value = fields->f_cr;
+ break;
+ case MT_OPERAND_CTXDISP :
+ value = fields->f_ctxdisp;
+ break;
+ case MT_OPERAND_DUP :
+ value = fields->f_dup;
+ break;
+ case MT_OPERAND_FBDISP :
+ value = fields->f_fbdisp;
+ break;
+ case MT_OPERAND_FBINCR :
+ value = fields->f_fbincr;
+ break;
+ case MT_OPERAND_FRDR :
+ value = fields->f_dr;
+ break;
+ case MT_OPERAND_FRDRRR :
+ value = fields->f_drrr;
+ break;
+ case MT_OPERAND_FRSR1 :
+ value = fields->f_sr1;
+ break;
+ case MT_OPERAND_FRSR2 :
+ value = fields->f_sr2;
+ break;
+ case MT_OPERAND_ID :
+ value = fields->f_id;
+ break;
+ case MT_OPERAND_IMM16 :
+ value = fields->f_imm16s;
+ break;
+ case MT_OPERAND_IMM16L :
+ value = fields->f_imm16l;
+ break;
+ case MT_OPERAND_IMM16O :
+ value = fields->f_imm16s;
+ break;
+ case MT_OPERAND_IMM16Z :
+ value = fields->f_imm16u;
+ break;
+ case MT_OPERAND_INCAMT :
+ value = fields->f_incamt;
+ break;
+ case MT_OPERAND_INCR :
+ value = fields->f_incr;
+ break;
+ case MT_OPERAND_LENGTH :
+ value = fields->f_length;
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ value = fields->f_loopo;
+ break;
+ case MT_OPERAND_MASK :
+ value = fields->f_mask;
+ break;
+ case MT_OPERAND_MASK1 :
+ value = fields->f_mask1;
+ break;
+ case MT_OPERAND_MODE :
+ value = fields->f_mode;
+ break;
+ case MT_OPERAND_PERM :
+ value = fields->f_perm;
+ break;
+ case MT_OPERAND_RBBC :
+ value = fields->f_rbbc;
+ break;
+ case MT_OPERAND_RC :
+ value = fields->f_rc;
+ break;
+ case MT_OPERAND_RC1 :
+ value = fields->f_rc1;
+ break;
+ case MT_OPERAND_RC2 :
+ value = fields->f_rc2;
+ break;
+ case MT_OPERAND_RC3 :
+ value = fields->f_rc3;
+ break;
+ case MT_OPERAND_RCNUM :
+ value = fields->f_rcnum;
+ break;
+ case MT_OPERAND_RDA :
+ value = fields->f_rda;
+ break;
+ case MT_OPERAND_ROWNUM :
+ value = fields->f_rownum;
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ value = fields->f_rownum1;
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ value = fields->f_rownum2;
+ break;
+ case MT_OPERAND_SIZE :
+ value = fields->f_size;
+ break;
+ case MT_OPERAND_TYPE :
+ value = fields->f_type;
+ break;
+ case MT_OPERAND_WR :
+ value = fields->f_wr;
+ break;
+ case MT_OPERAND_XMODE :
+ value = fields->f_xmode;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
+ opindex);
+ abort ();
+ }
+
+ return value;
+}
+
+void mt_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
+void mt_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
+
+/* Stuffing values in cgen_fields is handled by a collection of functions.
+ They are distinguished by the type of the VALUE argument they accept.
+ TODO: floating point, inlining support, remove cases where argument type
+ not appropriate. */
+
+void
+mt_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ int value)
+{
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ fields->f_a23 = value;
+ break;
+ case MT_OPERAND_BALL :
+ fields->f_ball = value;
+ break;
+ case MT_OPERAND_BALL2 :
+ fields->f_ball2 = value;
+ break;
+ case MT_OPERAND_BANKADDR :
+ fields->f_bankaddr = value;
+ break;
+ case MT_OPERAND_BRC :
+ fields->f_brc = value;
+ break;
+ case MT_OPERAND_BRC2 :
+ fields->f_brc2 = value;
+ break;
+ case MT_OPERAND_CB1INCR :
+ fields->f_cb1incr = value;
+ break;
+ case MT_OPERAND_CB1SEL :
+ fields->f_cb1sel = value;
+ break;
+ case MT_OPERAND_CB2INCR :
+ fields->f_cb2incr = value;
+ break;
+ case MT_OPERAND_CB2SEL :
+ fields->f_cb2sel = value;
+ break;
+ case MT_OPERAND_CBRB :
+ fields->f_cbrb = value;
+ break;
+ case MT_OPERAND_CBS :
+ fields->f_cbs = value;
+ break;
+ case MT_OPERAND_CBX :
+ fields->f_cbx = value;
+ break;
+ case MT_OPERAND_CCB :
+ fields->f_ccb = value;
+ break;
+ case MT_OPERAND_CDB :
+ fields->f_cdb = value;
+ break;
+ case MT_OPERAND_CELL :
+ fields->f_cell = value;
+ break;
+ case MT_OPERAND_COLNUM :
+ fields->f_colnum = value;
+ break;
+ case MT_OPERAND_CONTNUM :
+ fields->f_contnum = value;
+ break;
+ case MT_OPERAND_CR :
+ fields->f_cr = value;
+ break;
+ case MT_OPERAND_CTXDISP :
+ fields->f_ctxdisp = value;
+ break;
+ case MT_OPERAND_DUP :
+ fields->f_dup = value;
+ break;
+ case MT_OPERAND_FBDISP :
+ fields->f_fbdisp = value;
+ break;
+ case MT_OPERAND_FBINCR :
+ fields->f_fbincr = value;
+ break;
+ case MT_OPERAND_FRDR :
+ fields->f_dr = value;
+ break;
+ case MT_OPERAND_FRDRRR :
+ fields->f_drrr = value;
+ break;
+ case MT_OPERAND_FRSR1 :
+ fields->f_sr1 = value;
+ break;
+ case MT_OPERAND_FRSR2 :
+ fields->f_sr2 = value;
+ break;
+ case MT_OPERAND_ID :
+ fields->f_id = value;
+ break;
+ case MT_OPERAND_IMM16 :
+ fields->f_imm16s = value;
+ break;
+ case MT_OPERAND_IMM16L :
+ fields->f_imm16l = value;
+ break;
+ case MT_OPERAND_IMM16O :
+ fields->f_imm16s = value;
+ break;
+ case MT_OPERAND_IMM16Z :
+ fields->f_imm16u = value;
+ break;
+ case MT_OPERAND_INCAMT :
+ fields->f_incamt = value;
+ break;
+ case MT_OPERAND_INCR :
+ fields->f_incr = value;
+ break;
+ case MT_OPERAND_LENGTH :
+ fields->f_length = value;
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ fields->f_loopo = value;
+ break;
+ case MT_OPERAND_MASK :
+ fields->f_mask = value;
+ break;
+ case MT_OPERAND_MASK1 :
+ fields->f_mask1 = value;
+ break;
+ case MT_OPERAND_MODE :
+ fields->f_mode = value;
+ break;
+ case MT_OPERAND_PERM :
+ fields->f_perm = value;
+ break;
+ case MT_OPERAND_RBBC :
+ fields->f_rbbc = value;
+ break;
+ case MT_OPERAND_RC :
+ fields->f_rc = value;
+ break;
+ case MT_OPERAND_RC1 :
+ fields->f_rc1 = value;
+ break;
+ case MT_OPERAND_RC2 :
+ fields->f_rc2 = value;
+ break;
+ case MT_OPERAND_RC3 :
+ fields->f_rc3 = value;
+ break;
+ case MT_OPERAND_RCNUM :
+ fields->f_rcnum = value;
+ break;
+ case MT_OPERAND_RDA :
+ fields->f_rda = value;
+ break;
+ case MT_OPERAND_ROWNUM :
+ fields->f_rownum = value;
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ fields->f_rownum1 = value;
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ fields->f_rownum2 = value;
+ break;
+ case MT_OPERAND_SIZE :
+ fields->f_size = value;
+ break;
+ case MT_OPERAND_TYPE :
+ fields->f_type = value;
+ break;
+ case MT_OPERAND_WR :
+ fields->f_wr = value;
+ break;
+ case MT_OPERAND_XMODE :
+ fields->f_xmode = value;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+void
+mt_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ bfd_vma value)
+{
+ switch (opindex)
+ {
+ case MT_OPERAND_A23 :
+ fields->f_a23 = value;
+ break;
+ case MT_OPERAND_BALL :
+ fields->f_ball = value;
+ break;
+ case MT_OPERAND_BALL2 :
+ fields->f_ball2 = value;
+ break;
+ case MT_OPERAND_BANKADDR :
+ fields->f_bankaddr = value;
+ break;
+ case MT_OPERAND_BRC :
+ fields->f_brc = value;
+ break;
+ case MT_OPERAND_BRC2 :
+ fields->f_brc2 = value;
+ break;
+ case MT_OPERAND_CB1INCR :
+ fields->f_cb1incr = value;
+ break;
+ case MT_OPERAND_CB1SEL :
+ fields->f_cb1sel = value;
+ break;
+ case MT_OPERAND_CB2INCR :
+ fields->f_cb2incr = value;
+ break;
+ case MT_OPERAND_CB2SEL :
+ fields->f_cb2sel = value;
+ break;
+ case MT_OPERAND_CBRB :
+ fields->f_cbrb = value;
+ break;
+ case MT_OPERAND_CBS :
+ fields->f_cbs = value;
+ break;
+ case MT_OPERAND_CBX :
+ fields->f_cbx = value;
+ break;
+ case MT_OPERAND_CCB :
+ fields->f_ccb = value;
+ break;
+ case MT_OPERAND_CDB :
+ fields->f_cdb = value;
+ break;
+ case MT_OPERAND_CELL :
+ fields->f_cell = value;
+ break;
+ case MT_OPERAND_COLNUM :
+ fields->f_colnum = value;
+ break;
+ case MT_OPERAND_CONTNUM :
+ fields->f_contnum = value;
+ break;
+ case MT_OPERAND_CR :
+ fields->f_cr = value;
+ break;
+ case MT_OPERAND_CTXDISP :
+ fields->f_ctxdisp = value;
+ break;
+ case MT_OPERAND_DUP :
+ fields->f_dup = value;
+ break;
+ case MT_OPERAND_FBDISP :
+ fields->f_fbdisp = value;
+ break;
+ case MT_OPERAND_FBINCR :
+ fields->f_fbincr = value;
+ break;
+ case MT_OPERAND_FRDR :
+ fields->f_dr = value;
+ break;
+ case MT_OPERAND_FRDRRR :
+ fields->f_drrr = value;
+ break;
+ case MT_OPERAND_FRSR1 :
+ fields->f_sr1 = value;
+ break;
+ case MT_OPERAND_FRSR2 :
+ fields->f_sr2 = value;
+ break;
+ case MT_OPERAND_ID :
+ fields->f_id = value;
+ break;
+ case MT_OPERAND_IMM16 :
+ fields->f_imm16s = value;
+ break;
+ case MT_OPERAND_IMM16L :
+ fields->f_imm16l = value;
+ break;
+ case MT_OPERAND_IMM16O :
+ fields->f_imm16s = value;
+ break;
+ case MT_OPERAND_IMM16Z :
+ fields->f_imm16u = value;
+ break;
+ case MT_OPERAND_INCAMT :
+ fields->f_incamt = value;
+ break;
+ case MT_OPERAND_INCR :
+ fields->f_incr = value;
+ break;
+ case MT_OPERAND_LENGTH :
+ fields->f_length = value;
+ break;
+ case MT_OPERAND_LOOPSIZE :
+ fields->f_loopo = value;
+ break;
+ case MT_OPERAND_MASK :
+ fields->f_mask = value;
+ break;
+ case MT_OPERAND_MASK1 :
+ fields->f_mask1 = value;
+ break;
+ case MT_OPERAND_MODE :
+ fields->f_mode = value;
+ break;
+ case MT_OPERAND_PERM :
+ fields->f_perm = value;
+ break;
+ case MT_OPERAND_RBBC :
+ fields->f_rbbc = value;
+ break;
+ case MT_OPERAND_RC :
+ fields->f_rc = value;
+ break;
+ case MT_OPERAND_RC1 :
+ fields->f_rc1 = value;
+ break;
+ case MT_OPERAND_RC2 :
+ fields->f_rc2 = value;
+ break;
+ case MT_OPERAND_RC3 :
+ fields->f_rc3 = value;
+ break;
+ case MT_OPERAND_RCNUM :
+ fields->f_rcnum = value;
+ break;
+ case MT_OPERAND_RDA :
+ fields->f_rda = value;
+ break;
+ case MT_OPERAND_ROWNUM :
+ fields->f_rownum = value;
+ break;
+ case MT_OPERAND_ROWNUM1 :
+ fields->f_rownum1 = value;
+ break;
+ case MT_OPERAND_ROWNUM2 :
+ fields->f_rownum2 = value;
+ break;
+ case MT_OPERAND_SIZE :
+ fields->f_size = value;
+ break;
+ case MT_OPERAND_TYPE :
+ fields->f_type = value;
+ break;
+ case MT_OPERAND_WR :
+ fields->f_wr = value;
+ break;
+ case MT_OPERAND_XMODE :
+ fields->f_xmode = value;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+/* Function to call before using the instruction builder tables. */
+
+void
+mt_cgen_init_ibld_table (CGEN_CPU_DESC cd)
+{
+ cd->insert_handlers = & mt_cgen_insert_handlers[0];
+ cd->extract_handlers = & mt_cgen_extract_handlers[0];
+
+ cd->insert_operand = mt_cgen_insert_operand;
+ cd->extract_operand = mt_cgen_extract_operand;
+
+ cd->get_int_operand = mt_cgen_get_int_operand;
+ cd->set_int_operand = mt_cgen_set_int_operand;
+ cd->get_vma_operand = mt_cgen_get_vma_operand;
+ cd->set_vma_operand = mt_cgen_set_vma_operand;
+}
Added: branches/binutils/package/opcodes/mt-opc.c
===================================================================
--- branches/binutils/package/opcodes/mt-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,948 @@
+/* Instruction opcode table for mt.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sysdep.h"
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "mt-desc.h"
+#include "mt-opc.h"
+#include "libiberty.h"
+
+/* -- opc.c */
+#include "safe-ctype.h"
+
+/* Special check to ensure that instruction exists for given machine. */
+
+int
+mt_cgen_insn_supported (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn)
+{
+ int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
+
+ /* No mach attribute? Assume it's supported for all machs. */
+ if (machs == 0)
+ return 1;
+
+ return ((machs & cd->machs) != 0);
+}
+
+/* A better hash function for instruction mnemonics. */
+
+unsigned int
+mt_asm_hash (const char* insn)
+{
+ unsigned int hash;
+ const char* m = insn;
+
+ for (hash = 0; *m && ! ISSPACE (*m); m++)
+ hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
+
+ /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
+
+ return hash % CGEN_ASM_HASH_SIZE;
+}
+
+
+/* -- asm.c */
+/* The hash functions are recorded here to help keep assembler code out of
+ the disassembler and vice versa. */
+
+static int asm_hash_insn_p (const CGEN_INSN *);
+static unsigned int asm_hash_insn (const char *);
+static int dis_hash_insn_p (const CGEN_INSN *);
+static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
+
+/* Instruction formats. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & mt_cgen_ifld_table[MT_##f]
+#else
+#define F(f) & mt_cgen_ifld_table[MT_/**/f]
+#endif
+static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
+ 0, 0, 0x0, { { 0 } }
+};
+
+static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addui ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU24) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_ldui ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfff00000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_brlt ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffff0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jal ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0f0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_dbnz ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0f0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_ei ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_si ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffff0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0fffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_stw ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_ldctxt ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000e00, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_RC) }, { F (F_RCNUM) }, { F (F_UU_3_11) }, { F (F_CONTNUM) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_ldfb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16U) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_4_15) }, { F (F_RC) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mfbcb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_4_15) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcci ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mfbcci ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcbdr ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_BALL2) }, { F (F_BRC2) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_rcfbcb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mrcfbcb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cbcast ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000380, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_UU_3_9) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_dupcbcast ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_CELL) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_wfbi ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_BANKADDR) }, { F (F_ROWNUM1) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_wfb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000040, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_UU_1_6) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_rcrisc ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc080000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_UU_1_19) }, { F (F_COLNUM) }, { F (F_DRRR) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcbinc ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_INCAMT) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_rcxmode ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_XMODE) }, { F (F_MASK1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_interleaver ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MODE) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ID) }, { F (F_SIZE) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_wfbinc ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mwfbinc ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_wfbincr ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mwfbincr ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcbincs ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_A23) }, { F (F_CR) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mfbcbincs ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_fbcbincrs ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mfbcbincrs ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_loop ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0fff00, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU8) }, { F (F_LOOPO) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_loopi ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_IMM16L) }, { F (F_LOOPO) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_dfbc ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_RC3) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_dwfb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000080, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_UU1) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_dfbr ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } }
+};
+
+#undef F
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) MT_OPERAND_##op
+#else
+#define OPERAND(op) MT_OPERAND_/**/op
+#endif
+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+
+/* The instruction table. */
+
+static const CGEN_OPCODE mt_cgen_insn_opcode_table[MAX_INSNS] =
+{
+ /* Special null first entry.
+ A `num' value of zero is thus invalid.
+ Also, the special `invalid' insn resides here. */
+ { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
+/* add $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x0 }
+ },
+/* addu $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x2000000 }
+ },
+/* addi $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x1000000 }
+ },
+/* addui $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x3000000 }
+ },
+/* sub $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x4000000 }
+ },
+/* subu $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x6000000 }
+ },
+/* subi $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x5000000 }
+ },
+/* subui $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x7000000 }
+ },
+/* mul $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x8000000 }
+ },
+/* muli $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x9000000 }
+ },
+/* and $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x10000000 }
+ },
+/* andi $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x11000000 }
+ },
+/* or $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x12000000 }
+ },
+/* nop */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_nop, { 0x12000000 }
+ },
+/* ori $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x13000000 }
+ },
+/* xor $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x14000000 }
+ },
+/* xori $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x15000000 }
+ },
+/* nand $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x16000000 }
+ },
+/* nandi $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x17000000 }
+ },
+/* nor $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x18000000 }
+ },
+/* nori $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x19000000 }
+ },
+/* xnor $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x1a000000 }
+ },
+/* xnori $frdr,$frsr1,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_addui, { 0x1b000000 }
+ },
+/* ldui $frdr,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_ldui, { 0x1d000000 }
+ },
+/* lsl $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x20000000 }
+ },
+/* lsli $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x21000000 }
+ },
+/* lsr $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x22000000 }
+ },
+/* lsri $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x23000000 }
+ },
+/* asr $frdrrr,$frsr1,$frsr2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } },
+ & ifmt_add, { 0x24000000 }
+ },
+/* asri $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x25000000 }
+ },
+/* brlt $frsr1,$frsr2,$imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
+ & ifmt_brlt, { 0x31000000 }
+ },
+/* brle $frsr1,$frsr2,$imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
+ & ifmt_brlt, { 0x33000000 }
+ },
+/* breq $frsr1,$frsr2,$imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
+ & ifmt_brlt, { 0x35000000 }
+ },
+/* brne $frsr1,$frsr2,$imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } },
+ & ifmt_brlt, { 0x3b000000 }
+ },
+/* jmp $imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (IMM16O), 0 } },
+ & ifmt_jmp, { 0x37000000 }
+ },
+/* jal $frdrrr,$frsr1 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), 0 } },
+ & ifmt_jal, { 0x38000000 }
+ },
+/* dbnz $frsr1,$imm16o */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (IMM16O), 0 } },
+ & ifmt_dbnz, { 0x3d000000 }
+ },
+/* ei */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ei, { 0x60000000 }
+ },
+/* di */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ei, { 0x62000000 }
+ },
+/* si $frdrrr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), 0 } },
+ & ifmt_si, { 0x64000000 }
+ },
+/* reti $frsr1 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), 0 } },
+ & ifmt_reti, { 0x66000000 }
+ },
+/* ldw $frdr,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_addi, { 0x41000000 }
+ },
+/* stw $frsr2,$frsr1,#$imm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
+ & ifmt_stw, { 0x43000000 }
+ },
+/* break */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_nop, { 0x68000000 }
+ },
+/* iflush */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_nop, { 0x6a000000 }
+ },
+/* ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RC), ',', '#', OP (RCNUM), ',', '#', OP (CONTNUM), 0 } },
+ & ifmt_ldctxt, { 0x80000000 }
+ },
+/* ldfb $frsr1,$frsr2,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_ldfb, { 0x84000000 }
+ },
+/* stfb $frsr1,$frsr2,#$imm16z */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } },
+ & ifmt_ldfb, { 0x88000000 }
+ },
+/* fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcb, { 0x8c000000 }
+ },
+/* mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcb, { 0x90000000 }
+ },
+/* fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcci, { 0x94000000 }
+ },
+/* fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcci, { 0x98000000 }
+ },
+/* fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcci, { 0x9c000000 }
+ },
+/* fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcci, { 0xa0000000 }
+ },
+/* mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcci, { 0xa4000000 }
+ },
+/* mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcci, { 0xa8000000 }
+ },
+/* mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcci, { 0xac000000 }
+ },
+/* mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcci, { 0xb0000000 }
+ },
+/* fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (BALL2), ',', '#', OP (BRC2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcbdr, { 0xb4000000 }
+ },
+/* rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_rcfbcb, { 0xb8000000 }
+ },
+/* mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mrcfbcb, { 0xbc000000 }
+ },
+/* cbcast #$mask,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_cbcast, { 0xc0000000 }
+ },
+/* dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (CELL), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_dupcbcast, { 0xc4000000 }
+ },
+/* wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (BANKADDR), ',', '#', OP (ROWNUM1), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_wfbi, { 0xc8000000 }
+ },
+/* wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_wfb, { 0xcc000000 }
+ },
+/* rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRDRRR), ',', '#', OP (RBBC), ',', OP (FRSR1), ',', '#', OP (COLNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_rcrisc, { 0xd0000000 }
+ },
+/* fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (INCAMT), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcbinc, { 0xd4000000 }
+ },
+/* rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (XMODE), ',', '#', OP (MASK1), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_rcxmode, { 0xd8000000 }
+ },
+/* intlvr $frsr1,#$mode,$frsr2,#$id,#$size */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (MODE), ',', OP (FRSR2), ',', '#', OP (ID), ',', '#', OP (SIZE), 0 } },
+ & ifmt_interleaver, { 0xdc000000 }
+ },
+/* wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_wfbinc, { 0xe0000000 }
+ },
+/* mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mwfbinc, { 0xe4000000 }
+ },
+/* wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_wfbincr, { 0xe8000000 }
+ },
+/* mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mwfbincr, { 0xec000000 }
+ },
+/* fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (PERM), ',', '#', OP (A23), ',', '#', OP (CR), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcbincs, { 0xf0000000 }
+ },
+/* mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcbincs, { 0xf4000000 }
+ },
+/* fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_fbcbincrs, { 0xf8000000 }
+ },
+/* mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (PERM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_mfbcbincrs, { 0xfc000000 }
+ },
+/* loop $frsr1,$loopsize */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (FRSR1), ',', OP (LOOPSIZE), 0 } },
+ & ifmt_loop, { 0x3e000000 }
+ },
+/* loopi #$imm16l,$loopsize */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (IMM16L), ',', OP (LOOPSIZE), 0 } },
+ & ifmt_loopi, { 0x3f000000 }
+ },
+/* dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_dfbc, { 0x80000000 }
+ },
+/* dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_dwfb, { 0x84000000 }
+ },
+/* fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_dfbc, { 0x88000000 }
+ },
+/* dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', OP (FRSR2), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } },
+ & ifmt_dfbr, { 0x8c000000 }
+ },
+};
+
+#undef A
+#undef OPERAND
+#undef MNEM
+#undef OP
+
+/* Formats for ALIAS macro-insns. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & mt_cgen_ifld_table[MT_##f]
+#else
+#define F(f) & mt_cgen_ifld_table[MT_/**/f]
+#endif
+#undef F
+
+/* Each non-simple macro entry points to an array of expansion possibilities. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) MT_OPERAND_##op
+#else
+#define OPERAND(op) MT_OPERAND_/**/op
+#endif
+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+
+/* The macro instruction table. */
+
+static const CGEN_IBASE mt_cgen_macro_insn_table[] =
+{
+};
+
+/* The macro instruction opcode table. */
+
+static const CGEN_OPCODE mt_cgen_macro_insn_opcode_table[] =
+{
+};
+
+#undef A
+#undef OPERAND
+#undef MNEM
+#undef OP
+
+#ifndef CGEN_ASM_HASH_P
+#define CGEN_ASM_HASH_P(insn) 1
+#endif
+
+#ifndef CGEN_DIS_HASH_P
+#define CGEN_DIS_HASH_P(insn) 1
+#endif
+
+/* Return non-zero if INSN is to be added to the hash table.
+ Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
+
+static int
+asm_hash_insn_p (insn)
+ const CGEN_INSN *insn ATTRIBUTE_UNUSED;
+{
+ return CGEN_ASM_HASH_P (insn);
+}
+
+static int
+dis_hash_insn_p (insn)
+ const CGEN_INSN *insn;
+{
+ /* If building the hash table and the NO-DIS attribute is present,
+ ignore. */
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
+ return 0;
+ return CGEN_DIS_HASH_P (insn);
+}
+
+#ifndef CGEN_ASM_HASH
+#define CGEN_ASM_HASH_SIZE 127
+#ifdef CGEN_MNEMONIC_OPERANDS
+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
+#else
+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
+#endif
+#endif
+
+/* It doesn't make much sense to provide a default here,
+ but while this is under development we do.
+ BUFFER is a pointer to the bytes of the insn, target order.
+ VALUE is the first base_insn_bitsize bits as an int in host order. */
+
+#ifndef CGEN_DIS_HASH
+#define CGEN_DIS_HASH_SIZE 256
+#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
+#endif
+
+/* The result is the hash value of the insn.
+ Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
+
+static unsigned int
+asm_hash_insn (mnem)
+ const char * mnem;
+{
+ return CGEN_ASM_HASH (mnem);
+}
+
+/* BUF is a pointer to the bytes of the insn, target order.
+ VALUE is the first base_insn_bitsize bits as an int in host order. */
+
+static unsigned int
+dis_hash_insn (buf, value)
+ const char * buf ATTRIBUTE_UNUSED;
+ CGEN_INSN_INT value ATTRIBUTE_UNUSED;
+{
+ return CGEN_DIS_HASH (buf, value);
+}
+
+/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
+
+static void
+set_fields_bitsize (CGEN_FIELDS *fields, int size)
+{
+ CGEN_FIELDS_BITSIZE (fields) = size;
+}
+
+/* Function to call before using the operand instance table.
+ This plugs the opcode entries and macro instructions into the cpu table. */
+
+void
+mt_cgen_init_opcode_table (CGEN_CPU_DESC cd)
+{
+ int i;
+ int num_macros = (sizeof (mt_cgen_macro_insn_table) /
+ sizeof (mt_cgen_macro_insn_table[0]));
+ const CGEN_IBASE *ib = & mt_cgen_macro_insn_table[0];
+ const CGEN_OPCODE *oc = & mt_cgen_macro_insn_opcode_table[0];
+ CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
+
+ memset (insns, 0, num_macros * sizeof (CGEN_INSN));
+ for (i = 0; i < num_macros; ++i)
+ {
+ insns[i].base = &ib[i];
+ insns[i].opcode = &oc[i];
+ mt_cgen_build_insn_regex (& insns[i]);
+ }
+ cd->macro_insn_table.init_entries = insns;
+ cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
+ cd->macro_insn_table.num_init_entries = num_macros;
+
+ oc = & mt_cgen_insn_opcode_table[0];
+ insns = (CGEN_INSN *) cd->insn_table.init_entries;
+ for (i = 0; i < MAX_INSNS; ++i)
+ {
+ insns[i].opcode = &oc[i];
+ mt_cgen_build_insn_regex (& insns[i]);
+ }
+
+ cd->sizeof_fields = sizeof (CGEN_FIELDS);
+ cd->set_fields_bitsize = set_fields_bitsize;
+
+ cd->asm_hash_p = asm_hash_insn_p;
+ cd->asm_hash = asm_hash_insn;
+ cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
+
+ cd->dis_hash_p = dis_hash_insn_p;
+ cd->dis_hash = dis_hash_insn;
+ cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
+}
Added: branches/binutils/package/opcodes/mt-opc.h
===================================================================
--- branches/binutils/package/opcodes/mt-opc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/mt-opc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,179 @@
+/* Instruction opcode header for mt.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef MT_OPC_H
+#define MT_OPC_H
+
+/* -- opc.h */
+
+/* Check applicability of instructions against machines. */
+#define CGEN_VALIDATE_INSN_SUPPORTED
+
+/* Allows reason codes to be output when assembler errors occur. */
+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
+
+/* Override disassembly hashing - there are variable bits in the top
+ byte of these instructions. */
+#define CGEN_DIS_HASH_SIZE 8
+#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
+
+#define CGEN_ASM_HASH_SIZE 127
+#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
+
+extern unsigned int mt_asm_hash (const char *);
+
+extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
+
+
+/* -- opc.c */
+/* Enum declaration for mt instruction types. */
+typedef enum cgen_insn_type {
+ MT_INSN_INVALID, MT_INSN_ADD, MT_INSN_ADDU, MT_INSN_ADDI
+ , MT_INSN_ADDUI, MT_INSN_SUB, MT_INSN_SUBU, MT_INSN_SUBI
+ , MT_INSN_SUBUI, MT_INSN_MUL, MT_INSN_MULI, MT_INSN_AND
+ , MT_INSN_ANDI, MT_INSN_OR, MT_INSN_NOP, MT_INSN_ORI
+ , MT_INSN_XOR, MT_INSN_XORI, MT_INSN_NAND, MT_INSN_NANDI
+ , MT_INSN_NOR, MT_INSN_NORI, MT_INSN_XNOR, MT_INSN_XNORI
+ , MT_INSN_LDUI, MT_INSN_LSL, MT_INSN_LSLI, MT_INSN_LSR
+ , MT_INSN_LSRI, MT_INSN_ASR, MT_INSN_ASRI, MT_INSN_BRLT
+ , MT_INSN_BRLE, MT_INSN_BREQ, MT_INSN_BRNE, MT_INSN_JMP
+ , MT_INSN_JAL, MT_INSN_DBNZ, MT_INSN_EI, MT_INSN_DI
+ , MT_INSN_SI, MT_INSN_RETI, MT_INSN_LDW, MT_INSN_STW
+ , MT_INSN_BREAK, MT_INSN_IFLUSH, MT_INSN_LDCTXT, MT_INSN_LDFB
+ , MT_INSN_STFB, MT_INSN_FBCB, MT_INSN_MFBCB, MT_INSN_FBCCI
+ , MT_INSN_FBRCI, MT_INSN_FBCRI, MT_INSN_FBRRI, MT_INSN_MFBCCI
+ , MT_INSN_MFBRCI, MT_INSN_MFBCRI, MT_INSN_MFBRRI, MT_INSN_FBCBDR
+ , MT_INSN_RCFBCB, MT_INSN_MRCFBCB, MT_INSN_CBCAST, MT_INSN_DUPCBCAST
+ , MT_INSN_WFBI, MT_INSN_WFB, MT_INSN_RCRISC, MT_INSN_FBCBINC
+ , MT_INSN_RCXMODE, MT_INSN_INTERLEAVER, MT_INSN_WFBINC, MT_INSN_MWFBINC
+ , MT_INSN_WFBINCR, MT_INSN_MWFBINCR, MT_INSN_FBCBINCS, MT_INSN_MFBCBINCS
+ , MT_INSN_FBCBINCRS, MT_INSN_MFBCBINCRS, MT_INSN_LOOP, MT_INSN_LOOPI
+ , MT_INSN_DFBC, MT_INSN_DWFB, MT_INSN_FBWFB, MT_INSN_DFBR
+} CGEN_INSN_TYPE;
+
+/* Index of `invalid' insn place holder. */
+#define CGEN_INSN_INVALID MT_INSN_INVALID
+
+/* Total number of insns in table. */
+#define MAX_INSNS ((int) MT_INSN_DFBR + 1)
+
+/* This struct records data prior to insertion or after extraction. */
+struct cgen_fields
+{
+ int length;
+ long f_nil;
+ long f_anyof;
+ long f_msys;
+ long f_opc;
+ long f_imm;
+ long f_uu24;
+ long f_sr1;
+ long f_sr2;
+ long f_dr;
+ long f_drrr;
+ long f_imm16u;
+ long f_imm16s;
+ long f_imm16a;
+ long f_uu4a;
+ long f_uu4b;
+ long f_uu12;
+ long f_uu8;
+ long f_uu16;
+ long f_uu1;
+ long f_msopc;
+ long f_uu_26_25;
+ long f_mask;
+ long f_bankaddr;
+ long f_rda;
+ long f_uu_2_25;
+ long f_rbbc;
+ long f_perm;
+ long f_mode;
+ long f_uu_1_24;
+ long f_wr;
+ long f_fbincr;
+ long f_uu_2_23;
+ long f_xmode;
+ long f_a23;
+ long f_mask1;
+ long f_cr;
+ long f_type;
+ long f_incamt;
+ long f_cbs;
+ long f_uu_1_19;
+ long f_ball;
+ long f_colnum;
+ long f_brc;
+ long f_incr;
+ long f_fbdisp;
+ long f_uu_4_15;
+ long f_length;
+ long f_uu_1_15;
+ long f_rc;
+ long f_rcnum;
+ long f_rownum;
+ long f_cbx;
+ long f_id;
+ long f_size;
+ long f_rownum1;
+ long f_uu_3_11;
+ long f_rc1;
+ long f_ccb;
+ long f_cbrb;
+ long f_cdb;
+ long f_rownum2;
+ long f_cell;
+ long f_uu_3_9;
+ long f_contnum;
+ long f_uu_1_6;
+ long f_dup;
+ long f_rc2;
+ long f_ctxdisp;
+ long f_imm16l;
+ long f_loopo;
+ long f_cb1sel;
+ long f_cb2sel;
+ long f_cb1incr;
+ long f_cb2incr;
+ long f_rc3;
+ long f_msysfrsr2;
+ long f_brc2;
+ long f_ball2;
+};
+
+#define CGEN_INIT_PARSE(od) \
+{\
+}
+#define CGEN_INIT_INSERT(od) \
+{\
+}
+#define CGEN_INIT_EXTRACT(od) \
+{\
+}
+#define CGEN_INIT_PRINT(od) \
+{\
+}
+
+
+#endif /* MT_OPC_H */
Modified: branches/binutils/package/opcodes/openrisc-ibld.c
===================================================================
--- branches/binutils/package/opcodes/openrisc-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/openrisc-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/pdp11-opc.c
===================================================================
--- branches/binutils/package/opcodes/pdp11-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/pdp11-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,5 +1,5 @@
/* Opcode table for PDP-11.
- Copyright 2001, 2002 Free Software Foundation, Inc.
+ Copyright 2001, 2002, 2006 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -50,7 +50,7 @@
{ "cl_e", 0x00ae, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
{ "ccc", 0x00af, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
{ "se_0", 0x00b0, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
- { "sec", 0x00a1, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
+ { "sec", 0x00b1, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
{ "sev", 0x00b2, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
{ "se_3", 0x00b3, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
{ "sez", 0x00b4, 0xffff, PDP11_OPCODE_NO_OPS, PDP11_BASIC },
Modified: branches/binutils/package/opcodes/pj-opc.c
===================================================================
--- branches/binutils/package/opcodes/pj-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/pj-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -2,21 +2,20 @@
Copyright 1999, 2000, 2002, 2003 Free Software Foundation, Inc.
Contributed by Steve Chamberlain of Transmeta (sac at pobox.com).
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
#include "sysdep.h"
#include "opcode/pj.h"
@@ -190,8 +189,8 @@
{ 0xa5, -1, 3, {O_R16, O_N}, {"if_acmpeq"}},
{ 0xa6, -1, 3, {O_R16, O_N}, {"if_acmpne"}},
{ 0xa7, -1, 3, {O_R16, O_N}, {"goto"}},
-{ 0xa8, -1, 3, {O_N, O_N}, {"jsr"}},
-{ 0xa9, -1, 2, {O_N, O_N}, {"ret"}},
+{ 0xa8, -1, 3, {O_R16, O_N}, {"jsr"}},
+{ 0xa9, -1, 2, {O_U8, O_N}, {"ret"}},
{ 0xaa, -1, 1, {O_N, O_N}, {"tableswitch"}},
{ 0xab, -1, 1, {O_N, O_N}, {"lookupswitch"}},
{ 0xac, -1, 1, {O_N, O_N}, {"ireturn"}},
@@ -200,14 +199,14 @@
{ 0xaf, -1, 1, {O_N, O_N}, {"dreturn"}},
{ 0xb0, -1, 1, {O_N, O_N}, {"areturn"}},
{ 0xb1, -1, 1, {O_N, O_N}, {"return"}},
-{ 0xb2, -1, 3, {O_N, O_N}, {"getstatic"}},
-{ 0xb3, -1, 3, {O_N, O_N}, {"putstatic"}},
-{ 0xb4, -1, 3, {O_N, O_N}, {"getfield"}},
-{ 0xb5, -1, 3, {O_N, O_N}, {"putfield"}},
-{ 0xb6, -1, 3, {O_N, O_N}, {"invokevirtual"}},
-{ 0xb7, -1, 3, {O_N, O_N}, {"invokespecial"}},
-{ 0xb8, -1, 3, {O_N, O_N}, {"invokestatic"}},
-{ 0xb9, -1, 5, {O_N, O_N}, {"invokeinterface"}},
+{ 0xb2, -1, 3, {O_U16, O_N}, {"getstatic"}},
+{ 0xb3, -1, 3, {O_U16, O_N}, {"putstatic"}},
+{ 0xb4, -1, 3, {O_U16, O_N}, {"getfield"}},
+{ 0xb5, -1, 3, {O_U16, O_N}, {"putfield"}},
+{ 0xb6, -1, 3, {O_U16, O_N}, {"invokevirtual"}},
+{ 0xb7, -1, 3, {O_U16, O_N}, {"invokespecial"}},
+{ 0xb8, -1, 3, {O_U16, O_N}, {"invokestatic"}},
+{ 0xb9, -1, 5, {O_U16, O_U8}, {"invokeinterface"}},
{ 0xba, -1, 1, {O_N, O_N}, {"bad_ba"}},
{ 0xbb, -1, 3, {O_N, O_N}, {"new"}},
{ 0xbc, -1, 2, {O_N, O_N}, {"newarray"}},
@@ -222,43 +221,43 @@
{ 0xc5, -1, 4, {O_N, O_N}, {"multianewarray"}},
{ 0xc6, -1, 3, {O_N, O_N}, {"ifnull"}},
{ 0xc7, -1, 3, {O_N, O_N}, {"ifnonnull"}},
-{ 0xc8, -1, 5, {O_N, O_N}, {"goto_w"}},
-{ 0xc9, -1, 5, {O_N, O_N}, {"jsr_w"}},
-{ 0xca, -1, 1, {O_N, O_N}, {"breakpoint"}},
-{ 0xcb, -1, 1, {O_N, O_N}, {"bytecode"}},
-{ 0xcc, -1, 1, {O_N, O_N}, {"try"}},
-{ 0xcd, -1, 1, {O_N, O_N}, {"endtry"}},
-{ 0xce, -1, 1, {O_N, O_N}, {"catch"}},
-{ 0xcf, -1, 1, {O_N, O_N}, {"var"}},
-{ 0xd0, -1, 1, {O_N, O_N}, {"endvar"}},
-{ 0xd1, -1, 1, {O_N, O_N}, {"bad_d1"}},
-{ 0xd2, -1, 1, {O_N, O_N}, {"bad_d2"}},
-{ 0xd3, -1, 1, {O_N, O_N}, {"bad_d3"}},
-{ 0xd4, -1, 1, {O_N, O_N}, {"bad_d4"}},
-{ 0xd5, -1, 1, {O_N, O_N}, {"bad_d5"}},
-{ 0xd6, -1, 1, {O_N, O_N}, {"bad_d6"}},
-{ 0xd7, -1, 1, {O_N, O_N}, {"bad_d7"}},
-{ 0xd8, -1, 1, {O_N, O_N}, {"bad_d8"}},
-{ 0xd9, -1, 1, {O_N, O_N}, {"bad_d9"}},
-{ 0xda, -1, 1, {O_N, O_N}, {"bad_da"}},
+{ 0xc8, -1, 5, {O_R32, O_N}, {"goto_w"}},
+{ 0xc9, -1, 5, {O_R32, O_N}, {"jsr_w"}},
+{ 0xca, -1, 3, {O_N, O_N}, {"breakpoint"}},
+{ 0xcb, -1, 2, {O_U8, O_N}, {"ldc_quick"}},
+{ 0xcc, -1, 3, {O_U16, O_N}, {"ldc_w_quick"}},
+{ 0xcd, -1, 3, {O_U16, O_N}, {"ldc2_w_quick"}},
+{ 0xce, -1, 3, {O_U16, O_N}, {"getfield_quick"}},
+{ 0xcf, -1, 3, {O_U16, O_N}, {"putfield_quick"}},
+{ 0xd0, -1, 3, {O_U16, O_N}, {"getfield2_quick"}},
+{ 0xd1, -1, 3, {O_U16, O_N}, {"putfield2_quick"}},
+{ 0xd2, -1, 3, {O_U16, O_N}, {"getstatic_quick"}},
+{ 0xd3, -1, 3, {O_U16, O_N}, {"putstatic_quick"}},
+{ 0xd4, -1, 3, {O_U16, O_N}, {"getstatic2_quick"}},
+{ 0xd5, -1, 3, {O_U16, O_N}, {"putstatic2_quick"}},
+{ 0xd6, -1, 3, {O_U16, O_N}, {"invokevirtual_quick"}},
+{ 0xd7, -1, 3, {O_U16, O_N}, {"invokenonvirtual_quick"}},
+{ 0xd8, -1, 3, {O_U16, O_N}, {"invokesuper_quick"}},
+{ 0xd9, -1, 3, {O_U16, O_N}, {"invokestatic_quick"}},
+{ 0xda, -1, 3, {O_U16, O_N}, {"invokeinterface_quick"}},
{ 0xdb, -1, 1, {O_N, O_N}, {"bad_db"}},
-{ 0xdc, -1, 1, {O_N, O_N}, {"bad_dc"}},
-{ 0xdd, -1, 1, {O_N, O_N}, {"bad_dd"}},
-{ 0xde, -1, 1, {O_N, O_N}, {"bad_de"}},
-{ 0xdf, -1, 1, {O_N, O_N}, {"bad_df"}},
-{ 0xe0, -1, 1, {O_N, O_N}, {"bad_e0"}},
-{ 0xe1, -1, 1, {O_N, O_N}, {"bad_e1"}},
-{ 0xe2, -1, 1, {O_N, O_N}, {"bad_e2"}},
-{ 0xe3, -1, 1, {O_N, O_N}, {"bad_e3"}},
-{ 0xe4, -1, 1, {O_N, O_N}, {"bad_e4"}},
-{ 0xe5, -1, 1, {O_N, O_N}, {"bad_e5"}},
-{ 0xe6, -1, 1, {O_N, O_N}, {"bad_e6"}},
-{ 0xe7, -1, 1, {O_N, O_N}, {"bad_e7"}},
-{ 0xe8, -1, 1, {O_N, O_N}, {"bad_e8"}},
-{ 0xe9, -1, 1, {O_N, O_N}, {"bad_e9"}},
-{ 0xea, -1, 1, {O_N, O_N}, {"bad_ea"}},
-{ 0xeb, -1, 1, {O_N, O_N}, {"bad_eb"}},
-{ 0xec, -1, 1, {O_N, O_N}, {"bad_ec"}},
+{ 0xdc, -1, 1, {O_N, O_N}, {"aastore_quick"}},
+{ 0xdd, -1, 3, {O_U16, O_N}, {"new_quick"}},
+{ 0xde, -1, 3, {O_U16, O_N}, {"anewarray_quick"}},
+{ 0xdf, -1, 3, {O_U16, O_N}, {"multianewarray_quick"}},
+{ 0xe0, -1, 3, {O_U16, O_N}, {"checkcast_quick"}},
+{ 0xe1, -1, 3, {O_U16, O_N}, {"instanceof_quick"}},
+{ 0xe2, -1, 3, {O_U16, O_N}, {"invokevirtiual_quick_w"}},
+{ 0xe3, -1, 3, {O_U16, O_N}, {"getfield_quick_w"}},
+{ 0xe4, -1, 3, {O_U16, O_N}, {"putfield_quick_w"}},
+{ 0xe5, -1, 1, {O_N, O_N}, {"nonnull_quick"}},
+{ 0xe6, -1, 3, {O_U16, O_N}, {"agetfield_quick"}},
+{ 0xe7, -1, 3, {O_U16, O_N}, {"aputfield_quick"}},
+{ 0xe8, -1, 3, {O_U16, O_N}, {"agetstatic_quick"}},
+{ 0xe9, -1, 3, {O_U16, O_N}, {"aputstatic_quick"}},
+{ 0xea, -1, 2, {O_U8, O_N}, {"aldc_quick"}},
+{ 0xeb, -1, 3, {O_U16, O_N}, {"aldc_w_quick"}},
+{ 0xec, -1, 1, {O_N, O_N}, {"exit_sync_method"}},
{ 0xed, -1, 3, {O_16, O_N}, {"sethi"}},
{ 0xee, -1, 3, {O_U8, O_8}, {"load_word_index"}},
{ 0xef, -1, 3, {O_U8, O_8}, {"load_short_index"}},
@@ -277,6 +276,7 @@
{ 0xfc, -1, 1, {O_N, O_N}, {"bad_fc"}},
{ 0xfd, -1, 1, {O_N, O_N}, {"bad_fd"}},
{ 0xfe, -1, 1, {O_N, O_N}, {"bad_fe"}},
+
{ 0xff, 0x00, 2, {O_N, O_N}, {"load_ubyte"}},
{ 0xff, 0x01, 2, {O_N, O_N}, {"load_byte"}},
{ 0xff, 0x02, 2, {O_N, O_N}, {"load_char"}},
@@ -451,10 +451,10 @@
{ 0xff, 0xab, 2, {O_N, O_N}, {"bad"}},
{ 0xff, 0xac, 2, {O_N, O_N}, {"bad"}},
{ 0xff, 0xad, 2, {O_N, O_N}, {"bad"}},
-{ 0xff, 0xae, 2, {O_N, O_N}, {"tm_putchar"}},
-{ 0xff, 0xaf, 2, {O_N, O_N}, {"tm_exit"}},
-{ 0xff, 0xb0, 2, {O_N, O_N}, {"tm_trap"}},
-{ 0xff, 0xb1, 2, {O_N, O_N}, {"tm_minfo"}},
+{ 0xff, 0xae, 2, {O_N, O_N}, {"bad"}}, /*LM_FIXED*/
+{ 0xff, 0xaf, 2, {O_N, O_N}, {"bad"}}, /*LM_FIXED*/
+{ 0xff, 0xb0, 2, {O_N, O_N}, {"bad"}}, /*LM_FIXED*/
+{ 0xff, 0xb1, 2, {O_N, O_N}, {"bad"}}, /*LM_FIXED*/
{ 0xff, 0xb2, 2, {O_N, O_N}, {"bad"}},
{ 0xff, 0xb3, 2, {O_N, O_N}, {"bad"}},
{ 0xff, 0xb4, 2, {O_N, O_N}, {"bad"}},
Modified: branches/binutils/package/opcodes/po/Make-in
===================================================================
--- branches/binutils/package/opcodes/po/Make-in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/po/Make-in 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,6 +1,6 @@
# Makefile for program source directory in GNU NLS utilities package.
# Copyright (C) 1995, 1996, 1997 by Ulrich Drepper <drepper at gnu.ai.mit.edu>
-# Copyright (C) 2003 Free Software Foundation, Inc.
+# Copyright (C) 2003, 2006 Free Software Foundation, Inc.
#
# This file may be copied and used freely without restrictions. It can
# be used in projects which are not available under the GNU Public License
@@ -110,6 +110,7 @@
install: install-exec install-data
install-exec:
install-info:
+install-html:
install-data: install-data- at USE_NLS@
install-data-no: all
install-data-yes: all
@@ -185,7 +186,7 @@
cat-id-tbl.o: ../intl/libgettext.h
-dvi info tags TAGS ID:
+html dvi info tags TAGS ID:
mostlyclean:
rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp
Modified: branches/binutils/package/opcodes/po/POTFILES.in
===================================================================
--- branches/binutils/package/opcodes/po/POTFILES.in 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/po/POTFILES.in 2006-04-19 08:33:31 UTC (rev 12)
@@ -7,6 +7,7 @@
avr-dis.c
bfin-dis.c
cgen-asm.c
+cgen-bitset.c
cgen-dis.c
cgen-opc.c
cgen-ops.h
@@ -104,13 +105,13 @@
mips-opc.c
mmix-dis.c
mmix-opc.c
-ms1-asm.c
-ms1-desc.c
-ms1-desc.h
-ms1-dis.c
-ms1-ibld.c
-ms1-opc.c
-ms1-opc.h
+mt-asm.c
+mt-desc.c
+mt-desc.h
+mt-dis.c
+mt-ibld.c
+mt-opc.c
+mt-opc.h
ns32k-dis.c
openrisc-asm.c
openrisc-desc.c
@@ -157,6 +158,7 @@
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c
+z80-dis.c
z8k-dis.c
z8kgen.c
z8k-opc.h
Modified: branches/binutils/package/opcodes/po/sv.po
===================================================================
--- branches/binutils/package/opcodes/po/sv.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/po/sv.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,45 +1,50 @@
# Swedish messages for opcodes.
-# Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
+# Copyright (C) 2006 Free Software Foundation, Inc.
# Christian Rose <menthos at menthos.com>, 2001, 2002, 2003.
+# Daniel Nylander <po at danielnylander.se>, 2006.
#
msgid ""
msgstr ""
-"Project-Id-Version: opcodes 2.14rel030712\n"
-"POT-Creation-Date: 2003-07-11 13:56+0930\n"
-"PO-Revision-Date: 2003-07-16 14:36+0200\n"
-"Last-Translator: Christian Rose <menthos at menthos.com>\n"
-"Language-Team: Swedish <sv at li.org>\n"
+"Project-Id-Version: opcodes 2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-05 20:32+1030\n"
+"PO-Revision-Date: 2006-02-13 22:58+0100\n"
+"Last-Translator: Daniel Nylander <po at danielnylander.se>\n"
+"Language-Team: Swedish <tp-sv at listor.tp-sv.se>\n"
"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=iso-8859-1\n"
"Content-Transfer-Encoding: 8bit\n"
-#: alpha-opc.c:335
+#: alpha-opc.c:331
msgid "branch operand unaligned"
msgstr "grenoperanden ligger inte på jämn gräns"
-#: alpha-opc.c:358 alpha-opc.c:380
+#: alpha-opc.c:353 alpha-opc.c:374
msgid "jump hint unaligned"
msgstr "hopptipset ligger inte på jämn gräns"
-#: arc-dis.c:52
+#: arc-dis.c:76
msgid "Illegal limm reference in last instruction!\n"
msgstr "Otillåten limm-referens i sista instruktionen!\n"
-#: arm-dis.c:554
+#: arm-dis.c:1267
msgid "<illegal precision>"
msgstr "<otillåten precision>"
-#: arm-dis.c:1162
+#. XXX - should break 'option' at following delimiter.
+#: arm-dis.c:1912
#, c-format
msgid "Unrecognised register name set: %s\n"
msgstr "Okänt registernamn är angivet: %s\n"
-#: arm-dis.c:1169
+#. XXX - should break 'option' at following delimiter.
+#: arm-dis.c:1920
#, c-format
msgid "Unrecognised disassembler option: %s\n"
msgstr "Okänt disassembleralternativ: %s\n"
-#: arm-dis.c:1343
+#: arm-dis.c:2093
+#, c-format
msgid ""
"\n"
"The following ARM specific disassembler options are supported for use with\n"
@@ -49,11 +54,13 @@
"Följande ARM-specifika disassembleralternativ stöds för användning\n"
"tillsammans med flaggan -M:\n"
-#: avr-dis.c:117 avr-dis.c:127
+#: avr-dis.c:112 avr-dis.c:122
+#, c-format
msgid "undefined"
msgstr "odefinierad"
#: avr-dis.c:179
+#, c-format
msgid "Internal disassembler error"
msgstr "Internt fel i disassembleraren"
@@ -62,13 +69,13 @@
msgid "unknown constraint `%c'"
msgstr "okänd begränsning \"%c\""
-#: cgen-asm.c:348 fr30-ibld.c:195 frv-ibld.c:195 ip2k-ibld.c:195
-#: iq2000-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 xstormy16-ibld.c:195
+#: cgen-asm.c:336 fr30-ibld.c:197 frv-ibld.c:197 ip2k-ibld.c:197
+#: iq2000-ibld.c:197 m32r-ibld.c:197 openrisc-ibld.c:197 xstormy16-ibld.c:197
#, c-format
msgid "operand out of range (%ld not between %ld and %ld)"
msgstr "operanden är utanför intervallet (%ld är inte mellan %ld och %ld)"
-#: cgen-asm.c:369
+#: cgen-asm.c:358
#, c-format
msgid "operand out of range (%lu not between %lu and %lu)"
msgstr "operanden är utanför intervallet (%lu är inte mellan %lu och %lu)"
@@ -84,63 +91,63 @@
msgid "Unknown error %d\n"
msgstr "Okänt fel %d\n"
-#: dis-buf.c:62
+#: dis-buf.c:66
#, c-format
-msgid "Address 0x%x is out of bounds.\n"
-msgstr "Adressen 0x%x ligger utanför tillåtna gränser.\n"
+msgid "Address 0x%s is out of bounds.\n"
+msgstr "Adressen 0x%s ligger utanför tillåtna gränser.\n"
-#: fr30-asm.c:323 frv-asm.c:626 ip2k-asm.c:574 iq2000-asm.c:460 m32r-asm.c:325
-#: openrisc-asm.c:261 xstormy16-asm.c:284
+#: fr30-asm.c:323 frv-asm.c:1298 ip2k-asm.c:530 iq2000-asm.c:465
+#: m32r-asm.c:338 openrisc-asm.c:252 xstormy16-asm.c:284
#, c-format
msgid "Unrecognized field %d while parsing.\n"
msgstr "Okänt fält %d vid tolkning.\n"
-#: fr30-asm.c:373 frv-asm.c:676 ip2k-asm.c:624 iq2000-asm.c:510 m32r-asm.c:375
-#: openrisc-asm.c:311 xstormy16-asm.c:334
+#: fr30-asm.c:372 frv-asm.c:1347 ip2k-asm.c:579 iq2000-asm.c:514
+#: m32r-asm.c:387 openrisc-asm.c:301 xstormy16-asm.c:333
msgid "missing mnemonic in syntax string"
msgstr "instruktion saknas i syntaxsträng"
#. We couldn't parse it.
-#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 frv-asm.c:812
-#: frv-asm.c:816 frv-asm.c:903 frv-asm.c:1005 ip2k-asm.c:760 ip2k-asm.c:764
-#: ip2k-asm.c:851 ip2k-asm.c:953 iq2000-asm.c:646 iq2000-asm.c:650
-#: iq2000-asm.c:737 iq2000-asm.c:839 m32r-asm.c:511 m32r-asm.c:515
-#: m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:447 openrisc-asm.c:451
-#: openrisc-asm.c:538 openrisc-asm.c:640 xstormy16-asm.c:470
-#: xstormy16-asm.c:474 xstormy16-asm.c:561 xstormy16-asm.c:663
+#: fr30-asm.c:507 fr30-asm.c:511 fr30-asm.c:598 fr30-asm.c:699 frv-asm.c:1482
+#: frv-asm.c:1486 frv-asm.c:1573 frv-asm.c:1674 ip2k-asm.c:714 ip2k-asm.c:718
+#: ip2k-asm.c:805 ip2k-asm.c:906 iq2000-asm.c:649 iq2000-asm.c:653
+#: iq2000-asm.c:740 iq2000-asm.c:841 m32r-asm.c:522 m32r-asm.c:526
+#: m32r-asm.c:613 m32r-asm.c:714 openrisc-asm.c:436 openrisc-asm.c:440
+#: openrisc-asm.c:527 openrisc-asm.c:628 xstormy16-asm.c:468
+#: xstormy16-asm.c:472 xstormy16-asm.c:559 xstormy16-asm.c:660
msgid "unrecognized instruction"
msgstr "okänd instruktion"
-#: fr30-asm.c:556 frv-asm.c:859 ip2k-asm.c:807 iq2000-asm.c:693 m32r-asm.c:558
-#: openrisc-asm.c:494 xstormy16-asm.c:517
+#: fr30-asm.c:554 frv-asm.c:1529 ip2k-asm.c:761 iq2000-asm.c:696
+#: m32r-asm.c:569 openrisc-asm.c:483 xstormy16-asm.c:515
#, c-format
msgid "syntax error (expected char `%c', found `%c')"
msgstr "syntaxfel (tecknet \"%c\" förväntades, hittade \"%c\")"
-#: fr30-asm.c:566 frv-asm.c:869 ip2k-asm.c:817 iq2000-asm.c:703 m32r-asm.c:568
-#: openrisc-asm.c:504 xstormy16-asm.c:527
+#: fr30-asm.c:564 frv-asm.c:1539 ip2k-asm.c:771 iq2000-asm.c:706
+#: m32r-asm.c:579 openrisc-asm.c:493 xstormy16-asm.c:525
#, c-format
msgid "syntax error (expected char `%c', found end of instruction)"
msgstr "syntaxfel (tecknet \"%c\" förväntades, hittade slutet på instruktion)"
-#: fr30-asm.c:594 frv-asm.c:897 ip2k-asm.c:845 iq2000-asm.c:731 m32r-asm.c:596
-#: openrisc-asm.c:532 xstormy16-asm.c:555
+#: fr30-asm.c:592 frv-asm.c:1567 ip2k-asm.c:799 iq2000-asm.c:734
+#: m32r-asm.c:607 openrisc-asm.c:521 xstormy16-asm.c:553
msgid "junk at end of line"
msgstr "skräp vid slutet på raden"
-#: fr30-asm.c:701 frv-asm.c:1004 ip2k-asm.c:952 iq2000-asm.c:838
-#: m32r-asm.c:703 openrisc-asm.c:639 xstormy16-asm.c:662
+#: fr30-asm.c:698 frv-asm.c:1673 ip2k-asm.c:905 iq2000-asm.c:840
+#: m32r-asm.c:713 openrisc-asm.c:627 xstormy16-asm.c:659
msgid "unrecognized form of instruction"
msgstr "okänd instruktionsform"
-#: fr30-asm.c:713 frv-asm.c:1016 ip2k-asm.c:964 iq2000-asm.c:850
-#: m32r-asm.c:715 openrisc-asm.c:651 xstormy16-asm.c:674
+#: fr30-asm.c:710 frv-asm.c:1685 ip2k-asm.c:917 iq2000-asm.c:852
+#: m32r-asm.c:725 openrisc-asm.c:639 xstormy16-asm.c:671
#, c-format
msgid "bad instruction `%.50s...'"
msgstr "felaktig instruktion \"%.50s...\""
-#: fr30-asm.c:716 frv-asm.c:1019 ip2k-asm.c:967 iq2000-asm.c:853
-#: m32r-asm.c:718 openrisc-asm.c:654 xstormy16-asm.c:677
+#: fr30-asm.c:713 frv-asm.c:1688 ip2k-asm.c:920 iq2000-asm.c:855
+#: m32r-asm.c:728 openrisc-asm.c:642 xstormy16-asm.c:674
#, c-format
msgid "bad instruction `%.50s'"
msgstr "felaktig instruktion \"%.50s\""
@@ -151,70 +158,70 @@
msgid "*unknown*"
msgstr "*okänd*"
-#: fr30-dis.c:320 frv-dis.c:371 ip2k-dis.c:329 iq2000-dis.c:192 m32r-dis.c:251
-#: openrisc-dis.c:138 xstormy16-dis.c:171
+#: fr30-dis.c:319 frv-dis.c:410 ip2k-dis.c:313 iq2000-dis.c:191 m32r-dis.c:262
+#: openrisc-dis.c:137 xstormy16-dis.c:170
#, c-format
msgid "Unrecognized field %d while printing insn.\n"
msgstr "Okänt fält %d vid utskrift av instruktion.\n"
-#: fr30-ibld.c:166 frv-ibld.c:166 ip2k-ibld.c:166 iq2000-ibld.c:166
-#: m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166
+#: fr30-ibld.c:168 frv-ibld.c:168 ip2k-ibld.c:168 iq2000-ibld.c:168
+#: m32r-ibld.c:168 openrisc-ibld.c:168 xstormy16-ibld.c:168
#, c-format
msgid "operand out of range (%ld not between %ld and %lu)"
msgstr "operanden är utanför intervallet (%ld är inte mellan %ld och %lu)"
-#: fr30-ibld.c:179 frv-ibld.c:179 ip2k-ibld.c:179 iq2000-ibld.c:179
-#: m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179
+#: fr30-ibld.c:181 frv-ibld.c:181 ip2k-ibld.c:181 iq2000-ibld.c:181
+#: m32r-ibld.c:181 openrisc-ibld.c:181 xstormy16-ibld.c:181
#, c-format
msgid "operand out of range (%lu not between 0 and %lu)"
msgstr "operanden utanför intervallet (%lu inte mellan 0 och %lu)"
-#: fr30-ibld.c:730 frv-ibld.c:829 ip2k-ibld.c:607 iq2000-ibld.c:713
-#: m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678
+#: fr30-ibld.c:732 frv-ibld.c:858 ip2k-ibld.c:609 iq2000-ibld.c:715
+#: m32r-ibld.c:667 openrisc-ibld.c:635 xstormy16-ibld.c:680
#, c-format
msgid "Unrecognized field %d while building insn.\n"
msgstr "Okänt fält %d vid konstruktion av instruktion.\n"
-#: fr30-ibld.c:937 frv-ibld.c:1121 ip2k-ibld.c:684 iq2000-ibld.c:890
-#: m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826
+#: fr30-ibld.c:939 frv-ibld.c:1177 ip2k-ibld.c:686 iq2000-ibld.c:892
+#: m32r-ibld.c:806 openrisc-ibld.c:737 xstormy16-ibld.c:828
#, c-format
msgid "Unrecognized field %d while decoding insn.\n"
msgstr "Okänt fält %d vid avkodning av instruktion.\n"
-#: fr30-ibld.c:1086 frv-ibld.c:1375 ip2k-ibld.c:761 iq2000-ibld.c:1024
-#: m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939
+#: fr30-ibld.c:1088 frv-ibld.c:1458 ip2k-ibld.c:763 iq2000-ibld.c:1026
+#: m32r-ibld.c:922 openrisc-ibld.c:817 xstormy16-ibld.c:941
#, c-format
msgid "Unrecognized field %d while getting int operand.\n"
msgstr "Okänt fält %d vid hämtning av heltalsoperand.\n"
-#: fr30-ibld.c:1215 frv-ibld.c:1609 ip2k-ibld.c:818 iq2000-ibld.c:1138
-#: m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032
+#: fr30-ibld.c:1217 frv-ibld.c:1719 ip2k-ibld.c:820 iq2000-ibld.c:1140
+#: m32r-ibld.c:1018 openrisc-ibld.c:877 xstormy16-ibld.c:1034
#, c-format
msgid "Unrecognized field %d while getting vma operand.\n"
msgstr "Okänt fält %d vid hämtning av vma-operand.\n"
-#: fr30-ibld.c:1349 frv-ibld.c:1852 ip2k-ibld.c:880 iq2000-ibld.c:1261
-#: m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134
+#: fr30-ibld.c:1351 frv-ibld.c:1989 ip2k-ibld.c:882 iq2000-ibld.c:1263
+#: m32r-ibld.c:1122 openrisc-ibld.c:946 xstormy16-ibld.c:1136
#, c-format
msgid "Unrecognized field %d while setting int operand.\n"
msgstr "Okänt fält %d vid inställning av heltalsoperand.\n"
-#: fr30-ibld.c:1471 frv-ibld.c:2083 ip2k-ibld.c:930 iq2000-ibld.c:1372
-#: m32r-ibld.c:1176 openrisc-ibld.c:1001 xstormy16-ibld.c:1224
+#: fr30-ibld.c:1473 frv-ibld.c:2247 ip2k-ibld.c:932 iq2000-ibld.c:1374
+#: m32r-ibld.c:1214 openrisc-ibld.c:1003 xstormy16-ibld.c:1226
#, c-format
msgid "Unrecognized field %d while setting vma operand.\n"
msgstr "Okänt fält %d vid inställning av vma-operand.\n"
-#: frv-asm.c:365
+#: frv-asm.c:978
msgid "register number must be even"
msgstr "registernumret måste vara jämnt"
-#: h8300-dis.c:377
+#: h8300-dis.c:358
#, c-format
msgid "Hmmmm 0x%x"
msgstr "Hmmmm 0x%x"
-#: h8300-dis.c:760
+#: h8300-dis.c:744
#, c-format
msgid "Don't understand 0x%x \n"
msgstr "Förstår inte 0x%x \n"
@@ -225,40 +232,40 @@
msgstr "kan inte sätta in %d\n"
#. Couldn't understand anything.
-#: h8500-dis.c:350
+#: h8500-dis.c:342
#, c-format
msgid "%02x\t\t*unknown*"
msgstr "%02x\t\t*okänd*"
-#: i386-dis.c:1699
+#: i386-dis.c:1733
msgid "<internal disassembler error>"
msgstr "<internt fel i disassembleraren>"
-#: ia64-gen.c:295
+#: ia64-gen.c:297
#, c-format
msgid "%s: Error: "
msgstr "%s: Fel: "
-#: ia64-gen.c:308
+#: ia64-gen.c:310
#, c-format
msgid "%s: Warning: "
msgstr "%s: Varning: "
-#: ia64-gen.c:494 ia64-gen.c:728
+#: ia64-gen.c:496 ia64-gen.c:730
#, c-format
msgid "multiple note %s not handled\n"
msgstr "multipel anteckning %s hanteras inte\n"
-#: ia64-gen.c:605
+#: ia64-gen.c:607
msgid "can't find ia64-ic.tbl for reading\n"
msgstr "kan inte hitta ia64-ic.tbl för läsning\n"
-#: ia64-gen.c:810
+#: ia64-gen.c:812
#, c-format
msgid "can't find %s for reading\n"
msgstr "kan inte hitta %s för läsning\n"
-#: ia64-gen.c:1034
+#: ia64-gen.c:1036
#, c-format
msgid ""
"most recent format '%s'\n"
@@ -267,82 +274,82 @@
"allra senaste formatet \"%s\"\n"
"verkar mer restriktivt än \"%s\"\n"
-#: ia64-gen.c:1045
+#: ia64-gen.c:1047
#, c-format
msgid "overlapping field %s->%s\n"
msgstr "överlappande fält %s->%s\n"
-#: ia64-gen.c:1236
+#: ia64-gen.c:1244
#, c-format
msgid "overwriting note %d with note %d (IC:%s)\n"
msgstr "skriver över anteckning %d med anteckning %d (IC:%s)\n"
-#: ia64-gen.c:1435
+#: ia64-gen.c:1443
#, c-format
msgid "don't know how to specify %% dependency %s\n"
msgstr "vet inte hur %%-beroende %s ska anges\n"
-#: ia64-gen.c:1457
+#: ia64-gen.c:1465
#, c-format
msgid "Don't know how to specify # dependency %s\n"
msgstr "Vet inte hur #-beroende %s ska anges\n"
-#: ia64-gen.c:1496
+#: ia64-gen.c:1504
#, c-format
msgid "IC:%s [%s] has no terminals or sub-classes\n"
msgstr "IC:%s [%s] har inga terminaler eller underklasser\n"
-#: ia64-gen.c:1499
+#: ia64-gen.c:1507
#, c-format
msgid "IC:%s has no terminals or sub-classes\n"
msgstr "IC:%s har inga terminaler eller underklasser\n"
-#: ia64-gen.c:1508
+#: ia64-gen.c:1516
#, c-format
msgid "no insns mapped directly to terminal IC %s [%s]"
msgstr "inga instruktioner mappade direkt till terminal-IC %s [%s]"
-#: ia64-gen.c:1511
+#: ia64-gen.c:1519
#, c-format
msgid "no insns mapped directly to terminal IC %s\n"
msgstr "inga instruktioner mappade direkt till terminal-IC %s\n"
-#: ia64-gen.c:1522
+#: ia64-gen.c:1530
#, c-format
msgid "class %s is defined but not used\n"
msgstr "klassen %s är definierad men inte använd\n"
# Misstänkt pluralhack!
-#: ia64-gen.c:1533
+#: ia64-gen.c:1541
#, c-format
msgid "Warning: rsrc %s (%s) has no chks%s\n"
msgstr "Varning: rsrc %s (%s) har inga kontroller%s\n"
-#: ia64-gen.c:1537
+#: ia64-gen.c:1545
#, c-format
msgid "rsrc %s (%s) has no regs\n"
msgstr "rsrc %s (%s) har inga register\n"
-#: ia64-gen.c:2436
+#: ia64-gen.c:2444
#, c-format
msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
msgstr ""
"IC-anteckning %d i instruktion %s (IC:%s) står i konflikt med resurs %s\n"
"anteckning %d\n"
-#: ia64-gen.c:2464
+#: ia64-gen.c:2472
#, c-format
msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
msgstr ""
"IC-anteckning %d för instruktion %s (IC:%s) står i konflikt med resurs %s\n"
"anteckning %d\n"
-#: ia64-gen.c:2478
+#: ia64-gen.c:2486
#, c-format
msgid "opcode %s has no class (ops %d %d %d)\n"
msgstr "instruktion %s har ingen klass (operationer %d %d %d)\n"
-#: ia64-gen.c:2789
+#: ia64-gen.c:2816
#, c-format
msgid "unable to change directory to \"%s\", errno = %s\n"
msgstr "kan inte byta katalog till \"%s\", felnummer = %s\n"
@@ -354,66 +361,66 @@
msgstr "W-nyckelord ogiltigt i FR-operandlucka."
#. Invalid offset present.
-#: ip2k-asm.c:122
+#: ip2k-asm.c:117
msgid "offset(IP) is not a valid form"
msgstr "avståndet(IP) är inte en giltig form"
#. Found something there in front of (DP) but it's out
#. of range.
-#: ip2k-asm.c:175
+#: ip2k-asm.c:165
msgid "(DP) offset out of range."
msgstr "(DP) avståndet är utanför intervallet."
#. Found something there in front of (SP) but it's out
#. of range.
-#: ip2k-asm.c:221
+#: ip2k-asm.c:206
msgid "(SP) offset out of range."
msgstr "(SP) avståndet är utanför intervallet."
-#: ip2k-asm.c:241
+#: ip2k-asm.c:222
msgid "illegal use of parentheses"
msgstr "otillåten användning av parenteser"
-#: ip2k-asm.c:248
+#: ip2k-asm.c:229
msgid "operand out of range (not between 1 and 255)"
msgstr "operanden utanför intervallet (inte mellan 1 och 255)"
#. Something is very wrong. opindex has to be one of the above.
-#: ip2k-asm.c:273
+#: ip2k-asm.c:254
msgid "parse_addr16: invalid opindex."
msgstr "parse_addr16: ogiltigt opindex."
-#: ip2k-asm.c:353
+#: ip2k-asm.c:309
msgid "Byte address required. - must be even."
msgstr "Byteadress krävs - måste vara jämn."
-#: ip2k-asm.c:362
+#: ip2k-asm.c:318
msgid "cgen_parse_address returned a symbol. Literal required."
msgstr "cgen_parse_address returnerade en symbol. Literal krävs."
-#: ip2k-asm.c:420
+#: ip2k-asm.c:376
#, c-format
msgid "%operator operand is not a symbol"
msgstr "%operator-operand är inte en symbol"
-#: ip2k-asm.c:474
+#: ip2k-asm.c:430
msgid "Attempt to find bit index of 0"
msgstr "Försök att hitta 0-bitindex"
-#: iq2000-asm.c:110 iq2000-asm.c:141
+#: iq2000-asm.c:115 iq2000-asm.c:146
msgid "immediate value cannot be register"
msgstr "omedelbart värde kan inte vara register"
-#: iq2000-asm.c:120 iq2000-asm.c:151
+#: iq2000-asm.c:126 iq2000-asm.c:156
msgid "immediate value out of range"
msgstr "omedelbart värde är utanför intervallet"
-#: iq2000-asm.c:180
+#: iq2000-asm.c:185
msgid "21-bit offset out of range"
msgstr "21-bitars avstånd utanför intervallet"
-#: iq2000-asm.c:205 iq2000-asm.c:235 iq2000-asm.c:272 iq2000-asm.c:305
-#: openrisc-asm.c:96 openrisc-asm.c:155
+#: iq2000-asm.c:210 iq2000-asm.c:240 iq2000-asm.c:277 iq2000-asm.c:310
+#: openrisc-asm.c:90 openrisc-asm.c:144
msgid "missing `)'"
msgstr "\")\" saknas"
@@ -427,17 +434,17 @@
msgid "unknown\t0x%04lx"
msgstr "okänd\t0x%04lx"
-#: m10300-dis.c:766
+#: m10300-dis.c:767
#, c-format
msgid "unknown\t0x%04x"
msgstr "okänd\t0x%04x"
-#: m68k-dis.c:429
+#: m68k-dis.c:295
#, c-format
msgid "<internal error in opcode table: %s %s>\n"
msgstr "<internt fel i instruktionstabellen: %s %s>\n"
-#: m68k-dis.c:1007
+#: m68k-dis.c:1089
#, c-format
msgid "<function code %d>"
msgstr "<funktionskod %d>"
@@ -447,26 +454,27 @@
msgid "# <dis error: %08x>"
msgstr "# <disassemblerarfel: %08x>"
-#: mips-dis.c:699
+#: mips-dis.c:720
msgid "# internal error, incomplete extension sequence (+)"
msgstr "# internt fel, ofullständig ändelsesekvens (+)"
-#: mips-dis.c:742
+#: mips-dis.c:779
#, c-format
msgid "# internal error, undefined extension sequence (+%c)"
msgstr "# internt fel, odefinierad ändelsesekvens (+%c)"
-#: mips-dis.c:1000
+#: mips-dis.c:1037
#, c-format
msgid "# internal error, undefined modifier(%c)"
msgstr "# internt fel, okänd modifierare(%c)"
-#: mips-dis.c:1751
+#: mips-dis.c:1793
#, c-format
msgid "# internal disassembler error, unrecognised modifier (%c)"
msgstr "# internt disassemblerfel, okänd modifierare (%c)"
-#: mips-dis.c:1763
+#: mips-dis.c:1805
+#, c-format
msgid ""
"\n"
"The following MIPS specific disassembler options are supported for use\n"
@@ -476,7 +484,8 @@
"Följande MIPS-specifika disassembleralternativ stöds för användning\n"
"tillsammans med flaggan -M (flera alternativ kan skiljas åt med komman):\n"
-#: mips-dis.c:1767
+#: mips-dis.c:1809
+#, c-format
msgid ""
"\n"
" gpr-names=ABI Print GPR names according to specified ABI.\n"
@@ -487,7 +496,8 @@
" Standard: baserat på den binärfil som\n"
" disassembleras.\n"
-#: mips-dis.c:1771
+#: mips-dis.c:1813
+#, c-format
msgid ""
"\n"
" fpr-names=ABI Print FPR names according to specified ABI.\n"
@@ -497,7 +507,8 @@
" fpr-names=ABI Skriv ut FPR-namn enligt det angivna ABI:t.\n"
" Standard: numeriskt.\n"
-#: mips-dis.c:1775
+#: mips-dis.c:1817
+#, c-format
msgid ""
"\n"
" cp0-names=ARCH Print CP0 register names according to\n"
@@ -510,7 +521,8 @@
" Standard: baserat på den binärfil som\n"
" disassembleras.\n"
-#: mips-dis.c:1780
+#: mips-dis.c:1822
+#, c-format
msgid ""
"\n"
" hwr-names=ARCH Print HWR names according to specified \n"
@@ -523,7 +535,8 @@
" Standard: baserat på den binärfil som\n"
" disassembleras.\n"
-#: mips-dis.c:1785
+#: mips-dis.c:1827
+#, c-format
msgid ""
"\n"
" reg-names=ABI Print GPR and FPR names according to\n"
@@ -533,7 +546,8 @@
" reg-names=ABI Skriv ut GPR- och FPR-namn enligt det angivna\n"
" ABI:t.\n"
-#: mips-dis.c:1789
+#: mips-dis.c:1831
+#, c-format
msgid ""
"\n"
" reg-names=ARCH Print CP0 register and HWR names according to\n"
@@ -543,7 +557,8 @@
" reg-names=ARK Skriv ut CP0-register med HWR-namn enligt\n"
" angiven arkitektur.\n"
-#: mips-dis.c:1793
+#: mips-dis.c:1835
+#, c-format
msgid ""
"\n"
" For the options above, the following values are supported for \"ABI\":\n"
@@ -553,11 +568,13 @@
" För flaggorna ovan stöds följande värden på \"ABI\":\n"
" "
-#: mips-dis.c:1798 mips-dis.c:1806 mips-dis.c:1808
+#: mips-dis.c:1840 mips-dis.c:1848 mips-dis.c:1850
+#, c-format
msgid "\n"
msgstr "\n"
-#: mips-dis.c:1800
+#: mips-dis.c:1842
+#, c-format
msgid ""
"\n"
" For the options above, The following values are supported for \"ARCH\":\n"
@@ -593,86 +610,91 @@
#. * anyway!
#.
#: ns32k-dis.c:631
+#, c-format
msgid "$<undefined>"
msgstr "$<odefinierad>"
-#: ppc-opc.c:781 ppc-opc.c:809
+#: ppc-opc.c:794 ppc-opc.c:822
msgid "invalid conditional option"
msgstr "ogiltig villkorlig flagga"
-#: ppc-opc.c:811
+#: ppc-opc.c:824
msgid "attempt to set y bit when using + or - modifier"
msgstr "försök att ställa in y-biten då modifieraren + eller - användes"
-#: ppc-opc.c:840
+#: ppc-opc.c:852
msgid "offset not a multiple of 16"
msgstr "avståndet är inte en multipel av 16"
-#: ppc-opc.c:860
+#: ppc-opc.c:871
msgid "offset not a multiple of 2"
msgstr "avståndet är inte en multipel av 2"
-#: ppc-opc.c:862
+#: ppc-opc.c:873
msgid "offset greater than 62"
msgstr "avståndet är större än 62"
-#: ppc-opc.c:881 ppc-opc.c:927 ppc-opc.c:975
+#: ppc-opc.c:892 ppc-opc.c:937 ppc-opc.c:981
msgid "offset not a multiple of 4"
msgstr "avståndet är inte en multipel av 4"
-#: ppc-opc.c:883
+#: ppc-opc.c:894
msgid "offset greater than 124"
msgstr "avståndet är större än 124"
-#: ppc-opc.c:902
+#: ppc-opc.c:913
msgid "offset not a multiple of 8"
msgstr "avståndet är inte en multipel av 8"
-#: ppc-opc.c:904
+#: ppc-opc.c:915
msgid "offset greater than 248"
msgstr "avståndet är större än 248"
-#: ppc-opc.c:950
+#: ppc-opc.c:958
msgid "offset not between -2048 and 2047"
msgstr "avståndet är inte mellan -2048 och 2047"
-#: ppc-opc.c:973
+#: ppc-opc.c:979
msgid "offset not between -8192 and 8191"
msgstr "avståndet är inte mellan -8192 och 8191"
-#: ppc-opc.c:1011
+#: ppc-opc.c:1007
+msgid "invalid mask field"
+msgstr "ogiltigt maskfält"
+
+#: ppc-opc.c:1033
msgid "ignoring invalid mfcr mask"
msgstr "ignorerar ogiltig mfcr-mask"
-#: ppc-opc.c:1059
+#: ppc-opc.c:1075
msgid "ignoring least significant bits in branch offset"
msgstr "ignorerar minst signifikanta bitarna i grenavstånd"
-#: ppc-opc.c:1090 ppc-opc.c:1125
+#: ppc-opc.c:1105 ppc-opc.c:1140
msgid "illegal bitmask"
msgstr "otillåten bitmask"
-#: ppc-opc.c:1192
+#: ppc-opc.c:1205
msgid "value out of range"
msgstr "värdet är utanför intervallet"
-#: ppc-opc.c:1262
+#: ppc-opc.c:1273
msgid "index register in load range"
msgstr "indexregistret är i inläsningsintervallet"
-#: ppc-opc.c:1279
+#: ppc-opc.c:1289
msgid "source and target register operands must be different"
msgstr "käll- och målregisteroperander måste vara olika"
-#: ppc-opc.c:1294
+#: ppc-opc.c:1304
msgid "invalid register operand when updating"
msgstr "ogiltig registeroperand vid uppdatering"
-#: ppc-opc.c:1335
+#: ppc-opc.c:1343
msgid "target register operand must be even"
msgstr "målregisteroperand måste vara jämn"
-#: ppc-opc.c:1350
+#: ppc-opc.c:1357
msgid "source register operand must be even"
msgstr "källregisteroperand måste vara jämn"
@@ -696,12 +718,12 @@
msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
msgstr "Internt fel: felaktig sparc-opcode.h: \"%s\" == \"%s\"\n"
-#: v850-dis.c:221
+#: v850-dis.c:225
#, c-format
msgid "unknown operand shift: %x\n"
msgstr "okänt operandskifte: %x\n"
-#: v850-dis.c:233
+#: v850-dis.c:237
#, c-format
msgid "unknown pop reg: %d\n"
msgstr "okänt pop-register: %d\n"
@@ -711,47 +733,47 @@
#. v850_insert_operand() in gas/config/tc-v850.c. Error messages
#. containing the string 'out of range' will be ignored unless a
#. specific command line option is given to GAS.
-#: v850-opc.c:68
+#: v850-opc.c:69
msgid "displacement value is not in range and is not aligned"
msgstr "förskjutningsvärdet är inte inom intervallet och ligger inte på jämn gräns"
-#: v850-opc.c:69
+#: v850-opc.c:70
msgid "displacement value is out of range"
msgstr "förskjutningsvärdet är utanför intervallet"
-#: v850-opc.c:70
+#: v850-opc.c:71
msgid "displacement value is not aligned"
msgstr "förskjutningsvärdet ligger inte på jämn gräns"
-#: v850-opc.c:72
+#: v850-opc.c:73
msgid "immediate value is out of range"
msgstr "omedelbara värdet är utanför intervallet"
-#: v850-opc.c:83
+#: v850-opc.c:84
msgid "branch value not in range and to odd offset"
msgstr "grenvärdet är inte inom intervallet och till ett udda avstånd"
-#: v850-opc.c:85 v850-opc.c:117
+#: v850-opc.c:86 v850-opc.c:118
msgid "branch value out of range"
msgstr "grenvärdet är utanför intervallet"
-#: v850-opc.c:88 v850-opc.c:120
+#: v850-opc.c:89 v850-opc.c:121
msgid "branch to odd offset"
msgstr "grening till udda avstånd"
-#: v850-opc.c:115
+#: v850-opc.c:116
msgid "branch value not in range and to an odd offset"
msgstr "grenvärdet är inte inom intervallet och till ett udda avstånd"
-#: v850-opc.c:346
+#: v850-opc.c:347
msgid "invalid register for stack adjustment"
msgstr "ogiltigt register för stackjustering"
-#: v850-opc.c:370
+#: v850-opc.c:371
msgid "immediate value not in range and not even"
msgstr "omedelbara värdet är inte inom intervallet och inte jämnt"
-#: v850-opc.c:375
+#: v850-opc.c:376
msgid "immediate value must be even"
msgstr "omedelbara värdet måste vara jämnt"
Modified: branches/binutils/package/opcodes/po/vi.po
===================================================================
--- branches/binutils/package/opcodes/po/vi.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/po/vi.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -1,18 +1,20 @@
-# Vietnamese Translation for opcodes-2.15.96.
+# Vietnamese Translation for Opcodes.
# Copyright © 2005 Free Software Foundation, Inc.
# Clytie Siddall <clytie at riverland.net.au>, 2005.
#
msgid ""
msgstr ""
-"Project-Id-Version: opcodes 2.15.96\n"
+"Project-Id-Version: opcodes-2.15.96\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2005-03-05 20:32+1030\n"
-"PO-Revision-Date: 2005-05-04 21:52+0930\n"
+"PO-Revision-Date: 2006-04-05 15:14+0930\n"
"Last-Translator: Clytie Siddall <clytie at riverland.net.au>\n"
"Language-Team: Vietnamese <gnomevi-list at lists.sourceforge.net>\n"
"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=utf-8\n"
"Content-Transfer-Encoding: 8bit\n"
+"Plural-Forms: nplurals=1; plural=0\n"
+"X-Generator: LocFactoryEditor 1.6b36\n"
#: alpha-opc.c:331
msgid "branch operand unaligned"
@@ -24,7 +26,7 @@
#: arc-dis.c:76
msgid "Illegal limm reference in last instruction!\n"
-msgstr "Không cho phép tham chiếu loại limm trong câu lệnh cuối cùng.\n"
+msgstr "Không cho phép tham chiếu kiểu limm trong câu lệnh cuối cùng.\n"
#: arm-dis.c:1267
msgid "<illegal precision>"
@@ -65,7 +67,7 @@
#: avr-dis.c:227
#, c-format
msgid "unknown constraint `%c'"
-msgstr "không biết rà ng buộc `%c'"
+msgstr "không biết rà ng buộc « %c »"
#: cgen-asm.c:336 fr30-ibld.c:197 frv-ibld.c:197 ip2k-ibld.c:197
#: iq2000-ibld.c:197 m32r-ibld.c:197 openrisc-ibld.c:197 xstormy16-ibld.c:197
@@ -120,13 +122,13 @@
#: m32r-asm.c:569 openrisc-asm.c:483 xstormy16-asm.c:515
#, c-format
msgid "syntax error (expected char `%c', found `%c')"
-msgstr "gặp lỗi cú pháp (ngỠký tự `%c', còn tìm `%c')"
+msgstr "gặp lỗi cú pháp (ngỠký tự « %c », còn tìm « %c »)"
#: fr30-asm.c:564 frv-asm.c:1539 ip2k-asm.c:771 iq2000-asm.c:706
#: m32r-asm.c:579 openrisc-asm.c:493 xstormy16-asm.c:525
#, c-format
msgid "syntax error (expected char `%c', found end of instruction)"
-msgstr "gặp lỗi cú pháp (ngỠký tự `%c', còn tìm kết thức câu lệnh)"
+msgstr "gặp lỗi cú pháp (ngỠký tự « %c », còn tìm kết thức câu lệnh)"
#: fr30-asm.c:592 frv-asm.c:1567 ip2k-asm.c:799 iq2000-asm.c:734
#: m32r-asm.c:607 openrisc-asm.c:521 xstormy16-asm.c:553
@@ -142,19 +144,19 @@
#: m32r-asm.c:725 openrisc-asm.c:639 xstormy16-asm.c:671
#, c-format
msgid "bad instruction `%.50s...'"
-msgstr "câu lệnh sai `%.50s'"
+msgstr "câu lệnh sai « %.50s »"
#: fr30-asm.c:713 frv-asm.c:1688 ip2k-asm.c:920 iq2000-asm.c:855
#: m32r-asm.c:728 openrisc-asm.c:642 xstormy16-asm.c:674
#, c-format
msgid "bad instruction `%.50s'"
-msgstr "câu lệnh sai `%.50s'"
+msgstr "câu lệnh sai « %.50s »"
#. Default text to print if an instruction isn't recognized.
#: fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41 m32r-dis.c:41
#: mmix-dis.c:284 openrisc-dis.c:41 xstormy16-dis.c:41
msgid "*unknown*"
-msgstr "*không biết*"
+msgstr " • không rõ •"
#: fr30-dis.c:319 frv-dis.c:410 ip2k-dis.c:313 iq2000-dis.c:191 m32r-dis.c:262
#: openrisc-dis.c:137 xstormy16-dis.c:170
@@ -178,7 +180,7 @@
#: m32r-ibld.c:667 openrisc-ibld.c:635 xstormy16-ibld.c:680
#, c-format
msgid "Unrecognized field %d while building insn.\n"
-msgstr "Không chấp nháºn trÆ°á»ng %d trong khi xây dụng câu lệnh.\n"
+msgstr "Không chấp nháºn trÆ°á»ng %d trong khi xây dá»±ng câu lệnh.\n"
#: fr30-ibld.c:939 frv-ibld.c:1177 ip2k-ibld.c:686 iq2000-ibld.c:892
#: m32r-ibld.c:806 openrisc-ibld.c:737 xstormy16-ibld.c:828
@@ -190,25 +192,25 @@
#: m32r-ibld.c:922 openrisc-ibld.c:817 xstormy16-ibld.c:941
#, c-format
msgid "Unrecognized field %d while getting int operand.\n"
-msgstr "Không chấp nháºn trÆ°á»ng %d trong khi gá»i tác tá» số nguyên.\n"
+msgstr "Không chấp nháºn trÆ°á»ng %d trong khi lấy tác tá» số nguyên.\n"
#: fr30-ibld.c:1217 frv-ibld.c:1719 ip2k-ibld.c:820 iq2000-ibld.c:1140
#: m32r-ibld.c:1018 openrisc-ibld.c:877 xstormy16-ibld.c:1034
#, c-format
msgid "Unrecognized field %d while getting vma operand.\n"
-msgstr "Không chấp nháºn trÆ°á»ng %d trong khi gá»i tác tá» vma.\n"
+msgstr "Không chấp nháºn trÆ°á»ng %d trong khi lấy tác tá» vma.\n"
#: fr30-ibld.c:1351 frv-ibld.c:1989 ip2k-ibld.c:882 iq2000-ibld.c:1263
#: m32r-ibld.c:1122 openrisc-ibld.c:946 xstormy16-ibld.c:1136
#, c-format
msgid "Unrecognized field %d while setting int operand.\n"
-msgstr "Không chấp nháºn trÆ°á»ng %d trong khi láºp tác tá» số nguyên.\n"
+msgstr "Không chấp nháºn trÆ°á»ng %d trong khi đặt tác tá» số nguyên.\n"
#: fr30-ibld.c:1473 frv-ibld.c:2247 ip2k-ibld.c:932 iq2000-ibld.c:1374
#: m32r-ibld.c:1214 openrisc-ibld.c:1003 xstormy16-ibld.c:1226
#, c-format
msgid "Unrecognized field %d while setting vma operand.\n"
-msgstr "Không chấp nháºn trÆ°á»ng %d trong khi láºp tác tá» vma.\n"
+msgstr "Không chấp nháºn trÆ°á»ng %d trong khi đặt tác tá» vma.\n"
#: frv-asm.c:978
msgid "register number must be even"
@@ -227,13 +229,13 @@
#: h8500-dis.c:143
#, c-format
msgid "can't cope with insert %d\n"
-msgstr "không quản lý được Ä‘iá»u chèn %d\n"
+msgstr "không thể xá» lý Ä‘iá»u chèn %d\n"
#. Couldn't understand anything.
#: h8500-dis.c:342
#, c-format
msgid "%02x\t\t*unknown*"
-msgstr "°không biết*%02x\t\t"
+msgstr "%02x\t\t • không rõ •"
#: i386-dis.c:1733
msgid "<internal disassembler error>"
@@ -247,21 +249,21 @@
#: ia64-gen.c:310
#, c-format
msgid "%s: Warning: "
-msgstr "%s: Cảnh báo"
+msgstr "%s: Cảnh báo : "
#: ia64-gen.c:496 ia64-gen.c:730
#, c-format
msgid "multiple note %s not handled\n"
-msgstr "không quản lý được Ä‘a chú thÃch %s\n"
+msgstr "không xá» lý được Ä‘a chú thÃch %s\n"
#: ia64-gen.c:607
msgid "can't find ia64-ic.tbl for reading\n"
-msgstr "không tìm được ia64-ic.tbl để Ä‘á»c\n"
+msgstr "không tìm thấy ia64-ic.tbl để Ä‘á»c\n"
#: ia64-gen.c:812
#, c-format
msgid "can't find %s for reading\n"
-msgstr "không tìm được %s để Ä‘á»c\n"
+msgstr "không tìm thấy %s để Ä‘á»c\n"
#: ia64-gen.c:1036
#, c-format
@@ -269,18 +271,18 @@
"most recent format '%s'\n"
"appears more restrictive than '%s'\n"
msgstr ""
-"hình như dạng thức gần đây nhất '%s'\n"
-"giới hạn hơn '%s'\n"
+"dạng thức gần đây nhất « %s »\n"
+"có vẻ hạn hẹp hơn « %s »\n"
#: ia64-gen.c:1047
#, c-format
msgid "overlapping field %s->%s\n"
-msgstr "trÆ°á»ng chồng lấp %s->%s\n"
+msgstr "trÆ°á»ng chồng lấp %s → %s\n"
#: ia64-gen.c:1244
#, c-format
msgid "overwriting note %d with note %d (IC:%s)\n"
-msgstr "Ä‘ang ghi Ä‘á» chú thÃch %d vá»›i chú thÃch %d (IC:%s)\n"
+msgstr "Ä‘ang ghi đè chú thÃch %d bằng chú thÃch %d (IC:%s)\n"
#: ia64-gen.c:1443
#, c-format
@@ -320,7 +322,7 @@
#: ia64-gen.c:1541
#, c-format
msgid "Warning: rsrc %s (%s) has no chks%s\n"
-msgstr "Cảnh báo: tà i nguyên %s (%s) không có cản trở %s\n"
+msgstr "Cảnh báo : tà i nguyên %s (%s) không có cản trở %s\n"
#: ia64-gen.c:1545
#, c-format
@@ -345,7 +347,7 @@
#: ia64-gen.c:2816
#, c-format
msgid "unable to change directory to \"%s\", errno = %s\n"
-msgstr "không thay đổi được thư mục thà nh \"%s\", số lỗi = %s\n"
+msgstr "không thể chuyển đổi thư mục thà nh « %s », số lỗi = %s\n"
#. We've been passed a w. Return with an error message so that
#. cgen will try the next parsing option.
@@ -356,7 +358,7 @@
#. Invalid offset present.
#: ip2k-asm.c:117
msgid "offset(IP) is not a valid form"
-msgstr "offset(IP) (hiệu số) không là dạng hợp lệ"
+msgstr "offset(IP) (hiệu số) không phải là dạng hợp lệ"
#. Found something there in front of (DP) but it's out
#. of range.
@@ -381,15 +383,15 @@
#. Something is very wrong. opindex has to be one of the above.
#: ip2k-asm.c:254
msgid "parse_addr16: invalid opindex."
-msgstr "parse_addr16: (địa chỉ phân tách) opindex (chỉ mục loại tác tá») không hợp lệ."
+msgstr "parse_addr16: (địa chỉ phân tách) opindex (chỉ mục kiểu tác tá») không hợp lệ."
#: ip2k-asm.c:309
msgid "Byte address required. - must be even."
-msgstr "Cần đến địa chỉ byte - phải là số chẵn."
+msgstr "Cần đến địa chỉ byte — phải là số chẵn."
#: ip2k-asm.c:318
msgid "cgen_parse_address returned a symbol. Literal required."
-msgstr "cgen_parse_address (địa chỉ phân tách cgen) đã gá»i má»™t ký hiệu: còn cần đến hằng mã nguồn."
+msgstr "cgen_parse_address (địa chỉ phân tách cgen) đã trả gởi má»™t ký hiệu: còn cần đến Ä‘iá»u nghÄ©a chữ."
#: ip2k-asm.c:376
#, fuzzy, c-format
@@ -415,22 +417,22 @@
#: iq2000-asm.c:210 iq2000-asm.c:240 iq2000-asm.c:277 iq2000-asm.c:310
#: openrisc-asm.c:90 openrisc-asm.c:144
msgid "missing `)'"
-msgstr "thiếu `)'"
+msgstr "thiếu dấu ngoặc đóng « ) »"
#: m10200-dis.c:199
#, c-format
msgid "unknown\t0x%02x"
-msgstr "không biết\t0x%02x"
+msgstr "\t0x%02x không rõ"
#: m10200-dis.c:339
#, c-format
msgid "unknown\t0x%04lx"
-msgstr "không biết\t0x%04lx"
+msgstr "\t0x%04lx không rõ"
#: m10300-dis.c:767
#, c-format
msgid "unknown\t0x%04x"
-msgstr "không biết\t0x%04x"
+msgstr "\t0x%04x không rõ"
#: m68k-dis.c:295
#, c-format
@@ -552,7 +554,7 @@
" "
msgstr ""
"\n"
-" Vá»›i những tùy chá»n ở trên, há»— trợ những giá trị theo đây cho \"ABI\":\n"
+" Vá»›i những tùy chá»n ở trên, há»— trợ những giá trị theo đây cho « ABI »:\n"
" "
#: mips-dis.c:1840 mips-dis.c:1848 mips-dis.c:1850
@@ -568,27 +570,27 @@
" "
msgstr ""
"\n"
-" Vá»›i những tùy chá»n ở trên, há»— trợ những giá trị theo đây cho \"ARCH\":\n"
+" Vá»›i những tùy chá»n ở trên, há»— trợ những giá trị theo đây cho « ARCH »:\n"
" "
#: mmix-dis.c:34
#, c-format
msgid "Bad case %d (%s) in %s:%d\n"
-msgstr "TrÆ°á»ng hợp sai %d (%s) trong %s:%d\n"
+msgstr "Chữ hoa/thÆ°á»ng sai %d (%s) trong %s:%d\n"
#: mmix-dis.c:44
#, c-format
msgid "Internal: Non-debugged code (test-case missing): %s:%d"
-msgstr "Ná»™i bá»™: chÆ°a gỡ lá»—i mã (thiếu trÆ°á»ng hợp thá»): %s:%d"
+msgstr "Ná»™i bá»™ : chÆ°a gỡ lá»—i mã (thiếu trÆ°á»ng hợp thá»): %s:%d"
#: mmix-dis.c:53
msgid "(unknown)"
-msgstr "(không biết)"
+msgstr "(không rõ)"
#: mmix-dis.c:519
#, c-format
msgid "*unknown operands type: %d*"
-msgstr "*không biết loại tác tá»: %d*"
+msgstr "• không biết kiểu tác tá»: %d •"
#. I and Z are output operands and can`t be immediate
#. * A is an address and we can`t have the address of
@@ -603,11 +605,11 @@
#: ppc-opc.c:794 ppc-opc.c:822
msgid "invalid conditional option"
-msgstr "tùy chá»n thuá»™c Ä‘iá»u kiện không hợp lệ"
+msgstr "tùy chá»n Ä‘iá»u kiện không hợp lệ"
#: ppc-opc.c:824
msgid "attempt to set y bit when using + or - modifier"
-msgstr "cố láºp «bit y» khi sá» dụng Ä‘iá»u sá»a đổi + hay -"
+msgstr "cố láºp « bit y » khi sá» dụng Ä‘iá»u sá»a đổi + hay -"
#: ppc-opc.c:852
msgid "offset not a multiple of 16"
@@ -663,15 +665,15 @@
#: ppc-opc.c:1205
msgid "value out of range"
-msgstr "giá trị cà nh ở ngoại phạm vị"
+msgstr "giá trị ở ngoại phạm vị"
#: ppc-opc.c:1273
msgid "index register in load range"
-msgstr "thanh ghi cơ số trong phạm vị nạp"
+msgstr "thanh ghi cơ số trong phạm vị tải"
#: ppc-opc.c:1289
msgid "source and target register operands must be different"
-msgstr "tác tá» thanh ghi cả hai loại nguồn và đÃch Ä‘á»u phải là khác nhau"
+msgstr "tác tá» thanh ghi kiểu cả nguồn lẫn Ä‘Ãch Ä‘á»u phải là khác nhau"
#: ppc-opc.c:1304
msgid "invalid register operand when updating"
@@ -688,27 +690,27 @@
#. Mark as non-valid instruction.
#: sparc-dis.c:760
msgid "unknown"
-msgstr "không biết"
+msgstr "không rõ"
#: sparc-dis.c:835
#, c-format
msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
-msgstr "Lá»—i ná»™i bá»™: sparc-opcode.h sai: \"%s\", %#.8lx, %#.8lx\n"
+msgstr "Lỗi nội bộ : sparc-opcode.h sai: « %s », %#.8lx, %#.8lx\n"
#: sparc-dis.c:846
#, c-format
msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
-msgstr "Lá»—i ná»™i bá»™: sparc-opcode.h sai: \"%s\", %#.8lx, %#.8lx\n"
+msgstr "Lỗi nội bộ : sparc-opcode.h sai: « %s », %#.8lx, %#.8lx\n"
#: sparc-dis.c:895
#, c-format
msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
-msgstr "Lá»—i ná»™i bá»™: sparc-opcode.h sai: \"%s\" == \"%s\"\n"
+msgstr "Lỗi nội bộ : sparc-opcode.h sai: « %s » == \"%s\"\n"
#: v850-dis.c:225
#, c-format
msgid "unknown operand shift: %x\n"
-msgstr "không biết phÃm shift (bên trái hay bên phải) của tác tá»: %x\n"
+msgstr "không biết cách dịch tác tá»: %x\n"
#: v850-dis.c:237
#, c-format
@@ -722,7 +724,7 @@
#. specific command line option is given to GAS.
#: v850-opc.c:69
msgid "displacement value is not in range and is not aligned"
-msgstr "giá trị di chuyển ở ngoại phạm vị và chưa canh lỠnó"
+msgstr "giá trị di chuyển ở ngoại phạm vị và chÆ°a được canh lá»"
#: v850-opc.c:70
msgid "displacement value is out of range"
@@ -738,7 +740,7 @@
#: v850-opc.c:84
msgid "branch value not in range and to odd offset"
-msgstr "giá trị cà nh ở ngoại phạm vị và với hiệu số lẻ"
+msgstr "giá trị cà nh ở ngoại phạm vị và đối với hiệu số lẻ"
#: v850-opc.c:86 v850-opc.c:118
msgid "branch value out of range"
@@ -746,11 +748,11 @@
#: v850-opc.c:89 v850-opc.c:121
msgid "branch to odd offset"
-msgstr "nhánh với hiệu số lẻ"
+msgstr "nhánh đối với hiệu số lẻ"
#: v850-opc.c:116
msgid "branch value not in range and to an odd offset"
-msgstr "giá trị nhánh ở ngoại phạm vị và với hiệu số lẻ"
+msgstr "giá trị nhánh ở ngoại phạm vị và đối với hiệu số lẻ"
#: v850-opc.c:347
msgid "invalid register for stack adjustment"
@@ -766,11 +768,11 @@
#: xstormy16-asm.c:76
msgid "Bad register in preincrement"
-msgstr "Thanh ghi sai trong Ä‘iá»u trÆ°á»›c lượng gia"
+msgstr "Thanh ghi sai trong tiá»n lượng gia"
#: xstormy16-asm.c:81
msgid "Bad register in postincrement"
-msgstr "Thanh ghi sai trong Ä‘iá»u sau lượng gia"
+msgstr "Thanh ghi sai trong háºu lượng gia"
#: xstormy16-asm.c:83
msgid "Bad register name"
@@ -782,7 +784,7 @@
#: xstormy16-asm.c:91
msgid "Label conflicts with `Rx'"
-msgstr "Nhãn xung đột với `Rx'"
+msgstr "Nhãn xung đột với « Rx »"
#: xstormy16-asm.c:93
msgid "Bad immediate expression"
@@ -802,4 +804,4 @@
#: xstormy16-asm.c:172
msgid "Syntax error: No trailing ')'"
-msgstr "Lỗi cú pháp: không có ')' đi theo"
+msgstr "Lỗi cú pháp: không có dấu ngoặc đóng « ) » đi theo"
Added: branches/binutils/package/opcodes/po/zh_CN.po
===================================================================
--- branches/binutils/package/opcodes/po/zh_CN.po 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/po/zh_CN.po 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,799 @@
+# Simplified Chinese translation for opcode.
+# Copyright (C) 2005 Free Software Foundation, Inc.
+# This file is distributed under the same license as the binutils package.
+# Meng Jie <zuxyhere at eastday.com>, 2005.
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: opcodes 2.15.96\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2005-03-05 20:32+1030\n"
+"PO-Revision-Date: 2006-01-15 02:10+0800\n"
+"Last-Translator: Meng Jie <zuxyhere at eastday.com>\n"
+"Language-Team: Chinese (simplified) <i18n-translation at lists.linux.net.cn>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=utf-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: alpha-opc.c:331
+msgid "branch operand unaligned"
+msgstr "分支æ“作数未对é½"
+
+#: alpha-opc.c:353 alpha-opc.c:374
+msgid "jump hint unaligned"
+msgstr "跳转æ示未对é½"
+
+#: arc-dis.c:76
+msgid "Illegal limm reference in last instruction!\n"
+msgstr ""
+
+#: arm-dis.c:1267
+msgid "<illegal precision>"
+msgstr "<éžæ³•çš„精度>"
+
+#. XXX - should break 'option' at following delimiter.
+#: arm-dis.c:1912
+#, c-format
+msgid "Unrecognised register name set: %s\n"
+msgstr "æ— æ³•è¯†åˆ«çš„å¯„å˜å™¨å称集：%s\n"
+
+#. XXX - should break 'option' at following delimiter.
+#: arm-dis.c:1920
+#, c-format
+msgid "Unrecognised disassembler option: %s\n"
+msgstr "æ— æ³•è¯†åˆ«çš„å汇编器选项：%s\n"
+
+#: arm-dis.c:2093
+#, c-format
+msgid ""
+"\n"
+"The following ARM specific disassembler options are supported for use with\n"
+"the -M switch:\n"
+msgstr ""
+"\n"
+"下列 ARM 特定的å汇编器选项在使用 -M 开关时å¯ç”¨ï¼š\n"
+
+#: avr-dis.c:112 avr-dis.c:122
+#, c-format
+msgid "undefined"
+msgstr "未定义"
+
+#: avr-dis.c:179
+#, c-format
+msgid "Internal disassembler error"
+msgstr "å汇编器内部错误"
+
+#: avr-dis.c:227
+#, c-format
+msgid "unknown constraint `%c'"
+msgstr "未知的约æŸâ€˜%c’"
+
+#: cgen-asm.c:336 fr30-ibld.c:197 frv-ibld.c:197 ip2k-ibld.c:197
+#: iq2000-ibld.c:197 m32r-ibld.c:197 openrisc-ibld.c:197 xstormy16-ibld.c:197
+#, c-format
+msgid "operand out of range (%ld not between %ld and %ld)"
+msgstr "æ“作数越界(%ld ä¸åœ¨ %ld å’Œ %ld 之间)"
+
+#: cgen-asm.c:358
+#, c-format
+msgid "operand out of range (%lu not between %lu and %lu)"
+msgstr "æ“作数越界(%lu ä¸åœ¨ %lu å’Œ %lu 之间)"
+
+#: d30v-dis.c:312
+#, c-format
+msgid "<unknown register %d>"
+msgstr "<未知的寄å˜å™¨ %d>"
+
+#. Can't happen.
+#: dis-buf.c:57
+#, c-format
+msgid "Unknown error %d\n"
+msgstr "未知错误 %d\n"
+
+#: dis-buf.c:66
+#, c-format
+msgid "Address 0x%s is out of bounds.\n"
+msgstr "åœ°å€ 0x%s 越界。\n"
+
+#: fr30-asm.c:323 frv-asm.c:1298 ip2k-asm.c:530 iq2000-asm.c:465
+#: m32r-asm.c:338 openrisc-asm.c:252 xstormy16-asm.c:284
+#, fuzzy, c-format
+msgid "Unrecognized field %d while parsing.\n"
+msgstr "è¯æ³•åˆ†æžå—段时出错\n"
+
+#: fr30-asm.c:372 frv-asm.c:1347 ip2k-asm.c:579 iq2000-asm.c:514
+#: m32r-asm.c:387 openrisc-asm.c:301 xstormy16-asm.c:333
+msgid "missing mnemonic in syntax string"
+msgstr "è¯æ³•å—符串ä¸æ²¡æœ‰åŠ©è®°ç¬¦"
+
+#. We couldn't parse it.
+#: fr30-asm.c:507 fr30-asm.c:511 fr30-asm.c:598 fr30-asm.c:699 frv-asm.c:1482
+#: frv-asm.c:1486 frv-asm.c:1573 frv-asm.c:1674 ip2k-asm.c:714 ip2k-asm.c:718
+#: ip2k-asm.c:805 ip2k-asm.c:906 iq2000-asm.c:649 iq2000-asm.c:653
+#: iq2000-asm.c:740 iq2000-asm.c:841 m32r-asm.c:522 m32r-asm.c:526
+#: m32r-asm.c:613 m32r-asm.c:714 openrisc-asm.c:436 openrisc-asm.c:440
+#: openrisc-asm.c:527 openrisc-asm.c:628 xstormy16-asm.c:468
+#: xstormy16-asm.c:472 xstormy16-asm.c:559 xstormy16-asm.c:660
+msgid "unrecognized instruction"
+msgstr "æ— æ³•è¯†åˆ«çš„æŒ‡ä»¤"
+
+#: fr30-asm.c:554 frv-asm.c:1529 ip2k-asm.c:761 iq2000-asm.c:696
+#: m32r-asm.c:569 openrisc-asm.c:483 xstormy16-asm.c:515
+#, c-format
+msgid "syntax error (expected char `%c', found `%c')"
+msgstr "è¯æ³•é”™è¯¯(需è¦å—符‘%c’，得到‘%c’)"
+
+#: fr30-asm.c:564 frv-asm.c:1539 ip2k-asm.c:771 iq2000-asm.c:706
+#: m32r-asm.c:579 openrisc-asm.c:493 xstormy16-asm.c:525
+#, c-format
+msgid "syntax error (expected char `%c', found end of instruction)"
+msgstr "è¯æ³•é”™è¯¯(需è¦å—符‘%c’，å´åˆ°è¾¾æŒ‡ä»¤å°¾)"
+
+#: fr30-asm.c:592 frv-asm.c:1567 ip2k-asm.c:799 iq2000-asm.c:734
+#: m32r-asm.c:607 openrisc-asm.c:521 xstormy16-asm.c:553
+msgid "junk at end of line"
+msgstr "行尾有垃圾å—符"
+
+#: fr30-asm.c:698 frv-asm.c:1673 ip2k-asm.c:905 iq2000-asm.c:840
+#: m32r-asm.c:713 openrisc-asm.c:627 xstormy16-asm.c:659
+msgid "unrecognized form of instruction"
+msgstr "æ— æ³•è¯†åˆ«çš„æŒ‡ä»¤æ ¼å¼"
+
+#: fr30-asm.c:710 frv-asm.c:1685 ip2k-asm.c:917 iq2000-asm.c:852
+#: m32r-asm.c:725 openrisc-asm.c:639 xstormy16-asm.c:671
+#, c-format
+msgid "bad instruction `%.50s...'"
+msgstr "错误的指令‘%.50s...’"
+
+#: fr30-asm.c:713 frv-asm.c:1688 ip2k-asm.c:920 iq2000-asm.c:855
+#: m32r-asm.c:728 openrisc-asm.c:642 xstormy16-asm.c:674
+#, c-format
+msgid "bad instruction `%.50s'"
+msgstr "错误的指令‘%.50s’"
+
+#. Default text to print if an instruction isn't recognized.
+#: fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41 m32r-dis.c:41
+#: mmix-dis.c:284 openrisc-dis.c:41 xstormy16-dis.c:41
+msgid "*unknown*"
+msgstr "*未知*"
+
+#: fr30-dis.c:319 frv-dis.c:410 ip2k-dis.c:313 iq2000-dis.c:191 m32r-dis.c:262
+#: openrisc-dis.c:137 xstormy16-dis.c:170
+#, c-format
+msgid "Unrecognized field %d while printing insn.\n"
+msgstr ""
+
+#: fr30-ibld.c:168 frv-ibld.c:168 ip2k-ibld.c:168 iq2000-ibld.c:168
+#: m32r-ibld.c:168 openrisc-ibld.c:168 xstormy16-ibld.c:168
+#, c-format
+msgid "operand out of range (%ld not between %ld and %lu)"
+msgstr "æ“作数越界(%ld ä¸åœ¨ %ld å’Œ %lu 之间)"
+
+#: fr30-ibld.c:181 frv-ibld.c:181 ip2k-ibld.c:181 iq2000-ibld.c:181
+#: m32r-ibld.c:181 openrisc-ibld.c:181 xstormy16-ibld.c:181
+#, c-format
+msgid "operand out of range (%lu not between 0 and %lu)"
+msgstr "æ“作数越界(%lu ä¸åœ¨ 0 å’Œ %lu 之间)"
+
+#: fr30-ibld.c:732 frv-ibld.c:858 ip2k-ibld.c:609 iq2000-ibld.c:715
+#: m32r-ibld.c:667 openrisc-ibld.c:635 xstormy16-ibld.c:680
+#, c-format
+msgid "Unrecognized field %d while building insn.\n"
+msgstr ""
+
+#: fr30-ibld.c:939 frv-ibld.c:1177 ip2k-ibld.c:686 iq2000-ibld.c:892
+#: m32r-ibld.c:806 openrisc-ibld.c:737 xstormy16-ibld.c:828
+#, c-format
+msgid "Unrecognized field %d while decoding insn.\n"
+msgstr ""
+
+#: fr30-ibld.c:1088 frv-ibld.c:1458 ip2k-ibld.c:763 iq2000-ibld.c:1026
+#: m32r-ibld.c:922 openrisc-ibld.c:817 xstormy16-ibld.c:941
+#, c-format
+msgid "Unrecognized field %d while getting int operand.\n"
+msgstr ""
+
+#: fr30-ibld.c:1217 frv-ibld.c:1719 ip2k-ibld.c:820 iq2000-ibld.c:1140
+#: m32r-ibld.c:1018 openrisc-ibld.c:877 xstormy16-ibld.c:1034
+#, c-format
+msgid "Unrecognized field %d while getting vma operand.\n"
+msgstr ""
+
+#: fr30-ibld.c:1351 frv-ibld.c:1989 ip2k-ibld.c:882 iq2000-ibld.c:1263
+#: m32r-ibld.c:1122 openrisc-ibld.c:946 xstormy16-ibld.c:1136
+#, c-format
+msgid "Unrecognized field %d while setting int operand.\n"
+msgstr ""
+
+#: fr30-ibld.c:1473 frv-ibld.c:2247 ip2k-ibld.c:932 iq2000-ibld.c:1374
+#: m32r-ibld.c:1214 openrisc-ibld.c:1003 xstormy16-ibld.c:1226
+#, c-format
+msgid "Unrecognized field %d while setting vma operand.\n"
+msgstr ""
+
+#: frv-asm.c:978
+msgid "register number must be even"
+msgstr "寄å˜å™¨æ•°å¿…须是å¶æ•°"
+
+#: h8300-dis.c:358
+#, c-format
+msgid "Hmmmm 0x%x"
+msgstr "Hmmmm 0x%x"
+
+#: h8300-dis.c:744
+#, fuzzy, c-format
+msgid "Don't understand 0x%x \n"
+msgstr "ä¸ç†è§£ç±»åž‹â€œ%sâ€\n"
+
+#: h8500-dis.c:143
+#, fuzzy, c-format
+msgid "can't cope with insert %d\n"
+msgstr "用下列通é…符æ’入文件(&M)："
+
+#. Couldn't understand anything.
+#: h8500-dis.c:342
+#, c-format
+msgid "%02x\t\t*unknown*"
+msgstr "%02x\t\t*未知*"
+
+#: i386-dis.c:1733
+msgid "<internal disassembler error>"
+msgstr "<å汇编器内部错误>"
+
+#: ia64-gen.c:297
+#, c-format
+msgid "%s: Error: "
+msgstr "%s：错误："
+
+#: ia64-gen.c:310
+#, c-format
+msgid "%s: Warning: "
+msgstr "%s：è¦å‘Šï¼š"
+
+#: ia64-gen.c:496 ia64-gen.c:730
+#, fuzzy, c-format
+msgid "multiple note %s not handled\n"
+msgstr "æœªå¤„ç† move 指令"
+
+#: ia64-gen.c:607
+msgid "can't find ia64-ic.tbl for reading\n"
+msgstr ""
+
+#: ia64-gen.c:812
+#, fuzzy, c-format
+msgid "can't find %s for reading\n"
+msgstr "æ— æ³•æ‰“å¼€ %1 进行读å–"
+
+#: ia64-gen.c:1036
+#, c-format
+msgid ""
+"most recent format '%s'\n"
+"appears more restrictive than '%s'\n"
+msgstr ""
+
+#: ia64-gen.c:1047
+#, fuzzy, c-format
+msgid "overlapping field %s->%s\n"
+msgstr "域宽"
+
+#: ia64-gen.c:1244
+#, c-format
+msgid "overwriting note %d with note %d (IC:%s)\n"
+msgstr ""
+
+#: ia64-gen.c:1443
+#, c-format
+msgid "don't know how to specify %% dependency %s\n"
+msgstr "ä¸çŸ¥é“如何指定 %% ä¾èµ– %s\n"
+
+#: ia64-gen.c:1465
+#, c-format
+msgid "Don't know how to specify # dependency %s\n"
+msgstr "ä¸çŸ¥é“如何指定 # ä¾èµ– %s\n"
+
+#: ia64-gen.c:1504
+#, c-format
+msgid "IC:%s [%s] has no terminals or sub-classes\n"
+msgstr ""
+
+#: ia64-gen.c:1507
+#, c-format
+msgid "IC:%s has no terminals or sub-classes\n"
+msgstr ""
+
+#: ia64-gen.c:1516
+#, c-format
+msgid "no insns mapped directly to terminal IC %s [%s]"
+msgstr ""
+
+#: ia64-gen.c:1519
+#, c-format
+msgid "no insns mapped directly to terminal IC %s\n"
+msgstr ""
+
+#: ia64-gen.c:1530
+#, c-format
+msgid "class %s is defined but not used\n"
+msgstr ""
+
+#: ia64-gen.c:1541
+#, c-format
+msgid "Warning: rsrc %s (%s) has no chks%s\n"
+msgstr ""
+
+#: ia64-gen.c:1545
+#, fuzzy, c-format
+msgid "rsrc %s (%s) has no regs\n"
+msgstr "指数部分没有数å—"
+
+#: ia64-gen.c:2444
+#, c-format
+msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
+msgstr ""
+
+#: ia64-gen.c:2472
+#, c-format
+msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
+msgstr ""
+
+#: ia64-gen.c:2486
+#, fuzzy, c-format
+msgid "opcode %s has no class (ops %d %d %d)\n"
+msgstr "尚未定义å为“%sâ€çš„ <draw_ops>"
+
+#: ia64-gen.c:2816
+#, c-format
+msgid "unable to change directory to \"%s\", errno = %s\n"
+msgstr "æ— æ³•å°†å½“å‰ç›®å½•åˆ‡æ¢è‡³â€œ%sâ€ï¼Œerrno = %s\n"
+
+#. We've been passed a w. Return with an error message so that
+#. cgen will try the next parsing option.
+#: ip2k-asm.c:92
+msgid "W keyword invalid in FR operand slot."
+msgstr ""
+
+#. Invalid offset present.
+#: ip2k-asm.c:117
+msgid "offset(IP) is not a valid form"
+msgstr ""
+
+#. Found something there in front of (DP) but it's out
+#. of range.
+#: ip2k-asm.c:165
+msgid "(DP) offset out of range."
+msgstr "(DP) å移é‡è¶Šç•Œ"
+
+#. Found something there in front of (SP) but it's out
+#. of range.
+#: ip2k-asm.c:206
+msgid "(SP) offset out of range."
+msgstr "(SP) å移é‡è¶Šç•Œã€‚"
+
+#: ip2k-asm.c:222
+msgid "illegal use of parentheses"
+msgstr "括å·çš„使用éžæ³•"
+
+#: ip2k-asm.c:229
+#, fuzzy
+msgid "operand out of range (not between 1 and 255)"
+msgstr "æ“作数越界(%lu ä¸åœ¨ 0 å’Œ %lu 之间)"
+
+#. Something is very wrong. opindex has to be one of the above.
+#: ip2k-asm.c:254
+#, fuzzy
+msgid "parse_addr16: invalid opindex."
+msgstr "分æžé”™è¯¯ï¼šéžæ³• UTF-8 åºåˆ—"
+
+#: ip2k-asm.c:309
+msgid "Byte address required. - must be even."
+msgstr ""
+
+#: ip2k-asm.c:318
+msgid "cgen_parse_address returned a symbol. Literal required."
+msgstr ""
+
+#: ip2k-asm.c:376
+#, fuzzy, c-format
+msgid "%operator operand is not a symbol"
+msgstr "使用寄å˜å™¨æ ˆä¼ 递å‚数和返回值"
+
+#: ip2k-asm.c:430
+msgid "Attempt to find bit index of 0"
+msgstr ""
+
+#: iq2000-asm.c:115 iq2000-asm.c:146
+msgid "immediate value cannot be register"
+msgstr "ç«‹å³æ•°ä¸èƒ½æ˜¯å¯„å˜å™¨"
+
+#: iq2000-asm.c:126 iq2000-asm.c:156
+msgid "immediate value out of range"
+msgstr "ç«‹å³æ•°è¶Šç•Œ"
+
+#: iq2000-asm.c:185
+msgid "21-bit offset out of range"
+msgstr "21ä½é•¿çš„å移é‡è¶Šç•Œ"
+
+#: iq2000-asm.c:210 iq2000-asm.c:240 iq2000-asm.c:277 iq2000-asm.c:310
+#: openrisc-asm.c:90 openrisc-asm.c:144
+msgid "missing `)'"
+msgstr "缺少‘)’"
+
+#: m10200-dis.c:199
+#, c-format
+msgid "unknown\t0x%02x"
+msgstr "未知\t0x%02x"
+
+#: m10200-dis.c:339
+#, c-format
+msgid "unknown\t0x%04lx"
+msgstr "未知\t0x%04lx"
+
+#: m10300-dis.c:767
+#, c-format
+msgid "unknown\t0x%04x"
+msgstr "未知\t0x%04x"
+
+#: m68k-dis.c:295
+#, c-format
+msgid "<internal error in opcode table: %s %s>\n"
+msgstr "<æ“作数表ä¸å‡ºçŽ°å†…部错误：%s %s>\n"
+
+#: m68k-dis.c:1089
+#, c-format
+msgid "<function code %d>"
+msgstr "<函数代ç %d>"
+
+#: m88k-dis.c:746
+#, fuzzy, c-format
+msgid "# <dis error: %08x>"
+msgstr "è¯æ³•é”™è¯¯ï¼Œéžé¢„期的 %s"
+
+#: mips-dis.c:720
+msgid "# internal error, incomplete extension sequence (+)"
+msgstr ""
+
+#: mips-dis.c:779
+#, c-format
+msgid "# internal error, undefined extension sequence (+%c)"
+msgstr ""
+
+#: mips-dis.c:1037
+#, c-format
+msgid "# internal error, undefined modifier(%c)"
+msgstr "# 内部错误，未定义的修饰符(%c)"
+
+#: mips-dis.c:1793
+#, c-format
+msgid "# internal disassembler error, unrecognised modifier (%c)"
+msgstr ""
+
+#: mips-dis.c:1805
+#, c-format
+msgid ""
+"\n"
+"The following MIPS specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
+msgstr ""
+
+#: mips-dis.c:1809
+#, c-format
+msgid ""
+"\n"
+" gpr-names=ABI Print GPR names according to specified ABI.\n"
+" Default: based on binary being disassembled.\n"
+msgstr ""
+"\n"
+" gpr-names=ABI æ ¹æ®æŒ‡å®šçš„ ABI 打å°é€šç”¨å¯„å˜å™¨å。\n"
+" é»˜è®¤ï¼šæ ¹æ®è¢«å汇编的二进制文件。\n"
+
+#: mips-dis.c:1813
+#, c-format
+msgid ""
+"\n"
+" fpr-names=ABI Print FPR names according to specified ABI.\n"
+" Default: numeric.\n"
+msgstr ""
+"\n"
+" fpr-names=ABI æ ¹æ®æŒ‡å®šçš„ ABI 打å°æµ®ç‚¹å¯„å˜å™¨å。\n"
+" 默认：数å—。\n"
+
+#: mips-dis.c:1817
+#, c-format
+msgid ""
+"\n"
+" cp0-names=ARCH Print CP0 register names according to\n"
+" specified architecture.\n"
+" Default: based on binary being disassembled.\n"
+msgstr ""
+"\n"
+" cp0-names=ARCH æ ¹æ®æŒ‡å®šçš„æž¶æž„æ‰“å° CP0 寄å˜å™¨å。\n"
+" é»˜è®¤ï¼šæ ¹æ®è¢«å汇编的二进制代ç 。\n"
+
+#: mips-dis.c:1822
+#, c-format
+msgid ""
+"\n"
+" hwr-names=ARCH Print HWR names according to specified \n"
+"\t\t\t architecture.\n"
+" Default: based on binary being disassembled.\n"
+msgstr ""
+"\n"
+" hwr-names=ARCH æ ¹æ®æŒ‡å®šçš„æž¶æž„æ‰“å° HWR 寄å˜å™¨å。\n"
+" é»˜è®¤ï¼šæ ¹æ®è¢«å汇编的二进制代ç 。\n"
+
+#: mips-dis.c:1827
+#, c-format
+msgid ""
+"\n"
+" reg-names=ABI Print GPR and FPR names according to\n"
+" specified ABI.\n"
+msgstr ""
+"\n"
+" reg-names=ABI æ ¹æ®æŒ‡å®šçš„ ABI 打å°é€šç”¨å¯„å˜å™¨å’Œæµ®ç‚¹å¯„å˜\n"
+" 器å。\n"
+
+#: mips-dis.c:1831
+#, c-format
+msgid ""
+"\n"
+" reg-names=ARCH Print CP0 register and HWR names according to\n"
+" specified architecture.\n"
+msgstr ""
+"\n"
+" reg-names=ARCH æ ¹æ®æŒ‡å®šçš„æž¶æž„æ‰“å° CP0 å’Œ HWR 寄å˜å™¨å。\n"
+
+#: mips-dis.c:1835
+#, c-format
+msgid ""
+"\n"
+" For the options above, the following values are supported for \"ABI\":\n"
+" "
+msgstr ""
+
+#: mips-dis.c:1840 mips-dis.c:1848 mips-dis.c:1850
+#, c-format
+msgid "\n"
+msgstr "\n"
+
+#: mips-dis.c:1842
+#, c-format
+msgid ""
+"\n"
+" For the options above, The following values are supported for \"ARCH\":\n"
+" "
+msgstr ""
+
+#: mmix-dis.c:34
+#, fuzzy, c-format
+msgid "Bad case %d (%s) in %s:%d\n"
+msgstr "忽略大å°å†™å˜åŒ–(&I)"
+
+#: mmix-dis.c:44
+#, c-format
+msgid "Internal: Non-debugged code (test-case missing): %s:%d"
+msgstr ""
+
+#: mmix-dis.c:53
+msgid "(unknown)"
+msgstr "(未知)"
+
+#: mmix-dis.c:519
+#, fuzzy, c-format
+msgid "*unknown operands type: %d*"
+msgstr "未知的ç¾å类型‘%s’\n"
+
+#. I and Z are output operands and can`t be immediate
+#. * A is an address and we can`t have the address of
+#. * an immediate either. We don't know how much to increase
+#. * aoffsetp by since whatever generated this is broken
+#. * anyway!
+#.
+#: ns32k-dis.c:631
+#, c-format
+msgid "$<undefined>"
+msgstr "$<未定义>"
+
+#: ppc-opc.c:794 ppc-opc.c:822
+msgid "invalid conditional option"
+msgstr "æ— æ•ˆçš„æ¡ä»¶é€‰é¡¹"
+
+#: ppc-opc.c:824
+msgid "attempt to set y bit when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:852
+msgid "offset not a multiple of 16"
+msgstr "å移é‡ä¸æ˜¯ 16 çš„å€æ•°"
+
+#: ppc-opc.c:871
+msgid "offset not a multiple of 2"
+msgstr "å移é‡ä¸æ˜¯ 2 çš„å€æ•°"
+
+#: ppc-opc.c:873
+msgid "offset greater than 62"
+msgstr "å移é‡å¤§äºŽ 62"
+
+#: ppc-opc.c:892 ppc-opc.c:937 ppc-opc.c:981
+msgid "offset not a multiple of 4"
+msgstr "å移é‡ä¸æ˜¯ 4 çš„å€æ•°"
+
+#: ppc-opc.c:894
+msgid "offset greater than 124"
+msgstr "å移é‡å¤§äºŽ 124"
+
+#: ppc-opc.c:913
+msgid "offset not a multiple of 8"
+msgstr "å移é‡ä¸æ˜¯ 8 çš„å€æ•°"
+
+#: ppc-opc.c:915
+msgid "offset greater than 248"
+msgstr "å移é‡å¤§äºŽ 248"
+
+#: ppc-opc.c:958
+msgid "offset not between -2048 and 2047"
+msgstr "å移é‡ä¸åœ¨ -2048 å’Œ 2047 之间"
+
+#: ppc-opc.c:979
+msgid "offset not between -8192 and 8191"
+msgstr "å移é‡ä¸åœ¨ -8192 å’Œ 8191 之间"
+
+#: ppc-opc.c:1007
+msgid "invalid mask field"
+msgstr "æ— æ•ˆçš„æŽ©ç å—段"
+
+#: ppc-opc.c:1033
+#, fuzzy
+msgid "ignoring invalid mfcr mask"
+msgstr "忽略 schema å称“%sâ€ï¼Œæ— 效：%s"
+
+#: ppc-opc.c:1075
+msgid "ignoring least significant bits in branch offset"
+msgstr ""
+
+#: ppc-opc.c:1105 ppc-opc.c:1140
+msgid "illegal bitmask"
+msgstr "éžæ³•çš„ä½æŽ©ç "
+
+#: ppc-opc.c:1205
+msgid "value out of range"
+msgstr "值越界"
+
+#: ppc-opc.c:1273
+#, fuzzy
+msgid "index register in load range"
+msgstr "åˆå§‹å€¼è®¾å®šé¡¹ä¸ç´¢å¼•èŒƒå›´ä¸ºç©º"
+
+#: ppc-opc.c:1289
+msgid "source and target register operands must be different"
+msgstr ""
+
+#: ppc-opc.c:1304
+msgid "invalid register operand when updating"
+msgstr ""
+
+#: ppc-opc.c:1343
+msgid "target register operand must be even"
+msgstr "目的寄å˜å™¨æ“作数必须是å¶æ•°"
+
+#: ppc-opc.c:1357
+msgid "source register operand must be even"
+msgstr "æºå¯„å˜å™¨æ“作数必须是å¶æ•°"
+
+#. Mark as non-valid instruction.
+#: sparc-dis.c:760
+msgid "unknown"
+msgstr "未知"
+
+#: sparc-dis.c:835
+#, c-format
+msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
+msgstr "内部错误：错误的 sparc-opcode.h：“%sâ€ï¼Œ%#.8lx，%#.8lx\n"
+
+#: sparc-dis.c:846
+#, c-format
+msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
+msgstr "内部错误：错误的 sparc-opcode.h：“%sâ€ï¼Œ%#.8lx，%#.8lx\n"
+
+#: sparc-dis.c:895
+#, fuzzy, c-format
+msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
+msgstr "内部错误：错误的 sparc-opcode.h：“%sâ€ï¼Œ%#.8lx，%#.8lx\n"
+
+#: v850-dis.c:225
+#, fuzzy, c-format
+msgid "unknown operand shift: %x\n"
+msgstr "PRINT_OPERANDï¼šæœªçŸ¥çš„æ ‡ç‚¹â€˜%c’"
+
+#: v850-dis.c:237
+#, c-format
+msgid "unknown pop reg: %d\n"
+msgstr "æœªçŸ¥çš„å¼¹æ ˆå¯„å˜å™¨ï¼š%d\n"
+
+#. The functions used to insert and extract complicated operands.
+#. Note: There is a conspiracy between these functions and
+#. v850_insert_operand() in gas/config/tc-v850.c. Error messages
+#. containing the string 'out of range' will be ignored unless a
+#. specific command line option is given to GAS.
+#: v850-opc.c:69
+msgid "displacement value is not in range and is not aligned"
+msgstr ""
+
+#: v850-opc.c:70
+msgid "displacement value is out of range"
+msgstr "å移值越界"
+
+#: v850-opc.c:71
+msgid "displacement value is not aligned"
+msgstr "å移值未对é½"
+
+#: v850-opc.c:73
+msgid "immediate value is out of range"
+msgstr "ç«‹å³æ•°è¶Šç•Œ"
+
+#: v850-opc.c:84
+msgid "branch value not in range and to odd offset"
+msgstr "跳转越界且跳转å移é‡ä¸ºå¥‡æ•°"
+
+#: v850-opc.c:86 v850-opc.c:118
+msgid "branch value out of range"
+msgstr "跳转越界"
+
+#: v850-opc.c:89 v850-opc.c:121
+msgid "branch to odd offset"
+msgstr "跳转å移é‡ä¸ºå¥‡æ•°"
+
+#: v850-opc.c:116
+msgid "branch value not in range and to an odd offset"
+msgstr "跳转越界且跳转å移é‡ä¸ºå¥‡æ•°"
+
+#: v850-opc.c:347
+msgid "invalid register for stack adjustment"
+msgstr "ç”¨äºŽè°ƒæ•´å †æ ˆçš„å¯„å˜å™¨æ— 效"
+
+#: v850-opc.c:371
+msgid "immediate value not in range and not even"
+msgstr "ç«‹å³æ•°è¶Šç•Œä¸”ä¸æ˜¯å¶æ•°"
+
+#: v850-opc.c:376
+msgid "immediate value must be even"
+msgstr "必须给出立å³æ•°"
+
+#: xstormy16-asm.c:76
+msgid "Bad register in preincrement"
+msgstr "å‰ç½®è‡ªå¢žä¸ä½¿ç”¨äº†é”™è¯¯çš„寄å˜å™¨"
+
+#: xstormy16-asm.c:81
+msgid "Bad register in postincrement"
+msgstr "åŽç½®è‡ªå¢žä¸ä½¿ç”¨äº†é”™è¯¯çš„寄å˜å™¨"
+
+#: xstormy16-asm.c:83
+msgid "Bad register name"
+msgstr "错误的寄å˜å™¨å"
+
+#: xstormy16-asm.c:87
+msgid "Label conflicts with register name"
+msgstr "æ ‡å·ä¸Žå¯„å˜å™¨å冲çª"
+
+#: xstormy16-asm.c:91
+msgid "Label conflicts with `Rx'"
+msgstr "æ ‡å·ä¸Žâ€˜Rx’冲çª"
+
+#: xstormy16-asm.c:93
+msgid "Bad immediate expression"
+msgstr "错误的立å³æ•°è¡¨è¾¾å¼"
+
+#: xstormy16-asm.c:115
+msgid "No relocation for small immediate"
+msgstr ""
+
+#: xstormy16-asm.c:125
+msgid "Small operand was not an immediate number"
+msgstr ""
+
+#: xstormy16-asm.c:164
+msgid "Operand is not a symbol"
+msgstr "æ“作数ä¸æ˜¯ä¸€ä¸ªç¬¦å·"
+
+#: xstormy16-asm.c:172
+msgid "Syntax error: No trailing ')'"
+msgstr "è¯æ³•é”™è¯¯ï¼šæ²¡æœ‰ç»“尾的‘)’"
Modified: branches/binutils/package/opcodes/sparc-dis.c
===================================================================
--- branches/binutils/package/opcodes/sparc-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/sparc-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -85,11 +85,22 @@
{
"tpc", "tnpc", "tstate", "tt", "tick", "tba", "pstate", "tl",
"pil", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
- "wstate", "fq"
+ "wstate", "fq", "gl"
/* "ver" - special cased */
};
/* These are ordered according to there register number in
+ rdhpr and wrhpr insns. */
+static char *v9_hpriv_reg_names[] =
+{
+ "hpstate", "htstate", "resv2", "hintp", "resv4", "htba", "hver",
+ "resv7", "resv8", "resv9", "resv10", "resv11", "resv12", "resv13",
+ "resv14", "resv15", "resv16", "resv17", "resv18", "resv19", "resv20",
+ "resv21", "resv22", "resv23", "resv24", "resv25", "resv26", "resv27",
+ "resv28", "resv29", "resv30", "hstick_cmpr"
+};
+
+/* These are ordered according to there register number in
rd and wr insns (-16). */
static char *v9a_asr_reg_names[] =
{
@@ -768,7 +779,7 @@
case '?':
if (X_RS1 (insn) == 31)
(*info->fprintf_func) (stream, "%%ver");
- else if ((unsigned) X_RS1 (insn) < 16)
+ else if ((unsigned) X_RS1 (insn) < 17)
(*info->fprintf_func) (stream, "%%%s",
v9_priv_reg_names[X_RS1 (insn)]);
else
@@ -776,13 +787,29 @@
break;
case '!':
- if ((unsigned) X_RD (insn) < 15)
+ if ((unsigned) X_RD (insn) < 17)
(*info->fprintf_func) (stream, "%%%s",
v9_priv_reg_names[X_RD (insn)]);
else
(*info->fprintf_func) (stream, "%%reserved");
break;
+ case '$':
+ if ((unsigned) X_RS1 (insn) < 32)
+ (*info->fprintf_func) (stream, "%%%s",
+ v9_hpriv_reg_names[X_RS1 (insn)]);
+ else
+ (*info->fprintf_func) (stream, "%%reserved");
+ break;
+
+ case '%':
+ if ((unsigned) X_RD (insn) < 32)
+ (*info->fprintf_func) (stream, "%%%s",
+ v9_hpriv_reg_names[X_RD (insn)]);
+ else
+ (*info->fprintf_func) (stream, "%%reserved");
+ break;
+
case '/':
if (X_RS1 (insn) < 16 || X_RS1 (insn) > 25)
(*info->fprintf_func) (stream, "%%reserved");
Modified: branches/binutils/package/opcodes/sparc-opc.c
===================================================================
--- branches/binutils/package/opcodes/sparc-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/sparc-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -692,6 +692,10 @@
{ "retry", F3(2, 0x3e, 0)|RD(1), F3(~2, ~0x3e, ~0)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 },
{ "saved", F3(2, 0x31, 0)|RD(0), F3(~2, ~0x31, ~0)|RD(~0)|RS1_G0|SIMM13(~0), "", 0, v9 },
{ "restored", F3(2, 0x31, 0)|RD(1), F3(~2, ~0x31, ~0)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 },
+{ "allclean", F3(2, 0x31, 0)|RD(2), F3(~2, ~0x31, ~0)|RD(~2)|RS1_G0|SIMM13(~0), "", 0, v9 },
+{ "otherw", F3(2, 0x31, 0)|RD(3), F3(~2, ~0x31, ~0)|RD(~3)|RS1_G0|SIMM13(~0), "", 0, v9 },
+{ "normalw", F3(2, 0x31, 0)|RD(4), F3(~2, ~0x31, ~0)|RD(~4)|RS1_G0|SIMM13(~0), "", 0, v9 },
+{ "invalw", F3(2, 0x31, 0)|RD(5), F3(~2, ~0x31, ~0)|RD(~5)|RS1_G0|SIMM13(~0), "", 0, v9 },
{ "sir", F3(2, 0x30, 1)|RD(0xf), F3(~2, ~0x30, ~1)|RD(~0xf)|RS1_G0, "i", 0, v9 },
{ "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8 },
@@ -878,6 +882,13 @@
{ "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,1,!", F_ALIAS, v9 }, /* wrpr i,r1,%priv */
{ "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RS1(~0), "i,!", 0, v9 }, /* wrpr i,%priv */
+{ "rdhpr", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|SIMM13(~0), "$,d", 0, v9 }, /* rdhpr %hpriv,r */
+{ "wrhpr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0), "1,2,%", 0, v9 }, /* wrhpr r1,r2,%hpriv */
+{ "wrhpr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|SIMM13(~0), "1,%", 0, v9 }, /* wrhpr r1,%hpriv */
+{ "wrhpr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1), "1,i,%", 0, v9 }, /* wrhpr r1,i,%hpriv */
+{ "wrhpr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1), "i,1,%", F_ALIAS, v9 }, /* wrhpr i,r1,%hpriv */
+{ "wrhpr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RS1(~0), "i,%", 0, v9 }, /* wrhpr i,%hpriv */
+
/* ??? This group seems wrong. A three operand move? */
{ "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", F_ALIAS, v8 }, /* wr r,r,%asrX */
{ "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", F_ALIAS, v8 }, /* wr r,i,%asrX */
Added: branches/binutils/package/opcodes/xc16x-asm.c
===================================================================
--- branches/binutils/package/opcodes/xc16x-asm.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-asm.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,770 @@
+/* Assembler interface for targets using CGEN. -*- C -*-
+ CGEN: Cpu tools GENerator
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-asm.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "xc16x-desc.h"
+#include "xc16x-opc.h"
+#include "opintl.h"
+#include "xregex.h"
+#include "libiberty.h"
+#include "safe-ctype.h"
+
+#undef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#undef max
+#define max(a,b) ((a) > (b) ? (a) : (b))
+
+static const char * parse_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
+
+/* -- assembler routines inserted here. */
+
+/* -- asm.c */
+/* Handle '#' prefixes (i.e. skip over them). */
+
+static const char *
+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '#')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '#' prefix");
+}
+
+/* Handle '.' prefixes (i.e. skip over them). */
+
+static const char *
+parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (**strp == '.')
+ {
+ ++*strp;
+ return NULL;
+ }
+ return _("Missing '.' prefix");
+}
+
+/* Handle 'pof:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pof:' prefix");
+}
+
+/* Handle 'pag:' prefixes (i.e. skip over them). */
+
+static const char *
+parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "pag:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'pag:' prefix");
+}
+
+/* Handle 'sof' prefixes (i.e. skip over them). */
+
+static const char *
+parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "sof:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'sof:' prefix");
+}
+
+/* Handle 'seg' prefixes (i.e. skip over them). */
+
+static const char *
+parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ long *valuep ATTRIBUTE_UNUSED)
+{
+ if (strncasecmp (*strp, "seg:", 4) == 0)
+ {
+ *strp += 4;
+ return NULL;
+ }
+ return _("Missing 'seg:' prefix");
+}
+/* -- */
+
+const char * xc16x_cgen_parse_operand
+ (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
+
+/* Main entry point for operand parsing.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `parse_insn_normal', but keeping it
+ separate makes clear the interface between `parse_insn_normal' and each of
+ the handlers. */
+
+const char *
+xc16x_cgen_parse_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ const char ** strp,
+ CGEN_FIELDS * fields)
+{
+ const char * errmsg = NULL;
+ /* Used by scalar operands that still need to be parsed. */
+ long junk ATTRIBUTE_UNUSED;
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_psw_names, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_BIT01 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT01, (unsigned long *) (& fields->f_op_1bit));
+ break;
+ case XC16X_OPERAND_BIT1 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT1, (unsigned long *) (& fields->f_op_bit1));
+ break;
+ case XC16X_OPERAND_BIT2 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT2, (unsigned long *) (& fields->f_op_bit2));
+ break;
+ case XC16X_OPERAND_BIT4 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT4, (unsigned long *) (& fields->f_op_bit4));
+ break;
+ case XC16X_OPERAND_BIT8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT8, (unsigned long *) (& fields->f_op_bit8));
+ break;
+ case XC16X_OPERAND_BITONE :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BITONE, (unsigned long *) (& fields->f_op_onebit));
+ break;
+ case XC16X_OPERAND_CADDR :
+ {
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_CADDR, 0, NULL, & value);
+ fields->f_offset16 = value;
+ }
+ break;
+ case XC16X_OPERAND_COND :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_conditioncode_names, & fields->f_condcode);
+ break;
+ case XC16X_OPERAND_DATA8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_DATA8, (unsigned long *) (& fields->f_data8));
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_DATAHI8, (unsigned long *) (& fields->f_datahi8));
+ break;
+ case XC16X_OPERAND_DOT :
+ errmsg = parse_dot (cd, strp, XC16X_OPERAND_DOT, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_DR :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_DRB :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb_names, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_DRI :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r4);
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_extconditioncode_names, & fields->f_extccode);
+ break;
+ case XC16X_OPERAND_GENREG :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_regb8);
+ break;
+ case XC16X_OPERAND_HASH :
+ errmsg = parse_hash (cd, strp, XC16X_OPERAND_HASH, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_ICOND :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_conditioncode_names, & fields->f_icondcode);
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_LBIT2, (unsigned long *) (& fields->f_op_lbit2));
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_LBIT4, (unsigned long *) (& fields->f_op_lbit4));
+ break;
+ case XC16X_OPERAND_MASK8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_MASK8, (unsigned long *) (& fields->f_mask8));
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_MASKLO8, (unsigned long *) (& fields->f_datahi8));
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_memgr8_names, & fields->f_memgr8);
+ break;
+ case XC16X_OPERAND_MEMORY :
+ {
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_MEMORY, 0, NULL, & value);
+ fields->f_memory = value;
+ }
+ break;
+ case XC16X_OPERAND_PAG :
+ errmsg = parse_pag (cd, strp, XC16X_OPERAND_PAG, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_PAGENUM, (unsigned long *) (& fields->f_pagenum));
+ break;
+ case XC16X_OPERAND_POF :
+ errmsg = parse_pof (cd, strp, XC16X_OPERAND_POF, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_QBIT :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QBIT, (unsigned long *) (& fields->f_qbit));
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QHIBIT, (unsigned long *) (& fields->f_qhibit));
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QLOBIT, (unsigned long *) (& fields->f_qlobit));
+ break;
+ case XC16X_OPERAND_REG8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_REGB8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb8_names, & fields->f_regb8);
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regbmem8_names, & fields->f_regmem8);
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_reghi8);
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regmem8_names, & fields->f_regmem8);
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_regoff8);
+ break;
+ case XC16X_OPERAND_REL :
+ errmsg = cgen_parse_signed_integer (cd, strp, XC16X_OPERAND_REL, (long *) (& fields->f_rel8));
+ break;
+ case XC16X_OPERAND_RELHI :
+ errmsg = cgen_parse_signed_integer (cd, strp, XC16X_OPERAND_RELHI, (long *) (& fields->f_relhi8));
+ break;
+ case XC16X_OPERAND_SEG :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_SEG, (unsigned long *) (& fields->f_seg8));
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_SEGHI8, (unsigned long *) (& fields->f_segnum8));
+ break;
+ case XC16X_OPERAND_SEGM :
+ errmsg = parse_seg (cd, strp, XC16X_OPERAND_SEGM, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_SOF :
+ errmsg = parse_sof (cd, strp, XC16X_OPERAND_SOF, (long *) (& junk));
+ break;
+ case XC16X_OPERAND_SR :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SR2 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r0);
+ break;
+ case XC16X_OPERAND_SRB :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb_names, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SRC1 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_SRC2 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SRDIV :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regdiv8_names, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_U4 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_reg0_name, & fields->f_uimm4);
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_ext_names, & fields->f_uimm2);
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_reg0_name1, & fields->f_uimm3);
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM7, (unsigned long *) (& fields->f_uimm7));
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UPAG16, (unsigned long *) (& fields->f_uimm16));
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ {
+ bfd_vma value = 0;
+ errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_UPOF16, 0, NULL, & value);
+ fields->f_memory = value;
+ }
+ break;
+ case XC16X_OPERAND_USEG16 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USEG16, (unsigned long *) (& fields->f_offset16));
+ break;
+ case XC16X_OPERAND_USEG8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USEG8, (unsigned long *) (& fields->f_seg8));
+ break;
+ case XC16X_OPERAND_USOF16 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USOF16, (unsigned long *) (& fields->f_offset16));
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
+ abort ();
+ }
+
+ return errmsg;
+}
+
+cgen_parse_fn * const xc16x_cgen_parse_handlers[] =
+{
+ parse_insn_normal,
+};
+
+void
+xc16x_cgen_init_asm (CGEN_CPU_DESC cd)
+{
+ xc16x_cgen_init_opcode_table (cd);
+ xc16x_cgen_init_ibld_table (cd);
+ cd->parse_handlers = & xc16x_cgen_parse_handlers[0];
+ cd->parse_operand = xc16x_cgen_parse_operand;
+}
+
+
+
+/* Regex construction routine.
+
+ This translates an opcode syntax string into a regex string,
+ by replacing any non-character syntax element (such as an
+ opcode) with the pattern '.*'
+
+ It then compiles the regex and stores it in the opcode, for
+ later use by xc16x_cgen_assemble_insn
+
+ Returns NULL for success, an error message for failure. */
+
+char *
+xc16x_cgen_build_insn_regex (CGEN_INSN *insn)
+{
+ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
+ const char *mnem = CGEN_INSN_MNEMONIC (insn);
+ char rxbuf[CGEN_MAX_RX_ELEMENTS];
+ char *rx = rxbuf;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+ int reg_err;
+
+ syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
+
+ /* Mnemonics come first in the syntax string. */
+ if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
+ return _("missing mnemonic in syntax string");
+ ++syn;
+
+ /* Generate a case sensitive regular expression that emulates case
+ insensitive matching in the "C" locale. We cannot generate a case
+ insensitive regular expression because in Turkish locales, 'i' and 'I'
+ are not equal modulo case conversion. */
+
+ /* Copy the literal mnemonic out of the insn. */
+ for (; *mnem; mnem++)
+ {
+ char c = *mnem;
+
+ if (ISALPHA (c))
+ {
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
+ }
+ else
+ *rx++ = c;
+ }
+
+ /* Copy any remaining literals from the syntax string into the rx. */
+ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
+ {
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ {
+ char c = CGEN_SYNTAX_CHAR (* syn);
+
+ switch (c)
+ {
+ /* Escape any regex metacharacters in the syntax. */
+ case '.': case '[': case '\\':
+ case '*': case '^': case '$':
+
+#ifdef CGEN_ESCAPE_EXTENDED_REGEX
+ case '?': case '{': case '}':
+ case '(': case ')': case '*':
+ case '|': case '+': case ']':
+#endif
+ *rx++ = '\\';
+ *rx++ = c;
+ break;
+
+ default:
+ if (ISALPHA (c))
+ {
+ *rx++ = '[';
+ *rx++ = TOLOWER (c);
+ *rx++ = TOUPPER (c);
+ *rx++ = ']';
+ }
+ else
+ *rx++ = c;
+ break;
+ }
+ }
+ else
+ {
+ /* Replace non-syntax fields with globs. */
+ *rx++ = '.';
+ *rx++ = '*';
+ }
+ }
+
+ /* Trailing whitespace ok. */
+ * rx++ = '[';
+ * rx++ = ' ';
+ * rx++ = '\t';
+ * rx++ = ']';
+ * rx++ = '*';
+
+ /* But anchor it after that. */
+ * rx++ = '$';
+ * rx = '\0';
+
+ CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
+ reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
+
+ if (reg_err == 0)
+ return NULL;
+ else
+ {
+ static char msg[80];
+
+ regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
+ regfree ((regex_t *) CGEN_INSN_RX (insn));
+ free (CGEN_INSN_RX (insn));
+ (CGEN_INSN_RX (insn)) = NULL;
+ return msg;
+ }
+}
+
+
+/* Default insn parser.
+
+ The syntax string is scanned and operands are parsed and stored in FIELDS.
+ Relocs are queued as we go via other callbacks.
+
+ ??? Note that this is currently an all-or-nothing parser. If we fail to
+ parse the instruction, we return 0 and the caller will start over from
+ the beginning. Backtracking will be necessary in parsing subexpressions,
+ but that can be handled there. Not handling backtracking here may get
+ expensive in the case of the m68k. Deal with later.
+
+ Returns NULL for success, an error message for failure. */
+
+static const char *
+parse_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn,
+ const char **strp,
+ CGEN_FIELDS *fields)
+{
+ /* ??? Runtime added insns not handled yet. */
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const char *str = *strp;
+ const char *errmsg;
+ const char *p;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
+#ifdef CGEN_MNEMONIC_OPERANDS
+ /* FIXME: wip */
+ int past_opcode_p;
+#endif
+
+ /* For now we assume the mnemonic is first (there are no leading operands).
+ We can parse it without needing to set up operand parsing.
+ GAS's input scrubber will ensure mnemonics are lowercase, but we may
+ not be called from GAS. */
+ p = CGEN_INSN_MNEMONIC (insn);
+ while (*p && TOLOWER (*p) == TOLOWER (*str))
+ ++p, ++str;
+
+ if (* p)
+ return _("unrecognized instruction");
+
+#ifndef CGEN_MNEMONIC_OPERANDS
+ if (* str && ! ISSPACE (* str))
+ return _("unrecognized instruction");
+#endif
+
+ CGEN_INIT_PARSE (cd);
+ cgen_init_parse_operand (cd);
+#ifdef CGEN_MNEMONIC_OPERANDS
+ past_opcode_p = 0;
+#endif
+
+ /* We don't check for (*str != '\0') here because we want to parse
+ any trailing fake arguments in the syntax string. */
+ syn = CGEN_SYNTAX_STRING (syntax);
+
+ /* Mnemonics come first for now, ensure valid string. */
+ if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
+ abort ();
+
+ ++syn;
+
+ while (* syn != 0)
+ {
+ /* Non operand chars must match exactly. */
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ {
+ /* FIXME: While we allow for non-GAS callers above, we assume the
+ first char after the mnemonic part is a space. */
+ /* FIXME: We also take inappropriate advantage of the fact that
+ GAS's input scrubber will remove extraneous blanks. */
+ if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
+ {
+#ifdef CGEN_MNEMONIC_OPERANDS
+ if (CGEN_SYNTAX_CHAR(* syn) == ' ')
+ past_opcode_p = 1;
+#endif
+ ++ syn;
+ ++ str;
+ }
+ else if (*str)
+ {
+ /* Syntax char didn't match. Can't be this insn. */
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
+ CGEN_SYNTAX_CHAR(*syn), *str);
+ return msg;
+ }
+ else
+ {
+ /* Ran out of input. */
+ static char msg [80];
+
+ /* xgettext:c-format */
+ sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
+ CGEN_SYNTAX_CHAR(*syn));
+ return msg;
+ }
+ continue;
+ }
+
+ /* We have an operand of some sort. */
+ errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
+ &str, fields);
+ if (errmsg)
+ return errmsg;
+
+ /* Done with this operand, continue with next one. */
+ ++ syn;
+ }
+
+ /* If we're at the end of the syntax string, we're done. */
+ if (* syn == 0)
+ {
+ /* FIXME: For the moment we assume a valid `str' can only contain
+ blanks now. IE: We needn't try again with a longer version of
+ the insn and it is assumed that longer versions of insns appear
+ before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
+ while (ISSPACE (* str))
+ ++ str;
+
+ if (* str != '\0')
+ return _("junk at end of line"); /* FIXME: would like to include `str' */
+
+ return NULL;
+ }
+
+ /* We couldn't parse it. */
+ return _("unrecognized instruction");
+}
+
+/* Main entry point.
+ This routine is called for each instruction to be assembled.
+ STR points to the insn to be assembled.
+ We assume all necessary tables have been initialized.
+ The assembled instruction, less any fixups, is stored in BUF.
+ Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
+ still needs to be converted to target byte order, otherwise BUF is an array
+ of bytes in target byte order.
+ The result is a pointer to the insn's entry in the opcode table,
+ or NULL if an error occured (an error message will have already been
+ printed).
+
+ Note that when processing (non-alias) macro-insns,
+ this function recurses.
+
+ ??? It's possible to make this cpu-independent.
+ One would have to deal with a few minor things.
+ At this point in time doing so would be more of a curiosity than useful
+ [for example this file isn't _that_ big], but keeping the possibility in
+ mind helps keep the design clean. */
+
+const CGEN_INSN *
+xc16x_cgen_assemble_insn (CGEN_CPU_DESC cd,
+ const char *str,
+ CGEN_FIELDS *fields,
+ CGEN_INSN_BYTES_PTR buf,
+ char **errmsg)
+{
+ const char *start;
+ CGEN_INSN_LIST *ilist;
+ const char *parse_errmsg = NULL;
+ const char *insert_errmsg = NULL;
+ int recognized_mnemonic = 0;
+
+ /* Skip leading white space. */
+ while (ISSPACE (* str))
+ ++ str;
+
+ /* The instructions are stored in hashed lists.
+ Get the first in the list. */
+ ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
+
+ /* Keep looking until we find a match. */
+ start = str;
+ for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
+ {
+ const CGEN_INSN *insn = ilist->insn;
+ recognized_mnemonic = 1;
+
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* Not usually needed as unsupported opcodes
+ shouldn't be in the hash lists. */
+ /* Is this insn supported by the selected cpu? */
+ if (! xc16x_cgen_insn_supported (cd, insn))
+ continue;
+#endif
+ /* If the RELAXED attribute is set, this is an insn that shouldn't be
+ chosen immediately. Instead, it is used during assembler/linker
+ relaxation if possible. */
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
+ continue;
+
+ str = start;
+
+ /* Skip this insn if str doesn't look right lexically. */
+ if (CGEN_INSN_RX (insn) != NULL &&
+ regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
+ continue;
+
+ /* Allow parse/insert handlers to obtain length of insn. */
+ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
+
+ parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
+ if (parse_errmsg != NULL)
+ continue;
+
+ /* ??? 0 is passed for `pc'. */
+ insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
+ (bfd_vma) 0);
+ if (insert_errmsg != NULL)
+ continue;
+
+ /* It is up to the caller to actually output the insn and any
+ queued relocs. */
+ return insn;
+ }
+
+ {
+ static char errbuf[150];
+#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
+ const char *tmp_errmsg;
+
+ /* If requesting verbose error messages, use insert_errmsg.
+ Failing that, use parse_errmsg. */
+ tmp_errmsg = (insert_errmsg ? insert_errmsg :
+ parse_errmsg ? parse_errmsg :
+ recognized_mnemonic ?
+ _("unrecognized form of instruction") :
+ _("unrecognized instruction"));
+
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
+#else
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, _("bad instruction `%.50s...'"), start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, _("bad instruction `%.50s'"), start);
+#endif
+
+ *errmsg = errbuf;
+ return NULL;
+ }
+}
Added: branches/binutils/package/opcodes/xc16x-desc.c
===================================================================
--- branches/binutils/package/opcodes/xc16x-desc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-desc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,3534 @@
+/* CPU data for xc16x.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sysdep.h"
+#include <stdio.h>
+#include <stdarg.h>
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "xc16x-desc.h"
+#include "xc16x-opc.h"
+#include "opintl.h"
+#include "libiberty.h"
+#include "xregex.h"
+
+/* Attributes. */
+
+static const CGEN_ATTR_ENTRY bool_attr[] =
+{
+ { "#f", 0 },
+ { "#t", 1 },
+ { 0, 0 }
+};
+
+static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
+{
+ { "base", MACH_BASE },
+ { "xc16x", MACH_XC16X },
+ { "max", MACH_MAX },
+ { 0, 0 }
+};
+
+static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
+{
+ { "xc16x", ISA_XC16X },
+ { "max", ISA_MAX },
+ { 0, 0 }
+};
+
+static const CGEN_ATTR_ENTRY PIPE_attr[] ATTRIBUTE_UNUSED =
+{
+ { "NONE", PIPE_NONE },
+ { "OS", PIPE_OS },
+ { 0, 0 }
+};
+
+const CGEN_ATTR_TABLE xc16x_cgen_ifield_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "RESERVED", &bool_attr[0], &bool_attr[0] },
+ { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
+ { "SIGNED", &bool_attr[0], &bool_attr[0] },
+ { "RELOC", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE xc16x_cgen_hardware_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "PC", &bool_attr[0], &bool_attr[0] },
+ { "PROFILE", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE xc16x_cgen_operand_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
+ { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
+ { "SIGNED", &bool_attr[0], &bool_attr[0] },
+ { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
+ { "RELAX", &bool_attr[0], &bool_attr[0] },
+ { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
+ { "RELOC", &bool_attr[0], &bool_attr[0] },
+ { "HASH-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { "DOT-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { "POF-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { "PAG-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { "SOF-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { "SEG-PREFIX", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+const CGEN_ATTR_TABLE xc16x_cgen_insn_attr_table[] =
+{
+ { "MACH", & MACH_attr[0], & MACH_attr[0] },
+ { "PIPE", & PIPE_attr[0], & PIPE_attr[0] },
+ { "ALIAS", &bool_attr[0], &bool_attr[0] },
+ { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
+ { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
+ { "COND-CTI", &bool_attr[0], &bool_attr[0] },
+ { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
+ { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
+ { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
+ { "RELAXED", &bool_attr[0], &bool_attr[0] },
+ { "NO-DIS", &bool_attr[0], &bool_attr[0] },
+ { "PBB", &bool_attr[0], &bool_attr[0] },
+ { 0, 0, 0 }
+};
+
+/* Instruction set variants. */
+
+static const CGEN_ISA xc16x_cgen_isa_table[] = {
+ { "xc16x", 16, 32, 16, 32 },
+ { 0, 0, 0, 0, 0 }
+};
+
+/* Machine variants. */
+
+static const CGEN_MACH xc16x_cgen_mach_table[] = {
+ { "xc16x", "xc16x", MACH_XC16X, 32 },
+ { 0, 0, 0, 0 }
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_gr_names_entries[] =
+{
+ { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_gr_names =
+{
+ & xc16x_cgen_opval_gr_names_entries[0],
+ 16,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_ext_names_entries[] =
+{
+ { "0x1", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x2", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x3", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x4", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "1", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "2", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "3", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "4", 3, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_ext_names =
+{
+ & xc16x_cgen_opval_ext_names_entries[0],
+ 8,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_psw_names_entries[] =
+{
+ { "IEN", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "r0.11", 240, {0, {{{0, 0}}}}, 0, 0 },
+ { "r1.11", 241, {0, {{{0, 0}}}}, 0, 0 },
+ { "r2.11", 242, {0, {{{0, 0}}}}, 0, 0 },
+ { "r3.11", 243, {0, {{{0, 0}}}}, 0, 0 },
+ { "r4.11", 244, {0, {{{0, 0}}}}, 0, 0 },
+ { "r5.11", 245, {0, {{{0, 0}}}}, 0, 0 },
+ { "r6.11", 246, {0, {{{0, 0}}}}, 0, 0 },
+ { "r7.11", 247, {0, {{{0, 0}}}}, 0, 0 },
+ { "r8.11", 248, {0, {{{0, 0}}}}, 0, 0 },
+ { "r9.11", 249, {0, {{{0, 0}}}}, 0, 0 },
+ { "r10.11", 250, {0, {{{0, 0}}}}, 0, 0 },
+ { "r11.11", 251, {0, {{{0, 0}}}}, 0, 0 },
+ { "r12.11", 252, {0, {{{0, 0}}}}, 0, 0 },
+ { "r13.11", 253, {0, {{{0, 0}}}}, 0, 0 },
+ { "r14.11", 254, {0, {{{0, 0}}}}, 0, 0 },
+ { "r15.11", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_psw_names =
+{
+ & xc16x_cgen_opval_psw_names_entries[0],
+ 17,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_grb_names_entries[] =
+{
+ { "rl0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh0", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl1", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh1", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl2", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh2", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl3", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh3", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl4", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh4", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl5", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh5", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl6", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh6", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl7", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh7", 15, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_grb_names =
+{
+ & xc16x_cgen_opval_grb_names_entries[0],
+ 16,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_conditioncode_names_entries[] =
+{
+ { "cc_UC", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NET", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_Z", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_EQ", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NZ", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NE", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_V", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NV", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_N", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NN", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_ULT", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_UGE", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_C", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NC", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SGT", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SLE", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SLT", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SGE", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_UGT", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_ULE", 15, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_conditioncode_names =
+{
+ & xc16x_cgen_opval_conditioncode_names_entries[0],
+ 20,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_extconditioncode_names_entries[] =
+{
+ { "cc_UC", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NET", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_Z", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_EQ", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NZ", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NE", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_V", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NV", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_N", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NN", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_ULT", 16, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_UGE", 18, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_C", 16, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_NC", 18, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SGT", 20, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SLE", 22, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SLT", 24, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_SGE", 26, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_UGT", 28, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_ULE", 30, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_nusr0", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_nusr1", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_usr0", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "cc_usr1", 7, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_extconditioncode_names =
+{
+ & xc16x_cgen_opval_extconditioncode_names_entries[0],
+ 24,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_grb8_names_entries[] =
+{
+ { "dpp0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "psw", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "cp", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdl", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdh", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdc", 135, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "csp", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "vecseg", 137, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkov", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkun", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon1", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon2", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "zeros", 142, {0, {{{0, 0}}}}, 0, 0 },
+ { "ones", 143, {0, {{{0, 0}}}}, 0, 0 },
+ { "spseg", 134, {0, {{{0, 0}}}}, 0, 0 },
+ { "tfr", 214, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl0", 240, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh0", 241, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl1", 242, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh1", 243, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl2", 244, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh2", 245, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl3", 246, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh3", 247, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl4", 248, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh4", 249, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl5", 250, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh5", 251, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl6", 252, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh6", 253, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl7", 254, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh7", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_grb8_names =
+{
+ & xc16x_cgen_opval_grb8_names_entries[0],
+ 36,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_r8_names_entries[] =
+{
+ { "dpp0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "psw", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "cp", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdl", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdh", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdc", 135, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "csp", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "vecseg", 137, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkov", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkun", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon1", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon2", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "zeros", 142, {0, {{{0, 0}}}}, 0, 0 },
+ { "ones", 143, {0, {{{0, 0}}}}, 0, 0 },
+ { "spseg", 134, {0, {{{0, 0}}}}, 0, 0 },
+ { "tfr", 214, {0, {{{0, 0}}}}, 0, 0 },
+ { "r0", 240, {0, {{{0, 0}}}}, 0, 0 },
+ { "r1", 241, {0, {{{0, 0}}}}, 0, 0 },
+ { "r2", 242, {0, {{{0, 0}}}}, 0, 0 },
+ { "r3", 243, {0, {{{0, 0}}}}, 0, 0 },
+ { "r4", 244, {0, {{{0, 0}}}}, 0, 0 },
+ { "r5", 245, {0, {{{0, 0}}}}, 0, 0 },
+ { "r6", 246, {0, {{{0, 0}}}}, 0, 0 },
+ { "r7", 247, {0, {{{0, 0}}}}, 0, 0 },
+ { "r8", 248, {0, {{{0, 0}}}}, 0, 0 },
+ { "r9", 249, {0, {{{0, 0}}}}, 0, 0 },
+ { "r10", 250, {0, {{{0, 0}}}}, 0, 0 },
+ { "r11", 251, {0, {{{0, 0}}}}, 0, 0 },
+ { "r12", 252, {0, {{{0, 0}}}}, 0, 0 },
+ { "r13", 253, {0, {{{0, 0}}}}, 0, 0 },
+ { "r14", 254, {0, {{{0, 0}}}}, 0, 0 },
+ { "r15", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_r8_names =
+{
+ & xc16x_cgen_opval_r8_names_entries[0],
+ 36,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_regmem8_names_entries[] =
+{
+ { "dpp0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "psw", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "cp", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdl", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdh", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdc", 135, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "csp", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "vecseg", 137, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkov", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkun", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon1", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon2", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "zeros", 142, {0, {{{0, 0}}}}, 0, 0 },
+ { "ones", 143, {0, {{{0, 0}}}}, 0, 0 },
+ { "spseg", 134, {0, {{{0, 0}}}}, 0, 0 },
+ { "tfr", 214, {0, {{{0, 0}}}}, 0, 0 },
+ { "r0", 240, {0, {{{0, 0}}}}, 0, 0 },
+ { "r1", 241, {0, {{{0, 0}}}}, 0, 0 },
+ { "r2", 242, {0, {{{0, 0}}}}, 0, 0 },
+ { "r3", 243, {0, {{{0, 0}}}}, 0, 0 },
+ { "r4", 244, {0, {{{0, 0}}}}, 0, 0 },
+ { "r5", 245, {0, {{{0, 0}}}}, 0, 0 },
+ { "r6", 246, {0, {{{0, 0}}}}, 0, 0 },
+ { "r7", 247, {0, {{{0, 0}}}}, 0, 0 },
+ { "r8", 248, {0, {{{0, 0}}}}, 0, 0 },
+ { "r9", 249, {0, {{{0, 0}}}}, 0, 0 },
+ { "r10", 250, {0, {{{0, 0}}}}, 0, 0 },
+ { "r11", 251, {0, {{{0, 0}}}}, 0, 0 },
+ { "r12", 252, {0, {{{0, 0}}}}, 0, 0 },
+ { "r13", 253, {0, {{{0, 0}}}}, 0, 0 },
+ { "r14", 254, {0, {{{0, 0}}}}, 0, 0 },
+ { "r15", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_regmem8_names =
+{
+ & xc16x_cgen_opval_regmem8_names_entries[0],
+ 36,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_regdiv8_names_entries[] =
+{
+ { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "r1", 17, {0, {{{0, 0}}}}, 0, 0 },
+ { "r2", 34, {0, {{{0, 0}}}}, 0, 0 },
+ { "r3", 51, {0, {{{0, 0}}}}, 0, 0 },
+ { "r4", 68, {0, {{{0, 0}}}}, 0, 0 },
+ { "r5", 85, {0, {{{0, 0}}}}, 0, 0 },
+ { "r6", 102, {0, {{{0, 0}}}}, 0, 0 },
+ { "r7", 119, {0, {{{0, 0}}}}, 0, 0 },
+ { "r8", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "r9", 153, {0, {{{0, 0}}}}, 0, 0 },
+ { "r10", 170, {0, {{{0, 0}}}}, 0, 0 },
+ { "r11", 187, {0, {{{0, 0}}}}, 0, 0 },
+ { "r12", 204, {0, {{{0, 0}}}}, 0, 0 },
+ { "r13", 221, {0, {{{0, 0}}}}, 0, 0 },
+ { "r14", 238, {0, {{{0, 0}}}}, 0, 0 },
+ { "r15", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_regdiv8_names =
+{
+ & xc16x_cgen_opval_regdiv8_names_entries[0],
+ 16,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_reg0_name_entries[] =
+{
+ { "0x1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x7", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x8", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x9", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xa", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xb", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xc", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xd", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xe", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "0xf", 15, {0, {{{0, 0}}}}, 0, 0 },
+ { "1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "7", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "8", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "9", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "10", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "11", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "12", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "13", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "14", 14, {0, {{{0, 0}}}}, 0, 0 },
+ { "15", 15, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_reg0_name =
+{
+ & xc16x_cgen_opval_reg0_name_entries[0],
+ 30,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_reg0_name1_entries[] =
+{
+ { "0x1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "0x7", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "4", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "5", 5, {0, {{{0, 0}}}}, 0, 0 },
+ { "6", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "7", 7, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_reg0_name1 =
+{
+ & xc16x_cgen_opval_reg0_name1_entries[0],
+ 14,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_regbmem8_names_entries[] =
+{
+ { "dpp0", 0, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp1", 1, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp2", 2, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp3", 3, {0, {{{0, 0}}}}, 0, 0 },
+ { "psw", 136, {0, {{{0, 0}}}}, 0, 0 },
+ { "cp", 8, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdl", 7, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdh", 6, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdc", 135, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "csp", 4, {0, {{{0, 0}}}}, 0, 0 },
+ { "vecseg", 137, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkov", 10, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkun", 11, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon1", 12, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon2", 13, {0, {{{0, 0}}}}, 0, 0 },
+ { "zeros", 142, {0, {{{0, 0}}}}, 0, 0 },
+ { "ones", 143, {0, {{{0, 0}}}}, 0, 0 },
+ { "spseg", 134, {0, {{{0, 0}}}}, 0, 0 },
+ { "tfr", 214, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl0", 240, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh0", 241, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl1", 242, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh1", 243, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl2", 244, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh2", 245, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl3", 246, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh3", 247, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl4", 248, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh4", 249, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl5", 250, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh5", 251, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl6", 252, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh6", 253, {0, {{{0, 0}}}}, 0, 0 },
+ { "rl7", 254, {0, {{{0, 0}}}}, 0, 0 },
+ { "rh7", 255, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_regbmem8_names =
+{
+ & xc16x_cgen_opval_regbmem8_names_entries[0],
+ 36,
+ 0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY xc16x_cgen_opval_memgr8_names_entries[] =
+{
+ { "dpp0", 65024, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp1", 65026, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp2", 65028, {0, {{{0, 0}}}}, 0, 0 },
+ { "dpp3", 65030, {0, {{{0, 0}}}}, 0, 0 },
+ { "psw", 65296, {0, {{{0, 0}}}}, 0, 0 },
+ { "cp", 65040, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdl", 65038, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdh", 65036, {0, {{{0, 0}}}}, 0, 0 },
+ { "mdc", 65294, {0, {{{0, 0}}}}, 0, 0 },
+ { "sp", 65042, {0, {{{0, 0}}}}, 0, 0 },
+ { "csp", 65032, {0, {{{0, 0}}}}, 0, 0 },
+ { "vecseg", 65298, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkov", 65044, {0, {{{0, 0}}}}, 0, 0 },
+ { "stkun", 65046, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon1", 65048, {0, {{{0, 0}}}}, 0, 0 },
+ { "cpucon2", 65050, {0, {{{0, 0}}}}, 0, 0 },
+ { "zeros", 65308, {0, {{{0, 0}}}}, 0, 0 },
+ { "ones", 65310, {0, {{{0, 0}}}}, 0, 0 },
+ { "spseg", 65292, {0, {{{0, 0}}}}, 0, 0 },
+ { "tfr", 65452, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD xc16x_cgen_opval_memgr8_names =
+{
+ & xc16x_cgen_opval_memgr8_names_entries[0],
+ 20,
+ 0, 0, 0, 0, ""
+};
+
+
+/* The hardware table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_HW_##a)
+#else
+#define A(a) (1 << CGEN_HW_/**/a)
+#endif
+
+const CGEN_HW_ENTRY xc16x_cgen_hw_table[] =
+{
+ { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_gr_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-ext", HW_H_EXT, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_ext_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-psw", HW_H_PSW, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_psw_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-grb", HW_H_GRB, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_grb_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-cc", HW_H_CC, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_conditioncode_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-ecc", HW_H_ECC, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_extconditioncode_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-grb8", HW_H_GRB8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_grb8_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-r8", HW_H_R8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_r8_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-regmem8", HW_H_REGMEM8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_regmem8_names, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-regdiv8", HW_H_REGDIV8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_regdiv8_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-r0", HW_H_R0, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_reg0_name, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-r01", HW_H_R01, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_reg0_name1, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-regbmem8", HW_H_REGBMEM8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_regbmem8_names, { 0|A(CACHE_ADDR)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-memgr8", HW_H_MEMGR8, CGEN_ASM_KEYWORD, (PTR) & xc16x_cgen_opval_memgr8_names, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-cond", HW_H_COND, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-cbit", HW_H_CBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { "h-sgtdis", HW_H_SGTDIS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+/* The instruction field table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_IFLD_##a)
+#else
+#define A(a) (1 << CGEN_IFLD_/**/a)
+#endif
+
+const CGEN_IFLD xc16x_cgen_ifld_table[] =
+{
+ { XC16X_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP1, "f-op1", 0, 32, 7, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP2, "f-op2", 0, 32, 3, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_CONDCODE, "f-condcode", 0, 32, 7, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_ICONDCODE, "f-icondcode", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_RCOND, "f-rcond", 0, 32, 7, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_QCOND, "f-qcond", 0, 32, 7, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_EXTCCODE, "f-extccode", 0, 32, 15, 5, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_R0, "f-r0", 0, 32, 9, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_R1, "f-r1", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_R2, "f-r2", 0, 32, 11, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_R3, "f-r3", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_R4, "f-r4", 0, 32, 11, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM2, "f-uimm2", 0, 32, 13, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM3, "f-uimm3", 0, 32, 10, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM4, "f-uimm4", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM7, "f-uimm7", 0, 32, 15, 7, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM8, "f-uimm8", 0, 32, 23, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_UIMM16, "f-uimm16", 0, 32, 31, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_MEMORY, "f-memory", 0, 32, 31, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_MEMGR8, "f-memgr8", 0, 32, 31, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REL8, "f-rel8", 0, 32, 15, 8, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_RELHI8, "f-relhi8", 0, 32, 23, 8, { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REG8, "f-reg8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REGMEM8, "f-regmem8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REGOFF8, "f-regoff8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REGHI8, "f-reghi8", 0, 32, 23, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_REGB8, "f-regb8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_SEG8, "f-seg8", 0, 32, 15, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_SEGNUM8, "f-segnum8", 0, 32, 23, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_MASK8, "f-mask8", 0, 32, 23, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_PAGENUM, "f-pagenum", 0, 32, 25, 10, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_DATAHI8, "f-datahi8", 0, 32, 31, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_DATA8, "f-data8", 0, 32, 23, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OFFSET16, "f-offset16", 0, 32, 31, 16, { 0|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT1, "f-op-bit1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT2, "f-op-bit2", 0, 32, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT4, "f-op-bit4", 0, 32, 11, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT3, "f-op-bit3", 0, 32, 10, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_2BIT, "f-op-2bit", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BITONE, "f-op-bitone", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_ONEBIT, "f-op-onebit", 0, 32, 9, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_1BIT, "f-op-1bit", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_LBIT4, "f-op-lbit4", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_LBIT2, "f-op-lbit2", 0, 32, 15, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT8, "f-op-bit8", 0, 32, 31, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_OP_BIT16, "f-op-bit16", 0, 32, 31, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_QBIT, "f-qbit", 0, 32, 7, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_QLOBIT, "f-qlobit", 0, 32, 31, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_QHIBIT, "f-qhibit", 0, 32, 27, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_QLOBIT2, "f-qlobit2", 0, 32, 27, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XC16X_F_POF, "f-pof", 0, 32, 31, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+
+/* multi ifield declarations */
+
+
+
+/* multi ifield definitions */
+
+
+/* The operand table. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_OPERAND_##a)
+#else
+#define A(a) (1 << CGEN_OPERAND_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) XC16X_OPERAND_##op
+#else
+#define OPERAND(op) XC16X_OPERAND_/**/op
+#endif
+
+const CGEN_OPERAND xc16x_cgen_operand_table[] =
+{
+/* pc: program counter */
+ { "pc", XC16X_OPERAND_PC, HW_H_PC, 0, 0,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_NIL] } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
+/* sr: source register */
+ { "sr", XC16X_OPERAND_SR, HW_H_GR, 11, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* dr: destination register */
+ { "dr", XC16X_OPERAND_DR, HW_H_GR, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* dri: destination register */
+ { "dri", XC16X_OPERAND_DRI, HW_H_GR, 11, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R4] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* srb: source register */
+ { "srb", XC16X_OPERAND_SRB, HW_H_GRB, 11, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* drb: destination register */
+ { "drb", XC16X_OPERAND_DRB, HW_H_GRB, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* sr2: 2 bit source register */
+ { "sr2", XC16X_OPERAND_SR2, HW_H_GR, 9, 2,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R0] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* src1: source register 1 */
+ { "src1", XC16X_OPERAND_SRC1, HW_H_GR, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* src2: source register 2 */
+ { "src2", XC16X_OPERAND_SRC2, HW_H_GR, 11, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_R2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* srdiv: source register 2 */
+ { "srdiv", XC16X_OPERAND_SRDIV, HW_H_REGDIV8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REG8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* RegNam: PSW bits */
+ { "RegNam", XC16X_OPERAND_REGNAM, HW_H_PSW, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REG8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm2: 2 bit unsigned number */
+ { "uimm2", XC16X_OPERAND_UIMM2, HW_H_EXT, 13, 2,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM2] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm3: 3 bit unsigned number */
+ { "uimm3", XC16X_OPERAND_UIMM3, HW_H_R01, 10, 3,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM3] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm4: 4 bit unsigned number */
+ { "uimm4", XC16X_OPERAND_UIMM4, HW_H_UINT, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM4] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm7: 7 bit trap number */
+ { "uimm7", XC16X_OPERAND_UIMM7, HW_H_UINT, 15, 7,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM7] } },
+ { 0|A(HASH_PREFIX)|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm8: 8 bit unsigned immediate */
+ { "uimm8", XC16X_OPERAND_UIMM8, HW_H_UINT, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM8] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* uimm16: 16 bit unsigned immediate */
+ { "uimm16", XC16X_OPERAND_UIMM16, HW_H_UINT, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM16] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* upof16: 16 bit unsigned immediate */
+ { "upof16", XC16X_OPERAND_UPOF16, HW_H_ADDR, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_MEMORY] } },
+ { 0|A(POF_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* reg8: 8 bit word register number */
+ { "reg8", XC16X_OPERAND_REG8, HW_H_R8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REG8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* regmem8: 8 bit word register number */
+ { "regmem8", XC16X_OPERAND_REGMEM8, HW_H_REGMEM8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGMEM8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* regbmem8: 8 bit byte register number */
+ { "regbmem8", XC16X_OPERAND_REGBMEM8, HW_H_REGBMEM8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGMEM8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* regoff8: 8 bit word register number */
+ { "regoff8", XC16X_OPERAND_REGOFF8, HW_H_R8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGOFF8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* reghi8: 8 bit word register number */
+ { "reghi8", XC16X_OPERAND_REGHI8, HW_H_R8, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGHI8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* regb8: 8 bit byte register number */
+ { "regb8", XC16X_OPERAND_REGB8, HW_H_GRB8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGB8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* genreg: 8 bit word register number */
+ { "genreg", XC16X_OPERAND_GENREG, HW_H_R8, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REGB8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* seg: 8 bit segment number */
+ { "seg", XC16X_OPERAND_SEG, HW_H_UINT, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_SEG8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* seghi8: 8 bit hi segment number */
+ { "seghi8", XC16X_OPERAND_SEGHI8, HW_H_UINT, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_SEGNUM8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* caddr: 16 bit address offset */
+ { "caddr", XC16X_OPERAND_CADDR, HW_H_ADDR, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OFFSET16] } },
+ { 0|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* rel: 8 bit signed relative offset */
+ { "rel", XC16X_OPERAND_REL, HW_H_SINT, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_REL8] } },
+ { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* relhi: hi 8 bit signed relative offset */
+ { "relhi", XC16X_OPERAND_RELHI, HW_H_SINT, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_RELHI8] } },
+ { 0|A(RELOC)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* condbit: condition bit */
+ { "condbit", XC16X_OPERAND_CONDBIT, HW_H_COND, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
+/* bit1: gap of 1 bit */
+ { "bit1", XC16X_OPERAND_BIT1, HW_H_UINT, 11, 1,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_BIT1] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bit2: gap of 2 bits */
+ { "bit2", XC16X_OPERAND_BIT2, HW_H_UINT, 11, 2,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_BIT2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bit4: gap of 4 bits */
+ { "bit4", XC16X_OPERAND_BIT4, HW_H_UINT, 11, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_BIT4] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* lbit4: gap of 4 bits */
+ { "lbit4", XC16X_OPERAND_LBIT4, HW_H_UINT, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_LBIT4] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* lbit2: gap of 2 bits */
+ { "lbit2", XC16X_OPERAND_LBIT2, HW_H_UINT, 15, 2,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_LBIT2] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bit8: gap of 8 bits */
+ { "bit8", XC16X_OPERAND_BIT8, HW_H_UINT, 31, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_BIT8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* u4: gap of 4 bits */
+ { "u4", XC16X_OPERAND_U4, HW_H_R0, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM4] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bitone: field of 1 bit */
+ { "bitone", XC16X_OPERAND_BITONE, HW_H_UINT, 9, 1,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_ONEBIT] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* bit01: field of 1 bit */
+ { "bit01", XC16X_OPERAND_BIT01, HW_H_UINT, 8, 1,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OP_1BIT] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cond: condition code */
+ { "cond", XC16X_OPERAND_COND, HW_H_CC, 7, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_CONDCODE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* icond: indirect condition code */
+ { "icond", XC16X_OPERAND_ICOND, HW_H_CC, 15, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_ICONDCODE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* extcond: extended condition code */
+ { "extcond", XC16X_OPERAND_EXTCOND, HW_H_ECC, 15, 5,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_EXTCCODE] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* memory: 16 bit memory */
+ { "memory", XC16X_OPERAND_MEMORY, HW_H_ADDR, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_MEMORY] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* memgr8: 16 bit memory */
+ { "memgr8", XC16X_OPERAND_MEMGR8, HW_H_MEMGR8, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_MEMGR8] } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* cbit: carry bit */
+ { "cbit", XC16X_OPERAND_CBIT, HW_H_CBIT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
+/* qbit: bit addr */
+ { "qbit", XC16X_OPERAND_QBIT, HW_H_UINT, 7, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_QBIT] } },
+ { 0|A(DOT_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* qlobit: bit addr */
+ { "qlobit", XC16X_OPERAND_QLOBIT, HW_H_UINT, 31, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_QLOBIT] } },
+ { 0|A(DOT_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* qhibit: bit addr */
+ { "qhibit", XC16X_OPERAND_QHIBIT, HW_H_UINT, 27, 4,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_QHIBIT] } },
+ { 0|A(DOT_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* mask8: 8 bit mask */
+ { "mask8", XC16X_OPERAND_MASK8, HW_H_UINT, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_MASK8] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* masklo8: 8 bit mask */
+ { "masklo8", XC16X_OPERAND_MASKLO8, HW_H_UINT, 31, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_DATAHI8] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* pagenum: 10 bit page number */
+ { "pagenum", XC16X_OPERAND_PAGENUM, HW_H_UINT, 25, 10,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_PAGENUM] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* data8: 8 bit data */
+ { "data8", XC16X_OPERAND_DATA8, HW_H_UINT, 23, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_DATA8] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* datahi8: 8 bit data */
+ { "datahi8", XC16X_OPERAND_DATAHI8, HW_H_UINT, 31, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_DATAHI8] } },
+ { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* sgtdisbit: segmentation enable bit */
+ { "sgtdisbit", XC16X_OPERAND_SGTDISBIT, HW_H_SGTDIS, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
+/* upag16: 16 bit unsigned immediate */
+ { "upag16", XC16X_OPERAND_UPAG16, HW_H_UINT, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_UIMM16] } },
+ { 0|A(PAG_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* useg8: 8 bit segment */
+ { "useg8", XC16X_OPERAND_USEG8, HW_H_UINT, 15, 8,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_SEG8] } },
+ { 0|A(SEG_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
+/* useg16: 16 bit address offset */
+ { "useg16", XC16X_OPERAND_USEG16, HW_H_UINT, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OFFSET16] } },
+ { 0|A(SEG_PREFIX)|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* usof16: 16 bit address offset */
+ { "usof16", XC16X_OPERAND_USOF16, HW_H_UINT, 31, 16,
+ { 0, { (const PTR) &xc16x_cgen_ifld_table[XC16X_F_OFFSET16] } },
+ { 0|A(SOF_PREFIX)|A(RELOC)|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+/* hash: # prefix */
+ { "hash", XC16X_OPERAND_HASH, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* dot: . prefix */
+ { "dot", XC16X_OPERAND_DOT, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* pof: pof: prefix */
+ { "pof", XC16X_OPERAND_POF, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* pag: pag: prefix */
+ { "pag", XC16X_OPERAND_PAG, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* sof: sof: prefix */
+ { "sof", XC16X_OPERAND_SOF, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* segm: seg: prefix */
+ { "segm", XC16X_OPERAND_SEGM, HW_H_SINT, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } },
+/* sentinel */
+ { 0, 0, 0, 0, 0,
+ { 0, { (const PTR) 0 } },
+ { 0, { { { (1<<MACH_BASE), 0 } } } } }
+};
+
+#undef A
+
+
+/* The instruction table. */
+
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+
+static const CGEN_IBASE xc16x_cgen_insn_table[MAX_INSNS] =
+{
+ /* Special null first entry.
+ A `num' value of zero is thus invalid.
+ Also, the special `invalid' insn resides here. */
+ { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } } },
+/* add $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_ADDRPOF, "addrpof", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_SUBRPOF, "subrpof", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_ADDBRPOF, "addbrpof", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_SUBBRPOF, "subbrpof", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $reg8,$pag$upag16 */
+ {
+ XC16X_INSN_ADDRPAG, "addrpag", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$pag$upag16 */
+ {
+ XC16X_INSN_SUBRPAG, "subrpag", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$pag$upag16 */
+ {
+ XC16X_INSN_ADDBRPAG, "addbrpag", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$pag$upag16 */
+ {
+ XC16X_INSN_SUBBRPAG, "subbrpag", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_ADDCRPOF, "addcrpof", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_SUBCRPOF, "subcrpof", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_ADDCBRPOF, "addcbrpof", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_SUBCBRPOF, "subcbrpof", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$pag$upag16 */
+ {
+ XC16X_INSN_ADDCRPAG, "addcrpag", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$pag$upag16 */
+ {
+ XC16X_INSN_SUBCRPAG, "subcrpag", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$pag$upag16 */
+ {
+ XC16X_INSN_ADDCBRPAG, "addcbrpag", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$pag$upag16 */
+ {
+ XC16X_INSN_SUBCBRPAG, "subcbrpag", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_ADDRPOFR, "addrpofr", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_SUBRPOFR, "subrpofr", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_ADDBRPOFR, "addbrpofr", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_SUBBRPOFR, "subbrpofr", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_ADDCRPOFR, "addcrpofr", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_SUBCRPOFR, "subcrpofr", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_ADDCBRPOFR, "addcbrpofr", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_SUBCBRPOFR, "subcbrpofr", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $reg8,$hash$pof$uimm16 */
+ {
+ XC16X_INSN_ADDRHPOF, "addrhpof", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$hash$pof$uimm16 */
+ {
+ XC16X_INSN_SUBRHPOF, "subrhpof", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $reg8,$hash$pag$uimm16 */
+ {
+ XC16X_INSN_ADDBRHPOF, "addbrhpof", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$hash$pag$uimm16 */
+ {
+ XC16X_INSN_SUBBRHPOF, "subbrhpof", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_ADDRHPOF3, "addrhpof3", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_SUBRHPOF3, "subrhpof3", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_ADDBRHPAG3, "addbrhpag3", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_SUBBRHPAG3, "subbrhpag3", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_ADDRHPAG3, "addrhpag3", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_SUBRHPAG3, "subrhpag3", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_ADDBRHPOF3, "addbrhpof3", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_SUBBRHPOF3, "subbrhpof3", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$hash$pof$uimm8 */
+ {
+ XC16X_INSN_ADDRBHPOF, "addrbhpof", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$hash$pof$uimm8 */
+ {
+ XC16X_INSN_SUBRBHPOF, "subrbhpof", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$hash$pag$uimm8 */
+ {
+ XC16X_INSN_ADDBRHPAG, "addbrhpag", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$hash$pag$uimm8 */
+ {
+ XC16X_INSN_SUBBRHPAG, "subbrhpag", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$hash$pof$uimm16 */
+ {
+ XC16X_INSN_ADDCRHPOF, "addcrhpof", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$hash$pof$uimm16 */
+ {
+ XC16X_INSN_SUBCRHPOF, "subcrhpof", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$hash$pag$uimm16 */
+ {
+ XC16X_INSN_ADDCBRHPOF, "addcbrhpof", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$hash$pag$uimm16 */
+ {
+ XC16X_INSN_SUBCBRHPOF, "subcbrhpof", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_ADDCRHPOF3, "addcrhpof3", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_SUBCRHPOF3, "subcrhpof3", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_ADDCBRHPAG3, "addcbrhpag3", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_SUBCBRHPAG3, "subcbrhpag3", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_ADDCRHPAG3, "addcrhpag3", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,$hash$pag$uimm3 */
+ {
+ XC16X_INSN_SUBCRHPAG3, "subcrhpag3", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_ADDCBRHPOF3, "addcbrhpof3", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,$hash$pof$uimm3 */
+ {
+ XC16X_INSN_SUBCBRHPOF3, "subcbrhpof3", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$hash$pof$uimm8 */
+ {
+ XC16X_INSN_ADDCRBHPOF, "addcrbhpof", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$hash$pof$uimm8 */
+ {
+ XC16X_INSN_SUBCRBHPOF, "subcrbhpof", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$hash$pag$uimm8 */
+ {
+ XC16X_INSN_ADDCBRHPAG, "addcbrhpag", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$hash$pag$uimm8 */
+ {
+ XC16X_INSN_SUBCBRHPAG, "subcbrhpag", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_ADDRI, "addri", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_SUBRI, "subri", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_ADDBRI, "addbri", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_SUBBRI, "subbri", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_ADDRIM, "addrim", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_SUBRIM, "subrim", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_ADDBRIM, "addbrim", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_SUBBRIM, "subbrim", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_ADDCRI, "addcri", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_SUBCRI, "subcri", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_ADDCBRI, "addcbri", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_SUBCBRI, "subcbri", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_ADDCRIM, "addcrim", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_SUBCRIM, "subcrim", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_ADDCBRIM, "addcbrim", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_SUBCBRIM, "subcbrim", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,$sr */
+ {
+ XC16X_INSN_ADDR, "addr", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,$sr */
+ {
+ XC16X_INSN_SUBR, "subr", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,$srb */
+ {
+ XC16X_INSN_ADDBR, "addbr", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,$srb */
+ {
+ XC16X_INSN_SUBBR, "subbr", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,[$sr2] */
+ {
+ XC16X_INSN_ADD2, "add2", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,[$sr2] */
+ {
+ XC16X_INSN_SUB2, "sub2", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,[$sr2] */
+ {
+ XC16X_INSN_ADDB2, "addb2", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,[$sr2] */
+ {
+ XC16X_INSN_SUBB2, "subb2", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $dr,[$sr2+] */
+ {
+ XC16X_INSN_ADD2I, "add2i", "add", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $dr,[$sr2+] */
+ {
+ XC16X_INSN_SUB2I, "sub2i", "sub", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $drb,[$sr2+] */
+ {
+ XC16X_INSN_ADDB2I, "addb2i", "addb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $drb,[$sr2+] */
+ {
+ XC16X_INSN_SUBB2I, "subb2i", "subb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,$sr */
+ {
+ XC16X_INSN_ADDCR, "addcr", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,$sr */
+ {
+ XC16X_INSN_SUBCR, "subcr", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,$srb */
+ {
+ XC16X_INSN_ADDBCR, "addbcr", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,$srb */
+ {
+ XC16X_INSN_SUBBCR, "subbcr", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,[$sr2] */
+ {
+ XC16X_INSN_ADDCR2, "addcr2", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,[$sr2] */
+ {
+ XC16X_INSN_SUBCR2, "subcr2", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,[$sr2] */
+ {
+ XC16X_INSN_ADDBCR2, "addbcr2", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,[$sr2] */
+ {
+ XC16X_INSN_SUBBCR2, "subbcr2", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $dr,[$sr2+] */
+ {
+ XC16X_INSN_ADDCR2I, "addcr2i", "addc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $dr,[$sr2+] */
+ {
+ XC16X_INSN_SUBCR2I, "subcr2i", "subc", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $drb,[$sr2+] */
+ {
+ XC16X_INSN_ADDBCR2I, "addbcr2i", "addcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $drb,[$sr2+] */
+ {
+ XC16X_INSN_SUBBCR2I, "subbcr2i", "subcb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $regmem8,$memgr8 */
+ {
+ XC16X_INSN_ADDRM2, "addrm2", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $memgr8,$regmem8 */
+ {
+ XC16X_INSN_ADDRM3, "addrm3", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $reg8,$memory */
+ {
+ XC16X_INSN_ADDRM, "addrm", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* add $memory,$reg8 */
+ {
+ XC16X_INSN_ADDRM1, "addrm1", "add", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $regmem8,$memgr8 */
+ {
+ XC16X_INSN_SUBRM3, "subrm3", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $memgr8,$regmem8 */
+ {
+ XC16X_INSN_SUBRM2, "subrm2", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $reg8,$memory */
+ {
+ XC16X_INSN_SUBRM1, "subrm1", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sub $memory,$reg8 */
+ {
+ XC16X_INSN_SUBRM, "subrm", "sub", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_ADDBRM2, "addbrm2", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_ADDBRM3, "addbrm3", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $regb8,$memory */
+ {
+ XC16X_INSN_ADDBRM, "addbrm", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addb $memory,$regb8 */
+ {
+ XC16X_INSN_ADDBRM1, "addbrm1", "addb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_SUBBRM3, "subbrm3", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_SUBBRM2, "subbrm2", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $regb8,$memory */
+ {
+ XC16X_INSN_SUBBRM1, "subbrm1", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subb $memory,$regb8 */
+ {
+ XC16X_INSN_SUBBRM, "subbrm", "subb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $regmem8,$memgr8 */
+ {
+ XC16X_INSN_ADDCRM2, "addcrm2", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $memgr8,$regmem8 */
+ {
+ XC16X_INSN_ADDCRM3, "addcrm3", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $reg8,$memory */
+ {
+ XC16X_INSN_ADDCRM, "addcrm", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addc $memory,$reg8 */
+ {
+ XC16X_INSN_ADDCRM1, "addcrm1", "addc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $regmem8,$memgr8 */
+ {
+ XC16X_INSN_SUBCRM3, "subcrm3", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $memgr8,$regmem8 */
+ {
+ XC16X_INSN_SUBCRM2, "subcrm2", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $reg8,$memory */
+ {
+ XC16X_INSN_SUBCRM1, "subcrm1", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subc $memory,$reg8 */
+ {
+ XC16X_INSN_SUBCRM, "subcrm", "subc", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_ADDCBRM2, "addcbrm2", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_ADDCBRM3, "addcbrm3", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $regb8,$memory */
+ {
+ XC16X_INSN_ADDCBRM, "addcbrm", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* addcb $memory,$regb8 */
+ {
+ XC16X_INSN_ADDCBRM1, "addcbrm1", "addcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_SUBCBRM3, "subcbrm3", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_SUBCBRM2, "subcbrm2", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $regb8,$memory */
+ {
+ XC16X_INSN_SUBCBRM1, "subcbrm1", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* subcb $memory,$regb8 */
+ {
+ XC16X_INSN_SUBCBRM, "subcbrm", "subcb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mul $src1,$src2 */
+ {
+ XC16X_INSN_MULS, "muls", "mul", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mulu $src1,$src2 */
+ {
+ XC16X_INSN_MULU, "mulu", "mulu", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* div $srdiv */
+ {
+ XC16X_INSN_DIV, "div", "div", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* divl $srdiv */
+ {
+ XC16X_INSN_DIVL, "divl", "divl", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* divlu $srdiv */
+ {
+ XC16X_INSN_DIVLU, "divlu", "divlu", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* divu $srdiv */
+ {
+ XC16X_INSN_DIVU, "divu", "divu", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cpl $dr */
+ {
+ XC16X_INSN_CPL, "cpl", "cpl", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cplb $drb */
+ {
+ XC16X_INSN_CPLB, "cplb", "cplb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* neg $dr */
+ {
+ XC16X_INSN_NEG, "neg", "neg", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* negb $drb */
+ {
+ XC16X_INSN_NEGB, "negb", "negb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $dr,$sr */
+ {
+ XC16X_INSN_ANDR, "andr", "and", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $dr,$sr */
+ {
+ XC16X_INSN_ORR, "orr", "or", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $dr,$sr */
+ {
+ XC16X_INSN_XORR, "xorr", "xor", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $drb,$srb */
+ {
+ XC16X_INSN_ANDBR, "andbr", "andb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $drb,$srb */
+ {
+ XC16X_INSN_ORBR, "orbr", "orb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $drb,$srb */
+ {
+ XC16X_INSN_XORBR, "xorbr", "xorb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_ANDRI, "andri", "and", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_ORRI, "orri", "or", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $dr,$hash$uimm3 */
+ {
+ XC16X_INSN_XORRI, "xorri", "xor", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_ANDBRI, "andbri", "andb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_ORBRI, "orbri", "orb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_XORBRI, "xorbri", "xorb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_ANDRIM, "andrim", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_ORRIM, "orrim", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_XORRIM, "xorrim", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_ANDBRIM, "andbrim", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_ORBRIM, "orbrim", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_XORBRIM, "xorbrim", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $dr,[$sr2] */
+ {
+ XC16X_INSN_AND2, "and2", "and", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $dr,[$sr2] */
+ {
+ XC16X_INSN_OR2, "or2", "or", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $dr,[$sr2] */
+ {
+ XC16X_INSN_XOR2, "xor2", "xor", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $drb,[$sr2] */
+ {
+ XC16X_INSN_ANDB2, "andb2", "andb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $drb,[$sr2] */
+ {
+ XC16X_INSN_ORB2, "orb2", "orb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $drb,[$sr2] */
+ {
+ XC16X_INSN_XORB2, "xorb2", "xorb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $dr,[$sr2+] */
+ {
+ XC16X_INSN_AND2I, "and2i", "and", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $dr,[$sr2+] */
+ {
+ XC16X_INSN_OR2I, "or2i", "or", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $dr,[$sr2+] */
+ {
+ XC16X_INSN_XOR2I, "xor2i", "xor", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $drb,[$sr2+] */
+ {
+ XC16X_INSN_ANDB2I, "andb2i", "andb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $drb,[$sr2+] */
+ {
+ XC16X_INSN_ORB2I, "orb2i", "orb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $drb,[$sr2+] */
+ {
+ XC16X_INSN_XORB2I, "xorb2i", "xorb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $pof$reg8,$upof16 */
+ {
+ XC16X_INSN_ANDPOFR, "andpofr", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $pof$reg8,$upof16 */
+ {
+ XC16X_INSN_ORPOFR, "orpofr", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $pof$reg8,$upof16 */
+ {
+ XC16X_INSN_XORPOFR, "xorpofr", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $pof$regb8,$upof16 */
+ {
+ XC16X_INSN_ANDBPOFR, "andbpofr", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $pof$regb8,$upof16 */
+ {
+ XC16X_INSN_ORBPOFR, "orbpofr", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $pof$regb8,$upof16 */
+ {
+ XC16X_INSN_XORBPOFR, "xorbpofr", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_ANDRPOFR, "andrpofr", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_ORRPOFR, "orrpofr", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $pof$upof16,$reg8 */
+ {
+ XC16X_INSN_XORRPOFR, "xorrpofr", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_ANDBRPOFR, "andbrpofr", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_ORBRPOFR, "orbrpofr", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_XORBRPOFR, "xorbrpofr", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $regmem8,$memgr8 */
+ {
+ XC16X_INSN_ANDRM2, "andrm2", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $memgr8,$regmem8 */
+ {
+ XC16X_INSN_ANDRM3, "andrm3", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $reg8,$memory */
+ {
+ XC16X_INSN_ANDRM, "andrm", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* and $memory,$reg8 */
+ {
+ XC16X_INSN_ANDRM1, "andrm1", "and", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $regmem8,$memgr8 */
+ {
+ XC16X_INSN_ORRM3, "orrm3", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $memgr8,$regmem8 */
+ {
+ XC16X_INSN_ORRM2, "orrm2", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $reg8,$memory */
+ {
+ XC16X_INSN_ORRM1, "orrm1", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* or $memory,$reg8 */
+ {
+ XC16X_INSN_ORRM, "orrm", "or", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $regmem8,$memgr8 */
+ {
+ XC16X_INSN_XORRM3, "xorrm3", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $memgr8,$regmem8 */
+ {
+ XC16X_INSN_XORRM2, "xorrm2", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $reg8,$memory */
+ {
+ XC16X_INSN_XORRM1, "xorrm1", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xor $memory,$reg8 */
+ {
+ XC16X_INSN_XORRM, "xorrm", "xor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_ANDBRM2, "andbrm2", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_ANDBRM3, "andbrm3", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $regb8,$memory */
+ {
+ XC16X_INSN_ANDBRM, "andbrm", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* andb $memory,$regb8 */
+ {
+ XC16X_INSN_ANDBRM1, "andbrm1", "andb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_ORBRM3, "orbrm3", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_ORBRM2, "orbrm2", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $regb8,$memory */
+ {
+ XC16X_INSN_ORBRM1, "orbrm1", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* orb $memory,$regb8 */
+ {
+ XC16X_INSN_ORBRM, "orbrm", "orb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_XORBRM3, "xorbrm3", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_XORBRM2, "xorbrm2", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $regb8,$memory */
+ {
+ XC16X_INSN_XORBRM1, "xorbrm1", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* xorb $memory,$regb8 */
+ {
+ XC16X_INSN_XORBRM, "xorbrm", "xorb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dr,$sr */
+ {
+ XC16X_INSN_MOVR, "movr", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $drb,$srb */
+ {
+ XC16X_INSN_MOVRB, "movrb", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dri,$hash$u4 */
+ {
+ XC16X_INSN_MOVRI, "movri", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $srb,$hash$u4 */
+ {
+ XC16X_INSN_MOVBRI, "movbri", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_MOVI, "movi", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_MOVBI, "movbi", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dr,[$sr] */
+ {
+ XC16X_INSN_MOVR2, "movr2", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $drb,[$sr] */
+ {
+ XC16X_INSN_MOVBR2, "movbr2", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$sr],$dr */
+ {
+ XC16X_INSN_MOVRI2, "movri2", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$sr],$drb */
+ {
+ XC16X_INSN_MOVBRI2, "movbri2", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [-$sr],$dr */
+ {
+ XC16X_INSN_MOVRI3, "movri3", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [-$sr],$drb */
+ {
+ XC16X_INSN_MOVBRI3, "movbri3", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dr,[$sr+] */
+ {
+ XC16X_INSN_MOV2I, "mov2i", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $drb,[$sr+] */
+ {
+ XC16X_INSN_MOVB2I, "movb2i", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$dr],[$sr] */
+ {
+ XC16X_INSN_MOV6I, "mov6i", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$dr],[$sr] */
+ {
+ XC16X_INSN_MOVB6I, "movb6i", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$dr+],[$sr] */
+ {
+ XC16X_INSN_MOV7I, "mov7i", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$dr+],[$sr] */
+ {
+ XC16X_INSN_MOVB7I, "movb7i", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$dr],[$sr+] */
+ {
+ XC16X_INSN_MOV8I, "mov8i", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$dr],[$sr+] */
+ {
+ XC16X_INSN_MOVB8I, "movb8i", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dr,[$sr+$hash$uimm16] */
+ {
+ XC16X_INSN_MOV9I, "mov9i", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $drb,[$sr+$hash$uimm16] */
+ {
+ XC16X_INSN_MOVB9I, "movb9i", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$sr+$hash$uimm16],$dr */
+ {
+ XC16X_INSN_MOV10I, "mov10i", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$sr+$hash$uimm16],$drb */
+ {
+ XC16X_INSN_MOVB10I, "movb10i", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov [$src2],$memory */
+ {
+ XC16X_INSN_MOVRI11, "movri11", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb [$src2],$memory */
+ {
+ XC16X_INSN_MOVBRI11, "movbri11", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $memory,[$src2] */
+ {
+ XC16X_INSN_MOVRI12, "movri12", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $memory,[$src2] */
+ {
+ XC16X_INSN_MOVBRI12, "movbri12", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$hash$pof$upof16 */
+ {
+ XC16X_INSN_MOVEHM5, "movehm5", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$hash$pag$upag16 */
+ {
+ XC16X_INSN_MOVEHM6, "movehm6", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$hash$segm$useg16 */
+ {
+ XC16X_INSN_MOVEHM7, "movehm7", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$hash$sof$usof16 */
+ {
+ XC16X_INSN_MOVEHM8, "movehm8", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regb8,$hash$pof$uimm8 */
+ {
+ XC16X_INSN_MOVEHM9, "movehm9", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regoff8,$hash$pag$uimm8 */
+ {
+ XC16X_INSN_MOVEHM10, "movehm10", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$pof$upof16 */
+ {
+ XC16X_INSN_MOVRMP, "movrmp", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_MOVRMP1, "movrmp1", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regoff8,$pag$upag16 */
+ {
+ XC16X_INSN_MOVRMP2, "movrmp2", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regb8,$pag$upag16 */
+ {
+ XC16X_INSN_MOVRMP3, "movrmp3", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $pof$upof16,$regoff8 */
+ {
+ XC16X_INSN_MOVRMP4, "movrmp4", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_MOVRMP5, "movrmp5", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dri,$hash$pof$u4 */
+ {
+ XC16X_INSN_MOVEHM1, "movehm1", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $srb,$hash$pof$u4 */
+ {
+ XC16X_INSN_MOVEHM2, "movehm2", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $dri,$hash$pag$u4 */
+ {
+ XC16X_INSN_MOVEHM3, "movehm3", "mov", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $srb,$hash$pag$u4 */
+ {
+ XC16X_INSN_MOVEHM4, "movehm4", "movb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $regmem8,$memgr8 */
+ {
+ XC16X_INSN_MVE12, "mve12", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $memgr8,$regmem8 */
+ {
+ XC16X_INSN_MVE13, "mve13", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $reg8,$memory */
+ {
+ XC16X_INSN_MOVER12, "mover12", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* mov $memory,$reg8 */
+ {
+ XC16X_INSN_MVR13, "mvr13", "mov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_MVER12, "mver12", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_MVER13, "mver13", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $regb8,$memory */
+ {
+ XC16X_INSN_MOVR12, "movr12", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movb $memory,$regb8 */
+ {
+ XC16X_INSN_MOVR13, "movr13", "movb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $sr,$drb */
+ {
+ XC16X_INSN_MOVBSRR, "movbsrr", "movbs", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $sr,$drb */
+ {
+ XC16X_INSN_MOVBZRR, "movbzrr", "movbz", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $regmem8,$pof$upof16 */
+ {
+ XC16X_INSN_MOVBSRPOFM, "movbsrpofm", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $pof$upof16,$regbmem8 */
+ {
+ XC16X_INSN_MOVBSPOFMR, "movbspofmr", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_MOVBZRPOFM, "movbzrpofm", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $pof$upof16,$regb8 */
+ {
+ XC16X_INSN_MOVBZPOFMR, "movbzpofmr", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $regmem8,$memgr8 */
+ {
+ XC16X_INSN_MOVEBS14, "movebs14", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_MOVEBS15, "movebs15", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $reg8,$memory */
+ {
+ XC16X_INSN_MOVERBS14, "moverbs14", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $memory,$regb8 */
+ {
+ XC16X_INSN_MOVRBS15, "movrbs15", "movbs", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $regmem8,$memgr8 */
+ {
+ XC16X_INSN_MOVEBZ14, "movebz14", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $memgr8,$regbmem8 */
+ {
+ XC16X_INSN_MOVEBZ15, "movebz15", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $reg8,$memory */
+ {
+ XC16X_INSN_MOVERBZ14, "moverbz14", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $memory,$regb8 */
+ {
+ XC16X_INSN_MOVRBZ15, "movrbz15", "movbz", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbs $sr,$drb */
+ {
+ XC16X_INSN_MOVRBS, "movrbs", "movbs", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* movbz $sr,$drb */
+ {
+ XC16X_INSN_MOVRBZ, "movrbz", "movbz", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpa+ $extcond,$caddr */
+ {
+ XC16X_INSN_JMPA0, "jmpa0", "jmpa+", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpa $extcond,$caddr */
+ {
+ XC16X_INSN_JMPA1, "jmpa1", "jmpa", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpa- $extcond,$caddr */
+ {
+ XC16X_INSN_JMPA_, "jmpa-", "jmpa-", 32,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpi $icond,[$sr] */
+ {
+ XC16X_INSN_JMPI, "jmpi", "jmpi", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NENZ, "jmpr_nenz", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_SGT, "jmpr_sgt", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_Z, "jmpr_z", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_V, "jmpr_v", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NV, "jmpr_nv", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_N, "jmpr_n", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NN, "jmpr_nn", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_C, "jmpr_c", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NC, "jmpr_nc", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_EQ, "jmpr_eq", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NE, "jmpr_ne", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_ULT, "jmpr_ult", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_ULE, "jmpr_ule", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_UGE, "jmpr_uge", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_UGT, "jmpr_ugt", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_SLE, "jmpr_sle", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_SGE, "jmpr_sge", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_NET, "jmpr_net", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_UC, "jmpr_uc", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmpr $cond,$rel */
+ {
+ XC16X_INSN_JMPR_SLT, "jmpr_slt", "jmpr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmps $hash$segm$useg8,$hash$sof$usof16 */
+ {
+ XC16X_INSN_JMPSEG, "jmpseg", "jmps", 32,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jmps $seg,$caddr */
+ {
+ XC16X_INSN_JMPS, "jmps", "jmps", 32,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jb $genreg$dot$qlobit,$relhi */
+ {
+ XC16X_INSN_JB, "jb", "jb", 32,
+ { 0|A(UNCOND_CTI)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jbc $genreg$dot$qlobit,$relhi */
+ {
+ XC16X_INSN_JBC, "jbc", "jbc", 32,
+ { 0|A(UNCOND_CTI)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jnb $genreg$dot$qlobit,$relhi */
+ {
+ XC16X_INSN_JNB, "jnb", "jnb", 32,
+ { 0|A(UNCOND_CTI)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* jnbs $genreg$dot$qlobit,$relhi */
+ {
+ XC16X_INSN_JNBS, "jnbs", "jnbs", 32,
+ { 0|A(UNCOND_CTI)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calla+ $extcond,$caddr */
+ {
+ XC16X_INSN_CALLA0, "calla0", "calla+", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calla $extcond,$caddr */
+ {
+ XC16X_INSN_CALLA1, "calla1", "calla", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calla- $extcond,$caddr */
+ {
+ XC16X_INSN_CALLA_, "calla-", "calla-", 32,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calli $icond,[$sr] */
+ {
+ XC16X_INSN_CALLI, "calli", "calli", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* callr $rel */
+ {
+ XC16X_INSN_CALLR, "callr", "callr", 16,
+ { 0|A(COND_CTI)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calls $hash$segm$useg8,$hash$sof$usof16 */
+ {
+ XC16X_INSN_CALLSEG, "callseg", "calls", 32,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* calls $seg,$caddr */
+ {
+ XC16X_INSN_CALLS, "calls", "calls", 32,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* pcall $reg8,$caddr */
+ {
+ XC16X_INSN_PCALL, "pcall", "pcall", 32,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* trap $hash$uimm7 */
+ {
+ XC16X_INSN_TRAP, "trap", "trap", 16,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* ret */
+ {
+ XC16X_INSN_RET, "ret", "ret", 16,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* rets */
+ {
+ XC16X_INSN_RETS, "rets", "rets", 16,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* retp $reg8 */
+ {
+ XC16X_INSN_RETP, "retp", "retp", 16,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* reti */
+ {
+ XC16X_INSN_RETI, "reti", "reti", 16,
+ { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* pop $reg8 */
+ {
+ XC16X_INSN_POP, "pop", "pop", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* push $reg8 */
+ {
+ XC16X_INSN_PUSH, "push", "push", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* scxt $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_SCXTI, "scxti", "scxt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* scxt $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_SCXTRPOFM, "scxtrpofm", "scxt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* scxt $regmem8,$memgr8 */
+ {
+ XC16X_INSN_SCXTMG, "scxtmg", "scxt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* scxt $reg8,$memory */
+ {
+ XC16X_INSN_SCXTM, "scxtm", "scxt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* nop */
+ {
+ XC16X_INSN_NOP, "nop", "nop", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* srst */
+ {
+ XC16X_INSN_SRSTM, "srstm", "srst", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* idle */
+ {
+ XC16X_INSN_IDLEM, "idlem", "idle", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* pwrdn */
+ {
+ XC16X_INSN_PWRDNM, "pwrdnm", "pwrdn", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* diswdt */
+ {
+ XC16X_INSN_DISWDTM, "diswdtm", "diswdt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* enwdt */
+ {
+ XC16X_INSN_ENWDTM, "enwdtm", "enwdt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* einit */
+ {
+ XC16X_INSN_EINITM, "einitm", "einit", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* srvwdt */
+ {
+ XC16X_INSN_SRVWDTM, "srvwdtm", "srvwdt", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* sbrk */
+ {
+ XC16X_INSN_SBRK, "sbrk", "sbrk", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* atomic $hash$uimm2 */
+ {
+ XC16X_INSN_ATOMIC, "atomic", "atomic", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extr $hash$uimm2 */
+ {
+ XC16X_INSN_EXTR, "extr", "extr", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extp $sr,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTP, "extp", "extp", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extp $hash$pagenum,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTP1, "extp1", "extp", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extp $hash$pag$upag16,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTPG1, "extpg1", "extp", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extpr $sr,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTPR, "extpr", "extpr", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extpr $hash$pagenum,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTPR1, "extpr1", "extpr", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* exts $sr,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTS, "exts", "exts", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* exts $hash$seghi8,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTS1, "exts1", "exts", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extsr $sr,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTSR, "extsr", "extsr", 16,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* extsr $hash$seghi8,$hash$uimm2 */
+ {
+ XC16X_INSN_EXTSR1, "extsr1", "extsr", 32,
+ { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* prior $dr,$sr */
+ {
+ XC16X_INSN_PRIOR, "prior", "prior", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $RegNam */
+ {
+ XC16X_INSN_BCLR18, "bclr18", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR0, "bclr0", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR1, "bclr1", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR2, "bclr2", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR3, "bclr3", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR4, "bclr4", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR5, "bclr5", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR6, "bclr6", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR7, "bclr7", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR8, "bclr8", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR9, "bclr9", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR10, "bclr10", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR11, "bclr11", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR12, "bclr12", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR13, "bclr13", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR14, "bclr14", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ XC16X_INSN_BCLR15, "bclr15", "bclr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $RegNam */
+ {
+ XC16X_INSN_BSET19, "bset19", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET0, "bset0", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET1, "bset1", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET2, "bset2", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET3, "bset3", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET4, "bset4", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET5, "bset5", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET6, "bset6", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET7, "bset7", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET8, "bset8", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET9, "bset9", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET10, "bset10", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET11, "bset11", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET12, "bset12", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET13, "bset13", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET14, "bset14", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ XC16X_INSN_BSET15, "bset15", "bset", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bmov $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BMOV, "bmov", "bmov", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bmovn $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BMOVN, "bmovn", "bmovn", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* band $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BAND, "band", "band", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bor $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BOR, "bor", "bor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bxor $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BXOR, "bxor", "bxor", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bcmp $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ XC16X_INSN_BCMP, "bcmp", "bcmp", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bfldl $reg8,$hash$mask8,$hash$datahi8 */
+ {
+ XC16X_INSN_BFLDL, "bfldl", "bfldl", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* bfldh $reg8,$hash$masklo8,$hash$data8 */
+ {
+ XC16X_INSN_BFLDH, "bfldh", "bfldh", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $src1,$src2 */
+ {
+ XC16X_INSN_CMPR, "cmpr", "cmp", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $drb,$srb */
+ {
+ XC16X_INSN_CMPBR, "cmpbr", "cmpb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $src1,$hash$uimm3 */
+ {
+ XC16X_INSN_CMPRI, "cmpri", "cmp", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $drb,$hash$uimm3 */
+ {
+ XC16X_INSN_CMPBRI, "cmpbri", "cmpb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_CMPI, "cmpi", "cmp", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $regb8,$hash$uimm8 */
+ {
+ XC16X_INSN_CMPBI, "cmpbi", "cmpb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $dr,[$sr2] */
+ {
+ XC16X_INSN_CMPR2, "cmpr2", "cmp", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $drb,[$sr2] */
+ {
+ XC16X_INSN_CMPBR2, "cmpbr2", "cmpb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $dr,[$sr2+] */
+ {
+ XC16X_INSN_CMP2I, "cmp2i", "cmp", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $drb,[$sr2+] */
+ {
+ XC16X_INSN_CMPB2I, "cmpb2i", "cmpb", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_CMP04, "cmp04", "cmp", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $regb8,$pof$upof16 */
+ {
+ XC16X_INSN_CMPB4, "cmpb4", "cmpb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $regmem8,$memgr8 */
+ {
+ XC16X_INSN_CMP004, "cmp004", "cmp", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmp $reg8,$memory */
+ {
+ XC16X_INSN_CMP0004, "cmp0004", "cmp", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $regbmem8,$memgr8 */
+ {
+ XC16X_INSN_CMPB04, "cmpb04", "cmpb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpb $regb8,$memory */
+ {
+ XC16X_INSN_CMPB004, "cmpb004", "cmpb", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd1 $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_CMPD1RI, "cmpd1ri", "cmpd1", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd2 $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_CMPD2RI, "cmpd2ri", "cmpd2", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi1 $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_CMPI1RI, "cmpi1ri", "cmpi1", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi2 $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_CMPI2RI, "cmpi2ri", "cmpi2", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd1 $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_CMPD1RIM, "cmpd1rim", "cmpd1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd2 $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_CMPD2RIM, "cmpd2rim", "cmpd2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi1 $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_CMPI1RIM, "cmpi1rim", "cmpi1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi2 $reg8,$hash$uimm16 */
+ {
+ XC16X_INSN_CMPI2RIM, "cmpi2rim", "cmpi2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd1 $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_CMPD1RP, "cmpd1rp", "cmpd1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd2 $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_CMPD2RP, "cmpd2rp", "cmpd2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi1 $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_CMPI1RP, "cmpi1rp", "cmpi1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi2 $reg8,$pof$upof16 */
+ {
+ XC16X_INSN_CMPI2RP, "cmpi2rp", "cmpi2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd1 $regmem8,$memgr8 */
+ {
+ XC16X_INSN_CMPD1RM, "cmpd1rm", "cmpd1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd2 $regmem8,$memgr8 */
+ {
+ XC16X_INSN_CMPD2RM, "cmpd2rm", "cmpd2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi1 $regmem8,$memgr8 */
+ {
+ XC16X_INSN_CMPI1RM, "cmpi1rm", "cmpi1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi2 $regmem8,$memgr8 */
+ {
+ XC16X_INSN_CMPI2RM, "cmpi2rm", "cmpi2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd1 $reg8,$memory */
+ {
+ XC16X_INSN_CMPD1RMI, "cmpd1rmi", "cmpd1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpd2 $reg8,$memory */
+ {
+ XC16X_INSN_CMPD2RMI, "cmpd2rmi", "cmpd2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi1 $reg8,$memory */
+ {
+ XC16X_INSN_CMPI1RMI, "cmpi1rmi", "cmpi1", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* cmpi2 $reg8,$memory */
+ {
+ XC16X_INSN_CMPI2RMI, "cmpi2rmi", "cmpi2", 32,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* shl $dr,$sr */
+ {
+ XC16X_INSN_SHLR, "shlr", "shl", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* shr $dr,$sr */
+ {
+ XC16X_INSN_SHRR, "shrr", "shr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* rol $dr,$sr */
+ {
+ XC16X_INSN_ROLR, "rolr", "rol", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* ror $dr,$sr */
+ {
+ XC16X_INSN_RORR, "rorr", "ror", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* ashr $dr,$sr */
+ {
+ XC16X_INSN_ASHRR, "ashrr", "ashr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* shl $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_SHLRI, "shlri", "shl", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* shr $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_SHRRI, "shrri", "shr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* rol $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_ROLRI, "rolri", "rol", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* ror $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_RORRI, "rorri", "ror", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+/* ashr $sr,$hash$uimm4 */
+ {
+ XC16X_INSN_ASHRRI, "ashrri", "ashr", 16,
+ { 0, { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
+ },
+};
+
+#undef OP
+#undef A
+
+/* Initialize anything needed to be done once, before any cpu_open call. */
+
+static void
+init_tables (void)
+{
+}
+
+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
+static void build_hw_table (CGEN_CPU_TABLE *);
+static void build_ifield_table (CGEN_CPU_TABLE *);
+static void build_operand_table (CGEN_CPU_TABLE *);
+static void build_insn_table (CGEN_CPU_TABLE *);
+static void xc16x_cgen_rebuild_tables (CGEN_CPU_TABLE *);
+
+/* Subroutine of xc16x_cgen_cpu_open to look up a mach via its bfd name. */
+
+static const CGEN_MACH *
+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
+{
+ while (table->name)
+ {
+ if (strcmp (name, table->bfd_name) == 0)
+ return table;
+ ++table;
+ }
+ abort ();
+}
+
+/* Subroutine of xc16x_cgen_cpu_open to build the hardware table. */
+
+static void
+build_hw_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ int machs = cd->machs;
+ const CGEN_HW_ENTRY *init = & xc16x_cgen_hw_table[0];
+ /* MAX_HW is only an upper bound on the number of selected entries.
+ However each entry is indexed by it's enum so there can be holes in
+ the table. */
+ const CGEN_HW_ENTRY **selected =
+ (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
+
+ cd->hw_table.init_entries = init;
+ cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
+ memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
+ /* ??? For now we just use machs to determine which ones we want. */
+ for (i = 0; init[i].name != NULL; ++i)
+ if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
+ & machs)
+ selected[init[i].type] = &init[i];
+ cd->hw_table.entries = selected;
+ cd->hw_table.num_entries = MAX_HW;
+}
+
+/* Subroutine of xc16x_cgen_cpu_open to build the hardware table. */
+
+static void
+build_ifield_table (CGEN_CPU_TABLE *cd)
+{
+ cd->ifld_table = & xc16x_cgen_ifld_table[0];
+}
+
+/* Subroutine of xc16x_cgen_cpu_open to build the hardware table. */
+
+static void
+build_operand_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ int machs = cd->machs;
+ const CGEN_OPERAND *init = & xc16x_cgen_operand_table[0];
+ /* MAX_OPERANDS is only an upper bound on the number of selected entries.
+ However each entry is indexed by it's enum so there can be holes in
+ the table. */
+ const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
+
+ cd->operand_table.init_entries = init;
+ cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
+ memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
+ /* ??? For now we just use mach to determine which ones we want. */
+ for (i = 0; init[i].name != NULL; ++i)
+ if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
+ & machs)
+ selected[init[i].type] = &init[i];
+ cd->operand_table.entries = selected;
+ cd->operand_table.num_entries = MAX_OPERANDS;
+}
+
+/* Subroutine of xc16x_cgen_cpu_open to build the hardware table.
+ ??? This could leave out insns not supported by the specified mach/isa,
+ but that would cause errors like "foo only supported by bar" to become
+ "unknown insn", so for now we include all insns and require the app to
+ do the checking later.
+ ??? On the other hand, parsing of such insns may require their hardware or
+ operand elements to be in the table [which they mightn't be]. */
+
+static void
+build_insn_table (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ const CGEN_IBASE *ib = & xc16x_cgen_insn_table[0];
+ CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
+
+ memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
+ for (i = 0; i < MAX_INSNS; ++i)
+ insns[i].base = &ib[i];
+ cd->insn_table.init_entries = insns;
+ cd->insn_table.entry_size = sizeof (CGEN_IBASE);
+ cd->insn_table.num_init_entries = MAX_INSNS;
+}
+
+/* Subroutine of xc16x_cgen_cpu_open to rebuild the tables. */
+
+static void
+xc16x_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
+{
+ int i;
+ CGEN_BITSET *isas = cd->isas;
+ unsigned int machs = cd->machs;
+
+ cd->int_insn_p = CGEN_INT_INSN_P;
+
+ /* Data derived from the isa spec. */
+#define UNSET (CGEN_SIZE_UNKNOWN + 1)
+ cd->default_insn_bitsize = UNSET;
+ cd->base_insn_bitsize = UNSET;
+ cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
+ cd->max_insn_bitsize = 0;
+ for (i = 0; i < MAX_ISAS; ++i)
+ if (cgen_bitset_contains (isas, i))
+ {
+ const CGEN_ISA *isa = & xc16x_cgen_isa_table[i];
+
+ /* Default insn sizes of all selected isas must be
+ equal or we set the result to 0, meaning "unknown". */
+ if (cd->default_insn_bitsize == UNSET)
+ cd->default_insn_bitsize = isa->default_insn_bitsize;
+ else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
+ ; /* This is ok. */
+ else
+ cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
+
+ /* Base insn sizes of all selected isas must be equal
+ or we set the result to 0, meaning "unknown". */
+ if (cd->base_insn_bitsize == UNSET)
+ cd->base_insn_bitsize = isa->base_insn_bitsize;
+ else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
+ ; /* This is ok. */
+ else
+ cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
+
+ /* Set min,max insn sizes. */
+ if (isa->min_insn_bitsize < cd->min_insn_bitsize)
+ cd->min_insn_bitsize = isa->min_insn_bitsize;
+ if (isa->max_insn_bitsize > cd->max_insn_bitsize)
+ cd->max_insn_bitsize = isa->max_insn_bitsize;
+ }
+
+ /* Data derived from the mach spec. */
+ for (i = 0; i < MAX_MACHS; ++i)
+ if (((1 << i) & machs) != 0)
+ {
+ const CGEN_MACH *mach = & xc16x_cgen_mach_table[i];
+
+ if (mach->insn_chunk_bitsize != 0)
+ {
+ if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
+ {
+ fprintf (stderr, "xc16x_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
+ cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
+ abort ();
+ }
+
+ cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
+ }
+ }
+
+ /* Determine which hw elements are used by MACH. */
+ build_hw_table (cd);
+
+ /* Build the ifield table. */
+ build_ifield_table (cd);
+
+ /* Determine which operands are used by MACH/ISA. */
+ build_operand_table (cd);
+
+ /* Build the instruction table. */
+ build_insn_table (cd);
+}
+
+/* Initialize a cpu table and return a descriptor.
+ It's much like opening a file, and must be the first function called.
+ The arguments are a set of (type/value) pairs, terminated with
+ CGEN_CPU_OPEN_END.
+
+ Currently supported values:
+ CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
+ CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
+ CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
+ CGEN_CPU_OPEN_ENDIAN: specify endian choice
+ CGEN_CPU_OPEN_END: terminates arguments
+
+ ??? Simultaneous multiple isas might not make sense, but it's not (yet)
+ precluded.
+
+ ??? We only support ISO C stdargs here, not K&R.
+ Laziness, plus experiment to see if anything requires K&R - eventually
+ K&R will no longer be supported - e.g. GDB is currently trying this. */
+
+CGEN_CPU_DESC
+xc16x_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
+{
+ CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
+ static int init_p;
+ CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
+ unsigned int machs = 0; /* 0 = "unspecified" */
+ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
+ va_list ap;
+
+ if (! init_p)
+ {
+ init_tables ();
+ init_p = 1;
+ }
+
+ memset (cd, 0, sizeof (*cd));
+
+ va_start (ap, arg_type);
+ while (arg_type != CGEN_CPU_OPEN_END)
+ {
+ switch (arg_type)
+ {
+ case CGEN_CPU_OPEN_ISAS :
+ isas = va_arg (ap, CGEN_BITSET *);
+ break;
+ case CGEN_CPU_OPEN_MACHS :
+ machs = va_arg (ap, unsigned int);
+ break;
+ case CGEN_CPU_OPEN_BFDMACH :
+ {
+ const char *name = va_arg (ap, const char *);
+ const CGEN_MACH *mach =
+ lookup_mach_via_bfd_name (xc16x_cgen_mach_table, name);
+
+ machs |= 1 << mach->num;
+ break;
+ }
+ case CGEN_CPU_OPEN_ENDIAN :
+ endian = va_arg (ap, enum cgen_endian);
+ break;
+ default :
+ fprintf (stderr, "xc16x_cgen_cpu_open: unsupported argument `%d'\n",
+ arg_type);
+ abort (); /* ??? return NULL? */
+ }
+ arg_type = va_arg (ap, enum cgen_cpu_open_arg);
+ }
+ va_end (ap);
+
+ /* Mach unspecified means "all". */
+ if (machs == 0)
+ machs = (1 << MAX_MACHS) - 1;
+ /* Base mach is always selected. */
+ machs |= 1;
+ if (endian == CGEN_ENDIAN_UNKNOWN)
+ {
+ /* ??? If target has only one, could have a default. */
+ fprintf (stderr, "xc16x_cgen_cpu_open: no endianness specified\n");
+ abort ();
+ }
+
+ cd->isas = cgen_bitset_copy (isas);
+ cd->machs = machs;
+ cd->endian = endian;
+ /* FIXME: for the sparc case we can determine insn-endianness statically.
+ The worry here is where both data and insn endian can be independently
+ chosen, in which case this function will need another argument.
+ Actually, will want to allow for more arguments in the future anyway. */
+ cd->insn_endian = endian;
+
+ /* Table (re)builder. */
+ cd->rebuild_tables = xc16x_cgen_rebuild_tables;
+ xc16x_cgen_rebuild_tables (cd);
+
+ /* Default to not allowing signed overflow. */
+ cd->signed_overflow_ok_p = 0;
+
+ return (CGEN_CPU_DESC) cd;
+}
+
+/* Cover fn to xc16x_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
+ MACH_NAME is the bfd name of the mach. */
+
+CGEN_CPU_DESC
+xc16x_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
+{
+ return xc16x_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
+ CGEN_CPU_OPEN_ENDIAN, endian,
+ CGEN_CPU_OPEN_END);
+}
+
+/* Close a cpu table.
+ ??? This can live in a machine independent file, but there's currently
+ no place to put this file (there's no libcgen). libopcodes is the wrong
+ place as some simulator ports use this but they don't use libopcodes. */
+
+void
+xc16x_cgen_cpu_close (CGEN_CPU_DESC cd)
+{
+ unsigned int i;
+ const CGEN_INSN *insns;
+
+ if (cd->macro_insn_table.init_entries)
+ {
+ insns = cd->macro_insn_table.init_entries;
+ for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
+ if (CGEN_INSN_RX ((insns)))
+ regfree (CGEN_INSN_RX (insns));
+ }
+
+ if (cd->insn_table.init_entries)
+ {
+ insns = cd->insn_table.init_entries;
+ for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
+ if (CGEN_INSN_RX (insns))
+ regfree (CGEN_INSN_RX (insns));
+ }
+
+ if (cd->macro_insn_table.init_entries)
+ free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
+
+ if (cd->insn_table.init_entries)
+ free ((CGEN_INSN *) cd->insn_table.init_entries);
+
+ if (cd->hw_table.entries)
+ free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
+
+ if (cd->operand_table.entries)
+ free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
+
+ free (cd);
+}
+
Added: branches/binutils/package/opcodes/xc16x-desc.h
===================================================================
--- branches/binutils/package/opcodes/xc16x-desc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-desc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,451 @@
+/* CPU data header for xc16x.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef XC16X_CPU_H
+#define XC16X_CPU_H
+
+#include "opcode/cgen-bitset.h"
+
+#define CGEN_ARCH xc16x
+
+/* Given symbol S, return xc16x_cgen_<S>. */
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define CGEN_SYM(s) xc16x##_cgen_##s
+#else
+#define CGEN_SYM(s) xc16x/**/_cgen_/**/s
+#endif
+
+
+/* Selected cpu families. */
+#define HAVE_CPU_XC16XBF
+
+#define CGEN_INSN_LSB0_P 1
+
+/* Minimum size of any insn (in bytes). */
+#define CGEN_MIN_INSN_SIZE 2
+
+/* Maximum size of any insn (in bytes). */
+#define CGEN_MAX_INSN_SIZE 4
+
+#define CGEN_INT_INSN_P 1
+
+/* Maximum number of syntax elements in an instruction. */
+#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 15
+
+/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
+ e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
+ we can't hash on everything up to the space. */
+#define CGEN_MNEMONIC_OPERANDS
+
+/* Maximum number of fields in an instruction. */
+#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 8
+
+/* Enums. */
+
+/* Enum declaration for insn format enums. */
+typedef enum insn_op1 {
+ OP1_0, OP1_1, OP1_2, OP1_3
+ , OP1_4, OP1_5, OP1_6, OP1_7
+ , OP1_8, OP1_9, OP1_10, OP1_11
+ , OP1_12, OP1_13, OP1_14, OP1_15
+} INSN_OP1;
+
+/* Enum declaration for op2 enums. */
+typedef enum insn_op2 {
+ OP2_0, OP2_1, OP2_2, OP2_3
+ , OP2_4, OP2_5, OP2_6, OP2_7
+ , OP2_8, OP2_9, OP2_10, OP2_11
+ , OP2_12, OP2_13, OP2_14, OP2_15
+} INSN_OP2;
+
+/* Enum declaration for bit set/clear enums. */
+typedef enum insn_qcond {
+ QBIT_0, QBIT_1, QBIT_2, QBIT_3
+ , QBIT_4, QBIT_5, QBIT_6, QBIT_7
+ , QBIT_8, QBIT_9, QBIT_10, QBIT_11
+ , QBIT_12, QBIT_13, QBIT_14, QBIT_15
+} INSN_QCOND;
+
+/* Enum declaration for relative jump condition code op2 enums. */
+typedef enum insn_rcond {
+ COND_UC = 0, COND_NET = 1, COND_Z = 2, COND_NE_NZ = 3
+ , COND_V = 4, COND_NV = 5, COND_N = 6, COND_NN = 7
+ , COND_C = 8, COND_NC = 9, COND_SGT = 10, COND_SLE = 11
+ , COND_SLT = 12, COND_SGE = 13, COND_UGT = 14, COND_ULE = 15
+ , COND_EQ = 2, COND_NE = 3, COND_ULT = 8, COND_UGE = 9
+} INSN_RCOND;
+
+/* Enum declaration for . */
+typedef enum gr_names {
+ H_GR_R0, H_GR_R1, H_GR_R2, H_GR_R3
+ , H_GR_R4, H_GR_R5, H_GR_R6, H_GR_R7
+ , H_GR_R8, H_GR_R9, H_GR_R10, H_GR_R11
+ , H_GR_R12, H_GR_R13, H_GR_R14, H_GR_R15
+} GR_NAMES;
+
+/* Enum declaration for . */
+typedef enum ext_names {
+ H_EXT_0X1 = 0, H_EXT_0X2 = 1, H_EXT_0X3 = 2, H_EXT_0X4 = 3
+ , H_EXT_1 = 0, H_EXT_2 = 1, H_EXT_3 = 2, H_EXT_4 = 3
+} EXT_NAMES;
+
+/* Enum declaration for . */
+typedef enum psw_names {
+ H_PSW_IEN = 136, H_PSW_R0_11 = 240, H_PSW_R1_11 = 241, H_PSW_R2_11 = 242
+ , H_PSW_R3_11 = 243, H_PSW_R4_11 = 244, H_PSW_R5_11 = 245, H_PSW_R6_11 = 246
+ , H_PSW_R7_11 = 247, H_PSW_R8_11 = 248, H_PSW_R9_11 = 249, H_PSW_R10_11 = 250
+ , H_PSW_R11_11 = 251, H_PSW_R12_11 = 252, H_PSW_R13_11 = 253, H_PSW_R14_11 = 254
+ , H_PSW_R15_11 = 255
+} PSW_NAMES;
+
+/* Enum declaration for . */
+typedef enum grb_names {
+ H_GRB_RL0, H_GRB_RH0, H_GRB_RL1, H_GRB_RH1
+ , H_GRB_RL2, H_GRB_RH2, H_GRB_RL3, H_GRB_RH3
+ , H_GRB_RL4, H_GRB_RH4, H_GRB_RL5, H_GRB_RH5
+ , H_GRB_RL6, H_GRB_RH6, H_GRB_RL7, H_GRB_RH7
+} GRB_NAMES;
+
+/* Enum declaration for . */
+typedef enum conditioncode_names {
+ H_CC_CC_UC = 0, H_CC_CC_NET = 1, H_CC_CC_Z = 2, H_CC_CC_EQ = 2
+ , H_CC_CC_NZ = 3, H_CC_CC_NE = 3, H_CC_CC_V = 4, H_CC_CC_NV = 5
+ , H_CC_CC_N = 6, H_CC_CC_NN = 7, H_CC_CC_ULT = 8, H_CC_CC_UGE = 9
+ , H_CC_CC_C = 8, H_CC_CC_NC = 9, H_CC_CC_SGT = 10, H_CC_CC_SLE = 11
+ , H_CC_CC_SLT = 12, H_CC_CC_SGE = 13, H_CC_CC_UGT = 14, H_CC_CC_ULE = 15
+} CONDITIONCODE_NAMES;
+
+/* Enum declaration for . */
+typedef enum extconditioncode_names {
+ H_ECC_CC_UC = 0, H_ECC_CC_NET = 2, H_ECC_CC_Z = 4, H_ECC_CC_EQ = 4
+ , H_ECC_CC_NZ = 6, H_ECC_CC_NE = 6, H_ECC_CC_V = 8, H_ECC_CC_NV = 10
+ , H_ECC_CC_N = 12, H_ECC_CC_NN = 14, H_ECC_CC_ULT = 16, H_ECC_CC_UGE = 18
+ , H_ECC_CC_C = 16, H_ECC_CC_NC = 18, H_ECC_CC_SGT = 20, H_ECC_CC_SLE = 22
+ , H_ECC_CC_SLT = 24, H_ECC_CC_SGE = 26, H_ECC_CC_UGT = 28, H_ECC_CC_ULE = 30
+ , H_ECC_CC_NUSR0 = 1, H_ECC_CC_NUSR1 = 3, H_ECC_CC_USR0 = 5, H_ECC_CC_USR1 = 7
+} EXTCONDITIONCODE_NAMES;
+
+/* Enum declaration for . */
+typedef enum grb8_names {
+ H_GRB8_DPP0 = 0, H_GRB8_DPP1 = 1, H_GRB8_DPP2 = 2, H_GRB8_DPP3 = 3
+ , H_GRB8_PSW = 136, H_GRB8_CP = 8, H_GRB8_MDL = 7, H_GRB8_MDH = 6
+ , H_GRB8_MDC = 135, H_GRB8_SP = 9, H_GRB8_CSP = 4, H_GRB8_VECSEG = 137
+ , H_GRB8_STKOV = 10, H_GRB8_STKUN = 11, H_GRB8_CPUCON1 = 12, H_GRB8_CPUCON2 = 13
+ , H_GRB8_ZEROS = 142, H_GRB8_ONES = 143, H_GRB8_SPSEG = 134, H_GRB8_TFR = 214
+ , H_GRB8_RL0 = 240, H_GRB8_RH0 = 241, H_GRB8_RL1 = 242, H_GRB8_RH1 = 243
+ , H_GRB8_RL2 = 244, H_GRB8_RH2 = 245, H_GRB8_RL3 = 246, H_GRB8_RH3 = 247
+ , H_GRB8_RL4 = 248, H_GRB8_RH4 = 249, H_GRB8_RL5 = 250, H_GRB8_RH5 = 251
+ , H_GRB8_RL6 = 252, H_GRB8_RH6 = 253, H_GRB8_RL7 = 254, H_GRB8_RH7 = 255
+} GRB8_NAMES;
+
+/* Enum declaration for . */
+typedef enum r8_names {
+ H_R8_DPP0 = 0, H_R8_DPP1 = 1, H_R8_DPP2 = 2, H_R8_DPP3 = 3
+ , H_R8_PSW = 136, H_R8_CP = 8, H_R8_MDL = 7, H_R8_MDH = 6
+ , H_R8_MDC = 135, H_R8_SP = 9, H_R8_CSP = 4, H_R8_VECSEG = 137
+ , H_R8_STKOV = 10, H_R8_STKUN = 11, H_R8_CPUCON1 = 12, H_R8_CPUCON2 = 13
+ , H_R8_ZEROS = 142, H_R8_ONES = 143, H_R8_SPSEG = 134, H_R8_TFR = 214
+ , H_R8_R0 = 240, H_R8_R1 = 241, H_R8_R2 = 242, H_R8_R3 = 243
+ , H_R8_R4 = 244, H_R8_R5 = 245, H_R8_R6 = 246, H_R8_R7 = 247
+ , H_R8_R8 = 248, H_R8_R9 = 249, H_R8_R10 = 250, H_R8_R11 = 251
+ , H_R8_R12 = 252, H_R8_R13 = 253, H_R8_R14 = 254, H_R8_R15 = 255
+} R8_NAMES;
+
+/* Enum declaration for . */
+typedef enum regmem8_names {
+ H_REGMEM8_DPP0 = 0, H_REGMEM8_DPP1 = 1, H_REGMEM8_DPP2 = 2, H_REGMEM8_DPP3 = 3
+ , H_REGMEM8_PSW = 136, H_REGMEM8_CP = 8, H_REGMEM8_MDL = 7, H_REGMEM8_MDH = 6
+ , H_REGMEM8_MDC = 135, H_REGMEM8_SP = 9, H_REGMEM8_CSP = 4, H_REGMEM8_VECSEG = 137
+ , H_REGMEM8_STKOV = 10, H_REGMEM8_STKUN = 11, H_REGMEM8_CPUCON1 = 12, H_REGMEM8_CPUCON2 = 13
+ , H_REGMEM8_ZEROS = 142, H_REGMEM8_ONES = 143, H_REGMEM8_SPSEG = 134, H_REGMEM8_TFR = 214
+ , H_REGMEM8_R0 = 240, H_REGMEM8_R1 = 241, H_REGMEM8_R2 = 242, H_REGMEM8_R3 = 243
+ , H_REGMEM8_R4 = 244, H_REGMEM8_R5 = 245, H_REGMEM8_R6 = 246, H_REGMEM8_R7 = 247
+ , H_REGMEM8_R8 = 248, H_REGMEM8_R9 = 249, H_REGMEM8_R10 = 250, H_REGMEM8_R11 = 251
+ , H_REGMEM8_R12 = 252, H_REGMEM8_R13 = 253, H_REGMEM8_R14 = 254, H_REGMEM8_R15 = 255
+} REGMEM8_NAMES;
+
+/* Enum declaration for . */
+typedef enum regdiv8_names {
+ H_REGDIV8_R0 = 0, H_REGDIV8_R1 = 17, H_REGDIV8_R2 = 34, H_REGDIV8_R3 = 51
+ , H_REGDIV8_R4 = 68, H_REGDIV8_R5 = 85, H_REGDIV8_R6 = 102, H_REGDIV8_R7 = 119
+ , H_REGDIV8_R8 = 136, H_REGDIV8_R9 = 153, H_REGDIV8_R10 = 170, H_REGDIV8_R11 = 187
+ , H_REGDIV8_R12 = 204, H_REGDIV8_R13 = 221, H_REGDIV8_R14 = 238, H_REGDIV8_R15 = 255
+} REGDIV8_NAMES;
+
+/* Enum declaration for . */
+typedef enum reg0_name {
+ H_REG0_0X1 = 1, H_REG0_0X2 = 2, H_REG0_0X3 = 3, H_REG0_0X4 = 4
+ , H_REG0_0X5 = 5, H_REG0_0X6 = 6, H_REG0_0X7 = 7, H_REG0_0X8 = 8
+ , H_REG0_0X9 = 9, H_REG0_0XA = 10, H_REG0_0XB = 11, H_REG0_0XC = 12
+ , H_REG0_0XD = 13, H_REG0_0XE = 14, H_REG0_0XF = 15, H_REG0_1 = 1
+ , H_REG0_2 = 2, H_REG0_3 = 3, H_REG0_4 = 4, H_REG0_5 = 5
+ , H_REG0_6 = 6, H_REG0_7 = 7, H_REG0_8 = 8, H_REG0_9 = 9
+ , H_REG0_10 = 10, H_REG0_11 = 11, H_REG0_12 = 12, H_REG0_13 = 13
+ , H_REG0_14 = 14, H_REG0_15 = 15
+} REG0_NAME;
+
+/* Enum declaration for . */
+typedef enum reg0_name1 {
+ H_REG01_0X1 = 1, H_REG01_0X2 = 2, H_REG01_0X3 = 3, H_REG01_0X4 = 4
+ , H_REG01_0X5 = 5, H_REG01_0X6 = 6, H_REG01_0X7 = 7, H_REG01_1 = 1
+ , H_REG01_2 = 2, H_REG01_3 = 3, H_REG01_4 = 4, H_REG01_5 = 5
+ , H_REG01_6 = 6, H_REG01_7 = 7
+} REG0_NAME1;
+
+/* Enum declaration for . */
+typedef enum regbmem8_names {
+ H_REGBMEM8_DPP0 = 0, H_REGBMEM8_DPP1 = 1, H_REGBMEM8_DPP2 = 2, H_REGBMEM8_DPP3 = 3
+ , H_REGBMEM8_PSW = 136, H_REGBMEM8_CP = 8, H_REGBMEM8_MDL = 7, H_REGBMEM8_MDH = 6
+ , H_REGBMEM8_MDC = 135, H_REGBMEM8_SP = 9, H_REGBMEM8_CSP = 4, H_REGBMEM8_VECSEG = 137
+ , H_REGBMEM8_STKOV = 10, H_REGBMEM8_STKUN = 11, H_REGBMEM8_CPUCON1 = 12, H_REGBMEM8_CPUCON2 = 13
+ , H_REGBMEM8_ZEROS = 142, H_REGBMEM8_ONES = 143, H_REGBMEM8_SPSEG = 134, H_REGBMEM8_TFR = 214
+ , H_REGBMEM8_RL0 = 240, H_REGBMEM8_RH0 = 241, H_REGBMEM8_RL1 = 242, H_REGBMEM8_RH1 = 243
+ , H_REGBMEM8_RL2 = 244, H_REGBMEM8_RH2 = 245, H_REGBMEM8_RL3 = 246, H_REGBMEM8_RH3 = 247
+ , H_REGBMEM8_RL4 = 248, H_REGBMEM8_RH4 = 249, H_REGBMEM8_RL5 = 250, H_REGBMEM8_RH5 = 251
+ , H_REGBMEM8_RL6 = 252, H_REGBMEM8_RH6 = 253, H_REGBMEM8_RL7 = 254, H_REGBMEM8_RH7 = 255
+} REGBMEM8_NAMES;
+
+/* Enum declaration for . */
+typedef enum memgr8_names {
+ H_MEMGR8_DPP0 = 65024, H_MEMGR8_DPP1 = 65026, H_MEMGR8_DPP2 = 65028, H_MEMGR8_DPP3 = 65030
+ , H_MEMGR8_PSW = 65296, H_MEMGR8_CP = 65040, H_MEMGR8_MDL = 65038, H_MEMGR8_MDH = 65036
+ , H_MEMGR8_MDC = 65294, H_MEMGR8_SP = 65042, H_MEMGR8_CSP = 65032, H_MEMGR8_VECSEG = 65298
+ , H_MEMGR8_STKOV = 65044, H_MEMGR8_STKUN = 65046, H_MEMGR8_CPUCON1 = 65048, H_MEMGR8_CPUCON2 = 65050
+ , H_MEMGR8_ZEROS = 65308, H_MEMGR8_ONES = 65310, H_MEMGR8_SPSEG = 65292, H_MEMGR8_TFR = 65452
+} MEMGR8_NAMES;
+
+/* Attributes. */
+
+/* Enum declaration for machine type selection. */
+typedef enum mach_attr {
+ MACH_BASE, MACH_XC16X, MACH_MAX
+} MACH_ATTR;
+
+/* Enum declaration for instruction set selection. */
+typedef enum isa_attr {
+ ISA_XC16X, ISA_MAX
+} ISA_ATTR;
+
+/* Enum declaration for parallel execution pipeline selection. */
+typedef enum pipe_attr {
+ PIPE_NONE, PIPE_OS
+} PIPE_ATTR;
+
+/* Number of architecture variants. */
+#define MAX_ISAS 1
+#define MAX_MACHS ((int) MACH_MAX)
+
+/* Ifield support. */
+
+/* Ifield attribute indices. */
+
+/* Enum declaration for cgen_ifld attrs. */
+typedef enum cgen_ifld_attr {
+ CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
+ , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_RELOC, CGEN_IFLD_END_BOOLS
+ , CGEN_IFLD_START_NBOOLS = 31, CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
+} CGEN_IFLD_ATTR;
+
+/* Number of non-boolean elements in cgen_ifld_attr. */
+#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
+
+/* cgen_ifld attribute accessor macros. */
+#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_RELOC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RELOC)) != 0)
+
+/* Enum declaration for xc16x ifield types. */
+typedef enum ifield_type {
+ XC16X_F_NIL, XC16X_F_ANYOF, XC16X_F_OP1, XC16X_F_OP2
+ , XC16X_F_CONDCODE, XC16X_F_ICONDCODE, XC16X_F_RCOND, XC16X_F_QCOND
+ , XC16X_F_EXTCCODE, XC16X_F_R0, XC16X_F_R1, XC16X_F_R2
+ , XC16X_F_R3, XC16X_F_R4, XC16X_F_UIMM2, XC16X_F_UIMM3
+ , XC16X_F_UIMM4, XC16X_F_UIMM7, XC16X_F_UIMM8, XC16X_F_UIMM16
+ , XC16X_F_MEMORY, XC16X_F_MEMGR8, XC16X_F_REL8, XC16X_F_RELHI8
+ , XC16X_F_REG8, XC16X_F_REGMEM8, XC16X_F_REGOFF8, XC16X_F_REGHI8
+ , XC16X_F_REGB8, XC16X_F_SEG8, XC16X_F_SEGNUM8, XC16X_F_MASK8
+ , XC16X_F_PAGENUM, XC16X_F_DATAHI8, XC16X_F_DATA8, XC16X_F_OFFSET16
+ , XC16X_F_OP_BIT1, XC16X_F_OP_BIT2, XC16X_F_OP_BIT4, XC16X_F_OP_BIT3
+ , XC16X_F_OP_2BIT, XC16X_F_OP_BITONE, XC16X_F_OP_ONEBIT, XC16X_F_OP_1BIT
+ , XC16X_F_OP_LBIT4, XC16X_F_OP_LBIT2, XC16X_F_OP_BIT8, XC16X_F_OP_BIT16
+ , XC16X_F_QBIT, XC16X_F_QLOBIT, XC16X_F_QHIBIT, XC16X_F_QLOBIT2
+ , XC16X_F_POF, XC16X_F_MAX
+} IFIELD_TYPE;
+
+#define MAX_IFLD ((int) XC16X_F_MAX)
+
+/* Hardware attribute indices. */
+
+/* Enum declaration for cgen_hw attrs. */
+typedef enum cgen_hw_attr {
+ CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
+ , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
+} CGEN_HW_ATTR;
+
+/* Number of non-boolean elements in cgen_hw_attr. */
+#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
+
+/* cgen_hw attribute accessor macros. */
+#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
+#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0)
+
+/* Enum declaration for xc16x hardware types. */
+typedef enum cgen_hw_type {
+ HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
+ , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_EXT
+ , HW_H_PSW, HW_H_GRB, HW_H_CC, HW_H_ECC
+ , HW_H_GRB8, HW_H_R8, HW_H_REGMEM8, HW_H_REGDIV8
+ , HW_H_R0, HW_H_R01, HW_H_REGBMEM8, HW_H_MEMGR8
+ , HW_H_COND, HW_H_CBIT, HW_H_SGTDIS, HW_MAX
+} CGEN_HW_TYPE;
+
+#define MAX_HW ((int) HW_MAX)
+
+/* Operand attribute indices. */
+
+/* Enum declaration for cgen_operand attrs. */
+typedef enum cgen_operand_attr {
+ CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
+ , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
+ , CGEN_OPERAND_RELOC, CGEN_OPERAND_HASH_PREFIX, CGEN_OPERAND_DOT_PREFIX, CGEN_OPERAND_POF_PREFIX
+ , CGEN_OPERAND_PAG_PREFIX, CGEN_OPERAND_SOF_PREFIX, CGEN_OPERAND_SEG_PREFIX, CGEN_OPERAND_END_BOOLS
+ , CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
+} CGEN_OPERAND_ATTR;
+
+/* Number of non-boolean elements in cgen_operand_attr. */
+#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
+
+/* cgen_operand attribute accessor macros. */
+#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_RELOC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELOC)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_HASH_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_HASH_PREFIX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_DOT_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_DOT_PREFIX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_POF_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_POF_PREFIX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_PAG_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PAG_PREFIX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SOF_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SOF_PREFIX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SEG_PREFIX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEG_PREFIX)) != 0)
+
+/* Enum declaration for xc16x operand types. */
+typedef enum cgen_operand_type {
+ XC16X_OPERAND_PC, XC16X_OPERAND_SR, XC16X_OPERAND_DR, XC16X_OPERAND_DRI
+ , XC16X_OPERAND_SRB, XC16X_OPERAND_DRB, XC16X_OPERAND_SR2, XC16X_OPERAND_SRC1
+ , XC16X_OPERAND_SRC2, XC16X_OPERAND_SRDIV, XC16X_OPERAND_REGNAM, XC16X_OPERAND_UIMM2
+ , XC16X_OPERAND_UIMM3, XC16X_OPERAND_UIMM4, XC16X_OPERAND_UIMM7, XC16X_OPERAND_UIMM8
+ , XC16X_OPERAND_UIMM16, XC16X_OPERAND_UPOF16, XC16X_OPERAND_REG8, XC16X_OPERAND_REGMEM8
+ , XC16X_OPERAND_REGBMEM8, XC16X_OPERAND_REGOFF8, XC16X_OPERAND_REGHI8, XC16X_OPERAND_REGB8
+ , XC16X_OPERAND_GENREG, XC16X_OPERAND_SEG, XC16X_OPERAND_SEGHI8, XC16X_OPERAND_CADDR
+ , XC16X_OPERAND_REL, XC16X_OPERAND_RELHI, XC16X_OPERAND_CONDBIT, XC16X_OPERAND_BIT1
+ , XC16X_OPERAND_BIT2, XC16X_OPERAND_BIT4, XC16X_OPERAND_LBIT4, XC16X_OPERAND_LBIT2
+ , XC16X_OPERAND_BIT8, XC16X_OPERAND_U4, XC16X_OPERAND_BITONE, XC16X_OPERAND_BIT01
+ , XC16X_OPERAND_COND, XC16X_OPERAND_ICOND, XC16X_OPERAND_EXTCOND, XC16X_OPERAND_MEMORY
+ , XC16X_OPERAND_MEMGR8, XC16X_OPERAND_CBIT, XC16X_OPERAND_QBIT, XC16X_OPERAND_QLOBIT
+ , XC16X_OPERAND_QHIBIT, XC16X_OPERAND_MASK8, XC16X_OPERAND_MASKLO8, XC16X_OPERAND_PAGENUM
+ , XC16X_OPERAND_DATA8, XC16X_OPERAND_DATAHI8, XC16X_OPERAND_SGTDISBIT, XC16X_OPERAND_UPAG16
+ , XC16X_OPERAND_USEG8, XC16X_OPERAND_USEG16, XC16X_OPERAND_USOF16, XC16X_OPERAND_HASH
+ , XC16X_OPERAND_DOT, XC16X_OPERAND_POF, XC16X_OPERAND_PAG, XC16X_OPERAND_SOF
+ , XC16X_OPERAND_SEGM, XC16X_OPERAND_MAX
+} CGEN_OPERAND_TYPE;
+
+/* Number of operands types. */
+#define MAX_OPERANDS 65
+
+/* Maximum number of operands referenced by any insn. */
+#define MAX_OPERAND_INSTANCES 8
+
+/* Insn attribute indices. */
+
+/* Enum declaration for cgen_insn attrs. */
+typedef enum cgen_insn_attr {
+ CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
+ , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
+ , CGEN_INSN_MACH, CGEN_INSN_PIPE, CGEN_INSN_END_NBOOLS
+} CGEN_INSN_ATTR;
+
+/* Number of non-boolean elements in cgen_insn_attr. */
+#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
+
+/* cgen_insn attribute accessor macros. */
+#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_INSN_PIPE_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_PIPE-CGEN_INSN_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0)
+#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0)
+
+/* cgen.h uses things we just defined. */
+#include "opcode/cgen.h"
+
+extern const struct cgen_ifld xc16x_cgen_ifld_table[];
+
+/* Attributes. */
+extern const CGEN_ATTR_TABLE xc16x_cgen_hardware_attr_table[];
+extern const CGEN_ATTR_TABLE xc16x_cgen_ifield_attr_table[];
+extern const CGEN_ATTR_TABLE xc16x_cgen_operand_attr_table[];
+extern const CGEN_ATTR_TABLE xc16x_cgen_insn_attr_table[];
+
+/* Hardware decls. */
+
+extern CGEN_KEYWORD xc16x_cgen_opval_gr_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_ext_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_psw_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_grb_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_conditioncode_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_extconditioncode_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_grb8_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_r8_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_regmem8_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_regdiv8_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_reg0_name;
+extern CGEN_KEYWORD xc16x_cgen_opval_reg0_name1;
+extern CGEN_KEYWORD xc16x_cgen_opval_regbmem8_names;
+extern CGEN_KEYWORD xc16x_cgen_opval_memgr8_names;
+
+extern const CGEN_HW_ENTRY xc16x_cgen_hw_table[];
+
+
+
+#endif /* XC16X_CPU_H */
Added: branches/binutils/package/opcodes/xc16x-dis.c
===================================================================
--- branches/binutils/package/opcodes/xc16x-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,804 @@
+/* Disassembler interface for targets using CGEN. -*- C -*-
+ CGEN: Cpu tools GENerator
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-dis.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "dis-asm.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "libiberty.h"
+#include "xc16x-desc.h"
+#include "xc16x-opc.h"
+#include "opintl.h"
+
+/* Default text to print if an instruction isn't recognized. */
+#define UNKNOWN_INSN_MSG _("*unknown*")
+
+static void print_normal
+ (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
+static void print_address
+ (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
+static void print_keyword
+ (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
+static void print_insn_normal
+ (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
+static int print_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
+static int default_print_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
+static int read_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
+ unsigned long *);
+
+/* -- disassembler routines inserted here. */
+
+/* -- dis.c */
+
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
+ do \
+ { \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
+ info->fprintf_func (info->stream, "."); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
+ info->fprintf_func (info->stream, "#pof:"); \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
+ info->fprintf_func (info->stream, "#pag:"); \
+ } \
+ while (0)
+
+/* Print a 'pof:' prefix to an operand. */
+
+static void
+print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'pag:' prefix to an operand. */
+
+static void
+print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* Print a 'sof:' prefix to an operand. */
+
+static void
+print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "sof:");
+}
+
+/* Print a 'seg:' prefix to an operand. */
+
+static void
+print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "seg:");
+}
+
+/* Print a '#' prefix to an operand. */
+
+static void
+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "#");
+}
+
+/* Print a '.' prefix to an operand. */
+
+static void
+print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+}
+
+/* -- */
+
+void xc16x_cgen_print_operand
+ (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
+
+/* Main entry point for printing operands.
+ XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
+ of dis-asm.h on cgen.h.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `print_insn_normal', but keeping it
+ separate makes clear the interface between `print_insn_normal' and each of
+ the handlers. */
+
+void
+xc16x_cgen_print_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ void * xinfo,
+ CGEN_FIELDS *fields,
+ void const *attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ int length)
+{
+ disassemble_info *info = (disassemble_info *) xinfo;
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ print_keyword (cd, info, & xc16x_cgen_opval_psw_names, fields->f_reg8, 0);
+ break;
+ case XC16X_OPERAND_BIT01 :
+ print_normal (cd, info, fields->f_op_1bit, 0, pc, length);
+ break;
+ case XC16X_OPERAND_BIT1 :
+ print_normal (cd, info, fields->f_op_bit1, 0, pc, length);
+ break;
+ case XC16X_OPERAND_BIT2 :
+ print_normal (cd, info, fields->f_op_bit2, 0, pc, length);
+ break;
+ case XC16X_OPERAND_BIT4 :
+ print_normal (cd, info, fields->f_op_bit4, 0, pc, length);
+ break;
+ case XC16X_OPERAND_BIT8 :
+ print_normal (cd, info, fields->f_op_bit8, 0, pc, length);
+ break;
+ case XC16X_OPERAND_BITONE :
+ print_normal (cd, info, fields->f_op_onebit, 0, pc, length);
+ break;
+ case XC16X_OPERAND_CADDR :
+ print_address (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
+ break;
+ case XC16X_OPERAND_COND :
+ print_keyword (cd, info, & xc16x_cgen_opval_conditioncode_names, fields->f_condcode, 0);
+ break;
+ case XC16X_OPERAND_DATA8 :
+ print_normal (cd, info, fields->f_data8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ print_normal (cd, info, fields->f_datahi8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_DOT :
+ print_dot (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_DR :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r1, 0);
+ break;
+ case XC16X_OPERAND_DRB :
+ print_keyword (cd, info, & xc16x_cgen_opval_grb_names, fields->f_r1, 0);
+ break;
+ case XC16X_OPERAND_DRI :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r4, 0);
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ print_keyword (cd, info, & xc16x_cgen_opval_extconditioncode_names, fields->f_extccode, 0);
+ break;
+ case XC16X_OPERAND_GENREG :
+ print_keyword (cd, info, & xc16x_cgen_opval_r8_names, fields->f_regb8, 0);
+ break;
+ case XC16X_OPERAND_HASH :
+ print_hash (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_ICOND :
+ print_keyword (cd, info, & xc16x_cgen_opval_conditioncode_names, fields->f_icondcode, 0);
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ print_normal (cd, info, fields->f_op_lbit2, 0, pc, length);
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ print_normal (cd, info, fields->f_op_lbit4, 0, pc, length);
+ break;
+ case XC16X_OPERAND_MASK8 :
+ print_normal (cd, info, fields->f_mask8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ print_normal (cd, info, fields->f_datahi8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_memgr8_names, fields->f_memgr8, 0);
+ break;
+ case XC16X_OPERAND_MEMORY :
+ print_address (cd, info, fields->f_memory, 0, pc, length);
+ break;
+ case XC16X_OPERAND_PAG :
+ print_pag (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ print_normal (cd, info, fields->f_pagenum, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_POF :
+ print_pof (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_QBIT :
+ print_normal (cd, info, fields->f_qbit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ print_normal (cd, info, fields->f_qhibit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ print_normal (cd, info, fields->f_qlobit, 0|(1<<CGEN_OPERAND_DOT_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_REG8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_r8_names, fields->f_reg8, 0);
+ break;
+ case XC16X_OPERAND_REGB8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_grb8_names, fields->f_regb8, 0);
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_regbmem8_names, fields->f_regmem8, 0);
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_r8_names, fields->f_reghi8, 0);
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_regmem8_names, fields->f_regmem8, 0);
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ print_keyword (cd, info, & xc16x_cgen_opval_r8_names, fields->f_regoff8, 0);
+ break;
+ case XC16X_OPERAND_REL :
+ print_normal (cd, info, fields->f_rel8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+ break;
+ case XC16X_OPERAND_RELHI :
+ print_normal (cd, info, fields->f_relhi8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+ break;
+ case XC16X_OPERAND_SEG :
+ print_normal (cd, info, fields->f_seg8, 0, pc, length);
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ print_normal (cd, info, fields->f_segnum8, 0, pc, length);
+ break;
+ case XC16X_OPERAND_SEGM :
+ print_seg (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_SOF :
+ print_sof (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+ break;
+ case XC16X_OPERAND_SR :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r2, 0);
+ break;
+ case XC16X_OPERAND_SR2 :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r0, 0);
+ break;
+ case XC16X_OPERAND_SRB :
+ print_keyword (cd, info, & xc16x_cgen_opval_grb_names, fields->f_r2, 0);
+ break;
+ case XC16X_OPERAND_SRC1 :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r1, 0);
+ break;
+ case XC16X_OPERAND_SRC2 :
+ print_keyword (cd, info, & xc16x_cgen_opval_gr_names, fields->f_r2, 0);
+ break;
+ case XC16X_OPERAND_SRDIV :
+ print_keyword (cd, info, & xc16x_cgen_opval_regdiv8_names, fields->f_reg8, 0);
+ break;
+ case XC16X_OPERAND_U4 :
+ print_keyword (cd, info, & xc16x_cgen_opval_reg0_name, fields->f_uimm4, 0);
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ print_keyword (cd, info, & xc16x_cgen_opval_ext_names, fields->f_uimm2, 0|(1<<CGEN_OPERAND_HASH_PREFIX));
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ print_keyword (cd, info, & xc16x_cgen_opval_reg0_name1, fields->f_uimm3, 0|(1<<CGEN_OPERAND_HASH_PREFIX));
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ print_normal (cd, info, fields->f_uimm7, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_PAG_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ print_address (cd, info, fields->f_memory, 0|(1<<CGEN_OPERAND_POF_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_USEG16 :
+ print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SEG_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
+ break;
+ case XC16X_OPERAND_USEG8 :
+ print_normal (cd, info, fields->f_seg8, 0|(1<<CGEN_OPERAND_SEG_PREFIX), pc, length);
+ break;
+ case XC16X_OPERAND_USOF16 :
+ print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SOF_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+cgen_print_fn * const xc16x_cgen_print_handlers[] =
+{
+ print_insn_normal,
+};
+
+
+void
+xc16x_cgen_init_dis (CGEN_CPU_DESC cd)
+{
+ xc16x_cgen_init_opcode_table (cd);
+ xc16x_cgen_init_ibld_table (cd);
+ cd->print_handlers = & xc16x_cgen_print_handlers[0];
+ cd->print_operand = xc16x_cgen_print_operand;
+}
+
+
+/* Default print handler. */
+
+static void
+print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ long value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+#ifdef CGEN_PRINT_NORMAL
+ CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
+#endif
+
+ /* Print the operand as directed by the attributes. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
+ ; /* nothing to do */
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
+ (*info->fprintf_func) (info->stream, "%ld", value);
+ else
+ (*info->fprintf_func) (info->stream, "0x%lx", value);
+}
+
+/* Default address handler. */
+
+static void
+print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ bfd_vma value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+#ifdef CGEN_PRINT_ADDRESS
+ CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
+#endif
+
+ /* Print the operand as directed by the attributes. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
+ ; /* Nothing to do. */
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
+ (*info->print_address_func) (value, info);
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
+ (*info->print_address_func) (value, info);
+ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
+ (*info->fprintf_func) (info->stream, "%ld", (long) value);
+ else
+ (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
+}
+
+/* Keyword print handler. */
+
+static void
+print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ CGEN_KEYWORD *keyword_table,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+ const CGEN_KEYWORD_ENTRY *ke;
+
+ ke = cgen_keyword_lookup_value (keyword_table, value);
+ if (ke != NULL)
+ (*info->fprintf_func) (info->stream, "%s", ke->name);
+ else
+ (*info->fprintf_func) (info->stream, "???");
+}
+
+/* Default insn printer.
+
+ DIS_INFO is defined as `void *' so the disassembler needn't know anything
+ about disassemble_info. */
+
+static void
+print_insn_normal (CGEN_CPU_DESC cd,
+ void *dis_info,
+ const CGEN_INSN *insn,
+ CGEN_FIELDS *fields,
+ bfd_vma pc,
+ int length)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ disassemble_info *info = (disassemble_info *) dis_info;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+
+ CGEN_INIT_PRINT (cd);
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
+ {
+ if (CGEN_SYNTAX_MNEMONIC_P (*syn))
+ {
+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
+ continue;
+ }
+ if (CGEN_SYNTAX_CHAR_P (*syn))
+ {
+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
+ continue;
+ }
+
+ /* We have an operand. */
+ xc16x_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
+ fields, CGEN_INSN_ATTRS (insn), pc, length);
+ }
+}
+
+/* Subroutine of print_insn. Reads an insn into the given buffers and updates
+ the extract info.
+ Returns 0 if all is well, non-zero otherwise. */
+
+static int
+read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ int buflen,
+ CGEN_EXTRACT_INFO *ex_info,
+ unsigned long *insn_value)
+{
+ int status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return -1;
+ }
+
+ ex_info->dis_info = info;
+ ex_info->valid = (1 << buflen) - 1;
+ ex_info->insn_bytes = buf;
+
+ *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
+ return 0;
+}
+
+/* Utility to print an insn.
+ BUF is the base part of the insn, target byte order, BUFLEN bytes long.
+ The result is the size of the insn in bytes or zero for an unknown insn
+ or -1 if an error occurs fetching data (memory_error_func will have
+ been called). */
+
+static int
+print_insn (CGEN_CPU_DESC cd,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ unsigned int buflen)
+{
+ CGEN_INSN_INT insn_value;
+ const CGEN_INSN_LIST *insn_list;
+ CGEN_EXTRACT_INFO ex_info;
+ int basesize;
+
+ /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
+ basesize = cd->base_insn_bitsize < buflen * 8 ?
+ cd->base_insn_bitsize : buflen * 8;
+ insn_value = cgen_get_insn_value (cd, buf, basesize);
+
+
+ /* Fill in ex_info fields like read_insn would. Don't actually call
+ read_insn, since the incoming buffer is already read (and possibly
+ modified a la m32r). */
+ ex_info.valid = (1 << buflen) - 1;
+ ex_info.dis_info = info;
+ ex_info.insn_bytes = buf;
+
+ /* The instructions are stored in hash lists.
+ Pick the first one and keep trying until we find the right one. */
+
+ insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
+ while (insn_list != NULL)
+ {
+ const CGEN_INSN *insn = insn_list->insn;
+ CGEN_FIELDS fields;
+ int length;
+ unsigned long insn_value_cropped;
+
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* Not needed as insn shouldn't be in hash lists if not supported. */
+ /* Supported by this cpu? */
+ if (! xc16x_cgen_insn_supported (cd, insn))
+ {
+ insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+ continue;
+ }
+#endif
+
+ /* Basic bit mask must be correct. */
+ /* ??? May wish to allow target to defer this check until the extract
+ handler. */
+
+ /* Base size may exceed this instruction's size. Extract the
+ relevant part from the buffer. */
+ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
+ info->endian == BFD_ENDIAN_BIG);
+ else
+ insn_value_cropped = insn_value;
+
+ if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
+ == CGEN_INSN_BASE_VALUE (insn))
+ {
+ /* Printing is handled in two passes. The first pass parses the
+ machine insn and extracts the fields. The second pass prints
+ them. */
+
+ /* Make sure the entire insn is loaded into insn_value, if it
+ can fit. */
+ if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ {
+ unsigned long full_insn_value;
+ int rc = read_insn (cd, pc, info, buf,
+ CGEN_INSN_BITSIZE (insn) / 8,
+ & ex_info, & full_insn_value);
+ if (rc != 0)
+ return rc;
+ length = CGEN_EXTRACT_FN (cd, insn)
+ (cd, insn, &ex_info, full_insn_value, &fields, pc);
+ }
+ else
+ length = CGEN_EXTRACT_FN (cd, insn)
+ (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
+
+ /* Length < 0 -> error. */
+ if (length < 0)
+ return length;
+ if (length > 0)
+ {
+ CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
+ /* Length is in bits, result is in bytes. */
+ return length / 8;
+ }
+ }
+
+ insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+ }
+
+ return 0;
+}
+
+/* Default value for CGEN_PRINT_INSN.
+ The result is the size of the insn in bytes or zero for an unknown insn
+ or -1 if an error occured fetching bytes. */
+
+#ifndef CGEN_PRINT_INSN
+#define CGEN_PRINT_INSN default_print_insn
+#endif
+
+static int
+default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
+{
+ bfd_byte buf[CGEN_MAX_INSN_SIZE];
+ int buflen;
+ int status;
+
+ /* Attempt to read the base part of the insn. */
+ buflen = cd->base_insn_bitsize / 8;
+ status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+ /* Try again with the minimum part, if min < base. */
+ if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
+ {
+ buflen = cd->min_insn_bitsize / 8;
+ status = (*info->read_memory_func) (pc, buf, buflen, info);
+ }
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return -1;
+ }
+
+ return print_insn (cd, pc, info, buf, buflen);
+}
+
+/* Main entry point.
+ Print one instruction from PC on INFO->STREAM.
+ Return the size of the instruction (in bytes). */
+
+typedef struct cpu_desc_list
+{
+ struct cpu_desc_list *next;
+ CGEN_BITSET *isa;
+ int mach;
+ int endian;
+ CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
+int
+print_insn_xc16x (bfd_vma pc, disassemble_info *info)
+{
+ static cpu_desc_list *cd_list = 0;
+ cpu_desc_list *cl = 0;
+ static CGEN_CPU_DESC cd = 0;
+ static CGEN_BITSET *prev_isa;
+ static int prev_mach;
+ static int prev_endian;
+ int length;
+ CGEN_BITSET *isa;
+ int mach;
+ int endian = (info->endian == BFD_ENDIAN_BIG
+ ? CGEN_ENDIAN_BIG
+ : CGEN_ENDIAN_LITTLE);
+ enum bfd_architecture arch;
+
+ /* ??? gdb will set mach but leave the architecture as "unknown" */
+#ifndef CGEN_BFD_ARCH
+#define CGEN_BFD_ARCH bfd_arch_xc16x
+#endif
+ arch = info->arch;
+ if (arch == bfd_arch_unknown)
+ arch = CGEN_BFD_ARCH;
+
+ /* There's no standard way to compute the machine or isa number
+ so we leave it to the target. */
+#ifdef CGEN_COMPUTE_MACH
+ mach = CGEN_COMPUTE_MACH (info);
+#else
+ mach = info->mach;
+#endif
+
+#ifdef CGEN_COMPUTE_ISA
+ {
+ static CGEN_BITSET *permanent_isa;
+
+ if (!permanent_isa)
+ permanent_isa = cgen_bitset_create (MAX_ISAS);
+ isa = permanent_isa;
+ cgen_bitset_clear (isa);
+ cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
+ }
+#else
+ isa = info->insn_sets;
+#endif
+
+ /* If we've switched cpu's, try to find a handle we've used before */
+ if (cd
+ && (cgen_bitset_compare (isa, prev_isa) != 0
+ || mach != prev_mach
+ || endian != prev_endian))
+ {
+ cd = 0;
+ for (cl = cd_list; cl; cl = cl->next)
+ {
+ if (cgen_bitset_compare (cl->isa, isa) == 0 &&
+ cl->mach == mach &&
+ cl->endian == endian)
+ {
+ cd = cl->cd;
+ prev_isa = cd->isas;
+ break;
+ }
+ }
+ }
+
+ /* If we haven't initialized yet, initialize the opcode table. */
+ if (! cd)
+ {
+ const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
+ const char *mach_name;
+
+ if (!arch_type)
+ abort ();
+ mach_name = arch_type->printable_name;
+
+ prev_isa = cgen_bitset_copy (isa);
+ prev_mach = mach;
+ prev_endian = endian;
+ cd = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
+ CGEN_CPU_OPEN_BFDMACH, mach_name,
+ CGEN_CPU_OPEN_ENDIAN, prev_endian,
+ CGEN_CPU_OPEN_END);
+ if (!cd)
+ abort ();
+
+ /* Save this away for future reference. */
+ cl = xmalloc (sizeof (struct cpu_desc_list));
+ cl->cd = cd;
+ cl->isa = prev_isa;
+ cl->mach = mach;
+ cl->endian = endian;
+ cl->next = cd_list;
+ cd_list = cl;
+
+ xc16x_cgen_init_dis (cd);
+ }
+
+ /* We try to have as much common code as possible.
+ But at this point some targets need to take over. */
+ /* ??? Some targets may need a hook elsewhere. Try to avoid this,
+ but if not possible try to move this hook elsewhere rather than
+ have two hooks. */
+ length = CGEN_PRINT_INSN (cd, pc, info);
+ if (length > 0)
+ return length;
+ if (length < 0)
+ return -1;
+
+ (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
+ return cd->default_insn_bitsize / 8;
+}
Added: branches/binutils/package/opcodes/xc16x-ibld.c
===================================================================
--- branches/binutils/package/opcodes/xc16x-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,1811 @@
+/* Instruction building/extraction support for xc16x. -*- C -*-
+
+ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
+ - the resultant file is machine generated, cgen-ibld.in isn't
+
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
+ Free Software Foundation, Inc.
+
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
+
+#include "sysdep.h"
+#include <stdio.h>
+#include "ansidecl.h"
+#include "dis-asm.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "xc16x-desc.h"
+#include "xc16x-opc.h"
+#include "opintl.h"
+#include "safe-ctype.h"
+
+#undef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#undef max
+#define max(a,b) ((a) > (b) ? (a) : (b))
+
+/* Used by the ifield rtx function. */
+#define FLD(f) (fields->f)
+
+static const char * insert_normal
+ (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
+ unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
+static const char * insert_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *,
+ CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
+static int extract_normal
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
+ unsigned int, unsigned int, unsigned int, unsigned int,
+ unsigned int, unsigned int, bfd_vma, long *);
+static int extract_insn_normal
+ (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
+ CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
+#if CGEN_INT_INSN_P
+static void put_insn_int_value
+ (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
+#endif
+#if ! CGEN_INT_INSN_P
+static CGEN_INLINE void insert_1
+ (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
+static CGEN_INLINE int fill_cache
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
+static CGEN_INLINE long extract_1
+ (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
+#endif
+
+/* Operand insertion. */
+
+#if ! CGEN_INT_INSN_P
+
+/* Subroutine of insert_normal. */
+
+static CGEN_INLINE void
+insert_1 (CGEN_CPU_DESC cd,
+ unsigned long value,
+ int start,
+ int length,
+ int word_length,
+ unsigned char *bufp)
+{
+ unsigned long x,mask;
+ int shift;
+
+ x = cgen_get_insn_value (cd, bufp, word_length);
+
+ /* Written this way to avoid undefined behaviour. */
+ mask = (((1L << (length - 1)) - 1) << 1) | 1;
+ if (CGEN_INSN_LSB0_P)
+ shift = (start + 1) - length;
+ else
+ shift = (word_length - (start + length));
+ x = (x & ~(mask << shift)) | ((value & mask) << shift);
+
+ cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+}
+
+#endif /* ! CGEN_INT_INSN_P */
+
+/* Default insertion routine.
+
+ ATTRS is a mask of the boolean attributes.
+ WORD_OFFSET is the offset in bits from the start of the insn of the value.
+ WORD_LENGTH is the length of the word in bits in which the value resides.
+ START is the starting bit number in the word, architecture origin.
+ LENGTH is the length of VALUE in bits.
+ TOTAL_LENGTH is the total length of the insn in bits.
+
+ The result is an error message or NULL if success. */
+
+/* ??? This duplicates functionality with bfd's howto table and
+ bfd_install_relocation. */
+/* ??? This doesn't handle bfd_vma's. Create another function when
+ necessary. */
+
+static const char *
+insert_normal (CGEN_CPU_DESC cd,
+ long value,
+ unsigned int attrs,
+ unsigned int word_offset,
+ unsigned int start,
+ unsigned int length,
+ unsigned int word_length,
+ unsigned int total_length,
+ CGEN_INSN_BYTES_PTR buffer)
+{
+ static char errbuf[100];
+ /* Written this way to avoid undefined behaviour. */
+ unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ /* If LENGTH is zero, this operand doesn't contribute to the value. */
+ if (length == 0)
+ return NULL;
+
+ if (word_length > 32)
+ abort ();
+
+ /* For architectures with insns smaller than the base-insn-bitsize,
+ word_length may be too big. */
+ if (cd->min_insn_bitsize < cd->base_insn_bitsize)
+ {
+ if (word_offset == 0
+ && word_length > total_length)
+ word_length = total_length;
+ }
+
+ /* Ensure VALUE will fit. */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
+ {
+ long minval = - (1L << (length - 1));
+ unsigned long maxval = mask;
+
+ if ((value > 0 && (unsigned long) value > maxval)
+ || value < minval)
+ {
+ /* xgettext:c-format */
+ sprintf (errbuf,
+ _("operand out of range (%ld not between %ld and %lu)"),
+ value, minval, maxval);
+ return errbuf;
+ }
+ }
+ else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
+ {
+ unsigned long maxval = mask;
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
+ {
+ /* xgettext:c-format */
+ sprintf (errbuf,
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
+ return errbuf;
+ }
+ }
+ else
+ {
+ if (! cgen_signed_overflow_ok_p (cd))
+ {
+ long minval = - (1L << (length - 1));
+ long maxval = (1L << (length - 1)) - 1;
+
+ if (value < minval || value > maxval)
+ {
+ sprintf
+ /* xgettext:c-format */
+ (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
+ value, minval, maxval);
+ return errbuf;
+ }
+ }
+ }
+
+#if CGEN_INT_INSN_P
+
+ {
+ int shift;
+
+ if (CGEN_INSN_LSB0_P)
+ shift = (word_offset + start + 1) - length;
+ else
+ shift = total_length - (word_offset + start + length);
+ *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
+ }
+
+#else /* ! CGEN_INT_INSN_P */
+
+ {
+ unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
+
+ insert_1 (cd, value, start, length, word_length, bufp);
+ }
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ return NULL;
+}
+
+/* Default insn builder (insert handler).
+ The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
+ that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
+ recorded in host byte order, otherwise BUFFER is an array of bytes
+ and the value is recorded in target byte order).
+ The result is an error message or NULL if success. */
+
+static const char *
+insert_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN * insn,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ unsigned long value;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
+
+ CGEN_INIT_INSERT (cd);
+ value = CGEN_INSN_BASE_VALUE (insn);
+
+ /* If we're recording insns as numbers (rather than a string of bytes),
+ target byte order handling is deferred until later. */
+
+#if CGEN_INT_INSN_P
+
+ put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
+ CGEN_FIELDS_BITSIZE (fields), value);
+
+#else
+
+ cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
+ (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+ value);
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ /* ??? It would be better to scan the format's fields.
+ Still need to be able to insert a value based on the operand though;
+ e.g. storing a branch displacement that got resolved later.
+ Needs more thought first. */
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
+ {
+ const char *errmsg;
+
+ if (CGEN_SYNTAX_CHAR_P (* syn))
+ continue;
+
+ errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
+ fields, buffer, pc);
+ if (errmsg)
+ return errmsg;
+ }
+
+ return NULL;
+}
+
+#if CGEN_INT_INSN_P
+/* Cover function to store an insn value into an integral insn. Must go here
+ because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
+
+static void
+put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ CGEN_INSN_BYTES_PTR buf,
+ int length,
+ int insn_length,
+ CGEN_INSN_INT value)
+{
+ /* For architectures with insns smaller than the base-insn-bitsize,
+ length may be too big. */
+ if (length > insn_length)
+ *buf = value;
+ else
+ {
+ int shift = insn_length - length;
+ /* Written this way to avoid undefined behaviour. */
+ CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
+ }
+}
+#endif
+
+/* Operand extraction. */
+
+#if ! CGEN_INT_INSN_P
+
+/* Subroutine of extract_normal.
+ Ensure sufficient bytes are cached in EX_INFO.
+ OFFSET is the offset in bytes from the start of the insn of the value.
+ BYTES is the length of the needed value.
+ Returns 1 for success, 0 for failure. */
+
+static CGEN_INLINE int
+fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ CGEN_EXTRACT_INFO *ex_info,
+ int offset,
+ int bytes,
+ bfd_vma pc)
+{
+ /* It's doubtful that the middle part has already been fetched so
+ we don't optimize that case. kiss. */
+ unsigned int mask;
+ disassemble_info *info = (disassemble_info *) ex_info->dis_info;
+
+ /* First do a quick check. */
+ mask = (1 << bytes) - 1;
+ if (((ex_info->valid >> offset) & mask) == mask)
+ return 1;
+
+ /* Search for the first byte we need to read. */
+ for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
+ if (! (mask & ex_info->valid))
+ break;
+
+ if (bytes)
+ {
+ int status;
+
+ pc += offset;
+ status = (*info->read_memory_func)
+ (pc, ex_info->insn_bytes + offset, bytes, info);
+
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, pc, info);
+ return 0;
+ }
+
+ ex_info->valid |= ((1 << bytes) - 1) << offset;
+ }
+
+ return 1;
+}
+
+/* Subroutine of extract_normal. */
+
+static CGEN_INLINE long
+extract_1 (CGEN_CPU_DESC cd,
+ CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
+ int start,
+ int length,
+ int word_length,
+ unsigned char *bufp,
+ bfd_vma pc ATTRIBUTE_UNUSED)
+{
+ unsigned long x;
+ int shift;
+
+ x = cgen_get_insn_value (cd, bufp, word_length);
+
+ if (CGEN_INSN_LSB0_P)
+ shift = (start + 1) - length;
+ else
+ shift = (word_length - (start + length));
+ return x >> shift;
+}
+
+#endif /* ! CGEN_INT_INSN_P */
+
+/* Default extraction routine.
+
+ INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
+ or sometimes less for cases like the m32r where the base insn size is 32
+ but some insns are 16 bits.
+ ATTRS is a mask of the boolean attributes. We only need `SIGNED',
+ but for generality we take a bitmask of all of them.
+ WORD_OFFSET is the offset in bits from the start of the insn of the value.
+ WORD_LENGTH is the length of the word in bits in which the value resides.
+ START is the starting bit number in the word, architecture origin.
+ LENGTH is the length of VALUE in bits.
+ TOTAL_LENGTH is the total length of the insn in bits.
+
+ Returns 1 for success, 0 for failure. */
+
+/* ??? The return code isn't properly used. wip. */
+
+/* ??? This doesn't handle bfd_vma's. Create another function when
+ necessary. */
+
+static int
+extract_normal (CGEN_CPU_DESC cd,
+#if ! CGEN_INT_INSN_P
+ CGEN_EXTRACT_INFO *ex_info,
+#else
+ CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
+#endif
+ CGEN_INSN_INT insn_value,
+ unsigned int attrs,
+ unsigned int word_offset,
+ unsigned int start,
+ unsigned int length,
+ unsigned int word_length,
+ unsigned int total_length,
+#if ! CGEN_INT_INSN_P
+ bfd_vma pc,
+#else
+ bfd_vma pc ATTRIBUTE_UNUSED,
+#endif
+ long *valuep)
+{
+ long value, mask;
+
+ /* If LENGTH is zero, this operand doesn't contribute to the value
+ so give it a standard value of zero. */
+ if (length == 0)
+ {
+ *valuep = 0;
+ return 1;
+ }
+
+ if (word_length > 32)
+ abort ();
+
+ /* For architectures with insns smaller than the insn-base-bitsize,
+ word_length may be too big. */
+ if (cd->min_insn_bitsize < cd->base_insn_bitsize)
+ {
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
+ }
+
+ /* Does the value reside in INSN_VALUE, and at the right alignment? */
+
+ if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
+ {
+ if (CGEN_INSN_LSB0_P)
+ value = insn_value >> ((word_offset + start + 1) - length);
+ else
+ value = insn_value >> (total_length - ( word_offset + start + length));
+ }
+
+#if ! CGEN_INT_INSN_P
+
+ else
+ {
+ unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
+
+ if (word_length > 32)
+ abort ();
+
+ if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
+ return 0;
+
+ value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
+ }
+
+#endif /* ! CGEN_INT_INSN_P */
+
+ /* Written this way to avoid undefined behaviour. */
+ mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ value &= mask;
+ /* sign extend? */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
+ && (value & (1L << (length - 1))))
+ value |= ~mask;
+
+ *valuep = value;
+
+ return 1;
+}
+
+/* Default insn extractor.
+
+ INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
+ The extracted fields are stored in FIELDS.
+ EX_INFO is used to handle reading variable length insns.
+ Return the length of the insn in bits, or 0 if no match,
+ or -1 if an error occurs fetching data (memory_error_func will have
+ been called). */
+
+static int
+extract_insn_normal (CGEN_CPU_DESC cd,
+ const CGEN_INSN *insn,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS *fields,
+ bfd_vma pc)
+{
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
+
+ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
+
+ CGEN_INIT_EXTRACT (cd);
+
+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
+ {
+ int length;
+
+ if (CGEN_SYNTAX_CHAR_P (*syn))
+ continue;
+
+ length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
+ ex_info, insn_value, fields, pc);
+ if (length <= 0)
+ return length;
+ }
+
+ /* We recognized and successfully extracted this insn. */
+ return CGEN_INSN_BITSIZE (insn);
+}
+
+/* Machine generated code added here. */
+
+const char * xc16x_cgen_insert_operand
+ (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
+
+/* Main entry point for operand insertion.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `parse_insn_normal', but keeping it
+ separate makes clear the interface between `parse_insn_normal' and each of
+ the handlers. It's also needed by GAS to insert operands that couldn't be
+ resolved during parsing. */
+
+const char *
+xc16x_cgen_insert_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc ATTRIBUTE_UNUSED)
+{
+ const char * errmsg = NULL;
+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BIT01 :
+ errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BIT1 :
+ errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BIT2 :
+ errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BIT4 :
+ errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BIT8 :
+ errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_BITONE :
+ errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_CADDR :
+ errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_COND :
+ errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_DATA8 :
+ errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_DOT :
+ break;
+ case XC16X_OPERAND_DR :
+ errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_DRB :
+ errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_DRI :
+ errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_GENREG :
+ errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_HASH :
+ break;
+ case XC16X_OPERAND_ICOND :
+ errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_MASK8 :
+ errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_MEMORY :
+ errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_PAG :
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_POF :
+ break;
+ case XC16X_OPERAND_QBIT :
+ errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REG8 :
+ errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REGB8 :
+ errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_REL :
+ errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_RELHI :
+ errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SEG :
+ errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SEGM :
+ break;
+ case XC16X_OPERAND_SOF :
+ break;
+ case XC16X_OPERAND_SR :
+ errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SR2 :
+ errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SRB :
+ errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SRC1 :
+ errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SRC2 :
+ errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_SRDIV :
+ errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_U4 :
+ errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_USEG16 :
+ errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_USEG8 :
+ errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
+ break;
+ case XC16X_OPERAND_USOF16 :
+ errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
+ opindex);
+ abort ();
+ }
+
+ return errmsg;
+}
+
+int xc16x_cgen_extract_operand
+ (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
+
+/* Main entry point for operand extraction.
+ The result is <= 0 for error, >0 for success.
+ ??? Actual values aren't well defined right now.
+
+ This function is basically just a big switch statement. Earlier versions
+ used tables to look up the function to use, but
+ - if the table contains both assembler and disassembler functions then
+ the disassembler contains much of the assembler and vice-versa,
+ - there's a lot of inlining possibilities as things grow,
+ - using a switch statement avoids the function call overhead.
+
+ This function could be moved into `print_insn_normal', but keeping it
+ separate makes clear the interface between `print_insn_normal' and each of
+ the handlers. */
+
+int
+xc16x_cgen_extract_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS * fields,
+ bfd_vma pc)
+{
+ /* Assume success (for those operands that are nops). */
+ int length = 1;
+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_BIT01 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit);
+ break;
+ case XC16X_OPERAND_BIT1 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1);
+ break;
+ case XC16X_OPERAND_BIT2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2);
+ break;
+ case XC16X_OPERAND_BIT4 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4);
+ break;
+ case XC16X_OPERAND_BIT8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8);
+ break;
+ case XC16X_OPERAND_BITONE :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit);
+ break;
+ case XC16X_OPERAND_CADDR :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
+ break;
+ case XC16X_OPERAND_COND :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode);
+ break;
+ case XC16X_OPERAND_DATA8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8);
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
+ break;
+ case XC16X_OPERAND_DOT :
+ break;
+ case XC16X_OPERAND_DR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_DRB :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_DRI :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4);
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode);
+ break;
+ case XC16X_OPERAND_GENREG :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
+ break;
+ case XC16X_OPERAND_HASH :
+ break;
+ case XC16X_OPERAND_ICOND :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode);
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2);
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4);
+ break;
+ case XC16X_OPERAND_MASK8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8);
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8);
+ break;
+ case XC16X_OPERAND_MEMORY :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
+ break;
+ case XC16X_OPERAND_PAG :
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum);
+ break;
+ case XC16X_OPERAND_POF :
+ break;
+ case XC16X_OPERAND_QBIT :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit);
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit);
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit);
+ break;
+ case XC16X_OPERAND_REG8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_REGB8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8);
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8);
+ break;
+ case XC16X_OPERAND_REL :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8);
+ break;
+ case XC16X_OPERAND_RELHI :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8);
+ break;
+ case XC16X_OPERAND_SEG :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8);
+ break;
+ case XC16X_OPERAND_SEGM :
+ break;
+ case XC16X_OPERAND_SOF :
+ break;
+ case XC16X_OPERAND_SR :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SR2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0);
+ break;
+ case XC16X_OPERAND_SRB :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SRC1 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
+ break;
+ case XC16X_OPERAND_SRC2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
+ break;
+ case XC16X_OPERAND_SRDIV :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
+ break;
+ case XC16X_OPERAND_U4 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2);
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3);
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7);
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8);
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
+ break;
+ case XC16X_OPERAND_USEG16 :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
+ break;
+ case XC16X_OPERAND_USEG8 :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
+ break;
+ case XC16X_OPERAND_USOF16 :
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
+ opindex);
+ abort ();
+ }
+
+ return length;
+}
+
+cgen_insert_fn * const xc16x_cgen_insert_handlers[] =
+{
+ insert_insn_normal,
+};
+
+cgen_extract_fn * const xc16x_cgen_extract_handlers[] =
+{
+ extract_insn_normal,
+};
+
+int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+
+/* Getting values from cgen_fields is handled by a collection of functions.
+ They are distinguished by the type of the VALUE argument they return.
+ TODO: floating point, inlining support, remove cases where result type
+ not appropriate. */
+
+int
+xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
+{
+ int value;
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_BIT01 :
+ value = fields->f_op_1bit;
+ break;
+ case XC16X_OPERAND_BIT1 :
+ value = fields->f_op_bit1;
+ break;
+ case XC16X_OPERAND_BIT2 :
+ value = fields->f_op_bit2;
+ break;
+ case XC16X_OPERAND_BIT4 :
+ value = fields->f_op_bit4;
+ break;
+ case XC16X_OPERAND_BIT8 :
+ value = fields->f_op_bit8;
+ break;
+ case XC16X_OPERAND_BITONE :
+ value = fields->f_op_onebit;
+ break;
+ case XC16X_OPERAND_CADDR :
+ value = fields->f_offset16;
+ break;
+ case XC16X_OPERAND_COND :
+ value = fields->f_condcode;
+ break;
+ case XC16X_OPERAND_DATA8 :
+ value = fields->f_data8;
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ value = fields->f_datahi8;
+ break;
+ case XC16X_OPERAND_DOT :
+ value = 0;
+ break;
+ case XC16X_OPERAND_DR :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_DRB :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_DRI :
+ value = fields->f_r4;
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ value = fields->f_extccode;
+ break;
+ case XC16X_OPERAND_GENREG :
+ value = fields->f_regb8;
+ break;
+ case XC16X_OPERAND_HASH :
+ value = 0;
+ break;
+ case XC16X_OPERAND_ICOND :
+ value = fields->f_icondcode;
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ value = fields->f_op_lbit2;
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ value = fields->f_op_lbit4;
+ break;
+ case XC16X_OPERAND_MASK8 :
+ value = fields->f_mask8;
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ value = fields->f_datahi8;
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ value = fields->f_memgr8;
+ break;
+ case XC16X_OPERAND_MEMORY :
+ value = fields->f_memory;
+ break;
+ case XC16X_OPERAND_PAG :
+ value = 0;
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ value = fields->f_pagenum;
+ break;
+ case XC16X_OPERAND_POF :
+ value = 0;
+ break;
+ case XC16X_OPERAND_QBIT :
+ value = fields->f_qbit;
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ value = fields->f_qhibit;
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ value = fields->f_qlobit;
+ break;
+ case XC16X_OPERAND_REG8 :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_REGB8 :
+ value = fields->f_regb8;
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ value = fields->f_regmem8;
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ value = fields->f_reghi8;
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ value = fields->f_regmem8;
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ value = fields->f_regoff8;
+ break;
+ case XC16X_OPERAND_REL :
+ value = fields->f_rel8;
+ break;
+ case XC16X_OPERAND_RELHI :
+ value = fields->f_relhi8;
+ break;
+ case XC16X_OPERAND_SEG :
+ value = fields->f_seg8;
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ value = fields->f_segnum8;
+ break;
+ case XC16X_OPERAND_SEGM :
+ value = 0;
+ break;
+ case XC16X_OPERAND_SOF :
+ value = 0;
+ break;
+ case XC16X_OPERAND_SR :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SR2 :
+ value = fields->f_r0;
+ break;
+ case XC16X_OPERAND_SRB :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SRC1 :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_SRC2 :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SRDIV :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_U4 :
+ value = fields->f_uimm4;
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ value = fields->f_uimm16;
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ value = fields->f_uimm2;
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ value = fields->f_uimm3;
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ value = fields->f_uimm4;
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ value = fields->f_uimm7;
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ value = fields->f_uimm8;
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ value = fields->f_uimm16;
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ value = fields->f_memory;
+ break;
+ case XC16X_OPERAND_USEG16 :
+ value = fields->f_offset16;
+ break;
+ case XC16X_OPERAND_USEG8 :
+ value = fields->f_seg8;
+ break;
+ case XC16X_OPERAND_USOF16 :
+ value = fields->f_offset16;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
+ opindex);
+ abort ();
+ }
+
+ return value;
+}
+
+bfd_vma
+xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
+{
+ bfd_vma value;
+
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_BIT01 :
+ value = fields->f_op_1bit;
+ break;
+ case XC16X_OPERAND_BIT1 :
+ value = fields->f_op_bit1;
+ break;
+ case XC16X_OPERAND_BIT2 :
+ value = fields->f_op_bit2;
+ break;
+ case XC16X_OPERAND_BIT4 :
+ value = fields->f_op_bit4;
+ break;
+ case XC16X_OPERAND_BIT8 :
+ value = fields->f_op_bit8;
+ break;
+ case XC16X_OPERAND_BITONE :
+ value = fields->f_op_onebit;
+ break;
+ case XC16X_OPERAND_CADDR :
+ value = fields->f_offset16;
+ break;
+ case XC16X_OPERAND_COND :
+ value = fields->f_condcode;
+ break;
+ case XC16X_OPERAND_DATA8 :
+ value = fields->f_data8;
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ value = fields->f_datahi8;
+ break;
+ case XC16X_OPERAND_DOT :
+ value = 0;
+ break;
+ case XC16X_OPERAND_DR :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_DRB :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_DRI :
+ value = fields->f_r4;
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ value = fields->f_extccode;
+ break;
+ case XC16X_OPERAND_GENREG :
+ value = fields->f_regb8;
+ break;
+ case XC16X_OPERAND_HASH :
+ value = 0;
+ break;
+ case XC16X_OPERAND_ICOND :
+ value = fields->f_icondcode;
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ value = fields->f_op_lbit2;
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ value = fields->f_op_lbit4;
+ break;
+ case XC16X_OPERAND_MASK8 :
+ value = fields->f_mask8;
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ value = fields->f_datahi8;
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ value = fields->f_memgr8;
+ break;
+ case XC16X_OPERAND_MEMORY :
+ value = fields->f_memory;
+ break;
+ case XC16X_OPERAND_PAG :
+ value = 0;
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ value = fields->f_pagenum;
+ break;
+ case XC16X_OPERAND_POF :
+ value = 0;
+ break;
+ case XC16X_OPERAND_QBIT :
+ value = fields->f_qbit;
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ value = fields->f_qhibit;
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ value = fields->f_qlobit;
+ break;
+ case XC16X_OPERAND_REG8 :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_REGB8 :
+ value = fields->f_regb8;
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ value = fields->f_regmem8;
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ value = fields->f_reghi8;
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ value = fields->f_regmem8;
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ value = fields->f_regoff8;
+ break;
+ case XC16X_OPERAND_REL :
+ value = fields->f_rel8;
+ break;
+ case XC16X_OPERAND_RELHI :
+ value = fields->f_relhi8;
+ break;
+ case XC16X_OPERAND_SEG :
+ value = fields->f_seg8;
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ value = fields->f_segnum8;
+ break;
+ case XC16X_OPERAND_SEGM :
+ value = 0;
+ break;
+ case XC16X_OPERAND_SOF :
+ value = 0;
+ break;
+ case XC16X_OPERAND_SR :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SR2 :
+ value = fields->f_r0;
+ break;
+ case XC16X_OPERAND_SRB :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SRC1 :
+ value = fields->f_r1;
+ break;
+ case XC16X_OPERAND_SRC2 :
+ value = fields->f_r2;
+ break;
+ case XC16X_OPERAND_SRDIV :
+ value = fields->f_reg8;
+ break;
+ case XC16X_OPERAND_U4 :
+ value = fields->f_uimm4;
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ value = fields->f_uimm16;
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ value = fields->f_uimm2;
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ value = fields->f_uimm3;
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ value = fields->f_uimm4;
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ value = fields->f_uimm7;
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ value = fields->f_uimm8;
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ value = fields->f_uimm16;
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ value = fields->f_memory;
+ break;
+ case XC16X_OPERAND_USEG16 :
+ value = fields->f_offset16;
+ break;
+ case XC16X_OPERAND_USEG8 :
+ value = fields->f_seg8;
+ break;
+ case XC16X_OPERAND_USOF16 :
+ value = fields->f_offset16;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
+ opindex);
+ abort ();
+ }
+
+ return value;
+}
+
+void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
+void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
+
+/* Stuffing values in cgen_fields is handled by a collection of functions.
+ They are distinguished by the type of the VALUE argument they accept.
+ TODO: floating point, inlining support, remove cases where argument type
+ not appropriate. */
+
+void
+xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ int value)
+{
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_BIT01 :
+ fields->f_op_1bit = value;
+ break;
+ case XC16X_OPERAND_BIT1 :
+ fields->f_op_bit1 = value;
+ break;
+ case XC16X_OPERAND_BIT2 :
+ fields->f_op_bit2 = value;
+ break;
+ case XC16X_OPERAND_BIT4 :
+ fields->f_op_bit4 = value;
+ break;
+ case XC16X_OPERAND_BIT8 :
+ fields->f_op_bit8 = value;
+ break;
+ case XC16X_OPERAND_BITONE :
+ fields->f_op_onebit = value;
+ break;
+ case XC16X_OPERAND_CADDR :
+ fields->f_offset16 = value;
+ break;
+ case XC16X_OPERAND_COND :
+ fields->f_condcode = value;
+ break;
+ case XC16X_OPERAND_DATA8 :
+ fields->f_data8 = value;
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ fields->f_datahi8 = value;
+ break;
+ case XC16X_OPERAND_DOT :
+ break;
+ case XC16X_OPERAND_DR :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_DRB :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_DRI :
+ fields->f_r4 = value;
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ fields->f_extccode = value;
+ break;
+ case XC16X_OPERAND_GENREG :
+ fields->f_regb8 = value;
+ break;
+ case XC16X_OPERAND_HASH :
+ break;
+ case XC16X_OPERAND_ICOND :
+ fields->f_icondcode = value;
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ fields->f_op_lbit2 = value;
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ fields->f_op_lbit4 = value;
+ break;
+ case XC16X_OPERAND_MASK8 :
+ fields->f_mask8 = value;
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ fields->f_datahi8 = value;
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ fields->f_memgr8 = value;
+ break;
+ case XC16X_OPERAND_MEMORY :
+ fields->f_memory = value;
+ break;
+ case XC16X_OPERAND_PAG :
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ fields->f_pagenum = value;
+ break;
+ case XC16X_OPERAND_POF :
+ break;
+ case XC16X_OPERAND_QBIT :
+ fields->f_qbit = value;
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ fields->f_qhibit = value;
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ fields->f_qlobit = value;
+ break;
+ case XC16X_OPERAND_REG8 :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_REGB8 :
+ fields->f_regb8 = value;
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ fields->f_regmem8 = value;
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ fields->f_reghi8 = value;
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ fields->f_regmem8 = value;
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ fields->f_regoff8 = value;
+ break;
+ case XC16X_OPERAND_REL :
+ fields->f_rel8 = value;
+ break;
+ case XC16X_OPERAND_RELHI :
+ fields->f_relhi8 = value;
+ break;
+ case XC16X_OPERAND_SEG :
+ fields->f_seg8 = value;
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ fields->f_segnum8 = value;
+ break;
+ case XC16X_OPERAND_SEGM :
+ break;
+ case XC16X_OPERAND_SOF :
+ break;
+ case XC16X_OPERAND_SR :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SR2 :
+ fields->f_r0 = value;
+ break;
+ case XC16X_OPERAND_SRB :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SRC1 :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_SRC2 :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SRDIV :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_U4 :
+ fields->f_uimm4 = value;
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ fields->f_uimm16 = value;
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ fields->f_uimm2 = value;
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ fields->f_uimm3 = value;
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ fields->f_uimm4 = value;
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ fields->f_uimm7 = value;
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ fields->f_uimm8 = value;
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ fields->f_uimm16 = value;
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ fields->f_memory = value;
+ break;
+ case XC16X_OPERAND_USEG16 :
+ fields->f_offset16 = value;
+ break;
+ case XC16X_OPERAND_USEG8 :
+ fields->f_seg8 = value;
+ break;
+ case XC16X_OPERAND_USOF16 :
+ fields->f_offset16 = value;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+void
+xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ bfd_vma value)
+{
+ switch (opindex)
+ {
+ case XC16X_OPERAND_REGNAM :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_BIT01 :
+ fields->f_op_1bit = value;
+ break;
+ case XC16X_OPERAND_BIT1 :
+ fields->f_op_bit1 = value;
+ break;
+ case XC16X_OPERAND_BIT2 :
+ fields->f_op_bit2 = value;
+ break;
+ case XC16X_OPERAND_BIT4 :
+ fields->f_op_bit4 = value;
+ break;
+ case XC16X_OPERAND_BIT8 :
+ fields->f_op_bit8 = value;
+ break;
+ case XC16X_OPERAND_BITONE :
+ fields->f_op_onebit = value;
+ break;
+ case XC16X_OPERAND_CADDR :
+ fields->f_offset16 = value;
+ break;
+ case XC16X_OPERAND_COND :
+ fields->f_condcode = value;
+ break;
+ case XC16X_OPERAND_DATA8 :
+ fields->f_data8 = value;
+ break;
+ case XC16X_OPERAND_DATAHI8 :
+ fields->f_datahi8 = value;
+ break;
+ case XC16X_OPERAND_DOT :
+ break;
+ case XC16X_OPERAND_DR :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_DRB :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_DRI :
+ fields->f_r4 = value;
+ break;
+ case XC16X_OPERAND_EXTCOND :
+ fields->f_extccode = value;
+ break;
+ case XC16X_OPERAND_GENREG :
+ fields->f_regb8 = value;
+ break;
+ case XC16X_OPERAND_HASH :
+ break;
+ case XC16X_OPERAND_ICOND :
+ fields->f_icondcode = value;
+ break;
+ case XC16X_OPERAND_LBIT2 :
+ fields->f_op_lbit2 = value;
+ break;
+ case XC16X_OPERAND_LBIT4 :
+ fields->f_op_lbit4 = value;
+ break;
+ case XC16X_OPERAND_MASK8 :
+ fields->f_mask8 = value;
+ break;
+ case XC16X_OPERAND_MASKLO8 :
+ fields->f_datahi8 = value;
+ break;
+ case XC16X_OPERAND_MEMGR8 :
+ fields->f_memgr8 = value;
+ break;
+ case XC16X_OPERAND_MEMORY :
+ fields->f_memory = value;
+ break;
+ case XC16X_OPERAND_PAG :
+ break;
+ case XC16X_OPERAND_PAGENUM :
+ fields->f_pagenum = value;
+ break;
+ case XC16X_OPERAND_POF :
+ break;
+ case XC16X_OPERAND_QBIT :
+ fields->f_qbit = value;
+ break;
+ case XC16X_OPERAND_QHIBIT :
+ fields->f_qhibit = value;
+ break;
+ case XC16X_OPERAND_QLOBIT :
+ fields->f_qlobit = value;
+ break;
+ case XC16X_OPERAND_REG8 :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_REGB8 :
+ fields->f_regb8 = value;
+ break;
+ case XC16X_OPERAND_REGBMEM8 :
+ fields->f_regmem8 = value;
+ break;
+ case XC16X_OPERAND_REGHI8 :
+ fields->f_reghi8 = value;
+ break;
+ case XC16X_OPERAND_REGMEM8 :
+ fields->f_regmem8 = value;
+ break;
+ case XC16X_OPERAND_REGOFF8 :
+ fields->f_regoff8 = value;
+ break;
+ case XC16X_OPERAND_REL :
+ fields->f_rel8 = value;
+ break;
+ case XC16X_OPERAND_RELHI :
+ fields->f_relhi8 = value;
+ break;
+ case XC16X_OPERAND_SEG :
+ fields->f_seg8 = value;
+ break;
+ case XC16X_OPERAND_SEGHI8 :
+ fields->f_segnum8 = value;
+ break;
+ case XC16X_OPERAND_SEGM :
+ break;
+ case XC16X_OPERAND_SOF :
+ break;
+ case XC16X_OPERAND_SR :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SR2 :
+ fields->f_r0 = value;
+ break;
+ case XC16X_OPERAND_SRB :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SRC1 :
+ fields->f_r1 = value;
+ break;
+ case XC16X_OPERAND_SRC2 :
+ fields->f_r2 = value;
+ break;
+ case XC16X_OPERAND_SRDIV :
+ fields->f_reg8 = value;
+ break;
+ case XC16X_OPERAND_U4 :
+ fields->f_uimm4 = value;
+ break;
+ case XC16X_OPERAND_UIMM16 :
+ fields->f_uimm16 = value;
+ break;
+ case XC16X_OPERAND_UIMM2 :
+ fields->f_uimm2 = value;
+ break;
+ case XC16X_OPERAND_UIMM3 :
+ fields->f_uimm3 = value;
+ break;
+ case XC16X_OPERAND_UIMM4 :
+ fields->f_uimm4 = value;
+ break;
+ case XC16X_OPERAND_UIMM7 :
+ fields->f_uimm7 = value;
+ break;
+ case XC16X_OPERAND_UIMM8 :
+ fields->f_uimm8 = value;
+ break;
+ case XC16X_OPERAND_UPAG16 :
+ fields->f_uimm16 = value;
+ break;
+ case XC16X_OPERAND_UPOF16 :
+ fields->f_memory = value;
+ break;
+ case XC16X_OPERAND_USEG16 :
+ fields->f_offset16 = value;
+ break;
+ case XC16X_OPERAND_USEG8 :
+ fields->f_seg8 = value;
+ break;
+ case XC16X_OPERAND_USOF16 :
+ fields->f_offset16 = value;
+ break;
+
+ default :
+ /* xgettext:c-format */
+ fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
+ opindex);
+ abort ();
+ }
+}
+
+/* Function to call before using the instruction builder tables. */
+
+void
+xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd)
+{
+ cd->insert_handlers = & xc16x_cgen_insert_handlers[0];
+ cd->extract_handlers = & xc16x_cgen_extract_handlers[0];
+
+ cd->insert_operand = xc16x_cgen_insert_operand;
+ cd->extract_operand = xc16x_cgen_extract_operand;
+
+ cd->get_int_operand = xc16x_cgen_get_int_operand;
+ cd->set_int_operand = xc16x_cgen_set_int_operand;
+ cd->get_vma_operand = xc16x_cgen_get_vma_operand;
+ cd->set_vma_operand = xc16x_cgen_set_vma_operand;
+}
Added: branches/binutils/package/opcodes/xc16x-opc.c
===================================================================
--- branches/binutils/package/opcodes/xc16x-opc.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-opc.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,3073 @@
+/* Instruction opcode table for xc16x.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#include "sysdep.h"
+#include "ansidecl.h"
+#include "bfd.h"
+#include "symcat.h"
+#include "xc16x-desc.h"
+#include "xc16x-opc.h"
+#include "libiberty.h"
+
+/* -- opc.c */
+
+/* -- */
+/* The hash functions are recorded here to help keep assembler code out of
+ the disassembler and vice versa. */
+
+static int asm_hash_insn_p (const CGEN_INSN *);
+static unsigned int asm_hash_insn (const char *);
+static int dis_hash_insn_p (const CGEN_INSN *);
+static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
+
+/* Instruction formats. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & xc16x_cgen_ifld_table[XC16X_##f]
+#else
+#define F(f) & xc16x_cgen_ifld_table[XC16X_/**/f]
+#endif
+static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
+ 0, 0, 0x0, { { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrpof ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbrpof ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REGB8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrpag ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbrpag ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_REGB8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrhpof ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrhpof3 ATTRIBUTE_UNUSED = {
+ 16, 16, 0x8ff, { { F (F_R1) }, { F (F_OP_BIT1) }, { F (F_UIMM3) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbrhpag3 ATTRIBUTE_UNUSED = {
+ 16, 16, 0x8ff, { { F (F_R1) }, { F (F_OP_BIT1) }, { F (F_UIMM3) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrbhpof ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0000ff, { { F (F_OP_BIT8) }, { F (F_UIMM8) }, { F (F_REGB8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addr ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbr ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_add2 ATTRIBUTE_UNUSED = {
+ 16, 16, 0xcff, { { F (F_R1) }, { F (F_OP_BIT2) }, { F (F_R0) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addb2 ATTRIBUTE_UNUSED = {
+ 16, 16, 0xcff, { { F (F_R1) }, { F (F_OP_BIT2) }, { F (F_R0) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrm2 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMGR8) }, { F (F_REGMEM8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addrm ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbrm2 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMGR8) }, { F (F_REGMEM8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_addbrm ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REGB8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_muls ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_div ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpl ATTRIBUTE_UNUSED = {
+ 16, 16, 0xfff, { { F (F_R1) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cplb ATTRIBUTE_UNUSED = {
+ 16, 16, 0xfff, { { F (F_R1) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movri ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_UIMM4) }, { F (F_R4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movbri ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_UIMM4) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movbr2 ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_mov9i ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movb9i ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_R1) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movri11 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xf0ff, { { F (F_MEMORY) }, { F (F_OP_LBIT4) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movehm5 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REGOFF8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movehm6 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_UIMM16) }, { F (F_REGOFF8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movehm7 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_REGOFF8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movehm8 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_REGOFF8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movehm10 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff0000ff, { { F (F_OP_BIT8) }, { F (F_UIMM8) }, { F (F_REGOFF8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movbsrpofm ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REGMEM8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_movbspofmr ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_MEMORY) }, { F (F_REGMEM8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmpa0 ATTRIBUTE_UNUSED = {
+ 32, 32, 0x4ff, { { F (F_OFFSET16) }, { F (F_EXTCCODE) }, { F (F_OP_BITONE) }, { F (F_OP_ONEBIT) }, { F (F_OP_1BIT) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmpa_ ATTRIBUTE_UNUSED = {
+ 32, 32, 0x5ff, { { F (F_OFFSET16) }, { F (F_EXTCCODE) }, { F (F_OP_BITONE) }, { F (F_OP_ONEBIT) }, { F (F_OP_1BIT) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmpi ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_ICONDCODE) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmpr_nenz ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REL8) }, { F (F_RCOND) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmpseg ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_SEG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jmps ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_SEG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_jb ATTRIBUTE_UNUSED = {
+ 32, 32, 0xf0000ff, { { F (F_QLOBIT) }, { F (F_QHIBIT) }, { F (F_RELHI8) }, { F (F_REGB8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_calla0 ATTRIBUTE_UNUSED = {
+ 32, 32, 0x6ff, { { F (F_OFFSET16) }, { F (F_EXTCCODE) }, { F (F_OP_2BIT) }, { F (F_OP_1BIT) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_calla_ ATTRIBUTE_UNUSED = {
+ 32, 32, 0x7ff, { { F (F_OFFSET16) }, { F (F_EXTCCODE) }, { F (F_OP_BIT3) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_callr ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REL8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_callseg ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_SEG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_pcall ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_OFFSET16) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_trap ATTRIBUTE_UNUSED = {
+ 16, 16, 0x1ff, { { F (F_UIMM7) }, { F (F_OP_1BIT) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_ret ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff0000ff, { { F (F_OP_BIT8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_retp ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = {
+ 16, 16, 0xffff, { { F (F_OP_LBIT4) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_srstm ATTRIBUTE_UNUSED = {
+ 32, 32, 0xffffffff, { { F (F_OP_BIT8) }, { F (F_DATA8) }, { F (F_OP_LBIT4) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_atomic ATTRIBUTE_UNUSED = {
+ 16, 16, 0xcfff, { { F (F_OP_LBIT2) }, { F (F_UIMM2) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_extp ATTRIBUTE_UNUSED = {
+ 16, 16, 0xc0ff, { { F (F_OP_LBIT2) }, { F (F_UIMM2) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_extp1 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xfc00cfff, { { F (F_QLOBIT) }, { F (F_QLOBIT2) }, { F (F_PAGENUM) }, { F (F_OP_LBIT2) }, { F (F_UIMM2) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_extpg1 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xcfff, { { F (F_UIMM16) }, { F (F_OP_LBIT2) }, { F (F_UIMM2) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_exts1 ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff00cfff, { { F (F_OP_BIT8) }, { F (F_SEGNUM8) }, { F (F_OP_LBIT2) }, { F (F_UIMM2) }, { F (F_OP_BIT4) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_bclr18 ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_bclr0 ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_REG8) }, { F (F_QCOND) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_bmov ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_QLOBIT) }, { F (F_QHIBIT) }, { F (F_REGHI8) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_bfldl ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_DATAHI8) }, { F (F_MASK8) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_bfldh ATTRIBUTE_UNUSED = {
+ 32, 32, 0xff, { { F (F_DATAHI8) }, { F (F_DATA8) }, { F (F_REG8) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cmpri ATTRIBUTE_UNUSED = {
+ 16, 16, 0x8ff, { { F (F_R1) }, { F (F_OP_BIT1) }, { F (F_UIMM3) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cmpd1ri ATTRIBUTE_UNUSED = {
+ 16, 16, 0xff, { { F (F_UIMM4) }, { F (F_R2) }, { F (F_OP1) }, { F (F_OP2) }, { 0 } }
+};
+
+#undef F
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) XC16X_OPERAND_##op
+#else
+#define OPERAND(op) XC16X_OPERAND_/**/op
+#endif
+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+
+/* The instruction table. */
+
+static const CGEN_OPCODE xc16x_cgen_insn_opcode_table[MAX_INSNS] =
+{
+ /* Special null first entry.
+ A `num' value of zero is thus invalid.
+ Also, the special `invalid' insn resides here. */
+ { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
+/* add $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x2 }
+ },
+/* sub $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x22 }
+ },
+/* addb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x3 }
+ },
+/* subb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x23 }
+ },
+/* add $reg8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addrpag, { 0x2 }
+ },
+/* sub $reg8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addrpag, { 0x22 }
+ },
+/* addb $regb8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addbrpag, { 0x3 }
+ },
+/* subb $regb8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addbrpag, { 0x23 }
+ },
+/* addc $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x12 }
+ },
+/* subc $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x32 }
+ },
+/* addcb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x13 }
+ },
+/* subcb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x33 }
+ },
+/* addc $reg8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addrpag, { 0x12 }
+ },
+/* subc $reg8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addrpag, { 0x32 }
+ },
+/* addcb $regb8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addbrpag, { 0x13 }
+ },
+/* subcb $regb8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addbrpag, { 0x33 }
+ },
+/* add $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x4 }
+ },
+/* sub $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x24 }
+ },
+/* addb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x5 }
+ },
+/* subb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x25 }
+ },
+/* addc $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x14 }
+ },
+/* subc $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x34 }
+ },
+/* addcb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x15 }
+ },
+/* subcb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x35 }
+ },
+/* add $reg8,$hash$pof$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (POF), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x6 }
+ },
+/* sub $reg8,$hash$pof$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (POF), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x26 }
+ },
+/* add $reg8,$hash$pag$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (PAG), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x6 }
+ },
+/* sub $reg8,$hash$pag$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (PAG), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x26 }
+ },
+/* add $dr,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x8 }
+ },
+/* sub $dr,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x28 }
+ },
+/* addb $drb,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x9 }
+ },
+/* subb $drb,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x29 }
+ },
+/* add $dr,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x8 }
+ },
+/* sub $dr,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x28 }
+ },
+/* addb $drb,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x9 }
+ },
+/* subb $drb,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x29 }
+ },
+/* addb $regb8,$hash$pof$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (POF), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x7 }
+ },
+/* subb $regb8,$hash$pof$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (POF), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x27 }
+ },
+/* addb $regb8,$hash$pag$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (PAG), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x7 }
+ },
+/* subb $regb8,$hash$pag$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (PAG), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x27 }
+ },
+/* addc $reg8,$hash$pof$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (POF), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x16 }
+ },
+/* subc $reg8,$hash$pof$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (POF), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x36 }
+ },
+/* addc $reg8,$hash$pag$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (PAG), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x16 }
+ },
+/* subc $reg8,$hash$pag$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (PAG), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x36 }
+ },
+/* addc $dr,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x18 }
+ },
+/* subc $dr,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x38 }
+ },
+/* addcb $drb,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x19 }
+ },
+/* subcb $drb,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x39 }
+ },
+/* addc $dr,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x18 }
+ },
+/* subc $dr,$hash$pag$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (PAG), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x38 }
+ },
+/* addcb $drb,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x19 }
+ },
+/* subcb $drb,$hash$pof$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (POF), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x39 }
+ },
+/* addcb $regb8,$hash$pof$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (POF), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x17 }
+ },
+/* subcb $regb8,$hash$pof$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (POF), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x37 }
+ },
+/* addcb $regb8,$hash$pag$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (PAG), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x17 }
+ },
+/* subcb $regb8,$hash$pag$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (PAG), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x37 }
+ },
+/* add $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x8 }
+ },
+/* sub $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x28 }
+ },
+/* addb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x9 }
+ },
+/* subb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x29 }
+ },
+/* add $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x6 }
+ },
+/* sub $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x26 }
+ },
+/* addb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x7 }
+ },
+/* subb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x27 }
+ },
+/* addc $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x18 }
+ },
+/* subc $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x38 }
+ },
+/* addcb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x19 }
+ },
+/* subcb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x39 }
+ },
+/* addc $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x16 }
+ },
+/* subc $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x36 }
+ },
+/* addcb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x17 }
+ },
+/* subcb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x37 }
+ },
+/* add $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x0 }
+ },
+/* sub $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x20 }
+ },
+/* addb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x1 }
+ },
+/* subb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x21 }
+ },
+/* add $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x808 }
+ },
+/* sub $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x828 }
+ },
+/* addb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x809 }
+ },
+/* subb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x829 }
+ },
+/* add $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc08 }
+ },
+/* sub $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc28 }
+ },
+/* addb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc09 }
+ },
+/* subb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc29 }
+ },
+/* addc $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x10 }
+ },
+/* subc $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x30 }
+ },
+/* addcb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x11 }
+ },
+/* subcb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x31 }
+ },
+/* addc $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x818 }
+ },
+/* subc $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x838 }
+ },
+/* addcb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x819 }
+ },
+/* subcb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x839 }
+ },
+/* addc $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc18 }
+ },
+/* subc $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc38 }
+ },
+/* addcb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc19 }
+ },
+/* subcb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc39 }
+ },
+/* add $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x2 }
+ },
+/* add $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x4 }
+ },
+/* add $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x2 }
+ },
+/* add $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x4 }
+ },
+/* sub $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x22 }
+ },
+/* sub $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x24 }
+ },
+/* sub $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x22 }
+ },
+/* sub $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x24 }
+ },
+/* addb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x3 }
+ },
+/* addb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x5 }
+ },
+/* addb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x3 }
+ },
+/* addb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x5 }
+ },
+/* subb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x23 }
+ },
+/* subb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x25 }
+ },
+/* subb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x23 }
+ },
+/* subb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x25 }
+ },
+/* addc $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x12 }
+ },
+/* addc $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x14 }
+ },
+/* addc $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x12 }
+ },
+/* addc $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x14 }
+ },
+/* subc $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x32 }
+ },
+/* subc $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x34 }
+ },
+/* subc $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x32 }
+ },
+/* subc $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x34 }
+ },
+/* addcb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x13 }
+ },
+/* addcb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x15 }
+ },
+/* addcb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x13 }
+ },
+/* addcb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x15 }
+ },
+/* subcb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x33 }
+ },
+/* subcb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x35 }
+ },
+/* subcb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x33 }
+ },
+/* subcb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x35 }
+ },
+/* mul $src1,$src2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
+ & ifmt_muls, { 0xb }
+ },
+/* mulu $src1,$src2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
+ & ifmt_muls, { 0x1b }
+ },
+/* div $srdiv */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRDIV), 0 } },
+ & ifmt_div, { 0x4b }
+ },
+/* divl $srdiv */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRDIV), 0 } },
+ & ifmt_div, { 0x6b }
+ },
+/* divlu $srdiv */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRDIV), 0 } },
+ & ifmt_div, { 0x7b }
+ },
+/* divu $srdiv */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRDIV), 0 } },
+ & ifmt_div, { 0x5b }
+ },
+/* cpl $dr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), 0 } },
+ & ifmt_cpl, { 0x91 }
+ },
+/* cplb $drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), 0 } },
+ & ifmt_cplb, { 0xb1 }
+ },
+/* neg $dr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), 0 } },
+ & ifmt_cpl, { 0x81 }
+ },
+/* negb $drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), 0 } },
+ & ifmt_cplb, { 0xa1 }
+ },
+/* and $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x60 }
+ },
+/* or $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x70 }
+ },
+/* xor $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x50 }
+ },
+/* andb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x61 }
+ },
+/* orb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x71 }
+ },
+/* xorb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x51 }
+ },
+/* and $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x68 }
+ },
+/* or $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x78 }
+ },
+/* xor $dr,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addrhpof3, { 0x58 }
+ },
+/* andb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x69 }
+ },
+/* orb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x79 }
+ },
+/* xorb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x59 }
+ },
+/* and $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x66 }
+ },
+/* or $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x76 }
+ },
+/* xor $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x56 }
+ },
+/* andb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x67 }
+ },
+/* orb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x77 }
+ },
+/* xorb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x57 }
+ },
+/* and $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x868 }
+ },
+/* or $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x878 }
+ },
+/* xor $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x858 }
+ },
+/* andb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x869 }
+ },
+/* orb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x879 }
+ },
+/* xorb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x859 }
+ },
+/* and $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc68 }
+ },
+/* or $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc78 }
+ },
+/* xor $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc58 }
+ },
+/* andb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc69 }
+ },
+/* orb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc79 }
+ },
+/* xorb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc59 }
+ },
+/* and $pof$reg8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REG8), ',', OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x62 }
+ },
+/* or $pof$reg8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REG8), ',', OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x72 }
+ },
+/* xor $pof$reg8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REG8), ',', OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x52 }
+ },
+/* andb $pof$regb8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REGB8), ',', OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x63 }
+ },
+/* orb $pof$regb8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REGB8), ',', OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x73 }
+ },
+/* xorb $pof$regb8,$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (REGB8), ',', OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x53 }
+ },
+/* and $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x64 }
+ },
+/* or $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x74 }
+ },
+/* xor $pof$upof16,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REG8), 0 } },
+ & ifmt_addrpof, { 0x54 }
+ },
+/* andb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x65 }
+ },
+/* orb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x75 }
+ },
+/* xorb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0x55 }
+ },
+/* and $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x62 }
+ },
+/* and $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x64 }
+ },
+/* and $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x62 }
+ },
+/* and $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x64 }
+ },
+/* or $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x72 }
+ },
+/* or $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x74 }
+ },
+/* or $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x72 }
+ },
+/* or $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x74 }
+ },
+/* xor $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x52 }
+ },
+/* xor $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0x54 }
+ },
+/* xor $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x52 }
+ },
+/* xor $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0x54 }
+ },
+/* andb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x63 }
+ },
+/* andb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x65 }
+ },
+/* andb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x63 }
+ },
+/* andb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x65 }
+ },
+/* orb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x73 }
+ },
+/* orb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x75 }
+ },
+/* orb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x73 }
+ },
+/* orb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x75 }
+ },
+/* xorb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x53 }
+ },
+/* xorb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0x55 }
+ },
+/* xorb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x53 }
+ },
+/* xorb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0x55 }
+ },
+/* mov $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0xf0 }
+ },
+/* movb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0xf1 }
+ },
+/* mov $dri,$hash$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRI), ',', OP (HASH), OP (U4), 0 } },
+ & ifmt_movri, { 0xe0 }
+ },
+/* movb $srb,$hash$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRB), ',', OP (HASH), OP (U4), 0 } },
+ & ifmt_movbri, { 0xe1 }
+ },
+/* mov $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0xe6 }
+ },
+/* movb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0xe7 }
+ },
+/* mov $dr,[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR), ']', 0 } },
+ & ifmt_addr, { 0xa8 }
+ },
+/* movb $drb,[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR), ']', 0 } },
+ & ifmt_movbr2, { 0xa9 }
+ },
+/* mov [$sr],$dr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SR), ']', ',', OP (DR), 0 } },
+ & ifmt_addr, { 0xb8 }
+ },
+/* movb [$sr],$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SR), ']', ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0xb9 }
+ },
+/* mov [-$sr],$dr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', '-', OP (SR), ']', ',', OP (DR), 0 } },
+ & ifmt_addr, { 0x88 }
+ },
+/* movb [-$sr],$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', '-', OP (SR), ']', ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0x89 }
+ },
+/* mov $dr,[$sr+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR), '+', ']', 0 } },
+ & ifmt_addr, { 0x98 }
+ },
+/* movb $drb,[$sr+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR), '+', ']', 0 } },
+ & ifmt_movbr2, { 0x99 }
+ },
+/* mov [$dr],[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), ']', ',', '[', OP (SR), ']', 0 } },
+ & ifmt_addr, { 0xc8 }
+ },
+/* movb [$dr],[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), ']', ',', '[', OP (SR), ']', 0 } },
+ & ifmt_addr, { 0xc9 }
+ },
+/* mov [$dr+],[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), '+', ']', ',', '[', OP (SR), ']', 0 } },
+ & ifmt_addr, { 0xd8 }
+ },
+/* movb [$dr+],[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), '+', ']', ',', '[', OP (SR), ']', 0 } },
+ & ifmt_addr, { 0xd9 }
+ },
+/* mov [$dr],[$sr+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), ']', ',', '[', OP (SR), '+', ']', 0 } },
+ & ifmt_addr, { 0xe8 }
+ },
+/* movb [$dr],[$sr+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DR), ']', ',', '[', OP (SR), '+', ']', 0 } },
+ & ifmt_addr, { 0xe9 }
+ },
+/* mov $dr,[$sr+$hash$uimm16] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR), '+', OP (HASH), OP (UIMM16), ']', 0 } },
+ & ifmt_mov9i, { 0xd4 }
+ },
+/* movb $drb,[$sr+$hash$uimm16] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR), '+', OP (HASH), OP (UIMM16), ']', 0 } },
+ & ifmt_movb9i, { 0xf4 }
+ },
+/* mov [$sr+$hash$uimm16],$dr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SR), '+', OP (HASH), OP (UIMM16), ']', ',', OP (DR), 0 } },
+ & ifmt_mov9i, { 0xc4 }
+ },
+/* movb [$sr+$hash$uimm16],$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SR), '+', OP (HASH), OP (UIMM16), ']', ',', OP (DRB), 0 } },
+ & ifmt_movb9i, { 0xe4 }
+ },
+/* mov [$src2],$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SRC2), ']', ',', OP (MEMORY), 0 } },
+ & ifmt_movri11, { 0x84 }
+ },
+/* movb [$src2],$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (SRC2), ']', ',', OP (MEMORY), 0 } },
+ & ifmt_movri11, { 0xa4 }
+ },
+/* mov $memory,[$src2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', '[', OP (SRC2), ']', 0 } },
+ & ifmt_movri11, { 0x94 }
+ },
+/* movb $memory,[$src2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', '[', OP (SRC2), ']', 0 } },
+ & ifmt_movri11, { 0xb4 }
+ },
+/* mov $regoff8,$hash$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (HASH), OP (POF), OP (UPOF16), 0 } },
+ & ifmt_movehm5, { 0xe6 }
+ },
+/* mov $regoff8,$hash$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (HASH), OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_movehm6, { 0xe6 }
+ },
+/* mov $regoff8,$hash$segm$useg16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (HASH), OP (SEGM), OP (USEG16), 0 } },
+ & ifmt_movehm7, { 0xe6 }
+ },
+/* mov $regoff8,$hash$sof$usof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (HASH), OP (SOF), OP (USOF16), 0 } },
+ & ifmt_movehm8, { 0xe6 }
+ },
+/* movb $regb8,$hash$pof$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (POF), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0xe7 }
+ },
+/* movb $regoff8,$hash$pag$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (HASH), OP (PAG), OP (UIMM8), 0 } },
+ & ifmt_movehm10, { 0xe7 }
+ },
+/* mov $regoff8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_movehm5, { 0xf2 }
+ },
+/* movb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0xf3 }
+ },
+/* mov $regoff8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGOFF8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_movehm6, { 0xf2 }
+ },
+/* movb $regb8,$pag$upag16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (PAG), OP (UPAG16), 0 } },
+ & ifmt_addbrpag, { 0xf3 }
+ },
+/* mov $pof$upof16,$regoff8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGOFF8), 0 } },
+ & ifmt_movehm5, { 0xf6 }
+ },
+/* movb $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0xf7 }
+ },
+/* mov $dri,$hash$pof$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRI), ',', OP (HASH), OP (POF), OP (U4), 0 } },
+ & ifmt_movri, { 0xe0 }
+ },
+/* movb $srb,$hash$pof$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRB), ',', OP (HASH), OP (POF), OP (U4), 0 } },
+ & ifmt_movbri, { 0xe1 }
+ },
+/* mov $dri,$hash$pag$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRI), ',', OP (HASH), OP (PAG), OP (U4), 0 } },
+ & ifmt_movri, { 0xe0 }
+ },
+/* movb $srb,$hash$pag$u4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRB), ',', OP (HASH), OP (PAG), OP (U4), 0 } },
+ & ifmt_movbri, { 0xe1 }
+ },
+/* mov $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xf2 }
+ },
+/* mov $memgr8,$regmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGMEM8), 0 } },
+ & ifmt_addrm2, { 0xf6 }
+ },
+/* mov $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xf2 }
+ },
+/* mov $memory,$reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REG8), 0 } },
+ & ifmt_addrm, { 0xf6 }
+ },
+/* movb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0xf3 }
+ },
+/* movb $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0xf7 }
+ },
+/* movb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0xf3 }
+ },
+/* movb $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0xf7 }
+ },
+/* movbs $sr,$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0xd0 }
+ },
+/* movbz $sr,$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0xc0 }
+ },
+/* movbs $regmem8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_movbsrpofm, { 0xd2 }
+ },
+/* movbs $pof$upof16,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGBMEM8), 0 } },
+ & ifmt_movbspofmr, { 0xd5 }
+ },
+/* movbz $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0xc2 }
+ },
+/* movbz $pof$upof16,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (POF), OP (UPOF16), ',', OP (REGB8), 0 } },
+ & ifmt_addbrpof, { 0xc5 }
+ },
+/* movbs $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xd2 }
+ },
+/* movbs $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0xd5 }
+ },
+/* movbs $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xd2 }
+ },
+/* movbs $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0xd5 }
+ },
+/* movbz $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xc2 }
+ },
+/* movbz $memgr8,$regbmem8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMGR8), ',', OP (REGBMEM8), 0 } },
+ & ifmt_addbrm2, { 0xc5 }
+ },
+/* movbz $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xc2 }
+ },
+/* movbz $memory,$regb8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (MEMORY), ',', OP (REGB8), 0 } },
+ & ifmt_addbrm, { 0xc5 }
+ },
+/* movbs $sr,$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0xd0 }
+ },
+/* movbz $sr,$drb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (DRB), 0 } },
+ & ifmt_movbr2, { 0xc0 }
+ },
+/* jmpa+ $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_jmpa0, { 0xea }
+ },
+/* jmpa $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_jmpa0, { 0xea }
+ },
+/* jmpa- $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_jmpa_, { 0x1ea }
+ },
+/* jmpi $icond,[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (ICOND), ',', '[', OP (SR), ']', 0 } },
+ & ifmt_jmpi, { 0x9c }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x3d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xad }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x2d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x4d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x5d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x6d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x7d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x8d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x9d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x2d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x3d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x8d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xfd }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x9d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xed }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xbd }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xdd }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0x1d }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xd }
+ },
+/* jmpr $cond,$rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (COND), ',', OP (REL), 0 } },
+ & ifmt_jmpr_nenz, { 0xcd }
+ },
+/* jmps $hash$segm$useg8,$hash$sof$usof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (SEGM), OP (USEG8), ',', OP (HASH), OP (SOF), OP (USOF16), 0 } },
+ & ifmt_jmpseg, { 0xfa }
+ },
+/* jmps $seg,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SEG), ',', OP (CADDR), 0 } },
+ & ifmt_jmps, { 0xfa }
+ },
+/* jb $genreg$dot$qlobit,$relhi */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (GENREG), OP (DOT), OP (QLOBIT), ',', OP (RELHI), 0 } },
+ & ifmt_jb, { 0x8a }
+ },
+/* jbc $genreg$dot$qlobit,$relhi */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (GENREG), OP (DOT), OP (QLOBIT), ',', OP (RELHI), 0 } },
+ & ifmt_jb, { 0xaa }
+ },
+/* jnb $genreg$dot$qlobit,$relhi */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (GENREG), OP (DOT), OP (QLOBIT), ',', OP (RELHI), 0 } },
+ & ifmt_jb, { 0x9a }
+ },
+/* jnbs $genreg$dot$qlobit,$relhi */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (GENREG), OP (DOT), OP (QLOBIT), ',', OP (RELHI), 0 } },
+ & ifmt_jb, { 0xba }
+ },
+/* calla+ $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_calla0, { 0xca }
+ },
+/* calla $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_calla0, { 0xca }
+ },
+/* calla- $extcond,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (EXTCOND), ',', OP (CADDR), 0 } },
+ & ifmt_calla_, { 0x1ca }
+ },
+/* calli $icond,[$sr] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (ICOND), ',', '[', OP (SR), ']', 0 } },
+ & ifmt_jmpi, { 0xab }
+ },
+/* callr $rel */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REL), 0 } },
+ & ifmt_callr, { 0xbb }
+ },
+/* calls $hash$segm$useg8,$hash$sof$usof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (SEGM), OP (USEG8), ',', OP (HASH), OP (SOF), OP (USOF16), 0 } },
+ & ifmt_callseg, { 0xda }
+ },
+/* calls $seg,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SEG), ',', OP (CADDR), 0 } },
+ & ifmt_jmps, { 0xda }
+ },
+/* pcall $reg8,$caddr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (CADDR), 0 } },
+ & ifmt_pcall, { 0xe2 }
+ },
+/* trap $hash$uimm7 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (UIMM7), 0 } },
+ & ifmt_trap, { 0x9b }
+ },
+/* ret */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ret, { 0xcb }
+ },
+/* rets */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ret, { 0xdb }
+ },
+/* retp $reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), 0 } },
+ & ifmt_retp, { 0xeb }
+ },
+/* reti */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_reti, { 0x88fb }
+ },
+/* pop $reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), 0 } },
+ & ifmt_retp, { 0xfc }
+ },
+/* push $reg8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), 0 } },
+ & ifmt_retp, { 0xec }
+ },
+/* scxt $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0xc6 }
+ },
+/* scxt $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0xd6 }
+ },
+/* scxt $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xd6 }
+ },
+/* scxt $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xd6 }
+ },
+/* nop */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ret, { 0xcc }
+ },
+/* srst */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0xb7b748b7 }
+ },
+/* idle */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0x87877887 }
+ },
+/* pwrdn */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0x97976897 }
+ },
+/* diswdt */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0xa5a55aa5 }
+ },
+/* enwdt */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0x85857a85 }
+ },
+/* einit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0xb5b54ab5 }
+ },
+/* srvwdt */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_srstm, { 0xa7a758a7 }
+ },
+/* sbrk */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, 0 } },
+ & ifmt_ret, { 0x8c }
+ },
+/* atomic $hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_atomic, { 0xd1 }
+ },
+/* extr $hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_atomic, { 0x80d1 }
+ },
+/* extp $sr,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp, { 0x40dc }
+ },
+/* extp $hash$pagenum,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (PAGENUM), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp1, { 0x40d7 }
+ },
+/* extp $hash$pag$upag16,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (PAG), OP (UPAG16), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extpg1, { 0x40d7 }
+ },
+/* extpr $sr,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp, { 0xc0dc }
+ },
+/* extpr $hash$pagenum,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (PAGENUM), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp1, { 0xc0d7 }
+ },
+/* exts $sr,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp, { 0xdc }
+ },
+/* exts $hash$seghi8,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (SEGHI8), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_exts1, { 0xd7 }
+ },
+/* extsr $sr,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_extp, { 0x80dc }
+ },
+/* extsr $hash$seghi8,$hash$uimm2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (HASH), OP (SEGHI8), ',', OP (HASH), OP (UIMM2), 0 } },
+ & ifmt_exts1, { 0x80d7 }
+ },
+/* prior $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x2b }
+ },
+/* bclr $RegNam */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGNAM), 0 } },
+ & ifmt_bclr18, { 0xbe }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xe }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x1e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x2e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x3e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x4e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x5e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x6e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x7e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x8e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x9e }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xae }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xbe }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xce }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xde }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xee }
+ },
+/* bclr $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xfe }
+ },
+/* bset $RegNam */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGNAM), 0 } },
+ & ifmt_bclr18, { 0xbf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x1f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x2f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x3f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x4f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x5f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x6f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x7f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x8f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0x9f }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xaf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xbf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xcf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xdf }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xef }
+ },
+/* bset $reg8$dot$qbit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), OP (DOT), OP (QBIT), 0 } },
+ & ifmt_bclr0, { 0xff }
+ },
+/* bmov $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x4a }
+ },
+/* bmovn $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x3a }
+ },
+/* band $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x6a }
+ },
+/* bor $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x5a }
+ },
+/* bxor $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x7a }
+ },
+/* bcmp $reghi8$dot$qhibit,$reg8$dot$qlobit */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGHI8), OP (DOT), OP (QHIBIT), ',', OP (REG8), OP (DOT), OP (QLOBIT), 0 } },
+ & ifmt_bmov, { 0x2a }
+ },
+/* bfldl $reg8,$hash$mask8,$hash$datahi8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (MASK8), ',', OP (HASH), OP (DATAHI8), 0 } },
+ & ifmt_bfldl, { 0xa }
+ },
+/* bfldh $reg8,$hash$masklo8,$hash$data8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (MASKLO8), ',', OP (HASH), OP (DATA8), 0 } },
+ & ifmt_bfldh, { 0x1a }
+ },
+/* cmp $src1,$src2 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
+ & ifmt_muls, { 0x40 }
+ },
+/* cmpb $drb,$srb */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (SRB), 0 } },
+ & ifmt_addbr, { 0x41 }
+ },
+/* cmp $src1,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SRC1), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_cmpri, { 0x48 }
+ },
+/* cmpb $drb,$hash$uimm3 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', OP (HASH), OP (UIMM3), 0 } },
+ & ifmt_addbrhpag3, { 0x49 }
+ },
+/* cmp $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x46 }
+ },
+/* cmpb $regb8,$hash$uimm8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (HASH), OP (UIMM8), 0 } },
+ & ifmt_addrbhpof, { 0x47 }
+ },
+/* cmp $dr,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_add2, { 0x848 }
+ },
+/* cmpb $drb,[$sr2] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
+ & ifmt_addb2, { 0x849 }
+ },
+/* cmp $dr,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_add2, { 0xc48 }
+ },
+/* cmpb $drb,[$sr2+] */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), '+', ']', 0 } },
+ & ifmt_addb2, { 0xc49 }
+ },
+/* cmp $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x42 }
+ },
+/* cmpb $regb8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addbrpof, { 0x43 }
+ },
+/* cmp $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x42 }
+ },
+/* cmp $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x42 }
+ },
+/* cmpb $regbmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGBMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addbrm2, { 0x43 }
+ },
+/* cmpb $regb8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGB8), ',', OP (MEMORY), 0 } },
+ & ifmt_addbrm, { 0x43 }
+ },
+/* cmpd1 $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0xa0 }
+ },
+/* cmpd2 $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0xb0 }
+ },
+/* cmpi1 $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x80 }
+ },
+/* cmpi2 $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x90 }
+ },
+/* cmpd1 $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0xa6 }
+ },
+/* cmpd2 $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0xb6 }
+ },
+/* cmpi1 $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x86 }
+ },
+/* cmpi2 $reg8,$hash$uimm16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (HASH), OP (UIMM16), 0 } },
+ & ifmt_addrhpof, { 0x96 }
+ },
+/* cmpd1 $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0xa2 }
+ },
+/* cmpd2 $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0xb2 }
+ },
+/* cmpi1 $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x82 }
+ },
+/* cmpi2 $reg8,$pof$upof16 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (POF), OP (UPOF16), 0 } },
+ & ifmt_addrpof, { 0x92 }
+ },
+/* cmpd1 $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xa2 }
+ },
+/* cmpd2 $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0xb2 }
+ },
+/* cmpi1 $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x82 }
+ },
+/* cmpi2 $regmem8,$memgr8 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REGMEM8), ',', OP (MEMGR8), 0 } },
+ & ifmt_addrm2, { 0x92 }
+ },
+/* cmpd1 $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xa2 }
+ },
+/* cmpd2 $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0xb2 }
+ },
+/* cmpi1 $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x82 }
+ },
+/* cmpi2 $reg8,$memory */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (REG8), ',', OP (MEMORY), 0 } },
+ & ifmt_addrm, { 0x92 }
+ },
+/* shl $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x4c }
+ },
+/* shr $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x6c }
+ },
+/* rol $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0xc }
+ },
+/* ror $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0x2c }
+ },
+/* ashr $dr,$sr */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
+ & ifmt_addr, { 0xac }
+ },
+/* shl $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x5c }
+ },
+/* shr $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x7c }
+ },
+/* rol $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x1c }
+ },
+/* ror $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0x3c }
+ },
+/* ashr $sr,$hash$uimm4 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (SR), ',', OP (HASH), OP (UIMM4), 0 } },
+ & ifmt_cmpd1ri, { 0xbc }
+ },
+};
+
+#undef A
+#undef OPERAND
+#undef MNEM
+#undef OP
+
+/* Formats for ALIAS macro-insns. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & xc16x_cgen_ifld_table[XC16X_##f]
+#else
+#define F(f) & xc16x_cgen_ifld_table[XC16X_/**/f]
+#endif
+#undef F
+
+/* Each non-simple macro entry points to an array of expansion possibilities. */
+
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) XC16X_OPERAND_##op
+#else
+#define OPERAND(op) XC16X_OPERAND_/**/op
+#endif
+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
+
+/* The macro instruction table. */
+
+static const CGEN_IBASE xc16x_cgen_macro_insn_table[] =
+{
+};
+
+/* The macro instruction opcode table. */
+
+static const CGEN_OPCODE xc16x_cgen_macro_insn_opcode_table[] =
+{
+};
+
+#undef A
+#undef OPERAND
+#undef MNEM
+#undef OP
+
+#ifndef CGEN_ASM_HASH_P
+#define CGEN_ASM_HASH_P(insn) 1
+#endif
+
+#ifndef CGEN_DIS_HASH_P
+#define CGEN_DIS_HASH_P(insn) 1
+#endif
+
+/* Return non-zero if INSN is to be added to the hash table.
+ Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
+
+static int
+asm_hash_insn_p (insn)
+ const CGEN_INSN *insn ATTRIBUTE_UNUSED;
+{
+ return CGEN_ASM_HASH_P (insn);
+}
+
+static int
+dis_hash_insn_p (insn)
+ const CGEN_INSN *insn;
+{
+ /* If building the hash table and the NO-DIS attribute is present,
+ ignore. */
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
+ return 0;
+ return CGEN_DIS_HASH_P (insn);
+}
+
+#ifndef CGEN_ASM_HASH
+#define CGEN_ASM_HASH_SIZE 127
+#ifdef CGEN_MNEMONIC_OPERANDS
+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
+#else
+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
+#endif
+#endif
+
+/* It doesn't make much sense to provide a default here,
+ but while this is under development we do.
+ BUFFER is a pointer to the bytes of the insn, target order.
+ VALUE is the first base_insn_bitsize bits as an int in host order. */
+
+#ifndef CGEN_DIS_HASH
+#define CGEN_DIS_HASH_SIZE 256
+#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
+#endif
+
+/* The result is the hash value of the insn.
+ Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
+
+static unsigned int
+asm_hash_insn (mnem)
+ const char * mnem;
+{
+ return CGEN_ASM_HASH (mnem);
+}
+
+/* BUF is a pointer to the bytes of the insn, target order.
+ VALUE is the first base_insn_bitsize bits as an int in host order. */
+
+static unsigned int
+dis_hash_insn (buf, value)
+ const char * buf ATTRIBUTE_UNUSED;
+ CGEN_INSN_INT value ATTRIBUTE_UNUSED;
+{
+ return CGEN_DIS_HASH (buf, value);
+}
+
+/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
+
+static void
+set_fields_bitsize (CGEN_FIELDS *fields, int size)
+{
+ CGEN_FIELDS_BITSIZE (fields) = size;
+}
+
+/* Function to call before using the operand instance table.
+ This plugs the opcode entries and macro instructions into the cpu table. */
+
+void
+xc16x_cgen_init_opcode_table (CGEN_CPU_DESC cd)
+{
+ int i;
+ int num_macros = (sizeof (xc16x_cgen_macro_insn_table) /
+ sizeof (xc16x_cgen_macro_insn_table[0]));
+ const CGEN_IBASE *ib = & xc16x_cgen_macro_insn_table[0];
+ const CGEN_OPCODE *oc = & xc16x_cgen_macro_insn_opcode_table[0];
+ CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
+
+ memset (insns, 0, num_macros * sizeof (CGEN_INSN));
+ for (i = 0; i < num_macros; ++i)
+ {
+ insns[i].base = &ib[i];
+ insns[i].opcode = &oc[i];
+ xc16x_cgen_build_insn_regex (& insns[i]);
+ }
+ cd->macro_insn_table.init_entries = insns;
+ cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
+ cd->macro_insn_table.num_init_entries = num_macros;
+
+ oc = & xc16x_cgen_insn_opcode_table[0];
+ insns = (CGEN_INSN *) cd->insn_table.init_entries;
+ for (i = 0; i < MAX_INSNS; ++i)
+ {
+ insns[i].opcode = &oc[i];
+ xc16x_cgen_build_insn_regex (& insns[i]);
+ }
+
+ cd->sizeof_fields = sizeof (CGEN_FIELDS);
+ cd->set_fields_bitsize = set_fields_bitsize;
+
+ cd->asm_hash_p = asm_hash_insn_p;
+ cd->asm_hash = asm_hash_insn;
+ cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
+
+ cd->dis_hash_p = dis_hash_insn_p;
+ cd->dis_hash = dis_hash_insn;
+ cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
+}
Added: branches/binutils/package/opcodes/xc16x-opc.h
===================================================================
--- branches/binutils/package/opcodes/xc16x-opc.h 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xc16x-opc.h 2006-04-19 08:33:31 UTC (rev 12)
@@ -0,0 +1,225 @@
+/* Instruction opcode header for xc16x.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright 1996-2005 Free Software Foundation, Inc.
+
+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+*/
+
+#ifndef XC16X_OPC_H
+#define XC16X_OPC_H
+
+/* -- opc.h */
+
+#define CGEN_DIS_HASH_SIZE 8
+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE)
+
+/* -- */
+/* Enum declaration for xc16x instruction types. */
+typedef enum cgen_insn_type {
+ XC16X_INSN_INVALID, XC16X_INSN_ADDRPOF, XC16X_INSN_SUBRPOF, XC16X_INSN_ADDBRPOF
+ , XC16X_INSN_SUBBRPOF, XC16X_INSN_ADDRPAG, XC16X_INSN_SUBRPAG, XC16X_INSN_ADDBRPAG
+ , XC16X_INSN_SUBBRPAG, XC16X_INSN_ADDCRPOF, XC16X_INSN_SUBCRPOF, XC16X_INSN_ADDCBRPOF
+ , XC16X_INSN_SUBCBRPOF, XC16X_INSN_ADDCRPAG, XC16X_INSN_SUBCRPAG, XC16X_INSN_ADDCBRPAG
+ , XC16X_INSN_SUBCBRPAG, XC16X_INSN_ADDRPOFR, XC16X_INSN_SUBRPOFR, XC16X_INSN_ADDBRPOFR
+ , XC16X_INSN_SUBBRPOFR, XC16X_INSN_ADDCRPOFR, XC16X_INSN_SUBCRPOFR, XC16X_INSN_ADDCBRPOFR
+ , XC16X_INSN_SUBCBRPOFR, XC16X_INSN_ADDRHPOF, XC16X_INSN_SUBRHPOF, XC16X_INSN_ADDBRHPOF
+ , XC16X_INSN_SUBBRHPOF, XC16X_INSN_ADDRHPOF3, XC16X_INSN_SUBRHPOF3, XC16X_INSN_ADDBRHPAG3
+ , XC16X_INSN_SUBBRHPAG3, XC16X_INSN_ADDRHPAG3, XC16X_INSN_SUBRHPAG3, XC16X_INSN_ADDBRHPOF3
+ , XC16X_INSN_SUBBRHPOF3, XC16X_INSN_ADDRBHPOF, XC16X_INSN_SUBRBHPOF, XC16X_INSN_ADDBRHPAG
+ , XC16X_INSN_SUBBRHPAG, XC16X_INSN_ADDCRHPOF, XC16X_INSN_SUBCRHPOF, XC16X_INSN_ADDCBRHPOF
+ , XC16X_INSN_SUBCBRHPOF, XC16X_INSN_ADDCRHPOF3, XC16X_INSN_SUBCRHPOF3, XC16X_INSN_ADDCBRHPAG3
+ , XC16X_INSN_SUBCBRHPAG3, XC16X_INSN_ADDCRHPAG3, XC16X_INSN_SUBCRHPAG3, XC16X_INSN_ADDCBRHPOF3
+ , XC16X_INSN_SUBCBRHPOF3, XC16X_INSN_ADDCRBHPOF, XC16X_INSN_SUBCRBHPOF, XC16X_INSN_ADDCBRHPAG
+ , XC16X_INSN_SUBCBRHPAG, XC16X_INSN_ADDRI, XC16X_INSN_SUBRI, XC16X_INSN_ADDBRI
+ , XC16X_INSN_SUBBRI, XC16X_INSN_ADDRIM, XC16X_INSN_SUBRIM, XC16X_INSN_ADDBRIM
+ , XC16X_INSN_SUBBRIM, XC16X_INSN_ADDCRI, XC16X_INSN_SUBCRI, XC16X_INSN_ADDCBRI
+ , XC16X_INSN_SUBCBRI, XC16X_INSN_ADDCRIM, XC16X_INSN_SUBCRIM, XC16X_INSN_ADDCBRIM
+ , XC16X_INSN_SUBCBRIM, XC16X_INSN_ADDR, XC16X_INSN_SUBR, XC16X_INSN_ADDBR
+ , XC16X_INSN_SUBBR, XC16X_INSN_ADD2, XC16X_INSN_SUB2, XC16X_INSN_ADDB2
+ , XC16X_INSN_SUBB2, XC16X_INSN_ADD2I, XC16X_INSN_SUB2I, XC16X_INSN_ADDB2I
+ , XC16X_INSN_SUBB2I, XC16X_INSN_ADDCR, XC16X_INSN_SUBCR, XC16X_INSN_ADDBCR
+ , XC16X_INSN_SUBBCR, XC16X_INSN_ADDCR2, XC16X_INSN_SUBCR2, XC16X_INSN_ADDBCR2
+ , XC16X_INSN_SUBBCR2, XC16X_INSN_ADDCR2I, XC16X_INSN_SUBCR2I, XC16X_INSN_ADDBCR2I
+ , XC16X_INSN_SUBBCR2I, XC16X_INSN_ADDRM2, XC16X_INSN_ADDRM3, XC16X_INSN_ADDRM
+ , XC16X_INSN_ADDRM1, XC16X_INSN_SUBRM3, XC16X_INSN_SUBRM2, XC16X_INSN_SUBRM1
+ , XC16X_INSN_SUBRM, XC16X_INSN_ADDBRM2, XC16X_INSN_ADDBRM3, XC16X_INSN_ADDBRM
+ , XC16X_INSN_ADDBRM1, XC16X_INSN_SUBBRM3, XC16X_INSN_SUBBRM2, XC16X_INSN_SUBBRM1
+ , XC16X_INSN_SUBBRM, XC16X_INSN_ADDCRM2, XC16X_INSN_ADDCRM3, XC16X_INSN_ADDCRM
+ , XC16X_INSN_ADDCRM1, XC16X_INSN_SUBCRM3, XC16X_INSN_SUBCRM2, XC16X_INSN_SUBCRM1
+ , XC16X_INSN_SUBCRM, XC16X_INSN_ADDCBRM2, XC16X_INSN_ADDCBRM3, XC16X_INSN_ADDCBRM
+ , XC16X_INSN_ADDCBRM1, XC16X_INSN_SUBCBRM3, XC16X_INSN_SUBCBRM2, XC16X_INSN_SUBCBRM1
+ , XC16X_INSN_SUBCBRM, XC16X_INSN_MULS, XC16X_INSN_MULU, XC16X_INSN_DIV
+ , XC16X_INSN_DIVL, XC16X_INSN_DIVLU, XC16X_INSN_DIVU, XC16X_INSN_CPL
+ , XC16X_INSN_CPLB, XC16X_INSN_NEG, XC16X_INSN_NEGB, XC16X_INSN_ANDR
+ , XC16X_INSN_ORR, XC16X_INSN_XORR, XC16X_INSN_ANDBR, XC16X_INSN_ORBR
+ , XC16X_INSN_XORBR, XC16X_INSN_ANDRI, XC16X_INSN_ORRI, XC16X_INSN_XORRI
+ , XC16X_INSN_ANDBRI, XC16X_INSN_ORBRI, XC16X_INSN_XORBRI, XC16X_INSN_ANDRIM
+ , XC16X_INSN_ORRIM, XC16X_INSN_XORRIM, XC16X_INSN_ANDBRIM, XC16X_INSN_ORBRIM
+ , XC16X_INSN_XORBRIM, XC16X_INSN_AND2, XC16X_INSN_OR2, XC16X_INSN_XOR2
+ , XC16X_INSN_ANDB2, XC16X_INSN_ORB2, XC16X_INSN_XORB2, XC16X_INSN_AND2I
+ , XC16X_INSN_OR2I, XC16X_INSN_XOR2I, XC16X_INSN_ANDB2I, XC16X_INSN_ORB2I
+ , XC16X_INSN_XORB2I, XC16X_INSN_ANDPOFR, XC16X_INSN_ORPOFR, XC16X_INSN_XORPOFR
+ , XC16X_INSN_ANDBPOFR, XC16X_INSN_ORBPOFR, XC16X_INSN_XORBPOFR, XC16X_INSN_ANDRPOFR
+ , XC16X_INSN_ORRPOFR, XC16X_INSN_XORRPOFR, XC16X_INSN_ANDBRPOFR, XC16X_INSN_ORBRPOFR
+ , XC16X_INSN_XORBRPOFR, XC16X_INSN_ANDRM2, XC16X_INSN_ANDRM3, XC16X_INSN_ANDRM
+ , XC16X_INSN_ANDRM1, XC16X_INSN_ORRM3, XC16X_INSN_ORRM2, XC16X_INSN_ORRM1
+ , XC16X_INSN_ORRM, XC16X_INSN_XORRM3, XC16X_INSN_XORRM2, XC16X_INSN_XORRM1
+ , XC16X_INSN_XORRM, XC16X_INSN_ANDBRM2, XC16X_INSN_ANDBRM3, XC16X_INSN_ANDBRM
+ , XC16X_INSN_ANDBRM1, XC16X_INSN_ORBRM3, XC16X_INSN_ORBRM2, XC16X_INSN_ORBRM1
+ , XC16X_INSN_ORBRM, XC16X_INSN_XORBRM3, XC16X_INSN_XORBRM2, XC16X_INSN_XORBRM1
+ , XC16X_INSN_XORBRM, XC16X_INSN_MOVR, XC16X_INSN_MOVRB, XC16X_INSN_MOVRI
+ , XC16X_INSN_MOVBRI, XC16X_INSN_MOVI, XC16X_INSN_MOVBI, XC16X_INSN_MOVR2
+ , XC16X_INSN_MOVBR2, XC16X_INSN_MOVRI2, XC16X_INSN_MOVBRI2, XC16X_INSN_MOVRI3
+ , XC16X_INSN_MOVBRI3, XC16X_INSN_MOV2I, XC16X_INSN_MOVB2I, XC16X_INSN_MOV6I
+ , XC16X_INSN_MOVB6I, XC16X_INSN_MOV7I, XC16X_INSN_MOVB7I, XC16X_INSN_MOV8I
+ , XC16X_INSN_MOVB8I, XC16X_INSN_MOV9I, XC16X_INSN_MOVB9I, XC16X_INSN_MOV10I
+ , XC16X_INSN_MOVB10I, XC16X_INSN_MOVRI11, XC16X_INSN_MOVBRI11, XC16X_INSN_MOVRI12
+ , XC16X_INSN_MOVBRI12, XC16X_INSN_MOVEHM5, XC16X_INSN_MOVEHM6, XC16X_INSN_MOVEHM7
+ , XC16X_INSN_MOVEHM8, XC16X_INSN_MOVEHM9, XC16X_INSN_MOVEHM10, XC16X_INSN_MOVRMP
+ , XC16X_INSN_MOVRMP1, XC16X_INSN_MOVRMP2, XC16X_INSN_MOVRMP3, XC16X_INSN_MOVRMP4
+ , XC16X_INSN_MOVRMP5, XC16X_INSN_MOVEHM1, XC16X_INSN_MOVEHM2, XC16X_INSN_MOVEHM3
+ , XC16X_INSN_MOVEHM4, XC16X_INSN_MVE12, XC16X_INSN_MVE13, XC16X_INSN_MOVER12
+ , XC16X_INSN_MVR13, XC16X_INSN_MVER12, XC16X_INSN_MVER13, XC16X_INSN_MOVR12
+ , XC16X_INSN_MOVR13, XC16X_INSN_MOVBSRR, XC16X_INSN_MOVBZRR, XC16X_INSN_MOVBSRPOFM
+ , XC16X_INSN_MOVBSPOFMR, XC16X_INSN_MOVBZRPOFM, XC16X_INSN_MOVBZPOFMR, XC16X_INSN_MOVEBS14
+ , XC16X_INSN_MOVEBS15, XC16X_INSN_MOVERBS14, XC16X_INSN_MOVRBS15, XC16X_INSN_MOVEBZ14
+ , XC16X_INSN_MOVEBZ15, XC16X_INSN_MOVERBZ14, XC16X_INSN_MOVRBZ15, XC16X_INSN_MOVRBS
+ , XC16X_INSN_MOVRBZ, XC16X_INSN_JMPA0, XC16X_INSN_JMPA1, XC16X_INSN_JMPA_
+ , XC16X_INSN_JMPI, XC16X_INSN_JMPR_NENZ, XC16X_INSN_JMPR_SGT, XC16X_INSN_JMPR_Z
+ , XC16X_INSN_JMPR_V, XC16X_INSN_JMPR_NV, XC16X_INSN_JMPR_N, XC16X_INSN_JMPR_NN
+ , XC16X_INSN_JMPR_C, XC16X_INSN_JMPR_NC, XC16X_INSN_JMPR_EQ, XC16X_INSN_JMPR_NE
+ , XC16X_INSN_JMPR_ULT, XC16X_INSN_JMPR_ULE, XC16X_INSN_JMPR_UGE, XC16X_INSN_JMPR_UGT
+ , XC16X_INSN_JMPR_SLE, XC16X_INSN_JMPR_SGE, XC16X_INSN_JMPR_NET, XC16X_INSN_JMPR_UC
+ , XC16X_INSN_JMPR_SLT, XC16X_INSN_JMPSEG, XC16X_INSN_JMPS, XC16X_INSN_JB
+ , XC16X_INSN_JBC, XC16X_INSN_JNB, XC16X_INSN_JNBS, XC16X_INSN_CALLA0
+ , XC16X_INSN_CALLA1, XC16X_INSN_CALLA_, XC16X_INSN_CALLI, XC16X_INSN_CALLR
+ , XC16X_INSN_CALLSEG, XC16X_INSN_CALLS, XC16X_INSN_PCALL, XC16X_INSN_TRAP
+ , XC16X_INSN_RET, XC16X_INSN_RETS, XC16X_INSN_RETP, XC16X_INSN_RETI
+ , XC16X_INSN_POP, XC16X_INSN_PUSH, XC16X_INSN_SCXTI, XC16X_INSN_SCXTRPOFM
+ , XC16X_INSN_SCXTMG, XC16X_INSN_SCXTM, XC16X_INSN_NOP, XC16X_INSN_SRSTM
+ , XC16X_INSN_IDLEM, XC16X_INSN_PWRDNM, XC16X_INSN_DISWDTM, XC16X_INSN_ENWDTM
+ , XC16X_INSN_EINITM, XC16X_INSN_SRVWDTM, XC16X_INSN_SBRK, XC16X_INSN_ATOMIC
+ , XC16X_INSN_EXTR, XC16X_INSN_EXTP, XC16X_INSN_EXTP1, XC16X_INSN_EXTPG1
+ , XC16X_INSN_EXTPR, XC16X_INSN_EXTPR1, XC16X_INSN_EXTS, XC16X_INSN_EXTS1
+ , XC16X_INSN_EXTSR, XC16X_INSN_EXTSR1, XC16X_INSN_PRIOR, XC16X_INSN_BCLR18
+ , XC16X_INSN_BCLR0, XC16X_INSN_BCLR1, XC16X_INSN_BCLR2, XC16X_INSN_BCLR3
+ , XC16X_INSN_BCLR4, XC16X_INSN_BCLR5, XC16X_INSN_BCLR6, XC16X_INSN_BCLR7
+ , XC16X_INSN_BCLR8, XC16X_INSN_BCLR9, XC16X_INSN_BCLR10, XC16X_INSN_BCLR11
+ , XC16X_INSN_BCLR12, XC16X_INSN_BCLR13, XC16X_INSN_BCLR14, XC16X_INSN_BCLR15
+ , XC16X_INSN_BSET19, XC16X_INSN_BSET0, XC16X_INSN_BSET1, XC16X_INSN_BSET2
+ , XC16X_INSN_BSET3, XC16X_INSN_BSET4, XC16X_INSN_BSET5, XC16X_INSN_BSET6
+ , XC16X_INSN_BSET7, XC16X_INSN_BSET8, XC16X_INSN_BSET9, XC16X_INSN_BSET10
+ , XC16X_INSN_BSET11, XC16X_INSN_BSET12, XC16X_INSN_BSET13, XC16X_INSN_BSET14
+ , XC16X_INSN_BSET15, XC16X_INSN_BMOV, XC16X_INSN_BMOVN, XC16X_INSN_BAND
+ , XC16X_INSN_BOR, XC16X_INSN_BXOR, XC16X_INSN_BCMP, XC16X_INSN_BFLDL
+ , XC16X_INSN_BFLDH, XC16X_INSN_CMPR, XC16X_INSN_CMPBR, XC16X_INSN_CMPRI
+ , XC16X_INSN_CMPBRI, XC16X_INSN_CMPI, XC16X_INSN_CMPBI, XC16X_INSN_CMPR2
+ , XC16X_INSN_CMPBR2, XC16X_INSN_CMP2I, XC16X_INSN_CMPB2I, XC16X_INSN_CMP04
+ , XC16X_INSN_CMPB4, XC16X_INSN_CMP004, XC16X_INSN_CMP0004, XC16X_INSN_CMPB04
+ , XC16X_INSN_CMPB004, XC16X_INSN_CMPD1RI, XC16X_INSN_CMPD2RI, XC16X_INSN_CMPI1RI
+ , XC16X_INSN_CMPI2RI, XC16X_INSN_CMPD1RIM, XC16X_INSN_CMPD2RIM, XC16X_INSN_CMPI1RIM
+ , XC16X_INSN_CMPI2RIM, XC16X_INSN_CMPD1RP, XC16X_INSN_CMPD2RP, XC16X_INSN_CMPI1RP
+ , XC16X_INSN_CMPI2RP, XC16X_INSN_CMPD1RM, XC16X_INSN_CMPD2RM, XC16X_INSN_CMPI1RM
+ , XC16X_INSN_CMPI2RM, XC16X_INSN_CMPD1RMI, XC16X_INSN_CMPD2RMI, XC16X_INSN_CMPI1RMI
+ , XC16X_INSN_CMPI2RMI, XC16X_INSN_SHLR, XC16X_INSN_SHRR, XC16X_INSN_ROLR
+ , XC16X_INSN_RORR, XC16X_INSN_ASHRR, XC16X_INSN_SHLRI, XC16X_INSN_SHRRI
+ , XC16X_INSN_ROLRI, XC16X_INSN_RORRI, XC16X_INSN_ASHRRI
+} CGEN_INSN_TYPE;
+
+/* Index of `invalid' insn place holder. */
+#define CGEN_INSN_INVALID XC16X_INSN_INVALID
+
+/* Total number of insns in table. */
+#define MAX_INSNS ((int) XC16X_INSN_ASHRRI + 1)
+
+/* This struct records data prior to insertion or after extraction. */
+struct cgen_fields
+{
+ int length;
+ long f_nil;
+ long f_anyof;
+ long f_op1;
+ long f_op2;
+ long f_condcode;
+ long f_icondcode;
+ long f_rcond;
+ long f_qcond;
+ long f_extccode;
+ long f_r0;
+ long f_r1;
+ long f_r2;
+ long f_r3;
+ long f_r4;
+ long f_uimm2;
+ long f_uimm3;
+ long f_uimm4;
+ long f_uimm7;
+ long f_uimm8;
+ long f_uimm16;
+ long f_memory;
+ long f_memgr8;
+ long f_rel8;
+ long f_relhi8;
+ long f_reg8;
+ long f_regmem8;
+ long f_regoff8;
+ long f_reghi8;
+ long f_regb8;
+ long f_seg8;
+ long f_segnum8;
+ long f_mask8;
+ long f_pagenum;
+ long f_datahi8;
+ long f_data8;
+ long f_offset16;
+ long f_op_bit1;
+ long f_op_bit2;
+ long f_op_bit4;
+ long f_op_bit3;
+ long f_op_2bit;
+ long f_op_bitone;
+ long f_op_onebit;
+ long f_op_1bit;
+ long f_op_lbit4;
+ long f_op_lbit2;
+ long f_op_bit8;
+ long f_op_bit16;
+ long f_qbit;
+ long f_qlobit;
+ long f_qhibit;
+ long f_qlobit2;
+ long f_pof;
+};
+
+#define CGEN_INIT_PARSE(od) \
+{\
+}
+#define CGEN_INIT_INSERT(od) \
+{\
+}
+#define CGEN_INIT_EXTRACT(od) \
+{\
+}
+#define CGEN_INIT_PRINT(od) \
+{\
+}
+
+
+#endif /* XC16X_OPC_H */
Modified: branches/binutils/package/opcodes/xstormy16-ibld.c
===================================================================
--- branches/binutils/package/opcodes/xstormy16-ibld.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/xstormy16-ibld.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -3,7 +3,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
@@ -168,13 +168,21 @@
else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
{
unsigned long maxval = mask;
-
- if ((unsigned long) value > maxval)
+ unsigned long val = (unsigned long) value;
+
+ /* For hosts with a word size > 32 check to see if value has been sign
+ extended beyond 32 bits. If so then ignore these higher sign bits
+ as the user is attempting to store a 32-bit signed value into an
+ unsigned 32-bit field which is allowed. */
+ if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
+ val &= 0xFFFFFFFF;
+
+ if (val > maxval)
{
/* xgettext:c-format */
sprintf (errbuf,
- _("operand out of range (%lu not between 0 and %lu)"),
- value, maxval);
+ _("operand out of range (0x%lx not between 0 and 0x%lx)"),
+ val, maxval);
return errbuf;
}
}
@@ -440,9 +448,8 @@
word_length may be too big. */
if (cd->min_insn_bitsize < cd->base_insn_bitsize)
{
- if (word_offset == 0
- && word_length > total_length)
- word_length = total_length;
+ if (word_offset + word_length > total_length)
+ word_length = total_length - word_offset;
}
/* Does the value reside in INSN_VALUE, and at the right alignment? */
Modified: branches/binutils/package/opcodes/z80-dis.c
===================================================================
--- branches/binutils/package/opcodes/z80-dis.c 2006-04-19 08:31:15 UTC (rev 11)
+++ branches/binutils/package/opcodes/z80-dis.c 2006-04-19 08:33:31 UTC (rev 12)
@@ -26,7 +26,7 @@
bfd_vma base;
int n_fetch;
int n_used;
- char data[4];
+ signed char data[4];
} ;
typedef int (*func)(struct buffer *, disassemble_info *, char *);
@@ -39,7 +39,7 @@
char * text;
} ;
-#define TXTSIZ 16
+#define TXTSIZ 24
/* Names of 16-bit registers. */
static char * rr_str[] = { "bc", "de", "hl", "sp" };
/* Names of 8-bit registers. */
@@ -61,7 +61,7 @@
abort ();
r = info->read_memory_func (buf->base + buf->n_fetch,
- buf->data + buf->n_fetch,
+ (unsigned char*) buf->data + buf->n_fetch,
n, info);
if (r == 0)
buf->n_fetch += n;
@@ -379,7 +379,7 @@
int d;
signed char *p;
- p = (unsigned char*) buf->data + buf->n_fetch;
+ p = buf->data + buf->n_fetch;
if (fetch_data (buf, info, 1))
{
@@ -400,7 +400,7 @@
int d;
signed char *p;
- p = (unsigned char*) buf->data + buf->n_fetch;
+ p = buf->data + buf->n_fetch;
if (fetch_data (buf, info, 1))
{
@@ -418,7 +418,7 @@
arit_d (struct buffer *buf, disassemble_info * info, char *txt)
{
char mytxt[TXTSIZ];
- unsigned char c;
+ signed char c;
c = buf->data[buf->n_fetch - 1];
snprintf (mytxt, TXTSIZ, txt, arit_str[(c >> 3) & 7]);
@@ -429,7 +429,7 @@
ld_r_d (struct buffer *buf, disassemble_info * info, char *txt)
{
char mytxt[TXTSIZ];
- unsigned char c;
+ signed char c;
c = buf->data[buf->n_fetch - 1];
snprintf (mytxt, TXTSIZ, txt, r_str[(c >> 3) & 7]);
@@ -440,7 +440,7 @@
ld_d_r(struct buffer *buf, disassemble_info * info, char *txt)
{
char mytxt[TXTSIZ];
- unsigned char c;
+ signed char c;
c = buf->data[buf->n_fetch - 1];
snprintf (mytxt, TXTSIZ, txt, r_str[c & 7]);
@@ -461,9 +461,9 @@
d = p[2];
if (((p[3] & 0xC0) == 0x40) || ((p[3] & 7) == 0x06))
- snprintf (arg, TXTSIZ, "(%s+%d)", txt, d);
+ snprintf (arg, TXTSIZ, "(%s%+d)", txt, d);
else
- snprintf (arg, TXTSIZ, "(%s+%d),%s", txt, d, r_str[p[3] & 7]);
+ snprintf (arg, TXTSIZ, "(%s%+d),%s", txt, d, r_str[p[3] & 7]);
if ((p[3] & 0xc0) == 0)
info->fprintf_func (info->stream, "%s %s",
@@ -494,18 +494,18 @@
{ 0x2B, 0xFF, prt, "dec %s" },
{ 0x29, 0xFF, addvv, "%s" },
{ 0x09, 0xCF, prt_rr, "add %s," },
- { 0x34, 0xFF, prt_d, "inc (%s+%%d)" },
- { 0x35, 0xFF, prt_d, "dec (%s+%%d)" },
- { 0x36, 0xFF, prt_d_n, "ld (%s+%%d),0x%%02x" },
+ { 0x34, 0xFF, prt_d, "inc (%s%%+d)" },
+ { 0x35, 0xFF, prt_d, "dec (%s%%+d)" },
+ { 0x36, 0xFF, prt_d_n, "ld (%s%%+d),0x%%%%02x" },
{ 0x76, 0xFF, dump, "h" },
- { 0x46, 0xC7, ld_r_d, "ld %%s,(%s+%%%%d)" },
- { 0x70, 0xF8, ld_d_r, "ld (%s+%%%%d),%%s" },
+ { 0x46, 0xC7, ld_r_d, "ld %%s,(%s%%%%+d)" },
+ { 0x70, 0xF8, ld_d_r, "ld (%s%%%%+d),%%s" },
{ 0x64, 0xF6, ld_v_v, "%s" },
{ 0x60, 0xF0, ld_r_r, "ld %s%%s,%%s" },
{ 0x44, 0xC6, ld_r_r, "ld %%s,%s%%s" },
- { 0x86, 0xC7, arit_d, "%%s(%s+%%%%d)" },
+ { 0x86, 0xC7, arit_d, "%%s(%s%%%%+d)" },
{ 0x84, 0xC6, arit_r, "%%s%s%%s" },
{ 0xE1, 0xFF, prt, "pop %s" },
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